Merge remote-tracking branch 'omap_dss2/for-next'
[deliverable/linux.git] / Documentation / devicetree / bindings / display / exynos / exynos_hdmi.txt
CommitLineData
566cf8ee
RS
1Device-Tree bindings for drm hdmi driver
2
3Required properties:
cc57caf0 4- compatible: value should be one among the following:
f038f586
AH
5 1) "samsung,exynos4210-hdmi"
6 2) "samsung,exynos4212-hdmi"
7 3) "samsung,exynos5420-hdmi"
2f1cad0d 8 4) "samsung,exynos5433-hdmi"
566cf8ee
RS
9- reg: physical base address of the hdmi and length of memory mapped
10 region.
11- interrupts: interrupt number to the cpu.
05b01dd9 12- hpd-gpios: following information about the hotplug gpio pin.
566cf8ee
RS
13 a) phandle of the gpio controller node.
14 b) pin number within the gpio controller.
8eed2641 15 c) optional flags and pull up/down.
2f1cad0d
AH
16- ddc: phandle to the hdmi ddc node
17- phy: phandle to the hdmi phy node
18- samsung,syscon-phandle: phandle for system controller node for PMU.
19
20Required properties for Exynos 4210, 4212, 5420 and 5433:
6edf22a4
RS
21- clocks: list of clock IDs from SoC clock driver.
22 a) hdmi: Gate of HDMI IP bus clock.
23 b) sclk_hdmi: Gate of HDMI special clock.
24 c) sclk_pixel: Pixel special clock, one of the two possible inputs of
25 HDMI clock mux.
26 d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of
27 HDMI clock mux.
28 e) mout_hdmi: It is required by the driver to switch between the 2
29 parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
30 after configuration, parent is set to sclk_hdmiphy else
31 sclk_pixel.
32- clock-names: aliases as per driver requirements for above clock IDs:
33 "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".
2f1cad0d
AH
34
35Required properties for Exynos 5433:
36- clocks: list of clock specifiers according to common clock bindings.
37 a) hdmi_pclk: Gate of HDMI IP APB bus.
38 b) hdmi_i_pclk: Gate of HDMI-PHY IP APB bus.
39 d) i_tmds_clk: Gate of HDMI TMDS clock.
40 e) i_pixel_clk: Gate of HDMI pixel clock.
41 f) i_spdif_clk: Gate of HDMI SPDIF clock.
42 g) oscclk: Oscillator clock, used as parent of following *_user clocks
43 in case HDMI-PHY is not operational.
44 h) tmds_clko: TMDS clock generated by HDMI-PHY.
45 i) tmds_clko_user: MUX used to switch between oscclk and tmds_clko,
46 respectively if HDMI-PHY is off and operational.
47 j) pixel_clko: Pixel clock generated by HDMI-PHY.
48 k) pixel_clko_user: MUX used to switch between oscclk and pixel_clko,
49 respectively if HDMI-PHY is off and operational.
50- clock-names: aliases for above clock specfiers.
51- samsung,sysreg: handle to syscon used to control the system registers.
2b768132 52
566cf8ee
RS
53Example:
54
55 hdmi {
cc57caf0 56 compatible = "samsung,exynos4212-hdmi";
566cf8ee
RS
57 reg = <0x14530000 0x100000>;
58 interrupts = <0 95 0>;
05b01dd9 59 hpd-gpios = <&gpx3 7 1>;
2b768132
DK
60 ddc = <&hdmi_ddc_node>;
61 phy = <&hdmi_phy_node>;
049d34e9 62 samsung,syscon-phandle = <&pmu_system_controller>;
566cf8ee 63 };
This page took 0.169909 seconds and 5 git commands to generate.