[deliverable/linux.git] / Documentation / devicetree / bindings / mmc / synopsys-dw-mshc.txt

* Synopsys Designware Mobile Storage Host Controller

The Synopsys designware mobile storage host controller is used to interface
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
differences between the core mmc properties described by mmc.txt and the
properties used by the Synopsys Designware Mobile Storage Host Controller.

Required Properties:

* compatible: should be
	- snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
* #address-cells: should be 1.
* #size-cells: should be 0.

# Slots: The slot specific information are contained within child-nodes with
  each child-node representing a supported slot. There should be atleast one
  child node representing a card slot. The name of the child node representing
  the slot is recommended to be slot@n where n is the unique number of the slot
  connnected to the controller. The following are optional properties which
  can be included in the slot child node.

	* reg: specifies the physical slot number. The valid values of this
	  property is 0 to (num-slots -1), where num-slots is the value
	  specified by the num-slots property.

	* bus-width: as documented in mmc core bindings.

	* wp-gpios: specifies the write protect gpio line. The format of the
	  gpio specifier depends on the gpio controller. If a GPIO is not used
	  for write-protect, this property is optional.

	* disable-wp: If the wp-gpios property isn't present then (by default)
	  we'd assume that the write protect is hooked up directly to the
	  controller's special purpose write protect line (accessible via
	  the WRTPRT register).  However, it's possible that we simply don't
	  want write protect.  In that case specify 'disable-wp'.
	  NOTE: This property is not required for slots known to always
	  connect to eMMC or SDIO cards.

Optional properties:

* resets: phandle + reset specifier pair, intended to represent hardware
  reset signal present internally in some host controller IC designs.
  See Documentation/devicetree/bindings/reset/reset.txt for details.

* clocks: from common clock binding: handle to biu and ciu clocks for the
  bus interface unit clock and the card interface unit clock.

* clock-names: from common clock binding: Shall be "biu" and "ciu".
  If the biu clock is missing we'll simply skip enabling it.  If the
  ciu clock is missing we'll just assume that the clock is running at
  clock-frequency.  It is an error to omit both the ciu clock and the
  clock-frequency.

* clock-frequency: should be the frequency (in Hz) of the ciu clock.  If this
  is specified and the ciu clock is specified then we'll try to set the ciu
  clock to this at probe time.

* clock-freq-min-max: Minimum and Maximum clock frequency for card output
  clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz by default.

* num-slots: specifies the number of slots supported by the controller.
  The number of physical slots actually used could be equal or less than the
  value specified by num-slots. If this property is not specified, the value
  of num-slot property is assumed to be 1.

* fifo-depth: The maximum size of the tx/rx fifo's. If this property is not
  specified, the default value of the fifo size is determined from the
  controller registers.

* card-detect-delay: Delay in milli-seconds before detecting card after card
  insert event. The default value is 0.

* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to 50MHz)
			   (use "cap-mmc-highspeed" or "cap-sd-highspeed" instead)

* broken-cd: as documented in mmc core bindings.

* vmmc-supply: The phandle to the regulator to use for vmmc.  If this is
  specified we'll defer probe until we can find this regulator.

* dmas: List of DMA specifiers with the controller specific format as described
  in the generic DMA client binding. Refer to dma.txt for details.

* dma-names: request names for generic DMA client binding. Must be "rx-tx".
  Refer to dma.txt for details.

Aliases:

- All the MSHC controller nodes should be represented in the aliases node using
  the following format 'mshc{n}' where n is a unique number for the alias.

Example:

The MSHC controller node can be split into two portions, SoC specific and
board specific portions as listed below.

	dwmmc0@12200000 {
		compatible = "snps,dw-mshc";
		clocks = <&clock 351>, <&clock 132>;
		clock-names = "biu", "ciu";
		reg = <0x12200000 0x1000>;
		interrupts = <0 75 0>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

[board specific internal DMA resources]

	dwmmc0@12200000 {
		clock-frequency = <400000000>;
		clock-freq-min-max = <400000 200000000>;
		num-slots = <1>;
		broken-cd;
		fifo-depth = <0x80>;
		card-detect-delay = <200>;
		vmmc-supply = <&buck8>;
		bus-width = <8>;
		cap-mmc-highspeed;
		cap-sd-highspeed;
	};

[board specific generic DMA request binding]

	dwmmc0@12200000 {
		clock-frequency = <400000000>;
		clock-freq-min-max = <400000 200000000>;
		num-slots = <1>;
		broken-cd;
		fifo-depth = <0x80>;
		card-detect-delay = <200>;
		vmmc-supply = <&buck8>;
		bus-width = <8>;
		cap-mmc-highspeed;
		cap-sd-highspeed;
		dmas = <&pdma 12>;
		dma-names = "rx-tx";
	};
Commit	Line	Data
53126a2f	1	* Synopsys Designware Mobile Storage Host Controller
c91eab4b	2
53126a2f	3	The Synopsys designware mobile storage host controller is used to interface
c91eab4b TA	4	a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
c91eab4b TA	5	differences between the core mmc properties described by mmc.txt and the
53126a2f	6	properties used by the Synopsys Designware Mobile Storage Host Controller.
c91eab4b TA	7
	8	Required Properties:
	9
	10	* compatible: should be
53126a2f	11	- snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
c91eab4b TA	12	* #address-cells: should be 1.
	13	* #size-cells: should be 0.
	14
	15	# Slots: The slot specific information are contained within child-nodes with
	16	each child-node representing a supported slot. There should be atleast one
	17	child node representing a card slot. The name of the child node representing
	18	the slot is recommended to be slot@n where n is the unique number of the slot
	19	connnected to the controller. The following are optional properties which
	20	can be included in the slot child node.
	21
	22	* reg: specifies the physical slot number. The valid values of this
	23	property is 0 to (num-slots -1), where num-slots is the value
	24	specified by the num-slots property.
	25
	26	* bus-width: as documented in mmc core bindings.
	27
	28	* wp-gpios: specifies the write protect gpio line. The format of the
a70aaa64 DA	29	gpio specifier depends on the gpio controller. If a GPIO is not used
	30	for write-protect, this property is optional.
	31
	32	* disable-wp: If the wp-gpios property isn't present then (by default)
	33	we'd assume that the write protect is hooked up directly to the
	34	controller's special purpose write protect line (accessible via
	35	the WRTPRT register). However, it's possible that we simply don't
	36	want write protect. In that case specify 'disable-wp'.
	37	NOTE: This property is not required for slots known to always
	38	connect to eMMC or SDIO cards.
c91eab4b TA	39
	40	Optional properties:
	41
e5375a81 GX	42	* resets: phandle + reset specifier pair, intended to represent hardware
	43	reset signal present internally in some host controller IC designs.
	44	See Documentation/devicetree/bindings/reset/reset.txt for details.
	45
3c6d89ea DA	46	* clocks: from common clock binding: handle to biu and ciu clocks for the
	47	bus interface unit clock and the card interface unit clock.
	48
	49	* clock-names: from common clock binding: Shall be "biu" and "ciu".
	50	If the biu clock is missing we'll simply skip enabling it. If the
	51	ciu clock is missing we'll just assume that the clock is running at
	52	clock-frequency. It is an error to omit both the ciu clock and the
	53	clock-frequency.
	54
	55	* clock-frequency: should be the frequency (in Hz) of the ciu clock. If this
	56	is specified and the ciu clock is specified then we'll try to set the ciu
	57	clock to this at probe time.
	58
1f44a2a5 SJ	59	* clock-freq-min-max: Minimum and Maximum clock frequency for card output
	60	clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz by default.
	61
c91eab4b TA	62	* num-slots: specifies the number of slots supported by the controller.
	63	The number of physical slots actually used could be equal or less than the
	64	value specified by num-slots. If this property is not specified, the value
	65	of num-slot property is assumed to be 1.
	66
	67	* fifo-depth: The maximum size of the tx/rx fifo's. If this property is not
	68	specified, the default value of the fifo size is determined from the
	69	controller registers.
	70
	71	* card-detect-delay: Delay in milli-seconds before detecting card after card
	72	insert event. The default value is 0.
	73
c83c8737 JC	74	* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to 50MHz)
c83c8737 JC	75	(use "cap-mmc-highspeed" or "cap-sd-highspeed" instead)
c91eab4b TA	76
	77	* broken-cd: as documented in mmc core bindings.
	78
870556a3 DA	79	* vmmc-supply: The phandle to the regulator to use for vmmc. If this is
	80	specified we'll defer probe until we can find this regulator.
	81
87ffa7d3 SL	82	* dmas: List of DMA specifiers with the controller specific format as described
	83	in the generic DMA client binding. Refer to dma.txt for details.
	84
	85	* dma-names: request names for generic DMA client binding. Must be "rx-tx".
	86	Refer to dma.txt for details.
	87
c91eab4b TA	88	Aliases:
	89
	90	- All the MSHC controller nodes should be represented in the aliases node using
	91	the following format 'mshc{n}' where n is a unique number for the alias.
	92
	93	Example:
	94
	95	The MSHC controller node can be split into two portions, SoC specific and
	96	board specific portions as listed below.
	97
	98	dwmmc0@12200000 {
	99	compatible = "snps,dw-mshc";
3c6d89ea DA	100	clocks = <&clock 351>, <&clock 132>;
3c6d89ea DA	101	clock-names = "biu", "ciu";
c91eab4b TA	102	reg = <0x12200000 0x1000>;
	103	interrupts = <0 75 0>;
	104	#address-cells = <1>;
	105	#size-cells = <0>;
	106	};
	107
87ffa7d3 SL	108	[board specific internal DMA resources]
	109
	110	dwmmc0@12200000 {
	111	clock-frequency = <400000000>;
	112	clock-freq-min-max = <400000 200000000>;
	113	num-slots = <1>;
	114	broken-cd;
	115	fifo-depth = <0x80>;
	116	card-detect-delay = <200>;
	117	vmmc-supply = <&buck8>;
	118	bus-width = <8>;
	119	cap-mmc-highspeed;
	120	cap-sd-highspeed;
	121	};
	122
	123	[board specific generic DMA request binding]
	124
c91eab4b	125	dwmmc0@12200000 {
3c6d89ea	126	clock-frequency = <400000000>;
1f44a2a5	127	clock-freq-min-max = <400000 200000000>;
c91eab4b	128	num-slots = <1>;
c91eab4b TA	129	broken-cd;
	130	fifo-depth = <0x80>;
	131	card-detect-delay = <200>;
870556a3	132	vmmc-supply = <&buck8>;
c83c8737 JC	133	bus-width = <8>;
	134	cap-mmc-highspeed;
	135	cap-sd-highspeed;
87ffa7d3 SL	136	dmas = <&pdma 12>;
87ffa7d3 SL	137	dma-names = "rx-tx";
c91eab4b	138	};