Merge remote-tracking branch 'keys/keys-next'
[deliverable/linux.git] / arch / alpha / kernel / setup.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/alpha/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 */
6
7/* 2.3.x bootmem, 1999 Andrea Arcangeli <andrea@suse.de> */
8
9/*
10 * Bootup setup stuff.
11 */
12
13#include <linux/sched.h>
14#include <linux/kernel.h>
15#include <linux/mm.h>
16#include <linux/stddef.h>
17#include <linux/unistd.h>
18#include <linux/ptrace.h>
19#include <linux/slab.h>
20#include <linux/user.h>
894673ee 21#include <linux/screen_info.h>
1da177e4 22#include <linux/delay.h>
1da177e4
LT
23#include <linux/mc146818rtc.h>
24#include <linux/console.h>
917b1f78 25#include <linux/cpu.h>
1da177e4
LT
26#include <linux/errno.h>
27#include <linux/init.h>
28#include <linux/string.h>
29#include <linux/ioport.h>
e5c6c8e4 30#include <linux/platform_device.h>
1da177e4
LT
31#include <linux/bootmem.h>
32#include <linux/pci.h>
33#include <linux/seq_file.h>
34#include <linux/root_dev.h>
35#include <linux/initrd.h>
36#include <linux/eisa.h>
22a9835c 37#include <linux/pfn.h>
1da177e4
LT
38#ifdef CONFIG_MAGIC_SYSRQ
39#include <linux/sysrq.h>
40#include <linux/reboot.h>
41#endif
42#include <linux/notifier.h>
43#include <asm/setup.h>
44#include <asm/io.h>
74fd1b68 45#include <linux/log2.h>
00cd1176 46#include <linux/export.h>
1da177e4 47
e041c683 48extern struct atomic_notifier_head panic_notifier_list;
1da177e4
LT
49static int alpha_panic_event(struct notifier_block *, unsigned long, void *);
50static struct notifier_block alpha_panic_block = {
51 alpha_panic_event,
52 NULL,
53 INT_MAX /* try to do it first */
54};
55
56#include <asm/uaccess.h>
57#include <asm/pgtable.h>
1da177e4
LT
58#include <asm/hwrpb.h>
59#include <asm/dma.h>
1da177e4
LT
60#include <asm/mmu_context.h>
61#include <asm/console.h>
62
63#include "proto.h"
64#include "pci_impl.h"
65
66
67struct hwrpb_struct *hwrpb;
cff52daf 68EXPORT_SYMBOL(hwrpb);
1da177e4
LT
69unsigned long srm_hae;
70
71int alpha_l1i_cacheshape;
72int alpha_l1d_cacheshape;
73int alpha_l2_cacheshape;
74int alpha_l3_cacheshape;
75
76#ifdef CONFIG_VERBOSE_MCHECK
77/* 0=minimum, 1=verbose, 2=all */
78/* These can be overridden via the command line, ie "verbose_mcheck=2") */
79unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON;
80#endif
81
2258a5bb
RR
82#ifdef CONFIG_NUMA
83struct cpumask node_to_cpumask_map[MAX_NUMNODES] __read_mostly;
84EXPORT_SYMBOL(node_to_cpumask_map);
85#endif
86
1da177e4
LT
87/* Which processor we booted from. */
88int boot_cpuid;
89
90/*
91 * Using SRM callbacks for initial console output. This works from
92 * setup_arch() time through the end of time_init(), as those places
93 * are under our (Alpha) control.
94
95 * "srmcons" specified in the boot command arguments allows us to
96 * see kernel messages during the period of time before the true
97 * console device is "registered" during console_init().
98 * As of this version (2.5.59), console_init() will call
99 * disable_early_printk() as the last action before initializing
100 * the console drivers. That's the last possible time srmcons can be
101 * unregistered without interfering with console behavior.
102 *
103 * By default, OFF; set it with a bootcommand arg of "srmcons" or
104 * "console=srm". The meaning of these two args is:
105 * "srmcons" - early callback prints
106 * "console=srm" - full callback based console, including early prints
107 */
108int srmcons_output = 0;
109
110/* Enforce a memory size limit; useful for testing. By default, none. */
111unsigned long mem_size_limit = 0;
112
113/* Set AGP GART window size (0 means disabled). */
114unsigned long alpha_agpgart_size = DEFAULT_AGP_APER_SIZE;
115
116#ifdef CONFIG_ALPHA_GENERIC
117struct alpha_machine_vector alpha_mv;
00fc0e0d 118EXPORT_SYMBOL(alpha_mv);
994dcf70
RH
119#endif
120
121#ifndef alpha_using_srm
1da177e4 122int alpha_using_srm;
cff52daf 123EXPORT_SYMBOL(alpha_using_srm);
1da177e4
LT
124#endif
125
994dcf70
RH
126#ifndef alpha_using_qemu
127int alpha_using_qemu;
128#endif
129
1da177e4
LT
130static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long,
131 unsigned long);
132static struct alpha_machine_vector *get_sysvec_byname(const char *);
133static void get_sysnames(unsigned long, unsigned long, unsigned long,
134 char **, char **);
135static void determine_cpu_caches (unsigned int);
136
3c253ca0 137static char __initdata command_line[COMMAND_LINE_SIZE];
1da177e4
LT
138
139/*
140 * The format of "screen_info" is strange, and due to early
141 * i386-setup code. This is just enough to make the console
142 * code think we're on a VGA color display.
143 */
144
145struct screen_info screen_info = {
146 .orig_x = 0,
147 .orig_y = 25,
148 .orig_video_cols = 80,
149 .orig_video_lines = 25,
150 .orig_video_isVGA = 1,
151 .orig_video_points = 16
152};
153
cff52daf
AV
154EXPORT_SYMBOL(screen_info);
155
1da177e4
LT
156/*
157 * The direct map I/O window, if any. This should be the same
158 * for all busses, since it's used by virt_to_bus.
159 */
160
161unsigned long __direct_map_base;
162unsigned long __direct_map_size;
cff52daf
AV
163EXPORT_SYMBOL(__direct_map_base);
164EXPORT_SYMBOL(__direct_map_size);
1da177e4
LT
165
166/*
167 * Declare all of the machine vectors.
168 */
169
170/* GCC 2.7.2 (on alpha at least) is lame. It does not support either
171 __attribute__((weak)) or #pragma weak. Bypass it and talk directly
172 to the assembler. */
173
174#define WEAK(X) \
175 extern struct alpha_machine_vector X; \
176 asm(".weak "#X)
177
178WEAK(alcor_mv);
179WEAK(alphabook1_mv);
180WEAK(avanti_mv);
181WEAK(cabriolet_mv);
182WEAK(clipper_mv);
183WEAK(dp264_mv);
184WEAK(eb164_mv);
185WEAK(eb64p_mv);
186WEAK(eb66_mv);
187WEAK(eb66p_mv);
188WEAK(eiger_mv);
189WEAK(jensen_mv);
190WEAK(lx164_mv);
191WEAK(lynx_mv);
192WEAK(marvel_ev7_mv);
193WEAK(miata_mv);
194WEAK(mikasa_mv);
195WEAK(mikasa_primo_mv);
196WEAK(monet_mv);
197WEAK(nautilus_mv);
198WEAK(noname_mv);
199WEAK(noritake_mv);
200WEAK(noritake_primo_mv);
201WEAK(p2k_mv);
202WEAK(pc164_mv);
203WEAK(privateer_mv);
204WEAK(rawhide_mv);
205WEAK(ruffian_mv);
206WEAK(rx164_mv);
207WEAK(sable_mv);
208WEAK(sable_gamma_mv);
209WEAK(shark_mv);
210WEAK(sx164_mv);
211WEAK(takara_mv);
212WEAK(titan_mv);
213WEAK(webbrick_mv);
214WEAK(wildfire_mv);
215WEAK(xl_mv);
216WEAK(xlt_mv);
217
218#undef WEAK
219
220/*
221 * I/O resources inherited from PeeCees. Except for perhaps the
222 * turbochannel alphas, everyone has these on some sort of SuperIO chip.
223 *
224 * ??? If this becomes less standard, move the struct out into the
225 * machine vector.
226 */
227
228static void __init
229reserve_std_resources(void)
230{
231 static struct resource standard_io_resources[] = {
232 { .name = "rtc", .start = -1, .end = -1 },
233 { .name = "dma1", .start = 0x00, .end = 0x1f },
234 { .name = "pic1", .start = 0x20, .end = 0x3f },
235 { .name = "timer", .start = 0x40, .end = 0x5f },
236 { .name = "keyboard", .start = 0x60, .end = 0x6f },
237 { .name = "dma page reg", .start = 0x80, .end = 0x8f },
238 { .name = "pic2", .start = 0xa0, .end = 0xbf },
239 { .name = "dma2", .start = 0xc0, .end = 0xdf },
240 };
241
242 struct resource *io = &ioport_resource;
243 size_t i;
244
245 if (hose_head) {
246 struct pci_controller *hose;
247 for (hose = hose_head; hose; hose = hose->next)
248 if (hose->index == 0) {
249 io = hose->io_space;
250 break;
251 }
252 }
253
254 /* Fix up for the Jensen's queer RTC placement. */
255 standard_io_resources[0].start = RTC_PORT(0);
256 standard_io_resources[0].end = RTC_PORT(0) + 0x10;
257
25c8716c 258 for (i = 0; i < ARRAY_SIZE(standard_io_resources); ++i)
1da177e4
LT
259 request_resource(io, standard_io_resources+i);
260}
261
1da177e4 262#define PFN_MAX PFN_DOWN(0x80000000)
fb26b3e6
RK
263#define for_each_mem_cluster(memdesc, _cluster, i) \
264 for ((_cluster) = (memdesc)->cluster, (i) = 0; \
265 (i) < (memdesc)->numclusters; (i)++, (_cluster)++)
1da177e4
LT
266
267static unsigned long __init
268get_mem_size_limit(char *s)
269{
270 unsigned long end = 0;
271 char *from = s;
272
273 end = simple_strtoul(from, &from, 0);
274 if ( *from == 'K' || *from == 'k' ) {
275 end = end << 10;
276 from++;
277 } else if ( *from == 'M' || *from == 'm' ) {
278 end = end << 20;
279 from++;
280 } else if ( *from == 'G' || *from == 'g' ) {
281 end = end << 30;
282 from++;
283 }
284 return end >> PAGE_SHIFT; /* Return the PFN of the limit. */
285}
286
287#ifdef CONFIG_BLK_DEV_INITRD
288void * __init
289move_initrd(unsigned long mem_limit)
290{
291 void *start;
292 unsigned long size;
293
294 size = initrd_end - initrd_start;
295 start = __alloc_bootmem(PAGE_ALIGN(size), PAGE_SIZE, 0);
296 if (!start || __pa(start) + size > mem_limit) {
297 initrd_start = initrd_end = 0;
298 return NULL;
299 }
300 memmove(start, (void *)initrd_start, size);
301 initrd_start = (unsigned long)start;
302 initrd_end = initrd_start + size;
303 printk("initrd moved to %p\n", start);
304 return start;
305}
306#endif
307
308#ifndef CONFIG_DISCONTIGMEM
309static void __init
310setup_memory(void *kernel_end)
311{
312 struct memclust_struct * cluster;
313 struct memdesc_struct * memdesc;
314 unsigned long start_kernel_pfn, end_kernel_pfn;
315 unsigned long bootmap_size, bootmap_pages, bootmap_start;
316 unsigned long start, end;
317 unsigned long i;
318
319 /* Find free clusters, and init and free the bootmem accordingly. */
320 memdesc = (struct memdesc_struct *)
321 (hwrpb->mddt_offset + (unsigned long) hwrpb);
322
323 for_each_mem_cluster(memdesc, cluster, i) {
324 printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n",
325 i, cluster->usage, cluster->start_pfn,
326 cluster->start_pfn + cluster->numpages);
327
328 /* Bit 0 is console/PALcode reserved. Bit 1 is
329 non-volatile memory -- we might want to mark
330 this for later. */
331 if (cluster->usage & 3)
332 continue;
333
334 end = cluster->start_pfn + cluster->numpages;
335 if (end > max_low_pfn)
336 max_low_pfn = end;
337 }
338
339 /*
340 * Except for the NUMA systems (wildfire, marvel) all of the
341 * Alpha systems we run on support 32GB of memory or less.
342 * Since the NUMA systems introduce large holes in memory addressing,
343 * we can get into a situation where there is not enough contiguous
344 * memory for the memory map.
345 *
346 * Limit memory to the first 32GB to limit the NUMA systems to
347 * memory on their first node (wildfire) or 2 (marvel) to avoid
348 * not being able to produce the memory map. In order to access
349 * all of the memory on the NUMA systems, build with discontiguous
350 * memory support.
351 *
352 * If the user specified a memory limit, let that memory limit stand.
353 */
354 if (!mem_size_limit)
355 mem_size_limit = (32ul * 1024 * 1024 * 1024) >> PAGE_SHIFT;
356
357 if (mem_size_limit && max_low_pfn >= mem_size_limit)
358 {
359 printk("setup: forcing memory size to %ldK (from %ldK).\n",
360 mem_size_limit << (PAGE_SHIFT - 10),
361 max_low_pfn << (PAGE_SHIFT - 10));
362 max_low_pfn = mem_size_limit;
363 }
364
365 /* Find the bounds of kernel memory. */
366 start_kernel_pfn = PFN_DOWN(KERNEL_START_PHYS);
367 end_kernel_pfn = PFN_UP(virt_to_phys(kernel_end));
368 bootmap_start = -1;
369
370 try_again:
371 if (max_low_pfn <= end_kernel_pfn)
372 panic("not enough memory to boot");
373
374 /* We need to know how many physically contiguous pages
375 we'll need for the bootmap. */
376 bootmap_pages = bootmem_bootmap_pages(max_low_pfn);
377
378 /* Now find a good region where to allocate the bootmap. */
379 for_each_mem_cluster(memdesc, cluster, i) {
380 if (cluster->usage & 3)
381 continue;
382
383 start = cluster->start_pfn;
384 end = start + cluster->numpages;
385 if (start >= max_low_pfn)
386 continue;
387 if (end > max_low_pfn)
388 end = max_low_pfn;
389 if (start < start_kernel_pfn) {
390 if (end > end_kernel_pfn
391 && end - end_kernel_pfn >= bootmap_pages) {
392 bootmap_start = end_kernel_pfn;
393 break;
394 } else if (end > start_kernel_pfn)
395 end = start_kernel_pfn;
396 } else if (start < end_kernel_pfn)
397 start = end_kernel_pfn;
398 if (end - start >= bootmap_pages) {
399 bootmap_start = start;
400 break;
401 }
402 }
403
404 if (bootmap_start == ~0UL) {
405 max_low_pfn >>= 1;
406 goto try_again;
407 }
408
409 /* Allocate the bootmap and mark the whole MM as reserved. */
410 bootmap_size = init_bootmem(bootmap_start, max_low_pfn);
411
412 /* Mark the free regions. */
413 for_each_mem_cluster(memdesc, cluster, i) {
414 if (cluster->usage & 3)
415 continue;
416
417 start = cluster->start_pfn;
418 end = cluster->start_pfn + cluster->numpages;
419 if (start >= max_low_pfn)
420 continue;
421 if (end > max_low_pfn)
422 end = max_low_pfn;
423 if (start < start_kernel_pfn) {
424 if (end > end_kernel_pfn) {
425 free_bootmem(PFN_PHYS(start),
426 (PFN_PHYS(start_kernel_pfn)
427 - PFN_PHYS(start)));
428 printk("freeing pages %ld:%ld\n",
429 start, start_kernel_pfn);
430 start = end_kernel_pfn;
431 } else if (end > start_kernel_pfn)
432 end = start_kernel_pfn;
433 } else if (start < end_kernel_pfn)
434 start = end_kernel_pfn;
435 if (start >= end)
436 continue;
437
438 free_bootmem(PFN_PHYS(start), PFN_PHYS(end) - PFN_PHYS(start));
439 printk("freeing pages %ld:%ld\n", start, end);
440 }
441
442 /* Reserve the bootmap memory. */
72a7fe39
BW
443 reserve_bootmem(PFN_PHYS(bootmap_start), bootmap_size,
444 BOOTMEM_DEFAULT);
1da177e4
LT
445 printk("reserving pages %ld:%ld\n", bootmap_start, bootmap_start+PFN_UP(bootmap_size));
446
447#ifdef CONFIG_BLK_DEV_INITRD
448 initrd_start = INITRD_START;
449 if (initrd_start) {
450 initrd_end = initrd_start+INITRD_SIZE;
451 printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
452 (void *) initrd_start, INITRD_SIZE);
453
454 if ((void *)initrd_end > phys_to_virt(PFN_PHYS(max_low_pfn))) {
455 if (!move_initrd(PFN_PHYS(max_low_pfn)))
456 printk("initrd extends beyond end of memory "
457 "(0x%08lx > 0x%p)\ndisabling initrd\n",
458 initrd_end,
459 phys_to_virt(PFN_PHYS(max_low_pfn)));
460 } else {
461 reserve_bootmem(virt_to_phys((void *)initrd_start),
72a7fe39 462 INITRD_SIZE, BOOTMEM_DEFAULT);
1da177e4
LT
463 }
464 }
465#endif /* CONFIG_BLK_DEV_INITRD */
466}
467#else
468extern void setup_memory(void *);
469#endif /* !CONFIG_DISCONTIGMEM */
470
471int __init
472page_is_ram(unsigned long pfn)
473{
474 struct memclust_struct * cluster;
475 struct memdesc_struct * memdesc;
476 unsigned long i;
477
478 memdesc = (struct memdesc_struct *)
479 (hwrpb->mddt_offset + (unsigned long) hwrpb);
480 for_each_mem_cluster(memdesc, cluster, i)
481 {
482 if (pfn >= cluster->start_pfn &&
483 pfn < cluster->start_pfn + cluster->numpages) {
484 return (cluster->usage & 3) ? 0 : 1;
485 }
486 }
487
488 return 0;
489}
490
917b1f78
BU
491static int __init
492register_cpus(void)
493{
494 int i;
495
496 for_each_possible_cpu(i) {
497 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL);
498 if (!p)
499 return -ENOMEM;
76b67ed9 500 register_cpu(p, i);
917b1f78
BU
501 }
502 return 0;
503}
504
505arch_initcall(register_cpus);
506
1da177e4
LT
507void __init
508setup_arch(char **cmdline_p)
509{
510 extern char _end[];
511
512 struct alpha_machine_vector *vec = NULL;
513 struct percpu_struct *cpu;
514 char *type_name, *var_name, *p;
515 void *kernel_end = _end; /* end of kernel */
516 char *args = command_line;
517
518 hwrpb = (struct hwrpb_struct*) __va(INIT_HWRPB->phys_addr);
519 boot_cpuid = hard_smp_processor_id();
520
521 /*
522 * Pre-process the system type to make sure it will be valid.
523 *
524 * This may restore real CABRIO and EB66+ family names, ie
525 * EB64+ and EB66.
526 *
527 * Oh, and "white box" AS800 (aka DIGITAL Server 3000 series)
528 * and AS1200 (DIGITAL Server 5000 series) have the type as
529 * the negative of the real one.
530 */
531 if ((long)hwrpb->sys_type < 0) {
532 hwrpb->sys_type = -((long)hwrpb->sys_type);
533 hwrpb_update_checksum(hwrpb);
534 }
535
536 /* Register a call for panic conditions. */
e041c683
AS
537 atomic_notifier_chain_register(&panic_notifier_list,
538 &alpha_panic_block);
1da177e4 539
994dcf70 540#ifndef alpha_using_srm
1da177e4
LT
541 /* Assume that we've booted from SRM if we haven't booted from MILO.
542 Detect the later by looking for "MILO" in the system serial nr. */
543 alpha_using_srm = strncmp((const char *)hwrpb->ssn, "MILO", 4) != 0;
544#endif
994dcf70
RH
545#ifndef alpha_using_qemu
546 /* Similarly, look for QEMU. */
547 alpha_using_qemu = strstr((const char *)hwrpb->ssn, "QEMU") != 0;
548#endif
1da177e4
LT
549
550 /* If we are using SRM, we want to allow callbacks
551 as early as possible, so do this NOW, and then
552 they should work immediately thereafter.
553 */
554 kernel_end = callback_init(kernel_end);
555
556 /*
557 * Locate the command line.
558 */
559 /* Hack for Jensen... since we're restricted to 8 or 16 chars for
560 boot flags depending on the boot mode, we need some shorthand.
561 This should do for installation. */
562 if (strcmp(COMMAND_LINE, "INSTALL") == 0) {
563 strlcpy(command_line, "root=/dev/fd0 load_ramdisk=1", sizeof command_line);
564 } else {
565 strlcpy(command_line, COMMAND_LINE, sizeof command_line);
566 }
3c253ca0 567 strcpy(boot_command_line, command_line);
1da177e4
LT
568 *cmdline_p = command_line;
569
570 /*
571 * Process command-line arguments.
572 */
573 while ((p = strsep(&args, " \t")) != NULL) {
574 if (!*p) continue;
575 if (strncmp(p, "alpha_mv=", 9) == 0) {
576 vec = get_sysvec_byname(p+9);
577 continue;
578 }
579 if (strncmp(p, "cycle=", 6) == 0) {
580 est_cycle_freq = simple_strtol(p+6, NULL, 0);
581 continue;
582 }
583 if (strncmp(p, "mem=", 4) == 0) {
584 mem_size_limit = get_mem_size_limit(p+4);
585 continue;
586 }
587 if (strncmp(p, "srmcons", 7) == 0) {
588 srmcons_output |= 1;
589 continue;
590 }
591 if (strncmp(p, "console=srm", 11) == 0) {
592 srmcons_output |= 2;
593 continue;
594 }
595 if (strncmp(p, "gartsize=", 9) == 0) {
596 alpha_agpgart_size =
597 get_mem_size_limit(p+9) << PAGE_SHIFT;
598 continue;
599 }
600#ifdef CONFIG_VERBOSE_MCHECK
601 if (strncmp(p, "verbose_mcheck=", 15) == 0) {
602 alpha_verbose_mcheck = simple_strtol(p+15, NULL, 0);
603 continue;
604 }
605#endif
606 }
607
608 /* Replace the command line, now that we've killed it with strsep. */
3c253ca0 609 strcpy(command_line, boot_command_line);
1da177e4
LT
610
611 /* If we want SRM console printk echoing early, do it now. */
612 if (alpha_using_srm && srmcons_output) {
613 register_srm_console();
614
615 /*
616 * If "console=srm" was specified, clear the srmcons_output
617 * flag now so that time.c won't unregister_srm_console
618 */
619 if (srmcons_output & 2)
620 srmcons_output = 0;
621 }
622
623#ifdef CONFIG_MAGIC_SYSRQ
624 /* If we're using SRM, make sysrq-b halt back to the prom,
625 not auto-reboot. */
626 if (alpha_using_srm) {
627 struct sysrq_key_op *op = __sysrq_get_key_op('b');
628 op->handler = (void *) machine_halt;
629 }
630#endif
631
632 /*
633 * Identify and reconfigure for the current system.
634 */
635 cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset);
636
637 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation,
638 cpu->type, &type_name, &var_name);
639 if (*var_name == '0')
640 var_name = "";
641
642 if (!vec) {
643 vec = get_sysvec(hwrpb->sys_type, hwrpb->sys_variation,
644 cpu->type);
645 }
646
647 if (!vec) {
648 panic("Unsupported system type: %s%s%s (%ld %ld)\n",
649 type_name, (*var_name ? " variation " : ""), var_name,
650 hwrpb->sys_type, hwrpb->sys_variation);
651 }
652 if (vec != &alpha_mv) {
653 alpha_mv = *vec;
654 }
655
656 printk("Booting "
657#ifdef CONFIG_ALPHA_GENERIC
658 "GENERIC "
659#endif
660 "on %s%s%s using machine vector %s from %s\n",
661 type_name, (*var_name ? " variation " : ""),
662 var_name, alpha_mv.vector_name,
663 (alpha_using_srm ? "SRM" : "MILO"));
664
665 printk("Major Options: "
666#ifdef CONFIG_SMP
667 "SMP "
668#endif
669#ifdef CONFIG_ALPHA_EV56
670 "EV56 "
671#endif
672#ifdef CONFIG_ALPHA_EV67
673 "EV67 "
674#endif
675#ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS
676 "LEGACY_START "
677#endif
678#ifdef CONFIG_VERBOSE_MCHECK
679 "VERBOSE_MCHECK "
680#endif
681
682#ifdef CONFIG_DISCONTIGMEM
683 "DISCONTIGMEM "
684#ifdef CONFIG_NUMA
685 "NUMA "
686#endif
687#endif
688
689#ifdef CONFIG_DEBUG_SPINLOCK
690 "DEBUG_SPINLOCK "
691#endif
692#ifdef CONFIG_MAGIC_SYSRQ
693 "MAGIC_SYSRQ "
694#endif
695 "\n");
696
697 printk("Command line: %s\n", command_line);
698
699 /*
700 * Sync up the HAE.
701 * Save the SRM's current value for restoration.
702 */
703 srm_hae = *alpha_mv.hae_register;
704 __set_hae(alpha_mv.hae_cache);
705
706 /* Reset enable correctable error reports. */
707 wrmces(0x7);
708
709 /* Find our memory. */
710 setup_memory(kernel_end);
711
712 /* First guess at cpu cache sizes. Do this before init_arch. */
713 determine_cpu_caches(cpu->type);
714
715 /* Initialize the machine. Usually has to do with setting up
716 DMA windows and the like. */
717 if (alpha_mv.init_arch)
718 alpha_mv.init_arch();
719
720 /* Reserve standard resources. */
721 reserve_std_resources();
722
723 /*
724 * Give us a default console. TGA users will see nothing until
725 * chr_dev_init is called, rather late in the boot sequence.
726 */
727
728#ifdef CONFIG_VT
729#if defined(CONFIG_VGA_CONSOLE)
730 conswitchp = &vga_con;
731#elif defined(CONFIG_DUMMY_CONSOLE)
732 conswitchp = &dummy_con;
733#endif
734#endif
735
736 /* Default root filesystem to sda2. */
737 ROOT_DEV = Root_SDA2;
738
739#ifdef CONFIG_EISA
740 /* FIXME: only set this when we actually have EISA in this box? */
741 EISA_bus = 1;
742#endif
743
744 /*
745 * Check ASN in HWRPB for validity, report if bad.
746 * FIXME: how was this failing? Should we trust it instead,
747 * and copy the value into alpha_mv.max_asn?
748 */
749
750 if (hwrpb->max_asn != MAX_ASN) {
751 printk("Max ASN from HWRPB is bad (0x%lx)\n", hwrpb->max_asn);
752 }
753
754 /*
755 * Identify the flock of penguins.
756 */
757
758#ifdef CONFIG_SMP
759 setup_smp();
760#endif
761 paging_init();
762}
763
1da177e4
LT
764static char sys_unknown[] = "Unknown";
765static char systype_names[][16] = {
766 "0",
767 "ADU", "Cobra", "Ruby", "Flamingo", "Mannequin", "Jensen",
768 "Pelican", "Morgan", "Sable", "Medulla", "Noname",
769 "Turbolaser", "Avanti", "Mustang", "Alcor", "Tradewind",
770 "Mikasa", "EB64", "EB66", "EB64+", "AlphaBook1",
771 "Rawhide", "K2", "Lynx", "XL", "EB164", "Noritake",
772 "Cortex", "29", "Miata", "XXM", "Takara", "Yukon",
773 "Tsunami", "Wildfire", "CUSCO", "Eiger", "Titan", "Marvel"
774};
775
776static char unofficial_names[][8] = {"100", "Ruffian"};
777
778static char api_names[][16] = {"200", "Nautilus"};
779
780static char eb164_names[][8] = {"EB164", "PC164", "LX164", "SX164", "RX164"};
781static int eb164_indices[] = {0,0,0,1,1,1,1,1,2,2,2,2,3,3,3,3,4};
782
783static char alcor_names[][16] = {"Alcor", "Maverick", "Bret"};
784static int alcor_indices[] = {0,0,0,1,1,1,0,0,0,0,0,0,2,2,2,2,2,2};
785
786static char eb64p_names[][16] = {"EB64+", "Cabriolet", "AlphaPCI64"};
787static int eb64p_indices[] = {0,0,1,2};
788
789static char eb66_names[][8] = {"EB66", "EB66+"};
790static int eb66_indices[] = {0,0,1};
791
792static char marvel_names[][16] = {
793 "Marvel/EV7"
794};
795static int marvel_indices[] = { 0 };
796
797static char rawhide_names[][16] = {
798 "Dodge", "Wrangler", "Durango", "Tincup", "DaVinci"
799};
800static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4};
801
802static char titan_names[][16] = {
803 "DEFAULT", "Privateer", "Falcon", "Granite"
804};
805static int titan_indices[] = {0,1,2,2,3};
806
807static char tsunami_names[][16] = {
808 "0", "DP264", "Warhol", "Windjammer", "Monet", "Clipper",
809 "Goldrush", "Webbrick", "Catamaran", "Brisbane", "Melbourne",
810 "Flying Clipper", "Shark"
811};
812static int tsunami_indices[] = {0,1,2,3,4,5,6,7,8,9,10,11,12};
813
814static struct alpha_machine_vector * __init
815get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)
816{
817 static struct alpha_machine_vector *systype_vecs[] __initdata =
818 {
819 NULL, /* 0 */
820 NULL, /* ADU */
821 NULL, /* Cobra */
822 NULL, /* Ruby */
823 NULL, /* Flamingo */
824 NULL, /* Mannequin */
825 &jensen_mv,
826 NULL, /* Pelican */
827 NULL, /* Morgan */
828 NULL, /* Sable -- see below. */
829 NULL, /* Medulla */
830 &noname_mv,
831 NULL, /* Turbolaser */
832 &avanti_mv,
833 NULL, /* Mustang */
834 NULL, /* Alcor, Bret, Maverick. HWRPB inaccurate? */
835 NULL, /* Tradewind */
836 NULL, /* Mikasa -- see below. */
837 NULL, /* EB64 */
838 NULL, /* EB66 -- see variation. */
839 NULL, /* EB64+ -- see variation. */
840 &alphabook1_mv,
841 &rawhide_mv,
842 NULL, /* K2 */
843 &lynx_mv, /* Lynx */
844 &xl_mv,
845 NULL, /* EB164 -- see variation. */
846 NULL, /* Noritake -- see below. */
847 NULL, /* Cortex */
848 NULL, /* 29 */
849 &miata_mv,
850 NULL, /* XXM */
851 &takara_mv,
852 NULL, /* Yukon */
853 NULL, /* Tsunami -- see variation. */
854 &wildfire_mv, /* Wildfire */
855 NULL, /* CUSCO */
856 &eiger_mv, /* Eiger */
857 NULL, /* Titan */
858 NULL, /* Marvel */
859 };
860
861 static struct alpha_machine_vector *unofficial_vecs[] __initdata =
862 {
863 NULL, /* 100 */
864 &ruffian_mv,
865 };
866
867 static struct alpha_machine_vector *api_vecs[] __initdata =
868 {
869 NULL, /* 200 */
870 &nautilus_mv,
871 };
872
873 static struct alpha_machine_vector *alcor_vecs[] __initdata =
874 {
875 &alcor_mv, &xlt_mv, &xlt_mv
876 };
877
878 static struct alpha_machine_vector *eb164_vecs[] __initdata =
879 {
880 &eb164_mv, &pc164_mv, &lx164_mv, &sx164_mv, &rx164_mv
881 };
882
883 static struct alpha_machine_vector *eb64p_vecs[] __initdata =
884 {
885 &eb64p_mv,
886 &cabriolet_mv,
887 &cabriolet_mv /* AlphaPCI64 */
888 };
889
890 static struct alpha_machine_vector *eb66_vecs[] __initdata =
891 {
892 &eb66_mv,
893 &eb66p_mv
894 };
895
896 static struct alpha_machine_vector *marvel_vecs[] __initdata =
897 {
898 &marvel_ev7_mv,
899 };
900
901 static struct alpha_machine_vector *titan_vecs[] __initdata =
902 {
903 &titan_mv, /* default */
904 &privateer_mv, /* privateer */
905 &titan_mv, /* falcon */
906 &privateer_mv, /* granite */
907 };
908
909 static struct alpha_machine_vector *tsunami_vecs[] __initdata =
910 {
911 NULL,
912 &dp264_mv, /* dp264 */
913 &dp264_mv, /* warhol */
914 &dp264_mv, /* windjammer */
915 &monet_mv, /* monet */
916 &clipper_mv, /* clipper */
917 &dp264_mv, /* goldrush */
918 &webbrick_mv, /* webbrick */
919 &dp264_mv, /* catamaran */
920 NULL, /* brisbane? */
921 NULL, /* melbourne? */
922 NULL, /* flying clipper? */
923 &shark_mv, /* shark */
924 };
925
926 /* ??? Do we need to distinguish between Rawhides? */
927
928 struct alpha_machine_vector *vec;
929
930 /* Search the system tables first... */
931 vec = NULL;
25c8716c 932 if (type < ARRAY_SIZE(systype_vecs)) {
1da177e4
LT
933 vec = systype_vecs[type];
934 } else if ((type > ST_API_BIAS) &&
25c8716c 935 (type - ST_API_BIAS) < ARRAY_SIZE(api_vecs)) {
1da177e4
LT
936 vec = api_vecs[type - ST_API_BIAS];
937 } else if ((type > ST_UNOFFICIAL_BIAS) &&
25c8716c 938 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_vecs)) {
1da177e4
LT
939 vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS];
940 }
941
942 /* If we've not found one, try for a variation. */
943
944 if (!vec) {
945 /* Member ID is a bit-field. */
946 unsigned long member = (variation >> 10) & 0x3f;
947
948 cpu &= 0xffffffff; /* make it usable */
949
950 switch (type) {
951 case ST_DEC_ALCOR:
25c8716c 952 if (member < ARRAY_SIZE(alcor_indices))
1da177e4
LT
953 vec = alcor_vecs[alcor_indices[member]];
954 break;
955 case ST_DEC_EB164:
25c8716c 956 if (member < ARRAY_SIZE(eb164_indices))
1da177e4
LT
957 vec = eb164_vecs[eb164_indices[member]];
958 /* PC164 may show as EB164 variation with EV56 CPU,
959 but, since no true EB164 had anything but EV5... */
960 if (vec == &eb164_mv && cpu == EV56_CPU)
961 vec = &pc164_mv;
962 break;
963 case ST_DEC_EB64P:
25c8716c 964 if (member < ARRAY_SIZE(eb64p_indices))
1da177e4
LT
965 vec = eb64p_vecs[eb64p_indices[member]];
966 break;
967 case ST_DEC_EB66:
25c8716c 968 if (member < ARRAY_SIZE(eb66_indices))
1da177e4
LT
969 vec = eb66_vecs[eb66_indices[member]];
970 break;
971 case ST_DEC_MARVEL:
25c8716c 972 if (member < ARRAY_SIZE(marvel_indices))
1da177e4
LT
973 vec = marvel_vecs[marvel_indices[member]];
974 break;
975 case ST_DEC_TITAN:
976 vec = titan_vecs[0]; /* default */
25c8716c 977 if (member < ARRAY_SIZE(titan_indices))
1da177e4
LT
978 vec = titan_vecs[titan_indices[member]];
979 break;
980 case ST_DEC_TSUNAMI:
25c8716c 981 if (member < ARRAY_SIZE(tsunami_indices))
1da177e4
LT
982 vec = tsunami_vecs[tsunami_indices[member]];
983 break;
984 case ST_DEC_1000:
985 if (cpu == EV5_CPU || cpu == EV56_CPU)
986 vec = &mikasa_primo_mv;
987 else
988 vec = &mikasa_mv;
989 break;
990 case ST_DEC_NORITAKE:
991 if (cpu == EV5_CPU || cpu == EV56_CPU)
992 vec = &noritake_primo_mv;
993 else
994 vec = &noritake_mv;
995 break;
996 case ST_DEC_2100_A500:
997 if (cpu == EV5_CPU || cpu == EV56_CPU)
998 vec = &sable_gamma_mv;
999 else
1000 vec = &sable_mv;
1001 break;
1002 }
1003 }
1004 return vec;
1005}
1006
1007static struct alpha_machine_vector * __init
1008get_sysvec_byname(const char *name)
1009{
1010 static struct alpha_machine_vector *all_vecs[] __initdata =
1011 {
1012 &alcor_mv,
1013 &alphabook1_mv,
1014 &avanti_mv,
1015 &cabriolet_mv,
1016 &clipper_mv,
1017 &dp264_mv,
1018 &eb164_mv,
1019 &eb64p_mv,
1020 &eb66_mv,
1021 &eb66p_mv,
1022 &eiger_mv,
1023 &jensen_mv,
1024 &lx164_mv,
1025 &lynx_mv,
1026 &miata_mv,
1027 &mikasa_mv,
1028 &mikasa_primo_mv,
1029 &monet_mv,
1030 &nautilus_mv,
1031 &noname_mv,
1032 &noritake_mv,
1033 &noritake_primo_mv,
1034 &p2k_mv,
1035 &pc164_mv,
1036 &privateer_mv,
1037 &rawhide_mv,
1038 &ruffian_mv,
1039 &rx164_mv,
1040 &sable_mv,
1041 &sable_gamma_mv,
1042 &shark_mv,
1043 &sx164_mv,
1044 &takara_mv,
1045 &webbrick_mv,
1046 &wildfire_mv,
1047 &xl_mv,
1048 &xlt_mv
1049 };
1050
1051 size_t i;
1052
25c8716c 1053 for (i = 0; i < ARRAY_SIZE(all_vecs); ++i) {
1da177e4
LT
1054 struct alpha_machine_vector *mv = all_vecs[i];
1055 if (strcasecmp(mv->vector_name, name) == 0)
1056 return mv;
1057 }
1058 return NULL;
1059}
1060
1061static void
1062get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu,
1063 char **type_name, char **variation_name)
1064{
1065 unsigned long member;
1066
1067 /* If not in the tables, make it UNKNOWN,
1068 else set type name to family */
25c8716c 1069 if (type < ARRAY_SIZE(systype_names)) {
1da177e4
LT
1070 *type_name = systype_names[type];
1071 } else if ((type > ST_API_BIAS) &&
25c8716c 1072 (type - ST_API_BIAS) < ARRAY_SIZE(api_names)) {
1da177e4
LT
1073 *type_name = api_names[type - ST_API_BIAS];
1074 } else if ((type > ST_UNOFFICIAL_BIAS) &&
25c8716c 1075 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_names)) {
1da177e4
LT
1076 *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS];
1077 } else {
1078 *type_name = sys_unknown;
1079 *variation_name = sys_unknown;
1080 return;
1081 }
1082
1083 /* Set variation to "0"; if variation is zero, done. */
1084 *variation_name = systype_names[0];
1085 if (variation == 0) {
1086 return;
1087 }
1088
1089 member = (variation >> 10) & 0x3f; /* member ID is a bit-field */
1090
1091 cpu &= 0xffffffff; /* make it usable */
1092
1093 switch (type) { /* select by family */
1094 default: /* default to variation "0" for now */
1095 break;
1096 case ST_DEC_EB164:
25c8716c 1097 if (member < ARRAY_SIZE(eb164_indices))
1da177e4
LT
1098 *variation_name = eb164_names[eb164_indices[member]];
1099 /* PC164 may show as EB164 variation, but with EV56 CPU,
1100 so, since no true EB164 had anything but EV5... */
1101 if (eb164_indices[member] == 0 && cpu == EV56_CPU)
1102 *variation_name = eb164_names[1]; /* make it PC164 */
1103 break;
1104 case ST_DEC_ALCOR:
25c8716c 1105 if (member < ARRAY_SIZE(alcor_indices))
1da177e4
LT
1106 *variation_name = alcor_names[alcor_indices[member]];
1107 break;
1108 case ST_DEC_EB64P:
25c8716c 1109 if (member < ARRAY_SIZE(eb64p_indices))
1da177e4
LT
1110 *variation_name = eb64p_names[eb64p_indices[member]];
1111 break;
1112 case ST_DEC_EB66:
25c8716c 1113 if (member < ARRAY_SIZE(eb66_indices))
1da177e4
LT
1114 *variation_name = eb66_names[eb66_indices[member]];
1115 break;
1116 case ST_DEC_MARVEL:
25c8716c 1117 if (member < ARRAY_SIZE(marvel_indices))
1da177e4
LT
1118 *variation_name = marvel_names[marvel_indices[member]];
1119 break;
1120 case ST_DEC_RAWHIDE:
25c8716c 1121 if (member < ARRAY_SIZE(rawhide_indices))
1da177e4
LT
1122 *variation_name = rawhide_names[rawhide_indices[member]];
1123 break;
1124 case ST_DEC_TITAN:
1125 *variation_name = titan_names[0]; /* default */
25c8716c 1126 if (member < ARRAY_SIZE(titan_indices))
1da177e4
LT
1127 *variation_name = titan_names[titan_indices[member]];
1128 break;
1129 case ST_DEC_TSUNAMI:
25c8716c 1130 if (member < ARRAY_SIZE(tsunami_indices))
1da177e4
LT
1131 *variation_name = tsunami_names[tsunami_indices[member]];
1132 break;
1133 }
1134}
1135
1136/*
1137 * A change was made to the HWRPB via an ECO and the following code
1138 * tracks a part of the ECO. In HWRPB versions less than 5, the ECO
1139 * was not implemented in the console firmware. If it's revision 5 or
1140 * greater we can get the name of the platform as an ASCII string from
1141 * the HWRPB. That's what this function does. It checks the revision
1142 * level and if the string is in the HWRPB it returns the address of
1143 * the string--a pointer to the name of the platform.
1144 *
1145 * Returns:
1146 * - Pointer to a ASCII string if it's in the HWRPB
1147 * - Pointer to a blank string if the data is not in the HWRPB.
1148 */
1149
1150static char *
1151platform_string(void)
1152{
1153 struct dsr_struct *dsr;
1154 static char unk_system_string[] = "N/A";
1155
1156 /* Go to the console for the string pointer.
1157 * If the rpb_vers is not 5 or greater the rpb
1158 * is old and does not have this data in it.
1159 */
1160 if (hwrpb->revision < 5)
1161 return (unk_system_string);
1162 else {
1163 /* The Dynamic System Recognition struct
1164 * has the system platform name starting
1165 * after the character count of the string.
1166 */
1167 dsr = ((struct dsr_struct *)
1168 ((char *)hwrpb + hwrpb->dsr_offset));
1169 return ((char *)dsr + (dsr->sysname_off +
1170 sizeof(long)));
1171 }
1172}
1173
1174static int
1175get_nr_processors(struct percpu_struct *cpubase, unsigned long num)
1176{
1177 struct percpu_struct *cpu;
1178 unsigned long i;
1179 int count = 0;
1180
1181 for (i = 0; i < num; i++) {
1182 cpu = (struct percpu_struct *)
1183 ((char *)cpubase + i*hwrpb->processor_size);
1184 if ((cpu->flags & 0x1cc) == 0x1cc)
1185 count++;
1186 }
1187 return count;
1188}
1189
1190static void
1191show_cache_size (struct seq_file *f, const char *which, int shape)
1192{
1193 if (shape == -1)
1194 seq_printf (f, "%s\t\t: n/a\n", which);
1195 else if (shape == 0)
1196 seq_printf (f, "%s\t\t: unknown\n", which);
1197 else
1198 seq_printf (f, "%s\t\t: %dK, %d-way, %db line\n",
1199 which, shape >> 10, shape & 15,
1200 1 << ((shape >> 4) & 15));
1201}
1202
1203static int
1204show_cpuinfo(struct seq_file *f, void *slot)
1205{
1206 extern struct unaligned_stat {
1207 unsigned long count, va, pc;
1208 } unaligned[2];
1209
1210 static char cpu_names[][8] = {
1211 "EV3", "EV4", "Simulate", "LCA4", "EV5", "EV45", "EV56",
1212 "EV6", "PCA56", "PCA57", "EV67", "EV68CB", "EV68AL",
1213 "EV68CX", "EV7", "EV79", "EV69"
1214 };
1215
1216 struct percpu_struct *cpu = slot;
1217 unsigned int cpu_index;
1218 char *cpu_name;
1219 char *systype_name;
1220 char *sysvariation_name;
1221 int nr_processors;
fddd87d6 1222 unsigned long timer_freq;
1da177e4
LT
1223
1224 cpu_index = (unsigned) (cpu->type - 1);
1225 cpu_name = "Unknown";
25c8716c 1226 if (cpu_index < ARRAY_SIZE(cpu_names))
1da177e4
LT
1227 cpu_name = cpu_names[cpu_index];
1228
1229 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation,
1230 cpu->type, &systype_name, &sysvariation_name);
1231
1232 nr_processors = get_nr_processors(cpu, hwrpb->nr_processors);
1233
fddd87d6
RH
1234#if CONFIG_HZ == 1024 || CONFIG_HZ == 1200
1235 timer_freq = (100UL * hwrpb->intr_freq) / 4096;
1236#else
1237 timer_freq = 100UL * CONFIG_HZ;
1238#endif
1239
1da177e4
LT
1240 seq_printf(f, "cpu\t\t\t: Alpha\n"
1241 "cpu model\t\t: %s\n"
1242 "cpu variation\t\t: %ld\n"
1243 "cpu revision\t\t: %ld\n"
1244 "cpu serial number\t: %s\n"
1245 "system type\t\t: %s\n"
1246 "system variation\t: %s\n"
1247 "system revision\t\t: %ld\n"
1248 "system serial number\t: %s\n"
1249 "cycle frequency [Hz]\t: %lu %s\n"
1250 "timer frequency [Hz]\t: %lu.%02lu\n"
1251 "page size [bytes]\t: %ld\n"
1252 "phys. address bits\t: %ld\n"
1253 "max. addr. space #\t: %ld\n"
1254 "BogoMIPS\t\t: %lu.%02lu\n"
1255 "kernel unaligned acc\t: %ld (pc=%lx,va=%lx)\n"
1256 "user unaligned acc\t: %ld (pc=%lx,va=%lx)\n"
1257 "platform string\t\t: %s\n"
1258 "cpus detected\t\t: %d\n",
1259 cpu_name, cpu->variation, cpu->revision,
1260 (char*)cpu->serial_no,
1261 systype_name, sysvariation_name, hwrpb->sys_revision,
1262 (char*)hwrpb->ssn,
1263 est_cycle_freq ? : hwrpb->cycle_freq,
1264 est_cycle_freq ? "est." : "",
fddd87d6 1265 timer_freq / 100, timer_freq % 100,
1da177e4
LT
1266 hwrpb->pagesize,
1267 hwrpb->pa_bits,
1268 hwrpb->max_asn,
1269 loops_per_jiffy / (500000/HZ),
1270 (loops_per_jiffy / (5000/HZ)) % 100,
1271 unaligned[0].count, unaligned[0].pc, unaligned[0].va,
1272 unaligned[1].count, unaligned[1].pc, unaligned[1].va,
1273 platform_string(), nr_processors);
1274
1275#ifdef CONFIG_SMP
5f0e3da6 1276 seq_printf(f, "cpus active\t\t: %u\n"
1da177e4 1277 "cpu active mask\t\t: %016lx\n",
81740fc6 1278 num_online_cpus(), cpumask_bits(cpu_possible_mask)[0]);
1da177e4
LT
1279#endif
1280
1281 show_cache_size (f, "L1 Icache", alpha_l1i_cacheshape);
1282 show_cache_size (f, "L1 Dcache", alpha_l1d_cacheshape);
1283 show_cache_size (f, "L2 cache", alpha_l2_cacheshape);
1284 show_cache_size (f, "L3 cache", alpha_l3_cacheshape);
1285
1286 return 0;
1287}
1288
1289static int __init
1290read_mem_block(int *addr, int stride, int size)
1291{
1292 long nloads = size / stride, cnt, tmp;
1293
1294 __asm__ __volatile__(
1295 " rpcc %0\n"
1296 "1: ldl %3,0(%2)\n"
1297 " subq %1,1,%1\n"
1298 /* Next two XORs introduce an explicit data dependency between
1299 consecutive loads in the loop, which will give us true load
1300 latency. */
1301 " xor %3,%2,%2\n"
1302 " xor %3,%2,%2\n"
1303 " addq %2,%4,%2\n"
1304 " bne %1,1b\n"
1305 " rpcc %3\n"
1306 " subl %3,%0,%0\n"
1307 : "=&r" (cnt), "=&r" (nloads), "=&r" (addr), "=&r" (tmp)
1308 : "r" (stride), "1" (nloads), "2" (addr));
1309
1310 return cnt / (size / stride);
1311}
1312
1313#define CSHAPE(totalsize, linesize, assoc) \
1314 ((totalsize & ~0xff) | (linesize << 4) | assoc)
1315
1316/* ??? EV5 supports up to 64M, but did the systems with more than
1317 16M of BCACHE ever exist? */
1318#define MAX_BCACHE_SIZE 16*1024*1024
1319
1320/* Note that the offchip caches are direct mapped on all Alphas. */
1321static int __init
1322external_cache_probe(int minsize, int width)
1323{
1324 int cycles, prev_cycles = 1000000;
1325 int stride = 1 << width;
1326 long size = minsize, maxsize = MAX_BCACHE_SIZE * 2;
1327
1328 if (maxsize > (max_low_pfn + 1) << PAGE_SHIFT)
74fd1b68 1329 maxsize = 1 << (ilog2(max_low_pfn + 1) + PAGE_SHIFT);
1da177e4
LT
1330
1331 /* Get the first block cached. */
1332 read_mem_block(__va(0), stride, size);
1333
1334 while (size < maxsize) {
1335 /* Get an average load latency in cycles. */
1336 cycles = read_mem_block(__va(0), stride, size);
1337 if (cycles > prev_cycles * 2) {
1338 /* Fine, we exceed the cache. */
1339 printk("%ldK Bcache detected; load hit latency %d "
1340 "cycles, load miss latency %d cycles\n",
1341 size >> 11, prev_cycles, cycles);
1342 return CSHAPE(size >> 1, width, 1);
1343 }
1344 /* Try to get the next block cached. */
1345 read_mem_block(__va(size), stride, size);
1346 prev_cycles = cycles;
1347 size <<= 1;
1348 }
1349 return -1; /* No BCACHE found. */
1350}
1351
1352static void __init
1353determine_cpu_caches (unsigned int cpu_type)
1354{
1355 int L1I, L1D, L2, L3;
1356
1357 switch (cpu_type) {
1358 case EV4_CPU:
1359 case EV45_CPU:
1360 {
1361 if (cpu_type == EV4_CPU)
1362 L1I = CSHAPE(8*1024, 5, 1);
1363 else
1364 L1I = CSHAPE(16*1024, 5, 1);
1365 L1D = L1I;
1366 L3 = -1;
1367
1368 /* BIU_CTL is a write-only Abox register. PALcode has a
1369 shadow copy, and may be available from some versions
1370 of the CSERVE PALcall. If we can get it, then
1371
1372 unsigned long biu_ctl, size;
1373 size = 128*1024 * (1 << ((biu_ctl >> 28) & 7));
1374 L2 = CSHAPE (size, 5, 1);
1375
1376 Unfortunately, we can't rely on that.
1377 */
1378 L2 = external_cache_probe(128*1024, 5);
1379 break;
1380 }
1381
1382 case LCA4_CPU:
1383 {
1384 unsigned long car, size;
1385
1386 L1I = L1D = CSHAPE(8*1024, 5, 1);
1387 L3 = -1;
1388
1389 car = *(vuip) phys_to_virt (0x120000078UL);
1390 size = 64*1024 * (1 << ((car >> 5) & 7));
1391 /* No typo -- 8 byte cacheline size. Whodathunk. */
1392 L2 = (car & 1 ? CSHAPE (size, 3, 1) : -1);
1393 break;
1394 }
1395
1396 case EV5_CPU:
1397 case EV56_CPU:
1398 {
1399 unsigned long sc_ctl, width;
1400
1401 L1I = L1D = CSHAPE(8*1024, 5, 1);
1402
1403 /* Check the line size of the Scache. */
1404 sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL);
1405 width = sc_ctl & 0x1000 ? 6 : 5;
1406 L2 = CSHAPE (96*1024, width, 3);
1407
1408 /* BC_CONTROL and BC_CONFIG are write-only IPRs. PALcode
1409 has a shadow copy, and may be available from some versions
1410 of the CSERVE PALcall. If we can get it, then
1411
1412 unsigned long bc_control, bc_config, size;
1413 size = 1024*1024 * (1 << ((bc_config & 7) - 1));
1414 L3 = (bc_control & 1 ? CSHAPE (size, width, 1) : -1);
1415
1416 Unfortunately, we can't rely on that.
1417 */
1418 L3 = external_cache_probe(1024*1024, width);
1419 break;
1420 }
1421
1422 case PCA56_CPU:
1423 case PCA57_CPU:
1424 {
1da177e4
LT
1425 if (cpu_type == PCA56_CPU) {
1426 L1I = CSHAPE(16*1024, 6, 1);
1427 L1D = CSHAPE(8*1024, 5, 1);
1428 } else {
1429 L1I = CSHAPE(32*1024, 6, 2);
1430 L1D = CSHAPE(16*1024, 5, 1);
1431 }
1432 L3 = -1;
1433
280da4e4
RH
1434#if 0
1435 unsigned long cbox_config, size;
1436
1da177e4
LT
1437 cbox_config = *(vulp) phys_to_virt (0xfffff00008UL);
1438 size = 512*1024 * (1 << ((cbox_config >> 12) & 3));
1439
1da177e4
LT
1440 L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1);
1441#else
1442 L2 = external_cache_probe(512*1024, 6);
1443#endif
1444 break;
1445 }
1446
1447 case EV6_CPU:
1448 case EV67_CPU:
1449 case EV68CB_CPU:
1450 case EV68AL_CPU:
1451 case EV68CX_CPU:
1452 case EV69_CPU:
1453 L1I = L1D = CSHAPE(64*1024, 6, 2);
1454 L2 = external_cache_probe(1024*1024, 6);
1455 L3 = -1;
1456 break;
1457
1458 case EV7_CPU:
1459 case EV79_CPU:
1460 L1I = L1D = CSHAPE(64*1024, 6, 2);
1461 L2 = CSHAPE(7*1024*1024/4, 6, 7);
1462 L3 = -1;
1463 break;
1464
1465 default:
1466 /* Nothing known about this cpu type. */
1467 L1I = L1D = L2 = L3 = 0;
1468 break;
1469 }
1470
1471 alpha_l1i_cacheshape = L1I;
1472 alpha_l1d_cacheshape = L1D;
1473 alpha_l2_cacheshape = L2;
1474 alpha_l3_cacheshape = L3;
1475}
1476
1477/*
1478 * We show only CPU #0 info.
1479 */
1480static void *
1481c_start(struct seq_file *f, loff_t *pos)
1482{
1483 return *pos ? NULL : (char *)hwrpb + hwrpb->processor_offset;
1484}
1485
1486static void *
1487c_next(struct seq_file *f, void *v, loff_t *pos)
1488{
1489 return NULL;
1490}
1491
1492static void
1493c_stop(struct seq_file *f, void *v)
1494{
1495}
1496
03a44825 1497const struct seq_operations cpuinfo_op = {
1da177e4
LT
1498 .start = c_start,
1499 .next = c_next,
1500 .stop = c_stop,
1501 .show = show_cpuinfo,
1502};
1503
1504
1505static int
1506alpha_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1507{
1508#if 1
1509 /* FIXME FIXME FIXME */
1510 /* If we are using SRM and serial console, just hard halt here. */
1511 if (alpha_using_srm && srmcons_output)
1512 __halt();
1513#endif
1514 return NOTIFY_DONE;
1515}
e5c6c8e4
MN
1516
1517static __init int add_pcspkr(void)
1518{
1519 struct platform_device *pd;
1520 int ret;
1521
1522 pd = platform_device_alloc("pcspkr", -1);
1523 if (!pd)
1524 return -ENOMEM;
1525
1526 ret = platform_device_add(pd);
1527 if (ret)
1528 platform_device_put(pd);
1529
1530 return ret;
1531}
1532device_initcall(add_pcspkr);
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