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Merge branch 'pull/v3.18/for-dt-pinctrl-updates' of https://github.com/nmenon/linux...
[deliverable/linux.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
5fc0b42a
AC		 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
5fc0b42a
AC		 15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
5fc0b42a
AC		 19
20 aliases {
6a968678
NM		 21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
dde3b0d6
VH		 24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
7a57ee87
AC		 30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
97238b35
SAS		 32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
8170056d
DM		 36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
5fc0b42a
AC		 38 };
39
40 cpus {
2e0d513f
LP		 41 #address-cells = <1>;
42 #size-cells = <0>;
5fc0b42a
AC		 43 cpu@0 {
44 compatible = "arm,cortex-a8";
2e0d513f
LP		 45 device_type = "cpu";
46 reg = <0>;
efeedcf2
AC		 47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
8d766fa2
NM		 61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
efeedcf2 65 clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a
AC		 66 };
67 };
68
6797cdbe
AB		 69 pmu {
70 compatible = "arm,cortex-a8-pmu";
71 interrupts = <3>;
72 };
73
5fc0b42a 74 /*
5c5be9db 75 * The soc node represents the soc top level view. It is used for IPs
5fc0b42a
AC		 76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */
78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
b552dfc4
AC		 86 am33xx_pinmux: pinmux@44e10800 {
87 compatible = "pinctrl-single";
88 reg = <0x44e10800 0x0238>;
89 #address-cells = <1>;
90 #size-cells = <0>;
91 pinctrl-single,register-width = <32>;
92 pinctrl-single,function-mask = <0x7f>;
93 };
94
5fc0b42a
AC		 95 /*
96 * XXX: Use a flat representation of the AM33XX interconnect.
b7ab524b
GU		 97 * The real AM33XX interconnect network is quite complex. Since
98 * it will not bring real advantage to represent that in DT
5fc0b42a
AC		 99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy.
101 */
102 ocp {
103 compatible = "simple-bus";
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges;
107 ti,hwmods = "l3_main";
108
ea291c98
TK		 109 prcm: prcm@44e00000 {
110 compatible = "ti,am3-prcm";
111 reg = <0x44e00000 0x4000>;
112
113 prcm_clocks: clocks {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 };
117
118 prcm_clockdomains: clockdomains {
119 };
120 };
121
122 scrm: scrm@44e10000 {
123 compatible = "ti,am3-scrm";
124 reg = <0x44e10000 0x2000>;
125
126 scrm_clocks: clocks {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 };
130
131 scrm_clockdomains: clockdomains {
132 };
133 };
134
5fc0b42a
AC		 135 intc: interrupt-controller@48200000 {
136 compatible = "ti,omap2-intc";
137 interrupt-controller;
138 #interrupt-cells = <1>;
139 ti,intc-size = <128>;
140 reg = <0x48200000 0x1000>;
141 };
142
505975d3
MP		 143 edma: edma@49000000 {
144 compatible = "ti,edma3";
145 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
146 reg = <0x49000000 0x10000>,
cf7eb979 147 <0x44e10f90 0x40>;
505975d3
MP		 148 interrupts = <12 13 14>;
149 #dma-cells = <1>;
505975d3
MP		 150 };
151
b918e2c0 152 gpio0: gpio@44e07000 {
5fc0b42a
AC		 153 compatible = "ti,omap4-gpio";
154 ti,hwmods = "gpio1";
155 gpio-controller;
156 #gpio-cells = <2>;
157 interrupt-controller;
5eac0eb7 158 #interrupt-cells = <2>;
4462b31c 159 reg = <0x44e07000 0x1000>;
4462b31c 160 interrupts = <96>;
5fc0b42a
AC		 161 };
162
b918e2c0 163 gpio1: gpio@4804c000 {
5fc0b42a
AC		 164 compatible = "ti,omap4-gpio";
165 ti,hwmods = "gpio2";
166 gpio-controller;
167 #gpio-cells = <2>;
168 interrupt-controller;
5eac0eb7 169 #interrupt-cells = <2>;
4462b31c 170 reg = <0x4804c000 0x1000>;
4462b31c 171 interrupts = <98>;
5fc0b42a
AC		 172 };
173
b918e2c0 174 gpio2: gpio@481ac000 {
5fc0b42a
AC		 175 compatible = "ti,omap4-gpio";
176 ti,hwmods = "gpio3";
177 gpio-controller;
178 #gpio-cells = <2>;
179 interrupt-controller;
5eac0eb7 180 #interrupt-cells = <2>;
4462b31c 181 reg = <0x481ac000 0x1000>;
4462b31c 182 interrupts = <32>;
5fc0b42a
AC		 183 };
184
b918e2c0 185 gpio3: gpio@481ae000 {
5fc0b42a
AC		 186 compatible = "ti,omap4-gpio";
187 ti,hwmods = "gpio4";
188 gpio-controller;
189 #gpio-cells = <2>;
190 interrupt-controller;
5eac0eb7 191 #interrupt-cells = <2>;
4462b31c 192 reg = <0x481ae000 0x1000>;
4462b31c 193 interrupts = <62>;
5fc0b42a
AC		 194 };
195
dde3b0d6 196 uart0: serial@44e09000 {
5fc0b42a
AC		 197 compatible = "ti,omap3-uart";
198 ti,hwmods = "uart1";
199 clock-frequency = <48000000>;
4462b31c 200 reg = <0x44e09000 0x2000>;
4462b31c 201 interrupts = <72>;
53d91034 202 status = "disabled";
5fc0b42a
AC		 203 };
204
dde3b0d6 205 uart1: serial@48022000 {
5fc0b42a
AC		 206 compatible = "ti,omap3-uart";
207 ti,hwmods = "uart2";
208 clock-frequency = <48000000>;
4462b31c 209 reg = <0x48022000 0x2000>;
4462b31c 210 interrupts = <73>;
53d91034 211 status = "disabled";
5fc0b42a
AC		 212 };
213
dde3b0d6 214 uart2: serial@48024000 {
5fc0b42a
AC		 215 compatible = "ti,omap3-uart";
216 ti,hwmods = "uart3";
217 clock-frequency = <48000000>;
4462b31c 218 reg = <0x48024000 0x2000>;
4462b31c 219 interrupts = <74>;
53d91034 220 status = "disabled";
5fc0b42a
AC		 221 };
222
dde3b0d6 223 uart3: serial@481a6000 {
5fc0b42a
AC		 224 compatible = "ti,omap3-uart";
225 ti,hwmods = "uart4";
226 clock-frequency = <48000000>;
4462b31c 227 reg = <0x481a6000 0x2000>;
4462b31c 228 interrupts = <44>;
53d91034 229 status = "disabled";
5fc0b42a
AC		 230 };
231
dde3b0d6 232 uart4: serial@481a8000 {
5fc0b42a
AC		 233 compatible = "ti,omap3-uart";
234 ti,hwmods = "uart5";
235 clock-frequency = <48000000>;
4462b31c 236 reg = <0x481a8000 0x2000>;
4462b31c 237 interrupts = <45>;
53d91034 238 status = "disabled";
5fc0b42a
AC		 239 };
240
dde3b0d6 241 uart5: serial@481aa000 {
5fc0b42a
AC		 242 compatible = "ti,omap3-uart";
243 ti,hwmods = "uart6";
244 clock-frequency = <48000000>;
4462b31c 245 reg = <0x481aa000 0x2000>;
4462b31c 246 interrupts = <46>;
53d91034 247 status = "disabled";
5fc0b42a
AC		 248 };
249
b918e2c0 250 i2c0: i2c@44e0b000 {
5fc0b42a
AC		 251 compatible = "ti,omap4-i2c";
252 #address-cells = <1>;
253 #size-cells = <0>;
254 ti,hwmods = "i2c1";
4462b31c 255 reg = <0x44e0b000 0x1000>;
4462b31c 256 interrupts = <70>;
53d91034 257 status = "disabled";
5fc0b42a
AC		 258 };
259
b918e2c0 260 i2c1: i2c@4802a000 {
5fc0b42a
AC		 261 compatible = "ti,omap4-i2c";
262 #address-cells = <1>;
263 #size-cells = <0>;
264 ti,hwmods = "i2c2";
4462b31c 265 reg = <0x4802a000 0x1000>;
4462b31c 266 interrupts = <71>;
53d91034 267 status = "disabled";
5fc0b42a
AC		 268 };
269
b918e2c0 270 i2c2: i2c@4819c000 {
5fc0b42a
AC		 271 compatible = "ti,omap4-i2c";
272 #address-cells = <1>;
273 #size-cells = <0>;
274 ti,hwmods = "i2c3";
4462b31c 275 reg = <0x4819c000 0x1000>;
4462b31c 276 interrupts = <30>;
53d91034 277 status = "disabled";
5fc0b42a 278 };
5f789ebc 279
55b4452b
MP		 280 mmc1: mmc@48060000 {
281 compatible = "ti,omap4-hsmmc";
282 ti,hwmods = "mmc1";
283 ti,dual-volt;
284 ti,needs-special-reset;
285 ti,needs-special-hs-handling;
286 dmas = <&edma 24
287 &edma 25>;
288 dma-names = "tx", "rx";
289 interrupts = <64>;
290 interrupt-parent = <&intc>;
291 reg = <0x48060000 0x1000>;
292 status = "disabled";
293 };
294
295 mmc2: mmc@481d8000 {
296 compatible = "ti,omap4-hsmmc";
297 ti,hwmods = "mmc2";
298 ti,needs-special-reset;
299 dmas = <&edma 2
300 &edma 3>;
301 dma-names = "tx", "rx";
302 interrupts = <28>;
303 interrupt-parent = <&intc>;
304 reg = <0x481d8000 0x1000>;
305 status = "disabled";
306 };
307
308 mmc3: mmc@47810000 {
309 compatible = "ti,omap4-hsmmc";
310 ti,hwmods = "mmc3";
311 ti,needs-special-reset;
312 interrupts = <29>;
313 interrupt-parent = <&intc>;
314 reg = <0x47810000 0x1000>;
315 status = "disabled";
316 };
317
d4cbe80d
SA		 318 hwspinlock: spinlock@480ca000 {
319 compatible = "ti,omap4-hwspinlock";
320 reg = <0x480ca000 0x1000>;
321 ti,hwmods = "spinlock";
34054213 322 #hwlock-cells = <1>;
d4cbe80d
SA		 323 };
324
5f789ebc
AM		 325 wdt2: wdt@44e35000 {
326 compatible = "ti,omap3-wdt";
327 ti,hwmods = "wd_timer2";
4462b31c 328 reg = <0x44e35000 0x1000>;
4462b31c 329 interrupts = <91>;
5f789ebc 330 };
059b185d
AC		 331
332 dcan0: d_can@481cc000 {
333 compatible = "bosch,d_can";
334 ti,hwmods = "d_can0";
f178c015
AC		 335 reg = <0x481cc000 0x2000
336 0x44e10644 0x4>;
059b185d 337 interrupts = <52>;
059b185d
AC		 338 status = "disabled";
339 };
340
341 dcan1: d_can@481d0000 {
342 compatible = "bosch,d_can";
343 ti,hwmods = "d_can1";
f178c015
AC		 344 reg = <0x481d0000 0x2000
345 0x44e10644 0x4>;
059b185d 346 interrupts = <55>;
059b185d
AC		 347 status = "disabled";
348 };
fab8ad0b 349
40242301
SA		 350 mailbox: mailbox@480C8000 {
351 compatible = "ti,omap4-mailbox";
352 reg = <0x480C8000 0x200>;
353 interrupts = <77>;
354 ti,hwmods = "mailbox";
355 ti,mbox-num-users = <4>;
356 ti,mbox-num-fifos = <8>;
357 };
358
fab8ad0b 359 timer1: timer@44e31000 {
002e1ec5 360 compatible = "ti,am335x-timer-1ms";
fab8ad0b
JH		 361 reg = <0x44e31000 0x400>;
362 interrupts = <67>;
363 ti,hwmods = "timer1";
364 ti,timer-alwon;
365 };
366
367 timer2: timer@48040000 {
002e1ec5 368 compatible = "ti,am335x-timer";
fab8ad0b
JH		 369 reg = <0x48040000 0x400>;
370 interrupts = <68>;
371 ti,hwmods = "timer2";
372 };
373
374 timer3: timer@48042000 {
002e1ec5 375 compatible = "ti,am335x-timer";
fab8ad0b
JH		 376 reg = <0x48042000 0x400>;
377 interrupts = <69>;
378 ti,hwmods = "timer3";
379 };
380
381 timer4: timer@48044000 {
002e1ec5 382 compatible = "ti,am335x-timer";
fab8ad0b
JH		 383 reg = <0x48044000 0x400>;
384 interrupts = <92>;
385 ti,hwmods = "timer4";
386 ti,timer-pwm;
387 };
388
389 timer5: timer@48046000 {
002e1ec5 390 compatible = "ti,am335x-timer";
fab8ad0b
JH		 391 reg = <0x48046000 0x400>;
392 interrupts = <93>;
393 ti,hwmods = "timer5";
394 ti,timer-pwm;
395 };
396
397 timer6: timer@48048000 {
002e1ec5 398 compatible = "ti,am335x-timer";
fab8ad0b
JH		 399 reg = <0x48048000 0x400>;
400 interrupts = <94>;
401 ti,hwmods = "timer6";
402 ti,timer-pwm;
403 };
404
405 timer7: timer@4804a000 {
002e1ec5 406 compatible = "ti,am335x-timer";
fab8ad0b
JH		 407 reg = <0x4804a000 0x400>;
408 interrupts = <95>;
409 ti,hwmods = "timer7";
410 ti,timer-pwm;
411 };
0d935c16 412
ccd8b9e0 413 rtc: rtc@44e3e000 {
0d935c16
AM		 414 compatible = "ti,da830-rtc";
415 reg = <0x44e3e000 0x1000>;
416 interrupts = <75
417 76>;
418 ti,hwmods = "rtc";
419 };
9fd3c748
PA		 420
421 spi0: spi@48030000 {
422 compatible = "ti,omap4-mcspi";
423 #address-cells = <1>;
424 #size-cells = <0>;
425 reg = <0x48030000 0x400>;
7b3754c6 426 interrupts = <65>;
9fd3c748
PA		 427 ti,spi-num-cs = <2>;
428 ti,hwmods = "spi0";
f5e2f807
MP		 429 dmas = <&edma 16
430 &edma 17
431 &edma 18
432 &edma 19>;
433 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 434 status = "disabled";
435 };
436
437 spi1: spi@481a0000 {
438 compatible = "ti,omap4-mcspi";
439 #address-cells = <1>;
440 #size-cells = <0>;
441 reg = <0x481a0000 0x400>;
7b3754c6 442 interrupts = <125>;
9fd3c748
PA		 443 ti,spi-num-cs = <2>;
444 ti,hwmods = "spi1";
f5e2f807
MP		 445 dmas = <&edma 42
446 &edma 43
447 &edma 44
448 &edma 45>;
449 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 450 status = "disabled";
451 };
35b47fbb 452
97238b35
SAS		 453 usb: usb@47400000 {
454 compatible = "ti,am33xx-usb";
455 reg = <0x47400000 0x1000>;
456 ranges;
457 #address-cells = <1>;
458 #size-cells = <1>;
35b47fbb 459 ti,hwmods = "usb_otg_hs";
97238b35
SAS		 460 status = "disabled";
461
8abcdd68 462 usb_ctrl_mod: control@44e10620 {
97238b35
SAS		 463 compatible = "ti,am335x-usb-ctrl-module";
464 reg = <0x44e10620 0x10
465 0x44e10648 0x4>;
466 reg-names = "phy_ctrl", "wakeup";
467 status = "disabled";
468 };
469
c031a7d4 470 usb0_phy: usb-phy@47401300 {
97238b35
SAS		 471 compatible = "ti,am335x-usb-phy";
472 reg = <0x47401300 0x100>;
473 reg-names = "phy";
474 status = "disabled";
e7243b76 475 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 476 };
477
478 usb0: usb@47401000 {
479 compatible = "ti,musb-am33xx";
97238b35 480 status = "disabled";
c031a7d4
SAS		 481 reg = <0x47401400 0x400
482 0x47401000 0x200>;
483 reg-names = "mc", "control";
484
485 interrupts = <18>;
486 interrupt-names = "mc";
487 dr_mode = "otg";
488 mentor,multipoint = <1>;
489 mentor,num-eps = <16>;
490 mentor,ram-bits = <12>;
491 mentor,power = <500>;
492 phys = <&usb0_phy>;
9b3452d1
SAS		 493
494 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
495 &cppi41dma 2 0 &cppi41dma 3 0
496 &cppi41dma 4 0 &cppi41dma 5 0
497 &cppi41dma 6 0 &cppi41dma 7 0
498 &cppi41dma 8 0 &cppi41dma 9 0
499 &cppi41dma 10 0 &cppi41dma 11 0
500 &cppi41dma 12 0 &cppi41dma 13 0
501 &cppi41dma 14 0 &cppi41dma 0 1
502 &cppi41dma 1 1 &cppi41dma 2 1
503 &cppi41dma 3 1 &cppi41dma 4 1
504 &cppi41dma 5 1 &cppi41dma 6 1
505 &cppi41dma 7 1 &cppi41dma 8 1
506 &cppi41dma 9 1 &cppi41dma 10 1
507 &cppi41dma 11 1 &cppi41dma 12 1
508 &cppi41dma 13 1 &cppi41dma 14 1>;
509 dma-names =
510 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
511 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
512 "rx14", "rx15",
513 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
514 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
515 "tx14", "tx15";
97238b35
SAS		 516 };
517
c031a7d4 518 usb1_phy: usb-phy@47401b00 {
97238b35
SAS		 519 compatible = "ti,am335x-usb-phy";
520 reg = <0x47401b00 0x100>;
521 reg-names = "phy";
522 status = "disabled";
e7243b76 523 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 524 };
525
526 usb1: usb@47401800 {
527 compatible = "ti,musb-am33xx";
97238b35 528 status = "disabled";
c031a7d4
SAS		 529 reg = <0x47401c00 0x400
530 0x47401800 0x200>;
531 reg-names = "mc", "control";
532 interrupts = <19>;
533 interrupt-names = "mc";
534 dr_mode = "otg";
535 mentor,multipoint = <1>;
536 mentor,num-eps = <16>;
537 mentor,ram-bits = <12>;
538 mentor,power = <500>;
539 phys = <&usb1_phy>;
9b3452d1
SAS		 540
541 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
542 &cppi41dma 17 0 &cppi41dma 18 0
543 &cppi41dma 19 0 &cppi41dma 20 0
544 &cppi41dma 21 0 &cppi41dma 22 0
545 &cppi41dma 23 0 &cppi41dma 24 0
546 &cppi41dma 25 0 &cppi41dma 26 0
547 &cppi41dma 27 0 &cppi41dma 28 0
548 &cppi41dma 29 0 &cppi41dma 15 1
549 &cppi41dma 16 1 &cppi41dma 17 1
550 &cppi41dma 18 1 &cppi41dma 19 1
551 &cppi41dma 20 1 &cppi41dma 21 1
552 &cppi41dma 22 1 &cppi41dma 23 1
553 &cppi41dma 24 1 &cppi41dma 25 1
554 &cppi41dma 26 1 &cppi41dma 27 1
555 &cppi41dma 28 1 &cppi41dma 29 1>;
556 dma-names =
557 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
558 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
559 "rx14", "rx15",
560 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
561 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
562 "tx14", "tx15";
97238b35 563 };
9b3452d1 564
8abcdd68 565 cppi41dma: dma-controller@47402000 {
9b3452d1
SAS		 566 compatible = "ti,am3359-cppi41";
567 reg = <0x47400000 0x1000
568 0x47402000 0x1000
569 0x47403000 0x1000
570 0x47404000 0x4000>;
3b6394b4 571 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS		 572 interrupts = <17>;
573 interrupt-names = "glue";
574 #dma-cells = <2>;
575 #dma-channels = <30>;
576 #dma-requests = <256>;
577 status = "disabled";
578 };
35b47fbb 579 };
6be35c70 580
0a7486c9
PA		 581 epwmss0: epwmss@48300000 {
582 compatible = "ti,am33xx-pwmss";
583 reg = <0x48300000 0x10>;
584 ti,hwmods = "epwmss0";
585 #address-cells = <1>;
586 #size-cells = <1>;
587 status = "disabled";
588 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
589 0x48300180 0x48300180 0x80 /* EQEP */
590 0x48300200 0x48300200 0x80>; /* EHRPWM */
591
592 ecap0: ecap@48300100 {
593 compatible = "ti,am33xx-ecap";
594 #pwm-cells = <3>;
595 reg = <0x48300100 0x80>;
e8c85a3e
MP		 596 interrupts = <31>;
597 interrupt-names = "ecap0";
0a7486c9
PA		 598 ti,hwmods = "ecap0";
599 status = "disabled";
600 };
601
602 ehrpwm0: ehrpwm@48300200 {
603 compatible = "ti,am33xx-ehrpwm";
604 #pwm-cells = <3>;
605 reg = <0x48300200 0x80>;
606 ti,hwmods = "ehrpwm0";
607 status = "disabled";
608 };
609 };
610
611 epwmss1: epwmss@48302000 {
612 compatible = "ti,am33xx-pwmss";
613 reg = <0x48302000 0x10>;
614 ti,hwmods = "epwmss1";
615 #address-cells = <1>;
616 #size-cells = <1>;
617 status = "disabled";
618 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
619 0x48302180 0x48302180 0x80 /* EQEP */
620 0x48302200 0x48302200 0x80>; /* EHRPWM */
621
622 ecap1: ecap@48302100 {
623 compatible = "ti,am33xx-ecap";
624 #pwm-cells = <3>;
625 reg = <0x48302100 0x80>;
e8c85a3e
MP		 626 interrupts = <47>;
627 interrupt-names = "ecap1";
0a7486c9
PA		 628 ti,hwmods = "ecap1";
629 status = "disabled";
630 };
631
632 ehrpwm1: ehrpwm@48302200 {
633 compatible = "ti,am33xx-ehrpwm";
634 #pwm-cells = <3>;
635 reg = <0x48302200 0x80>;
636 ti,hwmods = "ehrpwm1";
637 status = "disabled";
638 };
639 };
640
641 epwmss2: epwmss@48304000 {
642 compatible = "ti,am33xx-pwmss";
643 reg = <0x48304000 0x10>;
644 ti,hwmods = "epwmss2";
645 #address-cells = <1>;
646 #size-cells = <1>;
647 status = "disabled";
648 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
649 0x48304180 0x48304180 0x80 /* EQEP */
650 0x48304200 0x48304200 0x80>; /* EHRPWM */
651
652 ecap2: ecap@48304100 {
653 compatible = "ti,am33xx-ecap";
654 #pwm-cells = <3>;
655 reg = <0x48304100 0x80>;
e8c85a3e
MP		 656 interrupts = <61>;
657 interrupt-names = "ecap2";
0a7486c9
PA		 658 ti,hwmods = "ecap2";
659 status = "disabled";
660 };
661
662 ehrpwm2: ehrpwm@48304200 {
663 compatible = "ti,am33xx-ehrpwm";
664 #pwm-cells = <3>;
665 reg = <0x48304200 0x80>;
666 ti,hwmods = "ehrpwm2";
667 status = "disabled";
668 };
669 };
670
1a39a65c
M		 671 mac: ethernet@4a100000 {
672 compatible = "ti,cpsw";
673 ti,hwmods = "cpgmac0";
0987a6ef
GC		 674 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
675 clock-names = "fck", "cpts";
1a39a65c
M		 676 cpdma_channels = <8>;
677 ale_entries = <1024>;
678 bd_ram_size = <0x2000>;
679 no_bd_ram = <0>;
680 rx_descs = <64>;
681 mac_control = <0x20>;
682 slaves = <2>;
e86ac13b 683 active_slave = <0>;
1a39a65c
M		 684 cpts_clock_mult = <0x80000000>;
685 cpts_clock_shift = <29>;
686 reg = <0x4a100000 0x800
687 0x4a101200 0x100>;
688 #address-cells = <1>;
689 #size-cells = <1>;
690 interrupt-parent = <&intc>;
691 /*
692 * c0_rx_thresh_pend
693 * c0_rx_pend
694 * c0_tx_pend
695 * c0_misc_pend
696 */
697 interrupts = <40 41 42 43>;
698 ranges;
16c75a13 699 status = "disabled";
1a39a65c
M		 700
701 davinci_mdio: mdio@4a101000 {
702 compatible = "ti,davinci_mdio";
703 #address-cells = <1>;
704 #size-cells = <0>;
705 ti,hwmods = "davinci_mdio";
706 bus_freq = <1000000>;
707 reg = <0x4a101000 0x100>;
16c75a13 708 status = "disabled";
1a39a65c
M		 709 };
710
711 cpsw_emac0: slave@4a100200 {
712 /* Filled in by U-Boot */
713 mac-address = [ 00 00 00 00 00 00 ];
714 };
715
716 cpsw_emac1: slave@4a100300 {
717 /* Filled in by U-Boot */
718 mac-address = [ 00 00 00 00 00 00 ];
719 };
39ffbd91
M		 720
721 phy_sel: cpsw-phy-sel@44e10650 {
722 compatible = "ti,am3352-cpsw-phy-sel";
723 reg= <0x44e10650 0x4>;
724 reg-names = "gmii-sel";
725 };
1a39a65c 726 };
f6575c90
VB		 727
728 ocmcram: ocmcram@40300000 {
729 compatible = "ti,am3352-ocmcram";
730 reg = <0x40300000 0x10000>;
731 ti,hwmods = "ocmcram";
f6575c90
VB		 732 };
733
734 wkup_m3: wkup_m3@44d00000 {
735 compatible = "ti,am3353-wkup-m3";
736 reg = <0x44d00000 0x4000 /* M3 UMEM */
737 0x44d80000 0x2000>; /* M3 DMEM */
738 ti,hwmods = "wkup_m3";
f12ecbe2 739 ti,no-reset-on-init;
f6575c90 740 };
e45879ec 741
15e8246b
PA		 742 elm: elm@48080000 {
743 compatible = "ti,am3352-elm";
744 reg = <0x48080000 0x2000>;
745 interrupts = <4>;
746 ti,hwmods = "elm";
d6cfc1e2
BP		 747 status = "disabled";
748 };
749
750 lcdc: lcdc@4830e000 {
751 compatible = "ti,am33xx-tilcdc";
752 reg = <0x4830e000 0x1000>;
753 interrupt-parent = <&intc>;
754 interrupts = <36>;
755 ti,hwmods = "lcdc";
15e8246b
PA		 756 status = "disabled";
757 };
758
a82279dd
PR		 759 tscadc: tscadc@44e0d000 {
760 compatible = "ti,am3359-tscadc";
761 reg = <0x44e0d000 0x1000>;
762 interrupt-parent = <&intc>;
763 interrupts = <16>;
764 ti,hwmods = "adc_tsc";
765 status = "disabled";
766
767 tsc {
768 compatible = "ti,am3359-tsc";
769 };
770 am335x_adc: adc {
771 #io-channel-cells = <1>;
772 compatible = "ti,am3359-adc";
773 };
a82279dd
PR		 774 };
775
e45879ec
PA		 776 gpmc: gpmc@50000000 {
777 compatible = "ti,am3352-gpmc";
778 ti,hwmods = "gpmc";
f12ecbe2 779 ti,no-idle-on-init;
e45879ec
PA		 780 reg = <0x50000000 0x2000>;
781 interrupts = <100>;
00dddcaa
LP		 782 gpmc,num-cs = <7>;
783 gpmc,num-waitpins = <2>;
e45879ec
PA		 784 #address-cells = <2>;
785 #size-cells = <1>;
786 status = "disabled";
787 };
f8302e1e
MG		 788
789 sham: sham@53100000 {
790 compatible = "ti,omap4-sham";
791 ti,hwmods = "sham";
792 reg = <0x53100000 0x200>;
793 interrupts = <109>;
794 dmas = <&edma 36>;
795 dma-names = "rx";
796 };
99919e5e
MG		 797
798 aes: aes@53500000 {
799 compatible = "ti,omap4-aes";
800 ti,hwmods = "aes";
801 reg = <0x53500000 0xa0>;
7af8884a 802 interrupts = <103>;
99919e5e
MG		 803 dmas = <&edma 6>,
804 <&edma 5>;
805 dma-names = "tx", "rx";
806 };
3f72f875
PA		 807
808 mcasp0: mcasp@48038000 {
809 compatible = "ti,am33xx-mcasp-audio";
810 ti,hwmods = "mcasp0";
0bee55ab
JS		 811 reg = <0x48038000 0x2000>,
812 <0x46000000 0x400000>;
813 reg-names = "mpu", "dat";
3f72f875 814 interrupts = <80>, <81>;
ae107d06 815 interrupt-names = "tx", "rx";
3f72f875
PA		 816 status = "disabled";
817 dmas = <&edma 8>,
818 <&edma 9>;
819 dma-names = "tx", "rx";
820 };
821
822 mcasp1: mcasp@4803C000 {
823 compatible = "ti,am33xx-mcasp-audio";
824 ti,hwmods = "mcasp1";
0bee55ab
JS		 825 reg = <0x4803C000 0x2000>,
826 <0x46400000 0x400000>;
827 reg-names = "mpu", "dat";
3f72f875 828 interrupts = <82>, <83>;
ae107d06 829 interrupt-names = "tx", "rx";
3f72f875
PA		 830 status = "disabled";
831 dmas = <&edma 10>,
832 <&edma 11>;
833 dma-names = "tx", "rx";
834 };
ed845d6b
LV		 835
836 rng: rng@48310000 {
837 compatible = "ti,omap4-rng";
838 ti,hwmods = "rng";
839 reg = <0x48310000 0x2000>;
840 interrupts = <111>;
841 };
5fc0b42a
AC		 842 };
843};
ea291c98
TK		 844
845/include/ "am33xx-clocks.dtsi"
Linux kernel - Deliverables
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