ARM: dts: OMAP4: Add DES3DES node
[deliverable/linux.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
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1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
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15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
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19
20 aliases {
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VH
21 serial0 = &uart0;
22 serial1 = &uart1;
23 serial2 = &uart2;
24 serial3 = &uart3;
25 serial4 = &uart4;
26 serial5 = &uart5;
7a57ee87
AC
27 d_can0 = &dcan0;
28 d_can1 = &dcan1;
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SAS
29 usb0 = &usb0;
30 usb1 = &usb1;
31 phy0 = &usb0_phy;
32 phy1 = &usb1_phy;
8170056d
DM
33 ethernet0 = &cpsw_emac0;
34 ethernet1 = &cpsw_emac1;
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35 };
36
37 cpus {
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LP
38 #address-cells = <1>;
39 #size-cells = <0>;
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40 cpu@0 {
41 compatible = "arm,cortex-a8";
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LP
42 device_type = "cpu";
43 reg = <0>;
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AC
44
45 /*
46 * To consider voltage drop between PMIC and SoC,
47 * tolerance value is reduced to 2% from 4% and
48 * voltage value is increased as a precaution.
49 */
50 operating-points = <
51 /* kHz uV */
52 720000 1285000
53 600000 1225000
54 500000 1125000
55 275000 1125000
56 >;
57 voltage-tolerance = <2>; /* 2 percentage */
58 clock-latency = <300000>; /* From omap-cpufreq driver */
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59 };
60 };
61
6797cdbe
AB
62 pmu {
63 compatible = "arm,cortex-a8-pmu";
64 interrupts = <3>;
65 };
66
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67 /*
68 * The soc node represents the soc top level view. It is uses for IPs
69 * that are not memory mapped in the MPU view or for the MPU itself.
70 */
71 soc {
72 compatible = "ti,omap-infra";
73 mpu {
74 compatible = "ti,omap3-mpu";
75 ti,hwmods = "mpu";
76 };
77 };
78
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AC
79 am33xx_pinmux: pinmux@44e10800 {
80 compatible = "pinctrl-single";
81 reg = <0x44e10800 0x0238>;
82 #address-cells = <1>;
83 #size-cells = <0>;
84 pinctrl-single,register-width = <32>;
85 pinctrl-single,function-mask = <0x7f>;
86 };
87
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AC
88 /*
89 * XXX: Use a flat representation of the AM33XX interconnect.
90 * The real AM33XX interconnect network is quite complex.Since
91 * that will not bring real advantage to represent that in DT
92 * for the moment, just use a fake OCP bus entry to represent
93 * the whole bus hierarchy.
94 */
95 ocp {
96 compatible = "simple-bus";
97 #address-cells = <1>;
98 #size-cells = <1>;
99 ranges;
100 ti,hwmods = "l3_main";
101
102 intc: interrupt-controller@48200000 {
103 compatible = "ti,omap2-intc";
104 interrupt-controller;
105 #interrupt-cells = <1>;
106 ti,intc-size = <128>;
107 reg = <0x48200000 0x1000>;
108 };
109
505975d3
MP
110 edma: edma@49000000 {
111 compatible = "ti,edma3";
112 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
113 reg = <0x49000000 0x10000>,
114 <0x44e10f90 0x10>;
115 interrupts = <12 13 14>;
116 #dma-cells = <1>;
117 dma-channels = <64>;
118 ti,edma-regions = <4>;
119 ti,edma-slots = <256>;
120 };
121
b918e2c0 122 gpio0: gpio@44e07000 {
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123 compatible = "ti,omap4-gpio";
124 ti,hwmods = "gpio1";
125 gpio-controller;
126 #gpio-cells = <2>;
127 interrupt-controller;
5eac0eb7 128 #interrupt-cells = <2>;
4462b31c 129 reg = <0x44e07000 0x1000>;
4462b31c 130 interrupts = <96>;
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131 };
132
b918e2c0 133 gpio1: gpio@4804c000 {
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134 compatible = "ti,omap4-gpio";
135 ti,hwmods = "gpio2";
136 gpio-controller;
137 #gpio-cells = <2>;
138 interrupt-controller;
5eac0eb7 139 #interrupt-cells = <2>;
4462b31c 140 reg = <0x4804c000 0x1000>;
4462b31c 141 interrupts = <98>;
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142 };
143
b918e2c0 144 gpio2: gpio@481ac000 {
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145 compatible = "ti,omap4-gpio";
146 ti,hwmods = "gpio3";
147 gpio-controller;
148 #gpio-cells = <2>;
149 interrupt-controller;
5eac0eb7 150 #interrupt-cells = <2>;
4462b31c 151 reg = <0x481ac000 0x1000>;
4462b31c 152 interrupts = <32>;
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153 };
154
b918e2c0 155 gpio3: gpio@481ae000 {
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156 compatible = "ti,omap4-gpio";
157 ti,hwmods = "gpio4";
158 gpio-controller;
159 #gpio-cells = <2>;
160 interrupt-controller;
5eac0eb7 161 #interrupt-cells = <2>;
4462b31c 162 reg = <0x481ae000 0x1000>;
4462b31c 163 interrupts = <62>;
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164 };
165
dde3b0d6 166 uart0: serial@44e09000 {
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167 compatible = "ti,omap3-uart";
168 ti,hwmods = "uart1";
169 clock-frequency = <48000000>;
4462b31c 170 reg = <0x44e09000 0x2000>;
4462b31c 171 interrupts = <72>;
53d91034 172 status = "disabled";
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173 };
174
dde3b0d6 175 uart1: serial@48022000 {
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176 compatible = "ti,omap3-uart";
177 ti,hwmods = "uart2";
178 clock-frequency = <48000000>;
4462b31c 179 reg = <0x48022000 0x2000>;
4462b31c 180 interrupts = <73>;
53d91034 181 status = "disabled";
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182 };
183
dde3b0d6 184 uart2: serial@48024000 {
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185 compatible = "ti,omap3-uart";
186 ti,hwmods = "uart3";
187 clock-frequency = <48000000>;
4462b31c 188 reg = <0x48024000 0x2000>;
4462b31c 189 interrupts = <74>;
53d91034 190 status = "disabled";
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191 };
192
dde3b0d6 193 uart3: serial@481a6000 {
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194 compatible = "ti,omap3-uart";
195 ti,hwmods = "uart4";
196 clock-frequency = <48000000>;
4462b31c 197 reg = <0x481a6000 0x2000>;
4462b31c 198 interrupts = <44>;
53d91034 199 status = "disabled";
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200 };
201
dde3b0d6 202 uart4: serial@481a8000 {
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203 compatible = "ti,omap3-uart";
204 ti,hwmods = "uart5";
205 clock-frequency = <48000000>;
4462b31c 206 reg = <0x481a8000 0x2000>;
4462b31c 207 interrupts = <45>;
53d91034 208 status = "disabled";
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209 };
210
dde3b0d6 211 uart5: serial@481aa000 {
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212 compatible = "ti,omap3-uart";
213 ti,hwmods = "uart6";
214 clock-frequency = <48000000>;
4462b31c 215 reg = <0x481aa000 0x2000>;
4462b31c 216 interrupts = <46>;
53d91034 217 status = "disabled";
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218 };
219
b918e2c0 220 i2c0: i2c@44e0b000 {
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221 compatible = "ti,omap4-i2c";
222 #address-cells = <1>;
223 #size-cells = <0>;
224 ti,hwmods = "i2c1";
4462b31c 225 reg = <0x44e0b000 0x1000>;
4462b31c 226 interrupts = <70>;
53d91034 227 status = "disabled";
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228 };
229
b918e2c0 230 i2c1: i2c@4802a000 {
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231 compatible = "ti,omap4-i2c";
232 #address-cells = <1>;
233 #size-cells = <0>;
234 ti,hwmods = "i2c2";
4462b31c 235 reg = <0x4802a000 0x1000>;
4462b31c 236 interrupts = <71>;
53d91034 237 status = "disabled";
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238 };
239
b918e2c0 240 i2c2: i2c@4819c000 {
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241 compatible = "ti,omap4-i2c";
242 #address-cells = <1>;
243 #size-cells = <0>;
244 ti,hwmods = "i2c3";
4462b31c 245 reg = <0x4819c000 0x1000>;
4462b31c 246 interrupts = <30>;
53d91034 247 status = "disabled";
5fc0b42a 248 };
5f789ebc 249
55b4452b
MP
250 mmc1: mmc@48060000 {
251 compatible = "ti,omap4-hsmmc";
252 ti,hwmods = "mmc1";
253 ti,dual-volt;
254 ti,needs-special-reset;
255 ti,needs-special-hs-handling;
256 dmas = <&edma 24
257 &edma 25>;
258 dma-names = "tx", "rx";
259 interrupts = <64>;
260 interrupt-parent = <&intc>;
261 reg = <0x48060000 0x1000>;
262 status = "disabled";
263 };
264
265 mmc2: mmc@481d8000 {
266 compatible = "ti,omap4-hsmmc";
267 ti,hwmods = "mmc2";
268 ti,needs-special-reset;
269 dmas = <&edma 2
270 &edma 3>;
271 dma-names = "tx", "rx";
272 interrupts = <28>;
273 interrupt-parent = <&intc>;
274 reg = <0x481d8000 0x1000>;
275 status = "disabled";
276 };
277
278 mmc3: mmc@47810000 {
279 compatible = "ti,omap4-hsmmc";
280 ti,hwmods = "mmc3";
281 ti,needs-special-reset;
282 interrupts = <29>;
283 interrupt-parent = <&intc>;
284 reg = <0x47810000 0x1000>;
285 status = "disabled";
286 };
287
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AM
288 wdt2: wdt@44e35000 {
289 compatible = "ti,omap3-wdt";
290 ti,hwmods = "wd_timer2";
4462b31c 291 reg = <0x44e35000 0x1000>;
4462b31c 292 interrupts = <91>;
5f789ebc 293 };
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AC
294
295 dcan0: d_can@481cc000 {
296 compatible = "bosch,d_can";
297 ti,hwmods = "d_can0";
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AC
298 reg = <0x481cc000 0x2000
299 0x44e10644 0x4>;
059b185d 300 interrupts = <52>;
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301 status = "disabled";
302 };
303
304 dcan1: d_can@481d0000 {
305 compatible = "bosch,d_can";
306 ti,hwmods = "d_can1";
f178c015
AC
307 reg = <0x481d0000 0x2000
308 0x44e10644 0x4>;
059b185d 309 interrupts = <55>;
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AC
310 status = "disabled";
311 };
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312
313 timer1: timer@44e31000 {
002e1ec5 314 compatible = "ti,am335x-timer-1ms";
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JH
315 reg = <0x44e31000 0x400>;
316 interrupts = <67>;
317 ti,hwmods = "timer1";
318 ti,timer-alwon;
319 };
320
321 timer2: timer@48040000 {
002e1ec5 322 compatible = "ti,am335x-timer";
fab8ad0b
JH
323 reg = <0x48040000 0x400>;
324 interrupts = <68>;
325 ti,hwmods = "timer2";
326 };
327
328 timer3: timer@48042000 {
002e1ec5 329 compatible = "ti,am335x-timer";
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JH
330 reg = <0x48042000 0x400>;
331 interrupts = <69>;
332 ti,hwmods = "timer3";
333 };
334
335 timer4: timer@48044000 {
002e1ec5 336 compatible = "ti,am335x-timer";
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JH
337 reg = <0x48044000 0x400>;
338 interrupts = <92>;
339 ti,hwmods = "timer4";
340 ti,timer-pwm;
341 };
342
343 timer5: timer@48046000 {
002e1ec5 344 compatible = "ti,am335x-timer";
fab8ad0b
JH
345 reg = <0x48046000 0x400>;
346 interrupts = <93>;
347 ti,hwmods = "timer5";
348 ti,timer-pwm;
349 };
350
351 timer6: timer@48048000 {
002e1ec5 352 compatible = "ti,am335x-timer";
fab8ad0b
JH
353 reg = <0x48048000 0x400>;
354 interrupts = <94>;
355 ti,hwmods = "timer6";
356 ti,timer-pwm;
357 };
358
359 timer7: timer@4804a000 {
002e1ec5 360 compatible = "ti,am335x-timer";
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JH
361 reg = <0x4804a000 0x400>;
362 interrupts = <95>;
363 ti,hwmods = "timer7";
364 ti,timer-pwm;
365 };
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AM
366
367 rtc@44e3e000 {
368 compatible = "ti,da830-rtc";
369 reg = <0x44e3e000 0x1000>;
370 interrupts = <75
371 76>;
372 ti,hwmods = "rtc";
373 };
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PA
374
375 spi0: spi@48030000 {
376 compatible = "ti,omap4-mcspi";
377 #address-cells = <1>;
378 #size-cells = <0>;
379 reg = <0x48030000 0x400>;
7b3754c6 380 interrupts = <65>;
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PA
381 ti,spi-num-cs = <2>;
382 ti,hwmods = "spi0";
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MP
383 dmas = <&edma 16
384 &edma 17
385 &edma 18
386 &edma 19>;
387 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA
388 status = "disabled";
389 };
390
391 spi1: spi@481a0000 {
392 compatible = "ti,omap4-mcspi";
393 #address-cells = <1>;
394 #size-cells = <0>;
395 reg = <0x481a0000 0x400>;
7b3754c6 396 interrupts = <125>;
9fd3c748
PA
397 ti,spi-num-cs = <2>;
398 ti,hwmods = "spi1";
f5e2f807
MP
399 dmas = <&edma 42
400 &edma 43
401 &edma 44
402 &edma 45>;
403 dma-names = "tx0", "rx0", "tx1", "rx1";
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PA
404 status = "disabled";
405 };
35b47fbb 406
97238b35
SAS
407 usb: usb@47400000 {
408 compatible = "ti,am33xx-usb";
409 reg = <0x47400000 0x1000>;
410 ranges;
411 #address-cells = <1>;
412 #size-cells = <1>;
35b47fbb 413 ti,hwmods = "usb_otg_hs";
97238b35
SAS
414 status = "disabled";
415
416 ctrl_mod: control@44e10000 {
417 compatible = "ti,am335x-usb-ctrl-module";
418 reg = <0x44e10620 0x10
419 0x44e10648 0x4>;
420 reg-names = "phy_ctrl", "wakeup";
421 status = "disabled";
422 };
423
c031a7d4 424 usb0_phy: usb-phy@47401300 {
97238b35
SAS
425 compatible = "ti,am335x-usb-phy";
426 reg = <0x47401300 0x100>;
427 reg-names = "phy";
428 status = "disabled";
429 ti,ctrl_mod = <&ctrl_mod>;
430 };
431
432 usb0: usb@47401000 {
433 compatible = "ti,musb-am33xx";
97238b35 434 status = "disabled";
c031a7d4
SAS
435 reg = <0x47401400 0x400
436 0x47401000 0x200>;
437 reg-names = "mc", "control";
438
439 interrupts = <18>;
440 interrupt-names = "mc";
441 dr_mode = "otg";
442 mentor,multipoint = <1>;
443 mentor,num-eps = <16>;
444 mentor,ram-bits = <12>;
445 mentor,power = <500>;
446 phys = <&usb0_phy>;
9b3452d1
SAS
447
448 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
449 &cppi41dma 2 0 &cppi41dma 3 0
450 &cppi41dma 4 0 &cppi41dma 5 0
451 &cppi41dma 6 0 &cppi41dma 7 0
452 &cppi41dma 8 0 &cppi41dma 9 0
453 &cppi41dma 10 0 &cppi41dma 11 0
454 &cppi41dma 12 0 &cppi41dma 13 0
455 &cppi41dma 14 0 &cppi41dma 0 1
456 &cppi41dma 1 1 &cppi41dma 2 1
457 &cppi41dma 3 1 &cppi41dma 4 1
458 &cppi41dma 5 1 &cppi41dma 6 1
459 &cppi41dma 7 1 &cppi41dma 8 1
460 &cppi41dma 9 1 &cppi41dma 10 1
461 &cppi41dma 11 1 &cppi41dma 12 1
462 &cppi41dma 13 1 &cppi41dma 14 1>;
463 dma-names =
464 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
465 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
466 "rx14", "rx15",
467 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
468 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
469 "tx14", "tx15";
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SAS
470 };
471
c031a7d4 472 usb1_phy: usb-phy@47401b00 {
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SAS
473 compatible = "ti,am335x-usb-phy";
474 reg = <0x47401b00 0x100>;
475 reg-names = "phy";
476 status = "disabled";
477 ti,ctrl_mod = <&ctrl_mod>;
478 };
479
480 usb1: usb@47401800 {
481 compatible = "ti,musb-am33xx";
97238b35 482 status = "disabled";
c031a7d4
SAS
483 reg = <0x47401c00 0x400
484 0x47401800 0x200>;
485 reg-names = "mc", "control";
486 interrupts = <19>;
487 interrupt-names = "mc";
488 dr_mode = "otg";
489 mentor,multipoint = <1>;
490 mentor,num-eps = <16>;
491 mentor,ram-bits = <12>;
492 mentor,power = <500>;
493 phys = <&usb1_phy>;
9b3452d1
SAS
494
495 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
496 &cppi41dma 17 0 &cppi41dma 18 0
497 &cppi41dma 19 0 &cppi41dma 20 0
498 &cppi41dma 21 0 &cppi41dma 22 0
499 &cppi41dma 23 0 &cppi41dma 24 0
500 &cppi41dma 25 0 &cppi41dma 26 0
501 &cppi41dma 27 0 &cppi41dma 28 0
502 &cppi41dma 29 0 &cppi41dma 15 1
503 &cppi41dma 16 1 &cppi41dma 17 1
504 &cppi41dma 18 1 &cppi41dma 19 1
505 &cppi41dma 20 1 &cppi41dma 21 1
506 &cppi41dma 22 1 &cppi41dma 23 1
507 &cppi41dma 24 1 &cppi41dma 25 1
508 &cppi41dma 26 1 &cppi41dma 27 1
509 &cppi41dma 28 1 &cppi41dma 29 1>;
510 dma-names =
511 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
512 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
513 "rx14", "rx15",
514 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
515 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
516 "tx14", "tx15";
97238b35 517 };
9b3452d1 518
c031a7d4 519 cppi41dma: dma-controller@07402000 {
9b3452d1
SAS
520 compatible = "ti,am3359-cppi41";
521 reg = <0x47400000 0x1000
522 0x47402000 0x1000
523 0x47403000 0x1000
524 0x47404000 0x4000>;
3b6394b4 525 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS
526 interrupts = <17>;
527 interrupt-names = "glue";
528 #dma-cells = <2>;
529 #dma-channels = <30>;
530 #dma-requests = <256>;
531 status = "disabled";
532 };
35b47fbb 533 };
6be35c70 534
0a7486c9
PA
535 epwmss0: epwmss@48300000 {
536 compatible = "ti,am33xx-pwmss";
537 reg = <0x48300000 0x10>;
538 ti,hwmods = "epwmss0";
539 #address-cells = <1>;
540 #size-cells = <1>;
541 status = "disabled";
542 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
543 0x48300180 0x48300180 0x80 /* EQEP */
544 0x48300200 0x48300200 0x80>; /* EHRPWM */
545
546 ecap0: ecap@48300100 {
547 compatible = "ti,am33xx-ecap";
548 #pwm-cells = <3>;
549 reg = <0x48300100 0x80>;
550 ti,hwmods = "ecap0";
551 status = "disabled";
552 };
553
554 ehrpwm0: ehrpwm@48300200 {
555 compatible = "ti,am33xx-ehrpwm";
556 #pwm-cells = <3>;
557 reg = <0x48300200 0x80>;
558 ti,hwmods = "ehrpwm0";
559 status = "disabled";
560 };
561 };
562
563 epwmss1: epwmss@48302000 {
564 compatible = "ti,am33xx-pwmss";
565 reg = <0x48302000 0x10>;
566 ti,hwmods = "epwmss1";
567 #address-cells = <1>;
568 #size-cells = <1>;
569 status = "disabled";
570 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
571 0x48302180 0x48302180 0x80 /* EQEP */
572 0x48302200 0x48302200 0x80>; /* EHRPWM */
573
574 ecap1: ecap@48302100 {
575 compatible = "ti,am33xx-ecap";
576 #pwm-cells = <3>;
577 reg = <0x48302100 0x80>;
578 ti,hwmods = "ecap1";
579 status = "disabled";
580 };
581
582 ehrpwm1: ehrpwm@48302200 {
583 compatible = "ti,am33xx-ehrpwm";
584 #pwm-cells = <3>;
585 reg = <0x48302200 0x80>;
586 ti,hwmods = "ehrpwm1";
587 status = "disabled";
588 };
589 };
590
591 epwmss2: epwmss@48304000 {
592 compatible = "ti,am33xx-pwmss";
593 reg = <0x48304000 0x10>;
594 ti,hwmods = "epwmss2";
595 #address-cells = <1>;
596 #size-cells = <1>;
597 status = "disabled";
598 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
599 0x48304180 0x48304180 0x80 /* EQEP */
600 0x48304200 0x48304200 0x80>; /* EHRPWM */
601
602 ecap2: ecap@48304100 {
603 compatible = "ti,am33xx-ecap";
604 #pwm-cells = <3>;
605 reg = <0x48304100 0x80>;
606 ti,hwmods = "ecap2";
607 status = "disabled";
608 };
609
610 ehrpwm2: ehrpwm@48304200 {
611 compatible = "ti,am33xx-ehrpwm";
612 #pwm-cells = <3>;
613 reg = <0x48304200 0x80>;
614 ti,hwmods = "ehrpwm2";
615 status = "disabled";
616 };
617 };
618
1a39a65c
M
619 mac: ethernet@4a100000 {
620 compatible = "ti,cpsw";
621 ti,hwmods = "cpgmac0";
622 cpdma_channels = <8>;
623 ale_entries = <1024>;
624 bd_ram_size = <0x2000>;
625 no_bd_ram = <0>;
626 rx_descs = <64>;
627 mac_control = <0x20>;
628 slaves = <2>;
e86ac13b 629 active_slave = <0>;
1a39a65c
M
630 cpts_clock_mult = <0x80000000>;
631 cpts_clock_shift = <29>;
632 reg = <0x4a100000 0x800
633 0x4a101200 0x100>;
634 #address-cells = <1>;
635 #size-cells = <1>;
636 interrupt-parent = <&intc>;
637 /*
638 * c0_rx_thresh_pend
639 * c0_rx_pend
640 * c0_tx_pend
641 * c0_misc_pend
642 */
643 interrupts = <40 41 42 43>;
644 ranges;
645
646 davinci_mdio: mdio@4a101000 {
647 compatible = "ti,davinci_mdio";
648 #address-cells = <1>;
649 #size-cells = <0>;
650 ti,hwmods = "davinci_mdio";
651 bus_freq = <1000000>;
652 reg = <0x4a101000 0x100>;
653 };
654
655 cpsw_emac0: slave@4a100200 {
656 /* Filled in by U-Boot */
657 mac-address = [ 00 00 00 00 00 00 ];
658 };
659
660 cpsw_emac1: slave@4a100300 {
661 /* Filled in by U-Boot */
662 mac-address = [ 00 00 00 00 00 00 ];
663 };
1a39a65c 664 };
f6575c90
VB
665
666 ocmcram: ocmcram@40300000 {
667 compatible = "ti,am3352-ocmcram";
668 reg = <0x40300000 0x10000>;
669 ti,hwmods = "ocmcram";
f6575c90
VB
670 };
671
672 wkup_m3: wkup_m3@44d00000 {
673 compatible = "ti,am3353-wkup-m3";
674 reg = <0x44d00000 0x4000 /* M3 UMEM */
675 0x44d80000 0x2000>; /* M3 DMEM */
676 ti,hwmods = "wkup_m3";
677 };
e45879ec 678
15e8246b
PA
679 elm: elm@48080000 {
680 compatible = "ti,am3352-elm";
681 reg = <0x48080000 0x2000>;
682 interrupts = <4>;
683 ti,hwmods = "elm";
684 status = "disabled";
685 };
686
a82279dd
PR
687 tscadc: tscadc@44e0d000 {
688 compatible = "ti,am3359-tscadc";
689 reg = <0x44e0d000 0x1000>;
690 interrupt-parent = <&intc>;
691 interrupts = <16>;
692 ti,hwmods = "adc_tsc";
693 status = "disabled";
694
695 tsc {
696 compatible = "ti,am3359-tsc";
697 };
698 am335x_adc: adc {
699 #io-channel-cells = <1>;
700 compatible = "ti,am3359-adc";
701 };
a82279dd
PR
702 };
703
e45879ec
PA
704 gpmc: gpmc@50000000 {
705 compatible = "ti,am3352-gpmc";
706 ti,hwmods = "gpmc";
707 reg = <0x50000000 0x2000>;
708 interrupts = <100>;
00dddcaa
LP
709 gpmc,num-cs = <7>;
710 gpmc,num-waitpins = <2>;
e45879ec
PA
711 #address-cells = <2>;
712 #size-cells = <1>;
713 status = "disabled";
714 };
5fc0b42a
AC
715 };
716};
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