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usb: musb: only remove host/udc if it has been added
[deliverable/linux.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
5fc0b42a
AC		 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
5fc0b42a
AC		 15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
5fc0b42a
AC		 19
20 aliases {
dde3b0d6
VH		 21 serial0 = &uart0;
22 serial1 = &uart1;
23 serial2 = &uart2;
24 serial3 = &uart3;
25 serial4 = &uart4;
26 serial5 = &uart5;
7a57ee87
AC		 27 d_can0 = &dcan0;
28 d_can1 = &dcan1;
97238b35
SAS		 29 usb0 = &usb0;
30 usb1 = &usb1;
31 phy0 = &usb0_phy;
32 phy1 = &usb1_phy;
5fc0b42a
AC		 33 };
34
35 cpus {
2e0d513f
LP		 36 #address-cells = <1>;
37 #size-cells = <0>;
5fc0b42a
AC		 38 cpu@0 {
39 compatible = "arm,cortex-a8";
2e0d513f
LP		 40 device_type = "cpu";
41 reg = <0>;
efeedcf2
AC		 42
43 /*
44 * To consider voltage drop between PMIC and SoC,
45 * tolerance value is reduced to 2% from 4% and
46 * voltage value is increased as a precaution.
47 */
48 operating-points = <
49 /* kHz uV */
50 720000 1285000
51 600000 1225000
52 500000 1125000
53 275000 1125000
54 >;
55 voltage-tolerance = <2>; /* 2 percentage */
56 clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a
AC		 57 };
58 };
59
60 /*
61 * The soc node represents the soc top level view. It is uses for IPs
62 * that are not memory mapped in the MPU view or for the MPU itself.
63 */
64 soc {
65 compatible = "ti,omap-infra";
66 mpu {
67 compatible = "ti,omap3-mpu";
68 ti,hwmods = "mpu";
69 };
70 };
71
b552dfc4
AC		 72 am33xx_pinmux: pinmux@44e10800 {
73 compatible = "pinctrl-single";
74 reg = <0x44e10800 0x0238>;
75 #address-cells = <1>;
76 #size-cells = <0>;
77 pinctrl-single,register-width = <32>;
78 pinctrl-single,function-mask = <0x7f>;
79 };
80
5fc0b42a
AC		 81 /*
82 * XXX: Use a flat representation of the AM33XX interconnect.
83 * The real AM33XX interconnect network is quite complex.Since
84 * that will not bring real advantage to represent that in DT
85 * for the moment, just use a fake OCP bus entry to represent
86 * the whole bus hierarchy.
87 */
88 ocp {
89 compatible = "simple-bus";
90 #address-cells = <1>;
91 #size-cells = <1>;
92 ranges;
93 ti,hwmods = "l3_main";
94
95 intc: interrupt-controller@48200000 {
96 compatible = "ti,omap2-intc";
97 interrupt-controller;
98 #interrupt-cells = <1>;
99 ti,intc-size = <128>;
100 reg = <0x48200000 0x1000>;
101 };
102
b918e2c0 103 gpio0: gpio@44e07000 {
5fc0b42a
AC		 104 compatible = "ti,omap4-gpio";
105 ti,hwmods = "gpio1";
106 gpio-controller;
107 #gpio-cells = <2>;
108 interrupt-controller;
109 #interrupt-cells = <1>;
4462b31c 110 reg = <0x44e07000 0x1000>;
4462b31c 111 interrupts = <96>;
5fc0b42a
AC		 112 };
113
b918e2c0 114 gpio1: gpio@4804c000 {
5fc0b42a
AC		 115 compatible = "ti,omap4-gpio";
116 ti,hwmods = "gpio2";
117 gpio-controller;
118 #gpio-cells = <2>;
119 interrupt-controller;
120 #interrupt-cells = <1>;
4462b31c 121 reg = <0x4804c000 0x1000>;
4462b31c 122 interrupts = <98>;
5fc0b42a
AC		 123 };
124
b918e2c0 125 gpio2: gpio@481ac000 {
5fc0b42a
AC		 126 compatible = "ti,omap4-gpio";
127 ti,hwmods = "gpio3";
128 gpio-controller;
129 #gpio-cells = <2>;
130 interrupt-controller;
131 #interrupt-cells = <1>;
4462b31c 132 reg = <0x481ac000 0x1000>;
4462b31c 133 interrupts = <32>;
5fc0b42a
AC		 134 };
135
b918e2c0 136 gpio3: gpio@481ae000 {
5fc0b42a
AC		 137 compatible = "ti,omap4-gpio";
138 ti,hwmods = "gpio4";
139 gpio-controller;
140 #gpio-cells = <2>;
141 interrupt-controller;
142 #interrupt-cells = <1>;
4462b31c 143 reg = <0x481ae000 0x1000>;
4462b31c 144 interrupts = <62>;
5fc0b42a
AC		 145 };
146
dde3b0d6 147 uart0: serial@44e09000 {
5fc0b42a
AC		 148 compatible = "ti,omap3-uart";
149 ti,hwmods = "uart1";
150 clock-frequency = <48000000>;
4462b31c 151 reg = <0x44e09000 0x2000>;
4462b31c 152 interrupts = <72>;
53d91034 153 status = "disabled";
5fc0b42a
AC		 154 };
155
dde3b0d6 156 uart1: serial@48022000 {
5fc0b42a
AC		 157 compatible = "ti,omap3-uart";
158 ti,hwmods = "uart2";
159 clock-frequency = <48000000>;
4462b31c 160 reg = <0x48022000 0x2000>;
4462b31c 161 interrupts = <73>;
53d91034 162 status = "disabled";
5fc0b42a
AC		 163 };
164
dde3b0d6 165 uart2: serial@48024000 {
5fc0b42a
AC		 166 compatible = "ti,omap3-uart";
167 ti,hwmods = "uart3";
168 clock-frequency = <48000000>;
4462b31c 169 reg = <0x48024000 0x2000>;
4462b31c 170 interrupts = <74>;
53d91034 171 status = "disabled";
5fc0b42a
AC		 172 };
173
dde3b0d6 174 uart3: serial@481a6000 {
5fc0b42a
AC		 175 compatible = "ti,omap3-uart";
176 ti,hwmods = "uart4";
177 clock-frequency = <48000000>;
4462b31c 178 reg = <0x481a6000 0x2000>;
4462b31c 179 interrupts = <44>;
53d91034 180 status = "disabled";
5fc0b42a
AC		 181 };
182
dde3b0d6 183 uart4: serial@481a8000 {
5fc0b42a
AC		 184 compatible = "ti,omap3-uart";
185 ti,hwmods = "uart5";
186 clock-frequency = <48000000>;
4462b31c 187 reg = <0x481a8000 0x2000>;
4462b31c 188 interrupts = <45>;
53d91034 189 status = "disabled";
5fc0b42a
AC		 190 };
191
dde3b0d6 192 uart5: serial@481aa000 {
5fc0b42a
AC		 193 compatible = "ti,omap3-uart";
194 ti,hwmods = "uart6";
195 clock-frequency = <48000000>;
4462b31c 196 reg = <0x481aa000 0x2000>;
4462b31c 197 interrupts = <46>;
53d91034 198 status = "disabled";
5fc0b42a
AC		 199 };
200
b918e2c0 201 i2c0: i2c@44e0b000 {
5fc0b42a
AC		 202 compatible = "ti,omap4-i2c";
203 #address-cells = <1>;
204 #size-cells = <0>;
205 ti,hwmods = "i2c1";
4462b31c 206 reg = <0x44e0b000 0x1000>;
4462b31c 207 interrupts = <70>;
53d91034 208 status = "disabled";
5fc0b42a
AC		 209 };
210
b918e2c0 211 i2c1: i2c@4802a000 {
5fc0b42a
AC		 212 compatible = "ti,omap4-i2c";
213 #address-cells = <1>;
214 #size-cells = <0>;
215 ti,hwmods = "i2c2";
4462b31c 216 reg = <0x4802a000 0x1000>;
4462b31c 217 interrupts = <71>;
53d91034 218 status = "disabled";
5fc0b42a
AC		 219 };
220
b918e2c0 221 i2c2: i2c@4819c000 {
5fc0b42a
AC		 222 compatible = "ti,omap4-i2c";
223 #address-cells = <1>;
224 #size-cells = <0>;
225 ti,hwmods = "i2c3";
4462b31c 226 reg = <0x4819c000 0x1000>;
4462b31c 227 interrupts = <30>;
53d91034 228 status = "disabled";
5fc0b42a 229 };
5f789ebc
AM		 230
231 wdt2: wdt@44e35000 {
232 compatible = "ti,omap3-wdt";
233 ti,hwmods = "wd_timer2";
4462b31c 234 reg = <0x44e35000 0x1000>;
4462b31c 235 interrupts = <91>;
5f789ebc 236 };
059b185d
AC		 237
238 dcan0: d_can@481cc000 {
239 compatible = "bosch,d_can";
240 ti,hwmods = "d_can0";
f178c015
AC		 241 reg = <0x481cc000 0x2000
242 0x44e10644 0x4>;
059b185d 243 interrupts = <52>;
059b185d
AC		 244 status = "disabled";
245 };
246
247 dcan1: d_can@481d0000 {
248 compatible = "bosch,d_can";
249 ti,hwmods = "d_can1";
f178c015
AC		 250 reg = <0x481d0000 0x2000
251 0x44e10644 0x4>;
059b185d 252 interrupts = <55>;
059b185d
AC		 253 status = "disabled";
254 };
fab8ad0b
JH		 255
256 timer1: timer@44e31000 {
002e1ec5 257 compatible = "ti,am335x-timer-1ms";
fab8ad0b
JH		 258 reg = <0x44e31000 0x400>;
259 interrupts = <67>;
260 ti,hwmods = "timer1";
261 ti,timer-alwon;
262 };
263
264 timer2: timer@48040000 {
002e1ec5 265 compatible = "ti,am335x-timer";
fab8ad0b
JH		 266 reg = <0x48040000 0x400>;
267 interrupts = <68>;
268 ti,hwmods = "timer2";
269 };
270
271 timer3: timer@48042000 {
002e1ec5 272 compatible = "ti,am335x-timer";
fab8ad0b
JH		 273 reg = <0x48042000 0x400>;
274 interrupts = <69>;
275 ti,hwmods = "timer3";
276 };
277
278 timer4: timer@48044000 {
002e1ec5 279 compatible = "ti,am335x-timer";
fab8ad0b
JH		 280 reg = <0x48044000 0x400>;
281 interrupts = <92>;
282 ti,hwmods = "timer4";
283 ti,timer-pwm;
284 };
285
286 timer5: timer@48046000 {
002e1ec5 287 compatible = "ti,am335x-timer";
fab8ad0b
JH		 288 reg = <0x48046000 0x400>;
289 interrupts = <93>;
290 ti,hwmods = "timer5";
291 ti,timer-pwm;
292 };
293
294 timer6: timer@48048000 {
002e1ec5 295 compatible = "ti,am335x-timer";
fab8ad0b
JH		 296 reg = <0x48048000 0x400>;
297 interrupts = <94>;
298 ti,hwmods = "timer6";
299 ti,timer-pwm;
300 };
301
302 timer7: timer@4804a000 {
002e1ec5 303 compatible = "ti,am335x-timer";
fab8ad0b
JH		 304 reg = <0x4804a000 0x400>;
305 interrupts = <95>;
306 ti,hwmods = "timer7";
307 ti,timer-pwm;
308 };
0d935c16
AM		 309
310 rtc@44e3e000 {
311 compatible = "ti,da830-rtc";
312 reg = <0x44e3e000 0x1000>;
313 interrupts = <75
314 76>;
315 ti,hwmods = "rtc";
316 };
9fd3c748
PA		 317
318 spi0: spi@48030000 {
319 compatible = "ti,omap4-mcspi";
320 #address-cells = <1>;
321 #size-cells = <0>;
322 reg = <0x48030000 0x400>;
7b3754c6 323 interrupts = <65>;
9fd3c748
PA		 324 ti,spi-num-cs = <2>;
325 ti,hwmods = "spi0";
326 status = "disabled";
327 };
328
329 spi1: spi@481a0000 {
330 compatible = "ti,omap4-mcspi";
331 #address-cells = <1>;
332 #size-cells = <0>;
333 reg = <0x481a0000 0x400>;
7b3754c6 334 interrupts = <125>;
9fd3c748
PA		 335 ti,spi-num-cs = <2>;
336 ti,hwmods = "spi1";
337 status = "disabled";
338 };
35b47fbb 339
97238b35
SAS		 340 usb: usb@47400000 {
341 compatible = "ti,am33xx-usb";
342 reg = <0x47400000 0x1000>;
343 ranges;
344 #address-cells = <1>;
345 #size-cells = <1>;
35b47fbb 346 ti,hwmods = "usb_otg_hs";
97238b35
SAS		 347 status = "disabled";
348
349 ctrl_mod: control@44e10000 {
350 compatible = "ti,am335x-usb-ctrl-module";
351 reg = <0x44e10620 0x10
352 0x44e10648 0x4>;
353 reg-names = "phy_ctrl", "wakeup";
354 status = "disabled";
355 };
356
357 usb0_phy: phy@47401300 {
358 compatible = "ti,am335x-usb-phy";
359 reg = <0x47401300 0x100>;
360 reg-names = "phy";
361 status = "disabled";
362 ti,ctrl_mod = <&ctrl_mod>;
363 };
364
365 usb0: usb@47401000 {
366 compatible = "ti,musb-am33xx";
367 ranges;
368 #address-cells = <1>;
369 #size-cells = <1>;
370 reg = <0x47401000 0x200>;
371 reg-names = "control";
372 status = "disabled";
373
374 musb0: usb@47401400 {
375 compatible = "mg,musbmhdrc";
376 reg = <0x47401400 0x400>;
377 reg-names = "mc";
378 interrupts = <18>;
379 interrupt-names = "mc";
380 multipoint = <1>;
381 num-eps = <16>;
382 ram-bits = <12>;
383 port-mode = <3>;
384 power = <250>;
385 phys = <&usb0_phy>;
9b3452d1
SAS		 386
387 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
388 &cppi41dma 2 0 &cppi41dma 3 0
389 &cppi41dma 4 0 &cppi41dma 5 0
390 &cppi41dma 6 0 &cppi41dma 7 0
391 &cppi41dma 8 0 &cppi41dma 9 0
392 &cppi41dma 10 0 &cppi41dma 11 0
393 &cppi41dma 12 0 &cppi41dma 13 0
394 &cppi41dma 14 0 &cppi41dma 0 1
395 &cppi41dma 1 1 &cppi41dma 2 1
396 &cppi41dma 3 1 &cppi41dma 4 1
397 &cppi41dma 5 1 &cppi41dma 6 1
398 &cppi41dma 7 1 &cppi41dma 8 1
399 &cppi41dma 9 1 &cppi41dma 10 1
400 &cppi41dma 11 1 &cppi41dma 12 1
401 &cppi41dma 13 1 &cppi41dma 14 1>;
402 dma-names =
403 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
404 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
405 "rx14", "rx15",
406 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
407 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
408 "tx14", "tx15";
97238b35
SAS		 409 };
410 };
411
412 usb1_phy: phy@47401b00 {
413 compatible = "ti,am335x-usb-phy";
414 reg = <0x47401b00 0x100>;
415 reg-names = "phy";
416 status = "disabled";
417 ti,ctrl_mod = <&ctrl_mod>;
418 };
419
420 usb1: usb@47401800 {
421 compatible = "ti,musb-am33xx";
422 ranges;
423 #address-cells = <1>;
424 #size-cells = <1>;
425 reg = <0x47401800 0x200>;
426 reg-names = "control";
427 status = "disabled";
428
429 musb1: usb@47401c00 {
430 compatible = "mg,musbmhdrc";
431 reg = <0x47401c00 0x400>;
432 reg-names = "mc";
433 interrupts = <19>;
434 interrupt-names = "mc";
435 multipoint = <1>;
436 num-eps = <16>;
437 ram-bits = <12>;
438 port-mode = <3>;
439 power = <250>;
440 phys = <&usb1_phy>;
9b3452d1
SAS		 441
442 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
443 &cppi41dma 17 0 &cppi41dma 18 0
444 &cppi41dma 19 0 &cppi41dma 20 0
445 &cppi41dma 21 0 &cppi41dma 22 0
446 &cppi41dma 23 0 &cppi41dma 24 0
447 &cppi41dma 25 0 &cppi41dma 26 0
448 &cppi41dma 27 0 &cppi41dma 28 0
449 &cppi41dma 29 0 &cppi41dma 15 1
450 &cppi41dma 16 1 &cppi41dma 17 1
451 &cppi41dma 18 1 &cppi41dma 19 1
452 &cppi41dma 20 1 &cppi41dma 21 1
453 &cppi41dma 22 1 &cppi41dma 23 1
454 &cppi41dma 24 1 &cppi41dma 25 1
455 &cppi41dma 26 1 &cppi41dma 27 1
456 &cppi41dma 28 1 &cppi41dma 29 1>;
457 dma-names =
458 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
459 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
460 "rx14", "rx15",
461 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
462 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
463 "tx14", "tx15";
97238b35
SAS		 464 };
465 };
9b3452d1
SAS		 466
467 cppi41dma: dma@07402000 {
468 compatible = "ti,am3359-cppi41";
469 reg = <0x47400000 0x1000
470 0x47402000 0x1000
471 0x47403000 0x1000
472 0x47404000 0x4000>;
473 reg-names = "glue controller scheduler queuemgr";
474 interrupts = <17>;
475 interrupt-names = "glue";
476 #dma-cells = <2>;
477 #dma-channels = <30>;
478 #dma-requests = <256>;
479 status = "disabled";
480 };
35b47fbb 481 };
6be35c70 482
0a7486c9
PA		 483 epwmss0: epwmss@48300000 {
484 compatible = "ti,am33xx-pwmss";
485 reg = <0x48300000 0x10>;
486 ti,hwmods = "epwmss0";
487 #address-cells = <1>;
488 #size-cells = <1>;
489 status = "disabled";
490 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
491 0x48300180 0x48300180 0x80 /* EQEP */
492 0x48300200 0x48300200 0x80>; /* EHRPWM */
493
494 ecap0: ecap@48300100 {
495 compatible = "ti,am33xx-ecap";
496 #pwm-cells = <3>;
497 reg = <0x48300100 0x80>;
498 ti,hwmods = "ecap0";
499 status = "disabled";
500 };
501
502 ehrpwm0: ehrpwm@48300200 {
503 compatible = "ti,am33xx-ehrpwm";
504 #pwm-cells = <3>;
505 reg = <0x48300200 0x80>;
506 ti,hwmods = "ehrpwm0";
507 status = "disabled";
508 };
509 };
510
511 epwmss1: epwmss@48302000 {
512 compatible = "ti,am33xx-pwmss";
513 reg = <0x48302000 0x10>;
514 ti,hwmods = "epwmss1";
515 #address-cells = <1>;
516 #size-cells = <1>;
517 status = "disabled";
518 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
519 0x48302180 0x48302180 0x80 /* EQEP */
520 0x48302200 0x48302200 0x80>; /* EHRPWM */
521
522 ecap1: ecap@48302100 {
523 compatible = "ti,am33xx-ecap";
524 #pwm-cells = <3>;
525 reg = <0x48302100 0x80>;
526 ti,hwmods = "ecap1";
527 status = "disabled";
528 };
529
530 ehrpwm1: ehrpwm@48302200 {
531 compatible = "ti,am33xx-ehrpwm";
532 #pwm-cells = <3>;
533 reg = <0x48302200 0x80>;
534 ti,hwmods = "ehrpwm1";
535 status = "disabled";
536 };
537 };
538
539 epwmss2: epwmss@48304000 {
540 compatible = "ti,am33xx-pwmss";
541 reg = <0x48304000 0x10>;
542 ti,hwmods = "epwmss2";
543 #address-cells = <1>;
544 #size-cells = <1>;
545 status = "disabled";
546 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
547 0x48304180 0x48304180 0x80 /* EQEP */
548 0x48304200 0x48304200 0x80>; /* EHRPWM */
549
550 ecap2: ecap@48304100 {
551 compatible = "ti,am33xx-ecap";
552 #pwm-cells = <3>;
553 reg = <0x48304100 0x80>;
554 ti,hwmods = "ecap2";
555 status = "disabled";
556 };
557
558 ehrpwm2: ehrpwm@48304200 {
559 compatible = "ti,am33xx-ehrpwm";
560 #pwm-cells = <3>;
561 reg = <0x48304200 0x80>;
562 ti,hwmods = "ehrpwm2";
563 status = "disabled";
564 };
565 };
566
1a39a65c
M		 567 mac: ethernet@4a100000 {
568 compatible = "ti,cpsw";
569 ti,hwmods = "cpgmac0";
570 cpdma_channels = <8>;
571 ale_entries = <1024>;
572 bd_ram_size = <0x2000>;
573 no_bd_ram = <0>;
574 rx_descs = <64>;
575 mac_control = <0x20>;
576 slaves = <2>;
e86ac13b 577 active_slave = <0>;
1a39a65c
M		 578 cpts_clock_mult = <0x80000000>;
579 cpts_clock_shift = <29>;
580 reg = <0x4a100000 0x800
581 0x4a101200 0x100>;
582 #address-cells = <1>;
583 #size-cells = <1>;
584 interrupt-parent = <&intc>;
585 /*
586 * c0_rx_thresh_pend
587 * c0_rx_pend
588 * c0_tx_pend
589 * c0_misc_pend
590 */
591 interrupts = <40 41 42 43>;
592 ranges;
593
594 davinci_mdio: mdio@4a101000 {
595 compatible = "ti,davinci_mdio";
596 #address-cells = <1>;
597 #size-cells = <0>;
598 ti,hwmods = "davinci_mdio";
599 bus_freq = <1000000>;
600 reg = <0x4a101000 0x100>;
601 };
602
603 cpsw_emac0: slave@4a100200 {
604 /* Filled in by U-Boot */
605 mac-address = [ 00 00 00 00 00 00 ];
606 };
607
608 cpsw_emac1: slave@4a100300 {
609 /* Filled in by U-Boot */
610 mac-address = [ 00 00 00 00 00 00 ];
611 };
1a39a65c 612 };
f6575c90
VB		 613
614 ocmcram: ocmcram@40300000 {
615 compatible = "ti,am3352-ocmcram";
616 reg = <0x40300000 0x10000>;
617 ti,hwmods = "ocmcram";
f6575c90
VB		 618 };
619
620 wkup_m3: wkup_m3@44d00000 {
621 compatible = "ti,am3353-wkup-m3";
622 reg = <0x44d00000 0x4000 /* M3 UMEM */
623 0x44d80000 0x2000>; /* M3 DMEM */
624 ti,hwmods = "wkup_m3";
625 };
e45879ec 626
15e8246b
PA		 627 elm: elm@48080000 {
628 compatible = "ti,am3352-elm";
629 reg = <0x48080000 0x2000>;
630 interrupts = <4>;
631 ti,hwmods = "elm";
632 status = "disabled";
633 };
634
a82279dd
PR		 635 tscadc: tscadc@44e0d000 {
636 compatible = "ti,am3359-tscadc";
637 reg = <0x44e0d000 0x1000>;
638 interrupt-parent = <&intc>;
639 interrupts = <16>;
640 ti,hwmods = "adc_tsc";
641 status = "disabled";
642
643 tsc {
644 compatible = "ti,am3359-tsc";
645 };
646 am335x_adc: adc {
647 #io-channel-cells = <1>;
648 compatible = "ti,am3359-adc";
649 };
a82279dd
PR		 650 };
651
e45879ec
PA		 652 gpmc: gpmc@50000000 {
653 compatible = "ti,am3352-gpmc";
654 ti,hwmods = "gpmc";
655 reg = <0x50000000 0x2000>;
656 interrupts = <100>;
00dddcaa
LP		 657 gpmc,num-cs = <7>;
658 gpmc,num-waitpins = <2>;
e45879ec
PA		 659 #address-cells = <2>;
660 #size-cells = <1>;
661 status = "disabled";
662 };
5fc0b42a
AC		 663 };
664};
Linux kernel - Deliverables
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