projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ARM: dts: AM33XX: Add hwspinlock node
[deliverable/linux.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
5fc0b42a
AC		 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
5fc0b42a
AC		 15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
5fc0b42a
AC		 19
20 aliases {
6a968678
NM		 21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
dde3b0d6
VH		 24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
7a57ee87
AC		 30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
97238b35
SAS		 32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
8170056d
DM		 36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
5fc0b42a
AC		 38 };
39
40 cpus {
2e0d513f
LP		 41 #address-cells = <1>;
42 #size-cells = <0>;
5fc0b42a
AC		 43 cpu@0 {
44 compatible = "arm,cortex-a8";
2e0d513f
LP		 45 device_type = "cpu";
46 reg = <0>;
efeedcf2
AC		 47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
61 clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a
AC		 62 };
63 };
64
6797cdbe
AB		 65 pmu {
66 compatible = "arm,cortex-a8-pmu";
67 interrupts = <3>;
68 };
69
5fc0b42a
AC		 70 /*
71 * The soc node represents the soc top level view. It is uses for IPs
72 * that are not memory mapped in the MPU view or for the MPU itself.
73 */
74 soc {
75 compatible = "ti,omap-infra";
76 mpu {
77 compatible = "ti,omap3-mpu";
78 ti,hwmods = "mpu";
79 };
80 };
81
b552dfc4
AC		 82 am33xx_pinmux: pinmux@44e10800 {
83 compatible = "pinctrl-single";
84 reg = <0x44e10800 0x0238>;
85 #address-cells = <1>;
86 #size-cells = <0>;
87 pinctrl-single,register-width = <32>;
88 pinctrl-single,function-mask = <0x7f>;
89 };
90
5fc0b42a
AC		 91 /*
92 * XXX: Use a flat representation of the AM33XX interconnect.
93 * The real AM33XX interconnect network is quite complex.Since
94 * that will not bring real advantage to represent that in DT
95 * for the moment, just use a fake OCP bus entry to represent
96 * the whole bus hierarchy.
97 */
98 ocp {
99 compatible = "simple-bus";
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges;
103 ti,hwmods = "l3_main";
104
105 intc: interrupt-controller@48200000 {
106 compatible = "ti,omap2-intc";
107 interrupt-controller;
108 #interrupt-cells = <1>;
109 ti,intc-size = <128>;
110 reg = <0x48200000 0x1000>;
111 };
112
505975d3
MP		 113 edma: edma@49000000 {
114 compatible = "ti,edma3";
115 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
116 reg = <0x49000000 0x10000>,
117 <0x44e10f90 0x10>;
118 interrupts = <12 13 14>;
119 #dma-cells = <1>;
120 dma-channels = <64>;
121 ti,edma-regions = <4>;
122 ti,edma-slots = <256>;
123 };
124
b918e2c0 125 gpio0: gpio@44e07000 {
5fc0b42a
AC		 126 compatible = "ti,omap4-gpio";
127 ti,hwmods = "gpio1";
128 gpio-controller;
129 #gpio-cells = <2>;
130 interrupt-controller;
5eac0eb7 131 #interrupt-cells = <2>;
4462b31c 132 reg = <0x44e07000 0x1000>;
4462b31c 133 interrupts = <96>;
5fc0b42a
AC		 134 };
135
b918e2c0 136 gpio1: gpio@4804c000 {
5fc0b42a
AC		 137 compatible = "ti,omap4-gpio";
138 ti,hwmods = "gpio2";
139 gpio-controller;
140 #gpio-cells = <2>;
141 interrupt-controller;
5eac0eb7 142 #interrupt-cells = <2>;
4462b31c 143 reg = <0x4804c000 0x1000>;
4462b31c 144 interrupts = <98>;
5fc0b42a
AC		 145 };
146
b918e2c0 147 gpio2: gpio@481ac000 {
5fc0b42a
AC		 148 compatible = "ti,omap4-gpio";
149 ti,hwmods = "gpio3";
150 gpio-controller;
151 #gpio-cells = <2>;
152 interrupt-controller;
5eac0eb7 153 #interrupt-cells = <2>;
4462b31c 154 reg = <0x481ac000 0x1000>;
4462b31c 155 interrupts = <32>;
5fc0b42a
AC		 156 };
157
b918e2c0 158 gpio3: gpio@481ae000 {
5fc0b42a
AC		 159 compatible = "ti,omap4-gpio";
160 ti,hwmods = "gpio4";
161 gpio-controller;
162 #gpio-cells = <2>;
163 interrupt-controller;
5eac0eb7 164 #interrupt-cells = <2>;
4462b31c 165 reg = <0x481ae000 0x1000>;
4462b31c 166 interrupts = <62>;
5fc0b42a
AC		 167 };
168
dde3b0d6 169 uart0: serial@44e09000 {
5fc0b42a
AC		 170 compatible = "ti,omap3-uart";
171 ti,hwmods = "uart1";
172 clock-frequency = <48000000>;
4462b31c 173 reg = <0x44e09000 0x2000>;
4462b31c 174 interrupts = <72>;
53d91034 175 status = "disabled";
5fc0b42a
AC		 176 };
177
dde3b0d6 178 uart1: serial@48022000 {
5fc0b42a
AC		 179 compatible = "ti,omap3-uart";
180 ti,hwmods = "uart2";
181 clock-frequency = <48000000>;
4462b31c 182 reg = <0x48022000 0x2000>;
4462b31c 183 interrupts = <73>;
53d91034 184 status = "disabled";
5fc0b42a
AC		 185 };
186
dde3b0d6 187 uart2: serial@48024000 {
5fc0b42a
AC		 188 compatible = "ti,omap3-uart";
189 ti,hwmods = "uart3";
190 clock-frequency = <48000000>;
4462b31c 191 reg = <0x48024000 0x2000>;
4462b31c 192 interrupts = <74>;
53d91034 193 status = "disabled";
5fc0b42a
AC		 194 };
195
dde3b0d6 196 uart3: serial@481a6000 {
5fc0b42a
AC		 197 compatible = "ti,omap3-uart";
198 ti,hwmods = "uart4";
199 clock-frequency = <48000000>;
4462b31c 200 reg = <0x481a6000 0x2000>;
4462b31c 201 interrupts = <44>;
53d91034 202 status = "disabled";
5fc0b42a
AC		 203 };
204
dde3b0d6 205 uart4: serial@481a8000 {
5fc0b42a
AC		 206 compatible = "ti,omap3-uart";
207 ti,hwmods = "uart5";
208 clock-frequency = <48000000>;
4462b31c 209 reg = <0x481a8000 0x2000>;
4462b31c 210 interrupts = <45>;
53d91034 211 status = "disabled";
5fc0b42a
AC		 212 };
213
dde3b0d6 214 uart5: serial@481aa000 {
5fc0b42a
AC		 215 compatible = "ti,omap3-uart";
216 ti,hwmods = "uart6";
217 clock-frequency = <48000000>;
4462b31c 218 reg = <0x481aa000 0x2000>;
4462b31c 219 interrupts = <46>;
53d91034 220 status = "disabled";
5fc0b42a
AC		 221 };
222
b918e2c0 223 i2c0: i2c@44e0b000 {
5fc0b42a
AC		 224 compatible = "ti,omap4-i2c";
225 #address-cells = <1>;
226 #size-cells = <0>;
227 ti,hwmods = "i2c1";
4462b31c 228 reg = <0x44e0b000 0x1000>;
4462b31c 229 interrupts = <70>;
53d91034 230 status = "disabled";
5fc0b42a
AC		 231 };
232
b918e2c0 233 i2c1: i2c@4802a000 {
5fc0b42a
AC		 234 compatible = "ti,omap4-i2c";
235 #address-cells = <1>;
236 #size-cells = <0>;
237 ti,hwmods = "i2c2";
4462b31c 238 reg = <0x4802a000 0x1000>;
4462b31c 239 interrupts = <71>;
53d91034 240 status = "disabled";
5fc0b42a
AC		 241 };
242
b918e2c0 243 i2c2: i2c@4819c000 {
5fc0b42a
AC		 244 compatible = "ti,omap4-i2c";
245 #address-cells = <1>;
246 #size-cells = <0>;
247 ti,hwmods = "i2c3";
4462b31c 248 reg = <0x4819c000 0x1000>;
4462b31c 249 interrupts = <30>;
53d91034 250 status = "disabled";
5fc0b42a 251 };
5f789ebc 252
55b4452b
MP		 253 mmc1: mmc@48060000 {
254 compatible = "ti,omap4-hsmmc";
255 ti,hwmods = "mmc1";
256 ti,dual-volt;
257 ti,needs-special-reset;
258 ti,needs-special-hs-handling;
259 dmas = <&edma 24
260 &edma 25>;
261 dma-names = "tx", "rx";
262 interrupts = <64>;
263 interrupt-parent = <&intc>;
264 reg = <0x48060000 0x1000>;
265 status = "disabled";
266 };
267
268 mmc2: mmc@481d8000 {
269 compatible = "ti,omap4-hsmmc";
270 ti,hwmods = "mmc2";
271 ti,needs-special-reset;
272 dmas = <&edma 2
273 &edma 3>;
274 dma-names = "tx", "rx";
275 interrupts = <28>;
276 interrupt-parent = <&intc>;
277 reg = <0x481d8000 0x1000>;
278 status = "disabled";
279 };
280
281 mmc3: mmc@47810000 {
282 compatible = "ti,omap4-hsmmc";
283 ti,hwmods = "mmc3";
284 ti,needs-special-reset;
285 interrupts = <29>;
286 interrupt-parent = <&intc>;
287 reg = <0x47810000 0x1000>;
288 status = "disabled";
289 };
290
d4cbe80d
SA		 291 hwspinlock: spinlock@480ca000 {
292 compatible = "ti,omap4-hwspinlock";
293 reg = <0x480ca000 0x1000>;
294 ti,hwmods = "spinlock";
295 };
296
5f789ebc
AM		 297 wdt2: wdt@44e35000 {
298 compatible = "ti,omap3-wdt";
299 ti,hwmods = "wd_timer2";
4462b31c 300 reg = <0x44e35000 0x1000>;
4462b31c 301 interrupts = <91>;
5f789ebc 302 };
059b185d
AC		 303
304 dcan0: d_can@481cc000 {
305 compatible = "bosch,d_can";
306 ti,hwmods = "d_can0";
f178c015
AC		 307 reg = <0x481cc000 0x2000
308 0x44e10644 0x4>;
059b185d 309 interrupts = <52>;
059b185d
AC		 310 status = "disabled";
311 };
312
313 dcan1: d_can@481d0000 {
314 compatible = "bosch,d_can";
315 ti,hwmods = "d_can1";
f178c015
AC		 316 reg = <0x481d0000 0x2000
317 0x44e10644 0x4>;
059b185d 318 interrupts = <55>;
059b185d
AC		 319 status = "disabled";
320 };
fab8ad0b
JH		 321
322 timer1: timer@44e31000 {
002e1ec5 323 compatible = "ti,am335x-timer-1ms";
fab8ad0b
JH		 324 reg = <0x44e31000 0x400>;
325 interrupts = <67>;
326 ti,hwmods = "timer1";
327 ti,timer-alwon;
328 };
329
330 timer2: timer@48040000 {
002e1ec5 331 compatible = "ti,am335x-timer";
fab8ad0b
JH		 332 reg = <0x48040000 0x400>;
333 interrupts = <68>;
334 ti,hwmods = "timer2";
335 };
336
337 timer3: timer@48042000 {
002e1ec5 338 compatible = "ti,am335x-timer";
fab8ad0b
JH		 339 reg = <0x48042000 0x400>;
340 interrupts = <69>;
341 ti,hwmods = "timer3";
342 };
343
344 timer4: timer@48044000 {
002e1ec5 345 compatible = "ti,am335x-timer";
fab8ad0b
JH		 346 reg = <0x48044000 0x400>;
347 interrupts = <92>;
348 ti,hwmods = "timer4";
349 ti,timer-pwm;
350 };
351
352 timer5: timer@48046000 {
002e1ec5 353 compatible = "ti,am335x-timer";
fab8ad0b
JH		 354 reg = <0x48046000 0x400>;
355 interrupts = <93>;
356 ti,hwmods = "timer5";
357 ti,timer-pwm;
358 };
359
360 timer6: timer@48048000 {
002e1ec5 361 compatible = "ti,am335x-timer";
fab8ad0b
JH		 362 reg = <0x48048000 0x400>;
363 interrupts = <94>;
364 ti,hwmods = "timer6";
365 ti,timer-pwm;
366 };
367
368 timer7: timer@4804a000 {
002e1ec5 369 compatible = "ti,am335x-timer";
fab8ad0b
JH		 370 reg = <0x4804a000 0x400>;
371 interrupts = <95>;
372 ti,hwmods = "timer7";
373 ti,timer-pwm;
374 };
0d935c16
AM		 375
376 rtc@44e3e000 {
377 compatible = "ti,da830-rtc";
378 reg = <0x44e3e000 0x1000>;
379 interrupts = <75
380 76>;
381 ti,hwmods = "rtc";
382 };
9fd3c748
PA		 383
384 spi0: spi@48030000 {
385 compatible = "ti,omap4-mcspi";
386 #address-cells = <1>;
387 #size-cells = <0>;
388 reg = <0x48030000 0x400>;
7b3754c6 389 interrupts = <65>;
9fd3c748
PA		 390 ti,spi-num-cs = <2>;
391 ti,hwmods = "spi0";
f5e2f807
MP		 392 dmas = <&edma 16
393 &edma 17
394 &edma 18
395 &edma 19>;
396 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 397 status = "disabled";
398 };
399
400 spi1: spi@481a0000 {
401 compatible = "ti,omap4-mcspi";
402 #address-cells = <1>;
403 #size-cells = <0>;
404 reg = <0x481a0000 0x400>;
7b3754c6 405 interrupts = <125>;
9fd3c748
PA		 406 ti,spi-num-cs = <2>;
407 ti,hwmods = "spi1";
f5e2f807
MP		 408 dmas = <&edma 42
409 &edma 43
410 &edma 44
411 &edma 45>;
412 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 413 status = "disabled";
414 };
35b47fbb 415
97238b35
SAS		 416 usb: usb@47400000 {
417 compatible = "ti,am33xx-usb";
418 reg = <0x47400000 0x1000>;
419 ranges;
420 #address-cells = <1>;
421 #size-cells = <1>;
35b47fbb 422 ti,hwmods = "usb_otg_hs";
97238b35
SAS		 423 status = "disabled";
424
e7243b76 425 usb_ctrl_mod: control@44e10000 {
97238b35
SAS		 426 compatible = "ti,am335x-usb-ctrl-module";
427 reg = <0x44e10620 0x10
428 0x44e10648 0x4>;
429 reg-names = "phy_ctrl", "wakeup";
430 status = "disabled";
431 };
432
c031a7d4 433 usb0_phy: usb-phy@47401300 {
97238b35
SAS		 434 compatible = "ti,am335x-usb-phy";
435 reg = <0x47401300 0x100>;
436 reg-names = "phy";
437 status = "disabled";
e7243b76 438 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 439 };
440
441 usb0: usb@47401000 {
442 compatible = "ti,musb-am33xx";
97238b35 443 status = "disabled";
c031a7d4
SAS		 444 reg = <0x47401400 0x400
445 0x47401000 0x200>;
446 reg-names = "mc", "control";
447
448 interrupts = <18>;
449 interrupt-names = "mc";
450 dr_mode = "otg";
451 mentor,multipoint = <1>;
452 mentor,num-eps = <16>;
453 mentor,ram-bits = <12>;
454 mentor,power = <500>;
455 phys = <&usb0_phy>;
9b3452d1
SAS		 456
457 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
458 &cppi41dma 2 0 &cppi41dma 3 0
459 &cppi41dma 4 0 &cppi41dma 5 0
460 &cppi41dma 6 0 &cppi41dma 7 0
461 &cppi41dma 8 0 &cppi41dma 9 0
462 &cppi41dma 10 0 &cppi41dma 11 0
463 &cppi41dma 12 0 &cppi41dma 13 0
464 &cppi41dma 14 0 &cppi41dma 0 1
465 &cppi41dma 1 1 &cppi41dma 2 1
466 &cppi41dma 3 1 &cppi41dma 4 1
467 &cppi41dma 5 1 &cppi41dma 6 1
468 &cppi41dma 7 1 &cppi41dma 8 1
469 &cppi41dma 9 1 &cppi41dma 10 1
470 &cppi41dma 11 1 &cppi41dma 12 1
471 &cppi41dma 13 1 &cppi41dma 14 1>;
472 dma-names =
473 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
474 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
475 "rx14", "rx15",
476 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
477 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
478 "tx14", "tx15";
97238b35
SAS		 479 };
480
c031a7d4 481 usb1_phy: usb-phy@47401b00 {
97238b35
SAS		 482 compatible = "ti,am335x-usb-phy";
483 reg = <0x47401b00 0x100>;
484 reg-names = "phy";
485 status = "disabled";
e7243b76 486 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 487 };
488
489 usb1: usb@47401800 {
490 compatible = "ti,musb-am33xx";
97238b35 491 status = "disabled";
c031a7d4
SAS		 492 reg = <0x47401c00 0x400
493 0x47401800 0x200>;
494 reg-names = "mc", "control";
495 interrupts = <19>;
496 interrupt-names = "mc";
497 dr_mode = "otg";
498 mentor,multipoint = <1>;
499 mentor,num-eps = <16>;
500 mentor,ram-bits = <12>;
501 mentor,power = <500>;
502 phys = <&usb1_phy>;
9b3452d1
SAS		 503
504 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
505 &cppi41dma 17 0 &cppi41dma 18 0
506 &cppi41dma 19 0 &cppi41dma 20 0
507 &cppi41dma 21 0 &cppi41dma 22 0
508 &cppi41dma 23 0 &cppi41dma 24 0
509 &cppi41dma 25 0 &cppi41dma 26 0
510 &cppi41dma 27 0 &cppi41dma 28 0
511 &cppi41dma 29 0 &cppi41dma 15 1
512 &cppi41dma 16 1 &cppi41dma 17 1
513 &cppi41dma 18 1 &cppi41dma 19 1
514 &cppi41dma 20 1 &cppi41dma 21 1
515 &cppi41dma 22 1 &cppi41dma 23 1
516 &cppi41dma 24 1 &cppi41dma 25 1
517 &cppi41dma 26 1 &cppi41dma 27 1
518 &cppi41dma 28 1 &cppi41dma 29 1>;
519 dma-names =
520 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
521 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
522 "rx14", "rx15",
523 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
524 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
525 "tx14", "tx15";
97238b35 526 };
9b3452d1 527
c031a7d4 528 cppi41dma: dma-controller@07402000 {
9b3452d1
SAS		 529 compatible = "ti,am3359-cppi41";
530 reg = <0x47400000 0x1000
531 0x47402000 0x1000
532 0x47403000 0x1000
533 0x47404000 0x4000>;
3b6394b4 534 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS		 535 interrupts = <17>;
536 interrupt-names = "glue";
537 #dma-cells = <2>;
538 #dma-channels = <30>;
539 #dma-requests = <256>;
540 status = "disabled";
541 };
35b47fbb 542 };
6be35c70 543
0a7486c9
PA		 544 epwmss0: epwmss@48300000 {
545 compatible = "ti,am33xx-pwmss";
546 reg = <0x48300000 0x10>;
547 ti,hwmods = "epwmss0";
548 #address-cells = <1>;
549 #size-cells = <1>;
550 status = "disabled";
551 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
552 0x48300180 0x48300180 0x80 /* EQEP */
553 0x48300200 0x48300200 0x80>; /* EHRPWM */
554
555 ecap0: ecap@48300100 {
556 compatible = "ti,am33xx-ecap";
557 #pwm-cells = <3>;
558 reg = <0x48300100 0x80>;
559 ti,hwmods = "ecap0";
560 status = "disabled";
561 };
562
563 ehrpwm0: ehrpwm@48300200 {
564 compatible = "ti,am33xx-ehrpwm";
565 #pwm-cells = <3>;
566 reg = <0x48300200 0x80>;
567 ti,hwmods = "ehrpwm0";
568 status = "disabled";
569 };
570 };
571
572 epwmss1: epwmss@48302000 {
573 compatible = "ti,am33xx-pwmss";
574 reg = <0x48302000 0x10>;
575 ti,hwmods = "epwmss1";
576 #address-cells = <1>;
577 #size-cells = <1>;
578 status = "disabled";
579 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
580 0x48302180 0x48302180 0x80 /* EQEP */
581 0x48302200 0x48302200 0x80>; /* EHRPWM */
582
583 ecap1: ecap@48302100 {
584 compatible = "ti,am33xx-ecap";
585 #pwm-cells = <3>;
586 reg = <0x48302100 0x80>;
587 ti,hwmods = "ecap1";
588 status = "disabled";
589 };
590
591 ehrpwm1: ehrpwm@48302200 {
592 compatible = "ti,am33xx-ehrpwm";
593 #pwm-cells = <3>;
594 reg = <0x48302200 0x80>;
595 ti,hwmods = "ehrpwm1";
596 status = "disabled";
597 };
598 };
599
600 epwmss2: epwmss@48304000 {
601 compatible = "ti,am33xx-pwmss";
602 reg = <0x48304000 0x10>;
603 ti,hwmods = "epwmss2";
604 #address-cells = <1>;
605 #size-cells = <1>;
606 status = "disabled";
607 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
608 0x48304180 0x48304180 0x80 /* EQEP */
609 0x48304200 0x48304200 0x80>; /* EHRPWM */
610
611 ecap2: ecap@48304100 {
612 compatible = "ti,am33xx-ecap";
613 #pwm-cells = <3>;
614 reg = <0x48304100 0x80>;
615 ti,hwmods = "ecap2";
616 status = "disabled";
617 };
618
619 ehrpwm2: ehrpwm@48304200 {
620 compatible = "ti,am33xx-ehrpwm";
621 #pwm-cells = <3>;
622 reg = <0x48304200 0x80>;
623 ti,hwmods = "ehrpwm2";
624 status = "disabled";
625 };
626 };
627
1a39a65c
M		 628 mac: ethernet@4a100000 {
629 compatible = "ti,cpsw";
630 ti,hwmods = "cpgmac0";
631 cpdma_channels = <8>;
632 ale_entries = <1024>;
633 bd_ram_size = <0x2000>;
634 no_bd_ram = <0>;
635 rx_descs = <64>;
636 mac_control = <0x20>;
637 slaves = <2>;
e86ac13b 638 active_slave = <0>;
1a39a65c
M		 639 cpts_clock_mult = <0x80000000>;
640 cpts_clock_shift = <29>;
641 reg = <0x4a100000 0x800
642 0x4a101200 0x100>;
643 #address-cells = <1>;
644 #size-cells = <1>;
645 interrupt-parent = <&intc>;
646 /*
647 * c0_rx_thresh_pend
648 * c0_rx_pend
649 * c0_tx_pend
650 * c0_misc_pend
651 */
652 interrupts = <40 41 42 43>;
653 ranges;
654
655 davinci_mdio: mdio@4a101000 {
656 compatible = "ti,davinci_mdio";
657 #address-cells = <1>;
658 #size-cells = <0>;
659 ti,hwmods = "davinci_mdio";
660 bus_freq = <1000000>;
661 reg = <0x4a101000 0x100>;
662 };
663
664 cpsw_emac0: slave@4a100200 {
665 /* Filled in by U-Boot */
666 mac-address = [ 00 00 00 00 00 00 ];
667 };
668
669 cpsw_emac1: slave@4a100300 {
670 /* Filled in by U-Boot */
671 mac-address = [ 00 00 00 00 00 00 ];
672 };
1a39a65c 673 };
f6575c90
VB		 674
675 ocmcram: ocmcram@40300000 {
676 compatible = "ti,am3352-ocmcram";
677 reg = <0x40300000 0x10000>;
678 ti,hwmods = "ocmcram";
f6575c90
VB		 679 };
680
681 wkup_m3: wkup_m3@44d00000 {
682 compatible = "ti,am3353-wkup-m3";
683 reg = <0x44d00000 0x4000 /* M3 UMEM */
684 0x44d80000 0x2000>; /* M3 DMEM */
685 ti,hwmods = "wkup_m3";
f12ecbe2 686 ti,no-reset-on-init;
f6575c90 687 };
e45879ec 688
15e8246b
PA		 689 elm: elm@48080000 {
690 compatible = "ti,am3352-elm";
691 reg = <0x48080000 0x2000>;
692 interrupts = <4>;
693 ti,hwmods = "elm";
d6cfc1e2
BP		 694 status = "disabled";
695 };
696
697 lcdc: lcdc@4830e000 {
698 compatible = "ti,am33xx-tilcdc";
699 reg = <0x4830e000 0x1000>;
700 interrupt-parent = <&intc>;
701 interrupts = <36>;
702 ti,hwmods = "lcdc";
15e8246b
PA		 703 status = "disabled";
704 };
705
a82279dd
PR		 706 tscadc: tscadc@44e0d000 {
707 compatible = "ti,am3359-tscadc";
708 reg = <0x44e0d000 0x1000>;
709 interrupt-parent = <&intc>;
710 interrupts = <16>;
711 ti,hwmods = "adc_tsc";
712 status = "disabled";
713
714 tsc {
715 compatible = "ti,am3359-tsc";
716 };
717 am335x_adc: adc {
718 #io-channel-cells = <1>;
719 compatible = "ti,am3359-adc";
720 };
a82279dd
PR		 721 };
722
e45879ec
PA		 723 gpmc: gpmc@50000000 {
724 compatible = "ti,am3352-gpmc";
725 ti,hwmods = "gpmc";
f12ecbe2 726 ti,no-idle-on-init;
e45879ec
PA		 727 reg = <0x50000000 0x2000>;
728 interrupts = <100>;
00dddcaa
LP		 729 gpmc,num-cs = <7>;
730 gpmc,num-waitpins = <2>;
e45879ec
PA		 731 #address-cells = <2>;
732 #size-cells = <1>;
733 status = "disabled";
734 };
f8302e1e
MG		 735
736 sham: sham@53100000 {
737 compatible = "ti,omap4-sham";
738 ti,hwmods = "sham";
739 reg = <0x53100000 0x200>;
740 interrupts = <109>;
741 dmas = <&edma 36>;
742 dma-names = "rx";
743 };
99919e5e
MG		 744
745 aes: aes@53500000 {
746 compatible = "ti,omap4-aes";
747 ti,hwmods = "aes";
748 reg = <0x53500000 0xa0>;
7af8884a 749 interrupts = <103>;
99919e5e
MG		 750 dmas = <&edma 6>,
751 <&edma 5>;
752 dma-names = "tx", "rx";
753 };
3f72f875
PA		 754
755 mcasp0: mcasp@48038000 {
756 compatible = "ti,am33xx-mcasp-audio";
757 ti,hwmods = "mcasp0";
0bee55ab
JS		 758 reg = <0x48038000 0x2000>,
759 <0x46000000 0x400000>;
760 reg-names = "mpu", "dat";
3f72f875
PA		 761 interrupts = <80>, <81>;
762 interrupts-names = "tx", "rx";
763 status = "disabled";
764 dmas = <&edma 8>,
765 <&edma 9>;
766 dma-names = "tx", "rx";
767 };
768
769 mcasp1: mcasp@4803C000 {
770 compatible = "ti,am33xx-mcasp-audio";
771 ti,hwmods = "mcasp1";
0bee55ab
JS		 772 reg = <0x4803C000 0x2000>,
773 <0x46400000 0x400000>;
774 reg-names = "mpu", "dat";
3f72f875
PA		 775 interrupts = <82>, <83>;
776 interrupts-names = "tx", "rx";
777 status = "disabled";
778 dmas = <&edma 10>,
779 <&edma 11>;
780 dma-names = "tx", "rx";
781 };
5fc0b42a
AC		 782 };
783};
Linux kernel - Deliverables
This page took 0.199278 seconds and 5 git commands to generate.