projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| a0158185 TL |
1 | /* |
| 2 | * Device Tree Source for am3517 SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public License | |
| 7 | * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | * kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| 11 | #include "omap3.dtsi" | |
| 12 | ||
| 13 | / { | |
| 14 | aliases { | |
| 15 | serial3 = &uart4; | |
| 16 | }; | |
| 17 | ||
| f515f814 | 18 | ocp@68000000 { |
| a0158185 TL |
19 | am35x_otg_hs: am35x_otg_hs@5c040000 { |
| 20 | compatible = "ti,omap3-musb"; | |
| 21 | ti,hwmods = "am35x_otg_hs"; | |
| 22 | status = "disabled"; | |
| 23 | reg = <0x5c040000 0x1000>; | |
| 24 | interrupts = <71>; | |
| 25 | interrupt-names = "mc"; | |
| 26 | }; | |
| 27 | ||
| 28 | davinci_emac: ethernet@0x5c000000 { | |
| 29 | compatible = "ti,am3517-emac"; | |
| 30 | ti,hwmods = "davinci_emac"; | |
| 31 | status = "disabled"; | |
| 32 | reg = <0x5c000000 0x30000>; | |
| 33 | interrupts = <67 68 69 70>; | |
| b8845074 | 34 | syscon = <&scm_conf>; |
| a0158185 TL |
35 | ti,davinci-ctrl-reg-offset = <0x10000>; |
| 36 | ti,davinci-ctrl-mod-reg-offset = <0>; | |
| 37 | ti,davinci-ctrl-ram-offset = <0x20000>; | |
| 38 | ti,davinci-ctrl-ram-size = <0x2000>; | |
| 39 | ti,davinci-rmii-en = /bits/ 8 <1>; | |
| 40 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
| 41 | }; | |
| 42 | ||
| 43 | davinci_mdio: ethernet@0x5c030000 { | |
| 44 | compatible = "ti,davinci_mdio"; | |
| 45 | ti,hwmods = "davinci_mdio"; | |
| 46 | status = "disabled"; | |
| 47 | reg = <0x5c030000 0x1000>; | |
| 48 | bus_freq = <1000000>; | |
| 49 | #address-cells = <1>; | |
| 50 | #size-cells = <0>; | |
| 51 | }; | |
| 52 | ||
| 53 | uart4: serial@4809e000 { | |
| 54 | compatible = "ti,omap3-uart"; | |
| 55 | ti,hwmods = "uart4"; | |
| 56 | status = "disabled"; | |
| 57 | reg = <0x4809e000 0x400>; | |
| 58 | interrupts = <84>; | |
| 59 | dmas = <&sdma 55 &sdma 54>; | |
| 60 | dma-names = "tx", "rx"; | |
| 61 | clock-frequency = <48000000>; | |
| 62 | }; | |
| 32ace039 AS |
63 | |
| 64 | omap3_pmx_core2: pinmux@480025d8 { | |
| 65 | compatible = "ti,omap3-padconf", "pinctrl-single"; | |
| 66 | reg = <0x480025d8 0x24>; | |
| 67 | #address-cells = <1>; | |
| 68 | #size-cells = <0>; | |
| 69 | #interrupt-cells = <1>; | |
| 70 | interrupt-controller; | |
| 71 | pinctrl-single,register-width = <16>; | |
| 72 | pinctrl-single,function-mask = <0xff1f>; | |
| 73 | }; | |
| a0158185 TL |
74 | }; |
| 75 | }; | |
| fdff8a1f | 76 | |
| 4c051603 SA |
77 | &iva { |
| 78 | status = "disabled"; | |
| 79 | }; | |
| 80 | ||
| 81 | &mailbox { | |
| 82 | status = "disabled"; | |
| 83 | }; | |
| 84 | ||
| 85 | &mmu_isp { | |
| 86 | status = "disabled"; | |
| 87 | }; | |
| 88 | ||
| 89 | &smartreflex_mpu_iva { | |
| 90 | status = "disabled"; | |
| 91 | }; | |
| 92 | ||
| fdff8a1f TK |
93 | /include/ "am35xx-clocks.dtsi" |
| 94 | /include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" |