[deliverable/linux.git] / arch / arm / boot / dts / armada-xp-synology-ds414.dts

/*
 * Device Tree file for Synology DS414
 *
 * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 *
 * Note: this Device Tree assumes that the bootloader has remapped the
 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
 * bootloaders provided by Marvell. It is used in recent versions of
 * DSM software provided by Synology. Nonetheless, some earlier boards
 * were delivered with an older version of u-boot that left internal
 * registers mapped at 0xd0000000. If you have such a device you will
 * not be able to directly boot a kernel based on this Device Tree. In
 * that case, the preferred solution is to update your bootloader (e.g.
 * by upgrading to latest version of DSM, or building a new one and
 * installing it from u-boot prompt) or adjust the Devive Tree
 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
 */

/dts-v1/;

#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "armada-xp-mv78230.dtsi"

/ {
	model = "Synology DS414";
	compatible = "synology,ds414", "marvell,armadaxp-mv78230",
		     "marvell,armadaxp", "marvell,armada-370-xp";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory {
		device_type = "memory";
		reg = <0 0x00000000 0 0x40000000>; /* 1GB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;

		pcie-controller {
			status = "okay";

			/*
			 * Connected to Marvell 88SX7042 SATA-II controller
			 * handling the four disks.
			 */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			/*
			 * Connected to EtronTech EJ168A XHCI controller
			 * providing the two rear USB 3.0 ports.
			 */
			pcie@5,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
		};

		internal-regs {

			/* RTC is provided by Seiko S-35390A below */
			rtc@10300 {
				status = "disabled";
			};

			i2c@11000 {
				clock-frequency = <400000>;
				status = "okay";

				s35390a: s35390a@30 {
					 compatible = "sii,s35390a";
					 reg = <0x30>;
				};
			};

			/* Connected to a header on device's PCB. This
			 * provides the main console for the device.
			 *
			 * Warning: the device may not boot with a 3.3V
			 * USB-serial converter connected when the power
			 * button is pressed. The converter needs to be
			 * connected a few seconds after pressing the
			 * power button. This is possibly due to UART0_TXD
			 * pin being sampled at reset (bit 0 of SAR).
			 */
			serial@12000 {
				status = "okay";
			};

			/* Connected to a Microchip PIC16F883 for power control */
			serial@12100 {
				status = "okay";
			};

			poweroff@12100 {
				compatible = "synology,power-off";
				reg = <0x12100 0x100>;
				clocks = <&coreclk 0>;
			};

			/* Front USB 2.0 port */
			usb@50000 {
				status = "okay";
			};

			mdio {
				phy0: ethernet-phy@0 { /* Marvell 88E1512 */
					reg = <0>;
				};

				phy1: ethernet-phy@1 { /* Marvell 88E1512 */
					reg = <1>;
				};
			};

			ethernet@70000 {
				status = "okay";
				pinctrl-0 = <&ge0_rgmii_pins>;
				pinctrl-names = "default";
				phy = <&phy1>;
				phy-mode = "rgmii-id";
			};

			ethernet@74000 {
				pinctrl-0 = <&ge1_rgmii_pins>;
				pinctrl-names = "default";
				status = "okay";
				phy = <&phy0>;
				phy-mode = "rgmii-id";
			};
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
			     &sata3_pwr_pin &sata4_pwr_pin>;
		pinctrl-names = "default";

		sata1_regulator: sata1-regulator {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "SATA1 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <2000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
		};

		sata2_regulator: sata2-regulator {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "SATA2 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <4000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
		};

		sata3_regulator: sata3-regulator {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "SATA3 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <6000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
		};

		sata4_regulator: sata4-regulator {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "SATA4 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <8000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
		};
	};
};

&pinctrl {
	sata1_pwr_pin: sata1-pwr-pin {
		marvell,pins = "mpp42";
		marvell,function = "gpio";
	};

	sata2_pwr_pin: sata2-pwr-pin {
		marvell,pins = "mpp44";
		marvell,function = "gpio";
	};

	sata3_pwr_pin: sata3-pwr-pin {
		marvell,pins = "mpp45";
		marvell,function = "gpio";
	};

	sata4_pwr_pin: sata4-pwr-pin {
		marvell,pins = "mpp46";
		marvell,function = "gpio";
	};

	sata1_pres_pin: sata1-pres-pin {
		marvell,pins = "mpp34";
		marvell,function = "gpio";
	};

	sata2_pres_pin: sata2-pres-pin {
		marvell,pins = "mpp35";
		marvell,function = "gpio";
	};

	sata3_pres_pin: sata3-pres-pin {
		marvell,pins = "mpp40";
		marvell,function = "gpio";
	};

	sata4_pres_pin: sata4-pres-pin {
		marvell,pins = "mpp41";
		marvell,function = "gpio";
	};

	syno_id_bit0_pin: syno-id-bit0-pin {
		marvell,pins = "mpp26";
		marvell,function = "gpio";
	};

	syno_id_bit1_pin: syno-id-bit1-pin {
		marvell,pins = "mpp28";
		marvell,function = "gpio";
	};

	syno_id_bit2_pin: syno-id-bit2-pin {
		marvell,pins = "mpp29";
		marvell,function = "gpio";
	};

	fan1_alarm_pin: fan1-alarm-pin {
		marvell,pins = "mpp33";
		marvell,function = "gpio";
	};

	fan2_alarm_pin: fan2-alarm-pin {
		marvell,pins = "mpp32";
		marvell,function = "gpio";
	};
};

&spi0 {
	status = "okay";

	spi-flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "micron,n25q064", "jedec,spi-nor";
		reg = <0>; /* Chip select 0 */
		spi-max-frequency = <20000000>;

		/*
		 * Warning!
		 *
		 * Synology u-boot uses its compiled-in environment
		 * and it seems Synology did not care to change u-boot
		 * default configuration in order to allow saving a
		 * modified environment at a sensible location. So,
		 * if you do a 'saveenv' under u-boot, your modified
		 * environment will be saved at 1MB after the start
		 * of the flash, i.e. in the middle of the uImage.
		 * For that reason, it is strongly advised not to
		 * change the default environment, unless you know
		 * what you are doing.
		 */
		partition@00000000 { /* u-boot */
			label = "RedBoot";
			reg = <0x00000000 0x000d0000>; /* 832KB */
		};

		partition@000c0000 { /* uImage */
			label = "zImage";
			reg = <0x000d0000 0x002d0000>; /* 2880KB */
		};

		partition@003a0000 { /* uInitramfs */
			label = "rd.gz";
			reg = <0x003a0000 0x00430000>; /* 4250KB */
		};

		partition@007d0000 { /* MAC address and serial number */
			label = "vendor";
			reg = <0x007d0000 0x00010000>; /* 64KB */
		};

		partition@007e0000 {
			label = "RedBoot config";
			reg = <0x007e0000 0x00010000>; /* 64KB */
		};

		partition@007f0000 {
			label = "FIS directory";
			reg = <0x007f0000 0x00010000>; /* 64KB */
		};
	};
};
Commit	Line	Data
389c74aa AE	1	/*
	2	* Device Tree file for Synology DS414
	3	*
	4	* Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
	5	*
3c21b5fa GC	6	* This file is dual-licensed: you can use it either under the terms
	7	* of the GPL or the X11 license, at your option. Note that this dual
	8	* licensing only applies to this file, and not this project as a
	9	* whole.
	10	*
	11	* a) This file is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of the
	14	* License, or (at your option) any later version.
	15	*
	16	* This file is distributed in the hope that it will be useful
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* Or, alternatively
	22	*
	23	* b) Permission is hereby granted, free of charge, to any person
	24	* obtaining a copy of this software and associated documentation
	25	* files (the "Software"), to deal in the Software without
	26	* restriction, including without limitation the rights to use
	27	* copy, modify, merge, publish, distribute, sublicense, and/or
	28	* sell copies of the Software, and to permit persons to whom the
	29	* Software is furnished to do so, subject to the following
	30	* conditions:
	31	*
	32	* The above copyright notice and this permission notice shall be
	33	* included in all copies or substantial portions of the Software.
	34	*
	35	* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
	36	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	37	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	38	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	39	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
	40	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	41	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	42	* OTHER DEALINGS IN THE SOFTWARE.
389c74aa AE	43	*
	44	* Note: this Device Tree assumes that the bootloader has remapped the
	45	* internal registers to 0xf1000000 (instead of the old 0xd0000000).
	46	* The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
	47	* bootloaders provided by Marvell. It is used in recent versions of
	48	* DSM software provided by Synology. Nonetheless, some earlier boards
	49	* were delivered with an older version of u-boot that left internal
	50	* registers mapped at 0xd0000000. If you have such a device you will
	51	* not be able to directly boot a kernel based on this Device Tree. In
	52	* that case, the preferred solution is to update your bootloader (e.g.
	53	* by upgrading to latest version of DSM, or building a new one and
	54	* installing it from u-boot prompt) or adjust the Devive Tree
	55	* (s/0xf1000000/0xd0000000/ in 'ranges' below).
	56	*/
	57
	58	/dts-v1/;
	59
	60	#include <dt-bindings/input/input.h>
	61	#include <dt-bindings/gpio/gpio.h>
	62	#include "armada-xp-mv78230.dtsi"
	63
	64	/ {
	65	model = "Synology DS414";
	66	compatible = "synology,ds414", "marvell,armadaxp-mv78230",
	67	"marvell,armadaxp", "marvell,armada-370-xp";
	68
	69	chosen {
9552203c	70	stdout-path = "serial0:115200n8";
389c74aa AE	71	};
	72
	73	memory {
	74	device_type = "memory";
	75	reg = <0 0x00000000 0 0x40000000>; /* 1GB */
	76	};
	77
	78	soc {
	79	ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
c466d997	80	MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
d7d5a43c TP	81	MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
d7d5a43c TP	82	MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
389c74aa AE	83
	84	pcie-controller {
	85	status = "okay";
	86
	87	/*
	88	* Connected to Marvell 88SX7042 SATA-II controller
	89	* handling the four disks.
	90	*/
	91	pcie@1,0 {
	92	/* Port 0, Lane 0 */
	93	status = "okay";
	94	};
	95
	96	/*
	97	* Connected to EtronTech EJ168A XHCI controller
	98	* providing the two rear USB 3.0 ports.
	99	*/
	100	pcie@5,0 {
	101	/* Port 1, Lane 0 */
	102	status = "okay";
	103	};
	104	};
	105
	106	internal-regs {
	107
	108	/* RTC is provided by Seiko S-35390A below */
	109	rtc@10300 {
	110	status = "disabled";
	111	};
	112
389c74aa AE	113	i2c@11000 {
	114	clock-frequency = <400000>;
	115	status = "okay";
	116
	117	s35390a: s35390a@30 {
	118	compatible = "sii,s35390a";
	119	reg = <0x30>;
	120	};
	121	};
	122
	123	/* Connected to a header on device's PCB. This
	124	* provides the main console for the device.
	125	*
	126	* Warning: the device may not boot with a 3.3V
	127	* USB-serial converter connected when the power
	128	* button is pressed. The converter needs to be
	129	* connected a few seconds after pressing the
	130	* power button. This is possibly due to UART0_TXD
	131	* pin being sampled at reset (bit 0 of SAR).
	132	*/
	133	serial@12000 {
	134	status = "okay";
	135	};
	136
	137	/* Connected to a Microchip PIC16F883 for power control */
	138	serial@12100 {
	139	status = "okay";
	140	};
	141
	142	poweroff@12100 {
	143	compatible = "synology,power-off";
	144	reg = <0x12100 0x100>;
	145	clocks = <&coreclk 0>;
	146	};
	147
	148	/* Front USB 2.0 port */
	149	usb@50000 {
	150	status = "okay";
	151	};
	152
	153	mdio {
	154	phy0: ethernet-phy@0 { /* Marvell 88E1512 */
	155	reg = <0>;
	156	};
	157
	158	phy1: ethernet-phy@1 { /* Marvell 88E1512 */
	159	reg = <1>;
	160	};
	161	};
	162
	163	ethernet@70000 {
	164	status = "okay";
70ee4e9d	165	pinctrl-0 = <&ge0_rgmii_pins>;
389c74aa AE	166	pinctrl-names = "default";
	167	phy = <&phy1>;
	168	phy-mode = "rgmii-id";
	169	};
	170
	171	ethernet@74000 {
70ee4e9d	172	pinctrl-0 = <&ge1_rgmii_pins>;
389c74aa AE	173	pinctrl-names = "default";
	174	status = "okay";
	175	phy = <&phy0>;
	176	phy-mode = "rgmii-id";
	177	};
	178	};
	179	};
	180
	181	regulators {
	182	compatible = "simple-bus";
	183	#address-cells = <1>;
	184	#size-cells = <0>;
	185	pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
	186	&sata3_pwr_pin &sata4_pwr_pin>;
	187	pinctrl-names = "default";
	188
	189	sata1_regulator: sata1-regulator {
	190	compatible = "regulator-fixed";
	191	reg = <1>;
	192	regulator-name = "SATA1 Power";
	193	regulator-min-microvolt = <5000000>;
	194	regulator-max-microvolt = <5000000>;
	195	startup-delay-us = <2000000>;
	196	enable-active-high;
	197	regulator-always-on;
	198	regulator-boot-on;
	199	gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
	200	};
	201
	202	sata2_regulator: sata2-regulator {
	203	compatible = "regulator-fixed";
	204	reg = <2>;
	205	regulator-name = "SATA2 Power";
	206	regulator-min-microvolt = <5000000>;
	207	regulator-max-microvolt = <5000000>;
	208	startup-delay-us = <4000000>;
	209	enable-active-high;
	210	regulator-always-on;
	211	regulator-boot-on;
	212	gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
	213	};
	214
	215	sata3_regulator: sata3-regulator {
	216	compatible = "regulator-fixed";
	217	reg = <3>;
	218	regulator-name = "SATA3 Power";
	219	regulator-min-microvolt = <5000000>;
	220	regulator-max-microvolt = <5000000>;
	221	startup-delay-us = <6000000>;
	222	enable-active-high;
	223	regulator-always-on;
	224	regulator-boot-on;
	225	gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
	226	};
	227
	228	sata4_regulator: sata4-regulator {
	229	compatible = "regulator-fixed";
	230	reg = <4>;
	231	regulator-name = "SATA4 Power";
	232	regulator-min-microvolt = <5000000>;
	233	regulator-max-microvolt = <5000000>;
	234	startup-delay-us = <8000000>;
	235	enable-active-high;
	236	regulator-always-on;
237	regulator-boot-on;
238	gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
239	};
240	};
241	};
242
243	&pinctrl {
244	sata1_pwr_pin: sata1-pwr-pin {
245	marvell,pins = "mpp42";
246	marvell,function = "gpio";
247	};
248
249	sata2_pwr_pin: sata2-pwr-pin {
250	marvell,pins = "mpp44";
251	marvell,function = "gpio";
252	};
253
254	sata3_pwr_pin: sata3-pwr-pin {
255	marvell,pins = "mpp45";
256	marvell,function = "gpio";
257	};
258
259	sata4_pwr_pin: sata4-pwr-pin {
260	marvell,pins = "mpp46";
261	marvell,function = "gpio";
262	};
263
264	sata1_pres_pin: sata1-pres-pin {
265	marvell,pins = "mpp34";
266	marvell,function = "gpio";
267	};
268
269	sata2_pres_pin: sata2-pres-pin {
270	marvell,pins = "mpp35";
271	marvell,function = "gpio";
272	};
273
274	sata3_pres_pin: sata3-pres-pin {
275	marvell,pins = "mpp40";
276	marvell,function = "gpio";
277	};
278
279	sata4_pres_pin: sata4-pres-pin {
280	marvell,pins = "mpp41";
281	marvell,function = "gpio";
282	};
283
284	syno_id_bit0_pin: syno-id-bit0-pin {
285	marvell,pins = "mpp26";
286	marvell,function = "gpio";
287	};
288
a02fe645	289	syno_id_bit1_pin: syno-id-bit1-pin {
389c74aa AE	290	marvell,pins = "mpp28";
	291	marvell,function = "gpio";
	292	};
	293
a02fe645	294	syno_id_bit2_pin: syno-id-bit2-pin {
389c74aa AE	295	marvell,pins = "mpp29";
	296	marvell,function = "gpio";
	297	};
	298
a02fe645	299	fan1_alarm_pin: fan1-alarm-pin {
389c74aa AE	300	marvell,pins = "mpp33";
	301	marvell,function = "gpio";
	302	};
	303
	304	fan2_alarm_pin: fan2-alarm-pin {
	305	marvell,pins = "mpp32";
	306	marvell,function = "gpio";
	307	};
	308	};
0160a4b6 SR	309
	310	&spi0 {
	311	status = "okay";
	312
	313	spi-flash@0 {
	314	#address-cells = <1>;
	315	#size-cells = <1>;
	316	compatible = "micron,n25q064", "jedec,spi-nor";
	317	reg = <0>; /* Chip select 0 */
	318	spi-max-frequency = <20000000>;
	319
	320	/*
	321	* Warning!
	322	*
	323	* Synology u-boot uses its compiled-in environment
	324	* and it seems Synology did not care to change u-boot
	325	* default configuration in order to allow saving a
	326	* modified environment at a sensible location. So,
	327	* if you do a 'saveenv' under u-boot, your modified
	328	* environment will be saved at 1MB after the start
	329	* of the flash, i.e. in the middle of the uImage.
	330	* For that reason, it is strongly advised not to
	331	* change the default environment, unless you know
	332	* what you are doing.
	333	*/
	334	partition@00000000 { /* u-boot */
	335	label = "RedBoot";
	336	reg = <0x00000000 0x000d0000>; /* 832KB */
	337	};
	338
	339	partition@000c0000 { /* uImage */
	340	label = "zImage";
	341	reg = <0x000d0000 0x002d0000>; /* 2880KB */
	342	};
	343
	344	partition@003a0000 { /* uInitramfs */
	345	label = "rd.gz";
	346	reg = <0x003a0000 0x00430000>; /* 4250KB */
	347	};
	348
	349	partition@007d0000 { /* MAC address and serial number */
	350	label = "vendor";
	351	reg = <0x007d0000 0x00010000>; /* 64KB */
	352	};
	353
	354	partition@007e0000 {
	355	label = "RedBoot config";
	356	reg = <0x007e0000 0x00010000>; /* 64KB */
	357	};
	358
	359	partition@007f0000 {
	360	label = "FIS directory";
	361	reg = <0x007f0000 0x00010000>; /* 64KB */
	362	};
	363	};
	364	};