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Merge remote-tracking branch 'mmc-uh/next'
[deliverable/linux.git] / arch / arm / boot / dts / exynos4.dtsi
CommitLineData
b571abb3
TF		 1/*
2 * Samsung's Exynos4 SoC series common device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
10 * SoCs from Exynos4 series can include this file and provide values for SoCs
11 * specfic bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
1c75a78a 22#include <dt-bindings/clock/exynos4.h>
990a7bfd 23#include <dt-bindings/clock/exynos-audss-clk.h>
1462b137 24#include "exynos-syscon-restart.dtsi"
b571abb3
TF		 25
26/ {
27 interrupt-parent = <&gic>;
1354835a
JMC		 28 #address-cells = <1>;
29 #size-cells = <1>;
b571abb3
TF		 30
31 aliases {
32 spi0 = &spi_0;
33 spi1 = &spi_1;
34 spi2 = &spi_2;
34db4990
DA		 35 i2c0 = &i2c_0;
36 i2c1 = &i2c_1;
37 i2c2 = &i2c_2;
38 i2c3 = &i2c_3;
39 i2c4 = &i2c_4;
40 i2c5 = &i2c_5;
41 i2c6 = &i2c_6;
42 i2c7 = &i2c_7;
ed80d4ca 43 i2c8 = &i2c_8;
d1b8a41d
SN		 44 csis0 = &csis_0;
45 csis1 = &csis_1;
46 fimc0 = &fimc_0;
47 fimc1 = &fimc_1;
48 fimc2 = &fimc_2;
49 fimc3 = &fimc_3;
1e64f48e
TF		 50 serial0 = &serial_0;
51 serial1 = &serial_1;
52 serial2 = &serial_2;
53 serial3 = &serial_3;
b571abb3
TF		 54 };
55
990a7bfd
SN		 56 clock_audss: clock-controller@03810000 {
57 compatible = "samsung,exynos4210-audss-clock";
58 reg = <0x03810000 0x0C>;
59 #clock-cells = <1>;
60 };
61
62 i2s0: i2s@03830000 {
63 compatible = "samsung,s5pv210-i2s";
64 reg = <0x03830000 0x100>;
65 clocks = <&clock_audss EXYNOS_I2S_BUS>;
66 clock-names = "iis";
3635acef
SN		 67 #clock-cells = <1>;
68 clock-output-names = "i2s_cdclk0";
990a7bfd
SN		 69 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
70 dma-names = "tx", "rx", "tx-sec";
71 samsung,idma-addr = <0x03000000>;
16696337 72 #sound-dai-cells = <1>;
990a7bfd
SN		 73 status = "disabled";
74 };
75
096ee6ad
TA		 76 chipid@10000000 {
77 compatible = "samsung,exynos4210-chipid";
78 reg = <0x10000000 0x100>;
79 };
80
4d7820b0
PD		 81 memory-controller@12570000 {
82 compatible = "samsung,exynos4210-srom";
df4400ac
PD		 83 reg = <0x12570000 0x14>;
84 };
85
72c4b2b6 86 mipi_phy: video-phy {
21b190d2 87 compatible = "samsung,s5pv210-mipi-video-phy";
21b190d2 88 #phy-cells = <1>;
c8ef0bee 89 syscon = <&pmu_system_controller>;
21b190d2
SN		 90 };
91
91d88f03
TF		 92 pd_mfc: mfc-power-domain@10023C40 {
93 compatible = "samsung,exynos4210-pd";
94 reg = <0x10023C40 0x20>;
0da65870 95 #power-domain-cells = <0>;
91d88f03
TF		 96 };
97
98 pd_g3d: g3d-power-domain@10023C60 {
99 compatible = "samsung,exynos4210-pd";
100 reg = <0x10023C60 0x20>;
0da65870 101 #power-domain-cells = <0>;
91d88f03
TF		 102 };
103
104 pd_lcd0: lcd0-power-domain@10023C80 {
105 compatible = "samsung,exynos4210-pd";
106 reg = <0x10023C80 0x20>;
0da65870 107 #power-domain-cells = <0>;
91d88f03
TF		 108 };
109
110 pd_tv: tv-power-domain@10023C20 {
111 compatible = "samsung,exynos4210-pd";
112 reg = <0x10023C20 0x20>;
0da65870 113 #power-domain-cells = <0>;
ec459c0c 114 power-domains = <&pd_lcd0>;
91d88f03
TF		 115 };
116
117 pd_cam: cam-power-domain@10023C00 {
118 compatible = "samsung,exynos4210-pd";
119 reg = <0x10023C00 0x20>;
0da65870 120 #power-domain-cells = <0>;
91d88f03
TF		 121 };
122
123 pd_gps: gps-power-domain@10023CE0 {
124 compatible = "samsung,exynos4210-pd";
125 reg = <0x10023CE0 0x20>;
0da65870 126 #power-domain-cells = <0>;
b571abb3
TF		 127 };
128
10ea1f18
CC		 129 pd_gps_alive: gps-alive-power-domain@10023D00 {
130 compatible = "samsung,exynos4210-pd";
131 reg = <0x10023D00 0x20>;
0da65870 132 #power-domain-cells = <0>;
10ea1f18
CC		 133 };
134
0572b725 135 gic: interrupt-controller@10490000 {
b571abb3
TF		 136 compatible = "arm,cortex-a9-gic";
137 #interrupt-cells = <3>;
138 interrupt-controller;
cf286b40 139 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
b571abb3
TF		 140 };
141
0572b725 142 combiner: interrupt-controller@10440000 {
b571abb3
TF		 143 compatible = "samsung,exynos4210-combiner";
144 #interrupt-cells = <2>;
145 interrupt-controller;
146 reg = <0x10440000 0x1000>;
147 };
148
6f4b82a3
CP		 149 pmu {
150 compatible = "arm,cortex-a9-pmu";
151 interrupt-parent = <&combiner>;
152 interrupts = <2 2>, <3 2>;
153 };
154
9f052d0c 155 sys_reg: syscon@10010000 {
a64b1b22
SN		 156 compatible = "samsung,exynos4-sysreg", "syscon";
157 reg = <0x10010000 0x400>;
158 };
159
7b9613ac
CP		 160 pmu_system_controller: system-controller@10020000 {
161 compatible = "samsung,exynos4210-pmu", "syscon";
162 reg = <0x10020000 0x4000>;
8b283c02
MZ		 163 interrupt-controller;
164 #interrupt-cells = <3>;
165 interrupt-parent = <&gic>;
7b9613ac
CP		 166 };
167
8b7dd64c
AH		 168 dsi_0: dsi@11C80000 {
169 compatible = "samsung,exynos4210-mipi-dsi";
170 reg = <0x11C80000 0x10000>;
171 interrupts = <0 79 0>;
0da65870 172 power-domains = <&pd_lcd0>;
8b7dd64c
AH		 173 phys = <&mipi_phy 1>;
174 phy-names = "dsim";
c8366bac 175 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
4f01e650 176 clock-names = "bus_clk", "sclk_mipi";
8b7dd64c
AH		 177 status = "disabled";
178 #address-cells = <1>;
179 #size-cells = <0>;
180 };
181
d1b8a41d
SN		 182 camera {
183 compatible = "samsung,fimc", "simple-bus";
184 status = "disabled";
185 #address-cells = <1>;
186 #size-cells = <1>;
ee5eda64
SN		 187 #clock-cells = <1>;
188 clock-output-names = "cam_a_clkout", "cam_b_clkout";
d1b8a41d
SN		 189 ranges;
190
d1b8a41d
SN		 191 fimc_0: fimc@11800000 {
192 compatible = "samsung,exynos4210-fimc";
193 reg = <0x11800000 0x1000>;
194 interrupts = <0 84 0>;
1c75a78a 195 clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
d1b8a41d 196 clock-names = "fimc", "sclk_fimc";
0da65870 197 power-domains = <&pd_cam>;
d1b8a41d 198 samsung,sysreg = <&sys_reg>;
71d3a9fb 199 iommus = <&sysmmu_fimc0>;
d1b8a41d
SN		 200 status = "disabled";
201 };
202
203 fimc_1: fimc@11810000 {
204 compatible = "samsung,exynos4210-fimc";
205 reg = <0x11810000 0x1000>;
206 interrupts = <0 85 0>;
1c75a78a 207 clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
d1b8a41d 208 clock-names = "fimc", "sclk_fimc";
0da65870 209 power-domains = <&pd_cam>;
d1b8a41d 210 samsung,sysreg = <&sys_reg>;
71d3a9fb 211 iommus = <&sysmmu_fimc1>;
d1b8a41d
SN		 212 status = "disabled";
213 };
214
215 fimc_2: fimc@11820000 {
216 compatible = "samsung,exynos4210-fimc";
217 reg = <0x11820000 0x1000>;
218 interrupts = <0 86 0>;
1c75a78a 219 clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
d1b8a41d 220 clock-names = "fimc", "sclk_fimc";
0da65870 221 power-domains = <&pd_cam>;
d1b8a41d 222 samsung,sysreg = <&sys_reg>;
71d3a9fb 223 iommus = <&sysmmu_fimc2>;
d1b8a41d
SN		 224 status = "disabled";
225 };
226
227 fimc_3: fimc@11830000 {
228 compatible = "samsung,exynos4210-fimc";
229 reg = <0x11830000 0x1000>;
230 interrupts = <0 87 0>;
1c75a78a 231 clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
d1b8a41d 232 clock-names = "fimc", "sclk_fimc";
0da65870 233 power-domains = <&pd_cam>;
d1b8a41d 234 samsung,sysreg = <&sys_reg>;
71d3a9fb 235 iommus = <&sysmmu_fimc3>;
d1b8a41d
SN		 236 status = "disabled";
237 };
238
239 csis_0: csis@11880000 {
240 compatible = "samsung,exynos4210-csis";
241 reg = <0x11880000 0x4000>;
242 interrupts = <0 78 0>;
1c75a78a 243 clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
d1b8a41d
SN		 244 clock-names = "csis", "sclk_csis";
245 bus-width = <4>;
0da65870 246 power-domains = <&pd_cam>;
21b190d2
SN		 247 phys = <&mipi_phy 0>;
248 phy-names = "csis";
d1b8a41d
SN		 249 status = "disabled";
250 #address-cells = <1>;
251 #size-cells = <0>;
252 };
253
254 csis_1: csis@11890000 {
255 compatible = "samsung,exynos4210-csis";
256 reg = <0x11890000 0x4000>;
257 interrupts = <0 80 0>;
1c75a78a 258 clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
d1b8a41d
SN		 259 clock-names = "csis", "sclk_csis";
260 bus-width = <2>;
0da65870 261 power-domains = <&pd_cam>;
21b190d2
SN		 262 phys = <&mipi_phy 2>;
263 phy-names = "csis";
d1b8a41d
SN		 264 status = "disabled";
265 #address-cells = <1>;
266 #size-cells = <0>;
267 };
268 };
269
9c41221e 270 watchdog: watchdog@10060000 {
b571abb3
TF		 271 compatible = "samsung,s3c2410-wdt";
272 reg = <0x10060000 0x100>;
273 interrupts = <0 43 0>;
1c75a78a 274 clocks = <&clock CLK_WDT>;
7ad34337 275 clock-names = "watchdog";
c9e23f00 276 status = "disabled";
b571abb3
TF		 277 };
278
ce9940a9 279 rtc: rtc@10070000 {
b571abb3
TF		 280 compatible = "samsung,s3c6410-rtc";
281 reg = <0x10070000 0x100>;
8b283c02 282 interrupt-parent = <&pmu_system_controller>;
b571abb3 283 interrupts = <0 44 0>, <0 45 0>;
1c75a78a 284 clocks = <&clock CLK_RTC>;
7ad34337 285 clock-names = "rtc";
c9e23f00 286 status = "disabled";
b571abb3
TF		 287 };
288
9c41221e 289 keypad: keypad@100A0000 {
b571abb3
TF		 290 compatible = "samsung,s5pv210-keypad";
291 reg = <0x100A0000 0x100>;
292 interrupts = <0 109 0>;
1c75a78a 293 clocks = <&clock CLK_KEYIF>;
7ad34337 294 clock-names = "keypad";
c9e23f00 295 status = "disabled";
b571abb3
TF		 296 };
297
9c41221e 298 sdhci_0: sdhci@12510000 {
b571abb3
TF		 299 compatible = "samsung,exynos4210-sdhci";
300 reg = <0x12510000 0x100>;
301 interrupts = <0 73 0>;
1c75a78a 302 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
7ad34337 303 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 304 status = "disabled";
b571abb3
TF		 305 };
306
9c41221e 307 sdhci_1: sdhci@12520000 {
b571abb3
TF		 308 compatible = "samsung,exynos4210-sdhci";
309 reg = <0x12520000 0x100>;
310 interrupts = <0 74 0>;
1c75a78a 311 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
7ad34337 312 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 313 status = "disabled";
b571abb3
TF		 314 };
315
9c41221e 316 sdhci_2: sdhci@12530000 {
b571abb3
TF		 317 compatible = "samsung,exynos4210-sdhci";
318 reg = <0x12530000 0x100>;
319 interrupts = <0 75 0>;
1c75a78a 320 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
7ad34337 321 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 322 status = "disabled";
b571abb3
TF		 323 };
324
9c41221e 325 sdhci_3: sdhci@12540000 {
b571abb3
TF		 326 compatible = "samsung,exynos4210-sdhci";
327 reg = <0x12540000 0x100>;
328 interrupts = <0 76 0>;
1c75a78a 329 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
7ad34337 330 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 331 status = "disabled";
26bbd41f
CP		 332 };
333
334 exynos_usbphy: exynos-usbphy@125B0000 {
335 compatible = "samsung,exynos4210-usb2-phy";
336 reg = <0x125B0000 0x100>;
337 samsung,pmureg-phandle = <&pmu_system_controller>;
338 clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
339 clock-names = "phy", "ref";
340 #phy-cells = <1>;
341 status = "disabled";
ef14d94c
CP		 342 };
343
9c41221e 344 hsotg: hsotg@12480000 {
ef14d94c
CP		 345 compatible = "samsung,s3c6400-hsotg";
346 reg = <0x12480000 0x20000>;
347 interrupts = <0 71 0>;
348 clocks = <&clock CLK_USB_DEVICE>;
349 clock-names = "otg";
350 phys = <&exynos_usbphy 0>;
351 phy-names = "usb2-phy";
352 status = "disabled";
b571abb3
TF		 353 };
354
9c41221e 355 ehci: ehci@12580000 {
6f9d02a0
DK		 356 compatible = "samsung,exynos4210-ehci";
357 reg = <0x12580000 0x100>;
358 interrupts = <0 70 0>;
1c75a78a 359 clocks = <&clock CLK_USB_HOST>;
6f9d02a0
DK		 360 clock-names = "usbhost";
361 status = "disabled";
366126d5
MS		 362 #address-cells = <1>;
363 #size-cells = <0>;
364 port@0 {
365 reg = <0>;
366 phys = <&exynos_usbphy 1>;
367 status = "disabled";
368 };
369 port@1 {
370 reg = <1>;
371 phys = <&exynos_usbphy 2>;
372 status = "disabled";
373 };
374 port@2 {
375 reg = <2>;
376 phys = <&exynos_usbphy 3>;
377 status = "disabled";
378 };
6f9d02a0
DK		 379 };
380
9c41221e 381 ohci: ohci@12590000 {
6f9d02a0
DK		 382 compatible = "samsung,exynos4210-ohci";
383 reg = <0x12590000 0x100>;
384 interrupts = <0 70 0>;
1c75a78a 385 clocks = <&clock CLK_USB_HOST>;
6f9d02a0
DK		 386 clock-names = "usbhost";
387 status = "disabled";
366126d5
MS		 388 #address-cells = <1>;
389 #size-cells = <0>;
390 port@0 {
391 reg = <0>;
392 phys = <&exynos_usbphy 1>;
393 status = "disabled";
394 };
6f9d02a0
DK		 395 };
396
990a7bfd 397 i2s1: i2s@13960000 {
fddcd300 398 compatible = "samsung,s3c6410-i2s";
990a7bfd
SN		 399 reg = <0x13960000 0x100>;
400 clocks = <&clock CLK_I2S1>;
401 clock-names = "iis";
3635acef
SN		 402 #clock-cells = <1>;
403 clock-output-names = "i2s_cdclk1";
990a7bfd
SN		 404 dmas = <&pdma1 12>, <&pdma1 11>;
405 dma-names = "tx", "rx";
16696337 406 #sound-dai-cells = <1>;
990a7bfd
SN		 407 status = "disabled";
408 };
409
410 i2s2: i2s@13970000 {
fddcd300 411 compatible = "samsung,s3c6410-i2s";
990a7bfd
SN		 412 reg = <0x13970000 0x100>;
413 clocks = <&clock CLK_I2S2>;
414 clock-names = "iis";
3635acef
SN		 415 #clock-cells = <1>;
416 clock-output-names = "i2s_cdclk2";
990a7bfd
SN		 417 dmas = <&pdma0 14>, <&pdma0 13>;
418 dma-names = "tx", "rx";
16696337 419 #sound-dai-cells = <1>;
990a7bfd
SN		 420 status = "disabled";
421 };
422
20901f74
SK		 423 mfc: codec@13400000 {
424 compatible = "samsung,mfc-v5";
425 reg = <0x13400000 0x10000>;
426 interrupts = <0 94 0>;
0da65870 427 power-domains = <&pd_mfc>;
e7160bfc
MS		 428 clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
429 clock-names = "mfc", "sclk_mfc";
71d3a9fb
MS		 430 iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>;
431 iommu-names = "left", "right";
20901f74
SK		 432 };
433
1e64f48e 434 serial_0: serial@13800000 {
b571abb3
TF		 435 compatible = "samsung,exynos4210-uart";
436 reg = <0x13800000 0x100>;
437 interrupts = <0 52 0>;
1c75a78a 438 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
7ad34337 439 clock-names = "uart", "clk_uart_baud0";
22374fbe
RB		 440 dmas = <&pdma0 15>, <&pdma0 16>;
441 dma-names = "rx", "tx";
c9e23f00 442 status = "disabled";
b571abb3
TF		 443 };
444
1e64f48e 445 serial_1: serial@13810000 {
b571abb3
TF		 446 compatible = "samsung,exynos4210-uart";
447 reg = <0x13810000 0x100>;
448 interrupts = <0 53 0>;
1c75a78a 449 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
7ad34337 450 clock-names = "uart", "clk_uart_baud0";
22374fbe
RB		 451 dmas = <&pdma1 15>, <&pdma1 16>;
452 dma-names = "rx", "tx";
c9e23f00 453 status = "disabled";
b571abb3
TF		 454 };
455
1e64f48e 456 serial_2: serial@13820000 {
b571abb3
TF		 457 compatible = "samsung,exynos4210-uart";
458 reg = <0x13820000 0x100>;
459 interrupts = <0 54 0>;
1c75a78a 460 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
7ad34337 461 clock-names = "uart", "clk_uart_baud0";
22374fbe
RB		 462 dmas = <&pdma0 17>, <&pdma0 18>;
463 dma-names = "rx", "tx";
c9e23f00 464 status = "disabled";
b571abb3
TF		 465 };
466
1e64f48e 467 serial_3: serial@13830000 {
b571abb3
TF		 468 compatible = "samsung,exynos4210-uart";
469 reg = <0x13830000 0x100>;
470 interrupts = <0 55 0>;
1c75a78a 471 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
7ad34337 472 clock-names = "uart", "clk_uart_baud0";
22374fbe
RB		 473 dmas = <&pdma1 17>, <&pdma1 18>;
474 dma-names = "rx", "tx";
c9e23f00 475 status = "disabled";
b571abb3
TF		 476 };
477
34db4990 478 i2c_0: i2c@13860000 {
1b198d56
TF		 479 #address-cells = <1>;
480 #size-cells = <0>;
b571abb3
TF		 481 compatible = "samsung,s3c2440-i2c";
482 reg = <0x13860000 0x100>;
483 interrupts = <0 58 0>;
1c75a78a 484 clocks = <&clock CLK_I2C0>;
7ad34337 485 clock-names = "i2c";
045c8f63
TA		 486 pinctrl-names = "default";
487 pinctrl-0 = <&i2c0_bus>;
c9e23f00 488 status = "disabled";
b571abb3
TF		 489 };
490
34db4990 491 i2c_1: i2c@13870000 {
1b198d56
TF		 492 #address-cells = <1>;
493 #size-cells = <0>;
b571abb3
TF		 494 compatible = "samsung,s3c2440-i2c";
495 reg = <0x13870000 0x100>;
496 interrupts = <0 59 0>;
1c75a78a 497 clocks = <&clock CLK_I2C1>;
7ad34337 498 clock-names = "i2c";
045c8f63
TA		 499 pinctrl-names = "default";
500 pinctrl-0 = <&i2c1_bus>;
c9e23f00 501 status = "disabled";
b571abb3
TF		 502 };
503
34db4990 504 i2c_2: i2c@13880000 {
1b198d56
TF		 505 #address-cells = <1>;
506 #size-cells = <0>;
b571abb3
TF		 507 compatible = "samsung,s3c2440-i2c";
508 reg = <0x13880000 0x100>;
509 interrupts = <0 60 0>;
1c75a78a 510 clocks = <&clock CLK_I2C2>;
7ad34337 511 clock-names = "i2c";
9c869d1f
TS		 512 pinctrl-names = "default";
513 pinctrl-0 = <&i2c2_bus>;
c9e23f00 514 status = "disabled";
b571abb3
TF		 515 };
516
34db4990 517 i2c_3: i2c@13890000 {
1b198d56
TF		 518 #address-cells = <1>;
519 #size-cells = <0>;
b571abb3
TF		 520 compatible = "samsung,s3c2440-i2c";
521 reg = <0x13890000 0x100>;
522 interrupts = <0 61 0>;
1c75a78a 523 clocks = <&clock CLK_I2C3>;
7ad34337 524 clock-names = "i2c";
9c869d1f
TS		 525 pinctrl-names = "default";
526 pinctrl-0 = <&i2c3_bus>;
c9e23f00 527 status = "disabled";
b571abb3
TF		 528 };
529
34db4990 530 i2c_4: i2c@138A0000 {
1b198d56
TF		 531 #address-cells = <1>;
532 #size-cells = <0>;
b571abb3
TF		 533 compatible = "samsung,s3c2440-i2c";
534 reg = <0x138A0000 0x100>;
535 interrupts = <0 62 0>;
1c75a78a 536 clocks = <&clock CLK_I2C4>;
7ad34337 537 clock-names = "i2c";
9c869d1f
TS		 538 pinctrl-names = "default";
539 pinctrl-0 = <&i2c4_bus>;
c9e23f00 540 status = "disabled";
b571abb3
TF		 541 };
542
34db4990 543 i2c_5: i2c@138B0000 {
1b198d56
TF		 544 #address-cells = <1>;
545 #size-cells = <0>;
b571abb3
TF		 546 compatible = "samsung,s3c2440-i2c";
547 reg = <0x138B0000 0x100>;
548 interrupts = <0 63 0>;
1c75a78a 549 clocks = <&clock CLK_I2C5>;
7ad34337 550 clock-names = "i2c";
9c869d1f
TS		 551 pinctrl-names = "default";
552 pinctrl-0 = <&i2c5_bus>;
c9e23f00 553 status = "disabled";
b571abb3
TF		 554 };
555
34db4990 556 i2c_6: i2c@138C0000 {
1b198d56
TF		 557 #address-cells = <1>;
558 #size-cells = <0>;
b571abb3
TF		 559 compatible = "samsung,s3c2440-i2c";
560 reg = <0x138C0000 0x100>;
561 interrupts = <0 64 0>;
1c75a78a 562 clocks = <&clock CLK_I2C6>;
7ad34337 563 clock-names = "i2c";
9c869d1f
TS		 564 pinctrl-names = "default";
565 pinctrl-0 = <&i2c6_bus>;
c9e23f00 566 status = "disabled";
b571abb3
TF		 567 };
568
34db4990 569 i2c_7: i2c@138D0000 {
1b198d56
TF		 570 #address-cells = <1>;
571 #size-cells = <0>;
b571abb3
TF		 572 compatible = "samsung,s3c2440-i2c";
573 reg = <0x138D0000 0x100>;
574 interrupts = <0 65 0>;
1c75a78a 575 clocks = <&clock CLK_I2C7>;
7ad34337 576 clock-names = "i2c";
9c869d1f
TS		 577 pinctrl-names = "default";
578 pinctrl-0 = <&i2c7_bus>;
c9e23f00 579 status = "disabled";
b571abb3
TF		 580 };
581
ed80d4ca
MS		 582 i2c_8: i2c@138E0000 {
583 #address-cells = <1>;
584 #size-cells = <0>;
585 compatible = "samsung,s3c2440-hdmiphy-i2c";
586 reg = <0x138E0000 0x100>;
587 interrupts = <0 93 0>;
588 clocks = <&clock CLK_I2C_HDMI>;
589 clock-names = "i2c";
590 status = "disabled";
591
592 hdmi_i2c_phy: hdmiphy@38 {
593 compatible = "exynos4210-hdmiphy";
594 reg = <0x38>;
595 };
596 };
597
b571abb3
TF		 598 spi_0: spi@13920000 {
599 compatible = "samsung,exynos4210-spi";
600 reg = <0x13920000 0x100>;
601 interrupts = <0 66 0>;
48b3af1e
SN		 602 dmas = <&pdma0 7>, <&pdma0 6>;
603 dma-names = "tx", "rx";
b571abb3
TF		 604 #address-cells = <1>;
605 #size-cells = <0>;
1c75a78a 606 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
7ad34337 607 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 608 pinctrl-names = "default";
609 pinctrl-0 = <&spi0_bus>;
c9e23f00 610 status = "disabled";
b571abb3
TF		 611 };
612
613 spi_1: spi@13930000 {
614 compatible = "samsung,exynos4210-spi";
615 reg = <0x13930000 0x100>;
616 interrupts = <0 67 0>;
48b3af1e
SN		 617 dmas = <&pdma1 7>, <&pdma1 6>;
618 dma-names = "tx", "rx";
b571abb3
TF		 619 #address-cells = <1>;
620 #size-cells = <0>;
1c75a78a 621 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
7ad34337 622 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 623 pinctrl-names = "default";
624 pinctrl-0 = <&spi1_bus>;
c9e23f00 625 status = "disabled";
b571abb3
TF		 626 };
627
628 spi_2: spi@13940000 {
629 compatible = "samsung,exynos4210-spi";
630 reg = <0x13940000 0x100>;
631 interrupts = <0 68 0>;
48b3af1e
SN		 632 dmas = <&pdma0 9>, <&pdma0 8>;
633 dma-names = "tx", "rx";
b571abb3
TF		 634 #address-cells = <1>;
635 #size-cells = <0>;
1c75a78a 636 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
7ad34337 637 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 638 pinctrl-names = "default";
639 pinctrl-0 = <&spi2_bus>;
c9e23f00 640 status = "disabled";
b571abb3
TF		 641 };
642
9c41221e 643 pwm: pwm@139D0000 {
cc4193ea
TF		 644 compatible = "samsung,exynos4210-pwm";
645 reg = <0x139D0000 0x1000>;
646 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
1c75a78a 647 clocks = <&clock CLK_PWM>;
ec06dbe7 648 clock-names = "timers";
2fd82d33 649 #pwm-cells = <3>;
cc4193ea
TF		 650 status = "disabled";
651 };
652
b571abb3
TF		 653 amba {
654 #address-cells = <1>;
655 #size-cells = <1>;
2ef7d5f3 656 compatible = "simple-bus";
b571abb3
TF		 657 interrupt-parent = <&gic>;
658 ranges;
659
660 pdma0: pdma@12680000 {
661 compatible = "arm,pl330", "arm,primecell";
662 reg = <0x12680000 0x1000>;
663 interrupts = <0 35 0>;
1c75a78a 664 clocks = <&clock CLK_PDMA0>;
7ad34337 665 clock-names = "apb_pclk";
0a96d4d3
PV		 666 #dma-cells = <1>;
667 #dma-channels = <8>;
668 #dma-requests = <32>;
b571abb3
TF		 669 };
670
671 pdma1: pdma@12690000 {
672 compatible = "arm,pl330", "arm,primecell";
673 reg = <0x12690000 0x1000>;
674 interrupts = <0 36 0>;
1c75a78a 675 clocks = <&clock CLK_PDMA1>;
7ad34337 676 clock-names = "apb_pclk";
0a96d4d3
PV		 677 #dma-cells = <1>;
678 #dma-channels = <8>;
679 #dma-requests = <32>;
b571abb3 680 };
f7e758af
BZ		 681
682 mdma1: mdma@12850000 {
683 compatible = "arm,pl330", "arm,primecell";
684 reg = <0x12850000 0x1000>;
685 interrupts = <0 34 0>;
1c75a78a 686 clocks = <&clock CLK_MDMA>;
7ad34337 687 clock-names = "apb_pclk";
0a96d4d3
PV		 688 #dma-cells = <1>;
689 #dma-channels = <8>;
690 #dma-requests = <1>;
f7e758af 691 };
b571abb3 692 };
768c3a56
VS		 693
694 fimd: fimd@11c00000 {
695 compatible = "samsung,exynos4210-fimd";
696 interrupt-parent = <&combiner>;
697 reg = <0x11c00000 0x20000>;
698 interrupt-names = "fifo", "vsync", "lcd_sys";
699 interrupts = <11 0>, <11 1>, <11 2>;
1c75a78a 700 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
768c3a56 701 clock-names = "sclk_fimd", "fimd";
0da65870 702 power-domains = <&pd_lcd0>;
71d3a9fb 703 iommus = <&sysmmu_fimd0>;
2eb62941 704 samsung,sysreg = <&sys_reg>;
768c3a56
VS		 705 status = "disabled";
706 };
30e0e476 707
9843a223
LM		 708 tmu: tmu@100C0000 {
709 #include "exynos4412-tmu-sensor-conf.dtsi"
710 };
711
9c41221e 712 jpeg_codec: jpeg-codec@11840000 {
f470b859
MS		 713 compatible = "samsung,exynos4210-jpeg";
714 reg = <0x11840000 0x1000>;
715 interrupts = <0 88 0>;
716 clocks = <&clock CLK_JPEG>;
717 clock-names = "jpeg";
718 power-domains = <&pd_cam>;
ba032795 719 iommus = <&sysmmu_jpeg>;
f470b859
MS		 720 };
721
0c7e90b5
MS		 722 rotator: rotator@12810000 {
723 compatible = "samsung,exynos4210-rotator";
724 reg = <0x12810000 0x64>;
725 interrupts = <0 83 0>;
726 clocks = <&clock CLK_ROTATOR>;
727 clock-names = "rotator";
728 iommus = <&sysmmu_rotator>;
729 };
730
ed80d4ca
MS		 731 hdmi: hdmi@12D00000 {
732 compatible = "samsung,exynos4210-hdmi";
733 reg = <0x12D00000 0x70000>;
734 interrupts = <0 92 0>;
735 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
736 "mout_hdmi";
737 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
738 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
739 <&clock CLK_MOUT_HDMI>;
740 phy = <&hdmi_i2c_phy>;
741 power-domains = <&pd_tv>;
742 samsung,syscon-phandle = <&pmu_system_controller>;
743 status = "disabled";
c795c88d
KD		 744 };
745
746 hdmicec: cec@100B0000 {
747 compatible = "samsung,s5p-cec";
748 reg = <0x100B0000 0x200>;
749 interrupts = <0 114 0>;
750 clocks = <&clock CLK_HDMI_CEC>;
751 clock-names = "hdmicec";
752 samsung,syscon-phandle = <&pmu_system_controller>;
753 pinctrl-names = "default";
754 pinctrl-0 = <&hdmi_cec>;
755 status = "disabled";
ed80d4ca
MS		 756 };
757
758 mixer: mixer@12C10000 {
759 compatible = "samsung,exynos4210-mixer";
760 interrupts = <0 91 0>;
761 reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
762 power-domains = <&pd_tv>;
71d3a9fb 763 iommus = <&sysmmu_tv>;
ed80d4ca
MS		 764 status = "disabled";
765 };
766
30e0e476
CC		 767 ppmu_dmc0: ppmu_dmc0@106a0000 {
768 compatible = "samsung,exynos-ppmu";
769 reg = <0x106a0000 0x2000>;
770 clocks = <&clock CLK_PPMUDMC0>;
771 clock-names = "ppmu";
772 status = "disabled";
773 };
774
775 ppmu_dmc1: ppmu_dmc1@106b0000 {
776 compatible = "samsung,exynos-ppmu";
777 reg = <0x106b0000 0x2000>;
778 clocks = <&clock CLK_PPMUDMC1>;
779 clock-names = "ppmu";
780 status = "disabled";
781 };
782
783 ppmu_cpu: ppmu_cpu@106c0000 {
784 compatible = "samsung,exynos-ppmu";
785 reg = <0x106c0000 0x2000>;
786 clocks = <&clock CLK_PPMUCPU>;
787 clock-names = "ppmu";
788 status = "disabled";
789 };
790
791 ppmu_acp: ppmu_acp@10ae0000 {
792 compatible = "samsung,exynos-ppmu";
793 reg = <0x106e0000 0x2000>;
794 status = "disabled";
795 };
796
797 ppmu_rightbus: ppmu_rightbus@112a0000 {
798 compatible = "samsung,exynos-ppmu";
799 reg = <0x112a0000 0x2000>;
800 clocks = <&clock CLK_PPMURIGHT>;
801 clock-names = "ppmu";
802 status = "disabled";
803 };
804
805 ppmu_leftbus: ppmu_leftbus0@116a0000 {
806 compatible = "samsung,exynos-ppmu";
807 reg = <0x116a0000 0x2000>;
808 clocks = <&clock CLK_PPMULEFT>;
809 clock-names = "ppmu";
810 status = "disabled";
811 };
812
813 ppmu_camif: ppmu_camif@11ac0000 {
814 compatible = "samsung,exynos-ppmu";
815 reg = <0x11ac0000 0x2000>;
816 clocks = <&clock CLK_PPMUCAMIF>;
817 clock-names = "ppmu";
818 status = "disabled";
819 };
820
821 ppmu_lcd0: ppmu_lcd0@11e40000 {
822 compatible = "samsung,exynos-ppmu";
823 reg = <0x11e40000 0x2000>;
824 clocks = <&clock CLK_PPMULCD0>;
825 clock-names = "ppmu";
826 status = "disabled";
827 };
828
829 ppmu_fsys: ppmu_g3d@12630000 {
830 compatible = "samsung,exynos-ppmu";
831 reg = <0x12630000 0x2000>;
832 status = "disabled";
833 };
834
835 ppmu_image: ppmu_image@12aa0000 {
836 compatible = "samsung,exynos-ppmu";
837 reg = <0x12aa0000 0x2000>;
838 clocks = <&clock CLK_PPMUIMAGE>;
839 clock-names = "ppmu";
840 status = "disabled";
841 };
842
843 ppmu_tv: ppmu_tv@12e40000 {
844 compatible = "samsung,exynos-ppmu";
845 reg = <0x12e40000 0x2000>;
846 clocks = <&clock CLK_PPMUTV>;
847 clock-names = "ppmu";
848 status = "disabled";
849 };
850
851 ppmu_g3d: ppmu_g3d@13220000 {
852 compatible = "samsung,exynos-ppmu";
853 reg = <0x13220000 0x2000>;
854 clocks = <&clock CLK_PPMUG3D>;
855 clock-names = "ppmu";
856 status = "disabled";
857 };
858
859 ppmu_mfc_left: ppmu_mfc_left@13660000 {
860 compatible = "samsung,exynos-ppmu";
861 reg = <0x13660000 0x2000>;
862 clocks = <&clock CLK_PPMUMFC_L>;
863 clock-names = "ppmu";
864 status = "disabled";
865 };
866
867 ppmu_mfc_right: ppmu_mfc_right@13670000 {
868 compatible = "samsung,exynos-ppmu";
869 reg = <0x13670000 0x2000>;
870 clocks = <&clock CLK_PPMUMFC_R>;
871 clock-names = "ppmu";
872 status = "disabled";
873 };
71d3a9fb
MS		 874
875 sysmmu_mfc_l: sysmmu@13620000 {
876 compatible = "samsung,exynos-sysmmu";
877 reg = <0x13620000 0x1000>;
878 interrupt-parent = <&combiner>;
879 interrupts = <5 5>;
880 clock-names = "sysmmu", "master";
881 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
882 power-domains = <&pd_mfc>;
883 #iommu-cells = <0>;
884 };
885
886 sysmmu_mfc_r: sysmmu@13630000 {
887 compatible = "samsung,exynos-sysmmu";
888 reg = <0x13630000 0x1000>;
889 interrupt-parent = <&combiner>;
890 interrupts = <5 6>;
891 clock-names = "sysmmu", "master";
892 clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
893 power-domains = <&pd_mfc>;
894 #iommu-cells = <0>;
895 };
896
897 sysmmu_tv: sysmmu@12E20000 {
898 compatible = "samsung,exynos-sysmmu";
899 reg = <0x12E20000 0x1000>;
900 interrupt-parent = <&combiner>;
901 interrupts = <5 4>;
902 clock-names = "sysmmu", "master";
903 clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>;
904 power-domains = <&pd_tv>;
905 #iommu-cells = <0>;
906 };
907
908 sysmmu_fimc0: sysmmu@11A20000 {
909 compatible = "samsung,exynos-sysmmu";
910 reg = <0x11A20000 0x1000>;
911 interrupt-parent = <&combiner>;
912 interrupts = <4 2>;
913 clock-names = "sysmmu", "master";
914 clocks = <&clock CLK_SMMU_FIMC0>, <&clock CLK_FIMC0>;
915 power-domains = <&pd_cam>;
916 #iommu-cells = <0>;
917 };
918
919 sysmmu_fimc1: sysmmu@11A30000 {
920 compatible = "samsung,exynos-sysmmu";
921 reg = <0x11A30000 0x1000>;
922 interrupt-parent = <&combiner>;
923 interrupts = <4 3>;
924 clock-names = "sysmmu", "master";
925 clocks = <&clock CLK_SMMU_FIMC1>, <&clock CLK_FIMC1>;
926 power-domains = <&pd_cam>;
927 #iommu-cells = <0>;
928 };
929
930 sysmmu_fimc2: sysmmu@11A40000 {
931 compatible = "samsung,exynos-sysmmu";
932 reg = <0x11A40000 0x1000>;
933 interrupt-parent = <&combiner>;
934 interrupts = <4 4>;
935 clock-names = "sysmmu", "master";
936 clocks = <&clock CLK_SMMU_FIMC2>, <&clock CLK_FIMC2>;
937 power-domains = <&pd_cam>;
938 #iommu-cells = <0>;
939 };
940
941 sysmmu_fimc3: sysmmu@11A50000 {
942 compatible = "samsung,exynos-sysmmu";
943 reg = <0x11A50000 0x1000>;
944 interrupt-parent = <&combiner>;
945 interrupts = <4 5>;
946 clock-names = "sysmmu", "master";
947 clocks = <&clock CLK_SMMU_FIMC3>, <&clock CLK_FIMC3>;
948 power-domains = <&pd_cam>;
949 #iommu-cells = <0>;
950 };
951
952 sysmmu_jpeg: sysmmu@11A60000 {
953 compatible = "samsung,exynos-sysmmu";
954 reg = <0x11A60000 0x1000>;
955 interrupt-parent = <&combiner>;
956 interrupts = <4 6>;
957 clock-names = "sysmmu", "master";
958 clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
959 power-domains = <&pd_cam>;
960 #iommu-cells = <0>;
961 };
962
963 sysmmu_rotator: sysmmu@12A30000 {
964 compatible = "samsung,exynos-sysmmu";
965 reg = <0x12A30000 0x1000>;
966 interrupt-parent = <&combiner>;
967 interrupts = <5 0>;
968 clock-names = "sysmmu", "master";
969 clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
71d3a9fb
MS		 970 #iommu-cells = <0>;
971 };
972
973 sysmmu_fimd0: sysmmu@11E20000 {
974 compatible = "samsung,exynos-sysmmu";
975 reg = <0x11E20000 0x1000>;
976 interrupt-parent = <&combiner>;
977 interrupts = <5 2>;
978 clock-names = "sysmmu", "master";
979 clocks = <&clock CLK_SMMU_FIMD0>, <&clock CLK_FIMD0>;
980 power-domains = <&pd_lcd0>;
981 #iommu-cells = <0>;
982 };
a452977c 983
6c5eb1db
KK		 984 sss: sss@10830000 {
985 compatible = "samsung,exynos4210-secss";
986 reg = <0x10830000 0x300>;
987 interrupts = <0 112 0>;
988 clocks = <&clock CLK_SSS>;
989 clock-names = "secss";
6c5eb1db
KK		 990 };
991
a452977c
KK		 992 prng: rng@10830400 {
993 compatible = "samsung,exynos4-rng";
994 reg = <0x10830400 0x200>;
995 clocks = <&clock CLK_SSS>;
996 clock-names = "secss";
a452977c 997 };
b571abb3 998};
Linux kernel - Deliverables
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