projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge remote-tracking branch 'mfd/for-mfd-next'
[deliverable/linux.git] / arch / arm / boot / dts / exynos5422-odroidxu3-common.dtsi
CommitLineData
3a7c01d7
KK		 1/*
2 * Hardkernel Odroid XU3 board device tree source
3 *
3a7c01d7
KK		 4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
f4715dc7
KK		 6 * Copyright (c) 2014 Collabora Ltd.
7 * Copyright (c) 2015 Lukasz Majewski <l.majewski@samsung.com>
8 * Anand Moon <linux.amoon@gmail.com>
3a7c01d7
KK		 9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <dt-bindings/clock/samsung,s2mps11.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/gpio/gpio.h>
18#include <dt-bindings/sound/samsung-i2s.h>
19#include "exynos5800.dtsi"
df09df6f 20#include "exynos5422-cpus.dtsi"
8b9ac7e3 21#include "exynos-mfc-reserved-memory.dtsi"
3a7c01d7
KK		 22
23/ {
a0eb1095 24 memory@40000000 {
12676ee1 25 device_type = "memory";
3a7c01d7
KK		 26 reg = <0x40000000 0x7EA00000>;
27 };
28
29 chosen {
5a5232d1 30 stdout-path = "serial2:115200n8";
3a7c01d7
KK		 31 };
32
33 firmware@02073000 {
34 compatible = "samsung,secure-firmware";
35 reg = <0x02073000 0x1000>;
36 };
37
38 fixed-rate-clocks {
39 oscclk {
40 compatible = "samsung,exynos5420-oscclk";
41 clock-frequency = <24000000>;
42 };
43 };
44
45 emmc_pwrseq: pwrseq {
46 pinctrl-0 = <&emmc_nrst_pin>;
47 pinctrl-names = "default";
48 compatible = "mmc-pwrseq-emmc";
31b9903c 49 reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>;
3a7c01d7
KK		 50 };
51
b685d540
AM		 52 fan0: pwm-fan {
53 compatible = "pwm-fan";
54 pwms = <&pwm 0 20972 0>;
55 cooling-min-state = <0>;
56 cooling-max-state = <3>;
57 #cooling-cells = <2>;
58 cooling-levels = <0 130 170 230>;
59 };
f4715dc7
KK		 60
61 thermal-zones {
62 cpu0_thermal: cpu0-thermal {
63 thermal-sensors = <&tmu_cpu0 0>;
64 polling-delay-passive = <250>;
65 polling-delay = <0>;
66 trips {
67 cpu_alert0: cpu-alert-0 {
68 temperature = <50000>; /* millicelsius */
69 hysteresis = <5000>; /* millicelsius */
70 type = "active";
71 };
72 cpu_alert1: cpu-alert-1 {
73 temperature = <60000>; /* millicelsius */
74 hysteresis = <5000>; /* millicelsius */
75 type = "active";
76 };
77 cpu_alert2: cpu-alert-2 {
78 temperature = <70000>; /* millicelsius */
79 hysteresis = <5000>; /* millicelsius */
80 type = "active";
81 };
82 cpu_crit0: cpu-crit-0 {
83 temperature = <120000>; /* millicelsius */
84 hysteresis = <0>; /* millicelsius */
85 type = "critical";
86 };
87 /*
88 * Exynos542x supports only 4 trip-points
89 * so for these polling mode is required.
90 * Start polling at temperature level of last
91 * interrupt-driven trip: cpu_alert2
92 */
93 cpu_alert3: cpu-alert-3 {
94 temperature = <70000>; /* millicelsius */
95 hysteresis = <10000>; /* millicelsius */
96 type = "passive";
97 };
98 cpu_alert4: cpu-alert-4 {
99 temperature = <85000>; /* millicelsius */
100 hysteresis = <10000>; /* millicelsius */
101 type = "passive";
102 };
103
104 };
105 cooling-maps {
106 map0 {
107 trip = <&cpu_alert0>;
108 cooling-device = <&fan0 0 1>;
109 };
110 map1 {
111 trip = <&cpu_alert1>;
112 cooling-device = <&fan0 1 2>;
113 };
114 map2 {
115 trip = <&cpu_alert2>;
116 cooling-device = <&fan0 2 3>;
117 };
118 /*
119 * When reaching cpu_alert3, reduce CPU
120 * by 2 steps. On Exynos5422/5800 that would
121 * be: 1600 MHz and 1100 MHz.
122 */
123 map3 {
124 trip = <&cpu_alert3>;
125 cooling-device = <&cpu0 0 2>;
126 };
127 map4 {
128 trip = <&cpu_alert3>;
129 cooling-device = <&cpu4 0 2>;
130 };
131
132 /*
133 * When reaching cpu_alert4, reduce CPU
134 * further, down to 600 MHz (11 steps for big,
135 * 7 steps for LITTLE).
136 */
137 map5 {
138 trip = <&cpu_alert4>;
139 cooling-device = <&cpu0 3 7>;
140 };
141 map6 {
142 trip = <&cpu_alert4>;
143 cooling-device = <&cpu4 3 11>;
144 };
145 };
146 };
147 };
3a7c01d7
KK		 148};
149
3f2129fd
CC		 150&bus_wcore {
151 devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>,
152 <&nocp_mem1_0>, <&nocp_mem1_1>;
153 vdd-supply = <&buck3_reg>;
154 exynos,saturation-ratio = <100>;
155 status = "okay";
156};
157
158&bus_noc {
159 devfreq = <&bus_wcore>;
160 status = "okay";
161};
162
163&bus_fsys_apb {
164 devfreq = <&bus_wcore>;
165 status = "okay";
166};
167
168&bus_fsys {
169 devfreq = <&bus_wcore>;
170 status = "okay";
171};
172
173&bus_fsys2 {
174 devfreq = <&bus_wcore>;
175 status = "okay";
176};
177
178&bus_mfc {
179 devfreq = <&bus_wcore>;
180 status = "okay";
181};
182
183&bus_gen {
184 devfreq = <&bus_wcore>;
185 status = "okay";
186};
187
188&bus_peri {
189 devfreq = <&bus_wcore>;
190 status = "okay";
191};
192
193&bus_g2d {
194 devfreq = <&bus_wcore>;
195 status = "okay";
196};
197
198&bus_g2d_acp {
199 devfreq = <&bus_wcore>;
200 status = "okay";
201};
202
203&bus_jpeg {
204 devfreq = <&bus_wcore>;
205 status = "okay";
206};
207
208&bus_jpeg_apb {
209 devfreq = <&bus_wcore>;
210 status = "okay";
211};
212
213&bus_disp1_fimd {
214 devfreq = <&bus_wcore>;
215 status = "okay";
216};
217
218&bus_disp1 {
219 devfreq = <&bus_wcore>;
220 status = "okay";
221};
222
223&bus_gscl_scaler {
224 devfreq = <&bus_wcore>;
225 status = "okay";
226};
227
228&bus_mscl {
229 devfreq = <&bus_wcore>;
230 status = "okay";
231};
232
3a7c01d7
KK		 233&clock_audss {
234 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
235 <&clock_audss EXYNOS_MOUT_I2S>,
236 <&clock_audss EXYNOS_DOUT_AUD_BUS>;
237 assigned-clock-parents = <&clock CLK_FIN_PLL>,
238 <&clock_audss EXYNOS_MOUT_AUDSS>;
239 assigned-clock-rates = <0>,
240 <0>,
241 <19200000>;
242};
243
8b51c5e7
BZ		 244&cpu0 {
245 cpu-supply = <&buck6_reg>;
246};
247
248&cpu4 {
249 cpu-supply = <&buck2_reg>;
250};
251
3a7c01d7
KK		 252&hdmi {
253 status = "okay";
05b01dd9 254 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
3a7c01d7
KK		 255 pinctrl-names = "default";
256 pinctrl-0 = <&hdmi_hpd_irq>;
257
258 vdd_osc-supply = <&ldo7_reg>;
259 vdd_pll-supply = <&ldo6_reg>;
260 vdd-supply = <&ldo6_reg>;
261};
262
263&hsi2c_4 {
264 status = "okay";
265
266 s2mps11_pmic@66 {
267 compatible = "samsung,s2mps11-pmic";
268 reg = <0x66>;
0fb033bb 269 samsung,s2mps11-acokb-ground;
3a7c01d7
KK		 270
271 interrupt-parent = <&gpx0>;
272 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
273 pinctrl-names = "default";
274 pinctrl-0 = <&s2mps11_irq>;
275
276 s2mps11_osc: clocks {
277 #clock-cells = <1>;
278 clock-output-names = "s2mps11_ap",
279 "s2mps11_cp", "s2mps11_bt";
280 };
281
282 regulators {
283 ldo1_reg: LDO1 {
284 regulator-name = "vdd_ldo1";
285 regulator-min-microvolt = <1000000>;
286 regulator-max-microvolt = <1000000>;
287 regulator-always-on;
288 };
289
290 ldo3_reg: LDO3 {
399fc184 291 regulator-name = "vddq_mmc0";
3a7c01d7
KK		 292 regulator-min-microvolt = <1800000>;
293 regulator-max-microvolt = <1800000>;
3a7c01d7
KK		 294 };
295
296 ldo5_reg: LDO5 {
297 regulator-name = "vdd_ldo5";
298 regulator-min-microvolt = <1800000>;
299 regulator-max-microvolt = <1800000>;
300 regulator-always-on;
301 };
302
303 ldo6_reg: LDO6 {
304 regulator-name = "vdd_ldo6";
305 regulator-min-microvolt = <1000000>;
306 regulator-max-microvolt = <1000000>;
307 regulator-always-on;
308 };
309
310 ldo7_reg: LDO7 {
311 regulator-name = "vdd_ldo7";
312 regulator-min-microvolt = <1800000>;
313 regulator-max-microvolt = <1800000>;
314 regulator-always-on;
315 };
316
317 ldo8_reg: LDO8 {
318 regulator-name = "vdd_ldo8";
319 regulator-min-microvolt = <1800000>;
320 regulator-max-microvolt = <1800000>;
321 regulator-always-on;
322 };
323
324 ldo9_reg: LDO9 {
325 regulator-name = "vdd_ldo9";
326 regulator-min-microvolt = <3000000>;
327 regulator-max-microvolt = <3000000>;
328 regulator-always-on;
329 };
330
331 ldo10_reg: LDO10 {
332 regulator-name = "vdd_ldo10";
333 regulator-min-microvolt = <1800000>;
334 regulator-max-microvolt = <1800000>;
335 regulator-always-on;
336 };
337
338 ldo11_reg: LDO11 {
339 regulator-name = "vdd_ldo11";
340 regulator-min-microvolt = <1000000>;
341 regulator-max-microvolt = <1000000>;
342 regulator-always-on;
343 };
344
345 ldo12_reg: LDO12 {
346 regulator-name = "vdd_ldo12";
347 regulator-min-microvolt = <1800000>;
348 regulator-max-microvolt = <1800000>;
349 regulator-always-on;
350 };
351
352 ldo13_reg: LDO13 {
399fc184 353 regulator-name = "vddq_mmc2";
3a7c01d7
KK		 354 regulator-min-microvolt = <2800000>;
355 regulator-max-microvolt = <2800000>;
3a7c01d7
KK		 356 };
357
358 ldo15_reg: LDO15 {
359 regulator-name = "vdd_ldo15";
360 regulator-min-microvolt = <3100000>;
361 regulator-max-microvolt = <3100000>;
362 regulator-always-on;
363 };
364
365 ldo16_reg: LDO16 {
366 regulator-name = "vdd_ldo16";
367 regulator-min-microvolt = <2200000>;
368 regulator-max-microvolt = <2200000>;
369 regulator-always-on;
370 };
371
372 ldo17_reg: LDO17 {
373 regulator-name = "tsp_avdd";
374 regulator-min-microvolt = <3300000>;
375 regulator-max-microvolt = <3300000>;
376 regulator-always-on;
377 };
378
399fc184
MR		 379 ldo18_reg: LDO18 {
380 regulator-name = "vdd_emmc_1V8";
381 regulator-min-microvolt = <1800000>;
382 regulator-max-microvolt = <1800000>;
383 };
384
3a7c01d7
KK		 385 ldo19_reg: LDO19 {
386 regulator-name = "vdd_sd";
387 regulator-min-microvolt = <2800000>;
388 regulator-max-microvolt = <2800000>;
3a7c01d7
KK		 389 };
390
391 ldo24_reg: LDO24 {
392 regulator-name = "tsp_io";
393 regulator-min-microvolt = <2800000>;
394 regulator-max-microvolt = <2800000>;
395 regulator-always-on;
396 };
397
398 ldo26_reg: LDO26 {
399 regulator-name = "vdd_ldo26";
400 regulator-min-microvolt = <3000000>;
401 regulator-max-microvolt = <3000000>;
402 regulator-always-on;
403 };
404
405 buck1_reg: BUCK1 {
406 regulator-name = "vdd_mif";
407 regulator-min-microvolt = <800000>;
408 regulator-max-microvolt = <1300000>;
409 regulator-always-on;
410 regulator-boot-on;
411 };
412
413 buck2_reg: BUCK2 {
414 regulator-name = "vdd_arm";
415 regulator-min-microvolt = <800000>;
416 regulator-max-microvolt = <1500000>;
417 regulator-always-on;
418 regulator-boot-on;
419 };
420
421 buck3_reg: BUCK3 {
422 regulator-name = "vdd_int";
423 regulator-min-microvolt = <800000>;
424 regulator-max-microvolt = <1400000>;
425 regulator-always-on;
426 regulator-boot-on;
427 };
428
429 buck4_reg: BUCK4 {
430 regulator-name = "vdd_g3d";
431 regulator-min-microvolt = <800000>;
432 regulator-max-microvolt = <1400000>;
433 regulator-always-on;
434 regulator-boot-on;
435 };
436
437 buck5_reg: BUCK5 {
438 regulator-name = "vdd_mem";
439 regulator-min-microvolt = <800000>;
440 regulator-max-microvolt = <1400000>;
441 regulator-always-on;
442 regulator-boot-on;
443 };
444
445 buck6_reg: BUCK6 {
446 regulator-name = "vdd_kfc";
447 regulator-min-microvolt = <800000>;
448 regulator-max-microvolt = <1500000>;
449 regulator-always-on;
450 regulator-boot-on;
451 };
452
453 buck7_reg: BUCK7 {
454 regulator-name = "vdd_1.0v_ldo";
455 regulator-min-microvolt = <800000>;
456 regulator-max-microvolt = <1500000>;
457 regulator-always-on;
458 regulator-boot-on;
459 };
460
461 buck8_reg: BUCK8 {
462 regulator-name = "vdd_1.8v_ldo";
463 regulator-min-microvolt = <800000>;
464 regulator-max-microvolt = <1500000>;
465 regulator-always-on;
466 regulator-boot-on;
467 };
468
469 buck9_reg: BUCK9 {
470 regulator-name = "vdd_2.8v_ldo";
471 regulator-min-microvolt = <3000000>;
472 regulator-max-microvolt = <3750000>;
473 regulator-always-on;
474 regulator-boot-on;
475 };
476
477 buck10_reg: BUCK10 {
478 regulator-name = "vdd_vmem";
479 regulator-min-microvolt = <2850000>;
480 regulator-max-microvolt = <2850000>;
481 regulator-always-on;
482 regulator-boot-on;
483 };
484 };
485 };
486};
487
3a7c01d7
KK		 488&i2c_2 {
489 samsung,i2c-sda-delay = <100>;
490 samsung,i2c-max-bus-freq = <66000>;
491 status = "okay";
492
493 hdmiddc@50 {
494 compatible = "samsung,exynos4210-hdmiddc";
495 reg = <0x50>;
496 };
497};
498
3a7c01d7
KK		 499&mmc_0 {
500 status = "okay";
501 mmc-pwrseq = <&emmc_pwrseq>;
502 cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>;
503 card-detect-delay = <200>;
504 samsung,dw-mshc-ciu-div = <3>;
505 samsung,dw-mshc-sdr-timing = <0 4>;
506 samsung,dw-mshc-ddr-timing = <0 2>;
507 samsung,dw-mshc-hs400-timing = <0 2>;
508 samsung,read-strobe-delay = <90>;
509 pinctrl-names = "default";
510 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>;
511 bus-width = <8>;
512 cap-mmc-highspeed;
513 mmc-hs200-1_8v;
514 mmc-hs400-1_8v;
399fc184
MR		 515 vmmc-supply = <&ldo18_reg>;
516 vqmmc-supply = <&ldo3_reg>;
3a7c01d7
KK		 517};
518
519&mmc_2 {
520 status = "okay";
521 card-detect-delay = <200>;
522 samsung,dw-mshc-ciu-div = <3>;
523 samsung,dw-mshc-sdr-timing = <0 4>;
524 samsung,dw-mshc-ddr-timing = <0 2>;
525 pinctrl-names = "default";
526 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
527 bus-width = <4>;
528 cap-sd-highspeed;
399fc184
MR		 529 vmmc-supply = <&ldo19_reg>;
530 vqmmc-supply = <&ldo13_reg>;
3a7c01d7
KK		 531};
532
3f2129fd
CC		 533&nocp_mem0_0 {
534 status = "okay";
535};
536
537&nocp_mem0_1 {
538 status = "okay";
539};
540
541&nocp_mem1_0 {
542 status = "okay";
543};
544
545&nocp_mem1_1 {
546 status = "okay";
547};
548
3a7c01d7
KK		 549&pinctrl_0 {
550 hdmi_hpd_irq: hdmi-hpd-irq {
551 samsung,pins = "gpx3-7";
552 samsung,pin-function = <0>;
553 samsung,pin-pud = <1>;
554 samsung,pin-drv = <0>;
555 };
556
557 s2mps11_irq: s2mps11-irq {
558 samsung,pins = "gpx0-4";
559 samsung,pin-function = <0xf>;
560 samsung,pin-pud = <0>;
561 samsung,pin-drv = <0>;
562 };
563};
564
565&pinctrl_1 {
566 emmc_nrst_pin: emmc-nrst {
567 samsung,pins = "gpd1-0";
568 samsung,pin-function = <0>;
569 samsung,pin-pud = <0>;
570 samsung,pin-drv = <0>;
571 };
572};
573
8e946a05
AM		 574&tmu_cpu0 {
575 vtmu-supply = <&ldo7_reg>;
8e946a05
AM		 576};
577
578&tmu_cpu1 {
579 vtmu-supply = <&ldo7_reg>;
8e946a05
AM		 580};
581
582&tmu_cpu2 {
583 vtmu-supply = <&ldo7_reg>;
8e946a05
AM		 584};
585
586&tmu_cpu3 {
587 vtmu-supply = <&ldo7_reg>;
8e946a05
AM		 588};
589
590&tmu_gpu {
591 vtmu-supply = <&ldo7_reg>;
8e946a05
AM		 592};
593
3a7c01d7
KK		 594&rtc {
595 status = "okay";
596 clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
597 clock-names = "rtc", "rtc_src";
598};
599
600&usbdrd_dwc3_0 {
601 dr_mode = "host";
602};
603
66583560 604/* usbdrd_dwc3_1 mode customized in each board */
dc929d49
AM		 605
606&usbdrd3_0 {
607 vdd33-supply = <&ldo9_reg>;
608 vdd10-supply = <&ldo11_reg>;
609};
610
611&usbdrd3_1 {
612 vdd33-supply = <&ldo9_reg>;
613 vdd10-supply = <&ldo11_reg>;
614};
Linux kernel - Deliverables
This page took 0.103401 seconds and 5 git commands to generate.