[deliverable/linux.git] / arch / arm / boot / dts / imx6qdl-gw54xx.dtsi

/*
 * Copyright 2013 Gateworks Corporation
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include <dt-bindings/gpio/gpio.h>

/ {
	/* these are used by bootloader for disabling nodes */
	aliases {
		ethernet1 = &eth1;
		led0 = &led0;
		led1 = &led1;
		led2 = &led2;
		nand = &gpmi;
		ssi0 = &ssi1;
		usb0 = &usbh1;
		usb1 = &usbotg;
	};

	chosen {
		bootargs = "console=ttymxc1,115200";
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm4 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led0: user1 {
			label = "user1";
			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led1: user2 {
			label = "user2";
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
			default-state = "off";
		};

		led2: user3 {
			label = "user3";
			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
			default-state = "off";
		};
	};

	memory {
		reg = <0x10000000 0x40000000>;
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pps>;
		gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		status = "okay";
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_1p0v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "1P0V";
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
			regulator-always-on;
		};

		reg_3p3v: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_h1_vbus: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		reg_usb_otg_vbus: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	sound {
		compatible = "fsl,imx6q-ventana-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "sgtl5000-audio";
		ssi-controller = <&ssi1>;
		audio-codec = <&codec>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <1>;
		mux-ext-port = <4>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
	                  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
	                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c3>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	eeprom1: eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
	};

	eeprom2: eeprom@51 {
		compatible = "atmel,24c02";
		reg = <0x51>;
		pagesize = <16>;
	};

	eeprom3: eeprom@52 {
		compatible = "atmel,24c02";
		reg = <0x52>;
		pagesize = <16>;
	};

	eeprom4: eeprom@53 {
		compatible = "atmel,24c02";
		reg = <0x53>;
		pagesize = <16>;
	};

	gpio: pca9555@23 {
		compatible = "nxp,pca9555";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	rtc: ds1672@68 {
		compatible = "dallas,ds1672";
		reg = <0x68>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pmic: pfuze100@08 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <300000>;
				regulator-max-microvolt = <1875000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3950000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <400000>;
				regulator-max-microvolt = <1975000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <3300000>;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-boot-on;
				regulator-always-on;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_reg: vgen2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	codec: sgtl5000@0a {
		compatible = "fsl,sgtl5000";
		reg = <0x0a>;
		clocks = <&clks IMX6QDL_CLK_CKO>;
		VDDA-supply = <&sw4_reg>;
		VDDIO-supply = <&reg_3p3v>;
	};

	touchscreen: egalax_ts@04 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio7>;
		interrupts = <12 2>;
		wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
	};
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		display-timings {
			native-mode = <&timing0>;
			timing0: hsd100pxn1 {
				clock-frequency = <65000000>;
				hactive = <1024>;
				vactive = <768>;
				hback-porch = <220>;
				hfront-porch = <40>;
				vback-porch = <21>;
				vfront-porch = <7>;
				hsync-len = <60>;
				vsync-len = <10>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
	status = "okay";

	eth1: sky2@8 { /* MAC/PHY on bus 8 */
		compatible = "marvell,sky2";
	};
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
	status = "disabled";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	status = "disabled";
};

&pwm3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	status = "disabled";
};

&pwm4 {
	pinctrl-names = "default", "state_dio";
	pinctrl-0 = <&pinctrl_pwm4_backlight>;
	pinctrl-1 = <&pinctrl_pwm4_dio>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&ssi2 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	uart-has-rtscts;
	rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	no-1-8-v; /* firmware will remove if board revision supports */
	status = "okay";
};

&wdog1 {
	status = "disabled";
};

&wdog2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

&iomuxc {
	imx6qdl-gw54xx {
		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
				MX6QDL_PAD_SD2_DAT3__AUD4_TXC		0x130b0
				MX6QDL_PAD_SD2_DAT2__AUD4_TXD		0x110b0
				MX6QDL_PAD_SD2_DAT1__AUD4_TXFS		0x130b0
				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0 /* AUD4_MCK */
			>;
		};

		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			>;
		};

		pinctrl_flexcan1: flexcan1grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
				MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x4001b0b0 /* CAN_STBY */
			>;
		};

		pinctrl_gpio_leds: gpioledsgrp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0
				MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0
				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0
			>;
		};

		pinctrl_gpmi_nand: gpminandgrp {
			fsl,pins = <
				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
			>;
		};

		pinctrl_pcie: pciegrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0 /* PCIE IRQ */
				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x1b0b0 /* PCIE RST */
			>;
		};

		pinctrl_pps: ppsgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b1
			>;
		};

		pinctrl_pwm1: pwm1grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_9__PWM1_OUT		0x1b0b1
			>;
		};

		pinctrl_pwm2: pwm2grp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
			>;
		};

		pinctrl_pwm3: pwm3grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
			>;
		};

		pinctrl_pwm4_backlight: pwm4grpbacklight {
			fsl,pins = <
				/* LVDS_PWM J6.5 */
				MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
			>;
		};

		pinctrl_pwm4_dio: pwm4grpdio {
			fsl,pins = <
				/* DIO3 J16.4 */
				MX6QDL_PAD_SD4_DAT2__PWM4_OUT		0x1b0b1
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x4001b0b1 /* TEN */
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_uart5: uart5grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* PWR_EN */
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x17059 /* CD */
				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x17059
			>;
		};

		pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170b9 /* CD */
				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170b9
			>;
		};

		pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170f9 /* CD */
				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
			>;
		};

		pinctrl_wdog: wdoggrp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT3__WDOG2_B		0x1b0b0
			>;
		};
	};
};
Commit	Line	Data
e3946fe8 TH	1	/*
	2	* Copyright 2013 Gateworks Corporation
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
326cdb16 TH	12	#include <dt-bindings/gpio/gpio.h>
326cdb16 TH	13
e3946fe8 TH	14	/ {
	15	/* these are used by bootloader for disabling nodes */
	16	aliases {
e3946fe8 TH	17	ethernet1 = &eth1;
	18	led0 = &led0;
	19	led1 = &led1;
	20	led2 = &led2;
	21	nand = &gpmi;
e3946fe8 TH	22	ssi0 = &ssi1;
	23	usb0 = &usbh1;
	24	usb1 = &usbotg;
e3946fe8 TH	25	};
	26
	27	chosen {
	28	bootargs = "console=ttymxc1,115200";
	29	};
	30
b3253241 TH	31	backlight {
	32	compatible = "pwm-backlight";
	33	pwms = <&pwm4 0 5000000>;
	34	brightness-levels = <0 4 8 16 32 64 128 255>;
	35	default-brightness-level = <7>;
	36	};
	37
e3946fe8 TH	38	leds {
e3946fe8 TH	39	compatible = "gpio-leds";
b5f37b76 TH	40	pinctrl-names = "default";
b5f37b76 TH	41	pinctrl-0 = <&pinctrl_gpio_leds>;
e3946fe8 TH	42
	43	led0: user1 {
	44	label = "user1";
326cdb16	45	gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
e3946fe8 TH	46	default-state = "on";
	47	linux,default-trigger = "heartbeat";
	48	};
	49
	50	led1: user2 {
	51	label = "user2";
326cdb16	52	gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
e3946fe8 TH	53	default-state = "off";
	54	};
	55
	56	led2: user3 {
	57	label = "user3";
326cdb16	58	gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
e3946fe8 TH	59	default-state = "off";
	60	};
	61	};
	62
	63	memory {
	64	reg = <0x10000000 0x40000000>;
	65	};
	66
	67	pps {
	68	compatible = "pps-gpio";
b5f37b76 TH	69	pinctrl-names = "default";
b5f37b76 TH	70	pinctrl-0 = <&pinctrl_pps>;
326cdb16	71	gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
e3946fe8 TH	72	status = "okay";
	73	};
	74
	75	regulators {
	76	compatible = "simple-bus";
	77	#address-cells = <1>;
	78	#size-cells = <0>;
	79
	80	reg_1p0v: regulator@0 {
	81	compatible = "regulator-fixed";
	82	reg = <0>;
	83	regulator-name = "1P0V";
	84	regulator-min-microvolt = <1000000>;
	85	regulator-max-microvolt = <1000000>;
	86	regulator-always-on;
	87	};
	88
	89	reg_3p3v: regulator@1 {
	90	compatible = "regulator-fixed";
	91	reg = <1>;
	92	regulator-name = "3P3V";
	93	regulator-min-microvolt = <3300000>;
	94	regulator-max-microvolt = <3300000>;
	95	regulator-always-on;
	96	};
	97
	98	reg_usb_h1_vbus: regulator@2 {
	99	compatible = "regulator-fixed";
	100	reg = <2>;
	101	regulator-name = "usb_h1_vbus";
	102	regulator-min-microvolt = <5000000>;
	103	regulator-max-microvolt = <5000000>;
	104	regulator-always-on;
	105	};
	106
	107	reg_usb_otg_vbus: regulator@3 {
	108	compatible = "regulator-fixed";
	109	reg = <3>;
	110	regulator-name = "usb_otg_vbus";
	111	regulator-min-microvolt = <5000000>;
	112	regulator-max-microvolt = <5000000>;
326cdb16	113	gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
e3946fe8 TH	114	enable-active-high;
	115	};
	116	};
	117
	118	sound {
b12d1e94	119	compatible = "fsl,imx6q-ventana-sgtl5000",
e3946fe8	120	"fsl,imx-audio-sgtl5000";
b12d1e94	121	model = "sgtl5000-audio";
e3946fe8 TH	122	ssi-controller = <&ssi1>;
	123	audio-codec = <&codec>;
	124	audio-routing =
	125	"MIC_IN", "Mic Jack",
	126	"Mic Jack", "Mic Bias",
	127	"Headphone Jack", "HP_OUT";
	128	mux-int-port = <1>;
	129	mux-ext-port = <4>;
	130	};
	131	};
	132
	133	&audmux {
	134	pinctrl-names = "default";
	135	pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
	136	status = "okay";
	137	};
	138
	139	&can1 {
	140	pinctrl-names = "default";
	141	pinctrl-0 = <&pinctrl_flexcan1>;
	142	status = "okay";
	143	};
	144
e726a9fd TH	145	&clks {
	146	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
	147	<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	148	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
	149	<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
	150	};
	151
e3946fe8 TH	152	&fec {
	153	pinctrl-names = "default";
	154	pinctrl-0 = <&pinctrl_enet>;
3a35e470	155	phy-mode = "rgmii-id";
326cdb16	156	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
e3946fe8 TH	157	status = "okay";
	158	};
	159
	160	&gpmi {
	161	pinctrl-names = "default";
	162	pinctrl-0 = <&pinctrl_gpmi_nand>;
	163	status = "okay";
	164	};
	165
aef15dba TH	166	&hdmi {
	167	ddc-i2c-bus = <&i2c3>;
	168	status = "okay";
	169	};
	170
e3946fe8 TH	171	&i2c1 {
	172	clock-frequency = <100000>;
	173	pinctrl-names = "default";
	174	pinctrl-0 = <&pinctrl_i2c1>;
	175	status = "okay";
	176
	177	eeprom1: eeprom@50 {
	178	compatible = "atmel,24c02";
	179	reg = <0x50>;
	180	pagesize = <16>;
	181	};
	182
	183	eeprom2: eeprom@51 {
	184	compatible = "atmel,24c02";
	185	reg = <0x51>;
	186	pagesize = <16>;
	187	};
	188
	189	eeprom3: eeprom@52 {
	190	compatible = "atmel,24c02";
	191	reg = <0x52>;
	192	pagesize = <16>;
	193	};
	194
	195	eeprom4: eeprom@53 {
	196	compatible = "atmel,24c02";
	197	reg = <0x53>;
	198	pagesize = <16>;
	199	};
	200
	201	gpio: pca9555@23 {
	202	compatible = "nxp,pca9555";
	203	reg = <0x23>;
	204	gpio-controller;
	205	#gpio-cells = <2>;
	206	};
	207
e3946fe8 TH	208	rtc: ds1672@68 {
	209	compatible = "dallas,ds1672";
	210	reg = <0x68>;
	211	};
	212	};
	213
	214	&i2c2 {
	215	clock-frequency = <100000>;
	216	pinctrl-names = "default";
	217	pinctrl-0 = <&pinctrl_i2c2>;
	218	status = "okay";
	219
	220	pmic: pfuze100@08 {
	221	compatible = "fsl,pfuze100";
	222	reg = <0x08>;
	223
	224	regulators {
	225	sw1a_reg: sw1ab {
	226	regulator-min-microvolt = <300000>;
	227	regulator-max-microvolt = <1875000>;
	228	regulator-boot-on;
	229	regulator-always-on;
	230	regulator-ramp-delay = <6250>;
	231	};
	232
	233	sw1c_reg: sw1c {
	234	regulator-min-microvolt = <300000>;
	235	regulator-max-microvolt = <1875000>;
	236	regulator-boot-on;
	237	regulator-always-on;
	238	regulator-ramp-delay = <6250>;
	239	};
	240
	241	sw2_reg: sw2 {
	242	regulator-min-microvolt = <800000>;
	243	regulator-max-microvolt = <3950000>;
	244	regulator-boot-on;
	245	regulator-always-on;
	246	};
	247
	248	sw3a_reg: sw3a {
	249	regulator-min-microvolt = <400000>;
	250	regulator-max-microvolt = <1975000>;
	251	regulator-boot-on;
	252	regulator-always-on;
	253	};
	254
	255	sw3b_reg: sw3b {
	256	regulator-min-microvolt = <400000>;
	257	regulator-max-microvolt = <1975000>;
	258	regulator-boot-on;
	259	regulator-always-on;
	260	};
	261
	262	sw4_reg: sw4 {
	263	regulator-min-microvolt = <800000>;
	264	regulator-max-microvolt = <3300000>;
	265	};
	266
	267	swbst_reg: swbst {
	268	regulator-min-microvolt = <5000000>;
	269	regulator-max-microvolt = <5150000>;
70b6b438 TH	270	regulator-boot-on;
70b6b438 TH	271	regulator-always-on;
e3946fe8 TH	272	};
	273
	274	snvs_reg: vsnvs {
	275	regulator-min-microvolt = <1000000>;
	276	regulator-max-microvolt = <3000000>;
	277	regulator-boot-on;
	278	regulator-always-on;
	279	};
	280
	281	vref_reg: vrefddr {
	282	regulator-boot-on;
	283	regulator-always-on;
	284	};
	285
	286	vgen1_reg: vgen1 {
	287	regulator-min-microvolt = <800000>;
	288	regulator-max-microvolt = <1550000>;
	289	};
	290
	291	vgen2_reg: vgen2 {
	292	regulator-min-microvolt = <800000>;
	293	regulator-max-microvolt = <1550000>;
	294	};
	295
	296	vgen3_reg: vgen3 {
	297	regulator-min-microvolt = <1800000>;
	298	regulator-max-microvolt = <3300000>;
	299	};
	300
	301	vgen4_reg: vgen4 {
	302	regulator-min-microvolt = <1800000>;
	303	regulator-max-microvolt = <3300000>;
	304	regulator-always-on;
	305	};
	306
	307	vgen5_reg: vgen5 {
	308	regulator-min-microvolt = <1800000>;
	309	regulator-max-microvolt = <3300000>;
	310	regulator-always-on;
	311	};
	312
	313	vgen6_reg: vgen6 {
	314	regulator-min-microvolt = <1800000>;
	315	regulator-max-microvolt = <3300000>;
	316	regulator-always-on;
	317	};
	318	};
	319	};
e3946fe8 TH	320	};
	321
	322	&i2c3 {
	323	clock-frequency = <100000>;
	324	pinctrl-names = "default";
	325	pinctrl-0 = <&pinctrl_i2c3>;
	326	status = "okay";
	327
e3946fe8 TH	328	codec: sgtl5000@0a {
	329	compatible = "fsl,sgtl5000";
	330	reg = <0x0a>;
b26a68c1	331	clocks = <&clks IMX6QDL_CLK_CKO>;
e3946fe8 TH	332	VDDA-supply = <&sw4_reg>;
	333	VDDIO-supply = <&reg_3p3v>;
	334	};
	335
e3946fe8 TH	336	touchscreen: egalax_ts@04 {
	337	compatible = "eeti,egalax_ts";
	338	reg = <0x04>;
	339	interrupt-parent = <&gpio7>;
326cdb16 TH	340	interrupts = <12 2>;
326cdb16 TH	341	wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
e3946fe8	342	};
e3946fe8 TH	343	};
e3946fe8 TH	344
b5f37b76 TH	345	&ldb {
b5f37b76 TH	346	status = "okay";
e3946fe8	347
a7668fda	348	lvds-channel@0 {
b5f37b76 TH	349	fsl,data-mapping = "spwg";
	350	fsl,data-width = <18>;
	351	status = "okay";
	352
	353	display-timings {
	354	native-mode = <&timing0>;
	355	timing0: hsd100pxn1 {
	356	clock-frequency = <65000000>;
	357	hactive = <1024>;
	358	vactive = <768>;
	359	hback-porch = <220>;
	360	hfront-porch = <40>;
	361	vback-porch = <21>;
	362	vfront-porch = <7>;
	363	hsync-len = <60>;
	364	vsync-len = <10>;
	365	};
e3946fe8	366	};
b5f37b76 TH	367	};
	368	};
	369
	370	&pcie {
	371	pinctrl-names = "default";
	372	pinctrl-0 = <&pinctrl_pcie>;
	373	reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
	374	status = "okay";
	375
	376	eth1: sky2@8 { /* MAC/PHY on bus 8 */
	377	compatible = "marvell,sky2";
	378	};
	379	};
e3946fe8	380
aa2b2178 TH	381	&pwm1 {
	382	pinctrl-names = "default";
	383	pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
	384	status = "disabled";
	385	};
	386
	387	&pwm2 {
	388	pinctrl-names = "default";
	389	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
	390	status = "disabled";
	391	};
	392
	393	&pwm3 {
	394	pinctrl-names = "default";
	395	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
	396	status = "disabled";
	397	};
	398
b5f37b76	399	&pwm4 {
f8ea256e TH	400	pinctrl-names = "default", "state_dio";
	401	pinctrl-0 = <&pinctrl_pwm4_backlight>;
	402	pinctrl-1 = <&pinctrl_pwm4_dio>;
b5f37b76 TH	403	status = "okay";
	404	};
	405
	406	&ssi1 {
b5f37b76 TH	407	status = "okay";
	408	};
	409
	410	&ssi2 {
b5f37b76 TH	411	status = "okay";
	412	};
	413
	414	&uart1 {
	415	pinctrl-names = "default";
	416	pinctrl-0 = <&pinctrl_uart1>;
82515ff7 TH	417	uart-has-rtscts;
82515ff7 TH	418	rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
b5f37b76 TH	419	status = "okay";
	420	};
	421
	422	&uart2 {
	423	pinctrl-names = "default";
	424	pinctrl-0 = <&pinctrl_uart2>;
	425	status = "okay";
	426	};
	427
	428	&uart5 {
	429	pinctrl-names = "default";
	430	pinctrl-0 = <&pinctrl_uart5>;
	431	status = "okay";
	432	};
	433
	434	&usbotg {
	435	vbus-supply = <&reg_usb_otg_vbus>;
	436	pinctrl-names = "default";
	437	pinctrl-0 = <&pinctrl_usbotg>;
	438	disable-over-current;
	439	status = "okay";
	440	};
	441
	442	&usbh1 {
	443	vbus-supply = <&reg_usb_h1_vbus>;
	444	status = "okay";
	445	};
	446
	447	&usdhc3 {
3ee12d80	448	pinctrl-names = "default", "state_100mhz", "state_200mhz";
b5f37b76	449	pinctrl-0 = <&pinctrl_usdhc3>;
3ee12d80 TH	450	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
3ee12d80 TH	451	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
89c1a8cf	452	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
b5f37b76	453	vmmc-supply = <&reg_3p3v>;
3ee12d80	454	no-1-8-v; /* firmware will remove if board revision supports */
b5f37b76 TH	455	status = "okay";
	456	};
	457
51a012b7 TH	458	&wdog1 {
	459	status = "disabled";
	460	};
	461
	462	&wdog2 {
	463	pinctrl-names = "default";
	464	pinctrl-0 = <&pinctrl_wdog>;
	465	fsl,ext-reset-output;
	466	status = "okay";
	467	};
	468
b5f37b76 TH	469	&iomuxc {
b5f37b76 TH	470	imx6qdl-gw54xx {
e3946fe8 TH	471	pinctrl_audmux: audmuxgrp {
	472	fsl,pins = <
	473	MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
	474	MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
	475	MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
	476	MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
b5f37b76	477	MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
e3946fe8 TH	478	>;
	479	};
	480
	481	pinctrl_enet: enetgrp {
	482	fsl,pins = <
c007b3a6 UKK	483	MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
	484	MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
	485	MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
	486	MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
	487	MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
	488	MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
	489	MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
	490	MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
	491	MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
	492	MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
	493	MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
	494	MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
e3946fe8 TH	495	MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
	496	MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
	497	MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
	498	MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
	499	>;
	500	};
	501
	502	pinctrl_flexcan1: flexcan1grp {
	503	fsl,pins = <
73e005c1 TH	504	MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
73e005c1 TH	505	MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
b5f37b76 TH	506	MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
	507	>;
	508	};
	509
	510	pinctrl_gpio_leds: gpioledsgrp {
	511	fsl,pins = <
	512	MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
	513	MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
	514	MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
e3946fe8 TH	515	>;
	516	};
	517
	518	pinctrl_gpmi_nand: gpminandgrp {
	519	fsl,pins = <
	520	MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
	521	MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
	522	MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
	523	MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
	524	MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
e3946fe8 TH	525	MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
	526	MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
	527	MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
	528	MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
	529	MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
	530	MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
	531	MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
	532	MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
	533	MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
	534	MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
	535	>;
	536	};
	537
	538	pinctrl_i2c1: i2c1grp {
	539	fsl,pins = <
	540	MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
	541	MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
	542	>;
	543	};
	544
	545	pinctrl_i2c2: i2c2grp {
	546	fsl,pins = <
	547	MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
	548	MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
	549	>;
	550	};
	551
	552	pinctrl_i2c3: i2c3grp {
	553	fsl,pins = <
	554	MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
	555	MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
	556	>;
	557	};
	558
b5f37b76 TH	559	pinctrl_pcie: pciegrp {
	560	fsl,pins = <
	561	MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
	562	MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
	563	>;
	564	};
	565
	566	pinctrl_pps: ppsgrp {
	567	fsl,pins = <
	568	MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
	569	>;
	570	};
	571
aa2b2178 TH	572	pinctrl_pwm1: pwm1grp {
	573	fsl,pins = <
	574	MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
	575	>;
	576	};
	577
	578	pinctrl_pwm2: pwm2grp {
	579	fsl,pins = <
	580	MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
	581	>;
	582	};
	583
	584	pinctrl_pwm3: pwm3grp {
	585	fsl,pins = <
	586	MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
	587	>;
	588	};
	589
f8ea256e	590	pinctrl_pwm4_backlight: pwm4grpbacklight {
b3253241	591	fsl,pins = <
f8ea256e	592	/* LVDS_PWM J6.5 */
b3253241 TH	593	MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
	594	>;
	595	};
	596
f8ea256e TH	597	pinctrl_pwm4_dio: pwm4grpdio {
	598	fsl,pins = <
	599	/* DIO3 J16.4 */
	600	MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
	601	>;
	602	};
	603
e3946fe8 TH	604	pinctrl_uart1: uart1grp {
	605	fsl,pins = <
	606	MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
	607	MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
82515ff7	608	MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
e3946fe8 TH	609	>;
	610	};
	611
	612	pinctrl_uart2: uart2grp {
	613	fsl,pins = <
	614	MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
	615	MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
	616	>;
	617	};
	618
	619	pinctrl_uart5: uart5grp {
	620	fsl,pins = <
	621	MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
	622	MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
	623	>;
	624	};
	625
	626	pinctrl_usbotg: usbotggrp {
	627	fsl,pins = <
	628	MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
b5f37b76	629	MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
e3946fe8 TH	630	>;
	631	};
	632
	633	pinctrl_usdhc3: usdhc3grp {
	634	fsl,pins = <
	635	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
	636	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
	637	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
	638	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
	639	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
	640	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
3ee12d80 TH	641	MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
	642	MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
	643	>;
	644	};
	645
	646	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
	647	fsl,pins = <
	648	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
	649	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
	650	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
	651	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
	652	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
	653	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
	654	MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
	655	MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
	656	>;
	657	};
	658
	659	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
	660	fsl,pins = <
	661	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
	662	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
	663	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
	664	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
	665	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
	666	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
	667	MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
	668	MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
e3946fe8 TH	669	>;
e3946fe8 TH	670	};
51a012b7 TH	671
	672	pinctrl_wdog: wdoggrp {
	673	fsl,pins = <
	674	MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0
	675	>;
	676	};
e3946fe8 TH	677	};
e3946fe8 TH	678	};