projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 0468b2d6 MD |
1 | /* |
| 2 | * Device Tree Source for the r8a7790 SoC | |
| 3 | * | |
| b621f6d4 | 4 | * Copyright (C) 2015 Renesas Electronics Corporation |
| d8913c67 SS |
5 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
| 6 | * Copyright (C) 2014 Cogent Embedded Inc. | |
| 0468b2d6 MD |
7 | * |
| 8 | * This file is licensed under the terms of the GNU General Public License | |
| 9 | * version 2. This program is licensed "as is" without any warranty of any | |
| 10 | * kind, whether express or implied. | |
| 11 | */ | |
| 12 | ||
| 22a1f595 | 13 | #include <dt-bindings/clock/r8a7790-clock.h> |
| 5f75e73c LP |
14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 15 | #include <dt-bindings/interrupt-controller/irq.h> | |
| 4c8eb3c8 | 16 | #include <dt-bindings/power/r8a7790-sysc.h> |
| 5f75e73c | 17 | |
| 0468b2d6 MD |
18 | / { |
| 19 | compatible = "renesas,r8a7790"; | |
| 20 | interrupt-parent = <&gic>; | |
| 8585deb1 TY |
21 | #address-cells = <2>; |
| 22 | #size-cells = <2>; | |
| 0468b2d6 | 23 | |
| 6b1d7c68 WS |
24 | aliases { |
| 25 | i2c0 = &i2c0; | |
| 26 | i2c1 = &i2c1; | |
| 27 | i2c2 = &i2c2; | |
| 28 | i2c3 = &i2c3; | |
| 05f39916 WS |
29 | i2c4 = &iic0; |
| 30 | i2c5 = &iic1; | |
| 31 | i2c6 = &iic2; | |
| 32 | i2c7 = &iic3; | |
| fad6d45c | 33 | spi0 = &qspi; |
| ae8a6146 GU |
34 | spi1 = &msiof0; |
| 35 | spi2 = &msiof1; | |
| 36 | spi3 = &msiof2; | |
| 37 | spi4 = &msiof3; | |
| 9f685bfc BD |
38 | vin0 = &vin0; |
| 39 | vin1 = &vin1; | |
| 40 | vin2 = &vin2; | |
| 41 | vin3 = &vin3; | |
| 6b1d7c68 WS |
42 | }; |
| 43 | ||
| 0468b2d6 MD |
44 | cpus { |
| 45 | #address-cells = <1>; | |
| 46 | #size-cells = <0>; | |
| dc378795 | 47 | enable-method = "renesas,apmu"; |
| 0468b2d6 MD |
48 | |
| 49 | cpu0: cpu@0 { | |
| 50 | device_type = "cpu"; | |
| 51 | compatible = "arm,cortex-a15"; | |
| 52 | reg = <0>; | |
| 53 | clock-frequency = <1300000000>; | |
| b989e138 BC |
54 | voltage-tolerance = <1>; /* 1% */ |
| 55 | clocks = <&cpg_clocks R8A7790_CLK_Z>; | |
| 56 | clock-latency = <300000>; /* 300 us */ | |
| 4c8eb3c8 | 57 | power-domains = <&sysc R8A7790_PD_CA15_CPU0>; |
| fb1cecd4 | 58 | next-level-cache = <&L2_CA15>; |
| b989e138 BC |
59 | |
| 60 | /* kHz - uV - OPPs unknown yet */ | |
| 61 | operating-points = <1400000 1000000>, | |
| 62 | <1225000 1000000>, | |
| 63 | <1050000 1000000>, | |
| 64 | < 875000 1000000>, | |
| 65 | < 700000 1000000>, | |
| 66 | < 350000 1000000>; | |
| 0468b2d6 | 67 | }; |
| c1f95979 MD |
68 | |
| 69 | cpu1: cpu@1 { | |
| 70 | device_type = "cpu"; | |
| 71 | compatible = "arm,cortex-a15"; | |
| 72 | reg = <1>; | |
| 73 | clock-frequency = <1300000000>; | |
| 4c8eb3c8 | 74 | power-domains = <&sysc R8A7790_PD_CA15_CPU1>; |
| fb1cecd4 | 75 | next-level-cache = <&L2_CA15>; |
| c1f95979 MD |
76 | }; |
| 77 | ||
| 78 | cpu2: cpu@2 { | |
| 79 | device_type = "cpu"; | |
| 80 | compatible = "arm,cortex-a15"; | |
| 81 | reg = <2>; | |
| 82 | clock-frequency = <1300000000>; | |
| 4c8eb3c8 | 83 | power-domains = <&sysc R8A7790_PD_CA15_CPU2>; |
| fb1cecd4 | 84 | next-level-cache = <&L2_CA15>; |
| c1f95979 MD |
85 | }; |
| 86 | ||
| 87 | cpu3: cpu@3 { | |
| 88 | device_type = "cpu"; | |
| 89 | compatible = "arm,cortex-a15"; | |
| 90 | reg = <3>; | |
| 91 | clock-frequency = <1300000000>; | |
| 4c8eb3c8 | 92 | power-domains = <&sysc R8A7790_PD_CA15_CPU3>; |
| fb1cecd4 | 93 | next-level-cache = <&L2_CA15>; |
| c1f95979 | 94 | }; |
| 2007e74c | 95 | |
| 1eed15e4 | 96 | cpu4: cpu@100 { |
| 2007e74c MD |
97 | device_type = "cpu"; |
| 98 | compatible = "arm,cortex-a7"; | |
| 99 | reg = <0x100>; | |
| 100 | clock-frequency = <780000000>; | |
| 4c8eb3c8 | 101 | power-domains = <&sysc R8A7790_PD_CA7_CPU0>; |
| fb1cecd4 | 102 | next-level-cache = <&L2_CA7>; |
| 2007e74c MD |
103 | }; |
| 104 | ||
| 1eed15e4 | 105 | cpu5: cpu@101 { |
| 2007e74c MD |
106 | device_type = "cpu"; |
| 107 | compatible = "arm,cortex-a7"; | |
| 108 | reg = <0x101>; | |
| 109 | clock-frequency = <780000000>; | |
| 4c8eb3c8 | 110 | power-domains = <&sysc R8A7790_PD_CA7_CPU1>; |
| fb1cecd4 | 111 | next-level-cache = <&L2_CA7>; |
| 2007e74c MD |
112 | }; |
| 113 | ||
| 1eed15e4 | 114 | cpu6: cpu@102 { |
| 2007e74c MD |
115 | device_type = "cpu"; |
| 116 | compatible = "arm,cortex-a7"; | |
| 117 | reg = <0x102>; | |
| 118 | clock-frequency = <780000000>; | |
| 4c8eb3c8 | 119 | power-domains = <&sysc R8A7790_PD_CA7_CPU2>; |
| fb1cecd4 | 120 | next-level-cache = <&L2_CA7>; |
| 2007e74c MD |
121 | }; |
| 122 | ||
| 1eed15e4 | 123 | cpu7: cpu@103 { |
| 2007e74c MD |
124 | device_type = "cpu"; |
| 125 | compatible = "arm,cortex-a7"; | |
| 126 | reg = <0x103>; | |
| 127 | clock-frequency = <780000000>; | |
| 4c8eb3c8 | 128 | power-domains = <&sysc R8A7790_PD_CA7_CPU3>; |
| fb1cecd4 | 129 | next-level-cache = <&L2_CA7>; |
| 2007e74c | 130 | }; |
| 2c3de367 GU |
131 | |
| 132 | L2_CA15: cache-controller@0 { | |
| 133 | compatible = "cache"; | |
| 134 | reg = <0>; | |
| 135 | power-domains = <&sysc R8A7790_PD_CA15_SCU>; | |
| 136 | cache-unified; | |
| 137 | cache-level = <2>; | |
| 138 | }; | |
| 139 | ||
| 140 | L2_CA7: cache-controller@100 { | |
| 141 | compatible = "cache"; | |
| 142 | reg = <0x100>; | |
| 143 | power-domains = <&sysc R8A7790_PD_CA7_SCU>; | |
| 144 | cache-unified; | |
| 145 | cache-level = <2>; | |
| 146 | }; | |
| 0468b2d6 MD |
147 | }; |
| 148 | ||
| a8b805f3 KM |
149 | thermal-zones { |
| 150 | cpu_thermal: cpu-thermal { | |
| 151 | polling-delay-passive = <0>; | |
| 152 | polling-delay = <0>; | |
| 153 | ||
| 154 | thermal-sensors = <&thermal>; | |
| 155 | ||
| 156 | trips { | |
| 157 | cpu-crit { | |
| 158 | temperature = <115000>; | |
| 159 | hysteresis = <0>; | |
| 160 | type = "critical"; | |
| 161 | }; | |
| 162 | }; | |
| 163 | cooling-maps { | |
| 164 | }; | |
| 165 | }; | |
| 166 | }; | |
| 167 | ||
| dc378795 MD |
168 | apmu@e6151000 { |
| 169 | compatible = "renesas,r8a7790-apmu", "renesas,apmu"; | |
| 170 | reg = <0 0xe6151000 0 0x188>; | |
| 171 | cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; | |
| 172 | }; | |
| 173 | ||
| 174 | apmu@e6152000 { | |
| 175 | compatible = "renesas,r8a7790-apmu", "renesas,apmu"; | |
| 176 | reg = <0 0xe6152000 0 0x188>; | |
| 177 | cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; | |
| 178 | }; | |
| 179 | ||
| 0468b2d6 | 180 | gic: interrupt-controller@f1001000 { |
| e715e9c5 | 181 | compatible = "arm,gic-400"; |
| 0468b2d6 MD |
182 | #interrupt-cells = <3>; |
| 183 | #address-cells = <0>; | |
| 184 | interrupt-controller; | |
| 8585deb1 TY |
185 | reg = <0 0xf1001000 0 0x1000>, |
| 186 | <0 0xf1002000 0 0x1000>, | |
| 187 | <0 0xf1004000 0 0x2000>, | |
| 188 | <0 0xf1006000 0 0x2000>; | |
| 3abb4d5f | 189 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
| 0468b2d6 MD |
190 | }; |
| 191 | ||
| 23de2278 | 192 | gpio0: gpio@e6050000 { |
| f98e10c8 | 193 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 194 | reg = <0 0xe6050000 0 0x50>; |
| 3abb4d5f | 195 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
196 | #gpio-cells = <2>; |
| 197 | gpio-controller; | |
| 198 | gpio-ranges = <&pfc 0 0 32>; | |
| 199 | #interrupt-cells = <2>; | |
| 200 | interrupt-controller; | |
| 81f6883f | 201 | clocks = <&mstp9_clks R8A7790_CLK_GPIO0>; |
| 36ee3c27 | 202 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| f98e10c8 LP |
203 | }; |
| 204 | ||
| 23de2278 | 205 | gpio1: gpio@e6051000 { |
| f98e10c8 | 206 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 207 | reg = <0 0xe6051000 0 0x50>; |
| 3abb4d5f | 208 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
209 | #gpio-cells = <2>; |
| 210 | gpio-controller; | |
| 56a2182f | 211 | gpio-ranges = <&pfc 0 32 30>; |
| f98e10c8 LP |
212 | #interrupt-cells = <2>; |
| 213 | interrupt-controller; | |
| 81f6883f | 214 | clocks = <&mstp9_clks R8A7790_CLK_GPIO1>; |
| 36ee3c27 | 215 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| f98e10c8 LP |
216 | }; |
| 217 | ||
| 23de2278 | 218 | gpio2: gpio@e6052000 { |
| f98e10c8 | 219 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 220 | reg = <0 0xe6052000 0 0x50>; |
| 3abb4d5f | 221 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
222 | #gpio-cells = <2>; |
| 223 | gpio-controller; | |
| 56a2182f | 224 | gpio-ranges = <&pfc 0 64 30>; |
| f98e10c8 LP |
225 | #interrupt-cells = <2>; |
| 226 | interrupt-controller; | |
| 81f6883f | 227 | clocks = <&mstp9_clks R8A7790_CLK_GPIO2>; |
| 36ee3c27 | 228 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| f98e10c8 LP |
229 | }; |
| 230 | ||
| 23de2278 | 231 | gpio3: gpio@e6053000 { |
| f98e10c8 | 232 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 233 | reg = <0 0xe6053000 0 0x50>; |
| 3abb4d5f | 234 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
235 | #gpio-cells = <2>; |
| 236 | gpio-controller; | |
| 237 | gpio-ranges = <&pfc 0 96 32>; | |
| 238 | #interrupt-cells = <2>; | |
| 239 | interrupt-controller; | |
| 81f6883f | 240 | clocks = <&mstp9_clks R8A7790_CLK_GPIO3>; |
| 36ee3c27 | 241 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| f98e10c8 LP |
242 | }; |
| 243 | ||
| 23de2278 | 244 | gpio4: gpio@e6054000 { |
| f98e10c8 | 245 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 246 | reg = <0 0xe6054000 0 0x50>; |
| 3abb4d5f | 247 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
248 | #gpio-cells = <2>; |
| 249 | gpio-controller; | |
| 250 | gpio-ranges = <&pfc 0 128 32>; | |
| 251 | #interrupt-cells = <2>; | |
| 252 | interrupt-controller; | |
| 81f6883f | 253 | clocks = <&mstp9_clks R8A7790_CLK_GPIO4>; |
| 36ee3c27 | 254 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| f98e10c8 LP |
255 | }; |
| 256 | ||
| 23de2278 | 257 | gpio5: gpio@e6055000 { |
| f98e10c8 | 258 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 259 | reg = <0 0xe6055000 0 0x50>; |
| 3abb4d5f | 260 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
261 | #gpio-cells = <2>; |
| 262 | gpio-controller; | |
| 263 | gpio-ranges = <&pfc 0 160 32>; | |
| 264 | #interrupt-cells = <2>; | |
| 265 | interrupt-controller; | |
| 81f6883f | 266 | clocks = <&mstp9_clks R8A7790_CLK_GPIO5>; |
| 36ee3c27 | 267 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| f98e10c8 LP |
268 | }; |
| 269 | ||
| a8b805f3 KM |
270 | thermal: thermal@e61f0000 { |
| 271 | compatible = "renesas,thermal-r8a7790", | |
| 272 | "renesas,rcar-gen2-thermal", | |
| 273 | "renesas,rcar-thermal"; | |
| 03e2f56b | 274 | reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; |
| 3abb4d5f | 275 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
| d3a439db | 276 | clocks = <&mstp5_clks R8A7790_CLK_THERMAL>; |
| 36ee3c27 | 277 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| a8b805f3 | 278 | #thermal-sensor-cells = <0>; |
| 03e2f56b MD |
279 | }; |
| 280 | ||
| 0468b2d6 MD |
281 | timer { |
| 282 | compatible = "arm,armv7-timer"; | |
| 3abb4d5f SH |
283 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 284 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
| 285 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
| 286 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
| 0468b2d6 | 287 | }; |
| 8f5ec0a5 | 288 | |
| 39cf6d73 | 289 | cmt0: timer@ffca0000 { |
| 37757030 | 290 | compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; |
| 39cf6d73 | 291 | reg = <0 0xffca0000 0 0x1004>; |
| 3abb4d5f SH |
292 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, |
| 293 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; | |
| 39cf6d73 LP |
294 | clocks = <&mstp1_clks R8A7790_CLK_CMT0>; |
| 295 | clock-names = "fck"; | |
| 36ee3c27 | 296 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 39cf6d73 LP |
297 | |
| 298 | renesas,channels-mask = <0x60>; | |
| 299 | ||
| 300 | status = "disabled"; | |
| 301 | }; | |
| 302 | ||
| 303 | cmt1: timer@e6130000 { | |
| 37757030 | 304 | compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; |
| 39cf6d73 | 305 | reg = <0 0xe6130000 0 0x1004>; |
| 3abb4d5f SH |
306 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
| 307 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, | |
| 308 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, | |
| 309 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
| 310 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, | |
| 311 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, | |
| 312 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, | |
| 313 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; | |
| 39cf6d73 LP |
314 | clocks = <&mstp3_clks R8A7790_CLK_CMT1>; |
| 315 | clock-names = "fck"; | |
| 36ee3c27 | 316 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 39cf6d73 LP |
317 | |
| 318 | renesas,channels-mask = <0xff>; | |
| 319 | ||
| 320 | status = "disabled"; | |
| 321 | }; | |
| 322 | ||
| 8f5ec0a5 | 323 | irqc0: interrupt-controller@e61c0000 { |
| 220fc352 | 324 | compatible = "renesas,irqc-r8a7790", "renesas,irqc"; |
| 8f5ec0a5 MD |
325 | #interrupt-cells = <2>; |
| 326 | interrupt-controller; | |
| 8585deb1 | 327 | reg = <0 0xe61c0000 0 0x200>; |
| 3abb4d5f SH |
328 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
| 329 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, | |
| 330 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, | |
| 331 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; | |
| 61624caf | 332 | clocks = <&mstp4_clks R8A7790_CLK_IRQC>; |
| 36ee3c27 | 333 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 8f5ec0a5 | 334 | }; |
| 8c9b1aa4 | 335 | |
| b9fea49c | 336 | dmac0: dma-controller@e6700000 { |
| 4af0a664 | 337 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
| b9fea49c | 338 | reg = <0 0xe6700000 0 0x20000>; |
| 3abb4d5f SH |
339 | interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH |
| 340 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
| 341 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
| 342 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
| 343 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
| 344 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
| 345 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
| 346 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
| 347 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
| 348 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
| 349 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
| 350 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
| 351 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
| 352 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
| 353 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
| 354 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; | |
| b9fea49c LP |
355 | interrupt-names = "error", |
| 356 | "ch0", "ch1", "ch2", "ch3", | |
| 357 | "ch4", "ch5", "ch6", "ch7", | |
| 358 | "ch8", "ch9", "ch10", "ch11", | |
| 359 | "ch12", "ch13", "ch14"; | |
| 360 | clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>; | |
| 361 | clock-names = "fck"; | |
| 36ee3c27 | 362 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| b9fea49c LP |
363 | #dma-cells = <1>; |
| 364 | dma-channels = <15>; | |
| 365 | }; | |
| 366 | ||
| 367 | dmac1: dma-controller@e6720000 { | |
| 4af0a664 | 368 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
| b9fea49c | 369 | reg = <0 0xe6720000 0 0x20000>; |
| 3abb4d5f SH |
370 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH |
| 371 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
| 372 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
| 373 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
| 374 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
| 375 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
| 376 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
| 377 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
| 378 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
| 379 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
| 380 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
| 381 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
| 382 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
| 383 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
| 384 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
| 385 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; | |
| b9fea49c LP |
386 | interrupt-names = "error", |
| 387 | "ch0", "ch1", "ch2", "ch3", | |
| 388 | "ch4", "ch5", "ch6", "ch7", | |
| 389 | "ch8", "ch9", "ch10", "ch11", | |
| 390 | "ch12", "ch13", "ch14"; | |
| 391 | clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>; | |
| 392 | clock-names = "fck"; | |
| 36ee3c27 | 393 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| b9fea49c LP |
394 | #dma-cells = <1>; |
| 395 | dma-channels = <15>; | |
| 396 | }; | |
| ba3240be KM |
397 | |
| 398 | audma0: dma-controller@ec700000 { | |
| 4af0a664 | 399 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
| ba3240be | 400 | reg = <0 0xec700000 0 0x10000>; |
| 3abb4d5f SH |
401 | interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH |
| 402 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
| 403 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
| 404 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
| 405 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
| 406 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
| 407 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
| 408 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
| 409 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
| 410 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
| 411 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
| 412 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
| 413 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
| 414 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; | |
| ba3240be KM |
415 | interrupt-names = "error", |
| 416 | "ch0", "ch1", "ch2", "ch3", | |
| 417 | "ch4", "ch5", "ch6", "ch7", | |
| 418 | "ch8", "ch9", "ch10", "ch11", | |
| 419 | "ch12"; | |
| 420 | clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>; | |
| 421 | clock-names = "fck"; | |
| 36ee3c27 | 422 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ba3240be KM |
423 | #dma-cells = <1>; |
| 424 | dma-channels = <13>; | |
| 425 | }; | |
| 426 | ||
| 427 | audma1: dma-controller@ec720000 { | |
| 4af0a664 | 428 | compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; |
| ba3240be | 429 | reg = <0 0xec720000 0 0x10000>; |
| 3abb4d5f SH |
430 | interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH |
| 431 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
| 432 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
| 433 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH | |
| 434 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
| 435 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
| 436 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
| 437 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
| 438 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
| 439 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
| 440 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
| 441 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
| 442 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
| 443 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; | |
| ba3240be KM |
444 | interrupt-names = "error", |
| 445 | "ch0", "ch1", "ch2", "ch3", | |
| 446 | "ch4", "ch5", "ch6", "ch7", | |
| 447 | "ch8", "ch9", "ch10", "ch11", | |
| 448 | "ch12"; | |
| 449 | clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>; | |
| 450 | clock-names = "fck"; | |
| 36ee3c27 | 451 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ba3240be KM |
452 | #dma-cells = <1>; |
| 453 | dma-channels = <13>; | |
| 454 | }; | |
| 455 | ||
| a3ff2090 | 456 | usb_dmac0: dma-controller@e65a0000 { |
| d01c8bec | 457 | compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; |
| a3ff2090 | 458 | reg = <0 0xe65a0000 0 0x100>; |
| 3abb4d5f SH |
459 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH |
| 460 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
| a3ff2090 YS |
461 | interrupt-names = "ch0", "ch1"; |
| 462 | clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>; | |
| 36ee3c27 | 463 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| a3ff2090 YS |
464 | #dma-cells = <1>; |
| 465 | dma-channels = <2>; | |
| 466 | }; | |
| 467 | ||
| 468 | usb_dmac1: dma-controller@e65b0000 { | |
| d01c8bec | 469 | compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; |
| a3ff2090 | 470 | reg = <0 0xe65b0000 0 0x100>; |
| 3abb4d5f SH |
471 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH |
| 472 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
| a3ff2090 YS |
473 | interrupt-names = "ch0", "ch1"; |
| 474 | clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>; | |
| 36ee3c27 | 475 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| a3ff2090 YS |
476 | #dma-cells = <1>; |
| 477 | dma-channels = <2>; | |
| 478 | }; | |
| 479 | ||
| edd2b9f4 GL |
480 | i2c0: i2c@e6508000 { |
| 481 | #address-cells = <1>; | |
| 482 | #size-cells = <0>; | |
| 483 | compatible = "renesas,i2c-r8a7790"; | |
| 484 | reg = <0 0xe6508000 0 0x40>; | |
| 3abb4d5f | 485 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
| 2450badf | 486 | clocks = <&mstp9_clks R8A7790_CLK_I2C0>; |
| 36ee3c27 | 487 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ac8e7f31 | 488 | i2c-scl-internal-delay-ns = <110>; |
| edd2b9f4 GL |
489 | status = "disabled"; |
| 490 | }; | |
| 491 | ||
| 492 | i2c1: i2c@e6518000 { | |
| 493 | #address-cells = <1>; | |
| 494 | #size-cells = <0>; | |
| 495 | compatible = "renesas,i2c-r8a7790"; | |
| 496 | reg = <0 0xe6518000 0 0x40>; | |
| 3abb4d5f | 497 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
| 2450badf | 498 | clocks = <&mstp9_clks R8A7790_CLK_I2C1>; |
| 36ee3c27 | 499 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ac8e7f31 | 500 | i2c-scl-internal-delay-ns = <6>; |
| edd2b9f4 GL |
501 | status = "disabled"; |
| 502 | }; | |
| 503 | ||
| 504 | i2c2: i2c@e6530000 { | |
| 505 | #address-cells = <1>; | |
| 506 | #size-cells = <0>; | |
| 507 | compatible = "renesas,i2c-r8a7790"; | |
| 508 | reg = <0 0xe6530000 0 0x40>; | |
| 3abb4d5f | 509 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
| 2450badf | 510 | clocks = <&mstp9_clks R8A7790_CLK_I2C2>; |
| 36ee3c27 | 511 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ac8e7f31 | 512 | i2c-scl-internal-delay-ns = <6>; |
| edd2b9f4 GL |
513 | status = "disabled"; |
| 514 | }; | |
| 515 | ||
| 516 | i2c3: i2c@e6540000 { | |
| 517 | #address-cells = <1>; | |
| 518 | #size-cells = <0>; | |
| 519 | compatible = "renesas,i2c-r8a7790"; | |
| 520 | reg = <0 0xe6540000 0 0x40>; | |
| 3abb4d5f | 521 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
| 2450badf | 522 | clocks = <&mstp9_clks R8A7790_CLK_I2C3>; |
| 36ee3c27 | 523 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ac8e7f31 | 524 | i2c-scl-internal-delay-ns = <110>; |
| edd2b9f4 GL |
525 | status = "disabled"; |
| 526 | }; | |
| 527 | ||
| 05f39916 WS |
528 | iic0: i2c@e6500000 { |
| 529 | #address-cells = <1>; | |
| 530 | #size-cells = <0>; | |
| 531 | compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; | |
| 532 | reg = <0 0xe6500000 0 0x425>; | |
| 3abb4d5f | 533 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
| 05f39916 | 534 | clocks = <&mstp3_clks R8A7790_CLK_IIC0>; |
| badf8570 NS |
535 | dmas = <&dmac0 0x61>, <&dmac0 0x62>, |
| 536 | <&dmac1 0x61>, <&dmac1 0x62>; | |
| 537 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 538 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 05f39916 WS |
539 | status = "disabled"; |
| 540 | }; | |
| 541 | ||
| 542 | iic1: i2c@e6510000 { | |
| 543 | #address-cells = <1>; | |
| 544 | #size-cells = <0>; | |
| 545 | compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; | |
| 546 | reg = <0 0xe6510000 0 0x425>; | |
| 3abb4d5f | 547 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
| 05f39916 | 548 | clocks = <&mstp3_clks R8A7790_CLK_IIC1>; |
| badf8570 NS |
549 | dmas = <&dmac0 0x65>, <&dmac0 0x66>, |
| 550 | <&dmac1 0x65>, <&dmac1 0x66>; | |
| 551 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 552 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 05f39916 WS |
553 | status = "disabled"; |
| 554 | }; | |
| 555 | ||
| 556 | iic2: i2c@e6520000 { | |
| 557 | #address-cells = <1>; | |
| 558 | #size-cells = <0>; | |
| 559 | compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; | |
| 560 | reg = <0 0xe6520000 0 0x425>; | |
| 3abb4d5f | 561 | interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; |
| 05f39916 | 562 | clocks = <&mstp3_clks R8A7790_CLK_IIC2>; |
| badf8570 NS |
563 | dmas = <&dmac0 0x69>, <&dmac0 0x6a>, |
| 564 | <&dmac1 0x69>, <&dmac1 0x6a>; | |
| 565 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 566 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 05f39916 WS |
567 | status = "disabled"; |
| 568 | }; | |
| 569 | ||
| 570 | iic3: i2c@e60b0000 { | |
| 571 | #address-cells = <1>; | |
| 572 | #size-cells = <0>; | |
| 573 | compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; | |
| 574 | reg = <0 0xe60b0000 0 0x425>; | |
| 3abb4d5f | 575 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; |
| 05f39916 | 576 | clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>; |
| badf8570 NS |
577 | dmas = <&dmac0 0x77>, <&dmac0 0x78>, |
| 578 | <&dmac1 0x77>, <&dmac1 0x78>; | |
| 579 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 580 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 05f39916 WS |
581 | status = "disabled"; |
| 582 | }; | |
| 583 | ||
| 22c2b78d | 584 | mmcif0: mmc@ee200000 { |
| 063e8560 | 585 | compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; |
| 8c9b1aa4 | 586 | reg = <0 0xee200000 0 0x80>; |
| 3abb4d5f | 587 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 588 | clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>; |
| badf8570 NS |
589 | dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, |
| 590 | <&dmac1 0xd1>, <&dmac1 0xd2>; | |
| 591 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 592 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 8c9b1aa4 GL |
593 | reg-io-width = <4>; |
| 594 | status = "disabled"; | |
| 96370057 | 595 | max-frequency = <97500000>; |
| 8c9b1aa4 GL |
596 | }; |
| 597 | ||
| b718aa44 | 598 | mmcif1: mmc@ee220000 { |
| 063e8560 | 599 | compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; |
| 8c9b1aa4 | 600 | reg = <0 0xee220000 0 0x80>; |
| 3abb4d5f | 601 | interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 602 | clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; |
| badf8570 NS |
603 | dmas = <&dmac0 0xe1>, <&dmac0 0xe2>, |
| 604 | <&dmac1 0xe1>, <&dmac1 0xe2>; | |
| 605 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 606 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 8c9b1aa4 GL |
607 | reg-io-width = <4>; |
| 608 | status = "disabled"; | |
| 96370057 | 609 | max-frequency = <97500000>; |
| 8c9b1aa4 GL |
610 | }; |
| 611 | ||
| 9694c778 LP |
612 | pfc: pfc@e6060000 { |
| 613 | compatible = "renesas,pfc-r8a7790"; | |
| 614 | reg = <0 0xe6060000 0 0x250>; | |
| 615 | }; | |
| 55689bfa | 616 | |
| b718aa44 | 617 | sdhi0: sd@ee100000 { |
| df1d0584 | 618 | compatible = "renesas,sdhi-r8a7790"; |
| 66f47ed0 | 619 | reg = <0 0xee100000 0 0x328>; |
| 3abb4d5f | 620 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 621 | clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; |
| badf8570 NS |
622 | dmas = <&dmac0 0xcd>, <&dmac0 0xce>, |
| 623 | <&dmac1 0xcd>, <&dmac1 0xce>; | |
| 624 | dma-names = "tx", "rx", "tx", "rx"; | |
| 21c7d0fc | 625 | max-frequency = <195000000>; |
| 36ee3c27 | 626 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 8c9b1aa4 GL |
627 | status = "disabled"; |
| 628 | }; | |
| 629 | ||
| b718aa44 | 630 | sdhi1: sd@ee120000 { |
| df1d0584 | 631 | compatible = "renesas,sdhi-r8a7790"; |
| 66f47ed0 | 632 | reg = <0 0xee120000 0 0x328>; |
| 3abb4d5f | 633 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 634 | clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; |
| badf8570 NS |
635 | dmas = <&dmac0 0xc9>, <&dmac0 0xca>, |
| 636 | <&dmac1 0xc9>, <&dmac1 0xca>; | |
| 637 | dma-names = "tx", "rx", "tx", "rx"; | |
| 21c7d0fc | 638 | max-frequency = <195000000>; |
| 36ee3c27 | 639 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 8c9b1aa4 GL |
640 | status = "disabled"; |
| 641 | }; | |
| 642 | ||
| b718aa44 | 643 | sdhi2: sd@ee140000 { |
| df1d0584 | 644 | compatible = "renesas,sdhi-r8a7790"; |
| 8c9b1aa4 | 645 | reg = <0 0xee140000 0 0x100>; |
| 3abb4d5f | 646 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 647 | clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; |
| badf8570 NS |
648 | dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, |
| 649 | <&dmac1 0xc1>, <&dmac1 0xc2>; | |
| 650 | dma-names = "tx", "rx", "tx", "rx"; | |
| 22f708b0 | 651 | max-frequency = <97500000>; |
| 36ee3c27 | 652 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 8c9b1aa4 GL |
653 | status = "disabled"; |
| 654 | }; | |
| 655 | ||
| b718aa44 | 656 | sdhi3: sd@ee160000 { |
| df1d0584 | 657 | compatible = "renesas,sdhi-r8a7790"; |
| 8c9b1aa4 | 658 | reg = <0 0xee160000 0 0x100>; |
| 3abb4d5f | 659 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 660 | clocks = <&mstp3_clks R8A7790_CLK_SDHI3>; |
| badf8570 NS |
661 | dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, |
| 662 | <&dmac1 0xd3>, <&dmac1 0xd4>; | |
| 663 | dma-names = "tx", "rx", "tx", "rx"; | |
| 22f708b0 | 664 | max-frequency = <97500000>; |
| 36ee3c27 | 665 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 8c9b1aa4 GL |
666 | status = "disabled"; |
| 667 | }; | |
| 22a1f595 | 668 | |
| 597af20f | 669 | scifa0: serial@e6c40000 { |
| a20dc9f2 GU |
670 | compatible = "renesas,scifa-r8a7790", |
| 671 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
| 597af20f | 672 | reg = <0 0xe6c40000 0 64>; |
| 3abb4d5f | 673 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f | 674 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; |
| 6c6e12a1 | 675 | clock-names = "fck"; |
| badf8570 NS |
676 | dmas = <&dmac0 0x21>, <&dmac0 0x22>, |
| 677 | <&dmac1 0x21>, <&dmac1 0x22>; | |
| 678 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 679 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 597af20f LP |
680 | status = "disabled"; |
| 681 | }; | |
| 682 | ||
| 683 | scifa1: serial@e6c50000 { | |
| a20dc9f2 GU |
684 | compatible = "renesas,scifa-r8a7790", |
| 685 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
| 597af20f | 686 | reg = <0 0xe6c50000 0 64>; |
| 3abb4d5f | 687 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f | 688 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>; |
| 6c6e12a1 | 689 | clock-names = "fck"; |
| badf8570 NS |
690 | dmas = <&dmac0 0x25>, <&dmac0 0x26>, |
| 691 | <&dmac1 0x25>, <&dmac1 0x26>; | |
| 692 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 693 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 597af20f LP |
694 | status = "disabled"; |
| 695 | }; | |
| 696 | ||
| 697 | scifa2: serial@e6c60000 { | |
| a20dc9f2 GU |
698 | compatible = "renesas,scifa-r8a7790", |
| 699 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
| 597af20f | 700 | reg = <0 0xe6c60000 0 64>; |
| 3abb4d5f | 701 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f | 702 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>; |
| 6c6e12a1 | 703 | clock-names = "fck"; |
| badf8570 NS |
704 | dmas = <&dmac0 0x27>, <&dmac0 0x28>, |
| 705 | <&dmac1 0x27>, <&dmac1 0x28>; | |
| 706 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 707 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 597af20f LP |
708 | status = "disabled"; |
| 709 | }; | |
| 710 | ||
| 711 | scifb0: serial@e6c20000 { | |
| a20dc9f2 GU |
712 | compatible = "renesas,scifb-r8a7790", |
| 713 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
| 597af20f | 714 | reg = <0 0xe6c20000 0 64>; |
| 3abb4d5f | 715 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f | 716 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>; |
| 6c6e12a1 | 717 | clock-names = "fck"; |
| badf8570 NS |
718 | dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, |
| 719 | <&dmac1 0x3d>, <&dmac1 0x3e>; | |
| 720 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 721 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 597af20f LP |
722 | status = "disabled"; |
| 723 | }; | |
| 724 | ||
| 725 | scifb1: serial@e6c30000 { | |
| a20dc9f2 GU |
726 | compatible = "renesas,scifb-r8a7790", |
| 727 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
| 597af20f | 728 | reg = <0 0xe6c30000 0 64>; |
| 3abb4d5f | 729 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f | 730 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>; |
| 6c6e12a1 | 731 | clock-names = "fck"; |
| badf8570 NS |
732 | dmas = <&dmac0 0x19>, <&dmac0 0x1a>, |
| 733 | <&dmac1 0x19>, <&dmac1 0x1a>; | |
| 734 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 735 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 597af20f LP |
736 | status = "disabled"; |
| 737 | }; | |
| 738 | ||
| 739 | scifb2: serial@e6ce0000 { | |
| a20dc9f2 GU |
740 | compatible = "renesas,scifb-r8a7790", |
| 741 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
| 597af20f | 742 | reg = <0 0xe6ce0000 0 64>; |
| 3abb4d5f | 743 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f | 744 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>; |
| 6c6e12a1 | 745 | clock-names = "fck"; |
| badf8570 NS |
746 | dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, |
| 747 | <&dmac1 0x1d>, <&dmac1 0x1e>; | |
| 748 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 749 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 597af20f LP |
750 | status = "disabled"; |
| 751 | }; | |
| 752 | ||
| 753 | scif0: serial@e6e60000 { | |
| a20dc9f2 GU |
754 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", |
| 755 | "renesas,scif"; | |
| 597af20f | 756 | reg = <0 0xe6e60000 0 64>; |
| 3abb4d5f | 757 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
| 42af65e8 GU |
758 | clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>, |
| 759 | <&scif_clk>; | |
| 760 | clock-names = "fck", "brg_int", "scif_clk"; | |
| badf8570 NS |
761 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>, |
| 762 | <&dmac1 0x29>, <&dmac1 0x2a>; | |
| 763 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 764 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 597af20f LP |
765 | status = "disabled"; |
| 766 | }; | |
| 767 | ||
| 768 | scif1: serial@e6e68000 { | |
| a20dc9f2 GU |
769 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", |
| 770 | "renesas,scif"; | |
| 597af20f | 771 | reg = <0 0xe6e68000 0 64>; |
| 3abb4d5f | 772 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
| 42af65e8 GU |
773 | clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>, |
| 774 | <&scif_clk>; | |
| 775 | clock-names = "fck", "brg_int", "scif_clk"; | |
| badf8570 NS |
776 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, |
| 777 | <&dmac1 0x2d>, <&dmac1 0x2e>; | |
| 778 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 779 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 597af20f LP |
780 | status = "disabled"; |
| 781 | }; | |
| 782 | ||
| 022869a2 GU |
783 | scif2: serial@e6e56000 { |
| 784 | compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", | |
| 785 | "renesas,scif"; | |
| 786 | reg = <0 0xe6e56000 0 64>; | |
| 787 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
| 788 | clocks = <&mstp3_clks R8A7790_CLK_SCIF2>, <&zs_clk>, | |
| 789 | <&scif_clk>; | |
| 790 | clock-names = "fck", "brg_int", "scif_clk"; | |
| badf8570 NS |
791 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, |
| 792 | <&dmac1 0x2b>, <&dmac1 0x2c>; | |
| 793 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 794 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 022869a2 GU |
795 | status = "disabled"; |
| 796 | }; | |
| 797 | ||
| 597af20f | 798 | hscif0: serial@e62c0000 { |
| a20dc9f2 GU |
799 | compatible = "renesas,hscif-r8a7790", |
| 800 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
| 597af20f | 801 | reg = <0 0xe62c0000 0 96>; |
| 3abb4d5f | 802 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
| 42af65e8 GU |
803 | clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>, |
| 804 | <&scif_clk>; | |
| 805 | clock-names = "fck", "brg_int", "scif_clk"; | |
| badf8570 NS |
806 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>, |
| 807 | <&dmac1 0x39>, <&dmac1 0x3a>; | |
| 808 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 809 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 597af20f LP |
810 | status = "disabled"; |
| 811 | }; | |
| 812 | ||
| 813 | hscif1: serial@e62c8000 { | |
| a20dc9f2 GU |
814 | compatible = "renesas,hscif-r8a7790", |
| 815 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
| 597af20f | 816 | reg = <0 0xe62c8000 0 96>; |
| 3abb4d5f | 817 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
| 42af65e8 GU |
818 | clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>, |
| 819 | <&scif_clk>; | |
| 820 | clock-names = "fck", "brg_int", "scif_clk"; | |
| badf8570 NS |
821 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, |
| 822 | <&dmac1 0x4d>, <&dmac1 0x4e>; | |
| 823 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 824 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 597af20f LP |
825 | status = "disabled"; |
| 826 | }; | |
| 827 | ||
| d8913c67 SS |
828 | ether: ethernet@ee700000 { |
| 829 | compatible = "renesas,ether-r8a7790"; | |
| 830 | reg = <0 0xee700000 0 0x400>; | |
| 3abb4d5f | 831 | interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; |
| d8913c67 | 832 | clocks = <&mstp8_clks R8A7790_CLK_ETHER>; |
| 36ee3c27 | 833 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| d8913c67 SS |
834 | phy-mode = "rmii"; |
| 835 | #address-cells = <1>; | |
| 836 | #size-cells = <0>; | |
| 837 | status = "disabled"; | |
| 838 | }; | |
| 839 | ||
| f25d6b97 | 840 | avb: ethernet@e6800000 { |
| d92df7e5 SH |
841 | compatible = "renesas,etheravb-r8a7790", |
| 842 | "renesas,etheravb-rcar-gen2"; | |
| f25d6b97 | 843 | reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; |
| 3abb4d5f | 844 | interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; |
| f25d6b97 | 845 | clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>; |
| 36ee3c27 | 846 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| f25d6b97 SS |
847 | #address-cells = <1>; |
| 848 | #size-cells = <0>; | |
| 849 | status = "disabled"; | |
| 850 | }; | |
| 851 | ||
| cde630f7 VB |
852 | sata0: sata@ee300000 { |
| 853 | compatible = "renesas,sata-r8a7790"; | |
| 854 | reg = <0 0xee300000 0 0x2000>; | |
| 3abb4d5f | 855 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
| cde630f7 | 856 | clocks = <&mstp8_clks R8A7790_CLK_SATA0>; |
| 36ee3c27 | 857 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| cde630f7 VB |
858 | status = "disabled"; |
| 859 | }; | |
| 860 | ||
| 861 | sata1: sata@ee500000 { | |
| 862 | compatible = "renesas,sata-r8a7790"; | |
| 863 | reg = <0 0xee500000 0 0x2000>; | |
| 3abb4d5f | 864 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
| cde630f7 | 865 | clocks = <&mstp8_clks R8A7790_CLK_SATA1>; |
| 36ee3c27 | 866 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| cde630f7 VB |
867 | status = "disabled"; |
| 868 | }; | |
| 869 | ||
| ae0a555b | 870 | hsusb: usb@e6590000 { |
| d87ec94a | 871 | compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs"; |
| ae0a555b | 872 | reg = <0 0xe6590000 0 0x100>; |
| 3abb4d5f | 873 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
| ae0a555b | 874 | clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; |
| e8295dc3 YS |
875 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
| 876 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
| 877 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
| 36ee3c27 | 878 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 484adb00 GU |
879 | renesas,buswait = <4>; |
| 880 | phys = <&usb0 1>; | |
| 881 | phy-names = "usb"; | |
| ae0a555b YS |
882 | status = "disabled"; |
| 883 | }; | |
| 884 | ||
| e089f657 SS |
885 | usbphy: usb-phy@e6590100 { |
| 886 | compatible = "renesas,usb-phy-r8a7790"; | |
| 887 | reg = <0 0xe6590100 0 0x100>; | |
| 888 | #address-cells = <1>; | |
| 889 | #size-cells = <0>; | |
| 890 | clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; | |
| 891 | clock-names = "usbhs"; | |
| 36ee3c27 | 892 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| e089f657 SS |
893 | status = "disabled"; |
| 894 | ||
| 895 | usb0: usb-channel@0 { | |
| 896 | reg = <0>; | |
| 897 | #phy-cells = <1>; | |
| 898 | }; | |
| 899 | usb2: usb-channel@2 { | |
| 900 | reg = <2>; | |
| 901 | #phy-cells = <1>; | |
| 902 | }; | |
| 903 | }; | |
| 904 | ||
| 9f685bfc BD |
905 | vin0: video@e6ef0000 { |
| 906 | compatible = "renesas,vin-r8a7790"; | |
| 9f685bfc | 907 | reg = <0 0xe6ef0000 0 0x1000>; |
| 3abb4d5f | 908 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
| 484adb00 | 909 | clocks = <&mstp8_clks R8A7790_CLK_VIN0>; |
| 36ee3c27 | 910 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 9f685bfc BD |
911 | status = "disabled"; |
| 912 | }; | |
| 913 | ||
| 914 | vin1: video@e6ef1000 { | |
| 915 | compatible = "renesas,vin-r8a7790"; | |
| 9f685bfc | 916 | reg = <0 0xe6ef1000 0 0x1000>; |
| 3abb4d5f | 917 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
| 484adb00 | 918 | clocks = <&mstp8_clks R8A7790_CLK_VIN1>; |
| 36ee3c27 | 919 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 9f685bfc BD |
920 | status = "disabled"; |
| 921 | }; | |
| 922 | ||
| 923 | vin2: video@e6ef2000 { | |
| 924 | compatible = "renesas,vin-r8a7790"; | |
| 9f685bfc | 925 | reg = <0 0xe6ef2000 0 0x1000>; |
| 3abb4d5f | 926 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
| 484adb00 | 927 | clocks = <&mstp8_clks R8A7790_CLK_VIN2>; |
| 36ee3c27 | 928 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 9f685bfc BD |
929 | status = "disabled"; |
| 930 | }; | |
| 931 | ||
| 932 | vin3: video@e6ef3000 { | |
| 933 | compatible = "renesas,vin-r8a7790"; | |
| 9f685bfc | 934 | reg = <0 0xe6ef3000 0 0x1000>; |
| 3abb4d5f | 935 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; |
| 484adb00 | 936 | clocks = <&mstp8_clks R8A7790_CLK_VIN3>; |
| 36ee3c27 | 937 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 9f685bfc BD |
938 | status = "disabled"; |
| 939 | }; | |
| 940 | ||
| 3ac6a83c LP |
941 | vsp1@fe920000 { |
| 942 | compatible = "renesas,vsp1"; | |
| 943 | reg = <0 0xfe920000 0 0x8000>; | |
| 3abb4d5f | 944 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; |
| 3ac6a83c | 945 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>; |
| 36ee3c27 | 946 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 3ac6a83c LP |
947 | }; |
| 948 | ||
| 949 | vsp1@fe928000 { | |
| 950 | compatible = "renesas,vsp1"; | |
| 951 | reg = <0 0xfe928000 0 0x8000>; | |
| 3abb4d5f | 952 | interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; |
| 3ac6a83c | 953 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>; |
| 36ee3c27 | 954 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 3ac6a83c LP |
955 | }; |
| 956 | ||
| 957 | vsp1@fe930000 { | |
| 958 | compatible = "renesas,vsp1"; | |
| 959 | reg = <0 0xfe930000 0 0x8000>; | |
| 3abb4d5f | 960 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; |
| 3ac6a83c | 961 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>; |
| 36ee3c27 | 962 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 3ac6a83c LP |
963 | }; |
| 964 | ||
| 965 | vsp1@fe938000 { | |
| 966 | compatible = "renesas,vsp1"; | |
| 967 | reg = <0 0xfe938000 0 0x8000>; | |
| 3abb4d5f | 968 | interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; |
| 3ac6a83c | 969 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>; |
| 36ee3c27 | 970 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 3ac6a83c LP |
971 | }; |
| 972 | ||
| 973 | du: display@feb00000 { | |
| 974 | compatible = "renesas,du-r8a7790"; | |
| 975 | reg = <0 0xfeb00000 0 0x70000>, | |
| 976 | <0 0xfeb90000 0 0x1c>, | |
| 977 | <0 0xfeb94000 0 0x1c>; | |
| 978 | reg-names = "du", "lvds.0", "lvds.1"; | |
| 3abb4d5f SH |
979 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
| 980 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, | |
| 981 | <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; | |
| 3ac6a83c LP |
982 | clocks = <&mstp7_clks R8A7790_CLK_DU0>, |
| 983 | <&mstp7_clks R8A7790_CLK_DU1>, | |
| 984 | <&mstp7_clks R8A7790_CLK_DU2>, | |
| 985 | <&mstp7_clks R8A7790_CLK_LVDS0>, | |
| 986 | <&mstp7_clks R8A7790_CLK_LVDS1>; | |
| 987 | clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1"; | |
| 988 | status = "disabled"; | |
| 989 | ||
| 990 | ports { | |
| 991 | #address-cells = <1>; | |
| 992 | #size-cells = <0>; | |
| 993 | ||
| 994 | port@0 { | |
| 995 | reg = <0>; | |
| 996 | du_out_rgb: endpoint { | |
| 997 | }; | |
| 998 | }; | |
| 999 | port@1 { | |
| 1000 | reg = <1>; | |
| 1001 | du_out_lvds0: endpoint { | |
| 1002 | }; | |
| 1003 | }; | |
| 1004 | port@2 { | |
| 1005 | reg = <2>; | |
| 1006 | du_out_lvds1: endpoint { | |
| 1007 | }; | |
| 1008 | }; | |
| 1009 | }; | |
| 1010 | }; | |
| 1011 | ||
| 6a7742b4 | 1012 | can0: can@e6e80000 { |
| 28e941de | 1013 | compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; |
| 6a7742b4 | 1014 | reg = <0 0xe6e80000 0 0x1000>; |
| 3abb4d5f | 1015 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
| 6a7742b4 SS |
1016 | clocks = <&mstp9_clks R8A7790_CLK_RCAN0>, |
| 1017 | <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; | |
| 1018 | clock-names = "clkp1", "clkp2", "can_clk"; | |
| 36ee3c27 | 1019 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 6a7742b4 SS |
1020 | status = "disabled"; |
| 1021 | }; | |
| 1022 | ||
| 1023 | can1: can@e6e88000 { | |
| 28e941de | 1024 | compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; |
| 6a7742b4 | 1025 | reg = <0 0xe6e88000 0 0x1000>; |
| 3abb4d5f | 1026 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
| 6a7742b4 SS |
1027 | clocks = <&mstp9_clks R8A7790_CLK_RCAN1>, |
| 1028 | <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; | |
| 1029 | clock-names = "clkp1", "clkp2", "can_clk"; | |
| 36ee3c27 | 1030 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 6a7742b4 SS |
1031 | status = "disabled"; |
| 1032 | }; | |
| 1033 | ||
| fb847575 | 1034 | jpu: jpeg-codec@fe980000 { |
| 1c4b68fd | 1035 | compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu"; |
| fb847575 | 1036 | reg = <0 0xfe980000 0 0x10300>; |
| 3abb4d5f | 1037 | interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; |
| fb847575 | 1038 | clocks = <&mstp1_clks R8A7790_CLK_JPU>; |
| 36ee3c27 | 1039 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| fb847575 MU |
1040 | }; |
| 1041 | ||
| 22a1f595 LP |
1042 | clocks { |
| 1043 | #address-cells = <2>; | |
| 1044 | #size-cells = <2>; | |
| 1045 | ranges; | |
| 1046 | ||
| 1047 | /* External root clock */ | |
| b19dd47b | 1048 | extal_clk: extal { |
| 22a1f595 LP |
1049 | compatible = "fixed-clock"; |
| 1050 | #clock-cells = <0>; | |
| 1051 | /* This value must be overriden by the board. */ | |
| 1052 | clock-frequency = <0>; | |
| 22a1f595 LP |
1053 | }; |
| 1054 | ||
| 51d17918 | 1055 | /* External PCIe clock - can be overridden by the board */ |
| b19dd47b | 1056 | pcie_bus_clk: pcie_bus { |
| 51d17918 PE |
1057 | compatible = "fixed-clock"; |
| 1058 | #clock-cells = <0>; | |
| 03adc181 | 1059 | clock-frequency = <0>; |
| 51d17918 PE |
1060 | }; |
| 1061 | ||
| c7c2ec3a KM |
1062 | /* |
| 1063 | * The external audio clocks are configured as 0 Hz fixed frequency clocks by | |
| 1064 | * default. Boards that provide audio clocks should override them. | |
| 1065 | */ | |
| 1066 | audio_clk_a: audio_clk_a { | |
| 1067 | compatible = "fixed-clock"; | |
| 1068 | #clock-cells = <0>; | |
| 1069 | clock-frequency = <0>; | |
| c7c2ec3a KM |
1070 | }; |
| 1071 | audio_clk_b: audio_clk_b { | |
| 1072 | compatible = "fixed-clock"; | |
| 1073 | #clock-cells = <0>; | |
| 1074 | clock-frequency = <0>; | |
| c7c2ec3a KM |
1075 | }; |
| 1076 | audio_clk_c: audio_clk_c { | |
| 1077 | compatible = "fixed-clock"; | |
| 1078 | #clock-cells = <0>; | |
| 1079 | clock-frequency = <0>; | |
| c7c2ec3a KM |
1080 | }; |
| 1081 | ||
| 42af65e8 GU |
1082 | /* External SCIF clock */ |
| 1083 | scif_clk: scif { | |
| 1084 | compatible = "fixed-clock"; | |
| 1085 | #clock-cells = <0>; | |
| 1086 | /* This value must be overridden by the board. */ | |
| 1087 | clock-frequency = <0>; | |
| 42af65e8 GU |
1088 | }; |
| 1089 | ||
| 41650f40 | 1090 | /* External USB clock - can be overridden by the board */ |
| b19dd47b | 1091 | usb_extal_clk: usb_extal { |
| 41650f40 SS |
1092 | compatible = "fixed-clock"; |
| 1093 | #clock-cells = <0>; | |
| 1094 | clock-frequency = <48000000>; | |
| 41650f40 SS |
1095 | }; |
| 1096 | ||
| 1097 | /* External CAN clock */ | |
| 1098 | can_clk: can_clk { | |
| 1099 | compatible = "fixed-clock"; | |
| 1100 | #clock-cells = <0>; | |
| 1101 | /* This value must be overridden by the board. */ | |
| 1102 | clock-frequency = <0>; | |
| 41650f40 SS |
1103 | }; |
| 1104 | ||
| 22a1f595 LP |
1105 | /* Special CPG clocks */ |
| 1106 | cpg_clocks: cpg_clocks@e6150000 { | |
| 1107 | compatible = "renesas,r8a7790-cpg-clocks", | |
| 1108 | "renesas,rcar-gen2-cpg-clocks"; | |
| 1109 | reg = <0 0xe6150000 0 0x1000>; | |
| 41650f40 | 1110 | clocks = <&extal_clk &usb_extal_clk>; |
| 22a1f595 LP |
1111 | #clock-cells = <1>; |
| 1112 | clock-output-names = "main", "pll0", "pll1", "pll3", | |
| 1113 | "lb", "qspi", "sdh", "sd0", "sd1", | |
| 3453ca9e | 1114 | "z", "rcan", "adsp"; |
| 484adb00 | 1115 | #power-domain-cells = <0>; |
| 22a1f595 LP |
1116 | }; |
| 1117 | ||
| 1118 | /* Variable factor clocks */ | |
| b19dd47b | 1119 | sd2_clk: sd2@e6150078 { |
| 22a1f595 LP |
1120 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
| 1121 | reg = <0 0xe6150078 0 4>; | |
| 1122 | clocks = <&pll1_div2_clk>; | |
| 1123 | #clock-cells = <0>; | |
| 22a1f595 | 1124 | }; |
| b19dd47b | 1125 | sd3_clk: sd3@e615026c { |
| 22a1f595 | 1126 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
| edd7b938 | 1127 | reg = <0 0xe615026c 0 4>; |
| 22a1f595 LP |
1128 | clocks = <&pll1_div2_clk>; |
| 1129 | #clock-cells = <0>; | |
| 22a1f595 | 1130 | }; |
| b19dd47b | 1131 | mmc0_clk: mmc0@e6150240 { |
| 22a1f595 LP |
1132 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
| 1133 | reg = <0 0xe6150240 0 4>; | |
| 1134 | clocks = <&pll1_div2_clk>; | |
| 1135 | #clock-cells = <0>; | |
| 22a1f595 | 1136 | }; |
| b19dd47b | 1137 | mmc1_clk: mmc1@e6150244 { |
| 22a1f595 LP |
1138 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
| 1139 | reg = <0 0xe6150244 0 4>; | |
| 1140 | clocks = <&pll1_div2_clk>; | |
| 1141 | #clock-cells = <0>; | |
| 22a1f595 | 1142 | }; |
| b19dd47b | 1143 | ssp_clk: ssp@e6150248 { |
| 22a1f595 LP |
1144 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
| 1145 | reg = <0 0xe6150248 0 4>; | |
| 1146 | clocks = <&pll1_div2_clk>; | |
| 1147 | #clock-cells = <0>; | |
| 22a1f595 | 1148 | }; |
| b19dd47b | 1149 | ssprs_clk: ssprs@e615024c { |
| 22a1f595 LP |
1150 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
| 1151 | reg = <0 0xe615024c 0 4>; | |
| 1152 | clocks = <&pll1_div2_clk>; | |
| 1153 | #clock-cells = <0>; | |
| 22a1f595 LP |
1154 | }; |
| 1155 | ||
| 1156 | /* Fixed factor clocks */ | |
| b19dd47b | 1157 | pll1_div2_clk: pll1_div2 { |
| 22a1f595 LP |
1158 | compatible = "fixed-factor-clock"; |
| 1159 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1160 | #clock-cells = <0>; | |
| 1161 | clock-div = <2>; | |
| 1162 | clock-mult = <1>; | |
| 22a1f595 | 1163 | }; |
| b19dd47b | 1164 | z2_clk: z2 { |
| 22a1f595 LP |
1165 | compatible = "fixed-factor-clock"; |
| 1166 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1167 | #clock-cells = <0>; | |
| 1168 | clock-div = <2>; | |
| 1169 | clock-mult = <1>; | |
| 22a1f595 | 1170 | }; |
| b19dd47b | 1171 | zg_clk: zg { |
| 22a1f595 LP |
1172 | compatible = "fixed-factor-clock"; |
| 1173 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1174 | #clock-cells = <0>; | |
| 1175 | clock-div = <3>; | |
| 1176 | clock-mult = <1>; | |
| 22a1f595 | 1177 | }; |
| b19dd47b | 1178 | zx_clk: zx { |
| 22a1f595 LP |
1179 | compatible = "fixed-factor-clock"; |
| 1180 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1181 | #clock-cells = <0>; | |
| 1182 | clock-div = <3>; | |
| 1183 | clock-mult = <1>; | |
| 22a1f595 | 1184 | }; |
| b19dd47b | 1185 | zs_clk: zs { |
| 22a1f595 LP |
1186 | compatible = "fixed-factor-clock"; |
| 1187 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1188 | #clock-cells = <0>; | |
| 1189 | clock-div = <6>; | |
| 1190 | clock-mult = <1>; | |
| 22a1f595 | 1191 | }; |
| b19dd47b | 1192 | hp_clk: hp { |
| 22a1f595 LP |
1193 | compatible = "fixed-factor-clock"; |
| 1194 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1195 | #clock-cells = <0>; | |
| 1196 | clock-div = <12>; | |
| 1197 | clock-mult = <1>; | |
| 22a1f595 | 1198 | }; |
| b19dd47b | 1199 | i_clk: i { |
| 22a1f595 LP |
1200 | compatible = "fixed-factor-clock"; |
| 1201 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1202 | #clock-cells = <0>; | |
| 1203 | clock-div = <2>; | |
| 1204 | clock-mult = <1>; | |
| 22a1f595 | 1205 | }; |
| b19dd47b | 1206 | b_clk: b { |
| 22a1f595 LP |
1207 | compatible = "fixed-factor-clock"; |
| 1208 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1209 | #clock-cells = <0>; | |
| 1210 | clock-div = <12>; | |
| 1211 | clock-mult = <1>; | |
| 22a1f595 | 1212 | }; |
| b19dd47b | 1213 | p_clk: p { |
| 22a1f595 LP |
1214 | compatible = "fixed-factor-clock"; |
| 1215 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1216 | #clock-cells = <0>; | |
| 1217 | clock-div = <24>; | |
| 1218 | clock-mult = <1>; | |
| 22a1f595 | 1219 | }; |
| b19dd47b | 1220 | cl_clk: cl { |
| 22a1f595 LP |
1221 | compatible = "fixed-factor-clock"; |
| 1222 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1223 | #clock-cells = <0>; | |
| 1224 | clock-div = <48>; | |
| 1225 | clock-mult = <1>; | |
| 22a1f595 | 1226 | }; |
| b19dd47b | 1227 | m2_clk: m2 { |
| 22a1f595 LP |
1228 | compatible = "fixed-factor-clock"; |
| 1229 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1230 | #clock-cells = <0>; | |
| 1231 | clock-div = <8>; | |
| 1232 | clock-mult = <1>; | |
| 22a1f595 | 1233 | }; |
| b19dd47b | 1234 | imp_clk: imp { |
| 22a1f595 LP |
1235 | compatible = "fixed-factor-clock"; |
| 1236 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1237 | #clock-cells = <0>; | |
| 1238 | clock-div = <4>; | |
| 1239 | clock-mult = <1>; | |
| 22a1f595 | 1240 | }; |
| b19dd47b | 1241 | rclk_clk: rclk { |
| 22a1f595 LP |
1242 | compatible = "fixed-factor-clock"; |
| 1243 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1244 | #clock-cells = <0>; | |
| 1245 | clock-div = <(48 * 1024)>; | |
| 1246 | clock-mult = <1>; | |
| 22a1f595 | 1247 | }; |
| b19dd47b | 1248 | oscclk_clk: oscclk { |
| 22a1f595 LP |
1249 | compatible = "fixed-factor-clock"; |
| 1250 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1251 | #clock-cells = <0>; | |
| 1252 | clock-div = <(12 * 1024)>; | |
| 1253 | clock-mult = <1>; | |
| 22a1f595 | 1254 | }; |
| b19dd47b | 1255 | zb3_clk: zb3 { |
| 22a1f595 LP |
1256 | compatible = "fixed-factor-clock"; |
| 1257 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
| 1258 | #clock-cells = <0>; | |
| 1259 | clock-div = <4>; | |
| 1260 | clock-mult = <1>; | |
| 22a1f595 | 1261 | }; |
| b19dd47b | 1262 | zb3d2_clk: zb3d2 { |
| 22a1f595 LP |
1263 | compatible = "fixed-factor-clock"; |
| 1264 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
| 1265 | #clock-cells = <0>; | |
| 1266 | clock-div = <8>; | |
| 1267 | clock-mult = <1>; | |
| 22a1f595 | 1268 | }; |
| b19dd47b | 1269 | ddr_clk: ddr { |
| 22a1f595 LP |
1270 | compatible = "fixed-factor-clock"; |
| 1271 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
| 1272 | #clock-cells = <0>; | |
| 1273 | clock-div = <8>; | |
| 1274 | clock-mult = <1>; | |
| 22a1f595 | 1275 | }; |
| b19dd47b | 1276 | mp_clk: mp { |
| 22a1f595 LP |
1277 | compatible = "fixed-factor-clock"; |
| 1278 | clocks = <&pll1_div2_clk>; | |
| 1279 | #clock-cells = <0>; | |
| 1280 | clock-div = <15>; | |
| 1281 | clock-mult = <1>; | |
| 22a1f595 | 1282 | }; |
| b19dd47b | 1283 | cp_clk: cp { |
| 22a1f595 LP |
1284 | compatible = "fixed-factor-clock"; |
| 1285 | clocks = <&extal_clk>; | |
| 1286 | #clock-cells = <0>; | |
| 1287 | clock-div = <2>; | |
| 1288 | clock-mult = <1>; | |
| 22a1f595 LP |
1289 | }; |
| 1290 | ||
| 1291 | /* Gate clocks */ | |
| 9d90951a LP |
1292 | mstp0_clks: mstp0_clks@e6150130 { |
| 1293 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1294 | reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; | |
| 1295 | clocks = <&mp_clk>; | |
| 1296 | #clock-cells = <1>; | |
| b54010af | 1297 | clock-indices = <R8A7790_CLK_MSIOF0>; |
| 9d90951a LP |
1298 | clock-output-names = "msiof0"; |
| 1299 | }; | |
| 22a1f595 LP |
1300 | mstp1_clks: mstp1_clks@e6150134 { |
| 1301 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1302 | reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; | |
| 4ba8f246 YH |
1303 | clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>, |
| 1304 | <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>, | |
| 1305 | <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, | |
| 1306 | <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; | |
| 22a1f595 | 1307 | #clock-cells = <1>; |
| b54010af | 1308 | clock-indices = < |
| 4ba8f246 YH |
1309 | R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1 |
| 1310 | R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1 | |
| 1311 | R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC | |
| 1312 | R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0 | |
| 1313 | R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0 | |
| 1314 | R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0 | |
| 1315 | R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S | |
| 22a1f595 LP |
1316 | >; |
| 1317 | clock-output-names = | |
| 4ba8f246 YH |
1318 | "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1", |
| 1319 | "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1", | |
| 1320 | "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0", | |
| 2284ff5f | 1321 | "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy"; |
| 22a1f595 LP |
1322 | }; |
| 1323 | mstp2_clks: mstp2_clks@e6150138 { | |
| 1324 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1325 | reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; | |
| 1326 | clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, | |
| c819acda LP |
1327 | <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>, |
| 1328 | <&zs_clk>; | |
| 22a1f595 | 1329 | #clock-cells = <1>; |
| b54010af | 1330 | clock-indices = < |
| 22a1f595 | 1331 | R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0 |
| 9d90951a LP |
1332 | R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1 |
| 1333 | R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2 | |
| c819acda | 1334 | R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0 |
| 22a1f595 LP |
1335 | >; |
| 1336 | clock-output-names = | |
| 9d90951a | 1337 | "scifa2", "scifa1", "scifa0", "msiof2", "scifb0", |
| c819acda LP |
1338 | "scifb1", "msiof1", "msiof3", "scifb2", |
| 1339 | "sys-dmac1", "sys-dmac0"; | |
| 22a1f595 LP |
1340 | }; |
| 1341 | mstp3_clks: mstp3_clks@e615013c { | |
| 1342 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1343 | reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; | |
| 38805823 | 1344 | clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&p_clk>, <&sd3_clk>, |
| 17465149 | 1345 | <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, |
| b02ce79f YS |
1346 | <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, |
| 1347 | <&hp_clk>, <&hp_clk>; | |
| 22a1f595 | 1348 | #clock-cells = <1>; |
| b54010af | 1349 | clock-indices = < |
| 38805823 | 1350 | R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SCIF2 R8A7790_CLK_SDHI3 |
| 17465149 | 1351 | R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 |
| ecafea8c | 1352 | R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 |
| b02ce79f | 1353 | R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1 |
| 22a1f595 LP |
1354 | >; |
| 1355 | clock-output-names = | |
| 38805823 | 1356 | "iic2", "tpu0", "mmcif1", "scif2", "sdhi3", |
| 17465149 | 1357 | "sdhi2", "sdhi1", "sdhi0", "mmcif0", |
| b02ce79f YS |
1358 | "iic0", "pciec", "iic1", "ssusb", "cmt1", |
| 1359 | "usbdmac0", "usbdmac1"; | |
| 22a1f595 | 1360 | }; |
| 61624caf GU |
1361 | mstp4_clks: mstp4_clks@e6150140 { |
| 1362 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1363 | reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; | |
| 1364 | clocks = <&cp_clk>; | |
| 1365 | #clock-cells = <1>; | |
| 1366 | clock-indices = <R8A7790_CLK_IRQC>; | |
| 1367 | clock-output-names = "irqc"; | |
| 1368 | }; | |
| 22a1f595 LP |
1369 | mstp5_clks: mstp5_clks@e6150144 { |
| 1370 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1371 | reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; | |
| 3453ca9e SS |
1372 | clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>, |
| 1373 | <&extal_clk>, <&p_clk>; | |
| 22a1f595 | 1374 | #clock-cells = <1>; |
| b54010af BD |
1375 | clock-indices = < |
| 1376 | R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1 | |
| 3453ca9e SS |
1377 | R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL |
| 1378 | R8A7790_CLK_PWM | |
| b54010af | 1379 | >; |
| 3453ca9e SS |
1380 | clock-output-names = "audmac0", "audmac1", "adsp_mod", |
| 1381 | "thermal", "pwm"; | |
| 22a1f595 LP |
1382 | }; |
| 1383 | mstp7_clks: mstp7_clks@e615014c { | |
| 1384 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1385 | reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; | |
| b621f6d4 | 1386 | clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, |
| 22a1f595 LP |
1387 | <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, |
| 1388 | <&zx_clk>; | |
| 1389 | #clock-cells = <1>; | |
| b54010af | 1390 | clock-indices = < |
| 22a1f595 LP |
1391 | R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1 |
| 1392 | R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0 | |
| 1393 | R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0 | |
| 1394 | R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0 | |
| 1395 | >; | |
| 1396 | clock-output-names = | |
| 1397 | "ehci", "hsusb", "hscif1", "hscif0", "scif1", | |
| 1398 | "scif0", "du2", "du1", "du0", "lvds1", "lvds0"; | |
| 1399 | }; | |
| 1400 | mstp8_clks: mstp8_clks@e6150990 { | |
| 1401 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1402 | reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; | |
| f6b5dd40 | 1403 | clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, |
| 63d2d750 SS |
1404 | <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>, |
| 1405 | <&zs_clk>; | |
| 22a1f595 | 1406 | #clock-cells = <1>; |
| b54010af | 1407 | clock-indices = < |
| f6b5dd40 | 1408 | R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 |
| 63d2d750 SS |
1409 | R8A7790_CLK_VIN1 R8A7790_CLK_VIN0 |
| 1410 | R8A7790_CLK_ETHERAVB R8A7790_CLK_ETHER | |
| f6b5dd40 | 1411 | R8A7790_CLK_SATA1 R8A7790_CLK_SATA0 |
| 3f2beaa9 | 1412 | >; |
| bccccc3d | 1413 | clock-output-names = |
| 63d2d750 SS |
1414 | "mlb", "vin3", "vin2", "vin1", "vin0", |
| 1415 | "etheravb", "ether", "sata1", "sata0"; | |
| 22a1f595 LP |
1416 | }; |
| 1417 | mstp9_clks: mstp9_clks@e6150994 { | |
| 1418 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1419 | reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; | |
| 81f6883f GU |
1420 | clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, |
| 1421 | <&cp_clk>, <&cp_clk>, <&cp_clk>, | |
| 1422 | <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>, | |
| 3672b059 | 1423 | <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; |
| 22a1f595 | 1424 | #clock-cells = <1>; |
| b54010af | 1425 | clock-indices = < |
| 81f6883f GU |
1426 | R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3 |
| 1427 | R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0 | |
| 17465149 WS |
1428 | R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS |
| 1429 | R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0 | |
| 22a1f595 | 1430 | >; |
| 91b56ca1 | 1431 | clock-output-names = |
| 81f6883f | 1432 | "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", |
| 17465149 WS |
1433 | "rcan1", "rcan0", "qspi_mod", "iic3", |
| 1434 | "i2c3", "i2c2", "i2c1", "i2c0"; | |
| 22a1f595 | 1435 | }; |
| bcde3722 KM |
1436 | mstp10_clks: mstp10_clks@e6150998 { |
| 1437 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1438 | reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; | |
| 1439 | clocks = <&p_clk>, | |
| 1440 | <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, | |
| 1441 | <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, | |
| 1442 | <&p_clk>, | |
| 1443 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
| 1444 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
| 1445 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
| 1446 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
| 1447 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
| a7163784 | 1448 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, |
| bcde3722 KM |
1449 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>; |
| 1450 | ||
| 1451 | #clock-cells = <1>; | |
| 1452 | clock-indices = < | |
| 1453 | R8A7790_CLK_SSI_ALL | |
| 1454 | R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5 | |
| 1455 | R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0 | |
| 1456 | R8A7790_CLK_SCU_ALL | |
| 1457 | R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0 | |
| a7163784 | 1458 | R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0 |
| bcde3722 KM |
1459 | R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5 |
| 1460 | R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0 | |
| 1461 | >; | |
| 1462 | clock-output-names = | |
| 1463 | "ssi-all", | |
| 1464 | "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", | |
| 1465 | "ssi4", "ssi3", "ssi2", "ssi1", "ssi0", | |
| 1466 | "scu-all", | |
| 1467 | "scu-dvc1", "scu-dvc0", | |
| a7163784 | 1468 | "scu-ctu1-mix1", "scu-ctu0-mix0", |
| bcde3722 KM |
1469 | "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5", |
| 1470 | "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0"; | |
| 1471 | }; | |
| 22a1f595 | 1472 | }; |
| 7053e134 | 1473 | |
| 4c8eb3c8 GU |
1474 | sysc: system-controller@e6180000 { |
| 1475 | compatible = "renesas,r8a7790-sysc"; | |
| 1476 | reg = <0 0xe6180000 0 0x0200>; | |
| 1477 | #power-domain-cells = <1>; | |
| 1478 | }; | |
| 1479 | ||
| fad6d45c | 1480 | qspi: spi@e6b10000 { |
| 7053e134 GU |
1481 | compatible = "renesas,qspi-r8a7790", "renesas,qspi"; |
| 1482 | reg = <0 0xe6b10000 0 0x2c>; | |
| 3abb4d5f | 1483 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
| 7053e134 | 1484 | clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>; |
| badf8570 NS |
1485 | dmas = <&dmac0 0x17>, <&dmac0 0x18>, |
| 1486 | <&dmac1 0x17>, <&dmac1 0x18>; | |
| 1487 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 1488 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 7053e134 GU |
1489 | num-cs = <1>; |
| 1490 | #address-cells = <1>; | |
| 1491 | #size-cells = <0>; | |
| 1492 | status = "disabled"; | |
| 1493 | }; | |
| ae8a6146 GU |
1494 | |
| 1495 | msiof0: spi@e6e20000 { | |
| 1496 | compatible = "renesas,msiof-r8a7790"; | |
| c7d1f08a | 1497 | reg = <0 0xe6e20000 0 0x0064>; |
| 3abb4d5f | 1498 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; |
| ae8a6146 | 1499 | clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>; |
| badf8570 NS |
1500 | dmas = <&dmac0 0x51>, <&dmac0 0x52>, |
| 1501 | <&dmac1 0x51>, <&dmac1 0x52>; | |
| 1502 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 1503 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ae8a6146 GU |
1504 | #address-cells = <1>; |
| 1505 | #size-cells = <0>; | |
| 1506 | status = "disabled"; | |
| 1507 | }; | |
| 1508 | ||
| 1509 | msiof1: spi@e6e10000 { | |
| 1510 | compatible = "renesas,msiof-r8a7790"; | |
| c7d1f08a | 1511 | reg = <0 0xe6e10000 0 0x0064>; |
| 3abb4d5f | 1512 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
| ae8a6146 | 1513 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>; |
| badf8570 NS |
1514 | dmas = <&dmac0 0x55>, <&dmac0 0x56>, |
| 1515 | <&dmac1 0x55>, <&dmac1 0x56>; | |
| 1516 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 1517 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ae8a6146 GU |
1518 | #address-cells = <1>; |
| 1519 | #size-cells = <0>; | |
| 1520 | status = "disabled"; | |
| 1521 | }; | |
| 1522 | ||
| 1523 | msiof2: spi@e6e00000 { | |
| 1524 | compatible = "renesas,msiof-r8a7790"; | |
| c7d1f08a | 1525 | reg = <0 0xe6e00000 0 0x0064>; |
| 3abb4d5f | 1526 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; |
| ae8a6146 | 1527 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>; |
| badf8570 NS |
1528 | dmas = <&dmac0 0x41>, <&dmac0 0x42>, |
| 1529 | <&dmac1 0x41>, <&dmac1 0x42>; | |
| 1530 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 1531 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ae8a6146 GU |
1532 | #address-cells = <1>; |
| 1533 | #size-cells = <0>; | |
| 1534 | status = "disabled"; | |
| 1535 | }; | |
| 1536 | ||
| 1537 | msiof3: spi@e6c90000 { | |
| 1538 | compatible = "renesas,msiof-r8a7790"; | |
| c7d1f08a | 1539 | reg = <0 0xe6c90000 0 0x0064>; |
| 3abb4d5f | 1540 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; |
| ae8a6146 | 1541 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>; |
| badf8570 NS |
1542 | dmas = <&dmac0 0x45>, <&dmac0 0x46>, |
| 1543 | <&dmac1 0x45>, <&dmac1 0x46>; | |
| 1544 | dma-names = "tx", "rx", "tx", "rx"; | |
| 36ee3c27 | 1545 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ae8a6146 GU |
1546 | #address-cells = <1>; |
| 1547 | #size-cells = <0>; | |
| 1548 | status = "disabled"; | |
| 1549 | }; | |
| 7df2fd57 | 1550 | |
| 157fcd8a | 1551 | xhci: usb@ee000000 { |
| 92cc7798 | 1552 | compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci"; |
| 157fcd8a | 1553 | reg = <0 0xee000000 0 0xc00>; |
| 3abb4d5f | 1554 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; |
| 157fcd8a | 1555 | clocks = <&mstp3_clks R8A7790_CLK_SSUSB>; |
| 36ee3c27 | 1556 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 157fcd8a YS |
1557 | phys = <&usb2 1>; |
| 1558 | phy-names = "usb"; | |
| 1559 | status = "disabled"; | |
| 1560 | }; | |
| 1561 | ||
| ff4f3eb8 | 1562 | pci0: pci@ee090000 { |
| 2d82c144 | 1563 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
| ff4f3eb8 | 1564 | device_type = "pci"; |
| ff4f3eb8 BD |
1565 | reg = <0 0xee090000 0 0xc00>, |
| 1566 | <0 0xee080000 0 0x1100>; | |
| 3abb4d5f | 1567 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
| 484adb00 | 1568 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; |
| 36ee3c27 | 1569 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ff4f3eb8 BD |
1570 | status = "disabled"; |
| 1571 | ||
| 1572 | bus-range = <0 0>; | |
| 1573 | #address-cells = <3>; | |
| 1574 | #size-cells = <2>; | |
| 1575 | #interrupt-cells = <1>; | |
| 1576 | ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; | |
| 1577 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
| 3abb4d5f SH |
1578 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
| 1579 | 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH | |
| 1580 | 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 538c40e5 SS |
1581 | |
| 1582 | usb@0,1 { | |
| 1583 | reg = <0x800 0 0 0 0>; | |
| 1584 | device_type = "pci"; | |
| 1585 | phys = <&usb0 0>; | |
| 1586 | phy-names = "usb"; | |
| 1587 | }; | |
| 1588 | ||
| 1589 | usb@0,2 { | |
| 1590 | reg = <0x1000 0 0 0 0>; | |
| 1591 | device_type = "pci"; | |
| 1592 | phys = <&usb0 0>; | |
| 1593 | phy-names = "usb"; | |
| 1594 | }; | |
| ff4f3eb8 BD |
1595 | }; |
| 1596 | ||
| 1597 | pci1: pci@ee0b0000 { | |
| 2d82c144 | 1598 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
| ff4f3eb8 | 1599 | device_type = "pci"; |
| ff4f3eb8 BD |
1600 | reg = <0 0xee0b0000 0 0xc00>, |
| 1601 | <0 0xee0a0000 0 0x1100>; | |
| 3abb4d5f | 1602 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
| 484adb00 | 1603 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; |
| 36ee3c27 | 1604 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ff4f3eb8 BD |
1605 | status = "disabled"; |
| 1606 | ||
| 1607 | bus-range = <1 1>; | |
| 1608 | #address-cells = <3>; | |
| 1609 | #size-cells = <2>; | |
| 1610 | #interrupt-cells = <1>; | |
| 1611 | ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; | |
| 1612 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
| 3abb4d5f SH |
1613 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH |
| 1614 | 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH | |
| 1615 | 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; | |
| ff4f3eb8 BD |
1616 | }; |
| 1617 | ||
| 1618 | pci2: pci@ee0d0000 { | |
| 2d82c144 | 1619 | compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; |
| ff4f3eb8 BD |
1620 | device_type = "pci"; |
| 1621 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; | |
| 36ee3c27 | 1622 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| ff4f3eb8 BD |
1623 | reg = <0 0xee0d0000 0 0xc00>, |
| 1624 | <0 0xee0c0000 0 0x1100>; | |
| 3abb4d5f | 1625 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
| ff4f3eb8 BD |
1626 | status = "disabled"; |
| 1627 | ||
| 1628 | bus-range = <2 2>; | |
| 1629 | #address-cells = <3>; | |
| 1630 | #size-cells = <2>; | |
| 1631 | #interrupt-cells = <1>; | |
| 1632 | ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; | |
| 1633 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
| 3abb4d5f SH |
1634 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
| 1635 | 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
| 1636 | 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
| 538c40e5 SS |
1637 | |
| 1638 | usb@0,1 { | |
| 1639 | reg = <0x800 0 0 0 0>; | |
| 1640 | device_type = "pci"; | |
| 1641 | phys = <&usb2 0>; | |
| 1642 | phy-names = "usb"; | |
| 1643 | }; | |
| 1644 | ||
| 1645 | usb@0,2 { | |
| 1646 | reg = <0x1000 0 0 0 0>; | |
| 1647 | device_type = "pci"; | |
| 1648 | phys = <&usb2 0>; | |
| 1649 | phy-names = "usb"; | |
| 1650 | }; | |
| ff4f3eb8 BD |
1651 | }; |
| 1652 | ||
| 745329d2 | 1653 | pciec: pcie@fe000000 { |
| e670be8d | 1654 | compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2"; |
| 745329d2 PE |
1655 | reg = <0 0xfe000000 0 0x80000>; |
| 1656 | #address-cells = <3>; | |
| 1657 | #size-cells = <2>; | |
| 1658 | bus-range = <0x00 0xff>; | |
| 1659 | device_type = "pci"; | |
| 1660 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
| 1661 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
| 1662 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
| 1663 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
| 1664 | /* Map all possible DDR as inbound ranges */ | |
| 1665 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 | |
| 1666 | 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; | |
| 3abb4d5f SH |
1667 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
| 1668 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
| 1669 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
| 745329d2 PE |
1670 | #interrupt-cells = <1>; |
| 1671 | interrupt-map-mask = <0 0 0 0>; | |
| 3abb4d5f | 1672 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
| 745329d2 PE |
1673 | clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>; |
| 1674 | clock-names = "pcie", "pcie_bus"; | |
| 36ee3c27 | 1675 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 745329d2 PE |
1676 | status = "disabled"; |
| 1677 | }; | |
| 1678 | ||
| b694e380 | 1679 | rcar_sound: sound@ec500000 { |
| ad63241c KM |
1680 | /* |
| 1681 | * #sound-dai-cells is required | |
| 1682 | * | |
| 1683 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
| 1684 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
| 1685 | */ | |
| 31078ecd | 1686 | compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2"; |
| 7df2fd57 KM |
1687 | reg = <0 0xec500000 0 0x1000>, /* SCU */ |
| 1688 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
| 1689 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
| 4bc4a205 | 1690 | <0 0xec541000 0 0x280>, /* SSI */ |
| 0c602677 KM |
1691 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ |
| 1692 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
| 46a158f2 | 1693 | |
| 7df2fd57 KM |
1694 | clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>, |
| 1695 | <&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>, | |
| 1696 | <&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>, | |
| 1697 | <&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>, | |
| 1698 | <&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>, | |
| 1699 | <&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>, | |
| 1700 | <&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>, | |
| 1701 | <&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>, | |
| 1702 | <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>, | |
| 1703 | <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>, | |
| 1704 | <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>, | |
| a7163784 | 1705 | <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>, |
| fc67bf42 | 1706 | <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>, |
| 334d69a2 | 1707 | <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>, |
| 7df2fd57 KM |
1708 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>; |
| 1709 | clock-names = "ssi-all", | |
| 1710 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", | |
| 1711 | "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", | |
| 1712 | "src.9", "src.8", "src.7", "src.6", "src.5", | |
| 1713 | "src.4", "src.3", "src.2", "src.1", "src.0", | |
| a7163784 | 1714 | "ctu.0", "ctu.1", |
| fc67bf42 | 1715 | "mix.0", "mix.1", |
| 334d69a2 | 1716 | "dvc.0", "dvc.1", |
| 7df2fd57 | 1717 | "clk_a", "clk_b", "clk_c", "clk_i"; |
| 36ee3c27 | 1718 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 7df2fd57 KM |
1719 | |
| 1720 | status = "disabled"; | |
| 1721 | ||
| 334d69a2 | 1722 | rcar_sound,dvc { |
| 2c3de367 | 1723 | dvc0: dvc-0 { |
| 118a5093 KM |
1724 | dmas = <&audma0 0xbc>; |
| 1725 | dma-names = "tx"; | |
| 1726 | }; | |
| 2c3de367 | 1727 | dvc1: dvc-1 { |
| 118a5093 KM |
1728 | dmas = <&audma0 0xbe>; |
| 1729 | dma-names = "tx"; | |
| 1730 | }; | |
| 334d69a2 KM |
1731 | }; |
| 1732 | ||
| fc67bf42 | 1733 | rcar_sound,mix { |
| 2c3de367 GU |
1734 | mix0: mix-0 { }; |
| 1735 | mix1: mix-1 { }; | |
| fc67bf42 KM |
1736 | }; |
| 1737 | ||
| a7163784 | 1738 | rcar_sound,ctu { |
| 2c3de367 GU |
1739 | ctu00: ctu-0 { }; |
| 1740 | ctu01: ctu-1 { }; | |
| 1741 | ctu02: ctu-2 { }; | |
| 1742 | ctu03: ctu-3 { }; | |
| 1743 | ctu10: ctu-4 { }; | |
| 1744 | ctu11: ctu-5 { }; | |
| 1745 | ctu12: ctu-6 { }; | |
| 1746 | ctu13: ctu-7 { }; | |
| a7163784 KM |
1747 | }; |
| 1748 | ||
| 7df2fd57 | 1749 | rcar_sound,src { |
| 2c3de367 | 1750 | src0: src-0 { |
| 3abb4d5f | 1751 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1752 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
| 1753 | dma-names = "rx", "tx"; | |
| 1754 | }; | |
| 2c3de367 | 1755 | src1: src-1 { |
| 3abb4d5f | 1756 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1757 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
| 1758 | dma-names = "rx", "tx"; | |
| 1759 | }; | |
| 2c3de367 | 1760 | src2: src-2 { |
| 3abb4d5f | 1761 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1762 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
| 1763 | dma-names = "rx", "tx"; | |
| 1764 | }; | |
| 2c3de367 | 1765 | src3: src-3 { |
| 3abb4d5f | 1766 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1767 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
| 1768 | dma-names = "rx", "tx"; | |
| 1769 | }; | |
| 2c3de367 | 1770 | src4: src-4 { |
| 3abb4d5f | 1771 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1772 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
| 1773 | dma-names = "rx", "tx"; | |
| 1774 | }; | |
| 2c3de367 | 1775 | src5: src-5 { |
| 3abb4d5f | 1776 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1777 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
| 1778 | dma-names = "rx", "tx"; | |
| 1779 | }; | |
| 2c3de367 | 1780 | src6: src-6 { |
| 3abb4d5f | 1781 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1782 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
| 1783 | dma-names = "rx", "tx"; | |
| 1784 | }; | |
| 2c3de367 | 1785 | src7: src-7 { |
| 3abb4d5f | 1786 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1787 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
| 1788 | dma-names = "rx", "tx"; | |
| 1789 | }; | |
| 2c3de367 | 1790 | src8: src-8 { |
| 3abb4d5f | 1791 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1792 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
| 1793 | dma-names = "rx", "tx"; | |
| 1794 | }; | |
| 2c3de367 | 1795 | src9: src-9 { |
| 3abb4d5f | 1796 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1797 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
| 1798 | dma-names = "rx", "tx"; | |
| 1799 | }; | |
| 7df2fd57 KM |
1800 | }; |
| 1801 | ||
| 1802 | rcar_sound,ssi { | |
| 2c3de367 | 1803 | ssi0: ssi-0 { |
| 3abb4d5f | 1804 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1805 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
| 1806 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1807 | }; | |
| 2c3de367 | 1808 | ssi1: ssi-1 { |
| 3abb4d5f | 1809 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1810 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
| 1811 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1812 | }; | |
| 2c3de367 | 1813 | ssi2: ssi-2 { |
| 3abb4d5f | 1814 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1815 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
| 1816 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1817 | }; | |
| 2c3de367 | 1818 | ssi3: ssi-3 { |
| 3abb4d5f | 1819 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1820 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
| 1821 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1822 | }; | |
| 2c3de367 | 1823 | ssi4: ssi-4 { |
| 3abb4d5f | 1824 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1825 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
| 1826 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1827 | }; | |
| 2c3de367 | 1828 | ssi5: ssi-5 { |
| 3abb4d5f | 1829 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1830 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
| 1831 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1832 | }; | |
| 2c3de367 | 1833 | ssi6: ssi-6 { |
| 3abb4d5f | 1834 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1835 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
| 1836 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1837 | }; | |
| 2c3de367 | 1838 | ssi7: ssi-7 { |
| 3abb4d5f | 1839 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1840 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
| 1841 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1842 | }; | |
| 2c3de367 | 1843 | ssi8: ssi-8 { |
| 3abb4d5f | 1844 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1845 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
| 1846 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1847 | }; | |
| 2c3de367 | 1848 | ssi9: ssi-9 { |
| 3abb4d5f | 1849 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
| 118a5093 KM |
1850 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
| 1851 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1852 | }; | |
| 7df2fd57 KM |
1853 | }; |
| 1854 | }; | |
| 70496727 LP |
1855 | |
| 1856 | ipmmu_sy0: mmu@e6280000 { | |
| c8d6686e | 1857 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
| 70496727 | 1858 | reg = <0 0xe6280000 0 0x1000>; |
| 3abb4d5f SH |
1859 | interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, |
| 1860 | <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; | |
| 70496727 LP |
1861 | #iommu-cells = <1>; |
| 1862 | status = "disabled"; | |
| 1863 | }; | |
| 1864 | ||
| 1865 | ipmmu_sy1: mmu@e6290000 { | |
| c8d6686e | 1866 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
| 70496727 | 1867 | reg = <0 0xe6290000 0 0x1000>; |
| 3abb4d5f | 1868 | interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; |
| 70496727 LP |
1869 | #iommu-cells = <1>; |
| 1870 | status = "disabled"; | |
| 1871 | }; | |
| 1872 | ||
| 1873 | ipmmu_ds: mmu@e6740000 { | |
| c8d6686e | 1874 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
| 70496727 | 1875 | reg = <0 0xe6740000 0 0x1000>; |
| 3abb4d5f SH |
1876 | interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, |
| 1877 | <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; | |
| 70496727 LP |
1878 | #iommu-cells = <1>; |
| 1879 | status = "disabled"; | |
| 1880 | }; | |
| 1881 | ||
| 1882 | ipmmu_mp: mmu@ec680000 { | |
| c8d6686e | 1883 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
| 70496727 | 1884 | reg = <0 0xec680000 0 0x1000>; |
| 3abb4d5f | 1885 | interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; |
| 70496727 LP |
1886 | #iommu-cells = <1>; |
| 1887 | status = "disabled"; | |
| 1888 | }; | |
| 1889 | ||
| 1890 | ipmmu_mx: mmu@fe951000 { | |
| c8d6686e | 1891 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
| 70496727 | 1892 | reg = <0 0xfe951000 0 0x1000>; |
| 3abb4d5f SH |
1893 | interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, |
| 1894 | <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; | |
| 70496727 LP |
1895 | #iommu-cells = <1>; |
| 1896 | status = "disabled"; | |
| 1897 | }; | |
| 1898 | ||
| 1899 | ipmmu_rt: mmu@ffc80000 { | |
| c8d6686e | 1900 | compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; |
| 70496727 | 1901 | reg = <0 0xffc80000 0 0x1000>; |
| 3abb4d5f | 1902 | interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; |
| 70496727 LP |
1903 | #iommu-cells = <1>; |
| 1904 | status = "disabled"; | |
| 1905 | }; | |
| 0468b2d6 | 1906 | }; |