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Merge remote-tracking branch 'vfio/next'
[deliverable/linux.git] / arch / arm / mach-imx / mach-pcm037.c
CommitLineData
ce8ffef0
SH		 1/*
2 * Copyright (C) 2008 Sascha Hauer, Pengutronix
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
ce8ffef0
SH		 13 */
14
15#include <linux/types.h>
16#include <linux/init.h>
32c1ad9a 17#include <linux/dma-mapping.h>
ce8ffef0
SH		 18#include <linux/platform_device.h>
19#include <linux/mtd/physmap.h>
3dad21a9 20#include <linux/mtd/plat-ram.h>
ce8ffef0 21#include <linux/memory.h>
ba54b958 22#include <linux/gpio.h>
4353318e 23#include <linux/smsc911x.h>
ba54b958 24#include <linux/interrupt.h>
79206750 25#include <linux/i2c.h>
25f73ed5 26#include <linux/platform_data/at24.h>
dddd4a49
SH		 27#include <linux/delay.h>
28#include <linux/spi/spi.h>
29#include <linux/irq.h>
91bf9a25 30#include <linux/can/platform/sja1000.h>
ee14373c
SH		 31#include <linux/usb/otg.h>
32#include <linux/usb/ulpi.h>
5a0e3ad6 33#include <linux/gfp.h>
dca7c0b4 34#include <linux/memblock.h>
7dc3a6a5
SH		 35#include <linux/regulator/machine.h>
36#include <linux/regulator/fixed.h>
ce8ffef0 37
32c1ad9a
GL		 38#include <media/soc_camera.h>
39
ce8ffef0
SH		 40#include <asm/mach-types.h>
41#include <asm/mach/arch.h>
42#include <asm/mach/time.h>
43#include <asm/mach/map.h>
716a3dc2 44#include <asm/memblock.h>
ce8ffef0 45
e3372474 46#include "common.h"
a2ceeef5 47#include "devices-imx31.h"
641dfe8b 48#include "ehci.h"
50f2de61 49#include "hardware.h"
267dd34c 50#include "iomux-mx3.h"
574ec547 51#include "pcm037.h"
39ef6340 52#include "ulpi.h"
574ec547
GL		 53
54static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
55
56static int __init pcm037_variant_setup(char *str)
57{
58 if (!strcmp("eet", str))
59 pcm037_instance = PCM037_EET;
60 else if (strcmp("pcm970", str))
75fd32b8 61 pr_warn("Unknown pcm037 baseboard variant %s\n", str);
574ec547
GL		 62
63 return 1;
64}
65
66/* Supported values: "pcm970" (default) and "eet" */
67__setup("pcm037_variant=", pcm037_variant_setup);
68
69enum pcm037_board_variant pcm037_variant(void)
70{
71 return pcm037_instance;
72}
73
74/* UART1 with RTS/CTS handshake signals */
75static unsigned int pcm037_uart1_handshake_pins[] = {
76 MX31_PIN_CTS1__CTS1,
77 MX31_PIN_RTS1__RTS1,
78 MX31_PIN_TXD1__TXD1,
79 MX31_PIN_RXD1__RXD1,
80};
81
82/* UART1 without RTS/CTS handshake signals */
83static unsigned int pcm037_uart1_pins[] = {
84 MX31_PIN_TXD1__TXD1,
85 MX31_PIN_RXD1__RXD1,
86};
5cf09421 87
01ac7d58
SH		 88static unsigned int pcm037_pins[] = {
89 /* I2C */
90 MX31_PIN_CSPI2_MOSI__SCL,
91 MX31_PIN_CSPI2_MISO__SDA,
32c1ad9a
GL		 92 MX31_PIN_CSPI2_SS2__I2C3_SDA,
93 MX31_PIN_CSPI2_SCLK__I2C3_SCL,
01ac7d58
SH		 94 /* SDHC1 */
95 MX31_PIN_SD1_DATA3__SD1_DATA3,
96 MX31_PIN_SD1_DATA2__SD1_DATA2,
97 MX31_PIN_SD1_DATA1__SD1_DATA1,
98 MX31_PIN_SD1_DATA0__SD1_DATA0,
99 MX31_PIN_SD1_CLK__SD1_CLK,
100 MX31_PIN_SD1_CMD__SD1_CMD,
101 IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
102 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
103 /* SPI1 */
104 MX31_PIN_CSPI1_MOSI__MOSI,
105 MX31_PIN_CSPI1_MISO__MISO,
106 MX31_PIN_CSPI1_SCLK__SCLK,
107 MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
108 MX31_PIN_CSPI1_SS0__SS0,
109 MX31_PIN_CSPI1_SS1__SS1,
110 MX31_PIN_CSPI1_SS2__SS2,
01ac7d58
SH		 111 /* UART2 */
112 MX31_PIN_TXD2__TXD2,
113 MX31_PIN_RXD2__RXD2,
114 MX31_PIN_CTS2__CTS2,
115 MX31_PIN_RTS2__RTS2,
116 /* UART3 */
117 MX31_PIN_CSPI3_MOSI__RXD3,
118 MX31_PIN_CSPI3_MISO__TXD3,
119 MX31_PIN_CSPI3_SCLK__RTS3,
120 MX31_PIN_CSPI3_SPI_RDY__CTS3,
121 /* LAN9217 irq pin */
122 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
123 /* Onewire */
124 MX31_PIN_BATT_LINE__OWIRE,
125 /* Framebuffer */
126 MX31_PIN_LD0__LD0,
127 MX31_PIN_LD1__LD1,
128 MX31_PIN_LD2__LD2,
129 MX31_PIN_LD3__LD3,
130 MX31_PIN_LD4__LD4,
131 MX31_PIN_LD5__LD5,
132 MX31_PIN_LD6__LD6,
133 MX31_PIN_LD7__LD7,
134 MX31_PIN_LD8__LD8,
135 MX31_PIN_LD9__LD9,
136 MX31_PIN_LD10__LD10,
137 MX31_PIN_LD11__LD11,
138 MX31_PIN_LD12__LD12,
139 MX31_PIN_LD13__LD13,
140 MX31_PIN_LD14__LD14,
141 MX31_PIN_LD15__LD15,
142 MX31_PIN_LD16__LD16,
143 MX31_PIN_LD17__LD17,
144 MX31_PIN_VSYNC3__VSYNC3,
145 MX31_PIN_HSYNC__HSYNC,
146 MX31_PIN_FPSHIFT__FPSHIFT,
147 MX31_PIN_DRDY0__DRDY0,
148 MX31_PIN_D3_REV__D3_REV,
149 MX31_PIN_CONTRAST__CONTRAST,
150 MX31_PIN_D3_SPL__D3_SPL,
151 MX31_PIN_D3_CLS__D3_CLS,
d7b5ccc9 152 MX31_PIN_LCS0__GPIO3_23,
32c1ad9a
GL		 153 /* CSI */
154 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO),
155 MX31_PIN_CSI_D6__CSI_D6,
156 MX31_PIN_CSI_D7__CSI_D7,
157 MX31_PIN_CSI_D8__CSI_D8,
158 MX31_PIN_CSI_D9__CSI_D9,
159 MX31_PIN_CSI_D10__CSI_D10,
160 MX31_PIN_CSI_D11__CSI_D11,
161 MX31_PIN_CSI_D12__CSI_D12,
162 MX31_PIN_CSI_D13__CSI_D13,
163 MX31_PIN_CSI_D14__CSI_D14,
164 MX31_PIN_CSI_D15__CSI_D15,
165 MX31_PIN_CSI_HSYNC__CSI_HSYNC,
166 MX31_PIN_CSI_MCLK__CSI_MCLK,
167 MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
168 MX31_PIN_CSI_VSYNC__CSI_VSYNC,
e0fd4db3
LF		 169 /* GPIO */
170 IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
ee14373c 171 /* OTG */
eb05bbeb
GL		 172 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
173 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
174 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
175 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
176 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
177 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
178 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
179 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
180 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
181 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
182 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
183 MX31_PIN_USBOTG_STP__USBOTG_STP,
ee14373c
SH		 184 /* USB host 2 */
185 IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
186 IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
187 IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
188 IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
189 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
190 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
191 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
192 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
193 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
194 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
195 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
196 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
eb05bbeb
GL		 197};
198
ee14373c
SH		 199static struct physmap_flash_data pcm037_flash_data = {
200 .width = 2,
201};
eb05bbeb 202
ee14373c
SH		 203static struct resource pcm037_flash_resource = {
204 .start = 0xa0000000,
205 .end = 0xa1ffffff,
206 .flags = IORESOURCE_MEM,
eb05bbeb
GL		 207};
208
ce8ffef0
SH		 209static struct platform_device pcm037_flash = {
210 .name = "physmap-flash",
211 .id = 0,
212 .dev = {
213 .platform_data = &pcm037_flash_data,
214 },
215 .resource = &pcm037_flash_resource,
216 .num_resources = 1,
217};
218
16cf5c41 219static const struct imxuart_platform_data uart_pdata __initconst = {
a9b06233 220 .flags = IMXUART_HAVE_RTSCTS,
ce8ffef0
SH		 221};
222
4353318e 223static struct resource smsc911x_resources[] = {
3f4f54b4 224 {
f568dd7f
UKK		 225 .start = MX31_CS1_BASE_ADDR + 0x300,
226 .end = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
ba54b958 227 .flags = IORESOURCE_MEM,
3f4f54b4 228 }, {
ed175343 229 /* irq number is run-time assigned */
4353318e 230 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
ba54b958
GL		 231 },
232};
233
4353318e
SG		 234static struct smsc911x_platform_config smsc911x_info = {
235 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
236 SMSC911X_SAVE_MAC_ADDRESS,
237 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
238 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
239 .phy_interface = PHY_INTERFACE_MODE_MII,
ba54b958
GL		 240};
241
242static struct platform_device pcm037_eth = {
4353318e 243 .name = "smsc911x",
ba54b958 244 .id = -1,
4353318e
SG		 245 .num_resources = ARRAY_SIZE(smsc911x_resources),
246 .resource = smsc911x_resources,
ba54b958 247 .dev = {
4353318e 248 .platform_data = &smsc911x_info,
ba54b958
GL		 249 },
250};
251
3dad21a9
SH		 252static struct platdata_mtd_ram pcm038_sram_data = {
253 .bankwidth = 2,
254};
255
256static struct resource pcm038_sram_resource = {
f568dd7f
UKK		 257 .start = MX31_CS4_BASE_ADDR,
258 .end = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
3dad21a9
SH		 259 .flags = IORESOURCE_MEM,
260};
261
262static struct platform_device pcm037_sram_device = {
263 .name = "mtd-ram",
264 .id = 0,
265 .dev = {
266 .platform_data = &pcm038_sram_data,
267 },
268 .num_resources = 1,
269 .resource = &pcm038_sram_resource,
270};
271
a2ceeef5
UKK		 272static const struct mxc_nand_platform_data
273pcm037_nand_board_info __initconst = {
3287abbd
SH		 274 .width = 1,
275 .hw_ecc = 1,
276};
277
4a9b8b0b 278static const struct imxi2c_platform_data pcm037_i2c1_data __initconst = {
79206750 279 .bitrate = 100000,
79206750
SH		 280};
281
4a9b8b0b 282static const struct imxi2c_platform_data pcm037_i2c2_data __initconst = {
32c1ad9a
GL		 283 .bitrate = 20000,
284};
285
79206750
SH		 286static struct at24_platform_data board_eeprom = {
287 .byte_len = 4096,
288 .page_size = 32,
289 .flags = AT24_FLAG_ADDR16,
290};
291
32c1ad9a
GL		 292static int pcm037_camera_power(struct device *dev, int on)
293{
294 /* disable or enable the camera in X7 or X8 PCM970 connector */
295 gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), !on);
296 return 0;
297}
298
9d00278d 299static struct i2c_board_info pcm037_i2c_camera[] = {
32c1ad9a
GL		 300 {
301 I2C_BOARD_INFO("mt9t031", 0x5d),
9d00278d
GL		 302 }, {
303 I2C_BOARD_INFO("mt9v022", 0x48),
32c1ad9a
GL		 304 },
305};
306
9d00278d
GL		 307static struct soc_camera_link iclink_mt9v022 = {
308 .bus_id = 0, /* Must match with the camera ID */
309 .board_info = &pcm037_i2c_camera[1],
310 .i2c_adapter_id = 2,
9d00278d
GL		 311};
312
313static struct soc_camera_link iclink_mt9t031 = {
32c1ad9a
GL		 314 .bus_id = 0, /* Must match with the camera ID */
315 .power = pcm037_camera_power,
9d00278d 316 .board_info = &pcm037_i2c_camera[0],
32c1ad9a 317 .i2c_adapter_id = 2,
32c1ad9a
GL		 318};
319
79206750 320static struct i2c_board_info pcm037_i2c_devices[] = {
32c1ad9a 321 {
79206750
SH		 322 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
323 .platform_data = &board_eeprom,
324 }, {
cf87a6e2 325 I2C_BOARD_INFO("pcf8563", 0x51),
79206750
SH		 326 }
327};
32c1ad9a 328
9d00278d 329static struct platform_device pcm037_mt9t031 = {
32c1ad9a
GL		 330 .name = "soc-camera-pdrv",
331 .id = 0,
332 .dev = {
9d00278d
GL		 333 .platform_data = &iclink_mt9t031,
334 },
335};
336
337static struct platform_device pcm037_mt9v022 = {
338 .name = "soc-camera-pdrv",
339 .id = 1,
340 .dev = {
341 .platform_data = &iclink_mt9v022,
32c1ad9a
GL		 342 },
343};
79206750 344
dddd4a49
SH		 345/* Not connected by default */
346#ifdef PCM970_SDHC_RW_SWITCH
347static int pcm970_sdhc1_get_ro(struct device *dev)
f2cb641f 348{
dddd4a49
SH		 349 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
350}
351#endif
352
4f163eb8
SH		 353#define SDHC1_GPIO_WP IOMUX_TO_GPIO(MX31_PIN_SFS6)
354#define SDHC1_GPIO_DET IOMUX_TO_GPIO(MX31_PIN_SCK6)
355
dddd4a49
SH		 356static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
357 void *data)
358{
359 int ret;
dddd4a49 360
4f163eb8
SH		 361 ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
362 if (ret)
363 return ret;
364
365 gpio_direction_input(SDHC1_GPIO_DET);
dddd4a49 366
4f163eb8
SH		 367#ifdef PCM970_SDHC_RW_SWITCH
368 ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
369 if (ret)
370 goto err_gpio_free;
371 gpio_direction_input(SDHC1_GPIO_WP);
372#endif
dddd4a49 373
ed175343 374 ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SCK6)), detect_irq,
4c1dd3e5 375 IRQF_TRIGGER_FALLING, "sdhc-detect", data);
4f163eb8
SH		 376 if (ret)
377 goto err_gpio_free_2;
378
379 return 0;
380
381err_gpio_free_2:
382#ifdef PCM970_SDHC_RW_SWITCH
383 gpio_free(SDHC1_GPIO_WP);
384err_gpio_free:
385#endif
386 gpio_free(SDHC1_GPIO_DET);
387
dddd4a49 388 return ret;
f2cb641f
SH		 389}
390
391static void pcm970_sdhc1_exit(struct device *dev, void *data)
392{
ed175343 393 free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SCK6)), data);
4f163eb8
SH		 394 gpio_free(SDHC1_GPIO_DET);
395 gpio_free(SDHC1_GPIO_WP);
f2cb641f
SH		 396}
397
6a697e3d 398static const struct imxmmc_platform_data sdhc_pdata __initconst = {
dddd4a49
SH		 399#ifdef PCM970_SDHC_RW_SWITCH
400 .get_ro = pcm970_sdhc1_get_ro,
401#endif
f2cb641f
SH		 402 .init = pcm970_sdhc1_init,
403 .exit = pcm970_sdhc1_exit,
404};
405
afa77ef3 406struct mx3_camera_pdata camera_pdata __initdata = {
32c1ad9a
GL		 407 .flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
408 .mclk_10khz = 2000,
409};
410
dca7c0b4
UKK		 411static phys_addr_t mx3_camera_base __initdata;
412#define MX3_CAMERA_BUF_SIZE SZ_4M
413
afa77ef3 414static int __init pcm037_init_camera(void)
32c1ad9a 415{
afa77ef3
UKK		 416 int dma, ret = -ENOMEM;
417 struct platform_device *pdev = imx31_alloc_mx3_camera(&camera_pdata);
32c1ad9a 418
afa77ef3
UKK		 419 if (IS_ERR(pdev))
420 return PTR_ERR(pdev);
421
422 dma = dma_declare_coherent_memory(&pdev->dev,
dca7c0b4
UKK		 423 mx3_camera_base, mx3_camera_base,
424 MX3_CAMERA_BUF_SIZE,
32c1ad9a 425 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
afa77ef3
UKK		 426 if (!(dma & DMA_MEMORY_MAP))
427 goto err;
428
429 ret = platform_device_add(pdev);
430 if (ret)
431err:
432 platform_device_put(pdev);
32c1ad9a 433
afa77ef3 434 return ret;
32c1ad9a
GL		 435}
436
ce8ffef0
SH		 437static struct platform_device *devices[] __initdata = {
438 &pcm037_flash,
3dad21a9 439 &pcm037_sram_device,
9d00278d
GL		 440 &pcm037_mt9t031,
441 &pcm037_mt9v022,
ce8ffef0
SH		 442};
443
a8df0ee8
GL		 444static const struct fb_videomode fb_modedb[] = {
445 {
446 /* 240x320 @ 60 Hz Sharp */
447 .name = "Sharp-LQ035Q7DH06-QVGA",
448 .refresh = 60,
449 .xres = 240,
450 .yres = 320,
451 .pixclock = 185925,
452 .left_margin = 9,
453 .right_margin = 16,
454 .upper_margin = 7,
455 .lower_margin = 9,
456 .hsync_len = 1,
457 .vsync_len = 1,
458 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
459 FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
460 .vmode = FB_VMODE_NONINTERLACED,
461 .flag = 0,
462 }, {
463 /* 240x320 @ 60 Hz */
464 .name = "TX090",
465 .refresh = 60,
466 .xres = 240,
467 .yres = 320,
468 .pixclock = 38255,
469 .left_margin = 144,
470 .right_margin = 0,
471 .upper_margin = 7,
472 .lower_margin = 40,
473 .hsync_len = 96,
474 .vsync_len = 1,
475 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
476 .vmode = FB_VMODE_NONINTERLACED,
477 .flag = 0,
574ec547
GL		 478 }, {
479 /* 240x320 @ 60 Hz */
480 .name = "CMEL-OLED",
481 .refresh = 60,
482 .xres = 240,
483 .yres = 320,
484 .pixclock = 185925,
485 .left_margin = 9,
486 .right_margin = 16,
487 .upper_margin = 7,
488 .lower_margin = 9,
489 .hsync_len = 1,
490 .vsync_len = 1,
491 .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
492 .vmode = FB_VMODE_NONINTERLACED,
493 .flag = 0,
a8df0ee8
GL		 494 },
495};
496
497static struct mx3fb_platform_data mx3fb_pdata = {
a8df0ee8
GL		 498 .name = "Sharp-LQ035Q7DH06-QVGA",
499 .mode = fb_modedb,
500 .num_modes = ARRAY_SIZE(fb_modedb),
501};
502
91bf9a25
SH		 503static struct resource pcm970_sja1000_resources[] = {
504 {
f568dd7f
UKK		 505 .start = MX31_CS5_BASE_ADDR,
506 .end = MX31_CS5_BASE_ADDR + 0x100 - 1,
91bf9a25
SH		 507 .flags = IORESOURCE_MEM,
508 }, {
ed175343 509 /* irq number is run-time assigned */
91bf9a25
SH		 510 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
511 },
512};
513
514struct sja1000_platform_data pcm970_sja1000_platform_data = {
56e6943b
WG		 515 .osc_freq = 16000000,
516 .ocr = OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
517 .cdr = CDR_CBP,
91bf9a25
SH		 518};
519
520static struct platform_device pcm970_sja1000 = {
521 .name = "sja1000_platform",
522 .dev = {
523 .platform_data = &pcm970_sja1000_platform_data,
524 },
525 .resource = pcm970_sja1000_resources,
526 .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
527};
528
4bd597b6
SH		 529static int pcm037_otg_init(struct platform_device *pdev)
530{
531 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
532}
533
2d58de28 534static struct mxc_usbh_platform_data otg_pdata __initdata = {
4bd597b6 535 .init = pcm037_otg_init,
ee14373c 536 .portsc = MXC_EHCI_MODE_ULPI,
ee14373c
SH		 537};
538
4bd597b6
SH		 539static int pcm037_usbh2_init(struct platform_device *pdev)
540{
541 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
542}
543
2d58de28 544static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
4bd597b6 545 .init = pcm037_usbh2_init,
ee14373c 546 .portsc = MXC_EHCI_MODE_ULPI,
ee14373c
SH		 547};
548
9e1dde33 549static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
ee14373c
SH		 550 .operating_mode = FSL_USB2_DR_DEVICE,
551 .phy_mode = FSL_USB2_PHY_ULPI,
552};
553
33a264dd 554static bool otg_mode_host __initdata;
ee14373c
SH		 555
556static int __init pcm037_otg_mode(char *options)
557{
558 if (!strcmp(options, "host"))
33a264dd 559 otg_mode_host = true;
ee14373c 560 else if (!strcmp(options, "device"))
33a264dd 561 otg_mode_host = false;
ee14373c
SH		 562 else
563 pr_info("otg_mode neither \"host\" nor \"device\". "
564 "Defaulting to device\n");
33a264dd 565 return 1;
ee14373c
SH		 566}
567__setup("otg_mode=", pcm037_otg_mode);
568
7dc3a6a5
SH		 569static struct regulator_consumer_supply dummy_supplies[] = {
570 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
571 REGULATOR_SUPPLY("vddvario", "smsc911x"),
572};
573
ce8ffef0
SH		 574/*
575 * Board specific initialization.
576 */
e134fb2b 577static void __init pcm037_init(void)
ce8ffef0 578{
4f163eb8 579 int ret;
ee14373c 580
b78d8e59
SG		 581 imx31_soc_init();
582
7dc3a6a5
SH		 583 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
584
ee14373c 585 mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
4f163eb8 586
01ac7d58
SH		 587 mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
588 "pcm037");
589
ee14373c
SH		 590#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
591 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
592
593 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
594 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
595 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
596 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
597 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
598 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
599 mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG); /* USBH2_DATA2 */
600 mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG); /* USBH2_DATA3 */
601 mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG); /* USBH2_DATA4 */
602 mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG); /* USBH2_DATA5 */
603 mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG); /* USBH2_DATA6 */
604 mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG); /* USBH2_DATA7 */
605
574ec547
GL		 606 if (pcm037_variant() == PCM037_EET)
607 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
608 ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
609 else
610 mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
611 ARRAY_SIZE(pcm037_uart1_handshake_pins),
612 "pcm037_uart1");
613
ce8ffef0
SH		 614 platform_add_devices(devices, ARRAY_SIZE(devices));
615
bec31a85 616 imx31_add_imx2_wdt();
16cf5c41
UKK		 617 imx31_add_imx_uart0(&uart_pdata);
618 /* XXX: should't this have .flags = 0 (i.e. no RTSCTS) on PCM037_EET? */
619 imx31_add_imx_uart1(&uart_pdata);
620 imx31_add_imx_uart2(&uart_pdata);
d517cab1 621
bec31a85 622 imx31_add_mxc_w1();
ba54b958 623
f8e5143b 624 /* LAN9217 IRQ pin */
4f163eb8
SH		 625 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
626 if (ret)
75fd32b8 627 pr_warn("could not get LAN irq gpio\n");
4f163eb8
SH		 628 else {
629 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
ed175343
SG		 630 smsc911x_resources[1].start =
631 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
632 smsc911x_resources[1].end =
633 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
4f163eb8
SH		 634 platform_device_register(&pcm037_eth);
635 }
636
3287abbd 637
32c1ad9a 638 /* I2C adapters and devices */
79206750
SH		 639 i2c_register_board_info(1, pcm037_i2c_devices,
640 ARRAY_SIZE(pcm037_i2c_devices));
641
4a9b8b0b
UKK		 642 imx31_add_imx_i2c1(&pcm037_i2c1_data);
643 imx31_add_imx_i2c2(&pcm037_i2c2_data);
32c1ad9a 644
a2ceeef5 645 imx31_add_mxc_nand(&pcm037_nand_board_info);
6a697e3d 646 imx31_add_mxc_mmc(0, &sdhc_pdata);
88289c80 647 imx31_add_ipu_core();
afa77ef3 648 imx31_add_mx3_sdc_fb(&mx3fb_pdata);
32c1ad9a
GL		 649
650 /* CSI */
651 /* Camera power: default - off */
652 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power");
653 if (!ret)
654 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
655 else
9d00278d 656 iclink_mt9t031.power = NULL;
32c1ad9a 657
afa77ef3 658 pcm037_init_camera();
91bf9a25 659
ed175343
SG		 660 pcm970_sja1000_resources[1].start =
661 gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105)));
662 pcm970_sja1000_resources[1].end =
663 gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105)));
91bf9a25 664 platform_device_register(&pcm970_sja1000);
ee14373c 665
ee14373c 666 if (otg_mode_host) {
48f6b099
SH		 667 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
668 ULPI_OTG_DRVVBUS_EXT);
669 if (otg_pdata.otg)
670 imx31_add_mxc_ehci_otg(&otg_pdata);
ee14373c
SH		 671 }
672
48f6b099
SH		 673 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
674 ULPI_OTG_DRVVBUS_EXT);
675 if (usbh2_pdata.otg)
676 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
ee14373c 677
ee14373c 678 if (!otg_mode_host)
9e1dde33 679 imx31_add_fsl_usb2_udc(&otg_device_pdata);
ee14373c 680
ce8ffef0
SH		 681}
682
ce8ffef0
SH		 683static void __init pcm037_timer_init(void)
684{
30c730f8 685 mx31_clocks_init(26000000);
ce8ffef0
SH		 686}
687
dca7c0b4
UKK		 688static void __init pcm037_reserve(void)
689{
690 /* reserve 4 MiB for mx3-camera */
716a3dc2 691 mx3_camera_base = arm_memblock_steal(MX3_CAMERA_BUF_SIZE,
dca7c0b4 692 MX3_CAMERA_BUF_SIZE);
dca7c0b4
UKK		 693}
694
8321b758
SG		 695static void __init pcm037_init_late(void)
696{
697 pcm037_eet_init_devices();
698}
699
ce8ffef0
SH		 700MACHINE_START(PCM037, "Phytec Phycore pcm037")
701 /* Maintainer: Pengutronix */
dc8f1907 702 .atag_offset = 0x100,
dca7c0b4 703 .reserve = pcm037_reserve,
97976e22
UKK		 704 .map_io = mx31_map_io,
705 .init_early = imx31_init_early,
706 .init_irq = mx31_init_irq,
6bb27d73 707 .init_time = pcm037_timer_init,
e134fb2b 708 .init_machine = pcm037_init,
8321b758 709 .init_late = pcm037_init_late,
65ea7884 710 .restart = mxc_restart,
ce8ffef0 711MACHINE_END
Linux kernel - Deliverables
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