projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| cfca8b53 PZ |
1 | /* |
| 2 | * author: Sascha Hauer | |
| 3 | * Created: april 20th, 2004 | |
| 4 | * Copyright: Synertronixx GmbH | |
| 5 | * | |
| 07469495 | 6 | * Common code for i.MX1 machines |
| cfca8b53 PZ |
7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License as published by | |
| 10 | * the Free Software Foundation; either version 2 of the License, or | |
| 11 | * (at your option) any later version. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, | |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | * GNU General Public License for more details. | |
| cfca8b53 PZ |
17 | */ |
| 18 | #include <linux/kernel.h> | |
| 19 | #include <linux/init.h> | |
| 20 | #include <linux/io.h> | |
| a2aa65a3 | 21 | #include <linux/pinctrl/machine.h> |
| cfca8b53 PZ |
22 | |
| 23 | #include <asm/mach/map.h> | |
| 24 | ||
| e3372474 | 25 | #include "common.h" |
| 73930eb3 | 26 | #include "devices/devices-common.h" |
| 50f2de61 | 27 | #include "hardware.h" |
| 267dd34c | 28 | #include "iomux-v1.h" |
| cfca8b53 PZ |
29 | |
| 30 | static struct map_desc imx_io_desc[] __initdata = { | |
| 08ff97b5 | 31 | imx_map_entry(MX1, IO, MT_DEVICE), |
| cfca8b53 PZ |
32 | }; |
| 33 | ||
| cd4a05f9 | 34 | void __init mx1_map_io(void) |
| 3dac2196 UKK |
35 | { |
| 36 | iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); | |
| 37 | } | |
| 38 | ||
| 39 | void __init imx1_init_early(void) | |
| cfca8b53 | 40 | { |
| cd4a05f9 | 41 | mxc_set_cpu_type(MXC_CPU_MX1); |
| ff255feb SH |
42 | imx_iomuxv1_init(MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR), |
| 43 | MX1_NUM_GPIO_PORT); | |
| cfca8b53 | 44 | } |
| c5aa0ad0 SH |
45 | |
| 46 | void __init mx1_init_irq(void) | |
| 47 | { | |
| 05a3185c | 48 | mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR)); |
| b78d8e59 SG |
49 | } |
| 50 | ||
| 51 | void __init imx1_soc_init(void) | |
| 52 | { | |
| 6f98cb22 | 53 | imx1_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR)); |
| 9a37ac48 GGM |
54 | mxc_device_init(); |
| 55 | ||
| e7fc6ae7 SG |
56 | mxc_register_gpio("imx1-gpio", 0, MX1_GPIO1_BASE_ADDR, SZ_256, |
| 57 | MX1_GPIO_INT_PORTA, 0); | |
| 58 | mxc_register_gpio("imx1-gpio", 1, MX1_GPIO2_BASE_ADDR, SZ_256, | |
| 59 | MX1_GPIO_INT_PORTB, 0); | |
| 60 | mxc_register_gpio("imx1-gpio", 2, MX1_GPIO3_BASE_ADDR, SZ_256, | |
| 61 | MX1_GPIO_INT_PORTC, 0); | |
| 62 | mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256, | |
| 63 | MX1_GPIO_INT_PORTD, 0); | |
| e51d0f0a SG |
64 | imx_add_imx_dma("imx1-dma", MX1_DMA_BASE_ADDR, |
| 65 | MX1_DMA_INT, MX1_DMA_ERR); | |
| a2aa65a3 | 66 | pinctrl_provide_dummies(); |
| c5aa0ad0 | 67 | } |