[deliverable/linux.git] / arch / arm / mach-realview / core.c

/*
 *  linux/arch/arm/mach-realview/core.c
 *
 *  Copyright (C) 1999 - 2003 ARM Limited
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
#include <linux/platform_data/video-clcd-versatile.h>
#include <linux/io.h>
#include <linux/smsc911x.h>
#include <linux/smc91x.h>
#include <linux/ata_platform.h>
#include <linux/amba/mmci.h>
#include <linux/gfp.h>
#include <linux/mtd/physmap.h>
#include <linux/memblock.h>

#include <clocksource/timer-sp804.h>
#include "hardware.h"
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/hardware/icst.h>

#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h>

#include "platform.h"

#include <plat/sched_clock.h>

#include "core.h"

#define REALVIEW_FLASHCTRL    (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)

static void realview_flash_set_vpp(struct platform_device *pdev, int on)
{
	u32 val;

	val = __raw_readl(REALVIEW_FLASHCTRL);
	if (on)
		val |= REALVIEW_FLASHPROG_FLVPPEN;
	else
		val &= ~REALVIEW_FLASHPROG_FLVPPEN;
	__raw_writel(val, REALVIEW_FLASHCTRL);
}

static struct physmap_flash_data realview_flash_data = {
	.width			= 4,
	.set_vpp		= realview_flash_set_vpp,
};

struct platform_device realview_flash_device = {
	.name			= "physmap-flash",
	.id			= 0,
	.dev			= {
		.platform_data	= &realview_flash_data,
	},
};

int realview_flash_register(struct resource *res, u32 num)
{
	realview_flash_device.resource = res;
	realview_flash_device.num_resources = num;
	return platform_device_register(&realview_flash_device);
}

static struct smsc911x_platform_config smsc911x_config = {
	.flags		= SMSC911X_USE_32BIT,
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
	.phy_interface	= PHY_INTERFACE_MODE_MII,
};

static struct smc91x_platdata smc91x_platdata = {
	.flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
};

static struct platform_device realview_eth_device = {
	.name		= "smsc911x",
	.id		= 0,
	.num_resources	= 2,
};

int realview_eth_register(const char *name, struct resource *res)
{
	if (name)
		realview_eth_device.name = name;
	realview_eth_device.resource = res;
	if (strcmp(realview_eth_device.name, "smsc911x") == 0)
		realview_eth_device.dev.platform_data = &smsc911x_config;
	else
		realview_eth_device.dev.platform_data = &smc91x_platdata;

	return platform_device_register(&realview_eth_device);
}

struct platform_device realview_usb_device = {
	.name			= "isp1760",
	.num_resources		= 2,
};

int realview_usb_register(struct resource *res)
{
	realview_usb_device.resource = res;
	return platform_device_register(&realview_usb_device);
}

static struct pata_platform_info pata_platform_data = {
	.ioport_shift		= 1,
};

static struct resource pata_resources[] = {
	[0] = {
		.start		= REALVIEW_CF_BASE,
		.end		= REALVIEW_CF_BASE + 0xff,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= REALVIEW_CF_BASE + 0x100,
		.end		= REALVIEW_CF_BASE + SZ_4K - 1,
		.flags		= IORESOURCE_MEM,
	},
};

struct platform_device realview_cf_device = {
	.name			= "pata_platform",
	.id			= -1,
	.num_resources		= ARRAY_SIZE(pata_resources),
	.resource		= pata_resources,
	.dev			= {
		.platform_data	= &pata_platform_data,
	},
};

static struct resource realview_leds_resources[] = {
	{
		.start	= REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET,
		.end	= REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device realview_leds_device = {
	.name		= "versatile-leds",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(realview_leds_resources),
	.resource	= realview_leds_resources,
};

static struct resource realview_i2c_resource = {
	.start		= REALVIEW_I2C_BASE,
	.end		= REALVIEW_I2C_BASE + SZ_4K - 1,
	.flags		= IORESOURCE_MEM,
};

struct platform_device realview_i2c_device = {
	.name		= "versatile-i2c",
	.id		= 0,
	.num_resources	= 1,
	.resource	= &realview_i2c_resource,
};

static struct i2c_board_info realview_i2c_board_info[] = {
	{
		I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
	},
};

static int __init realview_i2c_init(void)
{
	return i2c_register_board_info(0, realview_i2c_board_info,
				       ARRAY_SIZE(realview_i2c_board_info));
}
arch_initcall(realview_i2c_init);

#define REALVIEW_SYSMCI	(__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)

/*
 * This is only used if GPIOLIB support is disabled
 */
static unsigned int realview_mmc_status(struct device *dev)
{
	struct amba_device *adev = container_of(dev, struct amba_device, dev);
	u32 mask;

	if (machine_is_realview_pb1176()) {
		static bool inserted = false;

		/*
		 * The PB1176 does not have the status register,
		 * assume it is inserted at startup, then invert
		 * for each call so card insertion/removal will
		 * be detected anyway. This will not be called if
		 * GPIO on PL061 is active, which is the proper
		 * way to do this on the PB1176.
		 */
		inserted = !inserted;
		return inserted ? 0 : 1;
	}

	if (adev->res.start == REALVIEW_MMCI0_BASE)
		mask = 1;
	else
		mask = 2;

	return readl(REALVIEW_SYSMCI) & mask;
}

struct mmci_platform_data realview_mmc0_plat_data = {
	.ocr_mask	= MMC_VDD_32_33|MMC_VDD_33_34,
	.status		= realview_mmc_status,
	.gpio_wp	= 17,
	.gpio_cd	= 16,
	.cd_invert	= true,
};

struct mmci_platform_data realview_mmc1_plat_data = {
	.ocr_mask	= MMC_VDD_32_33|MMC_VDD_33_34,
	.status		= realview_mmc_status,
	.gpio_wp	= 19,
	.gpio_cd	= 18,
	.cd_invert	= true,
};

void __init realview_init_early(void)
{
	void __iomem *sys = __io_address(REALVIEW_SYS_BASE);

	versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
}

/*
 * CLCD support.
 */
#define SYS_CLCD_NLCDIOON	(1 << 2)
#define SYS_CLCD_VDDPOSSWITCH	(1 << 3)
#define SYS_CLCD_PWR3V5SWITCH	(1 << 4)
#define SYS_CLCD_ID_MASK	(0x1f << 8)
#define SYS_CLCD_ID_SANYO_3_8	(0x00 << 8)
#define SYS_CLCD_ID_UNKNOWN_8_4	(0x01 << 8)
#define SYS_CLCD_ID_EPSON_2_2	(0x02 << 8)
#define SYS_CLCD_ID_SANYO_2_5	(0x07 << 8)
#define SYS_CLCD_ID_VGA		(0x1f << 8)

/*
 * Disable all display connectors on the interface module.
 */
static void realview_clcd_disable(struct clcd_fb *fb)
{
	void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
	u32 val;

	val = readl(sys_clcd);
	val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
	writel(val, sys_clcd);
}

/*
 * Enable the relevant connector on the interface module.
 */
static void realview_clcd_enable(struct clcd_fb *fb)
{
	void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
	u32 val;

	/*
	 * Enable the PSUs
	 */
	val = readl(sys_clcd);
	val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
	writel(val, sys_clcd);
}

/*
 * Detect which LCD panel is connected, and return the appropriate
 * clcd_panel structure.  Note: we do not have any information on
 * the required timings for the 8.4in panel, so we presently assume
 * VGA timings.
 */
static int realview_clcd_setup(struct clcd_fb *fb)
{
	void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
	const char *panel_name, *vga_panel_name;
	unsigned long framesize;
	u32 val;

	if (machine_is_realview_eb()) {
		/* VGA, 16bpp */
		framesize = 640 * 480 * 2;
		vga_panel_name = "VGA";
	} else {
		/* XVGA, 16bpp */
		framesize = 1024 * 768 * 2;
		vga_panel_name = "XVGA";
	}

	val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
	if (val == SYS_CLCD_ID_SANYO_3_8)
		panel_name = "Sanyo TM38QV67A02A";
	else if (val == SYS_CLCD_ID_SANYO_2_5)
		panel_name = "Sanyo QVGA Portrait";
	else if (val == SYS_CLCD_ID_EPSON_2_2)
		panel_name = "Epson L2F50113T00";
	else if (val == SYS_CLCD_ID_VGA)
		panel_name = vga_panel_name;
	else {
		pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
		panel_name = vga_panel_name;
	}

	fb->panel = versatile_clcd_get_panel(panel_name);
	if (!fb->panel)
		return -EINVAL;

	return versatile_clcd_setup_dma(fb, framesize);
}

struct clcd_board clcd_plat_data = {
	.name		= "RealView",
	.caps		= CLCD_CAP_ALL,
	.check		= clcdfb_check,
	.decode		= clcdfb_decode,
	.disable	= realview_clcd_disable,
	.enable		= realview_clcd_enable,
	.setup		= realview_clcd_setup,
	.mmap		= versatile_clcd_mmap_dma,
	.remove		= versatile_clcd_remove_dma,
};

/*
 * Where is the timer (VA)?
 */
void __iomem *timer0_va_base;
void __iomem *timer1_va_base;
void __iomem *timer2_va_base;
void __iomem *timer3_va_base;

/*
 * Set up the clock source and clock events devices
 */
void __init realview_timer_init(unsigned int timer_irq)
{
	u32 val;

	/* 
	 * set clock frequency: 
	 *	REALVIEW_REFCLK is 32KHz
	 *	REALVIEW_TIMCLK is 1MHz
	 */
	val = readl(__io_address(REALVIEW_SCTL_BASE));
	writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
	       (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) | 
	       (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
	       (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
	       __io_address(REALVIEW_SCTL_BASE));

	/*
	 * Initialise to a known state (all timers off)
	 */
	sp804_timer_disable(timer0_va_base);
	sp804_timer_disable(timer1_va_base);
	sp804_timer_disable(timer2_va_base);
	sp804_timer_disable(timer3_va_base);

	sp804_clocksource_init(timer3_va_base, "timer3");
	sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");
}

/*
 * Setup the memory banks.
 */
void realview_fixup(struct tag *tags, char **from)
{
	/*
	 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
	 * Half of this is mirrored at 0.
	 */
#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
	memblock_add(0x70000000, SZ_512M);
#else
	memblock_add(0, SZ_256M);
#endif
}
Commit	Line	Data
8ad68bbf CM	1	/*
	2	* linux/arch/arm/mach-realview/core.c
	3	*
	4	* Copyright (C) 1999 - 2003 ARM Limited
	5	* Copyright (C) 2000 Deep Blue Solutions Ltd
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
8ad68bbf	21	#include <linux/init.h>
1be7228d	22	#include <linux/platform_device.h>
8ad68bbf	23	#include <linux/dma-mapping.h>
edbaa603	24	#include <linux/device.h>
8ad68bbf	25	#include <linux/interrupt.h>
a62c80e5 RK	26	#include <linux/amba/bus.h>
a62c80e5 RK	27	#include <linux/amba/clcd.h>
11c32d7b	28	#include <linux/platform_data/video-clcd-versatile.h>
fced80c7	29	#include <linux/io.h>
c5142e84	30	#include <linux/smsc911x.h>
b70661c7	31	#include <linux/smc91x.h>
6be62ba2	32	#include <linux/ata_platform.h>
6ef297f8	33	#include <linux/amba/mmci.h>
5a0e3ad6	34	#include <linux/gfp.h>
b8b87aef	35	#include <linux/mtd/physmap.h>
1c2f87c2	36	#include <linux/memblock.h>
8ad68bbf	37
0b7402dc	38	#include <clocksource/timer-sp804.h>
6d407a6e	39	#include "hardware.h"
8ad68bbf	40	#include <asm/irq.h>
68c3d935	41	#include <asm/mach-types.h>
c5a0adb5	42	#include <asm/hardware/icst.h>
8ad68bbf CM	43
8ad68bbf CM	44	#include <asm/mach/arch.h>
8ad68bbf	45	#include <asm/mach/irq.h>
8ad68bbf	46	#include <asm/mach/map.h>
8ad68bbf	47
6d407a6e	48	#include "platform.h"
ee8c9571	49
1da0c89c RK	50	#include <plat/sched_clock.h>
1da0c89c RK	51
8ad68bbf	52	#include "core.h"
8ad68bbf	53
8ad68bbf CM	54	#define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
8ad68bbf CM	55
667f390b	56	static void realview_flash_set_vpp(struct platform_device *pdev, int on)
8ad68bbf CM	57	{
	58	u32 val;
	59
	60	val = __raw_readl(REALVIEW_FLASHCTRL);
	61	if (on)
	62	val \|= REALVIEW_FLASHPROG_FLVPPEN;
	63	else
	64	val &= ~REALVIEW_FLASHPROG_FLVPPEN;
	65	__raw_writel(val, REALVIEW_FLASHCTRL);
	66	}
	67
b8b87aef	68	static struct physmap_flash_data realview_flash_data = {
8ad68bbf	69	.width = 4,
8ad68bbf CM	70	.set_vpp = realview_flash_set_vpp,
	71	};
	72
8ad68bbf	73	struct platform_device realview_flash_device = {
b8b87aef	74	.name = "physmap-flash",
8ad68bbf CM	75	.id = 0,
	76	.dev = {
	77	.platform_data = &realview_flash_data,
	78	},
8ad68bbf CM	79	};
8ad68bbf CM	80
a44ddfd5 CM	81	int realview_flash_register(struct resource *res, u32 num)
	82	{
	83	realview_flash_device.resource = res;
	84	realview_flash_device.num_resources = num;
	85	return platform_device_register(&realview_flash_device);
	86	}
	87
c5142e84 SG	88	static struct smsc911x_platform_config smsc911x_config = {
	89	.flags = SMSC911X_USE_32BIT,
	90	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
	91	.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
	92	.phy_interface = PHY_INTERFACE_MODE_MII,
0a5b2f6b CM	93	};
0a5b2f6b CM	94
b70661c7 AB	95	static struct smc91x_platdata smc91x_platdata = {
	96	.flags = SMC91X_USE_32BIT \| SMC91X_NOWAIT,
	97	};
	98
0a381330	99	static struct platform_device realview_eth_device = {
c5142e84	100	.name = "smsc911x",
0a381330 CM	101	.id = 0,
	102	.num_resources = 2,
	103	};
	104
	105	int realview_eth_register(const char name, struct resource res)
	106	{
	107	if (name)
	108	realview_eth_device.name = name;
	109	realview_eth_device.resource = res;
c5142e84 SG	110	if (strcmp(realview_eth_device.name, "smsc911x") == 0)
c5142e84 SG	111	realview_eth_device.dev.platform_data = &smsc911x_config;
b70661c7 AB	112	else
b70661c7 AB	113	realview_eth_device.dev.platform_data = &smc91x_platdata;
0a381330 CM	114
0a381330 CM	115	return platform_device_register(&realview_eth_device);
7db21712 CM	116	}
	117
	118	struct platform_device realview_usb_device = {
	119	.name = "isp1760",
	120	.num_resources = 2,
	121	};
	122
	123	int realview_usb_register(struct resource *res)
	124	{
	125	realview_usb_device.resource = res;
	126	return platform_device_register(&realview_usb_device);
0a381330 CM	127	}
0a381330 CM	128
6be62ba2 CM	129	static struct pata_platform_info pata_platform_data = {
	130	.ioport_shift = 1,
	131	};
	132
	133	static struct resource pata_resources[] = {
	134	[0] = {
	135	.start = REALVIEW_CF_BASE,
	136	.end = REALVIEW_CF_BASE + 0xff,
	137	.flags = IORESOURCE_MEM,
	138	},
	139	[1] = {
	140	.start = REALVIEW_CF_BASE + 0x100,
	141	.end = REALVIEW_CF_BASE + SZ_4K - 1,
	142	.flags = IORESOURCE_MEM,
	143	},
	144	};
	145
	146	struct platform_device realview_cf_device = {
	147	.name = "pata_platform",
	148	.id = -1,
	149	.num_resources = ARRAY_SIZE(pata_resources),
	150	.resource = pata_resources,
	151	.dev = {
	152	.platform_data = &pata_platform_data,
	153	},
	154	};
	155
e4ecf2bd LW	156	static struct resource realview_leds_resources[] = {
	157	{
	158	.start = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET,
	159	.end = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4,
	160	.flags = IORESOURCE_MEM,
	161	},
	162	};
	163
	164	struct platform_device realview_leds_device = {
	165	.name = "versatile-leds",
	166	.id = -1,
	167	.num_resources = ARRAY_SIZE(realview_leds_resources),
	168	.resource = realview_leds_resources,
	169	};
	170
6b65cd74 RK	171	static struct resource realview_i2c_resource = {
	172	.start = REALVIEW_I2C_BASE,
	173	.end = REALVIEW_I2C_BASE + SZ_4K - 1,
	174	.flags = IORESOURCE_MEM,
	175	};
	176
	177	struct platform_device realview_i2c_device = {
	178	.name = "versatile-i2c",
533ad5e6	179	.id = 0,
6b65cd74 RK	180	.num_resources = 1,
	181	.resource = &realview_i2c_resource,
	182	};
	183
533ad5e6 CM	184	static struct i2c_board_info realview_i2c_board_info[] = {
533ad5e6 CM	185	{
64e8be6e	186	I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
533ad5e6 CM	187	},
	188	};
	189
	190	static int __init realview_i2c_init(void)
	191	{
	192	return i2c_register_board_info(0, realview_i2c_board_info,
	193	ARRAY_SIZE(realview_i2c_board_info));
	194	}
	195	arch_initcall(realview_i2c_init);
	196
8ad68bbf CM	197	#define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
8ad68bbf CM	198
98b0979f RK	199	/*
	200	* This is only used if GPIOLIB support is disabled
	201	*/
8ad68bbf CM	202	static unsigned int realview_mmc_status(struct device *dev)
	203	{
	204	struct amba_device *adev = container_of(dev, struct amba_device, dev);
	205	u32 mask;
	206
48f1d5a3 LW	207	if (machine_is_realview_pb1176()) {
	208	static bool inserted = false;
	209
	210	/*
	211	* The PB1176 does not have the status register,
	212	* assume it is inserted at startup, then invert
	213	* for each call so card insertion/removal will
	214	* be detected anyway. This will not be called if
	215	* GPIO on PL061 is active, which is the proper
	216	* way to do this on the PB1176.
	217	*/
	218	inserted = !inserted;
	219	return inserted ? 0 : 1;
	220	}
	221
8ad68bbf CM	222	if (adev->res.start == REALVIEW_MMCI0_BASE)
	223	mask = 1;
	224	else
	225	mask = 2;
	226
74bc8093	227	return readl(REALVIEW_SYSMCI) & mask;
8ad68bbf CM	228	}
8ad68bbf CM	229
6ef297f8	230	struct mmci_platform_data realview_mmc0_plat_data = {
8ad68bbf CM	231	.ocr_mask = MMC_VDD_32_33\|MMC_VDD_33_34,
8ad68bbf CM	232	.status = realview_mmc_status,
98b0979f RK	233	.gpio_wp = 17,
98b0979f RK	234	.gpio_cd = 16,
29719445	235	.cd_invert = true,
8ad68bbf CM	236	};
8ad68bbf CM	237
6ef297f8	238	struct mmci_platform_data realview_mmc1_plat_data = {
8ad68bbf CM	239	.ocr_mask = MMC_VDD_32_33\|MMC_VDD_33_34,
8ad68bbf CM	240	.status = realview_mmc_status,
98b0979f RK	241	.gpio_wp = 19,
98b0979f RK	242	.gpio_cd = 18,
29719445	243	.cd_invert = true,
8ad68bbf CM	244	};
8ad68bbf CM	245
631e55f9	246	void __init realview_init_early(void)
cf30fb4a	247	{
631e55f9 RK	248	void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
631e55f9 RK	249
631e55f9	250	versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
cf30fb4a	251	}
cf30fb4a	252
8ad68bbf CM	253	/*
	254	* CLCD support.
	255	*/
8ad68bbf CM	256	#define SYS_CLCD_NLCDIOON (1 << 2)
	257	#define SYS_CLCD_VDDPOSSWITCH (1 << 3)
	258	#define SYS_CLCD_PWR3V5SWITCH (1 << 4)
	259	#define SYS_CLCD_ID_MASK (0x1f << 8)
	260	#define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
	261	#define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
	262	#define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
	263	#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
	264	#define SYS_CLCD_ID_VGA (0x1f << 8)
	265
8ad68bbf CM	266	/*
	267	* Disable all display connectors on the interface module.
	268	*/
	269	static void realview_clcd_disable(struct clcd_fb *fb)
	270	{
	271	void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
	272	u32 val;
	273
	274	val = readl(sys_clcd);
	275	val &= ~SYS_CLCD_NLCDIOON \| SYS_CLCD_PWR3V5SWITCH;
	276	writel(val, sys_clcd);
	277	}
	278
	279	/*
	280	* Enable the relevant connector on the interface module.
	281	*/
	282	static void realview_clcd_enable(struct clcd_fb *fb)
	283	{
	284	void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
	285	u32 val;
	286
8ad68bbf	287	/*
9e7714d0	288	* Enable the PSUs
8ad68bbf	289	*/
9e7714d0	290	val = readl(sys_clcd);
8ad68bbf CM	291	val \|= SYS_CLCD_NLCDIOON \| SYS_CLCD_PWR3V5SWITCH;
	292	writel(val, sys_clcd);
	293	}
	294
3cb5ee49 RK	295	/*
	296	* Detect which LCD panel is connected, and return the appropriate
	297	* clcd_panel structure. Note: we do not have any information on
	298	* the required timings for the 8.4in panel, so we presently assume
	299	* VGA timings.
	300	*/
8ad68bbf CM	301	static int realview_clcd_setup(struct clcd_fb *fb)
8ad68bbf CM	302	{
3cb5ee49 RK	303	void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
3cb5ee49 RK	304	const char panel_name, vga_panel_name;
c34a1025	305	unsigned long framesize;
3cb5ee49	306	u32 val;
8ad68bbf	307
3cb5ee49	308	if (machine_is_realview_eb()) {
c34a1025 CT	309	/* VGA, 16bpp */
c34a1025 CT	310	framesize = 640 * 480 * 2;
3cb5ee49 RK	311	vga_panel_name = "VGA";
3cb5ee49 RK	312	} else {
c34a1025 CT	313	/* XVGA, 16bpp */
c34a1025 CT	314	framesize = 1024 * 768 * 2;
3cb5ee49	315	vga_panel_name = "XVGA";
8ad68bbf CM	316	}
8ad68bbf CM	317
3cb5ee49 RK	318	val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
	319	if (val == SYS_CLCD_ID_SANYO_3_8)
	320	panel_name = "Sanyo TM38QV67A02A";
	321	else if (val == SYS_CLCD_ID_SANYO_2_5)
	322	panel_name = "Sanyo QVGA Portrait";
	323	else if (val == SYS_CLCD_ID_EPSON_2_2)
	324	panel_name = "Epson L2F50113T00";
	325	else if (val == SYS_CLCD_ID_VGA)
	326	panel_name = vga_panel_name;
	327	else {
	328	pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
	329	panel_name = vga_panel_name;
	330	}
8ad68bbf	331
3cb5ee49 RK	332	fb->panel = versatile_clcd_get_panel(panel_name);
	333	if (!fb->panel)
	334	return -EINVAL;
8ad68bbf	335
3cb5ee49	336	return versatile_clcd_setup_dma(fb, framesize);
8ad68bbf CM	337	}
	338
	339	struct clcd_board clcd_plat_data = {
	340	.name = "RealView",
3cb5ee49	341	.caps = CLCD_CAP_ALL,
8ad68bbf CM	342	.check = clcdfb_check,
	343	.decode = clcdfb_decode,
	344	.disable = realview_clcd_disable,
	345	.enable = realview_clcd_enable,
	346	.setup = realview_clcd_setup,
3cb5ee49 RK	347	.mmap = versatile_clcd_mmap_dma,
3cb5ee49 RK	348	.remove = versatile_clcd_remove_dma,
8ad68bbf CM	349	};
8ad68bbf CM	350
8ad68bbf CM	351	/*
	352	* Where is the timer (VA)?
	353	*/
80192735 CM	354	void __iomem *timer0_va_base;
	355	void __iomem *timer1_va_base;
	356	void __iomem *timer2_va_base;
	357	void __iomem *timer3_va_base;
8ad68bbf	358
8ad68bbf	359	/*
a8655e83	360	* Set up the clock source and clock events devices
8ad68bbf	361	*/
8cc4c548	362	void __init realview_timer_init(unsigned int timer_irq)
8ad68bbf CM	363	{
	364	u32 val;
	365
	366	/*
	367	* set clock frequency:
	368	* REALVIEW_REFCLK is 32KHz
	369	* REALVIEW_TIMCLK is 1MHz
	370	*/
	371	val = readl(__io_address(REALVIEW_SCTL_BASE));
	372	writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) \|
	373	(REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) \|
	374	(REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) \|
	375	(REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) \| val,
	376	__io_address(REALVIEW_SCTL_BASE));
	377
	378	/*
	379	* Initialise to a known state (all timers off)
	380	*/
1e5f0519 SH	381	sp804_timer_disable(timer0_va_base);
	382	sp804_timer_disable(timer1_va_base);
	383	sp804_timer_disable(timer2_va_base);
	384	sp804_timer_disable(timer3_va_base);
8ad68bbf	385
fb593cf3	386	sp804_clocksource_init(timer3_va_base, "timer3");
57cc4f7d	387	sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");
8ad68bbf	388	}
5b39d154 CM	389
	390	/*
	391	* Setup the memory banks.
	392	*/
1c2f87c2	393	void realview_fixup(struct tag tags, char *from)
5b39d154 CM	394	{
	395	/*
	396	* Most RealView platforms have 512MB contiguous RAM at 0x70000000.
	397	* Half of this is mirrored at 0.
	398	*/
	399	#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
1c2f87c2	400	memblock_add(0x70000000, SZ_512M);
5b39d154	401	#else
1c2f87c2	402	memblock_add(0, SZ_256M);
5b39d154 CM	403	#endif
5b39d154 CM	404	}