[deliverable/linux.git] / arch / arm / mach-realview / realview_pb1176.c

/*
 *  linux/arch/arm/mach-realview/realview_pb1176.c
 *
 *  Copyright (C) 2008 ARM Limited
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/amba/pl022.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/partitions.h>
#include <linux/io.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/platform_data/clk-realview.h>
#include <linux/reboot.h>
#include <linux/memblock.h>

#include "hardware.h"
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/pgtable.h>
#include <asm/hardware/cache-l2x0.h>

#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>

#include "board-pb1176.h"
#include "irqs-pb1176.h"

#include "core.h"

static struct map_desc realview_pb1176_io_desc[] __initdata = {
	{
		.virtual	= IO_ADDRESS(REALVIEW_SYS_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SYS_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_SCTL_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SCTL_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
		.length		= SZ_8K,
		.type		= MT_DEVICE,
	},
#ifdef CONFIG_DEBUG_LL
	{
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	},
#endif
};

static void __init realview_pb1176_map_io(void)
{
	iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
}

static struct pl061_platform_data gpio0_plat_data = {
	.gpio_base	= 0,
};

static struct pl061_platform_data gpio1_plat_data = {
	.gpio_base	= 8,
};

static struct pl061_platform_data gpio2_plat_data = {
	.gpio_base	= 16,
};

static struct pl022_ssp_controller ssp0_plat_data = {
	.bus_id = 0,
	.enable_dma = 0,
	.num_chipselect = 1,
};

/*
 * RealView PB1176 AMBA devices
 */
#define GPIO2_IRQ	{ IRQ_PB1176_GPIO2 }
#define GPIO3_IRQ	{ IRQ_PB1176_GPIO3 }
#define AACI_IRQ	{ IRQ_PB1176_AACI }
#define MMCI0_IRQ	{ IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
#define KMI0_IRQ	{ IRQ_PB1176_KMI0 }
#define KMI1_IRQ	{ IRQ_PB1176_KMI1 }
#define PB1176_SMC_IRQ	{ }
#define MPMC_IRQ	{ }
#define PB1176_CLCD_IRQ	{ IRQ_DC1176_CLCD }
#define SCTL_IRQ	{ }
#define PB1176_WATCHDOG_IRQ	{ IRQ_DC1176_WATCHDOG }
#define PB1176_GPIO0_IRQ	{ IRQ_DC1176_GPIO0 }
#define GPIO1_IRQ	{ IRQ_PB1176_GPIO1 }
#define PB1176_RTC_IRQ	{ IRQ_DC1176_RTC }
#define SCI_IRQ		{ IRQ_PB1176_SCI }
#define PB1176_UART0_IRQ	{ IRQ_DC1176_UART0 }
#define PB1176_UART1_IRQ	{ IRQ_DC1176_UART1 }
#define PB1176_UART2_IRQ	{ IRQ_DC1176_UART2 }
#define PB1176_UART3_IRQ	{ IRQ_DC1176_UART3 }
#define PB1176_UART4_IRQ	{ IRQ_PB1176_UART4 }
#define PB1176_SSP_IRQ		{ IRQ_DC1176_SSP }

/* FPGA Primecells */
APB_DEVICE(aaci,	"fpga:aaci",	AACI,		NULL);
APB_DEVICE(mmc0,	"fpga:mmc0",	MMCI0,		&realview_mmc0_plat_data);
APB_DEVICE(kmi0,	"fpga:kmi0",	KMI0,		NULL);
APB_DEVICE(kmi1,	"fpga:kmi1",	KMI1,		NULL);
APB_DEVICE(uart4,	"fpga:uart4",	PB1176_UART4,	NULL);

/* DevChip Primecells */
AHB_DEVICE(smc,		"dev:smc",	PB1176_SMC,	NULL);
AHB_DEVICE(sctl,	"dev:sctl",	SCTL,		NULL);
APB_DEVICE(wdog,	"dev:wdog",	PB1176_WATCHDOG,	NULL);
APB_DEVICE(gpio0,	"dev:gpio0",	PB1176_GPIO0,	&gpio0_plat_data);
APB_DEVICE(gpio1,	"dev:gpio1",	GPIO1,		&gpio1_plat_data);
APB_DEVICE(gpio2,	"dev:gpio2",	GPIO2,		&gpio2_plat_data);
APB_DEVICE(rtc,		"dev:rtc",	PB1176_RTC,	NULL);
APB_DEVICE(sci0,	"dev:sci0",	SCI,		NULL);
APB_DEVICE(uart0,	"dev:uart0",	PB1176_UART0,	NULL);
APB_DEVICE(uart1,	"dev:uart1",	PB1176_UART1,	NULL);
APB_DEVICE(uart2,	"dev:uart2",	PB1176_UART2,	NULL);
APB_DEVICE(uart3,	"dev:uart3",	PB1176_UART3,	NULL);
APB_DEVICE(ssp0,	"dev:ssp0",	PB1176_SSP,	&ssp0_plat_data);
AHB_DEVICE(clcd,	"dev:clcd",	PB1176_CLCD,	&clcd_plat_data);

static struct amba_device *amba_devs[] __initdata = {
	&uart0_device,
	&uart1_device,
	&uart2_device,
	&uart3_device,
	&uart4_device,
	&smc_device,
	&clcd_device,
	&sctl_device,
	&wdog_device,
	&gpio0_device,
	&gpio1_device,
	&gpio2_device,
	&rtc_device,
	&sci0_device,
	&ssp0_device,
	&aaci_device,
	&mmc0_device,
	&kmi0_device,
	&kmi1_device,
};

/*
 * RealView PB1176 platform devices
 */
static struct resource realview_pb1176_flash_resources[] = {
	{
		.start		= REALVIEW_PB1176_FLASH_BASE,
		.end		= REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
		.flags		= IORESOURCE_MEM,
	},
#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
	{
		.start		= REALVIEW_PB1176_SEC_FLASH_BASE,
		.end		= REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
		.flags		= IORESOURCE_MEM,
	},
#endif
};

static struct physmap_flash_data pb1176_rom_pdata = {
	.probe_type	= "map_rom",
	.width		= 4,
	.nr_parts	= 0,
};

static struct resource pb1176_rom_resources[] = {
	/*
	 * This exposes the PB1176 DevChip ROM as an MTD ROM mapping.
	 * The reference manual states that this is actually a pseudo-ROM
	 * programmed in NVRAM.
	 */
	{
		.start		= REALVIEW_DC1176_ROM_BASE,
		.end		= REALVIEW_DC1176_ROM_BASE + SZ_16K - 1,
		.flags		= IORESOURCE_MEM,
	}
};

static struct platform_device pb1176_rom_device = {
	.name		= "physmap-flash",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(pb1176_rom_resources),
	.resource	= pb1176_rom_resources,
	.dev = {
		.platform_data = &pb1176_rom_pdata,
	},
};

static struct resource realview_pb1176_smsc911x_resources[] = {
	[0] = {
		.start		= REALVIEW_PB1176_ETH_BASE,
		.end		= REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IRQ_PB1176_ETH,
		.end		= IRQ_PB1176_ETH,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct resource realview_pb1176_isp1761_resources[] = {
	[0] = {
		.start		= REALVIEW_PB1176_USB_BASE,
		.end		= REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IRQ_PB1176_USB,
		.end		= IRQ_PB1176_USB,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct resource pmu_resource = {
	.start		= IRQ_DC1176_CORE_PMU,
	.end		= IRQ_DC1176_CORE_PMU,
	.flags		= IORESOURCE_IRQ,
};

static struct platform_device pmu_device = {
	.name			= "armv6-pmu",
	.id			= -1,
	.num_resources		= 1,
	.resource		= &pmu_resource,
};

static struct resource char_lcd_resources[] = {
	{
		.start = REALVIEW_CHAR_LCD_BASE,
		.end   = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
		.flags = IORESOURCE_MEM,
	},
	{
		.start	= IRQ_PB1176_CHARLCD,
		.end	= IRQ_PB1176_CHARLCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device char_lcd_device = {
	.name		=	"arm-charlcd",
	.id		=	-1,
	.num_resources	=	ARRAY_SIZE(char_lcd_resources),
	.resource	=	char_lcd_resources,
};

static void __init gic_init_irq(void)
{
	/* ARM1176 DevChip GIC, primary */
	gic_init(0, IRQ_DC1176_GIC_START,
		 __io_address(REALVIEW_DC1176_GIC_DIST_BASE),
		 __io_address(REALVIEW_DC1176_GIC_CPU_BASE));

	/* board GIC, secondary */
	gic_init(1, IRQ_PB1176_GIC_START,
		 __io_address(REALVIEW_PB1176_GIC_DIST_BASE),
		 __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
	gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
}

static void __init realview_pb1176_timer_init(void)
{
	timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
	timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
	timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
	timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;

	realview_clk_init(__io_address(REALVIEW_SYS_BASE), true);
	realview_timer_init(IRQ_DC1176_TIMER0);
}

static void realview_pb1176_restart(enum reboot_mode mode, const char *cmd)
{
	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
	__raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
	dsb();
}

static void realview_pb1176_fixup(struct tag *tags, char **from)
{
	/*
	 * RealView PB1176 only has 128MB of RAM mapped at 0.
	 */
	memblock_add(0, SZ_128M);
}

static void __init realview_pb1176_init(void)
{
	int i;

#ifdef CONFIG_CACHE_L2X0
	/*
	 * The PL220 needs to be manually configured as the hardware
	 * doesn't report the correct sizes.
	 * 128kB (16kB/way), 8-way associativity, event monitor and
	 * parity enabled, ignore share bit, no force write allocate
	 * Bits:  .... ...0 0111 0011 0000 .... .... ....
	 */
	l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
#endif

	realview_flash_register(realview_pb1176_flash_resources,
				ARRAY_SIZE(realview_pb1176_flash_resources));
	platform_device_register(&pb1176_rom_device);
	realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
	platform_device_register(&realview_i2c_device);
	realview_usb_register(realview_pb1176_isp1761_resources);
	platform_device_register(&pmu_device);
	platform_device_register(&char_lcd_device);
	platform_device_register(&realview_leds_device);

	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
		struct amba_device *d = amba_devs[i];
		amba_device_register(d, &iomem_resource);
	}
}

MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
	.atag_offset	= 0x100,
	.fixup		= realview_pb1176_fixup,
	.map_io		= realview_pb1176_map_io,
	.init_early	= realview_init_early,
	.init_irq	= gic_init_irq,
	.init_time	= realview_pb1176_timer_init,
	.init_machine	= realview_pb1176_init,
#ifdef CONFIG_ZONE_DMA
	.dma_zone_size	= SZ_256M,
#endif
	.restart	= realview_pb1176_restart,
MACHINE_END
Commit	Line	Data
a0316b24 BB	1	/*
	2	* linux/arch/arm/mach-realview/realview_pb1176.c
	3	*
	4	* Copyright (C) 2008 ARM Limited
	5	* Copyright (C) 2000 Deep Blue Solutions Ltd
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
	22	#include <linux/init.h>
	23	#include <linux/platform_device.h>
edbaa603	24	#include <linux/device.h>
a0316b24	25	#include <linux/amba/bus.h>
eb7fffa3	26	#include <linux/amba/pl061.h>
6ef297f8	27	#include <linux/amba/mmci.h>
d6ada860	28	#include <linux/amba/pl022.h>
0ec5a95b LW	29	#include <linux/mtd/physmap.h>
0ec5a95b LW	30	#include <linux/mtd/partitions.h>
fced80c7	31	#include <linux/io.h>
520f7bd7	32	#include <linux/irqchip/arm-gic.h>
f9a6aa43	33	#include <linux/platform_data/clk-realview.h>
7b6d864b	34	#include <linux/reboot.h>
1c2f87c2	35	#include <linux/memblock.h>
a0316b24	36
6d407a6e	37	#include "hardware.h"
a0316b24	38	#include <asm/irq.h>
a0316b24	39	#include <asm/mach-types.h>
cc9897df	40	#include <asm/pgtable.h>
a0316b24 BB	41	#include <asm/hardware/cache-l2x0.h>
	42
	43	#include <asm/mach/arch.h>
	44	#include <asm/mach/flash.h>
	45	#include <asm/mach/map.h>
a0316b24 BB	46	#include <asm/mach/time.h>
a0316b24 BB	47
6d407a6e	48	#include "board-pb1176.h"
38d2cfcc	49	#include "irqs-pb1176.h"
a0316b24 BB	50
a0316b24 BB	51	#include "core.h"
a0316b24 BB	52
	53	static struct map_desc realview_pb1176_io_desc[] __initdata = {
	54	{
	55	.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
	56	.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
	57	.length = SZ_4K,
	58	.type = MT_DEVICE,
	59	}, {
	60	.virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
	61	.pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
	62	.length = SZ_4K,
	63	.type = MT_DEVICE,
	64	}, {
	65	.virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
	66	.pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
	67	.length = SZ_4K,
	68	.type = MT_DEVICE,
	69	}, {
	70	.virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
	71	.pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
	72	.length = SZ_4K,
	73	.type = MT_DEVICE,
	74	}, {
	75	.virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
	76	.pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
	77	.length = SZ_4K,
	78	.type = MT_DEVICE,
	79	}, {
	80	.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
	81	.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
	82	.length = SZ_4K,
	83	.type = MT_DEVICE,
	84	}, {
	85	.virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
	86	.pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
	87	.length = SZ_4K,
	88	.type = MT_DEVICE,
	89	}, {
	90	.virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
	91	.pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
	92	.length = SZ_4K,
	93	.type = MT_DEVICE,
	94	}, {
	95	.virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
	96	.pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
	97	.length = SZ_8K,
	98	.type = MT_DEVICE,
	99	},
	100	#ifdef CONFIG_DEBUG_LL
	101	{
	102	.virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
	103	.pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
	104	.length = SZ_4K,
	105	.type = MT_DEVICE,
	106	},
	107	#endif
	108	};
	109
	110	static void __init realview_pb1176_map_io(void)
	111	{
	112	iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
	113	}
	114
eb7fffa3 RK	115	static struct pl061_platform_data gpio0_plat_data = {
eb7fffa3 RK	116	.gpio_base = 0,
eb7fffa3 RK	117	};
	118
	119	static struct pl061_platform_data gpio1_plat_data = {
	120	.gpio_base = 8,
eb7fffa3 RK	121	};
	122
	123	static struct pl061_platform_data gpio2_plat_data = {
	124	.gpio_base = 16,
eb7fffa3 RK	125	};
eb7fffa3 RK	126
d6ada860 LW	127	static struct pl022_ssp_controller ssp0_plat_data = {
	128	.bus_id = 0,
	129	.enable_dma = 0,
	130	.num_chipselect = 1,
	131	};
	132
a0316b24 BB	133	/*
	134	* RealView PB1176 AMBA devices
	135	*/
0dada61a RK	136	#define GPIO2_IRQ { IRQ_PB1176_GPIO2 }
	137	#define GPIO3_IRQ { IRQ_PB1176_GPIO3 }
	138	#define AACI_IRQ { IRQ_PB1176_AACI }
a0316b24	139	#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
0dada61a RK	140	#define KMI0_IRQ { IRQ_PB1176_KMI0 }
	141	#define KMI1_IRQ { IRQ_PB1176_KMI1 }
	142	#define PB1176_SMC_IRQ { }
	143	#define MPMC_IRQ { }
	144	#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
	145	#define SCTL_IRQ { }
	146	#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG }
	147	#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 }
	148	#define GPIO1_IRQ { IRQ_PB1176_GPIO1 }
	149	#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
	150	#define SCI_IRQ { IRQ_PB1176_SCI }
	151	#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 }
	152	#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 }
	153	#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 }
	154	#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 }
	155	#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 }
	156	#define PB1176_SSP_IRQ { IRQ_DC1176_SSP }
a0316b24 BB	157
a0316b24 BB	158	/* FPGA Primecells */
9199340b RK	159	APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
	160	APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
	161	APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
	162	APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
	163	APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL);
a0316b24 BB	164
a0316b24 BB	165	/* DevChip Primecells */
9199340b RK	166	AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
	167	AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
	168	APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
	169	APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
	170	APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
	171	APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
	172	APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
	173	APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
	174	APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
	175	APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
	176	APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
	177	APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL);
	178	APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data);
	179	AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data);
a0316b24 BB	180
a0316b24 BB	181	static struct amba_device *amba_devs[] __initdata = {
a0316b24 BB	182	&uart0_device,
	183	&uart1_device,
	184	&uart2_device,
	185	&uart3_device,
48f1d5a3	186	&uart4_device,
a0316b24 BB	187	&smc_device,
	188	&clcd_device,
	189	&sctl_device,
	190	&wdog_device,
	191	&gpio0_device,
	192	&gpio1_device,
	193	&gpio2_device,
	194	&rtc_device,
	195	&sci0_device,
	196	&ssp0_device,
	197	&aaci_device,
	198	&mmc0_device,
	199	&kmi0_device,
	200	&kmi1_device,
	201	};
	202
	203	/*
	204	* RealView PB1176 platform devices
	205	*/
af607747	206	static struct resource realview_pb1176_flash_resources[] = {
0ec5a95b	207	{
af607747 CM	208	.start = REALVIEW_PB1176_FLASH_BASE,
	209	.end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
	210	.flags = IORESOURCE_MEM,
	211	},
0ec5a95b LW	212	#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
0ec5a95b LW	213	{
af607747 CM	214	.start = REALVIEW_PB1176_SEC_FLASH_BASE,
	215	.end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
	216	.flags = IORESOURCE_MEM,
	217	},
af607747	218	#endif
0ec5a95b LW	219	};
	220
	221	static struct physmap_flash_data pb1176_rom_pdata = {
	222	.probe_type = "map_rom",
	223	.width = 4,
	224	.nr_parts = 0,
	225	};
	226
	227	static struct resource pb1176_rom_resources[] = {
	228	/*
	229	* This exposes the PB1176 DevChip ROM as an MTD ROM mapping.
	230	* The reference manual states that this is actually a pseudo-ROM
	231	* programmed in NVRAM.
	232	*/
	233	{
	234	.start = REALVIEW_DC1176_ROM_BASE,
	235	.end = REALVIEW_DC1176_ROM_BASE + SZ_16K - 1,
	236	.flags = IORESOURCE_MEM,
	237	}
	238	};
	239
	240	static struct platform_device pb1176_rom_device = {
	241	.name = "physmap-flash",
	242	.id = -1,
	243	.num_resources = ARRAY_SIZE(pb1176_rom_resources),
	244	.resource = pb1176_rom_resources,
	245	.dev = {
	246	.platform_data = &pb1176_rom_pdata,
	247	},
	248	};
a0316b24 BB	249
	250	static struct resource realview_pb1176_smsc911x_resources[] = {
	251	[0] = {
	252	.start = REALVIEW_PB1176_ETH_BASE,
	253	.end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
	254	.flags = IORESOURCE_MEM,
	255	},
	256	[1] = {
	257	.start = IRQ_PB1176_ETH,
	258	.end = IRQ_PB1176_ETH,
	259	.flags = IORESOURCE_IRQ,
	260	},
	261	};
	262
7db21712 CM	263	static struct resource realview_pb1176_isp1761_resources[] = {
	264	[0] = {
	265	.start = REALVIEW_PB1176_USB_BASE,
	266	.end = REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
	267	.flags = IORESOURCE_MEM,
	268	},
	269	[1] = {
	270	.start = IRQ_PB1176_USB,
	271	.end = IRQ_PB1176_USB,
	272	.flags = IORESOURCE_IRQ,
	273	},
	274	};
	275
f417cbad WD	276	static struct resource pmu_resource = {
	277	.start = IRQ_DC1176_CORE_PMU,
	278	.end = IRQ_DC1176_CORE_PMU,
	279	.flags = IORESOURCE_IRQ,
	280	};
	281
	282	static struct platform_device pmu_device = {
cbed8388	283	.name = "armv6-pmu",
df3d17e0	284	.id = -1,
f417cbad WD	285	.num_resources = 1,
	286	.resource = &pmu_resource,
	287	};
	288
d161edfb LW	289	static struct resource char_lcd_resources[] = {
	290	{
	291	.start = REALVIEW_CHAR_LCD_BASE,
	292	.end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
	293	.flags = IORESOURCE_MEM,
	294	},
	295	{
	296	.start = IRQ_PB1176_CHARLCD,
	297	.end = IRQ_PB1176_CHARLCD,
	298	.flags = IORESOURCE_IRQ,
	299	},
	300	};
	301
	302	static struct platform_device char_lcd_device = {
	303	.name = "arm-charlcd",
	304	.id = -1,
	305	.num_resources = ARRAY_SIZE(char_lcd_resources),
	306	.resource = char_lcd_resources,
	307	};
	308
a0316b24 BB	309	static void __init gic_init_irq(void)
	310	{
	311	/* ARM1176 DevChip GIC, primary */
b580b899 RK	312	gic_init(0, IRQ_DC1176_GIC_START,
b580b899 RK	313	__io_address(REALVIEW_DC1176_GIC_DIST_BASE),
ff2e27ae	314	__io_address(REALVIEW_DC1176_GIC_CPU_BASE));
a0316b24 BB	315
a0316b24 BB	316	/* board GIC, secondary */
b580b899 RK	317	gic_init(1, IRQ_PB1176_GIC_START,
	318	__io_address(REALVIEW_PB1176_GIC_DIST_BASE),
	319	__io_address(REALVIEW_PB1176_GIC_CPU_BASE));
a0316b24 BB	320	gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
	321	}
	322
	323	static void __init realview_pb1176_timer_init(void)
	324	{
	325	timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
	326	timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
	327	timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
	328	timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
	329
f9a6aa43	330	realview_clk_init(__io_address(REALVIEW_SYS_BASE), true);
a0316b24 BB	331	realview_timer_init(IRQ_DC1176_TIMER0);
	332	}
	333
7b6d864b	334	static void realview_pb1176_restart(enum reboot_mode mode, const char *cmd)
426fcd2a	335	{
4c9f8be7 CT	336	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
	337	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
	338	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
	339	__raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
47cacdd4	340	dsb();
426fcd2a PJ	341	}
426fcd2a PJ	342
1c2f87c2	343	static void realview_pb1176_fixup(struct tag tags, char *from)
5b39d154 CM	344	{
	345	/*
	346	* RealView PB1176 only has 128MB of RAM mapped at 0.
	347	*/
1c2f87c2	348	memblock_add(0, SZ_128M);
5b39d154 CM	349	}
5b39d154 CM	350
a0316b24 BB	351	static void __init realview_pb1176_init(void)
	352	{
	353	int i;
	354
ba927951	355	#ifdef CONFIG_CACHE_L2X0
39b53458 RK	356	/*
	357	* The PL220 needs to be manually configured as the hardware
	358	* doesn't report the correct sizes.
	359	* 128kB (16kB/way), 8-way associativity, event monitor and
	360	* parity enabled, ignore share bit, no force write allocate
	361	* Bits: .... ...0 0111 0011 0000 .... .... ....
	362	*/
a0316b24	363	l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
ba927951	364	#endif
a0316b24	365
af607747	366	realview_flash_register(realview_pb1176_flash_resources,
0ec5a95b LW	367	ARRAY_SIZE(realview_pb1176_flash_resources));
0ec5a95b LW	368	platform_device_register(&pb1176_rom_device);
0a381330	369	realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
533ad5e6	370	platform_device_register(&realview_i2c_device);
7db21712	371	realview_usb_register(realview_pb1176_isp1761_resources);
f417cbad	372	platform_device_register(&pmu_device);
d161edfb	373	platform_device_register(&char_lcd_device);
e4ecf2bd	374	platform_device_register(&realview_leds_device);
a0316b24 BB	375
	376	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
	377	struct amba_device *d = amba_devs[i];
	378	amba_device_register(d, &iomem_resource);
	379	}
a0316b24 BB	380	}
	381
	382	MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
	383	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
9ddea57e	384	.atag_offset = 0x100,
5b39d154	385	.fixup = realview_pb1176_fixup,
a0316b24	386	.map_io = realview_pb1176_map_io,
631e55f9	387	.init_early = realview_init_early,
a0316b24	388	.init_irq = gic_init_irq,
6bb27d73	389	.init_time = realview_pb1176_timer_init,
a0316b24	390	.init_machine = realview_pb1176_init,
00e9125e NP	391	#ifdef CONFIG_ZONE_DMA
	392	.dma_zone_size = SZ_256M,
	393	#endif
47cacdd4	394	.restart = realview_pb1176_restart,
a0316b24	395	MACHINE_END