[deliverable/linux.git] / arch / arm / mach-ux500 / board-mop500.c

/*
 * Copyright (C) 2008-2009 ST-Ericsson
 *
 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2, as
 * published by the Free Software Foundation.
 *
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl022.h>
#include <linux/amba/serial.h>
#include <linux/spi/spi.h>
#include <linux/mfd/ab8500.h>
#include <linux/regulator/ab8500.h>
#include <linux/mfd/tc3589x.h>
#include <linux/mfd/tps6105x.h>
#include <linux/mfd/ab8500/gpio.h>
#include <linux/leds-lp5521.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <plat/i2c.h>
#include <plat/ste_dma40.h>

#include <mach/hardware.h>
#include <mach/setup.h>
#include <mach/devices.h>
#include <mach/irqs.h>

#include "ste-dma40-db8500.h"
#include "devices-db8500.h"
#include "board-mop500.h"
#include "board-mop500-regulators.h"

static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
	.gpio_base		= MOP500_AB8500_GPIO(0),
	.irq_base		= MOP500_AB8500_VIR_GPIO_IRQ_BASE,
	/* config_reg is the initial configuration of ab8500 pins.
	 * The pins can be configured as GPIO or alt functions based
	 * on value present in GpioSel1 to GpioSel6 and AlternatFunction
	 * register. This is the array of 7 configuration settings.
	 * One has to compile time decide these settings. Below is the
	 * explanation of these setting
	 * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
	 * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
	 * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
	 * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
	 * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
	 * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
	 * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
	 * as GPIO then this register selectes the alternate fucntions
	 */
	.config_reg		= {0x00, 0x1E, 0x80, 0x01,
					0x7A, 0x00, 0x00},
};

static struct ab8500_platform_data ab8500_platdata = {
	.irq_base	= MOP500_AB8500_IRQ_BASE,
	.regulator_reg_init = ab8500_regulator_reg_init,
	.num_regulator_reg_init	= ARRAY_SIZE(ab8500_regulator_reg_init),
	.regulator	= ab8500_regulators,
	.num_regulator	= ARRAY_SIZE(ab8500_regulators),
	.gpio		= &ab8500_gpio_pdata,
};

static struct resource ab8500_resources[] = {
	[0] = {
		.start	= IRQ_DB8500_AB8500,
		.end	= IRQ_DB8500_AB8500,
		.flags	= IORESOURCE_IRQ
	}
};

struct platform_device ab8500_device = {
	.name = "ab8500-i2c",
	.id = 0,
	.dev = {
		.platform_data = &ab8500_platdata,
	},
	.num_resources = 1,
	.resource = ab8500_resources,
};

/*
 * TPS61052
 */

static struct tps6105x_platform_data mop500_tps61052_data = {
	.mode = TPS6105X_MODE_VOLTAGE,
	.regulator_data = &tps61052_regulator,
};

/*
 * TC35892
 */

static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
{
	mop500_sdi_tc35892_init();
}

static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
	.gpio_base	= MOP500_EGPIO(0),
	.setup		= mop500_tc35892_init,
};

static struct tc3589x_platform_data mop500_tc35892_data = {
	.block		= TC3589x_BLOCK_GPIO,
	.gpio		= &mop500_tc35892_gpio_data,
	.irq_base	= MOP500_EGPIO_IRQ_BASE,
};

static struct lp5521_led_config lp5521_pri_led[] = {
       [0] = {
	       .chan_nr = 0,
	       .led_current = 0x2f,
	       .max_current = 0x5f,
       },
       [1] = {
	       .chan_nr = 1,
	       .led_current = 0x2f,
	       .max_current = 0x5f,
       },
       [2] = {
	       .chan_nr = 2,
	       .led_current = 0x2f,
	       .max_current = 0x5f,
       },
};

static struct lp5521_platform_data __initdata lp5521_pri_data = {
       .label = "lp5521_pri",
       .led_config     = &lp5521_pri_led[0],
       .num_channels   = 3,
       .clock_mode     = LP5521_CLOCK_EXT,
};

static struct lp5521_led_config lp5521_sec_led[] = {
       [0] = {
	       .chan_nr = 0,
	       .led_current = 0x2f,
	       .max_current = 0x5f,
       },
       [1] = {
	       .chan_nr = 1,
	       .led_current = 0x2f,
	       .max_current = 0x5f,
       },
       [2] = {
	       .chan_nr = 2,
	       .led_current = 0x2f,
	       .max_current = 0x5f,
       },
};

static struct lp5521_platform_data __initdata lp5521_sec_data = {
       .label = "lp5521_sec",
       .led_config     = &lp5521_sec_led[0],
       .num_channels   = 3,
       .clock_mode     = LP5521_CLOCK_EXT,
};

static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
	{
		I2C_BOARD_INFO("tc3589x", 0x42),
		.irq		= NOMADIK_GPIO_TO_IRQ(217),
		.platform_data  = &mop500_tc35892_data,
	},
};

/* I2C0 devices only available prior to HREFv60 */
static struct i2c_board_info __initdata mop500_i2c0_old_devices[] = {
	{
		I2C_BOARD_INFO("tps61052", 0x33),
		.platform_data  = &mop500_tps61052_data,
	},
};

static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
	{
		/* lp5521 LED driver, 1st device */
		I2C_BOARD_INFO("lp5521", 0x33),
		.platform_data = &lp5521_pri_data,
	},
	{
		/* lp5521 LED driver, 2st device */
		I2C_BOARD_INFO("lp5521", 0x34),
		.platform_data = &lp5521_sec_data,
	},
	{
		/* Light sensor Rohm BH1780GLI */
		I2C_BOARD_INFO("bh1780", 0x29),
	},
};

#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \
static struct nmk_i2c_controller u8500_i2c##id##_data = { \
	/*				\
	 * slave data setup time, which is	\
	 * 250 ns,100ns,10ns which is 14,6,2	\
	 * respectively for a 48 Mhz	\
	 * i2c clock			\
	 */				\
	.slsu		= _slsu,	\
	/* Tx FIFO threshold */		\
	.tft		= _tft,		\
	/* Rx FIFO threshold */		\
	.rft		= _rft,		\
	/* std. mode operation */	\
	.clk_freq	= clk,		\
	.sm		= _sm,		\
}

/*
 * The board uses 4 i2c controllers, initialize all of
 * them with slave data setup time of 250 ns,
 * Tx & Rx FIFO threshold values as 1 and standard
 * mode of operation
 */
U8500_I2C_CONTROLLER(0, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
U8500_I2C_CONTROLLER(1, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
U8500_I2C_CONTROLLER(2,	0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
U8500_I2C_CONTROLLER(3,	0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);

static void __init mop500_i2c_init(void)
{
	db8500_add_i2c0(&u8500_i2c0_data);
	db8500_add_i2c1(&u8500_i2c1_data);
	db8500_add_i2c2(&u8500_i2c2_data);
	db8500_add_i2c3(&u8500_i2c3_data);
}

static struct gpio_keys_button mop500_gpio_keys[] = {
	{
		.desc			= "SFH7741 Proximity Sensor",
		.type			= EV_SW,
		.code			= SW_FRONT_PROXIMITY,
		.active_low		= 0,
		.can_disable		= 1,
	}
};

static struct regulator *prox_regulator;
static int mop500_prox_activate(struct device *dev);
static void mop500_prox_deactivate(struct device *dev);

static struct gpio_keys_platform_data mop500_gpio_keys_data = {
	.buttons	= mop500_gpio_keys,
	.nbuttons	= ARRAY_SIZE(mop500_gpio_keys),
	.enable		= mop500_prox_activate,
	.disable	= mop500_prox_deactivate,
};

static struct platform_device mop500_gpio_keys_device = {
	.name	= "gpio-keys",
	.id	= 0,
	.dev	= {
		.platform_data	= &mop500_gpio_keys_data,
	},
};

static int mop500_prox_activate(struct device *dev)
{
	prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
						"vcc");
	if (IS_ERR(prox_regulator)) {
		dev_err(&mop500_gpio_keys_device.dev,
			"no regulator\n");
		return PTR_ERR(prox_regulator);
	}
	regulator_enable(prox_regulator);
	return 0;
}

static void mop500_prox_deactivate(struct device *dev)
{
	regulator_disable(prox_regulator);
	regulator_put(prox_regulator);
}

/* add any platform devices here - TODO */
static struct platform_device *platform_devs[] __initdata = {
	&mop500_gpio_keys_device,
};

#ifdef CONFIG_STE_DMA40
static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type =  DB8500_DMA_DEV8_SSP0_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};
#endif

static struct pl022_ssp_controller ssp0_platform_data = {
	.bus_id = 0,
#ifdef CONFIG_STE_DMA40
	.enable_dma = 1,
	.dma_filter = stedma40_filter,
	.dma_rx_param = &ssp0_dma_cfg_rx,
	.dma_tx_param = &ssp0_dma_cfg_tx,
#else
	.enable_dma = 0,
#endif
	/* on this platform, gpio 31,142,144,214 &
	 * 224 are connected as chip selects
	 */
	.num_chipselect = 5,
};

static void __init mop500_spi_init(void)
{
	db8500_add_ssp0(&ssp0_platform_data);
}

#ifdef CONFIG_STE_DMA40
static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type =  DB8500_DMA_DEV13_UART0_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV13_UART0_TX,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type =  DB8500_DMA_DEV12_UART1_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV12_UART1_TX,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type =  DB8500_DMA_DEV11_UART2_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV11_UART2_TX,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};
#endif

static struct amba_pl011_data uart0_plat = {
#ifdef CONFIG_STE_DMA40
	.dma_filter = stedma40_filter,
	.dma_rx_param = &uart0_dma_cfg_rx,
	.dma_tx_param = &uart0_dma_cfg_tx,
#endif
};

static struct amba_pl011_data uart1_plat = {
#ifdef CONFIG_STE_DMA40
	.dma_filter = stedma40_filter,
	.dma_rx_param = &uart1_dma_cfg_rx,
	.dma_tx_param = &uart1_dma_cfg_tx,
#endif
};

static struct amba_pl011_data uart2_plat = {
#ifdef CONFIG_STE_DMA40
	.dma_filter = stedma40_filter,
	.dma_rx_param = &uart2_dma_cfg_rx,
	.dma_tx_param = &uart2_dma_cfg_tx,
#endif
};

static void __init mop500_uart_init(void)
{
	db8500_add_uart0(&uart0_plat);
	db8500_add_uart1(&uart1_plat);
	db8500_add_uart2(&uart2_plat);
}

static void __init mop500_init_machine(void)
{
	/*
	 * The HREFv60 board removed a GPIO expander and routed
	 * all these GPIO pins to the internal GPIO controller
	 * instead.
	 */
	if (machine_is_hrefv60())
		mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
	else
		mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;

	u8500_init_devices();

	mop500_pins_init();

	platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));

	mop500_i2c_init();
	mop500_sdi_init();
	mop500_spi_init();
	mop500_uart_init();

	platform_device_register(&ab8500_device);

	i2c_register_board_info(0, mop500_i2c0_devices,
				ARRAY_SIZE(mop500_i2c0_devices));
	if (!machine_is_hrefv60())
		i2c_register_board_info(0, mop500_i2c0_old_devices,
					ARRAY_SIZE(mop500_i2c0_old_devices));
	i2c_register_board_info(2, mop500_i2c2_devices,
				ARRAY_SIZE(mop500_i2c2_devices));
}

MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
	/* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
	.boot_params	= 0x100,
	.map_io		= u8500_map_io,
	.init_irq	= ux500_init_irq,
	/* we re-use nomadik timer here */
	.timer		= &ux500_timer,
	.init_machine	= mop500_init_machine,
MACHINE_END

MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
	.boot_params	= 0x100,
	.map_io		= u8500_map_io,
	.init_irq	= ux500_init_irq,
	.timer		= &ux500_timer,
	.init_machine	= mop500_init_machine,
MACHINE_END
Commit	Line	Data
aa44ef4d SK	1	/*
	2	* Copyright (C) 2008-2009 ST-Ericsson
	3	*
	4	* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2, as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11	#include <linux/kernel.h>
	12	#include <linux/init.h>
	13	#include <linux/interrupt.h>
	14	#include <linux/platform_device.h>
	15	#include <linux/io.h>
b8410a15	16	#include <linux/i2c.h>
ea05a57f	17	#include <linux/gpio.h>
aa44ef4d SK	18	#include <linux/amba/bus.h>
aa44ef4d SK	19	#include <linux/amba/pl022.h>
5d7b8467	20	#include <linux/amba/serial.h>
aa44ef4d	21	#include <linux/spi/spi.h>
39ae702c	22	#include <linux/mfd/ab8500.h>
79568b94	23	#include <linux/regulator/ab8500.h>
20406ebf	24	#include <linux/mfd/tc3589x.h>
fe67dfc8	25	#include <linux/mfd/tps6105x.h>
3ef374a2	26	#include <linux/mfd/ab8500/gpio.h>
dd7b2a05	27	#include <linux/leds-lp5521.h>
a71b819b PL	28	#include <linux/input.h>
a71b819b PL	29	#include <linux/gpio_keys.h>
aa44ef4d	30
aa44ef4d SK	31	#include <asm/mach-types.h>
	32	#include <asm/mach/arch.h>
	33
d48a41c1	34	#include <plat/i2c.h>
5d7b8467	35	#include <plat/ste_dma40.h>
aa44ef4d SK	36
	37	#include <mach/hardware.h>
	38	#include <mach/setup.h>
9e4e7fe1	39	#include <mach/devices.h>
29aeb3cf	40	#include <mach/irqs.h>
aa44ef4d	41
5d7b8467	42	#include "ste-dma40-db8500.h"
fbf1eadf	43	#include "devices-db8500.h"
008f8a2f	44	#include "board-mop500.h"
a1e516e3	45	#include "board-mop500-regulators.h"
ea05a57f	46
3ef374a2 BB	47	static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
	48	.gpio_base = MOP500_AB8500_GPIO(0),
	49	.irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
	50	/* config_reg is the initial configuration of ab8500 pins.
	51	* The pins can be configured as GPIO or alt functions based
	52	* on value present in GpioSel1 to GpioSel6 and AlternatFunction
	53	* register. This is the array of 7 configuration settings.
	54	* One has to compile time decide these settings. Below is the
25985edc	55	* explanation of these setting
3ef374a2 BB	56	* GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
	57	* GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
	58	* GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
	59	* GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
	60	* GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
	61	* GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
	62	* AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
	63	* as GPIO then this register selectes the alternate fucntions
	64	*/
	65	.config_reg = {0x00, 0x1E, 0x80, 0x01,
	66	0x7A, 0x00, 0x00},
	67	};
	68
39ae702c RV	69	static struct ab8500_platform_data ab8500_platdata = {
39ae702c RV	70	.irq_base = MOP500_AB8500_IRQ_BASE,
dfa3a824 BJ	71	.regulator_reg_init = ab8500_regulator_reg_init,
dfa3a824 BJ	72	.num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
a1e516e3 BJ	73	.regulator = ab8500_regulators,
a1e516e3 BJ	74	.num_regulator = ARRAY_SIZE(ab8500_regulators),
3ef374a2	75	.gpio = &ab8500_gpio_pdata,
39ae702c RV	76	};
39ae702c RV	77
29aeb3cf LW	78	static struct resource ab8500_resources[] = {
29aeb3cf LW	79	[0] = {
22039b7c RV	80	.start = IRQ_DB8500_AB8500,
	81	.end = IRQ_DB8500_AB8500,
	82	.flags = IORESOURCE_IRQ
29aeb3cf LW	83	}
	84	};
	85
	86	struct platform_device ab8500_device = {
	87	.name = "ab8500-i2c",
	88	.id = 0,
	89	.dev = {
	90	.platform_data = &ab8500_platdata,
	91	},
	92	.num_resources = 1,
	93	.resource = ab8500_resources,
	94	};
	95
fe67dfc8 LW	96	/*
	97	* TPS61052
	98	*/
	99
	100	static struct tps6105x_platform_data mop500_tps61052_data = {
	101	.mode = TPS6105X_MODE_VOLTAGE,
	102	.regulator_data = &tps61052_regulator,
	103	};
	104
b8410a15 RV	105	/*
	106	* TC35892
	107	*/
	108
20406ebf	109	static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
b8410a15 RV	110	{
	111	mop500_sdi_tc35892_init();
	112	}
	113
20406ebf	114	static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
b8410a15 RV	115	.gpio_base = MOP500_EGPIO(0),
	116	.setup = mop500_tc35892_init,
	117	};
	118
20406ebf	119	static struct tc3589x_platform_data mop500_tc35892_data = {
611b7590	120	.block = TC3589x_BLOCK_GPIO,
b8410a15 RV	121	.gpio = &mop500_tc35892_gpio_data,
	122	.irq_base = MOP500_EGPIO_IRQ_BASE,
	123	};
	124
dd7b2a05 PL	125	static struct lp5521_led_config lp5521_pri_led[] = {
	126	[0] = {
	127	.chan_nr = 0,
	128	.led_current = 0x2f,
	129	.max_current = 0x5f,
	130	},
	131	[1] = {
	132	.chan_nr = 1,
	133	.led_current = 0x2f,
	134	.max_current = 0x5f,
	135	},
	136	[2] = {
	137	.chan_nr = 2,
	138	.led_current = 0x2f,
	139	.max_current = 0x5f,
	140	},
	141	};
	142
	143	static struct lp5521_platform_data __initdata lp5521_pri_data = {
	144	.label = "lp5521_pri",
	145	.led_config = &lp5521_pri_led[0],
	146	.num_channels = 3,
	147	.clock_mode = LP5521_CLOCK_EXT,
	148	};
	149
	150	static struct lp5521_led_config lp5521_sec_led[] = {
	151	[0] = {
	152	.chan_nr = 0,
	153	.led_current = 0x2f,
	154	.max_current = 0x5f,
	155	},
	156	[1] = {
	157	.chan_nr = 1,
	158	.led_current = 0x2f,
	159	.max_current = 0x5f,
	160	},
	161	[2] = {
	162	.chan_nr = 2,
	163	.led_current = 0x2f,
	164	.max_current = 0x5f,
	165	},
	166	};
	167
	168	static struct lp5521_platform_data __initdata lp5521_sec_data = {
	169	.label = "lp5521_sec",
	170	.led_config = &lp5521_sec_led[0],
	171	.num_channels = 3,
	172	.clock_mode = LP5521_CLOCK_EXT,
	173	};
	174
fe67dfc8	175	static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
b8410a15	176	{
20406ebf	177	I2C_BOARD_INFO("tc3589x", 0x42),
dd7b2a05	178	.irq = NOMADIK_GPIO_TO_IRQ(217),
b8410a15 RV	179	.platform_data = &mop500_tc35892_data,
	180	},
	181	};
	182
fe67dfc8 LW	183	/* I2C0 devices only available prior to HREFv60 */
	184	static struct i2c_board_info __initdata mop500_i2c0_old_devices[] = {
	185	{
	186	I2C_BOARD_INFO("tps61052", 0x33),
	187	.platform_data = &mop500_tps61052_data,
	188	},
	189	};
	190
dd7b2a05 PL	191	static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
	192	{
	193	/* lp5521 LED driver, 1st device */
	194	I2C_BOARD_INFO("lp5521", 0x33),
	195	.platform_data = &lp5521_pri_data,
	196	},
	197	{
	198	/* lp5521 LED driver, 2st device */
	199	I2C_BOARD_INFO("lp5521", 0x34),
	200	.platform_data = &lp5521_sec_data,
	201	},
bb3b2187 LJ	202	{
	203	/* Light sensor Rohm BH1780GLI */
	204	I2C_BOARD_INFO("bh1780", 0x29),
	205	},
dd7b2a05 PL	206	};
dd7b2a05 PL	207
d48a41c1	208	#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \
f9faf237	209	static struct nmk_i2c_controller u8500_i2c##id##_data = { \
d48a41c1 SK	210	/* \
	211	* slave data setup time, which is \
	212	* 250 ns,100ns,10ns which is 14,6,2 \
	213	* respectively for a 48 Mhz \
	214	* i2c clock \
	215	*/ \
	216	.slsu = _slsu, \
	217	/* Tx FIFO threshold */ \
	218	.tft = _tft, \
	219	/* Rx FIFO threshold */ \
	220	.rft = _rft, \
	221	/* std. mode operation */ \
	222	.clk_freq = clk, \
	223	.sm = _sm, \
	224	}
	225
	226	/*
	227	* The board uses 4 i2c controllers, initialize all of
	228	* them with slave data setup time of 250 ns,
	229	* Tx & Rx FIFO threshold values as 1 and standard
	230	* mode of operation
	231	*/
	232	U8500_I2C_CONTROLLER(0, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
	233	U8500_I2C_CONTROLLER(1, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
	234	U8500_I2C_CONTROLLER(2, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
	235	U8500_I2C_CONTROLLER(3, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
	236
fbf1eadf RV	237	static void __init mop500_i2c_init(void)
	238	{
	239	db8500_add_i2c0(&u8500_i2c0_data);
	240	db8500_add_i2c1(&u8500_i2c1_data);
	241	db8500_add_i2c2(&u8500_i2c2_data);
	242	db8500_add_i2c3(&u8500_i2c3_data);
	243	}
aa44ef4d	244
a71b819b PL	245	static struct gpio_keys_button mop500_gpio_keys[] = {
	246	{
	247	.desc = "SFH7741 Proximity Sensor",
	248	.type = EV_SW,
	249	.code = SW_FRONT_PROXIMITY,
a71b819b PL	250	.active_low = 0,
	251	.can_disable = 1,
	252	}
	253	};
	254
	255	static struct regulator *prox_regulator;
	256	static int mop500_prox_activate(struct device *dev);
	257	static void mop500_prox_deactivate(struct device *dev);
	258
	259	static struct gpio_keys_platform_data mop500_gpio_keys_data = {
	260	.buttons = mop500_gpio_keys,
	261	.nbuttons = ARRAY_SIZE(mop500_gpio_keys),
	262	.enable = mop500_prox_activate,
	263	.disable = mop500_prox_deactivate,
	264	};
	265
	266	static struct platform_device mop500_gpio_keys_device = {
	267	.name = "gpio-keys",
	268	.id = 0,
	269	.dev = {
	270	.platform_data = &mop500_gpio_keys_data,
	271	},
	272	};
	273
	274	static int mop500_prox_activate(struct device *dev)
	275	{
	276	prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
	277	"vcc");
	278	if (IS_ERR(prox_regulator)) {
	279	dev_err(&mop500_gpio_keys_device.dev,
	280	"no regulator\n");
	281	return PTR_ERR(prox_regulator);
	282	}
	283	regulator_enable(prox_regulator);
	284	return 0;
	285	}
	286
	287	static void mop500_prox_deactivate(struct device *dev)
	288	{
	289	regulator_disable(prox_regulator);
	290	regulator_put(prox_regulator);
	291	}
	292
d48a41c1 SK	293	/* add any platform devices here - TODO */
d48a41c1 SK	294	static struct platform_device *platform_devs[] __initdata = {
a71b819b	295	&mop500_gpio_keys_device,
d48a41c1 SK	296	};
d48a41c1 SK	297
5d7b8467 LW	298	#ifdef CONFIG_STE_DMA40
	299	static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
	300	.mode = STEDMA40_MODE_LOGICAL,
	301	.dir = STEDMA40_PERIPH_TO_MEM,
	302	.src_dev_type = DB8500_DMA_DEV8_SSP0_RX,
	303	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	304	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	305	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	306	};
	307
	308	static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
	309	.mode = STEDMA40_MODE_LOGICAL,
	310	.dir = STEDMA40_MEM_TO_PERIPH,
	311	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	312	.dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,
	313	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	314	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	315	};
	316	#endif
	317
	318	static struct pl022_ssp_controller ssp0_platform_data = {
	319	.bus_id = 0,
	320	#ifdef CONFIG_STE_DMA40
	321	.enable_dma = 1,
	322	.dma_filter = stedma40_filter,
	323	.dma_rx_param = &ssp0_dma_cfg_rx,
	324	.dma_tx_param = &ssp0_dma_cfg_tx,
	325	#else
	326	.enable_dma = 0,
	327	#endif
	328	/* on this platform, gpio 31,142,144,214 &
	329	* 224 are connected as chip selects
	330	*/
	331	.num_chipselect = 5,
	332	};
	333
fbf1eadf	334	static void __init mop500_spi_init(void)
aa44ef4d	335	{
fbf1eadf RV	336	db8500_add_ssp0(&ssp0_platform_data);
fbf1eadf RV	337	}
aa44ef4d	338
5d7b8467 LW	339	#ifdef CONFIG_STE_DMA40
	340	static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
	341	.mode = STEDMA40_MODE_LOGICAL,
	342	.dir = STEDMA40_PERIPH_TO_MEM,
	343	.src_dev_type = DB8500_DMA_DEV13_UART0_RX,
	344	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	345	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	346	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	347	};
	348
	349	static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
	350	.mode = STEDMA40_MODE_LOGICAL,
	351	.dir = STEDMA40_MEM_TO_PERIPH,
	352	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	353	.dst_dev_type = DB8500_DMA_DEV13_UART0_TX,
	354	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	355	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	356	};
	357
	358	static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
	359	.mode = STEDMA40_MODE_LOGICAL,
	360	.dir = STEDMA40_PERIPH_TO_MEM,
	361	.src_dev_type = DB8500_DMA_DEV12_UART1_RX,
	362	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	363	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	364	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	365	};
	366
	367	static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
	368	.mode = STEDMA40_MODE_LOGICAL,
	369	.dir = STEDMA40_MEM_TO_PERIPH,
	370	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	371	.dst_dev_type = DB8500_DMA_DEV12_UART1_TX,
	372	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	373	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	374	};
	375
	376	static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
	377	.mode = STEDMA40_MODE_LOGICAL,
	378	.dir = STEDMA40_PERIPH_TO_MEM,
	379	.src_dev_type = DB8500_DMA_DEV11_UART2_RX,
	380	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	381	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	382	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	383	};
	384
	385	static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
	386	.mode = STEDMA40_MODE_LOGICAL,
	387	.dir = STEDMA40_MEM_TO_PERIPH,
	388	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	389	.dst_dev_type = DB8500_DMA_DEV11_UART2_TX,
	390	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	391	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	392	};
	393	#endif
	394
	395	static struct amba_pl011_data uart0_plat = {
	396	#ifdef CONFIG_STE_DMA40
	397	.dma_filter = stedma40_filter,
	398	.dma_rx_param = &uart0_dma_cfg_rx,
	399	.dma_tx_param = &uart0_dma_cfg_tx,
	400	#endif
	401	};
	402
403	static struct amba_pl011_data uart1_plat = {
404	#ifdef CONFIG_STE_DMA40
405	.dma_filter = stedma40_filter,
406	.dma_rx_param = &uart1_dma_cfg_rx,
407	.dma_tx_param = &uart1_dma_cfg_tx,
408	#endif
409	};
410
411	static struct amba_pl011_data uart2_plat = {
412	#ifdef CONFIG_STE_DMA40
413	.dma_filter = stedma40_filter,
414	.dma_rx_param = &uart2_dma_cfg_rx,
415	.dma_tx_param = &uart2_dma_cfg_tx,
416	#endif
417	};
418
fbf1eadf RV	419	static void __init mop500_uart_init(void)
fbf1eadf RV	420	{
5d7b8467 LW	421	db8500_add_uart0(&uart0_plat);
	422	db8500_add_uart1(&uart1_plat);
	423	db8500_add_uart2(&uart2_plat);
fbf1eadf RV	424	}
fbf1eadf RV	425
4b4f757c	426	static void __init mop500_init_machine(void)
fbf1eadf	427	{
4b4f757c LW	428	/*
	429	* The HREFv60 board removed a GPIO expander and routed
	430	* all these GPIO pins to the internal GPIO controller
	431	* instead.
	432	*/
	433	if (machine_is_hrefv60())
	434	mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
	435	else
	436	mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
	437
ea05a57f RV	438	u8500_init_devices();
ea05a57f RV	439
fe05203b	440	mop500_pins_init();
ea05a57f	441
d48a41c1 SK	442	platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
d48a41c1 SK	443
fbf1eadf	444	mop500_i2c_init();
008f8a2f	445	mop500_sdi_init();
fbf1eadf RV	446	mop500_spi_init();
fbf1eadf RV	447	mop500_uart_init();
008f8a2f	448
d5d22815	449	platform_device_register(&ab8500_device);
b8410a15 RV	450
	451	i2c_register_board_info(0, mop500_i2c0_devices,
	452	ARRAY_SIZE(mop500_i2c0_devices));
fe67dfc8 LW	453	if (!machine_is_hrefv60())
	454	i2c_register_board_info(0, mop500_i2c0_old_devices,
	455	ARRAY_SIZE(mop500_i2c0_old_devices));
dd7b2a05 PL	456	i2c_register_board_info(2, mop500_i2c2_devices,
dd7b2a05 PL	457	ARRAY_SIZE(mop500_i2c2_devices));
aa44ef4d SK	458	}
	459
	460	MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
	461	/* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
aa44ef4d SK	462	.boot_params = 0x100,
aa44ef4d SK	463	.map_io = u8500_map_io,
178980f9	464	.init_irq = ux500_init_irq,
aa44ef4d	465	/* we re-use nomadik timer here */
41ac329f	466	.timer = &ux500_timer,
4b4f757c LW	467	.init_machine = mop500_init_machine,
	468	MACHINE_END
	469
	470	MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
	471	.boot_params = 0x100,
	472	.map_io = u8500_map_io,
	473	.init_irq = ux500_init_irq,
	474	.timer = &ux500_timer,
	475	.init_machine = mop500_init_machine,
aa44ef4d	476	MACHINE_END