Merge remote-tracking branch 'regulator/for-next'
[deliverable/linux.git] / arch / arm64 / boot / dts / renesas / r8a7795-salvator-x.dts
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1/*
2 * Device Tree Source for the Salvator-X board
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
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11/*
12 * SSI-AK4613
13 *
14 * This command is required when Playback/Capture
15 *
16 * amixer set "DVC Out" 100%
17 * amixer set "DVC In" 100%
18 *
19 * You can use Mute
20 *
21 * amixer set "DVC Out Mute" on
22 * amixer set "DVC In Mute" on
23 *
24 * You can use Volume Ramp
25 *
26 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
27 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
28 * amixer set "DVC Out Ramp" on
29 * aplay xxx.wav &
30 * amixer set "DVC Out" 80% // Volume Down
31 * amixer set "DVC Out" 100% // Volume Up
32 */
33
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34/dts-v1/;
35#include "r8a7795.dtsi"
1c0e7b9a 36#include <dt-bindings/gpio/gpio.h>
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37
38/ {
39 model = "Renesas Salvator-X board based on r8a7795";
40 compatible = "renesas,salvator-x", "renesas,r8a7795";
41
42 aliases {
43 serial0 = &scif2;
44 serial1 = &scif1;
10ca6db7 45 ethernet0 = &avb;
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46 };
47
48 chosen {
b2407c56 49 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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50 stdout-path = "serial0:115200n8";
51 };
52
53 memory@48000000 {
54 device_type = "memory";
55 /* first 128MB is reserved for secure area. */
56 reg = <0x0 0x48000000 0x0 0x38000000>;
57 };
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58
59 x12_clk: x12_clk {
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 clock-frequency = <24576000>;
63 };
64
4a4e2138 65 vcc_sdhi0: regulator-vcc-sdhi0 {
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66 compatible = "regulator-fixed";
67
68 regulator-name = "SDHI0 Vcc";
69 regulator-min-microvolt = <3300000>;
70 regulator-max-microvolt = <3300000>;
71
72 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
73 enable-active-high;
74 };
75
4a4e2138 76 vccq_sdhi0: regulator-vccq-sdhi0 {
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77 compatible = "regulator-gpio";
78
79 regulator-name = "SDHI0 VccQ";
80 regulator-min-microvolt = <1800000>;
81 regulator-max-microvolt = <3300000>;
82
83 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
84 gpios-states = <1>;
85 states = <3300000 1
86 1800000 0>;
87 };
88
4a4e2138 89 vcc_sdhi3: regulator-vcc-sdhi3 {
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90 compatible = "regulator-fixed";
91
92 regulator-name = "SDHI3 Vcc";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95
96 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
97 enable-active-high;
98 };
99
4a4e2138 100 vccq_sdhi3: regulator-vccq-sdhi3 {
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101 compatible = "regulator-gpio";
102
103 regulator-name = "SDHI3 VccQ";
104 regulator-min-microvolt = <1800000>;
105 regulator-max-microvolt = <3300000>;
106
107 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
108 gpios-states = <1>;
109 states = <3300000 1
110 1800000 0>;
111 };
112
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113 vbus0_usb2: regulator-vbus0-usb2 {
114 compatible = "regulator-fixed";
115
116 regulator-name = "USB20_VBUS0";
117 regulator-min-microvolt = <5000000>;
118 regulator-max-microvolt = <5000000>;
119
120 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
121 enable-active-high;
122 };
123
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124 audio_clkout: audio_clkout {
125 /*
126 * This is same as <&rcar_sound 0>
127 * but needed to avoid cs2000/rcar_sound probe dead-lock
128 */
129 compatible = "fixed-clock";
130 #clock-cells = <0>;
131 clock-frequency = <11289600>;
132 };
133
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134 rsnd_ak4613: sound {
135 compatible = "simple-audio-card";
136
137 simple-audio-card,format = "left_j";
138 simple-audio-card,bitclock-master = <&sndcpu>;
139 simple-audio-card,frame-master = <&sndcpu>;
140
141 sndcpu: simple-audio-card,cpu {
142 sound-dai = <&rcar_sound>;
143 };
144
145 sndcodec: simple-audio-card,codec {
146 sound-dai = <&ak4613>;
147 };
148 };
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149
150 vga-encoder {
151 compatible = "adi,adv7123";
152
153 ports {
154 #address-cells = <1>;
155 #size-cells = <0>;
156
157 port@0 {
158 reg = <0>;
159 adv7123_in: endpoint {
160 remote-endpoint = <&du_out_rgb>;
161 };
162 };
163 port@1 {
164 reg = <1>;
165 adv7123_out: endpoint {
166 remote-endpoint = <&vga_in>;
167 };
168 };
169 };
170 };
171
172 vga {
173 compatible = "vga-connector";
174
175 port {
176 vga_in: endpoint {
177 remote-endpoint = <&adv7123_out>;
178 };
179 };
180 };
181};
182
183&du {
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184 pinctrl-0 = <&du_pins>;
185 pinctrl-names = "default";
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186 status = "okay";
187
188 ports {
189 port@0 {
190 endpoint {
191 remote-endpoint = <&adv7123_in>;
192 };
193 };
194 };
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195};
196
197&extal_clk {
198 clock-frequency = <16666666>;
199};
200
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201&extalr_clk {
202 clock-frequency = <32768>;
203};
204
1950fab0 205&pfc {
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206 pinctrl-0 = <&scif_clk_pins>;
207 pinctrl-names = "default";
208
1950fab0 209 scif1_pins: scif1 {
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210 groups = "scif1_data_a", "scif1_ctrl";
211 function = "scif1";
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212 };
213 scif2_pins: scif2 {
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214 groups = "scif2_data_a";
215 function = "scif2";
1950fab0 216 };
a3fc85e2 217 scif_clk_pins: scif_clk {
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218 groups = "scif_clk_a";
219 function = "scif_clk";
a3fc85e2 220 };
6fa501c5 221
637d801e 222 i2c2_pins: i2c2 {
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223 groups = "i2c2_a";
224 function = "i2c2";
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225 };
226
6fa501c5 227 avb_pins: avb {
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228 groups = "avb_mdc";
229 function = "avb";
6fa501c5 230 };
994aadf0 231
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232 du_pins: du {
233 groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
234 function = "du";
235 };
236
1c0e7b9a 237 sdhi0_pins: sd0 {
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238 groups = "sdhi0_data4", "sdhi0_ctrl";
239 function = "sdhi0";
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240 };
241
242 sdhi3_pins: sd3 {
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243 groups = "sdhi3_data4", "sdhi3_ctrl";
244 function = "sdhi3";
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245 };
246
994aadf0 247 sound_pins: sound {
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248 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
249 function = "ssi";
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250 };
251
252 sound_clk_pins: sound_clk {
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253 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
254 "audio_clkout_a", "audio_clkout3_a";
255 function = "audio_clk";
994aadf0 256 };
e24250c0 257
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258 usb0_pins: usb0 {
259 groups = "usb0";
260 function = "usb0";
261 };
262
e24250c0 263 usb1_pins: usb1 {
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264 groups = "usb1";
265 function = "usb1";
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266 };
267
268 usb2_pins: usb2 {
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269 groups = "usb2";
270 function = "usb2";
e24250c0 271 };
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272};
273
274&scif1 {
275 pinctrl-0 = <&scif1_pins>;
276 pinctrl-names = "default";
277
3cac478c 278 uart-has-rtscts;
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279 status = "okay";
280};
281
282&scif2 {
283 pinctrl-0 = <&scif2_pins>;
284 pinctrl-names = "default";
285
286 status = "okay";
287};
6fa501c5 288
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289&scif_clk {
290 clock-frequency = <14745600>;
291 status = "okay";
292};
293
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294&i2c2 {
295 pinctrl-0 = <&i2c2_pins>;
296 pinctrl-names = "default";
297
298 status = "okay";
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299
300 clock-frequency = <100000>;
301
302 ak4613: codec@10 {
303 compatible = "asahi-kasei,ak4613";
304 #sound-dai-cells = <0>;
305 reg = <0x10>;
306 clocks = <&rcar_sound 3>;
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307
308 asahi-kasei,in1-single-end;
309 asahi-kasei,in2-single-end;
310 asahi-kasei,out1-single-end;
311 asahi-kasei,out2-single-end;
312 asahi-kasei,out3-single-end;
313 asahi-kasei,out4-single-end;
314 asahi-kasei,out5-single-end;
315 asahi-kasei,out6-single-end;
994aadf0 316 };
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317
318 cs2000: clk_multiplier@4f {
319 #clock-cells = <0>;
320 compatible = "cirrus,cs2000-cp";
321 reg = <0x4f>;
322 clocks = <&audio_clkout>, <&x12_clk>;
323 clock-names = "clk_in", "ref_clk";
324
325 assigned-clocks = <&cs2000>;
326 assigned-clock-rates = <24576000>; /* 1/1 divide */
327 };
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328};
329
330&rcar_sound {
331 pinctrl-0 = <&sound_pins &sound_clk_pins>;
332 pinctrl-names = "default";
333
334 /* Single DAI */
335 #sound-dai-cells = <0>;
336
337 /* audio_clkout0/1/2/3 */
338 #clock-cells = <1>;
339 clock-frequency = <11289600>;
340
341 status = "okay";
342
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343 /* update <audio_clk_b> to <cs2000> */
344 clocks = <&cpg CPG_MOD 1005>,
345 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
346 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
347 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
348 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
349 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
350 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
351 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
352 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
353 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
354 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
355 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
356 <&audio_clk_a>, <&cs2000>,
357 <&audio_clk_c>,
358 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
359
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360 rcar_sound,dai {
361 dai0 {
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362 playback = <&ssi0 &src0 &dvc0>;
363 capture = <&ssi1 &src1 &dvc1>;
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364 };
365 };
366};
367
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368&sata {
369 status = "okay";
370};
371
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372&sdhi0 {
373 pinctrl-0 = <&sdhi0_pins>;
374 pinctrl-names = "default";
375
376 vmmc-supply = <&vcc_sdhi0>;
377 vqmmc-supply = <&vccq_sdhi0>;
378 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
379 wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
380 bus-width = <4>;
381 status = "okay";
382};
383
384&sdhi3 {
385 pinctrl-0 = <&sdhi3_pins>;
386 pinctrl-names = "default";
387
388 vmmc-supply = <&vcc_sdhi3>;
389 vqmmc-supply = <&vccq_sdhi3>;
390 cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
391 wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
392 bus-width = <4>;
393 status = "okay";
394};
395
994aadf0 396&ssi1 {
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397 shared-pin;
398};
399
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400&wdt0 {
401 timeout-sec = <60>;
402 status = "okay";
403};
404
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405&audio_clk_a {
406 clock-frequency = <22579200>;
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407};
408
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409&avb {
410 pinctrl-0 = <&avb_pins>;
411 pinctrl-names = "default";
412 renesas,no-ether-link;
413 phy-handle = <&phy0>;
414 status = "okay";
415
416 phy0: ethernet-phy@0 {
417 rxc-skew-ps = <900>;
418 rxdv-skew-ps = <0>;
419 rxd0-skew-ps = <0>;
420 rxd1-skew-ps = <0>;
421 rxd2-skew-ps = <0>;
422 rxd3-skew-ps = <0>;
423 txc-skew-ps = <900>;
424 txen-skew-ps = <0>;
425 txd0-skew-ps = <0>;
426 txd1-skew-ps = <0>;
427 txd2-skew-ps = <0>;
428 txd3-skew-ps = <0>;
429 reg = <0>;
430 interrupt-parent = <&gpio2>;
431 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
432 };
433};
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434
435&xhci0 {
436 status = "okay";
437};
e24250c0 438
a905b72c
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439&usb2_phy0 {
440 pinctrl-0 = <&usb0_pins>;
441 pinctrl-names = "default";
442
443 vbus-supply = <&vbus0_usb2>;
444 status = "okay";
445};
446
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447&usb2_phy1 {
448 pinctrl-0 = <&usb1_pins>;
449 pinctrl-names = "default";
450
451 status = "okay";
452};
453
454&usb2_phy2 {
455 pinctrl-0 = <&usb2_pins>;
456 pinctrl-names = "default";
457
458 status = "okay";
459};
474efcae 460
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461&ehci0 {
462 status = "okay";
463};
464
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465&ehci1 {
466 status = "okay";
467};
468
469&ehci2 {
470 status = "okay";
471};
472
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473&ohci0 {
474 status = "okay";
475};
476
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477&ohci1 {
478 status = "okay";
479};
480
481&ohci2 {
482 status = "okay";
483};
bbd27304 484
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485&hsusb {
486 status = "okay";
487};
488
bbd27304 489&pcie_bus_clk {
9f33a8a9 490 clock-frequency = <100000000>;
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PE
491 status = "okay";
492};
493
494&pciec0 {
495 status = "okay";
496};
497
498&pciec1 {
499 status = "okay";
500};
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