Merge remote-tracking branch 'omap_dss2/for-next'
[deliverable/linux.git] / arch / arm64 / boot / dts / rockchip / rk3399-evb.dts
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1/*
2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include <dt-bindings/pwm/pwm.h>
45#include "rk3399.dtsi"
46
47/ {
48 model = "Rockchip RK3399 Evaluation Board";
49 compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
50 "google,rk3399evb-rev2";
51
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52 clkin_gmac: external-gmac-clock {
53 compatible = "fixed-clock";
54 clock-frequency = <125000000>;
55 clock-output-names = "clkin_gmac";
56 #clock-cells = <0>;
57 };
58
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59 vdd_center: vdd-center {
60 compatible = "pwm-regulator";
61 pwms = <&pwm3 0 25000 0>;
62 regulator-name = "vdd_center";
63 regulator-min-microvolt = <800000>;
64 regulator-max-microvolt = <1400000>;
65 regulator-always-on;
66 regulator-boot-on;
67 status = "okay";
68 };
69
70 vcc3v3_sys: vcc3v3-sys {
71 compatible = "regulator-fixed";
72 regulator-name = "vcc3v3_sys";
73 regulator-always-on;
74 regulator-boot-on;
75 regulator-min-microvolt = <3300000>;
76 regulator-max-microvolt = <3300000>;
77 };
78
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79 vcc5v0_sys: vcc5v0-sys {
80 compatible = "regulator-fixed";
81 regulator-name = "vcc5v0_sys";
82 regulator-always-on;
83 regulator-boot-on;
84 regulator-min-microvolt = <5000000>;
85 regulator-max-microvolt = <5000000>;
86 };
87
88 vcc5v0_host: vcc5v0-host-regulator {
89 compatible = "regulator-fixed";
90 enable-active-high;
91 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&vcc5v0_host_en>;
94 regulator-name = "vcc5v0_host";
95 vin-supply = <&vcc5v0_sys>;
96 };
97
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98 vcc_phy: vcc-phy-regulator {
99 compatible = "regulator-fixed";
100 regulator-name = "vcc_phy";
101 regulator-always-on;
102 regulator-boot-on;
103 };
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104
105 vcc_phy: vcc-phy-regulator {
106 compatible = "regulator-fixed";
107 regulator-name = "vcc_phy";
108 regulator-always-on;
109 regulator-boot-on;
110 };
111
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112};
113
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114&emmc_phy {
115 status = "okay";
116};
117
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118&gmac {
119 assigned-clocks = <&cru SCLK_RMII_SRC>;
120 assigned-clock-parents = <&clkin_gmac>;
121 clock_in_out = "input";
122 phy-supply = <&vcc_phy>;
123 phy-mode = "rgmii";
124 pinctrl-names = "default";
125 pinctrl-0 = <&rgmii_pins>;
126 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
127 snps,reset-active-low;
128 snps,reset-delays-us = <0 10000 50000>;
129 tx_delay = <0x28>;
130 rx_delay = <0x11>;
131 status = "okay";
132};
133
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134&pwm0 {
135 status = "okay";
136};
137
138&pwm2 {
139 status = "okay";
140};
141
142&pwm3 {
143 status = "okay";
144};
145
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146&sdhci {
147 bus-width = <8>;
148 mmc-hs400-1_8v;
149 mmc-hs400-enhanced-strobe;
150 non-removable;
151 status = "okay";
152};
153
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154&pcie_phy {
155 status = "disabled";
156};
157
158&pcie0 {
159 ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
160 num-lanes = <4>;
161 pinctrl-names = "default";
162 pinctrl-0 = <&pcie_clkreqn>;
163 status = "disabled";
164};
165
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166&u2phy0 {
167 status = "okay";
168};
169
170&u2phy0_host {
171 phy-supply = <&vcc5v0_host>;
172 status = "okay";
173};
174
175&u2phy1 {
176 status = "okay";
177};
178
179&u2phy1_host {
180 phy-supply = <&vcc5v0_host>;
181 status = "okay";
182};
183
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184&uart2 {
185 status = "okay";
186};
187
188&usb_host0_ehci {
189 status = "okay";
190};
191
192&usb_host0_ohci {
193 status = "okay";
194};
195
196&usb_host1_ehci {
197 status = "okay";
198};
199
200&usb_host1_ohci {
201 status = "okay";
202};
203
204&pinctrl {
205 pmic {
206 pmic_int_l: pmic-int-l {
207 rockchip,pins =
208 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
209 };
210
211 pmic_dvs2: pmic-dvs2 {
212 rockchip,pins =
213 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
214 };
215 };
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216
217 usb2 {
218 vcc5v0_host_en: vcc5v0-host-en {
219 rockchip,pins =
220 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
221 };
222 };
cc7364fb 223};
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