[deliverable/linux.git] / arch / arm64 / kernel / setup.c

/*
 * Based on arch/arm/kernel/setup.c
 *
 * Copyright (C) 1995-2001 Russell King
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/utsname.h>
#include <linux/initrd.h>
#include <linux/console.h>
#include <linux/bootmem.h>
#include <linux/seq_file.h>
#include <linux/screen_info.h>
#include <linux/init.h>
#include <linux/kexec.h>
#include <linux/crash_dump.h>
#include <linux/root_dev.h>
#include <linux/clk-provider.h>
#include <linux/cpu.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
#include <linux/fs.h>
#include <linux/proc_fs.h>
#include <linux/memblock.h>
#include <linux/of_fdt.h>
#include <linux/of_platform.h>

#include <asm/cputype.h>
#include <asm/elf.h>
#include <asm/cputable.h>
#include <asm/cpu_ops.h>
#include <asm/sections.h>
#include <asm/setup.h>
#include <asm/smp_plat.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
#include <asm/traps.h>
#include <asm/memblock.h>
#include <asm/psci.h>

unsigned int processor_id;
EXPORT_SYMBOL(processor_id);

unsigned long elf_hwcap __read_mostly;
EXPORT_SYMBOL_GPL(elf_hwcap);

#ifdef CONFIG_COMPAT
#define COMPAT_ELF_HWCAP_DEFAULT	\
				(COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
				 COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
				 COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\
				 COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
				 COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV)
unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
#endif

static const char *cpu_name;
static const char *machine_name;
phys_addr_t __fdt_pointer __initdata;

/*
 * Standard memory resources
 */
static struct resource mem_res[] = {
	{
		.name = "Kernel code",
		.start = 0,
		.end = 0,
		.flags = IORESOURCE_MEM
	},
	{
		.name = "Kernel data",
		.start = 0,
		.end = 0,
		.flags = IORESOURCE_MEM
	}
};

#define kernel_code mem_res[0]
#define kernel_data mem_res[1]

void __init early_print(const char *str, ...)
{
	char buf[256];
	va_list ap;

	va_start(ap, str);
	vsnprintf(buf, sizeof(buf), str, ap);
	va_end(ap);

	printk("%s", buf);
}

void __init smp_setup_processor_id(void)
{
	/*
	 * clear __my_cpu_offset on boot CPU to avoid hang caused by
	 * using percpu variable early, for example, lockdep will
	 * access percpu variable inside lock_release
	 */
	set_my_cpu_offset(0);
}

bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
{
	return phys_id == cpu_logical_map(cpu);
}

static void __init setup_processor(void)
{
	struct cpu_info *cpu_info;
	u64 features, block;

	cpu_info = lookup_processor_type(read_cpuid_id());
	if (!cpu_info) {
		printk("CPU configuration botched (ID %08x), unable to continue.\n",
		       read_cpuid_id());
		while (1);
	}

	cpu_name = cpu_info->cpu_name;

	printk("CPU: %s [%08x] revision %d\n",
	       cpu_name, read_cpuid_id(), read_cpuid_id() & 15);

	sprintf(init_utsname()->machine, ELF_PLATFORM);
	elf_hwcap = 0;

	/*
	 * ID_AA64ISAR0_EL1 contains 4-bit wide signed feature blocks.
	 * The blocks we test below represent incremental functionality
	 * for non-negative values. Negative values are reserved.
	 */
	features = read_cpuid(ID_AA64ISAR0_EL1);
	block = (features >> 4) & 0xf;
	if (!(block & 0x8)) {
		switch (block) {
		default:
		case 2:
			elf_hwcap |= HWCAP_PMULL;
		case 1:
			elf_hwcap |= HWCAP_AES;
		case 0:
			break;
		}
	}

	block = (features >> 8) & 0xf;
	if (block && !(block & 0x8))
		elf_hwcap |= HWCAP_SHA1;

	block = (features >> 12) & 0xf;
	if (block && !(block & 0x8))
		elf_hwcap |= HWCAP_SHA2;

	block = (features >> 16) & 0xf;
	if (block && !(block & 0x8))
		elf_hwcap |= HWCAP_CRC32;
}

static void __init setup_machine_fdt(phys_addr_t dt_phys)
{
	if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys))) {
		early_print("\n"
			"Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
			"The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
			"\nPlease check your bootloader.\n",
			dt_phys, phys_to_virt(dt_phys));

		while (true)
			cpu_relax();
	}

	machine_name = of_flat_dt_get_machine_name();
}

/*
 * Limit the memory size that was specified via FDT.
 */
static int __init early_mem(char *p)
{
	phys_addr_t limit;

	if (!p)
		return 1;

	limit = memparse(p, &p) & PAGE_MASK;
	pr_notice("Memory limited to %lldMB\n", limit >> 20);

	memblock_enforce_memory_limit(limit);

	return 0;
}
early_param("mem", early_mem);

static void __init request_standard_resources(void)
{
	struct memblock_region *region;
	struct resource *res;

	kernel_code.start   = virt_to_phys(_text);
	kernel_code.end     = virt_to_phys(_etext - 1);
	kernel_data.start   = virt_to_phys(_sdata);
	kernel_data.end     = virt_to_phys(_end - 1);

	for_each_memblock(memory, region) {
		res = alloc_bootmem_low(sizeof(*res));
		res->name  = "System RAM";
		res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
		res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
		res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;

		request_resource(&iomem_resource, res);

		if (kernel_code.start >= res->start &&
		    kernel_code.end <= res->end)
			request_resource(res, &kernel_code);
		if (kernel_data.start >= res->start &&
		    kernel_data.end <= res->end)
			request_resource(res, &kernel_data);
	}
}

u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };

void __init setup_arch(char **cmdline_p)
{
	/*
	 * Unmask asynchronous aborts early to catch possible system errors.
	 */
	local_async_enable();

	setup_processor();

	setup_machine_fdt(__fdt_pointer);

	init_mm.start_code = (unsigned long) _text;
	init_mm.end_code   = (unsigned long) _etext;
	init_mm.end_data   = (unsigned long) _edata;
	init_mm.brk	   = (unsigned long) _end;

	*cmdline_p = boot_command_line;

	parse_early_param();

	arm64_memblock_init();

	paging_init();
	request_standard_resources();

	unflatten_device_tree();

	psci_init();

	cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
	cpu_read_bootcpu_ops();
#ifdef CONFIG_SMP
	smp_init_cpus();
#endif

#ifdef CONFIG_VT
#if defined(CONFIG_VGA_CONSOLE)
	conswitchp = &vga_con;
#elif defined(CONFIG_DUMMY_CONSOLE)
	conswitchp = &dummy_con;
#endif
#endif
}

static int __init arm64_device_init(void)
{
	of_clk_init(NULL);
	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
	return 0;
}
arch_initcall(arm64_device_init);

static DEFINE_PER_CPU(struct cpu, cpu_data);

static int __init topology_init(void)
{
	int i;

	for_each_possible_cpu(i) {
		struct cpu *cpu = &per_cpu(cpu_data, i);
		cpu->hotpluggable = 1;
		register_cpu(cpu, i);
	}

	return 0;
}
subsys_initcall(topology_init);

static const char *hwcap_str[] = {
	"fp",
	"asimd",
	"evtstrm",
	"aes",
	"pmull",
	"sha1",
	"sha2",
	"crc32",
	NULL
};

static int c_show(struct seq_file *m, void *v)
{
	int i;

	seq_printf(m, "Processor\t: %s rev %d (%s)\n",
		   cpu_name, read_cpuid_id() & 15, ELF_PLATFORM);

	for_each_online_cpu(i) {
		/*
		 * glibc reads /proc/cpuinfo to determine the number of
		 * online processors, looking for lines beginning with
		 * "processor".  Give glibc what it expects.
		 */
#ifdef CONFIG_SMP
		seq_printf(m, "processor\t: %d\n", i);
#endif
	}

	/* dump out the processor features */
	seq_puts(m, "Features\t: ");

	for (i = 0; hwcap_str[i]; i++)
		if (elf_hwcap & (1 << i))
			seq_printf(m, "%s ", hwcap_str[i]);

	seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
	seq_printf(m, "CPU architecture: AArch64\n");
	seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15);
	seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff);
	seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);

	seq_puts(m, "\n");

	seq_printf(m, "Hardware\t: %s\n", machine_name);

	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	return *pos < 1 ? (void *)1 : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return NULL;
}

static void c_stop(struct seq_file *m, void *v)
{
}

const struct seq_operations cpuinfo_op = {
	.start	= c_start,
	.next	= c_next,
	.stop	= c_stop,
	.show	= c_show
};
Commit	Line	Data
9703d9d7 CM	1	/*
	2	* Based on arch/arm/kernel/setup.c
	3	*
	4	* Copyright (C) 1995-2001 Russell King
	5	* Copyright (C) 2012 ARM Ltd.
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#include <linux/export.h>
	21	#include <linux/kernel.h>
	22	#include <linux/stddef.h>
	23	#include <linux/ioport.h>
	24	#include <linux/delay.h>
	25	#include <linux/utsname.h>
	26	#include <linux/initrd.h>
	27	#include <linux/console.h>
	28	#include <linux/bootmem.h>
	29	#include <linux/seq_file.h>
	30	#include <linux/screen_info.h>
	31	#include <linux/init.h>
	32	#include <linux/kexec.h>
	33	#include <linux/crash_dump.h>
	34	#include <linux/root_dev.h>
de79a64d	35	#include <linux/clk-provider.h>
9703d9d7 CM	36	#include <linux/cpu.h>
	37	#include <linux/interrupt.h>
	38	#include <linux/smp.h>
	39	#include <linux/fs.h>
	40	#include <linux/proc_fs.h>
	41	#include <linux/memblock.h>
	42	#include <linux/of_fdt.h>
d6bafb9b	43	#include <linux/of_platform.h>
9703d9d7 CM	44
	45	#include <asm/cputype.h>
	46	#include <asm/elf.h>
	47	#include <asm/cputable.h>
e8765b26	48	#include <asm/cpu_ops.h>
9703d9d7 CM	49	#include <asm/sections.h>
9703d9d7 CM	50	#include <asm/setup.h>
4c7aa002	51	#include <asm/smp_plat.h>
9703d9d7 CM	52	#include <asm/cacheflush.h>
	53	#include <asm/tlbflush.h>
	54	#include <asm/traps.h>
	55	#include <asm/memblock.h>
e790f1de	56	#include <asm/psci.h>
9703d9d7 CM	57
	58	unsigned int processor_id;
	59	EXPORT_SYMBOL(processor_id);
	60
25804e6a	61	unsigned long elf_hwcap __read_mostly;
9703d9d7 CM	62	EXPORT_SYMBOL_GPL(elf_hwcap);
9703d9d7 CM	63
46efe547 SK	64	#ifdef CONFIG_COMPAT
	65	#define COMPAT_ELF_HWCAP_DEFAULT \
	66	(COMPAT_HWCAP_HALF\|COMPAT_HWCAP_THUMB\|\
	67	COMPAT_HWCAP_FAST_MULT\|COMPAT_HWCAP_EDSP\|\
	68	COMPAT_HWCAP_TLS\|COMPAT_HWCAP_VFP\|\
	69	COMPAT_HWCAP_VFPv3\|COMPAT_HWCAP_VFPv4\|\
	70	COMPAT_HWCAP_NEON\|COMPAT_HWCAP_IDIV)
	71	unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
	72	#endif
	73
9703d9d7 CM	74	static const char *cpu_name;
	75	static const char *machine_name;
	76	phys_addr_t __fdt_pointer __initdata;
	77
	78	/*
	79	* Standard memory resources
	80	*/
	81	static struct resource mem_res[] = {
	82	{
	83	.name = "Kernel code",
	84	.start = 0,
	85	.end = 0,
	86	.flags = IORESOURCE_MEM
	87	},
	88	{
	89	.name = "Kernel data",
	90	.start = 0,
	91	.end = 0,
	92	.flags = IORESOURCE_MEM
	93	}
	94	};
	95
	96	#define kernel_code mem_res[0]
	97	#define kernel_data mem_res[1]
	98
	99	void __init early_print(const char *str, ...)
	100	{
	101	char buf[256];
	102	va_list ap;
	103
	104	va_start(ap, str);
	105	vsnprintf(buf, sizeof(buf), str, ap);
	106	va_end(ap);
	107
	108	printk("%s", buf);
	109	}
	110
71586276 WD	111	void __init smp_setup_processor_id(void)
	112	{
	113	/*
	114	* clear __my_cpu_offset on boot CPU to avoid hang caused by
	115	* using percpu variable early, for example, lockdep will
	116	* access percpu variable inside lock_release
	117	*/
	118	set_my_cpu_offset(0);
	119	}
	120
6e15d0e0 SK	121	bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
	122	{
	123	return phys_id == cpu_logical_map(cpu);
	124	}
	125
9703d9d7 CM	126	static void __init setup_processor(void)
	127	{
	128	struct cpu_info *cpu_info;
4bff28cc	129	u64 features, block;
9703d9d7	130
9703d9d7 CM	131	cpu_info = lookup_processor_type(read_cpuid_id());
	132	if (!cpu_info) {
	133	printk("CPU configuration botched (ID %08x), unable to continue.\n",
	134	read_cpuid_id());
	135	while (1);
	136	}
	137
	138	cpu_name = cpu_info->cpu_name;
	139
	140	printk("CPU: %s [%08x] revision %d\n",
	141	cpu_name, read_cpuid_id(), read_cpuid_id() & 15);
	142
94ed1f2c	143	sprintf(init_utsname()->machine, ELF_PLATFORM);
9703d9d7	144	elf_hwcap = 0;
4bff28cc SC	145
	146	/*
	147	* ID_AA64ISAR0_EL1 contains 4-bit wide signed feature blocks.
	148	* The blocks we test below represent incremental functionality
	149	* for non-negative values. Negative values are reserved.
	150	*/
	151	features = read_cpuid(ID_AA64ISAR0_EL1);
	152	block = (features >> 4) & 0xf;
	153	if (!(block & 0x8)) {
	154	switch (block) {
	155	default:
	156	case 2:
	157	elf_hwcap \|= HWCAP_PMULL;
	158	case 1:
	159	elf_hwcap \|= HWCAP_AES;
	160	case 0:
	161	break;
	162	}
	163	}
	164
	165	block = (features >> 8) & 0xf;
	166	if (block && !(block & 0x8))
	167	elf_hwcap \|= HWCAP_SHA1;
	168
	169	block = (features >> 12) & 0xf;
	170	if (block && !(block & 0x8))
	171	elf_hwcap \|= HWCAP_SHA2;
	172
	173	block = (features >> 16) & 0xf;
	174	if (block && !(block & 0x8))
	175	elf_hwcap \|= HWCAP_CRC32;
9703d9d7 CM	176	}
	177
	178	static void __init setup_machine_fdt(phys_addr_t dt_phys)
	179	{
d5189cc5	180	if (!dt_phys \|\| !early_init_dt_scan(phys_to_virt(dt_phys))) {
9703d9d7 CM	181	early_print("\n"
9703d9d7 CM	182	"Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
d5189cc5	183	"The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
9703d9d7	184	"\nPlease check your bootloader.\n",
d5189cc5	185	dt_phys, phys_to_virt(dt_phys));
9703d9d7 CM	186
	187	while (true)
	188	cpu_relax();
	189	}
	190
f2b99bcc	191	machine_name = of_flat_dt_get_machine_name();
9703d9d7 CM	192	}
9703d9d7 CM	193
9703d9d7 CM	194	/*
	195	* Limit the memory size that was specified via FDT.
	196	*/
	197	static int __init early_mem(char *p)
	198	{
	199	phys_addr_t limit;
	200
	201	if (!p)
	202	return 1;
	203
	204	limit = memparse(p, &p) & PAGE_MASK;
	205	pr_notice("Memory limited to %lldMB\n", limit >> 20);
	206
	207	memblock_enforce_memory_limit(limit);
	208
	209	return 0;
	210	}
	211	early_param("mem", early_mem);
	212
	213	static void __init request_standard_resources(void)
	214	{
	215	struct memblock_region *region;
	216	struct resource *res;
	217
	218	kernel_code.start = virt_to_phys(_text);
	219	kernel_code.end = virt_to_phys(_etext - 1);
	220	kernel_data.start = virt_to_phys(_sdata);
	221	kernel_data.end = virt_to_phys(_end - 1);
	222
	223	for_each_memblock(memory, region) {
	224	res = alloc_bootmem_low(sizeof(*res));
	225	res->name = "System RAM";
	226	res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
	227	res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
	228	res->flags = IORESOURCE_MEM \| IORESOURCE_BUSY;
	229
	230	request_resource(&iomem_resource, res);
	231
	232	if (kernel_code.start >= res->start &&
	233	kernel_code.end <= res->end)
	234	request_resource(res, &kernel_code);
	235	if (kernel_data.start >= res->start &&
	236	kernel_data.end <= res->end)
	237	request_resource(res, &kernel_data);
	238	}
	239	}
	240
4c7aa002 JM	241	u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
4c7aa002 JM	242
9703d9d7 CM	243	void __init setup_arch(char **cmdline_p)
9703d9d7 CM	244	{
b3bf6aa7 CM	245	/*
	246	* Unmask asynchronous aborts early to catch possible system errors.
	247	*/
	248	local_async_enable();
	249
9703d9d7 CM	250	setup_processor();
	251
	252	setup_machine_fdt(__fdt_pointer);
	253
	254	init_mm.start_code = (unsigned long) _text;
	255	init_mm.end_code = (unsigned long) _etext;
	256	init_mm.end_data = (unsigned long) _edata;
	257	init_mm.brk = (unsigned long) _end;
	258
	259	*cmdline_p = boot_command_line;
	260
	261	parse_early_param();
	262
	263	arm64_memblock_init();
	264
	265	paging_init();
	266	request_standard_resources();
	267
	268	unflatten_device_tree();
	269
e790f1de WD	270	psci_init();
e790f1de WD	271
4c7aa002	272	cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
e8765b26	273	cpu_read_bootcpu_ops();
9703d9d7 CM	274	#ifdef CONFIG_SMP
	275	smp_init_cpus();
	276	#endif
	277
	278	#ifdef CONFIG_VT
	279	#if defined(CONFIG_VGA_CONSOLE)
	280	conswitchp = &vga_con;
	281	#elif defined(CONFIG_DUMMY_CONSOLE)
	282	conswitchp = &dummy_con;
	283	#endif
	284	#endif
	285	}
	286
c560ecfe	287	static int __init arm64_device_init(void)
de79a64d CM	288	{
de79a64d CM	289	of_clk_init(NULL);
c560ecfe	290	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
de79a64d CM	291	return 0;
de79a64d CM	292	}
c560ecfe	293	arch_initcall(arm64_device_init);
de79a64d	294
9703d9d7 CM	295	static DEFINE_PER_CPU(struct cpu, cpu_data);
	296
	297	static int __init topology_init(void)
	298	{
	299	int i;
	300
	301	for_each_possible_cpu(i) {
	302	struct cpu *cpu = &per_cpu(cpu_data, i);
	303	cpu->hotpluggable = 1;
	304	register_cpu(cpu, i);
	305	}
	306
	307	return 0;
	308	}
	309	subsys_initcall(topology_init);
	310
	311	static const char *hwcap_str[] = {
	312	"fp",
	313	"asimd",
46efe547	314	"evtstrm",
4bff28cc SC	315	"aes",
	316	"pmull",
	317	"sha1",
	318	"sha2",
	319	"crc32",
9703d9d7 CM	320	NULL
	321	};
	322
	323	static int c_show(struct seq_file m, void v)
	324	{
	325	int i;
	326
	327	seq_printf(m, "Processor\t: %s rev %d (%s)\n",
	328	cpu_name, read_cpuid_id() & 15, ELF_PLATFORM);
	329
	330	for_each_online_cpu(i) {
	331	/*
	332	* glibc reads /proc/cpuinfo to determine the number of
	333	* online processors, looking for lines beginning with
	334	* "processor". Give glibc what it expects.
	335	*/
	336	#ifdef CONFIG_SMP
	337	seq_printf(m, "processor\t: %d\n", i);
	338	#endif
9703d9d7 CM	339	}
	340
	341	/* dump out the processor features */
	342	seq_puts(m, "Features\t: ");
	343
	344	for (i = 0; hwcap_str[i]; i++)
	345	if (elf_hwcap & (1 << i))
	346	seq_printf(m, "%s ", hwcap_str[i]);
	347
	348	seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
	349	seq_printf(m, "CPU architecture: AArch64\n");
	350	seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15);
	351	seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff);
	352	seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
	353
	354	seq_puts(m, "\n");
	355
	356	seq_printf(m, "Hardware\t: %s\n", machine_name);
	357
	358	return 0;
	359	}
	360
	361	static void c_start(struct seq_file m, loff_t *pos)
	362	{
	363	return pos < 1 ? (void )1 : NULL;
	364	}
	365
	366	static void c_next(struct seq_file m, void v, loff_t pos)
	367	{
	368	++*pos;
	369	return NULL;
	370	}
	371
	372	static void c_stop(struct seq_file m, void v)
	373	{
	374	}
	375
	376	const struct seq_operations cpuinfo_op = {
	377	.start = c_start,
	378	.next = c_next,
	379	.stop = c_stop,
	380	.show = c_show
	381	};