[deliverable/linux.git] / arch / arm64 / kvm / guest.c

/*
 * Copyright (C) 2012,2013 - ARM Ltd
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 *
 * Derived from arch/arm/kvm/guest.c:
 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/errno.h>
#include <linux/err.h>
#include <linux/kvm_host.h>
#include <linux/module.h>
#include <linux/vmalloc.h>
#include <linux/fs.h>
#include <asm/cputype.h>
#include <asm/uaccess.h>
#include <asm/kvm.h>
#include <asm/kvm_asm.h>
#include <asm/kvm_emulate.h>
#include <asm/kvm_coproc.h>

struct kvm_stats_debugfs_item debugfs_entries[] = {
	{ NULL }
};

int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
{
	return 0;
}

static u64 core_reg_offset_from_id(u64 id)
{
	return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE);
}

static int get_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	/*
	 * Because the kvm_regs structure is a mix of 32, 64 and
	 * 128bit fields, we index it as if it was a 32bit
	 * array. Hence below, nr_regs is the number of entries, and
	 * off the index in the "array".
	 */
	__u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
	struct kvm_regs *regs = vcpu_gp_regs(vcpu);
	int nr_regs = sizeof(*regs) / sizeof(__u32);
	u32 off;

	/* Our ID is an index into the kvm_regs struct. */
	off = core_reg_offset_from_id(reg->id);
	if (off >= nr_regs ||
	    (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
		return -ENOENT;

	if (copy_to_user(uaddr, ((u32 *)regs) + off, KVM_REG_SIZE(reg->id)))
		return -EFAULT;

	return 0;
}

static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	__u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
	struct kvm_regs *regs = vcpu_gp_regs(vcpu);
	int nr_regs = sizeof(*regs) / sizeof(__u32);
	__uint128_t tmp;
	void *valp = &tmp;
	u64 off;
	int err = 0;

	/* Our ID is an index into the kvm_regs struct. */
	off = core_reg_offset_from_id(reg->id);
	if (off >= nr_regs ||
	    (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
		return -ENOENT;

	if (KVM_REG_SIZE(reg->id) > sizeof(tmp))
		return -EINVAL;

	if (copy_from_user(valp, uaddr, KVM_REG_SIZE(reg->id))) {
		err = -EFAULT;
		goto out;
	}

	if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) {
		u32 mode = (*(u32 *)valp) & COMPAT_PSR_MODE_MASK;
		switch (mode) {
		case COMPAT_PSR_MODE_USR:
		case COMPAT_PSR_MODE_FIQ:
		case COMPAT_PSR_MODE_IRQ:
		case COMPAT_PSR_MODE_SVC:
		case COMPAT_PSR_MODE_ABT:
		case COMPAT_PSR_MODE_UND:
		case PSR_MODE_EL0t:
		case PSR_MODE_EL1t:
		case PSR_MODE_EL1h:
			break;
		default:
			err = -EINVAL;
			goto out;
		}
	}

	memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id));
out:
	return err;
}

int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
{
	return -EINVAL;
}

int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
{
	return -EINVAL;
}

static unsigned long num_core_regs(void)
{
	return sizeof(struct kvm_regs) / sizeof(__u32);
}

/**
 * ARM64 versions of the TIMER registers, always available on arm64
 */

#define NUM_TIMER_REGS 3

static bool is_timer_reg(u64 index)
{
	switch (index) {
	case KVM_REG_ARM_TIMER_CTL:
	case KVM_REG_ARM_TIMER_CNT:
	case KVM_REG_ARM_TIMER_CVAL:
		return true;
	}
	return false;
}

static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
{
	if (put_user(KVM_REG_ARM_TIMER_CTL, uindices))
		return -EFAULT;
	uindices++;
	if (put_user(KVM_REG_ARM_TIMER_CNT, uindices))
		return -EFAULT;
	uindices++;
	if (put_user(KVM_REG_ARM_TIMER_CVAL, uindices))
		return -EFAULT;

	return 0;
}

static int set_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	void __user *uaddr = (void __user *)(long)reg->addr;
	u64 val;
	int ret;

	ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id));
	if (ret != 0)
		return -EFAULT;

	return kvm_arm_timer_set_reg(vcpu, reg->id, val);
}

static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	void __user *uaddr = (void __user *)(long)reg->addr;
	u64 val;

	val = kvm_arm_timer_get_reg(vcpu, reg->id);
	return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id));
}

/**
 * kvm_arm_num_regs - how many registers do we present via KVM_GET_ONE_REG
 *
 * This is for all registers.
 */
unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
{
	return num_core_regs() + kvm_arm_num_sys_reg_descs(vcpu)
                + NUM_TIMER_REGS;
}

/**
 * kvm_arm_copy_reg_indices - get indices of all registers.
 *
 * We do core registers right here, then we apppend system regs.
 */
int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
{
	unsigned int i;
	const u64 core_reg = KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE;
	int ret;

	for (i = 0; i < sizeof(struct kvm_regs) / sizeof(__u32); i++) {
		if (put_user(core_reg | i, uindices))
			return -EFAULT;
		uindices++;
	}

	ret = copy_timer_indices(vcpu, uindices);
	if (ret)
		return ret;
	uindices += NUM_TIMER_REGS;

	return kvm_arm_copy_sys_reg_indices(vcpu, uindices);
}

int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	/* We currently use nothing arch-specific in upper 32 bits */
	if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
		return -EINVAL;

	/* Register group 16 means we want a core register. */
	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
		return get_core_reg(vcpu, reg);

	if (is_timer_reg(reg->id))
		return get_timer_reg(vcpu, reg);

	return kvm_arm_sys_reg_get_reg(vcpu, reg);
}

int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	/* We currently use nothing arch-specific in upper 32 bits */
	if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
		return -EINVAL;

	/* Register group 16 means we set a core register. */
	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
		return set_core_reg(vcpu, reg);

	if (is_timer_reg(reg->id))
		return set_timer_reg(vcpu, reg);

	return kvm_arm_sys_reg_set_reg(vcpu, reg);
}

int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
				  struct kvm_sregs *sregs)
{
	return -EINVAL;
}

int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
				  struct kvm_sregs *sregs)
{
	return -EINVAL;
}

int __attribute_const__ kvm_target_cpu(void)
{
	unsigned long implementor = read_cpuid_implementor();
	unsigned long part_number = read_cpuid_part_number();

	switch (implementor) {
	case ARM_CPU_IMP_ARM:
		switch (part_number) {
		case ARM_CPU_PART_AEM_V8:
			return KVM_ARM_TARGET_AEM_V8;
		case ARM_CPU_PART_FOUNDATION:
			return KVM_ARM_TARGET_FOUNDATION_V8;
		case ARM_CPU_PART_CORTEX_A53:
			return KVM_ARM_TARGET_CORTEX_A53;
		case ARM_CPU_PART_CORTEX_A57:
			return KVM_ARM_TARGET_CORTEX_A57;
		};
		break;
	case ARM_CPU_IMP_APM:
		switch (part_number) {
		case APM_CPU_PART_POTENZA:
			return KVM_ARM_TARGET_XGENE_POTENZA;
		};
		break;
	};

	return -EINVAL;
}

int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
			const struct kvm_vcpu_init *init)
{
	unsigned int i;
	int phys_target = kvm_target_cpu();

	if (init->target != phys_target)
		return -EINVAL;

	vcpu->arch.target = phys_target;
	bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES);

	/* -ENOENT for unknown features, -EINVAL for invalid combinations. */
	for (i = 0; i < sizeof(init->features) * 8; i++) {
		if (init->features[i / 32] & (1 << (i % 32))) {
			if (i >= KVM_VCPU_MAX_FEATURES)
				return -ENOENT;
			set_bit(i, vcpu->arch.features);
		}
	}

	/* Now we know what it is, we can reset it. */
	return kvm_reset_vcpu(vcpu);
}

int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init)
{
	int target = kvm_target_cpu();

	if (target < 0)
		return -ENODEV;

	memset(init, 0, sizeof(*init));

	/*
	 * For now, we don't return any features.
	 * In future, we might use features to return target
	 * specific features available for the preferred
	 * target type.
	 */
	init->target = (__u32)target;

	return 0;
}

int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
{
	return -EINVAL;
}

int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
{
	return -EINVAL;
}

int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
				  struct kvm_translation *tr)
{
	return -EINVAL;
}
Commit	Line	Data
2f4a07c5 MZ	1	/*
	2	* Copyright (C) 2012,2013 - ARM Ltd
	3	* Author: Marc Zyngier <marc.zyngier@arm.com>
	4	*
	5	* Derived from arch/arm/kvm/guest.c:
	6	* Copyright (C) 2012 - Virtual Open Systems and Columbia University
	7	* Author: Christoffer Dall <c.dall@virtualopensystems.com>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
	22	#include <linux/errno.h>
	23	#include <linux/err.h>
	24	#include <linux/kvm_host.h>
	25	#include <linux/module.h>
	26	#include <linux/vmalloc.h>
	27	#include <linux/fs.h>
	28	#include <asm/cputype.h>
	29	#include <asm/uaccess.h>
	30	#include <asm/kvm.h>
	31	#include <asm/kvm_asm.h>
	32	#include <asm/kvm_emulate.h>
	33	#include <asm/kvm_coproc.h>
	34
	35	struct kvm_stats_debugfs_item debugfs_entries[] = {
	36	{ NULL }
	37	};
	38
	39	int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
	40	{
2f4a07c5 MZ	41	return 0;
	42	}
	43
	44	static u64 core_reg_offset_from_id(u64 id)
	45	{
	46	return id & ~(KVM_REG_ARCH_MASK \| KVM_REG_SIZE_MASK \| KVM_REG_ARM_CORE);
	47	}
	48
	49	static int get_core_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	50	{
	51	/*
	52	* Because the kvm_regs structure is a mix of 32, 64 and
	53	* 128bit fields, we index it as if it was a 32bit
	54	* array. Hence below, nr_regs is the number of entries, and
	55	* off the index in the "array".
	56	*/
	57	__u32 __user uaddr = (__u32 __user )(unsigned long)reg->addr;
	58	struct kvm_regs *regs = vcpu_gp_regs(vcpu);
	59	int nr_regs = sizeof(*regs) / sizeof(__u32);
	60	u32 off;
	61
	62	/* Our ID is an index into the kvm_regs struct. */
	63	off = core_reg_offset_from_id(reg->id);
	64	if (off >= nr_regs \|\|
	65	(off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
	66	return -ENOENT;
	67
	68	if (copy_to_user(uaddr, ((u32 *)regs) + off, KVM_REG_SIZE(reg->id)))
	69	return -EFAULT;
	70
	71	return 0;
	72	}
	73
	74	static int set_core_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	75	{
	76	__u32 __user uaddr = (__u32 __user )(unsigned long)reg->addr;
	77	struct kvm_regs *regs = vcpu_gp_regs(vcpu);
	78	int nr_regs = sizeof(*regs) / sizeof(__u32);
	79	__uint128_t tmp;
	80	void *valp = &tmp;
	81	u64 off;
	82	int err = 0;
	83
	84	/* Our ID is an index into the kvm_regs struct. */
	85	off = core_reg_offset_from_id(reg->id);
	86	if (off >= nr_regs \|\|
	87	(off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
	88	return -ENOENT;
	89
	90	if (KVM_REG_SIZE(reg->id) > sizeof(tmp))
	91	return -EINVAL;
	92
	93	if (copy_from_user(valp, uaddr, KVM_REG_SIZE(reg->id))) {
	94	err = -EFAULT;
	95	goto out;
	96	}
	97
	98	if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) {
	99	u32 mode = ((u32 )valp) & COMPAT_PSR_MODE_MASK;
	100	switch (mode) {
0d854a60 MZ	101	case COMPAT_PSR_MODE_USR:
	102	case COMPAT_PSR_MODE_FIQ:
	103	case COMPAT_PSR_MODE_IRQ:
	104	case COMPAT_PSR_MODE_SVC:
	105	case COMPAT_PSR_MODE_ABT:
	106	case COMPAT_PSR_MODE_UND:
2f4a07c5 MZ	107	case PSR_MODE_EL0t:
	108	case PSR_MODE_EL1t:
	109	case PSR_MODE_EL1h:
	110	break;
	111	default:
	112	err = -EINVAL;
	113	goto out;
	114	}
	115	}
	116
	117	memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id));
	118	out:
	119	return err;
	120	}
	121
	122	int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu vcpu, struct kvm_regs regs)
	123	{
	124	return -EINVAL;
	125	}
	126
	127	int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu vcpu, struct kvm_regs regs)
	128	{
	129	return -EINVAL;
	130	}
	131
	132	static unsigned long num_core_regs(void)
	133	{
	134	return sizeof(struct kvm_regs) / sizeof(__u32);
	135	}
	136
1df08ba0 AB	137	/**
	138	* ARM64 versions of the TIMER registers, always available on arm64
	139	*/
	140
	141	#define NUM_TIMER_REGS 3
	142
	143	static bool is_timer_reg(u64 index)
	144	{
	145	switch (index) {
	146	case KVM_REG_ARM_TIMER_CTL:
	147	case KVM_REG_ARM_TIMER_CNT:
	148	case KVM_REG_ARM_TIMER_CVAL:
	149	return true;
	150	}
	151	return false;
	152	}
	153
	154	static int copy_timer_indices(struct kvm_vcpu vcpu, u64 __user uindices)
	155	{
	156	if (put_user(KVM_REG_ARM_TIMER_CTL, uindices))
	157	return -EFAULT;
	158	uindices++;
	159	if (put_user(KVM_REG_ARM_TIMER_CNT, uindices))
	160	return -EFAULT;
	161	uindices++;
	162	if (put_user(KVM_REG_ARM_TIMER_CVAL, uindices))
	163	return -EFAULT;
	164
	165	return 0;
	166	}
	167
	168	static int set_timer_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	169	{
	170	void __user uaddr = (void __user )(long)reg->addr;
	171	u64 val;
	172	int ret;
	173
	174	ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id));
	175	if (ret != 0)
bd218bce	176	return -EFAULT;
1df08ba0 AB	177
	178	return kvm_arm_timer_set_reg(vcpu, reg->id, val);
	179	}
	180
	181	static int get_timer_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	182	{
	183	void __user uaddr = (void __user )(long)reg->addr;
	184	u64 val;
	185
	186	val = kvm_arm_timer_get_reg(vcpu, reg->id);
	187	return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id));
	188	}
	189
2f4a07c5 MZ	190	/**
	191	* kvm_arm_num_regs - how many registers do we present via KVM_GET_ONE_REG
	192	*
	193	* This is for all registers.
	194	*/
	195	unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
	196	{
1df08ba0 AB	197	return num_core_regs() + kvm_arm_num_sys_reg_descs(vcpu)
1df08ba0 AB	198	+ NUM_TIMER_REGS;
2f4a07c5 MZ	199	}
	200
	201	/**
	202	* kvm_arm_copy_reg_indices - get indices of all registers.
	203	*
	204	* We do core registers right here, then we apppend system regs.
	205	*/
	206	int kvm_arm_copy_reg_indices(struct kvm_vcpu vcpu, u64 __user uindices)
	207	{
	208	unsigned int i;
	209	const u64 core_reg = KVM_REG_ARM64 \| KVM_REG_SIZE_U64 \| KVM_REG_ARM_CORE;
1df08ba0	210	int ret;
2f4a07c5 MZ	211
	212	for (i = 0; i < sizeof(struct kvm_regs) / sizeof(__u32); i++) {
	213	if (put_user(core_reg \| i, uindices))
	214	return -EFAULT;
	215	uindices++;
	216	}
	217
1df08ba0 AB	218	ret = copy_timer_indices(vcpu, uindices);
	219	if (ret)
	220	return ret;
	221	uindices += NUM_TIMER_REGS;
	222
2f4a07c5 MZ	223	return kvm_arm_copy_sys_reg_indices(vcpu, uindices);
	224	}
	225
	226	int kvm_arm_get_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	227	{
	228	/* We currently use nothing arch-specific in upper 32 bits */
	229	if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
	230	return -EINVAL;
	231
	232	/* Register group 16 means we want a core register. */
	233	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
	234	return get_core_reg(vcpu, reg);
	235
1df08ba0 AB	236	if (is_timer_reg(reg->id))
	237	return get_timer_reg(vcpu, reg);
	238
2f4a07c5 MZ	239	return kvm_arm_sys_reg_get_reg(vcpu, reg);
	240	}
	241
	242	int kvm_arm_set_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	243	{
	244	/* We currently use nothing arch-specific in upper 32 bits */
	245	if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
	246	return -EINVAL;
	247
	248	/* Register group 16 means we set a core register. */
	249	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
	250	return set_core_reg(vcpu, reg);
	251
1df08ba0 AB	252	if (is_timer_reg(reg->id))
	253	return set_timer_reg(vcpu, reg);
	254
2f4a07c5 MZ	255	return kvm_arm_sys_reg_set_reg(vcpu, reg);
	256	}
	257
	258	int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
	259	struct kvm_sregs *sregs)
	260	{
	261	return -EINVAL;
	262	}
	263
	264	int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
	265	struct kvm_sregs *sregs)
	266	{
	267	return -EINVAL;
	268	}
	269
	270	int __attribute_const__ kvm_target_cpu(void)
	271	{
	272	unsigned long implementor = read_cpuid_implementor();
	273	unsigned long part_number = read_cpuid_part_number();
	274
e28100bd AP	275	switch (implementor) {
	276	case ARM_CPU_IMP_ARM:
	277	switch (part_number) {
	278	case ARM_CPU_PART_AEM_V8:
	279	return KVM_ARM_TARGET_AEM_V8;
	280	case ARM_CPU_PART_FOUNDATION:
	281	return KVM_ARM_TARGET_FOUNDATION_V8;
1252b331 MZ	282	case ARM_CPU_PART_CORTEX_A53:
1252b331 MZ	283	return KVM_ARM_TARGET_CORTEX_A53;
e28100bd AP	284	case ARM_CPU_PART_CORTEX_A57:
	285	return KVM_ARM_TARGET_CORTEX_A57;
	286	};
	287	break;
	288	case ARM_CPU_IMP_APM:
	289	switch (part_number) {
	290	case APM_CPU_PART_POTENZA:
	291	return KVM_ARM_TARGET_XGENE_POTENZA;
	292	};
	293	break;
	294	};
2f4a07c5	295
e28100bd	296	return -EINVAL;
2f4a07c5 MZ	297	}
	298
	299	int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
	300	const struct kvm_vcpu_init *init)
	301	{
	302	unsigned int i;
	303	int phys_target = kvm_target_cpu();
	304
	305	if (init->target != phys_target)
	306	return -EINVAL;
	307
	308	vcpu->arch.target = phys_target;
	309	bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES);
	310
	311	/* -ENOENT for unknown features, -EINVAL for invalid combinations. */
	312	for (i = 0; i < sizeof(init->features) * 8; i++) {
	313	if (init->features[i / 32] & (1 << (i % 32))) {
	314	if (i >= KVM_VCPU_MAX_FEATURES)
	315	return -ENOENT;
	316	set_bit(i, vcpu->arch.features);
	317	}
	318	}
	319
	320	/* Now we know what it is, we can reset it. */
	321	return kvm_reset_vcpu(vcpu);
	322	}
	323
473bdc0e AP	324	int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init)
	325	{
	326	int target = kvm_target_cpu();
	327
	328	if (target < 0)
	329	return -ENODEV;
	330
	331	memset(init, 0, sizeof(*init));
	332
	333	/*
	334	* For now, we don't return any features.
	335	* In future, we might use features to return target
	336	* specific features available for the preferred
	337	* target type.
	338	*/
	339	init->target = (__u32)target;
	340
	341	return 0;
	342	}
	343
2f4a07c5 MZ	344	int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu vcpu, struct kvm_fpu fpu)
	345	{
	346	return -EINVAL;
	347	}
	348
	349	int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu vcpu, struct kvm_fpu fpu)
	350	{
	351	return -EINVAL;
	352	}
	353
	354	int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
	355	struct kvm_translation *tr)
	356	{
	357	return -EINVAL;
	358	}