projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 5eec0a91 MZ |
1 | /* |
| 2 | * Copyright (C) 2015 - ARM Ltd | |
| 3 | * Author: Marc Zyngier <marc.zyngier@arm.com> | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or modify | |
| 6 | * it under the terms of the GNU General Public License version 2 as | |
| 7 | * published by the Free Software Foundation. | |
| 8 | * | |
| 9 | * This program is distributed in the hope that it will be useful, | |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 12 | * GNU General Public License for more details. | |
| 13 | * | |
| 14 | * You should have received a copy of the GNU General Public License | |
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
| 16 | */ | |
| 17 | ||
| 13720a56 | 18 | #include <asm/kvm_hyp.h> |
| 5eec0a91 | 19 | |
| 3ffa75cd | 20 | static void __hyp_text __tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) |
| 5eec0a91 MZ |
21 | { |
| 22 | dsb(ishst); | |
| 23 | ||
| 24 | /* Switch to requested VMID */ | |
| 25 | kvm = kern_hyp_va(kvm); | |
| 26 | write_sysreg(kvm->arch.vttbr, vttbr_el2); | |
| 27 | isb(); | |
| 28 | ||
| 29 | /* | |
| 30 | * We could do so much better if we had the VA as well. | |
| 31 | * Instead, we invalidate Stage-2 for this IPA, and the | |
| 32 | * whole of Stage-1. Weep... | |
| 33 | */ | |
| 34 | ipa >>= 12; | |
| 35 | asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa)); | |
| 36 | ||
| 37 | /* | |
| 38 | * We have to ensure completion of the invalidation at Stage-2, | |
| 39 | * since a table walk on another CPU could refill a TLB with a | |
| 40 | * complete (S1 + S2) walk based on the old Stage-2 mapping if | |
| 41 | * the Stage-1 invalidation happened first. | |
| 42 | */ | |
| 43 | dsb(ish); | |
| 44 | asm volatile("tlbi vmalle1is" : : ); | |
| 45 | dsb(ish); | |
| 46 | isb(); | |
| 47 | ||
| 48 | write_sysreg(0, vttbr_el2); | |
| 49 | } | |
| 50 | ||
| 3ffa75cd MZ |
51 | __alias(__tlb_flush_vmid_ipa) void __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, |
| 52 | phys_addr_t ipa); | |
| 044ac37d | 53 | |
| 3ffa75cd | 54 | static void __hyp_text __tlb_flush_vmid(struct kvm *kvm) |
| 5eec0a91 MZ |
55 | { |
| 56 | dsb(ishst); | |
| 57 | ||
| 58 | /* Switch to requested VMID */ | |
| 59 | kvm = kern_hyp_va(kvm); | |
| 60 | write_sysreg(kvm->arch.vttbr, vttbr_el2); | |
| 61 | isb(); | |
| 62 | ||
| 63 | asm volatile("tlbi vmalls12e1is" : : ); | |
| 64 | dsb(ish); | |
| 65 | isb(); | |
| 66 | ||
| 67 | write_sysreg(0, vttbr_el2); | |
| 68 | } | |
| 69 | ||
| 3ffa75cd | 70 | __alias(__tlb_flush_vmid) void __kvm_tlb_flush_vmid(struct kvm *kvm); |
| 044ac37d | 71 | |
| 3ffa75cd | 72 | static void __hyp_text __tlb_flush_vm_context(void) |
| 5eec0a91 MZ |
73 | { |
| 74 | dsb(ishst); | |
| 75 | asm volatile("tlbi alle1is \n" | |
| 76 | "ic ialluis ": : ); | |
| 77 | dsb(ish); | |
| 78 | } | |
| 044ac37d | 79 | |
| 3ffa75cd | 80 | __alias(__tlb_flush_vm_context) void __kvm_flush_vm_context(void); |