[MIPS] IP22: fix wrong argument order
[deliverable/linux.git] / arch / mips / mm / init.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 2000 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
10 */
1da177e4
LT
11#include <linux/init.h>
12#include <linux/module.h>
13#include <linux/signal.h>
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/string.h>
18#include <linux/types.h>
19#include <linux/pagemap.h>
20#include <linux/ptrace.h>
21#include <linux/mman.h>
22#include <linux/mm.h>
23#include <linux/bootmem.h>
24#include <linux/highmem.h>
25#include <linux/swap.h>
3d503753 26#include <linux/proc_fs.h>
22a9835c 27#include <linux/pfn.h>
1da177e4 28
9975e77d 29#include <asm/asm-offsets.h>
1da177e4
LT
30#include <asm/bootinfo.h>
31#include <asm/cachectl.h>
32#include <asm/cpu.h>
33#include <asm/dma.h>
f8829cae 34#include <asm/kmap_types.h>
1da177e4
LT
35#include <asm/mmu_context.h>
36#include <asm/sections.h>
37#include <asm/pgtable.h>
38#include <asm/pgalloc.h>
39#include <asm/tlb.h>
f8829cae
RB
40#include <asm/fixmap.h>
41
42/* Atomicity and interruptability */
43#ifdef CONFIG_MIPS_MT_SMTC
44
45#include <asm/mipsmtregs.h>
46
47#define ENTER_CRITICAL(flags) \
48 { \
49 unsigned int mvpflags; \
50 local_irq_save(flags);\
51 mvpflags = dvpe()
52#define EXIT_CRITICAL(flags) \
53 evpe(mvpflags); \
54 local_irq_restore(flags); \
55 }
56#else
57
58#define ENTER_CRITICAL(flags) local_irq_save(flags)
59#define EXIT_CRITICAL(flags) local_irq_restore(flags)
60
61#endif /* CONFIG_MIPS_MT_SMTC */
1da177e4
LT
62
63DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
64
1da177e4
LT
65/*
66 * We have up to 8 empty zeroed pages so we can map one of the right colour
67 * when needed. This is necessary only on R4000 / R4400 SC and MC versions
68 * where we have to avoid VCED / VECI exceptions for good performance at
69 * any price. Since page is never written to after the initialization we
70 * don't have to care about aliases on other CPUs.
71 */
72unsigned long empty_zero_page, zero_page_mask;
73
74/*
75 * Not static inline because used by IP27 special magic initialization code
76 */
77unsigned long setup_zero_pages(void)
78{
8dfcc9ba
NP
79 unsigned int order;
80 unsigned long size;
1da177e4
LT
81 struct page *page;
82
83 if (cpu_has_vce)
84 order = 3;
85 else
86 order = 0;
87
88 empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
89 if (!empty_zero_page)
90 panic("Oh boy, that early out of memory?");
91
99e3b942 92 page = virt_to_page((void *)empty_zero_page);
8dfcc9ba 93 split_page(page, order);
99e3b942 94 while (page < virt_to_page((void *)(empty_zero_page + (PAGE_SIZE << order)))) {
68352e6e 95 SetPageReserved(page);
1da177e4
LT
96 page++;
97 }
98
99 size = PAGE_SIZE << order;
100 zero_page_mask = (size - 1) & PAGE_MASK;
101
102 return 1UL << order;
103}
104
f8829cae
RB
105/*
106 * These are almost like kmap_atomic / kunmap_atmic except they take an
107 * additional address argument as the hint.
108 */
1da177e4
LT
109
110#define kmap_get_fixmap_pte(vaddr) \
c6e8b587 111 pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
1da177e4 112
f8829cae
RB
113#ifdef CONFIG_MIPS_MT_SMTC
114static pte_t *kmap_coherent_pte;
115static void __init kmap_coherent_init(void)
116{
117 unsigned long vaddr;
118
119 /* cache the first coherent kmap pte */
120 vaddr = __fix_to_virt(FIX_CMAP_BEGIN);
121 kmap_coherent_pte = kmap_get_fixmap_pte(vaddr);
122}
123#else
124static inline void kmap_coherent_init(void) {}
125#endif
126
7575a49f 127void *kmap_coherent(struct page *page, unsigned long addr)
f8829cae
RB
128{
129 enum fixed_addresses idx;
130 unsigned long vaddr, flags, entrylo;
131 unsigned long old_ctx;
132 pte_t pte;
133 int tlbidx;
134
135 inc_preempt_count();
136 idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
137#ifdef CONFIG_MIPS_MT_SMTC
138 idx += FIX_N_COLOURS * smp_processor_id();
139#endif
140 vaddr = __fix_to_virt(FIX_CMAP_END - idx);
141 pte = mk_pte(page, PAGE_KERNEL);
142#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
143 entrylo = pte.pte_high;
144#else
145 entrylo = pte_val(pte) >> 6;
146#endif
147
148 ENTER_CRITICAL(flags);
149 old_ctx = read_c0_entryhi();
150 write_c0_entryhi(vaddr & (PAGE_MASK << 1));
151 write_c0_entrylo0(entrylo);
152 write_c0_entrylo1(entrylo);
153#ifdef CONFIG_MIPS_MT_SMTC
154 set_pte(kmap_coherent_pte - (FIX_CMAP_END - idx), pte);
155 /* preload TLB instead of local_flush_tlb_one() */
156 mtc0_tlbw_hazard();
157 tlb_probe();
158 tlb_probe_hazard();
159 tlbidx = read_c0_index();
160 mtc0_tlbw_hazard();
161 if (tlbidx < 0)
162 tlb_write_random();
163 else
164 tlb_write_indexed();
165#else
166 tlbidx = read_c0_wired();
167 write_c0_wired(tlbidx + 1);
168 write_c0_index(tlbidx);
169 mtc0_tlbw_hazard();
170 tlb_write_indexed();
171#endif
172 tlbw_use_hazard();
173 write_c0_entryhi(old_ctx);
174 EXIT_CRITICAL(flags);
175
176 return (void*) vaddr;
177}
178
179#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
180
eacb9d61 181void kunmap_coherent(void)
f8829cae
RB
182{
183#ifndef CONFIG_MIPS_MT_SMTC
184 unsigned int wired;
185 unsigned long flags, old_ctx;
186
187 ENTER_CRITICAL(flags);
188 old_ctx = read_c0_entryhi();
189 wired = read_c0_wired() - 1;
190 write_c0_wired(wired);
191 write_c0_index(wired);
192 write_c0_entryhi(UNIQUE_ENTRYHI(wired));
193 write_c0_entrylo0(0);
194 write_c0_entrylo1(0);
195 mtc0_tlbw_hazard();
196 tlb_write_indexed();
197 tlbw_use_hazard();
198 write_c0_entryhi(old_ctx);
199 EXIT_CRITICAL(flags);
200#endif
201 dec_preempt_count();
202 preempt_check_resched();
203}
204
bcd02280
AN
205void copy_user_highpage(struct page *to, struct page *from,
206 unsigned long vaddr, struct vm_area_struct *vma)
207{
208 void *vfrom, *vto;
209
210 vto = kmap_atomic(to, KM_USER1);
211 if (cpu_has_dc_aliases) {
212 vfrom = kmap_coherent(from, vaddr);
213 copy_page(vto, vfrom);
eacb9d61 214 kunmap_coherent();
bcd02280
AN
215 } else {
216 vfrom = kmap_atomic(from, KM_USER0);
217 copy_page(vto, vfrom);
218 kunmap_atomic(vfrom, KM_USER0);
219 }
220 if (((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc) ||
221 pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
222 flush_data_cache_page((unsigned long)vto);
223 kunmap_atomic(vto, KM_USER1);
224 /* Make sure this page is cleared on other CPU's too before using it */
225 smp_wmb();
226}
227
228EXPORT_SYMBOL(copy_user_highpage);
229
f8829cae
RB
230void copy_to_user_page(struct vm_area_struct *vma,
231 struct page *page, unsigned long vaddr, void *dst, const void *src,
232 unsigned long len)
233{
234 if (cpu_has_dc_aliases) {
235 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
236 memcpy(vto, src, len);
eacb9d61 237 kunmap_coherent();
f8829cae
RB
238 } else
239 memcpy(dst, src, len);
240 if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc)
241 flush_cache_page(vma, vaddr, page_to_pfn(page));
242}
243
244EXPORT_SYMBOL(copy_to_user_page);
245
246void copy_from_user_page(struct vm_area_struct *vma,
247 struct page *page, unsigned long vaddr, void *dst, const void *src,
248 unsigned long len)
249{
250 if (cpu_has_dc_aliases) {
251 void *vfrom =
252 kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
253 memcpy(dst, vfrom, len);
eacb9d61 254 kunmap_coherent();
f8829cae
RB
255 } else
256 memcpy(dst, src, len);
257}
258
259EXPORT_SYMBOL(copy_from_user_page);
260
261
262#ifdef CONFIG_HIGHMEM
bf15f767
RB
263unsigned long highstart_pfn, highend_pfn;
264
f8829cae
RB
265pte_t *kmap_pte;
266pgprot_t kmap_prot;
267
1da177e4
LT
268static void __init kmap_init(void)
269{
270 unsigned long kmap_vstart;
271
272 /* cache the first kmap pte */
273 kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
274 kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
275
276 kmap_prot = PAGE_KERNEL;
277}
f8829cae 278#endif /* CONFIG_HIGHMEM */
1da177e4 279
84fd089a 280void __init fixrange_init(unsigned long start, unsigned long end,
1da177e4
LT
281 pgd_t *pgd_base)
282{
f8829cae 283#if defined(CONFIG_HIGHMEM) || defined(CONFIG_MIPS_MT_SMTC)
1da177e4 284 pgd_t *pgd;
c6e8b587 285 pud_t *pud;
1da177e4
LT
286 pmd_t *pmd;
287 pte_t *pte;
c6e8b587 288 int i, j, k;
1da177e4
LT
289 unsigned long vaddr;
290
291 vaddr = start;
292 i = __pgd_offset(vaddr);
c6e8b587
RB
293 j = __pud_offset(vaddr);
294 k = __pmd_offset(vaddr);
1da177e4
LT
295 pgd = pgd_base + i;
296
297 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
c6e8b587
RB
298 pud = (pud_t *)pgd;
299 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) {
300 pmd = (pmd_t *)pud;
301 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) {
302 if (pmd_none(*pmd)) {
303 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
f8829cae 304 set_pmd(pmd, __pmd((unsigned long)pte));
c6e8b587
RB
305 if (pte != pte_offset_kernel(pmd, 0))
306 BUG();
307 }
308 vaddr += PMD_SIZE;
1da177e4 309 }
c6e8b587 310 k = 0;
1da177e4
LT
311 }
312 j = 0;
313 }
f8829cae 314#endif
1da177e4 315}
1da177e4 316
b4819b59 317#ifndef CONFIG_NEED_MULTIPLE_NODES
565200a1
AN
318static int __init page_is_ram(unsigned long pagenr)
319{
320 int i;
321
322 for (i = 0; i < boot_mem_map.nr_map; i++) {
323 unsigned long addr, end;
324
325 if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
326 /* not usable memory */
327 continue;
328
329 addr = PFN_UP(boot_mem_map.map[i].addr);
330 end = PFN_DOWN(boot_mem_map.map[i].addr +
331 boot_mem_map.map[i].size);
332
333 if (pagenr >= addr && pagenr < end)
334 return 1;
335 }
336
337 return 0;
338}
339
1da177e4
LT
340void __init paging_init(void)
341{
b58e5d05 342 unsigned long zones_size[MAX_NR_ZONES] = { 0, };
565200a1 343#ifndef CONFIG_FLATMEM
b58e5d05 344 unsigned long zholes_size[MAX_NR_ZONES] = { 0, };
565200a1
AN
345 unsigned long i, j, pfn;
346#endif
1da177e4
LT
347
348 pagetable_init();
349
350#ifdef CONFIG_HIGHMEM
351 kmap_init();
352#endif
f8829cae 353 kmap_coherent_init();
1da177e4 354
05502339
AN
355#ifdef CONFIG_ZONE_DMA
356 if (min_low_pfn < MAX_DMA_PFN && MAX_DMA_PFN <= max_low_pfn) {
357 zones_size[ZONE_DMA] = MAX_DMA_PFN - min_low_pfn;
358 zones_size[ZONE_NORMAL] = max_low_pfn - MAX_DMA_PFN;
359 } else if (max_low_pfn < MAX_DMA_PFN)
360 zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn;
db84dc61 361 else
1da177e4 362#endif
05502339 363 zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn;
db84dc61 364
1da177e4 365#ifdef CONFIG_HIGHMEM
cbb8fc07
FBH
366 zones_size[ZONE_HIGHMEM] = highend_pfn - highstart_pfn;
367
368 if (cpu_has_dc_aliases && zones_size[ZONE_HIGHMEM]) {
369 printk(KERN_WARNING "This processor doesn't support highmem."
370 " %ldk highmem ignored\n", zones_size[ZONE_HIGHMEM]);
371 zones_size[ZONE_HIGHMEM] = 0;
372 }
1da177e4
LT
373#endif
374
565200a1 375#ifdef CONFIG_FLATMEM
1da177e4 376 free_area_init(zones_size);
565200a1 377#else
80e89593 378 pfn = min_low_pfn;
565200a1
AN
379 for (i = 0; i < MAX_NR_ZONES; i++)
380 for (j = 0; j < zones_size[i]; j++, pfn++)
381 if (!page_is_ram(pfn))
382 zholes_size[i]++;
383 free_area_init_node(0, NODE_DATA(0), zones_size, 0, zholes_size);
384#endif
1da177e4
LT
385}
386
3d503753
DJ
387static struct kcore_list kcore_mem, kcore_vmalloc;
388#ifdef CONFIG_64BIT
389static struct kcore_list kcore_kseg0;
390#endif
391
1da177e4
LT
392void __init mem_init(void)
393{
394 unsigned long codesize, reservedpages, datasize, initsize;
395 unsigned long tmp, ram;
396
397#ifdef CONFIG_HIGHMEM
398#ifdef CONFIG_DISCONTIGMEM
399#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
400#endif
565200a1 401 max_mapnr = highend_pfn;
1da177e4 402#else
565200a1 403 max_mapnr = max_low_pfn;
1da177e4
LT
404#endif
405 high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
406
407 totalram_pages += free_all_bootmem();
408 totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
409
410 reservedpages = ram = 0;
411 for (tmp = 0; tmp < max_low_pfn; tmp++)
412 if (page_is_ram(tmp)) {
413 ram++;
b1c231f5 414 if (PageReserved(pfn_to_page(tmp)))
1da177e4
LT
415 reservedpages++;
416 }
565200a1 417 num_physpages = ram;
1da177e4
LT
418
419#ifdef CONFIG_HIGHMEM
420 for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
421 struct page *page = mem_map + tmp;
422
423 if (!page_is_ram(tmp)) {
424 SetPageReserved(page);
425 continue;
426 }
427 ClearPageReserved(page);
7835e98b 428 init_page_count(page);
1da177e4
LT
429 __free_page(page);
430 totalhigh_pages++;
431 }
432 totalram_pages += totalhigh_pages;
565200a1 433 num_physpages += totalhigh_pages;
1da177e4
LT
434#endif
435
436 codesize = (unsigned long) &_etext - (unsigned long) &_text;
437 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
438 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
439
3d503753
DJ
440#ifdef CONFIG_64BIT
441 if ((unsigned long) &_text > (unsigned long) CKSEG0)
442 /* The -4 is a hack so that user tools don't have to handle
443 the overflow. */
444 kclist_add(&kcore_kseg0, (void *) CKSEG0, 0x80000000 - 4);
445#endif
446 kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
447 kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
448 VMALLOC_END-VMALLOC_START);
449
1da177e4
LT
450 printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
451 "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
452 (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
453 ram << (PAGE_SHIFT-10),
454 codesize >> 10,
455 reservedpages << (PAGE_SHIFT-10),
456 datasize >> 10,
457 initsize >> 10,
458 (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
459}
b4819b59 460#endif /* !CONFIG_NEED_MULTIPLE_NODES */
1da177e4 461
c44e8d5e 462void free_init_pages(const char *what, unsigned long begin, unsigned long end)
6fd11a21 463{
acd86b86 464 unsigned long pfn;
6fd11a21 465
acd86b86
FBH
466 for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
467 struct page *page = pfn_to_page(pfn);
468 void *addr = phys_to_virt(PFN_PHYS(pfn));
469
470 ClearPageReserved(page);
471 init_page_count(page);
472 memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
473 __free_page(page);
6fd11a21
RB
474 totalram_pages++;
475 }
476 printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
477}
478
1da177e4
LT
479#ifdef CONFIG_BLK_DEV_INITRD
480void free_initrd_mem(unsigned long start, unsigned long end)
481{
acd86b86
FBH
482 free_init_pages("initrd memory",
483 virt_to_phys((void *)start),
484 virt_to_phys((void *)end));
1da177e4
LT
485}
486#endif
487
fb4bb133 488void __init_refok free_initmem(void)
1da177e4 489{
c44e8d5e 490 prom_free_prom_memory();
acd86b86
FBH
491 free_init_pages("unused kernel memory",
492 __pa_symbol(&__init_begin),
493 __pa_symbol(&__init_end));
1da177e4 494}
69a6c312
AN
495
496unsigned long pgd_current[NR_CPUS];
497/*
498 * On 64-bit we've got three-level pagetables with a slightly
499 * different layout ...
500 */
501#define __page_aligned(order) __attribute__((__aligned__(PAGE_SIZE<<order)))
9975e77d
RB
502
503/*
504 * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER
505 * are constants. So we use the variants from asm-offset.h until that gcc
506 * will officially be retired.
507 */
508pgd_t swapper_pg_dir[_PTRS_PER_PGD] __page_aligned(_PGD_ORDER);
69a6c312
AN
509#ifdef CONFIG_64BIT
510#ifdef MODULE_START
511pgd_t module_pg_dir[PTRS_PER_PGD] __page_aligned(PGD_ORDER);
512#endif
513pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER);
514#endif
515pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER);
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