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KVM: PPC: Book3S PR: Expose EBB registers
[deliverable/linux.git] / arch / powerpc / kvm / book3s_emulate.c
CommitLineData
c215c6e4
AG		 1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20#include <asm/kvm_ppc.h>
21#include <asm/disassemble.h>
22#include <asm/kvm_book3s.h>
23#include <asm/reg.h>
95327d08 24#include <asm/switch_to.h>
b0a94d4e 25#include <asm/time.h>
c215c6e4
AG		 26
27#define OP_19_XOP_RFID 18
28#define OP_19_XOP_RFI 50
29
30#define OP_31_XOP_MFMSR 83
31#define OP_31_XOP_MTMSR 146
32#define OP_31_XOP_MTMSRD 178
71db4089 33#define OP_31_XOP_MTSR 210
c215c6e4
AG		 34#define OP_31_XOP_MTSRIN 242
35#define OP_31_XOP_TLBIEL 274
36#define OP_31_XOP_TLBIE 306
50c7bb80
AG		 37/* Opcode is officially reserved, reuse it as sc 1 when sc 1 doesn't trap */
38#define OP_31_XOP_FAKE_SC1 308
c215c6e4
AG		 39#define OP_31_XOP_SLBMTE 402
40#define OP_31_XOP_SLBIE 434
41#define OP_31_XOP_SLBIA 498
c664876c 42#define OP_31_XOP_MFSR 595
c215c6e4 43#define OP_31_XOP_MFSRIN 659
bd7cdbb7 44#define OP_31_XOP_DCBA 758
c215c6e4
AG		 45#define OP_31_XOP_SLBMFEV 851
46#define OP_31_XOP_EIOIO 854
47#define OP_31_XOP_SLBMFEE 915
48
49/* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
50#define OP_31_XOP_DCBZ 1010
51
ca7f4203
AG		 52#define OP_LFS 48
53#define OP_LFD 50
54#define OP_STFS 52
55#define OP_STFD 54
56
d6d549b2
AG		 57#define SPRN_GQR0 912
58#define SPRN_GQR1 913
59#define SPRN_GQR2 914
60#define SPRN_GQR3 915
61#define SPRN_GQR4 916
62#define SPRN_GQR5 917
63#define SPRN_GQR6 918
64#define SPRN_GQR7 919
65
07b0907d
AG		 66/* Book3S_32 defines mfsrin(v) - but that messes up our abstract
67 * function pointers, so let's just disable the define. */
68#undef mfsrin
69
317a8fa3
AG		 70enum priv_level {
71 PRIV_PROBLEM = 0,
72 PRIV_SUPER = 1,
73 PRIV_HYPER = 2,
74};
75
76static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level)
77{
78 /* PAPR VMs only access supervisor SPRs */
79 if (vcpu->arch.papr_enabled && (level > PRIV_SUPER))
80 return false;
81
82 /* Limit user space to its own small SPR set */
5deb8e7a 83 if ((kvmppc_get_msr(vcpu) & MSR_PR) && level > PRIV_PROBLEM)
317a8fa3
AG		 84 return false;
85
86 return true;
87}
88
3a167bea
AK		 89int kvmppc_core_emulate_op_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
90 unsigned int inst, int *advance)
c215c6e4
AG		 91{
92 int emulated = EMULATE_DONE;
c46dc9a8
AG		 93 int rt = get_rt(inst);
94 int rs = get_rs(inst);
95 int ra = get_ra(inst);
96 int rb = get_rb(inst);
c215c6e4
AG		 97
98 switch (get_op(inst)) {
99 case 19:
100 switch (get_xop(inst)) {
101 case OP_19_XOP_RFID:
102 case OP_19_XOP_RFI:
5deb8e7a
AG		 103 kvmppc_set_pc(vcpu, kvmppc_get_srr0(vcpu));
104 kvmppc_set_msr(vcpu, kvmppc_get_srr1(vcpu));
c215c6e4
AG		 105 *advance = 0;
106 break;
107
108 default:
109 emulated = EMULATE_FAIL;
110 break;
111 }
112 break;
113 case 31:
114 switch (get_xop(inst)) {
115 case OP_31_XOP_MFMSR:
5deb8e7a 116 kvmppc_set_gpr(vcpu, rt, kvmppc_get_msr(vcpu));
c215c6e4
AG		 117 break;
118 case OP_31_XOP_MTMSRD:
119 {
c46dc9a8 120 ulong rs_val = kvmppc_get_gpr(vcpu, rs);
c215c6e4 121 if (inst & 0x10000) {
5deb8e7a 122 ulong new_msr = kvmppc_get_msr(vcpu);
c46dc9a8
AG		 123 new_msr &= ~(MSR_RI | MSR_EE);
124 new_msr |= rs_val & (MSR_RI | MSR_EE);
5deb8e7a 125 kvmppc_set_msr_fast(vcpu, new_msr);
c215c6e4 126 } else
c46dc9a8 127 kvmppc_set_msr(vcpu, rs_val);
c215c6e4
AG		 128 break;
129 }
130 case OP_31_XOP_MTMSR:
c46dc9a8 131 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));
c215c6e4 132 break;
c664876c
AG		 133 case OP_31_XOP_MFSR:
134 {
135 int srnum;
136
137 srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
138 if (vcpu->arch.mmu.mfsrin) {
139 u32 sr;
140 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
c46dc9a8 141 kvmppc_set_gpr(vcpu, rt, sr);
c664876c
AG		 142 }
143 break;
144 }
c215c6e4
AG		 145 case OP_31_XOP_MFSRIN:
146 {
147 int srnum;
148
c46dc9a8 149 srnum = (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf;
c215c6e4
AG		 150 if (vcpu->arch.mmu.mfsrin) {
151 u32 sr;
152 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
c46dc9a8 153 kvmppc_set_gpr(vcpu, rt, sr);
c215c6e4
AG		 154 }
155 break;
156 }
71db4089
AG		 157 case OP_31_XOP_MTSR:
158 vcpu->arch.mmu.mtsrin(vcpu,
159 (inst >> 16) & 0xf,
c46dc9a8 160 kvmppc_get_gpr(vcpu, rs));
71db4089 161 break;
c215c6e4
AG		 162 case OP_31_XOP_MTSRIN:
163 vcpu->arch.mmu.mtsrin(vcpu,
c46dc9a8
AG		 164 (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf,
165 kvmppc_get_gpr(vcpu, rs));
c215c6e4
AG		 166 break;
167 case OP_31_XOP_TLBIE:
168 case OP_31_XOP_TLBIEL:
169 {
170 bool large = (inst & 0x00200000) ? true : false;
c46dc9a8 171 ulong addr = kvmppc_get_gpr(vcpu, rb);
c215c6e4
AG		 172 vcpu->arch.mmu.tlbie(vcpu, addr, large);
173 break;
174 }
2ba9f0d8 175#ifdef CONFIG_PPC_BOOK3S_64
50c7bb80
AG		 176 case OP_31_XOP_FAKE_SC1:
177 {
178 /* SC 1 papr hypercalls */
179 ulong cmd = kvmppc_get_gpr(vcpu, 3);
180 int i;
181
5deb8e7a 182 if ((kvmppc_get_msr(vcpu) & MSR_PR) ||
50c7bb80
AG		 183 !vcpu->arch.papr_enabled) {
184 emulated = EMULATE_FAIL;
185 break;
186 }
187
188 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE)
189 break;
190
191 run->papr_hcall.nr = cmd;
192 for (i = 0; i < 9; ++i) {
193 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
194 run->papr_hcall.args[i] = gpr;
195 }
196
0f47f9b5
BB		 197 run->exit_reason = KVM_EXIT_PAPR_HCALL;
198 vcpu->arch.hcall_needed = 1;
c402a3f4 199 emulated = EMULATE_EXIT_USER;
50c7bb80
AG		 200 break;
201 }
202#endif
c215c6e4
AG		 203 case OP_31_XOP_EIOIO:
204 break;
205 case OP_31_XOP_SLBMTE:
206 if (!vcpu->arch.mmu.slbmte)
207 return EMULATE_FAIL;
208
8e5b26b5 209 vcpu->arch.mmu.slbmte(vcpu,
c46dc9a8
AG		 210 kvmppc_get_gpr(vcpu, rs),
211 kvmppc_get_gpr(vcpu, rb));
c215c6e4
AG		 212 break;
213 case OP_31_XOP_SLBIE:
214 if (!vcpu->arch.mmu.slbie)
215 return EMULATE_FAIL;
216
8e5b26b5 217 vcpu->arch.mmu.slbie(vcpu,
c46dc9a8 218 kvmppc_get_gpr(vcpu, rb));
c215c6e4
AG		 219 break;
220 case OP_31_XOP_SLBIA:
221 if (!vcpu->arch.mmu.slbia)
222 return EMULATE_FAIL;
223
224 vcpu->arch.mmu.slbia(vcpu);
225 break;
226 case OP_31_XOP_SLBMFEE:
227 if (!vcpu->arch.mmu.slbmfee) {
228 emulated = EMULATE_FAIL;
229 } else {
c46dc9a8 230 ulong t, rb_val;
c215c6e4 231
c46dc9a8
AG		 232 rb_val = kvmppc_get_gpr(vcpu, rb);
233 t = vcpu->arch.mmu.slbmfee(vcpu, rb_val);
234 kvmppc_set_gpr(vcpu, rt, t);
c215c6e4
AG		 235 }
236 break;
237 case OP_31_XOP_SLBMFEV:
238 if (!vcpu->arch.mmu.slbmfev) {
239 emulated = EMULATE_FAIL;
240 } else {
c46dc9a8 241 ulong t, rb_val;
c215c6e4 242
c46dc9a8
AG		 243 rb_val = kvmppc_get_gpr(vcpu, rb);
244 t = vcpu->arch.mmu.slbmfev(vcpu, rb_val);
245 kvmppc_set_gpr(vcpu, rt, t);
c215c6e4
AG		 246 }
247 break;
bd7cdbb7
AG		 248 case OP_31_XOP_DCBA:
249 /* Gets treated as NOP */
250 break;
c215c6e4
AG		 251 case OP_31_XOP_DCBZ:
252 {
c46dc9a8
AG		 253 ulong rb_val = kvmppc_get_gpr(vcpu, rb);
254 ulong ra_val = 0;
5467a97d 255 ulong addr, vaddr;
c215c6e4 256 u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
9fb244a2
AG		 257 u32 dsisr;
258 int r;
c215c6e4 259
c46dc9a8
AG		 260 if (ra)
261 ra_val = kvmppc_get_gpr(vcpu, ra);
c215c6e4 262
c46dc9a8 263 addr = (ra_val + rb_val) & ~31ULL;
5deb8e7a 264 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
c215c6e4 265 addr &= 0xffffffff;
5467a97d 266 vaddr = addr;
c215c6e4 267
9fb244a2
AG		 268 r = kvmppc_st(vcpu, &addr, 32, zeros, true);
269 if ((r == -ENOENT) || (r == -EPERM)) {
270 *advance = 0;
5deb8e7a 271 kvmppc_set_dar(vcpu, vaddr);
a2d56020 272 vcpu->arch.fault_dar = vaddr;
9fb244a2
AG		 273
274 dsisr = DSISR_ISSTORE;
275 if (r == -ENOENT)
276 dsisr |= DSISR_NOHPTE;
277 else if (r == -EPERM)
278 dsisr |= DSISR_PROTFAULT;
279
5deb8e7a 280 kvmppc_set_dsisr(vcpu, dsisr);
a2d56020 281 vcpu->arch.fault_dsisr = dsisr;
9fb244a2 282
c215c6e4
AG		 283 kvmppc_book3s_queue_irqprio(vcpu,
284 BOOK3S_INTERRUPT_DATA_STORAGE);
c215c6e4
AG		 285 }
286
287 break;
288 }
289 default:
290 emulated = EMULATE_FAIL;
291 }
292 break;
293 default:
294 emulated = EMULATE_FAIL;
295 }
296
831317b6
AG		 297 if (emulated == EMULATE_FAIL)
298 emulated = kvmppc_emulate_paired_single(run, vcpu);
299
c215c6e4
AG		 300 return emulated;
301}
302
e15a1137
AG		 303void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
304 u32 val)
305{
306 if (upper) {
307 /* Upper BAT */
308 u32 bl = (val >> 2) & 0x7ff;
309 bat->bepi_mask = (~bl << 17);
310 bat->bepi = val & 0xfffe0000;
311 bat->vs = (val & 2) ? 1 : 0;
312 bat->vp = (val & 1) ? 1 : 0;
313 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
314 } else {
315 /* Lower BAT */
316 bat->brpn = val & 0xfffe0000;
317 bat->wimg = (val >> 3) & 0xf;
318 bat->pp = val & 3;
319 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
320 }
321}
322
c1c88e2f 323static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn)
c04a695a
AG		 324{
325 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
326 struct kvmppc_bat *bat;
327
328 switch (sprn) {
329 case SPRN_IBAT0U ... SPRN_IBAT3L:
330 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
331 break;
332 case SPRN_IBAT4U ... SPRN_IBAT7L:
333 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
334 break;
335 case SPRN_DBAT0U ... SPRN_DBAT3L:
336 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
337 break;
338 case SPRN_DBAT4U ... SPRN_DBAT7L:
339 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
340 break;
341 default:
342 BUG();
343 }
344
c1c88e2f 345 return bat;
c215c6e4
AG		 346}
347
3a167bea 348int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
c215c6e4
AG		 349{
350 int emulated = EMULATE_DONE;
351
352 switch (sprn) {
353 case SPRN_SDR1:
317a8fa3
AG		 354 if (!spr_allowed(vcpu, PRIV_HYPER))
355 goto unprivileged;
8e5b26b5 356 to_book3s(vcpu)->sdr1 = spr_val;
c215c6e4
AG		 357 break;
358 case SPRN_DSISR:
5deb8e7a 359 kvmppc_set_dsisr(vcpu, spr_val);
c215c6e4
AG		 360 break;
361 case SPRN_DAR:
5deb8e7a 362 kvmppc_set_dar(vcpu, spr_val);
c215c6e4
AG		 363 break;
364 case SPRN_HIOR:
8e5b26b5 365 to_book3s(vcpu)->hior = spr_val;
c215c6e4
AG		 366 break;
367 case SPRN_IBAT0U ... SPRN_IBAT3L:
368 case SPRN_IBAT4U ... SPRN_IBAT7L:
369 case SPRN_DBAT0U ... SPRN_DBAT3L:
370 case SPRN_DBAT4U ... SPRN_DBAT7L:
c1c88e2f
AG		 371 {
372 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
373
374 kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val);
c215c6e4
AG		 375 /* BAT writes happen so rarely that we're ok to flush
376 * everything here */
377 kvmppc_mmu_pte_flush(vcpu, 0, 0);
c04a695a 378 kvmppc_mmu_flush_segments(vcpu);
c215c6e4 379 break;
c1c88e2f 380 }
c215c6e4 381 case SPRN_HID0:
8e5b26b5 382 to_book3s(vcpu)->hid[0] = spr_val;
c215c6e4
AG		 383 break;
384 case SPRN_HID1:
8e5b26b5 385 to_book3s(vcpu)->hid[1] = spr_val;
c215c6e4
AG		 386 break;
387 case SPRN_HID2:
8e5b26b5 388 to_book3s(vcpu)->hid[2] = spr_val;
c215c6e4 389 break;
d6d549b2
AG		 390 case SPRN_HID2_GEKKO:
391 to_book3s(vcpu)->hid[2] = spr_val;
392 /* HID2.PSE controls paired single on gekko */
393 switch (vcpu->arch.pvr) {
394 case 0x00080200: /* lonestar 2.0 */
395 case 0x00088202: /* lonestar 2.2 */
396 case 0x70000100: /* gekko 1.0 */
397 case 0x00080100: /* gekko 2.0 */
398 case 0x00083203: /* gekko 2.3a */
399 case 0x00083213: /* gekko 2.3b */
400 case 0x00083204: /* gekko 2.4 */
401 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
b83d4a9c
AG		 402 case 0x00087200: /* broadway */
403 if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) {
404 /* Native paired singles */
405 } else if (spr_val & (1 << 29)) { /* HID2.PSE */
d6d549b2
AG		 406 vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
407 kvmppc_giveup_ext(vcpu, MSR_FP);
408 } else {
409 vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
410 }
411 break;
412 }
413 break;
c215c6e4 414 case SPRN_HID4:
d6d549b2 415 case SPRN_HID4_GEKKO:
8e5b26b5 416 to_book3s(vcpu)->hid[4] = spr_val;
c215c6e4
AG		 417 break;
418 case SPRN_HID5:
8e5b26b5 419 to_book3s(vcpu)->hid[5] = spr_val;
c215c6e4
AG		 420 /* guest HID5 set can change is_dcbz32 */
421 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
422 (mfmsr() & MSR_HV))
423 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
424 break;
b0a94d4e
PM		 425 case SPRN_PURR:
426 to_book3s(vcpu)->purr_offset = spr_val - get_tb();
427 break;
428 case SPRN_SPURR:
429 to_book3s(vcpu)->spurr_offset = spr_val - get_tb();
430 break;
d6d549b2
AG		 431 case SPRN_GQR0:
432 case SPRN_GQR1:
433 case SPRN_GQR2:
434 case SPRN_GQR3:
435 case SPRN_GQR4:
436 case SPRN_GQR5:
437 case SPRN_GQR6:
438 case SPRN_GQR7:
439 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
440 break;
616dff86
AG		 441 case SPRN_FSCR:
442 vcpu->arch.fscr = spr_val;
443 break;
2e23f544
AG		 444#ifdef CONFIG_PPC_BOOK3S_64
445 case SPRN_BESCR:
446 vcpu->arch.bescr = spr_val;
447 break;
448 case SPRN_EBBHR:
449 vcpu->arch.ebbhr = spr_val;
450 break;
451 case SPRN_EBBRR:
452 vcpu->arch.ebbrr = spr_val;
453 break;
454#endif
c215c6e4
AG		 455 case SPRN_ICTC:
456 case SPRN_THRM1:
457 case SPRN_THRM2:
458 case SPRN_THRM3:
459 case SPRN_CTRLF:
460 case SPRN_CTRLT:
d6d549b2 461 case SPRN_L2CR:
b0a94d4e 462 case SPRN_DSCR:
d6d549b2
AG		 463 case SPRN_MMCR0_GEKKO:
464 case SPRN_MMCR1_GEKKO:
465 case SPRN_PMC1_GEKKO:
466 case SPRN_PMC2_GEKKO:
467 case SPRN_PMC3_GEKKO:
468 case SPRN_PMC4_GEKKO:
469 case SPRN_WPAR_GEKKO:
f2be6550 470 case SPRN_MSSSR0:
f3532028 471 case SPRN_DABR:
f8f6eb0d
AG		 472#ifdef CONFIG_PPC_BOOK3S_64
473 case SPRN_MMCRS:
474 case SPRN_MMCRA:
475 case SPRN_MMCR0:
476 case SPRN_MMCR1:
477 case SPRN_MMCR2:
478#endif
c215c6e4 479 break;
317a8fa3 480unprivileged:
c215c6e4
AG		 481 default:
482 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
483#ifndef DEBUG_SPR
484 emulated = EMULATE_FAIL;
485#endif
486 break;
487 }
488
489 return emulated;
490}
491
3a167bea 492int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
c215c6e4
AG		 493{
494 int emulated = EMULATE_DONE;
495
496 switch (sprn) {
c04a695a
AG		 497 case SPRN_IBAT0U ... SPRN_IBAT3L:
498 case SPRN_IBAT4U ... SPRN_IBAT7L:
499 case SPRN_DBAT0U ... SPRN_DBAT3L:
500 case SPRN_DBAT4U ... SPRN_DBAT7L:
c1c88e2f
AG		 501 {
502 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
503
504 if (sprn % 2)
54771e62 505 *spr_val = bat->raw >> 32;
c1c88e2f 506 else
54771e62 507 *spr_val = bat->raw;
c1c88e2f 508
c04a695a 509 break;
c1c88e2f 510 }
c215c6e4 511 case SPRN_SDR1:
317a8fa3
AG		 512 if (!spr_allowed(vcpu, PRIV_HYPER))
513 goto unprivileged;
54771e62 514 *spr_val = to_book3s(vcpu)->sdr1;
c215c6e4
AG		 515 break;
516 case SPRN_DSISR:
5deb8e7a 517 *spr_val = kvmppc_get_dsisr(vcpu);
c215c6e4
AG		 518 break;
519 case SPRN_DAR:
5deb8e7a 520 *spr_val = kvmppc_get_dar(vcpu);
c215c6e4
AG		 521 break;
522 case SPRN_HIOR:
54771e62 523 *spr_val = to_book3s(vcpu)->hior;
c215c6e4
AG		 524 break;
525 case SPRN_HID0:
54771e62 526 *spr_val = to_book3s(vcpu)->hid[0];
c215c6e4
AG		 527 break;
528 case SPRN_HID1:
54771e62 529 *spr_val = to_book3s(vcpu)->hid[1];
c215c6e4
AG		 530 break;
531 case SPRN_HID2:
d6d549b2 532 case SPRN_HID2_GEKKO:
54771e62 533 *spr_val = to_book3s(vcpu)->hid[2];
c215c6e4
AG		 534 break;
535 case SPRN_HID4:
d6d549b2 536 case SPRN_HID4_GEKKO:
54771e62 537 *spr_val = to_book3s(vcpu)->hid[4];
c215c6e4
AG		 538 break;
539 case SPRN_HID5:
54771e62 540 *spr_val = to_book3s(vcpu)->hid[5];
c215c6e4 541 break;
aacf9aa3 542 case SPRN_CFAR:
b0a94d4e 543 case SPRN_DSCR:
54771e62 544 *spr_val = 0;
aacf9aa3 545 break;
b0a94d4e
PM		 546 case SPRN_PURR:
547 *spr_val = get_tb() + to_book3s(vcpu)->purr_offset;
548 break;
549 case SPRN_SPURR:
550 *spr_val = get_tb() + to_book3s(vcpu)->purr_offset;
551 break;
d6d549b2
AG		 552 case SPRN_GQR0:
553 case SPRN_GQR1:
554 case SPRN_GQR2:
555 case SPRN_GQR3:
556 case SPRN_GQR4:
557 case SPRN_GQR5:
558 case SPRN_GQR6:
559 case SPRN_GQR7:
54771e62 560 *spr_val = to_book3s(vcpu)->gqr[sprn - SPRN_GQR0];
d6d549b2 561 break;
616dff86
AG		 562 case SPRN_FSCR:
563 *spr_val = vcpu->arch.fscr;
564 break;
2e23f544
AG		 565#ifdef CONFIG_PPC_BOOK3S_64
566 case SPRN_BESCR:
567 *spr_val = vcpu->arch.bescr;
568 break;
569 case SPRN_EBBHR:
570 *spr_val = vcpu->arch.ebbhr;
571 break;
572 case SPRN_EBBRR:
573 *spr_val = vcpu->arch.ebbrr;
574 break;
575#endif
c215c6e4
AG		 576 case SPRN_THRM1:
577 case SPRN_THRM2:
578 case SPRN_THRM3:
579 case SPRN_CTRLF:
580 case SPRN_CTRLT:
d6d549b2
AG		 581 case SPRN_L2CR:
582 case SPRN_MMCR0_GEKKO:
583 case SPRN_MMCR1_GEKKO:
584 case SPRN_PMC1_GEKKO:
585 case SPRN_PMC2_GEKKO:
586 case SPRN_PMC3_GEKKO:
587 case SPRN_PMC4_GEKKO:
588 case SPRN_WPAR_GEKKO:
f2be6550 589 case SPRN_MSSSR0:
f3532028 590 case SPRN_DABR:
f8f6eb0d
AG		 591#ifdef CONFIG_PPC_BOOK3S_64
592 case SPRN_MMCRS:
593 case SPRN_MMCRA:
594 case SPRN_MMCR0:
595 case SPRN_MMCR1:
596 case SPRN_MMCR2:
a5948fa0 597 case SPRN_TIR:
f8f6eb0d 598#endif
54771e62 599 *spr_val = 0;
c215c6e4
AG		 600 break;
601 default:
317a8fa3 602unprivileged:
c215c6e4
AG		 603 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
604#ifndef DEBUG_SPR
605 emulated = EMULATE_FAIL;
606#endif
607 break;
608 }
609
610 return emulated;
611}
612
ca7f4203
AG		 613u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
614{
615 u32 dsisr = 0;
616
617 /*
618 * This is what the spec says about DSISR bits (not mentioned = 0):
619 *
620 * 12:13 [DS] Set to bits 30:31
621 * 15:16 [X] Set to bits 29:30
622 * 17 [X] Set to bit 25
623 * [D/DS] Set to bit 5
624 * 18:21 [X] Set to bits 21:24
625 * [D/DS] Set to bits 1:4
626 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
627 * 27:31 Set to bits 11:15 (RA)
628 */
629
630 switch (get_op(inst)) {
631 /* D-form */
632 case OP_LFS:
633 case OP_LFD:
634 case OP_STFD:
635 case OP_STFS:
636 dsisr |= (inst >> 12) & 0x4000; /* bit 17 */
637 dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */
638 break;
639 /* X-form */
640 case 31:
641 dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */
642 dsisr |= (inst << 8) & 0x04000; /* bit 17 */
643 dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */
644 break;
645 default:
646 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
647 break;
648 }
649
650 dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */
651
652 return dsisr;
653}
654
655ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
656{
657 ulong dar = 0;
c46dc9a8
AG		 658 ulong ra = get_ra(inst);
659 ulong rb = get_rb(inst);
ca7f4203
AG		 660
661 switch (get_op(inst)) {
662 case OP_LFS:
663 case OP_LFD:
664 case OP_STFD:
665 case OP_STFS:
ca7f4203
AG		 666 if (ra)
667 dar = kvmppc_get_gpr(vcpu, ra);
668 dar += (s32)((s16)inst);
669 break;
670 case 31:
ca7f4203
AG		 671 if (ra)
672 dar = kvmppc_get_gpr(vcpu, ra);
c46dc9a8 673 dar += kvmppc_get_gpr(vcpu, rb);
ca7f4203
AG		 674 break;
675 default:
676 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
677 break;
678 }
679
680 return dar;
681}
Linux kernel - Deliverables
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