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Rename EMULATE_DO_PAPR to EMULATE_EXIT_USER
[deliverable/linux.git] / arch / powerpc / kvm / book3s_emulate.c
CommitLineData
c215c6e4
AG		 1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20#include <asm/kvm_ppc.h>
21#include <asm/disassemble.h>
22#include <asm/kvm_book3s.h>
23#include <asm/reg.h>
95327d08 24#include <asm/switch_to.h>
b0a94d4e 25#include <asm/time.h>
c215c6e4
AG		 26
27#define OP_19_XOP_RFID 18
28#define OP_19_XOP_RFI 50
29
30#define OP_31_XOP_MFMSR 83
31#define OP_31_XOP_MTMSR 146
32#define OP_31_XOP_MTMSRD 178
71db4089 33#define OP_31_XOP_MTSR 210
c215c6e4
AG		 34#define OP_31_XOP_MTSRIN 242
35#define OP_31_XOP_TLBIEL 274
36#define OP_31_XOP_TLBIE 306
50c7bb80
AG		 37/* Opcode is officially reserved, reuse it as sc 1 when sc 1 doesn't trap */
38#define OP_31_XOP_FAKE_SC1 308
c215c6e4
AG		 39#define OP_31_XOP_SLBMTE 402
40#define OP_31_XOP_SLBIE 434
41#define OP_31_XOP_SLBIA 498
c664876c 42#define OP_31_XOP_MFSR 595
c215c6e4 43#define OP_31_XOP_MFSRIN 659
bd7cdbb7 44#define OP_31_XOP_DCBA 758
c215c6e4
AG		 45#define OP_31_XOP_SLBMFEV 851
46#define OP_31_XOP_EIOIO 854
47#define OP_31_XOP_SLBMFEE 915
48
49/* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
50#define OP_31_XOP_DCBZ 1010
51
ca7f4203
AG		 52#define OP_LFS 48
53#define OP_LFD 50
54#define OP_STFS 52
55#define OP_STFD 54
56
d6d549b2
AG		 57#define SPRN_GQR0 912
58#define SPRN_GQR1 913
59#define SPRN_GQR2 914
60#define SPRN_GQR3 915
61#define SPRN_GQR4 916
62#define SPRN_GQR5 917
63#define SPRN_GQR6 918
64#define SPRN_GQR7 919
65
07b0907d
AG		 66/* Book3S_32 defines mfsrin(v) - but that messes up our abstract
67 * function pointers, so let's just disable the define. */
68#undef mfsrin
69
317a8fa3
AG		 70enum priv_level {
71 PRIV_PROBLEM = 0,
72 PRIV_SUPER = 1,
73 PRIV_HYPER = 2,
74};
75
76static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level)
77{
78 /* PAPR VMs only access supervisor SPRs */
79 if (vcpu->arch.papr_enabled && (level > PRIV_SUPER))
80 return false;
81
82 /* Limit user space to its own small SPR set */
83 if ((vcpu->arch.shared->msr & MSR_PR) && level > PRIV_PROBLEM)
84 return false;
85
86 return true;
87}
88
c215c6e4
AG		 89int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
90 unsigned int inst, int *advance)
91{
92 int emulated = EMULATE_DONE;
c46dc9a8
AG		 93 int rt = get_rt(inst);
94 int rs = get_rs(inst);
95 int ra = get_ra(inst);
96 int rb = get_rb(inst);
c215c6e4
AG		 97
98 switch (get_op(inst)) {
99 case 19:
100 switch (get_xop(inst)) {
101 case OP_19_XOP_RFID:
102 case OP_19_XOP_RFI:
de7906c3
AG		 103 kvmppc_set_pc(vcpu, vcpu->arch.shared->srr0);
104 kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
c215c6e4
AG		 105 *advance = 0;
106 break;
107
108 default:
109 emulated = EMULATE_FAIL;
110 break;
111 }
112 break;
113 case 31:
114 switch (get_xop(inst)) {
115 case OP_31_XOP_MFMSR:
c46dc9a8 116 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->msr);
c215c6e4
AG		 117 break;
118 case OP_31_XOP_MTMSRD:
119 {
c46dc9a8 120 ulong rs_val = kvmppc_get_gpr(vcpu, rs);
c215c6e4 121 if (inst & 0x10000) {
c46dc9a8
AG		 122 ulong new_msr = vcpu->arch.shared->msr;
123 new_msr &= ~(MSR_RI | MSR_EE);
124 new_msr |= rs_val & (MSR_RI | MSR_EE);
125 vcpu->arch.shared->msr = new_msr;
c215c6e4 126 } else
c46dc9a8 127 kvmppc_set_msr(vcpu, rs_val);
c215c6e4
AG		 128 break;
129 }
130 case OP_31_XOP_MTMSR:
c46dc9a8 131 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));
c215c6e4 132 break;
c664876c
AG		 133 case OP_31_XOP_MFSR:
134 {
135 int srnum;
136
137 srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
138 if (vcpu->arch.mmu.mfsrin) {
139 u32 sr;
140 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
c46dc9a8 141 kvmppc_set_gpr(vcpu, rt, sr);
c664876c
AG		 142 }
143 break;
144 }
c215c6e4
AG		 145 case OP_31_XOP_MFSRIN:
146 {
147 int srnum;
148
c46dc9a8 149 srnum = (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf;
c215c6e4
AG		 150 if (vcpu->arch.mmu.mfsrin) {
151 u32 sr;
152 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
c46dc9a8 153 kvmppc_set_gpr(vcpu, rt, sr);
c215c6e4
AG		 154 }
155 break;
156 }
71db4089
AG		 157 case OP_31_XOP_MTSR:
158 vcpu->arch.mmu.mtsrin(vcpu,
159 (inst >> 16) & 0xf,
c46dc9a8 160 kvmppc_get_gpr(vcpu, rs));
71db4089 161 break;
c215c6e4
AG		 162 case OP_31_XOP_MTSRIN:
163 vcpu->arch.mmu.mtsrin(vcpu,
c46dc9a8
AG		 164 (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf,
165 kvmppc_get_gpr(vcpu, rs));
c215c6e4
AG		 166 break;
167 case OP_31_XOP_TLBIE:
168 case OP_31_XOP_TLBIEL:
169 {
170 bool large = (inst & 0x00200000) ? true : false;
c46dc9a8 171 ulong addr = kvmppc_get_gpr(vcpu, rb);
c215c6e4
AG		 172 vcpu->arch.mmu.tlbie(vcpu, addr, large);
173 break;
174 }
50c7bb80
AG		 175#ifdef CONFIG_KVM_BOOK3S_64_PR
176 case OP_31_XOP_FAKE_SC1:
177 {
178 /* SC 1 papr hypercalls */
179 ulong cmd = kvmppc_get_gpr(vcpu, 3);
180 int i;
181
182 if ((vcpu->arch.shared->msr & MSR_PR) ||
183 !vcpu->arch.papr_enabled) {
184 emulated = EMULATE_FAIL;
185 break;
186 }
187
188 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE)
189 break;
190
191 run->papr_hcall.nr = cmd;
192 for (i = 0; i < 9; ++i) {
193 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
194 run->papr_hcall.args[i] = gpr;
195 }
196
c402a3f4 197 emulated = EMULATE_EXIT_USER;
50c7bb80
AG		 198 break;
199 }
200#endif
c215c6e4
AG		 201 case OP_31_XOP_EIOIO:
202 break;
203 case OP_31_XOP_SLBMTE:
204 if (!vcpu->arch.mmu.slbmte)
205 return EMULATE_FAIL;
206
8e5b26b5 207 vcpu->arch.mmu.slbmte(vcpu,
c46dc9a8
AG		 208 kvmppc_get_gpr(vcpu, rs),
209 kvmppc_get_gpr(vcpu, rb));
c215c6e4
AG		 210 break;
211 case OP_31_XOP_SLBIE:
212 if (!vcpu->arch.mmu.slbie)
213 return EMULATE_FAIL;
214
8e5b26b5 215 vcpu->arch.mmu.slbie(vcpu,
c46dc9a8 216 kvmppc_get_gpr(vcpu, rb));
c215c6e4
AG		 217 break;
218 case OP_31_XOP_SLBIA:
219 if (!vcpu->arch.mmu.slbia)
220 return EMULATE_FAIL;
221
222 vcpu->arch.mmu.slbia(vcpu);
223 break;
224 case OP_31_XOP_SLBMFEE:
225 if (!vcpu->arch.mmu.slbmfee) {
226 emulated = EMULATE_FAIL;
227 } else {
c46dc9a8 228 ulong t, rb_val;
c215c6e4 229
c46dc9a8
AG		 230 rb_val = kvmppc_get_gpr(vcpu, rb);
231 t = vcpu->arch.mmu.slbmfee(vcpu, rb_val);
232 kvmppc_set_gpr(vcpu, rt, t);
c215c6e4
AG		 233 }
234 break;
235 case OP_31_XOP_SLBMFEV:
236 if (!vcpu->arch.mmu.slbmfev) {
237 emulated = EMULATE_FAIL;
238 } else {
c46dc9a8 239 ulong t, rb_val;
c215c6e4 240
c46dc9a8
AG		 241 rb_val = kvmppc_get_gpr(vcpu, rb);
242 t = vcpu->arch.mmu.slbmfev(vcpu, rb_val);
243 kvmppc_set_gpr(vcpu, rt, t);
c215c6e4
AG		 244 }
245 break;
bd7cdbb7
AG		 246 case OP_31_XOP_DCBA:
247 /* Gets treated as NOP */
248 break;
c215c6e4
AG		 249 case OP_31_XOP_DCBZ:
250 {
c46dc9a8
AG		 251 ulong rb_val = kvmppc_get_gpr(vcpu, rb);
252 ulong ra_val = 0;
5467a97d 253 ulong addr, vaddr;
c215c6e4 254 u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
9fb244a2
AG		 255 u32 dsisr;
256 int r;
c215c6e4 257
c46dc9a8
AG		 258 if (ra)
259 ra_val = kvmppc_get_gpr(vcpu, ra);
c215c6e4 260
c46dc9a8 261 addr = (ra_val + rb_val) & ~31ULL;
666e7252 262 if (!(vcpu->arch.shared->msr & MSR_SF))
c215c6e4 263 addr &= 0xffffffff;
5467a97d 264 vaddr = addr;
c215c6e4 265
9fb244a2
AG		 266 r = kvmppc_st(vcpu, &addr, 32, zeros, true);
267 if ((r == -ENOENT) || (r == -EPERM)) {
468a12c2
AG		 268 struct kvmppc_book3s_shadow_vcpu *svcpu;
269
270 svcpu = svcpu_get(vcpu);
9fb244a2 271 *advance = 0;
5e030186 272 vcpu->arch.shared->dar = vaddr;
468a12c2 273 svcpu->fault_dar = vaddr;
9fb244a2
AG		 274
275 dsisr = DSISR_ISSTORE;
276 if (r == -ENOENT)
277 dsisr |= DSISR_NOHPTE;
278 else if (r == -EPERM)
279 dsisr |= DSISR_PROTFAULT;
280
d562de48 281 vcpu->arch.shared->dsisr = dsisr;
468a12c2
AG		 282 svcpu->fault_dsisr = dsisr;
283 svcpu_put(svcpu);
9fb244a2 284
c215c6e4
AG		 285 kvmppc_book3s_queue_irqprio(vcpu,
286 BOOK3S_INTERRUPT_DATA_STORAGE);
c215c6e4
AG		 287 }
288
289 break;
290 }
291 default:
292 emulated = EMULATE_FAIL;
293 }
294 break;
295 default:
296 emulated = EMULATE_FAIL;
297 }
298
831317b6
AG		 299 if (emulated == EMULATE_FAIL)
300 emulated = kvmppc_emulate_paired_single(run, vcpu);
301
c215c6e4
AG		 302 return emulated;
303}
304
e15a1137
AG		 305void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
306 u32 val)
307{
308 if (upper) {
309 /* Upper BAT */
310 u32 bl = (val >> 2) & 0x7ff;
311 bat->bepi_mask = (~bl << 17);
312 bat->bepi = val & 0xfffe0000;
313 bat->vs = (val & 2) ? 1 : 0;
314 bat->vp = (val & 1) ? 1 : 0;
315 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
316 } else {
317 /* Lower BAT */
318 bat->brpn = val & 0xfffe0000;
319 bat->wimg = (val >> 3) & 0xf;
320 bat->pp = val & 3;
321 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
322 }
323}
324
c1c88e2f 325static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn)
c04a695a
AG		 326{
327 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
328 struct kvmppc_bat *bat;
329
330 switch (sprn) {
331 case SPRN_IBAT0U ... SPRN_IBAT3L:
332 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
333 break;
334 case SPRN_IBAT4U ... SPRN_IBAT7L:
335 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
336 break;
337 case SPRN_DBAT0U ... SPRN_DBAT3L:
338 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
339 break;
340 case SPRN_DBAT4U ... SPRN_DBAT7L:
341 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
342 break;
343 default:
344 BUG();
345 }
346
c1c88e2f 347 return bat;
c215c6e4
AG		 348}
349
54771e62 350int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
c215c6e4
AG		 351{
352 int emulated = EMULATE_DONE;
353
354 switch (sprn) {
355 case SPRN_SDR1:
317a8fa3
AG		 356 if (!spr_allowed(vcpu, PRIV_HYPER))
357 goto unprivileged;
8e5b26b5 358 to_book3s(vcpu)->sdr1 = spr_val;
c215c6e4
AG		 359 break;
360 case SPRN_DSISR:
d562de48 361 vcpu->arch.shared->dsisr = spr_val;
c215c6e4
AG		 362 break;
363 case SPRN_DAR:
5e030186 364 vcpu->arch.shared->dar = spr_val;
c215c6e4
AG		 365 break;
366 case SPRN_HIOR:
8e5b26b5 367 to_book3s(vcpu)->hior = spr_val;
c215c6e4
AG		 368 break;
369 case SPRN_IBAT0U ... SPRN_IBAT3L:
370 case SPRN_IBAT4U ... SPRN_IBAT7L:
371 case SPRN_DBAT0U ... SPRN_DBAT3L:
372 case SPRN_DBAT4U ... SPRN_DBAT7L:
c1c88e2f
AG		 373 {
374 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
375
376 kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val);
c215c6e4
AG		 377 /* BAT writes happen so rarely that we're ok to flush
378 * everything here */
379 kvmppc_mmu_pte_flush(vcpu, 0, 0);
c04a695a 380 kvmppc_mmu_flush_segments(vcpu);
c215c6e4 381 break;
c1c88e2f 382 }
c215c6e4 383 case SPRN_HID0:
8e5b26b5 384 to_book3s(vcpu)->hid[0] = spr_val;
c215c6e4
AG		 385 break;
386 case SPRN_HID1:
8e5b26b5 387 to_book3s(vcpu)->hid[1] = spr_val;
c215c6e4
AG		 388 break;
389 case SPRN_HID2:
8e5b26b5 390 to_book3s(vcpu)->hid[2] = spr_val;
c215c6e4 391 break;
d6d549b2
AG		 392 case SPRN_HID2_GEKKO:
393 to_book3s(vcpu)->hid[2] = spr_val;
394 /* HID2.PSE controls paired single on gekko */
395 switch (vcpu->arch.pvr) {
396 case 0x00080200: /* lonestar 2.0 */
397 case 0x00088202: /* lonestar 2.2 */
398 case 0x70000100: /* gekko 1.0 */
399 case 0x00080100: /* gekko 2.0 */
400 case 0x00083203: /* gekko 2.3a */
401 case 0x00083213: /* gekko 2.3b */
402 case 0x00083204: /* gekko 2.4 */
403 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
b83d4a9c
AG		 404 case 0x00087200: /* broadway */
405 if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) {
406 /* Native paired singles */
407 } else if (spr_val & (1 << 29)) { /* HID2.PSE */
d6d549b2
AG		 408 vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
409 kvmppc_giveup_ext(vcpu, MSR_FP);
410 } else {
411 vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
412 }
413 break;
414 }
415 break;
c215c6e4 416 case SPRN_HID4:
d6d549b2 417 case SPRN_HID4_GEKKO:
8e5b26b5 418 to_book3s(vcpu)->hid[4] = spr_val;
c215c6e4
AG		 419 break;
420 case SPRN_HID5:
8e5b26b5 421 to_book3s(vcpu)->hid[5] = spr_val;
c215c6e4
AG		 422 /* guest HID5 set can change is_dcbz32 */
423 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
424 (mfmsr() & MSR_HV))
425 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
426 break;
b0a94d4e
PM		 427 case SPRN_PURR:
428 to_book3s(vcpu)->purr_offset = spr_val - get_tb();
429 break;
430 case SPRN_SPURR:
431 to_book3s(vcpu)->spurr_offset = spr_val - get_tb();
432 break;
d6d549b2
AG		 433 case SPRN_GQR0:
434 case SPRN_GQR1:
435 case SPRN_GQR2:
436 case SPRN_GQR3:
437 case SPRN_GQR4:
438 case SPRN_GQR5:
439 case SPRN_GQR6:
440 case SPRN_GQR7:
441 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
442 break;
c215c6e4
AG		 443 case SPRN_ICTC:
444 case SPRN_THRM1:
445 case SPRN_THRM2:
446 case SPRN_THRM3:
447 case SPRN_CTRLF:
448 case SPRN_CTRLT:
d6d549b2 449 case SPRN_L2CR:
b0a94d4e 450 case SPRN_DSCR:
d6d549b2
AG		 451 case SPRN_MMCR0_GEKKO:
452 case SPRN_MMCR1_GEKKO:
453 case SPRN_PMC1_GEKKO:
454 case SPRN_PMC2_GEKKO:
455 case SPRN_PMC3_GEKKO:
456 case SPRN_PMC4_GEKKO:
457 case SPRN_WPAR_GEKKO:
f2be6550 458 case SPRN_MSSSR0:
c215c6e4 459 break;
317a8fa3 460unprivileged:
c215c6e4
AG		 461 default:
462 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
463#ifndef DEBUG_SPR
464 emulated = EMULATE_FAIL;
465#endif
466 break;
467 }
468
469 return emulated;
470}
471
54771e62 472int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
c215c6e4
AG		 473{
474 int emulated = EMULATE_DONE;
475
476 switch (sprn) {
c04a695a
AG		 477 case SPRN_IBAT0U ... SPRN_IBAT3L:
478 case SPRN_IBAT4U ... SPRN_IBAT7L:
479 case SPRN_DBAT0U ... SPRN_DBAT3L:
480 case SPRN_DBAT4U ... SPRN_DBAT7L:
c1c88e2f
AG		 481 {
482 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
483
484 if (sprn % 2)
54771e62 485 *spr_val = bat->raw >> 32;
c1c88e2f 486 else
54771e62 487 *spr_val = bat->raw;
c1c88e2f 488
c04a695a 489 break;
c1c88e2f 490 }
c215c6e4 491 case SPRN_SDR1:
317a8fa3
AG		 492 if (!spr_allowed(vcpu, PRIV_HYPER))
493 goto unprivileged;
54771e62 494 *spr_val = to_book3s(vcpu)->sdr1;
c215c6e4
AG		 495 break;
496 case SPRN_DSISR:
54771e62 497 *spr_val = vcpu->arch.shared->dsisr;
c215c6e4
AG		 498 break;
499 case SPRN_DAR:
54771e62 500 *spr_val = vcpu->arch.shared->dar;
c215c6e4
AG		 501 break;
502 case SPRN_HIOR:
54771e62 503 *spr_val = to_book3s(vcpu)->hior;
c215c6e4
AG		 504 break;
505 case SPRN_HID0:
54771e62 506 *spr_val = to_book3s(vcpu)->hid[0];
c215c6e4
AG		 507 break;
508 case SPRN_HID1:
54771e62 509 *spr_val = to_book3s(vcpu)->hid[1];
c215c6e4
AG		 510 break;
511 case SPRN_HID2:
d6d549b2 512 case SPRN_HID2_GEKKO:
54771e62 513 *spr_val = to_book3s(vcpu)->hid[2];
c215c6e4
AG		 514 break;
515 case SPRN_HID4:
d6d549b2 516 case SPRN_HID4_GEKKO:
54771e62 517 *spr_val = to_book3s(vcpu)->hid[4];
c215c6e4
AG		 518 break;
519 case SPRN_HID5:
54771e62 520 *spr_val = to_book3s(vcpu)->hid[5];
c215c6e4 521 break;
aacf9aa3 522 case SPRN_CFAR:
b0a94d4e 523 case SPRN_DSCR:
54771e62 524 *spr_val = 0;
aacf9aa3 525 break;
b0a94d4e
PM		 526 case SPRN_PURR:
527 *spr_val = get_tb() + to_book3s(vcpu)->purr_offset;
528 break;
529 case SPRN_SPURR:
530 *spr_val = get_tb() + to_book3s(vcpu)->purr_offset;
531 break;
d6d549b2
AG		 532 case SPRN_GQR0:
533 case SPRN_GQR1:
534 case SPRN_GQR2:
535 case SPRN_GQR3:
536 case SPRN_GQR4:
537 case SPRN_GQR5:
538 case SPRN_GQR6:
539 case SPRN_GQR7:
54771e62 540 *spr_val = to_book3s(vcpu)->gqr[sprn - SPRN_GQR0];
d6d549b2 541 break;
c215c6e4
AG		 542 case SPRN_THRM1:
543 case SPRN_THRM2:
544 case SPRN_THRM3:
545 case SPRN_CTRLF:
546 case SPRN_CTRLT:
d6d549b2
AG		 547 case SPRN_L2CR:
548 case SPRN_MMCR0_GEKKO:
549 case SPRN_MMCR1_GEKKO:
550 case SPRN_PMC1_GEKKO:
551 case SPRN_PMC2_GEKKO:
552 case SPRN_PMC3_GEKKO:
553 case SPRN_PMC4_GEKKO:
554 case SPRN_WPAR_GEKKO:
f2be6550 555 case SPRN_MSSSR0:
54771e62 556 *spr_val = 0;
c215c6e4
AG		 557 break;
558 default:
317a8fa3 559unprivileged:
c215c6e4
AG		 560 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
561#ifndef DEBUG_SPR
562 emulated = EMULATE_FAIL;
563#endif
564 break;
565 }
566
567 return emulated;
568}
569
ca7f4203
AG		 570u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
571{
572 u32 dsisr = 0;
573
574 /*
575 * This is what the spec says about DSISR bits (not mentioned = 0):
576 *
577 * 12:13 [DS] Set to bits 30:31
578 * 15:16 [X] Set to bits 29:30
579 * 17 [X] Set to bit 25
580 * [D/DS] Set to bit 5
581 * 18:21 [X] Set to bits 21:24
582 * [D/DS] Set to bits 1:4
583 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
584 * 27:31 Set to bits 11:15 (RA)
585 */
586
587 switch (get_op(inst)) {
588 /* D-form */
589 case OP_LFS:
590 case OP_LFD:
591 case OP_STFD:
592 case OP_STFS:
593 dsisr |= (inst >> 12) & 0x4000; /* bit 17 */
594 dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */
595 break;
596 /* X-form */
597 case 31:
598 dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */
599 dsisr |= (inst << 8) & 0x04000; /* bit 17 */
600 dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */
601 break;
602 default:
603 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
604 break;
605 }
606
607 dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */
608
609 return dsisr;
610}
611
612ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
613{
614 ulong dar = 0;
c46dc9a8
AG		 615 ulong ra = get_ra(inst);
616 ulong rb = get_rb(inst);
ca7f4203
AG		 617
618 switch (get_op(inst)) {
619 case OP_LFS:
620 case OP_LFD:
621 case OP_STFD:
622 case OP_STFS:
ca7f4203
AG		 623 if (ra)
624 dar = kvmppc_get_gpr(vcpu, ra);
625 dar += (s32)((s16)inst);
626 break;
627 case 31:
ca7f4203
AG		 628 if (ra)
629 dar = kvmppc_get_gpr(vcpu, ra);
c46dc9a8 630 dar += kvmppc_get_gpr(vcpu, rb);
ca7f4203
AG		 631 break;
632 default:
633 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
634 break;
635 }
636
637 return dar;
638}
Linux kernel - Deliverables
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