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powerpc/booke: Provide exception macros with interrupt name
[deliverable/linux.git] / arch / powerpc / kvm / booke.c
CommitLineData
bbf45ba5
HB		 1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
4cd35f67 16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
bbf45ba5
HB		 17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20 */
21
22#include <linux/errno.h>
23#include <linux/err.h>
24#include <linux/kvm_host.h>
5a0e3ad6 25#include <linux/gfp.h>
bbf45ba5
HB		 26#include <linux/module.h>
27#include <linux/vmalloc.h>
28#include <linux/fs.h>
7924bd41 29
bbf45ba5
HB		 30#include <asm/cputable.h>
31#include <asm/uaccess.h>
32#include <asm/kvm_ppc.h>
73e75b41 33#include "timing.h"
d9fbd03d 34#include <asm/cacheflush.h>
bbf45ba5 35
75f74f0d 36#include "booke.h"
bbf45ba5 37
d9fbd03d
HB		 38unsigned long kvmppc_booke_handlers;
39
bbf45ba5
HB		 40#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
41#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
42
43struct kvm_stats_debugfs_item debugfs_entries[] = {
bbf45ba5
HB		 44 { "mmio", VCPU_STAT(mmio_exits) },
45 { "dcr", VCPU_STAT(dcr_exits) },
46 { "sig", VCPU_STAT(signal_exits) },
bbf45ba5
HB		 47 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
48 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
49 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
50 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
51 { "sysc", VCPU_STAT(syscall_exits) },
52 { "isi", VCPU_STAT(isi_exits) },
53 { "dsi", VCPU_STAT(dsi_exits) },
54 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
55 { "dec", VCPU_STAT(dec_exits) },
56 { "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67 57 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
bbf45ba5
HB		 58 { NULL }
59};
60
bbf45ba5
HB		 61/* TODO: use vcpu_printf() */
62void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
63{
64 int i;
65
666e7252 66 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
5cf8ca22 67 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
de7906c3
AG		 68 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
69 vcpu->arch.shared->srr1);
bbf45ba5
HB		 70
71 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
72
73 for (i = 0; i < 32; i += 4) {
5cf8ca22 74 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
8e5b26b5
AG		 75 kvmppc_get_gpr(vcpu, i),
76 kvmppc_get_gpr(vcpu, i+1),
77 kvmppc_get_gpr(vcpu, i+2),
78 kvmppc_get_gpr(vcpu, i+3));
bbf45ba5
HB		 79 }
80}
81
4cd35f67
SW		 82#ifdef CONFIG_SPE
83void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
84{
85 preempt_disable();
86 enable_kernel_spe();
87 kvmppc_save_guest_spe(vcpu);
88 vcpu->arch.shadow_msr &= ~MSR_SPE;
89 preempt_enable();
90}
91
92static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
93{
94 preempt_disable();
95 enable_kernel_spe();
96 kvmppc_load_guest_spe(vcpu);
97 vcpu->arch.shadow_msr |= MSR_SPE;
98 preempt_enable();
99}
100
101static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
102{
103 if (vcpu->arch.shared->msr & MSR_SPE) {
104 if (!(vcpu->arch.shadow_msr & MSR_SPE))
105 kvmppc_vcpu_enable_spe(vcpu);
106 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
107 kvmppc_vcpu_disable_spe(vcpu);
108 }
109}
110#else
111static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
112{
113}
114#endif
115
dd9ebf1f
LY		 116/*
117 * Helper function for "full" MSR writes. No need to call this if only
118 * EE/CE/ME/DE/RI are changing.
119 */
4cd35f67
SW		 120void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
121{
dd9ebf1f 122 u32 old_msr = vcpu->arch.shared->msr;
4cd35f67
SW		 123
124 vcpu->arch.shared->msr = new_msr;
125
dd9ebf1f 126 kvmppc_mmu_msr_notify(vcpu, old_msr);
4cd35f67
SW		 127 kvmppc_vcpu_sync_spe(vcpu);
128}
129
d4cf3892
HB		 130static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
131 unsigned int priority)
9dd921cf 132{
9dd921cf
HB		 133 set_bit(priority, &vcpu->arch.pending_exceptions);
134}
135
daf5e271
LY		 136static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
137 ulong dear_flags, ulong esr_flags)
9dd921cf 138{
daf5e271
LY		 139 vcpu->arch.queued_dear = dear_flags;
140 vcpu->arch.queued_esr = esr_flags;
141 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
142}
143
144static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
145 ulong dear_flags, ulong esr_flags)
146{
147 vcpu->arch.queued_dear = dear_flags;
148 vcpu->arch.queued_esr = esr_flags;
149 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
150}
151
152static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
153 ulong esr_flags)
154{
155 vcpu->arch.queued_esr = esr_flags;
156 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
157}
158
159void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
160{
161 vcpu->arch.queued_esr = esr_flags;
d4cf3892 162 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
9dd921cf
HB		 163}
164
165void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
166{
d4cf3892 167 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
9dd921cf
HB		 168}
169
170int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
171{
d4cf3892 172 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
9dd921cf
HB		 173}
174
7706664d
AG		 175void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
176{
177 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
178}
179
9dd921cf
HB		 180void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
181 struct kvm_interrupt *irq)
182{
c5335f17
AG		 183 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
184
185 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
186 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
187
188 kvmppc_booke_queue_irqprio(vcpu, prio);
9dd921cf
HB		 189}
190
4496f974
AG		 191void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
192 struct kvm_interrupt *irq)
193{
194 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
c5335f17 195 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
4496f974
AG		 196}
197
d4cf3892
HB		 198/* Deliver the interrupt of the corresponding priority, if possible. */
199static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
200 unsigned int priority)
bbf45ba5 201{
d4cf3892 202 int allowed = 0;
6045be5d 203 ulong uninitialized_var(msr_mask);
daf5e271 204 bool update_esr = false, update_dear = false;
5c6cedf4
AG		 205 ulong crit_raw = vcpu->arch.shared->critical;
206 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
207 bool crit;
c5335f17 208 bool keep_irq = false;
5c6cedf4
AG		 209
210 /* Truncate crit indicators in 32 bit mode */
211 if (!(vcpu->arch.shared->msr & MSR_SF)) {
212 crit_raw &= 0xffffffff;
213 crit_r1 &= 0xffffffff;
214 }
215
216 /* Critical section when crit == r1 */
217 crit = (crit_raw == crit_r1);
218 /* ... and we're in supervisor mode */
219 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
d4cf3892 220
c5335f17
AG		 221 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
222 priority = BOOKE_IRQPRIO_EXTERNAL;
223 keep_irq = true;
224 }
225
d4cf3892 226 switch (priority) {
d4cf3892 227 case BOOKE_IRQPRIO_DTLB_MISS:
d4cf3892 228 case BOOKE_IRQPRIO_DATA_STORAGE:
daf5e271
LY		 229 update_dear = true;
230 /* fall through */
d4cf3892 231 case BOOKE_IRQPRIO_INST_STORAGE:
daf5e271
LY		 232 case BOOKE_IRQPRIO_PROGRAM:
233 update_esr = true;
234 /* fall through */
235 case BOOKE_IRQPRIO_ITLB_MISS:
236 case BOOKE_IRQPRIO_SYSCALL:
d4cf3892 237 case BOOKE_IRQPRIO_FP_UNAVAIL:
bb3a8a17
HB		 238 case BOOKE_IRQPRIO_SPE_UNAVAIL:
239 case BOOKE_IRQPRIO_SPE_FP_DATA:
240 case BOOKE_IRQPRIO_SPE_FP_ROUND:
d4cf3892
HB		 241 case BOOKE_IRQPRIO_AP_UNAVAIL:
242 case BOOKE_IRQPRIO_ALIGNMENT:
243 allowed = 1;
244 msr_mask = MSR_CE|MSR_ME|MSR_DE;
bbf45ba5 245 break;
d4cf3892
HB		 246 case BOOKE_IRQPRIO_CRITICAL:
247 case BOOKE_IRQPRIO_WATCHDOG:
666e7252 248 allowed = vcpu->arch.shared->msr & MSR_CE;
d4cf3892 249 msr_mask = MSR_ME;
bbf45ba5 250 break;
d4cf3892 251 case BOOKE_IRQPRIO_MACHINE_CHECK:
666e7252 252 allowed = vcpu->arch.shared->msr & MSR_ME;
d4cf3892 253 msr_mask = 0;
bbf45ba5 254 break;
d4cf3892
HB		 255 case BOOKE_IRQPRIO_DECREMENTER:
256 case BOOKE_IRQPRIO_FIT:
dfd4d47e
SW		 257 keep_irq = true;
258 /* fall through */
259 case BOOKE_IRQPRIO_EXTERNAL:
666e7252 260 allowed = vcpu->arch.shared->msr & MSR_EE;
5c6cedf4 261 allowed = allowed && !crit;
d4cf3892 262 msr_mask = MSR_CE|MSR_ME|MSR_DE;
bbf45ba5 263 break;
d4cf3892 264 case BOOKE_IRQPRIO_DEBUG:
666e7252 265 allowed = vcpu->arch.shared->msr & MSR_DE;
d4cf3892 266 msr_mask = MSR_ME;
bbf45ba5 267 break;
bbf45ba5
HB		 268 }
269
d4cf3892 270 if (allowed) {
de7906c3
AG		 271 vcpu->arch.shared->srr0 = vcpu->arch.pc;
272 vcpu->arch.shared->srr1 = vcpu->arch.shared->msr;
d4cf3892 273 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
daf5e271 274 if (update_esr == true)
b5904972 275 vcpu->arch.shared->esr = vcpu->arch.queued_esr;
daf5e271 276 if (update_dear == true)
5e030186 277 vcpu->arch.shared->dar = vcpu->arch.queued_dear;
666e7252 278 kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
bbf45ba5 279
c5335f17
AG		 280 if (!keep_irq)
281 clear_bit(priority, &vcpu->arch.pending_exceptions);
bbf45ba5
HB		 282 }
283
d4cf3892 284 return allowed;
bbf45ba5
HB		 285}
286
dfd4d47e
SW		 287static void update_timer_ints(struct kvm_vcpu *vcpu)
288{
289 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
290 kvmppc_core_queue_dec(vcpu);
291 else
292 kvmppc_core_dequeue_dec(vcpu);
293}
294
c59a6a3e 295static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
bbf45ba5
HB		 296{
297 unsigned long *pending = &vcpu->arch.pending_exceptions;
bbf45ba5
HB		 298 unsigned int priority;
299
dfd4d47e
SW		 300 if (vcpu->requests) {
301 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) {
302 smp_mb();
303 update_timer_ints(vcpu);
304 }
305 }
306
9ab80843 307 priority = __ffs(*pending);
bdc89f13 308 while (priority <= BOOKE_IRQPRIO_MAX) {
d4cf3892 309 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5 310 break;
bbf45ba5
HB		 311
312 priority = find_next_bit(pending,
313 BITS_PER_BYTE * sizeof(*pending),
314 priority + 1);
315 }
90bba358
AG		 316
317 /* Tell the guest about our interrupt status */
29ac26ef 318 vcpu->arch.shared->int_pending = !!*pending;
bbf45ba5
HB		 319}
320
c59a6a3e
SW		 321/* Check pending exceptions and deliver one, if possible. */
322void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
323{
324 WARN_ON_ONCE(!irqs_disabled());
325
326 kvmppc_core_check_exceptions(vcpu);
327
328 if (vcpu->arch.shared->msr & MSR_WE) {
329 local_irq_enable();
330 kvm_vcpu_block(vcpu);
331 local_irq_disable();
332
333 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
334 kvmppc_core_check_exceptions(vcpu);
335 };
336}
337
df6909e5
PM		 338int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
339{
340 int ret;
341
af8f38b3
AG		 342 if (!vcpu->arch.sane) {
343 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
344 return -EINVAL;
345 }
346
df6909e5 347 local_irq_disable();
1d1ef222 348
25051b5a
SW		 349 kvmppc_core_prepare_to_enter(vcpu);
350
1d1ef222
SW		 351 if (signal_pending(current)) {
352 kvm_run->exit_reason = KVM_EXIT_INTR;
353 ret = -EINTR;
354 goto out;
355 }
356
df6909e5
PM		 357 kvm_guest_enter();
358 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
359 kvm_guest_exit();
df6909e5 360
1d1ef222
SW		 361out:
362 local_irq_enable();
df6909e5
PM		 363 return ret;
364}
365
bbf45ba5
HB		 366/**
367 * kvmppc_handle_exit
368 *
369 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
370 */
371int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
372 unsigned int exit_nr)
373{
374 enum emulation_result er;
375 int r = RESUME_HOST;
376
73e75b41
HB		 377 /* update before a new last_exit_type is rewritten */
378 kvmppc_update_timing_stats(vcpu);
379
bbf45ba5
HB		 380 local_irq_enable();
381
382 run->exit_reason = KVM_EXIT_UNKNOWN;
383 run->ready_for_interrupt_injection = 1;
384
385 switch (exit_nr) {
386 case BOOKE_INTERRUPT_MACHINE_CHECK:
387 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
388 kvmppc_dump_vcpu(vcpu);
389 r = RESUME_HOST;
390 break;
391
392 case BOOKE_INTERRUPT_EXTERNAL:
7b701591 393 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1b6766c7
HB		 394 if (need_resched())
395 cond_resched();
396 r = RESUME_GUEST;
397 break;
398
bbf45ba5
HB		 399 case BOOKE_INTERRUPT_DECREMENTER:
400 /* Since we switched IVPR back to the host's value, the host
401 * handled this interrupt the moment we enabled interrupts.
402 * Now we just offer it a chance to reschedule the guest. */
7b701591 403 kvmppc_account_exit(vcpu, DEC_EXITS);
bbf45ba5
HB		 404 if (need_resched())
405 cond_resched();
bbf45ba5
HB		 406 r = RESUME_GUEST;
407 break;
408
409 case BOOKE_INTERRUPT_PROGRAM:
666e7252 410 if (vcpu->arch.shared->msr & MSR_PR) {
bbf45ba5
HB		 411 /* Program traps generated by user-level software must be handled
412 * by the guest kernel. */
daf5e271 413 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
bbf45ba5 414 r = RESUME_GUEST;
7b701591 415 kvmppc_account_exit(vcpu, USR_PR_INST);
bbf45ba5
HB		 416 break;
417 }
418
419 er = kvmppc_emulate_instruction(run, vcpu);
420 switch (er) {
421 case EMULATE_DONE:
73e75b41 422 /* don't overwrite subtypes, just account kvm_stats */
7b701591 423 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
bbf45ba5
HB		 424 /* Future optimization: only reload non-volatiles if
425 * they were actually modified by emulation. */
bbf45ba5
HB		 426 r = RESUME_GUEST_NV;
427 break;
428 case EMULATE_DO_DCR:
429 run->exit_reason = KVM_EXIT_DCR;
430 r = RESUME_HOST;
431 break;
432 case EMULATE_FAIL:
433 /* XXX Deliver Program interrupt to guest. */
5cf8ca22 434 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
bbf45ba5
HB		 435 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
436 /* For debugging, encode the failing instruction and
437 * report it to userspace. */
438 run->hw.hardware_exit_reason = ~0ULL << 32;
439 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
440 r = RESUME_HOST;
441 break;
442 default:
443 BUG();
444 }
445 break;
446
de368dce 447 case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892 448 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
7b701591 449 kvmppc_account_exit(vcpu, FP_UNAVAIL);
de368dce
CE		 450 r = RESUME_GUEST;
451 break;
452
4cd35f67
SW		 453#ifdef CONFIG_SPE
454 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
455 if (vcpu->arch.shared->msr & MSR_SPE)
456 kvmppc_vcpu_enable_spe(vcpu);
457 else
458 kvmppc_booke_queue_irqprio(vcpu,
459 BOOKE_IRQPRIO_SPE_UNAVAIL);
bb3a8a17
HB		 460 r = RESUME_GUEST;
461 break;
4cd35f67 462 }
bb3a8a17
HB		 463
464 case BOOKE_INTERRUPT_SPE_FP_DATA:
465 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
466 r = RESUME_GUEST;
467 break;
468
469 case BOOKE_INTERRUPT_SPE_FP_ROUND:
470 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
471 r = RESUME_GUEST;
472 break;
4cd35f67
SW		 473#else
474 case BOOKE_INTERRUPT_SPE_UNAVAIL:
475 /*
476 * Guest wants SPE, but host kernel doesn't support it. Send
477 * an "unimplemented operation" program check to the guest.
478 */
479 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
480 r = RESUME_GUEST;
481 break;
482
483 /*
484 * These really should never happen without CONFIG_SPE,
485 * as we should never enable the real MSR[SPE] in the guest.
486 */
487 case BOOKE_INTERRUPT_SPE_FP_DATA:
488 case BOOKE_INTERRUPT_SPE_FP_ROUND:
489 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
490 __func__, exit_nr, vcpu->arch.pc);
491 run->hw.hardware_exit_reason = exit_nr;
492 r = RESUME_HOST;
493 break;
494#endif
bb3a8a17 495
bbf45ba5 496 case BOOKE_INTERRUPT_DATA_STORAGE:
daf5e271
LY		 497 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
498 vcpu->arch.fault_esr);
7b701591 499 kvmppc_account_exit(vcpu, DSI_EXITS);
bbf45ba5
HB		 500 r = RESUME_GUEST;
501 break;
502
503 case BOOKE_INTERRUPT_INST_STORAGE:
daf5e271 504 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7b701591 505 kvmppc_account_exit(vcpu, ISI_EXITS);
bbf45ba5
HB		 506 r = RESUME_GUEST;
507 break;
508
509 case BOOKE_INTERRUPT_SYSCALL:
2a342ed5
AG		 510 if (!(vcpu->arch.shared->msr & MSR_PR) &&
511 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
512 /* KVM PV hypercalls */
513 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
514 r = RESUME_GUEST;
515 } else {
516 /* Guest syscalls */
517 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
518 }
7b701591 519 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
bbf45ba5
HB		 520 r = RESUME_GUEST;
521 break;
522
523 case BOOKE_INTERRUPT_DTLB_MISS: {
bbf45ba5 524 unsigned long eaddr = vcpu->arch.fault_dear;
7924bd41 525 int gtlb_index;
475e7cdd 526 gpa_t gpaddr;
bbf45ba5
HB		 527 gfn_t gfn;
528
a4cd8b23
SW		 529#ifdef CONFIG_KVM_E500
530 if (!(vcpu->arch.shared->msr & MSR_PR) &&
531 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
532 kvmppc_map_magic(vcpu);
533 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
534 r = RESUME_GUEST;
535
536 break;
537 }
538#endif
539
bbf45ba5 540 /* Check the guest TLB. */
fa86b8dd 541 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7924bd41 542 if (gtlb_index < 0) {
bbf45ba5 543 /* The guest didn't have a mapping for it. */
daf5e271
LY		 544 kvmppc_core_queue_dtlb_miss(vcpu,
545 vcpu->arch.fault_dear,
546 vcpu->arch.fault_esr);
b52a638c 547 kvmppc_mmu_dtlb_miss(vcpu);
7b701591 548 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
bbf45ba5
HB		 549 r = RESUME_GUEST;
550 break;
551 }
552
be8d1cae 553 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
475e7cdd 554 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB		 555
556 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
557 /* The guest TLB had a mapping, but the shadow TLB
558 * didn't, and it is RAM. This could be because:
559 * a) the entry is mapping the host kernel, or
560 * b) the guest used a large mapping which we're faking
561 * Either way, we need to satisfy the fault without
562 * invoking the guest. */
58a96214 563 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7b701591 564 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
bbf45ba5
HB		 565 r = RESUME_GUEST;
566 } else {
567 /* Guest has mapped and accessed a page which is not
568 * actually RAM. */
475e7cdd 569 vcpu->arch.paddr_accessed = gpaddr;
bbf45ba5 570 r = kvmppc_emulate_mmio(run, vcpu);
7b701591 571 kvmppc_account_exit(vcpu, MMIO_EXITS);
bbf45ba5
HB		 572 }
573
574 break;
575 }
576
577 case BOOKE_INTERRUPT_ITLB_MISS: {
bbf45ba5 578 unsigned long eaddr = vcpu->arch.pc;
89168618 579 gpa_t gpaddr;
bbf45ba5 580 gfn_t gfn;
7924bd41 581 int gtlb_index;
bbf45ba5
HB		 582
583 r = RESUME_GUEST;
584
585 /* Check the guest TLB. */
fa86b8dd 586 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7924bd41 587 if (gtlb_index < 0) {
bbf45ba5 588 /* The guest didn't have a mapping for it. */
d4cf3892 589 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
b52a638c 590 kvmppc_mmu_itlb_miss(vcpu);
7b701591 591 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
bbf45ba5
HB		 592 break;
593 }
594
7b701591 595 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
bbf45ba5 596
be8d1cae 597 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
89168618 598 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB		 599
600 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
601 /* The guest TLB had a mapping, but the shadow TLB
602 * didn't. This could be because:
603 * a) the entry is mapping the host kernel, or
604 * b) the guest used a large mapping which we're faking
605 * Either way, we need to satisfy the fault without
606 * invoking the guest. */
58a96214 607 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
bbf45ba5
HB		 608 } else {
609 /* Guest mapped and leaped at non-RAM! */
d4cf3892 610 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5
HB		 611 }
612
613 break;
614 }
615
6a0ab738
HB		 616 case BOOKE_INTERRUPT_DEBUG: {
617 u32 dbsr;
618
619 vcpu->arch.pc = mfspr(SPRN_CSRR0);
620
621 /* clear IAC events in DBSR register */
622 dbsr = mfspr(SPRN_DBSR);
623 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
624 mtspr(SPRN_DBSR, dbsr);
625
626 run->exit_reason = KVM_EXIT_DEBUG;
7b701591 627 kvmppc_account_exit(vcpu, DEBUG_EXITS);
6a0ab738
HB		 628 r = RESUME_HOST;
629 break;
630 }
631
bbf45ba5
HB		 632 default:
633 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
634 BUG();
635 }
636
637 local_irq_disable();
638
7e28e60e 639 kvmppc_core_prepare_to_enter(vcpu);
bbf45ba5 640
bbf45ba5
HB		 641 if (!(r & RESUME_HOST)) {
642 /* To avoid clobbering exit_reason, only check for signals if
643 * we aren't already exiting to userspace for some other
644 * reason. */
645 if (signal_pending(current)) {
646 run->exit_reason = KVM_EXIT_INTR;
647 r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
7b701591 648 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
bbf45ba5
HB		 649 }
650 }
651
652 return r;
653}
654
655/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
656int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
657{
082decf2 658 int i;
af8f38b3 659 int r;
082decf2 660
bbf45ba5 661 vcpu->arch.pc = 0;
666e7252 662 vcpu->arch.shared->msr = 0;
ecee273f 663 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
b5904972 664 vcpu->arch.shared->pir = vcpu->vcpu_id;
8e5b26b5 665 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
bbf45ba5 666
49dd2c49
HB		 667 vcpu->arch.shadow_pid = 1;
668
082decf2
HB		 669 /* Eye-catching numbers so we know if the guest takes an interrupt
670 * before it's programmed its own IVPR/IVORs. */
bbf45ba5 671 vcpu->arch.ivpr = 0x55550000;
082decf2
HB		 672 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
673 vcpu->arch.ivor[i] = 0x7700 | i * 4;
bbf45ba5 674
73e75b41
HB		 675 kvmppc_init_timing_stats(vcpu);
676
af8f38b3
AG		 677 r = kvmppc_core_vcpu_setup(vcpu);
678 kvmppc_sanity_check(vcpu);
679 return r;
bbf45ba5
HB		 680}
681
682int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
683{
684 int i;
685
686 regs->pc = vcpu->arch.pc;
992b5b29 687 regs->cr = kvmppc_get_cr(vcpu);
bbf45ba5
HB		 688 regs->ctr = vcpu->arch.ctr;
689 regs->lr = vcpu->arch.lr;
992b5b29 690 regs->xer = kvmppc_get_xer(vcpu);
666e7252 691 regs->msr = vcpu->arch.shared->msr;
de7906c3
AG		 692 regs->srr0 = vcpu->arch.shared->srr0;
693 regs->srr1 = vcpu->arch.shared->srr1;
bbf45ba5 694 regs->pid = vcpu->arch.pid;
a73a9599
AG		 695 regs->sprg0 = vcpu->arch.shared->sprg0;
696 regs->sprg1 = vcpu->arch.shared->sprg1;
697 regs->sprg2 = vcpu->arch.shared->sprg2;
698 regs->sprg3 = vcpu->arch.shared->sprg3;
b5904972
SW		 699 regs->sprg4 = vcpu->arch.shared->sprg4;
700 regs->sprg5 = vcpu->arch.shared->sprg5;
701 regs->sprg6 = vcpu->arch.shared->sprg6;
702 regs->sprg7 = vcpu->arch.shared->sprg7;
bbf45ba5
HB		 703
704 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 705 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
bbf45ba5
HB		 706
707 return 0;
708}
709
710int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
711{
712 int i;
713
714 vcpu->arch.pc = regs->pc;
992b5b29 715 kvmppc_set_cr(vcpu, regs->cr);
bbf45ba5
HB		 716 vcpu->arch.ctr = regs->ctr;
717 vcpu->arch.lr = regs->lr;
992b5b29 718 kvmppc_set_xer(vcpu, regs->xer);
b8fd68ac 719 kvmppc_set_msr(vcpu, regs->msr);
de7906c3
AG		 720 vcpu->arch.shared->srr0 = regs->srr0;
721 vcpu->arch.shared->srr1 = regs->srr1;
5ce941ee 722 kvmppc_set_pid(vcpu, regs->pid);
a73a9599
AG		 723 vcpu->arch.shared->sprg0 = regs->sprg0;
724 vcpu->arch.shared->sprg1 = regs->sprg1;
725 vcpu->arch.shared->sprg2 = regs->sprg2;
726 vcpu->arch.shared->sprg3 = regs->sprg3;
b5904972
SW		 727 vcpu->arch.shared->sprg4 = regs->sprg4;
728 vcpu->arch.shared->sprg5 = regs->sprg5;
729 vcpu->arch.shared->sprg6 = regs->sprg6;
730 vcpu->arch.shared->sprg7 = regs->sprg7;
bbf45ba5 731
8e5b26b5
AG		 732 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
733 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
bbf45ba5
HB		 734
735 return 0;
736}
737
5ce941ee
SW		 738static void get_sregs_base(struct kvm_vcpu *vcpu,
739 struct kvm_sregs *sregs)
740{
741 u64 tb = get_tb();
742
743 sregs->u.e.features |= KVM_SREGS_E_BASE;
744
745 sregs->u.e.csrr0 = vcpu->arch.csrr0;
746 sregs->u.e.csrr1 = vcpu->arch.csrr1;
747 sregs->u.e.mcsr = vcpu->arch.mcsr;
b5904972 748 sregs->u.e.esr = vcpu->arch.shared->esr;
5ce941ee
SW		 749 sregs->u.e.dear = vcpu->arch.shared->dar;
750 sregs->u.e.tsr = vcpu->arch.tsr;
751 sregs->u.e.tcr = vcpu->arch.tcr;
752 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
753 sregs->u.e.tb = tb;
754 sregs->u.e.vrsave = vcpu->arch.vrsave;
755}
756
757static int set_sregs_base(struct kvm_vcpu *vcpu,
758 struct kvm_sregs *sregs)
759{
760 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
761 return 0;
762
763 vcpu->arch.csrr0 = sregs->u.e.csrr0;
764 vcpu->arch.csrr1 = sregs->u.e.csrr1;
765 vcpu->arch.mcsr = sregs->u.e.mcsr;
b5904972 766 vcpu->arch.shared->esr = sregs->u.e.esr;
5ce941ee
SW		 767 vcpu->arch.shared->dar = sregs->u.e.dear;
768 vcpu->arch.vrsave = sregs->u.e.vrsave;
dfd4d47e 769 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
5ce941ee 770
dfd4d47e 771 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
5ce941ee 772 vcpu->arch.dec = sregs->u.e.dec;
dfd4d47e
SW		 773 kvmppc_emulate_dec(vcpu);
774 }
5ce941ee
SW		 775
776 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
dfd4d47e
SW		 777 vcpu->arch.tsr = sregs->u.e.tsr;
778 update_timer_ints(vcpu);
5ce941ee
SW		 779 }
780
781 return 0;
782}
783
784static void get_sregs_arch206(struct kvm_vcpu *vcpu,
785 struct kvm_sregs *sregs)
786{
787 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
788
841741f2 789 sregs->u.e.pir = vcpu->vcpu_id;
5ce941ee
SW		 790 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
791 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
792 sregs->u.e.decar = vcpu->arch.decar;
793 sregs->u.e.ivpr = vcpu->arch.ivpr;
794}
795
796static int set_sregs_arch206(struct kvm_vcpu *vcpu,
797 struct kvm_sregs *sregs)
798{
799 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
800 return 0;
801
841741f2 802 if (sregs->u.e.pir != vcpu->vcpu_id)
5ce941ee
SW		 803 return -EINVAL;
804
805 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
806 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
807 vcpu->arch.decar = sregs->u.e.decar;
808 vcpu->arch.ivpr = sregs->u.e.ivpr;
809
810 return 0;
811}
812
813void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
814{
815 sregs->u.e.features |= KVM_SREGS_E_IVOR;
816
817 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
818 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
819 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
820 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
821 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
822 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
823 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
824 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
825 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
826 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
827 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
828 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
829 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
830 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
831 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
832 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
833}
834
835int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
836{
837 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
838 return 0;
839
840 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
841 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
842 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
843 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
844 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
845 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
846 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
847 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
848 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
849 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
850 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
851 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
852 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
853 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
854 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
855 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
856
857 return 0;
858}
859
bbf45ba5
HB		 860int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
861 struct kvm_sregs *sregs)
862{
5ce941ee
SW		 863 sregs->pvr = vcpu->arch.pvr;
864
865 get_sregs_base(vcpu, sregs);
866 get_sregs_arch206(vcpu, sregs);
867 kvmppc_core_get_sregs(vcpu, sregs);
868 return 0;
bbf45ba5
HB		 869}
870
871int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
872 struct kvm_sregs *sregs)
873{
5ce941ee
SW		 874 int ret;
875
876 if (vcpu->arch.pvr != sregs->pvr)
877 return -EINVAL;
878
879 ret = set_sregs_base(vcpu, sregs);
880 if (ret < 0)
881 return ret;
882
883 ret = set_sregs_arch206(vcpu, sregs);
884 if (ret < 0)
885 return ret;
886
887 return kvmppc_core_set_sregs(vcpu, sregs);
bbf45ba5
HB		 888}
889
31f3438e
PM		 890int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
891{
892 return -EINVAL;
893}
894
895int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
896{
897 return -EINVAL;
898}
899
bbf45ba5
HB		 900int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
901{
902 return -ENOTSUPP;
903}
904
905int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
906{
907 return -ENOTSUPP;
908}
909
bbf45ba5
HB		 910int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
911 struct kvm_translation *tr)
912{
98001d8d
AK		 913 int r;
914
98001d8d 915 r = kvmppc_core_vcpu_translate(vcpu, tr);
98001d8d 916 return r;
bbf45ba5 917}
d9fbd03d 918
4e755758
AG		 919int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
920{
921 return -ENOTSUPP;
922}
923
f9e0554d
PM		 924int kvmppc_core_prepare_memory_region(struct kvm *kvm,
925 struct kvm_userspace_memory_region *mem)
926{
927 return 0;
928}
929
930void kvmppc_core_commit_memory_region(struct kvm *kvm,
931 struct kvm_userspace_memory_region *mem)
932{
933}
934
dfd4d47e
SW		 935void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
936{
937 vcpu->arch.tcr = new_tcr;
938 update_timer_ints(vcpu);
939}
940
941void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
942{
943 set_bits(tsr_bits, &vcpu->arch.tsr);
944 smp_wmb();
945 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
946 kvm_vcpu_kick(vcpu);
947}
948
949void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
950{
951 clear_bits(tsr_bits, &vcpu->arch.tsr);
952 update_timer_ints(vcpu);
953}
954
955void kvmppc_decrementer_func(unsigned long data)
956{
957 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
958
959 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
960}
961
94fa9d99
SW		 962void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
963{
964}
965
966void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
967{
968}
969
2986b8c7 970int __init kvmppc_booke_init(void)
d9fbd03d
HB		 971{
972 unsigned long ivor[16];
973 unsigned long max_ivor = 0;
974 int i;
975
976 /* We install our own exception handlers by hijacking IVPR. IVPR must
977 * be 16-bit aligned, so we need a 64KB allocation. */
978 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
979 VCPU_SIZE_ORDER);
980 if (!kvmppc_booke_handlers)
981 return -ENOMEM;
982
983 /* XXX make sure our handlers are smaller than Linux's */
984
985 /* Copy our interrupt handlers to match host IVORs. That way we don't
986 * have to swap the IVORs on every guest/host transition. */
987 ivor[0] = mfspr(SPRN_IVOR0);
988 ivor[1] = mfspr(SPRN_IVOR1);
989 ivor[2] = mfspr(SPRN_IVOR2);
990 ivor[3] = mfspr(SPRN_IVOR3);
991 ivor[4] = mfspr(SPRN_IVOR4);
992 ivor[5] = mfspr(SPRN_IVOR5);
993 ivor[6] = mfspr(SPRN_IVOR6);
994 ivor[7] = mfspr(SPRN_IVOR7);
995 ivor[8] = mfspr(SPRN_IVOR8);
996 ivor[9] = mfspr(SPRN_IVOR9);
997 ivor[10] = mfspr(SPRN_IVOR10);
998 ivor[11] = mfspr(SPRN_IVOR11);
999 ivor[12] = mfspr(SPRN_IVOR12);
1000 ivor[13] = mfspr(SPRN_IVOR13);
1001 ivor[14] = mfspr(SPRN_IVOR14);
1002 ivor[15] = mfspr(SPRN_IVOR15);
1003
1004 for (i = 0; i < 16; i++) {
1005 if (ivor[i] > max_ivor)
1006 max_ivor = ivor[i];
1007
1008 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1009 kvmppc_handlers_start + i * kvmppc_handler_len,
1010 kvmppc_handler_len);
1011 }
1012 flush_icache_range(kvmppc_booke_handlers,
1013 kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
1014
db93f574 1015 return 0;
d9fbd03d
HB		 1016}
1017
db93f574 1018void __exit kvmppc_booke_exit(void)
d9fbd03d
HB		 1019{
1020 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1021 kvm_exit();
1022}
Linux kernel - Deliverables
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