[deliverable/linux.git] / arch / powerpc / platforms / embedded6xx / mpc7448_hpc2.c

/*
 * mpc7448_hpc2.c
 *
 * Board setup routines for the Freescale mpc7448hpc2(taiga) platform
 *
 * Author: Jacob Pan
 *	 jacob.pan@freescale.com
 * Author: Xianghua Xiao
 *       x.xiao@freescale.com
 * Maintainer: Roy Zang <tie-fei.zang@freescale.com>
 * 	Add Flat Device Tree support fot mpc7448hpc2 board
 *
 * Copyright 2004-2006 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/kdev_t.h>
#include <linux/console.h>
#include <linux/extable.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_core.h>

#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/tsi108.h>
#include <asm/pci-bridge.h>
#include <asm/reg.h>
#include <mm/mmu_decl.h>
#include <asm/tsi108_pci.h>
#include <asm/tsi108_irq.h>
#include <asm/mpic.h>

#undef DEBUG
#ifdef DEBUG
#define DBG(fmt...) do { printk(fmt); } while(0)
#else
#define DBG(fmt...) do { } while(0)
#endif

#define MPC7448HPC2_PCI_CFG_PHYS 0xfb000000

int mpc7448_hpc2_exclude_device(struct pci_controller *hose,
				u_char bus, u_char devfn)
{
	if (bus == 0 && PCI_SLOT(devfn) == 0)
		return PCIBIOS_DEVICE_NOT_FOUND;
	else
		return PCIBIOS_SUCCESSFUL;
}

static void __init mpc7448_hpc2_setup_arch(void)
{
	struct device_node *np;
	if (ppc_md.progress)
		ppc_md.progress("mpc7448_hpc2_setup_arch():set_bridge", 0);

	tsi108_csr_vir_base = get_vir_csrbase();

	/* setup PCI host bridge */
#ifdef CONFIG_PCI
	for_each_compatible_node(np, "pci", "tsi108-pci")
		tsi108_setup_pci(np, MPC7448HPC2_PCI_CFG_PHYS, 0);

	ppc_md.pci_exclude_device = mpc7448_hpc2_exclude_device;
	if (ppc_md.progress)
		ppc_md.progress("tsi108: resources set", 0x100);
#endif

	printk(KERN_INFO "MPC7448HPC2 (TAIGA) Platform\n");
	printk(KERN_INFO
	       "Jointly ported by Freescale and Tundra Semiconductor\n");
	printk(KERN_INFO
	       "Enabling L2 cache then enabling the HID0 prefetch engine.\n");
}

/*
 * Interrupt setup and service.  Interrupts on the mpc7448_hpc2 come
 * from the four external INT pins, PCI interrupts are routed via
 * PCI interrupt control registers, it generates internal IRQ23
 *
 * Interrupt routing on the Taiga Board:
 * TSI108:PB_INT[0] -> CPU0:INT#
 * TSI108:PB_INT[1] -> CPU0:MCP#
 * TSI108:PB_INT[2] -> N/C
 * TSI108:PB_INT[3] -> N/C
 */
static void __init mpc7448_hpc2_init_IRQ(void)
{
	struct mpic *mpic;
#ifdef CONFIG_PCI
	unsigned int cascade_pci_irq;
	struct device_node *tsi_pci;
	struct device_node *cascade_node = NULL;
#endif

	mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
			MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
			24, 0,
			"Tsi108_PIC");

	BUG_ON(mpic == NULL);

	mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);

	mpic_init(mpic);

#ifdef CONFIG_PCI
	tsi_pci = of_find_node_by_type(NULL, "pci");
	if (tsi_pci == NULL) {
		printk("%s: No tsi108 pci node found !\n", __func__);
		return;
	}
	cascade_node = of_find_node_by_type(NULL, "pic-router");
	if (cascade_node == NULL) {
		printk("%s: No tsi108 pci cascade node found !\n", __func__);
		return;
	}

	cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
	DBG("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__,
	    (u32) cascade_pci_irq);
	tsi108_pci_int_init(cascade_node);
	irq_set_handler_data(cascade_pci_irq, mpic);
	irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
#endif
	/* Configure MPIC outputs to CPU0 */
	tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
}

void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
{
	seq_printf(m, "vendor\t\t: Freescale Semiconductor\n");
}

static void __noreturn mpc7448_hpc2_restart(char *cmd)
{
	local_irq_disable();

	/* Set exception prefix high - to the firmware */
	_nmask_and_or_msr(0, MSR_IP);

	for (;;) ;		/* Spin until reset happens */
}

/*
 * Called very early, device-tree isn't unflattened
 */
static int __init mpc7448_hpc2_probe(void)
{
	if (!of_machine_is_compatible("mpc74xx"))
		return 0;
	return 1;
}

static int mpc7448_machine_check_exception(struct pt_regs *regs)
{
	const struct exception_table_entry *entry;

	/* Are we prepared to handle this fault */
	if ((entry = search_exception_tables(regs->nip)) != NULL) {
		tsi108_clear_pci_cfg_error();
		regs->msr |= MSR_RI;
		regs->nip = entry->fixup;
		return 1;
	}
	return 0;
}

define_machine(mpc7448_hpc2){
	.name 			= "MPC7448 HPC2",
	.probe 			= mpc7448_hpc2_probe,
	.setup_arch 		= mpc7448_hpc2_setup_arch,
	.init_IRQ 		= mpc7448_hpc2_init_IRQ,
	.show_cpuinfo 		= mpc7448_hpc2_show_cpuinfo,
	.get_irq 		= mpic_get_irq,
	.restart 		= mpc7448_hpc2_restart,
	.calibrate_decr 	= generic_calibrate_decr,
	.machine_check_exception= mpc7448_machine_check_exception,
	.progress 		= udbg_progress,
};
Commit	Line	Data
c5d56332 ZR	1	/*
	2	* mpc7448_hpc2.c
	3	*
c4342ff9	4	* Board setup routines for the Freescale mpc7448hpc2(taiga) platform
c5d56332 ZR	5	*
	6	* Author: Jacob Pan
	7	* jacob.pan@freescale.com
	8	* Author: Xianghua Xiao
	9	* x.xiao@freescale.com
	10	* Maintainer: Roy Zang <tie-fei.zang@freescale.com>
	11	* Add Flat Device Tree support fot mpc7448hpc2 board
	12	*
	13	* Copyright 2004-2006 Freescale Semiconductor, Inc.
	14	*
c4342ff9 ZR	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License
	17	* as published by the Free Software Foundation; either version
	18	* 2 of the License, or (at your option) any later version.
c5d56332 ZR	19	*/
c5d56332 ZR	20
c5d56332 ZR	21	#include <linux/stddef.h>
	22	#include <linux/kernel.h>
	23	#include <linux/pci.h>
	24	#include <linux/kdev_t.h>
	25	#include <linux/console.h>
8a39b05f	26	#include <linux/extable.h>
c5d56332 ZR	27	#include <linux/delay.h>
c5d56332 ZR	28	#include <linux/irq.h>
c5d56332 ZR	29	#include <linux/seq_file.h>
	30	#include <linux/root_dev.h>
	31	#include <linux/serial.h>
	32	#include <linux/tty.h>
	33	#include <linux/serial_core.h>
	34
c5d56332 ZR	35	#include <asm/time.h>
	36	#include <asm/machdep.h>
	37	#include <asm/prom.h>
	38	#include <asm/udbg.h>
	39	#include <asm/tsi108.h>
	40	#include <asm/pci-bridge.h>
	41	#include <asm/reg.h>
	42	#include <mm/mmu_decl.h>
08390db0	43	#include <asm/tsi108_pci.h>
c5d56332 ZR	44	#include <asm/tsi108_irq.h>
	45	#include <asm/mpic.h>
	46
	47	#undef DEBUG
	48	#ifdef DEBUG
	49	#define DBG(fmt...) do { printk(fmt); } while(0)
	50	#else
	51	#define DBG(fmt...) do { } while(0)
	52	#endif
	53
05ad6a91 JB	54	#define MPC7448HPC2_PCI_CFG_PHYS 0xfb000000
05ad6a91 JB	55
7d52c7b0 KG	56	int mpc7448_hpc2_exclude_device(struct pci_controller *hose,
7d52c7b0 KG	57	u_char bus, u_char devfn)
c5d56332 ZR	58	{
	59	if (bus == 0 && PCI_SLOT(devfn) == 0)
	60	return PCIBIOS_DEVICE_NOT_FOUND;
	61	else
	62	return PCIBIOS_SUCCESSFUL;
	63	}
	64
c5d56332 ZR	65	static void __init mpc7448_hpc2_setup_arch(void)
c5d56332 ZR	66	{
c5d56332 ZR	67	struct device_node *np;
	68	if (ppc_md.progress)
	69	ppc_md.progress("mpc7448_hpc2_setup_arch():set_bridge", 0);
	70
c5d56332 ZR	71	tsi108_csr_vir_base = get_vir_csrbase();
c5d56332 ZR	72
c5d56332 ZR	73	/* setup PCI host bridge */
c5d56332 ZR	74	#ifdef CONFIG_PCI
c9438aff	75	for_each_compatible_node(np, "pci", "tsi108-pci")
05ad6a91	76	tsi108_setup_pci(np, MPC7448HPC2_PCI_CFG_PHYS, 0);
c5d56332 ZR	77
	78	ppc_md.pci_exclude_device = mpc7448_hpc2_exclude_device;
	79	if (ppc_md.progress)
	80	ppc_md.progress("tsi108: resources set", 0x100);
	81	#endif
	82
	83	printk(KERN_INFO "MPC7448HPC2 (TAIGA) Platform\n");
	84	printk(KERN_INFO
	85	"Jointly ported by Freescale and Tundra Semiconductor\n");
	86	printk(KERN_INFO
	87	"Enabling L2 cache then enabling the HID0 prefetch engine.\n");
	88	}
	89
	90	/*
33567a02	91	* Interrupt setup and service. Interrupts on the mpc7448_hpc2 come
c5d56332 ZR	92	* from the four external INT pins, PCI interrupts are routed via
	93	* PCI interrupt control registers, it generates internal IRQ23
	94	*
	95	* Interrupt routing on the Taiga Board:
	96	* TSI108:PB_INT[0] -> CPU0:INT#
	97	* TSI108:PB_INT[1] -> CPU0:MCP#
	98	* TSI108:PB_INT[2] -> N/C
	99	* TSI108:PB_INT[3] -> N/C
	100	*/
	101	static void __init mpc7448_hpc2_init_IRQ(void)
	102	{
	103	struct mpic *mpic;
5873c9bd	104	#ifdef CONFIG_PCI
c4342ff9 ZR	105	unsigned int cascade_pci_irq;
c4342ff9 ZR	106	struct device_node *tsi_pci;
5873c9bd ZR	107	struct device_node *cascade_node = NULL;
5873c9bd ZR	108	#endif
c5d56332	109
e55d7f73	110	mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN \|
7233593b	111	MPIC_SPV_EOI \| MPIC_NO_PTHROU_DIS \| MPIC_REGSET_TSI108,
5019609f	112	24, 0,
c4342ff9	113	"Tsi108_PIC");
c5d56332	114
5873c9bd ZR	115	BUG_ON(mpic == NULL);
5873c9bd ZR	116
e7a98675	117	mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
5873c9bd	118
c5d56332	119	mpic_init(mpic);
c4342ff9	120
5873c9bd	121	#ifdef CONFIG_PCI
c4342ff9	122	tsi_pci = of_find_node_by_type(NULL, "pci");
5873c9bd	123	if (tsi_pci == NULL) {
e48b1b45	124	printk("%s: No tsi108 pci node found !\n", __func__);
c4342ff9 ZR	125	return;
c4342ff9 ZR	126	}
5873c9bd ZR	127	cascade_node = of_find_node_by_type(NULL, "pic-router");
5873c9bd ZR	128	if (cascade_node == NULL) {
e48b1b45	129	printk("%s: No tsi108 pci cascade node found !\n", __func__);
5873c9bd ZR	130	return;
5873c9bd ZR	131	}
c4342ff9 ZR	132
c4342ff9 ZR	133	cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
e48b1b45	134	DBG("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__,
5873c9bd ZR	135	(u32) cascade_pci_irq);
5873c9bd ZR	136	tsi108_pci_int_init(cascade_node);
ec775d0e TG	137	irq_set_handler_data(cascade_pci_irq, mpic);
ec775d0e TG	138	irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
5873c9bd	139	#endif
c5d56332 ZR	140	/* Configure MPIC outputs to CPU0 */
	141	tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
	142	}
	143
	144	void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
	145	{
	146	seq_printf(m, "vendor\t\t: Freescale Semiconductor\n");
c5d56332 ZR	147	}
c5d56332 ZR	148
95ec77c0	149	static void __noreturn mpc7448_hpc2_restart(char *cmd)
c5d56332 ZR	150	{
	151	local_irq_disable();
	152
	153	/* Set exception prefix high - to the firmware */
	154	_nmask_and_or_msr(0, MSR_IP);
	155
	156	for (;;) ; /* Spin until reset happens */
	157	}
	158
c5d56332 ZR	159	/*
	160	* Called very early, device-tree isn't unflattened
	161	*/
	162	static int __init mpc7448_hpc2_probe(void)
	163	{
56571384	164	if (!of_machine_is_compatible("mpc74xx"))
c5d56332 ZR	165	return 0;
	166	return 1;
	167	}
	168
	169	static int mpc7448_machine_check_exception(struct pt_regs *regs)
	170	{
c5d56332 ZR	171	const struct exception_table_entry *entry;
	172
	173	/* Are we prepared to handle this fault */
	174	if ((entry = search_exception_tables(regs->nip)) != NULL) {
	175	tsi108_clear_pci_cfg_error();
	176	regs->msr \|= MSR_RI;
	177	regs->nip = entry->fixup;
	178	return 1;
	179	}
	180	return 0;
c5d56332	181	}
c4342ff9	182
c5d56332 ZR	183	define_machine(mpc7448_hpc2){
	184	.name = "MPC7448 HPC2",
	185	.probe = mpc7448_hpc2_probe,
	186	.setup_arch = mpc7448_hpc2_setup_arch,
	187	.init_IRQ = mpc7448_hpc2_init_IRQ,
	188	.show_cpuinfo = mpc7448_hpc2_show_cpuinfo,
	189	.get_irq = mpic_get_irq,
c5d56332 ZR	190	.restart = mpc7448_hpc2_restart,
	191	.calibrate_decr = generic_calibrate_decr,
	192	.machine_check_exception= mpc7448_machine_check_exception,
	193	.progress = udbg_progress,
	194	};