[deliverable/linux.git] / arch / powerpc / platforms / pseries / pci.c

/*
 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
 *
 * pSeries specific routines for PCI.
 * 
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *    
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * 
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */

#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/string.h>

#include <asm/eeh.h>
#include <asm/pci-bridge.h>
#include <asm/prom.h>
#include <asm/ppc-pci.h>
#include "pseries.h"

#if 0
void pcibios_name_device(struct pci_dev *dev)
{
	struct device_node *dn;

	/*
	 * Add IBM loc code (slot) as a prefix to the device names for service
	 */
	dn = pci_device_to_OF_node(dev);
	if (dn) {
		const char *loc_code = of_get_property(dn, "ibm,loc-code",
				NULL);
		if (loc_code) {
			int loc_len = strlen(loc_code);
			if (loc_len < sizeof(dev->dev.name)) {
				memmove(dev->dev.name+loc_len+1, dev->dev.name,
					sizeof(dev->dev.name)-loc_len-1);
				memcpy(dev->dev.name, loc_code, loc_len);
				dev->dev.name[loc_len] = ' ';
				dev->dev.name[sizeof(dev->dev.name)-1] = '\0';
			}
		}
	}
}   
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device);
#endif

static void __init pSeries_request_regions(void)
{
	if (!isa_io_base)
		return;

	request_region(0x20,0x20,"pic1");
	request_region(0xa0,0x20,"pic2");
	request_region(0x00,0x20,"dma1");
	request_region(0x40,0x20,"timer");
	request_region(0x80,0x10,"dma page reg");
	request_region(0xc0,0x20,"dma2");
}

void __init pSeries_final_fixup(void)
{
	pSeries_request_regions();

	eeh_addr_cache_build();
}

/*
 * Assume the winbond 82c105 is the IDE controller on a
 * p610/p615/p630. We should probably be more careful in case
 * someone tries to plug in a similar adapter.
 */
static void fixup_winbond_82c105(struct pci_dev* dev)
{
	int i;
	unsigned int reg;

	if (!machine_is(pseries))
		return;

	printk("Using INTC for W82c105 IDE controller.\n");
	pci_read_config_dword(dev, 0x40, &reg);
	/* Enable LEGIRQ to use INTC instead of ISA interrupts */
	pci_write_config_dword(dev, 0x40, reg | (1<<11));

	for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i) {
		/* zap the 2nd function of the winbond chip */
		if (dev->resource[i].flags & IORESOURCE_IO
		    && dev->bus->number == 0 && dev->devfn == 0x81)
			dev->resource[i].flags &= ~IORESOURCE_IO;
		if (dev->resource[i].start == 0 && dev->resource[i].end) {
			dev->resource[i].flags = 0;
			dev->resource[i].end = 0;
		}
	}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
			 fixup_winbond_82c105);

int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
{
	struct device_node *dn, *pdn;
	struct pci_bus *bus;
	u32 pcie_link_speed_stats[2];
	int rc;

	bus = bridge->bus;

	/* Rely on the pcibios_free_controller_deferred() callback. */
	pci_set_host_bridge_release(bridge, pcibios_free_controller_deferred,
					(void *) pci_bus_to_host(bus));

	dn = pcibios_get_phb_of_node(bus);
	if (!dn)
		return 0;

	for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) {
		rc = of_property_read_u32_array(pdn,
				"ibm,pcie-link-speed-stats",
				&pcie_link_speed_stats[0], 2);
		if (!rc)
			break;
	}

	of_node_put(pdn);

	if (rc) {
		pr_debug("no ibm,pcie-link-speed-stats property\n");
		return 0;
	}

	switch (pcie_link_speed_stats[0]) {
	case 0x01:
		bus->max_bus_speed = PCIE_SPEED_2_5GT;
		break;
	case 0x02:
		bus->max_bus_speed = PCIE_SPEED_5_0GT;
		break;
	case 0x04:
		bus->max_bus_speed = PCIE_SPEED_8_0GT;
		break;
	default:
		bus->max_bus_speed = PCI_SPEED_UNKNOWN;
		break;
	}

	switch (pcie_link_speed_stats[1]) {
	case 0x01:
		bus->cur_bus_speed = PCIE_SPEED_2_5GT;
		break;
	case 0x02:
		bus->cur_bus_speed = PCIE_SPEED_5_0GT;
		break;
	case 0x04:
		bus->cur_bus_speed = PCIE_SPEED_8_0GT;
		break;
	default:
		bus->cur_bus_speed = PCI_SPEED_UNKNOWN;
		break;
	}

	return 0;
}
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 2001 Dave Engebretsen, IBM Corporation
	3	* Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
	4	*
	5	* pSeries specific routines for PCI.
	6	*
1da177e4 LT	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
c5a3c2e5 AB	22	#include <linux/init.h>
c5a3c2e5 AB	23	#include <linux/ioport.h>
1da177e4	24	#include <linux/kernel.h>
1da177e4 LT	25	#include <linux/pci.h>
1da177e4 LT	26	#include <linux/string.h>
1da177e4	27
c3b9d9ab	28	#include <asm/eeh.h>
1da177e4	29	#include <asm/pci-bridge.h>
c5a3c2e5	30	#include <asm/prom.h>
d387899f	31	#include <asm/ppc-pci.h>
1217d34b	32	#include "pseries.h"
1da177e4	33
1da177e4 LT	34	#if 0
	35	void pcibios_name_device(struct pci_dev *dev)
	36	{
	37	struct device_node *dn;
	38
	39	/*
	40	* Add IBM loc code (slot) as a prefix to the device names for service
	41	*/
	42	dn = pci_device_to_OF_node(dev);
	43	if (dn) {
724c6abf TB	44	const char *loc_code = of_get_property(dn, "ibm,loc-code",
724c6abf TB	45	NULL);
1da177e4 LT	46	if (loc_code) {
	47	int loc_len = strlen(loc_code);
	48	if (loc_len < sizeof(dev->dev.name)) {
	49	memmove(dev->dev.name+loc_len+1, dev->dev.name,
	50	sizeof(dev->dev.name)-loc_len-1);
	51	memcpy(dev->dev.name, loc_code, loc_len);
	52	dev->dev.name[loc_len] = ' ';
	53	dev->dev.name[sizeof(dev->dev.name)-1] = '\0';
	54	}
	55	}
	56	}
	57	}
	58	DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device);
	59	#endif
	60
1da177e4 LT	61	static void __init pSeries_request_regions(void)
	62	{
	63	if (!isa_io_base)
	64	return;
	65
	66	request_region(0x20,0x20,"pic1");
	67	request_region(0xa0,0x20,"pic2");
	68	request_region(0x00,0x20,"dma1");
	69	request_region(0x40,0x20,"timer");
	70	request_region(0x80,0x10,"dma page reg");
	71	request_region(0xc0,0x20,"dma2");
	72	}
	73
	74	void __init pSeries_final_fixup(void)
	75	{
1da177e4 LT	76	pSeries_request_regions();
1da177e4 LT	77
3ab96a02	78	eeh_addr_cache_build();
1da177e4 LT	79	}
	80
	81	/*
	82	* Assume the winbond 82c105 is the IDE controller on a
0bcace3b	83	* p610/p615/p630. We should probably be more careful in case
1da177e4 LT	84	* someone tries to plug in a similar adapter.
	85	*/
	86	static void fixup_winbond_82c105(struct pci_dev* dev)
	87	{
	88	int i;
	89	unsigned int reg;
	90
e8222502	91	if (!machine_is(pseries))
1da177e4 LT	92	return;
	93
	94	printk("Using INTC for W82c105 IDE controller.\n");
	95	pci_read_config_dword(dev, 0x40, &reg);
	96	/* Enable LEGIRQ to use INTC instead of ISA interrupts */
	97	pci_write_config_dword(dev, 0x40, reg \| (1<<11));
	98
	99	for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i) {
	100	/* zap the 2nd function of the winbond chip */
	101	if (dev->resource[i].flags & IORESOURCE_IO
	102	&& dev->bus->number == 0 && dev->devfn == 0x81)
	103	dev->resource[i].flags &= ~IORESOURCE_IO;
2d99c41f OH	104	if (dev->resource[i].start == 0 && dev->resource[i].end) {
	105	dev->resource[i].flags = 0;
	106	dev->resource[i].end = 0;
	107	}
1da177e4 LT	108	}
	109	}
	110	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
	111	fixup_winbond_82c105);
d82fb31a KSS	112
	113	int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
	114	{
	115	struct device_node dn, pdn;
	116	struct pci_bus *bus;
b020cc6c KSS	117	u32 pcie_link_speed_stats[2];
b020cc6c KSS	118	int rc;
d82fb31a KSS	119
	120	bus = bridge->bus;
	121
2dd9c11b MFO	122	/* Rely on the pcibios_free_controller_deferred() callback. */
	123	pci_set_host_bridge_release(bridge, pcibios_free_controller_deferred,
	124	(void *) pci_bus_to_host(bus));
	125
d82fb31a KSS	126	dn = pcibios_get_phb_of_node(bus);
	127	if (!dn)
	128	return 0;
	129
	130	for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) {
b020cc6c KSS	131	rc = of_property_read_u32_array(pdn,
	132	"ibm,pcie-link-speed-stats",
	133	&pcie_link_speed_stats[0], 2);
	134	if (!rc)
d82fb31a KSS	135	break;
	136	}
	137
	138	of_node_put(pdn);
	139
b020cc6c	140	if (rc) {
7aa189c8	141	pr_debug("no ibm,pcie-link-speed-stats property\n");
d82fb31a KSS	142	return 0;
	143	}
	144
b020cc6c	145	switch (pcie_link_speed_stats[0]) {
d82fb31a KSS	146	case 0x01:
	147	bus->max_bus_speed = PCIE_SPEED_2_5GT;
	148	break;
	149	case 0x02:
	150	bus->max_bus_speed = PCIE_SPEED_5_0GT;
	151	break;
49d9684a KSS	152	case 0x04:
	153	bus->max_bus_speed = PCIE_SPEED_8_0GT;
	154	break;
d82fb31a KSS	155	default:
	156	bus->max_bus_speed = PCI_SPEED_UNKNOWN;
	157	break;
	158	}
	159
b020cc6c	160	switch (pcie_link_speed_stats[1]) {
d82fb31a KSS	161	case 0x01:
	162	bus->cur_bus_speed = PCIE_SPEED_2_5GT;
	163	break;
	164	case 0x02:
	165	bus->cur_bus_speed = PCIE_SPEED_5_0GT;
	166	break;
49d9684a KSS	167	case 0x04:
	168	bus->cur_bus_speed = PCIE_SPEED_8_0GT;
	169	break;
d82fb31a KSS	170	default:
	171	bus->cur_bus_speed = PCI_SPEED_UNKNOWN;
	172	break;
	173	}
	174
	175	return 0;
	176	}