Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * S390 low-level entry points. |
3 | * | |
a53c8fab | 4 | * Copyright IBM Corp. 1999, 2012 |
1da177e4 | 5 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
6 | * Hartmut Penner (hp@de.ibm.com), |
7 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 8 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
9 | */ |
10 | ||
2bc89b5e | 11 | #include <linux/init.h> |
144d634a | 12 | #include <linux/linkage.h> |
eb608fb3 | 13 | #include <asm/processor.h> |
1da177e4 | 14 | #include <asm/cache.h> |
1da177e4 LT |
15 | #include <asm/errno.h> |
16 | #include <asm/ptrace.h> | |
17 | #include <asm/thread_info.h> | |
0013a854 | 18 | #include <asm/asm-offsets.h> |
1da177e4 LT |
19 | #include <asm/unistd.h> |
20 | #include <asm/page.h> | |
eb546195 | 21 | #include <asm/sigp.h> |
1f44a225 | 22 | #include <asm/irq.h> |
9977e886 | 23 | #include <asm/vx-insn.h> |
83abeffb HB |
24 | #include <asm/setup.h> |
25 | #include <asm/nmi.h> | |
1da177e4 | 26 | |
c5328901 MS |
27 | __PT_R0 = __PT_GPRS |
28 | __PT_R1 = __PT_GPRS + 8 | |
29 | __PT_R2 = __PT_GPRS + 16 | |
30 | __PT_R3 = __PT_GPRS + 24 | |
31 | __PT_R4 = __PT_GPRS + 32 | |
32 | __PT_R5 = __PT_GPRS + 40 | |
33 | __PT_R6 = __PT_GPRS + 48 | |
34 | __PT_R7 = __PT_GPRS + 56 | |
35 | __PT_R8 = __PT_GPRS + 64 | |
36 | __PT_R9 = __PT_GPRS + 72 | |
37 | __PT_R10 = __PT_GPRS + 80 | |
38 | __PT_R11 = __PT_GPRS + 88 | |
39 | __PT_R12 = __PT_GPRS + 96 | |
40 | __PT_R13 = __PT_GPRS + 104 | |
41 | __PT_R14 = __PT_GPRS + 112 | |
42 | __PT_R15 = __PT_GPRS + 120 | |
1da177e4 LT |
43 | |
44 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
45 | STACK_SIZE = 1 << STACK_SHIFT | |
dc7ee00d | 46 | STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE |
1da177e4 | 47 | |
2a0a5b22 JW |
48 | _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
49 | _TIF_UPROBE) | |
d3a73acb MS |
50 | _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ |
51 | _TIF_SYSCALL_TRACEPOINT) | |
9977e886 | 52 | _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU) |
d3a73acb | 53 | _PIF_WORK = (_PIF_PER_TRAP) |
1da177e4 | 54 | |
9977e886 | 55 | #define BASED(name) name-cleanup_critical(%r13) |
1da177e4 | 56 | |
1f194a4c | 57 | .macro TRACE_IRQS_ON |
c5328901 | 58 | #ifdef CONFIG_TRACE_IRQFLAGS |
6a2df3a8 MS |
59 | basr %r2,%r0 |
60 | brasl %r14,trace_hardirqs_on_caller | |
c5328901 | 61 | #endif |
1f194a4c HC |
62 | .endm |
63 | ||
64 | .macro TRACE_IRQS_OFF | |
c5328901 | 65 | #ifdef CONFIG_TRACE_IRQFLAGS |
6a2df3a8 MS |
66 | basr %r2,%r0 |
67 | brasl %r14,trace_hardirqs_off_caller | |
411788ea | 68 | #endif |
c5328901 | 69 | .endm |
411788ea | 70 | |
411788ea | 71 | .macro LOCKDEP_SYS_EXIT |
c5328901 MS |
72 | #ifdef CONFIG_LOCKDEP |
73 | tm __PT_PSW+1(%r11),0x01 # returning to user ? | |
74 | jz .+10 | |
411788ea | 75 | brasl %r14,lockdep_sys_exit |
1f194a4c | 76 | #endif |
1da177e4 | 77 | .endm |
1da177e4 | 78 | |
c5328901 | 79 | .macro CHECK_STACK stacksize,savearea |
63b12246 | 80 | #ifdef CONFIG_CHECK_STACK |
c5328901 MS |
81 | tml %r15,\stacksize - CONFIG_STACK_GUARD |
82 | lghi %r14,\savearea | |
83 | jz stack_overflow | |
63b12246 | 84 | #endif |
63b12246 MS |
85 | .endm |
86 | ||
2acb94f4 | 87 | .macro SWITCH_ASYNC savearea,timer |
c5328901 MS |
88 | tmhh %r8,0x0001 # interrupting from user ? |
89 | jnz 1f | |
90 | lgr %r14,%r9 | |
91 | slg %r14,BASED(.Lcritical_start) | |
92 | clg %r14,BASED(.Lcritical_length) | |
1da177e4 | 93 | jhe 0f |
c5328901 | 94 | lghi %r11,\savearea # inside critical section, do cleanup |
1da177e4 | 95 | brasl %r14,cleanup_critical |
c5328901 | 96 | tmhh %r8,0x0001 # retest problem state after cleanup |
1da177e4 | 97 | jnz 1f |
2acb94f4 | 98 | 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? |
1da177e4 | 99 | slgr %r14,%r15 |
2acb94f4 | 100 | srag %r14,%r14,STACK_SHIFT |
a359bb11 | 101 | jnz 2f |
2acb94f4 | 102 | CHECK_STACK 1<<STACK_SHIFT,\savearea |
dc7ee00d | 103 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
a359bb11 MS |
104 | j 3f |
105 | 1: LAST_BREAK %r14 | |
106 | UPDATE_VTIME %r14,%r15,\timer | |
2acb94f4 | 107 | 2: lg %r15,__LC_ASYNC_STACK # load async stack |
a359bb11 | 108 | 3: la %r11,STACK_FRAME_OVERHEAD(%r15) |
25d83cbf | 109 | .endm |
1da177e4 | 110 | |
a359bb11 MS |
111 | .macro UPDATE_VTIME w1,w2,enter_timer |
112 | lg \w1,__LC_EXIT_TIMER | |
113 | lg \w2,__LC_LAST_UPDATE_TIMER | |
114 | slg \w1,\enter_timer | |
115 | slg \w2,__LC_EXIT_TIMER | |
116 | alg \w1,__LC_USER_TIMER | |
117 | alg \w2,__LC_SYSTEM_TIMER | |
118 | stg \w1,__LC_USER_TIMER | |
119 | stg \w2,__LC_SYSTEM_TIMER | |
c5328901 | 120 | mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer |
1da177e4 LT |
121 | .endm |
122 | ||
c5328901 MS |
123 | .macro LAST_BREAK scratch |
124 | srag \scratch,%r10,23 | |
125 | jz .+10 | |
126 | stg %r10,__TI_last_break(%r12) | |
86f2552b MS |
127 | .endm |
128 | ||
1e54622e | 129 | .macro REENABLE_IRQS |
c5328901 MS |
130 | stg %r8,__LC_RETURN_PSW |
131 | ni __LC_RETURN_PSW,0xbf | |
132 | ssm __LC_RETURN_PSW | |
1e54622e MS |
133 | .endm |
134 | ||
473e66ba | 135 | .macro STCK savearea |
d652d596 | 136 | #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES |
473e66ba HC |
137 | .insn s,0xb27c0000,\savearea # store clock fast |
138 | #else | |
139 | .insn s,0xb2050000,\savearea # store clock | |
140 | #endif | |
141 | .endm | |
142 | ||
83abeffb HB |
143 | /* |
144 | * The TSTMSK macro generates a test-under-mask instruction by | |
145 | * calculating the memory offset for the specified mask value. | |
146 | * Mask value can be any constant. The macro shifts the mask | |
147 | * value to calculate the memory offset for the test-under-mask | |
148 | * instruction. | |
149 | */ | |
150 | .macro TSTMSK addr, mask, size=8, bytepos=0 | |
151 | .if (\bytepos < \size) && (\mask >> 8) | |
152 | .if (\mask & 0xff) | |
153 | .error "Mask exceeds byte boundary" | |
154 | .endif | |
155 | TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" | |
156 | .exitm | |
157 | .endif | |
158 | .ifeq \mask | |
159 | .error "Mask must not be zero" | |
160 | .endif | |
161 | off = \size - \bytepos - 1 | |
162 | tm off+\addr, \mask | |
163 | .endm | |
164 | ||
860dba45 MS |
165 | .section .kprobes.text, "ax" |
166 | ||
1da177e4 LT |
167 | /* |
168 | * Scheduler resume function, called by switch_to | |
169 | * gpr2 = (task_struct *) prev | |
170 | * gpr3 = (task_struct *) next | |
171 | * Returns: | |
172 | * gpr2 = prev | |
173 | */ | |
144d634a | 174 | ENTRY(__switch_to) |
eda0c6d6 | 175 | stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task |
3827ec3d MS |
176 | lgr %r1,%r2 |
177 | aghi %r1,__TASK_thread # thread_struct of prev task | |
178 | lg %r4,__TASK_thread_info(%r2) # get thread_info of prev | |
179 | lg %r5,__TASK_thread_info(%r3) # get thread_info of next | |
180 | stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev | |
181 | lgr %r1,%r3 | |
182 | aghi %r1,__TASK_thread # thread_struct of next task | |
eda0c6d6 | 183 | lgr %r15,%r5 |
dc7ee00d | 184 | aghi %r15,STACK_INIT # end of kernel stack of next |
eda0c6d6 MS |
185 | stg %r3,__LC_CURRENT # store task struct of next |
186 | stg %r5,__LC_THREAD_INFO # store thread info of next | |
187 | stg %r15,__LC_KERNEL_STACK # store end of kernel stack | |
3827ec3d | 188 | lg %r15,__THREAD_ksp(%r1) # load kernel stack of next |
b1685ab9 | 189 | /* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */ |
eda0c6d6 | 190 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 |
e22cf8ca | 191 | mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next |
d3a73acb | 192 | lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task |
e22cf8ca CB |
193 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP |
194 | bzr %r14 | |
195 | .insn s,0xb2800000,__LC_LPP # set program parameter | |
1da177e4 LT |
196 | br %r14 |
197 | ||
86ed42f4 | 198 | .L__critical_start: |
d0fc4107 MS |
199 | |
200 | #if IS_ENABLED(CONFIG_KVM) | |
201 | /* | |
202 | * sie64a calling convention: | |
203 | * %r2 pointer to sie control block | |
204 | * %r3 guest register save area | |
205 | */ | |
206 | ENTRY(sie64a) | |
207 | stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers | |
208 | stg %r2,__SF_EMPTY(%r15) # save control block pointer | |
209 | stg %r3,__SF_EMPTY+8(%r15) # save guest register save area | |
e22cf8ca | 210 | xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 |
83abeffb | 211 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? |
d0fc4107 | 212 | jno .Lsie_load_guest_gprs |
d0fc4107 MS |
213 | brasl %r14,load_fpu_regs # load guest fp/vx regs |
214 | .Lsie_load_guest_gprs: | |
215 | lmg %r0,%r13,0(%r3) # load guest gprs 0-13 | |
216 | lg %r14,__LC_GMAP # get gmap pointer | |
217 | ltgr %r14,%r14 | |
218 | jz .Lsie_gmap | |
219 | lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce | |
220 | .Lsie_gmap: | |
221 | lg %r14,__SF_EMPTY(%r15) # get control block pointer | |
222 | oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now | |
223 | tm __SIE_PROG20+3(%r14),3 # last exit... | |
224 | jnz .Lsie_skip | |
83abeffb | 225 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
d0fc4107 | 226 | jo .Lsie_skip # exit if fp/vx regs changed |
d0fc4107 | 227 | sie 0(%r14) |
d0fc4107 MS |
228 | .Lsie_skip: |
229 | ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE | |
230 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce | |
231 | .Lsie_done: | |
232 | # some program checks are suppressing. C code (e.g. do_protection_exception) | |
233 | # will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other | |
234 | # instructions between sie64a and .Lsie_done should not cause program | |
235 | # interrupts. So lets use a nop (47 00 00 00) as a landing pad. | |
236 | # See also .Lcleanup_sie | |
237 | .Lrewind_pad: | |
238 | nop 0 | |
239 | .globl sie_exit | |
240 | sie_exit: | |
241 | lg %r14,__SF_EMPTY+8(%r15) # load guest register save area | |
242 | stmg %r0,%r13,0(%r14) # save guest gprs 0-13 | |
243 | lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers | |
e22cf8ca | 244 | lg %r2,__SF_EMPTY+16(%r15) # return exit reason code |
d0fc4107 MS |
245 | br %r14 |
246 | .Lsie_fault: | |
247 | lghi %r14,-EFAULT | |
e22cf8ca | 248 | stg %r14,__SF_EMPTY+16(%r15) # set exit reason code |
d0fc4107 MS |
249 | j sie_exit |
250 | ||
251 | EX_TABLE(.Lrewind_pad,.Lsie_fault) | |
252 | EX_TABLE(sie_exit,.Lsie_fault) | |
253 | #endif | |
254 | ||
1da177e4 LT |
255 | /* |
256 | * SVC interrupt handler routine. System calls are synchronous events and | |
257 | * are executed with interrupts enabled. | |
258 | */ | |
259 | ||
144d634a | 260 | ENTRY(system_call) |
c185b783 | 261 | stpt __LC_SYNC_ENTER_TIMER |
86ed42f4 | 262 | .Lsysc_stmg: |
c5328901 MS |
263 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
264 | lg %r10,__LC_LAST_BREAK | |
265 | lg %r12,__LC_THREAD_INFO | |
d3a73acb | 266 | lghi %r14,_PIF_SYSCALL |
86ed42f4 | 267 | .Lsysc_per: |
c5328901 | 268 | lg %r15,__LC_KERNEL_STACK |
c5328901 | 269 | la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs |
c5328901 | 270 | LAST_BREAK %r13 |
a359bb11 MS |
271 | .Lsysc_vtime: |
272 | UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER | |
c5328901 MS |
273 | stmg %r0,%r7,__PT_R0(%r11) |
274 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC | |
275 | mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW | |
aa33c8cb | 276 | mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC |
d3a73acb | 277 | stg %r14,__PT_FLAGS(%r11) |
86ed42f4 | 278 | .Lsysc_do_svc: |
61649881 | 279 | lg %r10,__TI_sysc_table(%r12) # address of system call table |
aa33c8cb | 280 | llgh %r8,__PT_INT_CODE+2(%r11) |
c5328901 | 281 | slag %r8,%r8,2 # shift and test for svc 0 |
86ed42f4 | 282 | jnz .Lsysc_nr_ok |
1da177e4 | 283 | # svc 0: system call number in %r1 |
c5328901 | 284 | llgfr %r1,%r1 # clear high word in r1 |
86f2552b | 285 | cghi %r1,NR_syscalls |
86ed42f4 | 286 | jnl .Lsysc_nr_ok |
aa33c8cb | 287 | sth %r1,__PT_INT_CODE+2(%r11) |
c5328901 | 288 | slag %r8,%r1,2 |
86ed42f4 | 289 | .Lsysc_nr_ok: |
c5328901 MS |
290 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
291 | stg %r2,__PT_ORIG_GPR2(%r11) | |
292 | stg %r7,STACK_FRAME_OVERHEAD(%r15) | |
293 | lgf %r9,0(%r8,%r10) # get system call add. | |
83abeffb | 294 | TSTMSK __TI_flags(%r12),_TIF_TRACE |
86ed42f4 | 295 | jnz .Lsysc_tracesys |
c5328901 MS |
296 | basr %r14,%r9 # call sys_xxxx |
297 | stg %r2,__PT_R2(%r11) # store return value | |
1da177e4 | 298 | |
86ed42f4 | 299 | .Lsysc_return: |
6a2df3a8 | 300 | LOCKDEP_SYS_EXIT |
86ed42f4 | 301 | .Lsysc_tif: |
83abeffb | 302 | TSTMSK __PT_FLAGS(%r11),_PIF_WORK |
86ed42f4 | 303 | jnz .Lsysc_work |
83abeffb | 304 | TSTMSK __TI_flags(%r12),_TIF_WORK |
86ed42f4 | 305 | jnz .Lsysc_work # check for work |
83abeffb | 306 | TSTMSK __LC_CPU_FLAGS,_CIF_WORK |
86ed42f4 MS |
307 | jnz .Lsysc_work |
308 | .Lsysc_restore: | |
c5328901 MS |
309 | lg %r14,__LC_VDSO_PER_CPU |
310 | lmg %r0,%r10,__PT_R0(%r11) | |
311 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) | |
312 | stpt __LC_EXIT_TIMER | |
313 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | |
314 | lmg %r11,%r15,__PT_R11(%r11) | |
315 | lpswe __LC_RETURN_PSW | |
86ed42f4 | 316 | .Lsysc_done: |
411788ea | 317 | |
43d399d2 MS |
318 | # |
319 | # One of the work bits is on. Find out which one. | |
320 | # | |
86ed42f4 | 321 | .Lsysc_work: |
83abeffb | 322 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 323 | jo .Lsysc_mcck_pending |
83abeffb | 324 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 325 | jo .Lsysc_reschedule |
2a0a5b22 | 326 | #ifdef CONFIG_UPROBES |
83abeffb | 327 | TSTMSK __TI_flags(%r12),_TIF_UPROBE |
86ed42f4 | 328 | jo .Lsysc_uprobe_notify |
2a0a5b22 | 329 | #endif |
83abeffb | 330 | TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP |
86ed42f4 | 331 | jo .Lsysc_singlestep |
83abeffb | 332 | TSTMSK __TI_flags(%r12),_TIF_SIGPENDING |
86ed42f4 | 333 | jo .Lsysc_sigpending |
83abeffb | 334 | TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME |
86ed42f4 | 335 | jo .Lsysc_notify_resume |
83abeffb | 336 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 337 | jo .Lsysc_vxrs |
83abeffb | 338 | TSTMSK __LC_CPU_FLAGS,_CIF_ASCE |
86ed42f4 MS |
339 | jo .Lsysc_uaccess |
340 | j .Lsysc_return # beware of critical section cleanup | |
1da177e4 LT |
341 | |
342 | # | |
343 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf | 344 | # |
86ed42f4 MS |
345 | .Lsysc_reschedule: |
346 | larl %r14,.Lsysc_return | |
c5328901 | 347 | jg schedule |
1da177e4 | 348 | |
77fa2245 | 349 | # |
d3a73acb | 350 | # _CIF_MCCK_PENDING is set, call handler |
77fa2245 | 351 | # |
86ed42f4 MS |
352 | .Lsysc_mcck_pending: |
353 | larl %r14,.Lsysc_return | |
25d83cbf | 354 | jg s390_handle_mcck # TIF bit will be cleared by handler |
77fa2245 | 355 | |
457f2180 | 356 | # |
d3a73acb | 357 | # _CIF_ASCE is set, load user space asce |
457f2180 | 358 | # |
86ed42f4 | 359 | .Lsysc_uaccess: |
d3a73acb | 360 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE |
457f2180 | 361 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
86ed42f4 | 362 | j .Lsysc_return |
457f2180 | 363 | |
9977e886 HB |
364 | # |
365 | # CIF_FPU is set, restore floating-point controls and floating-point registers. | |
366 | # | |
367 | .Lsysc_vxrs: | |
368 | larl %r14,.Lsysc_return | |
369 | jg load_fpu_regs | |
370 | ||
1da177e4 | 371 | # |
02a029b3 | 372 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 373 | # |
86ed42f4 | 374 | .Lsysc_sigpending: |
c5328901 MS |
375 | lgr %r2,%r11 # pass pointer to pt_regs |
376 | brasl %r14,do_signal | |
83abeffb | 377 | TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL |
86ed42f4 | 378 | jno .Lsysc_return |
c5328901 | 379 | lmg %r2,%r7,__PT_R2(%r11) # load svc arguments |
dbbfe487 | 380 | lg %r10,__TI_sysc_table(%r12) # address of system call table |
c5328901 | 381 | lghi %r8,0 # svc 0 returns -ENOSYS |
450e47da | 382 | llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number |
b6ef5bb3 | 383 | cghi %r1,NR_syscalls |
86ed42f4 | 384 | jnl .Lsysc_nr_ok # invalid svc number -> do svc 0 |
c5328901 | 385 | slag %r8,%r1,2 |
86ed42f4 | 386 | j .Lsysc_nr_ok # restart svc |
1da177e4 | 387 | |
753c4dd6 MS |
388 | # |
389 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
390 | # | |
86ed42f4 | 391 | .Lsysc_notify_resume: |
c5328901 | 392 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 393 | larl %r14,.Lsysc_return |
c5328901 | 394 | jg do_notify_resume |
753c4dd6 | 395 | |
2a0a5b22 JW |
396 | # |
397 | # _TIF_UPROBE is set, call uprobe_notify_resume | |
398 | # | |
399 | #ifdef CONFIG_UPROBES | |
86ed42f4 | 400 | .Lsysc_uprobe_notify: |
2a0a5b22 | 401 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 402 | larl %r14,.Lsysc_return |
2a0a5b22 JW |
403 | jg uprobe_notify_resume |
404 | #endif | |
405 | ||
1da177e4 | 406 | # |
d3a73acb | 407 | # _PIF_PER_TRAP is set, call do_per_trap |
1da177e4 | 408 | # |
86ed42f4 | 409 | .Lsysc_singlestep: |
d3a73acb | 410 | ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP |
c5328901 | 411 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 412 | larl %r14,.Lsysc_return |
5e9a2692 | 413 | jg do_per_trap |
1da177e4 | 414 | |
1da177e4 | 415 | # |
753c4dd6 MS |
416 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
417 | # and after the system call | |
1da177e4 | 418 | # |
86ed42f4 | 419 | .Lsysc_tracesys: |
c5328901 | 420 | lgr %r2,%r11 # pass pointer to pt_regs |
1da177e4 | 421 | la %r3,0 |
aa33c8cb | 422 | llgh %r0,__PT_INT_CODE+2(%r11) |
c5328901 | 423 | stg %r0,__PT_R2(%r11) |
753c4dd6 | 424 | brasl %r14,do_syscall_trace_enter |
1da177e4 | 425 | lghi %r0,NR_syscalls |
753c4dd6 | 426 | clgr %r0,%r2 |
86ed42f4 | 427 | jnh .Lsysc_tracenogo |
c5328901 MS |
428 | sllg %r8,%r2,2 |
429 | lgf %r9,0(%r8,%r10) | |
86ed42f4 | 430 | .Lsysc_tracego: |
c5328901 MS |
431 | lmg %r3,%r7,__PT_R3(%r11) |
432 | stg %r7,STACK_FRAME_OVERHEAD(%r15) | |
433 | lg %r2,__PT_ORIG_GPR2(%r11) | |
434 | basr %r14,%r9 # call sys_xxx | |
435 | stg %r2,__PT_R2(%r11) # store return value | |
86ed42f4 | 436 | .Lsysc_tracenogo: |
83abeffb | 437 | TSTMSK __TI_flags(%r12),_TIF_TRACE |
86ed42f4 | 438 | jz .Lsysc_return |
c5328901 | 439 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 440 | larl %r14,.Lsysc_return |
753c4dd6 | 441 | jg do_syscall_trace_exit |
1da177e4 LT |
442 | |
443 | # | |
444 | # a new process exits the kernel with ret_from_fork | |
445 | # | |
144d634a | 446 | ENTRY(ret_from_fork) |
c5328901 MS |
447 | la %r11,STACK_FRAME_OVERHEAD(%r15) |
448 | lg %r12,__LC_THREAD_INFO | |
37fe5d41 AV |
449 | brasl %r14,schedule_tail |
450 | TRACE_IRQS_ON | |
451 | ssm __LC_SVC_NEW_PSW # reenable interrupts | |
30dcb099 | 452 | tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? |
86ed42f4 | 453 | jne .Lsysc_tracenogo |
30dcb099 AV |
454 | # it's a kernel thread |
455 | lmg %r9,%r10,__PT_R9(%r11) # load gprs | |
37fe5d41 AV |
456 | ENTRY(kernel_thread_starter) |
457 | la %r2,0(%r10) | |
458 | basr %r14,%r9 | |
86ed42f4 | 459 | j .Lsysc_tracenogo |
1da177e4 LT |
460 | |
461 | /* | |
462 | * Program check handler routine | |
463 | */ | |
464 | ||
144d634a | 465 | ENTRY(pgm_check_handler) |
c185b783 | 466 | stpt __LC_SYNC_ENTER_TIMER |
c5328901 MS |
467 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
468 | lg %r10,__LC_LAST_BREAK | |
469 | lg %r12,__LC_THREAD_INFO | |
9977e886 | 470 | larl %r13,cleanup_critical |
c5328901 | 471 | lmg %r8,%r9,__LC_PGM_OLD_PSW |
c5328901 | 472 | tmhh %r8,0x0001 # test problem state bit |
d0fc4107 MS |
473 | jnz 2f # -> fault in user space |
474 | #if IS_ENABLED(CONFIG_KVM) | |
475 | # cleanup critical section for sie64a | |
476 | lgr %r14,%r9 | |
477 | slg %r14,BASED(.Lsie_critical_start) | |
478 | clg %r14,BASED(.Lsie_critical_length) | |
479 | jhe 0f | |
480 | brasl %r14,.Lcleanup_sie | |
481 | #endif | |
482 | 0: tmhh %r8,0x4000 # PER bit set in old PSW ? | |
483 | jnz 1f # -> enabled, can't be a double fault | |
c5328901 | 484 | tm __LC_PGM_ILC+3,0x80 # check for per exception |
86ed42f4 | 485 | jnz .Lpgm_svcper # -> single stepped svc |
d0fc4107 | 486 | 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC |
dc7ee00d | 487 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
d0fc4107 | 488 | j 3f |
a359bb11 MS |
489 | 2: LAST_BREAK %r14 |
490 | UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER | |
c5328901 | 491 | lg %r15,__LC_KERNEL_STACK |
d35339a4 | 492 | lg %r14,__TI_task(%r12) |
3827ec3d | 493 | aghi %r14,__TASK_thread # pointer to thread_struct |
d35339a4 MS |
494 | lghi %r13,__LC_PGM_TDB |
495 | tm __LC_PGM_ILC+2,0x02 # check for transaction abort | |
d0fc4107 | 496 | jz 3f |
d35339a4 | 497 | mvc __THREAD_trap_tdb(256,%r14),0(%r13) |
d0fc4107 | 498 | 3: la %r11,STACK_FRAME_OVERHEAD(%r15) |
c5328901 MS |
499 | stmg %r0,%r7,__PT_R0(%r11) |
500 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC | |
501 | stmg %r8,%r9,__PT_PSW(%r11) | |
aa33c8cb MS |
502 | mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC |
503 | mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE | |
d3a73acb | 504 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
c5328901 MS |
505 | stg %r10,__PT_ARGS(%r11) |
506 | tm __LC_PGM_ILC+3,0x80 # check for per exception | |
d0fc4107 | 507 | jz 4f |
c5328901 | 508 | tmhh %r8,0x0001 # kernel per event ? |
86ed42f4 | 509 | jz .Lpgm_kprobe |
d3a73acb | 510 | oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP |
d35339a4 | 511 | mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS |
21ee7ffd JF |
512 | mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE |
513 | mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID | |
d0fc4107 | 514 | 4: REENABLE_IRQS |
c5328901 | 515 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
f5cdac27 | 516 | larl %r1,pgm_check_table |
aa33c8cb MS |
517 | llgh %r10,__PT_INT_CODE+2(%r11) |
518 | nill %r10,0x007f | |
b01a37a7 | 519 | sll %r10,2 |
a359bb11 | 520 | je .Lpgm_return |
b01a37a7 | 521 | lgf %r1,0(%r10,%r1) # load address of handler routine |
c5328901 | 522 | lgr %r2,%r11 # pass pointer to pt_regs |
f5cdac27 | 523 | basr %r14,%r1 # branch to interrupt-handler |
a359bb11 MS |
524 | .Lpgm_return: |
525 | LOCKDEP_SYS_EXIT | |
526 | tm __PT_PSW+1(%r11),0x01 # returning to user ? | |
527 | jno .Lsysc_restore | |
528 | j .Lsysc_tif | |
1da177e4 LT |
529 | |
530 | # | |
c5328901 | 531 | # PER event in supervisor state, must be kprobes |
1da177e4 | 532 | # |
86ed42f4 | 533 | .Lpgm_kprobe: |
c5328901 MS |
534 | REENABLE_IRQS |
535 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) | |
536 | lgr %r2,%r11 # pass pointer to pt_regs | |
537 | brasl %r14,do_per_trap | |
a359bb11 | 538 | j .Lpgm_return |
1da177e4 | 539 | |
4ba069b8 | 540 | # |
c5328901 | 541 | # single stepped system call |
4ba069b8 | 542 | # |
86ed42f4 | 543 | .Lpgm_svcper: |
c5328901 | 544 | mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW |
86ed42f4 | 545 | larl %r14,.Lsysc_per |
c5328901 | 546 | stg %r14,__LC_RETURN_PSW+8 |
d3a73acb | 547 | lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP |
86ed42f4 | 548 | lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs |
4ba069b8 | 549 | |
1da177e4 LT |
550 | /* |
551 | * IO interrupt handler routine | |
552 | */ | |
144d634a | 553 | ENTRY(io_int_handler) |
473e66ba | 554 | STCK __LC_INT_CLOCK |
9cfb9b3c | 555 | stpt __LC_ASYNC_ENTER_TIMER |
c5328901 MS |
556 | stmg %r8,%r15,__LC_SAVE_AREA_ASYNC |
557 | lg %r10,__LC_LAST_BREAK | |
558 | lg %r12,__LC_THREAD_INFO | |
9977e886 | 559 | larl %r13,cleanup_critical |
c5328901 | 560 | lmg %r8,%r9,__LC_IO_OLD_PSW |
2acb94f4 | 561 | SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER |
c5328901 MS |
562 | stmg %r0,%r7,__PT_R0(%r11) |
563 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC | |
564 | stmg %r8,%r9,__PT_PSW(%r11) | |
48f6b00c | 565 | mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID |
d3a73acb | 566 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
db7e007f HC |
567 | TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ |
568 | jo .Lio_restore | |
1f194a4c | 569 | TRACE_IRQS_OFF |
c5328901 | 570 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
86ed42f4 | 571 | .Lio_loop: |
c5328901 | 572 | lgr %r2,%r11 # pass pointer to pt_regs |
1f44a225 MS |
573 | lghi %r3,IO_INTERRUPT |
574 | tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? | |
86ed42f4 | 575 | jz .Lio_call |
1f44a225 | 576 | lghi %r3,THIN_INTERRUPT |
86ed42f4 | 577 | .Lio_call: |
c5328901 | 578 | brasl %r14,do_IRQ |
83abeffb | 579 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR |
86ed42f4 | 580 | jz .Lio_return |
48f6b00c | 581 | tpi 0 |
86ed42f4 | 582 | jz .Lio_return |
48f6b00c | 583 | mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID |
86ed42f4 MS |
584 | j .Lio_loop |
585 | .Lio_return: | |
6a2df3a8 MS |
586 | LOCKDEP_SYS_EXIT |
587 | TRACE_IRQS_ON | |
86ed42f4 | 588 | .Lio_tif: |
83abeffb | 589 | TSTMSK __TI_flags(%r12),_TIF_WORK |
86ed42f4 | 590 | jnz .Lio_work # there is work to do (signals etc.) |
83abeffb | 591 | TSTMSK __LC_CPU_FLAGS,_CIF_WORK |
86ed42f4 MS |
592 | jnz .Lio_work |
593 | .Lio_restore: | |
c5328901 MS |
594 | lg %r14,__LC_VDSO_PER_CPU |
595 | lmg %r0,%r10,__PT_R0(%r11) | |
596 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) | |
c5328901 MS |
597 | stpt __LC_EXIT_TIMER |
598 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | |
599 | lmg %r11,%r15,__PT_R11(%r11) | |
600 | lpswe __LC_RETURN_PSW | |
86ed42f4 | 601 | .Lio_done: |
1da177e4 | 602 | |
2688905e | 603 | # |
43d399d2 | 604 | # There is work todo, find out in which context we have been interrupted: |
d3a73acb | 605 | # 1) if we return to user space we can do all _TIF_WORK work |
43d399d2 MS |
606 | # 2) if we return to kernel code and kvm is enabled check if we need to |
607 | # modify the psw to leave SIE | |
608 | # 3) if we return to kernel code and preemptive scheduling is enabled check | |
609 | # the preemption counter and if it is zero call preempt_schedule_irq | |
610 | # Before any work can be done, a switch to the kernel stack is required. | |
2688905e | 611 | # |
86ed42f4 | 612 | .Lio_work: |
c5328901 | 613 | tm __PT_PSW+1(%r11),0x01 # returning to user ? |
86ed42f4 | 614 | jo .Lio_work_user # yes -> do resched & signal |
43d399d2 | 615 | #ifdef CONFIG_PREEMPT |
2688905e | 616 | # check for preemptive scheduling |
86f2552b | 617 | icm %r0,15,__TI_precount(%r12) |
86ed42f4 | 618 | jnz .Lio_restore # preemption is disabled |
83abeffb | 619 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 620 | jno .Lio_restore |
1da177e4 | 621 | # switch to kernel stack |
c5328901 MS |
622 | lg %r1,__PT_R15(%r11) |
623 | aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) | |
624 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) | |
625 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
626 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
1da177e4 | 627 | lgr %r15,%r1 |
86ed42f4 | 628 | # TRACE_IRQS_ON already done at .Lio_return, call |
6a2df3a8 MS |
629 | # TRACE_IRQS_OFF to keep things symmetrical |
630 | TRACE_IRQS_OFF | |
631 | brasl %r14,preempt_schedule_irq | |
86ed42f4 | 632 | j .Lio_return |
6a2df3a8 | 633 | #else |
86ed42f4 | 634 | j .Lio_restore |
6a2df3a8 | 635 | #endif |
1da177e4 | 636 | |
43d399d2 MS |
637 | # |
638 | # Need to do work before returning to userspace, switch to kernel stack | |
639 | # | |
86ed42f4 | 640 | .Lio_work_user: |
1da177e4 | 641 | lg %r1,__LC_KERNEL_STACK |
c5328901 MS |
642 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) |
643 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
644 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
1da177e4 | 645 | lgr %r15,%r1 |
43d399d2 | 646 | |
1da177e4 LT |
647 | # |
648 | # One of the work bits is on. Find out which one. | |
1da177e4 | 649 | # |
86ed42f4 | 650 | .Lio_work_tif: |
83abeffb | 651 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 652 | jo .Lio_mcck_pending |
83abeffb | 653 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 654 | jo .Lio_reschedule |
83abeffb | 655 | TSTMSK __TI_flags(%r12),_TIF_SIGPENDING |
86ed42f4 | 656 | jo .Lio_sigpending |
83abeffb | 657 | TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME |
86ed42f4 | 658 | jo .Lio_notify_resume |
83abeffb | 659 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 660 | jo .Lio_vxrs |
83abeffb | 661 | TSTMSK __LC_CPU_FLAGS,_CIF_ASCE |
86ed42f4 MS |
662 | jo .Lio_uaccess |
663 | j .Lio_return # beware of critical section cleanup | |
0eaeafa1 | 664 | |
77fa2245 | 665 | # |
d3a73acb | 666 | # _CIF_MCCK_PENDING is set, call handler |
77fa2245 | 667 | # |
86ed42f4 MS |
668 | .Lio_mcck_pending: |
669 | # TRACE_IRQS_ON already done at .Lio_return | |
b771aeac | 670 | brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler |
6a2df3a8 | 671 | TRACE_IRQS_OFF |
86ed42f4 | 672 | j .Lio_return |
77fa2245 | 673 | |
457f2180 | 674 | # |
d3a73acb | 675 | # _CIF_ASCE is set, load user space asce |
457f2180 | 676 | # |
86ed42f4 | 677 | .Lio_uaccess: |
d3a73acb | 678 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE |
457f2180 | 679 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
86ed42f4 | 680 | j .Lio_return |
457f2180 | 681 | |
9977e886 HB |
682 | # |
683 | # CIF_FPU is set, restore floating-point controls and floating-point registers. | |
684 | # | |
685 | .Lio_vxrs: | |
686 | larl %r14,.Lio_return | |
687 | jg load_fpu_regs | |
688 | ||
1da177e4 LT |
689 | # |
690 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf | 691 | # |
86ed42f4 MS |
692 | .Lio_reschedule: |
693 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 | 694 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
25d83cbf | 695 | brasl %r14,schedule # call scheduler |
c5328901 | 696 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts |
411788ea | 697 | TRACE_IRQS_OFF |
86ed42f4 | 698 | j .Lio_return |
1da177e4 LT |
699 | |
700 | # | |
02a029b3 | 701 | # _TIF_SIGPENDING or is set, call do_signal |
1da177e4 | 702 | # |
86ed42f4 MS |
703 | .Lio_sigpending: |
704 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 MS |
705 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
706 | lgr %r2,%r11 # pass pointer to pt_regs | |
707 | brasl %r14,do_signal | |
708 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
411788ea | 709 | TRACE_IRQS_OFF |
86ed42f4 | 710 | j .Lio_return |
1da177e4 | 711 | |
753c4dd6 MS |
712 | # |
713 | # _TIF_NOTIFY_RESUME or is set, call do_notify_resume | |
714 | # | |
86ed42f4 MS |
715 | .Lio_notify_resume: |
716 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 MS |
717 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
718 | lgr %r2,%r11 # pass pointer to pt_regs | |
719 | brasl %r14,do_notify_resume | |
720 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
753c4dd6 | 721 | TRACE_IRQS_OFF |
86ed42f4 | 722 | j .Lio_return |
753c4dd6 | 723 | |
1da177e4 LT |
724 | /* |
725 | * External interrupt handler routine | |
726 | */ | |
144d634a | 727 | ENTRY(ext_int_handler) |
473e66ba | 728 | STCK __LC_INT_CLOCK |
9cfb9b3c | 729 | stpt __LC_ASYNC_ENTER_TIMER |
c5328901 MS |
730 | stmg %r8,%r15,__LC_SAVE_AREA_ASYNC |
731 | lg %r10,__LC_LAST_BREAK | |
732 | lg %r12,__LC_THREAD_INFO | |
9977e886 | 733 | larl %r13,cleanup_critical |
c5328901 | 734 | lmg %r8,%r9,__LC_EXT_OLD_PSW |
2acb94f4 | 735 | SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER |
c5328901 MS |
736 | stmg %r0,%r7,__PT_R0(%r11) |
737 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC | |
738 | stmg %r8,%r9,__PT_PSW(%r11) | |
48f6b00c MS |
739 | lghi %r1,__LC_EXT_PARAMS2 |
740 | mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR | |
741 | mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS | |
742 | mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) | |
d3a73acb | 743 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
db7e007f HC |
744 | TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ |
745 | jo .Lio_restore | |
1f194a4c | 746 | TRACE_IRQS_OFF |
0de9db37 | 747 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
c5328901 | 748 | lgr %r2,%r11 # pass pointer to pt_regs |
1f44a225 MS |
749 | lghi %r3,EXT_INTERRUPT |
750 | brasl %r14,do_IRQ | |
86ed42f4 | 751 | j .Lio_return |
1da177e4 | 752 | |
4c1051e3 | 753 | /* |
86ed42f4 | 754 | * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. |
4c1051e3 MS |
755 | */ |
756 | ENTRY(psw_idle) | |
27f6b416 | 757 | stg %r3,__SF_EMPTY(%r15) |
86ed42f4 | 758 | larl %r1,.Lpsw_idle_lpsw+4 |
4c1051e3 | 759 | stg %r1,__SF_EMPTY+8(%r15) |
72d38b19 MS |
760 | #ifdef CONFIG_SMP |
761 | larl %r1,smp_cpu_mtid | |
762 | llgf %r1,0(%r1) | |
763 | ltgr %r1,%r1 | |
764 | jz .Lpsw_idle_stcctm | |
765 | .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) | |
766 | .Lpsw_idle_stcctm: | |
767 | #endif | |
419123f9 | 768 | oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT |
27f6b416 MS |
769 | STCK __CLOCK_IDLE_ENTER(%r2) |
770 | stpt __TIMER_IDLE_ENTER(%r2) | |
86ed42f4 | 771 | .Lpsw_idle_lpsw: |
4c1051e3 MS |
772 | lpswe __SF_EMPTY(%r15) |
773 | br %r14 | |
86ed42f4 | 774 | .Lpsw_idle_end: |
4c1051e3 | 775 | |
b5510d9b HB |
776 | /* |
777 | * Store floating-point controls and floating-point or vector register | |
778 | * depending whether the vector facility is available. A critical section | |
779 | * cleanup assures that the registers are stored even if interrupted for | |
780 | * some other work. The CIF_FPU flag is set to trigger a lazy restore | |
781 | * of the register contents at return from io or a system call. | |
9977e886 HB |
782 | */ |
783 | ENTRY(save_fpu_regs) | |
d0164ee2 HB |
784 | lg %r2,__LC_CURRENT |
785 | aghi %r2,__TASK_thread | |
83abeffb | 786 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 787 | bor %r14 |
d0164ee2 | 788 | stfpc __THREAD_FPU_fpc(%r2) |
9977e886 | 789 | .Lsave_fpu_regs_fpc_end: |
d0164ee2 | 790 | lg %r3,__THREAD_FPU_regs(%r2) |
83abeffb | 791 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
9977e886 HB |
792 | jz .Lsave_fpu_regs_fp # no -> store FP regs |
793 | .Lsave_fpu_regs_vx_low: | |
794 | VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) | |
795 | .Lsave_fpu_regs_vx_high: | |
796 | VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) | |
797 | j .Lsave_fpu_regs_done # -> set CIF_FPU flag | |
798 | .Lsave_fpu_regs_fp: | |
799 | std 0,0(%r3) | |
800 | std 1,8(%r3) | |
801 | std 2,16(%r3) | |
802 | std 3,24(%r3) | |
803 | std 4,32(%r3) | |
804 | std 5,40(%r3) | |
805 | std 6,48(%r3) | |
806 | std 7,56(%r3) | |
807 | std 8,64(%r3) | |
808 | std 9,72(%r3) | |
809 | std 10,80(%r3) | |
810 | std 11,88(%r3) | |
811 | std 12,96(%r3) | |
812 | std 13,104(%r3) | |
813 | std 14,112(%r3) | |
814 | std 15,120(%r3) | |
815 | .Lsave_fpu_regs_done: | |
816 | oi __LC_CPU_FLAGS+7,_CIF_FPU | |
817 | br %r14 | |
818 | .Lsave_fpu_regs_end: | |
819 | ||
b5510d9b HB |
820 | /* |
821 | * Load floating-point controls and floating-point or vector registers. | |
822 | * A critical section cleanup assures that the register contents are | |
823 | * loaded even if interrupted for some other work. | |
9977e886 HB |
824 | * |
825 | * There are special calling conventions to fit into sysc and io return work: | |
9977e886 HB |
826 | * %r15: <kernel stack> |
827 | * The function requires: | |
b5510d9b | 828 | * %r4 |
9977e886 HB |
829 | */ |
830 | load_fpu_regs: | |
d0164ee2 HB |
831 | lg %r4,__LC_CURRENT |
832 | aghi %r4,__TASK_thread | |
83abeffb | 833 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 834 | bnor %r14 |
d0164ee2 | 835 | lfpc __THREAD_FPU_fpc(%r4) |
83abeffb | 836 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
d0164ee2 | 837 | lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area |
b5510d9b | 838 | jz .Lload_fpu_regs_fp # -> no VX, load FP regs |
9977e886 HB |
839 | .Lload_fpu_regs_vx: |
840 | VLM %v0,%v15,0,%r4 | |
841 | .Lload_fpu_regs_vx_high: | |
842 | VLM %v16,%v31,256,%r4 | |
843 | j .Lload_fpu_regs_done | |
9977e886 HB |
844 | .Lload_fpu_regs_fp: |
845 | ld 0,0(%r4) | |
846 | ld 1,8(%r4) | |
847 | ld 2,16(%r4) | |
848 | ld 3,24(%r4) | |
849 | ld 4,32(%r4) | |
850 | ld 5,40(%r4) | |
851 | ld 6,48(%r4) | |
852 | ld 7,56(%r4) | |
853 | ld 8,64(%r4) | |
854 | ld 9,72(%r4) | |
855 | ld 10,80(%r4) | |
856 | ld 11,88(%r4) | |
857 | ld 12,96(%r4) | |
858 | ld 13,104(%r4) | |
859 | ld 14,112(%r4) | |
860 | ld 15,120(%r4) | |
861 | .Lload_fpu_regs_done: | |
862 | ni __LC_CPU_FLAGS+7,255-_CIF_FPU | |
863 | br %r14 | |
864 | .Lload_fpu_regs_end: | |
865 | ||
86ed42f4 | 866 | .L__critical_end: |
ae6aa2ea | 867 | |
1da177e4 LT |
868 | /* |
869 | * Machine check handler routines | |
870 | */ | |
144d634a | 871 | ENTRY(mcck_int_handler) |
473e66ba | 872 | STCK __LC_MCCK_CLOCK |
77fa2245 HC |
873 | la %r1,4095 # revalidate r1 |
874 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer | |
25d83cbf | 875 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs |
c5328901 MS |
876 | lg %r10,__LC_LAST_BREAK |
877 | lg %r12,__LC_THREAD_INFO | |
9977e886 | 878 | larl %r13,cleanup_critical |
c5328901 | 879 | lmg %r8,%r9,__LC_MCK_OLD_PSW |
83abeffb | 880 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE |
86ed42f4 | 881 | jo .Lmcck_panic # yes -> rest of mcck code invalid |
c5328901 MS |
882 | lghi %r14,__LC_CPU_TIMER_SAVE_AREA |
883 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) | |
83abeffb | 884 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID |
c5328901 | 885 | jo 3f |
63b12246 MS |
886 | la %r14,__LC_SYNC_ENTER_TIMER |
887 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
888 | jl 0f | |
889 | la %r14,__LC_ASYNC_ENTER_TIMER | |
890 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
c5328901 | 891 | jl 1f |
63b12246 | 892 | la %r14,__LC_EXIT_TIMER |
c5328901 MS |
893 | 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER |
894 | jl 2f | |
63b12246 | 895 | la %r14,__LC_LAST_UPDATE_TIMER |
c5328901 | 896 | 2: spt 0(%r14) |
6377981f | 897 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) |
83abeffb | 898 | 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID) |
86ed42f4 | 899 | jno .Lmcck_panic # no -> skip cleanup critical |
2acb94f4 | 900 | SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER |
86ed42f4 | 901 | .Lmcck_skip: |
6551fbdf MS |
902 | lghi %r14,__LC_GPREGS_SAVE_AREA+64 |
903 | stmg %r0,%r7,__PT_R0(%r11) | |
904 | mvc __PT_R8(64,%r11),0(%r14) | |
c5328901 | 905 | stmg %r8,%r9,__PT_PSW(%r11) |
d3a73acb | 906 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
c5328901 MS |
907 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
908 | lgr %r2,%r11 # pass pointer to pt_regs | |
77fa2245 | 909 | brasl %r14,s390_do_machine_check |
c5328901 | 910 | tm __PT_PSW+1(%r11),0x01 # returning to user ? |
86ed42f4 | 911 | jno .Lmcck_return |
77fa2245 | 912 | lg %r1,__LC_KERNEL_STACK # switch to kernel stack |
c5328901 MS |
913 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) |
914 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
915 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
77fa2245 | 916 | lgr %r15,%r1 |
c5328901 | 917 | ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off |
83abeffb | 918 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 919 | jno .Lmcck_return |
1f194a4c | 920 | TRACE_IRQS_OFF |
77fa2245 | 921 | brasl %r14,s390_handle_mcck |
1f194a4c | 922 | TRACE_IRQS_ON |
86ed42f4 | 923 | .Lmcck_return: |
c5328901 MS |
924 | lg %r14,__LC_VDSO_PER_CPU |
925 | lmg %r0,%r10,__PT_R0(%r11) | |
926 | mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW | |
63b12246 MS |
927 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? |
928 | jno 0f | |
929 | stpt __LC_EXIT_TIMER | |
c5328901 MS |
930 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER |
931 | 0: lmg %r11,%r15,__PT_R11(%r11) | |
932 | lpswe __LC_RETURN_MCCK_PSW | |
933 | ||
86ed42f4 | 934 | .Lmcck_panic: |
c5328901 | 935 | lg %r15,__LC_PANIC_STACK |
2acb94f4 | 936 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
86ed42f4 | 937 | j .Lmcck_skip |
1da177e4 | 938 | |
7dd6b334 MH |
939 | # |
940 | # PSW restart interrupt handler | |
941 | # | |
8b646bd7 | 942 | ENTRY(restart_int_handler) |
e22cf8ca CB |
943 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP |
944 | jz 0f | |
945 | .insn s,0xb2800000,__LC_LPP | |
946 | 0: stg %r15,__LC_SAVE_AREA_RESTART | |
8b646bd7 | 947 | lg %r15,__LC_RESTART_STACK |
c5328901 | 948 | aghi %r15,-__PT_SIZE # create pt_regs on stack |
8b646bd7 | 949 | xc 0(__PT_SIZE,%r15),0(%r15) |
c5328901 MS |
950 | stmg %r0,%r14,__PT_R0(%r15) |
951 | mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART | |
952 | mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw | |
8b646bd7 MS |
953 | aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack |
954 | xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) | |
fbe76568 HC |
955 | lg %r1,__LC_RESTART_FN # load fn, parm & source cpu |
956 | lg %r2,__LC_RESTART_DATA | |
957 | lg %r3,__LC_RESTART_SOURCE | |
8b646bd7 MS |
958 | ltgr %r3,%r3 # test source cpu address |
959 | jm 1f # negative -> skip source stop | |
eb546195 | 960 | 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu |
8b646bd7 MS |
961 | brc 10,0b # wait for status stored |
962 | 1: basr %r14,%r1 # call function | |
963 | stap __SF_EMPTY(%r15) # store cpu address | |
964 | llgh %r3,__SF_EMPTY(%r15) | |
eb546195 | 965 | 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu |
8b646bd7 MS |
966 | brc 2,2b |
967 | 3: j 3b | |
7dd6b334 | 968 | |
860dba45 MS |
969 | .section .kprobes.text, "ax" |
970 | ||
1da177e4 LT |
971 | #ifdef CONFIG_CHECK_STACK |
972 | /* | |
973 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
974 | * No need to properly save the registers, we are going to panic anyway. | |
975 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
976 | */ | |
977 | stack_overflow: | |
dc7ee00d MS |
978 | lg %r15,__LC_PANIC_STACK # change to panic stack |
979 | la %r11,STACK_FRAME_OVERHEAD(%r15) | |
c5328901 MS |
980 | stmg %r0,%r7,__PT_R0(%r11) |
981 | stmg %r8,%r9,__PT_PSW(%r11) | |
982 | mvc __PT_R8(64,%r11),0(%r14) | |
983 | stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 | |
c5328901 MS |
984 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
985 | lgr %r2,%r11 # pass pointer to pt_regs | |
1da177e4 LT |
986 | jg kernel_stack_overflow |
987 | #endif | |
988 | ||
1da177e4 | 989 | cleanup_critical: |
d0fc4107 MS |
990 | #if IS_ENABLED(CONFIG_KVM) |
991 | clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap | |
992 | jl 0f | |
993 | clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done | |
994 | jl .Lcleanup_sie | |
995 | #endif | |
86ed42f4 | 996 | clg %r9,BASED(.Lcleanup_table) # system_call |
1da177e4 | 997 | jl 0f |
86ed42f4 MS |
998 | clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc |
999 | jl .Lcleanup_system_call | |
1000 | clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif | |
1da177e4 | 1001 | jl 0f |
86ed42f4 MS |
1002 | clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore |
1003 | jl .Lcleanup_sysc_tif | |
1004 | clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done | |
1005 | jl .Lcleanup_sysc_restore | |
1006 | clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif | |
63b12246 | 1007 | jl 0f |
86ed42f4 MS |
1008 | clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore |
1009 | jl .Lcleanup_io_tif | |
1010 | clg %r9,BASED(.Lcleanup_table+56) # .Lio_done | |
1011 | jl .Lcleanup_io_restore | |
1012 | clg %r9,BASED(.Lcleanup_table+64) # psw_idle | |
4c1051e3 | 1013 | jl 0f |
86ed42f4 MS |
1014 | clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end |
1015 | jl .Lcleanup_idle | |
9977e886 HB |
1016 | clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs |
1017 | jl 0f | |
1018 | clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end | |
1019 | jl .Lcleanup_save_fpu_regs | |
1020 | clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs | |
1021 | jl 0f | |
1022 | clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end | |
1023 | jl .Lcleanup_load_fpu_regs | |
c5328901 MS |
1024 | 0: br %r14 |
1025 | ||
d0fc4107 MS |
1026 | .align 8 |
1027 | .Lcleanup_table: | |
1028 | .quad system_call | |
1029 | .quad .Lsysc_do_svc | |
1030 | .quad .Lsysc_tif | |
1031 | .quad .Lsysc_restore | |
1032 | .quad .Lsysc_done | |
1033 | .quad .Lio_tif | |
1034 | .quad .Lio_restore | |
1035 | .quad .Lio_done | |
1036 | .quad psw_idle | |
1037 | .quad .Lpsw_idle_end | |
1038 | .quad save_fpu_regs | |
1039 | .quad .Lsave_fpu_regs_end | |
1040 | .quad load_fpu_regs | |
1041 | .quad .Lload_fpu_regs_end | |
d0fc4107 MS |
1042 | |
1043 | #if IS_ENABLED(CONFIG_KVM) | |
1044 | .Lcleanup_table_sie: | |
1045 | .quad .Lsie_gmap | |
1046 | .quad .Lsie_done | |
1047 | ||
1048 | .Lcleanup_sie: | |
1049 | lg %r9,__SF_EMPTY(%r15) # get control block pointer | |
e22cf8ca | 1050 | ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE |
d0fc4107 MS |
1051 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
1052 | larl %r9,sie_exit # skip forward to sie_exit | |
1053 | br %r14 | |
1054 | #endif | |
1da177e4 | 1055 | |
86ed42f4 | 1056 | .Lcleanup_system_call: |
c5328901 | 1057 | # check if stpt has been executed |
86ed42f4 | 1058 | clg %r9,BASED(.Lcleanup_system_call_insn) |
1da177e4 LT |
1059 | jh 0f |
1060 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
c5328901 | 1061 | cghi %r11,__LC_SAVE_AREA_ASYNC |
6377981f | 1062 | je 0f |
c5328901 MS |
1063 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER |
1064 | 0: # check if stmg has been executed | |
86ed42f4 | 1065 | clg %r9,BASED(.Lcleanup_system_call_insn+8) |
1da177e4 | 1066 | jh 0f |
c5328901 MS |
1067 | mvc __LC_SAVE_AREA_SYNC(64),0(%r11) |
1068 | 0: # check if base register setup + TIF bit load has been done | |
86ed42f4 | 1069 | clg %r9,BASED(.Lcleanup_system_call_insn+16) |
c5328901 MS |
1070 | jhe 0f |
1071 | # set up saved registers r10 and r12 | |
1072 | stg %r10,16(%r11) # r10 last break | |
1073 | stg %r12,32(%r11) # r12 thread-info pointer | |
1074 | 0: # check if the user time update has been done | |
86ed42f4 | 1075 | clg %r9,BASED(.Lcleanup_system_call_insn+24) |
c5328901 MS |
1076 | jh 0f |
1077 | lg %r15,__LC_EXIT_TIMER | |
1078 | slg %r15,__LC_SYNC_ENTER_TIMER | |
1079 | alg %r15,__LC_USER_TIMER | |
1080 | stg %r15,__LC_USER_TIMER | |
1081 | 0: # check if the system time update has been done | |
86ed42f4 | 1082 | clg %r9,BASED(.Lcleanup_system_call_insn+32) |
c5328901 MS |
1083 | jh 0f |
1084 | lg %r15,__LC_LAST_UPDATE_TIMER | |
1085 | slg %r15,__LC_EXIT_TIMER | |
1086 | alg %r15,__LC_SYSTEM_TIMER | |
1087 | stg %r15,__LC_SYSTEM_TIMER | |
1088 | 0: # update accounting time stamp | |
1da177e4 | 1089 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER |
c5328901 MS |
1090 | # do LAST_BREAK |
1091 | lg %r9,16(%r11) | |
1092 | srag %r9,%r9,23 | |
86f2552b | 1093 | jz 0f |
c5328901 MS |
1094 | mvc __TI_last_break(8,%r12),16(%r11) |
1095 | 0: # set up saved register r11 | |
1096 | lg %r15,__LC_KERNEL_STACK | |
dc7ee00d MS |
1097 | la %r9,STACK_FRAME_OVERHEAD(%r15) |
1098 | stg %r9,24(%r11) # r11 pt_regs pointer | |
c5328901 | 1099 | # fill pt_regs |
dc7ee00d MS |
1100 | mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC |
1101 | stmg %r0,%r7,__PT_R0(%r9) | |
1102 | mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW | |
1103 | mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC | |
d3a73acb MS |
1104 | xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) |
1105 | mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL | |
c5328901 | 1106 | # setup saved register r15 |
c5328901 MS |
1107 | stg %r15,56(%r11) # r15 stack pointer |
1108 | # set new psw address and exit | |
86ed42f4 | 1109 | larl %r9,.Lsysc_do_svc |
1da177e4 | 1110 | br %r14 |
86ed42f4 | 1111 | .Lcleanup_system_call_insn: |
25d83cbf | 1112 | .quad system_call |
86ed42f4 MS |
1113 | .quad .Lsysc_stmg |
1114 | .quad .Lsysc_per | |
a359bb11 | 1115 | .quad .Lsysc_vtime+36 |
86ed42f4 | 1116 | .quad .Lsysc_vtime+42 |
1da177e4 | 1117 | |
86ed42f4 MS |
1118 | .Lcleanup_sysc_tif: |
1119 | larl %r9,.Lsysc_tif | |
1da177e4 LT |
1120 | br %r14 |
1121 | ||
86ed42f4 MS |
1122 | .Lcleanup_sysc_restore: |
1123 | clg %r9,BASED(.Lcleanup_sysc_restore_insn) | |
6377981f | 1124 | je 0f |
c5328901 MS |
1125 | lg %r9,24(%r11) # get saved pointer to pt_regs |
1126 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) | |
1127 | mvc 0(64,%r11),__PT_R8(%r9) | |
1128 | lmg %r0,%r7,__PT_R0(%r9) | |
1129 | 0: lmg %r8,%r9,__LC_RETURN_PSW | |
1da177e4 | 1130 | br %r14 |
86ed42f4 MS |
1131 | .Lcleanup_sysc_restore_insn: |
1132 | .quad .Lsysc_done - 4 | |
1da177e4 | 1133 | |
86ed42f4 MS |
1134 | .Lcleanup_io_tif: |
1135 | larl %r9,.Lio_tif | |
176b1803 MS |
1136 | br %r14 |
1137 | ||
86ed42f4 MS |
1138 | .Lcleanup_io_restore: |
1139 | clg %r9,BASED(.Lcleanup_io_restore_insn) | |
c5328901 MS |
1140 | je 0f |
1141 | lg %r9,24(%r11) # get saved r11 pointer to pt_regs | |
1142 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) | |
c5328901 MS |
1143 | mvc 0(64,%r11),__PT_R8(%r9) |
1144 | lmg %r0,%r7,__PT_R0(%r9) | |
1145 | 0: lmg %r8,%r9,__LC_RETURN_PSW | |
ae6aa2ea | 1146 | br %r14 |
86ed42f4 MS |
1147 | .Lcleanup_io_restore_insn: |
1148 | .quad .Lio_done - 4 | |
ae6aa2ea | 1149 | |
86ed42f4 | 1150 | .Lcleanup_idle: |
419123f9 | 1151 | ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT |
4c1051e3 | 1152 | # copy interrupt clock & cpu timer |
27f6b416 MS |
1153 | mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK |
1154 | mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER | |
4c1051e3 MS |
1155 | cghi %r11,__LC_SAVE_AREA_ASYNC |
1156 | je 0f | |
27f6b416 MS |
1157 | mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK |
1158 | mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER | |
4c1051e3 | 1159 | 0: # check if stck & stpt have been executed |
86ed42f4 | 1160 | clg %r9,BASED(.Lcleanup_idle_insn) |
4c1051e3 | 1161 | jhe 1f |
27f6b416 MS |
1162 | mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) |
1163 | mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) | |
72d38b19 MS |
1164 | 1: # calculate idle cycles |
1165 | #ifdef CONFIG_SMP | |
1166 | clg %r9,BASED(.Lcleanup_idle_insn) | |
1167 | jl 3f | |
1168 | larl %r1,smp_cpu_mtid | |
1169 | llgf %r1,0(%r1) | |
1170 | ltgr %r1,%r1 | |
1171 | jz 3f | |
1172 | .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) | |
1173 | larl %r3,mt_cycles | |
1174 | ag %r3,__LC_PERCPU_OFFSET | |
1175 | la %r4,__SF_EMPTY+16(%r15) | |
1176 | 2: lg %r0,0(%r3) | |
1177 | slg %r0,0(%r4) | |
1178 | alg %r0,64(%r4) | |
1179 | stg %r0,0(%r3) | |
1180 | la %r3,8(%r3) | |
1181 | la %r4,8(%r4) | |
1182 | brct %r1,2b | |
1183 | #endif | |
1184 | 3: # account system time going idle | |
4c1051e3 | 1185 | lg %r9,__LC_STEAL_TIMER |
27f6b416 | 1186 | alg %r9,__CLOCK_IDLE_ENTER(%r2) |
4c1051e3 MS |
1187 | slg %r9,__LC_LAST_UPDATE_CLOCK |
1188 | stg %r9,__LC_STEAL_TIMER | |
27f6b416 | 1189 | mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) |
4c1051e3 MS |
1190 | lg %r9,__LC_SYSTEM_TIMER |
1191 | alg %r9,__LC_LAST_UPDATE_TIMER | |
27f6b416 | 1192 | slg %r9,__TIMER_IDLE_ENTER(%r2) |
4c1051e3 | 1193 | stg %r9,__LC_SYSTEM_TIMER |
27f6b416 | 1194 | mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) |
4c1051e3 | 1195 | # prepare return psw |
0587d409 | 1196 | nihh %r8,0xfcfd # clear irq & wait state bits |
4c1051e3 MS |
1197 | lg %r9,48(%r11) # return from psw_idle |
1198 | br %r14 | |
86ed42f4 MS |
1199 | .Lcleanup_idle_insn: |
1200 | .quad .Lpsw_idle_lpsw | |
4c1051e3 | 1201 | |
9977e886 | 1202 | .Lcleanup_save_fpu_regs: |
e370e476 | 1203 | larl %r9,save_fpu_regs |
9977e886 | 1204 | br %r14 |
9977e886 HB |
1205 | |
1206 | .Lcleanup_load_fpu_regs: | |
e370e476 | 1207 | larl %r9,load_fpu_regs |
9977e886 | 1208 | br %r14 |
9977e886 | 1209 | |
1da177e4 LT |
1210 | /* |
1211 | * Integer constants | |
1212 | */ | |
c5328901 | 1213 | .align 8 |
1da177e4 | 1214 | .Lcritical_start: |
86ed42f4 | 1215 | .quad .L__critical_start |
c5328901 | 1216 | .Lcritical_length: |
86ed42f4 | 1217 | .quad .L__critical_end - .L__critical_start |
61aa4884 | 1218 | #if IS_ENABLED(CONFIG_KVM) |
d0fc4107 | 1219 | .Lsie_critical_start: |
86ed42f4 | 1220 | .quad .Lsie_gmap |
7c470539 | 1221 | .Lsie_critical_length: |
86ed42f4 | 1222 | .quad .Lsie_done - .Lsie_gmap |
603d1a50 MS |
1223 | #endif |
1224 | ||
a876cb3f HC |
1225 | .section .rodata, "a" |
1226 | #define SYSCALL(esame,emu) .long esame | |
9bf1226b | 1227 | .globl sys_call_table |
1da177e4 LT |
1228 | sys_call_table: |
1229 | #include "syscalls.S" | |
1230 | #undef SYSCALL | |
1231 | ||
347a8dc3 | 1232 | #ifdef CONFIG_COMPAT |
1da177e4 | 1233 | |
a876cb3f | 1234 | #define SYSCALL(esame,emu) .long emu |
61649881 | 1235 | .globl sys_call_table_emu |
1da177e4 LT |
1236 | sys_call_table_emu: |
1237 | #include "syscalls.S" | |
1238 | #undef SYSCALL | |
1239 | #endif |