Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/smp.c | |
3 | * | |
255acee7 | 4 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 LT |
5 | * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), |
6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | |
7 | * Heiko Carstens (heiko.carstens@de.ibm.com) | |
8 | * | |
9 | * based on other smp stuff by | |
10 | * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> | |
11 | * (c) 1998 Ingo Molnar | |
12 | * | |
13 | * We work with logical cpu numbering everywhere we can. The only | |
14 | * functions using the real cpu address (got from STAP) are the sigp | |
15 | * functions. For all other functions we use the identity mapping. | |
16 | * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is | |
17 | * used e.g. to find the idle task belonging to a logical cpu. Every array | |
18 | * in the kernel is sorted by the logical cpu number and not by the physical | |
19 | * one which is causing all the confusion with __cpu_logical_map and | |
20 | * cpu_number_map in other architectures. | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/init.h> | |
1da177e4 LT |
25 | #include <linux/mm.h> |
26 | #include <linux/spinlock.h> | |
27 | #include <linux/kernel_stat.h> | |
28 | #include <linux/smp_lock.h> | |
1da177e4 LT |
29 | #include <linux/delay.h> |
30 | #include <linux/cache.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/cpu.h> | |
2b67fc46 HC |
33 | #include <linux/timex.h> |
34 | #include <asm/setup.h> | |
1da177e4 LT |
35 | #include <asm/sigp.h> |
36 | #include <asm/pgalloc.h> | |
37 | #include <asm/irq.h> | |
38 | #include <asm/s390_ext.h> | |
39 | #include <asm/cpcmd.h> | |
40 | #include <asm/tlbflush.h> | |
2b67fc46 | 41 | #include <asm/timer.h> |
1da177e4 | 42 | |
1da177e4 LT |
43 | extern volatile int __cpu_logical_map[]; |
44 | ||
45 | /* | |
46 | * An array with a pointer the lowcore of every CPU. | |
47 | */ | |
48 | ||
49 | struct _lowcore *lowcore_ptr[NR_CPUS]; | |
50 | ||
255acee7 HC |
51 | cpumask_t cpu_online_map = CPU_MASK_NONE; |
52 | cpumask_t cpu_possible_map = CPU_MASK_NONE; | |
1da177e4 LT |
53 | |
54 | static struct task_struct *current_set[NR_CPUS]; | |
55 | ||
1da177e4 LT |
56 | static void smp_ext_bitcall(int, ec_bit_sig); |
57 | static void smp_ext_bitcall_others(ec_bit_sig); | |
58 | ||
59 | /* | |
94c12cc7 | 60 | 5B * Structure and data for smp_call_function(). This is designed to minimise |
1da177e4 LT |
61 | * static memory requirements. It also looks cleaner. |
62 | */ | |
63 | static DEFINE_SPINLOCK(call_lock); | |
64 | ||
65 | struct call_data_struct { | |
66 | void (*func) (void *info); | |
67 | void *info; | |
68 | atomic_t started; | |
69 | atomic_t finished; | |
70 | int wait; | |
71 | }; | |
72 | ||
73 | static struct call_data_struct * call_data; | |
74 | ||
75 | /* | |
76 | * 'Call function' interrupt callback | |
77 | */ | |
78 | static void do_call_function(void) | |
79 | { | |
80 | void (*func) (void *info) = call_data->func; | |
81 | void *info = call_data->info; | |
82 | int wait = call_data->wait; | |
83 | ||
84 | atomic_inc(&call_data->started); | |
85 | (*func)(info); | |
86 | if (wait) | |
87 | atomic_inc(&call_data->finished); | |
88 | } | |
89 | ||
90 | /* | |
91 | * this function sends a 'generic call function' IPI to all other CPUs | |
92 | * in the system. | |
93 | */ | |
94 | ||
95 | int smp_call_function (void (*func) (void *info), void *info, int nonatomic, | |
96 | int wait) | |
97 | /* | |
98 | * [SUMMARY] Run a function on all other CPUs. | |
99 | * <func> The function to run. This must be fast and non-blocking. | |
100 | * <info> An arbitrary pointer to pass to the function. | |
101 | * <nonatomic> currently unused. | |
102 | * <wait> If true, wait (atomically) until function has completed on other CPUs. | |
103 | * [RETURNS] 0 on success, else a negative status code. Does not return until | |
104 | * remote CPUs are nearly ready to execute <<func>> or are or have executed. | |
105 | * | |
106 | * You must not call this function with disabled interrupts or from a | |
107 | * hardware interrupt handler or from a bottom half handler. | |
108 | */ | |
109 | { | |
110 | struct call_data_struct data; | |
111 | int cpus = num_online_cpus()-1; | |
112 | ||
113 | if (cpus <= 0) | |
114 | return 0; | |
115 | ||
116 | /* Can deadlock when called with interrupts disabled */ | |
117 | WARN_ON(irqs_disabled()); | |
118 | ||
119 | data.func = func; | |
120 | data.info = info; | |
121 | atomic_set(&data.started, 0); | |
122 | data.wait = wait; | |
123 | if (wait) | |
124 | atomic_set(&data.finished, 0); | |
125 | ||
126 | spin_lock(&call_lock); | |
127 | call_data = &data; | |
128 | /* Send a message to all other CPUs and wait for them to respond */ | |
129 | smp_ext_bitcall_others(ec_call_function); | |
130 | ||
131 | /* Wait for response */ | |
132 | while (atomic_read(&data.started) != cpus) | |
133 | cpu_relax(); | |
134 | ||
135 | if (wait) | |
136 | while (atomic_read(&data.finished) != cpus) | |
137 | cpu_relax(); | |
138 | spin_unlock(&call_lock); | |
139 | ||
140 | return 0; | |
141 | } | |
142 | ||
143 | /* | |
144 | * Call a function on one CPU | |
145 | * cpu : the CPU the function should be executed on | |
146 | * | |
147 | * You must not call this function with disabled interrupts or from a | |
148 | * hardware interrupt handler. You may call it from a bottom half. | |
149 | * | |
150 | * It is guaranteed that the called function runs on the specified CPU, | |
151 | * preemption is disabled. | |
152 | */ | |
153 | int smp_call_function_on(void (*func) (void *info), void *info, | |
154 | int nonatomic, int wait, int cpu) | |
155 | { | |
156 | struct call_data_struct data; | |
157 | int curr_cpu; | |
158 | ||
159 | if (!cpu_online(cpu)) | |
160 | return -EINVAL; | |
161 | ||
162 | /* disable preemption for local function call */ | |
163 | curr_cpu = get_cpu(); | |
164 | ||
165 | if (curr_cpu == cpu) { | |
166 | /* direct call to function */ | |
167 | func(info); | |
168 | put_cpu(); | |
169 | return 0; | |
170 | } | |
171 | ||
172 | data.func = func; | |
173 | data.info = info; | |
174 | atomic_set(&data.started, 0); | |
175 | data.wait = wait; | |
176 | if (wait) | |
177 | atomic_set(&data.finished, 0); | |
178 | ||
179 | spin_lock_bh(&call_lock); | |
180 | call_data = &data; | |
181 | smp_ext_bitcall(cpu, ec_call_function); | |
182 | ||
183 | /* Wait for response */ | |
184 | while (atomic_read(&data.started) != 1) | |
185 | cpu_relax(); | |
186 | ||
187 | if (wait) | |
188 | while (atomic_read(&data.finished) != 1) | |
189 | cpu_relax(); | |
190 | ||
191 | spin_unlock_bh(&call_lock); | |
192 | put_cpu(); | |
193 | return 0; | |
194 | } | |
195 | EXPORT_SYMBOL(smp_call_function_on); | |
196 | ||
197 | static inline void do_send_stop(void) | |
198 | { | |
199 | int cpu, rc; | |
200 | ||
201 | /* stop all processors */ | |
202 | for_each_online_cpu(cpu) { | |
203 | if (cpu == smp_processor_id()) | |
204 | continue; | |
205 | do { | |
206 | rc = signal_processor(cpu, sigp_stop); | |
207 | } while (rc == sigp_busy); | |
208 | } | |
209 | } | |
210 | ||
211 | static inline void do_store_status(void) | |
212 | { | |
213 | int cpu, rc; | |
214 | ||
215 | /* store status of all processors in their lowcores (real 0) */ | |
216 | for_each_online_cpu(cpu) { | |
217 | if (cpu == smp_processor_id()) | |
218 | continue; | |
219 | do { | |
220 | rc = signal_processor_p( | |
221 | (__u32)(unsigned long) lowcore_ptr[cpu], cpu, | |
222 | sigp_store_status_at_address); | |
223 | } while(rc == sigp_busy); | |
224 | } | |
225 | } | |
226 | ||
c6b5b847 HC |
227 | static inline void do_wait_for_stop(void) |
228 | { | |
229 | int cpu; | |
230 | ||
231 | /* Wait for all other cpus to enter stopped state */ | |
232 | for_each_online_cpu(cpu) { | |
233 | if (cpu == smp_processor_id()) | |
234 | continue; | |
235 | while(!smp_cpu_not_running(cpu)) | |
236 | cpu_relax(); | |
237 | } | |
238 | } | |
239 | ||
1da177e4 LT |
240 | /* |
241 | * this function sends a 'stop' sigp to all other CPUs in the system. | |
242 | * it goes straight through. | |
243 | */ | |
244 | void smp_send_stop(void) | |
245 | { | |
c6b5b847 | 246 | /* Disable all interrupts/machine checks */ |
c1821c2e | 247 | __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK); |
c6b5b847 | 248 | |
1da177e4 LT |
249 | /* write magic number to zero page (absolute 0) */ |
250 | lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC; | |
251 | ||
252 | /* stop other processors. */ | |
253 | do_send_stop(); | |
254 | ||
c6b5b847 HC |
255 | /* wait until other processors are stopped */ |
256 | do_wait_for_stop(); | |
257 | ||
1da177e4 LT |
258 | /* store status of other processors. */ |
259 | do_store_status(); | |
260 | } | |
261 | ||
262 | /* | |
263 | * Reboot, halt and power_off routines for SMP. | |
264 | */ | |
265 | ||
1da177e4 LT |
266 | void machine_restart_smp(char * __unused) |
267 | { | |
c6b5b847 HC |
268 | smp_send_stop(); |
269 | do_reipl(); | |
1da177e4 LT |
270 | } |
271 | ||
272 | void machine_halt_smp(void) | |
273 | { | |
c6b5b847 HC |
274 | smp_send_stop(); |
275 | if (MACHINE_IS_VM && strlen(vmhalt_cmd) > 0) | |
276 | __cpcmd(vmhalt_cmd, NULL, 0, NULL); | |
277 | signal_processor(smp_processor_id(), sigp_stop_and_store_status); | |
278 | for (;;); | |
1da177e4 LT |
279 | } |
280 | ||
281 | void machine_power_off_smp(void) | |
282 | { | |
c6b5b847 HC |
283 | smp_send_stop(); |
284 | if (MACHINE_IS_VM && strlen(vmpoff_cmd) > 0) | |
285 | __cpcmd(vmpoff_cmd, NULL, 0, NULL); | |
286 | signal_processor(smp_processor_id(), sigp_stop_and_store_status); | |
287 | for (;;); | |
1da177e4 LT |
288 | } |
289 | ||
290 | /* | |
291 | * This is the main routine where commands issued by other | |
292 | * cpus are handled. | |
293 | */ | |
294 | ||
2b67fc46 | 295 | static void do_ext_call_interrupt(__u16 code) |
1da177e4 LT |
296 | { |
297 | unsigned long bits; | |
298 | ||
299 | /* | |
300 | * handle bit signal external calls | |
301 | * | |
302 | * For the ec_schedule signal we have to do nothing. All the work | |
303 | * is done automatically when we return from the interrupt. | |
304 | */ | |
305 | bits = xchg(&S390_lowcore.ext_call_fast, 0); | |
306 | ||
307 | if (test_bit(ec_call_function, &bits)) | |
308 | do_call_function(); | |
309 | } | |
310 | ||
311 | /* | |
312 | * Send an external call sigp to another cpu and return without waiting | |
313 | * for its completion. | |
314 | */ | |
315 | static void smp_ext_bitcall(int cpu, ec_bit_sig sig) | |
316 | { | |
317 | /* | |
318 | * Set signaling bit in lowcore of target cpu and kick it | |
319 | */ | |
320 | set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); | |
99b2d8df | 321 | while(signal_processor(cpu, sigp_emergency_signal) == sigp_busy) |
1da177e4 LT |
322 | udelay(10); |
323 | } | |
324 | ||
325 | /* | |
326 | * Send an external call sigp to every other cpu in the system and | |
327 | * return without waiting for its completion. | |
328 | */ | |
329 | static void smp_ext_bitcall_others(ec_bit_sig sig) | |
330 | { | |
331 | int cpu; | |
332 | ||
333 | for_each_online_cpu(cpu) { | |
334 | if (cpu == smp_processor_id()) | |
335 | continue; | |
336 | /* | |
337 | * Set signaling bit in lowcore of target cpu and kick it | |
338 | */ | |
339 | set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast); | |
99b2d8df | 340 | while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy) |
1da177e4 LT |
341 | udelay(10); |
342 | } | |
343 | } | |
344 | ||
347a8dc3 | 345 | #ifndef CONFIG_64BIT |
1da177e4 LT |
346 | /* |
347 | * this function sends a 'purge tlb' signal to another CPU. | |
348 | */ | |
349 | void smp_ptlb_callback(void *info) | |
350 | { | |
351 | local_flush_tlb(); | |
352 | } | |
353 | ||
354 | void smp_ptlb_all(void) | |
355 | { | |
356 | on_each_cpu(smp_ptlb_callback, NULL, 0, 1); | |
357 | } | |
358 | EXPORT_SYMBOL(smp_ptlb_all); | |
347a8dc3 | 359 | #endif /* ! CONFIG_64BIT */ |
1da177e4 LT |
360 | |
361 | /* | |
362 | * this function sends a 'reschedule' IPI to another CPU. | |
363 | * it goes straight through and wastes no time serializing | |
364 | * anything. Worst case is that we lose a reschedule ... | |
365 | */ | |
366 | void smp_send_reschedule(int cpu) | |
367 | { | |
368 | smp_ext_bitcall(cpu, ec_schedule); | |
369 | } | |
370 | ||
371 | /* | |
372 | * parameter area for the set/clear control bit callbacks | |
373 | */ | |
94c12cc7 | 374 | struct ec_creg_mask_parms { |
1da177e4 LT |
375 | unsigned long orvals[16]; |
376 | unsigned long andvals[16]; | |
94c12cc7 | 377 | }; |
1da177e4 LT |
378 | |
379 | /* | |
380 | * callback for setting/clearing control bits | |
381 | */ | |
2b67fc46 | 382 | static void smp_ctl_bit_callback(void *info) { |
94c12cc7 | 383 | struct ec_creg_mask_parms *pp = info; |
1da177e4 LT |
384 | unsigned long cregs[16]; |
385 | int i; | |
386 | ||
94c12cc7 MS |
387 | __ctl_store(cregs, 0, 15); |
388 | for (i = 0; i <= 15; i++) | |
1da177e4 | 389 | cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i]; |
94c12cc7 | 390 | __ctl_load(cregs, 0, 15); |
1da177e4 LT |
391 | } |
392 | ||
393 | /* | |
394 | * Set a bit in a control register of all cpus | |
395 | */ | |
94c12cc7 MS |
396 | void smp_ctl_set_bit(int cr, int bit) |
397 | { | |
398 | struct ec_creg_mask_parms parms; | |
1da177e4 | 399 | |
94c12cc7 MS |
400 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
401 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 402 | parms.orvals[cr] = 1 << bit; |
94c12cc7 | 403 | on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); |
1da177e4 LT |
404 | } |
405 | ||
406 | /* | |
407 | * Clear a bit in a control register of all cpus | |
408 | */ | |
94c12cc7 MS |
409 | void smp_ctl_clear_bit(int cr, int bit) |
410 | { | |
411 | struct ec_creg_mask_parms parms; | |
1da177e4 | 412 | |
94c12cc7 MS |
413 | memset(&parms.orvals, 0, sizeof(parms.orvals)); |
414 | memset(&parms.andvals, 0xff, sizeof(parms.andvals)); | |
1da177e4 | 415 | parms.andvals[cr] = ~(1L << bit); |
94c12cc7 | 416 | on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); |
1da177e4 LT |
417 | } |
418 | ||
419 | /* | |
420 | * Lets check how many CPUs we have. | |
421 | */ | |
422 | ||
255acee7 HC |
423 | static unsigned int |
424 | __init smp_count_cpus(void) | |
1da177e4 | 425 | { |
255acee7 | 426 | unsigned int cpu, num_cpus; |
1da177e4 LT |
427 | __u16 boot_cpu_addr; |
428 | ||
429 | /* | |
430 | * cpu 0 is the boot cpu. See smp_prepare_boot_cpu. | |
431 | */ | |
432 | ||
433 | boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr; | |
434 | current_thread_info()->cpu = 0; | |
435 | num_cpus = 1; | |
255acee7 | 436 | for (cpu = 0; cpu <= 65535; cpu++) { |
1da177e4 LT |
437 | if ((__u16) cpu == boot_cpu_addr) |
438 | continue; | |
255acee7 HC |
439 | __cpu_logical_map[1] = (__u16) cpu; |
440 | if (signal_processor(1, sigp_sense) == | |
1da177e4 LT |
441 | sigp_not_operational) |
442 | continue; | |
1da177e4 LT |
443 | num_cpus++; |
444 | } | |
445 | ||
1da177e4 LT |
446 | printk("Detected %d CPU's\n",(int) num_cpus); |
447 | printk("Boot cpu address %2X\n", boot_cpu_addr); | |
255acee7 HC |
448 | |
449 | return num_cpus; | |
1da177e4 LT |
450 | } |
451 | ||
452 | /* | |
453 | * Activate a secondary processor. | |
454 | */ | |
1da177e4 LT |
455 | int __devinit start_secondary(void *cpuvoid) |
456 | { | |
457 | /* Setup the cpu */ | |
458 | cpu_init(); | |
5bfb5d69 | 459 | preempt_disable(); |
1da177e4 LT |
460 | /* init per CPU timer */ |
461 | init_cpu_timer(); | |
462 | #ifdef CONFIG_VIRT_TIMER | |
463 | init_cpu_vtimer(); | |
464 | #endif | |
1da177e4 | 465 | /* Enable pfault pseudo page faults on this cpu. */ |
29b08d2b HC |
466 | pfault_init(); |
467 | ||
1da177e4 LT |
468 | /* Mark this cpu as online */ |
469 | cpu_set(smp_processor_id(), cpu_online_map); | |
470 | /* Switch on interrupts */ | |
471 | local_irq_enable(); | |
472 | /* Print info about this processor */ | |
473 | print_cpu_info(&S390_lowcore.cpu_data); | |
474 | /* cpu_idle will call schedule for us */ | |
475 | cpu_idle(); | |
476 | return 0; | |
477 | } | |
478 | ||
479 | static void __init smp_create_idle(unsigned int cpu) | |
480 | { | |
481 | struct task_struct *p; | |
482 | ||
483 | /* | |
484 | * don't care about the psw and regs settings since we'll never | |
485 | * reschedule the forked task. | |
486 | */ | |
487 | p = fork_idle(cpu); | |
488 | if (IS_ERR(p)) | |
489 | panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p)); | |
490 | current_set[cpu] = p; | |
491 | } | |
492 | ||
493 | /* Reserving and releasing of CPUs */ | |
494 | ||
495 | static DEFINE_SPINLOCK(smp_reserve_lock); | |
496 | static int smp_cpu_reserved[NR_CPUS]; | |
497 | ||
498 | int | |
499 | smp_get_cpu(cpumask_t cpu_mask) | |
500 | { | |
501 | unsigned long flags; | |
502 | int cpu; | |
503 | ||
504 | spin_lock_irqsave(&smp_reserve_lock, flags); | |
505 | /* Try to find an already reserved cpu. */ | |
506 | for_each_cpu_mask(cpu, cpu_mask) { | |
507 | if (smp_cpu_reserved[cpu] != 0) { | |
508 | smp_cpu_reserved[cpu]++; | |
509 | /* Found one. */ | |
510 | goto out; | |
511 | } | |
512 | } | |
513 | /* Reserve a new cpu from cpu_mask. */ | |
514 | for_each_cpu_mask(cpu, cpu_mask) { | |
515 | if (cpu_online(cpu)) { | |
516 | smp_cpu_reserved[cpu]++; | |
517 | goto out; | |
518 | } | |
519 | } | |
520 | cpu = -ENODEV; | |
521 | out: | |
522 | spin_unlock_irqrestore(&smp_reserve_lock, flags); | |
523 | return cpu; | |
524 | } | |
525 | ||
526 | void | |
527 | smp_put_cpu(int cpu) | |
528 | { | |
529 | unsigned long flags; | |
530 | ||
531 | spin_lock_irqsave(&smp_reserve_lock, flags); | |
532 | smp_cpu_reserved[cpu]--; | |
533 | spin_unlock_irqrestore(&smp_reserve_lock, flags); | |
534 | } | |
535 | ||
536 | static inline int | |
537 | cpu_stopped(int cpu) | |
538 | { | |
539 | __u32 status; | |
540 | ||
541 | /* Check for stopped state */ | |
542 | if (signal_processor_ps(&status, 0, cpu, sigp_sense) == sigp_status_stored) { | |
543 | if (status & 0x40) | |
544 | return 1; | |
545 | } | |
546 | return 0; | |
547 | } | |
548 | ||
549 | /* Upping and downing of CPUs */ | |
550 | ||
551 | int | |
552 | __cpu_up(unsigned int cpu) | |
553 | { | |
554 | struct task_struct *idle; | |
555 | struct _lowcore *cpu_lowcore; | |
556 | struct stack_frame *sf; | |
557 | sigp_ccode ccode; | |
558 | int curr_cpu; | |
559 | ||
560 | for (curr_cpu = 0; curr_cpu <= 65535; curr_cpu++) { | |
561 | __cpu_logical_map[cpu] = (__u16) curr_cpu; | |
562 | if (cpu_stopped(cpu)) | |
563 | break; | |
564 | } | |
565 | ||
566 | if (!cpu_stopped(cpu)) | |
567 | return -ENODEV; | |
568 | ||
569 | ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]), | |
570 | cpu, sigp_set_prefix); | |
571 | if (ccode){ | |
572 | printk("sigp_set_prefix failed for cpu %d " | |
573 | "with condition code %d\n", | |
574 | (int) cpu, (int) ccode); | |
575 | return -EIO; | |
576 | } | |
577 | ||
578 | idle = current_set[cpu]; | |
579 | cpu_lowcore = lowcore_ptr[cpu]; | |
580 | cpu_lowcore->kernel_stack = (unsigned long) | |
30af7120 | 581 | task_stack_page(idle) + (THREAD_SIZE); |
1da177e4 LT |
582 | sf = (struct stack_frame *) (cpu_lowcore->kernel_stack |
583 | - sizeof(struct pt_regs) | |
584 | - sizeof(struct stack_frame)); | |
585 | memset(sf, 0, sizeof(struct stack_frame)); | |
586 | sf->gprs[9] = (unsigned long) sf; | |
587 | cpu_lowcore->save_area[15] = (unsigned long) sf; | |
588 | __ctl_store(cpu_lowcore->cregs_save_area[0], 0, 15); | |
94c12cc7 MS |
589 | asm volatile( |
590 | " stam 0,15,0(%0)" | |
591 | : : "a" (&cpu_lowcore->access_regs_save_area) : "memory"); | |
1da177e4 LT |
592 | cpu_lowcore->percpu_offset = __per_cpu_offset[cpu]; |
593 | cpu_lowcore->current_task = (unsigned long) idle; | |
594 | cpu_lowcore->cpu_data.cpu_nr = cpu; | |
595 | eieio(); | |
699ff13f MR |
596 | |
597 | while (signal_processor(cpu,sigp_restart) == sigp_busy) | |
598 | udelay(10); | |
1da177e4 LT |
599 | |
600 | while (!cpu_online(cpu)) | |
601 | cpu_relax(); | |
602 | return 0; | |
603 | } | |
604 | ||
255acee7 | 605 | static unsigned int __initdata additional_cpus; |
37a33026 | 606 | static unsigned int __initdata possible_cpus; |
255acee7 HC |
607 | |
608 | void __init smp_setup_cpu_possible_map(void) | |
609 | { | |
54330456 | 610 | unsigned int phy_cpus, pos_cpus, cpu; |
255acee7 | 611 | |
54330456 HC |
612 | phy_cpus = smp_count_cpus(); |
613 | pos_cpus = min(phy_cpus + additional_cpus, (unsigned int) NR_CPUS); | |
255acee7 | 614 | |
37a33026 | 615 | if (possible_cpus) |
54330456 | 616 | pos_cpus = min(possible_cpus, (unsigned int) NR_CPUS); |
255acee7 | 617 | |
54330456 | 618 | for (cpu = 0; cpu < pos_cpus; cpu++) |
255acee7 HC |
619 | cpu_set(cpu, cpu_possible_map); |
620 | ||
54330456 HC |
621 | phy_cpus = min(phy_cpus, pos_cpus); |
622 | ||
623 | for (cpu = 0; cpu < phy_cpus; cpu++) | |
624 | cpu_set(cpu, cpu_present_map); | |
255acee7 HC |
625 | } |
626 | ||
627 | #ifdef CONFIG_HOTPLUG_CPU | |
628 | ||
629 | static int __init setup_additional_cpus(char *s) | |
630 | { | |
631 | additional_cpus = simple_strtoul(s, NULL, 0); | |
632 | return 0; | |
633 | } | |
634 | early_param("additional_cpus", setup_additional_cpus); | |
635 | ||
37a33026 HC |
636 | static int __init setup_possible_cpus(char *s) |
637 | { | |
638 | possible_cpus = simple_strtoul(s, NULL, 0); | |
639 | return 0; | |
640 | } | |
641 | early_param("possible_cpus", setup_possible_cpus); | |
642 | ||
1da177e4 LT |
643 | int |
644 | __cpu_disable(void) | |
645 | { | |
646 | unsigned long flags; | |
94c12cc7 | 647 | struct ec_creg_mask_parms cr_parms; |
f3705136 | 648 | int cpu = smp_processor_id(); |
1da177e4 LT |
649 | |
650 | spin_lock_irqsave(&smp_reserve_lock, flags); | |
f3705136 | 651 | if (smp_cpu_reserved[cpu] != 0) { |
1da177e4 LT |
652 | spin_unlock_irqrestore(&smp_reserve_lock, flags); |
653 | return -EBUSY; | |
654 | } | |
f3705136 | 655 | cpu_clear(cpu, cpu_online_map); |
1da177e4 | 656 | |
1da177e4 | 657 | /* Disable pfault pseudo page faults on this cpu. */ |
29b08d2b | 658 | pfault_fini(); |
1da177e4 | 659 | |
94c12cc7 MS |
660 | memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals)); |
661 | memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals)); | |
1da177e4 | 662 | |
94c12cc7 | 663 | /* disable all external interrupts */ |
1da177e4 LT |
664 | cr_parms.orvals[0] = 0; |
665 | cr_parms.andvals[0] = ~(1<<15 | 1<<14 | 1<<13 | 1<<12 | | |
666 | 1<<11 | 1<<10 | 1<< 6 | 1<< 4); | |
1da177e4 | 667 | /* disable all I/O interrupts */ |
1da177e4 LT |
668 | cr_parms.orvals[6] = 0; |
669 | cr_parms.andvals[6] = ~(1<<31 | 1<<30 | 1<<29 | 1<<28 | | |
670 | 1<<27 | 1<<26 | 1<<25 | 1<<24); | |
1da177e4 | 671 | /* disable most machine checks */ |
1da177e4 LT |
672 | cr_parms.orvals[14] = 0; |
673 | cr_parms.andvals[14] = ~(1<<28 | 1<<27 | 1<<26 | 1<<25 | 1<<24); | |
94c12cc7 | 674 | |
1da177e4 LT |
675 | smp_ctl_bit_callback(&cr_parms); |
676 | ||
677 | spin_unlock_irqrestore(&smp_reserve_lock, flags); | |
678 | return 0; | |
679 | } | |
680 | ||
681 | void | |
682 | __cpu_die(unsigned int cpu) | |
683 | { | |
684 | /* Wait until target cpu is down */ | |
685 | while (!smp_cpu_not_running(cpu)) | |
686 | cpu_relax(); | |
687 | printk("Processor %d spun down\n", cpu); | |
688 | } | |
689 | ||
690 | void | |
691 | cpu_die(void) | |
692 | { | |
693 | idle_task_exit(); | |
694 | signal_processor(smp_processor_id(), sigp_stop); | |
695 | BUG(); | |
696 | for(;;); | |
697 | } | |
698 | ||
255acee7 HC |
699 | #endif /* CONFIG_HOTPLUG_CPU */ |
700 | ||
1da177e4 LT |
701 | /* |
702 | * Cycle through the processors and setup structures. | |
703 | */ | |
704 | ||
705 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
706 | { | |
707 | unsigned long stack; | |
708 | unsigned int cpu; | |
709 | int i; | |
710 | ||
99b2d8df HC |
711 | /* request the 0x1201 emergency signal external interrupt */ |
712 | if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0) | |
713 | panic("Couldn't request external interrupt 0x1201"); | |
1da177e4 LT |
714 | memset(lowcore_ptr,0,sizeof(lowcore_ptr)); |
715 | /* | |
716 | * Initialize prefix pages and stacks for all possible cpus | |
717 | */ | |
718 | print_cpu_info(&S390_lowcore.cpu_data); | |
719 | ||
97db7fbf | 720 | for_each_possible_cpu(i) { |
1da177e4 LT |
721 | lowcore_ptr[i] = (struct _lowcore *) |
722 | __get_free_pages(GFP_KERNEL|GFP_DMA, | |
723 | sizeof(void*) == 8 ? 1 : 0); | |
724 | stack = __get_free_pages(GFP_KERNEL,ASYNC_ORDER); | |
725 | if (lowcore_ptr[i] == NULL || stack == 0ULL) | |
726 | panic("smp_boot_cpus failed to allocate memory\n"); | |
727 | ||
728 | *(lowcore_ptr[i]) = S390_lowcore; | |
729 | lowcore_ptr[i]->async_stack = stack + (ASYNC_SIZE); | |
1da177e4 LT |
730 | stack = __get_free_pages(GFP_KERNEL,0); |
731 | if (stack == 0ULL) | |
732 | panic("smp_boot_cpus failed to allocate memory\n"); | |
733 | lowcore_ptr[i]->panic_stack = stack + (PAGE_SIZE); | |
347a8dc3 | 734 | #ifndef CONFIG_64BIT |
77fa2245 HC |
735 | if (MACHINE_HAS_IEEE) { |
736 | lowcore_ptr[i]->extended_save_area_addr = | |
737 | (__u32) __get_free_pages(GFP_KERNEL,0); | |
738 | if (lowcore_ptr[i]->extended_save_area_addr == 0) | |
739 | panic("smp_boot_cpus failed to " | |
740 | "allocate memory\n"); | |
741 | } | |
1da177e4 LT |
742 | #endif |
743 | } | |
347a8dc3 | 744 | #ifndef CONFIG_64BIT |
77fa2245 HC |
745 | if (MACHINE_HAS_IEEE) |
746 | ctl_set_bit(14, 29); /* enable extended save area */ | |
747 | #endif | |
1da177e4 LT |
748 | set_prefix((u32)(unsigned long) lowcore_ptr[smp_processor_id()]); |
749 | ||
97db7fbf | 750 | for_each_possible_cpu(cpu) |
1da177e4 LT |
751 | if (cpu != smp_processor_id()) |
752 | smp_create_idle(cpu); | |
753 | } | |
754 | ||
755 | void __devinit smp_prepare_boot_cpu(void) | |
756 | { | |
757 | BUG_ON(smp_processor_id() != 0); | |
758 | ||
759 | cpu_set(0, cpu_online_map); | |
1da177e4 LT |
760 | S390_lowcore.percpu_offset = __per_cpu_offset[0]; |
761 | current_set[0] = current; | |
762 | } | |
763 | ||
764 | void smp_cpus_done(unsigned int max_cpus) | |
765 | { | |
54330456 | 766 | cpu_present_map = cpu_possible_map; |
1da177e4 LT |
767 | } |
768 | ||
769 | /* | |
770 | * the frequency of the profiling timer can be changed | |
771 | * by writing a multiplier value into /proc/profile. | |
772 | * | |
773 | * usually you want to run this on all CPUs ;) | |
774 | */ | |
775 | int setup_profiling_timer(unsigned int multiplier) | |
776 | { | |
777 | return 0; | |
778 | } | |
779 | ||
780 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | |
781 | ||
782 | static int __init topology_init(void) | |
783 | { | |
784 | int cpu; | |
785 | int ret; | |
786 | ||
97db7fbf | 787 | for_each_possible_cpu(cpu) { |
6721f778 HC |
788 | struct cpu *c = &per_cpu(cpu_devices, cpu); |
789 | ||
790 | c->hotpluggable = 1; | |
791 | ret = register_cpu(c, cpu); | |
1da177e4 LT |
792 | if (ret) |
793 | printk(KERN_WARNING "topology_init: register_cpu %d " | |
794 | "failed (%d)\n", cpu, ret); | |
795 | } | |
796 | return 0; | |
797 | } | |
798 | ||
799 | subsys_initcall(topology_init); | |
800 | ||
255acee7 | 801 | EXPORT_SYMBOL(cpu_online_map); |
1da177e4 LT |
802 | EXPORT_SYMBOL(cpu_possible_map); |
803 | EXPORT_SYMBOL(lowcore_ptr); | |
804 | EXPORT_SYMBOL(smp_ctl_set_bit); | |
805 | EXPORT_SYMBOL(smp_ctl_clear_bit); | |
806 | EXPORT_SYMBOL(smp_call_function); | |
807 | EXPORT_SYMBOL(smp_get_cpu); | |
808 | EXPORT_SYMBOL(smp_put_cpu); |