KVM: MMU: Fix is_rmap_pte() with io ptes
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
1d737c8a 21#include "mmu.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
6aa8b732 30
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31#include <asm/page.h>
32#include <asm/cmpxchg.h>
4e542370 33#include <asm/io.h>
6aa8b732 34
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35#undef MMU_DEBUG
36
37#undef AUDIT
38
39#ifdef AUDIT
40static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
41#else
42static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
43#endif
44
45#ifdef MMU_DEBUG
46
47#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
48#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
49
50#else
51
52#define pgprintk(x...) do { } while (0)
53#define rmap_printk(x...) do { } while (0)
54
55#endif
56
57#if defined(MMU_DEBUG) || defined(AUDIT)
58static int dbg = 1;
59#endif
6aa8b732 60
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61#ifndef MMU_DEBUG
62#define ASSERT(x) do { } while (0)
63#else
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64#define ASSERT(x) \
65 if (!(x)) { \
66 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
67 __FILE__, __LINE__, #x); \
68 }
d6c69ee9 69#endif
6aa8b732 70
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71#define PT64_PT_BITS 9
72#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
73#define PT32_PT_BITS 10
74#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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75
76#define PT_WRITABLE_SHIFT 1
77
78#define PT_PRESENT_MASK (1ULL << 0)
79#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
80#define PT_USER_MASK (1ULL << 2)
81#define PT_PWT_MASK (1ULL << 3)
82#define PT_PCD_MASK (1ULL << 4)
83#define PT_ACCESSED_MASK (1ULL << 5)
84#define PT_DIRTY_MASK (1ULL << 6)
85#define PT_PAGE_SIZE_MASK (1ULL << 7)
86#define PT_PAT_MASK (1ULL << 7)
87#define PT_GLOBAL_MASK (1ULL << 8)
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88#define PT64_NX_SHIFT 63
89#define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
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90
91#define PT_PAT_SHIFT 7
92#define PT_DIR_PAT_SHIFT 12
93#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
94
95#define PT32_DIR_PSE36_SIZE 4
96#define PT32_DIR_PSE36_SHIFT 13
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97#define PT32_DIR_PSE36_MASK \
98 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
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99
100
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101#define PT_FIRST_AVAIL_BITS_SHIFT 9
102#define PT64_SECOND_AVAIL_BITS_SHIFT 52
103
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104#define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
105
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106#define VALID_PAGE(x) ((x) != INVALID_PAGE)
107
108#define PT64_LEVEL_BITS 9
109
110#define PT64_LEVEL_SHIFT(level) \
d77c26fc 111 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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112
113#define PT64_LEVEL_MASK(level) \
114 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
115
116#define PT64_INDEX(address, level)\
117 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
118
119
120#define PT32_LEVEL_BITS 10
121
122#define PT32_LEVEL_SHIFT(level) \
d77c26fc 123 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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124
125#define PT32_LEVEL_MASK(level) \
126 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
127
128#define PT32_INDEX(address, level)\
129 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
130
131
27aba766 132#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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133#define PT64_DIR_BASE_ADDR_MASK \
134 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
135
136#define PT32_BASE_ADDR_MASK PAGE_MASK
137#define PT32_DIR_BASE_ADDR_MASK \
138 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
139
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140#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
141 | PT64_NX_MASK)
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142
143#define PFERR_PRESENT_MASK (1U << 0)
144#define PFERR_WRITE_MASK (1U << 1)
145#define PFERR_USER_MASK (1U << 2)
73b1087e 146#define PFERR_FETCH_MASK (1U << 4)
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147
148#define PT64_ROOT_LEVEL 4
149#define PT32_ROOT_LEVEL 2
150#define PT32E_ROOT_LEVEL 3
151
152#define PT_DIRECTORY_LEVEL 2
153#define PT_PAGE_TABLE_LEVEL 1
154
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155#define RMAP_EXT 4
156
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157#define ACC_EXEC_MASK 1
158#define ACC_WRITE_MASK PT_WRITABLE_MASK
159#define ACC_USER_MASK PT_USER_MASK
160#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
161
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162struct kvm_rmap_desc {
163 u64 *shadow_ptes[RMAP_EXT];
164 struct kvm_rmap_desc *more;
165};
166
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167static struct kmem_cache *pte_chain_cache;
168static struct kmem_cache *rmap_desc_cache;
d3d25b04 169static struct kmem_cache *mmu_page_header_cache;
b5a33a75 170
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171static u64 __read_mostly shadow_trap_nonpresent_pte;
172static u64 __read_mostly shadow_notrap_nonpresent_pte;
173
174void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
175{
176 shadow_trap_nonpresent_pte = trap_pte;
177 shadow_notrap_nonpresent_pte = notrap_pte;
178}
179EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
180
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181static int is_write_protection(struct kvm_vcpu *vcpu)
182{
ad312c7c 183 return vcpu->arch.cr0 & X86_CR0_WP;
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184}
185
186static int is_cpuid_PSE36(void)
187{
188 return 1;
189}
190
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191static int is_nx(struct kvm_vcpu *vcpu)
192{
ad312c7c 193 return vcpu->arch.shadow_efer & EFER_NX;
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194}
195
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196static int is_present_pte(unsigned long pte)
197{
198 return pte & PT_PRESENT_MASK;
199}
200
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201static int is_shadow_present_pte(u64 pte)
202{
203 pte &= ~PT_SHADOW_IO_MARK;
204 return pte != shadow_trap_nonpresent_pte
205 && pte != shadow_notrap_nonpresent_pte;
206}
207
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208static int is_writeble_pte(unsigned long pte)
209{
210 return pte & PT_WRITABLE_MASK;
211}
212
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213static int is_dirty_pte(unsigned long pte)
214{
215 return pte & PT_DIRTY_MASK;
216}
217
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218static int is_io_pte(unsigned long pte)
219{
220 return pte & PT_SHADOW_IO_MARK;
221}
222
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223static int is_rmap_pte(u64 pte)
224{
4b1a80fa 225 return is_shadow_present_pte(pte);
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226}
227
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228static gfn_t pse36_gfn_delta(u32 gpte)
229{
230 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
231
232 return (gpte & PT32_DIR_PSE36_MASK) << shift;
233}
234
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235static void set_shadow_pte(u64 *sptep, u64 spte)
236{
237#ifdef CONFIG_X86_64
238 set_64bit((unsigned long *)sptep, spte);
239#else
240 set_64bit((unsigned long long *)sptep, spte);
241#endif
242}
243
e2dec939 244static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 245 struct kmem_cache *base_cache, int min)
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246{
247 void *obj;
248
249 if (cache->nobjs >= min)
e2dec939 250 return 0;
714b93da 251 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 252 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 253 if (!obj)
e2dec939 254 return -ENOMEM;
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255 cache->objects[cache->nobjs++] = obj;
256 }
e2dec939 257 return 0;
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258}
259
260static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
261{
262 while (mc->nobjs)
263 kfree(mc->objects[--mc->nobjs]);
264}
265
c1158e63 266static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 267 int min)
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268{
269 struct page *page;
270
271 if (cache->nobjs >= min)
272 return 0;
273 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 274 page = alloc_page(GFP_KERNEL);
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275 if (!page)
276 return -ENOMEM;
277 set_page_private(page, 0);
278 cache->objects[cache->nobjs++] = page_address(page);
279 }
280 return 0;
281}
282
283static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
284{
285 while (mc->nobjs)
c4d198d5 286 free_page((unsigned long)mc->objects[--mc->nobjs]);
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287}
288
2e3e5882 289static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 290{
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291 int r;
292
ad312c7c 293 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 294 pte_chain_cache, 4);
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295 if (r)
296 goto out;
ad312c7c 297 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
2e3e5882 298 rmap_desc_cache, 1);
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299 if (r)
300 goto out;
ad312c7c 301 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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302 if (r)
303 goto out;
ad312c7c 304 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 305 mmu_page_header_cache, 4);
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306out:
307 return r;
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308}
309
310static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
311{
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312 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
313 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
314 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
315 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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316}
317
318static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
319 size_t size)
320{
321 void *p;
322
323 BUG_ON(!mc->nobjs);
324 p = mc->objects[--mc->nobjs];
325 memset(p, 0, size);
326 return p;
327}
328
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329static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
330{
ad312c7c 331 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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332 sizeof(struct kvm_pte_chain));
333}
334
90cb0529 335static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 336{
90cb0529 337 kfree(pc);
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338}
339
340static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
341{
ad312c7c 342 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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343 sizeof(struct kvm_rmap_desc));
344}
345
90cb0529 346static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 347{
90cb0529 348 kfree(rd);
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349}
350
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351/*
352 * Take gfn and return the reverse mapping to it.
353 * Note: gfn must be unaliased before this function get called
354 */
355
356static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
357{
358 struct kvm_memory_slot *slot;
359
360 slot = gfn_to_memslot(kvm, gfn);
361 return &slot->rmap[gfn - slot->base_gfn];
362}
363
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364/*
365 * Reverse mapping data structures:
366 *
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367 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
368 * that points to page_address(page).
cd4a4e53 369 *
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370 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
371 * containing more mappings.
cd4a4e53 372 */
290fc38d 373static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
cd4a4e53 374{
4db35314 375 struct kvm_mmu_page *sp;
cd4a4e53 376 struct kvm_rmap_desc *desc;
290fc38d 377 unsigned long *rmapp;
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378 int i;
379
380 if (!is_rmap_pte(*spte))
381 return;
290fc38d 382 gfn = unalias_gfn(vcpu->kvm, gfn);
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383 sp = page_header(__pa(spte));
384 sp->gfns[spte - sp->spt] = gfn;
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385 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
386 if (!*rmapp) {
cd4a4e53 387 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
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388 *rmapp = (unsigned long)spte;
389 } else if (!(*rmapp & 1)) {
cd4a4e53 390 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 391 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 392 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 393 desc->shadow_ptes[1] = spte;
290fc38d 394 *rmapp = (unsigned long)desc | 1;
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395 } else {
396 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 397 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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398 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
399 desc = desc->more;
400 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 401 desc->more = mmu_alloc_rmap_desc(vcpu);
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402 desc = desc->more;
403 }
404 for (i = 0; desc->shadow_ptes[i]; ++i)
405 ;
406 desc->shadow_ptes[i] = spte;
407 }
408}
409
290fc38d 410static void rmap_desc_remove_entry(unsigned long *rmapp,
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411 struct kvm_rmap_desc *desc,
412 int i,
413 struct kvm_rmap_desc *prev_desc)
414{
415 int j;
416
417 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
418 ;
419 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 420 desc->shadow_ptes[j] = NULL;
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421 if (j != 0)
422 return;
423 if (!prev_desc && !desc->more)
290fc38d 424 *rmapp = (unsigned long)desc->shadow_ptes[0];
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425 else
426 if (prev_desc)
427 prev_desc->more = desc->more;
428 else
290fc38d 429 *rmapp = (unsigned long)desc->more | 1;
90cb0529 430 mmu_free_rmap_desc(desc);
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431}
432
290fc38d 433static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 434{
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435 struct kvm_rmap_desc *desc;
436 struct kvm_rmap_desc *prev_desc;
4db35314 437 struct kvm_mmu_page *sp;
76c35c6e 438 struct page *page;
290fc38d 439 unsigned long *rmapp;
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440 int i;
441
442 if (!is_rmap_pte(*spte))
443 return;
4db35314 444 sp = page_header(__pa(spte));
76c35c6e 445 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
448353ca 446 mark_page_accessed(page);
b4231d61 447 if (is_writeble_pte(*spte))
76c35c6e 448 kvm_release_page_dirty(page);
b4231d61 449 else
76c35c6e 450 kvm_release_page_clean(page);
4db35314 451 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
290fc38d 452 if (!*rmapp) {
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453 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
454 BUG();
290fc38d 455 } else if (!(*rmapp & 1)) {
cd4a4e53 456 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 457 if ((u64 *)*rmapp != spte) {
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458 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
459 spte, *spte);
460 BUG();
461 }
290fc38d 462 *rmapp = 0;
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463 } else {
464 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 465 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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466 prev_desc = NULL;
467 while (desc) {
468 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
469 if (desc->shadow_ptes[i] == spte) {
290fc38d 470 rmap_desc_remove_entry(rmapp,
714b93da 471 desc, i,
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472 prev_desc);
473 return;
474 }
475 prev_desc = desc;
476 desc = desc->more;
477 }
478 BUG();
479 }
480}
481
98348e95 482static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 483{
374cbac0 484 struct kvm_rmap_desc *desc;
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485 struct kvm_rmap_desc *prev_desc;
486 u64 *prev_spte;
487 int i;
488
489 if (!*rmapp)
490 return NULL;
491 else if (!(*rmapp & 1)) {
492 if (!spte)
493 return (u64 *)*rmapp;
494 return NULL;
495 }
496 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
497 prev_desc = NULL;
498 prev_spte = NULL;
499 while (desc) {
500 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
501 if (prev_spte == spte)
502 return desc->shadow_ptes[i];
503 prev_spte = desc->shadow_ptes[i];
504 }
505 desc = desc->more;
506 }
507 return NULL;
508}
509
510static void rmap_write_protect(struct kvm *kvm, u64 gfn)
511{
290fc38d 512 unsigned long *rmapp;
374cbac0 513 u64 *spte;
caa5b8a5 514 int write_protected = 0;
374cbac0 515
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516 gfn = unalias_gfn(kvm, gfn);
517 rmapp = gfn_to_rmap(kvm, gfn);
374cbac0 518
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519 spte = rmap_next(kvm, rmapp, NULL);
520 while (spte) {
374cbac0 521 BUG_ON(!spte);
374cbac0 522 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 523 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 524 if (is_writeble_pte(*spte)) {
9647c14c 525 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
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526 write_protected = 1;
527 }
9647c14c 528 spte = rmap_next(kvm, rmapp, spte);
374cbac0 529 }
caa5b8a5
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530 if (write_protected)
531 kvm_flush_remote_tlbs(kvm);
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532}
533
d6c69ee9 534#ifdef MMU_DEBUG
47ad8e68 535static int is_empty_shadow_page(u64 *spt)
6aa8b732 536{
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537 u64 *pos;
538 u64 *end;
539
47ad8e68 540 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
c7addb90 541 if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
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542 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
543 pos, *pos);
6aa8b732 544 return 0;
139bdb2d 545 }
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546 return 1;
547}
d6c69ee9 548#endif
6aa8b732 549
4db35314 550static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 551{
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552 ASSERT(is_empty_shadow_page(sp->spt));
553 list_del(&sp->link);
554 __free_page(virt_to_page(sp->spt));
555 __free_page(virt_to_page(sp->gfns));
556 kfree(sp);
f05e70ac 557 ++kvm->arch.n_free_mmu_pages;
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558}
559
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560static unsigned kvm_page_table_hashfn(gfn_t gfn)
561{
562 return gfn;
563}
564
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565static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
566 u64 *parent_pte)
6aa8b732 567{
4db35314 568 struct kvm_mmu_page *sp;
6aa8b732 569
ad312c7c
ZX
570 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
571 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
572 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 573 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 574 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
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575 ASSERT(is_empty_shadow_page(sp->spt));
576 sp->slot_bitmap = 0;
577 sp->multimapped = 0;
578 sp->parent_pte = parent_pte;
f05e70ac 579 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 580 return sp;
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581}
582
714b93da 583static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 584 struct kvm_mmu_page *sp, u64 *parent_pte)
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585{
586 struct kvm_pte_chain *pte_chain;
587 struct hlist_node *node;
588 int i;
589
590 if (!parent_pte)
591 return;
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592 if (!sp->multimapped) {
593 u64 *old = sp->parent_pte;
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594
595 if (!old) {
4db35314 596 sp->parent_pte = parent_pte;
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597 return;
598 }
4db35314 599 sp->multimapped = 1;
714b93da 600 pte_chain = mmu_alloc_pte_chain(vcpu);
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601 INIT_HLIST_HEAD(&sp->parent_ptes);
602 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
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603 pte_chain->parent_ptes[0] = old;
604 }
4db35314 605 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
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606 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
607 continue;
608 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
609 if (!pte_chain->parent_ptes[i]) {
610 pte_chain->parent_ptes[i] = parent_pte;
611 return;
612 }
613 }
714b93da 614 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 615 BUG_ON(!pte_chain);
4db35314 616 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
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617 pte_chain->parent_ptes[0] = parent_pte;
618}
619
4db35314 620static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
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621 u64 *parent_pte)
622{
623 struct kvm_pte_chain *pte_chain;
624 struct hlist_node *node;
625 int i;
626
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627 if (!sp->multimapped) {
628 BUG_ON(sp->parent_pte != parent_pte);
629 sp->parent_pte = NULL;
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630 return;
631 }
4db35314 632 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
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633 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
634 if (!pte_chain->parent_ptes[i])
635 break;
636 if (pte_chain->parent_ptes[i] != parent_pte)
637 continue;
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638 while (i + 1 < NR_PTE_CHAIN_ENTRIES
639 && pte_chain->parent_ptes[i + 1]) {
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640 pte_chain->parent_ptes[i]
641 = pte_chain->parent_ptes[i + 1];
642 ++i;
643 }
644 pte_chain->parent_ptes[i] = NULL;
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645 if (i == 0) {
646 hlist_del(&pte_chain->link);
90cb0529 647 mmu_free_pte_chain(pte_chain);
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648 if (hlist_empty(&sp->parent_ptes)) {
649 sp->multimapped = 0;
650 sp->parent_pte = NULL;
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651 }
652 }
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653 return;
654 }
655 BUG();
656}
657
4db35314 658static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
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659{
660 unsigned index;
661 struct hlist_head *bucket;
4db35314 662 struct kvm_mmu_page *sp;
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663 struct hlist_node *node;
664
665 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
666 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f05e70ac 667 bucket = &kvm->arch.mmu_page_hash[index];
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668 hlist_for_each_entry(sp, node, bucket, hash_link)
669 if (sp->gfn == gfn && !sp->role.metaphysical) {
cea0f0e7 670 pgprintk("%s: found role %x\n",
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671 __FUNCTION__, sp->role.word);
672 return sp;
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673 }
674 return NULL;
675}
676
677static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
678 gfn_t gfn,
679 gva_t gaddr,
680 unsigned level,
681 int metaphysical,
41074d07 682 unsigned access,
f7d9c7b7 683 u64 *parent_pte)
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684{
685 union kvm_mmu_page_role role;
686 unsigned index;
687 unsigned quadrant;
688 struct hlist_head *bucket;
4db35314 689 struct kvm_mmu_page *sp;
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690 struct hlist_node *node;
691
692 role.word = 0;
ad312c7c 693 role.glevels = vcpu->arch.mmu.root_level;
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694 role.level = level;
695 role.metaphysical = metaphysical;
41074d07 696 role.access = access;
ad312c7c 697 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
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698 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
699 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
700 role.quadrant = quadrant;
701 }
702 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
703 gfn, role.word);
704 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f05e70ac 705 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
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706 hlist_for_each_entry(sp, node, bucket, hash_link)
707 if (sp->gfn == gfn && sp->role.word == role.word) {
708 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
cea0f0e7 709 pgprintk("%s: found\n", __FUNCTION__);
4db35314 710 return sp;
cea0f0e7 711 }
dfc5aa00 712 ++vcpu->kvm->stat.mmu_cache_miss;
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713 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
714 if (!sp)
715 return sp;
cea0f0e7 716 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
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717 sp->gfn = gfn;
718 sp->role = role;
719 hlist_add_head(&sp->hash_link, bucket);
ad312c7c 720 vcpu->arch.mmu.prefetch_page(vcpu, sp);
374cbac0 721 if (!metaphysical)
4a4c9924 722 rmap_write_protect(vcpu->kvm, gfn);
4db35314 723 return sp;
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724}
725
90cb0529 726static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 727 struct kvm_mmu_page *sp)
a436036b 728{
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AK
729 unsigned i;
730 u64 *pt;
731 u64 ent;
732
4db35314 733 pt = sp->spt;
697fe2e2 734
4db35314 735 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 736 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 737 if (is_shadow_present_pte(pt[i]))
290fc38d 738 rmap_remove(kvm, &pt[i]);
c7addb90 739 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 740 }
90cb0529 741 kvm_flush_remote_tlbs(kvm);
697fe2e2
AK
742 return;
743 }
744
745 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
746 ent = pt[i];
747
c7addb90
AK
748 pt[i] = shadow_trap_nonpresent_pte;
749 if (!is_shadow_present_pte(ent))
697fe2e2
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750 continue;
751 ent &= PT64_BASE_ADDR_MASK;
90cb0529 752 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
697fe2e2 753 }
90cb0529 754 kvm_flush_remote_tlbs(kvm);
a436036b
AK
755}
756
4db35314 757static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 758{
4db35314 759 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
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760}
761
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762static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
763{
764 int i;
765
766 for (i = 0; i < KVM_MAX_VCPUS; ++i)
767 if (kvm->vcpus[i])
ad312c7c 768 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
769}
770
4db35314 771static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
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772{
773 u64 *parent_pte;
774
4cee5764 775 ++kvm->stat.mmu_shadow_zapped;
4db35314
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776 while (sp->multimapped || sp->parent_pte) {
777 if (!sp->multimapped)
778 parent_pte = sp->parent_pte;
a436036b
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779 else {
780 struct kvm_pte_chain *chain;
781
4db35314 782 chain = container_of(sp->parent_ptes.first,
a436036b
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783 struct kvm_pte_chain, link);
784 parent_pte = chain->parent_ptes[0];
785 }
697fe2e2 786 BUG_ON(!parent_pte);
4db35314 787 kvm_mmu_put_page(sp, parent_pte);
c7addb90 788 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 789 }
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790 kvm_mmu_page_unlink_children(kvm, sp);
791 if (!sp->root_count) {
792 hlist_del(&sp->hash_link);
793 kvm_mmu_free_page(kvm, sp);
36868f7b 794 } else
f05e70ac 795 list_move(&sp->link, &kvm->arch.active_mmu_pages);
12b7d28f 796 kvm_mmu_reset_last_pte_updated(kvm);
a436036b
AK
797}
798
82ce2c96
IE
799/*
800 * Changing the number of mmu pages allocated to the vm
801 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
802 */
803void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
804{
805 /*
806 * If we set the number of mmu pages to be smaller be than the
807 * number of actived pages , we must to free some mmu pages before we
808 * change the value
809 */
810
f05e70ac 811 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 812 kvm_nr_mmu_pages) {
f05e70ac
ZX
813 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
814 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
815
816 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
817 struct kvm_mmu_page *page;
818
f05e70ac 819 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
820 struct kvm_mmu_page, link);
821 kvm_mmu_zap_page(kvm, page);
822 n_used_mmu_pages--;
823 }
f05e70ac 824 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
825 }
826 else
f05e70ac
ZX
827 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
828 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 829
f05e70ac 830 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
831}
832
f67a46f4 833static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
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834{
835 unsigned index;
836 struct hlist_head *bucket;
4db35314 837 struct kvm_mmu_page *sp;
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838 struct hlist_node *node, *n;
839 int r;
840
841 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
842 r = 0;
843 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f05e70ac 844 bucket = &kvm->arch.mmu_page_hash[index];
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845 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
846 if (sp->gfn == gfn && !sp->role.metaphysical) {
697fe2e2 847 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
4db35314
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848 sp->role.word);
849 kvm_mmu_zap_page(kvm, sp);
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850 r = 1;
851 }
852 return r;
cea0f0e7
AK
853}
854
f67a46f4 855static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 856{
4db35314 857 struct kvm_mmu_page *sp;
97a0a01e 858
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859 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
860 pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
861 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
862 }
863}
864
38c335f1 865static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 866{
38c335f1 867 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 868 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 869
4db35314 870 __set_bit(slot, &sp->slot_bitmap);
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871}
872
039576c0
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873struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
874{
72dc67a6
IE
875 struct page *page;
876
ad312c7c 877 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
878
879 if (gpa == UNMAPPED_GVA)
880 return NULL;
72dc67a6
IE
881
882 down_read(&current->mm->mmap_sem);
883 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
884 up_read(&current->mm->mmap_sem);
885
886 return page;
039576c0
AK
887}
888
1c4f1fd6
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889static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
890 unsigned pt_access, unsigned pte_access,
891 int user_fault, int write_fault, int dirty,
d7824fff 892 int *ptwrite, gfn_t gfn, struct page *page)
1c4f1fd6
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893{
894 u64 spte;
895 int was_rmapped = is_rmap_pte(*shadow_pte);
75e68e60 896 int was_writeble = is_writeble_pte(*shadow_pte);
1c4f1fd6 897
bc750ba8 898 pgprintk("%s: spte %llx access %x write_fault %d"
1c4f1fd6 899 " user_fault %d gfn %lx\n",
bc750ba8 900 __FUNCTION__, *shadow_pte, pt_access,
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901 write_fault, user_fault, gfn);
902
903 /*
904 * We don't set the accessed bit, since we sometimes want to see
905 * whether the guest actually used the pte (in order to detect
906 * demand paging).
907 */
908 spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
909 if (!dirty)
910 pte_access &= ~ACC_WRITE_MASK;
911 if (!(pte_access & ACC_EXEC_MASK))
912 spte |= PT64_NX_MASK;
913
1c4f1fd6
AK
914 spte |= PT_PRESENT_MASK;
915 if (pte_access & ACC_USER_MASK)
916 spte |= PT_USER_MASK;
917
918 if (is_error_page(page)) {
919 set_shadow_pte(shadow_pte,
920 shadow_trap_nonpresent_pte | PT_SHADOW_IO_MARK);
921 kvm_release_page_clean(page);
922 return;
923 }
924
925 spte |= page_to_phys(page);
926
927 if ((pte_access & ACC_WRITE_MASK)
928 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
929 struct kvm_mmu_page *shadow;
930
931 spte |= PT_WRITABLE_MASK;
932 if (user_fault) {
933 mmu_unshadow(vcpu->kvm, gfn);
934 goto unshadowed;
935 }
936
937 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
938 if (shadow) {
939 pgprintk("%s: found shadow page for %lx, marking ro\n",
940 __FUNCTION__, gfn);
941 pte_access &= ~ACC_WRITE_MASK;
942 if (is_writeble_pte(spte)) {
943 spte &= ~PT_WRITABLE_MASK;
944 kvm_x86_ops->tlb_flush(vcpu);
945 }
946 if (write_fault)
947 *ptwrite = 1;
948 }
949 }
950
951unshadowed:
952
953 if (pte_access & ACC_WRITE_MASK)
954 mark_page_dirty(vcpu->kvm, gfn);
955
956 pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
957 set_shadow_pte(shadow_pte, spte);
958 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
959 if (!was_rmapped) {
960 rmap_add(vcpu, shadow_pte, gfn);
961 if (!is_rmap_pte(*shadow_pte))
962 kvm_release_page_clean(page);
75e68e60
IE
963 } else {
964 if (was_writeble)
965 kvm_release_page_dirty(page);
966 else
967 kvm_release_page_clean(page);
1c4f1fd6 968 }
1c4f1fd6 969 if (!ptwrite || !*ptwrite)
ad312c7c 970 vcpu->arch.last_pte_updated = shadow_pte;
1c4f1fd6
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971}
972
6aa8b732
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973static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
974{
975}
976
aaee2c94
MT
977static int __nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write,
978 gfn_t gfn, struct page *page)
6aa8b732
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979{
980 int level = PT32E_ROOT_LEVEL;
ad312c7c 981 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
e833240f 982 int pt_write = 0;
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983
984 for (; ; level--) {
985 u32 index = PT64_INDEX(v, level);
986 u64 *table;
987
988 ASSERT(VALID_PAGE(table_addr));
989 table = __va(table_addr);
990
991 if (level == 1) {
e833240f 992 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
d7824fff 993 0, write, 1, &pt_write, gfn, page);
e833240f 994 return pt_write || is_io_pte(table[index]);
6aa8b732
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995 }
996
c7addb90 997 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 998 struct kvm_mmu_page *new_table;
cea0f0e7 999 gfn_t pseudo_gfn;
6aa8b732 1000
cea0f0e7
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1001 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1002 >> PAGE_SHIFT;
1003 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1004 v, level - 1,
f7d9c7b7 1005 1, ACC_ALL, &table[index]);
25c0de2c 1006 if (!new_table) {
6aa8b732 1007 pgprintk("nonpaging_map: ENOMEM\n");
d7824fff 1008 kvm_release_page_clean(page);
6aa8b732
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1009 return -ENOMEM;
1010 }
1011
47ad8e68 1012 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
25c0de2c 1013 | PT_WRITABLE_MASK | PT_USER_MASK;
6aa8b732
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1014 }
1015 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1016 }
1017}
1018
10589a46
MT
1019static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1020{
1021 int r;
1022
aaee2c94
MT
1023 struct page *page;
1024
72dc67a6
IE
1025 down_read(&vcpu->kvm->slots_lock);
1026
aaee2c94
MT
1027 down_read(&current->mm->mmap_sem);
1028 page = gfn_to_page(vcpu->kvm, gfn);
72dc67a6 1029 up_read(&current->mm->mmap_sem);
aaee2c94
MT
1030
1031 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1032 kvm_mmu_free_some_pages(vcpu);
aaee2c94
MT
1033 r = __nonpaging_map(vcpu, v, write, gfn, page);
1034 spin_unlock(&vcpu->kvm->mmu_lock);
1035
72dc67a6 1036 up_read(&vcpu->kvm->slots_lock);
aaee2c94 1037
10589a46
MT
1038 return r;
1039}
1040
1041
c7addb90
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1042static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1043 struct kvm_mmu_page *sp)
1044{
1045 int i;
1046
1047 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1048 sp->spt[i] = shadow_trap_nonpresent_pte;
1049}
1050
17ac10ad
AK
1051static void mmu_free_roots(struct kvm_vcpu *vcpu)
1052{
1053 int i;
4db35314 1054 struct kvm_mmu_page *sp;
17ac10ad 1055
ad312c7c 1056 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1057 return;
aaee2c94 1058 spin_lock(&vcpu->kvm->mmu_lock);
17ac10ad 1059#ifdef CONFIG_X86_64
ad312c7c
ZX
1060 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1061 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1062
4db35314
AK
1063 sp = page_header(root);
1064 --sp->root_count;
ad312c7c 1065 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1066 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1067 return;
1068 }
1069#endif
1070 for (i = 0; i < 4; ++i) {
ad312c7c 1071 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1072
417726a3 1073 if (root) {
417726a3 1074 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1075 sp = page_header(root);
1076 --sp->root_count;
417726a3 1077 }
ad312c7c 1078 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1079 }
aaee2c94 1080 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1081 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1082}
1083
1084static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1085{
1086 int i;
cea0f0e7 1087 gfn_t root_gfn;
4db35314 1088 struct kvm_mmu_page *sp;
3bb65a22 1089
ad312c7c 1090 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad
AK
1091
1092#ifdef CONFIG_X86_64
ad312c7c
ZX
1093 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1094 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1095
1096 ASSERT(!VALID_PAGE(root));
4db35314 1097 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
f7d9c7b7 1098 PT64_ROOT_LEVEL, 0, ACC_ALL, NULL);
4db35314
AK
1099 root = __pa(sp->spt);
1100 ++sp->root_count;
ad312c7c 1101 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1102 return;
1103 }
1104#endif
1105 for (i = 0; i < 4; ++i) {
ad312c7c 1106 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1107
1108 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1109 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1110 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1111 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1112 continue;
1113 }
ad312c7c
ZX
1114 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1115 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1116 root_gfn = 0;
4db35314
AK
1117 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1118 PT32_ROOT_LEVEL, !is_paging(vcpu),
f7d9c7b7 1119 ACC_ALL, NULL);
4db35314
AK
1120 root = __pa(sp->spt);
1121 ++sp->root_count;
ad312c7c 1122 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1123 }
ad312c7c 1124 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1125}
1126
6aa8b732
AK
1127static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1128{
1129 return vaddr;
1130}
1131
1132static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1133 u32 error_code)
6aa8b732 1134{
e833240f 1135 gfn_t gfn;
e2dec939 1136 int r;
6aa8b732 1137
e833240f 1138 pgprintk("%s: gva %lx error %x\n", __FUNCTION__, gva, error_code);
e2dec939
AK
1139 r = mmu_topup_memory_caches(vcpu);
1140 if (r)
1141 return r;
714b93da 1142
6aa8b732 1143 ASSERT(vcpu);
ad312c7c 1144 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1145
e833240f 1146 gfn = gva >> PAGE_SHIFT;
6aa8b732 1147
e833240f
AK
1148 return nonpaging_map(vcpu, gva & PAGE_MASK,
1149 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
1150}
1151
6aa8b732
AK
1152static void nonpaging_free(struct kvm_vcpu *vcpu)
1153{
17ac10ad 1154 mmu_free_roots(vcpu);
6aa8b732
AK
1155}
1156
1157static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1158{
ad312c7c 1159 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1160
1161 context->new_cr3 = nonpaging_new_cr3;
1162 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
1163 context->gva_to_gpa = nonpaging_gva_to_gpa;
1164 context->free = nonpaging_free;
c7addb90 1165 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1166 context->root_level = 0;
6aa8b732 1167 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1168 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1169 return 0;
1170}
1171
d835dfec 1172void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1173{
1165f5fe 1174 ++vcpu->stat.tlb_flush;
cbdd1bea 1175 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1176}
1177
1178static void paging_new_cr3(struct kvm_vcpu *vcpu)
1179{
24993d53 1180 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->arch.cr3);
cea0f0e7 1181 mmu_free_roots(vcpu);
6aa8b732
AK
1182}
1183
6aa8b732
AK
1184static void inject_page_fault(struct kvm_vcpu *vcpu,
1185 u64 addr,
1186 u32 err_code)
1187{
c3c91fee 1188 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1189}
1190
6aa8b732
AK
1191static void paging_free(struct kvm_vcpu *vcpu)
1192{
1193 nonpaging_free(vcpu);
1194}
1195
1196#define PTTYPE 64
1197#include "paging_tmpl.h"
1198#undef PTTYPE
1199
1200#define PTTYPE 32
1201#include "paging_tmpl.h"
1202#undef PTTYPE
1203
17ac10ad 1204static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 1205{
ad312c7c 1206 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1207
1208 ASSERT(is_pae(vcpu));
1209 context->new_cr3 = paging_new_cr3;
1210 context->page_fault = paging64_page_fault;
6aa8b732 1211 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1212 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1213 context->free = paging_free;
17ac10ad
AK
1214 context->root_level = level;
1215 context->shadow_root_level = level;
17c3ba9d 1216 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1217 return 0;
1218}
1219
17ac10ad
AK
1220static int paging64_init_context(struct kvm_vcpu *vcpu)
1221{
1222 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1223}
1224
6aa8b732
AK
1225static int paging32_init_context(struct kvm_vcpu *vcpu)
1226{
ad312c7c 1227 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1228
1229 context->new_cr3 = paging_new_cr3;
1230 context->page_fault = paging32_page_fault;
6aa8b732
AK
1231 context->gva_to_gpa = paging32_gva_to_gpa;
1232 context->free = paging_free;
c7addb90 1233 context->prefetch_page = paging32_prefetch_page;
6aa8b732
AK
1234 context->root_level = PT32_ROOT_LEVEL;
1235 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1236 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1237 return 0;
1238}
1239
1240static int paging32E_init_context(struct kvm_vcpu *vcpu)
1241{
17ac10ad 1242 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1243}
1244
1245static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1246{
1247 ASSERT(vcpu);
ad312c7c 1248 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
1249
1250 if (!is_paging(vcpu))
1251 return nonpaging_init_context(vcpu);
a9058ecd 1252 else if (is_long_mode(vcpu))
6aa8b732
AK
1253 return paging64_init_context(vcpu);
1254 else if (is_pae(vcpu))
1255 return paging32E_init_context(vcpu);
1256 else
1257 return paging32_init_context(vcpu);
1258}
1259
1260static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1261{
1262 ASSERT(vcpu);
ad312c7c
ZX
1263 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1264 vcpu->arch.mmu.free(vcpu);
1265 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
1266 }
1267}
1268
1269int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1270{
1271 destroy_kvm_mmu(vcpu);
1272 return init_kvm_mmu(vcpu);
1273}
8668a3c4 1274EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1275
1276int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1277{
714b93da
AK
1278 int r;
1279
e2dec939 1280 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1281 if (r)
1282 goto out;
aaee2c94 1283 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1284 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 1285 mmu_alloc_roots(vcpu);
aaee2c94 1286 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1287 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 1288 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
1289out:
1290 return r;
6aa8b732 1291}
17c3ba9d
AK
1292EXPORT_SYMBOL_GPL(kvm_mmu_load);
1293
1294void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1295{
1296 mmu_free_roots(vcpu);
1297}
6aa8b732 1298
09072daf 1299static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 1300 struct kvm_mmu_page *sp,
ac1b714e
AK
1301 u64 *spte)
1302{
1303 u64 pte;
1304 struct kvm_mmu_page *child;
1305
1306 pte = *spte;
c7addb90 1307 if (is_shadow_present_pte(pte)) {
4db35314 1308 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
290fc38d 1309 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1310 else {
1311 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1312 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1313 }
1314 }
c7addb90 1315 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
ac1b714e
AK
1316}
1317
0028425f 1318static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 1319 struct kvm_mmu_page *sp,
0028425f 1320 u64 *spte,
c7addb90
AK
1321 const void *new, int bytes,
1322 int offset_in_pte)
0028425f 1323{
4db35314 1324 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
4cee5764 1325 ++vcpu->kvm->stat.mmu_pde_zapped;
0028425f 1326 return;
4cee5764 1327 }
0028425f 1328
4cee5764 1329 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314
AK
1330 if (sp->role.glevels == PT32_ROOT_LEVEL)
1331 paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
0028425f 1332 else
4db35314 1333 paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
0028425f
AK
1334}
1335
79539cec
AK
1336static bool need_remote_flush(u64 old, u64 new)
1337{
1338 if (!is_shadow_present_pte(old))
1339 return false;
1340 if (!is_shadow_present_pte(new))
1341 return true;
1342 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1343 return true;
1344 old ^= PT64_NX_MASK;
1345 new ^= PT64_NX_MASK;
1346 return (old & ~new & PT64_PERM_MASK) != 0;
1347}
1348
1349static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1350{
1351 if (need_remote_flush(old, new))
1352 kvm_flush_remote_tlbs(vcpu->kvm);
1353 else
1354 kvm_mmu_flush_tlb(vcpu);
1355}
1356
12b7d28f
AK
1357static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1358{
ad312c7c 1359 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f
AK
1360
1361 return !!(spte && (*spte & PT_ACCESSED_MASK));
1362}
1363
d7824fff
AK
1364static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1365 const u8 *new, int bytes)
1366{
1367 gfn_t gfn;
1368 int r;
1369 u64 gpte = 0;
72dc67a6 1370 struct page *page;
d7824fff
AK
1371
1372 if (bytes != 4 && bytes != 8)
1373 return;
1374
1375 /*
1376 * Assume that the pte write on a page table of the same type
1377 * as the current vcpu paging mode. This is nearly always true
1378 * (might be false while changing modes). Note it is verified later
1379 * by update_pte().
1380 */
1381 if (is_pae(vcpu)) {
1382 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1383 if ((bytes == 4) && (gpa % 4 == 0)) {
1384 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1385 if (r)
1386 return;
1387 memcpy((void *)&gpte + (gpa % 8), new, 4);
1388 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1389 memcpy((void *)&gpte, new, 8);
1390 }
1391 } else {
1392 if ((bytes == 4) && (gpa % 4 == 0))
1393 memcpy((void *)&gpte, new, 4);
1394 }
1395 if (!is_present_pte(gpte))
1396 return;
1397 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6
IE
1398
1399 down_read(&current->mm->mmap_sem);
1400 page = gfn_to_page(vcpu->kvm, gfn);
1401 up_read(&current->mm->mmap_sem);
1402
d7824fff
AK
1403 vcpu->arch.update_pte.gfn = gfn;
1404 vcpu->arch.update_pte.page = gfn_to_page(vcpu->kvm, gfn);
1405}
1406
09072daf 1407void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1408 const u8 *new, int bytes)
da4a00f0 1409{
9b7a0325 1410 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 1411 struct kvm_mmu_page *sp;
0e7bc4b9 1412 struct hlist_node *node, *n;
9b7a0325
AK
1413 struct hlist_head *bucket;
1414 unsigned index;
79539cec 1415 u64 entry;
9b7a0325 1416 u64 *spte;
9b7a0325 1417 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1418 unsigned pte_size;
9b7a0325 1419 unsigned page_offset;
0e7bc4b9 1420 unsigned misaligned;
fce0657f 1421 unsigned quadrant;
9b7a0325 1422 int level;
86a5ba02 1423 int flooded = 0;
ac1b714e 1424 int npte;
9b7a0325 1425
da4a00f0 1426 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
d7824fff 1427 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 1428 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1429 kvm_mmu_free_some_pages(vcpu);
4cee5764 1430 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1431 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 1432 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 1433 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
1434 ++vcpu->arch.last_pt_write_count;
1435 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
1436 flooded = 1;
1437 } else {
ad312c7c
ZX
1438 vcpu->arch.last_pt_write_gfn = gfn;
1439 vcpu->arch.last_pt_write_count = 1;
1440 vcpu->arch.last_pte_updated = NULL;
86a5ba02 1441 }
9b7a0325 1442 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f05e70ac 1443 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
1444 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1445 if (sp->gfn != gfn || sp->role.metaphysical)
9b7a0325 1446 continue;
4db35314 1447 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 1448 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1449 misaligned |= bytes < 4;
86a5ba02 1450 if (misaligned || flooded) {
0e7bc4b9
AK
1451 /*
1452 * Misaligned accesses are too much trouble to fix
1453 * up; also, they usually indicate a page is not used
1454 * as a page table.
86a5ba02
AK
1455 *
1456 * If we're seeing too many writes to a page,
1457 * it may no longer be a page table, or we may be
1458 * forking, in which case it is better to unmap the
1459 * page.
0e7bc4b9
AK
1460 */
1461 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314
AK
1462 gpa, bytes, sp->role.word);
1463 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1464 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1465 continue;
1466 }
9b7a0325 1467 page_offset = offset;
4db35314 1468 level = sp->role.level;
ac1b714e 1469 npte = 1;
4db35314 1470 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1471 page_offset <<= 1; /* 32->64 */
1472 /*
1473 * A 32-bit pde maps 4MB while the shadow pdes map
1474 * only 2MB. So we need to double the offset again
1475 * and zap two pdes instead of one.
1476 */
1477 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1478 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1479 page_offset <<= 1;
1480 npte = 2;
1481 }
fce0657f 1482 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1483 page_offset &= ~PAGE_MASK;
4db35314 1484 if (quadrant != sp->role.quadrant)
fce0657f 1485 continue;
9b7a0325 1486 }
4db35314 1487 spte = &sp->spt[page_offset / sizeof(*spte)];
ac1b714e 1488 while (npte--) {
79539cec 1489 entry = *spte;
4db35314
AK
1490 mmu_pte_write_zap_pte(vcpu, sp, spte);
1491 mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes,
c7addb90 1492 page_offset & (pte_size - 1));
79539cec 1493 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 1494 ++spte;
9b7a0325 1495 }
9b7a0325 1496 }
c7addb90 1497 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 1498 spin_unlock(&vcpu->kvm->mmu_lock);
d7824fff
AK
1499 if (vcpu->arch.update_pte.page) {
1500 kvm_release_page_clean(vcpu->arch.update_pte.page);
1501 vcpu->arch.update_pte.page = NULL;
1502 }
da4a00f0
AK
1503}
1504
a436036b
AK
1505int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1506{
10589a46
MT
1507 gpa_t gpa;
1508 int r;
a436036b 1509
72dc67a6 1510 down_read(&vcpu->kvm->slots_lock);
10589a46 1511 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
72dc67a6 1512 up_read(&vcpu->kvm->slots_lock);
10589a46 1513
aaee2c94 1514 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 1515 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 1516 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 1517 return r;
a436036b
AK
1518}
1519
22d95b12 1520void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 1521{
f05e70ac 1522 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 1523 struct kvm_mmu_page *sp;
ebeace86 1524
f05e70ac 1525 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
1526 struct kvm_mmu_page, link);
1527 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1528 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1529 }
1530}
ebeace86 1531
3067714c
AK
1532int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1533{
1534 int r;
1535 enum emulation_result er;
1536
ad312c7c 1537 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
1538 if (r < 0)
1539 goto out;
1540
1541 if (!r) {
1542 r = 1;
1543 goto out;
1544 }
1545
b733bfb5
AK
1546 r = mmu_topup_memory_caches(vcpu);
1547 if (r)
1548 goto out;
1549
3067714c 1550 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
1551
1552 switch (er) {
1553 case EMULATE_DONE:
1554 return 1;
1555 case EMULATE_DO_MMIO:
1556 ++vcpu->stat.mmio_exits;
1557 return 0;
1558 case EMULATE_FAIL:
1559 kvm_report_emulation_failure(vcpu, "pagetable");
1560 return 1;
1561 default:
1562 BUG();
1563 }
1564out:
3067714c
AK
1565 return r;
1566}
1567EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1568
6aa8b732
AK
1569static void free_mmu_pages(struct kvm_vcpu *vcpu)
1570{
4db35314 1571 struct kvm_mmu_page *sp;
6aa8b732 1572
f05e70ac
ZX
1573 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
1574 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
1575 struct kvm_mmu_page, link);
1576 kvm_mmu_zap_page(vcpu->kvm, sp);
f51234c2 1577 }
ad312c7c 1578 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
1579}
1580
1581static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1582{
17ac10ad 1583 struct page *page;
6aa8b732
AK
1584 int i;
1585
1586 ASSERT(vcpu);
1587
f05e70ac
ZX
1588 if (vcpu->kvm->arch.n_requested_mmu_pages)
1589 vcpu->kvm->arch.n_free_mmu_pages =
1590 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 1591 else
f05e70ac
ZX
1592 vcpu->kvm->arch.n_free_mmu_pages =
1593 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
1594 /*
1595 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1596 * Therefore we need to allocate shadow page tables in the first
1597 * 4GB of memory, which happens to fit the DMA32 zone.
1598 */
1599 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1600 if (!page)
1601 goto error_1;
ad312c7c 1602 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 1603 for (i = 0; i < 4; ++i)
ad312c7c 1604 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1605
6aa8b732
AK
1606 return 0;
1607
1608error_1:
1609 free_mmu_pages(vcpu);
1610 return -ENOMEM;
1611}
1612
8018c27b 1613int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1614{
6aa8b732 1615 ASSERT(vcpu);
ad312c7c 1616 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1617
8018c27b
IM
1618 return alloc_mmu_pages(vcpu);
1619}
6aa8b732 1620
8018c27b
IM
1621int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1622{
1623 ASSERT(vcpu);
ad312c7c 1624 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 1625
8018c27b 1626 return init_kvm_mmu(vcpu);
6aa8b732
AK
1627}
1628
1629void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1630{
1631 ASSERT(vcpu);
1632
1633 destroy_kvm_mmu(vcpu);
1634 free_mmu_pages(vcpu);
714b93da 1635 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1636}
1637
90cb0529 1638void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 1639{
4db35314 1640 struct kvm_mmu_page *sp;
6aa8b732 1641
f05e70ac 1642 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
1643 int i;
1644 u64 *pt;
1645
4db35314 1646 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
1647 continue;
1648
4db35314 1649 pt = sp->spt;
6aa8b732
AK
1650 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1651 /* avoid RMW */
9647c14c 1652 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 1653 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
1654 }
1655}
37a7d8b0 1656
90cb0529 1657void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1658{
4db35314 1659 struct kvm_mmu_page *sp, *node;
e0fa826f 1660
aaee2c94 1661 spin_lock(&kvm->mmu_lock);
f05e70ac 1662 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
4db35314 1663 kvm_mmu_zap_page(kvm, sp);
aaee2c94 1664 spin_unlock(&kvm->mmu_lock);
e0fa826f 1665
90cb0529 1666 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1667}
1668
b5a33a75
AK
1669void kvm_mmu_module_exit(void)
1670{
1671 if (pte_chain_cache)
1672 kmem_cache_destroy(pte_chain_cache);
1673 if (rmap_desc_cache)
1674 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
1675 if (mmu_page_header_cache)
1676 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
1677}
1678
1679int kvm_mmu_module_init(void)
1680{
1681 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1682 sizeof(struct kvm_pte_chain),
20c2df83 1683 0, 0, NULL);
b5a33a75
AK
1684 if (!pte_chain_cache)
1685 goto nomem;
1686 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1687 sizeof(struct kvm_rmap_desc),
20c2df83 1688 0, 0, NULL);
b5a33a75
AK
1689 if (!rmap_desc_cache)
1690 goto nomem;
1691
d3d25b04
AK
1692 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1693 sizeof(struct kvm_mmu_page),
20c2df83 1694 0, 0, NULL);
d3d25b04
AK
1695 if (!mmu_page_header_cache)
1696 goto nomem;
1697
b5a33a75
AK
1698 return 0;
1699
1700nomem:
1701 kvm_mmu_module_exit();
1702 return -ENOMEM;
1703}
1704
3ad82a7e
ZX
1705/*
1706 * Caculate mmu pages needed for kvm.
1707 */
1708unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
1709{
1710 int i;
1711 unsigned int nr_mmu_pages;
1712 unsigned int nr_pages = 0;
1713
1714 for (i = 0; i < kvm->nmemslots; i++)
1715 nr_pages += kvm->memslots[i].npages;
1716
1717 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
1718 nr_mmu_pages = max(nr_mmu_pages,
1719 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
1720
1721 return nr_mmu_pages;
1722}
1723
37a7d8b0
AK
1724#ifdef AUDIT
1725
1726static const char *audit_msg;
1727
1728static gva_t canonicalize(gva_t gva)
1729{
1730#ifdef CONFIG_X86_64
1731 gva = (long long)(gva << 16) >> 16;
1732#endif
1733 return gva;
1734}
1735
1736static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1737 gva_t va, int level)
1738{
1739 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1740 int i;
1741 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1742
1743 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1744 u64 ent = pt[i];
1745
c7addb90 1746 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
1747 continue;
1748
1749 va = canonicalize(va);
c7addb90
AK
1750 if (level > 1) {
1751 if (ent == shadow_notrap_nonpresent_pte)
1752 printk(KERN_ERR "audit: (%s) nontrapping pte"
1753 " in nonleaf level: levels %d gva %lx"
1754 " level %d pte %llx\n", audit_msg,
ad312c7c 1755 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 1756
37a7d8b0 1757 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 1758 } else {
ad312c7c 1759 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
1d28f5f4
AK
1760 struct page *page = gpa_to_page(vcpu, gpa);
1761 hpa_t hpa = page_to_phys(page);
37a7d8b0 1762
c7addb90 1763 if (is_shadow_present_pte(ent)
37a7d8b0 1764 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
1765 printk(KERN_ERR "xx audit error: (%s) levels %d"
1766 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 1767 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
1768 va, gpa, hpa, ent,
1769 is_shadow_present_pte(ent));
c7addb90
AK
1770 else if (ent == shadow_notrap_nonpresent_pte
1771 && !is_error_hpa(hpa))
1772 printk(KERN_ERR "audit: (%s) notrap shadow,"
1773 " valid guest gva %lx\n", audit_msg, va);
b4231d61 1774 kvm_release_page_clean(page);
c7addb90 1775
37a7d8b0
AK
1776 }
1777 }
1778}
1779
1780static void audit_mappings(struct kvm_vcpu *vcpu)
1781{
1ea252af 1782 unsigned i;
37a7d8b0 1783
ad312c7c
ZX
1784 if (vcpu->arch.mmu.root_level == 4)
1785 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
1786 else
1787 for (i = 0; i < 4; ++i)
ad312c7c 1788 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 1789 audit_mappings_page(vcpu,
ad312c7c 1790 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
1791 i << 30,
1792 2);
1793}
1794
1795static int count_rmaps(struct kvm_vcpu *vcpu)
1796{
1797 int nmaps = 0;
1798 int i, j, k;
1799
1800 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1801 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1802 struct kvm_rmap_desc *d;
1803
1804 for (j = 0; j < m->npages; ++j) {
290fc38d 1805 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 1806
290fc38d 1807 if (!*rmapp)
37a7d8b0 1808 continue;
290fc38d 1809 if (!(*rmapp & 1)) {
37a7d8b0
AK
1810 ++nmaps;
1811 continue;
1812 }
290fc38d 1813 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
1814 while (d) {
1815 for (k = 0; k < RMAP_EXT; ++k)
1816 if (d->shadow_ptes[k])
1817 ++nmaps;
1818 else
1819 break;
1820 d = d->more;
1821 }
1822 }
1823 }
1824 return nmaps;
1825}
1826
1827static int count_writable_mappings(struct kvm_vcpu *vcpu)
1828{
1829 int nmaps = 0;
4db35314 1830 struct kvm_mmu_page *sp;
37a7d8b0
AK
1831 int i;
1832
f05e70ac 1833 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 1834 u64 *pt = sp->spt;
37a7d8b0 1835
4db35314 1836 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
1837 continue;
1838
1839 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1840 u64 ent = pt[i];
1841
1842 if (!(ent & PT_PRESENT_MASK))
1843 continue;
1844 if (!(ent & PT_WRITABLE_MASK))
1845 continue;
1846 ++nmaps;
1847 }
1848 }
1849 return nmaps;
1850}
1851
1852static void audit_rmap(struct kvm_vcpu *vcpu)
1853{
1854 int n_rmap = count_rmaps(vcpu);
1855 int n_actual = count_writable_mappings(vcpu);
1856
1857 if (n_rmap != n_actual)
1858 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1859 __FUNCTION__, audit_msg, n_rmap, n_actual);
1860}
1861
1862static void audit_write_protection(struct kvm_vcpu *vcpu)
1863{
4db35314 1864 struct kvm_mmu_page *sp;
290fc38d
IE
1865 struct kvm_memory_slot *slot;
1866 unsigned long *rmapp;
1867 gfn_t gfn;
37a7d8b0 1868
f05e70ac 1869 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 1870 if (sp->role.metaphysical)
37a7d8b0
AK
1871 continue;
1872
4db35314
AK
1873 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
1874 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
1875 rmapp = &slot->rmap[gfn - slot->base_gfn];
1876 if (*rmapp)
37a7d8b0
AK
1877 printk(KERN_ERR "%s: (%s) shadow page has writable"
1878 " mappings: gfn %lx role %x\n",
4db35314
AK
1879 __FUNCTION__, audit_msg, sp->gfn,
1880 sp->role.word);
37a7d8b0
AK
1881 }
1882}
1883
1884static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1885{
1886 int olddbg = dbg;
1887
1888 dbg = 0;
1889 audit_msg = msg;
1890 audit_rmap(vcpu);
1891 audit_write_protection(vcpu);
1892 audit_mappings(vcpu);
1893 dbg = olddbg;
1894}
1895
1896#endif
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