KVM: MMU: Fix rmap_write_protect() hugepage iteration bug
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK
1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d
AK
19
20#include "vmx.h"
1d737c8a 21#include "mmu.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
6aa8b732
AK
24#include <linux/types.h>
25#include <linux/string.h>
6aa8b732
AK
26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
e495606d
AK
33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
37a7d8b0
AK
46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
69static int dbg = 1;
70#endif
6aa8b732 71
d6c69ee9
YD
72#ifndef MMU_DEBUG
73#define ASSERT(x) do { } while (0)
74#else
6aa8b732
AK
75#define ASSERT(x) \
76 if (!(x)) { \
77 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
78 __FILE__, __LINE__, #x); \
79 }
d6c69ee9 80#endif
6aa8b732 81
6aa8b732
AK
82#define PT_FIRST_AVAIL_BITS_SHIFT 9
83#define PT64_SECOND_AVAIL_BITS_SHIFT 52
84
6aa8b732
AK
85#define VALID_PAGE(x) ((x) != INVALID_PAGE)
86
87#define PT64_LEVEL_BITS 9
88
89#define PT64_LEVEL_SHIFT(level) \
d77c26fc 90 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK
91
92#define PT64_LEVEL_MASK(level) \
93 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
94
95#define PT64_INDEX(address, level)\
96 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
97
98
99#define PT32_LEVEL_BITS 10
100
101#define PT32_LEVEL_SHIFT(level) \
d77c26fc 102 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK
103
104#define PT32_LEVEL_MASK(level) \
105 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
106
107#define PT32_INDEX(address, level)\
108 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
109
110
27aba766 111#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK
112#define PT64_DIR_BASE_ADDR_MASK \
113 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
114
115#define PT32_BASE_ADDR_MASK PAGE_MASK
116#define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118
79539cec
AK
119#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
120 | PT64_NX_MASK)
6aa8b732
AK
121
122#define PFERR_PRESENT_MASK (1U << 0)
123#define PFERR_WRITE_MASK (1U << 1)
124#define PFERR_USER_MASK (1U << 2)
73b1087e 125#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 126
6aa8b732
AK
127#define PT_DIRECTORY_LEVEL 2
128#define PT_PAGE_TABLE_LEVEL 1
129
cd4a4e53
AK
130#define RMAP_EXT 4
131
fe135d2c
AK
132#define ACC_EXEC_MASK 1
133#define ACC_WRITE_MASK PT_WRITABLE_MASK
134#define ACC_USER_MASK PT_USER_MASK
135#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
136
2f333bcb
MT
137struct kvm_pv_mmu_op_buffer {
138 void *ptr;
139 unsigned len;
140 unsigned processed;
141 char buf[512] __aligned(sizeof(long));
142};
143
cd4a4e53
AK
144struct kvm_rmap_desc {
145 u64 *shadow_ptes[RMAP_EXT];
146 struct kvm_rmap_desc *more;
147};
148
b5a33a75
AK
149static struct kmem_cache *pte_chain_cache;
150static struct kmem_cache *rmap_desc_cache;
d3d25b04 151static struct kmem_cache *mmu_page_header_cache;
b5a33a75 152
c7addb90
AK
153static u64 __read_mostly shadow_trap_nonpresent_pte;
154static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY
155static u64 __read_mostly shadow_base_present_pte;
156static u64 __read_mostly shadow_nx_mask;
157static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
158static u64 __read_mostly shadow_user_mask;
159static u64 __read_mostly shadow_accessed_mask;
160static u64 __read_mostly shadow_dirty_mask;
c7addb90
AK
161
162void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
163{
164 shadow_trap_nonpresent_pte = trap_pte;
165 shadow_notrap_nonpresent_pte = notrap_pte;
166}
167EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
168
7b52345e
SY
169void kvm_mmu_set_base_ptes(u64 base_pte)
170{
171 shadow_base_present_pte = base_pte;
172}
173EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
174
175void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
176 u64 dirty_mask, u64 nx_mask, u64 x_mask)
177{
178 shadow_user_mask = user_mask;
179 shadow_accessed_mask = accessed_mask;
180 shadow_dirty_mask = dirty_mask;
181 shadow_nx_mask = nx_mask;
182 shadow_x_mask = x_mask;
183}
184EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
185
6aa8b732
AK
186static int is_write_protection(struct kvm_vcpu *vcpu)
187{
ad312c7c 188 return vcpu->arch.cr0 & X86_CR0_WP;
6aa8b732
AK
189}
190
191static int is_cpuid_PSE36(void)
192{
193 return 1;
194}
195
73b1087e
AK
196static int is_nx(struct kvm_vcpu *vcpu)
197{
ad312c7c 198 return vcpu->arch.shadow_efer & EFER_NX;
73b1087e
AK
199}
200
6aa8b732
AK
201static int is_present_pte(unsigned long pte)
202{
203 return pte & PT_PRESENT_MASK;
204}
205
c7addb90
AK
206static int is_shadow_present_pte(u64 pte)
207{
c7addb90
AK
208 return pte != shadow_trap_nonpresent_pte
209 && pte != shadow_notrap_nonpresent_pte;
210}
211
05da4558
MT
212static int is_large_pte(u64 pte)
213{
214 return pte & PT_PAGE_SIZE_MASK;
215}
216
6aa8b732
AK
217static int is_writeble_pte(unsigned long pte)
218{
219 return pte & PT_WRITABLE_MASK;
220}
221
e3c5e7ec
AK
222static int is_dirty_pte(unsigned long pte)
223{
7b52345e 224 return pte & shadow_dirty_mask;
e3c5e7ec
AK
225}
226
cd4a4e53
AK
227static int is_rmap_pte(u64 pte)
228{
4b1a80fa 229 return is_shadow_present_pte(pte);
cd4a4e53
AK
230}
231
35149e21 232static pfn_t spte_to_pfn(u64 pte)
0b49ea86 233{
35149e21 234 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK
235}
236
da928521
AK
237static gfn_t pse36_gfn_delta(u32 gpte)
238{
239 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
240
241 return (gpte & PT32_DIR_PSE36_MASK) << shift;
242}
243
e663ee64
AK
244static void set_shadow_pte(u64 *sptep, u64 spte)
245{
246#ifdef CONFIG_X86_64
247 set_64bit((unsigned long *)sptep, spte);
248#else
249 set_64bit((unsigned long long *)sptep, spte);
250#endif
251}
252
e2dec939 253static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 254 struct kmem_cache *base_cache, int min)
714b93da
AK
255{
256 void *obj;
257
258 if (cache->nobjs >= min)
e2dec939 259 return 0;
714b93da 260 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 261 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 262 if (!obj)
e2dec939 263 return -ENOMEM;
714b93da
AK
264 cache->objects[cache->nobjs++] = obj;
265 }
e2dec939 266 return 0;
714b93da
AK
267}
268
269static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
270{
271 while (mc->nobjs)
272 kfree(mc->objects[--mc->nobjs]);
273}
274
c1158e63 275static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 276 int min)
c1158e63
AK
277{
278 struct page *page;
279
280 if (cache->nobjs >= min)
281 return 0;
282 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 283 page = alloc_page(GFP_KERNEL);
c1158e63
AK
284 if (!page)
285 return -ENOMEM;
286 set_page_private(page, 0);
287 cache->objects[cache->nobjs++] = page_address(page);
288 }
289 return 0;
290}
291
292static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
293{
294 while (mc->nobjs)
c4d198d5 295 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK
296}
297
2e3e5882 298static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 299{
e2dec939
AK
300 int r;
301
ad312c7c 302 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 303 pte_chain_cache, 4);
e2dec939
AK
304 if (r)
305 goto out;
ad312c7c 306 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
2e3e5882 307 rmap_desc_cache, 1);
d3d25b04
AK
308 if (r)
309 goto out;
ad312c7c 310 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK
311 if (r)
312 goto out;
ad312c7c 313 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 314 mmu_page_header_cache, 4);
e2dec939
AK
315out:
316 return r;
714b93da
AK
317}
318
319static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
320{
ad312c7c
ZX
321 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
322 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
323 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
324 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK
325}
326
327static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
328 size_t size)
329{
330 void *p;
331
332 BUG_ON(!mc->nobjs);
333 p = mc->objects[--mc->nobjs];
334 memset(p, 0, size);
335 return p;
336}
337
714b93da
AK
338static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
339{
ad312c7c 340 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK
341 sizeof(struct kvm_pte_chain));
342}
343
90cb0529 344static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 345{
90cb0529 346 kfree(pc);
714b93da
AK
347}
348
349static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
350{
ad312c7c 351 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK
352 sizeof(struct kvm_rmap_desc));
353}
354
90cb0529 355static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 356{
90cb0529 357 kfree(rd);
714b93da
AK
358}
359
05da4558
MT
360/*
361 * Return the pointer to the largepage write count for a given
362 * gfn, handling slots that are not large page aligned.
363 */
364static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
365{
366 unsigned long idx;
367
368 idx = (gfn / KVM_PAGES_PER_HPAGE) -
369 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
370 return &slot->lpage_info[idx].write_count;
371}
372
373static void account_shadowed(struct kvm *kvm, gfn_t gfn)
374{
375 int *write_count;
376
377 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
378 *write_count += 1;
05da4558
MT
379}
380
381static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
382{
383 int *write_count;
384
385 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
386 *write_count -= 1;
387 WARN_ON(*write_count < 0);
388}
389
390static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
391{
392 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
393 int *largepage_idx;
394
395 if (slot) {
396 largepage_idx = slot_largepage_idx(gfn, slot);
397 return *largepage_idx;
398 }
399
400 return 1;
401}
402
403static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
404{
405 struct vm_area_struct *vma;
406 unsigned long addr;
407
408 addr = gfn_to_hva(kvm, gfn);
409 if (kvm_is_error_hva(addr))
410 return 0;
411
412 vma = find_vma(current->mm, addr);
413 if (vma && is_vm_hugetlb_page(vma))
414 return 1;
415
416 return 0;
417}
418
419static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
420{
421 struct kvm_memory_slot *slot;
422
423 if (has_wrprotected_page(vcpu->kvm, large_gfn))
424 return 0;
425
426 if (!host_largepage_backed(vcpu->kvm, large_gfn))
427 return 0;
428
429 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
430 if (slot && slot->dirty_bitmap)
431 return 0;
432
433 return 1;
434}
435
290fc38d
IE
436/*
437 * Take gfn and return the reverse mapping to it.
438 * Note: gfn must be unaliased before this function get called
439 */
440
05da4558 441static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
442{
443 struct kvm_memory_slot *slot;
05da4558 444 unsigned long idx;
290fc38d
IE
445
446 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
447 if (!lpage)
448 return &slot->rmap[gfn - slot->base_gfn];
449
450 idx = (gfn / KVM_PAGES_PER_HPAGE) -
451 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
452
453 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
454}
455
cd4a4e53
AK
456/*
457 * Reverse mapping data structures:
458 *
290fc38d
IE
459 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
460 * that points to page_address(page).
cd4a4e53 461 *
290fc38d
IE
462 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
463 * containing more mappings.
cd4a4e53 464 */
05da4558 465static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 466{
4db35314 467 struct kvm_mmu_page *sp;
cd4a4e53 468 struct kvm_rmap_desc *desc;
290fc38d 469 unsigned long *rmapp;
cd4a4e53
AK
470 int i;
471
472 if (!is_rmap_pte(*spte))
473 return;
290fc38d 474 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK
475 sp = page_header(__pa(spte));
476 sp->gfns[spte - sp->spt] = gfn;
05da4558 477 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 478 if (!*rmapp) {
cd4a4e53 479 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
480 *rmapp = (unsigned long)spte;
481 } else if (!(*rmapp & 1)) {
cd4a4e53 482 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 483 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 484 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 485 desc->shadow_ptes[1] = spte;
290fc38d 486 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK
487 } else {
488 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 489 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
490 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
491 desc = desc->more;
492 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 493 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK
494 desc = desc->more;
495 }
496 for (i = 0; desc->shadow_ptes[i]; ++i)
497 ;
498 desc->shadow_ptes[i] = spte;
499 }
500}
501
290fc38d 502static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK
503 struct kvm_rmap_desc *desc,
504 int i,
505 struct kvm_rmap_desc *prev_desc)
506{
507 int j;
508
509 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
510 ;
511 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 512 desc->shadow_ptes[j] = NULL;
cd4a4e53
AK
513 if (j != 0)
514 return;
515 if (!prev_desc && !desc->more)
290fc38d 516 *rmapp = (unsigned long)desc->shadow_ptes[0];
cd4a4e53
AK
517 else
518 if (prev_desc)
519 prev_desc->more = desc->more;
520 else
290fc38d 521 *rmapp = (unsigned long)desc->more | 1;
90cb0529 522 mmu_free_rmap_desc(desc);
cd4a4e53
AK
523}
524
290fc38d 525static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 526{
cd4a4e53
AK
527 struct kvm_rmap_desc *desc;
528 struct kvm_rmap_desc *prev_desc;
4db35314 529 struct kvm_mmu_page *sp;
35149e21 530 pfn_t pfn;
290fc38d 531 unsigned long *rmapp;
cd4a4e53
AK
532 int i;
533
534 if (!is_rmap_pte(*spte))
535 return;
4db35314 536 sp = page_header(__pa(spte));
35149e21 537 pfn = spte_to_pfn(*spte);
7b52345e 538 if (*spte & shadow_accessed_mask)
35149e21 539 kvm_set_pfn_accessed(pfn);
b4231d61 540 if (is_writeble_pte(*spte))
35149e21 541 kvm_release_pfn_dirty(pfn);
b4231d61 542 else
35149e21 543 kvm_release_pfn_clean(pfn);
05da4558 544 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 545 if (!*rmapp) {
cd4a4e53
AK
546 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
547 BUG();
290fc38d 548 } else if (!(*rmapp & 1)) {
cd4a4e53 549 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 550 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
551 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
552 spte, *spte);
553 BUG();
554 }
290fc38d 555 *rmapp = 0;
cd4a4e53
AK
556 } else {
557 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 558 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
559 prev_desc = NULL;
560 while (desc) {
561 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
562 if (desc->shadow_ptes[i] == spte) {
290fc38d 563 rmap_desc_remove_entry(rmapp,
714b93da 564 desc, i,
cd4a4e53
AK
565 prev_desc);
566 return;
567 }
568 prev_desc = desc;
569 desc = desc->more;
570 }
571 BUG();
572 }
573}
574
98348e95 575static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 576{
374cbac0 577 struct kvm_rmap_desc *desc;
98348e95
IE
578 struct kvm_rmap_desc *prev_desc;
579 u64 *prev_spte;
580 int i;
581
582 if (!*rmapp)
583 return NULL;
584 else if (!(*rmapp & 1)) {
585 if (!spte)
586 return (u64 *)*rmapp;
587 return NULL;
588 }
589 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
590 prev_desc = NULL;
591 prev_spte = NULL;
592 while (desc) {
593 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
594 if (prev_spte == spte)
595 return desc->shadow_ptes[i];
596 prev_spte = desc->shadow_ptes[i];
597 }
598 desc = desc->more;
599 }
600 return NULL;
601}
602
603static void rmap_write_protect(struct kvm *kvm, u64 gfn)
604{
290fc38d 605 unsigned long *rmapp;
374cbac0 606 u64 *spte;
caa5b8a5 607 int write_protected = 0;
374cbac0 608
4a4c9924 609 gfn = unalias_gfn(kvm, gfn);
05da4558 610 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 611
98348e95
IE
612 spte = rmap_next(kvm, rmapp, NULL);
613 while (spte) {
374cbac0 614 BUG_ON(!spte);
374cbac0 615 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 616 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 617 if (is_writeble_pte(*spte)) {
9647c14c 618 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
619 write_protected = 1;
620 }
9647c14c 621 spte = rmap_next(kvm, rmapp, spte);
374cbac0 622 }
855149aa 623 if (write_protected) {
35149e21 624 pfn_t pfn;
855149aa
IE
625
626 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
627 pfn = spte_to_pfn(*spte);
628 kvm_set_pfn_dirty(pfn);
855149aa
IE
629 }
630
05da4558
MT
631 /* check for huge page mappings */
632 rmapp = gfn_to_rmap(kvm, gfn, 1);
633 spte = rmap_next(kvm, rmapp, NULL);
634 while (spte) {
635 BUG_ON(!spte);
636 BUG_ON(!(*spte & PT_PRESENT_MASK));
637 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
638 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
639 if (is_writeble_pte(*spte)) {
640 rmap_remove(kvm, spte);
641 --kvm->stat.lpages;
642 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 643 spte = NULL;
05da4558
MT
644 write_protected = 1;
645 }
646 spte = rmap_next(kvm, rmapp, spte);
647 }
648
caa5b8a5
ED
649 if (write_protected)
650 kvm_flush_remote_tlbs(kvm);
05da4558
MT
651
652 account_shadowed(kvm, gfn);
374cbac0
AK
653}
654
d6c69ee9 655#ifdef MMU_DEBUG
47ad8e68 656static int is_empty_shadow_page(u64 *spt)
6aa8b732 657{
139bdb2d
AK
658 u64 *pos;
659 u64 *end;
660
47ad8e68 661 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 662 if (is_shadow_present_pte(*pos)) {
b8688d51 663 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 664 pos, *pos);
6aa8b732 665 return 0;
139bdb2d 666 }
6aa8b732
AK
667 return 1;
668}
d6c69ee9 669#endif
6aa8b732 670
4db35314 671static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 672{
4db35314
AK
673 ASSERT(is_empty_shadow_page(sp->spt));
674 list_del(&sp->link);
675 __free_page(virt_to_page(sp->spt));
676 __free_page(virt_to_page(sp->gfns));
677 kfree(sp);
f05e70ac 678 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
679}
680
cea0f0e7
AK
681static unsigned kvm_page_table_hashfn(gfn_t gfn)
682{
1ae0a13d 683 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
684}
685
25c0de2c
AK
686static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
687 u64 *parent_pte)
6aa8b732 688{
4db35314 689 struct kvm_mmu_page *sp;
6aa8b732 690
ad312c7c
ZX
691 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
692 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
693 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 694 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 695 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314
AK
696 ASSERT(is_empty_shadow_page(sp->spt));
697 sp->slot_bitmap = 0;
698 sp->multimapped = 0;
699 sp->parent_pte = parent_pte;
f05e70ac 700 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 701 return sp;
6aa8b732
AK
702}
703
714b93da 704static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 705 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
706{
707 struct kvm_pte_chain *pte_chain;
708 struct hlist_node *node;
709 int i;
710
711 if (!parent_pte)
712 return;
4db35314
AK
713 if (!sp->multimapped) {
714 u64 *old = sp->parent_pte;
cea0f0e7
AK
715
716 if (!old) {
4db35314 717 sp->parent_pte = parent_pte;
cea0f0e7
AK
718 return;
719 }
4db35314 720 sp->multimapped = 1;
714b93da 721 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
722 INIT_HLIST_HEAD(&sp->parent_ptes);
723 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
724 pte_chain->parent_ptes[0] = old;
725 }
4db35314 726 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
727 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
728 continue;
729 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
730 if (!pte_chain->parent_ptes[i]) {
731 pte_chain->parent_ptes[i] = parent_pte;
732 return;
733 }
734 }
714b93da 735 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 736 BUG_ON(!pte_chain);
4db35314 737 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
738 pte_chain->parent_ptes[0] = parent_pte;
739}
740
4db35314 741static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
742 u64 *parent_pte)
743{
744 struct kvm_pte_chain *pte_chain;
745 struct hlist_node *node;
746 int i;
747
4db35314
AK
748 if (!sp->multimapped) {
749 BUG_ON(sp->parent_pte != parent_pte);
750 sp->parent_pte = NULL;
cea0f0e7
AK
751 return;
752 }
4db35314 753 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
754 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
755 if (!pte_chain->parent_ptes[i])
756 break;
757 if (pte_chain->parent_ptes[i] != parent_pte)
758 continue;
697fe2e2
AK
759 while (i + 1 < NR_PTE_CHAIN_ENTRIES
760 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
761 pte_chain->parent_ptes[i]
762 = pte_chain->parent_ptes[i + 1];
763 ++i;
764 }
765 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
766 if (i == 0) {
767 hlist_del(&pte_chain->link);
90cb0529 768 mmu_free_pte_chain(pte_chain);
4db35314
AK
769 if (hlist_empty(&sp->parent_ptes)) {
770 sp->multimapped = 0;
771 sp->parent_pte = NULL;
697fe2e2
AK
772 }
773 }
cea0f0e7
AK
774 return;
775 }
776 BUG();
777}
778
4db35314 779static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
780{
781 unsigned index;
782 struct hlist_head *bucket;
4db35314 783 struct kvm_mmu_page *sp;
cea0f0e7
AK
784 struct hlist_node *node;
785
b8688d51 786 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 787 index = kvm_page_table_hashfn(gfn);
f05e70ac 788 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 789 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
790 if (sp->gfn == gfn && !sp->role.metaphysical
791 && !sp->role.invalid) {
cea0f0e7 792 pgprintk("%s: found role %x\n",
b8688d51 793 __func__, sp->role.word);
4db35314 794 return sp;
cea0f0e7
AK
795 }
796 return NULL;
797}
798
799static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
800 gfn_t gfn,
801 gva_t gaddr,
802 unsigned level,
803 int metaphysical,
41074d07 804 unsigned access,
f7d9c7b7 805 u64 *parent_pte)
cea0f0e7
AK
806{
807 union kvm_mmu_page_role role;
808 unsigned index;
809 unsigned quadrant;
810 struct hlist_head *bucket;
4db35314 811 struct kvm_mmu_page *sp;
cea0f0e7
AK
812 struct hlist_node *node;
813
814 role.word = 0;
ad312c7c 815 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
816 role.level = level;
817 role.metaphysical = metaphysical;
41074d07 818 role.access = access;
ad312c7c 819 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
820 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
821 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
822 role.quadrant = quadrant;
823 }
b8688d51 824 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 825 gfn, role.word);
1ae0a13d 826 index = kvm_page_table_hashfn(gfn);
f05e70ac 827 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
828 hlist_for_each_entry(sp, node, bucket, hash_link)
829 if (sp->gfn == gfn && sp->role.word == role.word) {
830 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
b8688d51 831 pgprintk("%s: found\n", __func__);
4db35314 832 return sp;
cea0f0e7 833 }
dfc5aa00 834 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
835 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
836 if (!sp)
837 return sp;
b8688d51 838 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
839 sp->gfn = gfn;
840 sp->role = role;
841 hlist_add_head(&sp->hash_link, bucket);
374cbac0 842 if (!metaphysical)
4a4c9924 843 rmap_write_protect(vcpu->kvm, gfn);
bed1d1df 844 vcpu->arch.mmu.prefetch_page(vcpu, sp);
4db35314 845 return sp;
cea0f0e7
AK
846}
847
90cb0529 848static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 849 struct kvm_mmu_page *sp)
a436036b 850{
697fe2e2
AK
851 unsigned i;
852 u64 *pt;
853 u64 ent;
854
4db35314 855 pt = sp->spt;
697fe2e2 856
4db35314 857 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 858 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 859 if (is_shadow_present_pte(pt[i]))
290fc38d 860 rmap_remove(kvm, &pt[i]);
c7addb90 861 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 862 }
90cb0529 863 kvm_flush_remote_tlbs(kvm);
697fe2e2
AK
864 return;
865 }
866
867 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
868 ent = pt[i];
869
05da4558
MT
870 if (is_shadow_present_pte(ent)) {
871 if (!is_large_pte(ent)) {
872 ent &= PT64_BASE_ADDR_MASK;
873 mmu_page_remove_parent_pte(page_header(ent),
874 &pt[i]);
875 } else {
876 --kvm->stat.lpages;
877 rmap_remove(kvm, &pt[i]);
878 }
879 }
c7addb90 880 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 881 }
90cb0529 882 kvm_flush_remote_tlbs(kvm);
a436036b
AK
883}
884
4db35314 885static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 886{
4db35314 887 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
888}
889
12b7d28f
AK
890static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
891{
892 int i;
893
894 for (i = 0; i < KVM_MAX_VCPUS; ++i)
895 if (kvm->vcpus[i])
ad312c7c 896 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
897}
898
4db35314 899static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
900{
901 u64 *parent_pte;
902
4cee5764 903 ++kvm->stat.mmu_shadow_zapped;
4db35314
AK
904 while (sp->multimapped || sp->parent_pte) {
905 if (!sp->multimapped)
906 parent_pte = sp->parent_pte;
a436036b
AK
907 else {
908 struct kvm_pte_chain *chain;
909
4db35314 910 chain = container_of(sp->parent_ptes.first,
a436036b
AK
911 struct kvm_pte_chain, link);
912 parent_pte = chain->parent_ptes[0];
913 }
697fe2e2 914 BUG_ON(!parent_pte);
4db35314 915 kvm_mmu_put_page(sp, parent_pte);
c7addb90 916 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 917 }
4db35314
AK
918 kvm_mmu_page_unlink_children(kvm, sp);
919 if (!sp->root_count) {
05da4558
MT
920 if (!sp->role.metaphysical)
921 unaccount_shadowed(kvm, sp->gfn);
4db35314
AK
922 hlist_del(&sp->hash_link);
923 kvm_mmu_free_page(kvm, sp);
2e53d63a 924 } else {
f05e70ac 925 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
926 sp->role.invalid = 1;
927 kvm_reload_remote_mmus(kvm);
928 }
12b7d28f 929 kvm_mmu_reset_last_pte_updated(kvm);
a436036b
AK
930}
931
82ce2c96
IE
932/*
933 * Changing the number of mmu pages allocated to the vm
934 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
935 */
936void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
937{
938 /*
939 * If we set the number of mmu pages to be smaller be than the
940 * number of actived pages , we must to free some mmu pages before we
941 * change the value
942 */
943
f05e70ac 944 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 945 kvm_nr_mmu_pages) {
f05e70ac
ZX
946 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
947 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
948
949 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
950 struct kvm_mmu_page *page;
951
f05e70ac 952 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
953 struct kvm_mmu_page, link);
954 kvm_mmu_zap_page(kvm, page);
955 n_used_mmu_pages--;
956 }
f05e70ac 957 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
958 }
959 else
f05e70ac
ZX
960 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
961 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 962
f05e70ac 963 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
964}
965
f67a46f4 966static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
967{
968 unsigned index;
969 struct hlist_head *bucket;
4db35314 970 struct kvm_mmu_page *sp;
a436036b
AK
971 struct hlist_node *node, *n;
972 int r;
973
b8688d51 974 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 975 r = 0;
1ae0a13d 976 index = kvm_page_table_hashfn(gfn);
f05e70ac 977 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
978 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
979 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 980 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314
AK
981 sp->role.word);
982 kvm_mmu_zap_page(kvm, sp);
a436036b
AK
983 r = 1;
984 }
985 return r;
cea0f0e7
AK
986}
987
f67a46f4 988static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 989{
4db35314 990 struct kvm_mmu_page *sp;
97a0a01e 991
4db35314 992 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 993 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 994 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
995 }
996}
997
38c335f1 998static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 999{
38c335f1 1000 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1001 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1002
4db35314 1003 __set_bit(slot, &sp->slot_bitmap);
6aa8b732
AK
1004}
1005
039576c0
AK
1006struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1007{
72dc67a6
IE
1008 struct page *page;
1009
ad312c7c 1010 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1011
1012 if (gpa == UNMAPPED_GVA)
1013 return NULL;
72dc67a6
IE
1014
1015 down_read(&current->mm->mmap_sem);
1016 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1017 up_read(&current->mm->mmap_sem);
1018
1019 return page;
039576c0
AK
1020}
1021
1c4f1fd6
AK
1022static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1023 unsigned pt_access, unsigned pte_access,
1024 int user_fault, int write_fault, int dirty,
05da4558 1025 int *ptwrite, int largepage, gfn_t gfn,
35149e21 1026 pfn_t pfn, bool speculative)
1c4f1fd6
AK
1027{
1028 u64 spte;
15aaa819 1029 int was_rmapped = 0;
75e68e60 1030 int was_writeble = is_writeble_pte(*shadow_pte);
1c4f1fd6 1031
bc750ba8 1032 pgprintk("%s: spte %llx access %x write_fault %d"
1c4f1fd6 1033 " user_fault %d gfn %lx\n",
b8688d51 1034 __func__, *shadow_pte, pt_access,
1c4f1fd6
AK
1035 write_fault, user_fault, gfn);
1036
15aaa819 1037 if (is_rmap_pte(*shadow_pte)) {
05da4558
MT
1038 /*
1039 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1040 * the parent of the now unreachable PTE.
1041 */
1042 if (largepage && !is_large_pte(*shadow_pte)) {
1043 struct kvm_mmu_page *child;
1044 u64 pte = *shadow_pte;
1045
1046 child = page_header(pte & PT64_BASE_ADDR_MASK);
1047 mmu_page_remove_parent_pte(child, shadow_pte);
35149e21 1048 } else if (pfn != spte_to_pfn(*shadow_pte)) {
15aaa819 1049 pgprintk("hfn old %lx new %lx\n",
35149e21 1050 spte_to_pfn(*shadow_pte), pfn);
15aaa819 1051 rmap_remove(vcpu->kvm, shadow_pte);
05da4558
MT
1052 } else {
1053 if (largepage)
1054 was_rmapped = is_large_pte(*shadow_pte);
1055 else
1056 was_rmapped = 1;
15aaa819 1057 }
15aaa819
MT
1058 }
1059
1c4f1fd6
AK
1060 /*
1061 * We don't set the accessed bit, since we sometimes want to see
1062 * whether the guest actually used the pte (in order to detect
1063 * demand paging).
1064 */
7b52345e 1065 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538
AK
1066 if (!speculative)
1067 pte_access |= PT_ACCESSED_MASK;
1c4f1fd6
AK
1068 if (!dirty)
1069 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1070 if (pte_access & ACC_EXEC_MASK)
1071 spte |= shadow_x_mask;
1072 else
1073 spte |= shadow_nx_mask;
1c4f1fd6 1074 if (pte_access & ACC_USER_MASK)
7b52345e 1075 spte |= shadow_user_mask;
05da4558
MT
1076 if (largepage)
1077 spte |= PT_PAGE_SIZE_MASK;
1c4f1fd6 1078
35149e21 1079 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1080
1081 if ((pte_access & ACC_WRITE_MASK)
1082 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1083 struct kvm_mmu_page *shadow;
1084
1085 spte |= PT_WRITABLE_MASK;
1086 if (user_fault) {
1087 mmu_unshadow(vcpu->kvm, gfn);
1088 goto unshadowed;
1089 }
1090
1091 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
05da4558
MT
1092 if (shadow ||
1093 (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
1c4f1fd6 1094 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1095 __func__, gfn);
1c4f1fd6
AK
1096 pte_access &= ~ACC_WRITE_MASK;
1097 if (is_writeble_pte(spte)) {
1098 spte &= ~PT_WRITABLE_MASK;
1099 kvm_x86_ops->tlb_flush(vcpu);
1100 }
1101 if (write_fault)
1102 *ptwrite = 1;
1103 }
1104 }
1105
1106unshadowed:
1107
1108 if (pte_access & ACC_WRITE_MASK)
1109 mark_page_dirty(vcpu->kvm, gfn);
1110
b8688d51 1111 pgprintk("%s: setting spte %llx\n", __func__, spte);
05da4558
MT
1112 pgprintk("instantiating %s PTE (%s) at %d (%llx) addr %llx\n",
1113 (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB",
1114 (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte);
1c4f1fd6 1115 set_shadow_pte(shadow_pte, spte);
05da4558
MT
1116 if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK)
1117 && (spte & PT_PRESENT_MASK))
1118 ++vcpu->kvm->stat.lpages;
1119
1c4f1fd6
AK
1120 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1121 if (!was_rmapped) {
05da4558 1122 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1123 if (!is_rmap_pte(*shadow_pte))
35149e21 1124 kvm_release_pfn_clean(pfn);
75e68e60
IE
1125 } else {
1126 if (was_writeble)
35149e21 1127 kvm_release_pfn_dirty(pfn);
75e68e60 1128 else
35149e21 1129 kvm_release_pfn_clean(pfn);
1c4f1fd6 1130 }
1c4f1fd6 1131 if (!ptwrite || !*ptwrite)
ad312c7c 1132 vcpu->arch.last_pte_updated = shadow_pte;
1c4f1fd6
AK
1133}
1134
6aa8b732
AK
1135static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1136{
1137}
1138
4d9976bb 1139static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
35149e21 1140 int largepage, gfn_t gfn, pfn_t pfn,
05da4558 1141 int level)
6aa8b732 1142{
ad312c7c 1143 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
e833240f 1144 int pt_write = 0;
6aa8b732
AK
1145
1146 for (; ; level--) {
1147 u32 index = PT64_INDEX(v, level);
1148 u64 *table;
1149
1150 ASSERT(VALID_PAGE(table_addr));
1151 table = __va(table_addr);
1152
1153 if (level == 1) {
e833240f 1154 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
35149e21 1155 0, write, 1, &pt_write, 0, gfn, pfn, false);
05da4558
MT
1156 return pt_write;
1157 }
1158
1159 if (largepage && level == 2) {
1160 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
35149e21 1161 0, write, 1, &pt_write, 1, gfn, pfn, false);
d196e343 1162 return pt_write;
6aa8b732
AK
1163 }
1164
c7addb90 1165 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 1166 struct kvm_mmu_page *new_table;
cea0f0e7 1167 gfn_t pseudo_gfn;
6aa8b732 1168
cea0f0e7
AK
1169 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1170 >> PAGE_SHIFT;
1171 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1172 v, level - 1,
f7d9c7b7 1173 1, ACC_ALL, &table[index]);
25c0de2c 1174 if (!new_table) {
6aa8b732 1175 pgprintk("nonpaging_map: ENOMEM\n");
35149e21 1176 kvm_release_pfn_clean(pfn);
6aa8b732
AK
1177 return -ENOMEM;
1178 }
1179
1439442c
SY
1180 table[index] = __pa(new_table->spt)
1181 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1182 | shadow_user_mask | shadow_x_mask;
6aa8b732
AK
1183 }
1184 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1185 }
1186}
1187
10589a46
MT
1188static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1189{
1190 int r;
05da4558 1191 int largepage = 0;
35149e21 1192 pfn_t pfn;
aaee2c94
MT
1193
1194 down_read(&current->mm->mmap_sem);
05da4558
MT
1195 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1196 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1197 largepage = 1;
1198 }
1199
35149e21 1200 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 1201 up_read(&current->mm->mmap_sem);
aaee2c94 1202
d196e343 1203 /* mmio */
35149e21
AL
1204 if (is_error_pfn(pfn)) {
1205 kvm_release_pfn_clean(pfn);
d196e343
AK
1206 return 1;
1207 }
1208
aaee2c94 1209 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1210 kvm_mmu_free_some_pages(vcpu);
35149e21 1211 r = __direct_map(vcpu, v, write, largepage, gfn, pfn,
05da4558 1212 PT32E_ROOT_LEVEL);
aaee2c94
MT
1213 spin_unlock(&vcpu->kvm->mmu_lock);
1214
aaee2c94 1215
10589a46
MT
1216 return r;
1217}
1218
1219
c7addb90
AK
1220static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1221 struct kvm_mmu_page *sp)
1222{
1223 int i;
1224
1225 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1226 sp->spt[i] = shadow_trap_nonpresent_pte;
1227}
1228
17ac10ad
AK
1229static void mmu_free_roots(struct kvm_vcpu *vcpu)
1230{
1231 int i;
4db35314 1232 struct kvm_mmu_page *sp;
17ac10ad 1233
ad312c7c 1234 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1235 return;
aaee2c94 1236 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1237 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1238 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1239
4db35314
AK
1240 sp = page_header(root);
1241 --sp->root_count;
2e53d63a
MT
1242 if (!sp->root_count && sp->role.invalid)
1243 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1244 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1245 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1246 return;
1247 }
17ac10ad 1248 for (i = 0; i < 4; ++i) {
ad312c7c 1249 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1250
417726a3 1251 if (root) {
417726a3 1252 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1253 sp = page_header(root);
1254 --sp->root_count;
2e53d63a
MT
1255 if (!sp->root_count && sp->role.invalid)
1256 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1257 }
ad312c7c 1258 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1259 }
aaee2c94 1260 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1261 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1262}
1263
1264static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1265{
1266 int i;
cea0f0e7 1267 gfn_t root_gfn;
4db35314 1268 struct kvm_mmu_page *sp;
fb72d167 1269 int metaphysical = 0;
3bb65a22 1270
ad312c7c 1271 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1272
ad312c7c
ZX
1273 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1274 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1275
1276 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1277 if (tdp_enabled)
1278 metaphysical = 1;
4db35314 1279 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1280 PT64_ROOT_LEVEL, metaphysical,
1281 ACC_ALL, NULL);
4db35314
AK
1282 root = __pa(sp->spt);
1283 ++sp->root_count;
ad312c7c 1284 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1285 return;
1286 }
fb72d167
JR
1287 metaphysical = !is_paging(vcpu);
1288 if (tdp_enabled)
1289 metaphysical = 1;
17ac10ad 1290 for (i = 0; i < 4; ++i) {
ad312c7c 1291 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1292
1293 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1294 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1295 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1296 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1297 continue;
1298 }
ad312c7c
ZX
1299 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1300 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1301 root_gfn = 0;
4db35314 1302 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1303 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1304 ACC_ALL, NULL);
4db35314
AK
1305 root = __pa(sp->spt);
1306 ++sp->root_count;
ad312c7c 1307 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1308 }
ad312c7c 1309 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1310}
1311
6aa8b732
AK
1312static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1313{
1314 return vaddr;
1315}
1316
1317static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1318 u32 error_code)
6aa8b732 1319{
e833240f 1320 gfn_t gfn;
e2dec939 1321 int r;
6aa8b732 1322
b8688d51 1323 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
1324 r = mmu_topup_memory_caches(vcpu);
1325 if (r)
1326 return r;
714b93da 1327
6aa8b732 1328 ASSERT(vcpu);
ad312c7c 1329 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1330
e833240f 1331 gfn = gva >> PAGE_SHIFT;
6aa8b732 1332
e833240f
AK
1333 return nonpaging_map(vcpu, gva & PAGE_MASK,
1334 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
1335}
1336
fb72d167
JR
1337static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1338 u32 error_code)
1339{
35149e21 1340 pfn_t pfn;
fb72d167 1341 int r;
05da4558
MT
1342 int largepage = 0;
1343 gfn_t gfn = gpa >> PAGE_SHIFT;
fb72d167
JR
1344
1345 ASSERT(vcpu);
1346 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1347
1348 r = mmu_topup_memory_caches(vcpu);
1349 if (r)
1350 return r;
1351
1352 down_read(&current->mm->mmap_sem);
05da4558
MT
1353 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1354 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1355 largepage = 1;
1356 }
35149e21 1357 pfn = gfn_to_pfn(vcpu->kvm, gfn);
3200f405 1358 up_read(&current->mm->mmap_sem);
35149e21
AL
1359 if (is_error_pfn(pfn)) {
1360 kvm_release_pfn_clean(pfn);
fb72d167
JR
1361 return 1;
1362 }
1363 spin_lock(&vcpu->kvm->mmu_lock);
1364 kvm_mmu_free_some_pages(vcpu);
1365 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
67253af5 1366 largepage, gfn, pfn, kvm_x86_ops->get_tdp_level());
fb72d167 1367 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
1368
1369 return r;
1370}
1371
6aa8b732
AK
1372static void nonpaging_free(struct kvm_vcpu *vcpu)
1373{
17ac10ad 1374 mmu_free_roots(vcpu);
6aa8b732
AK
1375}
1376
1377static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1378{
ad312c7c 1379 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1380
1381 context->new_cr3 = nonpaging_new_cr3;
1382 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
1383 context->gva_to_gpa = nonpaging_gva_to_gpa;
1384 context->free = nonpaging_free;
c7addb90 1385 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1386 context->root_level = 0;
6aa8b732 1387 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1388 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1389 return 0;
1390}
1391
d835dfec 1392void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1393{
1165f5fe 1394 ++vcpu->stat.tlb_flush;
cbdd1bea 1395 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1396}
1397
1398static void paging_new_cr3(struct kvm_vcpu *vcpu)
1399{
b8688d51 1400 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 1401 mmu_free_roots(vcpu);
6aa8b732
AK
1402}
1403
6aa8b732
AK
1404static void inject_page_fault(struct kvm_vcpu *vcpu,
1405 u64 addr,
1406 u32 err_code)
1407{
c3c91fee 1408 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1409}
1410
6aa8b732
AK
1411static void paging_free(struct kvm_vcpu *vcpu)
1412{
1413 nonpaging_free(vcpu);
1414}
1415
1416#define PTTYPE 64
1417#include "paging_tmpl.h"
1418#undef PTTYPE
1419
1420#define PTTYPE 32
1421#include "paging_tmpl.h"
1422#undef PTTYPE
1423
17ac10ad 1424static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 1425{
ad312c7c 1426 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1427
1428 ASSERT(is_pae(vcpu));
1429 context->new_cr3 = paging_new_cr3;
1430 context->page_fault = paging64_page_fault;
6aa8b732 1431 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1432 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1433 context->free = paging_free;
17ac10ad
AK
1434 context->root_level = level;
1435 context->shadow_root_level = level;
17c3ba9d 1436 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1437 return 0;
1438}
1439
17ac10ad
AK
1440static int paging64_init_context(struct kvm_vcpu *vcpu)
1441{
1442 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1443}
1444
6aa8b732
AK
1445static int paging32_init_context(struct kvm_vcpu *vcpu)
1446{
ad312c7c 1447 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1448
1449 context->new_cr3 = paging_new_cr3;
1450 context->page_fault = paging32_page_fault;
6aa8b732
AK
1451 context->gva_to_gpa = paging32_gva_to_gpa;
1452 context->free = paging_free;
c7addb90 1453 context->prefetch_page = paging32_prefetch_page;
6aa8b732
AK
1454 context->root_level = PT32_ROOT_LEVEL;
1455 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1456 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1457 return 0;
1458}
1459
1460static int paging32E_init_context(struct kvm_vcpu *vcpu)
1461{
17ac10ad 1462 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1463}
1464
fb72d167
JR
1465static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
1466{
1467 struct kvm_mmu *context = &vcpu->arch.mmu;
1468
1469 context->new_cr3 = nonpaging_new_cr3;
1470 context->page_fault = tdp_page_fault;
1471 context->free = nonpaging_free;
1472 context->prefetch_page = nonpaging_prefetch_page;
67253af5 1473 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
1474 context->root_hpa = INVALID_PAGE;
1475
1476 if (!is_paging(vcpu)) {
1477 context->gva_to_gpa = nonpaging_gva_to_gpa;
1478 context->root_level = 0;
1479 } else if (is_long_mode(vcpu)) {
1480 context->gva_to_gpa = paging64_gva_to_gpa;
1481 context->root_level = PT64_ROOT_LEVEL;
1482 } else if (is_pae(vcpu)) {
1483 context->gva_to_gpa = paging64_gva_to_gpa;
1484 context->root_level = PT32E_ROOT_LEVEL;
1485 } else {
1486 context->gva_to_gpa = paging32_gva_to_gpa;
1487 context->root_level = PT32_ROOT_LEVEL;
1488 }
1489
1490 return 0;
1491}
1492
1493static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
1494{
1495 ASSERT(vcpu);
ad312c7c 1496 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
1497
1498 if (!is_paging(vcpu))
1499 return nonpaging_init_context(vcpu);
a9058ecd 1500 else if (is_long_mode(vcpu))
6aa8b732
AK
1501 return paging64_init_context(vcpu);
1502 else if (is_pae(vcpu))
1503 return paging32E_init_context(vcpu);
1504 else
1505 return paging32_init_context(vcpu);
1506}
1507
fb72d167
JR
1508static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1509{
35149e21
AL
1510 vcpu->arch.update_pte.pfn = bad_pfn;
1511
fb72d167
JR
1512 if (tdp_enabled)
1513 return init_kvm_tdp_mmu(vcpu);
1514 else
1515 return init_kvm_softmmu(vcpu);
1516}
1517
6aa8b732
AK
1518static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1519{
1520 ASSERT(vcpu);
ad312c7c
ZX
1521 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1522 vcpu->arch.mmu.free(vcpu);
1523 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
1524 }
1525}
1526
1527int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1528{
1529 destroy_kvm_mmu(vcpu);
1530 return init_kvm_mmu(vcpu);
1531}
8668a3c4 1532EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1533
1534int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1535{
714b93da
AK
1536 int r;
1537
e2dec939 1538 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1539 if (r)
1540 goto out;
aaee2c94 1541 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1542 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 1543 mmu_alloc_roots(vcpu);
aaee2c94 1544 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1545 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 1546 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
1547out:
1548 return r;
6aa8b732 1549}
17c3ba9d
AK
1550EXPORT_SYMBOL_GPL(kvm_mmu_load);
1551
1552void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1553{
1554 mmu_free_roots(vcpu);
1555}
6aa8b732 1556
09072daf 1557static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 1558 struct kvm_mmu_page *sp,
ac1b714e
AK
1559 u64 *spte)
1560{
1561 u64 pte;
1562 struct kvm_mmu_page *child;
1563
1564 pte = *spte;
c7addb90 1565 if (is_shadow_present_pte(pte)) {
05da4558
MT
1566 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
1567 is_large_pte(pte))
290fc38d 1568 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1569 else {
1570 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1571 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1572 }
1573 }
c7addb90 1574 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
1575 if (is_large_pte(pte))
1576 --vcpu->kvm->stat.lpages;
ac1b714e
AK
1577}
1578
0028425f 1579static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 1580 struct kvm_mmu_page *sp,
0028425f 1581 u64 *spte,
489f1d65 1582 const void *new)
0028425f 1583{
05da4558
MT
1584 if ((sp->role.level != PT_PAGE_TABLE_LEVEL)
1585 && !vcpu->arch.update_pte.largepage) {
4cee5764 1586 ++vcpu->kvm->stat.mmu_pde_zapped;
0028425f 1587 return;
4cee5764 1588 }
0028425f 1589
4cee5764 1590 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 1591 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 1592 paging32_update_pte(vcpu, sp, spte, new);
0028425f 1593 else
489f1d65 1594 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
1595}
1596
79539cec
AK
1597static bool need_remote_flush(u64 old, u64 new)
1598{
1599 if (!is_shadow_present_pte(old))
1600 return false;
1601 if (!is_shadow_present_pte(new))
1602 return true;
1603 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1604 return true;
1605 old ^= PT64_NX_MASK;
1606 new ^= PT64_NX_MASK;
1607 return (old & ~new & PT64_PERM_MASK) != 0;
1608}
1609
1610static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1611{
1612 if (need_remote_flush(old, new))
1613 kvm_flush_remote_tlbs(vcpu->kvm);
1614 else
1615 kvm_mmu_flush_tlb(vcpu);
1616}
1617
12b7d28f
AK
1618static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1619{
ad312c7c 1620 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 1621
7b52345e 1622 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
1623}
1624
d7824fff
AK
1625static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1626 const u8 *new, int bytes)
1627{
1628 gfn_t gfn;
1629 int r;
1630 u64 gpte = 0;
35149e21 1631 pfn_t pfn;
d7824fff 1632
05da4558
MT
1633 vcpu->arch.update_pte.largepage = 0;
1634
d7824fff
AK
1635 if (bytes != 4 && bytes != 8)
1636 return;
1637
1638 /*
1639 * Assume that the pte write on a page table of the same type
1640 * as the current vcpu paging mode. This is nearly always true
1641 * (might be false while changing modes). Note it is verified later
1642 * by update_pte().
1643 */
1644 if (is_pae(vcpu)) {
1645 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1646 if ((bytes == 4) && (gpa % 4 == 0)) {
1647 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1648 if (r)
1649 return;
1650 memcpy((void *)&gpte + (gpa % 8), new, 4);
1651 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1652 memcpy((void *)&gpte, new, 8);
1653 }
1654 } else {
1655 if ((bytes == 4) && (gpa % 4 == 0))
1656 memcpy((void *)&gpte, new, 4);
1657 }
1658 if (!is_present_pte(gpte))
1659 return;
1660 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 1661
05da4558
MT
1662 down_read(&current->mm->mmap_sem);
1663 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
1664 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1665 vcpu->arch.update_pte.largepage = 1;
1666 }
35149e21 1667 pfn = gfn_to_pfn(vcpu->kvm, gfn);
05da4558 1668 up_read(&current->mm->mmap_sem);
72dc67a6 1669
35149e21
AL
1670 if (is_error_pfn(pfn)) {
1671 kvm_release_pfn_clean(pfn);
d196e343
AK
1672 return;
1673 }
d7824fff 1674 vcpu->arch.update_pte.gfn = gfn;
35149e21 1675 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
1676}
1677
09072daf 1678void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1679 const u8 *new, int bytes)
da4a00f0 1680{
9b7a0325 1681 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 1682 struct kvm_mmu_page *sp;
0e7bc4b9 1683 struct hlist_node *node, *n;
9b7a0325
AK
1684 struct hlist_head *bucket;
1685 unsigned index;
489f1d65 1686 u64 entry, gentry;
9b7a0325 1687 u64 *spte;
9b7a0325 1688 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1689 unsigned pte_size;
9b7a0325 1690 unsigned page_offset;
0e7bc4b9 1691 unsigned misaligned;
fce0657f 1692 unsigned quadrant;
9b7a0325 1693 int level;
86a5ba02 1694 int flooded = 0;
ac1b714e 1695 int npte;
489f1d65 1696 int r;
9b7a0325 1697
b8688d51 1698 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 1699 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 1700 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1701 kvm_mmu_free_some_pages(vcpu);
4cee5764 1702 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1703 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 1704 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 1705 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
1706 ++vcpu->arch.last_pt_write_count;
1707 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
1708 flooded = 1;
1709 } else {
ad312c7c
ZX
1710 vcpu->arch.last_pt_write_gfn = gfn;
1711 vcpu->arch.last_pt_write_count = 1;
1712 vcpu->arch.last_pte_updated = NULL;
86a5ba02 1713 }
1ae0a13d 1714 index = kvm_page_table_hashfn(gfn);
f05e70ac 1715 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
1716 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1717 if (sp->gfn != gfn || sp->role.metaphysical)
9b7a0325 1718 continue;
4db35314 1719 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 1720 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1721 misaligned |= bytes < 4;
86a5ba02 1722 if (misaligned || flooded) {
0e7bc4b9
AK
1723 /*
1724 * Misaligned accesses are too much trouble to fix
1725 * up; also, they usually indicate a page is not used
1726 * as a page table.
86a5ba02
AK
1727 *
1728 * If we're seeing too many writes to a page,
1729 * it may no longer be a page table, or we may be
1730 * forking, in which case it is better to unmap the
1731 * page.
0e7bc4b9
AK
1732 */
1733 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314
AK
1734 gpa, bytes, sp->role.word);
1735 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1736 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1737 continue;
1738 }
9b7a0325 1739 page_offset = offset;
4db35314 1740 level = sp->role.level;
ac1b714e 1741 npte = 1;
4db35314 1742 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1743 page_offset <<= 1; /* 32->64 */
1744 /*
1745 * A 32-bit pde maps 4MB while the shadow pdes map
1746 * only 2MB. So we need to double the offset again
1747 * and zap two pdes instead of one.
1748 */
1749 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1750 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1751 page_offset <<= 1;
1752 npte = 2;
1753 }
fce0657f 1754 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1755 page_offset &= ~PAGE_MASK;
4db35314 1756 if (quadrant != sp->role.quadrant)
fce0657f 1757 continue;
9b7a0325 1758 }
4db35314 1759 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
1760 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
1761 gentry = 0;
1762 r = kvm_read_guest_atomic(vcpu->kvm,
1763 gpa & ~(u64)(pte_size - 1),
1764 &gentry, pte_size);
1765 new = (const void *)&gentry;
1766 if (r < 0)
1767 new = NULL;
1768 }
ac1b714e 1769 while (npte--) {
79539cec 1770 entry = *spte;
4db35314 1771 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
1772 if (new)
1773 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 1774 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 1775 ++spte;
9b7a0325 1776 }
9b7a0325 1777 }
c7addb90 1778 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 1779 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
1780 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
1781 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
1782 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 1783 }
da4a00f0
AK
1784}
1785
a436036b
AK
1786int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1787{
10589a46
MT
1788 gpa_t gpa;
1789 int r;
a436036b 1790
10589a46 1791 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 1792
aaee2c94 1793 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 1794 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 1795 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 1796 return r;
a436036b
AK
1797}
1798
22d95b12 1799void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 1800{
f05e70ac 1801 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 1802 struct kvm_mmu_page *sp;
ebeace86 1803
f05e70ac 1804 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
1805 struct kvm_mmu_page, link);
1806 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1807 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1808 }
1809}
ebeace86 1810
3067714c
AK
1811int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1812{
1813 int r;
1814 enum emulation_result er;
1815
ad312c7c 1816 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
1817 if (r < 0)
1818 goto out;
1819
1820 if (!r) {
1821 r = 1;
1822 goto out;
1823 }
1824
b733bfb5
AK
1825 r = mmu_topup_memory_caches(vcpu);
1826 if (r)
1827 goto out;
1828
3067714c 1829 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
1830
1831 switch (er) {
1832 case EMULATE_DONE:
1833 return 1;
1834 case EMULATE_DO_MMIO:
1835 ++vcpu->stat.mmio_exits;
1836 return 0;
1837 case EMULATE_FAIL:
1838 kvm_report_emulation_failure(vcpu, "pagetable");
1839 return 1;
1840 default:
1841 BUG();
1842 }
1843out:
3067714c
AK
1844 return r;
1845}
1846EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1847
18552672
JR
1848void kvm_enable_tdp(void)
1849{
1850 tdp_enabled = true;
1851}
1852EXPORT_SYMBOL_GPL(kvm_enable_tdp);
1853
6aa8b732
AK
1854static void free_mmu_pages(struct kvm_vcpu *vcpu)
1855{
4db35314 1856 struct kvm_mmu_page *sp;
6aa8b732 1857
f05e70ac
ZX
1858 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
1859 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
1860 struct kvm_mmu_page, link);
1861 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 1862 cond_resched();
f51234c2 1863 }
ad312c7c 1864 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
1865}
1866
1867static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1868{
17ac10ad 1869 struct page *page;
6aa8b732
AK
1870 int i;
1871
1872 ASSERT(vcpu);
1873
f05e70ac
ZX
1874 if (vcpu->kvm->arch.n_requested_mmu_pages)
1875 vcpu->kvm->arch.n_free_mmu_pages =
1876 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 1877 else
f05e70ac
ZX
1878 vcpu->kvm->arch.n_free_mmu_pages =
1879 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
1880 /*
1881 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1882 * Therefore we need to allocate shadow page tables in the first
1883 * 4GB of memory, which happens to fit the DMA32 zone.
1884 */
1885 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1886 if (!page)
1887 goto error_1;
ad312c7c 1888 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 1889 for (i = 0; i < 4; ++i)
ad312c7c 1890 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1891
6aa8b732
AK
1892 return 0;
1893
1894error_1:
1895 free_mmu_pages(vcpu);
1896 return -ENOMEM;
1897}
1898
8018c27b 1899int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1900{
6aa8b732 1901 ASSERT(vcpu);
ad312c7c 1902 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1903
8018c27b
IM
1904 return alloc_mmu_pages(vcpu);
1905}
6aa8b732 1906
8018c27b
IM
1907int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1908{
1909 ASSERT(vcpu);
ad312c7c 1910 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 1911
8018c27b 1912 return init_kvm_mmu(vcpu);
6aa8b732
AK
1913}
1914
1915void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1916{
1917 ASSERT(vcpu);
1918
1919 destroy_kvm_mmu(vcpu);
1920 free_mmu_pages(vcpu);
714b93da 1921 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1922}
1923
90cb0529 1924void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 1925{
4db35314 1926 struct kvm_mmu_page *sp;
6aa8b732 1927
f05e70ac 1928 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
1929 int i;
1930 u64 *pt;
1931
4db35314 1932 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
1933 continue;
1934
4db35314 1935 pt = sp->spt;
6aa8b732
AK
1936 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1937 /* avoid RMW */
9647c14c 1938 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 1939 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
1940 }
1941}
37a7d8b0 1942
90cb0529 1943void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1944{
4db35314 1945 struct kvm_mmu_page *sp, *node;
e0fa826f 1946
aaee2c94 1947 spin_lock(&kvm->mmu_lock);
f05e70ac 1948 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
4db35314 1949 kvm_mmu_zap_page(kvm, sp);
aaee2c94 1950 spin_unlock(&kvm->mmu_lock);
e0fa826f 1951
90cb0529 1952 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1953}
1954
3ee16c81
IE
1955void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
1956{
1957 struct kvm_mmu_page *page;
1958
1959 page = container_of(kvm->arch.active_mmu_pages.prev,
1960 struct kvm_mmu_page, link);
1961 kvm_mmu_zap_page(kvm, page);
1962}
1963
1964static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
1965{
1966 struct kvm *kvm;
1967 struct kvm *kvm_freed = NULL;
1968 int cache_count = 0;
1969
1970 spin_lock(&kvm_lock);
1971
1972 list_for_each_entry(kvm, &vm_list, vm_list) {
1973 int npages;
1974
1975 spin_lock(&kvm->mmu_lock);
1976 npages = kvm->arch.n_alloc_mmu_pages -
1977 kvm->arch.n_free_mmu_pages;
1978 cache_count += npages;
1979 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
1980 kvm_mmu_remove_one_alloc_mmu_page(kvm);
1981 cache_count--;
1982 kvm_freed = kvm;
1983 }
1984 nr_to_scan--;
1985
1986 spin_unlock(&kvm->mmu_lock);
1987 }
1988 if (kvm_freed)
1989 list_move_tail(&kvm_freed->vm_list, &vm_list);
1990
1991 spin_unlock(&kvm_lock);
1992
1993 return cache_count;
1994}
1995
1996static struct shrinker mmu_shrinker = {
1997 .shrink = mmu_shrink,
1998 .seeks = DEFAULT_SEEKS * 10,
1999};
2000
2ddfd20e 2001static void mmu_destroy_caches(void)
b5a33a75
AK
2002{
2003 if (pte_chain_cache)
2004 kmem_cache_destroy(pte_chain_cache);
2005 if (rmap_desc_cache)
2006 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2007 if (mmu_page_header_cache)
2008 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2009}
2010
3ee16c81
IE
2011void kvm_mmu_module_exit(void)
2012{
2013 mmu_destroy_caches();
2014 unregister_shrinker(&mmu_shrinker);
2015}
2016
b5a33a75
AK
2017int kvm_mmu_module_init(void)
2018{
2019 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2020 sizeof(struct kvm_pte_chain),
20c2df83 2021 0, 0, NULL);
b5a33a75
AK
2022 if (!pte_chain_cache)
2023 goto nomem;
2024 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2025 sizeof(struct kvm_rmap_desc),
20c2df83 2026 0, 0, NULL);
b5a33a75
AK
2027 if (!rmap_desc_cache)
2028 goto nomem;
2029
d3d25b04
AK
2030 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2031 sizeof(struct kvm_mmu_page),
20c2df83 2032 0, 0, NULL);
d3d25b04
AK
2033 if (!mmu_page_header_cache)
2034 goto nomem;
2035
3ee16c81
IE
2036 register_shrinker(&mmu_shrinker);
2037
b5a33a75
AK
2038 return 0;
2039
2040nomem:
3ee16c81 2041 mmu_destroy_caches();
b5a33a75
AK
2042 return -ENOMEM;
2043}
2044
3ad82a7e
ZX
2045/*
2046 * Caculate mmu pages needed for kvm.
2047 */
2048unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2049{
2050 int i;
2051 unsigned int nr_mmu_pages;
2052 unsigned int nr_pages = 0;
2053
2054 for (i = 0; i < kvm->nmemslots; i++)
2055 nr_pages += kvm->memslots[i].npages;
2056
2057 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2058 nr_mmu_pages = max(nr_mmu_pages,
2059 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2060
2061 return nr_mmu_pages;
2062}
2063
2f333bcb
MT
2064static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2065 unsigned len)
2066{
2067 if (len > buffer->len)
2068 return NULL;
2069 return buffer->ptr;
2070}
2071
2072static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2073 unsigned len)
2074{
2075 void *ret;
2076
2077 ret = pv_mmu_peek_buffer(buffer, len);
2078 if (!ret)
2079 return ret;
2080 buffer->ptr += len;
2081 buffer->len -= len;
2082 buffer->processed += len;
2083 return ret;
2084}
2085
2086static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2087 gpa_t addr, gpa_t value)
2088{
2089 int bytes = 8;
2090 int r;
2091
2092 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2093 bytes = 4;
2094
2095 r = mmu_topup_memory_caches(vcpu);
2096 if (r)
2097 return r;
2098
3200f405 2099 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2100 return -EFAULT;
2101
2102 return 1;
2103}
2104
2105static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2106{
2107 kvm_x86_ops->tlb_flush(vcpu);
2108 return 1;
2109}
2110
2111static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2112{
2113 spin_lock(&vcpu->kvm->mmu_lock);
2114 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2115 spin_unlock(&vcpu->kvm->mmu_lock);
2116 return 1;
2117}
2118
2119static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2120 struct kvm_pv_mmu_op_buffer *buffer)
2121{
2122 struct kvm_mmu_op_header *header;
2123
2124 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2125 if (!header)
2126 return 0;
2127 switch (header->op) {
2128 case KVM_MMU_OP_WRITE_PTE: {
2129 struct kvm_mmu_op_write_pte *wpte;
2130
2131 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2132 if (!wpte)
2133 return 0;
2134 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2135 wpte->pte_val);
2136 }
2137 case KVM_MMU_OP_FLUSH_TLB: {
2138 struct kvm_mmu_op_flush_tlb *ftlb;
2139
2140 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2141 if (!ftlb)
2142 return 0;
2143 return kvm_pv_mmu_flush_tlb(vcpu);
2144 }
2145 case KVM_MMU_OP_RELEASE_PT: {
2146 struct kvm_mmu_op_release_pt *rpt;
2147
2148 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2149 if (!rpt)
2150 return 0;
2151 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2152 }
2153 default: return 0;
2154 }
2155}
2156
2157int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2158 gpa_t addr, unsigned long *ret)
2159{
2160 int r;
2161 struct kvm_pv_mmu_op_buffer buffer;
2162
2f333bcb
MT
2163 buffer.ptr = buffer.buf;
2164 buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf);
2165 buffer.processed = 0;
2166
2167 r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len);
2168 if (r)
2169 goto out;
2170
2171 while (buffer.len) {
2172 r = kvm_pv_mmu_op_one(vcpu, &buffer);
2173 if (r < 0)
2174 goto out;
2175 if (r == 0)
2176 break;
2177 }
2178
2179 r = 1;
2180out:
2181 *ret = buffer.processed;
2f333bcb
MT
2182 return r;
2183}
2184
37a7d8b0
AK
2185#ifdef AUDIT
2186
2187static const char *audit_msg;
2188
2189static gva_t canonicalize(gva_t gva)
2190{
2191#ifdef CONFIG_X86_64
2192 gva = (long long)(gva << 16) >> 16;
2193#endif
2194 return gva;
2195}
2196
2197static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2198 gva_t va, int level)
2199{
2200 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2201 int i;
2202 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2203
2204 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2205 u64 ent = pt[i];
2206
c7addb90 2207 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2208 continue;
2209
2210 va = canonicalize(va);
c7addb90
AK
2211 if (level > 1) {
2212 if (ent == shadow_notrap_nonpresent_pte)
2213 printk(KERN_ERR "audit: (%s) nontrapping pte"
2214 " in nonleaf level: levels %d gva %lx"
2215 " level %d pte %llx\n", audit_msg,
ad312c7c 2216 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2217
37a7d8b0 2218 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2219 } else {
ad312c7c 2220 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2221 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2222
c7addb90 2223 if (is_shadow_present_pte(ent)
37a7d8b0 2224 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2225 printk(KERN_ERR "xx audit error: (%s) levels %d"
2226 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2227 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2228 va, gpa, hpa, ent,
2229 is_shadow_present_pte(ent));
c7addb90
AK
2230 else if (ent == shadow_notrap_nonpresent_pte
2231 && !is_error_hpa(hpa))
2232 printk(KERN_ERR "audit: (%s) notrap shadow,"
2233 " valid guest gva %lx\n", audit_msg, va);
35149e21 2234 kvm_release_pfn_clean(pfn);
c7addb90 2235
37a7d8b0
AK
2236 }
2237 }
2238}
2239
2240static void audit_mappings(struct kvm_vcpu *vcpu)
2241{
1ea252af 2242 unsigned i;
37a7d8b0 2243
ad312c7c
ZX
2244 if (vcpu->arch.mmu.root_level == 4)
2245 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2246 else
2247 for (i = 0; i < 4; ++i)
ad312c7c 2248 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2249 audit_mappings_page(vcpu,
ad312c7c 2250 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
2251 i << 30,
2252 2);
2253}
2254
2255static int count_rmaps(struct kvm_vcpu *vcpu)
2256{
2257 int nmaps = 0;
2258 int i, j, k;
2259
2260 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
2261 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
2262 struct kvm_rmap_desc *d;
2263
2264 for (j = 0; j < m->npages; ++j) {
290fc38d 2265 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 2266
290fc38d 2267 if (!*rmapp)
37a7d8b0 2268 continue;
290fc38d 2269 if (!(*rmapp & 1)) {
37a7d8b0
AK
2270 ++nmaps;
2271 continue;
2272 }
290fc38d 2273 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
2274 while (d) {
2275 for (k = 0; k < RMAP_EXT; ++k)
2276 if (d->shadow_ptes[k])
2277 ++nmaps;
2278 else
2279 break;
2280 d = d->more;
2281 }
2282 }
2283 }
2284 return nmaps;
2285}
2286
2287static int count_writable_mappings(struct kvm_vcpu *vcpu)
2288{
2289 int nmaps = 0;
4db35314 2290 struct kvm_mmu_page *sp;
37a7d8b0
AK
2291 int i;
2292
f05e70ac 2293 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2294 u64 *pt = sp->spt;
37a7d8b0 2295
4db35314 2296 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
2297 continue;
2298
2299 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
2300 u64 ent = pt[i];
2301
2302 if (!(ent & PT_PRESENT_MASK))
2303 continue;
2304 if (!(ent & PT_WRITABLE_MASK))
2305 continue;
2306 ++nmaps;
2307 }
2308 }
2309 return nmaps;
2310}
2311
2312static void audit_rmap(struct kvm_vcpu *vcpu)
2313{
2314 int n_rmap = count_rmaps(vcpu);
2315 int n_actual = count_writable_mappings(vcpu);
2316
2317 if (n_rmap != n_actual)
2318 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 2319 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
2320}
2321
2322static void audit_write_protection(struct kvm_vcpu *vcpu)
2323{
4db35314 2324 struct kvm_mmu_page *sp;
290fc38d
IE
2325 struct kvm_memory_slot *slot;
2326 unsigned long *rmapp;
2327 gfn_t gfn;
37a7d8b0 2328
f05e70ac 2329 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2330 if (sp->role.metaphysical)
37a7d8b0
AK
2331 continue;
2332
4db35314
AK
2333 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
2334 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
2335 rmapp = &slot->rmap[gfn - slot->base_gfn];
2336 if (*rmapp)
37a7d8b0
AK
2337 printk(KERN_ERR "%s: (%s) shadow page has writable"
2338 " mappings: gfn %lx role %x\n",
b8688d51 2339 __func__, audit_msg, sp->gfn,
4db35314 2340 sp->role.word);
37a7d8b0
AK
2341 }
2342}
2343
2344static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
2345{
2346 int olddbg = dbg;
2347
2348 dbg = 0;
2349 audit_msg = msg;
2350 audit_rmap(vcpu);
2351 audit_write_protection(vcpu);
2352 audit_mappings(vcpu);
2353 dbg = olddbg;
2354}
2355
2356#endif
This page took 0.339293 seconds and 5 git commands to generate.