[PATCH] x86_64: align per-cpu section to configured cache bytes
[deliverable/linux.git] / arch / x86_64 / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/x86-64/kernel/process.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
8 *
9 * X86-64 port
10 * Andi Kleen.
76e4f660
AR
11 *
12 * CPU hotplug support - ashok.raj@intel.com
1da177e4
LT
13 * $Id: process.c,v 1.38 2002/01/15 10:08:03 ak Exp $
14 */
15
16/*
17 * This file handles the architecture-dependent parts of process handling..
18 */
19
20#include <stdarg.h>
21
76e4f660 22#include <linux/cpu.h>
1da177e4
LT
23#include <linux/errno.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/elfcore.h>
28#include <linux/smp.h>
29#include <linux/slab.h>
30#include <linux/user.h>
31#include <linux/module.h>
32#include <linux/a.out.h>
33#include <linux/interrupt.h>
34#include <linux/delay.h>
1da177e4
LT
35#include <linux/ptrace.h>
36#include <linux/utsname.h>
37#include <linux/random.h>
73649dab 38#include <linux/kprobes.h>
95833c83 39#include <linux/notifier.h>
1da177e4
LT
40
41#include <asm/uaccess.h>
42#include <asm/pgtable.h>
43#include <asm/system.h>
44#include <asm/io.h>
45#include <asm/processor.h>
46#include <asm/i387.h>
47#include <asm/mmu_context.h>
48#include <asm/pda.h>
49#include <asm/prctl.h>
50#include <asm/kdebug.h>
51#include <asm/desc.h>
52#include <asm/proto.h>
53#include <asm/ia32.h>
95833c83 54#include <asm/idle.h>
1da177e4
LT
55
56asmlinkage extern void ret_from_fork(void);
57
58unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED;
59
1da177e4
LT
60unsigned long boot_option_idle_override = 0;
61EXPORT_SYMBOL(boot_option_idle_override);
62
63/*
64 * Powermanagement idle function, if any..
65 */
66void (*pm_idle)(void);
67static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
68
95833c83
AK
69static struct notifier_block *idle_notifier;
70static DEFINE_SPINLOCK(idle_notifier_lock);
71
72void idle_notifier_register(struct notifier_block *n)
73{
74 unsigned long flags;
75 spin_lock_irqsave(&idle_notifier_lock, flags);
76 notifier_chain_register(&idle_notifier, n);
77 spin_unlock_irqrestore(&idle_notifier_lock, flags);
78}
79EXPORT_SYMBOL_GPL(idle_notifier_register);
80
81void idle_notifier_unregister(struct notifier_block *n)
82{
83 unsigned long flags;
84 spin_lock_irqsave(&idle_notifier_lock, flags);
85 notifier_chain_unregister(&idle_notifier, n);
86 spin_unlock_irqrestore(&idle_notifier_lock, flags);
87}
88EXPORT_SYMBOL(idle_notifier_unregister);
89
90enum idle_state { CPU_IDLE, CPU_NOT_IDLE };
91static DEFINE_PER_CPU(enum idle_state, idle_state) = CPU_NOT_IDLE;
92
93void enter_idle(void)
94{
95 __get_cpu_var(idle_state) = CPU_IDLE;
96 notifier_call_chain(&idle_notifier, IDLE_START, NULL);
97}
98
99static void __exit_idle(void)
100{
101 __get_cpu_var(idle_state) = CPU_NOT_IDLE;
102 notifier_call_chain(&idle_notifier, IDLE_END, NULL);
103}
104
105/* Called from interrupts to signify idle end */
106void exit_idle(void)
107{
108 if (current->pid | read_pda(irqcount))
109 return;
110 __exit_idle();
111}
112
1da177e4
LT
113/*
114 * We use this if we don't have any better
115 * idle routine..
116 */
117void default_idle(void)
118{
64c7c8f8
NP
119 local_irq_enable();
120
2d52ede9
AK
121 clear_thread_flag(TIF_POLLING_NRFLAG);
122 smp_mb__after_clear_bit();
123 while (!need_resched()) {
124 local_irq_disable();
125 if (!need_resched())
126 safe_halt();
127 else
128 local_irq_enable();
1da177e4 129 }
2d52ede9 130 set_thread_flag(TIF_POLLING_NRFLAG);
1da177e4
LT
131}
132
133/*
134 * On SMP it's slightly faster (but much more power-consuming!)
135 * to poll the ->need_resched flag instead of waiting for the
136 * cross-CPU IPI to arrive. Use this option with caution.
137 */
138static void poll_idle (void)
139{
1da177e4
LT
140 local_irq_enable();
141
64c7c8f8
NP
142 asm volatile(
143 "2:"
144 "testl %0,%1;"
145 "rep; nop;"
146 "je 2b;"
147 : :
148 "i" (_TIF_NEED_RESCHED),
149 "m" (current_thread_info()->flags));
1da177e4
LT
150}
151
152void cpu_idle_wait(void)
153{
154 unsigned int cpu, this_cpu = get_cpu();
155 cpumask_t map;
156
157 set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
158 put_cpu();
159
160 cpus_clear(map);
161 for_each_online_cpu(cpu) {
162 per_cpu(cpu_idle_state, cpu) = 1;
163 cpu_set(cpu, map);
164 }
165
166 __get_cpu_var(cpu_idle_state) = 0;
167
168 wmb();
169 do {
170 ssleep(1);
171 for_each_online_cpu(cpu) {
a88cde13
AK
172 if (cpu_isset(cpu, map) &&
173 !per_cpu(cpu_idle_state, cpu))
1da177e4
LT
174 cpu_clear(cpu, map);
175 }
176 cpus_and(map, map, cpu_online_map);
177 } while (!cpus_empty(map));
178}
179EXPORT_SYMBOL_GPL(cpu_idle_wait);
180
76e4f660
AR
181#ifdef CONFIG_HOTPLUG_CPU
182DECLARE_PER_CPU(int, cpu_state);
183
184#include <asm/nmi.h>
1fa744e6 185/* We halt the CPU with physical CPU hotplug */
76e4f660
AR
186static inline void play_dead(void)
187{
188 idle_task_exit();
189 wbinvd();
190 mb();
191 /* Ack it */
192 __get_cpu_var(cpu_state) = CPU_DEAD;
193
1fa744e6 194 local_irq_disable();
76e4f660 195 while (1)
1fa744e6 196 halt();
76e4f660
AR
197}
198#else
199static inline void play_dead(void)
200{
201 BUG();
202}
203#endif /* CONFIG_HOTPLUG_CPU */
204
1da177e4
LT
205/*
206 * The idle thread. There's no useful work to be
207 * done, so just try to conserve power and have a
208 * low exit latency (ie sit in a loop waiting for
209 * somebody to say that they'd like to reschedule)
210 */
211void cpu_idle (void)
212{
64c7c8f8
NP
213 set_thread_flag(TIF_POLLING_NRFLAG);
214
1da177e4
LT
215 /* endless idle loop with no priority at all */
216 while (1) {
217 while (!need_resched()) {
218 void (*idle)(void);
219
220 if (__get_cpu_var(cpu_idle_state))
221 __get_cpu_var(cpu_idle_state) = 0;
222
223 rmb();
224 idle = pm_idle;
225 if (!idle)
226 idle = default_idle;
76e4f660
AR
227 if (cpu_is_offline(smp_processor_id()))
228 play_dead();
95833c83 229 enter_idle();
1da177e4 230 idle();
95833c83 231 __exit_idle();
1da177e4
LT
232 }
233
5bfb5d69 234 preempt_enable_no_resched();
1da177e4 235 schedule();
5bfb5d69 236 preempt_disable();
1da177e4
LT
237 }
238}
239
240/*
241 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
242 * which can obviate IPI to trigger checking of need_resched.
243 * We execute MONITOR against need_resched and enter optimized wait state
244 * through MWAIT. Whenever someone changes need_resched, we would be woken
245 * up from MWAIT (without an IPI).
246 */
247static void mwait_idle(void)
248{
249 local_irq_enable();
250
64c7c8f8
NP
251 while (!need_resched()) {
252 __monitor((void *)&current_thread_info()->flags, 0, 0);
253 smp_mb();
254 if (need_resched())
255 break;
256 __mwait(0, 0);
1da177e4
LT
257 }
258}
259
e6982c67 260void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
1da177e4
LT
261{
262 static int printed;
263 if (cpu_has(c, X86_FEATURE_MWAIT)) {
264 /*
265 * Skip, if setup has overridden idle.
266 * One CPU supports mwait => All CPUs supports mwait
267 */
268 if (!pm_idle) {
269 if (!printed) {
270 printk("using mwait in idle threads.\n");
271 printed = 1;
272 }
273 pm_idle = mwait_idle;
274 }
275 }
276}
277
278static int __init idle_setup (char *str)
279{
280 if (!strncmp(str, "poll", 4)) {
281 printk("using polling idle threads.\n");
282 pm_idle = poll_idle;
283 }
284
285 boot_option_idle_override = 1;
286 return 1;
287}
288
289__setup("idle=", idle_setup);
290
291/* Prints also some state that isn't saved in the pt_regs */
292void __show_regs(struct pt_regs * regs)
293{
294 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
295 unsigned int fsindex,gsindex;
296 unsigned int ds,cs,es;
297
298 printk("\n");
299 print_modules();
9acf23c4
AK
300 printk("Pid: %d, comm: %.20s %s %s %.*s\n",
301 current->pid, current->comm, print_tainted(),
302 system_utsname.release,
303 (int)strcspn(system_utsname.version, " "),
304 system_utsname.version);
1da177e4
LT
305 printk("RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->rip);
306 printk_address(regs->rip);
a88cde13
AK
307 printk("\nRSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, regs->rsp,
308 regs->eflags);
1da177e4
LT
309 printk("RAX: %016lx RBX: %016lx RCX: %016lx\n",
310 regs->rax, regs->rbx, regs->rcx);
311 printk("RDX: %016lx RSI: %016lx RDI: %016lx\n",
312 regs->rdx, regs->rsi, regs->rdi);
313 printk("RBP: %016lx R08: %016lx R09: %016lx\n",
314 regs->rbp, regs->r8, regs->r9);
315 printk("R10: %016lx R11: %016lx R12: %016lx\n",
316 regs->r10, regs->r11, regs->r12);
317 printk("R13: %016lx R14: %016lx R15: %016lx\n",
318 regs->r13, regs->r14, regs->r15);
319
320 asm("movl %%ds,%0" : "=r" (ds));
321 asm("movl %%cs,%0" : "=r" (cs));
322 asm("movl %%es,%0" : "=r" (es));
323 asm("movl %%fs,%0" : "=r" (fsindex));
324 asm("movl %%gs,%0" : "=r" (gsindex));
325
326 rdmsrl(MSR_FS_BASE, fs);
327 rdmsrl(MSR_GS_BASE, gs);
328 rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
329
330 asm("movq %%cr0, %0": "=r" (cr0));
331 asm("movq %%cr2, %0": "=r" (cr2));
332 asm("movq %%cr3, %0": "=r" (cr3));
333 asm("movq %%cr4, %0": "=r" (cr4));
334
335 printk("FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
336 fs,fsindex,gs,gsindex,shadowgs);
337 printk("CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds, es, cr0);
338 printk("CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3, cr4);
339}
340
341void show_regs(struct pt_regs *regs)
342{
c078d326 343 printk("CPU %d:", smp_processor_id());
1da177e4
LT
344 __show_regs(regs);
345 show_trace(&regs->rsp);
346}
347
348/*
349 * Free current thread data structures etc..
350 */
351void exit_thread(void)
352{
353 struct task_struct *me = current;
354 struct thread_struct *t = &me->thread;
73649dab
RL
355
356 /*
357 * Remove function-return probe instances associated with this task
358 * and put them back on the free list. Do not insert an exit probe for
359 * this function, it will be disabled by kprobe_flush_task if you do.
360 */
361 kprobe_flush_task(me);
362
1da177e4
LT
363 if (me->thread.io_bitmap_ptr) {
364 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
365
366 kfree(t->io_bitmap_ptr);
367 t->io_bitmap_ptr = NULL;
368 /*
369 * Careful, clear this in the TSS too:
370 */
371 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
372 t->io_bitmap_max = 0;
373 put_cpu();
374 }
375}
376
377void flush_thread(void)
378{
379 struct task_struct *tsk = current;
380 struct thread_info *t = current_thread_info();
381
382 if (t->flags & _TIF_ABI_PENDING)
383 t->flags ^= (_TIF_ABI_PENDING | _TIF_IA32);
384
385 tsk->thread.debugreg0 = 0;
386 tsk->thread.debugreg1 = 0;
387 tsk->thread.debugreg2 = 0;
388 tsk->thread.debugreg3 = 0;
389 tsk->thread.debugreg6 = 0;
390 tsk->thread.debugreg7 = 0;
391 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
392 /*
393 * Forget coprocessor state..
394 */
395 clear_fpu(tsk);
396 clear_used_math();
397}
398
399void release_thread(struct task_struct *dead_task)
400{
401 if (dead_task->mm) {
402 if (dead_task->mm->context.size) {
403 printk("WARNING: dead process %8s still has LDT? <%p/%d>\n",
404 dead_task->comm,
405 dead_task->mm->context.ldt,
406 dead_task->mm->context.size);
407 BUG();
408 }
409 }
410}
411
412static inline void set_32bit_tls(struct task_struct *t, int tls, u32 addr)
413{
414 struct user_desc ud = {
415 .base_addr = addr,
416 .limit = 0xfffff,
417 .seg_32bit = 1,
418 .limit_in_pages = 1,
419 .useable = 1,
420 };
421 struct n_desc_struct *desc = (void *)t->thread.tls_array;
422 desc += tls;
423 desc->a = LDT_entry_a(&ud);
424 desc->b = LDT_entry_b(&ud);
425}
426
427static inline u32 read_32bit_tls(struct task_struct *t, int tls)
428{
429 struct desc_struct *desc = (void *)t->thread.tls_array;
430 desc += tls;
431 return desc->base0 |
432 (((u32)desc->base1) << 16) |
433 (((u32)desc->base2) << 24);
434}
435
436/*
437 * This gets called before we allocate a new thread and copy
438 * the current task into it.
439 */
440void prepare_to_copy(struct task_struct *tsk)
441{
442 unlazy_fpu(tsk);
443}
444
445int copy_thread(int nr, unsigned long clone_flags, unsigned long rsp,
446 unsigned long unused,
447 struct task_struct * p, struct pt_regs * regs)
448{
449 int err;
450 struct pt_regs * childregs;
451 struct task_struct *me = current;
452
a88cde13 453 childregs = ((struct pt_regs *)
57eafdc2 454 (THREAD_SIZE + task_stack_page(p))) - 1;
1da177e4
LT
455 *childregs = *regs;
456
457 childregs->rax = 0;
458 childregs->rsp = rsp;
a88cde13 459 if (rsp == ~0UL)
1da177e4 460 childregs->rsp = (unsigned long)childregs;
1da177e4
LT
461
462 p->thread.rsp = (unsigned long) childregs;
463 p->thread.rsp0 = (unsigned long) (childregs+1);
464 p->thread.userrsp = me->thread.userrsp;
465
e4f17c43 466 set_tsk_thread_flag(p, TIF_FORK);
1da177e4
LT
467
468 p->thread.fs = me->thread.fs;
469 p->thread.gs = me->thread.gs;
470
fd51f666
L
471 asm("mov %%gs,%0" : "=m" (p->thread.gsindex));
472 asm("mov %%fs,%0" : "=m" (p->thread.fsindex));
473 asm("mov %%es,%0" : "=m" (p->thread.es));
474 asm("mov %%ds,%0" : "=m" (p->thread.ds));
1da177e4
LT
475
476 if (unlikely(me->thread.io_bitmap_ptr != NULL)) {
477 p->thread.io_bitmap_ptr = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL);
478 if (!p->thread.io_bitmap_ptr) {
479 p->thread.io_bitmap_max = 0;
480 return -ENOMEM;
481 }
a88cde13
AK
482 memcpy(p->thread.io_bitmap_ptr, me->thread.io_bitmap_ptr,
483 IO_BITMAP_BYTES);
1da177e4
LT
484 }
485
486 /*
487 * Set a new TLS for the child thread?
488 */
489 if (clone_flags & CLONE_SETTLS) {
490#ifdef CONFIG_IA32_EMULATION
491 if (test_thread_flag(TIF_IA32))
492 err = ia32_child_tls(p, childregs);
493 else
494#endif
495 err = do_arch_prctl(p, ARCH_SET_FS, childregs->r8);
496 if (err)
497 goto out;
498 }
499 err = 0;
500out:
501 if (err && p->thread.io_bitmap_ptr) {
502 kfree(p->thread.io_bitmap_ptr);
503 p->thread.io_bitmap_max = 0;
504 }
505 return err;
506}
507
508/*
509 * This special macro can be used to load a debugging register
510 */
511#define loaddebug(thread,r) set_debug(thread->debugreg ## r, r)
512
513/*
514 * switch_to(x,y) should switch tasks from x to y.
515 *
516 * This could still be optimized:
517 * - fold all the options into a flag word and test it with a single test.
518 * - could test fs/gs bitsliced
519 */
a88cde13
AK
520struct task_struct *
521__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
1da177e4
LT
522{
523 struct thread_struct *prev = &prev_p->thread,
524 *next = &next_p->thread;
525 int cpu = smp_processor_id();
526 struct tss_struct *tss = &per_cpu(init_tss, cpu);
527
528 unlazy_fpu(prev_p);
529
530 /*
531 * Reload esp0, LDT and the page table pointer:
532 */
533 tss->rsp0 = next->rsp0;
534
535 /*
536 * Switch DS and ES.
537 * This won't pick up thread selector changes, but I guess that is ok.
538 */
fd51f666 539 asm volatile("mov %%es,%0" : "=m" (prev->es));
1da177e4
LT
540 if (unlikely(next->es | prev->es))
541 loadsegment(es, next->es);
542
fd51f666 543 asm volatile ("mov %%ds,%0" : "=m" (prev->ds));
1da177e4
LT
544 if (unlikely(next->ds | prev->ds))
545 loadsegment(ds, next->ds);
546
547 load_TLS(next, cpu);
548
549 /*
550 * Switch FS and GS.
551 */
552 {
553 unsigned fsindex;
554 asm volatile("movl %%fs,%0" : "=r" (fsindex));
555 /* segment register != 0 always requires a reload.
556 also reload when it has changed.
557 when prev process used 64bit base always reload
558 to avoid an information leak. */
559 if (unlikely(fsindex | next->fsindex | prev->fs)) {
560 loadsegment(fs, next->fsindex);
561 /* check if the user used a selector != 0
562 * if yes clear 64bit base, since overloaded base
563 * is always mapped to the Null selector
564 */
565 if (fsindex)
566 prev->fs = 0;
567 }
568 /* when next process has a 64bit base use it */
569 if (next->fs)
570 wrmsrl(MSR_FS_BASE, next->fs);
571 prev->fsindex = fsindex;
572 }
573 {
574 unsigned gsindex;
575 asm volatile("movl %%gs,%0" : "=r" (gsindex));
576 if (unlikely(gsindex | next->gsindex | prev->gs)) {
577 load_gs_index(next->gsindex);
578 if (gsindex)
579 prev->gs = 0;
580 }
581 if (next->gs)
582 wrmsrl(MSR_KERNEL_GS_BASE, next->gs);
583 prev->gsindex = gsindex;
584 }
585
586 /*
587 * Switch the PDA context.
588 */
589 prev->userrsp = read_pda(oldrsp);
590 write_pda(oldrsp, next->userrsp);
591 write_pda(pcurrent, next_p);
a88cde13 592 write_pda(kernelstack,
57eafdc2 593 task_stack_page(next_p) + THREAD_SIZE - PDA_STACKOFFSET);
1da177e4
LT
594
595 /*
596 * Now maybe reload the debug registers
597 */
598 if (unlikely(next->debugreg7)) {
599 loaddebug(next, 0);
600 loaddebug(next, 1);
601 loaddebug(next, 2);
602 loaddebug(next, 3);
603 /* no 4 and 5 */
604 loaddebug(next, 6);
605 loaddebug(next, 7);
606 }
607
608
609 /*
610 * Handle the IO bitmap
611 */
612 if (unlikely(prev->io_bitmap_ptr || next->io_bitmap_ptr)) {
613 if (next->io_bitmap_ptr)
614 /*
615 * Copy the relevant range of the IO bitmap.
616 * Normally this is 128 bytes or less:
617 */
618 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
619 max(prev->io_bitmap_max, next->io_bitmap_max));
620 else {
621 /*
622 * Clear any possible leftover bits:
623 */
624 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
625 }
626 }
627
628 return prev_p;
629}
630
631/*
632 * sys_execve() executes a new program.
633 */
634asmlinkage
635long sys_execve(char __user *name, char __user * __user *argv,
636 char __user * __user *envp, struct pt_regs regs)
637{
638 long error;
639 char * filename;
640
641 filename = getname(name);
642 error = PTR_ERR(filename);
643 if (IS_ERR(filename))
644 return error;
645 error = do_execve(filename, argv, envp, &regs);
646 if (error == 0) {
647 task_lock(current);
648 current->ptrace &= ~PT_DTRACE;
649 task_unlock(current);
650 }
651 putname(filename);
652 return error;
653}
654
655void set_personality_64bit(void)
656{
657 /* inherit personality from parent */
658
659 /* Make sure to be in 64bit mode */
660 clear_thread_flag(TIF_IA32);
661
662 /* TBD: overwrites user setup. Should have two bits.
663 But 64bit processes have always behaved this way,
664 so it's not too bad. The main problem is just that
665 32bit childs are affected again. */
666 current->personality &= ~READ_IMPLIES_EXEC;
667}
668
669asmlinkage long sys_fork(struct pt_regs *regs)
670{
671 return do_fork(SIGCHLD, regs->rsp, regs, 0, NULL, NULL);
672}
673
a88cde13
AK
674asmlinkage long
675sys_clone(unsigned long clone_flags, unsigned long newsp,
676 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
1da177e4
LT
677{
678 if (!newsp)
679 newsp = regs->rsp;
680 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
681}
682
683/*
684 * This is trivial, and on the face of it looks like it
685 * could equally well be done in user mode.
686 *
687 * Not so, for quite unobvious reasons - register pressure.
688 * In user mode vfork() cannot have a stack frame, and if
689 * done by calling the "clone()" system call directly, you
690 * do not have enough call-clobbered registers to hold all
691 * the information you need.
692 */
693asmlinkage long sys_vfork(struct pt_regs *regs)
694{
695 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->rsp, regs, 0,
696 NULL, NULL);
697}
698
699unsigned long get_wchan(struct task_struct *p)
700{
701 unsigned long stack;
702 u64 fp,rip;
703 int count = 0;
704
705 if (!p || p == current || p->state==TASK_RUNNING)
706 return 0;
57eafdc2 707 stack = (unsigned long)task_stack_page(p);
1da177e4
LT
708 if (p->thread.rsp < stack || p->thread.rsp > stack+THREAD_SIZE)
709 return 0;
710 fp = *(u64 *)(p->thread.rsp);
711 do {
a88cde13
AK
712 if (fp < (unsigned long)stack ||
713 fp > (unsigned long)stack+THREAD_SIZE)
1da177e4
LT
714 return 0;
715 rip = *(u64 *)(fp+8);
716 if (!in_sched_functions(rip))
717 return rip;
718 fp = *(u64 *)fp;
719 } while (count++ < 16);
720 return 0;
721}
722
723long do_arch_prctl(struct task_struct *task, int code, unsigned long addr)
724{
725 int ret = 0;
726 int doit = task == current;
727 int cpu;
728
729 switch (code) {
730 case ARCH_SET_GS:
84929801 731 if (addr >= TASK_SIZE_OF(task))
1da177e4
LT
732 return -EPERM;
733 cpu = get_cpu();
734 /* handle small bases via the GDT because that's faster to
735 switch. */
736 if (addr <= 0xffffffff) {
737 set_32bit_tls(task, GS_TLS, addr);
738 if (doit) {
739 load_TLS(&task->thread, cpu);
740 load_gs_index(GS_TLS_SEL);
741 }
742 task->thread.gsindex = GS_TLS_SEL;
743 task->thread.gs = 0;
744 } else {
745 task->thread.gsindex = 0;
746 task->thread.gs = addr;
747 if (doit) {
a88cde13
AK
748 load_gs_index(0);
749 ret = checking_wrmsrl(MSR_KERNEL_GS_BASE, addr);
1da177e4
LT
750 }
751 }
752 put_cpu();
753 break;
754 case ARCH_SET_FS:
755 /* Not strictly needed for fs, but do it for symmetry
756 with gs */
84929801 757 if (addr >= TASK_SIZE_OF(task))
1da177e4
LT
758 return -EPERM;
759 cpu = get_cpu();
760 /* handle small bases via the GDT because that's faster to
761 switch. */
762 if (addr <= 0xffffffff) {
763 set_32bit_tls(task, FS_TLS, addr);
764 if (doit) {
765 load_TLS(&task->thread, cpu);
a88cde13 766 asm volatile("movl %0,%%fs" :: "r"(FS_TLS_SEL));
1da177e4
LT
767 }
768 task->thread.fsindex = FS_TLS_SEL;
769 task->thread.fs = 0;
770 } else {
771 task->thread.fsindex = 0;
772 task->thread.fs = addr;
773 if (doit) {
774 /* set the selector to 0 to not confuse
775 __switch_to */
a88cde13
AK
776 asm volatile("movl %0,%%fs" :: "r" (0));
777 ret = checking_wrmsrl(MSR_FS_BASE, addr);
1da177e4
LT
778 }
779 }
780 put_cpu();
781 break;
782 case ARCH_GET_FS: {
783 unsigned long base;
784 if (task->thread.fsindex == FS_TLS_SEL)
785 base = read_32bit_tls(task, FS_TLS);
a88cde13 786 else if (doit)
1da177e4 787 rdmsrl(MSR_FS_BASE, base);
a88cde13 788 else
1da177e4
LT
789 base = task->thread.fs;
790 ret = put_user(base, (unsigned long __user *)addr);
791 break;
792 }
793 case ARCH_GET_GS: {
794 unsigned long base;
795 if (task->thread.gsindex == GS_TLS_SEL)
796 base = read_32bit_tls(task, GS_TLS);
a88cde13 797 else if (doit)
1da177e4 798 rdmsrl(MSR_KERNEL_GS_BASE, base);
a88cde13 799 else
1da177e4
LT
800 base = task->thread.gs;
801 ret = put_user(base, (unsigned long __user *)addr);
802 break;
803 }
804
805 default:
806 ret = -EINVAL;
807 break;
808 }
809
810 return ret;
811}
812
813long sys_arch_prctl(int code, unsigned long addr)
814{
815 return do_arch_prctl(current, code, addr);
816}
817
818/*
819 * Capture the user space registers if the task is not running (in user space)
820 */
821int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
822{
823 struct pt_regs *pp, ptregs;
824
bb049232 825 pp = task_pt_regs(tsk);
1da177e4
LT
826
827 ptregs = *pp;
828 ptregs.cs &= 0xffff;
829 ptregs.ss &= 0xffff;
830
831 elf_core_copy_regs(regs, &ptregs);
832
833 return 1;
834}
835
836unsigned long arch_align_stack(unsigned long sp)
837{
838 if (randomize_va_space)
839 sp -= get_random_int() % 8192;
840 return sp & ~0xf;
841}
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