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[deliverable/binutils-gdb.git] / bfd / coff-arm.c
CommitLineData
252b5132 1/* BFD back-end for ARM COFF files.
7898deda 2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
157090f7 3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
252b5132
RH
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
6
d21356d8 7 This file is part of BFD, the Binary File Descriptor library.
252b5132 8
d21356d8
NC
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
cd123cb7 11 the Free Software Foundation; either version 3 of the License, or
d21356d8 12 (at your option) any later version.
252b5132 13
d21356d8
NC
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
252b5132 18
d21356d8
NC
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
cd123cb7
NC
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 MA 02110-1301, USA. */
252b5132 23
252b5132 24#include "sysdep.h"
3db64b00 25#include "bfd.h"
252b5132 26#include "libbfd.h"
252b5132 27#include "coff/arm.h"
252b5132
RH
28#include "coff/internal.h"
29
30#ifdef COFF_WITH_PE
31#include "coff/pe.h"
32#endif
33
34#include "libcoff.h"
35
36/* Macros for manipulation the bits in the flags field of the coff data
37 structure. */
dc810e39
AM
38#define APCS_26_FLAG(abfd) \
39 (coff_data (abfd)->flags & F_APCS_26)
40
41#define APCS_FLOAT_FLAG(abfd) \
42 (coff_data (abfd)->flags & F_APCS_FLOAT)
43
44#define PIC_FLAG(abfd) \
45 (coff_data (abfd)->flags & F_PIC)
46
47#define APCS_SET(abfd) \
48 (coff_data (abfd)->flags & F_APCS_SET)
49
50#define SET_APCS_FLAGS(abfd, flgs) \
51 do \
52 { \
53 coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \
54 coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \
55 } \
56 while (0)
57
58#define INTERWORK_FLAG(abfd) \
59 (coff_data (abfd)->flags & F_INTERWORK)
60
61#define INTERWORK_SET(abfd) \
62 (coff_data (abfd)->flags & F_INTERWORK_SET)
63
64#define SET_INTERWORK_FLAG(abfd, flg) \
65 do \
66 { \
67 coff_data (abfd)->flags &= ~F_INTERWORK; \
68 coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \
69 } \
70 while (0)
af74ae99
NC
71
72#ifndef NUM_ELEM
73#define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0]))
74#endif
d70910e8 75
252b5132 76typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype;
c8e7bf0d 77/* Some typedefs for holding instructions. */
252b5132
RH
78typedef unsigned long int insn32;
79typedef unsigned short int insn16;
80
252b5132
RH
81/* The linker script knows the section names for placement.
82 The entry_names are used to do simple name mangling on the stubs.
83 Given a function name, and its type, the stub can be found. The
917583ad 84 name can be changed. The only requirement is the %s be present. */
d70910e8 85
252b5132
RH
86#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
87#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
88
89#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
90#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
91
d70910e8 92/* Used by the assembler. */
917583ad 93
252b5132 94static bfd_reloc_status_type
c8e7bf0d
NC
95coff_arm_reloc (bfd *abfd,
96 arelent *reloc_entry,
97 asymbol *symbol ATTRIBUTE_UNUSED,
98 void * data,
99 asection *input_section ATTRIBUTE_UNUSED,
100 bfd *output_bfd,
101 char **error_message ATTRIBUTE_UNUSED)
252b5132
RH
102{
103 symvalue diff;
c8e7bf0d
NC
104
105 if (output_bfd == NULL)
252b5132
RH
106 return bfd_reloc_continue;
107
108 diff = reloc_entry->addend;
109
dc810e39
AM
110#define DOIT(x) \
111 x = ((x & ~howto->dst_mask) \
112 | (((x & howto->src_mask) + diff) & howto->dst_mask))
252b5132
RH
113
114 if (diff != 0)
115 {
116 reloc_howto_type *howto = reloc_entry->howto;
117 unsigned char *addr = (unsigned char *) data + reloc_entry->address;
118
119 switch (howto->size)
120 {
121 case 0:
122 {
123 char x = bfd_get_8 (abfd, addr);
124 DOIT (x);
125 bfd_put_8 (abfd, x, addr);
126 }
127 break;
128
129 case 1:
130 {
131 short x = bfd_get_16 (abfd, addr);
132 DOIT (x);
dc810e39 133 bfd_put_16 (abfd, (bfd_vma) x, addr);
252b5132
RH
134 }
135 break;
136
137 case 2:
138 {
139 long x = bfd_get_32 (abfd, addr);
140 DOIT (x);
dc810e39 141 bfd_put_32 (abfd, (bfd_vma) x, addr);
252b5132
RH
142 }
143 break;
144
145 default:
146 abort ();
147 }
148 }
149
150 /* Now let bfd_perform_relocation finish everything up. */
151 return bfd_reloc_continue;
152}
153
154/* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name()
155 in this file), then TARGET_UNDERSCORE should be defined, otherwise it
156 should not. */
157#ifndef TARGET_UNDERSCORE
158#define TARGET_UNDERSCORE '_'
159#endif
160
161#ifndef PCRELOFFSET
b34976b6 162#define PCRELOFFSET TRUE
252b5132
RH
163#endif
164
165/* These most certainly belong somewhere else. Just had to get rid of
17505c5c 166 the manifest constants in the code. */
7148cc28
NC
167
168#ifdef ARM_WINCE
169
170#define ARM_26D 0
171#define ARM_32 1
172#define ARM_RVA32 2
173#define ARM_26 3
174#define ARM_THUMB12 4
175#define ARM_SECTION 14
176#define ARM_SECREL 15
177
178#else
179
252b5132
RH
180#define ARM_8 0
181#define ARM_16 1
182#define ARM_32 2
183#define ARM_26 3
184#define ARM_DISP8 4
185#define ARM_DISP16 5
186#define ARM_DISP32 6
187#define ARM_26D 7
c8e7bf0d 188/* 8 is unused. */
252b5132
RH
189#define ARM_NEG16 9
190#define ARM_NEG32 10
191#define ARM_RVA32 11
192#define ARM_THUMB9 12
193#define ARM_THUMB12 13
194#define ARM_THUMB23 14
195
17505c5c
NC
196#endif
197
c8e7bf0d
NC
198static bfd_reloc_status_type aoutarm_fix_pcrel_26_done
199 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
200static bfd_reloc_status_type aoutarm_fix_pcrel_26
201 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
c8e7bf0d
NC
202static bfd_reloc_status_type coff_thumb_pcrel_12
203 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
204#ifndef ARM_WINCE
afe94956
NC
205static bfd_reloc_status_type coff_thumb_pcrel_9
206 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
c8e7bf0d
NC
207static bfd_reloc_status_type coff_thumb_pcrel_23
208 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
209#endif
210
d70910e8 211static reloc_howto_type aoutarm_std_reloc_howto[] =
917583ad 212 {
17505c5c 213#ifdef ARM_WINCE
d3793eaa
NC
214 HOWTO (ARM_26D,
215 2,
216 2,
217 24,
44e88952 218 TRUE,
d3793eaa
NC
219 0,
220 complain_overflow_dont,
221 aoutarm_fix_pcrel_26_done,
222 "ARM_26D",
53baae48 223 TRUE, /* partial_inplace. */
d3793eaa
NC
224 0x00ffffff,
225 0x0,
44e88952 226 PCRELOFFSET),
917583ad
NC
227 HOWTO (ARM_32,
228 0,
229 2,
230 32,
b34976b6 231 FALSE,
917583ad
NC
232 0,
233 complain_overflow_bitfield,
234 coff_arm_reloc,
235 "ARM_32",
53baae48 236 TRUE, /* partial_inplace. */
917583ad
NC
237 0xffffffff,
238 0xffffffff,
239 PCRELOFFSET),
240 HOWTO (ARM_RVA32,
241 0,
242 2,
243 32,
b34976b6 244 FALSE,
917583ad
NC
245 0,
246 complain_overflow_bitfield,
247 coff_arm_reloc,
248 "ARM_RVA32",
53baae48 249 TRUE, /* partial_inplace. */
917583ad
NC
250 0xffffffff,
251 0xffffffff,
252 PCRELOFFSET),
253 HOWTO (ARM_26,
254 2,
255 2,
256 24,
b34976b6 257 TRUE,
917583ad
NC
258 0,
259 complain_overflow_signed,
260 aoutarm_fix_pcrel_26 ,
261 "ARM_26",
b34976b6 262 FALSE,
917583ad
NC
263 0x00ffffff,
264 0x00ffffff,
265 PCRELOFFSET),
266 HOWTO (ARM_THUMB12,
267 1,
268 1,
269 11,
b34976b6 270 TRUE,
917583ad
NC
271 0,
272 complain_overflow_signed,
273 coff_thumb_pcrel_12 ,
274 "ARM_THUMB12",
b34976b6 275 FALSE,
917583ad
NC
276 0x000007ff,
277 0x000007ff,
278 PCRELOFFSET),
d3793eaa 279 EMPTY_HOWTO (-1),
917583ad
NC
280 EMPTY_HOWTO (-1),
281 EMPTY_HOWTO (-1),
282 EMPTY_HOWTO (-1),
283 EMPTY_HOWTO (-1),
284 EMPTY_HOWTO (-1),
285 EMPTY_HOWTO (-1),
286 EMPTY_HOWTO (-1),
287 EMPTY_HOWTO (-1),
288 HOWTO (ARM_SECTION,
289 0,
290 1,
291 16,
b34976b6 292 FALSE,
917583ad
NC
293 0,
294 complain_overflow_bitfield,
295 coff_arm_reloc,
d3793eaa 296 "ARM_SECTION",
53baae48 297 TRUE, /* partial_inplace. */
917583ad
NC
298 0x0000ffff,
299 0x0000ffff,
300 PCRELOFFSET),
301 HOWTO (ARM_SECREL,
302 0,
303 2,
304 32,
b34976b6 305 FALSE,
917583ad
NC
306 0,
307 complain_overflow_bitfield,
308 coff_arm_reloc,
d3793eaa 309 "ARM_SECREL",
53baae48 310 TRUE, /* partial_inplace. */
917583ad
NC
311 0xffffffff,
312 0xffffffff,
313 PCRELOFFSET),
17505c5c 314#else /* not ARM_WINCE */
c8e7bf0d
NC
315 HOWTO (ARM_8,
316 0,
317 0,
318 8,
319 FALSE,
320 0,
321 complain_overflow_bitfield,
322 coff_arm_reloc,
323 "ARM_8",
324 TRUE,
325 0x000000ff,
326 0x000000ff,
327 PCRELOFFSET),
917583ad
NC
328 HOWTO (ARM_16,
329 0,
330 1,
331 16,
b34976b6 332 FALSE,
917583ad
NC
333 0,
334 complain_overflow_bitfield,
335 coff_arm_reloc,
336 "ARM_16",
b34976b6 337 TRUE,
917583ad
NC
338 0x0000ffff,
339 0x0000ffff,
340 PCRELOFFSET),
341 HOWTO (ARM_32,
342 0,
343 2,
344 32,
b34976b6 345 FALSE,
917583ad
NC
346 0,
347 complain_overflow_bitfield,
348 coff_arm_reloc,
349 "ARM_32",
b34976b6 350 TRUE,
917583ad
NC
351 0xffffffff,
352 0xffffffff,
353 PCRELOFFSET),
354 HOWTO (ARM_26,
355 2,
356 2,
357 24,
b34976b6 358 TRUE,
917583ad
NC
359 0,
360 complain_overflow_signed,
361 aoutarm_fix_pcrel_26 ,
362 "ARM_26",
b34976b6 363 FALSE,
917583ad
NC
364 0x00ffffff,
365 0x00ffffff,
366 PCRELOFFSET),
367 HOWTO (ARM_DISP8,
368 0,
369 0,
370 8,
b34976b6 371 TRUE,
917583ad
NC
372 0,
373 complain_overflow_signed,
374 coff_arm_reloc,
375 "ARM_DISP8",
b34976b6 376 TRUE,
917583ad
NC
377 0x000000ff,
378 0x000000ff,
b34976b6 379 TRUE),
917583ad
NC
380 HOWTO (ARM_DISP16,
381 0,
382 1,
383 16,
b34976b6 384 TRUE,
917583ad
NC
385 0,
386 complain_overflow_signed,
387 coff_arm_reloc,
388 "ARM_DISP16",
b34976b6 389 TRUE,
917583ad
NC
390 0x0000ffff,
391 0x0000ffff,
b34976b6 392 TRUE),
917583ad
NC
393 HOWTO (ARM_DISP32,
394 0,
395 2,
396 32,
b34976b6 397 TRUE,
917583ad
NC
398 0,
399 complain_overflow_signed,
400 coff_arm_reloc,
401 "ARM_DISP32",
b34976b6 402 TRUE,
917583ad
NC
403 0xffffffff,
404 0xffffffff,
b34976b6 405 TRUE),
917583ad
NC
406 HOWTO (ARM_26D,
407 2,
408 2,
409 24,
b34976b6 410 FALSE,
917583ad
NC
411 0,
412 complain_overflow_dont,
413 aoutarm_fix_pcrel_26_done,
414 "ARM_26D",
b34976b6 415 TRUE,
917583ad
NC
416 0x00ffffff,
417 0x0,
b34976b6 418 FALSE),
917583ad
NC
419 /* 8 is unused */
420 EMPTY_HOWTO (-1),
421 HOWTO (ARM_NEG16,
422 0,
423 -1,
424 16,
b34976b6 425 FALSE,
917583ad
NC
426 0,
427 complain_overflow_bitfield,
428 coff_arm_reloc,
429 "ARM_NEG16",
b34976b6 430 TRUE,
917583ad
NC
431 0x0000ffff,
432 0x0000ffff,
b34976b6 433 FALSE),
917583ad
NC
434 HOWTO (ARM_NEG32,
435 0,
436 -2,
437 32,
b34976b6 438 FALSE,
917583ad
NC
439 0,
440 complain_overflow_bitfield,
441 coff_arm_reloc,
442 "ARM_NEG32",
b34976b6 443 TRUE,
917583ad
NC
444 0xffffffff,
445 0xffffffff,
b34976b6 446 FALSE),
917583ad
NC
447 HOWTO (ARM_RVA32,
448 0,
449 2,
450 32,
b34976b6 451 FALSE,
917583ad
NC
452 0,
453 complain_overflow_bitfield,
454 coff_arm_reloc,
455 "ARM_RVA32",
b34976b6 456 TRUE,
917583ad
NC
457 0xffffffff,
458 0xffffffff,
459 PCRELOFFSET),
460 HOWTO (ARM_THUMB9,
461 1,
462 1,
463 8,
b34976b6 464 TRUE,
917583ad
NC
465 0,
466 complain_overflow_signed,
467 coff_thumb_pcrel_9 ,
468 "ARM_THUMB9",
b34976b6 469 FALSE,
917583ad
NC
470 0x000000ff,
471 0x000000ff,
472 PCRELOFFSET),
473 HOWTO (ARM_THUMB12,
474 1,
475 1,
476 11,
b34976b6 477 TRUE,
917583ad
NC
478 0,
479 complain_overflow_signed,
480 coff_thumb_pcrel_12 ,
481 "ARM_THUMB12",
b34976b6 482 FALSE,
917583ad
NC
483 0x000007ff,
484 0x000007ff,
485 PCRELOFFSET),
486 HOWTO (ARM_THUMB23,
487 1,
488 2,
489 22,
b34976b6 490 TRUE,
917583ad
NC
491 0,
492 complain_overflow_signed,
493 coff_thumb_pcrel_23 ,
494 "ARM_THUMB23",
b34976b6 495 FALSE,
917583ad
NC
496 0x07ff07ff,
497 0x07ff07ff,
498 PCRELOFFSET)
17505c5c 499#endif /* not ARM_WINCE */
917583ad 500 };
252b5132 501
af74ae99
NC
502#define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto)
503
252b5132 504#ifdef COFF_WITH_PE
b34976b6 505/* Return TRUE if this relocation should
d70910e8 506 appear in the output .reloc section. */
252b5132 507
b34976b6 508static bfd_boolean
c8e7bf0d
NC
509in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
510 reloc_howto_type * howto)
252b5132
RH
511{
512 return !howto->pc_relative && howto->type != ARM_RVA32;
d70910e8 513}
252b5132
RH
514#endif
515
af74ae99
NC
516#define RTYPE2HOWTO(cache_ptr, dst) \
517 (cache_ptr)->howto = \
518 (dst)->r_type < NUM_RELOCS \
519 ? aoutarm_std_reloc_howto + (dst)->r_type \
520 : NULL
252b5132
RH
521
522#define coff_rtype_to_howto coff_arm_rtype_to_howto
523
524static reloc_howto_type *
c8e7bf0d
NC
525coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
526 asection *sec,
527 struct internal_reloc *rel,
528 struct coff_link_hash_entry *h ATTRIBUTE_UNUSED,
529 struct internal_syment *sym ATTRIBUTE_UNUSED,
530 bfd_vma *addendp)
252b5132 531{
af74ae99 532 reloc_howto_type * howto;
252b5132 533
af74ae99
NC
534 if (rel->r_type >= NUM_RELOCS)
535 return NULL;
d70910e8 536
252b5132
RH
537 howto = aoutarm_std_reloc_howto + rel->r_type;
538
539 if (rel->r_type == ARM_RVA32)
17505c5c 540 *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;
252b5132 541
0be038d6 542#if defined COFF_WITH_PE && defined ARM_WINCE
f0927246
NC
543 if (rel->r_type == ARM_SECREL)
544 {
545 bfd_vma osect_vma;
546
547 if (h && (h->type == bfd_link_hash_defined
548 || h->type == bfd_link_hash_defweak))
549 osect_vma = h->root.u.def.section->output_section->vma;
550 else
551 {
552 asection *sec;
553 int i;
554
555 /* Sigh, the only way to get the section to offset against
556 is to find it the hard way. */
557
558 for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++)
559 sec = sec->next;
560
561 osect_vma = sec->output_section->vma;
562 }
563
564 *addendp -= osect_vma;
565 }
566#endif
567
252b5132 568 return howto;
252b5132 569}
917583ad 570
d70910e8 571/* Used by the assembler. */
252b5132
RH
572
573static bfd_reloc_status_type
c8e7bf0d
NC
574aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED,
575 arelent *reloc_entry ATTRIBUTE_UNUSED,
576 asymbol *symbol ATTRIBUTE_UNUSED,
577 void * data ATTRIBUTE_UNUSED,
578 asection *input_section ATTRIBUTE_UNUSED,
579 bfd *output_bfd ATTRIBUTE_UNUSED,
580 char **error_message ATTRIBUTE_UNUSED)
252b5132
RH
581{
582 /* This is dead simple at present. */
583 return bfd_reloc_ok;
584}
585
d70910e8 586/* Used by the assembler. */
252b5132
RH
587
588static bfd_reloc_status_type
c8e7bf0d
NC
589aoutarm_fix_pcrel_26 (bfd *abfd,
590 arelent *reloc_entry,
591 asymbol *symbol,
592 void * data,
593 asection *input_section,
594 bfd *output_bfd,
595 char **error_message ATTRIBUTE_UNUSED)
252b5132
RH
596{
597 bfd_vma relocation;
598 bfd_size_type addr = reloc_entry->address;
599 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
600 bfd_reloc_status_type flag = bfd_reloc_ok;
d70910e8 601
917583ad 602 /* If this is an undefined symbol, return error. */
252b5132
RH
603 if (symbol->section == &bfd_und_section
604 && (symbol->flags & BSF_WEAK) == 0)
605 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
606
607 /* If the sections are different, and we are doing a partial relocation,
608 just ignore it for now. */
609 if (symbol->section->name != input_section->name
610 && output_bfd != (bfd *)NULL)
611 return bfd_reloc_continue;
612
613 relocation = (target & 0x00ffffff) << 2;
917583ad 614 relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */
252b5132
RH
615 relocation += symbol->value;
616 relocation += symbol->section->output_section->vma;
617 relocation += symbol->section->output_offset;
618 relocation += reloc_entry->addend;
619 relocation -= input_section->output_section->vma;
620 relocation -= input_section->output_offset;
621 relocation -= addr;
d70910e8 622
252b5132
RH
623 if (relocation & 3)
624 return bfd_reloc_overflow;
625
917583ad 626 /* Check for overflow. */
252b5132
RH
627 if (relocation & 0x02000000)
628 {
629 if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff)
630 flag = bfd_reloc_overflow;
631 }
dc810e39 632 else if (relocation & ~(bfd_vma) 0x03ffffff)
252b5132
RH
633 flag = bfd_reloc_overflow;
634
635 target &= ~0x00ffffff;
636 target |= (relocation >> 2) & 0x00ffffff;
dc810e39 637 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
252b5132
RH
638
639 /* Now the ARM magic... Change the reloc type so that it is marked as done.
640 Strictly this is only necessary if we are doing a partial relocation. */
641 reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D];
642
643 return flag;
644}
645
646static bfd_reloc_status_type
c8e7bf0d
NC
647coff_thumb_pcrel_common (bfd *abfd,
648 arelent *reloc_entry,
649 asymbol *symbol,
650 void * data,
651 asection *input_section,
652 bfd *output_bfd,
653 char **error_message ATTRIBUTE_UNUSED,
654 thumb_pcrel_branchtype btype)
252b5132
RH
655{
656 bfd_vma relocation = 0;
657 bfd_size_type addr = reloc_entry->address;
658 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
659 bfd_reloc_status_type flag = bfd_reloc_ok;
660 bfd_vma dstmsk;
661 bfd_vma offmsk;
662 bfd_vma signbit;
663
664 /* NOTE: This routine is currently used by GAS, but not by the link
665 phase. */
252b5132
RH
666 switch (btype)
667 {
668 case b9:
669 dstmsk = 0x000000ff;
670 offmsk = 0x000001fe;
671 signbit = 0x00000100;
672 break;
673
674 case b12:
675 dstmsk = 0x000007ff;
676 offmsk = 0x00000ffe;
677 signbit = 0x00000800;
678 break;
679
680 case b23:
681 dstmsk = 0x07ff07ff;
682 offmsk = 0x007fffff;
683 signbit = 0x00400000;
684 break;
685
686 default:
687 abort ();
688 }
d70910e8 689
917583ad 690 /* If this is an undefined symbol, return error. */
252b5132
RH
691 if (symbol->section == &bfd_und_section
692 && (symbol->flags & BSF_WEAK) == 0)
693 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
694
695 /* If the sections are different, and we are doing a partial relocation,
696 just ignore it for now. */
697 if (symbol->section->name != input_section->name
698 && output_bfd != (bfd *)NULL)
699 return bfd_reloc_continue;
700
701 switch (btype)
702 {
703 case b9:
704 case b12:
705 relocation = ((target & dstmsk) << 1);
706 break;
707
708 case b23:
709 if (bfd_big_endian (abfd))
710 relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4);
711 else
712 relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15);
713 break;
714
715 default:
716 abort ();
717 }
718
917583ad 719 relocation = (relocation ^ signbit) - signbit; /* Sign extend. */
252b5132
RH
720 relocation += symbol->value;
721 relocation += symbol->section->output_section->vma;
722 relocation += symbol->section->output_offset;
723 relocation += reloc_entry->addend;
724 relocation -= input_section->output_section->vma;
725 relocation -= input_section->output_offset;
726 relocation -= addr;
727
728 if (relocation & 1)
729 return bfd_reloc_overflow;
730
917583ad 731 /* Check for overflow. */
252b5132
RH
732 if (relocation & signbit)
733 {
734 if ((relocation & ~offmsk) != ~offmsk)
735 flag = bfd_reloc_overflow;
736 }
737 else if (relocation & ~offmsk)
738 flag = bfd_reloc_overflow;
739
740 target &= ~dstmsk;
741 switch (btype)
742 {
743 case b9:
744 case b12:
745 target |= (relocation >> 1);
746 break;
747
748 case b23:
749 if (bfd_big_endian (abfd))
dc810e39
AM
750 target |= (((relocation & 0xfff) >> 1)
751 | ((relocation << 4) & 0x07ff0000));
252b5132 752 else
dc810e39
AM
753 target |= (((relocation & 0xffe) << 15)
754 | ((relocation >> 12) & 0x7ff));
252b5132
RH
755 break;
756
757 default:
758 abort ();
759 }
760
dc810e39 761 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
252b5132
RH
762
763 /* Now the ARM magic... Change the reloc type so that it is marked as done.
764 Strictly this is only necessary if we are doing a partial relocation. */
765 reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D];
d70910e8 766
917583ad 767 /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */
252b5132
RH
768 return flag;
769}
770
7831a775 771#ifndef ARM_WINCE
252b5132 772static bfd_reloc_status_type
c8e7bf0d
NC
773coff_thumb_pcrel_23 (bfd *abfd,
774 arelent *reloc_entry,
775 asymbol *symbol,
776 void * data,
777 asection *input_section,
778 bfd *output_bfd,
779 char **error_message)
252b5132
RH
780{
781 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
dc810e39
AM
782 input_section, output_bfd, error_message,
783 b23);
252b5132
RH
784}
785
786static bfd_reloc_status_type
c8e7bf0d
NC
787coff_thumb_pcrel_9 (bfd *abfd,
788 arelent *reloc_entry,
789 asymbol *symbol,
790 void * data,
791 asection *input_section,
792 bfd *output_bfd,
793 char **error_message)
252b5132
RH
794{
795 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
dc810e39 796 input_section, output_bfd, error_message,
7831a775 797 b9);
252b5132 798}
7831a775 799#endif /* not ARM_WINCE */
252b5132
RH
800
801static bfd_reloc_status_type
c8e7bf0d
NC
802coff_thumb_pcrel_12 (bfd *abfd,
803 arelent *reloc_entry,
804 asymbol *symbol,
805 void * data,
806 asection *input_section,
807 bfd *output_bfd,
808 char **error_message)
252b5132
RH
809{
810 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
dc810e39 811 input_section, output_bfd, error_message,
7831a775 812 b12);
252b5132
RH
813}
814
dc810e39 815static const struct reloc_howto_struct *
c8e7bf0d 816coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
252b5132 817{
af74ae99 818#define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j
d70910e8 819
252b5132
RH
820 if (code == BFD_RELOC_CTOR)
821 switch (bfd_get_arch_info (abfd)->bits_per_address)
822 {
823 case 32:
824 code = BFD_RELOC_32;
825 break;
917583ad 826 default:
c8e7bf0d 827 return NULL;
252b5132
RH
828 }
829
830 switch (code)
831 {
17505c5c
NC
832#ifdef ARM_WINCE
833 ASTD (BFD_RELOC_32, ARM_32);
834 ASTD (BFD_RELOC_RVA, ARM_RVA32);
835 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
836 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
f0927246 837 ASTD (BFD_RELOC_32_SECREL, ARM_SECREL);
17505c5c 838#else
252b5132
RH
839 ASTD (BFD_RELOC_8, ARM_8);
840 ASTD (BFD_RELOC_16, ARM_16);
841 ASTD (BFD_RELOC_32, ARM_32);
842 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
077b8428 843 ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26);
252b5132
RH
844 ASTD (BFD_RELOC_8_PCREL, ARM_DISP8);
845 ASTD (BFD_RELOC_16_PCREL, ARM_DISP16);
846 ASTD (BFD_RELOC_32_PCREL, ARM_DISP32);
847 ASTD (BFD_RELOC_RVA, ARM_RVA32);
848 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9);
849 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
850 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23);
f8f3c6cc 851 ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23);
d70910e8 852#endif
c8e7bf0d 853 default: return NULL;
252b5132
RH
854 }
855}
856
157090f7
AM
857static reloc_howto_type *
858coff_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
859 const char *r_name)
860{
861 unsigned int i;
862
863 for (i = 0;
864 i < (sizeof (aoutarm_std_reloc_howto)
865 / sizeof (aoutarm_std_reloc_howto[0]));
866 i++)
867 if (aoutarm_std_reloc_howto[i].name != NULL
868 && strcasecmp (aoutarm_std_reloc_howto[i].name, r_name) == 0)
869 return &aoutarm_std_reloc_howto[i];
870
871 return NULL;
872}
873
c8e7bf0d
NC
874#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2
875#define COFF_PAGE_SIZE 0x1000
252b5132 876
c8e7bf0d 877/* Turn a howto into a reloc nunmber. */
252b5132 878#define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
c8e7bf0d
NC
879#define BADMAG(x) ARMBADMAG(x)
880#define ARM 1 /* Customize coffcode.h. */
252b5132 881
7831a775 882#ifndef ARM_WINCE
2106126f 883/* Make sure that the 'r_offset' field is copied properly
830629ab 884 so that identical binaries will compare the same. */
2106126f
NC
885#define SWAP_IN_RELOC_OFFSET H_GET_32
886#define SWAP_OUT_RELOC_OFFSET H_PUT_32
7831a775 887#endif
2106126f 888
252b5132
RH
889/* Extend the coff_link_hash_table structure with a few ARM specific fields.
890 This allows us to store global data here without actually creating any
891 global variables, which is a no-no in the BFD world. */
892struct coff_arm_link_hash_table
917583ad
NC
893 {
894 /* The original coff_link_hash_table structure. MUST be first field. */
895 struct coff_link_hash_table root;
d70910e8 896
5c4491d3 897 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
dc810e39 898 bfd_size_type thumb_glue_size;
d70910e8 899
5c4491d3 900 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
dc810e39 901 bfd_size_type arm_glue_size;
252b5132 902
5c4491d3 903 /* An arbitrary input BFD chosen to hold the glue sections. */
917583ad 904 bfd * bfd_of_glue_owner;
252b5132 905
917583ad
NC
906 /* Support interworking with old, non-interworking aware ARM code. */
907 int support_old_code;
252b5132
RH
908};
909
910/* Get the ARM coff linker hash table from a link_info structure. */
911#define coff_arm_hash_table(info) \
912 ((struct coff_arm_link_hash_table *) ((info)->hash))
913
914/* Create an ARM coff linker hash table. */
915
916static struct bfd_link_hash_table *
c8e7bf0d 917coff_arm_link_hash_table_create (bfd * abfd)
252b5132
RH
918{
919 struct coff_arm_link_hash_table * ret;
dc810e39 920 bfd_size_type amt = sizeof (struct coff_arm_link_hash_table);
252b5132 921
c8e7bf0d
NC
922 ret = bfd_malloc (amt);
923 if (ret == NULL)
252b5132
RH
924 return NULL;
925
66eb6687
AM
926 if (!_bfd_coff_link_hash_table_init (&ret->root,
927 abfd,
928 _bfd_coff_link_hash_newfunc,
929 sizeof (struct coff_link_hash_entry)))
252b5132 930 {
e2d34d7d 931 free (ret);
c8e7bf0d 932 return NULL;
252b5132
RH
933 }
934
935 ret->thumb_glue_size = 0;
936 ret->arm_glue_size = 0;
937 ret->bfd_of_glue_owner = NULL;
938
939 return & ret->root.root;
940}
941
271025eb 942static void
c8e7bf0d
NC
943arm_emit_base_file_entry (struct bfd_link_info *info,
944 bfd *output_bfd,
945 asection *input_section,
946 bfd_vma reloc_offset)
252b5132
RH
947{
948 bfd_vma addr = reloc_offset
949 - input_section->vma
950 + input_section->output_offset
951 + input_section->output_section->vma;
952
917583ad
NC
953 if (coff_data (output_bfd)->pe)
954 addr -= pe_data (output_bfd)->pe_opthdr.ImageBase;
955 fwrite (& addr, 1, sizeof (addr), (FILE *) info->base_file);
252b5132
RH
956
957}
958\f
7831a775 959#ifndef ARM_WINCE
252b5132
RH
960/* The thumb form of a long branch is a bit finicky, because the offset
961 encoding is split over two fields, each in it's own instruction. They
d70910e8 962 can occur in any order. So given a thumb form of long branch, and an
252b5132 963 offset, insert the offset into the thumb branch and return finished
d70910e8 964 instruction.
252b5132 965
d70910e8 966 It takes two thumb instructions to encode the target address. Each has
5c4491d3 967 11 bits to invest. The upper 11 bits are stored in one (identified by
d70910e8
KH
968 H-0.. see below), the lower 11 bits are stored in the other (identified
969 by H-1).
252b5132 970
d70910e8 971 Combine together and shifted left by 1 (it's a half word address) and
252b5132
RH
972 there you have it.
973
974 Op: 1111 = F,
975 H-0, upper address-0 = 000
976 Op: 1111 = F,
977 H-1, lower address-0 = 800
978
d70910e8 979 They can be ordered either way, but the arm tools I've seen always put
252b5132
RH
980 the lower one first. It probably doesn't matter. krk@cygnus.com
981
982 XXX: Actually the order does matter. The second instruction (H-1)
983 moves the computed address into the PC, so it must be the second one
984 in the sequence. The problem, however is that whilst little endian code
985 stores the instructions in HI then LOW order, big endian code does the
917583ad 986 reverse. nickc@cygnus.com. */
252b5132
RH
987
988#define LOW_HI_ORDER 0xF800F000
989#define HI_LOW_ORDER 0xF000F800
990
991static insn32
c8e7bf0d 992insert_thumb_branch (insn32 br_insn, int rel_off)
252b5132
RH
993{
994 unsigned int low_bits;
995 unsigned int high_bits;
996
c8e7bf0d 997 BFD_ASSERT ((rel_off & 1) != 1);
252b5132 998
c8e7bf0d
NC
999 rel_off >>= 1; /* Half word aligned address. */
1000 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
1001 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
252b5132
RH
1002
1003 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
1004 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
1005 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
1006 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
1007 else
dc810e39
AM
1008 /* FIXME: the BFD library should never abort except for internal errors
1009 - it should return an error status. */
917583ad 1010 abort (); /* Error - not a valid branch instruction form. */
252b5132
RH
1011
1012 return br_insn;
1013}
7831a775 1014
252b5132
RH
1015\f
1016static struct coff_link_hash_entry *
c8e7bf0d
NC
1017find_thumb_glue (struct bfd_link_info *info,
1018 const char *name,
1019 bfd *input_bfd)
252b5132 1020{
dc810e39
AM
1021 char *tmp_name;
1022 struct coff_link_hash_entry *myh;
1023 bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
252b5132 1024
c8e7bf0d 1025 tmp_name = bfd_malloc (amt);
252b5132
RH
1026
1027 BFD_ASSERT (tmp_name);
1028
1029 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
d70910e8 1030
252b5132 1031 myh = coff_link_hash_lookup
b34976b6 1032 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
d70910e8 1033
252b5132
RH
1034 if (myh == NULL)
1035 /* xgettext:c-format */
d003868e
AM
1036 _bfd_error_handler (_("%B: unable to find THUMB glue '%s' for `%s'"),
1037 input_bfd, tmp_name, name);
d70910e8 1038
252b5132
RH
1039 free (tmp_name);
1040
1041 return myh;
1042}
7831a775 1043#endif /* not ARM_WINCE */
252b5132
RH
1044
1045static struct coff_link_hash_entry *
c8e7bf0d
NC
1046find_arm_glue (struct bfd_link_info *info,
1047 const char *name,
1048 bfd *input_bfd)
252b5132 1049{
dc810e39 1050 char *tmp_name;
252b5132 1051 struct coff_link_hash_entry * myh;
dc810e39 1052 bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
252b5132 1053
c8e7bf0d 1054 tmp_name = bfd_malloc (amt);
252b5132
RH
1055
1056 BFD_ASSERT (tmp_name);
1057
1058 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
d70910e8 1059
252b5132 1060 myh = coff_link_hash_lookup
b34976b6 1061 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
252b5132
RH
1062
1063 if (myh == NULL)
1064 /* xgettext:c-format */
d003868e
AM
1065 _bfd_error_handler (_("%B: unable to find ARM glue '%s' for `%s'"),
1066 input_bfd, tmp_name, name);
d70910e8 1067
252b5132
RH
1068 free (tmp_name);
1069
1070 return myh;
1071}
1072
1073/*
1074 ARM->Thumb glue:
1075
1076 .arm
1077 __func_from_arm:
1078 ldr r12, __func_addr
1079 bx r12
1080 __func_addr:
1081 .word func @ behave as if you saw a ARM_32 reloc
1082*/
1083
1084#define ARM2THUMB_GLUE_SIZE 12
1085static const insn32 a2t1_ldr_insn = 0xe59fc000;
1086static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
1087static const insn32 a2t3_func_addr_insn = 0x00000001;
1088
252b5132
RH
1089/*
1090 Thumb->ARM: Thumb->(non-interworking aware) ARM
1091
1092 .thumb .thumb
1093 .align 2 .align 2
1094 __func_from_thumb: __func_from_thumb:
1095 bx pc push {r6, lr}
1096 nop ldr r6, __func_addr
1097 .arm mov lr, pc
1098 __func_change_to_arm: bx r6
1099 b func .arm
1100 __func_back_to_thumb:
1101 ldmia r13! {r6, lr}
1102 bx lr
1103 __func_addr:
d70910e8 1104 .word func
252b5132
RH
1105*/
1106
1107#define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8)
2dc773a0 1108#ifndef ARM_WINCE
252b5132
RH
1109static const insn16 t2a1_bx_pc_insn = 0x4778;
1110static const insn16 t2a2_noop_insn = 0x46c0;
1111static const insn32 t2a3_b_insn = 0xea000000;
1112
252b5132
RH
1113static const insn16 t2a1_push_insn = 0xb540;
1114static const insn16 t2a2_ldr_insn = 0x4e03;
1115static const insn16 t2a3_mov_insn = 0x46fe;
1116static const insn16 t2a4_bx_insn = 0x4730;
1117static const insn32 t2a5_pop_insn = 0xe8bd4040;
1118static const insn32 t2a6_bx_insn = 0xe12fff1e;
2dc773a0 1119#endif
252b5132
RH
1120
1121/* TODO:
1122 We should really create new local (static) symbols in destination
1123 object for each stub we create. We should also create local
1124 (static) symbols within the stubs when switching between ARM and
1125 Thumb code. This will ensure that the debugger and disassembler
1126 can present a better view of stubs.
1127
1128 We can treat stubs like literal sections, and for the THUMB9 ones
1129 (short addressing range) we should be able to insert the stubs
1130 between sections. i.e. the simplest approach (since relocations
1131 are done on a section basis) is to dump the stubs at the end of
1132 processing a section. That way we can always try and minimise the
1133 offset to and from a stub. However, this does not map well onto
1134 the way that the linker/BFD does its work: mapping all input
1135 sections to output sections via the linker script before doing
1136 all the processing.
1137
1138 Unfortunately it may be easier to just to disallow short range
1139 Thumb->ARM stubs (i.e. no conditional inter-working branches,
1140 only branch-and-link (BL) calls. This will simplify the processing
1141 since we can then put all of the stubs into their own section.
1142
1143 TODO:
1144 On a different subject, rather than complaining when a
1145 branch cannot fit in the number of bits available for the
1146 instruction we should generate a trampoline stub (needed to
1147 address the complete 32bit address space). */
1148
d70910e8 1149/* The standard COFF backend linker does not cope with the special
252b5132
RH
1150 Thumb BRANCH23 relocation. The alternative would be to split the
1151 BRANCH23 into seperate HI23 and LO23 relocations. However, it is a
d70910e8 1152 bit simpler simply providing our own relocation driver. */
252b5132
RH
1153
1154/* The reloc processing routine for the ARM/Thumb COFF linker. NOTE:
1155 This code is a very slightly modified copy of
1156 _bfd_coff_generic_relocate_section. It would be a much more
1157 maintainable solution to have a MACRO that could be expanded within
1158 _bfd_coff_generic_relocate_section that would only be provided for
1159 ARM/Thumb builds. It is only the code marked THUMBEXTENSION that
1160 is different from the original. */
1161
b34976b6 1162static bfd_boolean
c8e7bf0d
NC
1163coff_arm_relocate_section (bfd *output_bfd,
1164 struct bfd_link_info *info,
1165 bfd *input_bfd,
1166 asection *input_section,
1167 bfd_byte *contents,
1168 struct internal_reloc *relocs,
1169 struct internal_syment *syms,
1170 asection **sections)
252b5132
RH
1171{
1172 struct internal_reloc * rel;
1173 struct internal_reloc * relend;
2dc773a0 1174#ifndef ARM_WINCE
07515404 1175 bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section);
2dc773a0 1176#endif
252b5132
RH
1177
1178 rel = relocs;
1179 relend = rel + input_section->reloc_count;
1180
1181 for (; rel < relend; rel++)
1182 {
1183 int done = 0;
1184 long symndx;
1185 struct coff_link_hash_entry * h;
1186 struct internal_syment * sym;
1187 bfd_vma addend;
1188 bfd_vma val;
1189 reloc_howto_type * howto;
1190 bfd_reloc_status_type rstat;
1191 bfd_vma h_val;
1192
1193 symndx = rel->r_symndx;
1194
1195 if (symndx == -1)
1196 {
1197 h = NULL;
1198 sym = NULL;
1199 }
1200 else
d70910e8 1201 {
252b5132
RH
1202 h = obj_coff_sym_hashes (input_bfd)[symndx];
1203 sym = syms + symndx;
1204 }
1205
1206 /* COFF treats common symbols in one of two ways. Either the
1207 size of the symbol is included in the section contents, or it
1208 is not. We assume that the size is not included, and force
1209 the rtype_to_howto function to adjust the addend as needed. */
1210
1211 if (sym != NULL && sym->n_scnum != 0)
1212 addend = - sym->n_value;
1213 else
1214 addend = 0;
1215
252b5132
RH
1216 howto = coff_rtype_to_howto (input_bfd, input_section, rel, h,
1217 sym, &addend);
1218 if (howto == NULL)
b34976b6 1219 return FALSE;
252b5132
RH
1220
1221 /* The relocation_section function will skip pcrel_offset relocs
1049f94e 1222 when doing a relocatable link. However, we want to convert
d21356d8 1223 ARM_26 to ARM_26D relocs if possible. We return a fake howto in
252b5132 1224 this case without pcrel_offset set, and adjust the addend to
44e88952
NC
1225 compensate. 'partial_inplace' is also set, since we want 'done'
1226 relocations to be reflected in section's data. */
252b5132
RH
1227 if (rel->r_type == ARM_26
1228 && h != NULL
1049f94e 1229 && info->relocatable
252b5132
RH
1230 && (h->root.type == bfd_link_hash_defined
1231 || h->root.type == bfd_link_hash_defweak)
dc810e39
AM
1232 && (h->root.u.def.section->output_section
1233 == input_section->output_section))
252b5132 1234 {
d70910e8 1235 static reloc_howto_type fake_arm26_reloc =
252b5132
RH
1236 HOWTO (ARM_26,
1237 2,
1238 2,
1239 24,
b34976b6 1240 TRUE,
252b5132
RH
1241 0,
1242 complain_overflow_signed,
1243 aoutarm_fix_pcrel_26 ,
1244 "ARM_26",
44e88952 1245 TRUE,
252b5132 1246 0x00ffffff,
d70910e8 1247 0x00ffffff,
b34976b6 1248 FALSE);
252b5132
RH
1249
1250 addend -= rel->r_vaddr - input_section->vma;
44e88952
NC
1251#ifdef ARM_WINCE
1252 /* FIXME: I don't know why, but the hack is necessary for correct
c8e7bf0d 1253 generation of bl's instruction offset. */
44e88952
NC
1254 addend -= 8;
1255#endif
53baae48 1256 howto = & fake_arm26_reloc;
252b5132
RH
1257 }
1258
17505c5c
NC
1259#ifdef ARM_WINCE
1260 /* MS ARM-CE makes the reloc relative to the opcode's pc, not
d70910e8 1261 the next opcode's pc, so is off by one. */
53baae48
NC
1262 if (howto->pc_relative && !info->relocatable)
1263 addend -= 8;
17505c5c 1264#endif
d70910e8 1265
1049f94e 1266 /* If we are doing a relocatable link, then we can just ignore
252b5132 1267 a PC relative reloc that is pcrel_offset. It will already
1049f94e 1268 have the correct value. If this is not a relocatable link,
252b5132
RH
1269 then we should ignore the symbol value. */
1270 if (howto->pc_relative && howto->pcrel_offset)
1271 {
1049f94e 1272 if (info->relocatable)
252b5132 1273 continue;
87748b32
NC
1274 /* FIXME - it is not clear which targets need this next test
1275 and which do not. It is known that it is needed for the
d8adc60f 1276 VxWorks and EPOC-PE targets, but it is also known that it
5c4491d3 1277 was suppressed for other ARM targets. This ought to be
d8adc60f
NC
1278 sorted out one day. */
1279#ifdef ARM_COFF_BUGFIX
87748b32
NC
1280 /* We must not ignore the symbol value. If the symbol is
1281 within the same section, the relocation should have already
1282 been fixed, but if it is not, we'll be handed a reloc into
1283 the beginning of the symbol's section, so we must not cancel
1284 out the symbol's value, otherwise we'll be adding it in
1285 twice. */
252b5132
RH
1286 if (sym != NULL && sym->n_scnum != 0)
1287 addend += sym->n_value;
ed1de528 1288#endif
252b5132
RH
1289 }
1290
1291 val = 0;
1292
1293 if (h == NULL)
1294 {
1295 asection *sec;
1296
1297 if (symndx == -1)
1298 {
1299 sec = bfd_abs_section_ptr;
1300 val = 0;
1301 }
1302 else
1303 {
1304 sec = sections[symndx];
1305 val = (sec->output_section->vma
1306 + sec->output_offset
1307 + sym->n_value
1308 - sec->vma);
1309 }
1310 }
1311 else
1312 {
252b5132
RH
1313 /* We don't output the stubs if we are generating a
1314 relocatable output file, since we may as well leave the
1315 stub generation to the final linker pass. If we fail to
1316 verify that the name is defined, we'll try to build stubs
d70910e8 1317 for an undefined name... */
1049f94e 1318 if (! info->relocatable
252b5132
RH
1319 && ( h->root.type == bfd_link_hash_defined
1320 || h->root.type == bfd_link_hash_defweak))
1321 {
1322 asection * h_sec = h->root.u.def.section;
1323 const char * name = h->root.root.string;
d70910e8 1324
252b5132
RH
1325 /* h locates the symbol referenced in the reloc. */
1326 h_val = (h->root.u.def.value
1327 + h_sec->output_section->vma
1328 + h_sec->output_offset);
1329
1330 if (howto->type == ARM_26)
1331 {
1332 if ( h->class == C_THUMBSTATFUNC
1333 || h->class == C_THUMBEXTFUNC)
1334 {
917583ad 1335 /* Arm code calling a Thumb function. */
252b5132 1336 unsigned long int tmp;
dc810e39 1337 bfd_vma my_offset;
252b5132
RH
1338 asection * s;
1339 long int ret_offset;
d70910e8 1340 struct coff_link_hash_entry * myh;
252b5132 1341 struct coff_arm_link_hash_table * globals;
d70910e8 1342
252b5132
RH
1343 myh = find_arm_glue (info, name, input_bfd);
1344 if (myh == NULL)
b34976b6 1345 return FALSE;
252b5132
RH
1346
1347 globals = coff_arm_hash_table (info);
1348
1349 BFD_ASSERT (globals != NULL);
1350 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
d70910e8 1351
252b5132 1352 my_offset = myh->root.u.def.value;
d70910e8
KH
1353
1354 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
252b5132
RH
1355 ARM2THUMB_GLUE_SECTION_NAME);
1356 BFD_ASSERT (s != NULL);
1357 BFD_ASSERT (s->contents != NULL);
1358 BFD_ASSERT (s->output_section != NULL);
1359
1360 if ((my_offset & 0x01) == 0x01)
1361 {
1362 if (h_sec->owner != NULL
1363 && INTERWORK_SET (h_sec->owner)
1364 && ! INTERWORK_FLAG (h_sec->owner))
d003868e
AM
1365 _bfd_error_handler
1366 /* xgettext:c-format */
1367 (_("%B(%s): warning: interworking not enabled.\n"
1368 " first occurrence: %B: arm call to thumb"),
1369 h_sec->owner, input_bfd, name);
252b5132
RH
1370
1371 --my_offset;
1372 myh->root.u.def.value = my_offset;
1373
dc810e39 1374 bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn,
252b5132 1375 s->contents + my_offset);
d70910e8 1376
dc810e39 1377 bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn,
252b5132 1378 s->contents + my_offset + 4);
d70910e8 1379
252b5132
RH
1380 /* It's a thumb address. Add the low order bit. */
1381 bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn,
1382 s->contents + my_offset + 8);
1383
1384 if (info->base_file)
d70910e8 1385 arm_emit_base_file_entry (info, output_bfd, s,
dc810e39 1386 my_offset + 8);
252b5132
RH
1387
1388 }
1389
1390 BFD_ASSERT (my_offset <= globals->arm_glue_size);
1391
1392 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1393 - input_section->vma);
d70910e8 1394
252b5132
RH
1395 tmp = tmp & 0xFF000000;
1396
d70910e8 1397 /* Somehow these are both 4 too far, so subtract 8. */
252b5132
RH
1398 ret_offset =
1399 s->output_offset
d70910e8 1400 + my_offset
252b5132
RH
1401 + s->output_section->vma
1402 - (input_section->output_offset
d70910e8 1403 + input_section->output_section->vma
252b5132
RH
1404 + rel->r_vaddr)
1405 - 8;
1406
1407 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
d70910e8 1408
dc810e39
AM
1409 bfd_put_32 (output_bfd, (bfd_vma) tmp,
1410 contents + rel->r_vaddr - input_section->vma);
252b5132
RH
1411 done = 1;
1412 }
1413 }
d70910e8 1414
17505c5c 1415#ifndef ARM_WINCE
917583ad 1416 /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */
252b5132
RH
1417 else if (howto->type == ARM_THUMB23)
1418 {
d70910e8 1419 if ( h->class == C_EXT
252b5132
RH
1420 || h->class == C_STAT
1421 || h->class == C_LABEL)
1422 {
c8e7bf0d 1423 /* Thumb code calling an ARM function. */
252b5132 1424 asection * s = 0;
dc810e39 1425 bfd_vma my_offset;
252b5132
RH
1426 unsigned long int tmp;
1427 long int ret_offset;
1428 struct coff_link_hash_entry * myh;
1429 struct coff_arm_link_hash_table * globals;
1430
1431 myh = find_thumb_glue (info, name, input_bfd);
1432 if (myh == NULL)
b34976b6 1433 return FALSE;
252b5132
RH
1434
1435 globals = coff_arm_hash_table (info);
d70910e8 1436
252b5132
RH
1437 BFD_ASSERT (globals != NULL);
1438 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
d70910e8 1439
252b5132 1440 my_offset = myh->root.u.def.value;
d70910e8
KH
1441
1442 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
252b5132 1443 THUMB2ARM_GLUE_SECTION_NAME);
d70910e8 1444
252b5132
RH
1445 BFD_ASSERT (s != NULL);
1446 BFD_ASSERT (s->contents != NULL);
1447 BFD_ASSERT (s->output_section != NULL);
d70910e8 1448
252b5132
RH
1449 if ((my_offset & 0x01) == 0x01)
1450 {
1451 if (h_sec->owner != NULL
1452 && INTERWORK_SET (h_sec->owner)
1453 && ! INTERWORK_FLAG (h_sec->owner)
1454 && ! globals->support_old_code)
d003868e
AM
1455 _bfd_error_handler
1456 /* xgettext:c-format */
1457 (_("%B(%s): warning: interworking not enabled.\n"
1458 " first occurrence: %B: thumb call to arm\n"
1459 " consider relinking with --support-old-code enabled"),
1460 h_sec->owner, input_bfd, name);
d70910e8 1461
252b5132
RH
1462 -- my_offset;
1463 myh->root.u.def.value = my_offset;
1464
1465 if (globals->support_old_code)
1466 {
dc810e39 1467 bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn,
252b5132 1468 s->contents + my_offset);
d70910e8 1469
dc810e39 1470 bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn,
252b5132
RH
1471 s->contents + my_offset + 2);
1472
dc810e39 1473 bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn,
252b5132
RH
1474 s->contents + my_offset + 4);
1475
dc810e39 1476 bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn,
252b5132 1477 s->contents + my_offset + 6);
d70910e8 1478
dc810e39 1479 bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn,
252b5132 1480 s->contents + my_offset + 8);
d70910e8 1481
dc810e39 1482 bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn,
252b5132 1483 s->contents + my_offset + 12);
d70910e8 1484
252b5132
RH
1485 /* Store the address of the function in the last word of the stub. */
1486 bfd_put_32 (output_bfd, h_val,
1487 s->contents + my_offset + 16);
fa0e42e4
CM
1488
1489 if (info->base_file)
dc810e39
AM
1490 arm_emit_base_file_entry (info, output_bfd, s,
1491 my_offset + 16);
252b5132
RH
1492 }
1493 else
1494 {
dc810e39 1495 bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn,
252b5132 1496 s->contents + my_offset);
d70910e8 1497
dc810e39 1498 bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn,
252b5132 1499 s->contents + my_offset + 2);
d70910e8 1500
252b5132 1501 ret_offset =
c8e7bf0d
NC
1502 /* Address of destination of the stub. */
1503 ((bfd_signed_vma) h_val)
252b5132 1504 - ((bfd_signed_vma)
c8e7bf0d
NC
1505 /* Offset from the start of the current section to the start of the stubs. */
1506 (s->output_offset
1507 /* Offset of the start of this stub from the start of the stubs. */
1508 + my_offset
1509 /* Address of the start of the current section. */
1510 + s->output_section->vma)
1511 /* The branch instruction is 4 bytes into the stub. */
1512 + 4
1513 /* ARM branches work from the pc of the instruction + 8. */
1514 + 8);
d70910e8 1515
252b5132 1516 bfd_put_32 (output_bfd,
dc810e39 1517 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
252b5132
RH
1518 s->contents + my_offset + 4);
1519
252b5132
RH
1520 }
1521 }
1522
1523 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
1524
1525 /* Now go back and fix up the original BL insn to point
1526 to here. */
1527 ret_offset =
1528 s->output_offset
1529 + my_offset
1530 - (input_section->output_offset
1531 + rel->r_vaddr)
1532 -4;
d70910e8 1533
252b5132
RH
1534 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1535 - input_section->vma);
1536
1537 bfd_put_32 (output_bfd,
dc810e39
AM
1538 (bfd_vma) insert_thumb_branch (tmp,
1539 ret_offset),
1540 contents + rel->r_vaddr - input_section->vma);
d70910e8 1541
252b5132
RH
1542 done = 1;
1543 }
1544 }
17505c5c 1545#endif
252b5132 1546 }
d70910e8 1547
252b5132
RH
1548 /* If the relocation type and destination symbol does not
1549 fall into one of the above categories, then we can just
d70910e8 1550 perform a direct link. */
252b5132
RH
1551
1552 if (done)
1553 rstat = bfd_reloc_ok;
d70910e8 1554 else
252b5132
RH
1555 if ( h->root.type == bfd_link_hash_defined
1556 || h->root.type == bfd_link_hash_defweak)
1557 {
1558 asection *sec;
1559
1560 sec = h->root.u.def.section;
1561 val = (h->root.u.def.value
1562 + sec->output_section->vma
1563 + sec->output_offset);
1564 }
1565
1049f94e 1566 else if (! info->relocatable)
252b5132
RH
1567 {
1568 if (! ((*info->callbacks->undefined_symbol)
1569 (info, h->root.root.string, input_bfd, input_section,
b34976b6
AM
1570 rel->r_vaddr - input_section->vma, TRUE)))
1571 return FALSE;
252b5132
RH
1572 }
1573 }
1574
1575 if (info->base_file)
1576 {
d70910e8 1577 /* Emit a reloc if the backend thinks it needs it. */
252b5132 1578 if (sym && pe_data(output_bfd)->in_reloc_p(output_bfd, howto))
dc810e39
AM
1579 arm_emit_base_file_entry (info, output_bfd, input_section,
1580 rel->r_vaddr);
252b5132 1581 }
d70910e8 1582
252b5132
RH
1583 if (done)
1584 rstat = bfd_reloc_ok;
17505c5c 1585#ifndef ARM_WINCE
c8e7bf0d 1586 /* Only perform this fix during the final link, not a relocatable link. */
1049f94e 1587 else if (! info->relocatable
252b5132
RH
1588 && howto->type == ARM_THUMB23)
1589 {
1590 /* This is pretty much a copy of what the default
1591 _bfd_final_link_relocate and _bfd_relocate_contents
1592 routines do to perform a relocation, with special
1593 processing for the split addressing of the Thumb BL
1594 instruction. Again, it would probably be simpler adding a
1595 ThumbBRANCH23 specific macro expansion into the default
1596 code. */
d70910e8 1597
252b5132 1598 bfd_vma address = rel->r_vaddr - input_section->vma;
d70910e8 1599
07515404 1600 if (address > high_address)
252b5132
RH
1601 rstat = bfd_reloc_outofrange;
1602 else
1603 {
b34976b6
AM
1604 bfd_vma relocation = val + addend;
1605 int size = bfd_get_reloc_size (howto);
1606 bfd_boolean overflow = FALSE;
1607 bfd_byte *location = contents + address;
1608 bfd_vma x = bfd_get_32 (input_bfd, location);
1609 bfd_vma src_mask = 0x007FFFFE;
1610 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
1611 bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
1612 bfd_vma check;
1613 bfd_signed_vma signed_check;
1614 bfd_vma add;
1615 bfd_signed_vma signed_add;
252b5132
RH
1616
1617 BFD_ASSERT (size == 4);
d70910e8 1618
4f3c3dbb 1619 /* howto->pc_relative should be TRUE for type 14 BRANCH23. */
252b5132
RH
1620 relocation -= (input_section->output_section->vma
1621 + input_section->output_offset);
d70910e8 1622
4f3c3dbb 1623 /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */
252b5132 1624 relocation -= address;
d70910e8
KH
1625
1626 /* No need to negate the relocation with BRANCH23. */
252b5132
RH
1627 /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */
1628 /* howto->rightshift == 1 */
d70910e8 1629
4f3c3dbb 1630 /* Drop unwanted bits from the value we are relocating to. */
252b5132 1631 check = relocation >> howto->rightshift;
d70910e8 1632
252b5132
RH
1633 /* If this is a signed value, the rightshift just dropped
1634 leading 1 bits (assuming twos complement). */
1635 if ((bfd_signed_vma) relocation >= 0)
1636 signed_check = check;
1637 else
1638 signed_check = (check
1639 | ((bfd_vma) - 1
1640 & ~((bfd_vma) - 1 >> howto->rightshift)));
d70910e8 1641
252b5132
RH
1642 /* Get the value from the object file. */
1643 if (bfd_big_endian (input_bfd))
4f3c3dbb 1644 add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1);
252b5132 1645 else
4f3c3dbb 1646 add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15));
252b5132
RH
1647
1648 /* Get the value from the object file with an appropriate sign.
1649 The expression involving howto->src_mask isolates the upper
1650 bit of src_mask. If that bit is set in the value we are
1651 adding, it is negative, and we subtract out that number times
1652 two. If src_mask includes the highest possible bit, then we
1653 can not get the upper bit, but that does not matter since
1654 signed_add needs no adjustment to become negative in that
1655 case. */
252b5132 1656 signed_add = add;
d70910e8 1657
252b5132
RH
1658 if ((add & (((~ src_mask) >> 1) & src_mask)) != 0)
1659 signed_add -= (((~ src_mask) >> 1) & src_mask) << 1;
d70910e8 1660
4f3c3dbb 1661 /* howto->bitpos == 0 */
252b5132
RH
1662 /* Add the value from the object file, shifted so that it is a
1663 straight number. */
252b5132 1664 signed_check += signed_add;
4f3c3dbb 1665 relocation += signed_add;
252b5132
RH
1666
1667 BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed);
1668
1669 /* Assumes two's complement. */
1670 if ( signed_check > reloc_signed_max
1671 || signed_check < reloc_signed_min)
b34976b6 1672 overflow = TRUE;
d70910e8 1673
c62e1cc3
NC
1674 /* Put the relocation into the correct bits.
1675 For a BLX instruction, make sure that the relocation is rounded up
1676 to a word boundary. This follows the semantics of the instruction
1677 which specifies that bit 1 of the target address will come from bit
1678 1 of the base address. */
252b5132 1679 if (bfd_big_endian (input_bfd))
c62e1cc3
NC
1680 {
1681 if ((x & 0x1800) == 0x0800 && (relocation & 0x02))
1682 relocation += 2;
1683 relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
1684 }
252b5132 1685 else
c62e1cc3
NC
1686 {
1687 if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02))
1688 relocation += 2;
1689 relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
1690 }
d70910e8 1691
4f3c3dbb 1692 /* Add the relocation to the correct bits of X. */
252b5132
RH
1693 x = ((x & ~howto->dst_mask) | relocation);
1694
4f3c3dbb 1695 /* Put the relocated value back in the object file. */
252b5132
RH
1696 bfd_put_32 (input_bfd, x, location);
1697
1698 rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok;
1699 }
1700 }
17505c5c 1701#endif
252b5132 1702 else
1e7fef1d
NC
1703 if (info->relocatable && ! howto->partial_inplace)
1704 rstat = bfd_reloc_ok;
1705 else
1706 rstat = _bfd_final_link_relocate (howto, input_bfd, input_section,
1707 contents,
1708 rel->r_vaddr - input_section->vma,
1709 val, addend);
c8e7bf0d 1710 /* Only perform this fix during the final link, not a relocatable link. */
1049f94e 1711 if (! info->relocatable
b44267fd 1712 && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32))
252b5132
RH
1713 {
1714 /* Determine if we need to set the bottom bit of a relocated address
1715 because the address is the address of a Thumb code symbol. */
b34976b6 1716 int patchit = FALSE;
d70910e8 1717
252b5132
RH
1718 if (h != NULL
1719 && ( h->class == C_THUMBSTATFUNC
1720 || h->class == C_THUMBEXTFUNC))
1721 {
b34976b6 1722 patchit = TRUE;
252b5132
RH
1723 }
1724 else if (sym != NULL
1725 && sym->n_scnum > N_UNDEF)
1726 {
1727 /* No hash entry - use the symbol instead. */
252b5132
RH
1728 if ( sym->n_sclass == C_THUMBSTATFUNC
1729 || sym->n_sclass == C_THUMBEXTFUNC)
b34976b6 1730 patchit = TRUE;
252b5132
RH
1731 }
1732
1733 if (patchit)
1734 {
1735 bfd_byte * location = contents + rel->r_vaddr - input_section->vma;
1736 bfd_vma x = bfd_get_32 (input_bfd, location);
1737
1738 bfd_put_32 (input_bfd, x | 1, location);
1739 }
1740 }
d70910e8 1741
252b5132
RH
1742 switch (rstat)
1743 {
1744 default:
1745 abort ();
1746 case bfd_reloc_ok:
1747 break;
1748 case bfd_reloc_outofrange:
1749 (*_bfd_error_handler)
d003868e
AM
1750 (_("%B: bad reloc address 0x%lx in section `%A'"),
1751 input_bfd, input_section, (unsigned long) rel->r_vaddr);
b34976b6 1752 return FALSE;
252b5132
RH
1753 case bfd_reloc_overflow:
1754 {
1755 const char *name;
1756 char buf[SYMNMLEN + 1];
1757
1758 if (symndx == -1)
1759 name = "*ABS*";
1760 else if (h != NULL)
dfeffb9f 1761 name = NULL;
252b5132
RH
1762 else
1763 {
1764 name = _bfd_coff_internal_syment_name (input_bfd, sym, buf);
1765 if (name == NULL)
b34976b6 1766 return FALSE;
252b5132
RH
1767 }
1768
1769 if (! ((*info->callbacks->reloc_overflow)
dfeffb9f
L
1770 (info, (h ? &h->root : NULL), name, howto->name,
1771 (bfd_vma) 0, input_bfd, input_section,
1772 rel->r_vaddr - input_section->vma)))
b34976b6 1773 return FALSE;
252b5132
RH
1774 }
1775 }
1776 }
1777
b34976b6 1778 return TRUE;
252b5132
RH
1779}
1780
e049a0de
ILT
1781#ifndef COFF_IMAGE_WITH_PE
1782
b34976b6 1783bfd_boolean
c8e7bf0d 1784bfd_arm_allocate_interworking_sections (struct bfd_link_info * info)
252b5132
RH
1785{
1786 asection * s;
1787 bfd_byte * foo;
1788 struct coff_arm_link_hash_table * globals;
252b5132
RH
1789
1790 globals = coff_arm_hash_table (info);
d70910e8 1791
252b5132
RH
1792 BFD_ASSERT (globals != NULL);
1793
1794 if (globals->arm_glue_size != 0)
1795 {
1796 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
d70910e8 1797
252b5132
RH
1798 s = bfd_get_section_by_name
1799 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1800
1801 BFD_ASSERT (s != NULL);
d70910e8 1802
c8e7bf0d 1803 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
d70910e8 1804
eea6121a 1805 s->size = globals->arm_glue_size;
252b5132
RH
1806 s->contents = foo;
1807 }
1808
1809 if (globals->thumb_glue_size != 0)
1810 {
1811 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
d70910e8 1812
252b5132
RH
1813 s = bfd_get_section_by_name
1814 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1815
1816 BFD_ASSERT (s != NULL);
d70910e8 1817
c8e7bf0d 1818 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
d70910e8 1819
eea6121a 1820 s->size = globals->thumb_glue_size;
252b5132
RH
1821 s->contents = foo;
1822 }
1823
b34976b6 1824 return TRUE;
252b5132
RH
1825}
1826
1827static void
c8e7bf0d
NC
1828record_arm_to_thumb_glue (struct bfd_link_info * info,
1829 struct coff_link_hash_entry * h)
252b5132
RH
1830{
1831 const char * name = h->root.root.string;
1832 register asection * s;
1833 char * tmp_name;
1834 struct coff_link_hash_entry * myh;
14a793b2 1835 struct bfd_link_hash_entry * bh;
252b5132 1836 struct coff_arm_link_hash_table * globals;
dc810e39
AM
1837 bfd_vma val;
1838 bfd_size_type amt;
252b5132
RH
1839
1840 globals = coff_arm_hash_table (info);
1841
1842 BFD_ASSERT (globals != NULL);
1843 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1844
1845 s = bfd_get_section_by_name
1846 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1847
1848 BFD_ASSERT (s != NULL);
1849
dc810e39 1850 amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
c8e7bf0d 1851 tmp_name = bfd_malloc (amt);
252b5132
RH
1852
1853 BFD_ASSERT (tmp_name);
1854
1855 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
d70910e8 1856
252b5132 1857 myh = coff_link_hash_lookup
b34976b6 1858 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
d70910e8 1859
252b5132
RH
1860 if (myh != NULL)
1861 {
1862 free (tmp_name);
c8e7bf0d
NC
1863 /* We've already seen this guy. */
1864 return;
252b5132
RH
1865 }
1866
1867 /* The only trick here is using globals->arm_glue_size as the value. Even
1868 though the section isn't allocated yet, this is where we will be putting
1869 it. */
14a793b2 1870 bh = NULL;
dc810e39 1871 val = globals->arm_glue_size + 1;
252b5132 1872 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
b34976b6 1873 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
d70910e8 1874
252b5132 1875 free (tmp_name);
d70910e8 1876
252b5132
RH
1877 globals->arm_glue_size += ARM2THUMB_GLUE_SIZE;
1878
1879 return;
1880}
1881
7831a775 1882#ifndef ARM_WINCE
252b5132 1883static void
c8e7bf0d
NC
1884record_thumb_to_arm_glue (struct bfd_link_info * info,
1885 struct coff_link_hash_entry * h)
252b5132
RH
1886{
1887 const char * name = h->root.root.string;
c8e7bf0d 1888 asection * s;
252b5132
RH
1889 char * tmp_name;
1890 struct coff_link_hash_entry * myh;
14a793b2 1891 struct bfd_link_hash_entry * bh;
252b5132 1892 struct coff_arm_link_hash_table * globals;
dc810e39
AM
1893 bfd_vma val;
1894 bfd_size_type amt;
252b5132 1895
252b5132 1896 globals = coff_arm_hash_table (info);
d70910e8 1897
252b5132
RH
1898 BFD_ASSERT (globals != NULL);
1899 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1900
1901 s = bfd_get_section_by_name
1902 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1903
1904 BFD_ASSERT (s != NULL);
1905
dc810e39 1906 amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
c8e7bf0d 1907 tmp_name = bfd_malloc (amt);
252b5132
RH
1908
1909 BFD_ASSERT (tmp_name);
1910
1911 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1912
1913 myh = coff_link_hash_lookup
b34976b6 1914 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
d70910e8 1915
252b5132
RH
1916 if (myh != NULL)
1917 {
1918 free (tmp_name);
c8e7bf0d
NC
1919 /* We've already seen this guy. */
1920 return;
252b5132
RH
1921 }
1922
14a793b2 1923 bh = NULL;
dc810e39 1924 val = globals->thumb_glue_size + 1;
252b5132 1925 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
b34976b6 1926 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
d70910e8 1927
252b5132 1928 /* If we mark it 'thumb', the disassembler will do a better job. */
14a793b2 1929 myh = (struct coff_link_hash_entry *) bh;
252b5132
RH
1930 myh->class = C_THUMBEXTFUNC;
1931
1932 free (tmp_name);
1933
1934 /* Allocate another symbol to mark where we switch to arm mode. */
d70910e8 1935
252b5132
RH
1936#define CHANGE_TO_ARM "__%s_change_to_arm"
1937#define BACK_FROM_ARM "__%s_back_from_arm"
d70910e8 1938
dc810e39 1939 amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1;
c8e7bf0d 1940 tmp_name = bfd_malloc (amt);
d70910e8 1941
252b5132 1942 BFD_ASSERT (tmp_name);
d70910e8 1943
252b5132
RH
1944 sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name);
1945
14a793b2 1946 bh = NULL;
dc810e39 1947 val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4);
252b5132 1948 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
b34976b6 1949 BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh);
252b5132 1950
d70910e8
KH
1951 free (tmp_name);
1952
252b5132
RH
1953 globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
1954
1955 return;
1956}
7831a775 1957#endif /* not ARM_WINCE */
252b5132
RH
1958
1959/* Select a BFD to be used to hold the sections used by the glue code.
1960 This function is called from the linker scripts in ld/emultempl/
1961 {armcoff/pe}.em */
e049a0de 1962
b34976b6 1963bfd_boolean
c8e7bf0d
NC
1964bfd_arm_get_bfd_for_interworking (bfd * abfd,
1965 struct bfd_link_info * info)
252b5132
RH
1966{
1967 struct coff_arm_link_hash_table * globals;
1968 flagword flags;
1969 asection * sec;
d70910e8 1970
252b5132
RH
1971 /* If we are only performing a partial link do not bother
1972 getting a bfd to hold the glue. */
1049f94e 1973 if (info->relocatable)
b34976b6 1974 return TRUE;
d70910e8 1975
252b5132 1976 globals = coff_arm_hash_table (info);
d70910e8 1977
252b5132
RH
1978 BFD_ASSERT (globals != NULL);
1979
1980 if (globals->bfd_of_glue_owner != NULL)
b34976b6 1981 return TRUE;
d70910e8 1982
252b5132 1983 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
d70910e8
KH
1984
1985 if (sec == NULL)
252b5132 1986 {
117ed4f8
AM
1987 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
1988 | SEC_CODE | SEC_READONLY);
1989 sec = bfd_make_section_with_flags (abfd, ARM2THUMB_GLUE_SECTION_NAME,
1990 flags);
252b5132 1991 if (sec == NULL
252b5132 1992 || ! bfd_set_section_alignment (abfd, sec, 2))
b34976b6 1993 return FALSE;
252b5132
RH
1994 }
1995
1996 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
1997
d70910e8 1998 if (sec == NULL)
252b5132 1999 {
117ed4f8
AM
2000 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
2001 | SEC_CODE | SEC_READONLY);
2002 sec = bfd_make_section_with_flags (abfd, THUMB2ARM_GLUE_SECTION_NAME,
2003 flags);
d70910e8 2004
252b5132 2005 if (sec == NULL
252b5132 2006 || ! bfd_set_section_alignment (abfd, sec, 2))
b34976b6 2007 return FALSE;
252b5132 2008 }
d70910e8 2009
252b5132
RH
2010 /* Save the bfd for later use. */
2011 globals->bfd_of_glue_owner = abfd;
d70910e8 2012
b34976b6 2013 return TRUE;
252b5132
RH
2014}
2015
b34976b6 2016bfd_boolean
c8e7bf0d
NC
2017bfd_arm_process_before_allocation (bfd * abfd,
2018 struct bfd_link_info * info,
2019 int support_old_code)
252b5132
RH
2020{
2021 asection * sec;
2022 struct coff_arm_link_hash_table * globals;
2023
2024 /* If we are only performing a partial link do not bother
2025 to construct any glue. */
1049f94e 2026 if (info->relocatable)
b34976b6 2027 return TRUE;
d70910e8 2028
252b5132
RH
2029 /* Here we have a bfd that is to be included on the link. We have a hook
2030 to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH
2031 _bfd_coff_get_external_symbols (abfd);
2032
2033 globals = coff_arm_hash_table (info);
d70910e8 2034
252b5132
RH
2035 BFD_ASSERT (globals != NULL);
2036 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2037
2038 globals->support_old_code = support_old_code;
d70910e8 2039
252b5132
RH
2040 /* Rummage around all the relocs and map the glue vectors. */
2041 sec = abfd->sections;
2042
2043 if (sec == NULL)
b34976b6 2044 return TRUE;
252b5132
RH
2045
2046 for (; sec != NULL; sec = sec->next)
2047 {
2048 struct internal_reloc * i;
2049 struct internal_reloc * rel;
2050
d70910e8 2051 if (sec->reloc_count == 0)
252b5132
RH
2052 continue;
2053
2054 /* Load the relocs. */
d70910e8 2055 /* FIXME: there may be a storage leak here. */
252b5132 2056 i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0);
d70910e8 2057
252b5132
RH
2058 BFD_ASSERT (i != 0);
2059
d70910e8 2060 for (rel = i; rel < i + sec->reloc_count; ++rel)
252b5132
RH
2061 {
2062 unsigned short r_type = rel->r_type;
86033394 2063 long symndx;
252b5132
RH
2064 struct coff_link_hash_entry * h;
2065
2066 symndx = rel->r_symndx;
2067
d70910e8 2068 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH
2069 if (symndx == -1)
2070 continue;
2071
17505c5c 2072 /* If the index is outside of the range of our table, something has gone wrong. */
af74ae99
NC
2073 if (symndx >= obj_conv_table_size (abfd))
2074 {
d003868e
AM
2075 _bfd_error_handler (_("%B: illegal symbol index in reloc: %d"),
2076 abfd, symndx);
af74ae99
NC
2077 continue;
2078 }
d70910e8 2079
252b5132
RH
2080 h = obj_coff_sym_hashes (abfd)[symndx];
2081
2082 /* If the relocation is against a static symbol it must be within
2083 the current section and so cannot be a cross ARM/Thumb relocation. */
2084 if (h == NULL)
2085 continue;
2086
2087 switch (r_type)
2088 {
2089 case ARM_26:
2090 /* This one is a call from arm code. We need to look up
2091 the target of the call. If it is a thumb target, we
2092 insert glue. */
d70910e8 2093
252b5132
RH
2094 if (h->class == C_THUMBEXTFUNC)
2095 record_arm_to_thumb_glue (info, h);
2096 break;
d70910e8 2097
17505c5c 2098#ifndef ARM_WINCE
252b5132
RH
2099 case ARM_THUMB23:
2100 /* This one is a call from thumb code. We used to look
2101 for ARM_THUMB9 and ARM_THUMB12 as well. We need to look
2102 up the target of the call. If it is an arm target, we
2103 insert glue. If the symbol does not exist it will be
2104 given a class of C_EXT and so we will generate a stub
2105 for it. This is not really a problem, since the link
2106 is doomed anyway. */
2107
2108 switch (h->class)
2109 {
2110 case C_EXT:
2111 case C_STAT:
2112 case C_LABEL:
2113 record_thumb_to_arm_glue (info, h);
2114 break;
2115 default:
2116 ;
2117 }
2118 break;
17505c5c 2119#endif
d70910e8 2120
252b5132
RH
2121 default:
2122 break;
2123 }
2124 }
2125 }
2126
b34976b6 2127 return TRUE;
252b5132
RH
2128}
2129
e049a0de
ILT
2130#endif /* ! defined (COFF_IMAGE_WITH_PE) */
2131
252b5132 2132#define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup
157090f7 2133#define coff_bfd_reloc_name_lookup coff_arm_reloc_name_lookup
252b5132
RH
2134#define coff_relocate_section coff_arm_relocate_section
2135#define coff_bfd_is_local_label_name coff_arm_is_local_label_name
2136#define coff_adjust_symndx coff_arm_adjust_symndx
2137#define coff_link_output_has_begun coff_arm_link_output_has_begun
2138#define coff_final_link_postscript coff_arm_final_link_postscript
2139#define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data
2140#define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data
2141#define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags
2142#define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data
2143#define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create
2144
d21356d8
NC
2145/* When doing a relocatable link, we want to convert ARM_26 relocs
2146 into ARM_26D relocs. */
252b5132 2147
b34976b6 2148static bfd_boolean
c8e7bf0d
NC
2149coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED,
2150 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2151 bfd *ibfd,
2152 asection *sec,
2153 struct internal_reloc *irel,
2154 bfd_boolean *adjustedp)
252b5132 2155{
d21356d8 2156 if (irel->r_type == ARM_26)
252b5132
RH
2157 {
2158 struct coff_link_hash_entry *h;
2159
2160 h = obj_coff_sym_hashes (ibfd)[irel->r_symndx];
2161 if (h != NULL
2162 && (h->root.type == bfd_link_hash_defined
2163 || h->root.type == bfd_link_hash_defweak)
2164 && h->root.u.def.section->output_section == sec->output_section)
d21356d8 2165 irel->r_type = ARM_26D;
252b5132 2166 }
b34976b6
AM
2167 *adjustedp = FALSE;
2168 return TRUE;
252b5132
RH
2169}
2170
2171/* Called when merging the private data areas of two BFDs.
2172 This is important as it allows us to detect if we are
2173 attempting to merge binaries compiled for different ARM
5c4491d3 2174 targets, eg different CPUs or different APCS's. */
252b5132 2175
b34976b6 2176static bfd_boolean
c8e7bf0d 2177coff_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH
2178{
2179 BFD_ASSERT (ibfd != NULL && obfd != NULL);
2180
2181 if (ibfd == obfd)
b34976b6 2182 return TRUE;
252b5132
RH
2183
2184 /* If the two formats are different we cannot merge anything.
2185 This is not an error, since it is permissable to change the
2186 input and output formats. */
2187 if ( ibfd->xvec->flavour != bfd_target_coff_flavour
2188 || obfd->xvec->flavour != bfd_target_coff_flavour)
b34976b6 2189 return TRUE;
252b5132 2190
5a6c6817
NC
2191 /* Determine what should happen if the input ARM architecture
2192 does not match the output ARM architecture. */
2193 if (! bfd_arm_merge_machines (ibfd, obfd))
2194 return FALSE;
2195
2196 /* Verify that the APCS is the same for the two BFDs. */
252b5132
RH
2197 if (APCS_SET (ibfd))
2198 {
2199 if (APCS_SET (obfd))
2200 {
2201 /* If the src and dest have different APCS flag bits set, fail. */
2202 if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd))
2203 {
2204 _bfd_error_handler
2205 /* xgettext: c-format */
d003868e
AM
2206 (_("ERROR: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"),
2207 ibfd, obfd,
2208 APCS_26_FLAG (ibfd) ? 26 : 32,
2209 APCS_26_FLAG (obfd) ? 26 : 32
252b5132
RH
2210 );
2211
2212 bfd_set_error (bfd_error_wrong_format);
b34976b6 2213 return FALSE;
252b5132 2214 }
d70910e8 2215
252b5132
RH
2216 if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd))
2217 {
2218 const char *msg;
2219
2220 if (APCS_FLOAT_FLAG (ibfd))
2221 /* xgettext: c-format */
d003868e 2222 msg = _("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers");
252b5132
RH
2223 else
2224 /* xgettext: c-format */
d003868e 2225 msg = _("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers");
d70910e8 2226
d003868e 2227 _bfd_error_handler (msg, ibfd, obfd);
252b5132
RH
2228
2229 bfd_set_error (bfd_error_wrong_format);
b34976b6 2230 return FALSE;
252b5132 2231 }
d70910e8 2232
252b5132
RH
2233 if (PIC_FLAG (obfd) != PIC_FLAG (ibfd))
2234 {
2235 const char * msg;
2236
2237 if (PIC_FLAG (ibfd))
2238 /* xgettext: c-format */
d003868e 2239 msg = _("ERROR: %B is compiled as position independent code, whereas target %B is absolute position");
252b5132
RH
2240 else
2241 /* xgettext: c-format */
d003868e
AM
2242 msg = _("ERROR: %B is compiled as absolute position code, whereas target %B is position independent");
2243 _bfd_error_handler (msg, ibfd, obfd);
252b5132
RH
2244
2245 bfd_set_error (bfd_error_wrong_format);
b34976b6 2246 return FALSE;
252b5132
RH
2247 }
2248 }
2249 else
2250 {
2251 SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd));
d70910e8 2252
252b5132
RH
2253 /* Set up the arch and fields as well as these are probably wrong. */
2254 bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
2255 }
2256 }
2257
2258 /* Check the interworking support. */
2259 if (INTERWORK_SET (ibfd))
2260 {
2261 if (INTERWORK_SET (obfd))
2262 {
2263 /* If the src and dest differ in their interworking issue a warning. */
2264 if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd))
2265 {
2266 const char * msg;
2267
2268 if (INTERWORK_FLAG (ibfd))
2269 /* xgettext: c-format */
d003868e 2270 msg = _("Warning: %B supports interworking, whereas %B does not");
252b5132
RH
2271 else
2272 /* xgettext: c-format */
d003868e 2273 msg = _("Warning: %B does not support interworking, whereas %B does");
d70910e8 2274
d003868e 2275 _bfd_error_handler (msg, ibfd, obfd);
252b5132
RH
2276 }
2277 }
2278 else
2279 {
2280 SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd));
2281 }
2282 }
2283
b34976b6 2284 return TRUE;
252b5132
RH
2285}
2286
252b5132
RH
2287/* Display the flags field. */
2288
b34976b6 2289static bfd_boolean
c8e7bf0d 2290coff_arm_print_private_bfd_data (bfd * abfd, void * ptr)
252b5132
RH
2291{
2292 FILE * file = (FILE *) ptr;
d70910e8 2293
252b5132 2294 BFD_ASSERT (abfd != NULL && ptr != NULL);
d70910e8 2295
252b5132
RH
2296 /* xgettext:c-format */
2297 fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags);
d70910e8 2298
252b5132
RH
2299 if (APCS_SET (abfd))
2300 {
5c4491d3 2301 /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */
252b5132
RH
2302 fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32);
2303
2304 if (APCS_FLOAT_FLAG (abfd))
2305 fprintf (file, _(" [floats passed in float registers]"));
2306 else
2307 fprintf (file, _(" [floats passed in integer registers]"));
2308
2309 if (PIC_FLAG (abfd))
2310 fprintf (file, _(" [position independent]"));
2311 else
2312 fprintf (file, _(" [absolute position]"));
2313 }
d70910e8 2314
252b5132
RH
2315 if (! INTERWORK_SET (abfd))
2316 fprintf (file, _(" [interworking flag not initialised]"));
2317 else if (INTERWORK_FLAG (abfd))
2318 fprintf (file, _(" [interworking supported]"));
2319 else
2320 fprintf (file, _(" [interworking not supported]"));
d70910e8 2321
252b5132 2322 fputc ('\n', file);
d70910e8 2323
b34976b6 2324 return TRUE;
252b5132
RH
2325}
2326
252b5132
RH
2327/* Copies the given flags into the coff_tdata.flags field.
2328 Typically these flags come from the f_flags[] field of
2329 the COFF filehdr structure, which contains important,
2330 target specific information.
2331 Note: Although this function is static, it is explicitly
2332 called from both coffcode.h and peicode.h. */
2333
b34976b6 2334static bfd_boolean
c8e7bf0d 2335_bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags)
252b5132
RH
2336{
2337 flagword flag;
2338
2339 BFD_ASSERT (abfd != NULL);
2340
2341 flag = (flags & F_APCS26) ? F_APCS_26 : 0;
d70910e8 2342
252b5132
RH
2343 /* Make sure that the APCS field has not been initialised to the opposite
2344 value. */
2345 if (APCS_SET (abfd)
2346 && ( (APCS_26_FLAG (abfd) != flag)
2347 || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT))
948221a8 2348 || (PIC_FLAG (abfd) != (flags & F_PIC))
252b5132 2349 ))
b34976b6 2350 return FALSE;
252b5132
RH
2351
2352 flag |= (flags & (F_APCS_FLOAT | F_PIC));
d70910e8 2353
252b5132
RH
2354 SET_APCS_FLAGS (abfd, flag);
2355
2356 flag = (flags & F_INTERWORK);
d70910e8 2357
252b5132
RH
2358 /* If the BFD has already had its interworking flag set, but it
2359 is different from the value that we have been asked to set,
2360 then assume that that merged code will not support interworking
2361 and set the flag accordingly. */
2362 if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag))
2363 {
2364 if (flag)
2365 /* xgettext: c-format */
d003868e
AM
2366 _bfd_error_handler (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
2367 abfd);
252b5132
RH
2368 else
2369 /* xgettext: c-format */
d003868e
AM
2370 _bfd_error_handler (_("Warning: Clearing the interworking flag of %B due to outside request"),
2371 abfd);
252b5132
RH
2372 flag = 0;
2373 }
2374
2375 SET_INTERWORK_FLAG (abfd, flag);
2376
b34976b6 2377 return TRUE;
252b5132
RH
2378}
2379
252b5132
RH
2380/* Copy the important parts of the target specific data
2381 from one instance of a BFD to another. */
2382
b34976b6 2383static bfd_boolean
c8e7bf0d 2384coff_arm_copy_private_bfd_data (bfd * src, bfd * dest)
252b5132
RH
2385{
2386 BFD_ASSERT (src != NULL && dest != NULL);
d70910e8 2387
252b5132 2388 if (src == dest)
b34976b6 2389 return TRUE;
252b5132
RH
2390
2391 /* If the destination is not in the same format as the source, do not do
2392 the copy. */
2393 if (src->xvec != dest->xvec)
b34976b6 2394 return TRUE;
252b5132 2395
c8e7bf0d 2396 /* Copy the flags field. */
252b5132
RH
2397 if (APCS_SET (src))
2398 {
2399 if (APCS_SET (dest))
2400 {
2401 /* If the src and dest have different APCS flag bits set, fail. */
2402 if (APCS_26_FLAG (dest) != APCS_26_FLAG (src))
b34976b6 2403 return FALSE;
d70910e8 2404
252b5132 2405 if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src))
b34976b6 2406 return FALSE;
d70910e8 2407
252b5132 2408 if (PIC_FLAG (dest) != PIC_FLAG (src))
b34976b6 2409 return FALSE;
252b5132
RH
2410 }
2411 else
2412 SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src)
2413 | PIC_FLAG (src));
2414 }
2415
2416 if (INTERWORK_SET (src))
2417 {
2418 if (INTERWORK_SET (dest))
2419 {
2420 /* If the src and dest have different interworking flags then turn
2421 off the interworking bit. */
2422 if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src))
2423 {
2424 if (INTERWORK_FLAG (dest))
2425 {
2426 /* xgettext:c-format */
ae1a89b7 2427 _bfd_error_handler (("\
d003868e
AM
2428Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
2429 dest, src);
252b5132 2430 }
d70910e8 2431
252b5132
RH
2432 SET_INTERWORK_FLAG (dest, 0);
2433 }
2434 }
2435 else
2436 {
2437 SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src));
2438 }
2439 }
2440
b34976b6 2441 return TRUE;
252b5132
RH
2442}
2443
2444/* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX
c31c1f70 2445 *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */
d66dff94 2446#ifndef LOCAL_LABEL_PREFIX
c31c1f70 2447#define LOCAL_LABEL_PREFIX ""
d66dff94 2448#endif
252b5132
RH
2449#ifndef USER_LABEL_PREFIX
2450#define USER_LABEL_PREFIX "_"
2451#endif
2452
f8111282
NC
2453/* Like _bfd_coff_is_local_label_name, but
2454 a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be
2455 non-local.
2456 b) Allow other prefixes than ".", e.g. an empty prefix would cause all
2457 labels of the form Lxxx to be stripped. */
c8e7bf0d 2458
b34976b6 2459static bfd_boolean
c8e7bf0d
NC
2460coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED,
2461 const char * name)
252b5132 2462{
252b5132
RH
2463#ifdef USER_LABEL_PREFIX
2464 if (USER_LABEL_PREFIX[0] != 0)
2465 {
5ff625e9
AM
2466 size_t len = strlen (USER_LABEL_PREFIX);
2467
2468 if (strncmp (name, USER_LABEL_PREFIX, len) == 0)
b34976b6 2469 return FALSE;
252b5132
RH
2470 }
2471#endif
f8111282
NC
2472
2473#ifdef LOCAL_LABEL_PREFIX
2474 /* If there is a prefix for local labels then look for this.
d70910e8
KH
2475 If the prefix exists, but it is empty, then ignore the test. */
2476
f8111282 2477 if (LOCAL_LABEL_PREFIX[0] != 0)
252b5132 2478 {
dc810e39 2479 size_t len = strlen (LOCAL_LABEL_PREFIX);
d70910e8 2480
f8111282 2481 if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0)
b34976b6 2482 return FALSE;
d70910e8 2483
f8111282
NC
2484 /* Perform the checks below for the rest of the name. */
2485 name += len;
252b5132 2486 }
f8111282 2487#endif
d70910e8 2488
f8111282 2489 return name[0] == 'L';
252b5132
RH
2490}
2491
2492/* This piece of machinery exists only to guarantee that the bfd that holds
d70910e8 2493 the glue section is written last.
252b5132
RH
2494
2495 This does depend on bfd_make_section attaching a new section to the
c8e7bf0d 2496 end of the section list for the bfd. */
252b5132 2497
b34976b6 2498static bfd_boolean
c8e7bf0d 2499coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info)
252b5132
RH
2500{
2501 return (sub->output_has_begun
2502 || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner);
2503}
2504
b34976b6 2505static bfd_boolean
c8e7bf0d
NC
2506coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED,
2507 struct coff_final_link_info * pfinfo)
252b5132
RH
2508{
2509 struct coff_arm_link_hash_table * globals;
2510
2511 globals = coff_arm_hash_table (pfinfo->info);
d70910e8 2512
252b5132 2513 BFD_ASSERT (globals != NULL);
d70910e8 2514
252b5132
RH
2515 if (globals->bfd_of_glue_owner != NULL)
2516 {
2517 if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner))
b34976b6 2518 return FALSE;
d70910e8 2519
b34976b6 2520 globals->bfd_of_glue_owner->output_has_begun = TRUE;
252b5132 2521 }
d70910e8 2522
5a6c6817 2523 return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
252b5132
RH
2524}
2525
252b5132
RH
2526#include "coffcode.h"
2527
c3c89269
NC
2528#ifndef TARGET_LITTLE_SYM
2529#define TARGET_LITTLE_SYM armcoff_little_vec
252b5132 2530#endif
c3c89269
NC
2531#ifndef TARGET_LITTLE_NAME
2532#define TARGET_LITTLE_NAME "coff-arm-little"
252b5132 2533#endif
c3c89269
NC
2534#ifndef TARGET_BIG_SYM
2535#define TARGET_BIG_SYM armcoff_big_vec
252b5132 2536#endif
c3c89269
NC
2537#ifndef TARGET_BIG_NAME
2538#define TARGET_BIG_NAME "coff-arm-big"
252b5132 2539#endif
252b5132 2540
c3c89269
NC
2541#ifndef TARGET_UNDERSCORE
2542#define TARGET_UNDERSCORE 0
252b5132 2543#endif
c3c89269 2544
f78c5281 2545#ifndef EXTRA_S_FLAGS
c3c89269 2546#ifdef COFF_WITH_PE
20650579 2547#define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES)
252b5132 2548#else
20650579 2549#define EXTRA_S_FLAGS SEC_CODE
252b5132 2550#endif
f78c5281 2551#endif
252b5132 2552
c3c89269
NC
2553/* Forward declaration for use initialising alternative_target field. */
2554extern const bfd_target TARGET_BIG_SYM ;
252b5132 2555
c3c89269 2556/* Target vectors. */
3fa78519
SS
2557CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE)
2558CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE)
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