s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify
[deliverable/binutils-gdb.git] / bfd / coff-h8300.c
CommitLineData
252b5132 1/* BFD back-end for Hitachi H8/300 COFF binaries.
7898deda 2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
e2d34d7d 3 2000, 2001, 2002
5f771d47 4 Free Software Foundation, Inc.
252b5132
RH
5 Written by Steve Chamberlain, <sac@cygnus.com>.
6
e514ac71 7 This file is part of BFD, the Binary File Descriptor library.
252b5132 8
e514ac71
NC
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
252b5132 13
e514ac71
NC
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
252b5132 18
e514ac71
NC
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
252b5132
RH
22
23#include "bfd.h"
24#include "sysdep.h"
25#include "libbfd.h"
26#include "bfdlink.h"
27#include "genlink.h"
28#include "coff/h8300.h"
29#include "coff/internal.h"
30#include "libcoff.h"
31
32#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
33
34/* We derive a hash table from the basic BFD hash table to
5fcfd273 35 hold entries in the function vector. Aside from the
252b5132
RH
36 info stored by the basic hash table, we need the offset
37 of a particular entry within the hash table as well as
38 the offset where we'll add the next entry. */
39
40struct funcvec_hash_entry
f4ffd778
NC
41 {
42 /* The basic hash table entry. */
43 struct bfd_hash_entry root;
252b5132 44
f4ffd778
NC
45 /* The offset within the vectors section where
46 this entry lives. */
47 bfd_vma offset;
48 };
252b5132
RH
49
50struct funcvec_hash_table
f4ffd778
NC
51 {
52 /* The basic hash table. */
53 struct bfd_hash_table root;
252b5132 54
f4ffd778 55 bfd *abfd;
252b5132 56
f4ffd778
NC
57 /* Offset at which we'll add the next entry. */
58 unsigned int offset;
59 };
252b5132
RH
60
61static struct bfd_hash_entry *
62funcvec_hash_newfunc
63 PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
64
b34976b6 65static bfd_boolean
252b5132
RH
66funcvec_hash_table_init
67 PARAMS ((struct funcvec_hash_table *, bfd *,
b34976b6
AM
68 struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
69 struct bfd_hash_table *,
70 const char *)));
71
72static bfd_reloc_status_type special
73 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
74static int select_reloc
75 PARAMS ((reloc_howto_type *));
76static void rtype2howto
77 PARAMS ((arelent *, struct internal_reloc *));
78static void reloc_processing
79 PARAMS ((arelent *, struct internal_reloc *, asymbol **, bfd *, asection *));
80static bfd_boolean h8300_symbol_address_p
81 PARAMS ((bfd *, asection *, bfd_vma));
82static int h8300_reloc16_estimate
83 PARAMS ((bfd *, asection *, arelent *, unsigned int,
84 struct bfd_link_info *));
85static void h8300_reloc16_extra_cases
86 PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
87 bfd_byte *, unsigned int *, unsigned int *));
88static bfd_boolean h8300_bfd_link_add_symbols
89 PARAMS ((bfd *, struct bfd_link_info *));
f4ffd778 90
252b5132
RH
91/* To lookup a value in the function vector hash table. */
92#define funcvec_hash_lookup(table, string, create, copy) \
93 ((struct funcvec_hash_entry *) \
94 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
95
96/* The derived h8300 COFF linker table. Note it's derived from
97 the generic linker hash table, not the COFF backend linker hash
98 table! We use this to attach additional data structures we
99 need while linking on the h8300. */
bc7eab72 100struct h8300_coff_link_hash_table {
252b5132
RH
101 /* The main hash table. */
102 struct generic_link_hash_table root;
103
104 /* Section for the vectors table. This gets attached to a
105 random input bfd, we keep it here for easy access. */
106 asection *vectors_sec;
107
108 /* Hash table of the functions we need to enter into the function
109 vector. */
110 struct funcvec_hash_table *funcvec_hash_table;
111};
112
113static struct bfd_link_hash_table *h8300_coff_link_hash_table_create
114 PARAMS ((bfd *));
115
116/* Get the H8/300 COFF linker hash table from a link_info structure. */
117
118#define h8300_coff_hash_table(p) \
119 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
120
121/* Initialize fields within a funcvec hash table entry. Called whenever
122 a new entry is added to the funcvec hash table. */
123
124static struct bfd_hash_entry *
125funcvec_hash_newfunc (entry, gen_table, string)
126 struct bfd_hash_entry *entry;
127 struct bfd_hash_table *gen_table;
128 const char *string;
129{
130 struct funcvec_hash_entry *ret;
131 struct funcvec_hash_table *table;
132
133 ret = (struct funcvec_hash_entry *) entry;
134 table = (struct funcvec_hash_table *) gen_table;
135
136 /* Allocate the structure if it has not already been allocated by a
137 subclass. */
138 if (ret == NULL)
139 ret = ((struct funcvec_hash_entry *)
140 bfd_hash_allocate (gen_table,
141 sizeof (struct funcvec_hash_entry)));
142 if (ret == NULL)
143 return NULL;
144
145 /* Call the allocation method of the superclass. */
146 ret = ((struct funcvec_hash_entry *)
bc7eab72 147 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
252b5132
RH
148
149 if (ret == NULL)
150 return NULL;
151
152 /* Note where this entry will reside in the function vector table. */
153 ret->offset = table->offset;
154
155 /* Bump the offset at which we store entries in the function
156 vector. We'd like to bump up the size of the vectors section,
157 but it's not easily available here. */
158 if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
159 table->offset += 2;
160 else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
161 || bfd_get_mach (table->abfd) == bfd_mach_h8300s)
162 table->offset += 4;
163 else
164 return NULL;
165
166 /* Everything went OK. */
167 return (struct bfd_hash_entry *) ret;
168}
169
170/* Initialize the function vector hash table. */
171
b34976b6 172static bfd_boolean
252b5132
RH
173funcvec_hash_table_init (table, abfd, newfunc)
174 struct funcvec_hash_table *table;
175 bfd *abfd;
b34976b6
AM
176 struct bfd_hash_entry *(*newfunc)
177 PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *,
178 const char *));
252b5132
RH
179{
180 /* Initialize our local fields, then call the generic initialization
181 routine. */
182 table->offset = 0;
183 table->abfd = abfd;
184 return (bfd_hash_table_init (&table->root, newfunc));
185}
186
187/* Create the derived linker hash table. We use a derived hash table
188 basically to hold "static" information during an h8/300 coff link
189 without using static variables. */
190
191static struct bfd_link_hash_table *
192h8300_coff_link_hash_table_create (abfd)
193 bfd *abfd;
194{
195 struct h8300_coff_link_hash_table *ret;
dc810e39
AM
196 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
197
e2d34d7d 198 ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt);
252b5132
RH
199 if (ret == NULL)
200 return NULL;
dc810e39
AM
201 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
202 _bfd_generic_link_hash_newfunc))
252b5132 203 {
e2d34d7d 204 free (ret);
252b5132
RH
205 return NULL;
206 }
207
208 /* Initialize our data. */
209 ret->vectors_sec = NULL;
210 ret->funcvec_hash_table = NULL;
211
212 /* OK. Everything's intialized, return the base pointer. */
213 return &ret->root.root;
214}
215
cc040812 216/* Special handling for H8/300 relocs.
252b5132
RH
217 We only come here for pcrel stuff and return normally if not an -r link.
218 When doing -r, we can't do any arithmetic for the pcrel stuff, because
219 the code in reloc.c assumes that we can manipulate the targets of
5fcfd273 220 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
252b5132 221 which means that the gap after the instruction may not be enough to
d562d2fb 222 contain the offset required for the branch, so we have to use only
cc040812 223 the addend until the final link. */
252b5132
RH
224
225static bfd_reloc_status_type
226special (abfd, reloc_entry, symbol, data, input_section, output_bfd,
cc040812 227 error_message)
5f771d47
ILT
228 bfd *abfd ATTRIBUTE_UNUSED;
229 arelent *reloc_entry ATTRIBUTE_UNUSED;
230 asymbol *symbol ATTRIBUTE_UNUSED;
231 PTR data ATTRIBUTE_UNUSED;
232 asection *input_section ATTRIBUTE_UNUSED;
252b5132 233 bfd *output_bfd;
5f771d47 234 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH
235{
236 if (output_bfd == (bfd *) NULL)
237 return bfd_reloc_continue;
238
d562d2fb
AM
239 /* Adjust the reloc address to that in the output section. */
240 reloc_entry->address += input_section->output_offset;
252b5132
RH
241 return bfd_reloc_ok;
242}
243
bc7eab72 244static reloc_howto_type howto_table[] = {
b34976b6
AM
245 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE),
246 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
247 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE),
248 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE),
249 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE),
250 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE),
251 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
252 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
253 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
254 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE),
255 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE),
256 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE),
257 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE),
258 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
252b5132
RH
259
260 /* An indirect reference to a function. This causes the function's address
261 to be added to the function vector in lo-mem and puts the address of
262 the function vector's entry in the jsr instruction. */
b34976b6 263 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE),
252b5132
RH
264
265 /* Internal reloc for relaxing. This is created when a 16bit pc-relative
266 branch is turned into an 8bit pc-relative branch. */
b34976b6 267 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
252b5132 268
b34976b6 269 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE),
252b5132 270
b34976b6 271 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
252b5132 272
b34976b6 273 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE),
252b5132 274
b34976b6 275 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE),
252b5132
RH
276};
277
cc040812 278/* Turn a howto into a reloc number. */
252b5132
RH
279
280#define SELECT_RELOC(x,howto) \
bc7eab72 281 { x.r_type = select_reloc (howto); }
252b5132 282
bc7eab72 283#define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x))
252b5132
RH
284#define H8300 1 /* Customize coffcode.h */
285#define __A_MAGIC_SET__
286
cc040812 287/* Code to swap in the reloc. */
dc810e39
AM
288#define SWAP_IN_RELOC_OFFSET H_GET_32
289#define SWAP_OUT_RELOC_OFFSET H_PUT_32
252b5132
RH
290#define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
291 dst->r_stuff[0] = 'S'; \
292 dst->r_stuff[1] = 'C';
293
252b5132
RH
294static int
295select_reloc (howto)
296 reloc_howto_type *howto;
297{
298 return howto->type;
299}
300
cc040812 301/* Code to turn a r_type into a howto ptr, uses the above howto table. */
252b5132
RH
302
303static void
304rtype2howto (internal, dst)
305 arelent *internal;
306 struct internal_reloc *dst;
307{
308 switch (dst->r_type)
309 {
310 case R_RELBYTE:
311 internal->howto = howto_table + 0;
312 break;
313 case R_RELWORD:
314 internal->howto = howto_table + 1;
315 break;
316 case R_RELLONG:
317 internal->howto = howto_table + 2;
318 break;
319 case R_PCRBYTE:
320 internal->howto = howto_table + 3;
321 break;
322 case R_PCRWORD:
323 internal->howto = howto_table + 4;
324 break;
325 case R_PCRLONG:
326 internal->howto = howto_table + 5;
327 break;
328 case R_MOV16B1:
329 internal->howto = howto_table + 6;
330 break;
331 case R_MOV16B2:
332 internal->howto = howto_table + 7;
333 break;
334 case R_JMP1:
335 internal->howto = howto_table + 8;
336 break;
337 case R_JMP2:
338 internal->howto = howto_table + 9;
339 break;
340 case R_JMPL1:
341 internal->howto = howto_table + 10;
342 break;
343 case R_JMPL2:
344 internal->howto = howto_table + 11;
345 break;
346 case R_MOV24B1:
347 internal->howto = howto_table + 12;
348 break;
349 case R_MOV24B2:
350 internal->howto = howto_table + 13;
351 break;
352 case R_MEM_INDIRECT:
353 internal->howto = howto_table + 14;
354 break;
355 case R_PCRWORD_B:
356 internal->howto = howto_table + 15;
357 break;
358 case R_MOVL1:
359 internal->howto = howto_table + 16;
360 break;
361 case R_MOVL2:
362 internal->howto = howto_table + 17;
363 break;
364 case R_BCC_INV:
365 internal->howto = howto_table + 18;
366 break;
367 case R_JMP_DEL:
368 internal->howto = howto_table + 19;
369 break;
370 default:
371 abort ();
372 break;
373 }
374}
375
bc7eab72 376#define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
252b5132 377
cc040812 378/* Perform any necessary magic to the addend in a reloc entry. */
252b5132
RH
379
380#define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
bc7eab72 381 cache_ptr->addend = ext_reloc.r_offset;
252b5132 382
252b5132 383#define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
bc7eab72 384 reloc_processing (relent, reloc, symbols, abfd, section)
252b5132
RH
385
386static void
387reloc_processing (relent, reloc, symbols, abfd, section)
cc040812 388 arelent *relent;
252b5132 389 struct internal_reloc *reloc;
cc040812
NC
390 asymbol **symbols;
391 bfd *abfd;
392 asection *section;
252b5132
RH
393{
394 relent->address = reloc->r_vaddr;
395 rtype2howto (relent, reloc);
396
397 if (((int) reloc->r_symndx) > 0)
398 {
399 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
400 }
401 else
402 {
403 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
404 }
405
252b5132
RH
406 relent->addend = reloc->r_offset;
407
408 relent->address -= section->vma;
cc040812
NC
409#if 0
410 relent->section = 0;
411#endif
252b5132
RH
412}
413
b34976b6 414static bfd_boolean
252b5132
RH
415h8300_symbol_address_p (abfd, input_section, address)
416 bfd *abfd;
417 asection *input_section;
418 bfd_vma address;
419{
420 asymbol **s;
421
422 s = _bfd_generic_link_get_symbols (abfd);
423 BFD_ASSERT (s != (asymbol **) NULL);
424
425 /* Search all the symbols for one in INPUT_SECTION with
426 address ADDRESS. */
cc040812 427 while (*s)
252b5132
RH
428 {
429 asymbol *p = *s;
430 if (p->section == input_section
431 && (input_section->output_section->vma
432 + input_section->output_offset
433 + p->value) == address)
b34976b6 434 return TRUE;
252b5132 435 s++;
cc040812 436 }
b34976b6 437 return FALSE;
252b5132
RH
438}
439
252b5132
RH
440/* If RELOC represents a relaxable instruction/reloc, change it into
441 the relaxed reloc, notify the linker that symbol addresses
442 have changed (bfd_perform_slip) and return how much the current
443 section has shrunk by.
444
445 FIXME: Much of this code has knowledge of the ordering of entries
446 in the howto table. This needs to be fixed. */
447
448static int
cc040812 449h8300_reloc16_estimate (abfd, input_section, reloc, shrink, link_info)
252b5132
RH
450 bfd *abfd;
451 asection *input_section;
452 arelent *reloc;
453 unsigned int shrink;
454 struct bfd_link_info *link_info;
455{
cc040812 456 bfd_vma value;
252b5132
RH
457 bfd_vma dot;
458 bfd_vma gap;
459 static asection *last_input_section = NULL;
460 static arelent *last_reloc = NULL;
461
5fcfd273 462 /* The address of the thing to be relocated will have moved back by
252b5132
RH
463 the size of the shrink - but we don't change reloc->address here,
464 since we need it to know where the relocation lives in the source
465 uncooked section. */
466 bfd_vma address = reloc->address - shrink;
467
468 if (input_section != last_input_section)
469 last_reloc = NULL;
470
471 /* Only examine the relocs which might be relaxable. */
472 switch (reloc->howto->type)
5fcfd273 473 {
252b5132
RH
474 /* This is the 16/24 bit absolute branch which could become an 8 bit
475 pc-relative branch. */
476 case R_JMP1:
477 case R_JMPL1:
478 /* Get the address of the target of this branch. */
cc040812 479 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
480
481 /* Get the address of the next instruction (not the reloc). */
482 dot = (input_section->output_section->vma
483 + input_section->output_offset + address);
484
485 /* Adjust for R_JMP1 vs R_JMPL1. */
486 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
487
488 /* Compute the distance from this insn to the branch target. */
489 gap = value - dot;
cc040812 490
252b5132
RH
491 /* If the distance is within -128..+128 inclusive, then we can relax
492 this jump. +128 is valid since the target will move two bytes
493 closer if we do relax this branch. */
bc7eab72 494 if ((int) gap >= -128 && (int) gap <= 128)
5fcfd273 495 {
e514ac71
NC
496 bfd_byte code;
497
498 if (!bfd_get_section_contents (abfd, input_section, & code,
499 reloc->address, 1))
500 break;
501 code = bfd_get_8 (abfd, & code);
502
252b5132
RH
503 /* It's possible we may be able to eliminate this branch entirely;
504 if the previous instruction is a branch around this instruction,
505 and there's no label at this instruction, then we can reverse
506 the condition on the previous branch and eliminate this jump.
507
508 original: new:
509 bCC lab1 bCC' lab2
510 jmp lab2
511 lab1: lab1:
5fcfd273 512
252b5132 513 This saves 4 bytes instead of two, and should be relatively
e514ac71
NC
514 common.
515
516 Only perform this optimisation for jumps (code 0x5a) not
517 subroutine calls, as otherwise it could transform:
b34976b6 518
e514ac71
NC
519 mov.w r0,r0
520 beq .L1
521 jsr @_bar
522 .L1: rts
523 _bar: rts
524 into:
525 mov.w r0,r0
526 bne _bar
527 rts
528 _bar: rts
b34976b6 529
e514ac71
NC
530 which changes the call (jsr) into a branch (bne). */
531 if (code == 0x5a
532 && gap <= 126
252b5132
RH
533 && last_reloc
534 && last_reloc->howto->type == R_PCRBYTE)
535 {
536 bfd_vma last_value;
537 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
538 input_section) + 1;
539
540 if (last_value == dot + 2
541 && last_reloc->address + 1 == reloc->address
cc040812 542 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
252b5132
RH
543 {
544 reloc->howto = howto_table + 19;
545 last_reloc->howto = howto_table + 18;
546 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
547 last_reloc->addend = reloc->addend;
548 shrink += 4;
549 bfd_perform_slip (abfd, 4, input_section, address);
550 break;
551 }
552 }
553
554 /* Change the reloc type. */
cc040812 555 reloc->howto = reloc->howto + 1;
252b5132
RH
556
557 /* This shrinks this section by two bytes. */
558 shrink += 2;
cc040812 559 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
560 }
561 break;
562
563 /* This is the 16 bit pc-relative branch which could become an 8 bit
564 pc-relative branch. */
565 case R_PCRWORD:
566 /* Get the address of the target of this branch, add one to the value
567 because the addend field in PCrel jumps is off by -1. */
cc040812
NC
568 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
569
252b5132
RH
570 /* Get the address of the next instruction if we were to relax. */
571 dot = input_section->output_section->vma +
572 input_section->output_offset + address;
cc040812 573
252b5132
RH
574 /* Compute the distance from this insn to the branch target. */
575 gap = value - dot;
576
577 /* If the distance is within -128..+128 inclusive, then we can relax
578 this jump. +128 is valid since the target will move two bytes
579 closer if we do relax this branch. */
bc7eab72 580 if ((int) gap >= -128 && (int) gap <= 128)
5fcfd273 581 {
252b5132
RH
582 /* Change the reloc type. */
583 reloc->howto = howto_table + 15;
584
585 /* This shrinks this section by two bytes. */
586 shrink += 2;
cc040812 587 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
588 }
589 break;
590
591 /* This is a 16 bit absolute address in a mov.b insn, which can
592 become an 8 bit absolute address if it's in the right range. */
593 case R_MOV16B1:
594 /* Get the address of the data referenced by this mov.b insn. */
cc040812 595 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
596
597 /* The address is in 0xff00..0xffff inclusive on the h8300 or
598 0xffff00..0xffffff inclusive on the h8300h, then we can
599 relax this mov.b */
600 if ((bfd_get_mach (abfd) == bfd_mach_h8300
601 && value >= 0xff00
602 && value <= 0xffff)
603 || ((bfd_get_mach (abfd) == bfd_mach_h8300h
604 || bfd_get_mach (abfd) == bfd_mach_h8300s)
605 && value >= 0xffff00
606 && value <= 0xffffff))
607 {
608 /* Change the reloc type. */
609 reloc->howto = reloc->howto + 1;
610
611 /* This shrinks this section by two bytes. */
612 shrink += 2;
cc040812 613 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
614 }
615 break;
616
617 /* Similarly for a 24 bit absolute address in a mov.b. Note that
618 if we can't relax this into an 8 bit absolute, we'll fall through
619 and try to relax it into a 16bit absolute. */
620 case R_MOV24B1:
621 /* Get the address of the data referenced by this mov.b insn. */
cc040812 622 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
623
624 /* The address is in 0xffff00..0xffffff inclusive on the h8300h,
625 then we can relax this mov.b */
626 if ((bfd_get_mach (abfd) == bfd_mach_h8300h
627 || bfd_get_mach (abfd) == bfd_mach_h8300s)
628 && value >= 0xffff00
629 && value <= 0xffffff)
630 {
631 /* Change the reloc type. */
632 reloc->howto = reloc->howto + 1;
633
634 /* This shrinks this section by four bytes. */
635 shrink += 4;
cc040812 636 bfd_perform_slip (abfd, 4, input_section, address);
252b5132
RH
637
638 /* Done with this reloc. */
639 break;
640 }
641
642 /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit
643 reloc. */
644
645 /* This is a 24/32 bit absolute address in a mov insn, which can
646 become an 16 bit absolute address if it's in the right range. */
647 case R_MOVL1:
648 /* Get the address of the data referenced by this mov insn. */
cc040812 649 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
650
651 /* If this address is in 0x0000..0x7fff inclusive or
652 0xff8000..0xffffff inclusive, then it can be relaxed. */
653 if (value <= 0x7fff || value >= 0xff8000)
654 {
655 /* Change the reloc type. */
656 reloc->howto = howto_table + 17;
657
658 /* This shrinks this section by two bytes. */
659 shrink += 2;
cc040812 660 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
661 }
662 break;
663
664 /* No other reloc types represent relaxing opportunities. */
cc040812
NC
665 default:
666 break;
252b5132
RH
667 }
668
669 last_reloc = reloc;
670 last_input_section = input_section;
671 return shrink;
672}
673
252b5132
RH
674/* Handle relocations for the H8/300, including relocs for relaxed
675 instructions.
676
677 FIXME: Not all relocations check for overflow! */
678
679static void
680h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr,
681 dst_ptr)
682 bfd *abfd;
683 struct bfd_link_info *link_info;
684 struct bfd_link_order *link_order;
685 arelent *reloc;
686 bfd_byte *data;
687 unsigned int *src_ptr;
688 unsigned int *dst_ptr;
689{
690 unsigned int src_address = *src_ptr;
691 unsigned int dst_address = *dst_ptr;
692 asection *input_section = link_order->u.indirect.section;
693 bfd_vma value;
694 bfd_vma dot;
cc040812 695 int gap, tmp;
252b5132
RH
696
697 switch (reloc->howto->type)
698 {
252b5132
RH
699 /* Generic 8bit pc-relative relocation. */
700 case R_PCRBYTE:
701 /* Get the address of the target of this branch. */
cc040812 702 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132 703
cc040812
NC
704 dot = (link_order->offset
705 + dst_address
252b5132
RH
706 + link_order->u.indirect.section->output_section->vma);
707
708 gap = value - dot;
709
710 /* Sanity check. */
711 if (gap < -128 || gap > 126)
712 {
713 if (! ((*link_info->callbacks->reloc_overflow)
714 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
715 reloc->howto->name, reloc->addend, input_section->owner,
716 input_section, reloc->address)))
717 abort ();
718 }
719
720 /* Everything looks OK. Apply the relocation and update the
721 src/dst address appropriately. */
722
723 bfd_put_8 (abfd, gap, data + dst_address);
724 dst_address++;
725 src_address++;
726
727 /* All done. */
728 break;
729
730 /* Generic 16bit pc-relative relocation. */
731 case R_PCRWORD:
732 /* Get the address of the target of this branch. */
cc040812 733 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
734
735 /* Get the address of the instruction (not the reloc). */
5fcfd273
KH
736 dot = (link_order->offset
737 + dst_address
252b5132
RH
738 + link_order->u.indirect.section->output_section->vma + 1);
739
740 gap = value - dot;
741
742 /* Sanity check. */
743 if (gap > 32766 || gap < -32768)
744 {
745 if (! ((*link_info->callbacks->reloc_overflow)
746 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
747 reloc->howto->name, reloc->addend, input_section->owner,
748 input_section, reloc->address)))
749 abort ();
750 }
751
752 /* Everything looks OK. Apply the relocation and update the
753 src/dst address appropriately. */
754
dc810e39 755 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
252b5132
RH
756 dst_address += 2;
757 src_address += 2;
758
759 /* All done. */
760 break;
761
762 /* Generic 8bit absolute relocation. */
763 case R_RELBYTE:
764 /* Get the address of the object referenced by this insn. */
765 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
766
767 /* Sanity check. */
768 if (value <= 0xff
769 || (value >= 0x0000ff00 && value <= 0x0000ffff)
bc7eab72 770 || (value >= 0x00ffff00 && value <= 0x00ffffff)
252b5132
RH
771 || (value >= 0xffffff00 && value <= 0xffffffff))
772 {
773 /* Everything looks OK. Apply the relocation and update the
774 src/dst address appropriately. */
775
776 bfd_put_8 (abfd, value & 0xff, data + dst_address);
777 dst_address += 1;
778 src_address += 1;
779 }
780 else
781 {
782 if (! ((*link_info->callbacks->reloc_overflow)
783 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
784 reloc->howto->name, reloc->addend, input_section->owner,
785 input_section, reloc->address)))
786 abort ();
787 }
788
789 /* All done. */
790 break;
791
792 /* Various simple 16bit absolute relocations. */
793 case R_MOV16B1:
794 case R_JMP1:
795 case R_RELWORD:
cc040812 796 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
797 bfd_put_16 (abfd, value, data + dst_address);
798 dst_address += 2;
799 src_address += 2;
800 break;
801
802 /* Various simple 24/32bit absolute relocations. */
803 case R_MOV24B1:
804 case R_MOVL1:
805 case R_RELLONG:
806 /* Get the address of the target of this branch. */
cc040812 807 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
808 bfd_put_32 (abfd, value, data + dst_address);
809 dst_address += 4;
810 src_address += 4;
811 break;
812
813 /* Another 24/32bit absolute relocation. */
814 case R_JMPL1:
815 /* Get the address of the target of this branch. */
816 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
817
818 value = ((value & 0x00ffffff)
819 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
820 bfd_put_32 (abfd, value, data + dst_address);
821 dst_address += 4;
822 src_address += 4;
823 break;
824
825 /* A 16bit abolute relocation that was formerlly a 24/32bit
826 absolute relocation. */
827 case R_MOVL2:
828 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
829
830 /* Sanity check. */
003e46d0 831 if (value <= 0x7fff || value >= 0xff8000)
252b5132
RH
832 {
833 /* Insert the 16bit value into the proper location. */
834 bfd_put_16 (abfd, value, data + dst_address);
835
836 /* Fix the opcode. For all the move insns, we simply
837 need to turn off bit 0x20 in the previous byte. */
bc7eab72 838 data[dst_address - 1] &= ~0x20;
252b5132
RH
839 dst_address += 2;
840 src_address += 4;
841 }
842 else
843 {
844 if (! ((*link_info->callbacks->reloc_overflow)
845 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
846 reloc->howto->name, reloc->addend, input_section->owner,
847 input_section, reloc->address)))
848 abort ();
bc7eab72 849 }
252b5132
RH
850 break;
851
852 /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */
853 case R_JMP2:
854 /* Get the address of the target of this branch. */
855 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
856
857 /* Get the address of the next instruction. */
858 dot = (link_order->offset
859 + dst_address
860 + link_order->u.indirect.section->output_section->vma + 1);
861
862 gap = value - dot;
863
864 /* Sanity check. */
865 if (gap < -128 || gap > 126)
866 {
867 if (! ((*link_info->callbacks->reloc_overflow)
868 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
869 reloc->howto->name, reloc->addend, input_section->owner,
870 input_section, reloc->address)))
871 abort ();
872 }
873
874 /* Now fix the instruction itself. */
875 switch (data[dst_address - 1])
876 {
877 case 0x5e:
878 /* jsr -> bsr */
879 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
880 break;
881 case 0x5a:
882 /* jmp ->bra */
883 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
884 break;
885
886 default:
887 abort ();
888 }
889
890 /* Write out the 8bit value. */
891 bfd_put_8 (abfd, gap, data + dst_address);
892
893 dst_address += 1;
894 src_address += 3;
895
896 break;
897
898 /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */
899 case R_PCRWORD_B:
900 /* Get the address of the target of this branch. */
901 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
902
903 /* Get the address of the instruction (not the reloc). */
904 dot = (link_order->offset
905 + dst_address
906 + link_order->u.indirect.section->output_section->vma - 1);
907
908 gap = value - dot;
909
910 /* Sanity check. */
911 if (gap < -128 || gap > 126)
912 {
913 if (! ((*link_info->callbacks->reloc_overflow)
914 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
915 reloc->howto->name, reloc->addend, input_section->owner,
916 input_section, reloc->address)))
917 abort ();
918 }
919
920 /* Now fix the instruction. */
921 switch (data[dst_address - 2])
922 {
923 case 0x58:
924 /* bCC:16 -> bCC:8 */
925 /* Get the condition code from the original insn. */
926 tmp = data[dst_address - 1];
927 tmp &= 0xf0;
928 tmp >>= 4;
929
930 /* Now or in the high nibble of the opcode. */
931 tmp |= 0x40;
932
933 /* Write it. */
934 bfd_put_8 (abfd, tmp, data + dst_address - 2);
935 break;
d562d2fb 936
4259e8b6
JL
937 case 0x5c:
938 /* bsr:16 -> bsr:8 */
939 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
940 break;
252b5132
RH
941
942 default:
943 abort ();
944 }
945
bc7eab72
KH
946 /* Output the target. */
947 bfd_put_8 (abfd, gap, data + dst_address - 1);
252b5132 948
bc7eab72
KH
949 /* We don't advance dst_address -- the 8bit reloc is applied at
950 dst_address - 1, so the next insn should begin at dst_address. */
951 src_address += 2;
252b5132 952
bc7eab72 953 break;
5fcfd273 954
252b5132
RH
955 /* Similarly for a 24bit absolute that is now 8 bits. */
956 case R_JMPL2:
957 /* Get the address of the target of this branch. */
958 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
959
960 /* Get the address of the instruction (not the reloc). */
961 dot = (link_order->offset
962 + dst_address
963 + link_order->u.indirect.section->output_section->vma + 2);
964
965 gap = value - dot;
966
967 /* Fix the instruction. */
968 switch (data[src_address])
969 {
970 case 0x5e:
971 /* jsr -> bsr */
972 bfd_put_8 (abfd, 0x55, data + dst_address);
973 break;
974 case 0x5a:
975 /* jmp ->bra */
976 bfd_put_8 (abfd, 0x40, data + dst_address);
977 break;
978 default:
979 abort ();
980 }
981
982 bfd_put_8 (abfd, gap, data + dst_address + 1);
983 dst_address += 2;
984 src_address += 4;
985
986 break;
987
988 /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */
989 case R_MOV16B2:
990 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
991
992 /* Sanity check. */
993 if (data[dst_address - 2] != 0x6a)
994 abort ();
995
996 /* Fix up the opcode. */
cc040812 997 switch (data[src_address - 1] & 0xf0)
252b5132
RH
998 {
999 case 0x00:
cc040812 1000 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
252b5132
RH
1001 break;
1002 case 0x80:
cc040812 1003 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
252b5132
RH
1004 break;
1005 default:
1006 abort ();
1007 }
1008
1009 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1010 src_address += 2;
1011 break;
1012
1013 /* Similarly for a 24bit mov.b */
1014 case R_MOV24B2:
1015 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1016
1017 /* Sanity check. */
1018 if (data[dst_address - 2] != 0x6a)
1019 abort ();
1020
1021 /* Fix up the opcode. */
cc040812 1022 switch (data[src_address - 1] & 0xf0)
252b5132
RH
1023 {
1024 case 0x20:
cc040812 1025 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
252b5132
RH
1026 break;
1027 case 0xa0:
cc040812 1028 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
252b5132
RH
1029 break;
1030 default:
1031 abort ();
1032 }
1033
1034 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1035 src_address += 4;
1036 break;
1037
1038 case R_BCC_INV:
1039 /* Get the address of the target of this branch. */
cc040812 1040 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132 1041
cc040812
NC
1042 dot = (link_order->offset
1043 + dst_address
252b5132
RH
1044 + link_order->u.indirect.section->output_section->vma) + 1;
1045
1046 gap = value - dot;
1047
1048 /* Sanity check. */
1049 if (gap < -128 || gap > 126)
1050 {
1051 if (! ((*link_info->callbacks->reloc_overflow)
1052 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1053 reloc->howto->name, reloc->addend, input_section->owner,
1054 input_section, reloc->address)))
1055 abort ();
1056 }
1057
1058 /* Everything looks OK. Fix the condition in the instruction, apply
1059 the relocation, and update the src/dst address appropriately. */
1060
1061 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1062 data + dst_address - 1);
1063 bfd_put_8 (abfd, gap, data + dst_address);
1064 dst_address++;
1065 src_address++;
1066
1067 /* All done. */
1068 break;
1069
1070 case R_JMP_DEL:
1071 src_address += 4;
1072 break;
1073
1074 /* An 8bit memory indirect instruction (jmp/jsr).
1075
1076 There's several things that need to be done to handle
1077 this relocation.
1078
1079 If this is a reloc against the absolute symbol, then
1080 we should handle it just R_RELBYTE. Likewise if it's
1081 for a symbol with a value ge 0 and le 0xff.
1082
1083 Otherwise it's a jump/call through the function vector,
1084 and the linker is expected to set up the function vector
1085 and put the right value into the jump/call instruction. */
1086 case R_MEM_INDIRECT:
1087 {
1088 /* We need to find the symbol so we can determine it's
1089 address in the function vector table. */
1090 asymbol *symbol;
252b5132 1091 const char *name;
dc810e39 1092 struct funcvec_hash_table *ftab;
252b5132
RH
1093 struct funcvec_hash_entry *h;
1094 asection *vectors_sec = h8300_coff_hash_table (link_info)->vectors_sec;
1095
1096 /* First see if this is a reloc against the absolute symbol
1097 or against a symbol with a nonnegative value <= 0xff. */
1098 symbol = *(reloc->sym_ptr_ptr);
1099 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1100 if (symbol == bfd_abs_section_ptr->symbol
5f771d47 1101 || value <= 0xff)
252b5132
RH
1102 {
1103 /* This should be handled in a manner very similar to
1104 R_RELBYTES. If the value is in range, then just slam
1105 the value into the right location. Else trigger a
1106 reloc overflow callback. */
5f771d47 1107 if (value <= 0xff)
252b5132
RH
1108 {
1109 bfd_put_8 (abfd, value, data + dst_address);
1110 dst_address += 1;
1111 src_address += 1;
1112 }
1113 else
1114 {
1115 if (! ((*link_info->callbacks->reloc_overflow)
1116 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1117 reloc->howto->name, reloc->addend, input_section->owner,
1118 input_section, reloc->address)))
1119 abort ();
1120 }
1121 break;
1122 }
1123
1124 /* This is a jump/call through a function vector, and we're
5fcfd273 1125 expected to create the function vector ourselves.
252b5132
RH
1126
1127 First look up this symbol in the linker hash table -- we need
1128 the derived linker symbol which holds this symbol's index
1129 in the function vector. */
1130 name = symbol->name;
1131 if (symbol->flags & BSF_LOCAL)
1132 {
dc810e39 1133 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
252b5132
RH
1134 if (new_name == NULL)
1135 abort ();
1136
1137 strcpy (new_name, name);
1138 sprintf (new_name + strlen (name), "_%08x",
cc040812 1139 (int) symbol->section);
252b5132
RH
1140 name = new_name;
1141 }
1142
dc810e39 1143 ftab = h8300_coff_hash_table (link_info)->funcvec_hash_table;
b34976b6 1144 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
252b5132
RH
1145
1146 /* This shouldn't ever happen. If it does that means we've got
1147 data corruption of some kind. Aborting seems like a reasonable
1148 think to do here. */
1149 if (h == NULL || vectors_sec == NULL)
1150 abort ();
1151
1152 /* Place the address of the function vector entry into the
1153 reloc's address. */
1154 bfd_put_8 (abfd,
1155 vectors_sec->output_offset + h->offset,
1156 data + dst_address);
1157
1158 dst_address++;
1159 src_address++;
1160
1161 /* Now create an entry in the function vector itself. */
1162 if (bfd_get_mach (input_section->owner) == bfd_mach_h8300)
1163 bfd_put_16 (abfd,
1164 bfd_coff_reloc16_get_value (reloc,
1165 link_info,
1166 input_section),
1167 vectors_sec->contents + h->offset);
1168 else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h
1169 || bfd_get_mach (input_section->owner) == bfd_mach_h8300s)
1170 bfd_put_32 (abfd,
1171 bfd_coff_reloc16_get_value (reloc,
1172 link_info,
1173 input_section),
1174 vectors_sec->contents + h->offset);
1175 else
1176 abort ();
1177
1178 /* Gross. We've already written the contents of the vector section
1179 before we get here... So we write it again with the new data. */
1180 bfd_set_section_contents (vectors_sec->output_section->owner,
1181 vectors_sec->output_section,
1182 vectors_sec->contents,
dc810e39 1183 (file_ptr) vectors_sec->output_offset,
252b5132
RH
1184 vectors_sec->_raw_size);
1185 break;
1186 }
1187
1188 default:
1189 abort ();
1190 break;
1191
1192 }
1193
1194 *src_ptr = src_address;
1195 *dst_ptr = dst_address;
1196}
1197
252b5132
RH
1198/* Routine for the h8300 linker.
1199
1200 This routine is necessary to handle the special R_MEM_INDIRECT
1201 relocs on the h8300. It's responsible for generating a vectors
1202 section and attaching it to an input bfd as well as sizing
1203 the vectors section. It also creates our vectors hash table.
1204
1205 It uses the generic linker routines to actually add the symbols.
1206 from this BFD to the bfd linker hash table. It may add a few
1207 selected static symbols to the bfd linker hash table. */
1208
b34976b6 1209static bfd_boolean
cc040812 1210h8300_bfd_link_add_symbols (abfd, info)
252b5132
RH
1211 bfd *abfd;
1212 struct bfd_link_info *info;
1213{
1214 asection *sec;
1215 struct funcvec_hash_table *funcvec_hash_table;
dc810e39 1216 bfd_size_type amt;
252b5132
RH
1217
1218 /* If we haven't created a vectors section, do so now. */
1219 if (!h8300_coff_hash_table (info)->vectors_sec)
1220 {
1221 flagword flags;
1222
1223 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1224 flags = (SEC_ALLOC | SEC_LOAD
1225 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1226 h8300_coff_hash_table (info)->vectors_sec = bfd_make_section (abfd,
1227 ".vectors");
1228
1229 /* If the section wasn't created, or we couldn't set the flags,
1230 quit quickly now, rather than dieing a painful death later. */
1231 if (! h8300_coff_hash_table (info)->vectors_sec
1232 || ! bfd_set_section_flags (abfd,
1233 h8300_coff_hash_table(info)->vectors_sec,
1234 flags))
b34976b6 1235 return FALSE;
252b5132
RH
1236
1237 /* Also create the vector hash table. */
dc810e39
AM
1238 amt = sizeof (struct funcvec_hash_table);
1239 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
252b5132
RH
1240
1241 if (!funcvec_hash_table)
b34976b6 1242 return FALSE;
252b5132
RH
1243
1244 /* And initialize the funcvec hash table. */
1245 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1246 funcvec_hash_newfunc))
1247 {
1248 bfd_release (abfd, funcvec_hash_table);
b34976b6 1249 return FALSE;
252b5132
RH
1250 }
1251
1252 /* Store away a pointer to the funcvec hash table. */
1253 h8300_coff_hash_table (info)->funcvec_hash_table = funcvec_hash_table;
1254 }
1255
1256 /* Load up the function vector hash table. */
1257 funcvec_hash_table = h8300_coff_hash_table (info)->funcvec_hash_table;
1258
1259 /* Add the symbols using the generic code. */
1260 _bfd_generic_link_add_symbols (abfd, info);
1261
1262 /* Now scan the relocs for all the sections in this bfd; create
1263 additional space in the .vectors section as needed. */
1264 for (sec = abfd->sections; sec; sec = sec->next)
1265 {
1266 long reloc_size, reloc_count, i;
1267 asymbol **symbols;
1268 arelent **relocs;
1269
1270 /* Suck in the relocs, symbols & canonicalize them. */
1271 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1272 if (reloc_size <= 0)
1273 continue;
1274
dc810e39 1275 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
252b5132 1276 if (!relocs)
b34976b6 1277 return FALSE;
252b5132
RH
1278
1279 /* The symbols should have been read in by _bfd_generic link_add_symbols
1280 call abovec, so we can cheat and use the pointer to them that was
1281 saved in the above call. */
1282 symbols = _bfd_generic_link_get_symbols(abfd);
1283 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1284 if (reloc_count <= 0)
1285 {
1286 free (relocs);
1287 continue;
1288 }
1289
1290 /* Now walk through all the relocations in this section. */
1291 for (i = 0; i < reloc_count; i++)
1292 {
1293 arelent *reloc = relocs[i];
1294 asymbol *symbol = *(reloc->sym_ptr_ptr);
1295 const char *name;
1296
1297 /* We've got an indirect reloc. See if we need to add it
1298 to the function vector table. At this point, we have
1299 to add a new entry for each unique symbol referenced
1300 by an R_MEM_INDIRECT relocation except for a reloc
1301 against the absolute section symbol. */
1302 if (reloc->howto->type == R_MEM_INDIRECT
1303 && symbol != bfd_abs_section_ptr->symbol)
1304
1305 {
dc810e39 1306 struct funcvec_hash_table *ftab;
252b5132
RH
1307 struct funcvec_hash_entry *h;
1308
1309 name = symbol->name;
1310 if (symbol->flags & BSF_LOCAL)
1311 {
dc810e39 1312 char *new_name;
252b5132 1313
dc810e39 1314 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
252b5132
RH
1315 if (new_name == NULL)
1316 abort ();
1317
1318 strcpy (new_name, name);
1319 sprintf (new_name + strlen (name), "_%08x",
cc040812 1320 (int) symbol->section);
252b5132
RH
1321 name = new_name;
1322 }
1323
1324 /* Look this symbol up in the function vector hash table. */
dc810e39 1325 ftab = h8300_coff_hash_table (info)->funcvec_hash_table;
b34976b6 1326 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
252b5132 1327
252b5132
RH
1328 /* If this symbol isn't already in the hash table, add
1329 it and bump up the size of the hash table. */
1330 if (h == NULL)
1331 {
b34976b6 1332 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE);
252b5132
RH
1333 if (h == NULL)
1334 {
1335 free (relocs);
b34976b6 1336 return FALSE;
252b5132
RH
1337 }
1338
1339 /* Bump the size of the vectors section. Each vector
1340 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1341 if (bfd_get_mach (abfd) == bfd_mach_h8300)
1342 h8300_coff_hash_table (info)->vectors_sec->_raw_size += 2;
1343 else if (bfd_get_mach (abfd) == bfd_mach_h8300h
1344 || bfd_get_mach (abfd) == bfd_mach_h8300s)
1345 h8300_coff_hash_table (info)->vectors_sec->_raw_size += 4;
1346 }
1347 }
1348 }
1349
1350 /* We're done with the relocations, release them. */
1351 free (relocs);
1352 }
1353
1354 /* Now actually allocate some space for the function vector. It's
1355 wasteful to do this more than once, but this is easier. */
dc810e39
AM
1356 sec = h8300_coff_hash_table (info)->vectors_sec;
1357 if (sec->_raw_size != 0)
252b5132
RH
1358 {
1359 /* Free the old contents. */
dc810e39
AM
1360 if (sec->contents)
1361 free (sec->contents);
252b5132
RH
1362
1363 /* Allocate new contents. */
dc810e39 1364 sec->contents = bfd_malloc (sec->_raw_size);
252b5132
RH
1365 }
1366
b34976b6 1367 return TRUE;
252b5132
RH
1368}
1369
1370#define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1371#define coff_reloc16_estimate h8300_reloc16_estimate
1372#define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1373#define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1374
1375#define COFF_LONG_FILENAMES
1376#include "coffcode.h"
1377
252b5132
RH
1378#undef coff_bfd_get_relocated_section_contents
1379#undef coff_bfd_relax_section
1380#define coff_bfd_get_relocated_section_contents \
1381 bfd_coff_reloc16_get_relocated_section_contents
1382#define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1383
c3c89269 1384CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL)
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