Touches most files in bfd/, so likely will be blamed for everything..
[deliverable/binutils-gdb.git] / bfd / coff-h8300.c
CommitLineData
252b5132 1/* BFD back-end for Hitachi H8/300 COFF binaries.
7898deda 2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
f4ffd778 3 2000, 2001
5f771d47 4 Free Software Foundation, Inc.
252b5132
RH
5 Written by Steve Chamberlain, <sac@cygnus.com>.
6
7This file is part of BFD, the Binary File Descriptor library.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2 of the License, or
12(at your option) any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
20along with this program; if not, write to the Free Software
21Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22
23#include "bfd.h"
24#include "sysdep.h"
25#include "libbfd.h"
26#include "bfdlink.h"
27#include "genlink.h"
28#include "coff/h8300.h"
29#include "coff/internal.h"
30#include "libcoff.h"
31
32#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
33
34/* We derive a hash table from the basic BFD hash table to
5fcfd273 35 hold entries in the function vector. Aside from the
252b5132
RH
36 info stored by the basic hash table, we need the offset
37 of a particular entry within the hash table as well as
38 the offset where we'll add the next entry. */
39
40struct funcvec_hash_entry
f4ffd778
NC
41 {
42 /* The basic hash table entry. */
43 struct bfd_hash_entry root;
252b5132 44
f4ffd778
NC
45 /* The offset within the vectors section where
46 this entry lives. */
47 bfd_vma offset;
48 };
252b5132
RH
49
50struct funcvec_hash_table
f4ffd778
NC
51 {
52 /* The basic hash table. */
53 struct bfd_hash_table root;
252b5132 54
f4ffd778 55 bfd *abfd;
252b5132 56
f4ffd778
NC
57 /* Offset at which we'll add the next entry. */
58 unsigned int offset;
59 };
252b5132
RH
60
61static struct bfd_hash_entry *
62funcvec_hash_newfunc
63 PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
64
65static boolean
66funcvec_hash_table_init
67 PARAMS ((struct funcvec_hash_table *, bfd *,
68 struct bfd_hash_entry *(*) PARAMS ((struct bfd_hash_entry *,
69 struct bfd_hash_table *,
70 const char *))));
71
f4ffd778
NC
72static bfd_reloc_status_type special PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
73static int select_reloc PARAMS ((reloc_howto_type *));
74static void rtype2howto PARAMS ((arelent *, struct internal_reloc *));
75static void reloc_processing PARAMS ((arelent *, struct internal_reloc *, asymbol **, bfd *, asection *));
76static boolean h8300_symbol_address_p PARAMS ((bfd *, asection *, bfd_vma));
77static int h8300_reloc16_estimate PARAMS ((bfd *, asection *, arelent *, unsigned int, struct bfd_link_info *));
78static void h8300_reloc16_extra_cases PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *, bfd_byte *, unsigned int *, unsigned int *));
79static boolean h8300_bfd_link_add_symbols PARAMS ((bfd *, struct bfd_link_info *));
80
252b5132
RH
81/* To lookup a value in the function vector hash table. */
82#define funcvec_hash_lookup(table, string, create, copy) \
83 ((struct funcvec_hash_entry *) \
84 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
85
86/* The derived h8300 COFF linker table. Note it's derived from
87 the generic linker hash table, not the COFF backend linker hash
88 table! We use this to attach additional data structures we
89 need while linking on the h8300. */
90struct h8300_coff_link_hash_table
91{
92 /* The main hash table. */
93 struct generic_link_hash_table root;
94
95 /* Section for the vectors table. This gets attached to a
96 random input bfd, we keep it here for easy access. */
97 asection *vectors_sec;
98
99 /* Hash table of the functions we need to enter into the function
100 vector. */
101 struct funcvec_hash_table *funcvec_hash_table;
102};
103
104static struct bfd_link_hash_table *h8300_coff_link_hash_table_create
105 PARAMS ((bfd *));
106
107/* Get the H8/300 COFF linker hash table from a link_info structure. */
108
109#define h8300_coff_hash_table(p) \
110 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
111
112/* Initialize fields within a funcvec hash table entry. Called whenever
113 a new entry is added to the funcvec hash table. */
114
115static struct bfd_hash_entry *
116funcvec_hash_newfunc (entry, gen_table, string)
117 struct bfd_hash_entry *entry;
118 struct bfd_hash_table *gen_table;
119 const char *string;
120{
121 struct funcvec_hash_entry *ret;
122 struct funcvec_hash_table *table;
123
124 ret = (struct funcvec_hash_entry *) entry;
125 table = (struct funcvec_hash_table *) gen_table;
126
127 /* Allocate the structure if it has not already been allocated by a
128 subclass. */
129 if (ret == NULL)
130 ret = ((struct funcvec_hash_entry *)
131 bfd_hash_allocate (gen_table,
132 sizeof (struct funcvec_hash_entry)));
133 if (ret == NULL)
134 return NULL;
135
136 /* Call the allocation method of the superclass. */
137 ret = ((struct funcvec_hash_entry *)
138 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
139
140 if (ret == NULL)
141 return NULL;
142
143 /* Note where this entry will reside in the function vector table. */
144 ret->offset = table->offset;
145
146 /* Bump the offset at which we store entries in the function
147 vector. We'd like to bump up the size of the vectors section,
148 but it's not easily available here. */
149 if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
150 table->offset += 2;
151 else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
152 || bfd_get_mach (table->abfd) == bfd_mach_h8300s)
153 table->offset += 4;
154 else
155 return NULL;
156
157 /* Everything went OK. */
158 return (struct bfd_hash_entry *) ret;
159}
160
161/* Initialize the function vector hash table. */
162
163static boolean
164funcvec_hash_table_init (table, abfd, newfunc)
165 struct funcvec_hash_table *table;
166 bfd *abfd;
167 struct bfd_hash_entry *(*newfunc) PARAMS ((struct bfd_hash_entry *,
168 struct bfd_hash_table *,
169 const char *));
170{
171 /* Initialize our local fields, then call the generic initialization
172 routine. */
173 table->offset = 0;
174 table->abfd = abfd;
175 return (bfd_hash_table_init (&table->root, newfunc));
176}
177
178/* Create the derived linker hash table. We use a derived hash table
179 basically to hold "static" information during an h8/300 coff link
180 without using static variables. */
181
182static struct bfd_link_hash_table *
183h8300_coff_link_hash_table_create (abfd)
184 bfd *abfd;
185{
186 struct h8300_coff_link_hash_table *ret;
dc810e39
AM
187 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
188
189 ret = (struct h8300_coff_link_hash_table *) bfd_alloc (abfd, amt);
252b5132
RH
190 if (ret == NULL)
191 return NULL;
dc810e39
AM
192 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
193 _bfd_generic_link_hash_newfunc))
252b5132
RH
194 {
195 bfd_release (abfd, ret);
196 return NULL;
197 }
198
199 /* Initialize our data. */
200 ret->vectors_sec = NULL;
201 ret->funcvec_hash_table = NULL;
202
203 /* OK. Everything's intialized, return the base pointer. */
204 return &ret->root.root;
205}
206
cc040812 207/* Special handling for H8/300 relocs.
252b5132
RH
208 We only come here for pcrel stuff and return normally if not an -r link.
209 When doing -r, we can't do any arithmetic for the pcrel stuff, because
210 the code in reloc.c assumes that we can manipulate the targets of
5fcfd273 211 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
252b5132 212 which means that the gap after the instruction may not be enough to
d562d2fb 213 contain the offset required for the branch, so we have to use only
cc040812 214 the addend until the final link. */
252b5132
RH
215
216static bfd_reloc_status_type
217special (abfd, reloc_entry, symbol, data, input_section, output_bfd,
cc040812 218 error_message)
5f771d47
ILT
219 bfd *abfd ATTRIBUTE_UNUSED;
220 arelent *reloc_entry ATTRIBUTE_UNUSED;
221 asymbol *symbol ATTRIBUTE_UNUSED;
222 PTR data ATTRIBUTE_UNUSED;
223 asection *input_section ATTRIBUTE_UNUSED;
252b5132 224 bfd *output_bfd;
5f771d47 225 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH
226{
227 if (output_bfd == (bfd *) NULL)
228 return bfd_reloc_continue;
229
d562d2fb
AM
230 /* Adjust the reloc address to that in the output section. */
231 reloc_entry->address += input_section->output_offset;
252b5132
RH
232 return bfd_reloc_ok;
233}
234
235static reloc_howto_type howto_table[] =
236{
237 HOWTO (R_RELBYTE, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8", false, 0x000000ff, 0x000000ff, false),
238 HOWTO (R_RELWORD, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "16", false, 0x0000ffff, 0x0000ffff, false),
239 HOWTO (R_RELLONG, 0, 2, 32, false, 0, complain_overflow_bitfield, special, "32", false, 0xffffffff, 0xffffffff, false),
240 HOWTO (R_PCRBYTE, 0, 0, 8, true, 0, complain_overflow_signed, special, "DISP8", false, 0x000000ff, 0x000000ff, true),
241 HOWTO (R_PCRWORD, 0, 1, 16, true, 0, complain_overflow_signed, special, "DISP16", false, 0x0000ffff, 0x0000ffff, true),
242 HOWTO (R_PCRLONG, 0, 2, 32, true, 0, complain_overflow_signed, special, "DISP32", false, 0xffffffff, 0xffffffff, true),
243 HOWTO (R_MOV16B1, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", false, 0x0000ffff, 0x0000ffff, false),
244 HOWTO (R_MOV16B2, 0, 1, 8, false, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", false, 0x000000ff, 0x000000ff, false),
245 HOWTO (R_JMP1, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "16/pcrel", false, 0x0000ffff, 0x0000ffff, false),
246 HOWTO (R_JMP2, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "pcrecl/16", false, 0x000000ff, 0x000000ff, false),
247 HOWTO (R_JMPL1, 0, 2, 32, false, 0, complain_overflow_bitfield, special, "24/pcrell", false, 0x00ffffff, 0x00ffffff, false),
248 HOWTO (R_JMPL2, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "pc8/24", false, 0x000000ff, 0x000000ff, false),
249 HOWTO (R_MOV24B1, 0, 1, 32, false, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", false, 0xffffffff, 0xffffffff, false),
250 HOWTO (R_MOV24B2, 0, 1, 8, false, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", false, 0x0000ffff, 0x0000ffff, false),
251
252 /* An indirect reference to a function. This causes the function's address
253 to be added to the function vector in lo-mem and puts the address of
254 the function vector's entry in the jsr instruction. */
255 HOWTO (R_MEM_INDIRECT, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8/indirect", false, 0x000000ff, 0x000000ff, false),
256
257 /* Internal reloc for relaxing. This is created when a 16bit pc-relative
258 branch is turned into an 8bit pc-relative branch. */
259 HOWTO (R_PCRWORD_B, 0, 0, 8, true, 0, complain_overflow_bitfield, special, "relaxed bCC:16", false, 0x000000ff, 0x000000ff, false),
260
261 HOWTO (R_MOVL1, 0, 2, 32, false, 0, complain_overflow_bitfield,special, "32/24 relaxable move", false, 0xffffffff, 0xffffffff, false),
262
263 HOWTO (R_MOVL2, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "32/24 relaxed move", false, 0x0000ffff, 0x0000ffff, false),
264
265 HOWTO (R_BCC_INV, 0, 0, 8, true, 0, complain_overflow_signed, special, "DISP8 inverted", false, 0x000000ff, 0x000000ff, true),
266
267 HOWTO (R_JMP_DEL, 0, 0, 8, true, 0, complain_overflow_signed, special, "Deleted jump", false, 0x000000ff, 0x000000ff, true),
268};
269
cc040812 270/* Turn a howto into a reloc number. */
252b5132
RH
271
272#define SELECT_RELOC(x,howto) \
273 { x.r_type = select_reloc(howto); }
274
275#define BADMAG(x) (H8300BADMAG(x) && H8300HBADMAG(x) && H8300SBADMAG(x))
276#define H8300 1 /* Customize coffcode.h */
277#define __A_MAGIC_SET__
278
cc040812 279/* Code to swap in the reloc. */
dc810e39
AM
280#define SWAP_IN_RELOC_OFFSET H_GET_32
281#define SWAP_OUT_RELOC_OFFSET H_PUT_32
252b5132
RH
282#define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
283 dst->r_stuff[0] = 'S'; \
284 dst->r_stuff[1] = 'C';
285
252b5132
RH
286static int
287select_reloc (howto)
288 reloc_howto_type *howto;
289{
290 return howto->type;
291}
292
cc040812 293/* Code to turn a r_type into a howto ptr, uses the above howto table. */
252b5132
RH
294
295static void
296rtype2howto (internal, dst)
297 arelent *internal;
298 struct internal_reloc *dst;
299{
300 switch (dst->r_type)
301 {
302 case R_RELBYTE:
303 internal->howto = howto_table + 0;
304 break;
305 case R_RELWORD:
306 internal->howto = howto_table + 1;
307 break;
308 case R_RELLONG:
309 internal->howto = howto_table + 2;
310 break;
311 case R_PCRBYTE:
312 internal->howto = howto_table + 3;
313 break;
314 case R_PCRWORD:
315 internal->howto = howto_table + 4;
316 break;
317 case R_PCRLONG:
318 internal->howto = howto_table + 5;
319 break;
320 case R_MOV16B1:
321 internal->howto = howto_table + 6;
322 break;
323 case R_MOV16B2:
324 internal->howto = howto_table + 7;
325 break;
326 case R_JMP1:
327 internal->howto = howto_table + 8;
328 break;
329 case R_JMP2:
330 internal->howto = howto_table + 9;
331 break;
332 case R_JMPL1:
333 internal->howto = howto_table + 10;
334 break;
335 case R_JMPL2:
336 internal->howto = howto_table + 11;
337 break;
338 case R_MOV24B1:
339 internal->howto = howto_table + 12;
340 break;
341 case R_MOV24B2:
342 internal->howto = howto_table + 13;
343 break;
344 case R_MEM_INDIRECT:
345 internal->howto = howto_table + 14;
346 break;
347 case R_PCRWORD_B:
348 internal->howto = howto_table + 15;
349 break;
350 case R_MOVL1:
351 internal->howto = howto_table + 16;
352 break;
353 case R_MOVL2:
354 internal->howto = howto_table + 17;
355 break;
356 case R_BCC_INV:
357 internal->howto = howto_table + 18;
358 break;
359 case R_JMP_DEL:
360 internal->howto = howto_table + 19;
361 break;
362 default:
363 abort ();
364 break;
365 }
366}
367
368#define RTYPE2HOWTO(internal, relocentry) rtype2howto(internal,relocentry)
369
cc040812 370/* Perform any necessary magic to the addend in a reloc entry. */
252b5132
RH
371
372#define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
373 cache_ptr->addend = ext_reloc.r_offset;
374
252b5132
RH
375#define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
376 reloc_processing(relent, reloc, symbols, abfd, section)
377
378static void
379reloc_processing (relent, reloc, symbols, abfd, section)
cc040812 380 arelent *relent;
252b5132 381 struct internal_reloc *reloc;
cc040812
NC
382 asymbol **symbols;
383 bfd *abfd;
384 asection *section;
252b5132
RH
385{
386 relent->address = reloc->r_vaddr;
387 rtype2howto (relent, reloc);
388
389 if (((int) reloc->r_symndx) > 0)
390 {
391 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
392 }
393 else
394 {
395 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
396 }
397
252b5132
RH
398 relent->addend = reloc->r_offset;
399
400 relent->address -= section->vma;
cc040812
NC
401#if 0
402 relent->section = 0;
403#endif
252b5132
RH
404}
405
406static boolean
407h8300_symbol_address_p (abfd, input_section, address)
408 bfd *abfd;
409 asection *input_section;
410 bfd_vma address;
411{
412 asymbol **s;
413
414 s = _bfd_generic_link_get_symbols (abfd);
415 BFD_ASSERT (s != (asymbol **) NULL);
416
417 /* Search all the symbols for one in INPUT_SECTION with
418 address ADDRESS. */
cc040812 419 while (*s)
252b5132
RH
420 {
421 asymbol *p = *s;
422 if (p->section == input_section
423 && (input_section->output_section->vma
424 + input_section->output_offset
425 + p->value) == address)
426 return true;
427 s++;
cc040812 428 }
252b5132
RH
429 return false;
430}
431
252b5132
RH
432/* If RELOC represents a relaxable instruction/reloc, change it into
433 the relaxed reloc, notify the linker that symbol addresses
434 have changed (bfd_perform_slip) and return how much the current
435 section has shrunk by.
436
437 FIXME: Much of this code has knowledge of the ordering of entries
438 in the howto table. This needs to be fixed. */
439
440static int
cc040812 441h8300_reloc16_estimate (abfd, input_section, reloc, shrink, link_info)
252b5132
RH
442 bfd *abfd;
443 asection *input_section;
444 arelent *reloc;
445 unsigned int shrink;
446 struct bfd_link_info *link_info;
447{
cc040812 448 bfd_vma value;
252b5132
RH
449 bfd_vma dot;
450 bfd_vma gap;
451 static asection *last_input_section = NULL;
452 static arelent *last_reloc = NULL;
453
5fcfd273 454 /* The address of the thing to be relocated will have moved back by
252b5132
RH
455 the size of the shrink - but we don't change reloc->address here,
456 since we need it to know where the relocation lives in the source
457 uncooked section. */
458 bfd_vma address = reloc->address - shrink;
459
460 if (input_section != last_input_section)
461 last_reloc = NULL;
462
463 /* Only examine the relocs which might be relaxable. */
464 switch (reloc->howto->type)
5fcfd273 465 {
252b5132
RH
466 /* This is the 16/24 bit absolute branch which could become an 8 bit
467 pc-relative branch. */
468 case R_JMP1:
469 case R_JMPL1:
470 /* Get the address of the target of this branch. */
cc040812 471 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
472
473 /* Get the address of the next instruction (not the reloc). */
474 dot = (input_section->output_section->vma
475 + input_section->output_offset + address);
476
477 /* Adjust for R_JMP1 vs R_JMPL1. */
478 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
479
480 /* Compute the distance from this insn to the branch target. */
481 gap = value - dot;
cc040812 482
252b5132
RH
483 /* If the distance is within -128..+128 inclusive, then we can relax
484 this jump. +128 is valid since the target will move two bytes
485 closer if we do relax this branch. */
486 if ((int)gap >= -128 && (int)gap <= 128 )
5fcfd273 487 {
252b5132
RH
488 /* It's possible we may be able to eliminate this branch entirely;
489 if the previous instruction is a branch around this instruction,
490 and there's no label at this instruction, then we can reverse
491 the condition on the previous branch and eliminate this jump.
492
493 original: new:
494 bCC lab1 bCC' lab2
495 jmp lab2
496 lab1: lab1:
5fcfd273 497
252b5132
RH
498 This saves 4 bytes instead of two, and should be relatively
499 common. */
500
501 if (gap <= 126
502 && last_reloc
503 && last_reloc->howto->type == R_PCRBYTE)
504 {
505 bfd_vma last_value;
506 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
507 input_section) + 1;
508
509 if (last_value == dot + 2
510 && last_reloc->address + 1 == reloc->address
cc040812 511 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
252b5132
RH
512 {
513 reloc->howto = howto_table + 19;
514 last_reloc->howto = howto_table + 18;
515 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
516 last_reloc->addend = reloc->addend;
517 shrink += 4;
518 bfd_perform_slip (abfd, 4, input_section, address);
519 break;
520 }
521 }
522
523 /* Change the reloc type. */
cc040812 524 reloc->howto = reloc->howto + 1;
252b5132
RH
525
526 /* This shrinks this section by two bytes. */
527 shrink += 2;
cc040812 528 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
529 }
530 break;
531
532 /* This is the 16 bit pc-relative branch which could become an 8 bit
533 pc-relative branch. */
534 case R_PCRWORD:
535 /* Get the address of the target of this branch, add one to the value
536 because the addend field in PCrel jumps is off by -1. */
cc040812
NC
537 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
538
252b5132
RH
539 /* Get the address of the next instruction if we were to relax. */
540 dot = input_section->output_section->vma +
541 input_section->output_offset + address;
cc040812 542
252b5132
RH
543 /* Compute the distance from this insn to the branch target. */
544 gap = value - dot;
545
546 /* If the distance is within -128..+128 inclusive, then we can relax
547 this jump. +128 is valid since the target will move two bytes
548 closer if we do relax this branch. */
549 if ((int)gap >= -128 && (int)gap <= 128 )
5fcfd273 550 {
252b5132
RH
551 /* Change the reloc type. */
552 reloc->howto = howto_table + 15;
553
554 /* This shrinks this section by two bytes. */
555 shrink += 2;
cc040812 556 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
557 }
558 break;
559
560 /* This is a 16 bit absolute address in a mov.b insn, which can
561 become an 8 bit absolute address if it's in the right range. */
562 case R_MOV16B1:
563 /* Get the address of the data referenced by this mov.b insn. */
cc040812 564 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
565
566 /* The address is in 0xff00..0xffff inclusive on the h8300 or
567 0xffff00..0xffffff inclusive on the h8300h, then we can
568 relax this mov.b */
569 if ((bfd_get_mach (abfd) == bfd_mach_h8300
570 && value >= 0xff00
571 && value <= 0xffff)
572 || ((bfd_get_mach (abfd) == bfd_mach_h8300h
573 || bfd_get_mach (abfd) == bfd_mach_h8300s)
574 && value >= 0xffff00
575 && value <= 0xffffff))
576 {
577 /* Change the reloc type. */
578 reloc->howto = reloc->howto + 1;
579
580 /* This shrinks this section by two bytes. */
581 shrink += 2;
cc040812 582 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
583 }
584 break;
585
586 /* Similarly for a 24 bit absolute address in a mov.b. Note that
587 if we can't relax this into an 8 bit absolute, we'll fall through
588 and try to relax it into a 16bit absolute. */
589 case R_MOV24B1:
590 /* Get the address of the data referenced by this mov.b insn. */
cc040812 591 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
592
593 /* The address is in 0xffff00..0xffffff inclusive on the h8300h,
594 then we can relax this mov.b */
595 if ((bfd_get_mach (abfd) == bfd_mach_h8300h
596 || bfd_get_mach (abfd) == bfd_mach_h8300s)
597 && value >= 0xffff00
598 && value <= 0xffffff)
599 {
600 /* Change the reloc type. */
601 reloc->howto = reloc->howto + 1;
602
603 /* This shrinks this section by four bytes. */
604 shrink += 4;
cc040812 605 bfd_perform_slip (abfd, 4, input_section, address);
252b5132
RH
606
607 /* Done with this reloc. */
608 break;
609 }
610
611 /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit
612 reloc. */
613
614 /* This is a 24/32 bit absolute address in a mov insn, which can
615 become an 16 bit absolute address if it's in the right range. */
616 case R_MOVL1:
617 /* Get the address of the data referenced by this mov insn. */
cc040812 618 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
619
620 /* If this address is in 0x0000..0x7fff inclusive or
621 0xff8000..0xffffff inclusive, then it can be relaxed. */
622 if (value <= 0x7fff || value >= 0xff8000)
623 {
624 /* Change the reloc type. */
625 reloc->howto = howto_table + 17;
626
627 /* This shrinks this section by two bytes. */
628 shrink += 2;
cc040812 629 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
630 }
631 break;
632
633 /* No other reloc types represent relaxing opportunities. */
cc040812
NC
634 default:
635 break;
252b5132
RH
636 }
637
638 last_reloc = reloc;
639 last_input_section = input_section;
640 return shrink;
641}
642
252b5132
RH
643/* Handle relocations for the H8/300, including relocs for relaxed
644 instructions.
645
646 FIXME: Not all relocations check for overflow! */
647
648static void
649h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr,
650 dst_ptr)
651 bfd *abfd;
652 struct bfd_link_info *link_info;
653 struct bfd_link_order *link_order;
654 arelent *reloc;
655 bfd_byte *data;
656 unsigned int *src_ptr;
657 unsigned int *dst_ptr;
658{
659 unsigned int src_address = *src_ptr;
660 unsigned int dst_address = *dst_ptr;
661 asection *input_section = link_order->u.indirect.section;
662 bfd_vma value;
663 bfd_vma dot;
cc040812 664 int gap, tmp;
252b5132
RH
665
666 switch (reloc->howto->type)
667 {
252b5132
RH
668 /* Generic 8bit pc-relative relocation. */
669 case R_PCRBYTE:
670 /* Get the address of the target of this branch. */
cc040812 671 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132 672
cc040812
NC
673 dot = (link_order->offset
674 + dst_address
252b5132
RH
675 + link_order->u.indirect.section->output_section->vma);
676
677 gap = value - dot;
678
679 /* Sanity check. */
680 if (gap < -128 || gap > 126)
681 {
682 if (! ((*link_info->callbacks->reloc_overflow)
683 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
684 reloc->howto->name, reloc->addend, input_section->owner,
685 input_section, reloc->address)))
686 abort ();
687 }
688
689 /* Everything looks OK. Apply the relocation and update the
690 src/dst address appropriately. */
691
692 bfd_put_8 (abfd, gap, data + dst_address);
693 dst_address++;
694 src_address++;
695
696 /* All done. */
697 break;
698
699 /* Generic 16bit pc-relative relocation. */
700 case R_PCRWORD:
701 /* Get the address of the target of this branch. */
cc040812 702 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
703
704 /* Get the address of the instruction (not the reloc). */
5fcfd273
KH
705 dot = (link_order->offset
706 + dst_address
252b5132
RH
707 + link_order->u.indirect.section->output_section->vma + 1);
708
709 gap = value - dot;
710
711 /* Sanity check. */
712 if (gap > 32766 || gap < -32768)
713 {
714 if (! ((*link_info->callbacks->reloc_overflow)
715 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
716 reloc->howto->name, reloc->addend, input_section->owner,
717 input_section, reloc->address)))
718 abort ();
719 }
720
721 /* Everything looks OK. Apply the relocation and update the
722 src/dst address appropriately. */
723
dc810e39 724 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
252b5132
RH
725 dst_address += 2;
726 src_address += 2;
727
728 /* All done. */
729 break;
730
731 /* Generic 8bit absolute relocation. */
732 case R_RELBYTE:
733 /* Get the address of the object referenced by this insn. */
734 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
735
736 /* Sanity check. */
737 if (value <= 0xff
738 || (value >= 0x0000ff00 && value <= 0x0000ffff)
739 || (value >= 0x00ffff00 && value <= 0x00ffffff)
740 || (value >= 0xffffff00 && value <= 0xffffffff))
741 {
742 /* Everything looks OK. Apply the relocation and update the
743 src/dst address appropriately. */
744
745 bfd_put_8 (abfd, value & 0xff, data + dst_address);
746 dst_address += 1;
747 src_address += 1;
748 }
749 else
750 {
751 if (! ((*link_info->callbacks->reloc_overflow)
752 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
753 reloc->howto->name, reloc->addend, input_section->owner,
754 input_section, reloc->address)))
755 abort ();
756 }
757
758 /* All done. */
759 break;
760
761 /* Various simple 16bit absolute relocations. */
762 case R_MOV16B1:
763 case R_JMP1:
764 case R_RELWORD:
cc040812 765 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
766 bfd_put_16 (abfd, value, data + dst_address);
767 dst_address += 2;
768 src_address += 2;
769 break;
770
771 /* Various simple 24/32bit absolute relocations. */
772 case R_MOV24B1:
773 case R_MOVL1:
774 case R_RELLONG:
775 /* Get the address of the target of this branch. */
cc040812 776 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
777 bfd_put_32 (abfd, value, data + dst_address);
778 dst_address += 4;
779 src_address += 4;
780 break;
781
782 /* Another 24/32bit absolute relocation. */
783 case R_JMPL1:
784 /* Get the address of the target of this branch. */
785 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
786
787 value = ((value & 0x00ffffff)
788 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
789 bfd_put_32 (abfd, value, data + dst_address);
790 dst_address += 4;
791 src_address += 4;
792 break;
793
794 /* A 16bit abolute relocation that was formerlly a 24/32bit
795 absolute relocation. */
796 case R_MOVL2:
797 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
798
799 /* Sanity check. */
003e46d0 800 if (value <= 0x7fff || value >= 0xff8000)
252b5132
RH
801 {
802 /* Insert the 16bit value into the proper location. */
803 bfd_put_16 (abfd, value, data + dst_address);
804
805 /* Fix the opcode. For all the move insns, we simply
806 need to turn off bit 0x20 in the previous byte. */
807 data[dst_address - 1] &= ~0x20;
808 dst_address += 2;
809 src_address += 4;
810 }
811 else
812 {
813 if (! ((*link_info->callbacks->reloc_overflow)
814 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
815 reloc->howto->name, reloc->addend, input_section->owner,
816 input_section, reloc->address)))
817 abort ();
818 }
819 break;
820
821 /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */
822 case R_JMP2:
823 /* Get the address of the target of this branch. */
824 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
825
826 /* Get the address of the next instruction. */
827 dot = (link_order->offset
828 + dst_address
829 + link_order->u.indirect.section->output_section->vma + 1);
830
831 gap = value - dot;
832
833 /* Sanity check. */
834 if (gap < -128 || gap > 126)
835 {
836 if (! ((*link_info->callbacks->reloc_overflow)
837 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
838 reloc->howto->name, reloc->addend, input_section->owner,
839 input_section, reloc->address)))
840 abort ();
841 }
842
843 /* Now fix the instruction itself. */
844 switch (data[dst_address - 1])
845 {
846 case 0x5e:
847 /* jsr -> bsr */
848 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
849 break;
850 case 0x5a:
851 /* jmp ->bra */
852 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
853 break;
854
855 default:
856 abort ();
857 }
858
859 /* Write out the 8bit value. */
860 bfd_put_8 (abfd, gap, data + dst_address);
861
862 dst_address += 1;
863 src_address += 3;
864
865 break;
866
867 /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */
868 case R_PCRWORD_B:
869 /* Get the address of the target of this branch. */
870 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
871
872 /* Get the address of the instruction (not the reloc). */
873 dot = (link_order->offset
874 + dst_address
875 + link_order->u.indirect.section->output_section->vma - 1);
876
877 gap = value - dot;
878
879 /* Sanity check. */
880 if (gap < -128 || gap > 126)
881 {
882 if (! ((*link_info->callbacks->reloc_overflow)
883 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
884 reloc->howto->name, reloc->addend, input_section->owner,
885 input_section, reloc->address)))
886 abort ();
887 }
888
889 /* Now fix the instruction. */
890 switch (data[dst_address - 2])
891 {
892 case 0x58:
893 /* bCC:16 -> bCC:8 */
894 /* Get the condition code from the original insn. */
895 tmp = data[dst_address - 1];
896 tmp &= 0xf0;
897 tmp >>= 4;
898
899 /* Now or in the high nibble of the opcode. */
900 tmp |= 0x40;
901
902 /* Write it. */
903 bfd_put_8 (abfd, tmp, data + dst_address - 2);
904 break;
d562d2fb 905
4259e8b6
JL
906 case 0x5c:
907 /* bsr:16 -> bsr:8 */
908 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
909 break;
252b5132
RH
910
911 default:
912 abort ();
913 }
914
915 /* Output the target. */
916 bfd_put_8 (abfd, gap, data + dst_address - 1);
917
918 /* We don't advance dst_address -- the 8bit reloc is applied at
919 dst_address - 1, so the next insn should begin at dst_address. */
920 src_address += 2;
921
922 break;
5fcfd273 923
252b5132
RH
924 /* Similarly for a 24bit absolute that is now 8 bits. */
925 case R_JMPL2:
926 /* Get the address of the target of this branch. */
927 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
928
929 /* Get the address of the instruction (not the reloc). */
930 dot = (link_order->offset
931 + dst_address
932 + link_order->u.indirect.section->output_section->vma + 2);
933
934 gap = value - dot;
935
936 /* Fix the instruction. */
937 switch (data[src_address])
938 {
939 case 0x5e:
940 /* jsr -> bsr */
941 bfd_put_8 (abfd, 0x55, data + dst_address);
942 break;
943 case 0x5a:
944 /* jmp ->bra */
945 bfd_put_8 (abfd, 0x40, data + dst_address);
946 break;
947 default:
948 abort ();
949 }
950
951 bfd_put_8 (abfd, gap, data + dst_address + 1);
952 dst_address += 2;
953 src_address += 4;
954
955 break;
956
957 /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */
958 case R_MOV16B2:
959 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
960
961 /* Sanity check. */
962 if (data[dst_address - 2] != 0x6a)
963 abort ();
964
965 /* Fix up the opcode. */
cc040812 966 switch (data[src_address - 1] & 0xf0)
252b5132
RH
967 {
968 case 0x00:
cc040812 969 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
252b5132
RH
970 break;
971 case 0x80:
cc040812 972 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
252b5132
RH
973 break;
974 default:
975 abort ();
976 }
977
978 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
979 src_address += 2;
980 break;
981
982 /* Similarly for a 24bit mov.b */
983 case R_MOV24B2:
984 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
985
986 /* Sanity check. */
987 if (data[dst_address - 2] != 0x6a)
988 abort ();
989
990 /* Fix up the opcode. */
cc040812 991 switch (data[src_address - 1] & 0xf0)
252b5132
RH
992 {
993 case 0x20:
cc040812 994 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
252b5132
RH
995 break;
996 case 0xa0:
cc040812 997 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
252b5132
RH
998 break;
999 default:
1000 abort ();
1001 }
1002
1003 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1004 src_address += 4;
1005 break;
1006
1007 case R_BCC_INV:
1008 /* Get the address of the target of this branch. */
cc040812 1009 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132 1010
cc040812
NC
1011 dot = (link_order->offset
1012 + dst_address
252b5132
RH
1013 + link_order->u.indirect.section->output_section->vma) + 1;
1014
1015 gap = value - dot;
1016
1017 /* Sanity check. */
1018 if (gap < -128 || gap > 126)
1019 {
1020 if (! ((*link_info->callbacks->reloc_overflow)
1021 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1022 reloc->howto->name, reloc->addend, input_section->owner,
1023 input_section, reloc->address)))
1024 abort ();
1025 }
1026
1027 /* Everything looks OK. Fix the condition in the instruction, apply
1028 the relocation, and update the src/dst address appropriately. */
1029
1030 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1031 data + dst_address - 1);
1032 bfd_put_8 (abfd, gap, data + dst_address);
1033 dst_address++;
1034 src_address++;
1035
1036 /* All done. */
1037 break;
1038
1039 case R_JMP_DEL:
1040 src_address += 4;
1041 break;
1042
1043 /* An 8bit memory indirect instruction (jmp/jsr).
1044
1045 There's several things that need to be done to handle
1046 this relocation.
1047
1048 If this is a reloc against the absolute symbol, then
1049 we should handle it just R_RELBYTE. Likewise if it's
1050 for a symbol with a value ge 0 and le 0xff.
1051
1052 Otherwise it's a jump/call through the function vector,
1053 and the linker is expected to set up the function vector
1054 and put the right value into the jump/call instruction. */
1055 case R_MEM_INDIRECT:
1056 {
1057 /* We need to find the symbol so we can determine it's
1058 address in the function vector table. */
1059 asymbol *symbol;
252b5132 1060 const char *name;
dc810e39 1061 struct funcvec_hash_table *ftab;
252b5132
RH
1062 struct funcvec_hash_entry *h;
1063 asection *vectors_sec = h8300_coff_hash_table (link_info)->vectors_sec;
1064
1065 /* First see if this is a reloc against the absolute symbol
1066 or against a symbol with a nonnegative value <= 0xff. */
1067 symbol = *(reloc->sym_ptr_ptr);
1068 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1069 if (symbol == bfd_abs_section_ptr->symbol
5f771d47 1070 || value <= 0xff)
252b5132
RH
1071 {
1072 /* This should be handled in a manner very similar to
1073 R_RELBYTES. If the value is in range, then just slam
1074 the value into the right location. Else trigger a
1075 reloc overflow callback. */
5f771d47 1076 if (value <= 0xff)
252b5132
RH
1077 {
1078 bfd_put_8 (abfd, value, data + dst_address);
1079 dst_address += 1;
1080 src_address += 1;
1081 }
1082 else
1083 {
1084 if (! ((*link_info->callbacks->reloc_overflow)
1085 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1086 reloc->howto->name, reloc->addend, input_section->owner,
1087 input_section, reloc->address)))
1088 abort ();
1089 }
1090 break;
1091 }
1092
1093 /* This is a jump/call through a function vector, and we're
5fcfd273 1094 expected to create the function vector ourselves.
252b5132
RH
1095
1096 First look up this symbol in the linker hash table -- we need
1097 the derived linker symbol which holds this symbol's index
1098 in the function vector. */
1099 name = symbol->name;
1100 if (symbol->flags & BSF_LOCAL)
1101 {
dc810e39 1102 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
252b5132
RH
1103 if (new_name == NULL)
1104 abort ();
1105
1106 strcpy (new_name, name);
1107 sprintf (new_name + strlen (name), "_%08x",
cc040812 1108 (int) symbol->section);
252b5132
RH
1109 name = new_name;
1110 }
1111
dc810e39
AM
1112 ftab = h8300_coff_hash_table (link_info)->funcvec_hash_table;
1113 h = funcvec_hash_lookup (ftab, name, false, false);
252b5132
RH
1114
1115 /* This shouldn't ever happen. If it does that means we've got
1116 data corruption of some kind. Aborting seems like a reasonable
1117 think to do here. */
1118 if (h == NULL || vectors_sec == NULL)
1119 abort ();
1120
1121 /* Place the address of the function vector entry into the
1122 reloc's address. */
1123 bfd_put_8 (abfd,
1124 vectors_sec->output_offset + h->offset,
1125 data + dst_address);
1126
1127 dst_address++;
1128 src_address++;
1129
1130 /* Now create an entry in the function vector itself. */
1131 if (bfd_get_mach (input_section->owner) == bfd_mach_h8300)
1132 bfd_put_16 (abfd,
1133 bfd_coff_reloc16_get_value (reloc,
1134 link_info,
1135 input_section),
1136 vectors_sec->contents + h->offset);
1137 else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h
1138 || bfd_get_mach (input_section->owner) == bfd_mach_h8300s)
1139 bfd_put_32 (abfd,
1140 bfd_coff_reloc16_get_value (reloc,
1141 link_info,
1142 input_section),
1143 vectors_sec->contents + h->offset);
1144 else
1145 abort ();
1146
1147 /* Gross. We've already written the contents of the vector section
1148 before we get here... So we write it again with the new data. */
1149 bfd_set_section_contents (vectors_sec->output_section->owner,
1150 vectors_sec->output_section,
1151 vectors_sec->contents,
dc810e39 1152 (file_ptr) vectors_sec->output_offset,
252b5132
RH
1153 vectors_sec->_raw_size);
1154 break;
1155 }
1156
1157 default:
1158 abort ();
1159 break;
1160
1161 }
1162
1163 *src_ptr = src_address;
1164 *dst_ptr = dst_address;
1165}
1166
252b5132
RH
1167/* Routine for the h8300 linker.
1168
1169 This routine is necessary to handle the special R_MEM_INDIRECT
1170 relocs on the h8300. It's responsible for generating a vectors
1171 section and attaching it to an input bfd as well as sizing
1172 the vectors section. It also creates our vectors hash table.
1173
1174 It uses the generic linker routines to actually add the symbols.
1175 from this BFD to the bfd linker hash table. It may add a few
1176 selected static symbols to the bfd linker hash table. */
1177
1178static boolean
cc040812 1179h8300_bfd_link_add_symbols (abfd, info)
252b5132
RH
1180 bfd *abfd;
1181 struct bfd_link_info *info;
1182{
1183 asection *sec;
1184 struct funcvec_hash_table *funcvec_hash_table;
dc810e39 1185 bfd_size_type amt;
252b5132
RH
1186
1187 /* If we haven't created a vectors section, do so now. */
1188 if (!h8300_coff_hash_table (info)->vectors_sec)
1189 {
1190 flagword flags;
1191
1192 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1193 flags = (SEC_ALLOC | SEC_LOAD
1194 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1195 h8300_coff_hash_table (info)->vectors_sec = bfd_make_section (abfd,
1196 ".vectors");
1197
1198 /* If the section wasn't created, or we couldn't set the flags,
1199 quit quickly now, rather than dieing a painful death later. */
1200 if (! h8300_coff_hash_table (info)->vectors_sec
1201 || ! bfd_set_section_flags (abfd,
1202 h8300_coff_hash_table(info)->vectors_sec,
1203 flags))
1204 return false;
1205
1206 /* Also create the vector hash table. */
dc810e39
AM
1207 amt = sizeof (struct funcvec_hash_table);
1208 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
252b5132
RH
1209
1210 if (!funcvec_hash_table)
1211 return false;
1212
1213 /* And initialize the funcvec hash table. */
1214 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1215 funcvec_hash_newfunc))
1216 {
1217 bfd_release (abfd, funcvec_hash_table);
1218 return false;
1219 }
1220
1221 /* Store away a pointer to the funcvec hash table. */
1222 h8300_coff_hash_table (info)->funcvec_hash_table = funcvec_hash_table;
1223 }
1224
1225 /* Load up the function vector hash table. */
1226 funcvec_hash_table = h8300_coff_hash_table (info)->funcvec_hash_table;
1227
1228 /* Add the symbols using the generic code. */
1229 _bfd_generic_link_add_symbols (abfd, info);
1230
1231 /* Now scan the relocs for all the sections in this bfd; create
1232 additional space in the .vectors section as needed. */
1233 for (sec = abfd->sections; sec; sec = sec->next)
1234 {
1235 long reloc_size, reloc_count, i;
1236 asymbol **symbols;
1237 arelent **relocs;
1238
1239 /* Suck in the relocs, symbols & canonicalize them. */
1240 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1241 if (reloc_size <= 0)
1242 continue;
1243
dc810e39 1244 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
252b5132
RH
1245 if (!relocs)
1246 return false;
1247
1248 /* The symbols should have been read in by _bfd_generic link_add_symbols
1249 call abovec, so we can cheat and use the pointer to them that was
1250 saved in the above call. */
1251 symbols = _bfd_generic_link_get_symbols(abfd);
1252 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1253 if (reloc_count <= 0)
1254 {
1255 free (relocs);
1256 continue;
1257 }
1258
1259 /* Now walk through all the relocations in this section. */
1260 for (i = 0; i < reloc_count; i++)
1261 {
1262 arelent *reloc = relocs[i];
1263 asymbol *symbol = *(reloc->sym_ptr_ptr);
1264 const char *name;
1265
1266 /* We've got an indirect reloc. See if we need to add it
1267 to the function vector table. At this point, we have
1268 to add a new entry for each unique symbol referenced
1269 by an R_MEM_INDIRECT relocation except for a reloc
1270 against the absolute section symbol. */
1271 if (reloc->howto->type == R_MEM_INDIRECT
1272 && symbol != bfd_abs_section_ptr->symbol)
1273
1274 {
dc810e39 1275 struct funcvec_hash_table *ftab;
252b5132
RH
1276 struct funcvec_hash_entry *h;
1277
1278 name = symbol->name;
1279 if (symbol->flags & BSF_LOCAL)
1280 {
dc810e39 1281 char *new_name;
252b5132 1282
dc810e39 1283 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
252b5132
RH
1284 if (new_name == NULL)
1285 abort ();
1286
1287 strcpy (new_name, name);
1288 sprintf (new_name + strlen (name), "_%08x",
cc040812 1289 (int) symbol->section);
252b5132
RH
1290 name = new_name;
1291 }
1292
1293 /* Look this symbol up in the function vector hash table. */
dc810e39
AM
1294 ftab = h8300_coff_hash_table (info)->funcvec_hash_table;
1295 h = funcvec_hash_lookup (ftab, name, false, false);
252b5132 1296
252b5132
RH
1297 /* If this symbol isn't already in the hash table, add
1298 it and bump up the size of the hash table. */
1299 if (h == NULL)
1300 {
dc810e39 1301 h = funcvec_hash_lookup (ftab, name, true, true);
252b5132
RH
1302 if (h == NULL)
1303 {
1304 free (relocs);
1305 return false;
1306 }
1307
1308 /* Bump the size of the vectors section. Each vector
1309 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1310 if (bfd_get_mach (abfd) == bfd_mach_h8300)
1311 h8300_coff_hash_table (info)->vectors_sec->_raw_size += 2;
1312 else if (bfd_get_mach (abfd) == bfd_mach_h8300h
1313 || bfd_get_mach (abfd) == bfd_mach_h8300s)
1314 h8300_coff_hash_table (info)->vectors_sec->_raw_size += 4;
1315 }
1316 }
1317 }
1318
1319 /* We're done with the relocations, release them. */
1320 free (relocs);
1321 }
1322
1323 /* Now actually allocate some space for the function vector. It's
1324 wasteful to do this more than once, but this is easier. */
dc810e39
AM
1325 sec = h8300_coff_hash_table (info)->vectors_sec;
1326 if (sec->_raw_size != 0)
252b5132
RH
1327 {
1328 /* Free the old contents. */
dc810e39
AM
1329 if (sec->contents)
1330 free (sec->contents);
252b5132
RH
1331
1332 /* Allocate new contents. */
dc810e39 1333 sec->contents = bfd_malloc (sec->_raw_size);
252b5132
RH
1334 }
1335
1336 return true;
1337}
1338
1339#define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1340#define coff_reloc16_estimate h8300_reloc16_estimate
1341#define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1342#define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1343
1344#define COFF_LONG_FILENAMES
1345#include "coffcode.h"
1346
252b5132
RH
1347#undef coff_bfd_get_relocated_section_contents
1348#undef coff_bfd_relax_section
1349#define coff_bfd_get_relocated_section_contents \
1350 bfd_coff_reloc16_get_relocated_section_contents
1351#define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1352
c3c89269 1353CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL)
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