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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
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252b5132 1/* 32-bit ELF support for ARM
e44a2c9c
AM		 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
7f266840 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
00a97672 24#include "libiberty.h"
7f266840
DJ		 25#include "libbfd.h"
26#include "elf-bfd.h"
00a97672 27#include "elf-vxworks.h"
ee065d83 28#include "elf/arm.h"
7f266840 29
00a97672
RS		 30/* Return the relocation section associated with NAME. HTAB is the
31 bfd's elf32_arm_link_hash_entry. */
32#define RELOC_SECTION(HTAB, NAME) \
33 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
34
35/* Return size of a relocation entry. HTAB is the bfd's
36 elf32_arm_link_hash_entry. */
37#define RELOC_SIZE(HTAB) \
38 ((HTAB)->use_rel \
39 ? sizeof (Elf32_External_Rel) \
40 : sizeof (Elf32_External_Rela))
41
42/* Return function to swap relocations in. HTAB is the bfd's
43 elf32_arm_link_hash_entry. */
44#define SWAP_RELOC_IN(HTAB) \
45 ((HTAB)->use_rel \
46 ? bfd_elf32_swap_reloc_in \
47 : bfd_elf32_swap_reloca_in)
48
49/* Return function to swap relocations out. HTAB is the bfd's
50 elf32_arm_link_hash_entry. */
51#define SWAP_RELOC_OUT(HTAB) \
52 ((HTAB)->use_rel \
53 ? bfd_elf32_swap_reloc_out \
54 : bfd_elf32_swap_reloca_out)
55
7f266840
DJ		 56#define elf_info_to_howto 0
57#define elf_info_to_howto_rel elf32_arm_info_to_howto
58
59#define ARM_ELF_ABI_VERSION 0
60#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
61
24718e3b 62static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 225 25, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840
DJ		 263
264 HOWTO (R_ARM_SWI24, /* type */
265 0, /* rightshift */
266 0, /* size (0 = byte, 1 = short, 2 = long) */
267 0, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_signed,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_SWI24", /* name */
273 FALSE, /* partial_inplace */
274 0x00000000, /* src_mask */
275 0x00000000, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
8029a119 1355 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1356 EMPTY_HOWTO (91),
1357 EMPTY_HOWTO (92),
1358 EMPTY_HOWTO (93),
1359
1360 HOWTO (R_ARM_PLT32_ABS, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_dont,/* complain_on_overflow */
1367 bfd_elf_generic_reloc, /* special_function */
1368 "R_ARM_PLT32_ABS", /* name */
1369 FALSE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_GOT_ABS, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 32, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_GOT_ABS", /* name */
1383 FALSE, /* partial_inplace */
1384 0xffffffff, /* src_mask */
1385 0xffffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_GOT_PREL, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 32, /* bitsize */
1392 TRUE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont, /* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_GOT_PREL", /* name */
1397 FALSE, /* partial_inplace */
1398 0xffffffff, /* src_mask */
1399 0xffffffff, /* dst_mask */
1400 TRUE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_GOT_BREL12, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 12, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_bitfield,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_GOT_BREL12", /* name */
1411 FALSE, /* partial_inplace */
1412 0x00000fff, /* src_mask */
1413 0x00000fff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_GOTOFF12, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_bitfield,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_GOTOFF12", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1431
1432 /* GNU extension to record C++ vtable member usage */
1433 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1434 0, /* rightshift */
1435 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1436 0, /* bitsize */
ba93b8ac
DJ		 1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
c19d1205
ZW		 1439 complain_overflow_dont, /* complain_on_overflow */
1440 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1441 "R_ARM_GNU_VTENTRY", /* name */
1442 FALSE, /* partial_inplace */
1443 0, /* src_mask */
1444 0, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446
1447 /* GNU extension to record C++ vtable hierarchy */
1448 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1449 0, /* rightshift */
1450 2, /* size (0 = byte, 1 = short, 2 = long) */
1451 0, /* bitsize */
1452 FALSE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_dont, /* complain_on_overflow */
1455 NULL, /* special_function */
1456 "R_ARM_GNU_VTINHERIT", /* name */
1457 FALSE, /* partial_inplace */
1458 0, /* src_mask */
1459 0, /* dst_mask */
1460 FALSE), /* pcrel_offset */
1461
1462 HOWTO (R_ARM_THM_JUMP11, /* type */
1463 1, /* rightshift */
1464 1, /* size (0 = byte, 1 = short, 2 = long) */
1465 11, /* bitsize */
1466 TRUE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_signed, /* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_ARM_THM_JUMP11", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000007ff, /* src_mask */
1473 0x000007ff, /* dst_mask */
1474 TRUE), /* pcrel_offset */
1475
1476 HOWTO (R_ARM_THM_JUMP8, /* type */
1477 1, /* rightshift */
1478 1, /* size (0 = byte, 1 = short, 2 = long) */
1479 8, /* bitsize */
1480 TRUE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_signed, /* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_ARM_THM_JUMP8", /* name */
1485 FALSE, /* partial_inplace */
1486 0x000000ff, /* src_mask */
1487 0x000000ff, /* dst_mask */
1488 TRUE), /* pcrel_offset */
ba93b8ac 1489
c19d1205
ZW		 1490 /* TLS relocations */
1491 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 32, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1498 NULL, /* special_function */
1499 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1500 TRUE, /* partial_inplace */
1501 0xffffffff, /* src_mask */
1502 0xffffffff, /* dst_mask */
c19d1205 1503 FALSE), /* pcrel_offset */
ba93b8ac 1504
ba93b8ac
DJ		 1505 HOWTO (R_ARM_TLS_LDM32, /* type */
1506 0, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 32, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_bitfield,/* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 "R_ARM_TLS_LDM32", /* name */
1514 TRUE, /* partial_inplace */
1515 0xffffffff, /* src_mask */
1516 0xffffffff, /* dst_mask */
c19d1205 1517 FALSE), /* pcrel_offset */
ba93b8ac 1518
c19d1205 1519 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1520 0, /* rightshift */
1521 2, /* size (0 = byte, 1 = short, 2 = long) */
1522 32, /* bitsize */
1523 FALSE, /* pc_relative */
1524 0, /* bitpos */
1525 complain_overflow_bitfield,/* complain_on_overflow */
1526 bfd_elf_generic_reloc, /* special_function */
c19d1205 1527 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1528 TRUE, /* partial_inplace */
1529 0xffffffff, /* src_mask */
1530 0xffffffff, /* dst_mask */
c19d1205 1531 FALSE), /* pcrel_offset */
ba93b8ac 1532
ba93b8ac
DJ		 1533 HOWTO (R_ARM_TLS_IE32, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 32, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_bitfield,/* complain_on_overflow */
1540 NULL, /* special_function */
1541 "R_ARM_TLS_IE32", /* name */
1542 TRUE, /* partial_inplace */
1543 0xffffffff, /* src_mask */
1544 0xffffffff, /* dst_mask */
c19d1205 1545 FALSE), /* pcrel_offset */
7f266840 1546
c19d1205 1547 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1550 32, /* bitsize */
7f266840
DJ		 1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
c19d1205
ZW		 1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 bfd_elf_generic_reloc, /* special_function */
1555 "R_ARM_TLS_LE32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
7f266840 1560
c19d1205
ZW		 1561 HOWTO (R_ARM_TLS_LDO12, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 12, /* bitsize */
1565 FALSE, /* pc_relative */
7f266840 1566 0, /* bitpos */
c19d1205 1567 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1568 bfd_elf_generic_reloc, /* special_function */
c19d1205 1569 "R_ARM_TLS_LDO12", /* name */
7f266840 1570 FALSE, /* partial_inplace */
c19d1205
ZW		 1571 0x00000fff, /* src_mask */
1572 0x00000fff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
7f266840 1574
c19d1205
ZW		 1575 HOWTO (R_ARM_TLS_LE12, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 12, /* bitsize */
1579 FALSE, /* pc_relative */
7f266840 1580 0, /* bitpos */
c19d1205 1581 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1582 bfd_elf_generic_reloc, /* special_function */
c19d1205 1583 "R_ARM_TLS_LE12", /* name */
7f266840 1584 FALSE, /* partial_inplace */
c19d1205
ZW		 1585 0x00000fff, /* src_mask */
1586 0x00000fff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
7f266840 1588
c19d1205 1589 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1592 12, /* bitsize */
1593 FALSE, /* pc_relative */
7f266840 1594 0, /* bitpos */
c19d1205 1595 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1596 bfd_elf_generic_reloc, /* special_function */
c19d1205 1597 "R_ARM_TLS_IE12GP", /* name */
7f266840 1598 FALSE, /* partial_inplace */
c19d1205
ZW		 1599 0x00000fff, /* src_mask */
1600 0x00000fff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602};
1603
1604/* 112-127 private relocations
1605 128 R_ARM_ME_TOO, obsolete
1606 129-255 unallocated in AAELF.
7f266840 1607
c19d1205
ZW		 1608 249-255 extended, currently unused, relocations: */
1609
4962c51a 1610static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1611{
1612 HOWTO (R_ARM_RREL32, /* type */
1613 0, /* rightshift */
1614 0, /* size (0 = byte, 1 = short, 2 = long) */
1615 0, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_dont,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_RREL32", /* name */
1621 FALSE, /* partial_inplace */
1622 0, /* src_mask */
1623 0, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_RABS32, /* type */
1627 0, /* rightshift */
1628 0, /* size (0 = byte, 1 = short, 2 = long) */
1629 0, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_dont,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_RABS32", /* name */
1635 FALSE, /* partial_inplace */
1636 0, /* src_mask */
1637 0, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_RPC24, /* type */
1641 0, /* rightshift */
1642 0, /* size (0 = byte, 1 = short, 2 = long) */
1643 0, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_dont,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_RPC24", /* name */
1649 FALSE, /* partial_inplace */
1650 0, /* src_mask */
1651 0, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 HOWTO (R_ARM_RBASE, /* type */
1655 0, /* rightshift */
1656 0, /* size (0 = byte, 1 = short, 2 = long) */
1657 0, /* bitsize */
1658 FALSE, /* pc_relative */
1659 0, /* bitpos */
1660 complain_overflow_dont,/* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 "R_ARM_RBASE", /* name */
1663 FALSE, /* partial_inplace */
1664 0, /* src_mask */
1665 0, /* dst_mask */
1666 FALSE) /* pcrel_offset */
1667};
1668
1669static reloc_howto_type *
1670elf32_arm_howto_from_type (unsigned int r_type)
1671{
906e58ca 1672 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1673 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1674
c19d1205 1675 if (r_type >= R_ARM_RREL32
906e58ca 1676 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1677 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1678
c19d1205 1679 return NULL;
7f266840
DJ		 1680}
1681
1682static void
1683elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1684 Elf_Internal_Rela * elf_reloc)
1685{
1686 unsigned int r_type;
1687
1688 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1689 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1690}
1691
1692struct elf32_arm_reloc_map
1693 {
1694 bfd_reloc_code_real_type bfd_reloc_val;
1695 unsigned char elf_reloc_val;
1696 };
1697
1698/* All entries in this list must also be present in elf32_arm_howto_table. */
1699static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1700 {
1701 {BFD_RELOC_NONE, R_ARM_NONE},
1702 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1703 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1704 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1705 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1706 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1707 {BFD_RELOC_32, R_ARM_ABS32},
1708 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1709 {BFD_RELOC_8, R_ARM_ABS8},
1710 {BFD_RELOC_16, R_ARM_ABS16},
1711 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1712 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1713 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1719 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1720 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1721 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1722 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1723 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1724 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1725 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1726 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1727 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1728 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1729 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1730 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1731 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1732 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1733 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1734 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1735 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1736 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1737 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1738 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1739 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1740 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1741 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1742 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1743 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1744 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1745 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1746 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1747 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1748 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1749 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1750 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1751 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1752 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1753 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1754 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1755 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1756 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1757 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1758 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1759 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1760 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1761 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1762 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1763 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1764 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1765 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1766 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1767 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1768 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1769 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1770 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1771 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1772 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1773 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1774 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1775 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1776 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1777 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1778 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1779 };
1780
1781static reloc_howto_type *
f1c71a59
ZW		 1782elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1783 bfd_reloc_code_real_type code)
7f266840
DJ		 1784{
1785 unsigned int i;
8029a119 1786
906e58ca 1787 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1788 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1789 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1790
c19d1205 1791 return NULL;
7f266840
DJ		 1792}
1793
157090f7
AM		 1794static reloc_howto_type *
1795elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1796 const char *r_name)
1797{
1798 unsigned int i;
1799
906e58ca 1800 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1801 if (elf32_arm_howto_table_1[i].name != NULL
1802 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1803 return &elf32_arm_howto_table_1[i];
1804
906e58ca 1805 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1806 if (elf32_arm_howto_table_2[i].name != NULL
1807 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1808 return &elf32_arm_howto_table_2[i];
1809
1810 return NULL;
1811}
1812
906e58ca
NC		 1813/* Support for core dump NOTE sections. */
1814
7f266840 1815static bfd_boolean
f1c71a59 1816elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1817{
1818 int offset;
1819 size_t size;
1820
1821 switch (note->descsz)
1822 {
1823 default:
1824 return FALSE;
1825
8029a119 1826 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1827 /* pr_cursig */
1828 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1829
1830 /* pr_pid */
1831 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1832
1833 /* pr_reg */
1834 offset = 72;
1835 size = 72;
1836
1837 break;
1838 }
1839
1840 /* Make a ".reg/999" section. */
1841 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1842 size, note->descpos + offset);
1843}
1844
1845static bfd_boolean
f1c71a59 1846elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1847{
1848 switch (note->descsz)
1849 {
1850 default:
1851 return FALSE;
1852
8029a119 1853 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1854 elf_tdata (abfd)->core_program
1855 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1856 elf_tdata (abfd)->core_command
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1858 }
1859
1860 /* Note that for some reason, a spurious space is tacked
1861 onto the end of the args in some (at least one anyway)
1862 implementations, so strip it off if it exists. */
7f266840
DJ		 1863 {
1864 char *command = elf_tdata (abfd)->core_command;
1865 int n = strlen (command);
1866
1867 if (0 < n && command[n - 1] == ' ')
1868 command[n - 1] = '\0';
1869 }
1870
1871 return TRUE;
1872}
1873
1874#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1875#define TARGET_LITTLE_NAME "elf32-littlearm"
1876#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1877#define TARGET_BIG_NAME "elf32-bigarm"
1878
1879#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1880#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1881
252b5132
RH		 1882typedef unsigned long int insn32;
1883typedef unsigned short int insn16;
1884
3a4a14e9
PB		 1885/* In lieu of proper flags, assume all EABIv4 or later objects are
1886 interworkable. */
57e8b36a 1887#define INTERWORK_FLAG(abfd) \
3a4a14e9 1888 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1889 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1890 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1891
252b5132
RH		 1892/* The linker script knows the section names for placement.
1893 The entry_names are used to do simple name mangling on the stubs.
1894 Given a function name, and its type, the stub can be found. The
9b485d32 1895 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1896#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1897#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1898
1899#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1900#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1901
c7b8f16e
JB		 1902#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1903#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1904
845b51d6
PB		 1905#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1906#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1907
7413f23f
DJ		 1908#define STUB_ENTRY_NAME "__%s_veneer"
1909
252b5132
RH		 1910/* The name of the dynamic interpreter. This is put in the .interp
1911 section. */
1912#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1913
5e681ec4
PB		 1914#ifdef FOUR_WORD_PLT
1915
252b5132
RH		 1916/* The first entry in a procedure linkage table looks like
1917 this. It is set up so that any shared library function that is
59f2c4e7 1918 called before the relocation has been set up calls the dynamic
9b485d32 1919 linker first. */
e5a52504 1920static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1921 {
1922 0xe52de004, /* str lr, [sp, #-4]! */
1923 0xe59fe010, /* ldr lr, [pc, #16] */
1924 0xe08fe00e, /* add lr, pc, lr */
1925 0xe5bef008, /* ldr pc, [lr, #8]! */
1926 };
1927
1928/* Subsequent entries in a procedure linkage table look like
1929 this. */
e5a52504 1930static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1931 {
1932 0xe28fc600, /* add ip, pc, #NN */
1933 0xe28cca00, /* add ip, ip, #NN */
1934 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1935 0x00000000, /* unused */
1936 };
1937
1938#else
1939
5e681ec4
PB		 1940/* The first entry in a procedure linkage table looks like
1941 this. It is set up so that any shared library function that is
1942 called before the relocation has been set up calls the dynamic
1943 linker first. */
e5a52504 1944static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1945 {
5e681ec4
PB		 1946 0xe52de004, /* str lr, [sp, #-4]! */
1947 0xe59fe004, /* ldr lr, [pc, #4] */
1948 0xe08fe00e, /* add lr, pc, lr */
1949 0xe5bef008, /* ldr pc, [lr, #8]! */
1950 0x00000000, /* &GOT[0] - . */
917583ad 1951 };
252b5132
RH		 1952
1953/* Subsequent entries in a procedure linkage table look like
1954 this. */
e5a52504 1955static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1956 {
1957 0xe28fc600, /* add ip, pc, #0xNN00000 */
1958 0xe28cca00, /* add ip, ip, #0xNN000 */
1959 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1960 };
1961
1962#endif
252b5132 1963
00a97672
RS		 1964/* The format of the first entry in the procedure linkage table
1965 for a VxWorks executable. */
1966static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1967 {
1968 0xe52dc008, /* str ip,[sp,#-8]! */
1969 0xe59fc000, /* ldr ip,[pc] */
1970 0xe59cf008, /* ldr pc,[ip,#8] */
1971 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1972 };
1973
1974/* The format of subsequent entries in a VxWorks executable. */
1975static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1976 {
1977 0xe59fc000, /* ldr ip,[pc] */
1978 0xe59cf000, /* ldr pc,[ip] */
1979 0x00000000, /* .long @got */
1980 0xe59fc000, /* ldr ip,[pc] */
1981 0xea000000, /* b _PLT */
1982 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1983 };
1984
1985/* The format of entries in a VxWorks shared library. */
1986static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1987 {
1988 0xe59fc000, /* ldr ip,[pc] */
1989 0xe79cf009, /* ldr pc,[ip,r9] */
1990 0x00000000, /* .long @got */
1991 0xe59fc000, /* ldr ip,[pc] */
1992 0xe599f008, /* ldr pc,[r9,#8] */
1993 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1994 };
1995
b7693d02
DJ		 1996/* An initial stub used if the PLT entry is referenced from Thumb code. */
1997#define PLT_THUMB_STUB_SIZE 4
1998static const bfd_vma elf32_arm_plt_thumb_stub [] =
1999 {
2000 0x4778, /* bx pc */
2001 0x46c0 /* nop */
2002 };
2003
e5a52504
MM		 2004/* The entries in a PLT when using a DLL-based target with multiple
2005 address spaces. */
906e58ca 2006static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2007 {
83a358aa 2008 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2009 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2010 };
2011
906e58ca
NC		 2012#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2013#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2014#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2015#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2016#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2017#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2018
461a49ca
DJ		 2019enum stub_insn_type
2020 {
2021 THUMB16_TYPE = 1,
2022 THUMB32_TYPE,
2023 ARM_TYPE,
2024 DATA_TYPE
2025 };
2026
461a49ca
DJ		 2027#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2028#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2029#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2030#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2031#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2032
2033typedef struct
2034{
2035 bfd_vma data;
2036 enum stub_insn_type type;
ebe24dd4 2037 unsigned int r_type;
461a49ca
DJ		 2038 int reloc_addend;
2039} insn_sequence;
2040
fea2b4d6
CL		 2041/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2042 to reach the stub if necessary. */
461a49ca 2043static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2044 {
461a49ca
DJ		 2045 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2046 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2047 };
2048
fea2b4d6
CL		 2049/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2050 available. */
461a49ca 2051static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2052 {
461a49ca
DJ		 2053 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2054 ARM_INSN(0xe12fff1c), /* bx ip */
2055 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2056 };
2057
d3626fb0 2058/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2059static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2060 {
461a49ca
DJ		 2061 THUMB16_INSN(0xb401), /* push {r0} */
2062 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2063 THUMB16_INSN(0x4684), /* mov ip, r0 */
2064 THUMB16_INSN(0xbc01), /* pop {r0} */
2065 THUMB16_INSN(0x4760), /* bx ip */
2066 THUMB16_INSN(0xbf00), /* nop */
2067 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2068 };
2069
d3626fb0
CL		 2070/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2071 allowed. */
2072static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2073 {
2074 THUMB16_INSN(0x4778), /* bx pc */
2075 THUMB16_INSN(0x46c0), /* nop */
2076 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2077 ARM_INSN(0xe12fff1c), /* bx ip */
2078 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2079 };
2080
fea2b4d6
CL		 2081/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2082 available. */
461a49ca 2083static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2084 {
461a49ca
DJ		 2085 THUMB16_INSN(0x4778), /* bx pc */
2086 THUMB16_INSN(0x46c0), /* nop */
2087 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2088 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2089 };
2090
fea2b4d6
CL		 2091/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2092 one, when the destination is close enough. */
461a49ca 2093static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2094 {
461a49ca
DJ		 2095 THUMB16_INSN(0x4778), /* bx pc */
2096 THUMB16_INSN(0x46c0), /* nop */
2097 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2098 };
2099
cf3eccff 2100/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2101 blx to reach the stub if necessary. */
cf3eccff 2102static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2103 {
461a49ca
DJ		 2104 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2105 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2106 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2107 };
2108
cf3eccff
DJ		 2109/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2110 blx to reach the stub if necessary. We can not add into pc;
2111 it is not guaranteed to mode switch (different in ARMv6 and
2112 ARMv7). */
2113static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2114 {
2115 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2116 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2117 ARM_INSN(0xe12fff1c), /* bx ip */
2118 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2119 };
2120
ebe24dd4
CL		 2121/* V4T ARM -> ARM long branch stub, PIC. */
2122static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2123 {
2124 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2125 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2126 ARM_INSN(0xe12fff1c), /* bx ip */
2127 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2128 };
2129
2130/* V4T Thumb -> ARM long branch stub, PIC. */
2131static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2132 {
2133 THUMB16_INSN(0x4778), /* bx pc */
2134 THUMB16_INSN(0x46c0), /* nop */
2135 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2136 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2137 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2138 };
2139
d3626fb0
CL		 2140/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2141 architectures. */
ebe24dd4
CL		 2142static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2143 {
2144 THUMB16_INSN(0xb401), /* push {r0} */
2145 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2146 THUMB16_INSN(0x46fc), /* mov ip, pc */
2147 THUMB16_INSN(0x4484), /* add ip, r0 */
2148 THUMB16_INSN(0xbc01), /* pop {r0} */
2149 THUMB16_INSN(0x4760), /* bx ip */
2150 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2151 };
2152
d3626fb0
CL		 2153/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2154 allowed. */
2155static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2156 {
2157 THUMB16_INSN(0x4778), /* bx pc */
2158 THUMB16_INSN(0x46c0), /* nop */
2159 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2160 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2161 ARM_INSN(0xe12fff1c), /* bx ip */
2162 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2163 };
2164
906e58ca
NC		 2165/* Section name for stubs is the associated section name plus this
2166 string. */
2167#define STUB_SUFFIX ".stub"
2168
2169enum elf32_arm_stub_type
2170{
2171 arm_stub_none,
fea2b4d6
CL		 2172 arm_stub_long_branch_any_any,
2173 arm_stub_long_branch_v4t_arm_thumb,
2174 arm_stub_long_branch_thumb_only,
d3626fb0 2175 arm_stub_long_branch_v4t_thumb_thumb,
fea2b4d6
CL		 2176 arm_stub_long_branch_v4t_thumb_arm,
2177 arm_stub_short_branch_v4t_thumb_arm,
cf3eccff
DJ		 2178 arm_stub_long_branch_any_arm_pic,
2179 arm_stub_long_branch_any_thumb_pic,
ebe24dd4
CL		 2180 arm_stub_long_branch_v4t_arm_thumb_pic,
2181 arm_stub_long_branch_v4t_thumb_arm_pic,
2182 arm_stub_long_branch_thumb_only_pic,
d3626fb0 2183 arm_stub_long_branch_v4t_thumb_thumb_pic,
906e58ca
NC		 2184};
2185
2186struct elf32_arm_stub_hash_entry
2187{
2188 /* Base hash table entry structure. */
2189 struct bfd_hash_entry root;
2190
2191 /* The stub section. */
2192 asection *stub_sec;
2193
2194 /* Offset within stub_sec of the beginning of this stub. */
2195 bfd_vma stub_offset;
2196
2197 /* Given the symbol's value and its section we can determine its final
2198 value when building the stubs (so the stub knows where to jump). */
2199 bfd_vma target_value;
2200 asection *target_section;
2201
461a49ca 2202 /* The stub type. */
906e58ca 2203 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2204 /* Its encoding size in bytes. */
2205 int stub_size;
2206 /* Its template. */
2207 const insn_sequence *stub_template;
2208 /* The size of the template (number of entries). */
2209 int stub_template_size;
906e58ca
NC		 2210
2211 /* The symbol table entry, if any, that this was derived from. */
2212 struct elf32_arm_link_hash_entry *h;
2213
2214 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2215 unsigned char st_type;
2216
2217 /* Where this stub is being called from, or, in the case of combined
2218 stub sections, the first input section in the group. */
2219 asection *id_sec;
7413f23f
DJ		 2220
2221 /* The name for the local symbol at the start of this stub. The
2222 stub name in the hash table has to be unique; this does not, so
2223 it can be friendlier. */
2224 char *output_name;
906e58ca
NC		 2225};
2226
e489d0ae
PB		 2227/* Used to build a map of a section. This is required for mixed-endian
2228 code/data. */
2229
2230typedef struct elf32_elf_section_map
2231{
2232 bfd_vma vma;
2233 char type;
2234}
2235elf32_arm_section_map;
2236
c7b8f16e
JB		 2237/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2238
2239typedef enum
2240{
2241 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2242 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2243 VFP11_ERRATUM_ARM_VENEER,
2244 VFP11_ERRATUM_THUMB_VENEER
2245}
2246elf32_vfp11_erratum_type;
2247
2248typedef struct elf32_vfp11_erratum_list
2249{
2250 struct elf32_vfp11_erratum_list *next;
2251 bfd_vma vma;
2252 union
2253 {
2254 struct
2255 {
2256 struct elf32_vfp11_erratum_list *veneer;
2257 unsigned int vfp_insn;
2258 } b;
2259 struct
2260 {
2261 struct elf32_vfp11_erratum_list *branch;
2262 unsigned int id;
2263 } v;
2264 } u;
2265 elf32_vfp11_erratum_type type;
2266}
2267elf32_vfp11_erratum_list;
2268
8e3de13a 2269typedef struct _arm_elf_section_data
e489d0ae
PB		 2270{
2271 struct bfd_elf_section_data elf;
8e3de13a 2272 unsigned int mapcount;
c7b8f16e 2273 unsigned int mapsize;
e489d0ae 2274 elf32_arm_section_map *map;
c7b8f16e
JB		 2275 unsigned int erratumcount;
2276 elf32_vfp11_erratum_list *erratumlist;
8e3de13a
NC		 2277}
2278_arm_elf_section_data;
e489d0ae
PB		 2279
2280#define elf32_arm_section_data(sec) \
8e3de13a 2281 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2282
ba93b8ac
DJ		 2283/* The size of the thread control block. */
2284#define TCB_SIZE 8
2285
0ffa91dd 2286struct elf_arm_obj_tdata
ba93b8ac
DJ		 2287{
2288 struct elf_obj_tdata root;
2289
2290 /* tls_type for each local got entry. */
2291 char *local_got_tls_type;
ee065d83 2292
bf21ed78
MS		 2293 /* Zero to warn when linking objects with incompatible enum sizes. */
2294 int no_enum_size_warning;
a9dc9481
JM		 2295
2296 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2297 int no_wchar_size_warning;
ba93b8ac
DJ		 2298};
2299
0ffa91dd
NC		 2300#define elf_arm_tdata(bfd) \
2301 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2302
0ffa91dd
NC		 2303#define elf32_arm_local_got_tls_type(bfd) \
2304 (elf_arm_tdata (bfd)->local_got_tls_type)
2305
2306#define is_arm_elf(bfd) \
2307 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2308 && elf_tdata (bfd) != NULL \
2309 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2310
2311static bfd_boolean
2312elf32_arm_mkobject (bfd *abfd)
2313{
0ffa91dd
NC		 2314 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2315 ARM_ELF_TDATA);
ba93b8ac
DJ		 2316}
2317
252b5132
RH		 2318/* The ARM linker needs to keep track of the number of relocs that it
2319 decides to copy in check_relocs for each symbol. This is so that
2320 it can discard PC relative relocs if it doesn't need them when
2321 linking with -Bsymbolic. We store the information in a field
2322 extending the regular ELF linker hash table. */
2323
ba93b8ac
DJ		 2324/* This structure keeps track of the number of relocs we have copied
2325 for a given symbol. */
5e681ec4 2326struct elf32_arm_relocs_copied
917583ad
NC		 2327 {
2328 /* Next section. */
5e681ec4 2329 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2330 /* A section in dynobj. */
2331 asection * section;
2332 /* Number of relocs copied in this section. */
2333 bfd_size_type count;
ba93b8ac
DJ		 2334 /* Number of PC-relative relocs copied in this section. */
2335 bfd_size_type pc_count;
917583ad 2336 };
252b5132 2337
ba93b8ac
DJ		 2338#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2339
ba96a88f 2340/* Arm ELF linker hash entry. */
252b5132 2341struct elf32_arm_link_hash_entry
917583ad
NC		 2342 {
2343 struct elf_link_hash_entry root;
252b5132 2344
917583ad 2345 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2346 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2347
2348 /* We reference count Thumb references to a PLT entry separately,
2349 so that we can emit the Thumb trampoline only if needed. */
2350 bfd_signed_vma plt_thumb_refcount;
2351
bd97cb95
DJ		 2352 /* Some references from Thumb code may be eliminated by BL->BLX
2353 conversion, so record them separately. */
2354 bfd_signed_vma plt_maybe_thumb_refcount;
2355
b7693d02
DJ		 2356 /* Since PLT entries have variable size if the Thumb prologue is
2357 used, we need to record the index into .got.plt instead of
2358 recomputing it from the PLT offset. */
2359 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2360
2361#define GOT_UNKNOWN 0
2362#define GOT_NORMAL 1
2363#define GOT_TLS_GD 2
2364#define GOT_TLS_IE 4
2365 unsigned char tls_type;
a4fd1a8e
PB		 2366
2367 /* The symbol marking the real symbol location for exported thumb
2368 symbols with Arm stubs. */
2369 struct elf_link_hash_entry *export_glue;
906e58ca 2370
da5938a2 2371 /* A pointer to the most recently used stub hash entry against this
8029a119 2372 symbol. */
da5938a2 2373 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2374 };
252b5132 2375
252b5132 2376/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2377#define elf32_arm_link_hash_traverse(table, func, info) \
2378 (elf_link_hash_traverse \
2379 (&(table)->root, \
b7693d02 2380 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2381 (info)))
2382
2383/* Get the ARM elf linker hash table from a link_info structure. */
2384#define elf32_arm_hash_table(info) \
2385 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2386
906e58ca
NC		 2387#define arm_stub_hash_lookup(table, string, create, copy) \
2388 ((struct elf32_arm_stub_hash_entry *) \
2389 bfd_hash_lookup ((table), (string), (create), (copy)))
2390
9b485d32 2391/* ARM ELF linker hash table. */
252b5132 2392struct elf32_arm_link_hash_table
906e58ca
NC		 2393{
2394 /* The main hash table. */
2395 struct elf_link_hash_table root;
252b5132 2396
906e58ca
NC		 2397 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2398 bfd_size_type thumb_glue_size;
252b5132 2399
906e58ca
NC		 2400 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2401 bfd_size_type arm_glue_size;
252b5132 2402
906e58ca
NC		 2403 /* The size in bytes of section containing the ARMv4 BX veneers. */
2404 bfd_size_type bx_glue_size;
845b51d6 2405
906e58ca
NC		 2406 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2407 veneer has been populated. */
2408 bfd_vma bx_glue_offset[15];
845b51d6 2409
906e58ca
NC		 2410 /* The size in bytes of the section containing glue for VFP11 erratum
2411 veneers. */
2412 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2413
906e58ca
NC		 2414 /* An arbitrary input BFD chosen to hold the glue sections. */
2415 bfd * bfd_of_glue_owner;
ba96a88f 2416
906e58ca
NC		 2417 /* Nonzero to output a BE8 image. */
2418 int byteswap_code;
e489d0ae 2419
906e58ca
NC		 2420 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2421 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2422 int target1_is_rel;
9c504268 2423
906e58ca
NC		 2424 /* The relocation to use for R_ARM_TARGET2 relocations. */
2425 int target2_reloc;
eb043451 2426
906e58ca
NC		 2427 /* 0 = Ignore R_ARM_V4BX.
2428 1 = Convert BX to MOV PC.
2429 2 = Generate v4 interworing stubs. */
2430 int fix_v4bx;
319850b4 2431
906e58ca
NC		 2432 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2433 int use_blx;
33bfe774 2434
906e58ca
NC		 2435 /* What sort of code sequences we should look for which may trigger the
2436 VFP11 denorm erratum. */
2437 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2438
906e58ca
NC		 2439 /* Global counter for the number of fixes we have emitted. */
2440 int num_vfp11_fixes;
c7b8f16e 2441
906e58ca
NC		 2442 /* Nonzero to force PIC branch veneers. */
2443 int pic_veneer;
27e55c4d 2444
906e58ca
NC		 2445 /* The number of bytes in the initial entry in the PLT. */
2446 bfd_size_type plt_header_size;
e5a52504 2447
906e58ca
NC		 2448 /* The number of bytes in the subsequent PLT etries. */
2449 bfd_size_type plt_entry_size;
e5a52504 2450
906e58ca
NC		 2451 /* True if the target system is VxWorks. */
2452 int vxworks_p;
00a97672 2453
906e58ca
NC		 2454 /* True if the target system is Symbian OS. */
2455 int symbian_p;
e5a52504 2456
906e58ca
NC		 2457 /* True if the target uses REL relocations. */
2458 int use_rel;
4e7fd91e 2459
906e58ca
NC		 2460 /* Short-cuts to get to dynamic linker sections. */
2461 asection *sgot;
2462 asection *sgotplt;
2463 asection *srelgot;
2464 asection *splt;
2465 asection *srelplt;
2466 asection *sdynbss;
2467 asection *srelbss;
5e681ec4 2468
906e58ca
NC		 2469 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2470 asection *srelplt2;
00a97672 2471
906e58ca
NC		 2472 /* Data for R_ARM_TLS_LDM32 relocations. */
2473 union
2474 {
2475 bfd_signed_vma refcount;
2476 bfd_vma offset;
2477 } tls_ldm_got;
b7693d02 2478
906e58ca
NC		 2479 /* Small local sym to section mapping cache. */
2480 struct sym_sec_cache sym_sec;
2481
2482 /* For convenience in allocate_dynrelocs. */
2483 bfd * obfd;
2484
2485 /* The stub hash table. */
2486 struct bfd_hash_table stub_hash_table;
2487
2488 /* Linker stub bfd. */
2489 bfd *stub_bfd;
2490
2491 /* Linker call-backs. */
2492 asection * (*add_stub_section) (const char *, asection *);
2493 void (*layout_sections_again) (void);
2494
2495 /* Array to keep track of which stub sections have been created, and
2496 information on stub grouping. */
2497 struct map_stub
2498 {
2499 /* This is the section to which stubs in the group will be
2500 attached. */
2501 asection *link_sec;
2502 /* The stub section. */
2503 asection *stub_sec;
2504 } *stub_group;
2505
2506 /* Assorted information used by elf32_arm_size_stubs. */
2507 unsigned int bfd_count;
2508 int top_index;
2509 asection **input_list;
2510};
252b5132 2511
780a67af
NC		 2512/* Create an entry in an ARM ELF linker hash table. */
2513
2514static struct bfd_hash_entry *
57e8b36a
NC		 2515elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2516 struct bfd_hash_table * table,
2517 const char * string)
780a67af
NC		 2518{
2519 struct elf32_arm_link_hash_entry * ret =
2520 (struct elf32_arm_link_hash_entry *) entry;
2521
2522 /* Allocate the structure if it has not already been allocated by a
2523 subclass. */
906e58ca 2524 if (ret == NULL)
57e8b36a
NC		 2525 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2526 if (ret == NULL)
780a67af
NC		 2527 return (struct bfd_hash_entry *) ret;
2528
2529 /* Call the allocation method of the superclass. */
2530 ret = ((struct elf32_arm_link_hash_entry *)
2531 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2532 table, string));
57e8b36a 2533 if (ret != NULL)
b7693d02
DJ		 2534 {
2535 ret->relocs_copied = NULL;
ba93b8ac 2536 ret->tls_type = GOT_UNKNOWN;
b7693d02 2537 ret->plt_thumb_refcount = 0;
bd97cb95 2538 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2539 ret->plt_got_offset = -1;
a4fd1a8e 2540 ret->export_glue = NULL;
906e58ca
NC		 2541
2542 ret->stub_cache = NULL;
b7693d02 2543 }
780a67af
NC		 2544
2545 return (struct bfd_hash_entry *) ret;
2546}
2547
906e58ca
NC		 2548/* Initialize an entry in the stub hash table. */
2549
2550static struct bfd_hash_entry *
2551stub_hash_newfunc (struct bfd_hash_entry *entry,
2552 struct bfd_hash_table *table,
2553 const char *string)
2554{
2555 /* Allocate the structure if it has not already been allocated by a
2556 subclass. */
2557 if (entry == NULL)
2558 {
2559 entry = bfd_hash_allocate (table,
2560 sizeof (struct elf32_arm_stub_hash_entry));
2561 if (entry == NULL)
2562 return entry;
2563 }
2564
2565 /* Call the allocation method of the superclass. */
2566 entry = bfd_hash_newfunc (entry, table, string);
2567 if (entry != NULL)
2568 {
2569 struct elf32_arm_stub_hash_entry *eh;
2570
2571 /* Initialize the local fields. */
2572 eh = (struct elf32_arm_stub_hash_entry *) entry;
2573 eh->stub_sec = NULL;
2574 eh->stub_offset = 0;
2575 eh->target_value = 0;
2576 eh->target_section = NULL;
2577 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2578 eh->stub_size = 0;
2579 eh->stub_template = NULL;
2580 eh->stub_template_size = 0;
906e58ca
NC		 2581 eh->h = NULL;
2582 eh->id_sec = NULL;
2583 }
2584
2585 return entry;
2586}
2587
00a97672 2588/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2589 shortcuts to them in our hash table. */
2590
2591static bfd_boolean
57e8b36a 2592create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2593{
2594 struct elf32_arm_link_hash_table *htab;
2595
e5a52504
MM		 2596 htab = elf32_arm_hash_table (info);
2597 /* BPABI objects never have a GOT, or associated sections. */
2598 if (htab->symbian_p)
2599 return TRUE;
2600
5e681ec4
PB		 2601 if (! _bfd_elf_create_got_section (dynobj, info))
2602 return FALSE;
2603
5e681ec4
PB		 2604 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2605 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2606 if (!htab->sgot || !htab->sgotplt)
2607 abort ();
2608
00a97672
RS		 2609 htab->srelgot = bfd_make_section_with_flags (dynobj,
2610 RELOC_SECTION (htab, ".got"),
3496cb2a
L		 2611 (SEC_ALLOC | SEC_LOAD
2612 | SEC_HAS_CONTENTS
2613 | SEC_IN_MEMORY
2614 | SEC_LINKER_CREATED
2615 | SEC_READONLY));
5e681ec4 2616 if (htab->srelgot == NULL
5e681ec4
PB		 2617 || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
2618 return FALSE;
2619 return TRUE;
2620}
2621
00a97672
RS		 2622/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2623 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2624 hash table. */
2625
2626static bfd_boolean
57e8b36a 2627elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2628{
2629 struct elf32_arm_link_hash_table *htab;
2630
2631 htab = elf32_arm_hash_table (info);
2632 if (!htab->sgot && !create_got_section (dynobj, info))
2633 return FALSE;
2634
2635 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2636 return FALSE;
2637
2638 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2639 htab->srelplt = bfd_get_section_by_name (dynobj,
2640 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2641 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2642 if (!info->shared)
00a97672
RS		 2643 htab->srelbss = bfd_get_section_by_name (dynobj,
2644 RELOC_SECTION (htab, ".bss"));
2645
2646 if (htab->vxworks_p)
2647 {
2648 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2649 return FALSE;
2650
2651 if (info->shared)
2652 {
2653 htab->plt_header_size = 0;
2654 htab->plt_entry_size
2655 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2656 }
2657 else
2658 {
2659 htab->plt_header_size
2660 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2661 htab->plt_entry_size
2662 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2663 }
2664 }
5e681ec4 2665
906e58ca 2666 if (!htab->splt
e5a52504
MM		 2667 || !htab->srelplt
2668 || !htab->sdynbss
5e681ec4
PB		 2669 || (!info->shared && !htab->srelbss))
2670 abort ();
2671
2672 return TRUE;
2673}
2674
906e58ca
NC		 2675/* Copy the extra info we tack onto an elf_link_hash_entry. */
2676
2677static void
2678elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2679 struct elf_link_hash_entry *dir,
2680 struct elf_link_hash_entry *ind)
2681{
2682 struct elf32_arm_link_hash_entry *edir, *eind;
2683
2684 edir = (struct elf32_arm_link_hash_entry *) dir;
2685 eind = (struct elf32_arm_link_hash_entry *) ind;
2686
2687 if (eind->relocs_copied != NULL)
2688 {
2689 if (edir->relocs_copied != NULL)
2690 {
2691 struct elf32_arm_relocs_copied **pp;
2692 struct elf32_arm_relocs_copied *p;
2693
2694 /* Add reloc counts against the indirect sym to the direct sym
2695 list. Merge any entries against the same section. */
2696 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2697 {
2698 struct elf32_arm_relocs_copied *q;
2699
2700 for (q = edir->relocs_copied; q != NULL; q = q->next)
2701 if (q->section == p->section)
2702 {
2703 q->pc_count += p->pc_count;
2704 q->count += p->count;
2705 *pp = p->next;
2706 break;
2707 }
2708 if (q == NULL)
2709 pp = &p->next;
2710 }
2711 *pp = edir->relocs_copied;
2712 }
2713
2714 edir->relocs_copied = eind->relocs_copied;
2715 eind->relocs_copied = NULL;
2716 }
2717
2718 if (ind->root.type == bfd_link_hash_indirect)
2719 {
2720 /* Copy over PLT info. */
2721 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2722 eind->plt_thumb_refcount = 0;
2723 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2724 eind->plt_maybe_thumb_refcount = 0;
2725
2726 if (dir->got.refcount <= 0)
2727 {
2728 edir->tls_type = eind->tls_type;
2729 eind->tls_type = GOT_UNKNOWN;
2730 }
2731 }
2732
2733 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2734}
2735
2736/* Create an ARM elf linker hash table. */
2737
2738static struct bfd_link_hash_table *
2739elf32_arm_link_hash_table_create (bfd *abfd)
2740{
2741 struct elf32_arm_link_hash_table *ret;
2742 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2743
2744 ret = bfd_malloc (amt);
2745 if (ret == NULL)
2746 return NULL;
2747
2748 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2749 elf32_arm_link_hash_newfunc,
2750 sizeof (struct elf32_arm_link_hash_entry)))
2751 {
2752 free (ret);
2753 return NULL;
2754 }
2755
2756 ret->sgot = NULL;
2757 ret->sgotplt = NULL;
2758 ret->srelgot = NULL;
2759 ret->splt = NULL;
2760 ret->srelplt = NULL;
2761 ret->sdynbss = NULL;
2762 ret->srelbss = NULL;
2763 ret->srelplt2 = NULL;
2764 ret->thumb_glue_size = 0;
2765 ret->arm_glue_size = 0;
2766 ret->bx_glue_size = 0;
2767 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2768 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2769 ret->vfp11_erratum_glue_size = 0;
2770 ret->num_vfp11_fixes = 0;
2771 ret->bfd_of_glue_owner = NULL;
2772 ret->byteswap_code = 0;
2773 ret->target1_is_rel = 0;
2774 ret->target2_reloc = R_ARM_NONE;
2775#ifdef FOUR_WORD_PLT
2776 ret->plt_header_size = 16;
2777 ret->plt_entry_size = 16;
2778#else
2779 ret->plt_header_size = 20;
2780 ret->plt_entry_size = 12;
2781#endif
2782 ret->fix_v4bx = 0;
2783 ret->use_blx = 0;
2784 ret->vxworks_p = 0;
2785 ret->symbian_p = 0;
2786 ret->use_rel = 1;
2787 ret->sym_sec.abfd = NULL;
2788 ret->obfd = abfd;
2789 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2790 ret->stub_bfd = NULL;
2791 ret->add_stub_section = NULL;
2792 ret->layout_sections_again = NULL;
2793 ret->stub_group = NULL;
2794 ret->bfd_count = 0;
2795 ret->top_index = 0;
2796 ret->input_list = NULL;
906e58ca
NC		 2797
2798 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2799 sizeof (struct elf32_arm_stub_hash_entry)))
2800 {
2801 free (ret);
2802 return NULL;
2803 }
2804
2805 return &ret->root.root;
2806}
2807
2808/* Free the derived linker hash table. */
2809
2810static void
2811elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2812{
2813 struct elf32_arm_link_hash_table *ret
2814 = (struct elf32_arm_link_hash_table *) hash;
2815
2816 bfd_hash_table_free (&ret->stub_hash_table);
2817 _bfd_generic_link_hash_table_free (hash);
2818}
2819
2820/* Determine if we're dealing with a Thumb only architecture. */
2821
2822static bfd_boolean
2823using_thumb_only (struct elf32_arm_link_hash_table *globals)
2824{
2825 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2826 Tag_CPU_arch);
2827 int profile;
2828
2829 if (arch != TAG_CPU_ARCH_V7)
2830 return FALSE;
2831
2832 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2833 Tag_CPU_arch_profile);
2834
2835 return profile == 'M';
2836}
2837
2838/* Determine if we're dealing with a Thumb-2 object. */
2839
2840static bfd_boolean
2841using_thumb2 (struct elf32_arm_link_hash_table *globals)
2842{
2843 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2844 Tag_CPU_arch);
2845 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2846}
2847
f4ac8484
DJ		 2848static bfd_boolean
2849arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
2850{
2851 switch (stub_type)
2852 {
fea2b4d6
CL		 2853 case arm_stub_long_branch_thumb_only:
2854 case arm_stub_long_branch_v4t_thumb_arm:
2855 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 2856 case arm_stub_long_branch_v4t_thumb_arm_pic:
2857 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 2858 return TRUE;
2859 case arm_stub_none:
2860 BFD_FAIL ();
2861 return FALSE;
2862 break;
2863 default:
2864 return FALSE;
2865 }
2866}
2867
906e58ca
NC		 2868/* Determine the type of stub needed, if any, for a call. */
2869
2870static enum elf32_arm_stub_type
2871arm_type_of_stub (struct bfd_link_info *info,
2872 asection *input_sec,
2873 const Elf_Internal_Rela *rel,
2874 unsigned char st_type,
2875 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 2876 bfd_vma destination,
2877 asection *sym_sec,
2878 bfd *input_bfd,
2879 const char *name)
906e58ca
NC		 2880{
2881 bfd_vma location;
2882 bfd_signed_vma branch_offset;
2883 unsigned int r_type;
2884 struct elf32_arm_link_hash_table * globals;
2885 int thumb2;
2886 int thumb_only;
2887 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 2888 int use_plt = 0;
906e58ca 2889
da5938a2 2890 /* We don't know the actual type of destination in case it is of
8029a119 2891 type STT_SECTION: give up. */
da5938a2
NC		 2892 if (st_type == STT_SECTION)
2893 return stub_type;
2894
906e58ca
NC		 2895 globals = elf32_arm_hash_table (info);
2896
2897 thumb_only = using_thumb_only (globals);
2898
2899 thumb2 = using_thumb2 (globals);
2900
2901 /* Determine where the call point is. */
2902 location = (input_sec->output_offset
2903 + input_sec->output_section->vma
2904 + rel->r_offset);
2905
2906 branch_offset = (bfd_signed_vma)(destination - location);
2907
2908 r_type = ELF32_R_TYPE (rel->r_info);
2909
5fa9e92f 2910 /* Keep a simpler condition, for the sake of clarity. */
329dcd78 2911 if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 2912 {
2913 use_plt = 1;
2914 /* Note when dealing with PLT entries: the main PLT stub is in
2915 ARM mode, so if the branch is in Thumb mode, another
2916 Thumb->ARM stub will be inserted later just before the ARM
2917 PLT stub. We don't take this extra distance into account
2918 here, because if a long branch stub is needed, we'll add a
2919 Thumb->Arm one and branch directly to the ARM PLT entry
2920 because it avoids spreading offset corrections in several
2921 places. */
2922 }
906e58ca 2923
155d87d7 2924 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 2925 {
5fa9e92f
CL		 2926 /* Handle cases where:
2927 - this call goes too far (different Thumb/Thumb2 max
2928 distance)
155d87d7
CL		 2929 - it's a Thumb->Arm call and blx is not available, or it's a
2930 Thumb->Arm branch (not bl). A stub is needed in this case,
2931 but only if this call is not through a PLT entry. Indeed,
2932 PLT stubs handle mode switching already.
5fa9e92f 2933 */
906e58ca
NC		 2934 if ((!thumb2
2935 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
2936 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
2937 || (thumb2
2938 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
2939 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 2940 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 2941 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
2942 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 2943 && !use_plt))
906e58ca
NC		 2944 {
2945 if (st_type == STT_ARM_TFUNC)
2946 {
2947 /* Thumb to thumb. */
2948 if (!thumb_only)
2949 {
2950 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 2951 /* PIC stubs. */
155d87d7
CL		 2952 ? ((globals->use_blx
2953 && (r_type ==R_ARM_THM_CALL))
2954 /* V5T and above. Stub starts with ARM code, so
2955 we must be able to switch mode before
2956 reaching it, which is only possible for 'bl'
2957 (ie R_ARM_THM_CALL relocation). */
cf3eccff 2958 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 2959 /* On V4T, use Thumb code only. */
d3626fb0 2960 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 2961
2962 /* non-PIC stubs. */
155d87d7
CL		 2963 : ((globals->use_blx
2964 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 2965 /* V5T and above. */
2966 ? arm_stub_long_branch_any_any
2967 /* V4T. */
d3626fb0 2968 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 2969 }
2970 else
2971 {
2972 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 2973 /* PIC stub. */
2974 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 2975 /* non-PIC stub. */
2976 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 2977 }
2978 }
2979 else
2980 {
2981 /* Thumb to arm. */
c820be07
NC		 2982 if (sym_sec != NULL
2983 && sym_sec->owner != NULL
2984 && !INTERWORK_FLAG (sym_sec->owner))
2985 {
2986 (*_bfd_error_handler)
2987 (_("%B(%s): warning: interworking not enabled.\n"
2988 " first occurrence: %B: Thumb call to ARM"),
2989 sym_sec->owner, input_bfd, name);
2990 }
2991
906e58ca 2992 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 2993 /* PIC stubs. */
155d87d7
CL		 2994 ? ((globals->use_blx
2995 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 2996 /* V5T and above. */
cf3eccff 2997 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 2998 /* V4T PIC stub. */
2999 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3000
3001 /* non-PIC stubs. */
155d87d7
CL		 3002 : ((globals->use_blx
3003 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3004 /* V5T and above. */
3005 ? arm_stub_long_branch_any_any
3006 /* V4T. */
3007 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3008
3009 /* Handle v4t short branches. */
fea2b4d6 3010 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3011 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3012 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3013 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3014 }
3015 }
3016 }
155d87d7 3017 else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
906e58ca
NC		 3018 {
3019 if (st_type == STT_ARM_TFUNC)
3020 {
3021 /* Arm to thumb. */
c820be07
NC		 3022
3023 if (sym_sec != NULL
3024 && sym_sec->owner != NULL
3025 && !INTERWORK_FLAG (sym_sec->owner))
3026 {
3027 (*_bfd_error_handler)
3028 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3029 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3030 sym_sec->owner, input_bfd, name);
3031 }
3032
3033 /* We have an extra 2-bytes reach because of
3034 the mode change (bit 24 (H) of BLX encoding). */
906e58ca
NC		 3035 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3036 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
155d87d7
CL		 3037 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3038 || (r_type == R_ARM_JUMP24)
3039 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3040 {
3041 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3042 /* PIC stubs. */
ebe24dd4
CL		 3043 ? ((globals->use_blx)
3044 /* V5T and above. */
3045 ? arm_stub_long_branch_any_thumb_pic
3046 /* V4T stub. */
3047 : arm_stub_long_branch_v4t_arm_thumb_pic)
3048
c2b4a39d
CL		 3049 /* non-PIC stubs. */
3050 : ((globals->use_blx)
3051 /* V5T and above. */
3052 ? arm_stub_long_branch_any_any
3053 /* V4T. */
3054 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3055 }
3056 }
3057 else
3058 {
3059 /* Arm to arm. */
3060 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3061 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3062 {
3063 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3064 /* PIC stubs. */
cf3eccff 3065 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3066 /* non-PIC stubs. */
fea2b4d6 3067 : arm_stub_long_branch_any_any;
906e58ca
NC		 3068 }
3069 }
3070 }
3071
3072 return stub_type;
3073}
3074
3075/* Build a name for an entry in the stub hash table. */
3076
3077static char *
3078elf32_arm_stub_name (const asection *input_section,
3079 const asection *sym_sec,
3080 const struct elf32_arm_link_hash_entry *hash,
3081 const Elf_Internal_Rela *rel)
3082{
3083 char *stub_name;
3084 bfd_size_type len;
3085
3086 if (hash)
3087 {
3088 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
3089 stub_name = bfd_malloc (len);
3090 if (stub_name != NULL)
3091 sprintf (stub_name, "%08x_%s+%x",
3092 input_section->id & 0xffffffff,
3093 hash->root.root.root.string,
3094 (int) rel->r_addend & 0xffffffff);
3095 }
3096 else
3097 {
3098 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
3099 stub_name = bfd_malloc (len);
3100 if (stub_name != NULL)
3101 sprintf (stub_name, "%08x_%x:%x+%x",
3102 input_section->id & 0xffffffff,
3103 sym_sec->id & 0xffffffff,
3104 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3105 (int) rel->r_addend & 0xffffffff);
3106 }
3107
3108 return stub_name;
3109}
3110
3111/* Look up an entry in the stub hash. Stub entries are cached because
3112 creating the stub name takes a bit of time. */
3113
3114static struct elf32_arm_stub_hash_entry *
3115elf32_arm_get_stub_entry (const asection *input_section,
3116 const asection *sym_sec,
3117 struct elf_link_hash_entry *hash,
3118 const Elf_Internal_Rela *rel,
3119 struct elf32_arm_link_hash_table *htab)
3120{
3121 struct elf32_arm_stub_hash_entry *stub_entry;
3122 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3123 const asection *id_sec;
3124
3125 if ((input_section->flags & SEC_CODE) == 0)
3126 return NULL;
3127
3128 /* If this input section is part of a group of sections sharing one
3129 stub section, then use the id of the first section in the group.
3130 Stub names need to include a section id, as there may well be
3131 more than one stub used to reach say, printf, and we need to
3132 distinguish between them. */
3133 id_sec = htab->stub_group[input_section->id].link_sec;
3134
3135 if (h != NULL && h->stub_cache != NULL
3136 && h->stub_cache->h == h
3137 && h->stub_cache->id_sec == id_sec)
3138 {
3139 stub_entry = h->stub_cache;
3140 }
3141 else
3142 {
3143 char *stub_name;
3144
3145 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
3146 if (stub_name == NULL)
3147 return NULL;
3148
3149 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3150 stub_name, FALSE, FALSE);
3151 if (h != NULL)
3152 h->stub_cache = stub_entry;
3153
3154 free (stub_name);
3155 }
3156
3157 return stub_entry;
3158}
3159
906e58ca
NC		 3160/* Add a new stub entry to the stub hash. Not all fields of the new
3161 stub entry are initialised. */
3162
3163static struct elf32_arm_stub_hash_entry *
3164elf32_arm_add_stub (const char *stub_name,
3165 asection *section,
da5938a2 3166 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3167{
3168 asection *link_sec;
3169 asection *stub_sec;
3170 struct elf32_arm_stub_hash_entry *stub_entry;
3171
3172 link_sec = htab->stub_group[section->id].link_sec;
3173 stub_sec = htab->stub_group[section->id].stub_sec;
3174 if (stub_sec == NULL)
3175 {
3176 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3177 if (stub_sec == NULL)
3178 {
3179 size_t namelen;
3180 bfd_size_type len;
3181 char *s_name;
3182
3183 namelen = strlen (link_sec->name);
3184 len = namelen + sizeof (STUB_SUFFIX);
3185 s_name = bfd_alloc (htab->stub_bfd, len);
3186 if (s_name == NULL)
3187 return NULL;
3188
3189 memcpy (s_name, link_sec->name, namelen);
3190 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3191 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3192 if (stub_sec == NULL)
3193 return NULL;
3194 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3195 }
3196 htab->stub_group[section->id].stub_sec = stub_sec;
3197 }
3198
3199 /* Enter this entry into the linker stub hash table. */
3200 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3201 TRUE, FALSE);
3202 if (stub_entry == NULL)
3203 {
3204 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3205 section->owner,
3206 stub_name);
3207 return NULL;
3208 }
3209
3210 stub_entry->stub_sec = stub_sec;
3211 stub_entry->stub_offset = 0;
3212 stub_entry->id_sec = link_sec;
3213
906e58ca
NC		 3214 return stub_entry;
3215}
3216
3217/* Store an Arm insn into an output section not processed by
3218 elf32_arm_write_section. */
3219
3220static void
8029a119
NC		 3221put_arm_insn (struct elf32_arm_link_hash_table * htab,
3222 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3223{
3224 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3225 bfd_putl32 (val, ptr);
3226 else
3227 bfd_putb32 (val, ptr);
3228}
3229
3230/* Store a 16-bit Thumb insn into an output section not processed by
3231 elf32_arm_write_section. */
3232
3233static void
8029a119
NC		 3234put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3235 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3236{
3237 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3238 bfd_putl16 (val, ptr);
3239 else
3240 bfd_putb16 (val, ptr);
3241}
3242
3243static bfd_boolean
3244arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3245 void * in_arg)
3246{
3247 struct elf32_arm_stub_hash_entry *stub_entry;
3248 struct bfd_link_info *info;
3249 struct elf32_arm_link_hash_table *htab;
3250 asection *stub_sec;
3251 bfd *stub_bfd;
3252 bfd_vma stub_addr;
3253 bfd_byte *loc;
3254 bfd_vma sym_value;
3255 int template_size;
3256 int size;
461a49ca 3257 const insn_sequence *template;
906e58ca
NC		 3258 int i;
3259 struct elf32_arm_link_hash_table * globals;
461a49ca 3260 int stub_reloc_idx = -1;
4e31c731 3261 int stub_reloc_offset = 0;
906e58ca
NC		 3262
3263 /* Massage our args to the form they really have. */
3264 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3265 info = (struct bfd_link_info *) in_arg;
3266
3267 globals = elf32_arm_hash_table (info);
3268
3269 htab = elf32_arm_hash_table (info);
3270 stub_sec = stub_entry->stub_sec;
3271
3272 /* Make a note of the offset within the stubs for this entry. */
3273 stub_entry->stub_offset = stub_sec->size;
3274 loc = stub_sec->contents + stub_entry->stub_offset;
3275
3276 stub_bfd = stub_sec->owner;
3277
3278 /* This is the address of the start of the stub. */
3279 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3280 + stub_entry->stub_offset;
3281
3282 /* This is the address of the stub destination. */
3283 sym_value = (stub_entry->target_value
3284 + stub_entry->target_section->output_offset
3285 + stub_entry->target_section->output_section->vma);
3286
461a49ca
DJ		 3287 template = stub_entry->stub_template;
3288 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3289
3290 size = 0;
461a49ca 3291 for (i = 0; i < template_size; i++)
906e58ca 3292 {
4e31c731 3293 switch (template[i].type)
461a49ca
DJ		 3294 {
3295 case THUMB16_TYPE:
3296 put_thumb_insn (globals, stub_bfd, template[i].data, loc + size);
3297 size += 2;
3298 break;
906e58ca 3299
461a49ca
DJ		 3300 case ARM_TYPE:
3301 put_arm_insn (globals, stub_bfd, template[i].data, loc + size);
3302 /* Handle cases where the target is encoded within the
3303 instruction. */
ebe24dd4 3304 if (template[i].r_type == R_ARM_JUMP24)
461a49ca
DJ		 3305 {
3306 stub_reloc_idx = i;
3307 stub_reloc_offset = size;
3308 }
3309 size += 4;
3310 break;
3311
3312 case DATA_TYPE:
3313 bfd_put_32 (stub_bfd, template[i].data, loc + size);
3314 stub_reloc_idx = i;
3315 stub_reloc_offset = size;
3316 size += 4;
3317 break;
3318
3319 default:
3320 BFD_FAIL ();
3321 return FALSE;
3322 }
906e58ca 3323 }
461a49ca 3324
906e58ca
NC		 3325 stub_sec->size += size;
3326
461a49ca
DJ		 3327 /* Stub size has already been computed in arm_size_one_stub. Check
3328 consistency. */
3329 BFD_ASSERT (size == stub_entry->stub_size);
3330
906e58ca
NC		 3331 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3332 if (stub_entry->st_type == STT_ARM_TFUNC)
3333 sym_value |= 1;
3334
461a49ca
DJ		 3335 /* Assume there is one and only one entry to relocate in each stub. */
3336 BFD_ASSERT (stub_reloc_idx != -1);
c820be07 3337
ebe24dd4 3338 _bfd_final_link_relocate (elf32_arm_howto_from_type (template[stub_reloc_idx].r_type),
461a49ca
DJ		 3339 stub_bfd, stub_sec, stub_sec->contents,
3340 stub_entry->stub_offset + stub_reloc_offset,
3341 sym_value, template[stub_reloc_idx].reloc_addend);
906e58ca
NC		 3342
3343 return TRUE;
3344}
3345
3346/* As above, but don't actually build the stub. Just bump offset so
3347 we know stub section sizes. */
3348
3349static bfd_boolean
3350arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3351 void * in_arg)
3352{
3353 struct elf32_arm_stub_hash_entry *stub_entry;
3354 struct elf32_arm_link_hash_table *htab;
461a49ca 3355 const insn_sequence *template;
906e58ca
NC		 3356 int template_size;
3357 int size;
3358 int i;
3359
3360 /* Massage our args to the form they really have. */
3361 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3362 htab = (struct elf32_arm_link_hash_table *) in_arg;
3363
3364 switch (stub_entry->stub_type)
3365 {
fea2b4d6
CL		 3366 case arm_stub_long_branch_any_any:
3367 template = elf32_arm_stub_long_branch_any_any;
ebe24dd4 3368 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_any_any);
906e58ca 3369 break;
fea2b4d6
CL		 3370 case arm_stub_long_branch_v4t_arm_thumb:
3371 template = elf32_arm_stub_long_branch_v4t_arm_thumb;
ebe24dd4 3372 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_v4t_arm_thumb);
906e58ca 3373 break;
fea2b4d6
CL		 3374 case arm_stub_long_branch_thumb_only:
3375 template = elf32_arm_stub_long_branch_thumb_only;
ebe24dd4 3376 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_thumb_only);
906e58ca 3377 break;
d3626fb0
CL		 3378 case arm_stub_long_branch_v4t_thumb_thumb:
3379 template = elf32_arm_stub_long_branch_v4t_thumb_thumb;
3380 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_v4t_thumb_thumb);
3381 break;
fea2b4d6
CL		 3382 case arm_stub_long_branch_v4t_thumb_arm:
3383 template = elf32_arm_stub_long_branch_v4t_thumb_arm;
ebe24dd4 3384 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_v4t_thumb_arm);
906e58ca 3385 break;
fea2b4d6
CL		 3386 case arm_stub_short_branch_v4t_thumb_arm:
3387 template = elf32_arm_stub_short_branch_v4t_thumb_arm;
ebe24dd4 3388 template_size = ARRAY_SIZE (elf32_arm_stub_short_branch_v4t_thumb_arm);
c820be07 3389 break;
cf3eccff
DJ		 3390 case arm_stub_long_branch_any_arm_pic:
3391 template = elf32_arm_stub_long_branch_any_arm_pic;
ebe24dd4 3392 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_any_arm_pic);
cf3eccff
DJ		 3393 break;
3394 case arm_stub_long_branch_any_thumb_pic:
3395 template = elf32_arm_stub_long_branch_any_thumb_pic;
ebe24dd4
CL		 3396 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_any_thumb_pic);
3397 break;
3398 case arm_stub_long_branch_v4t_arm_thumb_pic:
3399 template = elf32_arm_stub_long_branch_v4t_arm_thumb_pic;
3400 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_v4t_arm_thumb_pic);
3401 break;
3402 case arm_stub_long_branch_v4t_thumb_arm_pic:
3403 template = elf32_arm_stub_long_branch_v4t_thumb_arm_pic;
3404 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_v4t_thumb_arm_pic);
3405 break;
3406 case arm_stub_long_branch_thumb_only_pic:
3407 template = elf32_arm_stub_long_branch_thumb_only_pic;
3408 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_thumb_only_pic);
906e58ca 3409 break;
d3626fb0
CL		 3410 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3411 template = elf32_arm_stub_long_branch_v4t_thumb_thumb_pic;
3412 template_size = ARRAY_SIZE (elf32_arm_stub_long_branch_v4t_thumb_thumb_pic);
3413 break;
906e58ca
NC		 3414 default:
3415 BFD_FAIL ();
3416 return FALSE;
906e58ca
NC		 3417 }
3418
3419 size = 0;
461a49ca
DJ		 3420 for (i = 0; i < template_size; i++)
3421 {
4e31c731 3422 switch (template[i].type)
461a49ca
DJ		 3423 {
3424 case THUMB16_TYPE:
3425 size += 2;
3426 break;
3427
3428 case ARM_TYPE:
3429 size += 4;
3430 break;
3431
3432 case DATA_TYPE:
3433 size += 4;
3434 break;
3435
3436 default:
3437 BFD_FAIL ();
3438 return FALSE;
3439 }
3440 }
3441
3442 stub_entry->stub_size = size;
3443 stub_entry->stub_template = template;
3444 stub_entry->stub_template_size = template_size;
3445
906e58ca
NC		 3446 size = (size + 7) & ~7;
3447 stub_entry->stub_sec->size += size;
461a49ca 3448
906e58ca
NC		 3449 return TRUE;
3450}
3451
3452/* External entry points for sizing and building linker stubs. */
3453
3454/* Set up various things so that we can make a list of input sections
3455 for each output section included in the link. Returns -1 on error,
3456 0 when no stubs will be needed, and 1 on success. */
3457
3458int
3459elf32_arm_setup_section_lists (bfd *output_bfd,
3460 struct bfd_link_info *info)
3461{
3462 bfd *input_bfd;
3463 unsigned int bfd_count;
3464 int top_id, top_index;
3465 asection *section;
3466 asection **input_list, **list;
3467 bfd_size_type amt;
3468 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3469
3470 if (! is_elf_hash_table (htab))
3471 return 0;
3472
3473 /* Count the number of input BFDs and find the top input section id. */
3474 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3475 input_bfd != NULL;
3476 input_bfd = input_bfd->link_next)
3477 {
3478 bfd_count += 1;
3479 for (section = input_bfd->sections;
3480 section != NULL;
3481 section = section->next)
3482 {
3483 if (top_id < section->id)
3484 top_id = section->id;
3485 }
3486 }
3487 htab->bfd_count = bfd_count;
3488
3489 amt = sizeof (struct map_stub) * (top_id + 1);
3490 htab->stub_group = bfd_zmalloc (amt);
3491 if (htab->stub_group == NULL)
3492 return -1;
3493
3494 /* We can't use output_bfd->section_count here to find the top output
3495 section index as some sections may have been removed, and
3496 _bfd_strip_section_from_output doesn't renumber the indices. */
3497 for (section = output_bfd->sections, top_index = 0;
3498 section != NULL;
3499 section = section->next)
3500 {
3501 if (top_index < section->index)
3502 top_index = section->index;
3503 }
3504
3505 htab->top_index = top_index;
3506 amt = sizeof (asection *) * (top_index + 1);
3507 input_list = bfd_malloc (amt);
3508 htab->input_list = input_list;
3509 if (input_list == NULL)
3510 return -1;
3511
3512 /* For sections we aren't interested in, mark their entries with a
3513 value we can check later. */
3514 list = input_list + top_index;
3515 do
3516 *list = bfd_abs_section_ptr;
3517 while (list-- != input_list);
3518
3519 for (section = output_bfd->sections;
3520 section != NULL;
3521 section = section->next)
3522 {
3523 if ((section->flags & SEC_CODE) != 0)
3524 input_list[section->index] = NULL;
3525 }
3526
3527 return 1;
3528}
3529
3530/* The linker repeatedly calls this function for each input section,
3531 in the order that input sections are linked into output sections.
3532 Build lists of input sections to determine groupings between which
3533 we may insert linker stubs. */
3534
3535void
3536elf32_arm_next_input_section (struct bfd_link_info *info,
3537 asection *isec)
3538{
3539 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3540
3541 if (isec->output_section->index <= htab->top_index)
3542 {
3543 asection **list = htab->input_list + isec->output_section->index;
3544
3545 if (*list != bfd_abs_section_ptr)
3546 {
3547 /* Steal the link_sec pointer for our list. */
3548#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3549 /* This happens to make the list in reverse order,
07d72278 3550 which we reverse later. */
906e58ca
NC		 3551 PREV_SEC (isec) = *list;
3552 *list = isec;
3553 }
3554 }
3555}
3556
3557/* See whether we can group stub sections together. Grouping stub
3558 sections may result in fewer stubs. More importantly, we need to
07d72278 3559 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3560 .fini output sections respectively, because glibc splits the
3561 _init and _fini functions into multiple parts. Putting a stub in
3562 the middle of a function is not a good idea. */
3563
3564static void
3565group_sections (struct elf32_arm_link_hash_table *htab,
3566 bfd_size_type stub_group_size,
07d72278 3567 bfd_boolean stubs_always_after_branch)
906e58ca 3568{
07d72278 3569 asection **list = htab->input_list;
906e58ca
NC		 3570
3571 do
3572 {
3573 asection *tail = *list;
07d72278 3574 asection *head;
906e58ca
NC		 3575
3576 if (tail == bfd_abs_section_ptr)
3577 continue;
3578
07d72278
DJ		 3579 /* Reverse the list: we must avoid placing stubs at the
3580 beginning of the section because the beginning of the text
3581 section may be required for an interrupt vector in bare metal
3582 code. */
3583#define NEXT_SEC PREV_SEC
e780aef2
CL		 3584 head = NULL;
3585 while (tail != NULL)
3586 {
3587 /* Pop from tail. */
3588 asection *item = tail;
3589 tail = PREV_SEC (item);
3590
3591 /* Push on head. */
3592 NEXT_SEC (item) = head;
3593 head = item;
3594 }
07d72278
DJ		 3595
3596 while (head != NULL)
906e58ca
NC		 3597 {
3598 asection *curr;
07d72278 3599 asection *next;
e780aef2
CL		 3600 bfd_vma stub_group_start = head->output_offset;
3601 bfd_vma end_of_next;
906e58ca 3602
07d72278 3603 curr = head;
e780aef2 3604 while (NEXT_SEC (curr) != NULL)
8cd931b7 3605 {
e780aef2
CL		 3606 next = NEXT_SEC (curr);
3607 end_of_next = next->output_offset + next->size;
3608 if (end_of_next - stub_group_start >= stub_group_size)
3609 /* End of NEXT is too far from start, so stop. */
8cd931b7 3610 break;
e780aef2
CL		 3611 /* Add NEXT to the group. */
3612 curr = next;
8cd931b7 3613 }
906e58ca 3614
07d72278 3615 /* OK, the size from the start to the start of CURR is less
906e58ca 3616 than stub_group_size and thus can be handled by one stub
07d72278 3617 section. (Or the head section is itself larger than
906e58ca
NC		 3618 stub_group_size, in which case we may be toast.)
3619 We should really be keeping track of the total size of
3620 stubs added here, as stubs contribute to the final output
7fb9f789 3621 section size. */
906e58ca
NC		 3622 do
3623 {
07d72278 3624 next = NEXT_SEC (head);
906e58ca 3625 /* Set up this stub group. */
07d72278 3626 htab->stub_group[head->id].link_sec = curr;
906e58ca 3627 }
07d72278 3628 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3629
3630 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3631 bytes after the stub section can be handled by it too. */
3632 if (!stubs_always_after_branch)
906e58ca 3633 {
e780aef2
CL		 3634 stub_group_start = curr->output_offset + curr->size;
3635
8cd931b7 3636 while (next != NULL)
906e58ca 3637 {
e780aef2
CL		 3638 end_of_next = next->output_offset + next->size;
3639 if (end_of_next - stub_group_start >= stub_group_size)
3640 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3641 break;
e780aef2 3642 /* Add NEXT to the stub group. */
07d72278
DJ		 3643 head = next;
3644 next = NEXT_SEC (head);
3645 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3646 }
3647 }
07d72278 3648 head = next;
906e58ca
NC		 3649 }
3650 }
07d72278 3651 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3652
3653 free (htab->input_list);
3654#undef PREV_SEC
07d72278 3655#undef NEXT_SEC
906e58ca
NC		 3656}
3657
3658/* Determine and set the size of the stub section for a final link.
3659
3660 The basic idea here is to examine all the relocations looking for
3661 PC-relative calls to a target that is unreachable with a "bl"
3662 instruction. */
3663
3664bfd_boolean
3665elf32_arm_size_stubs (bfd *output_bfd,
3666 bfd *stub_bfd,
3667 struct bfd_link_info *info,
3668 bfd_signed_vma group_size,
3669 asection * (*add_stub_section) (const char *, asection *),
3670 void (*layout_sections_again) (void))
3671{
3672 bfd_size_type stub_group_size;
07d72278 3673 bfd_boolean stubs_always_after_branch;
906e58ca
NC		 3674 bfd_boolean stub_changed = 0;
3675 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3676
3677 /* Propagate mach to stub bfd, because it may not have been
3678 finalized when we created stub_bfd. */
3679 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
3680 bfd_get_mach (output_bfd));
3681
3682 /* Stash our params away. */
3683 htab->stub_bfd = stub_bfd;
3684 htab->add_stub_section = add_stub_section;
3685 htab->layout_sections_again = layout_sections_again;
07d72278 3686 stubs_always_after_branch = group_size < 0;
906e58ca
NC		 3687 if (group_size < 0)
3688 stub_group_size = -group_size;
3689 else
3690 stub_group_size = group_size;
3691
3692 if (stub_group_size == 1)
3693 {
3694 /* Default values. */
3695 /* Thumb branch range is +-4MB has to be used as the default
3696 maximum size (a given section can contain both ARM and Thumb
3697 code, so the worst case has to be taken into account).
3698
3699 This value is 24K less than that, which allows for 2025
3700 12-byte stubs. If we exceed that, then we will fail to link.
3701 The user will have to relink with an explicit group size
3702 option. */
3703 stub_group_size = 4170000;
3704 }
3705
07d72278 3706 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca
NC		 3707
3708 while (1)
3709 {
3710 bfd *input_bfd;
3711 unsigned int bfd_indx;
3712 asection *stub_sec;
3713
3714 for (input_bfd = info->input_bfds, bfd_indx = 0;
3715 input_bfd != NULL;
3716 input_bfd = input_bfd->link_next, bfd_indx++)
3717 {
3718 Elf_Internal_Shdr *symtab_hdr;
3719 asection *section;
3720 Elf_Internal_Sym *local_syms = NULL;
3721
3722 /* We'll need the symbol table in a second. */
3723 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
3724 if (symtab_hdr->sh_info == 0)
3725 continue;
3726
3727 /* Walk over each section attached to the input bfd. */
3728 for (section = input_bfd->sections;
3729 section != NULL;
3730 section = section->next)
3731 {
3732 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
3733
3734 /* If there aren't any relocs, then there's nothing more
3735 to do. */
3736 if ((section->flags & SEC_RELOC) == 0
3737 || section->reloc_count == 0
3738 || (section->flags & SEC_CODE) == 0)
3739 continue;
3740
3741 /* If this section is a link-once section that will be
3742 discarded, then don't create any stubs. */
3743 if (section->output_section == NULL
3744 || section->output_section->owner != output_bfd)
3745 continue;
3746
3747 /* Get the relocs. */
3748 internal_relocs
3749 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
3750 NULL, info->keep_memory);
3751 if (internal_relocs == NULL)
3752 goto error_ret_free_local;
3753
3754 /* Now examine each relocation. */
3755 irela = internal_relocs;
3756 irelaend = irela + section->reloc_count;
3757 for (; irela < irelaend; irela++)
3758 {
3759 unsigned int r_type, r_indx;
3760 enum elf32_arm_stub_type stub_type;
3761 struct elf32_arm_stub_hash_entry *stub_entry;
3762 asection *sym_sec;
3763 bfd_vma sym_value;
3764 bfd_vma destination;
3765 struct elf32_arm_link_hash_entry *hash;
7413f23f 3766 const char *sym_name;
906e58ca
NC		 3767 char *stub_name;
3768 const asection *id_sec;
3769 unsigned char st_type;
3770
3771 r_type = ELF32_R_TYPE (irela->r_info);
3772 r_indx = ELF32_R_SYM (irela->r_info);
3773
3774 if (r_type >= (unsigned int) R_ARM_max)
3775 {
3776 bfd_set_error (bfd_error_bad_value);
3777 error_ret_free_internal:
3778 if (elf_section_data (section)->relocs == NULL)
3779 free (internal_relocs);
3780 goto error_ret_free_local;
3781 }
3782
155d87d7 3783 /* Only look for stubs on branch instructions. */
906e58ca 3784 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 3785 && (r_type != (unsigned int) R_ARM_THM_CALL)
3786 && (r_type != (unsigned int) R_ARM_JUMP24)
3787 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
3788 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 3789 continue;
3790
3791 /* Now determine the call target, its name, value,
3792 section. */
3793 sym_sec = NULL;
3794 sym_value = 0;
3795 destination = 0;
3796 hash = NULL;
7413f23f 3797 sym_name = NULL;
906e58ca
NC		 3798 if (r_indx < symtab_hdr->sh_info)
3799 {
3800 /* It's a local symbol. */
3801 Elf_Internal_Sym *sym;
3802 Elf_Internal_Shdr *hdr;
3803
3804 if (local_syms == NULL)
3805 {
3806 local_syms
3807 = (Elf_Internal_Sym *) symtab_hdr->contents;
3808 if (local_syms == NULL)
3809 local_syms
3810 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
3811 symtab_hdr->sh_info, 0,
3812 NULL, NULL, NULL);
3813 if (local_syms == NULL)
3814 goto error_ret_free_internal;
3815 }
3816
3817 sym = local_syms + r_indx;
3818 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
3819 sym_sec = hdr->bfd_section;
3820 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
3821 sym_value = sym->st_value;
3822 destination = (sym_value + irela->r_addend
3823 + sym_sec->output_offset
3824 + sym_sec->output_section->vma);
3825 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 3826 sym_name
3827 = bfd_elf_string_from_elf_section (input_bfd,
3828 symtab_hdr->sh_link,
3829 sym->st_name);
906e58ca
NC		 3830 }
3831 else
3832 {
3833 /* It's an external symbol. */
3834 int e_indx;
3835
3836 e_indx = r_indx - symtab_hdr->sh_info;
3837 hash = ((struct elf32_arm_link_hash_entry *)
3838 elf_sym_hashes (input_bfd)[e_indx]);
3839
3840 while (hash->root.root.type == bfd_link_hash_indirect
3841 || hash->root.root.type == bfd_link_hash_warning)
3842 hash = ((struct elf32_arm_link_hash_entry *)
3843 hash->root.root.u.i.link);
3844
3845 if (hash->root.root.type == bfd_link_hash_defined
3846 || hash->root.root.type == bfd_link_hash_defweak)
3847 {
3848 sym_sec = hash->root.root.u.def.section;
3849 sym_value = hash->root.root.u.def.value;
3850 if (sym_sec->output_section != NULL)
3851 destination = (sym_value + irela->r_addend
3852 + sym_sec->output_offset
3853 + sym_sec->output_section->vma);
3854 }
69c5861e
CL		 3855 else if ((hash->root.root.type == bfd_link_hash_undefined)
3856 || (hash->root.root.type == bfd_link_hash_undefweak))
3857 {
3858 /* For a shared library, use the PLT stub as
3859 target address to decide whether a long
3860 branch stub is needed.
3861 For absolute code, they cannot be handled. */
3862 struct elf32_arm_link_hash_table *globals =
3863 elf32_arm_hash_table (info);
3864
3865 if (globals->splt != NULL && hash != NULL
3866 && hash->root.plt.offset != (bfd_vma) -1)
3867 {
3868 sym_sec = globals->splt;
3869 sym_value = hash->root.plt.offset;
3870 if (sym_sec->output_section != NULL)
3871 destination = (sym_value
3872 + sym_sec->output_offset
3873 + sym_sec->output_section->vma);
3874 }
3875 else
3876 continue;
3877 }
906e58ca
NC		 3878 else
3879 {
3880 bfd_set_error (bfd_error_bad_value);
3881 goto error_ret_free_internal;
3882 }
3883 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 3884 sym_name = hash->root.root.root.string;
906e58ca
NC		 3885 }
3886
3887 /* Determine what (if any) linker stub is needed. */
3888 stub_type = arm_type_of_stub (info, section, irela, st_type,
c820be07
NC		 3889 hash, destination, sym_sec,
3890 input_bfd, sym_name);
906e58ca
NC		 3891 if (stub_type == arm_stub_none)
3892 continue;
5e681ec4 3893
906e58ca
NC		 3894 /* Support for grouping stub sections. */
3895 id_sec = htab->stub_group[section->id].link_sec;
5e681ec4 3896
906e58ca
NC		 3897 /* Get the name of this stub. */
3898 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela);
3899 if (!stub_name)
3900 goto error_ret_free_internal;
5e681ec4 3901
906e58ca
NC		 3902 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3903 stub_name,
3904 FALSE, FALSE);
3905 if (stub_entry != NULL)
3906 {
3907 /* The proper stub has already been created. */
3908 free (stub_name);
3909 continue;
3910 }
5e681ec4 3911
da5938a2 3912 stub_entry = elf32_arm_add_stub (stub_name, section, htab);
906e58ca
NC		 3913 if (stub_entry == NULL)
3914 {
3915 free (stub_name);
3916 goto error_ret_free_internal;
3917 }
5e681ec4 3918
906e58ca
NC		 3919 stub_entry->target_value = sym_value;
3920 stub_entry->target_section = sym_sec;
3921 stub_entry->stub_type = stub_type;
3922 stub_entry->h = hash;
3923 stub_entry->st_type = st_type;
7413f23f
DJ		 3924
3925 if (sym_name == NULL)
3926 sym_name = "unnamed";
3927 stub_entry->output_name
3928 = bfd_alloc (htab->stub_bfd,
3929 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
3930 + strlen (sym_name));
3931 if (stub_entry->output_name == NULL)
3932 {
3933 free (stub_name);
3934 goto error_ret_free_internal;
3935 }
3936
3937 /* For historical reasons, use the existing names for
3938 ARM-to-Thumb and Thumb-to-ARM stubs. */
155d87d7
CL		 3939 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
3940 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
3941 && st_type != STT_ARM_TFUNC)
7413f23f
DJ		 3942 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME,
3943 sym_name);
155d87d7
CL		 3944 else if ( ((r_type == (unsigned int) R_ARM_CALL)
3945 || (r_type == (unsigned int) R_ARM_JUMP24))
7413f23f
DJ		 3946 && st_type == STT_ARM_TFUNC)
3947 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME,
3948 sym_name);
3949 else
3950 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
3951 sym_name);
3952
906e58ca
NC		 3953 stub_changed = TRUE;
3954 }
3955
3956 /* We're done with the internal relocs, free them. */
3957 if (elf_section_data (section)->relocs == NULL)
3958 free (internal_relocs);
5e681ec4 3959 }
5e681ec4
PB		 3960 }
3961
906e58ca
NC		 3962 if (!stub_changed)
3963 break;
5e681ec4 3964
906e58ca
NC		 3965 /* OK, we've added some stubs. Find out the new size of the
3966 stub sections. */
3967 for (stub_sec = htab->stub_bfd->sections;
3968 stub_sec != NULL;
3969 stub_sec = stub_sec->next)
3e6b1042
DJ		 3970 {
3971 /* Ignore non-stub sections. */
3972 if (!strstr (stub_sec->name, STUB_SUFFIX))
3973 continue;
3974
3975 stub_sec->size = 0;
3976 }
b34b2d70 3977
906e58ca
NC		 3978 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
3979
3980 /* Ask the linker to do its stuff. */
3981 (*htab->layout_sections_again) ();
3982 stub_changed = FALSE;
ba93b8ac
DJ		 3983 }
3984
906e58ca
NC		 3985 return TRUE;
3986
3987 error_ret_free_local:
3988 return FALSE;
5e681ec4
PB		 3989}
3990
906e58ca
NC		 3991/* Build all the stubs associated with the current output file. The
3992 stubs are kept in a hash table attached to the main linker hash
3993 table. We also set up the .plt entries for statically linked PIC
3994 functions here. This function is called via arm_elf_finish in the
3995 linker. */
252b5132 3996
906e58ca
NC		 3997bfd_boolean
3998elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 3999{
906e58ca
NC		 4000 asection *stub_sec;
4001 struct bfd_hash_table *table;
4002 struct elf32_arm_link_hash_table *htab;
252b5132 4003
906e58ca 4004 htab = elf32_arm_hash_table (info);
252b5132 4005
906e58ca
NC		 4006 for (stub_sec = htab->stub_bfd->sections;
4007 stub_sec != NULL;
4008 stub_sec = stub_sec->next)
252b5132 4009 {
906e58ca
NC		 4010 bfd_size_type size;
4011
8029a119 4012 /* Ignore non-stub sections. */
906e58ca
NC		 4013 if (!strstr (stub_sec->name, STUB_SUFFIX))
4014 continue;
4015
4016 /* Allocate memory to hold the linker stubs. */
4017 size = stub_sec->size;
4018 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
4019 if (stub_sec->contents == NULL && size != 0)
4020 return FALSE;
4021 stub_sec->size = 0;
252b5132
RH		 4022 }
4023
906e58ca
NC		 4024 /* Build the stubs as directed by the stub hash table. */
4025 table = &htab->stub_hash_table;
4026 bfd_hash_traverse (table, arm_build_one_stub, info);
252b5132 4027
906e58ca 4028 return TRUE;
252b5132
RH		 4029}
4030
9b485d32
NC		 4031/* Locate the Thumb encoded calling stub for NAME. */
4032
252b5132 4033static struct elf_link_hash_entry *
57e8b36a
NC		 4034find_thumb_glue (struct bfd_link_info *link_info,
4035 const char *name,
f2a9dd69 4036 char **error_message)
252b5132
RH		 4037{
4038 char *tmp_name;
4039 struct elf_link_hash_entry *hash;
4040 struct elf32_arm_link_hash_table *hash_table;
4041
4042 /* We need a pointer to the armelf specific hash table. */
4043 hash_table = elf32_arm_hash_table (link_info);
4044
57e8b36a
NC		 4045 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4046 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4047
4048 BFD_ASSERT (tmp_name);
4049
4050 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4051
4052 hash = elf_link_hash_lookup
b34976b6 4053 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4054
b1657152
AM		 4055 if (hash == NULL
4056 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4057 tmp_name, name) == -1)
4058 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4059
4060 free (tmp_name);
4061
4062 return hash;
4063}
4064
9b485d32
NC		 4065/* Locate the ARM encoded calling stub for NAME. */
4066
252b5132 4067static struct elf_link_hash_entry *
57e8b36a
NC		 4068find_arm_glue (struct bfd_link_info *link_info,
4069 const char *name,
f2a9dd69 4070 char **error_message)
252b5132
RH		 4071{
4072 char *tmp_name;
4073 struct elf_link_hash_entry *myh;
4074 struct elf32_arm_link_hash_table *hash_table;
4075
4076 /* We need a pointer to the elfarm specific hash table. */
4077 hash_table = elf32_arm_hash_table (link_info);
4078
57e8b36a
NC		 4079 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4080 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4081
4082 BFD_ASSERT (tmp_name);
4083
4084 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4085
4086 myh = elf_link_hash_lookup
b34976b6 4087 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4088
b1657152
AM		 4089 if (myh == NULL
4090 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4091 tmp_name, name) == -1)
4092 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4093
4094 free (tmp_name);
4095
4096 return myh;
4097}
4098
8f6277f5 4099/* ARM->Thumb glue (static images):
252b5132
RH		 4100
4101 .arm
4102 __func_from_arm:
4103 ldr r12, __func_addr
4104 bx r12
4105 __func_addr:
906e58ca 4106 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4107
26079076
PB		 4108 (v5t static images)
4109 .arm
4110 __func_from_arm:
4111 ldr pc, __func_addr
4112 __func_addr:
906e58ca 4113 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4114
8f6277f5
PB		 4115 (relocatable images)
4116 .arm
4117 __func_from_arm:
4118 ldr r12, __func_offset
4119 add r12, r12, pc
4120 bx r12
4121 __func_offset:
8029a119 4122 .word func - . */
8f6277f5
PB		 4123
4124#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4125static const insn32 a2t1_ldr_insn = 0xe59fc000;
4126static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4127static const insn32 a2t3_func_addr_insn = 0x00000001;
4128
26079076
PB		 4129#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4130static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4131static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4132
8f6277f5
PB		 4133#define ARM2THUMB_PIC_GLUE_SIZE 16
4134static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4135static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4136static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4137
9b485d32 4138/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4139
8029a119
NC		 4140 .thumb .thumb
4141 .align 2 .align 2
4142 __func_from_thumb: __func_from_thumb:
4143 bx pc push {r6, lr}
4144 nop ldr r6, __func_addr
4145 .arm mov lr, pc
4146 b func bx r6
fcef9eb7
NC		 4147 .arm
4148 ;; back_to_thumb
4149 ldmia r13! {r6, lr}
4150 bx lr
8029a119
NC		 4151 __func_addr:
4152 .word func */
252b5132
RH		 4153
4154#define THUMB2ARM_GLUE_SIZE 8
4155static const insn16 t2a1_bx_pc_insn = 0x4778;
4156static const insn16 t2a2_noop_insn = 0x46c0;
4157static const insn32 t2a3_b_insn = 0xea000000;
4158
c7b8f16e
JB		 4159#define VFP11_ERRATUM_VENEER_SIZE 8
4160
845b51d6
PB		 4161#define ARM_BX_VENEER_SIZE 12
4162static const insn32 armbx1_tst_insn = 0xe3100001;
4163static const insn32 armbx2_moveq_insn = 0x01a0f000;
4164static const insn32 armbx3_bx_insn = 0xe12fff10;
4165
7e392df6 4166#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4167static void
4168arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4169{
4170 asection * s;
8029a119 4171 bfd_byte * contents;
252b5132 4172
8029a119 4173 if (size == 0)
3e6b1042
DJ		 4174 {
4175 /* Do not include empty glue sections in the output. */
4176 if (abfd != NULL)
4177 {
4178 s = bfd_get_section_by_name (abfd, name);
4179 if (s != NULL)
4180 s->flags |= SEC_EXCLUDE;
4181 }
4182 return;
4183 }
252b5132 4184
8029a119 4185 BFD_ASSERT (abfd != NULL);
252b5132 4186
8029a119
NC		 4187 s = bfd_get_section_by_name (abfd, name);
4188 BFD_ASSERT (s != NULL);
252b5132 4189
8029a119 4190 contents = bfd_alloc (abfd, size);
252b5132 4191
8029a119
NC		 4192 BFD_ASSERT (s->size == size);
4193 s->contents = contents;
4194}
906e58ca 4195
8029a119
NC		 4196bfd_boolean
4197bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
4198{
4199 struct elf32_arm_link_hash_table * globals;
906e58ca 4200
8029a119
NC		 4201 globals = elf32_arm_hash_table (info);
4202 BFD_ASSERT (globals != NULL);
906e58ca 4203
8029a119
NC		 4204 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4205 globals->arm_glue_size,
4206 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 4207
8029a119
NC		 4208 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4209 globals->thumb_glue_size,
4210 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 4211
8029a119
NC		 4212 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4213 globals->vfp11_erratum_glue_size,
4214 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 4215
8029a119
NC		 4216 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4217 globals->bx_glue_size,
845b51d6
PB		 4218 ARM_BX_GLUE_SECTION_NAME);
4219
b34976b6 4220 return TRUE;
252b5132
RH		 4221}
4222
a4fd1a8e 4223/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 4224 returns the symbol identifying the stub. */
4225
a4fd1a8e 4226static struct elf_link_hash_entry *
57e8b36a
NC		 4227record_arm_to_thumb_glue (struct bfd_link_info * link_info,
4228 struct elf_link_hash_entry * h)
252b5132
RH		 4229{
4230 const char * name = h->root.root.string;
63b0f745 4231 asection * s;
252b5132
RH		 4232 char * tmp_name;
4233 struct elf_link_hash_entry * myh;
14a793b2 4234 struct bfd_link_hash_entry * bh;
252b5132 4235 struct elf32_arm_link_hash_table * globals;
dc810e39 4236 bfd_vma val;
2f475487 4237 bfd_size_type size;
252b5132
RH		 4238
4239 globals = elf32_arm_hash_table (link_info);
4240
4241 BFD_ASSERT (globals != NULL);
4242 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4243
4244 s = bfd_get_section_by_name
4245 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
4246
252b5132
RH		 4247 BFD_ASSERT (s != NULL);
4248
57e8b36a 4249 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4250
4251 BFD_ASSERT (tmp_name);
4252
4253 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4254
4255 myh = elf_link_hash_lookup
b34976b6 4256 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 4257
4258 if (myh != NULL)
4259 {
9b485d32 4260 /* We've already seen this guy. */
252b5132 4261 free (tmp_name);
a4fd1a8e 4262 return myh;
252b5132
RH		 4263 }
4264
57e8b36a
NC		 4265 /* The only trick here is using hash_table->arm_glue_size as the value.
4266 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 4267 putting it. The +1 on the value marks that the stub has not been
4268 output yet - not that it is a Thumb function. */
14a793b2 4269 bh = NULL;
dc810e39
AM		 4270 val = globals->arm_glue_size + 1;
4271 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
4272 tmp_name, BSF_GLOBAL, s, val,
b34976b6 4273 NULL, TRUE, FALSE, &bh);
252b5132 4274
b7693d02
DJ		 4275 myh = (struct elf_link_hash_entry *) bh;
4276 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4277 myh->forced_local = 1;
4278
252b5132
RH		 4279 free (tmp_name);
4280
27e55c4d
PB		 4281 if (link_info->shared || globals->root.is_relocatable_executable
4282 || globals->pic_veneer)
2f475487 4283 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 4284 else if (globals->use_blx)
4285 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 4286 else
2f475487
AM		 4287 size = ARM2THUMB_STATIC_GLUE_SIZE;
4288
4289 s->size += size;
4290 globals->arm_glue_size += size;
252b5132 4291
a4fd1a8e 4292 return myh;
252b5132
RH		 4293}
4294
845b51d6
PB		 4295/* Allocate space for ARMv4 BX veneers. */
4296
4297static void
4298record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
4299{
4300 asection * s;
4301 struct elf32_arm_link_hash_table *globals;
4302 char *tmp_name;
4303 struct elf_link_hash_entry *myh;
4304 struct bfd_link_hash_entry *bh;
4305 bfd_vma val;
4306
4307 /* BX PC does not need a veneer. */
4308 if (reg == 15)
4309 return;
4310
4311 globals = elf32_arm_hash_table (link_info);
4312
4313 BFD_ASSERT (globals != NULL);
4314 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4315
4316 /* Check if this veneer has already been allocated. */
4317 if (globals->bx_glue_offset[reg])
4318 return;
4319
4320 s = bfd_get_section_by_name
4321 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
4322
4323 BFD_ASSERT (s != NULL);
4324
4325 /* Add symbol for veneer. */
4326 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 4327
845b51d6 4328 BFD_ASSERT (tmp_name);
906e58ca 4329
845b51d6 4330 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 4331
845b51d6
PB		 4332 myh = elf_link_hash_lookup
4333 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 4334
845b51d6 4335 BFD_ASSERT (myh == NULL);
906e58ca 4336
845b51d6
PB		 4337 bh = NULL;
4338 val = globals->bx_glue_size;
4339 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
4340 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
4341 NULL, TRUE, FALSE, &bh);
4342
4343 myh = (struct elf_link_hash_entry *) bh;
4344 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4345 myh->forced_local = 1;
4346
4347 s->size += ARM_BX_VENEER_SIZE;
4348 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
4349 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
4350}
4351
4352
c7b8f16e
JB		 4353/* Add an entry to the code/data map for section SEC. */
4354
4355static void
4356elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
4357{
4358 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
4359 unsigned int newidx;
906e58ca 4360
c7b8f16e
JB		 4361 if (sec_data->map == NULL)
4362 {
4363 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
4364 sec_data->mapcount = 0;
4365 sec_data->mapsize = 1;
4366 }
906e58ca 4367
c7b8f16e 4368 newidx = sec_data->mapcount++;
906e58ca 4369
c7b8f16e
JB		 4370 if (sec_data->mapcount > sec_data->mapsize)
4371 {
4372 sec_data->mapsize *= 2;
515ef31d
NC		 4373 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
4374 * sizeof (elf32_arm_section_map));
4375 }
4376
4377 if (sec_data->map)
4378 {
4379 sec_data->map[newidx].vma = vma;
4380 sec_data->map[newidx].type = type;
c7b8f16e 4381 }
c7b8f16e
JB		 4382}
4383
4384
4385/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
4386 veneers are handled for now. */
4387
4388static bfd_vma
4389record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
4390 elf32_vfp11_erratum_list *branch,
4391 bfd *branch_bfd,
4392 asection *branch_sec,
4393 unsigned int offset)
4394{
4395 asection *s;
4396 struct elf32_arm_link_hash_table *hash_table;
4397 char *tmp_name;
4398 struct elf_link_hash_entry *myh;
4399 struct bfd_link_hash_entry *bh;
4400 bfd_vma val;
4401 struct _arm_elf_section_data *sec_data;
4402 int errcount;
4403 elf32_vfp11_erratum_list *newerr;
906e58ca 4404
c7b8f16e 4405 hash_table = elf32_arm_hash_table (link_info);
906e58ca 4406
c7b8f16e
JB		 4407 BFD_ASSERT (hash_table != NULL);
4408 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 4409
c7b8f16e
JB		 4410 s = bfd_get_section_by_name
4411 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 4412
c7b8f16e 4413 sec_data = elf32_arm_section_data (s);
906e58ca 4414
c7b8f16e 4415 BFD_ASSERT (s != NULL);
906e58ca 4416
c7b8f16e
JB		 4417 tmp_name = bfd_malloc ((bfd_size_type) strlen
4418 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 4419
c7b8f16e 4420 BFD_ASSERT (tmp_name);
906e58ca 4421
c7b8f16e
JB		 4422 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
4423 hash_table->num_vfp11_fixes);
906e58ca 4424
c7b8f16e
JB		 4425 myh = elf_link_hash_lookup
4426 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 4427
c7b8f16e 4428 BFD_ASSERT (myh == NULL);
906e58ca 4429
c7b8f16e
JB		 4430 bh = NULL;
4431 val = hash_table->vfp11_erratum_glue_size;
4432 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
4433 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
4434 NULL, TRUE, FALSE, &bh);
4435
4436 myh = (struct elf_link_hash_entry *) bh;
4437 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4438 myh->forced_local = 1;
4439
4440 /* Link veneer back to calling location. */
4441 errcount = ++(sec_data->erratumcount);
4442 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 4443
c7b8f16e
JB		 4444 newerr->type = VFP11_ERRATUM_ARM_VENEER;
4445 newerr->vma = -1;
4446 newerr->u.v.branch = branch;
4447 newerr->u.v.id = hash_table->num_vfp11_fixes;
4448 branch->u.b.veneer = newerr;
4449
4450 newerr->next = sec_data->erratumlist;
4451 sec_data->erratumlist = newerr;
4452
4453 /* A symbol for the return from the veneer. */
4454 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
4455 hash_table->num_vfp11_fixes);
4456
4457 myh = elf_link_hash_lookup
4458 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 4459
c7b8f16e
JB		 4460 if (myh != NULL)
4461 abort ();
4462
4463 bh = NULL;
4464 val = offset + 4;
4465 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
4466 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 4467
c7b8f16e
JB		 4468 myh = (struct elf_link_hash_entry *) bh;
4469 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4470 myh->forced_local = 1;
4471
4472 free (tmp_name);
906e58ca 4473
c7b8f16e
JB		 4474 /* Generate a mapping symbol for the veneer section, and explicitly add an
4475 entry for that symbol to the code/data map for the section. */
4476 if (hash_table->vfp11_erratum_glue_size == 0)
4477 {
4478 bh = NULL;
4479 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
4480 ever requires this erratum fix. */
4481 _bfd_generic_link_add_one_symbol (link_info,
4482 hash_table->bfd_of_glue_owner, "$a",
4483 BSF_LOCAL, s, 0, NULL,
4484 TRUE, FALSE, &bh);
4485
4486 myh = (struct elf_link_hash_entry *) bh;
4487 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
4488 myh->forced_local = 1;
906e58ca 4489
c7b8f16e
JB		 4490 /* The elf32_arm_init_maps function only cares about symbols from input
4491 BFDs. We must make a note of this generated mapping symbol
4492 ourselves so that code byteswapping works properly in
4493 elf32_arm_write_section. */
4494 elf32_arm_section_map_add (s, 'a', 0);
4495 }
906e58ca 4496
c7b8f16e
JB		 4497 s->size += VFP11_ERRATUM_VENEER_SIZE;
4498 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
4499 hash_table->num_vfp11_fixes++;
906e58ca 4500
c7b8f16e
JB		 4501 /* The offset of the veneer. */
4502 return val;
4503}
4504
8029a119 4505#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 4506 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
4507 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 4508
4509/* Create a fake section for use by the ARM backend of the linker. */
4510
4511static bfd_boolean
4512arm_make_glue_section (bfd * abfd, const char * name)
4513{
4514 asection * sec;
4515
4516 sec = bfd_get_section_by_name (abfd, name);
4517 if (sec != NULL)
4518 /* Already made. */
4519 return TRUE;
4520
4521 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
4522
4523 if (sec == NULL
4524 || !bfd_set_section_alignment (abfd, sec, 2))
4525 return FALSE;
4526
4527 /* Set the gc mark to prevent the section from being removed by garbage
4528 collection, despite the fact that no relocs refer to this section. */
4529 sec->gc_mark = 1;
4530
4531 return TRUE;
4532}
4533
8afb0e02
NC		 4534/* Add the glue sections to ABFD. This function is called from the
4535 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 4536
b34976b6 4537bfd_boolean
57e8b36a
NC		 4538bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
4539 struct bfd_link_info *info)
252b5132 4540{
8afb0e02
NC		 4541 /* If we are only performing a partial
4542 link do not bother adding the glue. */
1049f94e 4543 if (info->relocatable)
b34976b6 4544 return TRUE;
252b5132 4545
8029a119
NC		 4546 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
4547 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
4548 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
4549 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 4550}
4551
4552/* Select a BFD to be used to hold the sections used by the glue code.
4553 This function is called from the linker scripts in ld/emultempl/
8029a119 4554 {armelf/pe}.em. */
8afb0e02 4555
b34976b6 4556bfd_boolean
57e8b36a 4557bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 4558{
4559 struct elf32_arm_link_hash_table *globals;
4560
4561 /* If we are only performing a partial link
4562 do not bother getting a bfd to hold the glue. */
1049f94e 4563 if (info->relocatable)
b34976b6 4564 return TRUE;
8afb0e02 4565
b7693d02
DJ		 4566 /* Make sure we don't attach the glue sections to a dynamic object. */
4567 BFD_ASSERT (!(abfd->flags & DYNAMIC));
4568
8afb0e02
NC		 4569 globals = elf32_arm_hash_table (info);
4570
4571 BFD_ASSERT (globals != NULL);
4572
4573 if (globals->bfd_of_glue_owner != NULL)
b34976b6 4574 return TRUE;
8afb0e02 4575
252b5132
RH		 4576 /* Save the bfd for later use. */
4577 globals->bfd_of_glue_owner = abfd;
cedb70c5 4578
b34976b6 4579 return TRUE;
252b5132
RH		 4580}
4581
906e58ca
NC		 4582static void
4583check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 4584{
104d59d1
JM		 4585 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4586 Tag_CPU_arch) > 2)
39b41c9c
PB		 4587 globals->use_blx = 1;
4588}
4589
b34976b6 4590bfd_boolean
57e8b36a 4591bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 4592 struct bfd_link_info *link_info)
252b5132
RH		 4593{
4594 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 4595 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 4596 Elf_Internal_Rela *irel, *irelend;
4597 bfd_byte *contents = NULL;
252b5132
RH		 4598
4599 asection *sec;
4600 struct elf32_arm_link_hash_table *globals;
4601
4602 /* If we are only performing a partial link do not bother
4603 to construct any glue. */
1049f94e 4604 if (link_info->relocatable)
b34976b6 4605 return TRUE;
252b5132 4606
39ce1a6a
NC		 4607 /* Here we have a bfd that is to be included on the link. We have a
4608 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 4609 globals = elf32_arm_hash_table (link_info);
4610
4611 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 4612
4613 check_use_blx (globals);
252b5132 4614
d504ffc8 4615 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 4616 {
d003868e
AM		 4617 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
4618 abfd);
e489d0ae
PB		 4619 return FALSE;
4620 }
f21f3fe0 4621
39ce1a6a
NC		 4622 /* PR 5398: If we have not decided to include any loadable sections in
4623 the output then we will not have a glue owner bfd. This is OK, it
4624 just means that there is nothing else for us to do here. */
4625 if (globals->bfd_of_glue_owner == NULL)
4626 return TRUE;
4627
252b5132
RH		 4628 /* Rummage around all the relocs and map the glue vectors. */
4629 sec = abfd->sections;
4630
4631 if (sec == NULL)
b34976b6 4632 return TRUE;
252b5132
RH		 4633
4634 for (; sec != NULL; sec = sec->next)
4635 {
4636 if (sec->reloc_count == 0)
4637 continue;
4638
2f475487
AM		 4639 if ((sec->flags & SEC_EXCLUDE) != 0)
4640 continue;
4641
0ffa91dd 4642 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 4643
9b485d32 4644 /* Load the relocs. */
6cdc0ccc 4645 internal_relocs
906e58ca 4646 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 4647
6cdc0ccc
AM		 4648 if (internal_relocs == NULL)
4649 goto error_return;
252b5132 4650
6cdc0ccc
AM		 4651 irelend = internal_relocs + sec->reloc_count;
4652 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 4653 {
4654 long r_type;
4655 unsigned long r_index;
252b5132
RH		 4656
4657 struct elf_link_hash_entry *h;
4658
4659 r_type = ELF32_R_TYPE (irel->r_info);
4660 r_index = ELF32_R_SYM (irel->r_info);
4661
9b485d32 4662 /* These are the only relocation types we care about. */
ba96a88f 4663 if ( r_type != R_ARM_PC24
845b51d6 4664 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 4665 continue;
4666
4667 /* Get the section contents if we haven't done so already. */
4668 if (contents == NULL)
4669 {
4670 /* Get cached copy if it exists. */
4671 if (elf_section_data (sec)->this_hdr.contents != NULL)
4672 contents = elf_section_data (sec)->this_hdr.contents;
4673 else
4674 {
4675 /* Go get them off disk. */
57e8b36a 4676 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 4677 goto error_return;
4678 }
4679 }
4680
845b51d6
PB		 4681 if (r_type == R_ARM_V4BX)
4682 {
4683 int reg;
4684
4685 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
4686 record_arm_bx_glue (link_info, reg);
4687 continue;
4688 }
4689
a7c10850 4690 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 4691 h = NULL;
4692
9b485d32 4693 /* We don't care about local symbols. */
252b5132
RH		 4694 if (r_index < symtab_hdr->sh_info)
4695 continue;
4696
9b485d32 4697 /* This is an external symbol. */
252b5132
RH		 4698 r_index -= symtab_hdr->sh_info;
4699 h = (struct elf_link_hash_entry *)
4700 elf_sym_hashes (abfd)[r_index];
4701
4702 /* If the relocation is against a static symbol it must be within
4703 the current section and so cannot be a cross ARM/Thumb relocation. */
4704 if (h == NULL)
4705 continue;
4706
d504ffc8
DJ		 4707 /* If the call will go through a PLT entry then we do not need
4708 glue. */
4709 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 4710 continue;
4711
252b5132
RH		 4712 switch (r_type)
4713 {
4714 case R_ARM_PC24:
4715 /* This one is a call from arm code. We need to look up
2f0ca46a 4716 the target of the call. If it is a thumb target, we
252b5132 4717 insert glue. */
ebe24dd4 4718 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 4719 record_arm_to_thumb_glue (link_info, h);
4720 break;
4721
252b5132 4722 default:
c6596c5e 4723 abort ();
252b5132
RH		 4724 }
4725 }
6cdc0ccc
AM		 4726
4727 if (contents != NULL
4728 && elf_section_data (sec)->this_hdr.contents != contents)
4729 free (contents);
4730 contents = NULL;
4731
4732 if (internal_relocs != NULL
4733 && elf_section_data (sec)->relocs != internal_relocs)
4734 free (internal_relocs);
4735 internal_relocs = NULL;
252b5132
RH		 4736 }
4737
b34976b6 4738 return TRUE;
9a5aca8c 4739
252b5132 4740error_return:
6cdc0ccc
AM		 4741 if (contents != NULL
4742 && elf_section_data (sec)->this_hdr.contents != contents)
4743 free (contents);
4744 if (internal_relocs != NULL
4745 && elf_section_data (sec)->relocs != internal_relocs)
4746 free (internal_relocs);
9a5aca8c 4747
b34976b6 4748 return FALSE;
252b5132 4749}
7e392df6 4750#endif
252b5132 4751
eb043451 4752
c7b8f16e
JB		 4753/* Initialise maps of ARM/Thumb/data for input BFDs. */
4754
4755void
4756bfd_elf32_arm_init_maps (bfd *abfd)
4757{
4758 Elf_Internal_Sym *isymbuf;
4759 Elf_Internal_Shdr *hdr;
4760 unsigned int i, localsyms;
4761
af1f4419
NC		 4762 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
4763 if (! is_arm_elf (abfd))
4764 return;
4765
c7b8f16e
JB		 4766 if ((abfd->flags & DYNAMIC) != 0)
4767 return;
4768
0ffa91dd 4769 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 4770 localsyms = hdr->sh_info;
4771
4772 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
4773 should contain the number of local symbols, which should come before any
4774 global symbols. Mapping symbols are always local. */
4775 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
4776 NULL);
4777
4778 /* No internal symbols read? Skip this BFD. */
4779 if (isymbuf == NULL)
4780 return;
4781
4782 for (i = 0; i < localsyms; i++)
4783 {
4784 Elf_Internal_Sym *isym = &isymbuf[i];
4785 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
4786 const char *name;
906e58ca 4787
c7b8f16e
JB		 4788 if (sec != NULL
4789 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
4790 {
4791 name = bfd_elf_string_from_elf_section (abfd,
4792 hdr->sh_link, isym->st_name);
906e58ca 4793
c7b8f16e
JB		 4794 if (bfd_is_arm_special_symbol_name (name,
4795 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
4796 elf32_arm_section_map_add (sec, name[1], isym->st_value);
4797 }
4798 }
4799}
4800
4801
4802void
4803bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
4804{
4805 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 4806 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 4807
c7b8f16e
JB		 4808 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
4809 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
4810 {
4811 switch (globals->vfp11_fix)
4812 {
4813 case BFD_ARM_VFP11_FIX_DEFAULT:
4814 case BFD_ARM_VFP11_FIX_NONE:
4815 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4816 break;
906e58ca 4817
c7b8f16e
JB		 4818 default:
4819 /* Give a warning, but do as the user requests anyway. */
4820 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
4821 "workaround is not necessary for target architecture"), obfd);
4822 }
4823 }
4824 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
4825 /* For earlier architectures, we might need the workaround, but do not
4826 enable it by default. If users is running with broken hardware, they
4827 must enable the erratum fix explicitly. */
4828 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4829}
4830
4831
906e58ca
NC		 4832enum bfd_arm_vfp11_pipe
4833{
c7b8f16e
JB		 4834 VFP11_FMAC,
4835 VFP11_LS,
4836 VFP11_DS,
4837 VFP11_BAD
4838};
4839
4840/* Return a VFP register number. This is encoded as RX:X for single-precision
4841 registers, or X:RX for double-precision registers, where RX is the group of
4842 four bits in the instruction encoding and X is the single extension bit.
4843 RX and X fields are specified using their lowest (starting) bit. The return
4844 value is:
4845
4846 0...31: single-precision registers s0...s31
4847 32...63: double-precision registers d0...d31.
906e58ca 4848
c7b8f16e
JB		 4849 Although X should be zero for VFP11 (encoding d0...d15 only), we might
4850 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 4851
c7b8f16e
JB		 4852static unsigned int
4853bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
4854 unsigned int x)
4855{
4856 if (is_double)
4857 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
4858 else
4859 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
4860}
4861
4862/* Set bits in *WMASK according to a register number REG as encoded by
4863 bfd_arm_vfp11_regno(). Ignore d16-d31. */
4864
4865static void
4866bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
4867{
4868 if (reg < 32)
4869 *wmask |= 1 << reg;
4870 else if (reg < 48)
4871 *wmask |= 3 << ((reg - 32) * 2);
4872}
4873
4874/* Return TRUE if WMASK overwrites anything in REGS. */
4875
4876static bfd_boolean
4877bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
4878{
4879 int i;
906e58ca 4880
c7b8f16e
JB		 4881 for (i = 0; i < numregs; i++)
4882 {
4883 unsigned int reg = regs[i];
4884
4885 if (reg < 32 && (wmask & (1 << reg)) != 0)
4886 return TRUE;
906e58ca 4887
c7b8f16e
JB		 4888 reg -= 32;
4889
4890 if (reg >= 16)
4891 continue;
906e58ca 4892
c7b8f16e
JB		 4893 if ((wmask & (3 << (reg * 2))) != 0)
4894 return TRUE;
4895 }
906e58ca 4896
c7b8f16e
JB		 4897 return FALSE;
4898}
4899
4900/* In this function, we're interested in two things: finding input registers
4901 for VFP data-processing instructions, and finding the set of registers which
4902 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
4903 hold the written set, so FLDM etc. are easy to deal with (we're only
4904 interested in 32 SP registers or 16 dp registers, due to the VFP version
4905 implemented by the chip in question). DP registers are marked by setting
4906 both SP registers in the write mask). */
4907
4908static enum bfd_arm_vfp11_pipe
4909bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
4910 int *numregs)
4911{
4912 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
4913 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
4914
4915 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
4916 {
4917 unsigned int pqrs;
4918 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
4919 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
4920
4921 pqrs = ((insn & 0x00800000) >> 20)
4922 | ((insn & 0x00300000) >> 19)
4923 | ((insn & 0x00000040) >> 6);
4924
4925 switch (pqrs)
4926 {
4927 case 0: /* fmac[sd]. */
4928 case 1: /* fnmac[sd]. */
4929 case 2: /* fmsc[sd]. */
4930 case 3: /* fnmsc[sd]. */
4931 pipe = VFP11_FMAC;
4932 bfd_arm_vfp11_write_mask (destmask, fd);
4933 regs[0] = fd;
4934 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
4935 regs[2] = fm;
4936 *numregs = 3;
4937 break;
4938
4939 case 4: /* fmul[sd]. */
4940 case 5: /* fnmul[sd]. */
4941 case 6: /* fadd[sd]. */
4942 case 7: /* fsub[sd]. */
4943 pipe = VFP11_FMAC;
4944 goto vfp_binop;
4945
4946 case 8: /* fdiv[sd]. */
4947 pipe = VFP11_DS;
4948 vfp_binop:
4949 bfd_arm_vfp11_write_mask (destmask, fd);
4950 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
4951 regs[1] = fm;
4952 *numregs = 2;
4953 break;
4954
4955 case 15: /* extended opcode. */
4956 {
4957 unsigned int extn = ((insn >> 15) & 0x1e)
4958 | ((insn >> 7) & 1);
4959
4960 switch (extn)
4961 {
4962 case 0: /* fcpy[sd]. */
4963 case 1: /* fabs[sd]. */
4964 case 2: /* fneg[sd]. */
4965 case 8: /* fcmp[sd]. */
4966 case 9: /* fcmpe[sd]. */
4967 case 10: /* fcmpz[sd]. */
4968 case 11: /* fcmpez[sd]. */
4969 case 16: /* fuito[sd]. */
4970 case 17: /* fsito[sd]. */
4971 case 24: /* ftoui[sd]. */
4972 case 25: /* ftouiz[sd]. */
4973 case 26: /* ftosi[sd]. */
4974 case 27: /* ftosiz[sd]. */
4975 /* These instructions will not bounce due to underflow. */
4976 *numregs = 0;
4977 pipe = VFP11_FMAC;
4978 break;
4979
4980 case 3: /* fsqrt[sd]. */
4981 /* fsqrt cannot underflow, but it can (perhaps) overwrite
4982 registers to cause the erratum in previous instructions. */
4983 bfd_arm_vfp11_write_mask (destmask, fd);
4984 pipe = VFP11_DS;
4985 break;
4986
4987 case 15: /* fcvt{ds,sd}. */
4988 {
4989 int rnum = 0;
4990
4991 bfd_arm_vfp11_write_mask (destmask, fd);
4992
4993 /* Only FCVTSD can underflow. */
4994 if ((insn & 0x100) != 0)
4995 regs[rnum++] = fm;
4996
4997 *numregs = rnum;
4998
4999 pipe = VFP11_FMAC;
5000 }
5001 break;
5002
5003 default:
5004 return VFP11_BAD;
5005 }
5006 }
5007 break;
5008
5009 default:
5010 return VFP11_BAD;
5011 }
5012 }
5013 /* Two-register transfer. */
5014 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5015 {
5016 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5017
c7b8f16e
JB		 5018 if ((insn & 0x100000) == 0)
5019 {
5020 if (is_double)
5021 bfd_arm_vfp11_write_mask (destmask, fm);
5022 else
5023 {
5024 bfd_arm_vfp11_write_mask (destmask, fm);
5025 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5026 }
5027 }
5028
5029 pipe = VFP11_LS;
5030 }
5031 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5032 {
5033 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5034 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5035
c7b8f16e
JB		 5036 switch (puw)
5037 {
5038 case 0: /* Two-reg transfer. We should catch these above. */
5039 abort ();
906e58ca 5040
c7b8f16e
JB		 5041 case 2: /* fldm[sdx]. */
5042 case 3:
5043 case 5:
5044 {
5045 unsigned int i, offset = insn & 0xff;
5046
5047 if (is_double)
5048 offset >>= 1;
5049
5050 for (i = fd; i < fd + offset; i++)
5051 bfd_arm_vfp11_write_mask (destmask, i);
5052 }
5053 break;
906e58ca 5054
c7b8f16e
JB		 5055 case 4: /* fld[sd]. */
5056 case 6:
5057 bfd_arm_vfp11_write_mask (destmask, fd);
5058 break;
906e58ca 5059
c7b8f16e
JB		 5060 default:
5061 return VFP11_BAD;
5062 }
5063
5064 pipe = VFP11_LS;
5065 }
5066 /* Single-register transfer. Note L==0. */
5067 else if ((insn & 0x0f100e10) == 0x0e000a10)
5068 {
5069 unsigned int opcode = (insn >> 21) & 7;
5070 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5071
5072 switch (opcode)
5073 {
5074 case 0: /* fmsr/fmdlr. */
5075 case 1: /* fmdhr. */
5076 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5077 destination register. I don't know if this is exactly right,
5078 but it is the conservative choice. */
5079 bfd_arm_vfp11_write_mask (destmask, fn);
5080 break;
5081
5082 case 7: /* fmxr. */
5083 break;
5084 }
5085
5086 pipe = VFP11_LS;
5087 }
5088
5089 return pipe;
5090}
5091
5092
5093static int elf32_arm_compare_mapping (const void * a, const void * b);
5094
5095
5096/* Look for potentially-troublesome code sequences which might trigger the
5097 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5098 (available from ARM) for details of the erratum. A short version is
5099 described in ld.texinfo. */
5100
5101bfd_boolean
5102bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5103{
5104 asection *sec;
5105 bfd_byte *contents = NULL;
5106 int state = 0;
5107 int regs[3], numregs = 0;
5108 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5109 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5110
c7b8f16e
JB		 5111 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5112 The states transition as follows:
906e58ca 5113
c7b8f16e
JB		 5114 0 -> 1 (vector) or 0 -> 2 (scalar)
5115 A VFP FMAC-pipeline instruction has been seen. Fill
5116 regs[0]..regs[numregs-1] with its input operands. Remember this
5117 instruction in 'first_fmac'.
5118
5119 1 -> 2
5120 Any instruction, except for a VFP instruction which overwrites
5121 regs[*].
906e58ca 5122
c7b8f16e
JB		 5123 1 -> 3 [ -> 0 ] or
5124 2 -> 3 [ -> 0 ]
5125 A VFP instruction has been seen which overwrites any of regs[*].
5126 We must make a veneer! Reset state to 0 before examining next
5127 instruction.
906e58ca 5128
c7b8f16e
JB		 5129 2 -> 0
5130 If we fail to match anything in state 2, reset to state 0 and reset
5131 the instruction pointer to the instruction after 'first_fmac'.
5132
5133 If the VFP11 vector mode is in use, there must be at least two unrelated
5134 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5135 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5136
5137 /* If we are only performing a partial link do not bother
5138 to construct any glue. */
5139 if (link_info->relocatable)
5140 return TRUE;
5141
0ffa91dd
NC		 5142 /* Skip if this bfd does not correspond to an ELF image. */
5143 if (! is_arm_elf (abfd))
5144 return TRUE;
906e58ca 5145
c7b8f16e
JB		 5146 /* We should have chosen a fix type by the time we get here. */
5147 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
5148
5149 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
5150 return TRUE;
2e6030b9 5151
33a7ffc2
JM		 5152 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5153 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
5154 return TRUE;
5155
c7b8f16e
JB		 5156 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5157 {
5158 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
5159 struct _arm_elf_section_data *sec_data;
5160
5161 /* If we don't have executable progbits, we're not interested in this
5162 section. Also skip if section is to be excluded. */
5163 if (elf_section_type (sec) != SHT_PROGBITS
5164 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
5165 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 5166 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
5167 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 5168 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
5169 continue;
5170
5171 sec_data = elf32_arm_section_data (sec);
906e58ca 5172
c7b8f16e
JB		 5173 if (sec_data->mapcount == 0)
5174 continue;
906e58ca 5175
c7b8f16e
JB		 5176 if (elf_section_data (sec)->this_hdr.contents != NULL)
5177 contents = elf_section_data (sec)->this_hdr.contents;
5178 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5179 goto error_return;
5180
5181 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
5182 elf32_arm_compare_mapping);
5183
5184 for (span = 0; span < sec_data->mapcount; span++)
5185 {
5186 unsigned int span_start = sec_data->map[span].vma;
5187 unsigned int span_end = (span == sec_data->mapcount - 1)
5188 ? sec->size : sec_data->map[span + 1].vma;
5189 char span_type = sec_data->map[span].type;
906e58ca 5190
c7b8f16e
JB		 5191 /* FIXME: Only ARM mode is supported at present. We may need to
5192 support Thumb-2 mode also at some point. */
5193 if (span_type != 'a')
5194 continue;
5195
5196 for (i = span_start; i < span_end;)
5197 {
5198 unsigned int next_i = i + 4;
5199 unsigned int insn = bfd_big_endian (abfd)
5200 ? (contents[i] << 24)
5201 | (contents[i + 1] << 16)
5202 | (contents[i + 2] << 8)
5203 | contents[i + 3]
5204 : (contents[i + 3] << 24)
5205 | (contents[i + 2] << 16)
5206 | (contents[i + 1] << 8)
5207 | contents[i];
5208 unsigned int writemask = 0;
5209 enum bfd_arm_vfp11_pipe pipe;
5210
5211 switch (state)
5212 {
5213 case 0:
5214 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
5215 &numregs);
5216 /* I'm assuming the VFP11 erratum can trigger with denorm
5217 operands on either the FMAC or the DS pipeline. This might
5218 lead to slightly overenthusiastic veneer insertion. */
5219 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
5220 {
5221 state = use_vector ? 1 : 2;
5222 first_fmac = i;
5223 veneer_of_insn = insn;
5224 }
5225 break;
5226
5227 case 1:
5228 {
5229 int other_regs[3], other_numregs;
5230 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5231 other_regs,
5232 &other_numregs);
5233 if (pipe != VFP11_BAD
5234 && bfd_arm_vfp11_antidependency (writemask, regs,
5235 numregs))
5236 state = 3;
5237 else
5238 state = 2;
5239 }
5240 break;
5241
5242 case 2:
5243 {
5244 int other_regs[3], other_numregs;
5245 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5246 other_regs,
5247 &other_numregs);
5248 if (pipe != VFP11_BAD
5249 && bfd_arm_vfp11_antidependency (writemask, regs,
5250 numregs))
5251 state = 3;
5252 else
5253 {
5254 state = 0;
5255 next_i = first_fmac + 4;
5256 }
5257 }
5258 break;
5259
5260 case 3:
5261 abort (); /* Should be unreachable. */
5262 }
5263
5264 if (state == 3)
5265 {
5266 elf32_vfp11_erratum_list *newerr
5267 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5268 int errcount;
5269
5270 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
5271
5272 newerr->u.b.vfp_insn = veneer_of_insn;
5273
5274 switch (span_type)
5275 {
5276 case 'a':
5277 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
5278 break;
906e58ca 5279
c7b8f16e
JB		 5280 default:
5281 abort ();
5282 }
5283
5284 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
5285 first_fmac);
5286
5287 newerr->vma = -1;
5288
5289 newerr->next = sec_data->erratumlist;
5290 sec_data->erratumlist = newerr;
5291
5292 state = 0;
5293 }
5294
5295 i = next_i;
5296 }
5297 }
906e58ca 5298
c7b8f16e
JB		 5299 if (contents != NULL
5300 && elf_section_data (sec)->this_hdr.contents != contents)
5301 free (contents);
5302 contents = NULL;
5303 }
5304
5305 return TRUE;
5306
5307error_return:
5308 if (contents != NULL
5309 && elf_section_data (sec)->this_hdr.contents != contents)
5310 free (contents);
906e58ca 5311
c7b8f16e
JB		 5312 return FALSE;
5313}
5314
5315/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
5316 after sections have been laid out, using specially-named symbols. */
5317
5318void
5319bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
5320 struct bfd_link_info *link_info)
5321{
5322 asection *sec;
5323 struct elf32_arm_link_hash_table *globals;
5324 char *tmp_name;
906e58ca 5325
c7b8f16e
JB		 5326 if (link_info->relocatable)
5327 return;
2e6030b9
MS		 5328
5329 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 5330 if (! is_arm_elf (abfd))
2e6030b9
MS		 5331 return;
5332
c7b8f16e 5333 globals = elf32_arm_hash_table (link_info);
906e58ca 5334
c7b8f16e
JB		 5335 tmp_name = bfd_malloc ((bfd_size_type) strlen
5336 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5337
5338 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5339 {
5340 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5341 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 5342
c7b8f16e
JB		 5343 for (; errnode != NULL; errnode = errnode->next)
5344 {
5345 struct elf_link_hash_entry *myh;
5346 bfd_vma vma;
5347
5348 switch (errnode->type)
5349 {
5350 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
5351 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
5352 /* Find veneer symbol. */
5353 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5354 errnode->u.b.veneer->u.v.id);
5355
5356 myh = elf_link_hash_lookup
5357 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5358
5359 if (myh == NULL)
5360 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
5361 "`%s'"), abfd, tmp_name);
5362
5363 vma = myh->root.u.def.section->output_section->vma
5364 + myh->root.u.def.section->output_offset
5365 + myh->root.u.def.value;
5366
5367 errnode->u.b.veneer->vma = vma;
5368 break;
5369
5370 case VFP11_ERRATUM_ARM_VENEER:
5371 case VFP11_ERRATUM_THUMB_VENEER:
5372 /* Find return location. */
5373 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5374 errnode->u.v.id);
5375
5376 myh = elf_link_hash_lookup
5377 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5378
5379 if (myh == NULL)
5380 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
5381 "`%s'"), abfd, tmp_name);
5382
5383 vma = myh->root.u.def.section->output_section->vma
5384 + myh->root.u.def.section->output_offset
5385 + myh->root.u.def.value;
5386
5387 errnode->u.v.branch->vma = vma;
5388 break;
906e58ca 5389
c7b8f16e
JB		 5390 default:
5391 abort ();
5392 }
5393 }
5394 }
906e58ca 5395
c7b8f16e
JB		 5396 free (tmp_name);
5397}
5398
5399
eb043451
PB		 5400/* Set target relocation values needed during linking. */
5401
5402void
bf21ed78
MS		 5403bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
5404 struct bfd_link_info *link_info,
eb043451 5405 int target1_is_rel,
319850b4 5406 char * target2_type,
33bfe774 5407 int fix_v4bx,
c7b8f16e 5408 int use_blx,
bf21ed78 5409 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481
JM		 5410 int no_enum_warn, int no_wchar_warn,
5411 int pic_veneer)
eb043451
PB		 5412{
5413 struct elf32_arm_link_hash_table *globals;
5414
5415 globals = elf32_arm_hash_table (link_info);
5416
5417 globals->target1_is_rel = target1_is_rel;
5418 if (strcmp (target2_type, "rel") == 0)
5419 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 5420 else if (strcmp (target2_type, "abs") == 0)
5421 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 5422 else if (strcmp (target2_type, "got-rel") == 0)
5423 globals->target2_reloc = R_ARM_GOT_PREL;
5424 else
5425 {
5426 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
5427 target2_type);
5428 }
319850b4 5429 globals->fix_v4bx = fix_v4bx;
33bfe774 5430 globals->use_blx |= use_blx;
c7b8f16e 5431 globals->vfp11_fix = vfp11_fix;
27e55c4d 5432 globals->pic_veneer = pic_veneer;
bf21ed78 5433
0ffa91dd
NC		 5434 BFD_ASSERT (is_arm_elf (output_bfd));
5435 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 5436 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 5437}
eb043451 5438
12a0a0fd 5439/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 5440
12a0a0fd
PB		 5441static void
5442insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
5443{
5444 bfd_vma upper;
5445 bfd_vma lower;
5446 int reloc_sign;
5447
5448 BFD_ASSERT ((offset & 1) == 0);
5449
5450 upper = bfd_get_16 (abfd, insn);
5451 lower = bfd_get_16 (abfd, insn + 2);
5452 reloc_sign = (offset < 0) ? 1 : 0;
5453 upper = (upper & ~(bfd_vma) 0x7ff)
5454 | ((offset >> 12) & 0x3ff)
5455 | (reloc_sign << 10);
906e58ca 5456 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 5457 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
5458 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
5459 | ((offset >> 1) & 0x7ff);
5460 bfd_put_16 (abfd, upper, insn);
5461 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 5462}
5463
9b485d32
NC		 5464/* Thumb code calling an ARM function. */
5465
252b5132 5466static int
57e8b36a
NC		 5467elf32_thumb_to_arm_stub (struct bfd_link_info * info,
5468 const char * name,
5469 bfd * input_bfd,
5470 bfd * output_bfd,
5471 asection * input_section,
5472 bfd_byte * hit_data,
5473 asection * sym_sec,
5474 bfd_vma offset,
5475 bfd_signed_vma addend,
f2a9dd69
DJ		 5476 bfd_vma val,
5477 char **error_message)
252b5132 5478{
bcbdc74c 5479 asection * s = 0;
dc810e39 5480 bfd_vma my_offset;
252b5132 5481 long int ret_offset;
bcbdc74c
NC		 5482 struct elf_link_hash_entry * myh;
5483 struct elf32_arm_link_hash_table * globals;
252b5132 5484
f2a9dd69 5485 myh = find_thumb_glue (info, name, error_message);
252b5132 5486 if (myh == NULL)
b34976b6 5487 return FALSE;
252b5132
RH		 5488
5489 globals = elf32_arm_hash_table (info);
5490
5491 BFD_ASSERT (globals != NULL);
5492 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5493
5494 my_offset = myh->root.u.def.value;
5495
5496 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
5497 THUMB2ARM_GLUE_SECTION_NAME);
5498
5499 BFD_ASSERT (s != NULL);
5500 BFD_ASSERT (s->contents != NULL);
5501 BFD_ASSERT (s->output_section != NULL);
5502
5503 if ((my_offset & 0x01) == 0x01)
5504 {
5505 if (sym_sec != NULL
5506 && sym_sec->owner != NULL
5507 && !INTERWORK_FLAG (sym_sec->owner))
5508 {
8f615d07 5509 (*_bfd_error_handler)
d003868e
AM		 5510 (_("%B(%s): warning: interworking not enabled.\n"
5511 " first occurrence: %B: thumb call to arm"),
5512 sym_sec->owner, input_bfd, name);
252b5132 5513
b34976b6 5514 return FALSE;
252b5132
RH		 5515 }
5516
5517 --my_offset;
5518 myh->root.u.def.value = my_offset;
5519
52ab56c2
PB		 5520 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
5521 s->contents + my_offset);
252b5132 5522
52ab56c2
PB		 5523 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
5524 s->contents + my_offset + 2);
252b5132
RH		 5525
5526 ret_offset =
9b485d32
NC		 5527 /* Address of destination of the stub. */
5528 ((bfd_signed_vma) val)
252b5132 5529 - ((bfd_signed_vma)
57e8b36a
NC		 5530 /* Offset from the start of the current section
5531 to the start of the stubs. */
9b485d32
NC		 5532 (s->output_offset
5533 /* Offset of the start of this stub from the start of the stubs. */
5534 + my_offset
5535 /* Address of the start of the current section. */
5536 + s->output_section->vma)
5537 /* The branch instruction is 4 bytes into the stub. */
5538 + 4
5539 /* ARM branches work from the pc of the instruction + 8. */
5540 + 8);
252b5132 5541
52ab56c2
PB		 5542 put_arm_insn (globals, output_bfd,
5543 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
5544 s->contents + my_offset + 4);
252b5132
RH		 5545 }
5546
5547 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
5548
427bfd90
NC		 5549 /* Now go back and fix up the original BL insn to point to here. */
5550 ret_offset =
5551 /* Address of where the stub is located. */
5552 (s->output_section->vma + s->output_offset + my_offset)
5553 /* Address of where the BL is located. */
57e8b36a
NC		 5554 - (input_section->output_section->vma + input_section->output_offset
5555 + offset)
427bfd90
NC		 5556 /* Addend in the relocation. */
5557 - addend
5558 /* Biassing for PC-relative addressing. */
5559 - 8;
252b5132 5560
12a0a0fd 5561 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 5562
b34976b6 5563 return TRUE;
252b5132
RH		 5564}
5565
a4fd1a8e 5566/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 5567
a4fd1a8e
PB		 5568static struct elf_link_hash_entry *
5569elf32_arm_create_thumb_stub (struct bfd_link_info * info,
5570 const char * name,
5571 bfd * input_bfd,
5572 bfd * output_bfd,
5573 asection * sym_sec,
5574 bfd_vma val,
8029a119
NC		 5575 asection * s,
5576 char ** error_message)
252b5132 5577{
dc810e39 5578 bfd_vma my_offset;
252b5132 5579 long int ret_offset;
bcbdc74c
NC		 5580 struct elf_link_hash_entry * myh;
5581 struct elf32_arm_link_hash_table * globals;
252b5132 5582
f2a9dd69 5583 myh = find_arm_glue (info, name, error_message);
252b5132 5584 if (myh == NULL)
a4fd1a8e 5585 return NULL;
252b5132
RH		 5586
5587 globals = elf32_arm_hash_table (info);
5588
5589 BFD_ASSERT (globals != NULL);
5590 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5591
5592 my_offset = myh->root.u.def.value;
252b5132
RH		 5593
5594 if ((my_offset & 0x01) == 0x01)
5595 {
5596 if (sym_sec != NULL
5597 && sym_sec->owner != NULL
5598 && !INTERWORK_FLAG (sym_sec->owner))
5599 {
8f615d07 5600 (*_bfd_error_handler)
d003868e
AM		 5601 (_("%B(%s): warning: interworking not enabled.\n"
5602 " first occurrence: %B: arm call to thumb"),
5603 sym_sec->owner, input_bfd, name);
252b5132 5604 }
9b485d32 5605
252b5132
RH		 5606 --my_offset;
5607 myh->root.u.def.value = my_offset;
5608
27e55c4d
PB		 5609 if (info->shared || globals->root.is_relocatable_executable
5610 || globals->pic_veneer)
8f6277f5
PB		 5611 {
5612 /* For relocatable objects we can't use absolute addresses,
5613 so construct the address from a relative offset. */
5614 /* TODO: If the offset is small it's probably worth
5615 constructing the address with adds. */
52ab56c2
PB		 5616 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
5617 s->contents + my_offset);
5618 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
5619 s->contents + my_offset + 4);
5620 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
5621 s->contents + my_offset + 8);
8f6277f5
PB		 5622 /* Adjust the offset by 4 for the position of the add,
5623 and 8 for the pipeline offset. */
5624 ret_offset = (val - (s->output_offset
5625 + s->output_section->vma
5626 + my_offset + 12))
5627 | 1;
5628 bfd_put_32 (output_bfd, ret_offset,
5629 s->contents + my_offset + 12);
5630 }
26079076
PB		 5631 else if (globals->use_blx)
5632 {
5633 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
5634 s->contents + my_offset);
5635
5636 /* It's a thumb address. Add the low order bit. */
5637 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
5638 s->contents + my_offset + 4);
5639 }
8f6277f5
PB		 5640 else
5641 {
52ab56c2
PB		 5642 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
5643 s->contents + my_offset);
252b5132 5644
52ab56c2
PB		 5645 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
5646 s->contents + my_offset + 4);
252b5132 5647
8f6277f5
PB		 5648 /* It's a thumb address. Add the low order bit. */
5649 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
5650 s->contents + my_offset + 8);
8029a119
NC		 5651
5652 my_offset += 12;
8f6277f5 5653 }
252b5132
RH		 5654 }
5655
5656 BFD_ASSERT (my_offset <= globals->arm_glue_size);
5657
a4fd1a8e
PB		 5658 return myh;
5659}
5660
5661/* Arm code calling a Thumb function. */
5662
5663static int
5664elf32_arm_to_thumb_stub (struct bfd_link_info * info,
5665 const char * name,
5666 bfd * input_bfd,
5667 bfd * output_bfd,
5668 asection * input_section,
5669 bfd_byte * hit_data,
5670 asection * sym_sec,
5671 bfd_vma offset,
5672 bfd_signed_vma addend,
f2a9dd69
DJ		 5673 bfd_vma val,
5674 char **error_message)
a4fd1a8e
PB		 5675{
5676 unsigned long int tmp;
5677 bfd_vma my_offset;
5678 asection * s;
5679 long int ret_offset;
5680 struct elf_link_hash_entry * myh;
5681 struct elf32_arm_link_hash_table * globals;
5682
5683 globals = elf32_arm_hash_table (info);
5684
5685 BFD_ASSERT (globals != NULL);
5686 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5687
5688 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
5689 ARM2THUMB_GLUE_SECTION_NAME);
5690 BFD_ASSERT (s != NULL);
5691 BFD_ASSERT (s->contents != NULL);
5692 BFD_ASSERT (s->output_section != NULL);
5693
5694 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 5695 sym_sec, val, s, error_message);
a4fd1a8e
PB		 5696 if (!myh)
5697 return FALSE;
5698
5699 my_offset = myh->root.u.def.value;
252b5132
RH		 5700 tmp = bfd_get_32 (input_bfd, hit_data);
5701 tmp = tmp & 0xFF000000;
5702
9b485d32 5703 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 5704 ret_offset = (s->output_offset
5705 + my_offset
5706 + s->output_section->vma
5707 - (input_section->output_offset
5708 + input_section->output_section->vma
5709 + offset + addend)
5710 - 8);
9a5aca8c 5711
252b5132
RH		 5712 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
5713
dc810e39 5714 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 5715
b34976b6 5716 return TRUE;
252b5132
RH		 5717}
5718
a4fd1a8e
PB		 5719/* Populate Arm stub for an exported Thumb function. */
5720
5721static bfd_boolean
5722elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
5723{
5724 struct bfd_link_info * info = (struct bfd_link_info *) inf;
5725 asection * s;
5726 struct elf_link_hash_entry * myh;
5727 struct elf32_arm_link_hash_entry *eh;
5728 struct elf32_arm_link_hash_table * globals;
5729 asection *sec;
5730 bfd_vma val;
f2a9dd69 5731 char *error_message;
a4fd1a8e 5732
906e58ca 5733 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 5734 /* Allocate stubs for exported Thumb functions on v4t. */
5735 if (eh->export_glue == NULL)
5736 return TRUE;
5737
5738 globals = elf32_arm_hash_table (info);
5739
5740 BFD_ASSERT (globals != NULL);
5741 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5742
5743 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
5744 ARM2THUMB_GLUE_SECTION_NAME);
5745 BFD_ASSERT (s != NULL);
5746 BFD_ASSERT (s->contents != NULL);
5747 BFD_ASSERT (s->output_section != NULL);
5748
5749 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 5750
5751 BFD_ASSERT (sec->output_section != NULL);
5752
a4fd1a8e
PB		 5753 val = eh->export_glue->root.u.def.value + sec->output_offset
5754 + sec->output_section->vma;
8029a119 5755
a4fd1a8e
PB		 5756 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
5757 h->root.u.def.section->owner,
f2a9dd69
DJ		 5758 globals->obfd, sec, val, s,
5759 &error_message);
a4fd1a8e
PB		 5760 BFD_ASSERT (myh);
5761 return TRUE;
5762}
5763
845b51d6
PB		 5764/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
5765
5766static bfd_vma
5767elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
5768{
5769 bfd_byte *p;
5770 bfd_vma glue_addr;
5771 asection *s;
5772 struct elf32_arm_link_hash_table *globals;
5773
5774 globals = elf32_arm_hash_table (info);
5775
5776 BFD_ASSERT (globals != NULL);
5777 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5778
5779 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
5780 ARM_BX_GLUE_SECTION_NAME);
5781 BFD_ASSERT (s != NULL);
5782 BFD_ASSERT (s->contents != NULL);
5783 BFD_ASSERT (s->output_section != NULL);
5784
5785 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
5786
5787 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
5788
5789 if ((globals->bx_glue_offset[reg] & 1) == 0)
5790 {
5791 p = s->contents + glue_addr;
5792 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
5793 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
5794 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
5795 globals->bx_glue_offset[reg] |= 1;
5796 }
5797
5798 return glue_addr + s->output_section->vma + s->output_offset;
5799}
5800
a4fd1a8e
PB		 5801/* Generate Arm stubs for exported Thumb symbols. */
5802static void
906e58ca 5803elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 5804 struct bfd_link_info *link_info)
5805{
5806 struct elf32_arm_link_hash_table * globals;
5807
8029a119
NC		 5808 if (link_info == NULL)
5809 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 5810 return;
5811
5812 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 5813 /* If blx is available then exported Thumb symbols are OK and there is
5814 nothing to do. */
a4fd1a8e
PB		 5815 if (globals->use_blx)
5816 return;
5817
5818 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
5819 link_info);
5820}
5821
eb043451
PB		 5822/* Some relocations map to different relocations depending on the
5823 target. Return the real relocation. */
8029a119 5824
eb043451
PB		 5825static int
5826arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
5827 int r_type)
5828{
5829 switch (r_type)
5830 {
5831 case R_ARM_TARGET1:
5832 if (globals->target1_is_rel)
5833 return R_ARM_REL32;
5834 else
5835 return R_ARM_ABS32;
5836
5837 case R_ARM_TARGET2:
5838 return globals->target2_reloc;
5839
5840 default:
5841 return r_type;
5842 }
5843}
eb043451 5844
ba93b8ac
DJ		 5845/* Return the base VMA address which should be subtracted from real addresses
5846 when resolving @dtpoff relocation.
5847 This is PT_TLS segment p_vaddr. */
5848
5849static bfd_vma
5850dtpoff_base (struct bfd_link_info *info)
5851{
5852 /* If tls_sec is NULL, we should have signalled an error already. */
5853 if (elf_hash_table (info)->tls_sec == NULL)
5854 return 0;
5855 return elf_hash_table (info)->tls_sec->vma;
5856}
5857
5858/* Return the relocation value for @tpoff relocation
5859 if STT_TLS virtual address is ADDRESS. */
5860
5861static bfd_vma
5862tpoff (struct bfd_link_info *info, bfd_vma address)
5863{
5864 struct elf_link_hash_table *htab = elf_hash_table (info);
5865 bfd_vma base;
5866
5867 /* If tls_sec is NULL, we should have signalled an error already. */
5868 if (htab->tls_sec == NULL)
5869 return 0;
5870 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
5871 return address - htab->tls_sec->vma + base;
5872}
5873
00a97672
RS		 5874/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
5875 VALUE is the relocation value. */
5876
5877static bfd_reloc_status_type
5878elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
5879{
5880 if (value > 0xfff)
5881 return bfd_reloc_overflow;
5882
5883 value |= bfd_get_32 (abfd, data) & 0xfffff000;
5884 bfd_put_32 (abfd, value, data);
5885 return bfd_reloc_ok;
5886}
5887
4962c51a
MS		 5888/* For a given value of n, calculate the value of G_n as required to
5889 deal with group relocations. We return it in the form of an
5890 encoded constant-and-rotation, together with the final residual. If n is
5891 specified as less than zero, then final_residual is filled with the
5892 input value and no further action is performed. */
5893
5894static bfd_vma
5895calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
5896{
5897 int current_n;
5898 bfd_vma g_n;
5899 bfd_vma encoded_g_n = 0;
5900 bfd_vma residual = value; /* Also known as Y_n. */
5901
5902 for (current_n = 0; current_n <= n; current_n++)
5903 {
5904 int shift;
5905
5906 /* Calculate which part of the value to mask. */
5907 if (residual == 0)
5908 shift = 0;
5909 else
5910 {
5911 int msb;
5912
5913 /* Determine the most significant bit in the residual and
5914 align the resulting value to a 2-bit boundary. */
5915 for (msb = 30; msb >= 0; msb -= 2)
5916 if (residual & (3 << msb))
5917 break;
5918
5919 /* The desired shift is now (msb - 6), or zero, whichever
5920 is the greater. */
5921 shift = msb - 6;
5922 if (shift < 0)
5923 shift = 0;
5924 }
5925
5926 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
5927 g_n = residual & (0xff << shift);
5928 encoded_g_n = (g_n >> shift)
5929 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
5930
5931 /* Calculate the residual for the next time around. */
5932 residual &= ~g_n;
5933 }
5934
5935 *final_residual = residual;
5936
5937 return encoded_g_n;
5938}
5939
5940/* Given an ARM instruction, determine whether it is an ADD or a SUB.
5941 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 5942
4962c51a 5943static int
906e58ca 5944identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 5945{
5946 int opcode = insn & 0x1e00000;
5947
5948 if (opcode == 1 << 23) /* ADD */
5949 return 1;
5950
5951 if (opcode == 1 << 22) /* SUB */
5952 return -1;
5953
5954 return 0;
5955}
5956
252b5132 5957/* Perform a relocation as part of a final link. */
9b485d32 5958
252b5132 5959static bfd_reloc_status_type
57e8b36a
NC		 5960elf32_arm_final_link_relocate (reloc_howto_type * howto,
5961 bfd * input_bfd,
5962 bfd * output_bfd,
5963 asection * input_section,
5964 bfd_byte * contents,
5965 Elf_Internal_Rela * rel,
5966 bfd_vma value,
5967 struct bfd_link_info * info,
5968 asection * sym_sec,
5969 const char * sym_name,
5970 int sym_flags,
0945cdfd 5971 struct elf_link_hash_entry * h,
f2a9dd69 5972 bfd_boolean * unresolved_reloc_p,
8029a119 5973 char ** error_message)
252b5132
RH		 5974{
5975 unsigned long r_type = howto->type;
5976 unsigned long r_symndx;
5977 bfd_byte * hit_data = contents + rel->r_offset;
5978 bfd * dynobj = NULL;
5979 Elf_Internal_Shdr * symtab_hdr;
5980 struct elf_link_hash_entry ** sym_hashes;
5981 bfd_vma * local_got_offsets;
5982 asection * sgot = NULL;
5983 asection * splt = NULL;
5984 asection * sreloc = NULL;
252b5132 5985 bfd_vma addend;
ba96a88f
NC		 5986 bfd_signed_vma signed_addend;
5987 struct elf32_arm_link_hash_table * globals;
f21f3fe0 5988
9c504268
PB		 5989 globals = elf32_arm_hash_table (info);
5990
0ffa91dd
NC		 5991 BFD_ASSERT (is_arm_elf (input_bfd));
5992
5993 /* Some relocation types map to different relocations depending on the
9c504268 5994 target. We pick the right one here. */
eb043451
PB		 5995 r_type = arm_real_reloc_type (globals, r_type);
5996 if (r_type != howto->type)
5997 howto = elf32_arm_howto_from_type (r_type);
9c504268 5998
cac15327
NC		 5999 /* If the start address has been set, then set the EF_ARM_HASENTRY
6000 flag. Setting this more than once is redundant, but the cost is
6001 not too high, and it keeps the code simple.
99e4ae17 6002
cac15327
NC		 6003 The test is done here, rather than somewhere else, because the
6004 start address is only set just before the final link commences.
6005
6006 Note - if the user deliberately sets a start address of 0, the
6007 flag will not be set. */
6008 if (bfd_get_start_address (output_bfd) != 0)
6009 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6010
252b5132
RH		 6011 dynobj = elf_hash_table (info)->dynobj;
6012 if (dynobj)
6013 {
6014 sgot = bfd_get_section_by_name (dynobj, ".got");
6015 splt = bfd_get_section_by_name (dynobj, ".plt");
6016 }
0ffa91dd 6017 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6018 sym_hashes = elf_sym_hashes (input_bfd);
6019 local_got_offsets = elf_local_got_offsets (input_bfd);
6020 r_symndx = ELF32_R_SYM (rel->r_info);
6021
4e7fd91e 6022 if (globals->use_rel)
ba96a88f 6023 {
4e7fd91e
PB		 6024 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6025
6026 if (addend & ((howto->src_mask + 1) >> 1))
6027 {
6028 signed_addend = -1;
6029 signed_addend &= ~ howto->src_mask;
6030 signed_addend |= addend;
6031 }
6032 else
6033 signed_addend = addend;
ba96a88f
NC		 6034 }
6035 else
4e7fd91e 6036 addend = signed_addend = rel->r_addend;
f21f3fe0 6037
252b5132
RH		 6038 switch (r_type)
6039 {
6040 case R_ARM_NONE:
28a094c2
DJ		 6041 /* We don't need to find a value for this symbol. It's just a
6042 marker. */
6043 *unresolved_reloc_p = FALSE;
252b5132
RH		 6044 return bfd_reloc_ok;
6045
00a97672
RS		 6046 case R_ARM_ABS12:
6047 if (!globals->vxworks_p)
6048 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6049
252b5132
RH		 6050 case R_ARM_PC24:
6051 case R_ARM_ABS32:
bb224fc3 6052 case R_ARM_ABS32_NOI:
252b5132 6053 case R_ARM_REL32:
bb224fc3 6054 case R_ARM_REL32_NOI:
5b5bb741
PB		 6055 case R_ARM_CALL:
6056 case R_ARM_JUMP24:
dfc5f959 6057 case R_ARM_XPC25:
eb043451 6058 case R_ARM_PREL31:
7359ea65 6059 case R_ARM_PLT32:
7359ea65
DJ		 6060 /* Handle relocations which should use the PLT entry. ABS32/REL32
6061 will use the symbol's value, which may point to a PLT entry, but we
6062 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6063 branches in this object should go to it, except if the PLT is too
6064 far away, in which case a long branch stub should be inserted. */
bb224fc3 6065 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6066 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6067 && r_type != R_ARM_CALL
6068 && r_type != R_ARM_JUMP24
6069 && r_type != R_ARM_PLT32)
7359ea65 6070 && h != NULL
c84cd8ee 6071 && splt != NULL
7359ea65
DJ		 6072 && h->plt.offset != (bfd_vma) -1)
6073 {
c84cd8ee
DJ		 6074 /* If we've created a .plt section, and assigned a PLT entry to
6075 this function, it should not be known to bind locally. If
6076 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6077 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6078
6079 value = (splt->output_section->vma
6080 + splt->output_offset
6081 + h->plt.offset);
0945cdfd 6082 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6083 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6084 contents, rel->r_offset, value,
00a97672 6085 rel->r_addend);
7359ea65
DJ		 6086 }
6087
67687978
PB		 6088 /* When generating a shared object or relocatable executable, these
6089 relocations are copied into the output file to be resolved at
6090 run time. */
6091 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6092 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 6093 && !(elf32_arm_hash_table (info)->vxworks_p
6094 && strcmp (input_section->output_section->name,
6095 ".tls_vars") == 0)
bb224fc3 6096 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6097 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 6098 && (h == NULL
6099 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6100 || h->root.type != bfd_link_hash_undefweak)
6101 && r_type != R_ARM_PC24
5b5bb741
PB		 6102 && r_type != R_ARM_CALL
6103 && r_type != R_ARM_JUMP24
ee06dc07 6104 && r_type != R_ARM_PREL31
7359ea65 6105 && r_type != R_ARM_PLT32)
252b5132 6106 {
947216bf
AM		 6107 Elf_Internal_Rela outrel;
6108 bfd_byte *loc;
b34976b6 6109 bfd_boolean skip, relocate;
f21f3fe0 6110
0945cdfd
DJ		 6111 *unresolved_reloc_p = FALSE;
6112
252b5132
RH		 6113 if (sreloc == NULL)
6114 {
83bac4b0
NC		 6115 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6116 ! globals->use_rel);
f21f3fe0 6117
83bac4b0 6118 if (sreloc == NULL)
252b5132 6119 return bfd_reloc_notsupported;
252b5132 6120 }
f21f3fe0 6121
b34976b6
AM		 6122 skip = FALSE;
6123 relocate = FALSE;
f21f3fe0 6124
00a97672 6125 outrel.r_addend = addend;
c629eae0
JJ		 6126 outrel.r_offset =
6127 _bfd_elf_section_offset (output_bfd, info, input_section,
6128 rel->r_offset);
6129 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6130 skip = TRUE;
0bb2d96a 6131 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6132 skip = TRUE, relocate = TRUE;
252b5132
RH		 6133 outrel.r_offset += (input_section->output_section->vma
6134 + input_section->output_offset);
f21f3fe0 6135
252b5132 6136 if (skip)
0bb2d96a 6137 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6138 else if (h != NULL
6139 && h->dynindx != -1
7359ea65 6140 && (!info->shared
5e681ec4 6141 || !info->symbolic
f5385ebf 6142 || !h->def_regular))
5e681ec4 6143 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6144 else
6145 {
a16385dc
MM		 6146 int symbol;
6147
5e681ec4 6148 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 6149 if (sym_flags == STT_ARM_TFUNC)
6150 value |= 1;
a16385dc 6151 if (globals->symbian_p)
6366ff1e 6152 {
74541ad4
AM		 6153 asection *osec;
6154
6366ff1e
MM		 6155 /* On Symbian OS, the data segment and text segement
6156 can be relocated independently. Therefore, we
6157 must indicate the segment to which this
6158 relocation is relative. The BPABI allows us to
6159 use any symbol in the right segment; we just use
6160 the section symbol as it is convenient. (We
6161 cannot use the symbol given by "h" directly as it
74541ad4
AM		 6162 will not appear in the dynamic symbol table.)
6163
6164 Note that the dynamic linker ignores the section
6165 symbol value, so we don't subtract osec->vma
6166 from the emitted reloc addend. */
10dbd1f3 6167 if (sym_sec)
74541ad4 6168 osec = sym_sec->output_section;
10dbd1f3 6169 else
74541ad4
AM		 6170 osec = input_section->output_section;
6171 symbol = elf_section_data (osec)->dynindx;
6172 if (symbol == 0)
6173 {
6174 struct elf_link_hash_table *htab = elf_hash_table (info);
6175
6176 if ((osec->flags & SEC_READONLY) == 0
6177 && htab->data_index_section != NULL)
6178 osec = htab->data_index_section;
6179 else
6180 osec = htab->text_index_section;
6181 symbol = elf_section_data (osec)->dynindx;
6182 }
6366ff1e
MM		 6183 BFD_ASSERT (symbol != 0);
6184 }
a16385dc
MM		 6185 else
6186 /* On SVR4-ish systems, the dynamic loader cannot
6187 relocate the text and data segments independently,
6188 so the symbol does not matter. */
6189 symbol = 0;
6190 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 6191 if (globals->use_rel)
6192 relocate = TRUE;
6193 else
6194 outrel.r_addend += value;
252b5132 6195 }
f21f3fe0 6196
947216bf 6197 loc = sreloc->contents;
00a97672
RS		 6198 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
6199 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 6200
f21f3fe0 6201 /* If this reloc is against an external symbol, we do not want to
252b5132 6202 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 6203 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 6204 if (! relocate)
6205 return bfd_reloc_ok;
9a5aca8c 6206
f21f3fe0 6207 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 6208 contents, rel->r_offset, value,
6209 (bfd_vma) 0);
6210 }
6211 else switch (r_type)
6212 {
00a97672
RS		 6213 case R_ARM_ABS12:
6214 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6215
dfc5f959 6216 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 6217 case R_ARM_CALL:
6218 case R_ARM_JUMP24:
8029a119 6219 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 6220 case R_ARM_PLT32:
906e58ca
NC		 6221 {
6222 bfd_vma from;
6223 bfd_signed_vma branch_offset;
6224 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6225
dfc5f959 6226 if (r_type == R_ARM_XPC25)
252b5132 6227 {
dfc5f959
NC		 6228 /* Check for Arm calling Arm function. */
6229 /* FIXME: Should we translate the instruction into a BL
6230 instruction instead ? */
6231 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 6232 (*_bfd_error_handler)
6233 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
6234 input_bfd,
6235 h ? h->root.root.string : "(local)");
dfc5f959 6236 }
155d87d7 6237 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 6238 {
6239 /* Check for Arm calling Thumb function. */
6240 if (sym_flags == STT_ARM_TFUNC)
6241 {
f2a9dd69
DJ		 6242 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
6243 output_bfd, input_section,
6244 hit_data, sym_sec, rel->r_offset,
6245 signed_addend, value,
6246 error_message))
6247 return bfd_reloc_ok;
6248 else
6249 return bfd_reloc_dangerous;
dfc5f959 6250 }
252b5132 6251 }
ba96a88f 6252
906e58ca 6253 /* Check if a stub has to be inserted because the
8029a119 6254 destination is too far or we are changing mode. */
155d87d7
CL		 6255 if ( r_type == R_ARM_CALL
6256 || r_type == R_ARM_JUMP24
6257 || r_type == R_ARM_PLT32)
906e58ca 6258 {
5fa9e92f
CL		 6259 /* If the call goes through a PLT entry, make sure to
6260 check distance to the right destination address. */
6261 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
6262 {
6263 value = (splt->output_section->vma
6264 + splt->output_offset
6265 + h->plt.offset);
6266 *unresolved_reloc_p = FALSE;
6267 }
6268
6269 from = (input_section->output_section->vma
6270 + input_section->output_offset
6271 + rel->r_offset);
6272 branch_offset = (bfd_signed_vma)(value - from);
6273
906e58ca
NC		 6274 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
6275 || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
155d87d7
CL		 6276 || ((sym_flags == STT_ARM_TFUNC)
6277 && (((r_type == R_ARM_CALL) && !globals->use_blx)
6278 || (r_type == R_ARM_JUMP24)
6279 || (r_type == R_ARM_PLT32) ))
6280 )
906e58ca
NC		 6281 {
6282 /* The target is out of reach, so redirect the
6283 branch to the local stub for this function. */
6284
6285 stub_entry = elf32_arm_get_stub_entry (input_section,
6286 sym_sec, h,
6287 rel, globals);
6288 if (stub_entry != NULL)
6289 value = (stub_entry->stub_offset
6290 + stub_entry->stub_sec->output_offset
6291 + stub_entry->stub_sec->output_section->vma);
6292 }
6293 }
6294
dea514f5
PB		 6295 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
6296 where:
6297 S is the address of the symbol in the relocation.
6298 P is address of the instruction being relocated.
6299 A is the addend (extracted from the instruction) in bytes.
6300
6301 S is held in 'value'.
6302 P is the base address of the section containing the
6303 instruction plus the offset of the reloc into that
6304 section, ie:
6305 (input_section->output_section->vma +
6306 input_section->output_offset +
6307 rel->r_offset).
6308 A is the addend, converted into bytes, ie:
6309 (signed_addend * 4)
6310
6311 Note: None of these operations have knowledge of the pipeline
6312 size of the processor, thus it is up to the assembler to
6313 encode this information into the addend. */
6314 value -= (input_section->output_section->vma
6315 + input_section->output_offset);
6316 value -= rel->r_offset;
4e7fd91e
PB		 6317 if (globals->use_rel)
6318 value += (signed_addend << howto->size);
6319 else
6320 /* RELA addends do not have to be adjusted by howto->size. */
6321 value += signed_addend;
23080146 6322
dcb5e6e6
NC		 6323 signed_addend = value;
6324 signed_addend >>= howto->rightshift;
9a5aca8c 6325
5ab79981 6326 /* A branch to an undefined weak symbol is turned into a jump to
82b5c97a
CL		 6327 the next instruction unless a PLT entry will be created. */
6328 if (h && h->root.type == bfd_link_hash_undefweak
6329 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 6330 {
6331 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
6332 | 0x0affffff;
6333 }
6334 else
59f2c4e7 6335 {
9b485d32 6336 /* Perform a signed range check. */
dcb5e6e6 6337 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 6338 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
6339 return bfd_reloc_overflow;
9a5aca8c 6340
5ab79981 6341 addend = (value & 2);
39b41c9c 6342
5ab79981
PB		 6343 value = (signed_addend & howto->dst_mask)
6344 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 6345
5ab79981
PB		 6346 if (r_type == R_ARM_CALL)
6347 {
155d87d7
CL		 6348 /* Set the H bit in the BLX instruction. */
6349 if (sym_flags == STT_ARM_TFUNC)
6350 {
6351 if (addend)
6352 value |= (1 << 24);
6353 else
6354 value &= ~(bfd_vma)(1 << 24);
6355 }
6356
5ab79981 6357 /* Select the correct instruction (BL or BLX). */
906e58ca 6358 /* Only if we are not handling a BL to a stub. In this
8029a119 6359 case, mode switching is performed by the stub. */
906e58ca 6360 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 6361 value |= (1 << 28);
6362 else
6363 {
6364 value &= ~(bfd_vma)(1 << 28);
6365 value |= (1 << 24);
6366 }
39b41c9c
PB		 6367 }
6368 }
906e58ca 6369 }
252b5132 6370 break;
f21f3fe0 6371
252b5132
RH		 6372 case R_ARM_ABS32:
6373 value += addend;
6374 if (sym_flags == STT_ARM_TFUNC)
6375 value |= 1;
6376 break;
f21f3fe0 6377
bb224fc3
MS		 6378 case R_ARM_ABS32_NOI:
6379 value += addend;
6380 break;
6381
252b5132 6382 case R_ARM_REL32:
a8bc6c78
PB		 6383 value += addend;
6384 if (sym_flags == STT_ARM_TFUNC)
6385 value |= 1;
252b5132 6386 value -= (input_section->output_section->vma
62efb346 6387 + input_section->output_offset + rel->r_offset);
252b5132 6388 break;
eb043451 6389
bb224fc3
MS		 6390 case R_ARM_REL32_NOI:
6391 value += addend;
6392 value -= (input_section->output_section->vma
6393 + input_section->output_offset + rel->r_offset);
6394 break;
6395
eb043451
PB		 6396 case R_ARM_PREL31:
6397 value -= (input_section->output_section->vma
6398 + input_section->output_offset + rel->r_offset);
6399 value += signed_addend;
6400 if (! h || h->root.type != bfd_link_hash_undefweak)
6401 {
8029a119 6402 /* Check for overflow. */
eb043451
PB		 6403 if ((value ^ (value >> 1)) & (1 << 30))
6404 return bfd_reloc_overflow;
6405 }
6406 value &= 0x7fffffff;
6407 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
6408 if (sym_flags == STT_ARM_TFUNC)
6409 value |= 1;
6410 break;
252b5132 6411 }
f21f3fe0 6412
252b5132
RH		 6413 bfd_put_32 (input_bfd, value, hit_data);
6414 return bfd_reloc_ok;
6415
6416 case R_ARM_ABS8:
6417 value += addend;
6418 if ((long) value > 0x7f || (long) value < -0x80)
6419 return bfd_reloc_overflow;
6420
6421 bfd_put_8 (input_bfd, value, hit_data);
6422 return bfd_reloc_ok;
6423
6424 case R_ARM_ABS16:
6425 value += addend;
6426
6427 if ((long) value > 0x7fff || (long) value < -0x8000)
6428 return bfd_reloc_overflow;
6429
6430 bfd_put_16 (input_bfd, value, hit_data);
6431 return bfd_reloc_ok;
6432
252b5132 6433 case R_ARM_THM_ABS5:
9b485d32 6434 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 6435 if (globals->use_rel)
6436 {
6437 /* Need to refetch addend. */
6438 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
6439 /* ??? Need to determine shift amount from operand size. */
6440 addend >>= howto->rightshift;
6441 }
252b5132
RH		 6442 value += addend;
6443
6444 /* ??? Isn't value unsigned? */
6445 if ((long) value > 0x1f || (long) value < -0x10)
6446 return bfd_reloc_overflow;
6447
6448 /* ??? Value needs to be properly shifted into place first. */
6449 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
6450 bfd_put_16 (input_bfd, value, hit_data);
6451 return bfd_reloc_ok;
6452
2cab6cc3
MS		 6453 case R_ARM_THM_ALU_PREL_11_0:
6454 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
6455 {
6456 bfd_vma insn;
6457 bfd_signed_vma relocation;
6458
6459 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
6460 | bfd_get_16 (input_bfd, hit_data + 2);
6461
6462 if (globals->use_rel)
6463 {
6464 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
6465 | ((insn & (1 << 26)) >> 15);
6466 if (insn & 0xf00000)
6467 signed_addend = -signed_addend;
6468 }
6469
6470 relocation = value + signed_addend;
6471 relocation -= (input_section->output_section->vma
6472 + input_section->output_offset
6473 + rel->r_offset);
6474
6475 value = abs (relocation);
6476
6477 if (value >= 0x1000)
6478 return bfd_reloc_overflow;
6479
6480 insn = (insn & 0xfb0f8f00) | (value & 0xff)
6481 | ((value & 0x700) << 4)
6482 | ((value & 0x800) << 15);
6483 if (relocation < 0)
6484 insn |= 0xa00000;
6485
6486 bfd_put_16 (input_bfd, insn >> 16, hit_data);
6487 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
6488
6489 return bfd_reloc_ok;
6490 }
6491
6492 case R_ARM_THM_PC12:
6493 /* Corresponds to: ldr.w reg, [pc, #offset]. */
6494 {
6495 bfd_vma insn;
6496 bfd_signed_vma relocation;
6497
6498 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
6499 | bfd_get_16 (input_bfd, hit_data + 2);
6500
6501 if (globals->use_rel)
6502 {
6503 signed_addend = insn & 0xfff;
6504 if (!(insn & (1 << 23)))
6505 signed_addend = -signed_addend;
6506 }
6507
6508 relocation = value + signed_addend;
6509 relocation -= (input_section->output_section->vma
6510 + input_section->output_offset
6511 + rel->r_offset);
6512
6513 value = abs (relocation);
6514
6515 if (value >= 0x1000)
6516 return bfd_reloc_overflow;
6517
6518 insn = (insn & 0xff7ff000) | value;
6519 if (relocation >= 0)
6520 insn |= (1 << 23);
6521
6522 bfd_put_16 (input_bfd, insn >> 16, hit_data);
6523 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
6524
6525 return bfd_reloc_ok;
6526 }
6527
dfc5f959 6528 case R_ARM_THM_XPC22:
c19d1205 6529 case R_ARM_THM_CALL:
bd97cb95 6530 case R_ARM_THM_JUMP24:
dfc5f959 6531 /* Thumb BL (branch long instruction). */
252b5132 6532 {
b34976b6 6533 bfd_vma relocation;
e95de063 6534 bfd_vma reloc_sign;
b34976b6
AM		 6535 bfd_boolean overflow = FALSE;
6536 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
6537 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 6538 bfd_signed_vma reloc_signed_max;
6539 bfd_signed_vma reloc_signed_min;
b34976b6 6540 bfd_vma check;
252b5132 6541 bfd_signed_vma signed_check;
e95de063
MS		 6542 int bitsize;
6543 int thumb2 = using_thumb2 (globals);
252b5132 6544
5ab79981 6545 /* A branch to an undefined weak symbol is turned into a jump to
19540007
JM		 6546 the next instruction unless a PLT entry will be created. */
6547 if (h && h->root.type == bfd_link_hash_undefweak
6548 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 6549 {
6550 bfd_put_16 (input_bfd, 0xe000, hit_data);
6551 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
6552 return bfd_reloc_ok;
6553 }
6554
e95de063
MS		 6555 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
6556 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 6557 if (globals->use_rel)
6558 {
e95de063
MS		 6559 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
6560 bfd_vma upper = upper_insn & 0x3ff;
6561 bfd_vma lower = lower_insn & 0x7ff;
6562 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
6563 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
6564 bfd_vma i1 = j1 ^ s ? 0 : 1;
6565 bfd_vma i2 = j2 ^ s ? 0 : 1;
6566
6567 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
6568 /* Sign extend. */
6569 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
6570
4e7fd91e
PB		 6571 signed_addend = addend;
6572 }
cb1afa5c 6573
dfc5f959
NC		 6574 if (r_type == R_ARM_THM_XPC22)
6575 {
6576 /* Check for Thumb to Thumb call. */
6577 /* FIXME: Should we translate the instruction into a BL
6578 instruction instead ? */
6579 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 6580 (*_bfd_error_handler)
6581 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
6582 input_bfd,
6583 h ? h->root.root.string : "(local)");
dfc5f959
NC		 6584 }
6585 else
252b5132 6586 {
dfc5f959
NC		 6587 /* If it is not a call to Thumb, assume call to Arm.
6588 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 6589 function call at all, but rather a long jump. Calls through
6590 the PLT do not require stubs. */
6591 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
6592 && (h == NULL || splt == NULL
6593 || h->plt.offset == (bfd_vma) -1))
dfc5f959 6594 {
bd97cb95 6595 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 6596 {
6597 /* Convert BL to BLX. */
6598 lower_insn = (lower_insn & ~0x1000) | 0x0800;
6599 }
155d87d7
CL		 6600 else if (( r_type != R_ARM_THM_CALL)
6601 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 6602 {
6603 if (elf32_thumb_to_arm_stub
6604 (info, sym_name, input_bfd, output_bfd, input_section,
6605 hit_data, sym_sec, rel->r_offset, signed_addend, value,
6606 error_message))
6607 return bfd_reloc_ok;
6608 else
6609 return bfd_reloc_dangerous;
6610 }
da5938a2 6611 }
bd97cb95
DJ		 6612 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
6613 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 6614 {
6615 /* Make sure this is a BL. */
6616 lower_insn |= 0x1800;
6617 }
252b5132 6618 }
f21f3fe0 6619
b7693d02
DJ		 6620 /* Handle calls via the PLT. */
6621 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
6622 {
6623 value = (splt->output_section->vma
6624 + splt->output_offset
6625 + h->plt.offset);
bd97cb95 6626 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 6627 {
6628 /* If the Thumb BLX instruction is available, convert the
6629 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 6630 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 6631 }
6632 else
6633 /* Target the Thumb stub before the ARM PLT entry. */
6634 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 6635 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 6636 }
6637
155d87d7 6638 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 6639 {
6640 /* Check if a stub has to be inserted because the destination
8029a119 6641 is too far. */
906e58ca
NC		 6642 bfd_vma from;
6643 bfd_signed_vma branch_offset;
6644 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6645
6646 from = (input_section->output_section->vma
6647 + input_section->output_offset
6648 + rel->r_offset);
6649 branch_offset = (bfd_signed_vma)(value - from);
6650
6651 if ((!thumb2
6652 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
6653 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
6654 ||
6655 (thumb2
6656 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
f4ac8484 6657 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
155d87d7
CL		 6658 || ((sym_flags != STT_ARM_TFUNC)
6659 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
6660 || r_type == R_ARM_THM_JUMP24)))
906e58ca
NC		 6661 {
6662 /* The target is out of reach or we are changing modes, so
6663 redirect the branch to the local stub for this
6664 function. */
6665 stub_entry = elf32_arm_get_stub_entry (input_section,
6666 sym_sec, h,
6667 rel, globals);
6668 if (stub_entry != NULL)
6669 value = (stub_entry->stub_offset
6670 + stub_entry->stub_sec->output_offset
6671 + stub_entry->stub_sec->output_section->vma);
6672
f4ac8484 6673 /* If this call becomes a call to Arm, force BLX. */
155d87d7 6674 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 6675 {
6676 if ((stub_entry
6677 && !arm_stub_is_thumb (stub_entry->stub_type))
6678 || (sym_flags != STT_ARM_TFUNC))
6679 lower_insn = (lower_insn & ~0x1000) | 0x0800;
6680 }
906e58ca
NC		 6681 }
6682 }
6683
ba96a88f 6684 relocation = value + signed_addend;
f21f3fe0 6685
252b5132 6686 relocation -= (input_section->output_section->vma
ba96a88f
NC		 6687 + input_section->output_offset
6688 + rel->r_offset);
9a5aca8c 6689
252b5132
RH		 6690 check = relocation >> howto->rightshift;
6691
6692 /* If this is a signed value, the rightshift just dropped
6693 leading 1 bits (assuming twos complement). */
6694 if ((bfd_signed_vma) relocation >= 0)
6695 signed_check = check;
6696 else
6697 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
6698
e95de063
MS		 6699 /* Calculate the permissable maximum and minimum values for
6700 this relocation according to whether we're relocating for
6701 Thumb-2 or not. */
6702 bitsize = howto->bitsize;
6703 if (!thumb2)
6704 bitsize -= 2;
6705 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
6706 reloc_signed_min = ~reloc_signed_max;
6707
252b5132 6708 /* Assumes two's complement. */
ba96a88f 6709 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 6710 overflow = TRUE;
252b5132 6711
bd97cb95 6712 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 6713 /* For a BLX instruction, make sure that the relocation is rounded up
6714 to a word boundary. This follows the semantics of the instruction
6715 which specifies that bit 1 of the target address will come from bit
6716 1 of the base address. */
6717 relocation = (relocation + 2) & ~ 3;
cb1afa5c 6718
e95de063
MS		 6719 /* Put RELOCATION back into the insn. Assumes two's complement.
6720 We use the Thumb-2 encoding, which is safe even if dealing with
6721 a Thumb-1 instruction by virtue of our overflow check above. */
6722 reloc_sign = (signed_check < 0) ? 1 : 0;
6723 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
6724 | ((relocation >> 12) & 0x3ff)
6725 | (reloc_sign << 10);
906e58ca 6726 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 6727 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
6728 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
6729 | ((relocation >> 1) & 0x7ff);
c62e1cc3 6730
252b5132
RH		 6731 /* Put the relocated value back in the object file: */
6732 bfd_put_16 (input_bfd, upper_insn, hit_data);
6733 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
6734
6735 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
6736 }
6737 break;
6738
c19d1205
ZW		 6739 case R_ARM_THM_JUMP19:
6740 /* Thumb32 conditional branch instruction. */
6741 {
6742 bfd_vma relocation;
6743 bfd_boolean overflow = FALSE;
6744 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
6745 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 6746 bfd_signed_vma reloc_signed_max = 0xffffe;
6747 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 6748 bfd_signed_vma signed_check;
6749
6750 /* Need to refetch the addend, reconstruct the top three bits,
6751 and squish the two 11 bit pieces together. */
6752 if (globals->use_rel)
6753 {
6754 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 6755 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 6756 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
6757 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
6758 bfd_vma lower = (lower_insn & 0x07ff);
6759
a00a1f35
MS		 6760 upper |= J1 << 6;
6761 upper |= J2 << 7;
6762 upper |= (!S) << 8;
c19d1205
ZW		 6763 upper -= 0x0100; /* Sign extend. */
6764
6765 addend = (upper << 12) | (lower << 1);
6766 signed_addend = addend;
6767 }
6768
bd97cb95
DJ		 6769 /* Handle calls via the PLT. */
6770 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
6771 {
6772 value = (splt->output_section->vma
6773 + splt->output_offset
6774 + h->plt.offset);
6775 /* Target the Thumb stub before the ARM PLT entry. */
6776 value -= PLT_THUMB_STUB_SIZE;
6777 *unresolved_reloc_p = FALSE;
6778 }
6779
c19d1205
ZW		 6780 /* ??? Should handle interworking? GCC might someday try to
6781 use this for tail calls. */
6782
6783 relocation = value + signed_addend;
6784 relocation -= (input_section->output_section->vma
6785 + input_section->output_offset
6786 + rel->r_offset);
a00a1f35 6787 signed_check = (bfd_signed_vma) relocation;
c19d1205 6788
c19d1205
ZW		 6789 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
6790 overflow = TRUE;
6791
6792 /* Put RELOCATION back into the insn. */
6793 {
6794 bfd_vma S = (relocation & 0x00100000) >> 20;
6795 bfd_vma J2 = (relocation & 0x00080000) >> 19;
6796 bfd_vma J1 = (relocation & 0x00040000) >> 18;
6797 bfd_vma hi = (relocation & 0x0003f000) >> 12;
6798 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
6799
a00a1f35 6800 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 6801 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
6802 }
6803
6804 /* Put the relocated value back in the object file: */
6805 bfd_put_16 (input_bfd, upper_insn, hit_data);
6806 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
6807
6808 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
6809 }
6810
6811 case R_ARM_THM_JUMP11:
6812 case R_ARM_THM_JUMP8:
6813 case R_ARM_THM_JUMP6:
51c5503b
NC		 6814 /* Thumb B (branch) instruction). */
6815 {
6cf9e9fe 6816 bfd_signed_vma relocation;
51c5503b
NC		 6817 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
6818 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 6819 bfd_signed_vma signed_check;
6820
c19d1205
ZW		 6821 /* CZB cannot jump backward. */
6822 if (r_type == R_ARM_THM_JUMP6)
6823 reloc_signed_min = 0;
6824
4e7fd91e 6825 if (globals->use_rel)
6cf9e9fe 6826 {
4e7fd91e
PB		 6827 /* Need to refetch addend. */
6828 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
6829 if (addend & ((howto->src_mask + 1) >> 1))
6830 {
6831 signed_addend = -1;
6832 signed_addend &= ~ howto->src_mask;
6833 signed_addend |= addend;
6834 }
6835 else
6836 signed_addend = addend;
6837 /* The value in the insn has been right shifted. We need to
6838 undo this, so that we can perform the address calculation
6839 in terms of bytes. */
6840 signed_addend <<= howto->rightshift;
6cf9e9fe 6841 }
6cf9e9fe 6842 relocation = value + signed_addend;
51c5503b
NC		 6843
6844 relocation -= (input_section->output_section->vma
6845 + input_section->output_offset
6846 + rel->r_offset);
6847
6cf9e9fe
NC		 6848 relocation >>= howto->rightshift;
6849 signed_check = relocation;
c19d1205
ZW		 6850
6851 if (r_type == R_ARM_THM_JUMP6)
6852 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
6853 else
6854 relocation &= howto->dst_mask;
51c5503b 6855 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 6856
51c5503b
NC		 6857 bfd_put_16 (input_bfd, relocation, hit_data);
6858
6859 /* Assumes two's complement. */
6860 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
6861 return bfd_reloc_overflow;
6862
6863 return bfd_reloc_ok;
6864 }
cedb70c5 6865
8375c36b
PB		 6866 case R_ARM_ALU_PCREL7_0:
6867 case R_ARM_ALU_PCREL15_8:
6868 case R_ARM_ALU_PCREL23_15:
6869 {
6870 bfd_vma insn;
6871 bfd_vma relocation;
6872
6873 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 6874 if (globals->use_rel)
6875 {
6876 /* Extract the addend. */
6877 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
6878 signed_addend = addend;
6879 }
8375c36b
PB		 6880 relocation = value + signed_addend;
6881
6882 relocation -= (input_section->output_section->vma
6883 + input_section->output_offset
6884 + rel->r_offset);
6885 insn = (insn & ~0xfff)
6886 | ((howto->bitpos << 7) & 0xf00)
6887 | ((relocation >> howto->bitpos) & 0xff);
6888 bfd_put_32 (input_bfd, value, hit_data);
6889 }
6890 return bfd_reloc_ok;
6891
252b5132
RH		 6892 case R_ARM_GNU_VTINHERIT:
6893 case R_ARM_GNU_VTENTRY:
6894 return bfd_reloc_ok;
6895
c19d1205 6896 case R_ARM_GOTOFF32:
252b5132
RH		 6897 /* Relocation is relative to the start of the
6898 global offset table. */
6899
6900 BFD_ASSERT (sgot != NULL);
6901 if (sgot == NULL)
6902 return bfd_reloc_notsupported;
9a5aca8c 6903
cedb70c5 6904 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 6905 address by one, so that attempts to call the function pointer will
6906 correctly interpret it as Thumb code. */
6907 if (sym_flags == STT_ARM_TFUNC)
6908 value += 1;
6909
252b5132
RH		 6910 /* Note that sgot->output_offset is not involved in this
6911 calculation. We always want the start of .got. If we
6912 define _GLOBAL_OFFSET_TABLE in a different way, as is
6913 permitted by the ABI, we might have to change this
9b485d32 6914 calculation. */
252b5132 6915 value -= sgot->output_section->vma;
f21f3fe0 6916 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 6917 contents, rel->r_offset, value,
00a97672 6918 rel->r_addend);
252b5132
RH		 6919
6920 case R_ARM_GOTPC:
a7c10850 6921 /* Use global offset table as symbol value. */
252b5132 6922 BFD_ASSERT (sgot != NULL);
f21f3fe0 6923
252b5132
RH		 6924 if (sgot == NULL)
6925 return bfd_reloc_notsupported;
6926
0945cdfd 6927 *unresolved_reloc_p = FALSE;
252b5132 6928 value = sgot->output_section->vma;
f21f3fe0 6929 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 6930 contents, rel->r_offset, value,
00a97672 6931 rel->r_addend);
f21f3fe0 6932
252b5132 6933 case R_ARM_GOT32:
eb043451 6934 case R_ARM_GOT_PREL:
252b5132 6935 /* Relocation is to the entry for this symbol in the
9b485d32 6936 global offset table. */
252b5132
RH		 6937 if (sgot == NULL)
6938 return bfd_reloc_notsupported;
f21f3fe0 6939
252b5132
RH		 6940 if (h != NULL)
6941 {
6942 bfd_vma off;
5e681ec4 6943 bfd_boolean dyn;
f21f3fe0 6944
252b5132
RH		 6945 off = h->got.offset;
6946 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 6947 dyn = globals->root.dynamic_sections_created;
f21f3fe0 6948
5e681ec4 6949 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 6950 || (info->shared
5e681ec4
PB		 6951 && SYMBOL_REFERENCES_LOCAL (info, h))
6952 || (ELF_ST_VISIBILITY (h->other)
6953 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 6954 {
6955 /* This is actually a static link, or it is a -Bsymbolic link
6956 and the symbol is defined locally. We must initialize this
6957 entry in the global offset table. Since the offset must
6958 always be a multiple of 4, we use the least significant bit
6959 to record whether we have initialized it already.
f21f3fe0 6960
00a97672 6961 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 6962 entry to initialize the value. This is done in the
9b485d32 6963 finish_dynamic_symbol routine. */
252b5132
RH		 6964 if ((off & 1) != 0)
6965 off &= ~1;
6966 else
6967 {
ee29b9fb
RE		 6968 /* If we are addressing a Thumb function, we need to
6969 adjust the address by one, so that attempts to
6970 call the function pointer will correctly
6971 interpret it as Thumb code. */
6972 if (sym_flags == STT_ARM_TFUNC)
6973 value |= 1;
6974
252b5132
RH		 6975 bfd_put_32 (output_bfd, value, sgot->contents + off);
6976 h->got.offset |= 1;
6977 }
6978 }
0945cdfd
DJ		 6979 else
6980 *unresolved_reloc_p = FALSE;
f21f3fe0 6981
252b5132
RH		 6982 value = sgot->output_offset + off;
6983 }
6984 else
6985 {
6986 bfd_vma off;
f21f3fe0 6987
252b5132
RH		 6988 BFD_ASSERT (local_got_offsets != NULL &&
6989 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 6990
252b5132 6991 off = local_got_offsets[r_symndx];
f21f3fe0 6992
252b5132
RH		 6993 /* The offset must always be a multiple of 4. We use the
6994 least significant bit to record whether we have already
9b485d32 6995 generated the necessary reloc. */
252b5132
RH		 6996 if ((off & 1) != 0)
6997 off &= ~1;
6998 else
6999 {
b7693d02
DJ		 7000 /* If we are addressing a Thumb function, we need to
7001 adjust the address by one, so that attempts to
7002 call the function pointer will correctly
7003 interpret it as Thumb code. */
7004 if (sym_flags == STT_ARM_TFUNC)
7005 value |= 1;
7006
00a97672
RS		 7007 if (globals->use_rel)
7008 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7009
252b5132
RH		 7010 if (info->shared)
7011 {
7012 asection * srelgot;
947216bf
AM		 7013 Elf_Internal_Rela outrel;
7014 bfd_byte *loc;
f21f3fe0 7015
00a97672
RS		 7016 srelgot = (bfd_get_section_by_name
7017 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7018 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7019
00a97672 7020 outrel.r_addend = addend + value;
252b5132 7021 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7022 + sgot->output_offset
252b5132
RH		 7023 + off);
7024 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7025 loc = srelgot->contents;
00a97672
RS		 7026 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7027 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7028 }
f21f3fe0 7029
252b5132
RH		 7030 local_got_offsets[r_symndx] |= 1;
7031 }
f21f3fe0 7032
252b5132
RH		 7033 value = sgot->output_offset + off;
7034 }
eb043451
PB		 7035 if (r_type != R_ARM_GOT32)
7036 value += sgot->output_section->vma;
9a5aca8c 7037
f21f3fe0 7038 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7039 contents, rel->r_offset, value,
00a97672 7040 rel->r_addend);
f21f3fe0 7041
ba93b8ac
DJ		 7042 case R_ARM_TLS_LDO32:
7043 value = value - dtpoff_base (info);
7044
7045 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7046 contents, rel->r_offset, value,
7047 rel->r_addend);
ba93b8ac
DJ		 7048
7049 case R_ARM_TLS_LDM32:
7050 {
7051 bfd_vma off;
7052
7053 if (globals->sgot == NULL)
7054 abort ();
7055
7056 off = globals->tls_ldm_got.offset;
7057
7058 if ((off & 1) != 0)
7059 off &= ~1;
7060 else
7061 {
7062 /* If we don't know the module number, create a relocation
7063 for it. */
7064 if (info->shared)
7065 {
7066 Elf_Internal_Rela outrel;
7067 bfd_byte *loc;
7068
7069 if (globals->srelgot == NULL)
7070 abort ();
7071
00a97672 7072 outrel.r_addend = 0;
ba93b8ac
DJ		 7073 outrel.r_offset = (globals->sgot->output_section->vma
7074 + globals->sgot->output_offset + off);
7075 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7076
00a97672
RS		 7077 if (globals->use_rel)
7078 bfd_put_32 (output_bfd, outrel.r_addend,
7079 globals->sgot->contents + off);
ba93b8ac
DJ		 7080
7081 loc = globals->srelgot->contents;
00a97672
RS		 7082 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
7083 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7084 }
7085 else
7086 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
7087
7088 globals->tls_ldm_got.offset |= 1;
7089 }
7090
906e58ca 7091 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7092 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7093
7094 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7095 contents, rel->r_offset, value,
00a97672 7096 rel->r_addend);
ba93b8ac
DJ		 7097 }
7098
7099 case R_ARM_TLS_GD32:
7100 case R_ARM_TLS_IE32:
7101 {
7102 bfd_vma off;
7103 int indx;
7104 char tls_type;
7105
7106 if (globals->sgot == NULL)
7107 abort ();
7108
7109 indx = 0;
7110 if (h != NULL)
7111 {
7112 bfd_boolean dyn;
7113 dyn = globals->root.dynamic_sections_created;
7114 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7115 && (!info->shared
7116 || !SYMBOL_REFERENCES_LOCAL (info, h)))
7117 {
7118 *unresolved_reloc_p = FALSE;
7119 indx = h->dynindx;
7120 }
7121 off = h->got.offset;
7122 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
7123 }
7124 else
7125 {
7126 if (local_got_offsets == NULL)
7127 abort ();
7128 off = local_got_offsets[r_symndx];
7129 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
7130 }
7131
7132 if (tls_type == GOT_UNKNOWN)
7133 abort ();
7134
7135 if ((off & 1) != 0)
7136 off &= ~1;
7137 else
7138 {
7139 bfd_boolean need_relocs = FALSE;
7140 Elf_Internal_Rela outrel;
7141 bfd_byte *loc = NULL;
7142 int cur_off = off;
7143
7144 /* The GOT entries have not been initialized yet. Do it
7145 now, and emit any relocations. If both an IE GOT and a
7146 GD GOT are necessary, we emit the GD first. */
7147
7148 if ((info->shared || indx != 0)
7149 && (h == NULL
7150 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7151 || h->root.type != bfd_link_hash_undefweak))
7152 {
7153 need_relocs = TRUE;
7154 if (globals->srelgot == NULL)
7155 abort ();
7156 loc = globals->srelgot->contents;
00a97672 7157 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 7158 }
7159
7160 if (tls_type & GOT_TLS_GD)
7161 {
7162 if (need_relocs)
7163 {
00a97672 7164 outrel.r_addend = 0;
ba93b8ac 7165 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 7166 + globals->sgot->output_offset
7167 + cur_off);
ba93b8ac 7168 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 7169
00a97672
RS		 7170 if (globals->use_rel)
7171 bfd_put_32 (output_bfd, outrel.r_addend,
7172 globals->sgot->contents + cur_off);
7173
7174 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7175 globals->srelgot->reloc_count++;
00a97672 7176 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7177
7178 if (indx == 0)
7179 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7180 globals->sgot->contents + cur_off + 4);
7181 else
7182 {
00a97672 7183 outrel.r_addend = 0;
ba93b8ac
DJ		 7184 outrel.r_info = ELF32_R_INFO (indx,
7185 R_ARM_TLS_DTPOFF32);
7186 outrel.r_offset += 4;
00a97672
RS		 7187
7188 if (globals->use_rel)
7189 bfd_put_32 (output_bfd, outrel.r_addend,
7190 globals->sgot->contents + cur_off + 4);
7191
7192
7193 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7194 globals->srelgot->reloc_count++;
00a97672 7195 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7196 }
7197 }
7198 else
7199 {
7200 /* If we are not emitting relocations for a
7201 general dynamic reference, then we must be in a
7202 static link or an executable link with the
7203 symbol binding locally. Mark it as belonging
7204 to module 1, the executable. */
7205 bfd_put_32 (output_bfd, 1,
7206 globals->sgot->contents + cur_off);
7207 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7208 globals->sgot->contents + cur_off + 4);
7209 }
7210
7211 cur_off += 8;
7212 }
7213
7214 if (tls_type & GOT_TLS_IE)
7215 {
7216 if (need_relocs)
7217 {
00a97672
RS		 7218 if (indx == 0)
7219 outrel.r_addend = value - dtpoff_base (info);
7220 else
7221 outrel.r_addend = 0;
ba93b8ac
DJ		 7222 outrel.r_offset = (globals->sgot->output_section->vma
7223 + globals->sgot->output_offset
7224 + cur_off);
7225 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
7226
00a97672
RS		 7227 if (globals->use_rel)
7228 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 7229 globals->sgot->contents + cur_off);
7230
00a97672 7231 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7232 globals->srelgot->reloc_count++;
00a97672 7233 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7234 }
7235 else
7236 bfd_put_32 (output_bfd, tpoff (info, value),
7237 globals->sgot->contents + cur_off);
7238 cur_off += 4;
7239 }
7240
7241 if (h != NULL)
7242 h->got.offset |= 1;
7243 else
7244 local_got_offsets[r_symndx] |= 1;
7245 }
7246
7247 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
7248 off += 8;
906e58ca 7249 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7250 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7251
7252 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7253 contents, rel->r_offset, value,
00a97672 7254 rel->r_addend);
ba93b8ac
DJ		 7255 }
7256
7257 case R_ARM_TLS_LE32:
7258 if (info->shared)
7259 {
7260 (*_bfd_error_handler)
7261 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
7262 input_bfd, input_section,
7263 (long) rel->r_offset, howto->name);
906e58ca 7264 return FALSE;
ba93b8ac
DJ		 7265 }
7266 else
7267 value = tpoff (info, value);
906e58ca 7268
ba93b8ac 7269 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7270 contents, rel->r_offset, value,
7271 rel->r_addend);
ba93b8ac 7272
319850b4
JB		 7273 case R_ARM_V4BX:
7274 if (globals->fix_v4bx)
845b51d6
PB		 7275 {
7276 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 7277
845b51d6
PB		 7278 /* Ensure that we have a BX instruction. */
7279 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 7280
845b51d6
PB		 7281 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
7282 {
7283 /* Branch to veneer. */
7284 bfd_vma glue_addr;
7285 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
7286 glue_addr -= input_section->output_section->vma
7287 + input_section->output_offset
7288 + rel->r_offset + 8;
7289 insn = (insn & 0xf0000000) | 0x0a000000
7290 | ((glue_addr >> 2) & 0x00ffffff);
7291 }
7292 else
7293 {
7294 /* Preserve Rm (lowest four bits) and the condition code
7295 (highest four bits). Other bits encode MOV PC,Rm. */
7296 insn = (insn & 0xf000000f) | 0x01a0f000;
7297 }
319850b4 7298
845b51d6
PB		 7299 bfd_put_32 (input_bfd, insn, hit_data);
7300 }
319850b4
JB		 7301 return bfd_reloc_ok;
7302
b6895b4f
PB		 7303 case R_ARM_MOVW_ABS_NC:
7304 case R_ARM_MOVT_ABS:
7305 case R_ARM_MOVW_PREL_NC:
7306 case R_ARM_MOVT_PREL:
92f5d02b
MS		 7307 /* Until we properly support segment-base-relative addressing then
7308 we assume the segment base to be zero, as for the group relocations.
7309 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
7310 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
7311 case R_ARM_MOVW_BREL_NC:
7312 case R_ARM_MOVW_BREL:
7313 case R_ARM_MOVT_BREL:
b6895b4f
PB		 7314 {
7315 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7316
7317 if (globals->use_rel)
7318 {
7319 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 7320 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 7321 }
92f5d02b 7322
b6895b4f 7323 value += signed_addend;
b6895b4f
PB		 7324
7325 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
7326 value -= (input_section->output_section->vma
7327 + input_section->output_offset + rel->r_offset);
7328
92f5d02b
MS		 7329 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
7330 return bfd_reloc_overflow;
7331
7332 if (sym_flags == STT_ARM_TFUNC)
7333 value |= 1;
7334
7335 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
7336 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 7337 value >>= 16;
7338
7339 insn &= 0xfff0f000;
7340 insn |= value & 0xfff;
7341 insn |= (value & 0xf000) << 4;
7342 bfd_put_32 (input_bfd, insn, hit_data);
7343 }
7344 return bfd_reloc_ok;
7345
7346 case R_ARM_THM_MOVW_ABS_NC:
7347 case R_ARM_THM_MOVT_ABS:
7348 case R_ARM_THM_MOVW_PREL_NC:
7349 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 7350 /* Until we properly support segment-base-relative addressing then
7351 we assume the segment base to be zero, as for the above relocations.
7352 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
7353 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
7354 as R_ARM_THM_MOVT_ABS. */
7355 case R_ARM_THM_MOVW_BREL_NC:
7356 case R_ARM_THM_MOVW_BREL:
7357 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 7358 {
7359 bfd_vma insn;
906e58ca 7360
b6895b4f
PB		 7361 insn = bfd_get_16 (input_bfd, hit_data) << 16;
7362 insn |= bfd_get_16 (input_bfd, hit_data + 2);
7363
7364 if (globals->use_rel)
7365 {
7366 addend = ((insn >> 4) & 0xf000)
7367 | ((insn >> 15) & 0x0800)
7368 | ((insn >> 4) & 0x0700)
7369 | (insn & 0x00ff);
39623e12 7370 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 7371 }
92f5d02b 7372
b6895b4f 7373 value += signed_addend;
b6895b4f
PB		 7374
7375 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
7376 value -= (input_section->output_section->vma
7377 + input_section->output_offset + rel->r_offset);
7378
92f5d02b
MS		 7379 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
7380 return bfd_reloc_overflow;
7381
7382 if (sym_flags == STT_ARM_TFUNC)
7383 value |= 1;
7384
7385 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
7386 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 7387 value >>= 16;
7388
7389 insn &= 0xfbf08f00;
7390 insn |= (value & 0xf000) << 4;
7391 insn |= (value & 0x0800) << 15;
7392 insn |= (value & 0x0700) << 4;
7393 insn |= (value & 0x00ff);
7394
7395 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7396 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7397 }
7398 return bfd_reloc_ok;
7399
4962c51a
MS		 7400 case R_ARM_ALU_PC_G0_NC:
7401 case R_ARM_ALU_PC_G1_NC:
7402 case R_ARM_ALU_PC_G0:
7403 case R_ARM_ALU_PC_G1:
7404 case R_ARM_ALU_PC_G2:
7405 case R_ARM_ALU_SB_G0_NC:
7406 case R_ARM_ALU_SB_G1_NC:
7407 case R_ARM_ALU_SB_G0:
7408 case R_ARM_ALU_SB_G1:
7409 case R_ARM_ALU_SB_G2:
7410 {
7411 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7412 bfd_vma pc = input_section->output_section->vma
7413 + input_section->output_offset + rel->r_offset;
7414 /* sb should be the origin of the *segment* containing the symbol.
7415 It is not clear how to obtain this OS-dependent value, so we
7416 make an arbitrary choice of zero. */
7417 bfd_vma sb = 0;
7418 bfd_vma residual;
7419 bfd_vma g_n;
7420 bfd_signed_vma signed_value;
7421 int group = 0;
7422
7423 /* Determine which group of bits to select. */
7424 switch (r_type)
7425 {
7426 case R_ARM_ALU_PC_G0_NC:
7427 case R_ARM_ALU_PC_G0:
7428 case R_ARM_ALU_SB_G0_NC:
7429 case R_ARM_ALU_SB_G0:
7430 group = 0;
7431 break;
7432
7433 case R_ARM_ALU_PC_G1_NC:
7434 case R_ARM_ALU_PC_G1:
7435 case R_ARM_ALU_SB_G1_NC:
7436 case R_ARM_ALU_SB_G1:
7437 group = 1;
7438 break;
7439
7440 case R_ARM_ALU_PC_G2:
7441 case R_ARM_ALU_SB_G2:
7442 group = 2;
7443 break;
7444
7445 default:
906e58ca 7446 abort ();
4962c51a
MS		 7447 }
7448
7449 /* If REL, extract the addend from the insn. If RELA, it will
7450 have already been fetched for us. */
7451 if (globals->use_rel)
7452 {
7453 int negative;
7454 bfd_vma constant = insn & 0xff;
7455 bfd_vma rotation = (insn & 0xf00) >> 8;
7456
7457 if (rotation == 0)
7458 signed_addend = constant;
7459 else
7460 {
7461 /* Compensate for the fact that in the instruction, the
7462 rotation is stored in multiples of 2 bits. */
7463 rotation *= 2;
7464
7465 /* Rotate "constant" right by "rotation" bits. */
7466 signed_addend = (constant >> rotation) |
7467 (constant << (8 * sizeof (bfd_vma) - rotation));
7468 }
7469
7470 /* Determine if the instruction is an ADD or a SUB.
7471 (For REL, this determines the sign of the addend.) */
7472 negative = identify_add_or_sub (insn);
7473 if (negative == 0)
7474 {
7475 (*_bfd_error_handler)
7476 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
7477 input_bfd, input_section,
7478 (long) rel->r_offset, howto->name);
906e58ca 7479 return bfd_reloc_overflow;
4962c51a
MS		 7480 }
7481
7482 signed_addend *= negative;
7483 }
7484
7485 /* Compute the value (X) to go in the place. */
7486 if (r_type == R_ARM_ALU_PC_G0_NC
7487 || r_type == R_ARM_ALU_PC_G1_NC
7488 || r_type == R_ARM_ALU_PC_G0
7489 || r_type == R_ARM_ALU_PC_G1
7490 || r_type == R_ARM_ALU_PC_G2)
7491 /* PC relative. */
7492 signed_value = value - pc + signed_addend;
7493 else
7494 /* Section base relative. */
7495 signed_value = value - sb + signed_addend;
7496
7497 /* If the target symbol is a Thumb function, then set the
7498 Thumb bit in the address. */
7499 if (sym_flags == STT_ARM_TFUNC)
7500 signed_value |= 1;
7501
7502 /* Calculate the value of the relevant G_n, in encoded
7503 constant-with-rotation format. */
7504 g_n = calculate_group_reloc_mask (abs (signed_value), group,
7505 &residual);
7506
7507 /* Check for overflow if required. */
7508 if ((r_type == R_ARM_ALU_PC_G0
7509 || r_type == R_ARM_ALU_PC_G1
7510 || r_type == R_ARM_ALU_PC_G2
7511 || r_type == R_ARM_ALU_SB_G0
7512 || r_type == R_ARM_ALU_SB_G1
7513 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
7514 {
7515 (*_bfd_error_handler)
7516 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
7517 input_bfd, input_section,
7518 (long) rel->r_offset, abs (signed_value), howto->name);
7519 return bfd_reloc_overflow;
7520 }
7521
7522 /* Mask out the value and the ADD/SUB part of the opcode; take care
7523 not to destroy the S bit. */
7524 insn &= 0xff1ff000;
7525
7526 /* Set the opcode according to whether the value to go in the
7527 place is negative. */
7528 if (signed_value < 0)
7529 insn |= 1 << 22;
7530 else
7531 insn |= 1 << 23;
7532
7533 /* Encode the offset. */
7534 insn |= g_n;
7535
7536 bfd_put_32 (input_bfd, insn, hit_data);
7537 }
7538 return bfd_reloc_ok;
7539
7540 case R_ARM_LDR_PC_G0:
7541 case R_ARM_LDR_PC_G1:
7542 case R_ARM_LDR_PC_G2:
7543 case R_ARM_LDR_SB_G0:
7544 case R_ARM_LDR_SB_G1:
7545 case R_ARM_LDR_SB_G2:
7546 {
7547 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7548 bfd_vma pc = input_section->output_section->vma
7549 + input_section->output_offset + rel->r_offset;
7550 bfd_vma sb = 0; /* See note above. */
7551 bfd_vma residual;
7552 bfd_signed_vma signed_value;
7553 int group = 0;
7554
7555 /* Determine which groups of bits to calculate. */
7556 switch (r_type)
7557 {
7558 case R_ARM_LDR_PC_G0:
7559 case R_ARM_LDR_SB_G0:
7560 group = 0;
7561 break;
7562
7563 case R_ARM_LDR_PC_G1:
7564 case R_ARM_LDR_SB_G1:
7565 group = 1;
7566 break;
7567
7568 case R_ARM_LDR_PC_G2:
7569 case R_ARM_LDR_SB_G2:
7570 group = 2;
7571 break;
7572
7573 default:
906e58ca 7574 abort ();
4962c51a
MS		 7575 }
7576
7577 /* If REL, extract the addend from the insn. If RELA, it will
7578 have already been fetched for us. */
7579 if (globals->use_rel)
7580 {
7581 int negative = (insn & (1 << 23)) ? 1 : -1;
7582 signed_addend = negative * (insn & 0xfff);
7583 }
7584
7585 /* Compute the value (X) to go in the place. */
7586 if (r_type == R_ARM_LDR_PC_G0
7587 || r_type == R_ARM_LDR_PC_G1
7588 || r_type == R_ARM_LDR_PC_G2)
7589 /* PC relative. */
7590 signed_value = value - pc + signed_addend;
7591 else
7592 /* Section base relative. */
7593 signed_value = value - sb + signed_addend;
7594
7595 /* Calculate the value of the relevant G_{n-1} to obtain
7596 the residual at that stage. */
7597 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
7598
7599 /* Check for overflow. */
7600 if (residual >= 0x1000)
7601 {
7602 (*_bfd_error_handler)
7603 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
7604 input_bfd, input_section,
7605 (long) rel->r_offset, abs (signed_value), howto->name);
7606 return bfd_reloc_overflow;
7607 }
7608
7609 /* Mask out the value and U bit. */
7610 insn &= 0xff7ff000;
7611
7612 /* Set the U bit if the value to go in the place is non-negative. */
7613 if (signed_value >= 0)
7614 insn |= 1 << 23;
7615
7616 /* Encode the offset. */
7617 insn |= residual;
7618
7619 bfd_put_32 (input_bfd, insn, hit_data);
7620 }
7621 return bfd_reloc_ok;
7622
7623 case R_ARM_LDRS_PC_G0:
7624 case R_ARM_LDRS_PC_G1:
7625 case R_ARM_LDRS_PC_G2:
7626 case R_ARM_LDRS_SB_G0:
7627 case R_ARM_LDRS_SB_G1:
7628 case R_ARM_LDRS_SB_G2:
7629 {
7630 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7631 bfd_vma pc = input_section->output_section->vma
7632 + input_section->output_offset + rel->r_offset;
7633 bfd_vma sb = 0; /* See note above. */
7634 bfd_vma residual;
7635 bfd_signed_vma signed_value;
7636 int group = 0;
7637
7638 /* Determine which groups of bits to calculate. */
7639 switch (r_type)
7640 {
7641 case R_ARM_LDRS_PC_G0:
7642 case R_ARM_LDRS_SB_G0:
7643 group = 0;
7644 break;
7645
7646 case R_ARM_LDRS_PC_G1:
7647 case R_ARM_LDRS_SB_G1:
7648 group = 1;
7649 break;
7650
7651 case R_ARM_LDRS_PC_G2:
7652 case R_ARM_LDRS_SB_G2:
7653 group = 2;
7654 break;
7655
7656 default:
906e58ca 7657 abort ();
4962c51a
MS		 7658 }
7659
7660 /* If REL, extract the addend from the insn. If RELA, it will
7661 have already been fetched for us. */
7662 if (globals->use_rel)
7663 {
7664 int negative = (insn & (1 << 23)) ? 1 : -1;
7665 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
7666 }
7667
7668 /* Compute the value (X) to go in the place. */
7669 if (r_type == R_ARM_LDRS_PC_G0
7670 || r_type == R_ARM_LDRS_PC_G1
7671 || r_type == R_ARM_LDRS_PC_G2)
7672 /* PC relative. */
7673 signed_value = value - pc + signed_addend;
7674 else
7675 /* Section base relative. */
7676 signed_value = value - sb + signed_addend;
7677
7678 /* Calculate the value of the relevant G_{n-1} to obtain
7679 the residual at that stage. */
7680 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
7681
7682 /* Check for overflow. */
7683 if (residual >= 0x100)
7684 {
7685 (*_bfd_error_handler)
7686 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
7687 input_bfd, input_section,
7688 (long) rel->r_offset, abs (signed_value), howto->name);
7689 return bfd_reloc_overflow;
7690 }
7691
7692 /* Mask out the value and U bit. */
7693 insn &= 0xff7ff0f0;
7694
7695 /* Set the U bit if the value to go in the place is non-negative. */
7696 if (signed_value >= 0)
7697 insn |= 1 << 23;
7698
7699 /* Encode the offset. */
7700 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
7701
7702 bfd_put_32 (input_bfd, insn, hit_data);
7703 }
7704 return bfd_reloc_ok;
7705
7706 case R_ARM_LDC_PC_G0:
7707 case R_ARM_LDC_PC_G1:
7708 case R_ARM_LDC_PC_G2:
7709 case R_ARM_LDC_SB_G0:
7710 case R_ARM_LDC_SB_G1:
7711 case R_ARM_LDC_SB_G2:
7712 {
7713 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7714 bfd_vma pc = input_section->output_section->vma
7715 + input_section->output_offset + rel->r_offset;
7716 bfd_vma sb = 0; /* See note above. */
7717 bfd_vma residual;
7718 bfd_signed_vma signed_value;
7719 int group = 0;
7720
7721 /* Determine which groups of bits to calculate. */
7722 switch (r_type)
7723 {
7724 case R_ARM_LDC_PC_G0:
7725 case R_ARM_LDC_SB_G0:
7726 group = 0;
7727 break;
7728
7729 case R_ARM_LDC_PC_G1:
7730 case R_ARM_LDC_SB_G1:
7731 group = 1;
7732 break;
7733
7734 case R_ARM_LDC_PC_G2:
7735 case R_ARM_LDC_SB_G2:
7736 group = 2;
7737 break;
7738
7739 default:
906e58ca 7740 abort ();
4962c51a
MS		 7741 }
7742
7743 /* If REL, extract the addend from the insn. If RELA, it will
7744 have already been fetched for us. */
7745 if (globals->use_rel)
7746 {
7747 int negative = (insn & (1 << 23)) ? 1 : -1;
7748 signed_addend = negative * ((insn & 0xff) << 2);
7749 }
7750
7751 /* Compute the value (X) to go in the place. */
7752 if (r_type == R_ARM_LDC_PC_G0
7753 || r_type == R_ARM_LDC_PC_G1
7754 || r_type == R_ARM_LDC_PC_G2)
7755 /* PC relative. */
7756 signed_value = value - pc + signed_addend;
7757 else
7758 /* Section base relative. */
7759 signed_value = value - sb + signed_addend;
7760
7761 /* Calculate the value of the relevant G_{n-1} to obtain
7762 the residual at that stage. */
7763 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
7764
7765 /* Check for overflow. (The absolute value to go in the place must be
7766 divisible by four and, after having been divided by four, must
7767 fit in eight bits.) */
7768 if ((residual & 0x3) != 0 || residual >= 0x400)
7769 {
7770 (*_bfd_error_handler)
7771 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
7772 input_bfd, input_section,
7773 (long) rel->r_offset, abs (signed_value), howto->name);
7774 return bfd_reloc_overflow;
7775 }
7776
7777 /* Mask out the value and U bit. */
7778 insn &= 0xff7fff00;
7779
7780 /* Set the U bit if the value to go in the place is non-negative. */
7781 if (signed_value >= 0)
7782 insn |= 1 << 23;
7783
7784 /* Encode the offset. */
7785 insn |= residual >> 2;
7786
7787 bfd_put_32 (input_bfd, insn, hit_data);
7788 }
7789 return bfd_reloc_ok;
7790
252b5132
RH		 7791 default:
7792 return bfd_reloc_notsupported;
7793 }
7794}
7795
98c1d4aa
NC		 7796/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
7797static void
57e8b36a
NC		 7798arm_add_to_rel (bfd * abfd,
7799 bfd_byte * address,
7800 reloc_howto_type * howto,
7801 bfd_signed_vma increment)
98c1d4aa 7802{
98c1d4aa
NC		 7803 bfd_signed_vma addend;
7804
bd97cb95
DJ		 7805 if (howto->type == R_ARM_THM_CALL
7806 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 7807 {
9a5aca8c
AM		 7808 int upper_insn, lower_insn;
7809 int upper, lower;
98c1d4aa 7810
9a5aca8c
AM		 7811 upper_insn = bfd_get_16 (abfd, address);
7812 lower_insn = bfd_get_16 (abfd, address + 2);
7813 upper = upper_insn & 0x7ff;
7814 lower = lower_insn & 0x7ff;
7815
7816 addend = (upper << 12) | (lower << 1);
ddda4409 7817 addend += increment;
9a5aca8c 7818 addend >>= 1;
98c1d4aa 7819
9a5aca8c
AM		 7820 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
7821 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
7822
dc810e39
AM		 7823 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
7824 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 7825 }
7826 else
7827 {
7828 bfd_vma contents;
7829
7830 contents = bfd_get_32 (abfd, address);
7831
7832 /* Get the (signed) value from the instruction. */
7833 addend = contents & howto->src_mask;
7834 if (addend & ((howto->src_mask + 1) >> 1))
7835 {
7836 bfd_signed_vma mask;
7837
7838 mask = -1;
7839 mask &= ~ howto->src_mask;
7840 addend |= mask;
7841 }
7842
7843 /* Add in the increment, (which is a byte value). */
7844 switch (howto->type)
7845 {
7846 default:
7847 addend += increment;
7848 break;
7849
7850 case R_ARM_PC24:
c6596c5e 7851 case R_ARM_PLT32:
5b5bb741
PB		 7852 case R_ARM_CALL:
7853 case R_ARM_JUMP24:
9a5aca8c 7854 addend <<= howto->size;
dc810e39 7855 addend += increment;
9a5aca8c
AM		 7856
7857 /* Should we check for overflow here ? */
7858
7859 /* Drop any undesired bits. */
7860 addend >>= howto->rightshift;
7861 break;
7862 }
7863
7864 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
7865
7866 bfd_put_32 (abfd, contents, address);
ddda4409 7867 }
98c1d4aa 7868}
252b5132 7869
ba93b8ac
DJ		 7870#define IS_ARM_TLS_RELOC(R_TYPE) \
7871 ((R_TYPE) == R_ARM_TLS_GD32 \
7872 || (R_TYPE) == R_ARM_TLS_LDO32 \
7873 || (R_TYPE) == R_ARM_TLS_LDM32 \
7874 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
7875 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
7876 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
7877 || (R_TYPE) == R_ARM_TLS_LE32 \
7878 || (R_TYPE) == R_ARM_TLS_IE32)
7879
252b5132 7880/* Relocate an ARM ELF section. */
906e58ca 7881
b34976b6 7882static bfd_boolean
57e8b36a
NC		 7883elf32_arm_relocate_section (bfd * output_bfd,
7884 struct bfd_link_info * info,
7885 bfd * input_bfd,
7886 asection * input_section,
7887 bfd_byte * contents,
7888 Elf_Internal_Rela * relocs,
7889 Elf_Internal_Sym * local_syms,
7890 asection ** local_sections)
252b5132 7891{
b34976b6
AM		 7892 Elf_Internal_Shdr *symtab_hdr;
7893 struct elf_link_hash_entry **sym_hashes;
7894 Elf_Internal_Rela *rel;
7895 Elf_Internal_Rela *relend;
7896 const char *name;
b32d3aa2 7897 struct elf32_arm_link_hash_table * globals;
252b5132 7898
4e7fd91e 7899 globals = elf32_arm_hash_table (info);
b491616a 7900
0ffa91dd 7901 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 7902 sym_hashes = elf_sym_hashes (input_bfd);
7903
7904 rel = relocs;
7905 relend = relocs + input_section->reloc_count;
7906 for (; rel < relend; rel++)
7907 {
ba96a88f
NC		 7908 int r_type;
7909 reloc_howto_type * howto;
7910 unsigned long r_symndx;
7911 Elf_Internal_Sym * sym;
7912 asection * sec;
252b5132 7913 struct elf_link_hash_entry * h;
ba96a88f
NC		 7914 bfd_vma relocation;
7915 bfd_reloc_status_type r;
7916 arelent bfd_reloc;
ba93b8ac 7917 char sym_type;
0945cdfd 7918 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 7919 char *error_message = NULL;
f21f3fe0 7920
252b5132 7921 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 7922 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 7923 r_type = arm_real_reloc_type (globals, r_type);
252b5132 7924
ba96a88f
NC		 7925 if ( r_type == R_ARM_GNU_VTENTRY
7926 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 7927 continue;
7928
b32d3aa2 7929 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 7930 howto = bfd_reloc.howto;
252b5132 7931
252b5132
RH		 7932 h = NULL;
7933 sym = NULL;
7934 sec = NULL;
9b485d32 7935
252b5132
RH		 7936 if (r_symndx < symtab_hdr->sh_info)
7937 {
7938 sym = local_syms + r_symndx;
ba93b8ac 7939 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 7940 sec = local_sections[r_symndx];
4e7fd91e 7941 if (globals->use_rel)
f8df10f4 7942 {
4e7fd91e
PB		 7943 relocation = (sec->output_section->vma
7944 + sec->output_offset
7945 + sym->st_value);
ab96bf03
AM		 7946 if (!info->relocatable
7947 && (sec->flags & SEC_MERGE)
7948 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 7949 {
4e7fd91e
PB		 7950 asection *msec;
7951 bfd_vma addend, value;
7952
39623e12 7953 switch (r_type)
4e7fd91e 7954 {
39623e12
PB		 7955 case R_ARM_MOVW_ABS_NC:
7956 case R_ARM_MOVT_ABS:
7957 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
7958 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
7959 addend = (addend ^ 0x8000) - 0x8000;
7960 break;
f8df10f4 7961
39623e12
PB		 7962 case R_ARM_THM_MOVW_ABS_NC:
7963 case R_ARM_THM_MOVT_ABS:
7964 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
7965 << 16;
7966 value |= bfd_get_16 (input_bfd,
7967 contents + rel->r_offset + 2);
7968 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
7969 | ((value & 0x04000000) >> 15);
7970 addend = (addend ^ 0x8000) - 0x8000;
7971 break;
f8df10f4 7972
39623e12
PB		 7973 default:
7974 if (howto->rightshift
7975 || (howto->src_mask & (howto->src_mask + 1)))
7976 {
7977 (*_bfd_error_handler)
7978 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
7979 input_bfd, input_section,
7980 (long) rel->r_offset, howto->name);
7981 return FALSE;
7982 }
7983
7984 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
7985
7986 /* Get the (signed) value from the instruction. */
7987 addend = value & howto->src_mask;
7988 if (addend & ((howto->src_mask + 1) >> 1))
7989 {
7990 bfd_signed_vma mask;
7991
7992 mask = -1;
7993 mask &= ~ howto->src_mask;
7994 addend |= mask;
7995 }
7996 break;
4e7fd91e 7997 }
39623e12 7998
4e7fd91e
PB		 7999 msec = sec;
8000 addend =
8001 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8002 - relocation;
8003 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8004
8005 /* Cases here must match those in the preceeding
8006 switch statement. */
8007 switch (r_type)
8008 {
8009 case R_ARM_MOVW_ABS_NC:
8010 case R_ARM_MOVT_ABS:
8011 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8012 | (addend & 0xfff);
8013 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8014 break;
8015
8016 case R_ARM_THM_MOVW_ABS_NC:
8017 case R_ARM_THM_MOVT_ABS:
8018 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8019 | (addend & 0xff) | ((addend & 0x0800) << 15);
8020 bfd_put_16 (input_bfd, value >> 16,
8021 contents + rel->r_offset);
8022 bfd_put_16 (input_bfd, value,
8023 contents + rel->r_offset + 2);
8024 break;
8025
8026 default:
8027 value = (value & ~ howto->dst_mask)
8028 | (addend & howto->dst_mask);
8029 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8030 break;
8031 }
f8df10f4 8032 }
f8df10f4 8033 }
4e7fd91e
PB		 8034 else
8035 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8036 }
8037 else
8038 {
560e09e9 8039 bfd_boolean warned;
560e09e9 8040
b2a8e766
AM		 8041 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8042 r_symndx, symtab_hdr, sym_hashes,
8043 h, sec, relocation,
8044 unresolved_reloc, warned);
ba93b8ac
DJ		 8045
8046 sym_type = h->type;
252b5132
RH		 8047 }
8048
ab96bf03
AM		 8049 if (sec != NULL && elf_discarded_section (sec))
8050 {
8051 /* For relocs against symbols from removed linkonce sections,
8052 or sections discarded by a linker script, we just want the
8053 section contents zeroed. Avoid any special processing. */
8054 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
8055 rel->r_info = 0;
8056 rel->r_addend = 0;
8057 continue;
8058 }
8059
8060 if (info->relocatable)
8061 {
8062 /* This is a relocatable link. We don't have to change
8063 anything, unless the reloc is against a section symbol,
8064 in which case we have to adjust according to where the
8065 section symbol winds up in the output section. */
8066 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8067 {
8068 if (globals->use_rel)
8069 arm_add_to_rel (input_bfd, contents + rel->r_offset,
8070 howto, (bfd_signed_vma) sec->output_offset);
8071 else
8072 rel->r_addend += sec->output_offset;
8073 }
8074 continue;
8075 }
8076
252b5132
RH		 8077 if (h != NULL)
8078 name = h->root.root.string;
8079 else
8080 {
8081 name = (bfd_elf_string_from_elf_section
8082 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8083 if (name == NULL || *name == '\0')
8084 name = bfd_section_name (input_bfd, sec);
8085 }
f21f3fe0 8086
ba93b8ac
DJ		 8087 if (r_symndx != 0
8088 && r_type != R_ARM_NONE
8089 && (h == NULL
8090 || h->root.type == bfd_link_hash_defined
8091 || h->root.type == bfd_link_hash_defweak)
8092 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
8093 {
8094 (*_bfd_error_handler)
8095 ((sym_type == STT_TLS
8096 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
8097 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
8098 input_bfd,
8099 input_section,
8100 (long) rel->r_offset,
8101 howto->name,
8102 name);
8103 }
8104
252b5132
RH		 8105 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
8106 input_section, contents, rel,
8107 relocation, info, sec, name,
8108 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 8109 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 8110 &unresolved_reloc, &error_message);
0945cdfd
DJ		 8111
8112 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8113 because such sections are not SEC_ALLOC and thus ld.so will
8114 not process them. */
8115 if (unresolved_reloc
8116 && !((input_section->flags & SEC_DEBUGGING) != 0
8117 && h->def_dynamic))
8118 {
8119 (*_bfd_error_handler)
843fe662
L		 8120 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
8121 input_bfd,
8122 input_section,
8123 (long) rel->r_offset,
8124 howto->name,
8125 h->root.root.string);
0945cdfd
DJ		 8126 return FALSE;
8127 }
252b5132
RH		 8128
8129 if (r != bfd_reloc_ok)
8130 {
252b5132
RH		 8131 switch (r)
8132 {
8133 case bfd_reloc_overflow:
cf919dfd
PB		 8134 /* If the overflowing reloc was to an undefined symbol,
8135 we have already printed one error message and there
8136 is no point complaining again. */
8137 if ((! h ||
8138 h->root.type != bfd_link_hash_undefined)
8139 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 8140 (info, (h ? &h->root : NULL), name, howto->name,
8141 (bfd_vma) 0, input_bfd, input_section,
8142 rel->r_offset))))
b34976b6 8143 return FALSE;
252b5132
RH		 8144 break;
8145
8146 case bfd_reloc_undefined:
8147 if (!((*info->callbacks->undefined_symbol)
8148 (info, name, input_bfd, input_section,
b34976b6
AM		 8149 rel->r_offset, TRUE)))
8150 return FALSE;
252b5132
RH		 8151 break;
8152
8153 case bfd_reloc_outofrange:
f2a9dd69 8154 error_message = _("out of range");
252b5132
RH		 8155 goto common_error;
8156
8157 case bfd_reloc_notsupported:
f2a9dd69 8158 error_message = _("unsupported relocation");
252b5132
RH		 8159 goto common_error;
8160
8161 case bfd_reloc_dangerous:
f2a9dd69 8162 /* error_message should already be set. */
252b5132
RH		 8163 goto common_error;
8164
8165 default:
f2a9dd69 8166 error_message = _("unknown error");
8029a119 8167 /* Fall through. */
252b5132
RH		 8168
8169 common_error:
f2a9dd69
DJ		 8170 BFD_ASSERT (error_message != NULL);
8171 if (!((*info->callbacks->reloc_dangerous)
8172 (info, error_message, input_bfd, input_section,
252b5132 8173 rel->r_offset)))
b34976b6 8174 return FALSE;
252b5132
RH		 8175 break;
8176 }
8177 }
8178 }
8179
b34976b6 8180 return TRUE;
252b5132
RH		 8181}
8182
3e6b1042
DJ		 8183static bfd_boolean
8184elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
8185 bfd *ibfd, const char *name)
8186{
8187 asection *sec, *osec;
8188
8189 sec = bfd_get_section_by_name (ibfd, name);
8190 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
8191 return TRUE;
8192
8193 osec = sec->output_section;
8194 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
8195 return TRUE;
8196
8197 if (! bfd_set_section_contents (obfd, osec, sec->contents,
8198 sec->output_offset, sec->size))
8199 return FALSE;
8200
8201 return TRUE;
8202}
8203
8204static bfd_boolean
8205elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
8206{
8207 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
8208
8209 /* Invoke the regular ELF backend linker to do all the work. */
8210 if (!bfd_elf_final_link (abfd, info))
8211 return FALSE;
8212
8213 /* Write out any glue sections now that we have created all the
8214 stubs. */
8215 if (globals->bfd_of_glue_owner != NULL)
8216 {
8217 if (! elf32_arm_output_glue_section (info, abfd,
8218 globals->bfd_of_glue_owner,
8219 ARM2THUMB_GLUE_SECTION_NAME))
8220 return FALSE;
8221
8222 if (! elf32_arm_output_glue_section (info, abfd,
8223 globals->bfd_of_glue_owner,
8224 THUMB2ARM_GLUE_SECTION_NAME))
8225 return FALSE;
8226
8227 if (! elf32_arm_output_glue_section (info, abfd,
8228 globals->bfd_of_glue_owner,
8229 VFP11_ERRATUM_VENEER_SECTION_NAME))
8230 return FALSE;
8231
8232 if (! elf32_arm_output_glue_section (info, abfd,
8233 globals->bfd_of_glue_owner,
8234 ARM_BX_GLUE_SECTION_NAME))
8235 return FALSE;
8236 }
8237
8238 return TRUE;
8239}
8240
c178919b
NC		 8241/* Set the right machine number. */
8242
8243static bfd_boolean
57e8b36a 8244elf32_arm_object_p (bfd *abfd)
c178919b 8245{
5a6c6817 8246 unsigned int mach;
57e8b36a 8247
5a6c6817 8248 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 8249
5a6c6817
NC		 8250 if (mach != bfd_mach_arm_unknown)
8251 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
8252
8253 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
8254 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 8255
e16bb312 8256 else
5a6c6817 8257 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 8258
8259 return TRUE;
8260}
8261
fc830a83 8262/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 8263
b34976b6 8264static bfd_boolean
57e8b36a 8265elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 8266{
8267 if (elf_flags_init (abfd)
8268 && elf_elfheader (abfd)->e_flags != flags)
8269 {
fc830a83
NC		 8270 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
8271 {
fd2ec330 8272 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 8273 (*_bfd_error_handler)
8274 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
8275 abfd);
fc830a83 8276 else
d003868e
AM		 8277 _bfd_error_handler
8278 (_("Warning: Clearing the interworking flag of %B due to outside request"),
8279 abfd);
fc830a83 8280 }
252b5132
RH		 8281 }
8282 else
8283 {
8284 elf_elfheader (abfd)->e_flags = flags;
b34976b6 8285 elf_flags_init (abfd) = TRUE;
252b5132
RH		 8286 }
8287
b34976b6 8288 return TRUE;
252b5132
RH		 8289}
8290
fc830a83 8291/* Copy backend specific data from one object module to another. */
9b485d32 8292
b34976b6 8293static bfd_boolean
57e8b36a 8294elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 8295{
8296 flagword in_flags;
8297 flagword out_flags;
8298
0ffa91dd 8299 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 8300 return TRUE;
252b5132 8301
fc830a83 8302 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 8303 out_flags = elf_elfheader (obfd)->e_flags;
8304
fc830a83
NC		 8305 if (elf_flags_init (obfd)
8306 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
8307 && in_flags != out_flags)
252b5132 8308 {
252b5132 8309 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 8310 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 8311 return FALSE;
252b5132
RH		 8312
8313 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 8314 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 8315 return FALSE;
252b5132
RH		 8316
8317 /* If the src and dest have different interworking flags
8318 then turn off the interworking bit. */
fd2ec330 8319 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 8320 {
fd2ec330 8321 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 8322 _bfd_error_handler
8323 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
8324 obfd, ibfd);
252b5132 8325
fd2ec330 8326 in_flags &= ~EF_ARM_INTERWORK;
252b5132 8327 }
1006ba19
PB		 8328
8329 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 8330 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
8331 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 8332 }
8333
8334 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 8335 elf_flags_init (obfd) = TRUE;
252b5132 8336
94a3258f
PB		 8337 /* Also copy the EI_OSABI field. */
8338 elf_elfheader (obfd)->e_ident[EI_OSABI] =
8339 elf_elfheader (ibfd)->e_ident[EI_OSABI];
8340
104d59d1
JM		 8341 /* Copy object attributes. */
8342 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 8343
8344 return TRUE;
8345}
8346
8347/* Values for Tag_ABI_PCS_R9_use. */
8348enum
8349{
8350 AEABI_R9_V6,
8351 AEABI_R9_SB,
8352 AEABI_R9_TLS,
8353 AEABI_R9_unused
8354};
8355
8356/* Values for Tag_ABI_PCS_RW_data. */
8357enum
8358{
8359 AEABI_PCS_RW_data_absolute,
8360 AEABI_PCS_RW_data_PCrel,
8361 AEABI_PCS_RW_data_SBrel,
8362 AEABI_PCS_RW_data_unused
8363};
8364
8365/* Values for Tag_ABI_enum_size. */
8366enum
8367{
8368 AEABI_enum_unused,
8369 AEABI_enum_short,
8370 AEABI_enum_wide,
8371 AEABI_enum_forced_wide
8372};
8373
104d59d1
JM		 8374/* Determine whether an object attribute tag takes an integer, a
8375 string or both. */
906e58ca 8376
104d59d1
JM		 8377static int
8378elf32_arm_obj_attrs_arg_type (int tag)
8379{
8380 if (tag == Tag_compatibility)
3483fe2e 8381 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 8382 else if (tag == Tag_nodefaults)
3483fe2e
AS		 8383 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
8384 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
8385 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 8386 else if (tag < 32)
3483fe2e 8387 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 8388 else
3483fe2e 8389 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 8390}
8391
5aa6ff7c
AS		 8392/* The ABI defines that Tag_conformance should be emitted first, and that
8393 Tag_nodefaults should be second (if either is defined). This sets those
8394 two positions, and bumps up the position of all the remaining tags to
8395 compensate. */
8396static int
8397elf32_arm_obj_attrs_order (int num)
8398{
8399 if (num == 4)
8400 return Tag_conformance;
8401 if (num == 5)
8402 return Tag_nodefaults;
8403 if ((num - 2) < Tag_nodefaults)
8404 return num - 2;
8405 if ((num - 1) < Tag_conformance)
8406 return num - 1;
8407 return num;
8408}
8409
91e22acd
AS		 8410/* Read the architecture from the Tag_also_compatible_with attribute, if any.
8411 Returns -1 if no architecture could be read. */
8412
8413static int
8414get_secondary_compatible_arch (bfd *abfd)
8415{
8416 obj_attribute *attr =
8417 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8418
8419 /* Note: the tag and its argument below are uleb128 values, though
8420 currently-defined values fit in one byte for each. */
8421 if (attr->s
8422 && attr->s[0] == Tag_CPU_arch
8423 && (attr->s[1] & 128) != 128
8424 && attr->s[2] == 0)
8425 return attr->s[1];
8426
8427 /* This tag is "safely ignorable", so don't complain if it looks funny. */
8428 return -1;
8429}
8430
8431/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8432 The tag is removed if ARCH is -1. */
8433
8e79c3df 8434static void
91e22acd 8435set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 8436{
91e22acd
AS		 8437 obj_attribute *attr =
8438 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 8439
91e22acd
AS		 8440 if (arch == -1)
8441 {
8442 attr->s = NULL;
8443 return;
8e79c3df 8444 }
91e22acd
AS		 8445
8446 /* Note: the tag and its argument below are uleb128 values, though
8447 currently-defined values fit in one byte for each. */
8448 if (!attr->s)
8449 attr->s = bfd_alloc (abfd, 3);
8450 attr->s[0] = Tag_CPU_arch;
8451 attr->s[1] = arch;
8452 attr->s[2] = '\0';
8e79c3df
CM		 8453}
8454
91e22acd
AS		 8455/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8456 into account. */
8457
8458static int
8459tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
8460 int newtag, int secondary_compat)
8e79c3df 8461{
91e22acd
AS		 8462#define T(X) TAG_CPU_ARCH_##X
8463 int tagl, tagh, result;
8464 const int v6t2[] =
8465 {
8466 T(V6T2), /* PRE_V4. */
8467 T(V6T2), /* V4. */
8468 T(V6T2), /* V4T. */
8469 T(V6T2), /* V5T. */
8470 T(V6T2), /* V5TE. */
8471 T(V6T2), /* V5TEJ. */
8472 T(V6T2), /* V6. */
8473 T(V7), /* V6KZ. */
8474 T(V6T2) /* V6T2. */
8475 };
8476 const int v6k[] =
8477 {
8478 T(V6K), /* PRE_V4. */
8479 T(V6K), /* V4. */
8480 T(V6K), /* V4T. */
8481 T(V6K), /* V5T. */
8482 T(V6K), /* V5TE. */
8483 T(V6K), /* V5TEJ. */
8484 T(V6K), /* V6. */
8485 T(V6KZ), /* V6KZ. */
8486 T(V7), /* V6T2. */
8487 T(V6K) /* V6K. */
8488 };
8489 const int v7[] =
8490 {
8491 T(V7), /* PRE_V4. */
8492 T(V7), /* V4. */
8493 T(V7), /* V4T. */
8494 T(V7), /* V5T. */
8495 T(V7), /* V5TE. */
8496 T(V7), /* V5TEJ. */
8497 T(V7), /* V6. */
8498 T(V7), /* V6KZ. */
8499 T(V7), /* V6T2. */
8500 T(V7), /* V6K. */
8501 T(V7) /* V7. */
8502 };
8503 const int v6_m[] =
8504 {
8505 -1, /* PRE_V4. */
8506 -1, /* V4. */
8507 T(V6K), /* V4T. */
8508 T(V6K), /* V5T. */
8509 T(V6K), /* V5TE. */
8510 T(V6K), /* V5TEJ. */
8511 T(V6K), /* V6. */
8512 T(V6KZ), /* V6KZ. */
8513 T(V7), /* V6T2. */
8514 T(V6K), /* V6K. */
8515 T(V7), /* V7. */
8516 T(V6_M) /* V6_M. */
8517 };
8518 const int v6s_m[] =
8519 {
8520 -1, /* PRE_V4. */
8521 -1, /* V4. */
8522 T(V6K), /* V4T. */
8523 T(V6K), /* V5T. */
8524 T(V6K), /* V5TE. */
8525 T(V6K), /* V5TEJ. */
8526 T(V6K), /* V6. */
8527 T(V6KZ), /* V6KZ. */
8528 T(V7), /* V6T2. */
8529 T(V6K), /* V6K. */
8530 T(V7), /* V7. */
8531 T(V6S_M), /* V6_M. */
8532 T(V6S_M) /* V6S_M. */
8533 };
8534 const int v4t_plus_v6_m[] =
8535 {
8536 -1, /* PRE_V4. */
8537 -1, /* V4. */
8538 T(V4T), /* V4T. */
8539 T(V5T), /* V5T. */
8540 T(V5TE), /* V5TE. */
8541 T(V5TEJ), /* V5TEJ. */
8542 T(V6), /* V6. */
8543 T(V6KZ), /* V6KZ. */
8544 T(V6T2), /* V6T2. */
8545 T(V6K), /* V6K. */
8546 T(V7), /* V7. */
8547 T(V6_M), /* V6_M. */
8548 T(V6S_M), /* V6S_M. */
8549 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
8550 };
8551 const int *comb[] =
8552 {
8553 v6t2,
8554 v6k,
8555 v7,
8556 v6_m,
8557 v6s_m,
8558 /* Pseudo-architecture. */
8559 v4t_plus_v6_m
8560 };
8561
8562 /* Check we've not got a higher architecture than we know about. */
8563
8564 if (oldtag >= MAX_TAG_CPU_ARCH || newtag >= MAX_TAG_CPU_ARCH)
8565 {
3895f852 8566 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 8567 return -1;
8568 }
8569
8570 /* Override old tag if we have a Tag_also_compatible_with on the output. */
8571
8572 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
8573 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
8574 oldtag = T(V4T_PLUS_V6_M);
8575
8576 /* And override the new tag if we have a Tag_also_compatible_with on the
8577 input. */
8578
8579 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
8580 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
8581 newtag = T(V4T_PLUS_V6_M);
8582
8583 tagl = (oldtag < newtag) ? oldtag : newtag;
8584 result = tagh = (oldtag > newtag) ? oldtag : newtag;
8585
8586 /* Architectures before V6KZ add features monotonically. */
8587 if (tagh <= TAG_CPU_ARCH_V6KZ)
8588 return result;
8589
8590 result = comb[tagh - T(V6T2)][tagl];
8591
8592 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8593 as the canonical version. */
8594 if (result == T(V4T_PLUS_V6_M))
8595 {
8596 result = T(V4T);
8597 *secondary_compat_out = T(V6_M);
8598 }
8599 else
8600 *secondary_compat_out = -1;
8601
8602 if (result == -1)
8603 {
3895f852 8604 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 8605 ibfd, oldtag, newtag);
8606 return -1;
8607 }
8608
8609 return result;
8610#undef T
8e79c3df
CM		 8611}
8612
ee065d83
PB		 8613/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
8614 are conflicting attributes. */
906e58ca 8615
ee065d83
PB		 8616static bfd_boolean
8617elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
8618{
104d59d1
JM		 8619 obj_attribute *in_attr;
8620 obj_attribute *out_attr;
8621 obj_attribute_list *in_list;
8e79c3df 8622 obj_attribute_list *out_list;
91e22acd 8623 obj_attribute_list **out_listp;
ee065d83
PB		 8624 /* Some tags have 0 = don't care, 1 = strong requirement,
8625 2 = weak requirement. */
91e22acd 8626 static const int order_021[3] = {0, 2, 1};
b1cc4aeb
PB		 8627 /* For use with Tag_VFP_arch. */
8628 static const int order_01243[5] = {0, 1, 2, 4, 3};
ee065d83 8629 int i;
91e22acd 8630 bfd_boolean result = TRUE;
ee065d83 8631
3e6b1042
DJ		 8632 /* Skip the linker stubs file. This preserves previous behavior
8633 of accepting unknown attributes in the first input file - but
8634 is that a bug? */
8635 if (ibfd->flags & BFD_LINKER_CREATED)
8636 return TRUE;
8637
104d59d1 8638 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 8639 {
8640 /* This is the first object. Copy the attributes. */
104d59d1 8641 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 8642
8643 /* Use the Tag_null value to indicate the attributes have been
8644 initialized. */
104d59d1 8645 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 8646
ee065d83
PB		 8647 return TRUE;
8648 }
8649
104d59d1
JM		 8650 in_attr = elf_known_obj_attributes_proc (ibfd);
8651 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 8652 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
8653 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
8654 {
8e79c3df 8655 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 8656 if (out_attr[Tag_ABI_FP_number_model].i == 0)
8657 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
8658 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
8659 {
8660 _bfd_error_handler
3895f852 8661 (_("error: %B uses VFP register arguments, %B does not"),
ee065d83 8662 ibfd, obfd);
91e22acd 8663 result = FALSE;
ee065d83
PB		 8664 }
8665 }
8666
104d59d1 8667 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 8668 {
8669 /* Merge this attribute with existing attributes. */
8670 switch (i)
8671 {
8672 case Tag_CPU_raw_name:
8673 case Tag_CPU_name:
91e22acd 8674 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 8675 break;
8676
8677 case Tag_ABI_optimization_goals:
8678 case Tag_ABI_FP_optimization_goals:
8679 /* Use the first value seen. */
8680 break;
8681
8682 case Tag_CPU_arch:
91e22acd
AS		 8683 {
8684 int secondary_compat = -1, secondary_compat_out = -1;
8685 unsigned int saved_out_attr = out_attr[i].i;
8686 static const char *name_table[] = {
8687 /* These aren't real CPU names, but we can't guess
8688 that from the architecture version alone. */
8689 "Pre v4",
8690 "ARM v4",
8691 "ARM v4T",
8692 "ARM v5T",
8693 "ARM v5TE",
8694 "ARM v5TEJ",
8695 "ARM v6",
8696 "ARM v6KZ",
8697 "ARM v6T2",
8698 "ARM v6K",
8699 "ARM v7",
8700 "ARM v6-M",
8701 "ARM v6S-M"
8702 };
8703
8704 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
8705 secondary_compat = get_secondary_compatible_arch (ibfd);
8706 secondary_compat_out = get_secondary_compatible_arch (obfd);
8707 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
8708 &secondary_compat_out,
8709 in_attr[i].i,
8710 secondary_compat);
8711 set_secondary_compatible_arch (obfd, secondary_compat_out);
8712
8713 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
8714 if (out_attr[i].i == saved_out_attr)
8715 ; /* Leave the names alone. */
8716 else if (out_attr[i].i == in_attr[i].i)
8717 {
8718 /* The output architecture has been changed to match the
8719 input architecture. Use the input names. */
8720 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
8721 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
8722 : NULL;
8723 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
8724 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
8725 : NULL;
8726 }
8727 else
8728 {
8729 out_attr[Tag_CPU_name].s = NULL;
8730 out_attr[Tag_CPU_raw_name].s = NULL;
8731 }
8732
8733 /* If we still don't have a value for Tag_CPU_name,
8734 make one up now. Tag_CPU_raw_name remains blank. */
8735 if (out_attr[Tag_CPU_name].s == NULL
8736 && out_attr[i].i < ARRAY_SIZE (name_table))
8737 out_attr[Tag_CPU_name].s =
8738 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
8739 }
8740 break;
8741
ee065d83
PB		 8742 case Tag_ARM_ISA_use:
8743 case Tag_THUMB_ISA_use:
ee065d83 8744 case Tag_WMMX_arch:
91e22acd
AS		 8745 case Tag_Advanced_SIMD_arch:
8746 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 8747 case Tag_ABI_FP_rounding:
ee065d83
PB		 8748 case Tag_ABI_FP_exceptions:
8749 case Tag_ABI_FP_user_exceptions:
8750 case Tag_ABI_FP_number_model:
91e22acd
AS		 8751 case Tag_VFP_HP_extension:
8752 case Tag_CPU_unaligned_access:
8753 case Tag_T2EE_use:
8754 case Tag_Virtualization_use:
8755 case Tag_MPextension_use:
ee065d83
PB		 8756 /* Use the largest value specified. */
8757 if (in_attr[i].i > out_attr[i].i)
8758 out_attr[i].i = in_attr[i].i;
8759 break;
8760
91e22acd
AS		 8761 case Tag_ABI_align8_preserved:
8762 case Tag_ABI_PCS_RO_data:
8763 /* Use the smallest value specified. */
8764 if (in_attr[i].i < out_attr[i].i)
8765 out_attr[i].i = in_attr[i].i;
8766 break;
8767
8768 case Tag_ABI_align8_needed:
8769 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
8770 && (in_attr[Tag_ABI_align8_preserved].i == 0
8771 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 8772 {
91e22acd
AS		 8773 /* This error message should be enabled once all non-conformant
8774 binaries in the toolchain have had the attributes set
8775 properly.
ee065d83 8776 _bfd_error_handler
3895f852 8777 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 8778 obfd, ibfd);
8779 result = FALSE; */
ee065d83 8780 }
91e22acd
AS		 8781 /* Fall through. */
8782 case Tag_ABI_FP_denormal:
8783 case Tag_ABI_PCS_GOT_use:
8784 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
8785 value if greater than 2 (for future-proofing). */
8786 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
8787 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
8788 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 8789 out_attr[i].i = in_attr[i].i;
8790 break;
91e22acd
AS		 8791
8792
8793 case Tag_CPU_arch_profile:
8794 if (out_attr[i].i != in_attr[i].i)
8795 {
8796 /* 0 will merge with anything.
8797 'A' and 'S' merge to 'A'.
8798 'R' and 'S' merge to 'R'.
8799 'M' and 'A|R|S' is an error. */
8800 if (out_attr[i].i == 0
8801 || (out_attr[i].i == 'S'
8802 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
8803 out_attr[i].i = in_attr[i].i;
8804 else if (in_attr[i].i == 0
8805 || (in_attr[i].i == 'S'
8806 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
8807 ; /* Do nothing. */
8808 else
8809 {
8810 _bfd_error_handler
3895f852 8811 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 8812 ibfd,
8813 in_attr[i].i ? in_attr[i].i : '0',
8814 out_attr[i].i ? out_attr[i].i : '0');
8815 result = FALSE;
8816 }
8817 }
8818 break;
b1cc4aeb 8819 case Tag_VFP_arch:
91e22acd
AS		 8820 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
8821 largest value if greater than 4 (for future-proofing). */
8822 if ((in_attr[i].i > 4 && in_attr[i].i > out_attr[i].i)
8823 || (in_attr[i].i <= 4 && out_attr[i].i <= 4
8824 && order_01243[in_attr[i].i] > order_01243[out_attr[i].i]))
b1cc4aeb
PB		 8825 out_attr[i].i = in_attr[i].i;
8826 break;
ee065d83
PB		 8827 case Tag_PCS_config:
8828 if (out_attr[i].i == 0)
8829 out_attr[i].i = in_attr[i].i;
8830 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
8831 {
8832 /* It's sometimes ok to mix different configs, so this is only
8833 a warning. */
8834 _bfd_error_handler
8835 (_("Warning: %B: Conflicting platform configuration"), ibfd);
8836 }
8837 break;
8838 case Tag_ABI_PCS_R9_use:
004ae526
PB		 8839 if (in_attr[i].i != out_attr[i].i
8840 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 8841 && in_attr[i].i != AEABI_R9_unused)
8842 {
8843 _bfd_error_handler
3895f852 8844 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 8845 result = FALSE;
ee065d83
PB		 8846 }
8847 if (out_attr[i].i == AEABI_R9_unused)
8848 out_attr[i].i = in_attr[i].i;
8849 break;
8850 case Tag_ABI_PCS_RW_data:
8851 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
8852 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
8853 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
8854 {
8855 _bfd_error_handler
3895f852 8856 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 8857 ibfd);
91e22acd 8858 result = FALSE;
ee065d83
PB		 8859 }
8860 /* Use the smallest value specified. */
8861 if (in_attr[i].i < out_attr[i].i)
8862 out_attr[i].i = in_attr[i].i;
8863 break;
ee065d83 8864 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 8865 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
8866 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 8867 {
8868 _bfd_error_handler
a9dc9481
JM		 8869 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
8870 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 8871 }
a9dc9481 8872 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 8873 out_attr[i].i = in_attr[i].i;
8874 break;
ee065d83
PB		 8875 case Tag_ABI_enum_size:
8876 if (in_attr[i].i != AEABI_enum_unused)
8877 {
8878 if (out_attr[i].i == AEABI_enum_unused
8879 || out_attr[i].i == AEABI_enum_forced_wide)
8880 {
8881 /* The existing object is compatible with anything.
8882 Use whatever requirements the new object has. */
8883 out_attr[i].i = in_attr[i].i;
8884 }
8885 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 8886 && out_attr[i].i != in_attr[i].i
0ffa91dd 8887 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 8888 {
91e22acd 8889 static const char *aeabi_enum_names[] =
bf21ed78 8890 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 8891 const char *in_name =
8892 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
8893 ? aeabi_enum_names[in_attr[i].i]
8894 : "<unknown>";
8895 const char *out_name =
8896 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
8897 ? aeabi_enum_names[out_attr[i].i]
8898 : "<unknown>";
ee065d83 8899 _bfd_error_handler
bf21ed78 8900 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 8901 ibfd, in_name, out_name);
ee065d83
PB		 8902 }
8903 }
8904 break;
8905 case Tag_ABI_VFP_args:
8906 /* Aready done. */
8907 break;
8908 case Tag_ABI_WMMX_args:
8909 if (in_attr[i].i != out_attr[i].i)
8910 {
8911 _bfd_error_handler
3895f852 8912 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 8913 ibfd, obfd);
91e22acd 8914 result = FALSE;
ee065d83
PB		 8915 }
8916 break;
7b86a9fa
AS		 8917 case Tag_compatibility:
8918 /* Merged in target-independent code. */
8919 break;
91e22acd
AS		 8920 case Tag_ABI_HardFP_use:
8921 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
8922 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
8923 || (in_attr[i].i == 2 && out_attr[i].i == 1))
8924 out_attr[i].i = 3;
8925 else if (in_attr[i].i > out_attr[i].i)
8926 out_attr[i].i = in_attr[i].i;
8927 break;
8928 case Tag_ABI_FP_16bit_format:
8929 if (in_attr[i].i != 0 && out_attr[i].i != 0)
8930 {
8931 if (in_attr[i].i != out_attr[i].i)
8932 {
8933 _bfd_error_handler
3895f852 8934 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 8935 ibfd, obfd);
8936 result = FALSE;
8937 }
8938 }
8939 if (in_attr[i].i != 0)
8940 out_attr[i].i = in_attr[i].i;
8941 break;
7b86a9fa 8942
91e22acd 8943 case Tag_nodefaults:
2d0bb761
AS		 8944 /* This tag is set if it exists, but the value is unused (and is
8945 typically zero). We don't actually need to do anything here -
8946 the merge happens automatically when the type flags are merged
8947 below. */
91e22acd
AS		 8948 break;
8949 case Tag_also_compatible_with:
8950 /* Already done in Tag_CPU_arch. */
8951 break;
8952 case Tag_conformance:
8953 /* Keep the attribute if it matches. Throw it away otherwise.
8954 No attribute means no claim to conform. */
8955 if (!in_attr[i].s || !out_attr[i].s
8956 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
8957 out_attr[i].s = NULL;
8958 break;
3cfad14c 8959
91e22acd 8960 default:
3cfad14c 8961 {
91e22acd
AS		 8962 bfd *err_bfd = NULL;
8963
8964 /* The "known_obj_attributes" table does contain some undefined
8965 attributes. Ensure that there are unused. */
8966 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
8967 err_bfd = obfd;
8968 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
8969 err_bfd = ibfd;
8970
8971 if (err_bfd != NULL)
8972 {
8973 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
8974 if ((i & 127) < 64)
8975 {
8976 _bfd_error_handler
8977 (_("%B: Unknown mandatory EABI object attribute %d"),
8978 err_bfd, i);
8979 bfd_set_error (bfd_error_bad_value);
8980 result = FALSE;
8981 }
8982 else
8983 {
8984 _bfd_error_handler
8985 (_("Warning: %B: Unknown EABI object attribute %d"),
8986 err_bfd, i);
8987 }
8988 }
8989
8990 /* Only pass on attributes that match in both inputs. */
8991 if (in_attr[i].i != out_attr[i].i
8992 || in_attr[i].s != out_attr[i].s
8993 || (in_attr[i].s != NULL && out_attr[i].s != NULL
8994 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
8995 {
8996 out_attr[i].i = 0;
8997 out_attr[i].s = NULL;
8998 }
3cfad14c 8999 }
91e22acd
AS		 9000 }
9001
9002 /* If out_attr was copied from in_attr then it won't have a type yet. */
9003 if (in_attr[i].type && !out_attr[i].type)
9004 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 9005 }
9006
104d59d1
JM		 9007 /* Merge Tag_compatibility attributes and any common GNU ones. */
9008 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 9009
104d59d1
JM		 9010 /* Check for any attributes not known on ARM. */
9011 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 9012 out_listp = &elf_other_obj_attributes_proc (obfd);
9013 out_list = *out_listp;
8e79c3df 9014
91e22acd 9015 for (; in_list || out_list; )
ee065d83 9016 {
91e22acd
AS		 9017 bfd *err_bfd = NULL;
9018 int err_tag = 0;
8e79c3df
CM		 9019
9020 /* The tags for each list are in numerical order. */
9021 /* If the tags are equal, then merge. */
91e22acd 9022 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 9023 {
91e22acd
AS		 9024 /* This attribute only exists in obfd. We can't merge, and we don't
9025 know what the tag means, so delete it. */
9026 err_bfd = obfd;
9027 err_tag = out_list->tag;
9028 *out_listp = out_list->next;
9029 out_list = *out_listp;
8e79c3df 9030 }
91e22acd 9031 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 9032 {
91e22acd
AS		 9033 /* This attribute only exists in ibfd. We can't merge, and we don't
9034 know what the tag means, so ignore it. */
9035 err_bfd = ibfd;
9036 err_tag = in_list->tag;
8e79c3df 9037 in_list = in_list->next;
eb111b1f 9038 }
91e22acd
AS		 9039 else /* The tags are equal. */
9040 {
9041 /* As present, all attributes in the list are unknown, and
9042 therefore can't be merged meaningfully. */
9043 err_bfd = obfd;
9044 err_tag = out_list->tag;
9045
9046 /* Only pass on attributes that match in both inputs. */
9047 if (in_list->attr.i != out_list->attr.i
9048 || in_list->attr.s != out_list->attr.s
9049 || (in_list->attr.s && out_list->attr.s
9050 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
9051 {
9052 /* No match. Delete the attribute. */
9053 *out_listp = out_list->next;
9054 out_list = *out_listp;
9055 }
9056 else
9057 {
9058 /* Matched. Keep the attribute and move to the next. */
9059 out_list = out_list->next;
9060 in_list = in_list->next;
9061 }
9062 }
9063
9064 if (err_bfd)
9065 {
9066 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9067 if ((err_tag & 127) < 64)
9068 {
9069 _bfd_error_handler
9070 (_("%B: Unknown mandatory EABI object attribute %d"),
9071 err_bfd, err_tag);
9072 bfd_set_error (bfd_error_bad_value);
9073 result = FALSE;
9074 }
9075 else
9076 {
9077 _bfd_error_handler
9078 (_("Warning: %B: Unknown EABI object attribute %d"),
9079 err_bfd, err_tag);
9080 }
9081 }
ee065d83 9082 }
91e22acd 9083 return result;
252b5132
RH		 9084}
9085
3a4a14e9
PB		 9086
9087/* Return TRUE if the two EABI versions are incompatible. */
9088
9089static bfd_boolean
9090elf32_arm_versions_compatible (unsigned iver, unsigned over)
9091{
9092 /* v4 and v5 are the same spec before and after it was released,
9093 so allow mixing them. */
9094 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
9095 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
9096 return TRUE;
9097
9098 return (iver == over);
9099}
9100
252b5132
RH		 9101/* Merge backend specific data from an object file to the output
9102 object file when linking. */
9b485d32 9103
b34976b6 9104static bfd_boolean
57e8b36a 9105elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 9106{
9107 flagword out_flags;
9108 flagword in_flags;
b34976b6 9109 bfd_boolean flags_compatible = TRUE;
cf919dfd 9110 asection *sec;
252b5132 9111
9b485d32 9112 /* Check if we have the same endianess. */
82e51918 9113 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 9114 return FALSE;
1fe494a5 9115
0ffa91dd 9116 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9117 return TRUE;
252b5132 9118
ee065d83
PB		 9119 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
9120 return FALSE;
9121
252b5132
RH		 9122 /* The input BFD must have had its flags initialised. */
9123 /* The following seems bogus to me -- The flags are initialized in
9124 the assembler but I don't think an elf_flags_init field is
9b485d32 9125 written into the object. */
252b5132
RH		 9126 /* BFD_ASSERT (elf_flags_init (ibfd)); */
9127
9128 in_flags = elf_elfheader (ibfd)->e_flags;
9129 out_flags = elf_elfheader (obfd)->e_flags;
9130
23684067
PB		 9131 /* In theory there is no reason why we couldn't handle this. However
9132 in practice it isn't even close to working and there is no real
9133 reason to want it. */
9134 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
c13bb2ea 9135 && !(ibfd->flags & DYNAMIC)
23684067
PB		 9136 && (in_flags & EF_ARM_BE8))
9137 {
3895f852 9138 _bfd_error_handler (_("error: %B is already in final BE8 format"),
23684067
PB		 9139 ibfd);
9140 return FALSE;
9141 }
9142
252b5132
RH		 9143 if (!elf_flags_init (obfd))
9144 {
fe077fa6
NC		 9145 /* If the input is the default architecture and had the default
9146 flags then do not bother setting the flags for the output
9147 architecture, instead allow future merges to do this. If no
9148 future merges ever set these flags then they will retain their
9149 uninitialised values, which surprise surprise, correspond
252b5132 9150 to the default values. */
fe077fa6
NC		 9151 if (bfd_get_arch_info (ibfd)->the_default
9152 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 9153 return TRUE;
252b5132 9154
b34976b6 9155 elf_flags_init (obfd) = TRUE;
252b5132
RH		 9156 elf_elfheader (obfd)->e_flags = in_flags;
9157
9158 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
9159 && bfd_get_arch_info (obfd)->the_default)
9160 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
9161
b34976b6 9162 return TRUE;
252b5132
RH		 9163 }
9164
5a6c6817
NC		 9165 /* Determine what should happen if the input ARM architecture
9166 does not match the output ARM architecture. */
9167 if (! bfd_arm_merge_machines (ibfd, obfd))
9168 return FALSE;
e16bb312 9169
1006ba19 9170 /* Identical flags must be compatible. */
252b5132 9171 if (in_flags == out_flags)
b34976b6 9172 return TRUE;
252b5132 9173
35a0f415
DJ		 9174 /* Check to see if the input BFD actually contains any sections. If
9175 not, its flags may not have been initialised either, but it
8e3de13a 9176 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 9177 dynamic objects; their section list may be emptied by
d1f161ea 9178 elf_link_add_object_symbols.
35a0f415 9179
d1f161ea
NC		 9180 Also check to see if there are no code sections in the input.
9181 In this case there is no need to check for code specific flags.
9182 XXX - do we need to worry about floating-point format compatability
9183 in data sections ? */
35a0f415 9184 if (!(ibfd->flags & DYNAMIC))
cf919dfd 9185 {
35a0f415 9186 bfd_boolean null_input_bfd = TRUE;
d1f161ea 9187 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 9188
9189 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 9190 {
35a0f415
DJ		 9191 /* Ignore synthetic glue sections. */
9192 if (strcmp (sec->name, ".glue_7")
9193 && strcmp (sec->name, ".glue_7t"))
9194 {
d1f161ea
NC		 9195 if ((bfd_get_section_flags (ibfd, sec)
9196 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
9197 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
9198 only_data_sections = FALSE;
9199
35a0f415
DJ		 9200 null_input_bfd = FALSE;
9201 break;
9202 }
cf919dfd 9203 }
d1f161ea
NC		 9204
9205 if (null_input_bfd || only_data_sections)
35a0f415 9206 return TRUE;
cf919dfd 9207 }
cf919dfd 9208
252b5132 9209 /* Complain about various flag mismatches. */
3a4a14e9
PB		 9210 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
9211 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 9212 {
d003868e 9213 _bfd_error_handler
3895f852 9214 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 9215 ibfd, obfd,
9216 (in_flags & EF_ARM_EABIMASK) >> 24,
9217 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 9218 return FALSE;
fc830a83 9219 }
252b5132 9220
1006ba19 9221 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 9222 /* VxWorks libraries do not use these flags. */
9223 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
9224 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
9225 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 9226 {
fd2ec330 9227 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 9228 {
d003868e 9229 _bfd_error_handler
3895f852 9230 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
d003868e
AM		 9231 ibfd, obfd,
9232 in_flags & EF_ARM_APCS_26 ? 26 : 32,
9233 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 9234 flags_compatible = FALSE;
1006ba19 9235 }
252b5132 9236
fd2ec330 9237 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 9238 {
5eefb65f 9239 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e 9240 _bfd_error_handler
3895f852 9241 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
d003868e 9242 ibfd, obfd);
5eefb65f 9243 else
d003868e 9244 _bfd_error_handler
3895f852 9245 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
d003868e 9246 ibfd, obfd);
63b0f745 9247
b34976b6 9248 flags_compatible = FALSE;
1006ba19 9249 }
252b5132 9250
96a846ea 9251 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 9252 {
96a846ea 9253 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e 9254 _bfd_error_handler
3895f852 9255 (_("error: %B uses VFP instructions, whereas %B does not"),
d003868e 9256 ibfd, obfd);
5eefb65f 9257 else
d003868e 9258 _bfd_error_handler
3895f852 9259 (_("error: %B uses FPA instructions, whereas %B does not"),
d003868e 9260 ibfd, obfd);
fde78edd
NC		 9261
9262 flags_compatible = FALSE;
9263 }
9264
9265 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
9266 {
9267 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e 9268 _bfd_error_handler
3895f852 9269 (_("error: %B uses Maverick instructions, whereas %B does not"),
d003868e 9270 ibfd, obfd);
fde78edd 9271 else
d003868e 9272 _bfd_error_handler
3895f852 9273 (_("error: %B does not use Maverick instructions, whereas %B does"),
d003868e 9274 ibfd, obfd);
63b0f745 9275
b34976b6 9276 flags_compatible = FALSE;
1006ba19 9277 }
96a846ea
RE		 9278
9279#ifdef EF_ARM_SOFT_FLOAT
9280 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
9281 {
9282 /* We can allow interworking between code that is VFP format
9283 layout, and uses either soft float or integer regs for
9284 passing floating point arguments and results. We already
9285 know that the APCS_FLOAT flags match; similarly for VFP
9286 flags. */
9287 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
9288 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
9289 {
9290 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e 9291 _bfd_error_handler
3895f852 9292 (_("error: %B uses software FP, whereas %B uses hardware FP"),
d003868e 9293 ibfd, obfd);
96a846ea 9294 else
d003868e 9295 _bfd_error_handler
3895f852 9296 (_("error: %B uses hardware FP, whereas %B uses software FP"),
d003868e 9297 ibfd, obfd);
96a846ea 9298
b34976b6 9299 flags_compatible = FALSE;
96a846ea
RE		 9300 }
9301 }
ee43f35e 9302#endif
252b5132 9303
1006ba19 9304 /* Interworking mismatch is only a warning. */
fd2ec330 9305 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 9306 {
e3c8793a
NC		 9307 if (in_flags & EF_ARM_INTERWORK)
9308 {
d003868e
AM		 9309 _bfd_error_handler
9310 (_("Warning: %B supports interworking, whereas %B does not"),
9311 ibfd, obfd);
e3c8793a
NC		 9312 }
9313 else
9314 {
d003868e
AM		 9315 _bfd_error_handler
9316 (_("Warning: %B does not support interworking, whereas %B does"),
9317 ibfd, obfd);
e3c8793a 9318 }
8f615d07 9319 }
252b5132 9320 }
63b0f745 9321
1006ba19 9322 return flags_compatible;
252b5132
RH		 9323}
9324
9b485d32
NC		 9325/* Display the flags field. */
9326
b34976b6 9327static bfd_boolean
57e8b36a 9328elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 9329{
fc830a83
NC		 9330 FILE * file = (FILE *) ptr;
9331 unsigned long flags;
252b5132
RH		 9332
9333 BFD_ASSERT (abfd != NULL && ptr != NULL);
9334
9335 /* Print normal ELF private data. */
9336 _bfd_elf_print_private_bfd_data (abfd, ptr);
9337
fc830a83 9338 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 9339 /* Ignore init flag - it may not be set, despite the flags field
9340 containing valid data. */
252b5132
RH		 9341
9342 /* xgettext:c-format */
9b485d32 9343 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 9344
fc830a83
NC		 9345 switch (EF_ARM_EABI_VERSION (flags))
9346 {
9347 case EF_ARM_EABI_UNKNOWN:
4cc11e76 9348 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 9349 official ARM ELF extended ABI. Hence they are only decoded if
9350 the EABI version is not set. */
fd2ec330 9351 if (flags & EF_ARM_INTERWORK)
9b485d32 9352 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 9353
fd2ec330 9354 if (flags & EF_ARM_APCS_26)
6c571f00 9355 fprintf (file, " [APCS-26]");
fc830a83 9356 else
6c571f00 9357 fprintf (file, " [APCS-32]");
9a5aca8c 9358
96a846ea
RE		 9359 if (flags & EF_ARM_VFP_FLOAT)
9360 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 9361 else if (flags & EF_ARM_MAVERICK_FLOAT)
9362 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 9363 else
9364 fprintf (file, _(" [FPA float format]"));
9365
fd2ec330 9366 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 9367 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 9368
fd2ec330 9369 if (flags & EF_ARM_PIC)
9b485d32 9370 fprintf (file, _(" [position independent]"));
fc830a83 9371
fd2ec330 9372 if (flags & EF_ARM_NEW_ABI)
9b485d32 9373 fprintf (file, _(" [new ABI]"));
9a5aca8c 9374
fd2ec330 9375 if (flags & EF_ARM_OLD_ABI)
9b485d32 9376 fprintf (file, _(" [old ABI]"));
9a5aca8c 9377
fd2ec330 9378 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 9379 fprintf (file, _(" [software FP]"));
9a5aca8c 9380
96a846ea
RE		 9381 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
9382 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 9383 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
9384 | EF_ARM_MAVERICK_FLOAT);
fc830a83 9385 break;
9a5aca8c 9386
fc830a83 9387 case EF_ARM_EABI_VER1:
9b485d32 9388 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 9389
fc830a83 9390 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 9391 fprintf (file, _(" [sorted symbol table]"));
fc830a83 9392 else
9b485d32 9393 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 9394
fc830a83
NC		 9395 flags &= ~ EF_ARM_SYMSARESORTED;
9396 break;
9a5aca8c 9397
fd2ec330
PB		 9398 case EF_ARM_EABI_VER2:
9399 fprintf (file, _(" [Version2 EABI]"));
9400
9401 if (flags & EF_ARM_SYMSARESORTED)
9402 fprintf (file, _(" [sorted symbol table]"));
9403 else
9404 fprintf (file, _(" [unsorted symbol table]"));
9405
9406 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
9407 fprintf (file, _(" [dynamic symbols use segment index]"));
9408
9409 if (flags & EF_ARM_MAPSYMSFIRST)
9410 fprintf (file, _(" [mapping symbols precede others]"));
9411
99e4ae17 9412 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 9413 | EF_ARM_MAPSYMSFIRST);
9414 break;
9415
d507cf36
PB		 9416 case EF_ARM_EABI_VER3:
9417 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 9418 break;
9419
9420 case EF_ARM_EABI_VER4:
9421 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 9422 goto eabi;
d507cf36 9423
3a4a14e9
PB		 9424 case EF_ARM_EABI_VER5:
9425 fprintf (file, _(" [Version5 EABI]"));
9426 eabi:
d507cf36
PB		 9427 if (flags & EF_ARM_BE8)
9428 fprintf (file, _(" [BE8]"));
9429
9430 if (flags & EF_ARM_LE8)
9431 fprintf (file, _(" [LE8]"));
9432
9433 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
9434 break;
9435
fc830a83 9436 default:
9b485d32 9437 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 9438 break;
9439 }
252b5132 9440
fc830a83 9441 flags &= ~ EF_ARM_EABIMASK;
252b5132 9442
fc830a83 9443 if (flags & EF_ARM_RELEXEC)
9b485d32 9444 fprintf (file, _(" [relocatable executable]"));
252b5132 9445
fc830a83 9446 if (flags & EF_ARM_HASENTRY)
9b485d32 9447 fprintf (file, _(" [has entry point]"));
252b5132 9448
fc830a83
NC		 9449 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
9450
9451 if (flags)
9b485d32 9452 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 9453
252b5132
RH		 9454 fputc ('\n', file);
9455
b34976b6 9456 return TRUE;
252b5132
RH		 9457}
9458
9459static int
57e8b36a 9460elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 9461{
2f0ca46a
NC		 9462 switch (ELF_ST_TYPE (elf_sym->st_info))
9463 {
9464 case STT_ARM_TFUNC:
9465 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 9466
2f0ca46a
NC		 9467 case STT_ARM_16BIT:
9468 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
9469 This allows us to distinguish between data used by Thumb instructions
9470 and non-data (which is probably code) inside Thumb regions of an
9471 executable. */
1a0eb693 9472 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 9473 return ELF_ST_TYPE (elf_sym->st_info);
9474 break;
9a5aca8c 9475
ce855c42
NC		 9476 default:
9477 break;
2f0ca46a
NC		 9478 }
9479
9480 return type;
252b5132 9481}
f21f3fe0 9482
252b5132 9483static asection *
07adf181
AM		 9484elf32_arm_gc_mark_hook (asection *sec,
9485 struct bfd_link_info *info,
9486 Elf_Internal_Rela *rel,
9487 struct elf_link_hash_entry *h,
9488 Elf_Internal_Sym *sym)
252b5132
RH		 9489{
9490 if (h != NULL)
07adf181 9491 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 9492 {
9493 case R_ARM_GNU_VTINHERIT:
9494 case R_ARM_GNU_VTENTRY:
07adf181
AM		 9495 return NULL;
9496 }
9ad5cbcf 9497
07adf181 9498 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 9499}
9500
780a67af
NC		 9501/* Update the got entry reference counts for the section being removed. */
9502
b34976b6 9503static bfd_boolean
ba93b8ac
DJ		 9504elf32_arm_gc_sweep_hook (bfd * abfd,
9505 struct bfd_link_info * info,
9506 asection * sec,
9507 const Elf_Internal_Rela * relocs)
252b5132 9508{
5e681ec4
PB		 9509 Elf_Internal_Shdr *symtab_hdr;
9510 struct elf_link_hash_entry **sym_hashes;
9511 bfd_signed_vma *local_got_refcounts;
9512 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 9513 struct elf32_arm_link_hash_table * globals;
9514
7dda2462
TG		 9515 if (info->relocatable)
9516 return TRUE;
9517
eb043451 9518 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 9519
9520 elf_section_data (sec)->local_dynrel = NULL;
9521
0ffa91dd 9522 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 9523 sym_hashes = elf_sym_hashes (abfd);
9524 local_got_refcounts = elf_local_got_refcounts (abfd);
9525
906e58ca 9526 check_use_blx (globals);
bd97cb95 9527
5e681ec4
PB		 9528 relend = relocs + sec->reloc_count;
9529 for (rel = relocs; rel < relend; rel++)
eb043451 9530 {
3eb128b2
AM		 9531 unsigned long r_symndx;
9532 struct elf_link_hash_entry *h = NULL;
eb043451 9533 int r_type;
5e681ec4 9534
3eb128b2
AM		 9535 r_symndx = ELF32_R_SYM (rel->r_info);
9536 if (r_symndx >= symtab_hdr->sh_info)
9537 {
9538 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
9539 while (h->root.type == bfd_link_hash_indirect
9540 || h->root.type == bfd_link_hash_warning)
9541 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9542 }
9543
eb043451 9544 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 9545 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 9546 switch (r_type)
9547 {
9548 case R_ARM_GOT32:
eb043451 9549 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 9550 case R_ARM_TLS_GD32:
9551 case R_ARM_TLS_IE32:
3eb128b2 9552 if (h != NULL)
eb043451 9553 {
eb043451
PB		 9554 if (h->got.refcount > 0)
9555 h->got.refcount -= 1;
9556 }
9557 else if (local_got_refcounts != NULL)
9558 {
9559 if (local_got_refcounts[r_symndx] > 0)
9560 local_got_refcounts[r_symndx] -= 1;
9561 }
9562 break;
9563
ba93b8ac
DJ		 9564 case R_ARM_TLS_LDM32:
9565 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
9566 break;
9567
eb043451 9568 case R_ARM_ABS32:
bb224fc3 9569 case R_ARM_ABS32_NOI:
eb043451 9570 case R_ARM_REL32:
bb224fc3 9571 case R_ARM_REL32_NOI:
eb043451
PB		 9572 case R_ARM_PC24:
9573 case R_ARM_PLT32:
5b5bb741
PB		 9574 case R_ARM_CALL:
9575 case R_ARM_JUMP24:
eb043451 9576 case R_ARM_PREL31:
c19d1205 9577 case R_ARM_THM_CALL:
bd97cb95
DJ		 9578 case R_ARM_THM_JUMP24:
9579 case R_ARM_THM_JUMP19:
b6895b4f
PB		 9580 case R_ARM_MOVW_ABS_NC:
9581 case R_ARM_MOVT_ABS:
9582 case R_ARM_MOVW_PREL_NC:
9583 case R_ARM_MOVT_PREL:
9584 case R_ARM_THM_MOVW_ABS_NC:
9585 case R_ARM_THM_MOVT_ABS:
9586 case R_ARM_THM_MOVW_PREL_NC:
9587 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 9588 /* Should the interworking branches be here also? */
9589
3eb128b2 9590 if (h != NULL)
eb043451
PB		 9591 {
9592 struct elf32_arm_link_hash_entry *eh;
9593 struct elf32_arm_relocs_copied **pp;
9594 struct elf32_arm_relocs_copied *p;
5e681ec4 9595
b7693d02 9596 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 9597
eb043451 9598 if (h->plt.refcount > 0)
b7693d02
DJ		 9599 {
9600 h->plt.refcount -= 1;
bd97cb95
DJ		 9601 if (r_type == R_ARM_THM_CALL)
9602 eh->plt_maybe_thumb_refcount--;
9603
9604 if (r_type == R_ARM_THM_JUMP24
9605 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 9606 eh->plt_thumb_refcount--;
9607 }
5e681ec4 9608
eb043451 9609 if (r_type == R_ARM_ABS32
bb224fc3
MS		 9610 || r_type == R_ARM_REL32
9611 || r_type == R_ARM_ABS32_NOI
9612 || r_type == R_ARM_REL32_NOI)
eb043451 9613 {
eb043451
PB		 9614 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
9615 pp = &p->next)
9616 if (p->section == sec)
9617 {
9618 p->count -= 1;
bb224fc3
MS		 9619 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
9620 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 9621 p->pc_count -= 1;
eb043451
PB		 9622 if (p->count == 0)
9623 *pp = p->next;
9624 break;
9625 }
9626 }
9627 }
9628 break;
5e681ec4 9629
eb043451
PB		 9630 default:
9631 break;
9632 }
9633 }
5e681ec4 9634
b34976b6 9635 return TRUE;
252b5132
RH		 9636}
9637
780a67af
NC		 9638/* Look through the relocs for a section during the first phase. */
9639
b34976b6 9640static bfd_boolean
57e8b36a
NC		 9641elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
9642 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 9643{
b34976b6
AM		 9644 Elf_Internal_Shdr *symtab_hdr;
9645 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 9646 const Elf_Internal_Rela *rel;
9647 const Elf_Internal_Rela *rel_end;
9648 bfd *dynobj;
5e681ec4 9649 asection *sreloc;
b34976b6 9650 bfd_vma *local_got_offsets;
5e681ec4 9651 struct elf32_arm_link_hash_table *htab;
39623e12 9652 bfd_boolean needs_plt;
ce98a316 9653 unsigned long nsyms;
9a5aca8c 9654
1049f94e 9655 if (info->relocatable)
b34976b6 9656 return TRUE;
9a5aca8c 9657
0ffa91dd
NC		 9658 BFD_ASSERT (is_arm_elf (abfd));
9659
5e681ec4
PB		 9660 htab = elf32_arm_hash_table (info);
9661 sreloc = NULL;
9a5aca8c 9662
67687978
PB		 9663 /* Create dynamic sections for relocatable executables so that we can
9664 copy relocations. */
9665 if (htab->root.is_relocatable_executable
9666 && ! htab->root.dynamic_sections_created)
9667 {
9668 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
9669 return FALSE;
9670 }
9671
252b5132
RH		 9672 dynobj = elf_hash_table (info)->dynobj;
9673 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 9674
0ffa91dd 9675 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 9676 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 9677 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
9678
252b5132
RH		 9679 rel_end = relocs + sec->reloc_count;
9680 for (rel = relocs; rel < rel_end; rel++)
9681 {
9682 struct elf_link_hash_entry *h;
b7693d02 9683 struct elf32_arm_link_hash_entry *eh;
252b5132 9684 unsigned long r_symndx;
eb043451 9685 int r_type;
9a5aca8c 9686
252b5132 9687 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 9688 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 9689 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 9690
ce98a316
NC		 9691 if (r_symndx >= nsyms
9692 /* PR 9934: It is possible to have relocations that do not
9693 refer to symbols, thus it is also possible to have an
9694 object file containing relocations but no symbol table. */
9695 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 9696 {
9697 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 9698 r_symndx);
ba93b8ac
DJ		 9699 return FALSE;
9700 }
9701
ce98a316 9702 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 9703 h = NULL;
9704 else
973a3492
L		 9705 {
9706 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
9707 while (h->root.type == bfd_link_hash_indirect
9708 || h->root.type == bfd_link_hash_warning)
9709 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9710 }
9a5aca8c 9711
b7693d02
DJ		 9712 eh = (struct elf32_arm_link_hash_entry *) h;
9713
eb043451 9714 switch (r_type)
252b5132 9715 {
5e681ec4 9716 case R_ARM_GOT32:
eb043451 9717 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 9718 case R_ARM_TLS_GD32:
9719 case R_ARM_TLS_IE32:
5e681ec4 9720 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 9721 {
9722 int tls_type, old_tls_type;
5e681ec4 9723
ba93b8ac
DJ		 9724 switch (r_type)
9725 {
9726 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
9727 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
9728 default: tls_type = GOT_NORMAL; break;
9729 }
252b5132 9730
ba93b8ac
DJ		 9731 if (h != NULL)
9732 {
9733 h->got.refcount++;
9734 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
9735 }
9736 else
9737 {
9738 bfd_signed_vma *local_got_refcounts;
9739
9740 /* This is a global offset table entry for a local symbol. */
9741 local_got_refcounts = elf_local_got_refcounts (abfd);
9742 if (local_got_refcounts == NULL)
9743 {
9744 bfd_size_type size;
906e58ca 9745
ba93b8ac 9746 size = symtab_hdr->sh_info;
906e58ca 9747 size *= (sizeof (bfd_signed_vma) + sizeof (char));
ba93b8ac
DJ		 9748 local_got_refcounts = bfd_zalloc (abfd, size);
9749 if (local_got_refcounts == NULL)
9750 return FALSE;
9751 elf_local_got_refcounts (abfd) = local_got_refcounts;
9752 elf32_arm_local_got_tls_type (abfd)
9753 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
9754 }
9755 local_got_refcounts[r_symndx] += 1;
9756 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
9757 }
9758
9759 /* We will already have issued an error message if there is a
9760 TLS / non-TLS mismatch, based on the symbol type. We don't
9761 support any linker relaxations. So just combine any TLS
9762 types needed. */
9763 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
9764 && tls_type != GOT_NORMAL)
9765 tls_type |= old_tls_type;
9766
9767 if (old_tls_type != tls_type)
9768 {
9769 if (h != NULL)
9770 elf32_arm_hash_entry (h)->tls_type = tls_type;
9771 else
9772 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
9773 }
9774 }
8029a119 9775 /* Fall through. */
ba93b8ac
DJ		 9776
9777 case R_ARM_TLS_LDM32:
9778 if (r_type == R_ARM_TLS_LDM32)
9779 htab->tls_ldm_got.refcount++;
8029a119 9780 /* Fall through. */
252b5132 9781
c19d1205 9782 case R_ARM_GOTOFF32:
5e681ec4
PB		 9783 case R_ARM_GOTPC:
9784 if (htab->sgot == NULL)
9785 {
9786 if (htab->root.dynobj == NULL)
9787 htab->root.dynobj = abfd;
9788 if (!create_got_section (htab->root.dynobj, info))
9789 return FALSE;
9790 }
252b5132
RH		 9791 break;
9792
00a97672
RS		 9793 case R_ARM_ABS12:
9794 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
9795 ldr __GOTT_INDEX__ offsets. */
9796 if (!htab->vxworks_p)
9797 break;
8029a119 9798 /* Fall through. */
00a97672 9799
252b5132 9800 case R_ARM_PC24:
7359ea65 9801 case R_ARM_PLT32:
5b5bb741
PB		 9802 case R_ARM_CALL:
9803 case R_ARM_JUMP24:
eb043451 9804 case R_ARM_PREL31:
c19d1205 9805 case R_ARM_THM_CALL:
bd97cb95
DJ		 9806 case R_ARM_THM_JUMP24:
9807 case R_ARM_THM_JUMP19:
39623e12
PB		 9808 needs_plt = 1;
9809 goto normal_reloc;
9810
9811 case R_ARM_ABS32:
9812 case R_ARM_ABS32_NOI:
9813 case R_ARM_REL32:
9814 case R_ARM_REL32_NOI:
b6895b4f
PB		 9815 case R_ARM_MOVW_ABS_NC:
9816 case R_ARM_MOVT_ABS:
9817 case R_ARM_MOVW_PREL_NC:
9818 case R_ARM_MOVT_PREL:
9819 case R_ARM_THM_MOVW_ABS_NC:
9820 case R_ARM_THM_MOVT_ABS:
9821 case R_ARM_THM_MOVW_PREL_NC:
9822 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 9823 needs_plt = 0;
9824 normal_reloc:
9825
b7693d02 9826 /* Should the interworking branches be listed here? */
7359ea65 9827 if (h != NULL)
5e681ec4
PB		 9828 {
9829 /* If this reloc is in a read-only section, we might
9830 need a copy reloc. We can't check reliably at this
9831 stage whether the section is read-only, as input
9832 sections have not yet been mapped to output sections.
9833 Tentatively set the flag for now, and correct in
9834 adjust_dynamic_symbol. */
7359ea65 9835 if (!info->shared)
f5385ebf 9836 h->non_got_ref = 1;
7359ea65 9837
5e681ec4 9838 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 9839 refers to is in a different object. We can't tell for
9840 sure yet, because something later might force the
9841 symbol local. */
39623e12 9842 if (needs_plt)
f5385ebf 9843 h->needs_plt = 1;
4f199be3
DJ		 9844
9845 /* If we create a PLT entry, this relocation will reference
9846 it, even if it's an ABS32 relocation. */
9847 h->plt.refcount += 1;
b7693d02 9848
bd97cb95
DJ		 9849 /* It's too early to use htab->use_blx here, so we have to
9850 record possible blx references separately from
9851 relocs that definitely need a thumb stub. */
9852
c19d1205 9853 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 9854 eh->plt_maybe_thumb_refcount += 1;
9855
9856 if (r_type == R_ARM_THM_JUMP24
9857 || r_type == R_ARM_THM_JUMP19)
b7693d02 9858 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 9859 }
9860
67687978
PB		 9861 /* If we are creating a shared library or relocatable executable,
9862 and this is a reloc against a global symbol, or a non PC
9863 relative reloc against a local symbol, then we need to copy
9864 the reloc into the shared library. However, if we are linking
9865 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 9866 global symbol which is defined in an object we are
9867 including in the link (i.e., DEF_REGULAR is set). At
9868 this point we have not seen all the input files, so it is
9869 possible that DEF_REGULAR is not set now but will be set
9870 later (it is never cleared). We account for that
9871 possibility below by storing information in the
5e681ec4 9872 relocs_copied field of the hash table entry. */
67687978 9873 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 9874 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 9875 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 9876 || (h != NULL && ! h->needs_plt
9877 && (! info->symbolic || ! h->def_regular))))
252b5132 9878 {
5e681ec4
PB		 9879 struct elf32_arm_relocs_copied *p, **head;
9880
252b5132
RH		 9881 /* When creating a shared object, we must copy these
9882 reloc types into the output file. We create a reloc
9883 section in dynobj and make room for this reloc. */
83bac4b0 9884 if (sreloc == NULL)
252b5132 9885 {
83bac4b0
NC		 9886 sreloc = _bfd_elf_make_dynamic_reloc_section
9887 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 9888
83bac4b0 9889 if (sreloc == NULL)
b34976b6 9890 return FALSE;
252b5132 9891
83bac4b0 9892 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 9893 if (htab->symbian_p)
252b5132 9894 {
83bac4b0 9895 flagword flags;
5e681ec4 9896
83bac4b0 9897 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 9898 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 9899 bfd_set_section_flags (dynobj, sreloc, flags);
9900 }
252b5132
RH		 9901 }
9902
5e681ec4
PB		 9903 /* If this is a global symbol, we count the number of
9904 relocations we need for this symbol. */
9905 if (h != NULL)
252b5132 9906 {
5e681ec4
PB		 9907 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
9908 }
9909 else
9910 {
9911 /* Track dynamic relocs needed for local syms too.
9912 We really need local syms available to do this
9913 easily. Oh well. */
57e8b36a 9914
5e681ec4 9915 asection *s;
6edfbbad
DJ		 9916 void *vpp;
9917
5e681ec4
PB		 9918 s = bfd_section_from_r_symndx (abfd, &htab->sym_sec,
9919 sec, r_symndx);
9920 if (s == NULL)
9921 return FALSE;
57e8b36a 9922
6edfbbad
DJ		 9923 vpp = &elf_section_data (s)->local_dynrel;
9924 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 9925 }
57e8b36a 9926
5e681ec4
PB		 9927 p = *head;
9928 if (p == NULL || p->section != sec)
9929 {
9930 bfd_size_type amt = sizeof *p;
57e8b36a 9931
5e681ec4 9932 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 9933 if (p == NULL)
5e681ec4
PB		 9934 return FALSE;
9935 p->next = *head;
9936 *head = p;
9937 p->section = sec;
9938 p->count = 0;
ba93b8ac 9939 p->pc_count = 0;
252b5132 9940 }
57e8b36a 9941
bb224fc3 9942 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 9943 p->pc_count += 1;
71a976dd 9944 p->count += 1;
252b5132
RH		 9945 }
9946 break;
9947
9948 /* This relocation describes the C++ object vtable hierarchy.
9949 Reconstruct it for later use during GC. */
9950 case R_ARM_GNU_VTINHERIT:
c152c796 9951 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 9952 return FALSE;
252b5132 9953 break;
9a5aca8c 9954
252b5132
RH		 9955 /* This relocation describes which C++ vtable entries are actually
9956 used. Record for later use during GC. */
9957 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 9958 BFD_ASSERT (h != NULL);
9959 if (h != NULL
9960 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 9961 return FALSE;
252b5132
RH		 9962 break;
9963 }
9964 }
f21f3fe0 9965
b34976b6 9966 return TRUE;
252b5132
RH		 9967}
9968
6a5bb875
PB		 9969/* Unwinding tables are not referenced directly. This pass marks them as
9970 required if the corresponding code section is marked. */
9971
9972static bfd_boolean
906e58ca
NC		 9973elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
9974 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 9975{
9976 bfd *sub;
9977 Elf_Internal_Shdr **elf_shdrp;
9978 bfd_boolean again;
9979
9980 /* Marking EH data may cause additional code sections to be marked,
9981 requiring multiple passes. */
9982 again = TRUE;
9983 while (again)
9984 {
9985 again = FALSE;
9986 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
9987 {
9988 asection *o;
9989
0ffa91dd 9990 if (! is_arm_elf (sub))
6a5bb875
PB		 9991 continue;
9992
9993 elf_shdrp = elf_elfsections (sub);
9994 for (o = sub->sections; o != NULL; o = o->next)
9995 {
9996 Elf_Internal_Shdr *hdr;
0ffa91dd 9997
6a5bb875 9998 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 9999 if (hdr->sh_type == SHT_ARM_EXIDX
10000 && hdr->sh_link
10001 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 10002 && !o->gc_mark
10003 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
10004 {
10005 again = TRUE;
10006 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
10007 return FALSE;
10008 }
10009 }
10010 }
10011 }
10012
10013 return TRUE;
10014}
10015
3c9458e9
NC		 10016/* Treat mapping symbols as special target symbols. */
10017
10018static bfd_boolean
10019elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
10020{
b0796911
PB		 10021 return bfd_is_arm_special_symbol_name (sym->name,
10022 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 10023}
10024
0367ecfb
NC		 10025/* This is a copy of elf_find_function() from elf.c except that
10026 ARM mapping symbols are ignored when looking for function names
10027 and STT_ARM_TFUNC is considered to a function type. */
252b5132 10028
0367ecfb
NC		 10029static bfd_boolean
10030arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
10031 asection * section,
10032 asymbol ** symbols,
10033 bfd_vma offset,
10034 const char ** filename_ptr,
10035 const char ** functionname_ptr)
10036{
10037 const char * filename = NULL;
10038 asymbol * func = NULL;
10039 bfd_vma low_func = 0;
10040 asymbol ** p;
252b5132
RH		 10041
10042 for (p = symbols; *p != NULL; p++)
10043 {
10044 elf_symbol_type *q;
10045
10046 q = (elf_symbol_type *) *p;
10047
252b5132
RH		 10048 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
10049 {
10050 default:
10051 break;
10052 case STT_FILE:
10053 filename = bfd_asymbol_name (&q->symbol);
10054 break;
252b5132
RH		 10055 case STT_FUNC:
10056 case STT_ARM_TFUNC:
9d2da7ca 10057 case STT_NOTYPE:
b0796911 10058 /* Skip mapping symbols. */
0367ecfb 10059 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 10060 && bfd_is_arm_special_symbol_name (q->symbol.name,
10061 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 10062 continue;
10063 /* Fall through. */
6b40fcba 10064 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 10065 && q->symbol.value >= low_func
10066 && q->symbol.value <= offset)
10067 {
10068 func = (asymbol *) q;
10069 low_func = q->symbol.value;
10070 }
10071 break;
10072 }
10073 }
10074
10075 if (func == NULL)
b34976b6 10076 return FALSE;
252b5132 10077
0367ecfb
NC		 10078 if (filename_ptr)
10079 *filename_ptr = filename;
10080 if (functionname_ptr)
10081 *functionname_ptr = bfd_asymbol_name (func);
10082
10083 return TRUE;
906e58ca 10084}
0367ecfb
NC		 10085
10086
10087/* Find the nearest line to a particular section and offset, for error
10088 reporting. This code is a duplicate of the code in elf.c, except
10089 that it uses arm_elf_find_function. */
10090
10091static bfd_boolean
10092elf32_arm_find_nearest_line (bfd * abfd,
10093 asection * section,
10094 asymbol ** symbols,
10095 bfd_vma offset,
10096 const char ** filename_ptr,
10097 const char ** functionname_ptr,
10098 unsigned int * line_ptr)
10099{
10100 bfd_boolean found = FALSE;
10101
10102 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
10103
10104 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
10105 filename_ptr, functionname_ptr,
10106 line_ptr, 0,
10107 & elf_tdata (abfd)->dwarf2_find_line_info))
10108 {
10109 if (!*functionname_ptr)
10110 arm_elf_find_function (abfd, section, symbols, offset,
10111 *filename_ptr ? NULL : filename_ptr,
10112 functionname_ptr);
f21f3fe0 10113
0367ecfb
NC		 10114 return TRUE;
10115 }
10116
10117 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
10118 & found, filename_ptr,
10119 functionname_ptr, line_ptr,
10120 & elf_tdata (abfd)->line_info))
10121 return FALSE;
10122
10123 if (found && (*functionname_ptr || *line_ptr))
10124 return TRUE;
10125
10126 if (symbols == NULL)
10127 return FALSE;
10128
10129 if (! arm_elf_find_function (abfd, section, symbols, offset,
10130 filename_ptr, functionname_ptr))
10131 return FALSE;
10132
10133 *line_ptr = 0;
b34976b6 10134 return TRUE;
252b5132
RH		 10135}
10136
4ab527b0
FF		 10137static bfd_boolean
10138elf32_arm_find_inliner_info (bfd * abfd,
10139 const char ** filename_ptr,
10140 const char ** functionname_ptr,
10141 unsigned int * line_ptr)
10142{
10143 bfd_boolean found;
10144 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
10145 functionname_ptr, line_ptr,
10146 & elf_tdata (abfd)->dwarf2_find_line_info);
10147 return found;
10148}
10149
252b5132
RH		 10150/* Adjust a symbol defined by a dynamic object and referenced by a
10151 regular object. The current definition is in some section of the
10152 dynamic object, but we're not including those sections. We have to
10153 change the definition to something the rest of the link can
10154 understand. */
10155
b34976b6 10156static bfd_boolean
57e8b36a
NC		 10157elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
10158 struct elf_link_hash_entry * h)
252b5132
RH		 10159{
10160 bfd * dynobj;
10161 asection * s;
b7693d02 10162 struct elf32_arm_link_hash_entry * eh;
67687978 10163 struct elf32_arm_link_hash_table *globals;
252b5132 10164
67687978 10165 globals = elf32_arm_hash_table (info);
252b5132
RH		 10166 dynobj = elf_hash_table (info)->dynobj;
10167
10168 /* Make sure we know what is going on here. */
10169 BFD_ASSERT (dynobj != NULL
f5385ebf 10170 && (h->needs_plt
f6e332e6 10171 || h->u.weakdef != NULL
f5385ebf
AM		 10172 || (h->def_dynamic
10173 && h->ref_regular
10174 && !h->def_regular)));
252b5132 10175
b7693d02
DJ		 10176 eh = (struct elf32_arm_link_hash_entry *) h;
10177
252b5132
RH		 10178 /* If this is a function, put it in the procedure linkage table. We
10179 will fill in the contents of the procedure linkage table later,
10180 when we know the address of the .got section. */
0f88be7a 10181 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 10182 || h->needs_plt)
252b5132 10183 {
5e681ec4
PB		 10184 if (h->plt.refcount <= 0
10185 || SYMBOL_CALLS_LOCAL (info, h)
10186 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
10187 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 10188 {
10189 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 10190 file, but the symbol was never referred to by a dynamic
10191 object, or if all references were garbage collected. In
10192 such a case, we don't actually need to build a procedure
10193 linkage table, and we can just do a PC24 reloc instead. */
10194 h->plt.offset = (bfd_vma) -1;
b7693d02 10195 eh->plt_thumb_refcount = 0;
bd97cb95 10196 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 10197 h->needs_plt = 0;
252b5132
RH		 10198 }
10199
b34976b6 10200 return TRUE;
252b5132 10201 }
5e681ec4 10202 else
b7693d02
DJ		 10203 {
10204 /* It's possible that we incorrectly decided a .plt reloc was
10205 needed for an R_ARM_PC24 or similar reloc to a non-function sym
10206 in check_relocs. We can't decide accurately between function
10207 and non-function syms in check-relocs; Objects loaded later in
10208 the link may change h->type. So fix it now. */
10209 h->plt.offset = (bfd_vma) -1;
10210 eh->plt_thumb_refcount = 0;
bd97cb95 10211 eh->plt_maybe_thumb_refcount = 0;
b7693d02 10212 }
252b5132
RH		 10213
10214 /* If this is a weak symbol, and there is a real definition, the
10215 processor independent code will have arranged for us to see the
10216 real definition first, and we can just use the same value. */
f6e332e6 10217 if (h->u.weakdef != NULL)
252b5132 10218 {
f6e332e6
AM		 10219 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
10220 || h->u.weakdef->root.type == bfd_link_hash_defweak);
10221 h->root.u.def.section = h->u.weakdef->root.u.def.section;
10222 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 10223 return TRUE;
252b5132
RH		 10224 }
10225
ba93b8ac
DJ		 10226 /* If there are no non-GOT references, we do not need a copy
10227 relocation. */
10228 if (!h->non_got_ref)
10229 return TRUE;
10230
252b5132
RH		 10231 /* This is a reference to a symbol defined by a dynamic object which
10232 is not a function. */
10233
10234 /* If we are creating a shared library, we must presume that the
10235 only references to the symbol are via the global offset table.
10236 For such cases we need not do anything here; the relocations will
67687978
PB		 10237 be handled correctly by relocate_section. Relocatable executables
10238 can reference data in shared objects directly, so we don't need to
10239 do anything here. */
10240 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 10241 return TRUE;
252b5132 10242
909272ee
AM		 10243 if (h->size == 0)
10244 {
10245 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
10246 h->root.root.string);
10247 return TRUE;
10248 }
10249
252b5132
RH		 10250 /* We must allocate the symbol in our .dynbss section, which will
10251 become part of the .bss section of the executable. There will be
10252 an entry for this symbol in the .dynsym section. The dynamic
10253 object will contain position independent code, so all references
10254 from the dynamic object to this symbol will go through the global
10255 offset table. The dynamic linker will use the .dynsym entry to
10256 determine the address it must put in the global offset table, so
10257 both the dynamic object and the regular object will refer to the
10258 same memory location for the variable. */
252b5132
RH		 10259 s = bfd_get_section_by_name (dynobj, ".dynbss");
10260 BFD_ASSERT (s != NULL);
10261
10262 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
10263 copy the initial value out of the dynamic object and into the
10264 runtime process image. We need to remember the offset into the
00a97672 10265 .rel(a).bss section we are going to use. */
252b5132
RH		 10266 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
10267 {
10268 asection *srel;
10269
00a97672 10270 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 10271 BFD_ASSERT (srel != NULL);
00a97672 10272 srel->size += RELOC_SIZE (globals);
f5385ebf 10273 h->needs_copy = 1;
252b5132
RH		 10274 }
10275
027297b7 10276 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 10277}
10278
5e681ec4
PB		 10279/* Allocate space in .plt, .got and associated reloc sections for
10280 dynamic relocs. */
10281
10282static bfd_boolean
57e8b36a 10283allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 10284{
10285 struct bfd_link_info *info;
10286 struct elf32_arm_link_hash_table *htab;
10287 struct elf32_arm_link_hash_entry *eh;
10288 struct elf32_arm_relocs_copied *p;
bd97cb95 10289 bfd_signed_vma thumb_refs;
5e681ec4 10290
b7693d02
DJ		 10291 eh = (struct elf32_arm_link_hash_entry *) h;
10292
5e681ec4
PB		 10293 if (h->root.type == bfd_link_hash_indirect)
10294 return TRUE;
10295
10296 if (h->root.type == bfd_link_hash_warning)
10297 /* When warning symbols are created, they **replace** the "real"
10298 entry in the hash table, thus we never get to see the real
10299 symbol in a hash traversal. So look at it now. */
10300 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10301
10302 info = (struct bfd_link_info *) inf;
10303 htab = elf32_arm_hash_table (info);
10304
10305 if (htab->root.dynamic_sections_created
10306 && h->plt.refcount > 0)
10307 {
10308 /* Make sure this symbol is output as a dynamic symbol.
10309 Undefined weak syms won't yet be marked as dynamic. */
10310 if (h->dynindx == -1
f5385ebf 10311 && !h->forced_local)
5e681ec4 10312 {
c152c796 10313 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 10314 return FALSE;
10315 }
10316
10317 if (info->shared
7359ea65 10318 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 10319 {
10320 asection *s = htab->splt;
10321
10322 /* If this is the first .plt entry, make room for the special
10323 first entry. */
eea6121a 10324 if (s->size == 0)
e5a52504 10325 s->size += htab->plt_header_size;
5e681ec4 10326
eea6121a 10327 h->plt.offset = s->size;
5e681ec4 10328
b7693d02
DJ		 10329 /* If we will insert a Thumb trampoline before this PLT, leave room
10330 for it. */
bd97cb95
DJ		 10331 thumb_refs = eh->plt_thumb_refcount;
10332 if (!htab->use_blx)
10333 thumb_refs += eh->plt_maybe_thumb_refcount;
10334
10335 if (thumb_refs > 0)
b7693d02
DJ		 10336 {
10337 h->plt.offset += PLT_THUMB_STUB_SIZE;
10338 s->size += PLT_THUMB_STUB_SIZE;
10339 }
10340
5e681ec4
PB		 10341 /* If this symbol is not defined in a regular file, and we are
10342 not generating a shared library, then set the symbol to this
10343 location in the .plt. This is required to make function
10344 pointers compare as equal between the normal executable and
10345 the shared library. */
10346 if (! info->shared
f5385ebf 10347 && !h->def_regular)
5e681ec4
PB		 10348 {
10349 h->root.u.def.section = s;
10350 h->root.u.def.value = h->plt.offset;
b7693d02
DJ		 10351
10352 /* Make sure the function is not marked as Thumb, in case
10353 it is the target of an ABS32 relocation, which will
10354 point to the PLT entry. */
10355 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
10356 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
5e681ec4
PB		 10357 }
10358
10359 /* Make room for this entry. */
e5a52504 10360 s->size += htab->plt_entry_size;
5e681ec4 10361
e5a52504 10362 if (!htab->symbian_p)
b7693d02
DJ		 10363 {
10364 /* We also need to make an entry in the .got.plt section, which
10365 will be placed in the .got section by the linker script. */
10366 eh->plt_got_offset = htab->sgotplt->size;
10367 htab->sgotplt->size += 4;
10368 }
5e681ec4 10369
00a97672
RS		 10370 /* We also need to make an entry in the .rel(a).plt section. */
10371 htab->srelplt->size += RELOC_SIZE (htab);
10372
10373 /* VxWorks executables have a second set of relocations for
10374 each PLT entry. They go in a separate relocation section,
10375 which is processed by the kernel loader. */
10376 if (htab->vxworks_p && !info->shared)
10377 {
10378 /* There is a relocation for the initial PLT entry:
10379 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
10380 if (h->plt.offset == htab->plt_header_size)
10381 htab->srelplt2->size += RELOC_SIZE (htab);
10382
10383 /* There are two extra relocations for each subsequent
10384 PLT entry: an R_ARM_32 relocation for the GOT entry,
10385 and an R_ARM_32 relocation for the PLT entry. */
10386 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
10387 }
5e681ec4
PB		 10388 }
10389 else
10390 {
10391 h->plt.offset = (bfd_vma) -1;
f5385ebf 10392 h->needs_plt = 0;
5e681ec4
PB		 10393 }
10394 }
10395 else
10396 {
10397 h->plt.offset = (bfd_vma) -1;
f5385ebf 10398 h->needs_plt = 0;
5e681ec4
PB		 10399 }
10400
10401 if (h->got.refcount > 0)
10402 {
10403 asection *s;
10404 bfd_boolean dyn;
ba93b8ac
DJ		 10405 int tls_type = elf32_arm_hash_entry (h)->tls_type;
10406 int indx;
5e681ec4
PB		 10407
10408 /* Make sure this symbol is output as a dynamic symbol.
10409 Undefined weak syms won't yet be marked as dynamic. */
10410 if (h->dynindx == -1
f5385ebf 10411 && !h->forced_local)
5e681ec4 10412 {
c152c796 10413 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 10414 return FALSE;
10415 }
10416
e5a52504
MM		 10417 if (!htab->symbian_p)
10418 {
10419 s = htab->sgot;
10420 h->got.offset = s->size;
ba93b8ac
DJ		 10421
10422 if (tls_type == GOT_UNKNOWN)
10423 abort ();
10424
10425 if (tls_type == GOT_NORMAL)
10426 /* Non-TLS symbols need one GOT slot. */
10427 s->size += 4;
10428 else
10429 {
10430 if (tls_type & GOT_TLS_GD)
10431 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
10432 s->size += 8;
10433 if (tls_type & GOT_TLS_IE)
10434 /* R_ARM_TLS_IE32 needs one GOT slot. */
10435 s->size += 4;
10436 }
10437
e5a52504 10438 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 10439
10440 indx = 0;
10441 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
10442 && (!info->shared
10443 || !SYMBOL_REFERENCES_LOCAL (info, h)))
10444 indx = h->dynindx;
10445
10446 if (tls_type != GOT_NORMAL
10447 && (info->shared || indx != 0)
10448 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10449 || h->root.type != bfd_link_hash_undefweak))
10450 {
10451 if (tls_type & GOT_TLS_IE)
00a97672 10452 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 10453
10454 if (tls_type & GOT_TLS_GD)
00a97672 10455 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 10456
10457 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 10458 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 10459 }
10460 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10461 || h->root.type != bfd_link_hash_undefweak)
10462 && (info->shared
10463 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 10464 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 10465 }
5e681ec4
PB		 10466 }
10467 else
10468 h->got.offset = (bfd_vma) -1;
10469
a4fd1a8e
PB		 10470 /* Allocate stubs for exported Thumb functions on v4t. */
10471 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 10472 && h->def_regular
a4fd1a8e
PB		 10473 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
10474 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
10475 {
10476 struct elf_link_hash_entry * th;
10477 struct bfd_link_hash_entry * bh;
10478 struct elf_link_hash_entry * myh;
10479 char name[1024];
10480 asection *s;
10481 bh = NULL;
10482 /* Create a new symbol to regist the real location of the function. */
10483 s = h->root.u.def.section;
906e58ca 10484 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 10485 _bfd_generic_link_add_one_symbol (info, s->owner,
10486 name, BSF_GLOBAL, s,
10487 h->root.u.def.value,
10488 NULL, TRUE, FALSE, &bh);
10489
10490 myh = (struct elf_link_hash_entry *) bh;
10491 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
10492 myh->forced_local = 1;
10493 eh->export_glue = myh;
10494 th = record_arm_to_thumb_glue (info, h);
10495 /* Point the symbol at the stub. */
10496 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
10497 h->root.u.def.section = th->root.u.def.section;
10498 h->root.u.def.value = th->root.u.def.value & ~1;
10499 }
10500
5e681ec4
PB		 10501 if (eh->relocs_copied == NULL)
10502 return TRUE;
10503
10504 /* In the shared -Bsymbolic case, discard space allocated for
10505 dynamic pc-relative relocs against symbols which turn out to be
10506 defined in regular objects. For the normal shared case, discard
10507 space for pc-relative relocs that have become local due to symbol
10508 visibility changes. */
10509
67687978 10510 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 10511 {
7bdca076 10512 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 10513 R_ARM_REL32_NOI, which will appear on something like
10514 ".long foo - .". We want calls to protected symbols to resolve
10515 directly to the function rather than going via the plt. If people
10516 want function pointer comparisons to work as expected then they
10517 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 10518 if (SYMBOL_CALLS_LOCAL (info, h))
10519 {
10520 struct elf32_arm_relocs_copied **pp;
10521
10522 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
10523 {
10524 p->count -= p->pc_count;
10525 p->pc_count = 0;
10526 if (p->count == 0)
10527 *pp = p->next;
10528 else
10529 pp = &p->next;
10530 }
10531 }
10532
3348747a
NS		 10533 if (elf32_arm_hash_table (info)->vxworks_p)
10534 {
10535 struct elf32_arm_relocs_copied **pp;
10536
10537 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
10538 {
10539 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
10540 *pp = p->next;
10541 else
10542 pp = &p->next;
10543 }
10544 }
10545
ba93b8ac 10546 /* Also discard relocs on undefined weak syms with non-default
7359ea65 10547 visibility. */
22d606e9 10548 if (eh->relocs_copied != NULL
5e681ec4 10549 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 10550 {
10551 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
10552 eh->relocs_copied = NULL;
10553
10554 /* Make sure undefined weak symbols are output as a dynamic
10555 symbol in PIEs. */
10556 else if (h->dynindx == -1
10557 && !h->forced_local)
10558 {
10559 if (! bfd_elf_link_record_dynamic_symbol (info, h))
10560 return FALSE;
10561 }
10562 }
10563
67687978
PB		 10564 else if (htab->root.is_relocatable_executable && h->dynindx == -1
10565 && h->root.type == bfd_link_hash_new)
10566 {
10567 /* Output absolute symbols so that we can create relocations
10568 against them. For normal symbols we output a relocation
10569 against the section that contains them. */
10570 if (! bfd_elf_link_record_dynamic_symbol (info, h))
10571 return FALSE;
10572 }
10573
5e681ec4
PB		 10574 }
10575 else
10576 {
10577 /* For the non-shared case, discard space for relocs against
10578 symbols which turn out to need copy relocs or are not
10579 dynamic. */
10580
f5385ebf
AM		 10581 if (!h->non_got_ref
10582 && ((h->def_dynamic
10583 && !h->def_regular)
5e681ec4
PB		 10584 || (htab->root.dynamic_sections_created
10585 && (h->root.type == bfd_link_hash_undefweak
10586 || h->root.type == bfd_link_hash_undefined))))
10587 {
10588 /* Make sure this symbol is output as a dynamic symbol.
10589 Undefined weak syms won't yet be marked as dynamic. */
10590 if (h->dynindx == -1
f5385ebf 10591 && !h->forced_local)
5e681ec4 10592 {
c152c796 10593 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 10594 return FALSE;
10595 }
10596
10597 /* If that succeeded, we know we'll be keeping all the
10598 relocs. */
10599 if (h->dynindx != -1)
10600 goto keep;
10601 }
10602
10603 eh->relocs_copied = NULL;
10604
10605 keep: ;
10606 }
10607
10608 /* Finally, allocate space. */
10609 for (p = eh->relocs_copied; p != NULL; p = p->next)
10610 {
10611 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 10612 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 10613 }
10614
10615 return TRUE;
10616}
10617
08d1f311
DJ		 10618/* Find any dynamic relocs that apply to read-only sections. */
10619
10620static bfd_boolean
8029a119 10621elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 10622{
8029a119
NC		 10623 struct elf32_arm_link_hash_entry * eh;
10624 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 10625
10626 if (h->root.type == bfd_link_hash_warning)
10627 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10628
10629 eh = (struct elf32_arm_link_hash_entry *) h;
10630 for (p = eh->relocs_copied; p != NULL; p = p->next)
10631 {
10632 asection *s = p->section;
10633
10634 if (s != NULL && (s->flags & SEC_READONLY) != 0)
10635 {
10636 struct bfd_link_info *info = (struct bfd_link_info *) inf;
10637
10638 info->flags |= DF_TEXTREL;
10639
10640 /* Not an error, just cut short the traversal. */
10641 return FALSE;
10642 }
10643 }
10644 return TRUE;
10645}
10646
d504ffc8
DJ		 10647void
10648bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
10649 int byteswap_code)
10650{
10651 struct elf32_arm_link_hash_table *globals;
10652
10653 globals = elf32_arm_hash_table (info);
10654 globals->byteswap_code = byteswap_code;
10655}
10656
252b5132
RH		 10657/* Set the sizes of the dynamic sections. */
10658
b34976b6 10659static bfd_boolean
57e8b36a
NC		 10660elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
10661 struct bfd_link_info * info)
252b5132
RH		 10662{
10663 bfd * dynobj;
10664 asection * s;
b34976b6
AM		 10665 bfd_boolean plt;
10666 bfd_boolean relocs;
5e681ec4
PB		 10667 bfd *ibfd;
10668 struct elf32_arm_link_hash_table *htab;
252b5132 10669
5e681ec4 10670 htab = elf32_arm_hash_table (info);
252b5132
RH		 10671 dynobj = elf_hash_table (info)->dynobj;
10672 BFD_ASSERT (dynobj != NULL);
39b41c9c 10673 check_use_blx (htab);
252b5132
RH		 10674
10675 if (elf_hash_table (info)->dynamic_sections_created)
10676 {
10677 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 10678 if (info->executable)
252b5132
RH		 10679 {
10680 s = bfd_get_section_by_name (dynobj, ".interp");
10681 BFD_ASSERT (s != NULL);
eea6121a 10682 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 10683 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
10684 }
10685 }
5e681ec4
PB		 10686
10687 /* Set up .got offsets for local syms, and space for local dynamic
10688 relocs. */
10689 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 10690 {
5e681ec4
PB		 10691 bfd_signed_vma *local_got;
10692 bfd_signed_vma *end_local_got;
10693 char *local_tls_type;
10694 bfd_size_type locsymcount;
10695 Elf_Internal_Shdr *symtab_hdr;
10696 asection *srel;
3348747a 10697 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 10698
0ffa91dd 10699 if (! is_arm_elf (ibfd))
5e681ec4
PB		 10700 continue;
10701
10702 for (s = ibfd->sections; s != NULL; s = s->next)
10703 {
10704 struct elf32_arm_relocs_copied *p;
10705
6edfbbad 10706 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 10707 {
10708 if (!bfd_is_abs_section (p->section)
10709 && bfd_is_abs_section (p->section->output_section))
10710 {
10711 /* Input section has been discarded, either because
10712 it is a copy of a linkonce section or due to
10713 linker script /DISCARD/, so we'll be discarding
10714 the relocs too. */
10715 }
3348747a
NS		 10716 else if (is_vxworks
10717 && strcmp (p->section->output_section->name,
10718 ".tls_vars") == 0)
10719 {
10720 /* Relocations in vxworks .tls_vars sections are
10721 handled specially by the loader. */
10722 }
5e681ec4
PB		 10723 else if (p->count != 0)
10724 {
10725 srel = elf_section_data (p->section)->sreloc;
00a97672 10726 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 10727 if ((p->section->output_section->flags & SEC_READONLY) != 0)
10728 info->flags |= DF_TEXTREL;
10729 }
10730 }
10731 }
10732
10733 local_got = elf_local_got_refcounts (ibfd);
10734 if (!local_got)
10735 continue;
10736
0ffa91dd 10737 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 10738 locsymcount = symtab_hdr->sh_info;
10739 end_local_got = local_got + locsymcount;
ba93b8ac 10740 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 10741 s = htab->sgot;
10742 srel = htab->srelgot;
10743 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
10744 {
10745 if (*local_got > 0)
10746 {
eea6121a 10747 *local_got = s->size;
ba93b8ac
DJ		 10748 if (*local_tls_type & GOT_TLS_GD)
10749 /* TLS_GD relocs need an 8-byte structure in the GOT. */
10750 s->size += 8;
10751 if (*local_tls_type & GOT_TLS_IE)
10752 s->size += 4;
10753 if (*local_tls_type == GOT_NORMAL)
10754 s->size += 4;
10755
10756 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 10757 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 10758 }
10759 else
10760 *local_got = (bfd_vma) -1;
10761 }
252b5132
RH		 10762 }
10763
ba93b8ac
DJ		 10764 if (htab->tls_ldm_got.refcount > 0)
10765 {
10766 /* Allocate two GOT entries and one dynamic relocation (if necessary)
10767 for R_ARM_TLS_LDM32 relocations. */
10768 htab->tls_ldm_got.offset = htab->sgot->size;
10769 htab->sgot->size += 8;
10770 if (info->shared)
00a97672 10771 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 10772 }
10773 else
10774 htab->tls_ldm_got.offset = -1;
10775
5e681ec4
PB		 10776 /* Allocate global sym .plt and .got entries, and space for global
10777 sym dynamic relocs. */
57e8b36a 10778 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 10779
d504ffc8
DJ		 10780 /* Here we rummage through the found bfds to collect glue information. */
10781 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 10782 {
0ffa91dd 10783 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 10784 continue;
10785
c7b8f16e
JB		 10786 /* Initialise mapping tables for code/data. */
10787 bfd_elf32_arm_init_maps (ibfd);
906e58ca 10788
c7b8f16e
JB		 10789 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
10790 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
10791 /* xgettext:c-format */
10792 _bfd_error_handler (_("Errors encountered processing file %s"),
10793 ibfd->filename);
10794 }
d504ffc8 10795
3e6b1042
DJ		 10796 /* Allocate space for the glue sections now that we've sized them. */
10797 bfd_elf32_arm_allocate_interworking_sections (info);
10798
252b5132
RH		 10799 /* The check_relocs and adjust_dynamic_symbol entry points have
10800 determined the sizes of the various dynamic sections. Allocate
10801 memory for them. */
b34976b6
AM		 10802 plt = FALSE;
10803 relocs = FALSE;
252b5132
RH		 10804 for (s = dynobj->sections; s != NULL; s = s->next)
10805 {
10806 const char * name;
252b5132
RH		 10807
10808 if ((s->flags & SEC_LINKER_CREATED) == 0)
10809 continue;
10810
10811 /* It's OK to base decisions on the section name, because none
10812 of the dynobj section names depend upon the input files. */
10813 name = bfd_get_section_name (dynobj, s);
10814
24a1ba0f 10815 if (strcmp (name, ".plt") == 0)
252b5132 10816 {
c456f082
AM		 10817 /* Remember whether there is a PLT. */
10818 plt = s->size != 0;
252b5132 10819 }
0112cd26 10820 else if (CONST_STRNEQ (name, ".rel"))
252b5132 10821 {
c456f082 10822 if (s->size != 0)
252b5132 10823 {
252b5132 10824 /* Remember whether there are any reloc sections other
00a97672
RS		 10825 than .rel(a).plt and .rela.plt.unloaded. */
10826 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 10827 relocs = TRUE;
252b5132
RH		 10828
10829 /* We use the reloc_count field as a counter if we need
10830 to copy relocs into the output file. */
10831 s->reloc_count = 0;
10832 }
10833 }
0112cd26 10834 else if (! CONST_STRNEQ (name, ".got")
c456f082 10835 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 10836 {
10837 /* It's not one of our sections, so don't allocate space. */
10838 continue;
10839 }
10840
c456f082 10841 if (s->size == 0)
252b5132 10842 {
c456f082 10843 /* If we don't need this section, strip it from the
00a97672
RS		 10844 output file. This is mostly to handle .rel(a).bss and
10845 .rel(a).plt. We must create both sections in
c456f082
AM		 10846 create_dynamic_sections, because they must be created
10847 before the linker maps input sections to output
10848 sections. The linker does that before
10849 adjust_dynamic_symbol is called, and it is that
10850 function which decides whether anything needs to go
10851 into these sections. */
8423293d 10852 s->flags |= SEC_EXCLUDE;
252b5132
RH		 10853 continue;
10854 }
10855
c456f082
AM		 10856 if ((s->flags & SEC_HAS_CONTENTS) == 0)
10857 continue;
10858
252b5132 10859 /* Allocate memory for the section contents. */
906e58ca 10860 s->contents = bfd_zalloc (dynobj, s->size);
c456f082 10861 if (s->contents == NULL)
b34976b6 10862 return FALSE;
252b5132
RH		 10863 }
10864
10865 if (elf_hash_table (info)->dynamic_sections_created)
10866 {
10867 /* Add some entries to the .dynamic section. We fill in the
10868 values later, in elf32_arm_finish_dynamic_sections, but we
10869 must add the entries now so that we get the correct size for
10870 the .dynamic section. The DT_DEBUG entry is filled in by the
10871 dynamic linker and used by the debugger. */
dc810e39 10872#define add_dynamic_entry(TAG, VAL) \
5a580b3a 10873 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 10874
8532796c 10875 if (info->executable)
252b5132 10876 {
dc810e39 10877 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 10878 return FALSE;
252b5132
RH		 10879 }
10880
10881 if (plt)
10882 {
dc810e39
AM		 10883 if ( !add_dynamic_entry (DT_PLTGOT, 0)
10884 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 10885 || !add_dynamic_entry (DT_PLTREL,
10886 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 10887 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 10888 return FALSE;
252b5132
RH		 10889 }
10890
10891 if (relocs)
10892 {
00a97672
RS		 10893 if (htab->use_rel)
10894 {
10895 if (!add_dynamic_entry (DT_REL, 0)
10896 || !add_dynamic_entry (DT_RELSZ, 0)
10897 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
10898 return FALSE;
10899 }
10900 else
10901 {
10902 if (!add_dynamic_entry (DT_RELA, 0)
10903 || !add_dynamic_entry (DT_RELASZ, 0)
10904 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
10905 return FALSE;
10906 }
252b5132
RH		 10907 }
10908
08d1f311
DJ		 10909 /* If any dynamic relocs apply to a read-only section,
10910 then we need a DT_TEXTREL entry. */
10911 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 10912 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
10913 info);
08d1f311 10914
99e4ae17 10915 if ((info->flags & DF_TEXTREL) != 0)
252b5132 10916 {
dc810e39 10917 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 10918 return FALSE;
252b5132 10919 }
7a2b07ff
NS		 10920 if (htab->vxworks_p
10921 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
10922 return FALSE;
252b5132 10923 }
8532796c 10924#undef add_dynamic_entry
252b5132 10925
b34976b6 10926 return TRUE;
252b5132
RH		 10927}
10928
252b5132
RH		 10929/* Finish up dynamic symbol handling. We set the contents of various
10930 dynamic sections here. */
10931
b34976b6 10932static bfd_boolean
906e58ca
NC		 10933elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
10934 struct bfd_link_info * info,
10935 struct elf_link_hash_entry * h,
10936 Elf_Internal_Sym * sym)
252b5132
RH		 10937{
10938 bfd * dynobj;
e5a52504 10939 struct elf32_arm_link_hash_table *htab;
b7693d02 10940 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 10941
10942 dynobj = elf_hash_table (info)->dynobj;
e5a52504 10943 htab = elf32_arm_hash_table (info);
b7693d02 10944 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 10945
10946 if (h->plt.offset != (bfd_vma) -1)
10947 {
10948 asection * splt;
252b5132 10949 asection * srel;
e5a52504 10950 bfd_byte *loc;
24a1ba0f 10951 bfd_vma plt_index;
947216bf 10952 Elf_Internal_Rela rel;
252b5132
RH		 10953
10954 /* This symbol has an entry in the procedure linkage table. Set
10955 it up. */
10956
10957 BFD_ASSERT (h->dynindx != -1);
10958
10959 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 10960 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 10961 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 10962
e5a52504
MM		 10963 /* Fill in the entry in the procedure linkage table. */
10964 if (htab->symbian_p)
10965 {
906e58ca 10966 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 10967 elf32_arm_symbian_plt_entry[0],
10968 splt->contents + h->plt.offset);
906e58ca 10969 bfd_put_32 (output_bfd,
52ab56c2
PB		 10970 elf32_arm_symbian_plt_entry[1],
10971 splt->contents + h->plt.offset + 4);
906e58ca 10972
e5a52504 10973 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 10974 rel.r_offset = (splt->output_section->vma
10975 + splt->output_offset
52ab56c2 10976 + h->plt.offset + 4);
e5a52504 10977 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 10978
10979 /* Get the index in the procedure linkage table which
10980 corresponds to this symbol. This is the index of this symbol
10981 in all the symbols for which we are making plt entries. The
10982 first entry in the procedure linkage table is reserved. */
906e58ca 10983 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 10984 / htab->plt_entry_size);
e5a52504
MM		 10985 }
10986 else
10987 {
00a97672 10988 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 10989 bfd_vma got_displacement;
10990 asection * sgot;
52ab56c2 10991 bfd_byte * ptr;
906e58ca 10992
e5a52504
MM		 10993 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
10994 BFD_ASSERT (sgot != NULL);
10995
b7693d02
DJ		 10996 /* Get the offset into the .got.plt table of the entry that
10997 corresponds to this function. */
10998 got_offset = eh->plt_got_offset;
10999
11000 /* Get the index in the procedure linkage table which
11001 corresponds to this symbol. This is the index of this symbol
11002 in all the symbols for which we are making plt entries. The
11003 first three entries in .got.plt are reserved; after that
11004 symbols appear in the same order as in .plt. */
11005 plt_index = (got_offset - 12) / 4;
e5a52504 11006
00a97672
RS		 11007 /* Calculate the address of the GOT entry. */
11008 got_address = (sgot->output_section->vma
11009 + sgot->output_offset
11010 + got_offset);
5e681ec4 11011
00a97672
RS		 11012 /* ...and the address of the PLT entry. */
11013 plt_address = (splt->output_section->vma
11014 + splt->output_offset
11015 + h->plt.offset);
5e681ec4 11016
52ab56c2 11017 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 11018 if (htab->vxworks_p && info->shared)
11019 {
11020 unsigned int i;
11021 bfd_vma val;
11022
52ab56c2 11023 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 11024 {
11025 val = elf32_arm_vxworks_shared_plt_entry[i];
11026 if (i == 2)
11027 val |= got_address - sgot->output_section->vma;
11028 if (i == 5)
11029 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 11030 if (i == 2 || i == 5)
11031 bfd_put_32 (output_bfd, val, ptr);
11032 else
11033 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 11034 }
11035 }
11036 else if (htab->vxworks_p)
b7693d02 11037 {
00a97672
RS		 11038 unsigned int i;
11039 bfd_vma val;
11040
d3753b85 11041 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 11042 {
11043 val = elf32_arm_vxworks_exec_plt_entry[i];
11044 if (i == 2)
11045 val |= got_address;
11046 if (i == 4)
11047 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
11048 if (i == 5)
11049 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 11050 if (i == 2 || i == 5)
11051 bfd_put_32 (output_bfd, val, ptr);
11052 else
11053 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 11054 }
11055
11056 loc = (htab->srelplt2->contents
11057 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
11058
11059 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
11060 referencing the GOT for this PLT entry. */
11061 rel.r_offset = plt_address + 8;
11062 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
11063 rel.r_addend = got_offset;
11064 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
11065 loc += RELOC_SIZE (htab);
11066
11067 /* Create the R_ARM_ABS32 relocation referencing the
11068 beginning of the PLT for this GOT entry. */
11069 rel.r_offset = got_address;
11070 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
11071 rel.r_addend = 0;
11072 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 11073 }
00a97672
RS		 11074 else
11075 {
bd97cb95 11076 bfd_signed_vma thumb_refs;
00a97672
RS		 11077 /* Calculate the displacement between the PLT slot and the
11078 entry in the GOT. The eight-byte offset accounts for the
11079 value produced by adding to pc in the first instruction
11080 of the PLT stub. */
11081 got_displacement = got_address - (plt_address + 8);
b7693d02 11082
00a97672
RS		 11083 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
11084
bd97cb95
DJ		 11085 thumb_refs = eh->plt_thumb_refcount;
11086 if (!htab->use_blx)
11087 thumb_refs += eh->plt_maybe_thumb_refcount;
11088
11089 if (thumb_refs > 0)
00a97672 11090 {
52ab56c2
PB		 11091 put_thumb_insn (htab, output_bfd,
11092 elf32_arm_plt_thumb_stub[0], ptr - 4);
11093 put_thumb_insn (htab, output_bfd,
11094 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 11095 }
11096
52ab56c2
PB		 11097 put_arm_insn (htab, output_bfd,
11098 elf32_arm_plt_entry[0]
11099 | ((got_displacement & 0x0ff00000) >> 20),
11100 ptr + 0);
11101 put_arm_insn (htab, output_bfd,
11102 elf32_arm_plt_entry[1]
11103 | ((got_displacement & 0x000ff000) >> 12),
11104 ptr+ 4);
11105 put_arm_insn (htab, output_bfd,
11106 elf32_arm_plt_entry[2]
11107 | (got_displacement & 0x00000fff),
11108 ptr + 8);
5e681ec4 11109#ifdef FOUR_WORD_PLT
52ab56c2 11110 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 11111#endif
00a97672 11112 }
252b5132 11113
e5a52504
MM		 11114 /* Fill in the entry in the global offset table. */
11115 bfd_put_32 (output_bfd,
11116 (splt->output_section->vma
11117 + splt->output_offset),
11118 sgot->contents + got_offset);
906e58ca 11119
00a97672
RS		 11120 /* Fill in the entry in the .rel(a).plt section. */
11121 rel.r_addend = 0;
11122 rel.r_offset = got_address;
e5a52504
MM		 11123 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
11124 }
57e8b36a 11125
00a97672
RS		 11126 loc = srel->contents + plt_index * RELOC_SIZE (htab);
11127 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 11128
f5385ebf 11129 if (!h->def_regular)
252b5132
RH		 11130 {
11131 /* Mark the symbol as undefined, rather than as defined in
11132 the .plt section. Leave the value alone. */
11133 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 11134 /* If the symbol is weak, we do need to clear the value.
11135 Otherwise, the PLT entry would provide a definition for
11136 the symbol even if the symbol wasn't defined anywhere,
11137 and so the symbol would never be NULL. */
f5385ebf 11138 if (!h->ref_regular_nonweak)
d982ba73 11139 sym->st_value = 0;
252b5132
RH		 11140 }
11141 }
11142
ba93b8ac
DJ		 11143 if (h->got.offset != (bfd_vma) -1
11144 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
11145 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 11146 {
11147 asection * sgot;
11148 asection * srel;
947216bf
AM		 11149 Elf_Internal_Rela rel;
11150 bfd_byte *loc;
00a97672 11151 bfd_vma offset;
252b5132
RH		 11152
11153 /* This symbol has an entry in the global offset table. Set it
11154 up. */
252b5132 11155 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 11156 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 11157 BFD_ASSERT (sgot != NULL && srel != NULL);
11158
00a97672
RS		 11159 offset = (h->got.offset & ~(bfd_vma) 1);
11160 rel.r_addend = 0;
252b5132
RH		 11161 rel.r_offset = (sgot->output_section->vma
11162 + sgot->output_offset
00a97672 11163 + offset);
252b5132 11164
5e681ec4
PB		 11165 /* If this is a static link, or it is a -Bsymbolic link and the
11166 symbol is defined locally or was forced to be local because
11167 of a version file, we just want to emit a RELATIVE reloc.
11168 The entry in the global offset table will already have been
11169 initialized in the relocate_section function. */
252b5132 11170 if (info->shared
5e681ec4
PB		 11171 && SYMBOL_REFERENCES_LOCAL (info, h))
11172 {
906e58ca 11173 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 11174 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 11175 if (!htab->use_rel)
11176 {
11177 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
11178 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
11179 }
5e681ec4 11180 }
252b5132
RH		 11181 else
11182 {
906e58ca 11183 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 11184 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 11185 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11186 }
11187
00a97672
RS		 11188 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
11189 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 11190 }
11191
f5385ebf 11192 if (h->needs_copy)
252b5132
RH		 11193 {
11194 asection * s;
947216bf
AM		 11195 Elf_Internal_Rela rel;
11196 bfd_byte *loc;
252b5132
RH		 11197
11198 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 11199 BFD_ASSERT (h->dynindx != -1
11200 && (h->root.type == bfd_link_hash_defined
11201 || h->root.type == bfd_link_hash_defweak));
11202
11203 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 11204 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 11205 BFD_ASSERT (s != NULL);
11206
00a97672 11207 rel.r_addend = 0;
252b5132
RH		 11208 rel.r_offset = (h->root.u.def.value
11209 + h->root.u.def.section->output_section->vma
11210 + h->root.u.def.section->output_offset);
11211 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 11212 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
11213 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 11214 }
11215
00a97672
RS		 11216 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
11217 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
11218 to the ".got" section. */
252b5132 11219 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 11220 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 11221 sym->st_shndx = SHN_ABS;
11222
b34976b6 11223 return TRUE;
252b5132
RH		 11224}
11225
11226/* Finish up the dynamic sections. */
11227
b34976b6 11228static bfd_boolean
57e8b36a 11229elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 11230{
11231 bfd * dynobj;
11232 asection * sgot;
11233 asection * sdyn;
11234
11235 dynobj = elf_hash_table (info)->dynobj;
11236
11237 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 11238 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 11239 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
11240
11241 if (elf_hash_table (info)->dynamic_sections_created)
11242 {
11243 asection *splt;
11244 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 11245 struct elf32_arm_link_hash_table *htab;
252b5132 11246
229fcec5 11247 htab = elf32_arm_hash_table (info);
252b5132 11248 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 11249 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 11250
11251 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 11252 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 11253
252b5132
RH		 11254 for (; dyncon < dynconend; dyncon++)
11255 {
11256 Elf_Internal_Dyn dyn;
11257 const char * name;
11258 asection * s;
11259
11260 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
11261
11262 switch (dyn.d_tag)
11263 {
229fcec5
MM		 11264 unsigned int type;
11265
252b5132 11266 default:
7a2b07ff
NS		 11267 if (htab->vxworks_p
11268 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
11269 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 11270 break;
11271
229fcec5
MM		 11272 case DT_HASH:
11273 name = ".hash";
11274 goto get_vma_if_bpabi;
11275 case DT_STRTAB:
11276 name = ".dynstr";
11277 goto get_vma_if_bpabi;
11278 case DT_SYMTAB:
11279 name = ".dynsym";
11280 goto get_vma_if_bpabi;
c0042f5d
MM		 11281 case DT_VERSYM:
11282 name = ".gnu.version";
11283 goto get_vma_if_bpabi;
11284 case DT_VERDEF:
11285 name = ".gnu.version_d";
11286 goto get_vma_if_bpabi;
11287 case DT_VERNEED:
11288 name = ".gnu.version_r";
11289 goto get_vma_if_bpabi;
11290
252b5132
RH		 11291 case DT_PLTGOT:
11292 name = ".got";
11293 goto get_vma;
11294 case DT_JMPREL:
00a97672 11295 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 11296 get_vma:
11297 s = bfd_get_section_by_name (output_bfd, name);
11298 BFD_ASSERT (s != NULL);
229fcec5
MM		 11299 if (!htab->symbian_p)
11300 dyn.d_un.d_ptr = s->vma;
11301 else
11302 /* In the BPABI, tags in the PT_DYNAMIC section point
11303 at the file offset, not the memory address, for the
11304 convenience of the post linker. */
11305 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 11306 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
11307 break;
11308
229fcec5
MM		 11309 get_vma_if_bpabi:
11310 if (htab->symbian_p)
11311 goto get_vma;
11312 break;
11313
252b5132 11314 case DT_PLTRELSZ:
00a97672
RS		 11315 s = bfd_get_section_by_name (output_bfd,
11316 RELOC_SECTION (htab, ".plt"));
252b5132 11317 BFD_ASSERT (s != NULL);
eea6121a 11318 dyn.d_un.d_val = s->size;
252b5132
RH		 11319 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
11320 break;
906e58ca 11321
252b5132 11322 case DT_RELSZ:
00a97672 11323 case DT_RELASZ:
229fcec5
MM		 11324 if (!htab->symbian_p)
11325 {
11326 /* My reading of the SVR4 ABI indicates that the
11327 procedure linkage table relocs (DT_JMPREL) should be
11328 included in the overall relocs (DT_REL). This is
11329 what Solaris does. However, UnixWare can not handle
11330 that case. Therefore, we override the DT_RELSZ entry
11331 here to make it not include the JMPREL relocs. Since
00a97672 11332 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 11333 other relocation sections, we don't have to worry
11334 about changing the DT_REL entry. */
00a97672
RS		 11335 s = bfd_get_section_by_name (output_bfd,
11336 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 11337 if (s != NULL)
11338 dyn.d_un.d_val -= s->size;
11339 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
11340 break;
11341 }
8029a119 11342 /* Fall through. */
229fcec5
MM		 11343
11344 case DT_REL:
11345 case DT_RELA:
229fcec5
MM		 11346 /* In the BPABI, the DT_REL tag must point at the file
11347 offset, not the VMA, of the first relocation
11348 section. So, we use code similar to that in
11349 elflink.c, but do not check for SHF_ALLOC on the
11350 relcoation section, since relocations sections are
11351 never allocated under the BPABI. The comments above
11352 about Unixware notwithstanding, we include all of the
11353 relocations here. */
11354 if (htab->symbian_p)
11355 {
11356 unsigned int i;
11357 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
11358 ? SHT_REL : SHT_RELA);
11359 dyn.d_un.d_val = 0;
11360 for (i = 1; i < elf_numsections (output_bfd); i++)
11361 {
906e58ca 11362 Elf_Internal_Shdr *hdr
229fcec5
MM		 11363 = elf_elfsections (output_bfd)[i];
11364 if (hdr->sh_type == type)
11365 {
906e58ca 11366 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 11367 || dyn.d_tag == DT_RELASZ)
11368 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 11369 else if ((ufile_ptr) hdr->sh_offset
11370 <= dyn.d_un.d_val - 1)
229fcec5
MM		 11371 dyn.d_un.d_val = hdr->sh_offset;
11372 }
11373 }
11374 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
11375 }
252b5132 11376 break;
88f7bcd5
NC		 11377
11378 /* Set the bottom bit of DT_INIT/FINI if the
11379 corresponding function is Thumb. */
11380 case DT_INIT:
11381 name = info->init_function;
11382 goto get_sym;
11383 case DT_FINI:
11384 name = info->fini_function;
11385 get_sym:
11386 /* If it wasn't set by elf_bfd_final_link
4cc11e76 11387 then there is nothing to adjust. */
88f7bcd5
NC		 11388 if (dyn.d_un.d_val != 0)
11389 {
11390 struct elf_link_hash_entry * eh;
11391
11392 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 11393 FALSE, FALSE, TRUE);
906e58ca 11394 if (eh != NULL
88f7bcd5
NC		 11395 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
11396 {
11397 dyn.d_un.d_val |= 1;
b34976b6 11398 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 11399 }
11400 }
11401 break;
252b5132
RH		 11402 }
11403 }
11404
24a1ba0f 11405 /* Fill in the first entry in the procedure linkage table. */
e5a52504 11406 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 11407 {
00a97672
RS		 11408 const bfd_vma *plt0_entry;
11409 bfd_vma got_address, plt_address, got_displacement;
11410
11411 /* Calculate the addresses of the GOT and PLT. */
11412 got_address = sgot->output_section->vma + sgot->output_offset;
11413 plt_address = splt->output_section->vma + splt->output_offset;
11414
11415 if (htab->vxworks_p)
11416 {
11417 /* The VxWorks GOT is relocated by the dynamic linker.
11418 Therefore, we must emit relocations rather than simply
11419 computing the values now. */
11420 Elf_Internal_Rela rel;
11421
11422 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 11423 put_arm_insn (htab, output_bfd, plt0_entry[0],
11424 splt->contents + 0);
11425 put_arm_insn (htab, output_bfd, plt0_entry[1],
11426 splt->contents + 4);
11427 put_arm_insn (htab, output_bfd, plt0_entry[2],
11428 splt->contents + 8);
00a97672
RS		 11429 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
11430
8029a119 11431 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 11432 rel.r_offset = plt_address + 12;
11433 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
11434 rel.r_addend = 0;
11435 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
11436 htab->srelplt2->contents);
11437 }
11438 else
11439 {
11440 got_displacement = got_address - (plt_address + 16);
11441
11442 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 11443 put_arm_insn (htab, output_bfd, plt0_entry[0],
11444 splt->contents + 0);
11445 put_arm_insn (htab, output_bfd, plt0_entry[1],
11446 splt->contents + 4);
11447 put_arm_insn (htab, output_bfd, plt0_entry[2],
11448 splt->contents + 8);
11449 put_arm_insn (htab, output_bfd, plt0_entry[3],
11450 splt->contents + 12);
5e681ec4 11451
5e681ec4 11452#ifdef FOUR_WORD_PLT
00a97672
RS		 11453 /* The displacement value goes in the otherwise-unused
11454 last word of the second entry. */
11455 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 11456#else
00a97672 11457 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 11458#endif
00a97672 11459 }
f7a74f8c 11460 }
252b5132
RH		 11461
11462 /* UnixWare sets the entsize of .plt to 4, although that doesn't
11463 really seem like the right value. */
74541ad4
AM		 11464 if (splt->output_section->owner == output_bfd)
11465 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 11466
11467 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
11468 {
11469 /* Correct the .rel(a).plt.unloaded relocations. They will have
11470 incorrect symbol indexes. */
11471 int num_plts;
eed62c48 11472 unsigned char *p;
00a97672
RS		 11473
11474 num_plts = ((htab->splt->size - htab->plt_header_size)
11475 / htab->plt_entry_size);
11476 p = htab->srelplt2->contents + RELOC_SIZE (htab);
11477
11478 for (; num_plts; num_plts--)
11479 {
11480 Elf_Internal_Rela rel;
11481
11482 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
11483 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
11484 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
11485 p += RELOC_SIZE (htab);
11486
11487 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
11488 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
11489 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
11490 p += RELOC_SIZE (htab);
11491 }
11492 }
252b5132
RH		 11493 }
11494
11495 /* Fill in the first three entries in the global offset table. */
229fcec5 11496 if (sgot)
252b5132 11497 {
229fcec5
MM		 11498 if (sgot->size > 0)
11499 {
11500 if (sdyn == NULL)
11501 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
11502 else
11503 bfd_put_32 (output_bfd,
11504 sdyn->output_section->vma + sdyn->output_offset,
11505 sgot->contents);
11506 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
11507 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
11508 }
252b5132 11509
229fcec5
MM		 11510 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
11511 }
252b5132 11512
b34976b6 11513 return TRUE;
252b5132
RH		 11514}
11515
ba96a88f 11516static void
57e8b36a 11517elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 11518{
9b485d32 11519 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 11520 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 11521
11522 i_ehdrp = elf_elfheader (abfd);
11523
94a3258f
PB		 11524 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
11525 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
11526 else
11527 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 11528 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 11529
93204d3a
PB		 11530 if (link_info)
11531 {
11532 globals = elf32_arm_hash_table (link_info);
11533 if (globals->byteswap_code)
11534 i_ehdrp->e_flags |= EF_ARM_BE8;
11535 }
ba96a88f
NC		 11536}
11537
99e4ae17 11538static enum elf_reloc_type_class
57e8b36a 11539elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 11540{
f51e552e 11541 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 11542 {
11543 case R_ARM_RELATIVE:
11544 return reloc_class_relative;
11545 case R_ARM_JUMP_SLOT:
11546 return reloc_class_plt;
11547 case R_ARM_COPY:
11548 return reloc_class_copy;
11549 default:
11550 return reloc_class_normal;
11551 }
11552}
11553
e16bb312
NC		 11554/* Set the right machine number for an Arm ELF file. */
11555
11556static bfd_boolean
57e8b36a 11557elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 11558{
11559 if (hdr->sh_type == SHT_NOTE)
11560 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
11561
11562 return TRUE;
11563}
11564
e489d0ae 11565static void
57e8b36a 11566elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 11567{
5a6c6817 11568 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 11569}
11570
40a18ebd
NC		 11571/* Return TRUE if this is an unwinding table entry. */
11572
11573static bfd_boolean
11574is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
11575{
0112cd26
NC		 11576 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
11577 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 11578}
11579
11580
11581/* Set the type and flags for an ARM section. We do this by
11582 the section name, which is a hack, but ought to work. */
11583
11584static bfd_boolean
11585elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
11586{
11587 const char * name;
11588
11589 name = bfd_get_section_name (abfd, sec);
11590
11591 if (is_arm_elf_unwind_section_name (abfd, name))
11592 {
11593 hdr->sh_type = SHT_ARM_EXIDX;
11594 hdr->sh_flags |= SHF_LINK_ORDER;
11595 }
11596 return TRUE;
11597}
11598
6dc132d9
L		 11599/* Handle an ARM specific section when reading an object file. This is
11600 called when bfd_section_from_shdr finds a section with an unknown
11601 type. */
40a18ebd
NC		 11602
11603static bfd_boolean
11604elf32_arm_section_from_shdr (bfd *abfd,
11605 Elf_Internal_Shdr * hdr,
6dc132d9
L		 11606 const char *name,
11607 int shindex)
40a18ebd
NC		 11608{
11609 /* There ought to be a place to keep ELF backend specific flags, but
11610 at the moment there isn't one. We just keep track of the
11611 sections by their name, instead. Fortunately, the ABI gives
11612 names for all the ARM specific sections, so we will probably get
11613 away with this. */
11614 switch (hdr->sh_type)
11615 {
11616 case SHT_ARM_EXIDX:
0951f019
RE		 11617 case SHT_ARM_PREEMPTMAP:
11618 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 11619 break;
11620
11621 default:
11622 return FALSE;
11623 }
11624
6dc132d9 11625 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 11626 return FALSE;
11627
11628 return TRUE;
11629}
e489d0ae 11630
8e3de13a
NC		 11631/* A structure used to record a list of sections, independently
11632 of the next and prev fields in the asection structure. */
11633typedef struct section_list
11634{
11635 asection * sec;
11636 struct section_list * next;
11637 struct section_list * prev;
11638}
11639section_list;
11640
11641/* Unfortunately we need to keep a list of sections for which
11642 an _arm_elf_section_data structure has been allocated. This
11643 is because it is possible for functions like elf32_arm_write_section
11644 to be called on a section which has had an elf_data_structure
11645 allocated for it (and so the used_by_bfd field is valid) but
11646 for which the ARM extended version of this structure - the
11647 _arm_elf_section_data structure - has not been allocated. */
11648static section_list * sections_with_arm_elf_section_data = NULL;
11649
11650static void
957c6e41 11651record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 11652{
11653 struct section_list * entry;
11654
957c6e41 11655 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 11656 if (entry == NULL)
11657 return;
11658 entry->sec = sec;
11659 entry->next = sections_with_arm_elf_section_data;
11660 entry->prev = NULL;
11661 if (entry->next != NULL)
11662 entry->next->prev = entry;
11663 sections_with_arm_elf_section_data = entry;
11664}
11665
44444f50
NC		 11666static struct section_list *
11667find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 11668{
11669 struct section_list * entry;
bd4aae00 11670 static struct section_list * last_entry = NULL;
8e3de13a 11671
bd4aae00
NC		 11672 /* This is a short cut for the typical case where the sections are added
11673 to the sections_with_arm_elf_section_data list in forward order and
11674 then looked up here in backwards order. This makes a real difference
11675 to the ld-srec/sec64k.exp linker test. */
44444f50 11676 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 11677 if (last_entry != NULL)
11678 {
11679 if (last_entry->sec == sec)
44444f50
NC		 11680 entry = last_entry;
11681 else if (last_entry->next != NULL
11682 && last_entry->next->sec == sec)
11683 entry = last_entry->next;
bd4aae00 11684 }
44444f50
NC		 11685
11686 for (; entry; entry = entry->next)
8e3de13a 11687 if (entry->sec == sec)
44444f50 11688 break;
bd4aae00 11689
44444f50
NC		 11690 if (entry)
11691 /* Record the entry prior to this one - it is the entry we are most
11692 likely to want to locate next time. Also this way if we have been
11693 called from unrecord_section_with_arm_elf_section_data() we will not
11694 be caching a pointer that is about to be freed. */
11695 last_entry = entry->prev;
11696
11697 return entry;
11698}
11699
11700static _arm_elf_section_data *
11701get_arm_elf_section_data (asection * sec)
11702{
11703 struct section_list * entry;
11704
11705 entry = find_arm_elf_section_entry (sec);
11706
11707 if (entry)
11708 return elf32_arm_section_data (entry->sec);
11709 else
11710 return NULL;
8e3de13a
NC		 11711}
11712
11713static void
11714unrecord_section_with_arm_elf_section_data (asection * sec)
11715{
11716 struct section_list * entry;
11717
44444f50
NC		 11718 entry = find_arm_elf_section_entry (sec);
11719
11720 if (entry)
11721 {
11722 if (entry->prev != NULL)
11723 entry->prev->next = entry->next;
11724 if (entry->next != NULL)
11725 entry->next->prev = entry->prev;
11726 if (entry == sections_with_arm_elf_section_data)
11727 sections_with_arm_elf_section_data = entry->next;
11728 free (entry);
11729 }
8e3de13a
NC		 11730}
11731
e489d0ae 11732
4e617b1e
PB		 11733typedef struct
11734{
11735 void *finfo;
11736 struct bfd_link_info *info;
91a5743d
PB		 11737 asection *sec;
11738 int sec_shndx;
4e617b1e
PB		 11739 bfd_boolean (*func) (void *, const char *, Elf_Internal_Sym *,
11740 asection *, struct elf_link_hash_entry *);
11741} output_arch_syminfo;
11742
11743enum map_symbol_type
11744{
11745 ARM_MAP_ARM,
11746 ARM_MAP_THUMB,
11747 ARM_MAP_DATA
11748};
11749
11750
7413f23f 11751/* Output a single mapping symbol. */
4e617b1e
PB		 11752
11753static bfd_boolean
7413f23f
DJ		 11754elf32_arm_output_map_sym (output_arch_syminfo *osi,
11755 enum map_symbol_type type,
11756 bfd_vma offset)
4e617b1e
PB		 11757{
11758 static const char *names[3] = {"$a", "$t", "$d"};
11759 struct elf32_arm_link_hash_table *htab;
11760 Elf_Internal_Sym sym;
11761
11762 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 11763 sym.st_value = osi->sec->output_section->vma
11764 + osi->sec->output_offset
11765 + offset;
4e617b1e
PB		 11766 sym.st_size = 0;
11767 sym.st_other = 0;
11768 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d
PB		 11769 sym.st_shndx = osi->sec_shndx;
11770 if (!osi->func (osi->finfo, names[type], &sym, osi->sec, NULL))
4e617b1e
PB		 11771 return FALSE;
11772 return TRUE;
11773}
11774
11775
11776/* Output mapping symbols for PLT entries associated with H. */
11777
11778static bfd_boolean
11779elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
11780{
11781 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
11782 struct elf32_arm_link_hash_table *htab;
11783 struct elf32_arm_link_hash_entry *eh;
11784 bfd_vma addr;
11785
11786 htab = elf32_arm_hash_table (osi->info);
11787
11788 if (h->root.type == bfd_link_hash_indirect)
11789 return TRUE;
11790
11791 if (h->root.type == bfd_link_hash_warning)
11792 /* When warning symbols are created, they **replace** the "real"
11793 entry in the hash table, thus we never get to see the real
11794 symbol in a hash traversal. So look at it now. */
11795 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11796
11797 if (h->plt.offset == (bfd_vma) -1)
11798 return TRUE;
11799
11800 eh = (struct elf32_arm_link_hash_entry *) h;
11801 addr = h->plt.offset;
11802 if (htab->symbian_p)
11803 {
7413f23f 11804 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 11805 return FALSE;
7413f23f 11806 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 11807 return FALSE;
11808 }
11809 else if (htab->vxworks_p)
11810 {
7413f23f 11811 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 11812 return FALSE;
7413f23f 11813 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 11814 return FALSE;
7413f23f 11815 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 11816 return FALSE;
7413f23f 11817 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 11818 return FALSE;
11819 }
11820 else
11821 {
bd97cb95
DJ		 11822 bfd_signed_vma thumb_refs;
11823
11824 thumb_refs = eh->plt_thumb_refcount;
11825 if (!htab->use_blx)
11826 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 11827
bd97cb95 11828 if (thumb_refs > 0)
4e617b1e 11829 {
7413f23f 11830 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 11831 return FALSE;
11832 }
11833#ifdef FOUR_WORD_PLT
7413f23f 11834 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 11835 return FALSE;
7413f23f 11836 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 11837 return FALSE;
11838#else
906e58ca 11839 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 11840 so only need to output a mapping symbol for the first PLT entry and
11841 entries with thumb thunks. */
bd97cb95 11842 if (thumb_refs > 0 || addr == 20)
4e617b1e 11843 {
7413f23f 11844 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 11845 return FALSE;
11846 }
11847#endif
11848 }
11849
11850 return TRUE;
11851}
11852
7413f23f
DJ		 11853/* Output a single local symbol for a generated stub. */
11854
11855static bfd_boolean
11856elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
11857 bfd_vma offset, bfd_vma size)
11858{
11859 struct elf32_arm_link_hash_table *htab;
11860 Elf_Internal_Sym sym;
11861
11862 htab = elf32_arm_hash_table (osi->info);
11863 sym.st_value = osi->sec->output_section->vma
11864 + osi->sec->output_offset
11865 + offset;
11866 sym.st_size = size;
11867 sym.st_other = 0;
11868 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
11869 sym.st_shndx = osi->sec_shndx;
11870 if (!osi->func (osi->finfo, name, &sym, osi->sec, NULL))
11871 return FALSE;
11872 return TRUE;
11873}
4e617b1e 11874
da5938a2 11875static bfd_boolean
8029a119
NC		 11876arm_map_one_stub (struct bfd_hash_entry * gen_entry,
11877 void * in_arg)
da5938a2
NC		 11878{
11879 struct elf32_arm_stub_hash_entry *stub_entry;
11880 struct bfd_link_info *info;
11881 struct elf32_arm_link_hash_table *htab;
11882 asection *stub_sec;
11883 bfd_vma addr;
7413f23f 11884 char *stub_name;
9a008db3 11885 output_arch_syminfo *osi;
461a49ca
DJ		 11886 const insn_sequence *template;
11887 enum stub_insn_type prev_type;
11888 int size;
11889 int i;
11890 enum map_symbol_type sym_type;
da5938a2
NC		 11891
11892 /* Massage our args to the form they really have. */
11893 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 11894 osi = (output_arch_syminfo *) in_arg;
da5938a2 11895
da5938a2
NC		 11896 info = osi->info;
11897
11898 htab = elf32_arm_hash_table (info);
11899 stub_sec = stub_entry->stub_sec;
11900
11901 /* Ensure this stub is attached to the current section being
7413f23f 11902 processed. */
da5938a2
NC		 11903 if (stub_sec != osi->sec)
11904 return TRUE;
11905
7413f23f
DJ		 11906 addr = (bfd_vma) stub_entry->stub_offset;
11907 stub_name = stub_entry->output_name;
da5938a2 11908
461a49ca 11909 template = stub_entry->stub_template;
4e31c731 11910 switch (template[0].type)
7413f23f 11911 {
461a49ca
DJ		 11912 case ARM_TYPE:
11913 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 11914 return FALSE;
11915 break;
461a49ca
DJ		 11916 case THUMB16_TYPE:
11917 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
11918 stub_entry->stub_size))
da5938a2
NC		 11919 return FALSE;
11920 break;
11921 default:
11922 BFD_FAIL ();
4e31c731 11923 return FALSE;
7413f23f 11924 }
da5938a2 11925
461a49ca
DJ		 11926 prev_type = DATA_TYPE;
11927 size = 0;
11928 for (i = 0; i < stub_entry->stub_template_size; i++)
11929 {
4e31c731 11930 switch (template[i].type)
461a49ca
DJ		 11931 {
11932 case ARM_TYPE:
11933 sym_type = ARM_MAP_ARM;
11934 break;
11935
11936 case THUMB16_TYPE:
11937 sym_type = ARM_MAP_THUMB;
11938 break;
11939
11940 case DATA_TYPE:
11941 sym_type = ARM_MAP_DATA;
11942 break;
11943
11944 default:
11945 BFD_FAIL ();
4e31c731 11946 return FALSE;
461a49ca
DJ		 11947 }
11948
11949 if (template[i].type != prev_type)
11950 {
11951 prev_type = template[i].type;
11952 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
11953 return FALSE;
11954 }
11955
4e31c731 11956 switch (template[i].type)
461a49ca
DJ		 11957 {
11958 case ARM_TYPE:
11959 size += 4;
11960 break;
11961
11962 case THUMB16_TYPE:
11963 size += 2;
11964 break;
11965
11966 case DATA_TYPE:
11967 size += 4;
11968 break;
11969
11970 default:
11971 BFD_FAIL ();
4e31c731 11972 return FALSE;
461a49ca
DJ		 11973 }
11974 }
11975
da5938a2
NC		 11976 return TRUE;
11977}
11978
91a5743d 11979/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 11980
11981static bfd_boolean
11982elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 11983 struct bfd_link_info *info,
11984 void *finfo,
11985 bfd_boolean (*func) (void *, const char *,
11986 Elf_Internal_Sym *,
11987 asection *,
11988 struct elf_link_hash_entry *))
4e617b1e
PB		 11989{
11990 output_arch_syminfo osi;
11991 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 11992 bfd_vma offset;
11993 bfd_size_type size;
4e617b1e
PB		 11994
11995 htab = elf32_arm_hash_table (info);
906e58ca 11996 check_use_blx (htab);
91a5743d 11997
4e617b1e
PB		 11998 osi.finfo = finfo;
11999 osi.info = info;
12000 osi.func = func;
906e58ca 12001
91a5743d
PB		 12002 /* ARM->Thumb glue. */
12003 if (htab->arm_glue_size > 0)
12004 {
12005 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12006 ARM2THUMB_GLUE_SECTION_NAME);
12007
12008 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12009 (output_bfd, osi.sec->output_section);
12010 if (info->shared || htab->root.is_relocatable_executable
12011 || htab->pic_veneer)
12012 size = ARM2THUMB_PIC_GLUE_SIZE;
12013 else if (htab->use_blx)
12014 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
12015 else
12016 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 12017
91a5743d
PB		 12018 for (offset = 0; offset < htab->arm_glue_size; offset += size)
12019 {
7413f23f
DJ		 12020 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
12021 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 12022 }
12023 }
12024
12025 /* Thumb->ARM glue. */
12026 if (htab->thumb_glue_size > 0)
12027 {
12028 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12029 THUMB2ARM_GLUE_SECTION_NAME);
12030
12031 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12032 (output_bfd, osi.sec->output_section);
12033 size = THUMB2ARM_GLUE_SIZE;
12034
12035 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
12036 {
7413f23f
DJ		 12037 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
12038 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 12039 }
12040 }
12041
845b51d6
PB		 12042 /* ARMv4 BX veneers. */
12043 if (htab->bx_glue_size > 0)
12044 {
12045 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12046 ARM_BX_GLUE_SECTION_NAME);
12047
12048 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12049 (output_bfd, osi.sec->output_section);
12050
7413f23f 12051 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 12052 }
12053
8029a119
NC		 12054 /* Long calls stubs. */
12055 if (htab->stub_bfd && htab->stub_bfd->sections)
12056 {
da5938a2 12057 asection* stub_sec;
8029a119 12058
da5938a2
NC		 12059 for (stub_sec = htab->stub_bfd->sections;
12060 stub_sec != NULL;
8029a119
NC		 12061 stub_sec = stub_sec->next)
12062 {
12063 /* Ignore non-stub sections. */
12064 if (!strstr (stub_sec->name, STUB_SUFFIX))
12065 continue;
da5938a2 12066
8029a119 12067 osi.sec = stub_sec;
da5938a2 12068
8029a119
NC		 12069 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12070 (output_bfd, osi.sec->output_section);
da5938a2 12071
8029a119
NC		 12072 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
12073 }
12074 }
da5938a2 12075
91a5743d
PB		 12076 /* Finally, output mapping symbols for the PLT. */
12077 if (!htab->splt || htab->splt->size == 0)
12078 return TRUE;
12079
12080 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 12081 htab->splt->output_section);
91a5743d 12082 osi.sec = htab->splt;
4e617b1e
PB		 12083 /* Output mapping symbols for the plt header. SymbianOS does not have a
12084 plt header. */
12085 if (htab->vxworks_p)
12086 {
12087 /* VxWorks shared libraries have no PLT header. */
12088 if (!info->shared)
12089 {
7413f23f 12090 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 12091 return FALSE;
7413f23f 12092 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 12093 return FALSE;
12094 }
12095 }
12096 else if (!htab->symbian_p)
12097 {
7413f23f 12098 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 12099 return FALSE;
12100#ifndef FOUR_WORD_PLT
7413f23f 12101 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 12102 return FALSE;
12103#endif
12104 }
12105
12106 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
12107 return TRUE;
12108}
12109
e489d0ae
PB		 12110/* Allocate target specific section data. */
12111
12112static bfd_boolean
12113elf32_arm_new_section_hook (bfd *abfd, asection *sec)
12114{
f592407e
AM		 12115 if (!sec->used_by_bfd)
12116 {
12117 _arm_elf_section_data *sdata;
12118 bfd_size_type amt = sizeof (*sdata);
e489d0ae 12119
f592407e
AM		 12120 sdata = bfd_zalloc (abfd, amt);
12121 if (sdata == NULL)
12122 return FALSE;
12123 sec->used_by_bfd = sdata;
12124 }
e489d0ae 12125
957c6e41 12126 record_section_with_arm_elf_section_data (sec);
8e3de13a 12127
e489d0ae
PB		 12128 return _bfd_elf_new_section_hook (abfd, sec);
12129}
12130
12131
12132/* Used to order a list of mapping symbols by address. */
12133
12134static int
12135elf32_arm_compare_mapping (const void * a, const void * b)
12136{
7f6a71ff
JM		 12137 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
12138 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
12139
12140 if (amap->vma > bmap->vma)
12141 return 1;
12142 else if (amap->vma < bmap->vma)
12143 return -1;
12144 else if (amap->type > bmap->type)
12145 /* Ensure results do not depend on the host qsort for objects with
12146 multiple mapping symbols at the same address by sorting on type
12147 after vma. */
12148 return 1;
12149 else if (amap->type < bmap->type)
12150 return -1;
12151 else
12152 return 0;
e489d0ae
PB		 12153}
12154
12155
12156/* Do code byteswapping. Return FALSE afterwards so that the section is
12157 written out as normal. */
12158
12159static bfd_boolean
c7b8f16e 12160elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 12161 struct bfd_link_info *link_info,
12162 asection *sec,
e489d0ae
PB		 12163 bfd_byte *contents)
12164{
c7b8f16e 12165 int mapcount, errcount;
8e3de13a 12166 _arm_elf_section_data *arm_data;
c7b8f16e 12167 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 12168 elf32_arm_section_map *map;
c7b8f16e 12169 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 12170 bfd_vma ptr;
12171 bfd_vma end;
c7b8f16e 12172 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae
PB		 12173 bfd_byte tmp;
12174 int i;
57e8b36a 12175
8e3de13a
NC		 12176 /* If this section has not been allocated an _arm_elf_section_data
12177 structure then we cannot record anything. */
12178 arm_data = get_arm_elf_section_data (sec);
12179 if (arm_data == NULL)
12180 return FALSE;
12181
12182 mapcount = arm_data->mapcount;
12183 map = arm_data->map;
c7b8f16e
JB		 12184 errcount = arm_data->erratumcount;
12185
12186 if (errcount != 0)
12187 {
12188 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
12189
12190 for (errnode = arm_data->erratumlist; errnode != 0;
12191 errnode = errnode->next)
12192 {
12193 bfd_vma index = errnode->vma - offset;
12194
12195 switch (errnode->type)
12196 {
12197 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
12198 {
12199 bfd_vma branch_to_veneer;
12200 /* Original condition code of instruction, plus bit mask for
12201 ARM B instruction. */
12202 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
12203 | 0x0a000000;
12204
12205 /* The instruction is before the label. */
12206 index -= 4;
12207
12208 /* Above offset included in -4 below. */
12209 branch_to_veneer = errnode->u.b.veneer->vma
12210 - errnode->vma - 4;
12211
12212 if ((signed) branch_to_veneer < -(1 << 25)
12213 || (signed) branch_to_veneer >= (1 << 25))
12214 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
12215 "range"), output_bfd);
12216
12217 insn |= (branch_to_veneer >> 2) & 0xffffff;
12218 contents[endianflip ^ index] = insn & 0xff;
12219 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
12220 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
12221 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
12222 }
12223 break;
12224
12225 case VFP11_ERRATUM_ARM_VENEER:
12226 {
12227 bfd_vma branch_from_veneer;
12228 unsigned int insn;
12229
12230 /* Take size of veneer into account. */
12231 branch_from_veneer = errnode->u.v.branch->vma
12232 - errnode->vma - 12;
12233
12234 if ((signed) branch_from_veneer < -(1 << 25)
12235 || (signed) branch_from_veneer >= (1 << 25))
12236 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
12237 "range"), output_bfd);
12238
12239 /* Original instruction. */
12240 insn = errnode->u.v.branch->u.b.vfp_insn;
12241 contents[endianflip ^ index] = insn & 0xff;
12242 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
12243 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
12244 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
12245
12246 /* Branch back to insn after original insn. */
12247 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
12248 contents[endianflip ^ (index + 4)] = insn & 0xff;
12249 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
12250 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
12251 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
12252 }
12253 break;
12254
12255 default:
12256 abort ();
12257 }
12258 }
12259 }
e489d0ae
PB		 12260
12261 if (mapcount == 0)
12262 return FALSE;
12263
c7b8f16e 12264 if (globals->byteswap_code)
e489d0ae 12265 {
c7b8f16e 12266 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 12267
c7b8f16e
JB		 12268 ptr = map[0].vma;
12269 for (i = 0; i < mapcount; i++)
12270 {
12271 if (i == mapcount - 1)
12272 end = sec->size;
12273 else
12274 end = map[i + 1].vma;
e489d0ae 12275
c7b8f16e 12276 switch (map[i].type)
e489d0ae 12277 {
c7b8f16e
JB		 12278 case 'a':
12279 /* Byte swap code words. */
12280 while (ptr + 3 < end)
12281 {
12282 tmp = contents[ptr];
12283 contents[ptr] = contents[ptr + 3];
12284 contents[ptr + 3] = tmp;
12285 tmp = contents[ptr + 1];
12286 contents[ptr + 1] = contents[ptr + 2];
12287 contents[ptr + 2] = tmp;
12288 ptr += 4;
12289 }
12290 break;
e489d0ae 12291
c7b8f16e
JB		 12292 case 't':
12293 /* Byte swap code halfwords. */
12294 while (ptr + 1 < end)
12295 {
12296 tmp = contents[ptr];
12297 contents[ptr] = contents[ptr + 1];
12298 contents[ptr + 1] = tmp;
12299 ptr += 2;
12300 }
12301 break;
12302
12303 case 'd':
12304 /* Leave data alone. */
12305 break;
12306 }
12307 ptr = end;
12308 }
e489d0ae 12309 }
8e3de13a 12310
93204d3a 12311 free (map);
8e3de13a 12312 arm_data->mapcount = 0;
c7b8f16e 12313 arm_data->mapsize = 0;
8e3de13a
NC		 12314 arm_data->map = NULL;
12315 unrecord_section_with_arm_elf_section_data (sec);
12316
e489d0ae
PB		 12317 return FALSE;
12318}
12319
957c6e41
NC		 12320static void
12321unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
12322 asection * sec,
12323 void * ignore ATTRIBUTE_UNUSED)
12324{
12325 unrecord_section_with_arm_elf_section_data (sec);
12326}
12327
12328static bfd_boolean
12329elf32_arm_close_and_cleanup (bfd * abfd)
12330{
b25e3d87
L		 12331 if (abfd->sections)
12332 bfd_map_over_sections (abfd,
12333 unrecord_section_via_map_over_sections,
12334 NULL);
957c6e41
NC		 12335
12336 return _bfd_elf_close_and_cleanup (abfd);
12337}
12338
b25e3d87
L		 12339static bfd_boolean
12340elf32_arm_bfd_free_cached_info (bfd * abfd)
12341{
12342 if (abfd->sections)
12343 bfd_map_over_sections (abfd,
12344 unrecord_section_via_map_over_sections,
12345 NULL);
12346
12347 return _bfd_free_cached_info (abfd);
12348}
12349
b7693d02
DJ		 12350/* Display STT_ARM_TFUNC symbols as functions. */
12351
12352static void
12353elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
12354 asymbol *asym)
12355{
12356 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
12357
12358 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
12359 elfsym->symbol.flags |= BSF_FUNCTION;
12360}
12361
0beaef2b
PB		 12362
12363/* Mangle thumb function symbols as we read them in. */
12364
8384fb8f 12365static bfd_boolean
0beaef2b
PB		 12366elf32_arm_swap_symbol_in (bfd * abfd,
12367 const void *psrc,
12368 const void *pshn,
12369 Elf_Internal_Sym *dst)
12370{
8384fb8f
AM		 12371 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
12372 return FALSE;
0beaef2b
PB		 12373
12374 /* New EABI objects mark thumb function symbols by setting the low bit of
12375 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 12376 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 12377 && (dst->st_value & 1))
12378 {
12379 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
12380 dst->st_value &= ~(bfd_vma) 1;
12381 }
8384fb8f 12382 return TRUE;
0beaef2b
PB		 12383}
12384
12385
12386/* Mangle thumb function symbols as we write them out. */
12387
12388static void
12389elf32_arm_swap_symbol_out (bfd *abfd,
12390 const Elf_Internal_Sym *src,
12391 void *cdst,
12392 void *shndx)
12393{
12394 Elf_Internal_Sym newsym;
12395
12396 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
12397 of the address set, as per the new EABI. We do this unconditionally
12398 because objcopy does not set the elf header flags until after
12399 it writes out the symbol table. */
12400 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
12401 {
12402 newsym = *src;
12403 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 12404 if (newsym.st_shndx != SHN_UNDEF)
12405 {
12406 /* Do this only for defined symbols. At link type, the static
12407 linker will simulate the work of dynamic linker of resolving
12408 symbols and will carry over the thumbness of found symbols to
12409 the output symbol table. It's not clear how it happens, but
b0fead2b 12410 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 12411 runtime, and writing '1' for them will be confusing for users
12412 and possibly for dynamic linker itself.
12413 */
12414 newsym.st_value |= 1;
12415 }
906e58ca 12416
0beaef2b
PB		 12417 src = &newsym;
12418 }
12419 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
12420}
12421
b294bdf8
MM		 12422/* Add the PT_ARM_EXIDX program header. */
12423
12424static bfd_boolean
906e58ca 12425elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 12426 struct bfd_link_info *info ATTRIBUTE_UNUSED)
12427{
12428 struct elf_segment_map *m;
12429 asection *sec;
12430
12431 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
12432 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
12433 {
12434 /* If there is already a PT_ARM_EXIDX header, then we do not
12435 want to add another one. This situation arises when running
12436 "strip"; the input binary already has the header. */
12437 m = elf_tdata (abfd)->segment_map;
12438 while (m && m->p_type != PT_ARM_EXIDX)
12439 m = m->next;
12440 if (!m)
12441 {
12442 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
12443 if (m == NULL)
12444 return FALSE;
12445 m->p_type = PT_ARM_EXIDX;
12446 m->count = 1;
12447 m->sections[0] = sec;
12448
12449 m->next = elf_tdata (abfd)->segment_map;
12450 elf_tdata (abfd)->segment_map = m;
12451 }
12452 }
12453
12454 return TRUE;
12455}
12456
12457/* We may add a PT_ARM_EXIDX program header. */
12458
12459static int
a6b96beb
AM		 12460elf32_arm_additional_program_headers (bfd *abfd,
12461 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 12462{
12463 asection *sec;
12464
12465 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
12466 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
12467 return 1;
12468 else
12469 return 0;
12470}
12471
fcb93ecf 12472/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 12473
fcb93ecf
PB		 12474static bfd_boolean
12475elf32_arm_is_function_type (unsigned int type)
12476{
0f88be7a 12477 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 12478}
12479
0beaef2b 12480/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 12481const struct elf_size_info elf32_arm_size_info =
12482{
0beaef2b
PB		 12483 sizeof (Elf32_External_Ehdr),
12484 sizeof (Elf32_External_Phdr),
12485 sizeof (Elf32_External_Shdr),
12486 sizeof (Elf32_External_Rel),
12487 sizeof (Elf32_External_Rela),
12488 sizeof (Elf32_External_Sym),
12489 sizeof (Elf32_External_Dyn),
12490 sizeof (Elf_External_Note),
12491 4,
12492 1,
12493 32, 2,
12494 ELFCLASS32, EV_CURRENT,
12495 bfd_elf32_write_out_phdrs,
12496 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 12497 bfd_elf32_checksum_contents,
0beaef2b
PB		 12498 bfd_elf32_write_relocs,
12499 elf32_arm_swap_symbol_in,
12500 elf32_arm_swap_symbol_out,
12501 bfd_elf32_slurp_reloc_table,
12502 bfd_elf32_slurp_symbol_table,
12503 bfd_elf32_swap_dyn_in,
12504 bfd_elf32_swap_dyn_out,
12505 bfd_elf32_swap_reloc_in,
12506 bfd_elf32_swap_reloc_out,
12507 bfd_elf32_swap_reloca_in,
12508 bfd_elf32_swap_reloca_out
12509};
12510
252b5132
RH		 12511#define ELF_ARCH bfd_arch_arm
12512#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 12513#ifdef __QNXTARGET__
12514#define ELF_MAXPAGESIZE 0x1000
12515#else
f21f3fe0 12516#define ELF_MAXPAGESIZE 0x8000
d0facd1b 12517#endif
b1342370 12518#define ELF_MINPAGESIZE 0x1000
24718e3b 12519#define ELF_COMMONPAGESIZE 0x1000
252b5132 12520
ba93b8ac
DJ		 12521#define bfd_elf32_mkobject elf32_arm_mkobject
12522
99e4ae17
AJ		 12523#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
12524#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 12525#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
12526#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
12527#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 12528#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 12529#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 12530#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 12531#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 12532#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 12533#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 12534#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 12535#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 12536#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 12537#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 12538
12539#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
12540#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 12541#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 12542#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
12543#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 12544#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 12545#define elf_backend_write_section elf32_arm_write_section
252b5132 12546#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 12547#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 12548#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
12549#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
12550#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 12551#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 12552#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 12553#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 12554#define elf_backend_object_p elf32_arm_object_p
e16bb312 12555#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 12556#define elf_backend_fake_sections elf32_arm_fake_sections
12557#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 12558#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 12559#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 12560#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 12561#define elf_backend_size_info elf32_arm_size_info
b294bdf8 12562#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 12563#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
12564#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
12565#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
12566#define elf_backend_is_function_type elf32_arm_is_function_type
12567
12568#define elf_backend_can_refcount 1
12569#define elf_backend_can_gc_sections 1
12570#define elf_backend_plt_readonly 1
12571#define elf_backend_want_got_plt 1
12572#define elf_backend_want_plt_sym 0
12573#define elf_backend_may_use_rel_p 1
12574#define elf_backend_may_use_rela_p 0
4e7fd91e 12575#define elf_backend_default_use_rela_p 0
252b5132 12576
04f7c78d 12577#define elf_backend_got_header_size 12
04f7c78d 12578
906e58ca
NC		 12579#undef elf_backend_obj_attrs_vendor
12580#define elf_backend_obj_attrs_vendor "aeabi"
12581#undef elf_backend_obj_attrs_section
12582#define elf_backend_obj_attrs_section ".ARM.attributes"
12583#undef elf_backend_obj_attrs_arg_type
12584#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
12585#undef elf_backend_obj_attrs_section_type
104d59d1 12586#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 12587#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 12588
252b5132 12589#include "elf32-target.h"
7f266840 12590
906e58ca 12591/* VxWorks Targets. */
4e7fd91e 12592
906e58ca 12593#undef TARGET_LITTLE_SYM
4e7fd91e 12594#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 12595#undef TARGET_LITTLE_NAME
4e7fd91e 12596#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 12597#undef TARGET_BIG_SYM
4e7fd91e 12598#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 12599#undef TARGET_BIG_NAME
4e7fd91e
PB		 12600#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
12601
12602/* Like elf32_arm_link_hash_table_create -- but overrides
12603 appropriately for VxWorks. */
906e58ca 12604
4e7fd91e
PB		 12605static struct bfd_link_hash_table *
12606elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
12607{
12608 struct bfd_link_hash_table *ret;
12609
12610 ret = elf32_arm_link_hash_table_create (abfd);
12611 if (ret)
12612 {
12613 struct elf32_arm_link_hash_table *htab
00a97672 12614 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 12615 htab->use_rel = 0;
00a97672 12616 htab->vxworks_p = 1;
4e7fd91e
PB		 12617 }
12618 return ret;
906e58ca 12619}
4e7fd91e 12620
00a97672
RS		 12621static void
12622elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
12623{
12624 elf32_arm_final_write_processing (abfd, linker);
12625 elf_vxworks_final_write_processing (abfd, linker);
12626}
12627
906e58ca 12628#undef elf32_bed
4e7fd91e
PB		 12629#define elf32_bed elf32_arm_vxworks_bed
12630
906e58ca
NC		 12631#undef bfd_elf32_bfd_link_hash_table_create
12632#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
12633#undef elf_backend_add_symbol_hook
12634#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
12635#undef elf_backend_final_write_processing
12636#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
12637#undef elf_backend_emit_relocs
12638#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 12639
906e58ca 12640#undef elf_backend_may_use_rel_p
00a97672 12641#define elf_backend_may_use_rel_p 0
906e58ca 12642#undef elf_backend_may_use_rela_p
00a97672 12643#define elf_backend_may_use_rela_p 1
906e58ca 12644#undef elf_backend_default_use_rela_p
00a97672 12645#define elf_backend_default_use_rela_p 1
906e58ca 12646#undef elf_backend_want_plt_sym
00a97672 12647#define elf_backend_want_plt_sym 1
906e58ca 12648#undef ELF_MAXPAGESIZE
00a97672 12649#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 12650
12651#include "elf32-target.h"
12652
12653
906e58ca 12654/* Symbian OS Targets. */
7f266840 12655
906e58ca 12656#undef TARGET_LITTLE_SYM
7f266840 12657#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 12658#undef TARGET_LITTLE_NAME
7f266840 12659#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 12660#undef TARGET_BIG_SYM
7f266840 12661#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 12662#undef TARGET_BIG_NAME
7f266840
DJ		 12663#define TARGET_BIG_NAME "elf32-bigarm-symbian"
12664
12665/* Like elf32_arm_link_hash_table_create -- but overrides
12666 appropriately for Symbian OS. */
906e58ca 12667
7f266840
DJ		 12668static struct bfd_link_hash_table *
12669elf32_arm_symbian_link_hash_table_create (bfd *abfd)
12670{
12671 struct bfd_link_hash_table *ret;
12672
12673 ret = elf32_arm_link_hash_table_create (abfd);
12674 if (ret)
12675 {
12676 struct elf32_arm_link_hash_table *htab
12677 = (struct elf32_arm_link_hash_table *)ret;
12678 /* There is no PLT header for Symbian OS. */
12679 htab->plt_header_size = 0;
95720a86
DJ		 12680 /* The PLT entries are each one instruction and one word. */
12681 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 12682 htab->symbian_p = 1;
33bfe774
JB		 12683 /* Symbian uses armv5t or above, so use_blx is always true. */
12684 htab->use_blx = 1;
67687978 12685 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 12686 }
12687 return ret;
906e58ca 12688}
7f266840 12689
b35d266b 12690static const struct bfd_elf_special_section
551b43fd 12691elf32_arm_symbian_special_sections[] =
7f266840 12692{
5cd3778d
MM		 12693 /* In a BPABI executable, the dynamic linking sections do not go in
12694 the loadable read-only segment. The post-linker may wish to
12695 refer to these sections, but they are not part of the final
12696 program image. */
0112cd26
NC		 12697 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
12698 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
12699 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
12700 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
12701 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 12702 /* These sections do not need to be writable as the SymbianOS
12703 postlinker will arrange things so that no dynamic relocation is
12704 required. */
0112cd26
NC		 12705 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
12706 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
12707 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
12708 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 12709};
12710
c3c76620 12711static void
906e58ca 12712elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 12713 struct bfd_link_info *link_info)
c3c76620
MM		 12714{
12715 /* BPABI objects are never loaded directly by an OS kernel; they are
12716 processed by a postlinker first, into an OS-specific format. If
12717 the D_PAGED bit is set on the file, BFD will align segments on
12718 page boundaries, so that an OS can directly map the file. With
12719 BPABI objects, that just results in wasted space. In addition,
12720 because we clear the D_PAGED bit, map_sections_to_segments will
12721 recognize that the program headers should not be mapped into any
12722 loadable segment. */
12723 abfd->flags &= ~D_PAGED;
906e58ca 12724 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 12725}
7f266840
DJ		 12726
12727static bfd_boolean
906e58ca 12728elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 12729 struct bfd_link_info *info)
7f266840
DJ		 12730{
12731 struct elf_segment_map *m;
12732 asection *dynsec;
12733
7f266840
DJ		 12734 /* BPABI shared libraries and executables should have a PT_DYNAMIC
12735 segment. However, because the .dynamic section is not marked
12736 with SEC_LOAD, the generic ELF code will not create such a
12737 segment. */
12738 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
12739 if (dynsec)
12740 {
8ded5a0f
AM		 12741 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
12742 if (m->p_type == PT_DYNAMIC)
12743 break;
12744
12745 if (m == NULL)
12746 {
12747 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
12748 m->next = elf_tdata (abfd)->segment_map;
12749 elf_tdata (abfd)->segment_map = m;
12750 }
7f266840
DJ		 12751 }
12752
b294bdf8
MM		 12753 /* Also call the generic arm routine. */
12754 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 12755}
12756
95720a86
DJ		 12757/* Return address for Ith PLT stub in section PLT, for relocation REL
12758 or (bfd_vma) -1 if it should not be included. */
12759
12760static bfd_vma
12761elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
12762 const arelent *rel ATTRIBUTE_UNUSED)
12763{
12764 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
12765}
12766
12767
8029a119 12768#undef elf32_bed
7f266840
DJ		 12769#define elf32_bed elf32_arm_symbian_bed
12770
12771/* The dynamic sections are not allocated on SymbianOS; the postlinker
12772 will process them and then discard them. */
906e58ca 12773#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 12774#define ELF_DYNAMIC_SEC_FLAGS \
12775 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
12776
00a97672 12777#undef elf_backend_add_symbol_hook
00a97672 12778#undef elf_backend_emit_relocs
c3c76620 12779
906e58ca
NC		 12780#undef bfd_elf32_bfd_link_hash_table_create
12781#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
12782#undef elf_backend_special_sections
12783#define elf_backend_special_sections elf32_arm_symbian_special_sections
12784#undef elf_backend_begin_write_processing
12785#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
12786#undef elf_backend_final_write_processing
12787#define elf_backend_final_write_processing elf32_arm_final_write_processing
12788
12789#undef elf_backend_modify_segment_map
7f266840
DJ		 12790#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
12791
12792/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 12793#undef elf_backend_got_header_size
7f266840
DJ		 12794#define elf_backend_got_header_size 0
12795
12796/* Similarly, there is no .got.plt section. */
906e58ca 12797#undef elf_backend_want_got_plt
7f266840
DJ		 12798#define elf_backend_want_got_plt 0
12799
906e58ca 12800#undef elf_backend_plt_sym_val
95720a86
DJ		 12801#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
12802
906e58ca 12803#undef elf_backend_may_use_rel_p
00a97672 12804#define elf_backend_may_use_rel_p 1
906e58ca 12805#undef elf_backend_may_use_rela_p
00a97672 12806#define elf_backend_may_use_rela_p 0
906e58ca 12807#undef elf_backend_default_use_rela_p
00a97672 12808#define elf_backend_default_use_rela_p 0
906e58ca 12809#undef elf_backend_want_plt_sym
00a97672 12810#define elf_backend_want_plt_sym 0
906e58ca 12811#undef ELF_MAXPAGESIZE
00a97672 12812#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 12813
7f266840 12814#include "elf32-target.h"
GDB Binutils - Deliverables
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