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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
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252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
e6a6bb22 3 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840 231 FALSE, /* partial_inplace */
7f6ab9f8
AM		 232 0x07ff2fff, /* src_mask */
233 0x07ff2fff, /* dst_mask */
7f266840
DJ		 234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840 263
0855e32b 264 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 265 0, /* rightshift */
0855e32b
NS		 266 2, /* size (0 = byte, 1 = short, 2 = long) */
267 32, /* bitsize */
7f266840
DJ		 268 FALSE, /* pc_relative */
269 0, /* bitpos */
0855e32b 270 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 271 bfd_elf_generic_reloc, /* special_function */
0855e32b 272 "R_ARM_TLS_DESC", /* name */
7f266840 273 FALSE, /* partial_inplace */
0855e32b
NS		 274 0xffffffff, /* src_mask */
275 0xffffffff, /* dst_mask */
7f266840
DJ		 276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 296 24, /* bitsize */
7f266840
DJ		 297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 311 24, /* bitsize */
7f266840
DJ		 312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
7f6ab9f8
AM		 318 0x07ff2fff, /* src_mask */
319 0x07ff2fff, /* dst_mask */
7f266840
DJ		 320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
0855e32b
NS		 1355 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1356 0, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 32, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_bitfield,/* complain_on_overflow */
1362 NULL, /* special_function */
1363 "R_ARM_TLS_GOTDESC", /* name */
1364 TRUE, /* partial_inplace */
1365 0xffffffff, /* src_mask */
1366 0xffffffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 HOWTO (R_ARM_TLS_CALL, /* type */
1370 0, /* rightshift */
1371 2, /* size (0 = byte, 1 = short, 2 = long) */
1372 24, /* bitsize */
1373 FALSE, /* pc_relative */
1374 0, /* bitpos */
1375 complain_overflow_dont,/* complain_on_overflow */
1376 bfd_elf_generic_reloc, /* special_function */
1377 "R_ARM_TLS_CALL", /* name */
1378 FALSE, /* partial_inplace */
1379 0x00ffffff, /* src_mask */
1380 0x00ffffff, /* dst_mask */
1381 FALSE), /* pcrel_offset */
1382
1383 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1384 0, /* rightshift */
1385 2, /* size (0 = byte, 1 = short, 2 = long) */
1386 0, /* bitsize */
1387 FALSE, /* pc_relative */
1388 0, /* bitpos */
1389 complain_overflow_bitfield,/* complain_on_overflow */
1390 bfd_elf_generic_reloc, /* special_function */
1391 "R_ARM_TLS_DESCSEQ", /* name */
1392 FALSE, /* partial_inplace */
1393 0x00000000, /* src_mask */
1394 0x00000000, /* dst_mask */
1395 FALSE), /* pcrel_offset */
1396
1397 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1398 0, /* rightshift */
1399 2, /* size (0 = byte, 1 = short, 2 = long) */
1400 24, /* bitsize */
1401 FALSE, /* pc_relative */
1402 0, /* bitpos */
1403 complain_overflow_dont,/* complain_on_overflow */
1404 bfd_elf_generic_reloc, /* special_function */
1405 "R_ARM_THM_TLS_CALL", /* name */
1406 FALSE, /* partial_inplace */
1407 0x07ff07ff, /* src_mask */
1408 0x07ff07ff, /* dst_mask */
1409 FALSE), /* pcrel_offset */
c19d1205
ZW		 1410
1411 HOWTO (R_ARM_PLT32_ABS, /* type */
1412 0, /* rightshift */
1413 2, /* size (0 = byte, 1 = short, 2 = long) */
1414 32, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 bfd_elf_generic_reloc, /* special_function */
1419 "R_ARM_PLT32_ABS", /* name */
1420 FALSE, /* partial_inplace */
1421 0xffffffff, /* src_mask */
1422 0xffffffff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424
1425 HOWTO (R_ARM_GOT_ABS, /* type */
1426 0, /* rightshift */
1427 2, /* size (0 = byte, 1 = short, 2 = long) */
1428 32, /* bitsize */
1429 FALSE, /* pc_relative */
1430 0, /* bitpos */
1431 complain_overflow_dont,/* complain_on_overflow */
1432 bfd_elf_generic_reloc, /* special_function */
1433 "R_ARM_GOT_ABS", /* name */
1434 FALSE, /* partial_inplace */
1435 0xffffffff, /* src_mask */
1436 0xffffffff, /* dst_mask */
1437 FALSE), /* pcrel_offset */
1438
1439 HOWTO (R_ARM_GOT_PREL, /* type */
1440 0, /* rightshift */
1441 2, /* size (0 = byte, 1 = short, 2 = long) */
1442 32, /* bitsize */
1443 TRUE, /* pc_relative */
1444 0, /* bitpos */
1445 complain_overflow_dont, /* complain_on_overflow */
1446 bfd_elf_generic_reloc, /* special_function */
1447 "R_ARM_GOT_PREL", /* name */
1448 FALSE, /* partial_inplace */
1449 0xffffffff, /* src_mask */
1450 0xffffffff, /* dst_mask */
1451 TRUE), /* pcrel_offset */
1452
1453 HOWTO (R_ARM_GOT_BREL12, /* type */
1454 0, /* rightshift */
1455 2, /* size (0 = byte, 1 = short, 2 = long) */
1456 12, /* bitsize */
1457 FALSE, /* pc_relative */
1458 0, /* bitpos */
1459 complain_overflow_bitfield,/* complain_on_overflow */
1460 bfd_elf_generic_reloc, /* special_function */
1461 "R_ARM_GOT_BREL12", /* name */
1462 FALSE, /* partial_inplace */
1463 0x00000fff, /* src_mask */
1464 0x00000fff, /* dst_mask */
1465 FALSE), /* pcrel_offset */
1466
1467 HOWTO (R_ARM_GOTOFF12, /* type */
1468 0, /* rightshift */
1469 2, /* size (0 = byte, 1 = short, 2 = long) */
1470 12, /* bitsize */
1471 FALSE, /* pc_relative */
1472 0, /* bitpos */
1473 complain_overflow_bitfield,/* complain_on_overflow */
1474 bfd_elf_generic_reloc, /* special_function */
1475 "R_ARM_GOTOFF12", /* name */
1476 FALSE, /* partial_inplace */
1477 0x00000fff, /* src_mask */
1478 0x00000fff, /* dst_mask */
1479 FALSE), /* pcrel_offset */
1480
1481 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1482
1483 /* GNU extension to record C++ vtable member usage */
1484 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1485 0, /* rightshift */
1486 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1487 0, /* bitsize */
ba93b8ac
DJ		 1488 FALSE, /* pc_relative */
1489 0, /* bitpos */
c19d1205
ZW		 1490 complain_overflow_dont, /* complain_on_overflow */
1491 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1492 "R_ARM_GNU_VTENTRY", /* name */
1493 FALSE, /* partial_inplace */
1494 0, /* src_mask */
1495 0, /* dst_mask */
1496 FALSE), /* pcrel_offset */
1497
1498 /* GNU extension to record C++ vtable hierarchy */
1499 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1500 0, /* rightshift */
1501 2, /* size (0 = byte, 1 = short, 2 = long) */
1502 0, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont, /* complain_on_overflow */
1506 NULL, /* special_function */
1507 "R_ARM_GNU_VTINHERIT", /* name */
1508 FALSE, /* partial_inplace */
1509 0, /* src_mask */
1510 0, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512
1513 HOWTO (R_ARM_THM_JUMP11, /* type */
1514 1, /* rightshift */
1515 1, /* size (0 = byte, 1 = short, 2 = long) */
1516 11, /* bitsize */
1517 TRUE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_signed, /* complain_on_overflow */
1520 bfd_elf_generic_reloc, /* special_function */
1521 "R_ARM_THM_JUMP11", /* name */
1522 FALSE, /* partial_inplace */
1523 0x000007ff, /* src_mask */
1524 0x000007ff, /* dst_mask */
1525 TRUE), /* pcrel_offset */
1526
1527 HOWTO (R_ARM_THM_JUMP8, /* type */
1528 1, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 8, /* bitsize */
1531 TRUE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_signed, /* complain_on_overflow */
1534 bfd_elf_generic_reloc, /* special_function */
1535 "R_ARM_THM_JUMP8", /* name */
1536 FALSE, /* partial_inplace */
1537 0x000000ff, /* src_mask */
1538 0x000000ff, /* dst_mask */
1539 TRUE), /* pcrel_offset */
ba93b8ac 1540
c19d1205
ZW		 1541 /* TLS relocations */
1542 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1543 0, /* rightshift */
1544 2, /* size (0 = byte, 1 = short, 2 = long) */
1545 32, /* bitsize */
1546 FALSE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1549 NULL, /* special_function */
1550 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1551 TRUE, /* partial_inplace */
1552 0xffffffff, /* src_mask */
1553 0xffffffff, /* dst_mask */
c19d1205 1554 FALSE), /* pcrel_offset */
ba93b8ac 1555
ba93b8ac
DJ		 1556 HOWTO (R_ARM_TLS_LDM32, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 32, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_bitfield,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_ARM_TLS_LDM32", /* name */
1565 TRUE, /* partial_inplace */
1566 0xffffffff, /* src_mask */
1567 0xffffffff, /* dst_mask */
c19d1205 1568 FALSE), /* pcrel_offset */
ba93b8ac 1569
c19d1205 1570 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 32, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_bitfield,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
c19d1205 1578 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1579 TRUE, /* partial_inplace */
1580 0xffffffff, /* src_mask */
1581 0xffffffff, /* dst_mask */
c19d1205 1582 FALSE), /* pcrel_offset */
ba93b8ac 1583
ba93b8ac
DJ		 1584 HOWTO (R_ARM_TLS_IE32, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 32, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_bitfield,/* complain_on_overflow */
1591 NULL, /* special_function */
1592 "R_ARM_TLS_IE32", /* name */
1593 TRUE, /* partial_inplace */
1594 0xffffffff, /* src_mask */
1595 0xffffffff, /* dst_mask */
c19d1205 1596 FALSE), /* pcrel_offset */
7f266840 1597
c19d1205 1598 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1599 0, /* rightshift */
1600 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1601 32, /* bitsize */
7f266840
DJ		 1602 FALSE, /* pc_relative */
1603 0, /* bitpos */
c19d1205
ZW		 1604 complain_overflow_bitfield,/* complain_on_overflow */
1605 bfd_elf_generic_reloc, /* special_function */
1606 "R_ARM_TLS_LE32", /* name */
1607 TRUE, /* partial_inplace */
1608 0xffffffff, /* src_mask */
1609 0xffffffff, /* dst_mask */
1610 FALSE), /* pcrel_offset */
7f266840 1611
c19d1205
ZW		 1612 HOWTO (R_ARM_TLS_LDO12, /* type */
1613 0, /* rightshift */
1614 2, /* size (0 = byte, 1 = short, 2 = long) */
1615 12, /* bitsize */
1616 FALSE, /* pc_relative */
7f266840 1617 0, /* bitpos */
c19d1205 1618 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1619 bfd_elf_generic_reloc, /* special_function */
c19d1205 1620 "R_ARM_TLS_LDO12", /* name */
7f266840 1621 FALSE, /* partial_inplace */
c19d1205
ZW		 1622 0x00000fff, /* src_mask */
1623 0x00000fff, /* dst_mask */
1624 FALSE), /* pcrel_offset */
7f266840 1625
c19d1205
ZW		 1626 HOWTO (R_ARM_TLS_LE12, /* type */
1627 0, /* rightshift */
1628 2, /* size (0 = byte, 1 = short, 2 = long) */
1629 12, /* bitsize */
1630 FALSE, /* pc_relative */
7f266840 1631 0, /* bitpos */
c19d1205 1632 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1633 bfd_elf_generic_reloc, /* special_function */
c19d1205 1634 "R_ARM_TLS_LE12", /* name */
7f266840 1635 FALSE, /* partial_inplace */
c19d1205
ZW		 1636 0x00000fff, /* src_mask */
1637 0x00000fff, /* dst_mask */
1638 FALSE), /* pcrel_offset */
7f266840 1639
c19d1205 1640 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1641 0, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1643 12, /* bitsize */
1644 FALSE, /* pc_relative */
7f266840 1645 0, /* bitpos */
c19d1205 1646 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1647 bfd_elf_generic_reloc, /* special_function */
c19d1205 1648 "R_ARM_TLS_IE12GP", /* name */
7f266840 1649 FALSE, /* partial_inplace */
c19d1205
ZW		 1650 0x00000fff, /* src_mask */
1651 0x00000fff, /* dst_mask */
1652 FALSE), /* pcrel_offset */
0855e32b 1653
34e77a92 1654 /* 112-127 private relocations. */
0855e32b
NS		 1655 EMPTY_HOWTO (112),
1656 EMPTY_HOWTO (113),
1657 EMPTY_HOWTO (114),
1658 EMPTY_HOWTO (115),
1659 EMPTY_HOWTO (116),
1660 EMPTY_HOWTO (117),
1661 EMPTY_HOWTO (118),
1662 EMPTY_HOWTO (119),
1663 EMPTY_HOWTO (120),
1664 EMPTY_HOWTO (121),
1665 EMPTY_HOWTO (122),
1666 EMPTY_HOWTO (123),
1667 EMPTY_HOWTO (124),
1668 EMPTY_HOWTO (125),
1669 EMPTY_HOWTO (126),
1670 EMPTY_HOWTO (127),
34e77a92
RS		 1671
1672 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1673 EMPTY_HOWTO (128),
1674
1675 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1676 0, /* rightshift */
1677 1, /* size (0 = byte, 1 = short, 2 = long) */
1678 0, /* bitsize */
1679 FALSE, /* pc_relative */
1680 0, /* bitpos */
1681 complain_overflow_bitfield,/* complain_on_overflow */
1682 bfd_elf_generic_reloc, /* special_function */
1683 "R_ARM_THM_TLS_DESCSEQ",/* name */
1684 FALSE, /* partial_inplace */
1685 0x00000000, /* src_mask */
1686 0x00000000, /* dst_mask */
1687 FALSE), /* pcrel_offset */
c19d1205
ZW		 1688};
1689
34e77a92
RS		 1690/* 160 onwards: */
1691static reloc_howto_type elf32_arm_howto_table_2[1] =
1692{
1693 HOWTO (R_ARM_IRELATIVE, /* type */
1694 0, /* rightshift */
1695 2, /* size (0 = byte, 1 = short, 2 = long) */
1696 32, /* bitsize */
1697 FALSE, /* pc_relative */
1698 0, /* bitpos */
1699 complain_overflow_bitfield,/* complain_on_overflow */
1700 bfd_elf_generic_reloc, /* special_function */
1701 "R_ARM_IRELATIVE", /* name */
1702 TRUE, /* partial_inplace */
1703 0xffffffff, /* src_mask */
1704 0xffffffff, /* dst_mask */
1705 FALSE) /* pcrel_offset */
1706};
c19d1205 1707
34e77a92
RS		 1708/* 249-255 extended, currently unused, relocations: */
1709static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1710{
1711 HOWTO (R_ARM_RREL32, /* type */
1712 0, /* rightshift */
1713 0, /* size (0 = byte, 1 = short, 2 = long) */
1714 0, /* bitsize */
1715 FALSE, /* pc_relative */
1716 0, /* bitpos */
1717 complain_overflow_dont,/* complain_on_overflow */
1718 bfd_elf_generic_reloc, /* special_function */
1719 "R_ARM_RREL32", /* name */
1720 FALSE, /* partial_inplace */
1721 0, /* src_mask */
1722 0, /* dst_mask */
1723 FALSE), /* pcrel_offset */
1724
1725 HOWTO (R_ARM_RABS32, /* type */
1726 0, /* rightshift */
1727 0, /* size (0 = byte, 1 = short, 2 = long) */
1728 0, /* bitsize */
1729 FALSE, /* pc_relative */
1730 0, /* bitpos */
1731 complain_overflow_dont,/* complain_on_overflow */
1732 bfd_elf_generic_reloc, /* special_function */
1733 "R_ARM_RABS32", /* name */
1734 FALSE, /* partial_inplace */
1735 0, /* src_mask */
1736 0, /* dst_mask */
1737 FALSE), /* pcrel_offset */
1738
1739 HOWTO (R_ARM_RPC24, /* type */
1740 0, /* rightshift */
1741 0, /* size (0 = byte, 1 = short, 2 = long) */
1742 0, /* bitsize */
1743 FALSE, /* pc_relative */
1744 0, /* bitpos */
1745 complain_overflow_dont,/* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_ARM_RPC24", /* name */
1748 FALSE, /* partial_inplace */
1749 0, /* src_mask */
1750 0, /* dst_mask */
1751 FALSE), /* pcrel_offset */
1752
1753 HOWTO (R_ARM_RBASE, /* type */
1754 0, /* rightshift */
1755 0, /* size (0 = byte, 1 = short, 2 = long) */
1756 0, /* bitsize */
1757 FALSE, /* pc_relative */
1758 0, /* bitpos */
1759 complain_overflow_dont,/* complain_on_overflow */
1760 bfd_elf_generic_reloc, /* special_function */
1761 "R_ARM_RBASE", /* name */
1762 FALSE, /* partial_inplace */
1763 0, /* src_mask */
1764 0, /* dst_mask */
1765 FALSE) /* pcrel_offset */
1766};
1767
1768static reloc_howto_type *
1769elf32_arm_howto_from_type (unsigned int r_type)
1770{
906e58ca 1771 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1772 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1773
34e77a92
RS		 1774 if (r_type == R_ARM_IRELATIVE)
1775 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1776
c19d1205 1777 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1778 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1779 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1780
c19d1205 1781 return NULL;
7f266840
DJ		 1782}
1783
1784static void
1785elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1786 Elf_Internal_Rela * elf_reloc)
1787{
1788 unsigned int r_type;
1789
1790 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1791 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1792}
1793
1794struct elf32_arm_reloc_map
1795 {
1796 bfd_reloc_code_real_type bfd_reloc_val;
1797 unsigned char elf_reloc_val;
1798 };
1799
1800/* All entries in this list must also be present in elf32_arm_howto_table. */
1801static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1802 {
1803 {BFD_RELOC_NONE, R_ARM_NONE},
1804 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1805 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1806 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1807 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1808 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1809 {BFD_RELOC_32, R_ARM_ABS32},
1810 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1811 {BFD_RELOC_8, R_ARM_ABS8},
1812 {BFD_RELOC_16, R_ARM_ABS16},
1813 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1814 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1815 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1816 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1817 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1818 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1821 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1822 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1823 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1824 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1825 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1826 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1827 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1828 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1829 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1830 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1831 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1832 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1833 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1834 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1835 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1836 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1837 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1838 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1839 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1840 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1841 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1842 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1843 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1844 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1845 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1846 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1847 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1848 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1849 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1850 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1851 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1852 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1853 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1854 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1855 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1856 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1858 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1860 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1861 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1862 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1863 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1864 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1865 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1866 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1867 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1868 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1869 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1870 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1871 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1872 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1873 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1874 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1875 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1876 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1877 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1878 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1879 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1880 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1881 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1882 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1883 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1884 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1885 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1886 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1887 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1888 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1889 };
1890
1891static reloc_howto_type *
f1c71a59
ZW		 1892elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1893 bfd_reloc_code_real_type code)
7f266840
DJ		 1894{
1895 unsigned int i;
8029a119 1896
906e58ca 1897 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1898 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1899 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1900
c19d1205 1901 return NULL;
7f266840
DJ		 1902}
1903
157090f7
AM		 1904static reloc_howto_type *
1905elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1906 const char *r_name)
1907{
1908 unsigned int i;
1909
906e58ca 1910 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1911 if (elf32_arm_howto_table_1[i].name != NULL
1912 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1913 return &elf32_arm_howto_table_1[i];
1914
906e58ca 1915 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1916 if (elf32_arm_howto_table_2[i].name != NULL
1917 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1918 return &elf32_arm_howto_table_2[i];
1919
34e77a92
RS		 1920 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1921 if (elf32_arm_howto_table_3[i].name != NULL
1922 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1923 return &elf32_arm_howto_table_3[i];
1924
157090f7
AM		 1925 return NULL;
1926}
1927
906e58ca
NC		 1928/* Support for core dump NOTE sections. */
1929
7f266840 1930static bfd_boolean
f1c71a59 1931elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1932{
1933 int offset;
1934 size_t size;
1935
1936 switch (note->descsz)
1937 {
1938 default:
1939 return FALSE;
1940
8029a119 1941 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1942 /* pr_cursig */
1943 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1944
1945 /* pr_pid */
261b8d08 1946 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1947
1948 /* pr_reg */
1949 offset = 72;
1950 size = 72;
1951
1952 break;
1953 }
1954
1955 /* Make a ".reg/999" section. */
1956 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1957 size, note->descpos + offset);
1958}
1959
1960static bfd_boolean
f1c71a59 1961elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1962{
1963 switch (note->descsz)
1964 {
1965 default:
1966 return FALSE;
1967
8029a119 1968 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1969 elf_tdata (abfd)->core_program
1970 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1971 elf_tdata (abfd)->core_command
1972 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1973 }
1974
1975 /* Note that for some reason, a spurious space is tacked
1976 onto the end of the args in some (at least one anyway)
1977 implementations, so strip it off if it exists. */
7f266840
DJ		 1978 {
1979 char *command = elf_tdata (abfd)->core_command;
1980 int n = strlen (command);
1981
1982 if (0 < n && command[n - 1] == ' ')
1983 command[n - 1] = '\0';
1984 }
1985
1986 return TRUE;
1987}
1988
1989#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1990#define TARGET_LITTLE_NAME "elf32-littlearm"
1991#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1992#define TARGET_BIG_NAME "elf32-bigarm"
1993
1994#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1995#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1996
252b5132
RH		 1997typedef unsigned long int insn32;
1998typedef unsigned short int insn16;
1999
3a4a14e9
PB		 2000/* In lieu of proper flags, assume all EABIv4 or later objects are
2001 interworkable. */
57e8b36a 2002#define INTERWORK_FLAG(abfd) \
3a4a14e9 2003 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2004 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2005 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2006
252b5132
RH		 2007/* The linker script knows the section names for placement.
2008 The entry_names are used to do simple name mangling on the stubs.
2009 Given a function name, and its type, the stub can be found. The
9b485d32 2010 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2011#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2012#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2013
2014#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2015#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2016
c7b8f16e
JB		 2017#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2018#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2019
845b51d6
PB		 2020#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2021#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2022
7413f23f
DJ		 2023#define STUB_ENTRY_NAME "__%s_veneer"
2024
252b5132
RH		 2025/* The name of the dynamic interpreter. This is put in the .interp
2026 section. */
2027#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2028
0855e32b
NS		 2029static const unsigned long tls_trampoline [] =
2030 {
2031 0xe08e0000, /* add r0, lr, r0 */
2032 0xe5901004, /* ldr r1, [r0,#4] */
2033 0xe12fff11, /* bx r1 */
2034 };
2035
2036static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2037 {
2038 0xe52d2004, /* push {r2} */
2039 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2040 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2041 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2042 0xe081100f, /* 2: add r1, pc */
2043 0xe12fff12, /* bx r2 */
2044 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2045 + dl_tlsdesc_lazy_resolver(GOT) */
2046 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2047 };
2048
5e681ec4
PB		 2049#ifdef FOUR_WORD_PLT
2050
252b5132
RH		 2051/* The first entry in a procedure linkage table looks like
2052 this. It is set up so that any shared library function that is
59f2c4e7 2053 called before the relocation has been set up calls the dynamic
9b485d32 2054 linker first. */
e5a52504 2055static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 2056 {
2057 0xe52de004, /* str lr, [sp, #-4]! */
2058 0xe59fe010, /* ldr lr, [pc, #16] */
2059 0xe08fe00e, /* add lr, pc, lr */
2060 0xe5bef008, /* ldr pc, [lr, #8]! */
2061 };
2062
2063/* Subsequent entries in a procedure linkage table look like
2064 this. */
e5a52504 2065static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 2066 {
2067 0xe28fc600, /* add ip, pc, #NN */
2068 0xe28cca00, /* add ip, ip, #NN */
2069 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2070 0x00000000, /* unused */
2071 };
2072
2073#else
2074
5e681ec4
PB		 2075/* The first entry in a procedure linkage table looks like
2076 this. It is set up so that any shared library function that is
2077 called before the relocation has been set up calls the dynamic
2078 linker first. */
e5a52504 2079static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 2080 {
5e681ec4
PB		 2081 0xe52de004, /* str lr, [sp, #-4]! */
2082 0xe59fe004, /* ldr lr, [pc, #4] */
2083 0xe08fe00e, /* add lr, pc, lr */
2084 0xe5bef008, /* ldr pc, [lr, #8]! */
2085 0x00000000, /* &GOT[0] - . */
917583ad 2086 };
252b5132
RH		 2087
2088/* Subsequent entries in a procedure linkage table look like
2089 this. */
e5a52504 2090static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 2091 {
2092 0xe28fc600, /* add ip, pc, #0xNN00000 */
2093 0xe28cca00, /* add ip, ip, #0xNN000 */
2094 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2095 };
2096
2097#endif
252b5132 2098
00a97672
RS		 2099/* The format of the first entry in the procedure linkage table
2100 for a VxWorks executable. */
2101static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2102 {
2103 0xe52dc008, /* str ip,[sp,#-8]! */
2104 0xe59fc000, /* ldr ip,[pc] */
2105 0xe59cf008, /* ldr pc,[ip,#8] */
2106 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2107 };
2108
2109/* The format of subsequent entries in a VxWorks executable. */
2110static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2111 {
2112 0xe59fc000, /* ldr ip,[pc] */
2113 0xe59cf000, /* ldr pc,[ip] */
2114 0x00000000, /* .long @got */
2115 0xe59fc000, /* ldr ip,[pc] */
2116 0xea000000, /* b _PLT */
2117 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2118 };
2119
2120/* The format of entries in a VxWorks shared library. */
2121static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2122 {
2123 0xe59fc000, /* ldr ip,[pc] */
2124 0xe79cf009, /* ldr pc,[ip,r9] */
2125 0x00000000, /* .long @got */
2126 0xe59fc000, /* ldr ip,[pc] */
2127 0xe599f008, /* ldr pc,[r9,#8] */
2128 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2129 };
2130
b7693d02
DJ		 2131/* An initial stub used if the PLT entry is referenced from Thumb code. */
2132#define PLT_THUMB_STUB_SIZE 4
2133static const bfd_vma elf32_arm_plt_thumb_stub [] =
2134 {
2135 0x4778, /* bx pc */
2136 0x46c0 /* nop */
2137 };
2138
e5a52504
MM		 2139/* The entries in a PLT when using a DLL-based target with multiple
2140 address spaces. */
906e58ca 2141static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2142 {
83a358aa 2143 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2144 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2145 };
2146
906e58ca
NC		 2147#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2148#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2149#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2150#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2151#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2152#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2153
461a49ca
DJ		 2154enum stub_insn_type
2155 {
2156 THUMB16_TYPE = 1,
2157 THUMB32_TYPE,
2158 ARM_TYPE,
2159 DATA_TYPE
2160 };
2161
48229727
JB		 2162#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2163/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2164 is inserted in arm_build_one_stub(). */
2165#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2166#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2167#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2168#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2169#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2170#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2171
2172typedef struct
2173{
2174 bfd_vma data;
2175 enum stub_insn_type type;
ebe24dd4 2176 unsigned int r_type;
461a49ca
DJ		 2177 int reloc_addend;
2178} insn_sequence;
2179
fea2b4d6
CL		 2180/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2181 to reach the stub if necessary. */
461a49ca 2182static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2183 {
461a49ca
DJ		 2184 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2185 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2186 };
2187
fea2b4d6
CL		 2188/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2189 available. */
461a49ca 2190static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2191 {
461a49ca
DJ		 2192 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2193 ARM_INSN(0xe12fff1c), /* bx ip */
2194 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2195 };
2196
d3626fb0 2197/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2198static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2199 {
461a49ca
DJ		 2200 THUMB16_INSN(0xb401), /* push {r0} */
2201 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2202 THUMB16_INSN(0x4684), /* mov ip, r0 */
2203 THUMB16_INSN(0xbc01), /* pop {r0} */
2204 THUMB16_INSN(0x4760), /* bx ip */
2205 THUMB16_INSN(0xbf00), /* nop */
2206 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2207 };
2208
d3626fb0
CL		 2209/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2210 allowed. */
2211static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2212 {
2213 THUMB16_INSN(0x4778), /* bx pc */
2214 THUMB16_INSN(0x46c0), /* nop */
2215 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2216 ARM_INSN(0xe12fff1c), /* bx ip */
2217 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2218 };
2219
fea2b4d6
CL		 2220/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2221 available. */
461a49ca 2222static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2223 {
461a49ca
DJ		 2224 THUMB16_INSN(0x4778), /* bx pc */
2225 THUMB16_INSN(0x46c0), /* nop */
2226 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2227 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2228 };
2229
fea2b4d6
CL		 2230/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2231 one, when the destination is close enough. */
461a49ca 2232static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2233 {
461a49ca
DJ		 2234 THUMB16_INSN(0x4778), /* bx pc */
2235 THUMB16_INSN(0x46c0), /* nop */
2236 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2237 };
2238
cf3eccff 2239/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2240 blx to reach the stub if necessary. */
cf3eccff 2241static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2242 {
9ae92b05 2243 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
461a49ca
DJ		 2244 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2245 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2246 };
2247
cf3eccff
DJ		 2248/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2249 blx to reach the stub if necessary. We can not add into pc;
2250 it is not guaranteed to mode switch (different in ARMv6 and
2251 ARMv7). */
2252static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2253 {
9ae92b05 2254 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
cf3eccff
DJ		 2255 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2256 ARM_INSN(0xe12fff1c), /* bx ip */
2257 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2258 };
2259
ebe24dd4
CL		 2260/* V4T ARM -> ARM long branch stub, PIC. */
2261static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2262 {
2263 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2264 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2265 ARM_INSN(0xe12fff1c), /* bx ip */
2266 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2267 };
2268
2269/* V4T Thumb -> ARM long branch stub, PIC. */
2270static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2271 {
2272 THUMB16_INSN(0x4778), /* bx pc */
2273 THUMB16_INSN(0x46c0), /* nop */
2274 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2275 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2276 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2277 };
2278
d3626fb0
CL		 2279/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2280 architectures. */
ebe24dd4
CL		 2281static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2282 {
2283 THUMB16_INSN(0xb401), /* push {r0} */
2284 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2285 THUMB16_INSN(0x46fc), /* mov ip, pc */
2286 THUMB16_INSN(0x4484), /* add ip, r0 */
2287 THUMB16_INSN(0xbc01), /* pop {r0} */
2288 THUMB16_INSN(0x4760), /* bx ip */
2289 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2290 };
2291
d3626fb0
CL		 2292/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2293 allowed. */
2294static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2295 {
2296 THUMB16_INSN(0x4778), /* bx pc */
2297 THUMB16_INSN(0x46c0), /* nop */
2298 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2299 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2300 ARM_INSN(0xe12fff1c), /* bx ip */
2301 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2302 };
2303
0855e32b
NS		 2304/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2305 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2306static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2307{
2308 ARM_INSN(0xe59f1000), /* ldr r1, [pc] */
2309 ARM_INSN(0xe08ff001), /* add pc, pc, r1 */
2310 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2311};
2312
2313/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2314 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2315static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2316{
2317 THUMB16_INSN(0x4778), /* bx pc */
2318 THUMB16_INSN(0x46c0), /* nop */
2319 ARM_INSN(0xe59f1000), /* ldr r1, [pc, #0] */
2320 ARM_INSN(0xe081f00f), /* add pc, r1, pc */
2321 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2322};
2323
48229727
JB		 2324/* Cortex-A8 erratum-workaround stubs. */
2325
2326/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2327 can't use a conditional branch to reach this stub). */
2328
2329static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2330 {
2331 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2332 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2333 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2334 };
2335
2336/* Stub used for b.w and bl.w instructions. */
2337
2338static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2339 {
2340 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2341 };
2342
2343static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2344 {
2345 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2346 };
2347
2348/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2349 instruction (which switches to ARM mode) to point to this stub. Jump to the
2350 real destination using an ARM-mode branch. */
2351
2352static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2353 {
2354 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2355 };
2356
9553db3c
NC		 2357/* For each section group there can be a specially created linker section
2358 to hold the stubs for that group. The name of the stub section is based
2359 upon the name of another section within that group with the suffix below
2360 applied.
2361
2362 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2363 create what appeared to be a linker stub section when it actually
2364 contained user code/data. For example, consider this fragment:
2365
2366 const char * stubborn_problems[] = { "np" };
2367
2368 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2369 section called:
2370
2371 .data.rel.local.stubborn_problems
2372
2373 This then causes problems in arm32_arm_build_stubs() as it triggers:
2374
2375 // Ignore non-stub sections.
2376 if (!strstr (stub_sec->name, STUB_SUFFIX))
2377 continue;
2378
2379 And so the section would be ignored instead of being processed. Hence
2380 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2381 C identifier. */
2382#define STUB_SUFFIX ".__stub"
906e58ca 2383
738a79f6
CL		 2384/* One entry per long/short branch stub defined above. */
2385#define DEF_STUBS \
2386 DEF_STUB(long_branch_any_any) \
2387 DEF_STUB(long_branch_v4t_arm_thumb) \
2388 DEF_STUB(long_branch_thumb_only) \
2389 DEF_STUB(long_branch_v4t_thumb_thumb) \
2390 DEF_STUB(long_branch_v4t_thumb_arm) \
2391 DEF_STUB(short_branch_v4t_thumb_arm) \
2392 DEF_STUB(long_branch_any_arm_pic) \
2393 DEF_STUB(long_branch_any_thumb_pic) \
2394 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2395 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2396 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2397 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2398 DEF_STUB(long_branch_any_tls_pic) \
2399 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
48229727
JB		 2400 DEF_STUB(a8_veneer_b_cond) \
2401 DEF_STUB(a8_veneer_b) \
2402 DEF_STUB(a8_veneer_bl) \
2403 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2404
2405#define DEF_STUB(x) arm_stub_##x,
2406enum elf32_arm_stub_type {
906e58ca 2407 arm_stub_none,
738a79f6 2408 DEF_STUBS
eb7c4339
NS		 2409 /* Note the first a8_veneer type */
2410 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2411};
2412#undef DEF_STUB
2413
2414typedef struct
2415{
d3ce72d0 2416 const insn_sequence* template_sequence;
738a79f6
CL		 2417 int template_size;
2418} stub_def;
2419
2420#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2421static const stub_def stub_definitions[] = {
2422 {NULL, 0},
2423 DEF_STUBS
906e58ca
NC		 2424};
2425
2426struct elf32_arm_stub_hash_entry
2427{
2428 /* Base hash table entry structure. */
2429 struct bfd_hash_entry root;
2430
2431 /* The stub section. */
2432 asection *stub_sec;
2433
2434 /* Offset within stub_sec of the beginning of this stub. */
2435 bfd_vma stub_offset;
2436
2437 /* Given the symbol's value and its section we can determine its final
2438 value when building the stubs (so the stub knows where to jump). */
2439 bfd_vma target_value;
2440 asection *target_section;
2441
48229727
JB		 2442 /* Offset to apply to relocation referencing target_value. */
2443 bfd_vma target_addend;
2444
2445 /* The instruction which caused this stub to be generated (only valid for
2446 Cortex-A8 erratum workaround stubs at present). */
2447 unsigned long orig_insn;
2448
461a49ca 2449 /* The stub type. */
906e58ca 2450 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2451 /* Its encoding size in bytes. */
2452 int stub_size;
2453 /* Its template. */
2454 const insn_sequence *stub_template;
2455 /* The size of the template (number of entries). */
2456 int stub_template_size;
906e58ca
NC		 2457
2458 /* The symbol table entry, if any, that this was derived from. */
2459 struct elf32_arm_link_hash_entry *h;
2460
35fc36a8
RS		 2461 /* Type of branch. */
2462 enum arm_st_branch_type branch_type;
906e58ca
NC		 2463
2464 /* Where this stub is being called from, or, in the case of combined
2465 stub sections, the first input section in the group. */
2466 asection *id_sec;
7413f23f
DJ		 2467
2468 /* The name for the local symbol at the start of this stub. The
2469 stub name in the hash table has to be unique; this does not, so
2470 it can be friendlier. */
2471 char *output_name;
906e58ca
NC		 2472};
2473
e489d0ae
PB		 2474/* Used to build a map of a section. This is required for mixed-endian
2475 code/data. */
2476
2477typedef struct elf32_elf_section_map
2478{
2479 bfd_vma vma;
2480 char type;
2481}
2482elf32_arm_section_map;
2483
c7b8f16e
JB		 2484/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2485
2486typedef enum
2487{
2488 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2489 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2490 VFP11_ERRATUM_ARM_VENEER,
2491 VFP11_ERRATUM_THUMB_VENEER
2492}
2493elf32_vfp11_erratum_type;
2494
2495typedef struct elf32_vfp11_erratum_list
2496{
2497 struct elf32_vfp11_erratum_list *next;
2498 bfd_vma vma;
2499 union
2500 {
2501 struct
2502 {
2503 struct elf32_vfp11_erratum_list *veneer;
2504 unsigned int vfp_insn;
2505 } b;
2506 struct
2507 {
2508 struct elf32_vfp11_erratum_list *branch;
2509 unsigned int id;
2510 } v;
2511 } u;
2512 elf32_vfp11_erratum_type type;
2513}
2514elf32_vfp11_erratum_list;
2515
2468f9c9
PB		 2516typedef enum
2517{
2518 DELETE_EXIDX_ENTRY,
2519 INSERT_EXIDX_CANTUNWIND_AT_END
2520}
2521arm_unwind_edit_type;
2522
2523/* A (sorted) list of edits to apply to an unwind table. */
2524typedef struct arm_unwind_table_edit
2525{
2526 arm_unwind_edit_type type;
2527 /* Note: we sometimes want to insert an unwind entry corresponding to a
2528 section different from the one we're currently writing out, so record the
2529 (text) section this edit relates to here. */
2530 asection *linked_section;
2531 unsigned int index;
2532 struct arm_unwind_table_edit *next;
2533}
2534arm_unwind_table_edit;
2535
8e3de13a 2536typedef struct _arm_elf_section_data
e489d0ae 2537{
2468f9c9 2538 /* Information about mapping symbols. */
e489d0ae 2539 struct bfd_elf_section_data elf;
8e3de13a 2540 unsigned int mapcount;
c7b8f16e 2541 unsigned int mapsize;
e489d0ae 2542 elf32_arm_section_map *map;
2468f9c9 2543 /* Information about CPU errata. */
c7b8f16e
JB		 2544 unsigned int erratumcount;
2545 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2546 /* Information about unwind tables. */
2547 union
2548 {
2549 /* Unwind info attached to a text section. */
2550 struct
2551 {
2552 asection *arm_exidx_sec;
2553 } text;
2554
2555 /* Unwind info attached to an .ARM.exidx section. */
2556 struct
2557 {
2558 arm_unwind_table_edit *unwind_edit_list;
2559 arm_unwind_table_edit *unwind_edit_tail;
2560 } exidx;
2561 } u;
8e3de13a
NC		 2562}
2563_arm_elf_section_data;
e489d0ae
PB		 2564
2565#define elf32_arm_section_data(sec) \
8e3de13a 2566 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2567
48229727
JB		 2568/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2569 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2570 so may be created multiple times: we use an array of these entries whilst
2571 relaxing which we can refresh easily, then create stubs for each potentially
2572 erratum-triggering instruction once we've settled on a solution. */
2573
2574struct a8_erratum_fix {
2575 bfd *input_bfd;
2576 asection *section;
2577 bfd_vma offset;
2578 bfd_vma addend;
2579 unsigned long orig_insn;
2580 char *stub_name;
2581 enum elf32_arm_stub_type stub_type;
35fc36a8 2582 enum arm_st_branch_type branch_type;
48229727
JB		 2583};
2584
2585/* A table of relocs applied to branches which might trigger Cortex-A8
2586 erratum. */
2587
2588struct a8_erratum_reloc {
2589 bfd_vma from;
2590 bfd_vma destination;
92750f34
DJ		 2591 struct elf32_arm_link_hash_entry *hash;
2592 const char *sym_name;
48229727 2593 unsigned int r_type;
35fc36a8 2594 enum arm_st_branch_type branch_type;
48229727
JB		 2595 bfd_boolean non_a8_stub;
2596};
2597
ba93b8ac
DJ		 2598/* The size of the thread control block. */
2599#define TCB_SIZE 8
2600
34e77a92
RS		 2601/* ARM-specific information about a PLT entry, over and above the usual
2602 gotplt_union. */
2603struct arm_plt_info {
2604 /* We reference count Thumb references to a PLT entry separately,
2605 so that we can emit the Thumb trampoline only if needed. */
2606 bfd_signed_vma thumb_refcount;
2607
2608 /* Some references from Thumb code may be eliminated by BL->BLX
2609 conversion, so record them separately. */
2610 bfd_signed_vma maybe_thumb_refcount;
2611
2612 /* How many of the recorded PLT accesses were from non-call relocations.
2613 This information is useful when deciding whether anything takes the
2614 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2615 non-call references to the function should resolve directly to the
2616 real runtime target. */
2617 unsigned int noncall_refcount;
2618
2619 /* Since PLT entries have variable size if the Thumb prologue is
2620 used, we need to record the index into .got.plt instead of
2621 recomputing it from the PLT offset. */
2622 bfd_signed_vma got_offset;
2623};
2624
2625/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2626struct arm_local_iplt_info {
2627 /* The information that is usually found in the generic ELF part of
2628 the hash table entry. */
2629 union gotplt_union root;
2630
2631 /* The information that is usually found in the ARM-specific part of
2632 the hash table entry. */
2633 struct arm_plt_info arm;
2634
2635 /* A list of all potential dynamic relocations against this symbol. */
2636 struct elf_dyn_relocs *dyn_relocs;
2637};
2638
0ffa91dd 2639struct elf_arm_obj_tdata
ba93b8ac
DJ		 2640{
2641 struct elf_obj_tdata root;
2642
2643 /* tls_type for each local got entry. */
2644 char *local_got_tls_type;
ee065d83 2645
0855e32b
NS		 2646 /* GOTPLT entries for TLS descriptors. */
2647 bfd_vma *local_tlsdesc_gotent;
2648
34e77a92
RS		 2649 /* Information for local symbols that need entries in .iplt. */
2650 struct arm_local_iplt_info **local_iplt;
2651
bf21ed78
MS		 2652 /* Zero to warn when linking objects with incompatible enum sizes. */
2653 int no_enum_size_warning;
a9dc9481
JM		 2654
2655 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2656 int no_wchar_size_warning;
ba93b8ac
DJ		 2657};
2658
0ffa91dd
NC		 2659#define elf_arm_tdata(bfd) \
2660 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2661
0ffa91dd
NC		 2662#define elf32_arm_local_got_tls_type(bfd) \
2663 (elf_arm_tdata (bfd)->local_got_tls_type)
2664
0855e32b
NS		 2665#define elf32_arm_local_tlsdesc_gotent(bfd) \
2666 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2667
34e77a92
RS		 2668#define elf32_arm_local_iplt(bfd) \
2669 (elf_arm_tdata (bfd)->local_iplt)
2670
0ffa91dd
NC		 2671#define is_arm_elf(bfd) \
2672 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2673 && elf_tdata (bfd) != NULL \
4dfe6ac6 2674 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2675
2676static bfd_boolean
2677elf32_arm_mkobject (bfd *abfd)
2678{
0ffa91dd 2679 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2680 ARM_ELF_DATA);
ba93b8ac
DJ		 2681}
2682
ba93b8ac
DJ		 2683#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2684
ba96a88f 2685/* Arm ELF linker hash entry. */
252b5132 2686struct elf32_arm_link_hash_entry
917583ad
NC		 2687 {
2688 struct elf_link_hash_entry root;
252b5132 2689
0bdcacaf
RS		 2690 /* Track dynamic relocs copied for this symbol. */
2691 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2692
34e77a92
RS		 2693 /* ARM-specific PLT information. */
2694 struct arm_plt_info plt;
ba93b8ac
DJ		 2695
2696#define GOT_UNKNOWN 0
2697#define GOT_NORMAL 1
2698#define GOT_TLS_GD 2
2699#define GOT_TLS_IE 4
0855e32b
NS		 2700#define GOT_TLS_GDESC 8
2701#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
34e77a92
RS		 2702 unsigned int tls_type : 8;
2703
2704 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2705 unsigned int is_iplt : 1;
2706
2707 unsigned int unused : 23;
a4fd1a8e 2708
0855e32b
NS		 2709 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2710 starting at the end of the jump table. */
2711 bfd_vma tlsdesc_got;
2712
a4fd1a8e
PB		 2713 /* The symbol marking the real symbol location for exported thumb
2714 symbols with Arm stubs. */
2715 struct elf_link_hash_entry *export_glue;
906e58ca 2716
da5938a2 2717 /* A pointer to the most recently used stub hash entry against this
8029a119 2718 symbol. */
da5938a2 2719 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2720 };
252b5132 2721
252b5132 2722/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2723#define elf32_arm_link_hash_traverse(table, func, info) \
2724 (elf_link_hash_traverse \
2725 (&(table)->root, \
b7693d02 2726 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2727 (info)))
2728
2729/* Get the ARM elf linker hash table from a link_info structure. */
2730#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2731 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2732 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2733
906e58ca
NC		 2734#define arm_stub_hash_lookup(table, string, create, copy) \
2735 ((struct elf32_arm_stub_hash_entry *) \
2736 bfd_hash_lookup ((table), (string), (create), (copy)))
2737
21d799b5
NC		 2738/* Array to keep track of which stub sections have been created, and
2739 information on stub grouping. */
2740struct map_stub
2741{
2742 /* This is the section to which stubs in the group will be
2743 attached. */
2744 asection *link_sec;
2745 /* The stub section. */
2746 asection *stub_sec;
2747};
2748
0855e32b
NS		 2749#define elf32_arm_compute_jump_table_size(htab) \
2750 ((htab)->next_tls_desc_index * 4)
2751
9b485d32 2752/* ARM ELF linker hash table. */
252b5132 2753struct elf32_arm_link_hash_table
906e58ca
NC		 2754{
2755 /* The main hash table. */
2756 struct elf_link_hash_table root;
252b5132 2757
906e58ca
NC		 2758 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2759 bfd_size_type thumb_glue_size;
252b5132 2760
906e58ca
NC		 2761 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2762 bfd_size_type arm_glue_size;
252b5132 2763
906e58ca
NC		 2764 /* The size in bytes of section containing the ARMv4 BX veneers. */
2765 bfd_size_type bx_glue_size;
845b51d6 2766
906e58ca
NC		 2767 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2768 veneer has been populated. */
2769 bfd_vma bx_glue_offset[15];
845b51d6 2770
906e58ca
NC		 2771 /* The size in bytes of the section containing glue for VFP11 erratum
2772 veneers. */
2773 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2774
48229727
JB		 2775 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2776 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2777 elf32_arm_write_section(). */
2778 struct a8_erratum_fix *a8_erratum_fixes;
2779 unsigned int num_a8_erratum_fixes;
2780
906e58ca
NC		 2781 /* An arbitrary input BFD chosen to hold the glue sections. */
2782 bfd * bfd_of_glue_owner;
ba96a88f 2783
906e58ca
NC		 2784 /* Nonzero to output a BE8 image. */
2785 int byteswap_code;
e489d0ae 2786
906e58ca
NC		 2787 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2788 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2789 int target1_is_rel;
9c504268 2790
906e58ca
NC		 2791 /* The relocation to use for R_ARM_TARGET2 relocations. */
2792 int target2_reloc;
eb043451 2793
906e58ca
NC		 2794 /* 0 = Ignore R_ARM_V4BX.
2795 1 = Convert BX to MOV PC.
2796 2 = Generate v4 interworing stubs. */
2797 int fix_v4bx;
319850b4 2798
48229727
JB		 2799 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2800 int fix_cortex_a8;
2801
2de70689
MGD		 2802 /* Whether we should fix the ARM1176 BLX immediate issue. */
2803 int fix_arm1176;
2804
906e58ca
NC		 2805 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2806 int use_blx;
33bfe774 2807
906e58ca
NC		 2808 /* What sort of code sequences we should look for which may trigger the
2809 VFP11 denorm erratum. */
2810 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2811
906e58ca
NC		 2812 /* Global counter for the number of fixes we have emitted. */
2813 int num_vfp11_fixes;
c7b8f16e 2814
906e58ca
NC		 2815 /* Nonzero to force PIC branch veneers. */
2816 int pic_veneer;
27e55c4d 2817
906e58ca
NC		 2818 /* The number of bytes in the initial entry in the PLT. */
2819 bfd_size_type plt_header_size;
e5a52504 2820
906e58ca
NC		 2821 /* The number of bytes in the subsequent PLT etries. */
2822 bfd_size_type plt_entry_size;
e5a52504 2823
906e58ca
NC		 2824 /* True if the target system is VxWorks. */
2825 int vxworks_p;
00a97672 2826
906e58ca
NC		 2827 /* True if the target system is Symbian OS. */
2828 int symbian_p;
e5a52504 2829
906e58ca
NC		 2830 /* True if the target uses REL relocations. */
2831 int use_rel;
4e7fd91e 2832
0855e32b
NS		 2833 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2834 bfd_vma next_tls_desc_index;
2835
2836 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2837 bfd_vma num_tls_desc;
2838
906e58ca 2839 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2840 asection *sdynbss;
2841 asection *srelbss;
5e681ec4 2842
906e58ca
NC		 2843 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2844 asection *srelplt2;
00a97672 2845
0855e32b
NS		 2846 /* The offset into splt of the PLT entry for the TLS descriptor
2847 resolver. Special values are 0, if not necessary (or not found
2848 to be necessary yet), and -1 if needed but not determined
2849 yet. */
2850 bfd_vma dt_tlsdesc_plt;
2851
2852 /* The offset into sgot of the GOT entry used by the PLT entry
2853 above. */
2854 bfd_vma dt_tlsdesc_got;
2855
2856 /* Offset in .plt section of tls_arm_trampoline. */
2857 bfd_vma tls_trampoline;
2858
906e58ca
NC		 2859 /* Data for R_ARM_TLS_LDM32 relocations. */
2860 union
2861 {
2862 bfd_signed_vma refcount;
2863 bfd_vma offset;
2864 } tls_ldm_got;
b7693d02 2865
87d72d41
AM		 2866 /* Small local sym cache. */
2867 struct sym_cache sym_cache;
906e58ca
NC		 2868
2869 /* For convenience in allocate_dynrelocs. */
2870 bfd * obfd;
2871
0855e32b
NS		 2872 /* The amount of space used by the reserved portion of the sgotplt
2873 section, plus whatever space is used by the jump slots. */
2874 bfd_vma sgotplt_jump_table_size;
2875
906e58ca
NC		 2876 /* The stub hash table. */
2877 struct bfd_hash_table stub_hash_table;
2878
2879 /* Linker stub bfd. */
2880 bfd *stub_bfd;
2881
2882 /* Linker call-backs. */
2883 asection * (*add_stub_section) (const char *, asection *);
2884 void (*layout_sections_again) (void);
2885
2886 /* Array to keep track of which stub sections have been created, and
2887 information on stub grouping. */
21d799b5 2888 struct map_stub *stub_group;
906e58ca 2889
fe33d2fa
CL		 2890 /* Number of elements in stub_group. */
2891 int top_id;
2892
906e58ca
NC		 2893 /* Assorted information used by elf32_arm_size_stubs. */
2894 unsigned int bfd_count;
2895 int top_index;
2896 asection **input_list;
2897};
252b5132 2898
780a67af
NC		 2899/* Create an entry in an ARM ELF linker hash table. */
2900
2901static struct bfd_hash_entry *
57e8b36a
NC		 2902elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2903 struct bfd_hash_table * table,
2904 const char * string)
780a67af
NC		 2905{
2906 struct elf32_arm_link_hash_entry * ret =
2907 (struct elf32_arm_link_hash_entry *) entry;
2908
2909 /* Allocate the structure if it has not already been allocated by a
2910 subclass. */
906e58ca 2911 if (ret == NULL)
21d799b5
NC		 2912 ret = (struct elf32_arm_link_hash_entry *)
2913 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2914 if (ret == NULL)
780a67af
NC		 2915 return (struct bfd_hash_entry *) ret;
2916
2917 /* Call the allocation method of the superclass. */
2918 ret = ((struct elf32_arm_link_hash_entry *)
2919 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2920 table, string));
57e8b36a 2921 if (ret != NULL)
b7693d02 2922 {
0bdcacaf 2923 ret->dyn_relocs = NULL;
ba93b8ac 2924 ret->tls_type = GOT_UNKNOWN;
0855e32b 2925 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 2926 ret->plt.thumb_refcount = 0;
2927 ret->plt.maybe_thumb_refcount = 0;
2928 ret->plt.noncall_refcount = 0;
2929 ret->plt.got_offset = -1;
2930 ret->is_iplt = FALSE;
a4fd1a8e 2931 ret->export_glue = NULL;
906e58ca
NC		 2932
2933 ret->stub_cache = NULL;
b7693d02 2934 }
780a67af
NC		 2935
2936 return (struct bfd_hash_entry *) ret;
2937}
2938
34e77a92
RS		 2939/* Ensure that we have allocated bookkeeping structures for ABFD's local
2940 symbols. */
2941
2942static bfd_boolean
2943elf32_arm_allocate_local_sym_info (bfd *abfd)
2944{
2945 if (elf_local_got_refcounts (abfd) == NULL)
2946 {
2947 bfd_size_type num_syms;
2948 bfd_size_type size;
2949 char *data;
2950
2951 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
2952 size = num_syms * (sizeof (bfd_signed_vma)
2953 + sizeof (struct arm_local_iplt_info *)
2954 + sizeof (bfd_vma)
2955 + sizeof (char));
2956 data = bfd_zalloc (abfd, size);
2957 if (data == NULL)
2958 return FALSE;
2959
2960 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
2961 data += num_syms * sizeof (bfd_signed_vma);
2962
2963 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
2964 data += num_syms * sizeof (struct arm_local_iplt_info *);
2965
2966 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
2967 data += num_syms * sizeof (bfd_vma);
2968
2969 elf32_arm_local_got_tls_type (abfd) = data;
2970 }
2971 return TRUE;
2972}
2973
2974/* Return the .iplt information for local symbol R_SYMNDX, which belongs
2975 to input bfd ABFD. Create the information if it doesn't already exist.
2976 Return null if an allocation fails. */
2977
2978static struct arm_local_iplt_info *
2979elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
2980{
2981 struct arm_local_iplt_info **ptr;
2982
2983 if (!elf32_arm_allocate_local_sym_info (abfd))
2984 return NULL;
2985
2986 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
2987 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
2988 if (*ptr == NULL)
2989 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
2990 return *ptr;
2991}
2992
2993/* Try to obtain PLT information for the symbol with index R_SYMNDX
2994 in ABFD's symbol table. If the symbol is global, H points to its
2995 hash table entry, otherwise H is null.
2996
2997 Return true if the symbol does have PLT information. When returning
2998 true, point *ROOT_PLT at the target-independent reference count/offset
2999 union and *ARM_PLT at the ARM-specific information. */
3000
3001static bfd_boolean
3002elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3003 unsigned long r_symndx, union gotplt_union **root_plt,
3004 struct arm_plt_info **arm_plt)
3005{
3006 struct arm_local_iplt_info *local_iplt;
3007
3008 if (h != NULL)
3009 {
3010 *root_plt = &h->root.plt;
3011 *arm_plt = &h->plt;
3012 return TRUE;
3013 }
3014
3015 if (elf32_arm_local_iplt (abfd) == NULL)
3016 return FALSE;
3017
3018 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3019 if (local_iplt == NULL)
3020 return FALSE;
3021
3022 *root_plt = &local_iplt->root;
3023 *arm_plt = &local_iplt->arm;
3024 return TRUE;
3025}
3026
3027/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3028 before it. */
3029
3030static bfd_boolean
3031elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3032 struct arm_plt_info *arm_plt)
3033{
3034 struct elf32_arm_link_hash_table *htab;
3035
3036 htab = elf32_arm_hash_table (info);
3037 return (arm_plt->thumb_refcount != 0
3038 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3039}
3040
3041/* Return a pointer to the head of the dynamic reloc list that should
3042 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3043 ABFD's symbol table. Return null if an error occurs. */
3044
3045static struct elf_dyn_relocs **
3046elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3047 Elf_Internal_Sym *isym)
3048{
3049 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3050 {
3051 struct arm_local_iplt_info *local_iplt;
3052
3053 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3054 if (local_iplt == NULL)
3055 return NULL;
3056 return &local_iplt->dyn_relocs;
3057 }
3058 else
3059 {
3060 /* Track dynamic relocs needed for local syms too.
3061 We really need local syms available to do this
3062 easily. Oh well. */
3063 asection *s;
3064 void *vpp;
3065
3066 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3067 if (s == NULL)
3068 abort ();
3069
3070 vpp = &elf_section_data (s)->local_dynrel;
3071 return (struct elf_dyn_relocs **) vpp;
3072 }
3073}
3074
906e58ca
NC		 3075/* Initialize an entry in the stub hash table. */
3076
3077static struct bfd_hash_entry *
3078stub_hash_newfunc (struct bfd_hash_entry *entry,
3079 struct bfd_hash_table *table,
3080 const char *string)
3081{
3082 /* Allocate the structure if it has not already been allocated by a
3083 subclass. */
3084 if (entry == NULL)
3085 {
21d799b5
NC		 3086 entry = (struct bfd_hash_entry *)
3087 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3088 if (entry == NULL)
3089 return entry;
3090 }
3091
3092 /* Call the allocation method of the superclass. */
3093 entry = bfd_hash_newfunc (entry, table, string);
3094 if (entry != NULL)
3095 {
3096 struct elf32_arm_stub_hash_entry *eh;
3097
3098 /* Initialize the local fields. */
3099 eh = (struct elf32_arm_stub_hash_entry *) entry;
3100 eh->stub_sec = NULL;
3101 eh->stub_offset = 0;
3102 eh->target_value = 0;
3103 eh->target_section = NULL;
cedfb179
DK		 3104 eh->target_addend = 0;
3105 eh->orig_insn = 0;
906e58ca 3106 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3107 eh->stub_size = 0;
3108 eh->stub_template = NULL;
3109 eh->stub_template_size = 0;
906e58ca
NC		 3110 eh->h = NULL;
3111 eh->id_sec = NULL;
d8d2f433 3112 eh->output_name = NULL;
906e58ca
NC		 3113 }
3114
3115 return entry;
3116}
3117
00a97672 3118/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3119 shortcuts to them in our hash table. */
3120
3121static bfd_boolean
57e8b36a 3122create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3123{
3124 struct elf32_arm_link_hash_table *htab;
3125
e5a52504 3126 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3127 if (htab == NULL)
3128 return FALSE;
3129
e5a52504
MM		 3130 /* BPABI objects never have a GOT, or associated sections. */
3131 if (htab->symbian_p)
3132 return TRUE;
3133
5e681ec4
PB		 3134 if (! _bfd_elf_create_got_section (dynobj, info))
3135 return FALSE;
3136
5e681ec4
PB		 3137 return TRUE;
3138}
3139
34e77a92
RS		 3140/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3141
3142static bfd_boolean
3143create_ifunc_sections (struct bfd_link_info *info)
3144{
3145 struct elf32_arm_link_hash_table *htab;
3146 const struct elf_backend_data *bed;
3147 bfd *dynobj;
3148 asection *s;
3149 flagword flags;
3150
3151 htab = elf32_arm_hash_table (info);
3152 dynobj = htab->root.dynobj;
3153 bed = get_elf_backend_data (dynobj);
3154 flags = bed->dynamic_sec_flags;
3155
3156 if (htab->root.iplt == NULL)
3157 {
3158 s = bfd_make_section_with_flags (dynobj, ".iplt",
3159 flags | SEC_READONLY | SEC_CODE);
3160 if (s == NULL
3161 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3162 return FALSE;
3163 htab->root.iplt = s;
3164 }
3165
3166 if (htab->root.irelplt == NULL)
3167 {
3168 s = bfd_make_section_with_flags (dynobj, RELOC_SECTION (htab, ".iplt"),
3169 flags | SEC_READONLY);
3170 if (s == NULL
3171 || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
3172 return FALSE;
3173 htab->root.irelplt = s;
3174 }
3175
3176 if (htab->root.igotplt == NULL)
3177 {
3178 s = bfd_make_section_with_flags (dynobj, ".igot.plt", flags);
3179 if (s == NULL
3180 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3181 return FALSE;
3182 htab->root.igotplt = s;
3183 }
3184 return TRUE;
3185}
3186
00a97672
RS		 3187/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3188 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3189 hash table. */
3190
3191static bfd_boolean
57e8b36a 3192elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3193{
3194 struct elf32_arm_link_hash_table *htab;
3195
3196 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3197 if (htab == NULL)
3198 return FALSE;
3199
362d30a1 3200 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3201 return FALSE;
3202
3203 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3204 return FALSE;
3205
5e681ec4
PB		 3206 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
3207 if (!info->shared)
00a97672
RS		 3208 htab->srelbss = bfd_get_section_by_name (dynobj,
3209 RELOC_SECTION (htab, ".bss"));
3210
3211 if (htab->vxworks_p)
3212 {
3213 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3214 return FALSE;
3215
3216 if (info->shared)
3217 {
3218 htab->plt_header_size = 0;
3219 htab->plt_entry_size
3220 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3221 }
3222 else
3223 {
3224 htab->plt_header_size
3225 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3226 htab->plt_entry_size
3227 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3228 }
3229 }
5e681ec4 3230
362d30a1
RS		 3231 if (!htab->root.splt
3232 || !htab->root.srelplt
e5a52504 3233 || !htab->sdynbss
5e681ec4
PB		 3234 || (!info->shared && !htab->srelbss))
3235 abort ();
3236
3237 return TRUE;
3238}
3239
906e58ca
NC		 3240/* Copy the extra info we tack onto an elf_link_hash_entry. */
3241
3242static void
3243elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3244 struct elf_link_hash_entry *dir,
3245 struct elf_link_hash_entry *ind)
3246{
3247 struct elf32_arm_link_hash_entry *edir, *eind;
3248
3249 edir = (struct elf32_arm_link_hash_entry *) dir;
3250 eind = (struct elf32_arm_link_hash_entry *) ind;
3251
0bdcacaf 3252 if (eind->dyn_relocs != NULL)
906e58ca 3253 {
0bdcacaf 3254 if (edir->dyn_relocs != NULL)
906e58ca 3255 {
0bdcacaf
RS		 3256 struct elf_dyn_relocs **pp;
3257 struct elf_dyn_relocs *p;
906e58ca
NC		 3258
3259 /* Add reloc counts against the indirect sym to the direct sym
3260 list. Merge any entries against the same section. */
0bdcacaf 3261 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3262 {
0bdcacaf 3263 struct elf_dyn_relocs *q;
906e58ca 3264
0bdcacaf
RS		 3265 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3266 if (q->sec == p->sec)
906e58ca
NC		 3267 {
3268 q->pc_count += p->pc_count;
3269 q->count += p->count;
3270 *pp = p->next;
3271 break;
3272 }
3273 if (q == NULL)
3274 pp = &p->next;
3275 }
0bdcacaf 3276 *pp = edir->dyn_relocs;
906e58ca
NC		 3277 }
3278
0bdcacaf
RS		 3279 edir->dyn_relocs = eind->dyn_relocs;
3280 eind->dyn_relocs = NULL;
906e58ca
NC		 3281 }
3282
3283 if (ind->root.type == bfd_link_hash_indirect)
3284 {
3285 /* Copy over PLT info. */
34e77a92
RS		 3286 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3287 eind->plt.thumb_refcount = 0;
3288 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3289 eind->plt.maybe_thumb_refcount = 0;
3290 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3291 eind->plt.noncall_refcount = 0;
3292
3293 /* We should only allocate a function to .iplt once the final
3294 symbol information is known. */
3295 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3296
3297 if (dir->got.refcount <= 0)
3298 {
3299 edir->tls_type = eind->tls_type;
3300 eind->tls_type = GOT_UNKNOWN;
3301 }
3302 }
3303
3304 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3305}
3306
3307/* Create an ARM elf linker hash table. */
3308
3309static struct bfd_link_hash_table *
3310elf32_arm_link_hash_table_create (bfd *abfd)
3311{
3312 struct elf32_arm_link_hash_table *ret;
3313 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3314
21d799b5 3315 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 3316 if (ret == NULL)
3317 return NULL;
3318
3319 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3320 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3321 sizeof (struct elf32_arm_link_hash_entry),
3322 ARM_ELF_DATA))
906e58ca
NC		 3323 {
3324 free (ret);
3325 return NULL;
3326 }
3327
906e58ca
NC		 3328 ret->sdynbss = NULL;
3329 ret->srelbss = NULL;
3330 ret->srelplt2 = NULL;
0855e32b
NS		 3331 ret->dt_tlsdesc_plt = 0;
3332 ret->dt_tlsdesc_got = 0;
3333 ret->tls_trampoline = 0;
3334 ret->next_tls_desc_index = 0;
3335 ret->num_tls_desc = 0;
906e58ca
NC		 3336 ret->thumb_glue_size = 0;
3337 ret->arm_glue_size = 0;
3338 ret->bx_glue_size = 0;
3339 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3340 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3341 ret->vfp11_erratum_glue_size = 0;
3342 ret->num_vfp11_fixes = 0;
48229727 3343 ret->fix_cortex_a8 = 0;
2de70689 3344 ret->fix_arm1176 = 0;
906e58ca
NC		 3345 ret->bfd_of_glue_owner = NULL;
3346 ret->byteswap_code = 0;
3347 ret->target1_is_rel = 0;
3348 ret->target2_reloc = R_ARM_NONE;
3349#ifdef FOUR_WORD_PLT
3350 ret->plt_header_size = 16;
3351 ret->plt_entry_size = 16;
3352#else
3353 ret->plt_header_size = 20;
3354 ret->plt_entry_size = 12;
3355#endif
3356 ret->fix_v4bx = 0;
3357 ret->use_blx = 0;
3358 ret->vxworks_p = 0;
3359 ret->symbian_p = 0;
3360 ret->use_rel = 1;
87d72d41 3361 ret->sym_cache.abfd = NULL;
906e58ca
NC		 3362 ret->obfd = abfd;
3363 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 3364 ret->stub_bfd = NULL;
3365 ret->add_stub_section = NULL;
3366 ret->layout_sections_again = NULL;
3367 ret->stub_group = NULL;
fe33d2fa 3368 ret->top_id = 0;
6cee0a6f
L		 3369 ret->bfd_count = 0;
3370 ret->top_index = 0;
3371 ret->input_list = NULL;
906e58ca
NC		 3372
3373 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3374 sizeof (struct elf32_arm_stub_hash_entry)))
3375 {
3376 free (ret);
3377 return NULL;
3378 }
3379
3380 return &ret->root.root;
3381}
3382
3383/* Free the derived linker hash table. */
3384
3385static void
3386elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3387{
3388 struct elf32_arm_link_hash_table *ret
3389 = (struct elf32_arm_link_hash_table *) hash;
3390
3391 bfd_hash_table_free (&ret->stub_hash_table);
3392 _bfd_generic_link_hash_table_free (hash);
3393}
3394
3395/* Determine if we're dealing with a Thumb only architecture. */
3396
3397static bfd_boolean
3398using_thumb_only (struct elf32_arm_link_hash_table *globals)
3399{
3400 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3401 Tag_CPU_arch);
3402 int profile;
3403
41ed1ee7
DJ		 3404 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3405 return TRUE;
3406
9e3c6df6 3407 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3408 return FALSE;
3409
3410 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3411 Tag_CPU_arch_profile);
3412
3413 return profile == 'M';
3414}
3415
3416/* Determine if we're dealing with a Thumb-2 object. */
3417
3418static bfd_boolean
3419using_thumb2 (struct elf32_arm_link_hash_table *globals)
3420{
3421 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3422 Tag_CPU_arch);
3423 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3424}
3425
cd1dac3d
DG		 3426/* Determine what kind of NOPs are available. */
3427
3428static bfd_boolean
3429arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3430{
3431 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3432 Tag_CPU_arch);
3433 return arch == TAG_CPU_ARCH_V6T2
3434 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3435 || arch == TAG_CPU_ARCH_V7
3436 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3437}
3438
3439static bfd_boolean
3440arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3441{
3442 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3443 Tag_CPU_arch);
9e3c6df6
PB		 3444 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3445 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3446}
3447
f4ac8484
DJ		 3448static bfd_boolean
3449arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3450{
3451 switch (stub_type)
3452 {
fea2b4d6
CL		 3453 case arm_stub_long_branch_thumb_only:
3454 case arm_stub_long_branch_v4t_thumb_arm:
3455 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3456 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3457 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3458 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3459 return TRUE;
3460 case arm_stub_none:
3461 BFD_FAIL ();
3462 return FALSE;
3463 break;
3464 default:
3465 return FALSE;
3466 }
3467}
3468
906e58ca
NC		 3469/* Determine the type of stub needed, if any, for a call. */
3470
3471static enum elf32_arm_stub_type
3472arm_type_of_stub (struct bfd_link_info *info,
3473 asection *input_sec,
3474 const Elf_Internal_Rela *rel,
34e77a92 3475 unsigned char st_type,
35fc36a8 3476 enum arm_st_branch_type *actual_branch_type,
906e58ca 3477 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3478 bfd_vma destination,
3479 asection *sym_sec,
3480 bfd *input_bfd,
3481 const char *name)
906e58ca
NC		 3482{
3483 bfd_vma location;
3484 bfd_signed_vma branch_offset;
3485 unsigned int r_type;
3486 struct elf32_arm_link_hash_table * globals;
3487 int thumb2;
3488 int thumb_only;
3489 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3490 int use_plt = 0;
35fc36a8 3491 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3492 union gotplt_union *root_plt;
3493 struct arm_plt_info *arm_plt;
906e58ca 3494
35fc36a8 3495 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3496 return stub_type;
3497
906e58ca 3498 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3499 if (globals == NULL)
3500 return stub_type;
906e58ca
NC		 3501
3502 thumb_only = using_thumb_only (globals);
3503
3504 thumb2 = using_thumb2 (globals);
3505
3506 /* Determine where the call point is. */
3507 location = (input_sec->output_offset
3508 + input_sec->output_section->vma
3509 + rel->r_offset);
3510
906e58ca
NC		 3511 r_type = ELF32_R_TYPE (rel->r_info);
3512
34e77a92
RS		 3513 /* For TLS call relocs, it is the caller's responsibility to provide
3514 the address of the appropriate trampoline. */
3515 if (r_type != R_ARM_TLS_CALL
3516 && r_type != R_ARM_THM_TLS_CALL
3517 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3518 &root_plt, &arm_plt)
3519 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3520 {
34e77a92 3521 asection *splt;
fe33d2fa 3522
34e77a92
RS		 3523 if (hash == NULL || hash->is_iplt)
3524 splt = globals->root.iplt;
3525 else
3526 splt = globals->root.splt;
3527 if (splt != NULL)
3528 {
3529 use_plt = 1;
3530
3531 /* Note when dealing with PLT entries: the main PLT stub is in
3532 ARM mode, so if the branch is in Thumb mode, another
3533 Thumb->ARM stub will be inserted later just before the ARM
3534 PLT stub. We don't take this extra distance into account
3535 here, because if a long branch stub is needed, we'll add a
3536 Thumb->Arm one and branch directly to the ARM PLT entry
3537 because it avoids spreading offset corrections in several
3538 places. */
3539
3540 destination = (splt->output_section->vma
3541 + splt->output_offset
3542 + root_plt->offset);
3543 st_type = STT_FUNC;
3544 branch_type = ST_BRANCH_TO_ARM;
3545 }
5fa9e92f 3546 }
34e77a92
RS		 3547 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3548 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3549
fe33d2fa
CL		 3550 branch_offset = (bfd_signed_vma)(destination - location);
3551
0855e32b
NS		 3552 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3553 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3554 {
5fa9e92f
CL		 3555 /* Handle cases where:
3556 - this call goes too far (different Thumb/Thumb2 max
3557 distance)
155d87d7
CL		 3558 - it's a Thumb->Arm call and blx is not available, or it's a
3559 Thumb->Arm branch (not bl). A stub is needed in this case,
3560 but only if this call is not through a PLT entry. Indeed,
3561 PLT stubs handle mode switching already.
5fa9e92f 3562 */
906e58ca
NC		 3563 if ((!thumb2
3564 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3565 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3566 || (thumb2
3567 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3568 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3569 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3570 && (((r_type == R_ARM_THM_CALL
3571 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3572 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3573 && !use_plt))
906e58ca 3574 {
35fc36a8 3575 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3576 {
3577 /* Thumb to thumb. */
3578 if (!thumb_only)
3579 {
3580 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3581 /* PIC stubs. */
155d87d7 3582 ? ((globals->use_blx
9553db3c 3583 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3584 /* V5T and above. Stub starts with ARM code, so
3585 we must be able to switch mode before
3586 reaching it, which is only possible for 'bl'
3587 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3588 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3589 /* On V4T, use Thumb code only. */
d3626fb0 3590 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3591
3592 /* non-PIC stubs. */
155d87d7 3593 : ((globals->use_blx
9553db3c 3594 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3595 /* V5T and above. */
3596 ? arm_stub_long_branch_any_any
3597 /* V4T. */
d3626fb0 3598 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3599 }
3600 else
3601 {
3602 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3603 /* PIC stub. */
3604 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3605 /* non-PIC stub. */
3606 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3607 }
3608 }
3609 else
3610 {
3611 /* Thumb to arm. */
c820be07
NC		 3612 if (sym_sec != NULL
3613 && sym_sec->owner != NULL
3614 && !INTERWORK_FLAG (sym_sec->owner))
3615 {
3616 (*_bfd_error_handler)
3617 (_("%B(%s): warning: interworking not enabled.\n"
3618 " first occurrence: %B: Thumb call to ARM"),
3619 sym_sec->owner, input_bfd, name);
3620 }
3621
0855e32b
NS		 3622 stub_type =
3623 (info->shared | globals->pic_veneer)
c2b4a39d 3624 /* PIC stubs. */
0855e32b
NS		 3625 ? (r_type == R_ARM_THM_TLS_CALL
3626 /* TLS PIC stubs */
3627 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3628 : arm_stub_long_branch_v4t_thumb_tls_pic)
3629 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3630 /* V5T PIC and above. */
3631 ? arm_stub_long_branch_any_arm_pic
3632 /* V4T PIC stub. */
3633 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3634
3635 /* non-PIC stubs. */
0855e32b 3636 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3637 /* V5T and above. */
3638 ? arm_stub_long_branch_any_any
3639 /* V4T. */
3640 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3641
3642 /* Handle v4t short branches. */
fea2b4d6 3643 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3644 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3645 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3646 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3647 }
3648 }
3649 }
fe33d2fa
CL		 3650 else if (r_type == R_ARM_CALL
3651 || r_type == R_ARM_JUMP24
0855e32b
NS		 3652 || r_type == R_ARM_PLT32
3653 || r_type == R_ARM_TLS_CALL)
906e58ca 3654 {
35fc36a8 3655 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3656 {
3657 /* Arm to thumb. */
c820be07
NC		 3658
3659 if (sym_sec != NULL
3660 && sym_sec->owner != NULL
3661 && !INTERWORK_FLAG (sym_sec->owner))
3662 {
3663 (*_bfd_error_handler)
3664 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3665 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3666 sym_sec->owner, input_bfd, name);
3667 }
3668
3669 /* We have an extra 2-bytes reach because of
3670 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3671 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3672 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3673 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3674 || (r_type == R_ARM_JUMP24)
3675 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3676 {
3677 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3678 /* PIC stubs. */
ebe24dd4
CL		 3679 ? ((globals->use_blx)
3680 /* V5T and above. */
3681 ? arm_stub_long_branch_any_thumb_pic
3682 /* V4T stub. */
3683 : arm_stub_long_branch_v4t_arm_thumb_pic)
3684
c2b4a39d
CL		 3685 /* non-PIC stubs. */
3686 : ((globals->use_blx)
3687 /* V5T and above. */
3688 ? arm_stub_long_branch_any_any
3689 /* V4T. */
3690 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3691 }
3692 }
3693 else
3694 {
3695 /* Arm to arm. */
3696 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3697 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3698 {
0855e32b
NS		 3699 stub_type =
3700 (info->shared | globals->pic_veneer)
c2b4a39d 3701 /* PIC stubs. */
0855e32b
NS		 3702 ? (r_type == R_ARM_TLS_CALL
3703 /* TLS PIC Stub */
3704 ? arm_stub_long_branch_any_tls_pic
3705 : arm_stub_long_branch_any_arm_pic)
c2b4a39d 3706 /* non-PIC stubs. */
fea2b4d6 3707 : arm_stub_long_branch_any_any;
906e58ca
NC		 3708 }
3709 }
3710 }
3711
fe33d2fa
CL		 3712 /* If a stub is needed, record the actual destination type. */
3713 if (stub_type != arm_stub_none)
35fc36a8 3714 *actual_branch_type = branch_type;
fe33d2fa 3715
906e58ca
NC		 3716 return stub_type;
3717}
3718
3719/* Build a name for an entry in the stub hash table. */
3720
3721static char *
3722elf32_arm_stub_name (const asection *input_section,
3723 const asection *sym_sec,
3724 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3725 const Elf_Internal_Rela *rel,
3726 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3727{
3728 char *stub_name;
3729 bfd_size_type len;
3730
3731 if (hash)
3732 {
fe33d2fa 3733 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3734 stub_name = (char *) bfd_malloc (len);
906e58ca 3735 if (stub_name != NULL)
fe33d2fa 3736 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3737 input_section->id & 0xffffffff,
3738 hash->root.root.root.string,
fe33d2fa
CL		 3739 (int) rel->r_addend & 0xffffffff,
3740 (int) stub_type);
906e58ca
NC		 3741 }
3742 else
3743 {
fe33d2fa 3744 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3745 stub_name = (char *) bfd_malloc (len);
906e58ca 3746 if (stub_name != NULL)
fe33d2fa 3747 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3748 input_section->id & 0xffffffff,
3749 sym_sec->id & 0xffffffff,
0855e32b
NS		 3750 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3751 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3752 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3753 (int) rel->r_addend & 0xffffffff,
3754 (int) stub_type);
906e58ca
NC		 3755 }
3756
3757 return stub_name;
3758}
3759
3760/* Look up an entry in the stub hash. Stub entries are cached because
3761 creating the stub name takes a bit of time. */
3762
3763static struct elf32_arm_stub_hash_entry *
3764elf32_arm_get_stub_entry (const asection *input_section,
3765 const asection *sym_sec,
3766 struct elf_link_hash_entry *hash,
3767 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3768 struct elf32_arm_link_hash_table *htab,
3769 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3770{
3771 struct elf32_arm_stub_hash_entry *stub_entry;
3772 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3773 const asection *id_sec;
3774
3775 if ((input_section->flags & SEC_CODE) == 0)
3776 return NULL;
3777
3778 /* If this input section is part of a group of sections sharing one
3779 stub section, then use the id of the first section in the group.
3780 Stub names need to include a section id, as there may well be
3781 more than one stub used to reach say, printf, and we need to
3782 distinguish between them. */
3783 id_sec = htab->stub_group[input_section->id].link_sec;
3784
3785 if (h != NULL && h->stub_cache != NULL
3786 && h->stub_cache->h == h
fe33d2fa
CL		 3787 && h->stub_cache->id_sec == id_sec
3788 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3789 {
3790 stub_entry = h->stub_cache;
3791 }
3792 else
3793 {
3794 char *stub_name;
3795
fe33d2fa 3796 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3797 if (stub_name == NULL)
3798 return NULL;
3799
3800 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3801 stub_name, FALSE, FALSE);
3802 if (h != NULL)
3803 h->stub_cache = stub_entry;
3804
3805 free (stub_name);
3806 }
3807
3808 return stub_entry;
3809}
3810
48229727
JB		 3811/* Find or create a stub section. Returns a pointer to the stub section, and
3812 the section to which the stub section will be attached (in *LINK_SEC_P).
3813 LINK_SEC_P may be NULL. */
906e58ca 3814
48229727
JB		 3815static asection *
3816elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3817 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3818{
3819 asection *link_sec;
3820 asection *stub_sec;
906e58ca
NC		 3821
3822 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3823 BFD_ASSERT (link_sec != NULL);
906e58ca 3824 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3825
906e58ca
NC		 3826 if (stub_sec == NULL)
3827 {
3828 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3829 if (stub_sec == NULL)
3830 {
3831 size_t namelen;
3832 bfd_size_type len;
3833 char *s_name;
3834
3835 namelen = strlen (link_sec->name);
3836 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3837 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3838 if (s_name == NULL)
3839 return NULL;
3840
3841 memcpy (s_name, link_sec->name, namelen);
3842 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3843 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3844 if (stub_sec == NULL)
3845 return NULL;
3846 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3847 }
3848 htab->stub_group[section->id].stub_sec = stub_sec;
3849 }
48229727
JB		 3850
3851 if (link_sec_p)
3852 *link_sec_p = link_sec;
3853
3854 return stub_sec;
3855}
3856
3857/* Add a new stub entry to the stub hash. Not all fields of the new
3858 stub entry are initialised. */
3859
3860static struct elf32_arm_stub_hash_entry *
3861elf32_arm_add_stub (const char *stub_name,
3862 asection *section,
3863 struct elf32_arm_link_hash_table *htab)
3864{
3865 asection *link_sec;
3866 asection *stub_sec;
3867 struct elf32_arm_stub_hash_entry *stub_entry;
3868
3869 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3870 if (stub_sec == NULL)
3871 return NULL;
906e58ca
NC		 3872
3873 /* Enter this entry into the linker stub hash table. */
3874 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3875 TRUE, FALSE);
3876 if (stub_entry == NULL)
3877 {
3878 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3879 section->owner,
3880 stub_name);
3881 return NULL;
3882 }
3883
3884 stub_entry->stub_sec = stub_sec;
3885 stub_entry->stub_offset = 0;
3886 stub_entry->id_sec = link_sec;
3887
906e58ca
NC		 3888 return stub_entry;
3889}
3890
3891/* Store an Arm insn into an output section not processed by
3892 elf32_arm_write_section. */
3893
3894static void
8029a119
NC		 3895put_arm_insn (struct elf32_arm_link_hash_table * htab,
3896 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3897{
3898 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3899 bfd_putl32 (val, ptr);
3900 else
3901 bfd_putb32 (val, ptr);
3902}
3903
3904/* Store a 16-bit Thumb insn into an output section not processed by
3905 elf32_arm_write_section. */
3906
3907static void
8029a119
NC		 3908put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3909 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3910{
3911 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3912 bfd_putl16 (val, ptr);
3913 else
3914 bfd_putb16 (val, ptr);
3915}
3916
0855e32b
NS		 3917/* If it's possible to change R_TYPE to a more efficient access
3918 model, return the new reloc type. */
3919
3920static unsigned
3921elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
3922 struct elf_link_hash_entry *h)
3923{
3924 int is_local = (h == NULL);
3925
3926 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
3927 return r_type;
3928
3929 /* We do not support relaxations for Old TLS models. */
3930 switch (r_type)
3931 {
3932 case R_ARM_TLS_GOTDESC:
3933 case R_ARM_TLS_CALL:
3934 case R_ARM_THM_TLS_CALL:
3935 case R_ARM_TLS_DESCSEQ:
3936 case R_ARM_THM_TLS_DESCSEQ:
3937 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
3938 }
3939
3940 return r_type;
3941}
3942
48229727
JB		 3943static bfd_reloc_status_type elf32_arm_final_link_relocate
3944 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3945 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 3946 const char *, unsigned char, enum arm_st_branch_type,
3947 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 3948
4563a860
JB		 3949static unsigned int
3950arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
3951{
3952 switch (stub_type)
3953 {
3954 case arm_stub_a8_veneer_b_cond:
3955 case arm_stub_a8_veneer_b:
3956 case arm_stub_a8_veneer_bl:
3957 return 2;
3958
3959 case arm_stub_long_branch_any_any:
3960 case arm_stub_long_branch_v4t_arm_thumb:
3961 case arm_stub_long_branch_thumb_only:
3962 case arm_stub_long_branch_v4t_thumb_thumb:
3963 case arm_stub_long_branch_v4t_thumb_arm:
3964 case arm_stub_short_branch_v4t_thumb_arm:
3965 case arm_stub_long_branch_any_arm_pic:
3966 case arm_stub_long_branch_any_thumb_pic:
3967 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3968 case arm_stub_long_branch_v4t_arm_thumb_pic:
3969 case arm_stub_long_branch_v4t_thumb_arm_pic:
3970 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 3971 case arm_stub_long_branch_any_tls_pic:
3972 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 3973 case arm_stub_a8_veneer_blx:
3974 return 4;
3975
3976 default:
3977 abort (); /* Should be unreachable. */
3978 }
3979}
3980
906e58ca
NC		 3981static bfd_boolean
3982arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3983 void * in_arg)
3984{
48229727 3985#define MAXRELOCS 2
906e58ca 3986 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3987 struct elf32_arm_link_hash_table *globals;
906e58ca 3988 struct bfd_link_info *info;
906e58ca
NC		 3989 asection *stub_sec;
3990 bfd *stub_bfd;
906e58ca
NC		 3991 bfd_byte *loc;
3992 bfd_vma sym_value;
3993 int template_size;
3994 int size;
d3ce72d0 3995 const insn_sequence *template_sequence;
906e58ca 3996 int i;
48229727
JB		 3997 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3998 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3999 int nrelocs = 0;
906e58ca
NC		 4000
4001 /* Massage our args to the form they really have. */
4002 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4003 info = (struct bfd_link_info *) in_arg;
4004
4005 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4006 if (globals == NULL)
4007 return FALSE;
906e58ca 4008
906e58ca
NC		 4009 stub_sec = stub_entry->stub_sec;
4010
4dfe6ac6 4011 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4012 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4013 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4014 return TRUE;
fe33d2fa 4015
906e58ca
NC		 4016 /* Make a note of the offset within the stubs for this entry. */
4017 stub_entry->stub_offset = stub_sec->size;
4018 loc = stub_sec->contents + stub_entry->stub_offset;
4019
4020 stub_bfd = stub_sec->owner;
4021
906e58ca
NC		 4022 /* This is the address of the stub destination. */
4023 sym_value = (stub_entry->target_value
4024 + stub_entry->target_section->output_offset
4025 + stub_entry->target_section->output_section->vma);
4026
d3ce72d0 4027 template_sequence = stub_entry->stub_template;
461a49ca 4028 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4029
4030 size = 0;
461a49ca 4031 for (i = 0; i < template_size; i++)
906e58ca 4032 {
d3ce72d0 4033 switch (template_sequence[i].type)
461a49ca
DJ		 4034 {
4035 case THUMB16_TYPE:
48229727 4036 {
d3ce72d0
NC		 4037 bfd_vma data = (bfd_vma) template_sequence[i].data;
4038 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 4039 {
4040 /* We've borrowed the reloc_addend field to mean we should
4041 insert a condition code into this (Thumb-1 branch)
4042 instruction. See THUMB16_BCOND_INSN. */
4043 BFD_ASSERT ((data & 0xff00) == 0xd000);
4044 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4045 }
fe33d2fa 4046 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4047 size += 2;
4048 }
461a49ca 4049 break;
906e58ca 4050
48229727 4051 case THUMB32_TYPE:
fe33d2fa
CL		 4052 bfd_put_16 (stub_bfd,
4053 (template_sequence[i].data >> 16) & 0xffff,
4054 loc + size);
4055 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4056 loc + size + 2);
d3ce72d0 4057 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 4058 {
4059 stub_reloc_idx[nrelocs] = i;
4060 stub_reloc_offset[nrelocs++] = size;
4061 }
4062 size += 4;
4063 break;
4064
461a49ca 4065 case ARM_TYPE:
fe33d2fa
CL		 4066 bfd_put_32 (stub_bfd, template_sequence[i].data,
4067 loc + size);
461a49ca
DJ		 4068 /* Handle cases where the target is encoded within the
4069 instruction. */
d3ce72d0 4070 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4071 {
48229727
JB		 4072 stub_reloc_idx[nrelocs] = i;
4073 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4074 }
4075 size += 4;
4076 break;
4077
4078 case DATA_TYPE:
d3ce72d0 4079 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4080 stub_reloc_idx[nrelocs] = i;
4081 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4082 size += 4;
4083 break;
4084
4085 default:
4086 BFD_FAIL ();
4087 return FALSE;
4088 }
906e58ca 4089 }
461a49ca 4090
906e58ca
NC		 4091 stub_sec->size += size;
4092
461a49ca
DJ		 4093 /* Stub size has already been computed in arm_size_one_stub. Check
4094 consistency. */
4095 BFD_ASSERT (size == stub_entry->stub_size);
4096
906e58ca 4097 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4098 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4099 sym_value |= 1;
4100
48229727
JB		 4101 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4102 in each stub. */
4103 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4104
48229727 4105 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4106 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4107 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4108 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4109 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4110 {
4111 Elf_Internal_Rela rel;
4112 bfd_boolean unresolved_reloc;
4113 char *error_message;
35fc36a8
RS		 4114 enum arm_st_branch_type branch_type
4115 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4116 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4117 bfd_vma points_to = sym_value + stub_entry->target_addend;
4118
4119 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 4120 rel.r_info = ELF32_R_INFO (0,
4121 template_sequence[stub_reloc_idx[i]].r_type);
4122 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4123
4124 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4125 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4126 template should refer back to the instruction after the original
4127 branch. */
4128 points_to = sym_value;
4129
33c6a8fc
JB		 4130 /* There may be unintended consequences if this is not true. */
4131 BFD_ASSERT (stub_entry->h == NULL);
4132
48229727
JB		 4133 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4134 properly. We should probably use this function unconditionally,
4135 rather than only for certain relocations listed in the enclosing
4136 conditional, for the sake of consistency. */
4137 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4138 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4139 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4140 points_to, info, stub_entry->target_section, "", STT_FUNC,
4141 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4142 &unresolved_reloc, &error_message);
48229727
JB		 4143 }
4144 else
4145 {
fe33d2fa
CL		 4146 Elf_Internal_Rela rel;
4147 bfd_boolean unresolved_reloc;
4148 char *error_message;
4149 bfd_vma points_to = sym_value + stub_entry->target_addend
4150 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4151
4152 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4153 rel.r_info = ELF32_R_INFO (0,
4154 template_sequence[stub_reloc_idx[i]].r_type);
4155 rel.r_addend = 0;
4156
4157 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4158 (template_sequence[stub_reloc_idx[i]].r_type),
4159 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4160 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4161 stub_entry->branch_type,
fe33d2fa
CL		 4162 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4163 &error_message);
48229727 4164 }
906e58ca
NC		 4165
4166 return TRUE;
48229727 4167#undef MAXRELOCS
906e58ca
NC		 4168}
4169
48229727
JB		 4170/* Calculate the template, template size and instruction size for a stub.
4171 Return value is the instruction size. */
906e58ca 4172
48229727
JB		 4173static unsigned int
4174find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4175 const insn_sequence **stub_template,
4176 int *stub_template_size)
906e58ca 4177{
d3ce72d0 4178 const insn_sequence *template_sequence = NULL;
48229727
JB		 4179 int template_size = 0, i;
4180 unsigned int size;
906e58ca 4181
d3ce72d0 4182 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4183 if (stub_template)
4184 *stub_template = template_sequence;
4185
48229727 4186 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4187 if (stub_template_size)
4188 *stub_template_size = template_size;
906e58ca
NC		 4189
4190 size = 0;
461a49ca
DJ		 4191 for (i = 0; i < template_size; i++)
4192 {
d3ce72d0 4193 switch (template_sequence[i].type)
461a49ca
DJ		 4194 {
4195 case THUMB16_TYPE:
4196 size += 2;
4197 break;
4198
4199 case ARM_TYPE:
48229727 4200 case THUMB32_TYPE:
461a49ca
DJ		 4201 case DATA_TYPE:
4202 size += 4;
4203 break;
4204
4205 default:
4206 BFD_FAIL ();
2a229407 4207 return 0;
461a49ca
DJ		 4208 }
4209 }
4210
48229727
JB		 4211 return size;
4212}
4213
4214/* As above, but don't actually build the stub. Just bump offset so
4215 we know stub section sizes. */
4216
4217static bfd_boolean
4218arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4219 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4220{
4221 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4222 const insn_sequence *template_sequence;
48229727
JB		 4223 int template_size, size;
4224
4225 /* Massage our args to the form they really have. */
4226 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4227
4228 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4229 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4230
d3ce72d0 4231 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4232 &template_size);
4233
461a49ca 4234 stub_entry->stub_size = size;
d3ce72d0 4235 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4236 stub_entry->stub_template_size = template_size;
4237
906e58ca
NC		 4238 size = (size + 7) & ~7;
4239 stub_entry->stub_sec->size += size;
461a49ca 4240
906e58ca
NC		 4241 return TRUE;
4242}
4243
4244/* External entry points for sizing and building linker stubs. */
4245
4246/* Set up various things so that we can make a list of input sections
4247 for each output section included in the link. Returns -1 on error,
4248 0 when no stubs will be needed, and 1 on success. */
4249
4250int
4251elf32_arm_setup_section_lists (bfd *output_bfd,
4252 struct bfd_link_info *info)
4253{
4254 bfd *input_bfd;
4255 unsigned int bfd_count;
4256 int top_id, top_index;
4257 asection *section;
4258 asection **input_list, **list;
4259 bfd_size_type amt;
4260 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4261
4dfe6ac6
NC		 4262 if (htab == NULL)
4263 return 0;
906e58ca
NC		 4264 if (! is_elf_hash_table (htab))
4265 return 0;
4266
4267 /* Count the number of input BFDs and find the top input section id. */
4268 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4269 input_bfd != NULL;
4270 input_bfd = input_bfd->link_next)
4271 {
4272 bfd_count += 1;
4273 for (section = input_bfd->sections;
4274 section != NULL;
4275 section = section->next)
4276 {
4277 if (top_id < section->id)
4278 top_id = section->id;
4279 }
4280 }
4281 htab->bfd_count = bfd_count;
4282
4283 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4284 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4285 if (htab->stub_group == NULL)
4286 return -1;
fe33d2fa 4287 htab->top_id = top_id;
906e58ca
NC		 4288
4289 /* We can't use output_bfd->section_count here to find the top output
4290 section index as some sections may have been removed, and
4291 _bfd_strip_section_from_output doesn't renumber the indices. */
4292 for (section = output_bfd->sections, top_index = 0;
4293 section != NULL;
4294 section = section->next)
4295 {
4296 if (top_index < section->index)
4297 top_index = section->index;
4298 }
4299
4300 htab->top_index = top_index;
4301 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4302 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4303 htab->input_list = input_list;
4304 if (input_list == NULL)
4305 return -1;
4306
4307 /* For sections we aren't interested in, mark their entries with a
4308 value we can check later. */
4309 list = input_list + top_index;
4310 do
4311 *list = bfd_abs_section_ptr;
4312 while (list-- != input_list);
4313
4314 for (section = output_bfd->sections;
4315 section != NULL;
4316 section = section->next)
4317 {
4318 if ((section->flags & SEC_CODE) != 0)
4319 input_list[section->index] = NULL;
4320 }
4321
4322 return 1;
4323}
4324
4325/* The linker repeatedly calls this function for each input section,
4326 in the order that input sections are linked into output sections.
4327 Build lists of input sections to determine groupings between which
4328 we may insert linker stubs. */
4329
4330void
4331elf32_arm_next_input_section (struct bfd_link_info *info,
4332 asection *isec)
4333{
4334 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4335
4dfe6ac6
NC		 4336 if (htab == NULL)
4337 return;
4338
906e58ca
NC		 4339 if (isec->output_section->index <= htab->top_index)
4340 {
4341 asection **list = htab->input_list + isec->output_section->index;
4342
a7470592 4343 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4344 {
4345 /* Steal the link_sec pointer for our list. */
4346#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4347 /* This happens to make the list in reverse order,
07d72278 4348 which we reverse later. */
906e58ca
NC		 4349 PREV_SEC (isec) = *list;
4350 *list = isec;
4351 }
4352 }
4353}
4354
4355/* See whether we can group stub sections together. Grouping stub
4356 sections may result in fewer stubs. More importantly, we need to
07d72278 4357 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4358 .fini output sections respectively, because glibc splits the
4359 _init and _fini functions into multiple parts. Putting a stub in
4360 the middle of a function is not a good idea. */
4361
4362static void
4363group_sections (struct elf32_arm_link_hash_table *htab,
4364 bfd_size_type stub_group_size,
07d72278 4365 bfd_boolean stubs_always_after_branch)
906e58ca 4366{
07d72278 4367 asection **list = htab->input_list;
906e58ca
NC		 4368
4369 do
4370 {
4371 asection *tail = *list;
07d72278 4372 asection *head;
906e58ca
NC		 4373
4374 if (tail == bfd_abs_section_ptr)
4375 continue;
4376
07d72278
DJ		 4377 /* Reverse the list: we must avoid placing stubs at the
4378 beginning of the section because the beginning of the text
4379 section may be required for an interrupt vector in bare metal
4380 code. */
4381#define NEXT_SEC PREV_SEC
e780aef2
CL		 4382 head = NULL;
4383 while (tail != NULL)
4384 {
4385 /* Pop from tail. */
4386 asection *item = tail;
4387 tail = PREV_SEC (item);
4388
4389 /* Push on head. */
4390 NEXT_SEC (item) = head;
4391 head = item;
4392 }
07d72278
DJ		 4393
4394 while (head != NULL)
906e58ca
NC		 4395 {
4396 asection *curr;
07d72278 4397 asection *next;
e780aef2
CL		 4398 bfd_vma stub_group_start = head->output_offset;
4399 bfd_vma end_of_next;
906e58ca 4400
07d72278 4401 curr = head;
e780aef2 4402 while (NEXT_SEC (curr) != NULL)
8cd931b7 4403 {
e780aef2
CL		 4404 next = NEXT_SEC (curr);
4405 end_of_next = next->output_offset + next->size;
4406 if (end_of_next - stub_group_start >= stub_group_size)
4407 /* End of NEXT is too far from start, so stop. */
8cd931b7 4408 break;
e780aef2
CL		 4409 /* Add NEXT to the group. */
4410 curr = next;
8cd931b7 4411 }
906e58ca 4412
07d72278 4413 /* OK, the size from the start to the start of CURR is less
906e58ca 4414 than stub_group_size and thus can be handled by one stub
07d72278 4415 section. (Or the head section is itself larger than
906e58ca
NC		 4416 stub_group_size, in which case we may be toast.)
4417 We should really be keeping track of the total size of
4418 stubs added here, as stubs contribute to the final output
7fb9f789 4419 section size. */
906e58ca
NC		 4420 do
4421 {
07d72278 4422 next = NEXT_SEC (head);
906e58ca 4423 /* Set up this stub group. */
07d72278 4424 htab->stub_group[head->id].link_sec = curr;
906e58ca 4425 }
07d72278 4426 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4427
4428 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4429 bytes after the stub section can be handled by it too. */
4430 if (!stubs_always_after_branch)
906e58ca 4431 {
e780aef2
CL		 4432 stub_group_start = curr->output_offset + curr->size;
4433
8cd931b7 4434 while (next != NULL)
906e58ca 4435 {
e780aef2
CL		 4436 end_of_next = next->output_offset + next->size;
4437 if (end_of_next - stub_group_start >= stub_group_size)
4438 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4439 break;
e780aef2 4440 /* Add NEXT to the stub group. */
07d72278
DJ		 4441 head = next;
4442 next = NEXT_SEC (head);
4443 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4444 }
4445 }
07d72278 4446 head = next;
906e58ca
NC		 4447 }
4448 }
07d72278 4449 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4450
4451 free (htab->input_list);
4452#undef PREV_SEC
07d72278 4453#undef NEXT_SEC
906e58ca
NC		 4454}
4455
48229727
JB		 4456/* Comparison function for sorting/searching relocations relating to Cortex-A8
4457 erratum fix. */
4458
4459static int
4460a8_reloc_compare (const void *a, const void *b)
4461{
21d799b5
NC		 4462 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4463 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4464
4465 if (ra->from < rb->from)
4466 return -1;
4467 else if (ra->from > rb->from)
4468 return 1;
4469 else
4470 return 0;
4471}
4472
4473static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4474 const char *, char **);
4475
4476/* Helper function to scan code for sequences which might trigger the Cortex-A8
4477 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4478 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4479 otherwise. */
4480
81694485
NC		 4481static bfd_boolean
4482cortex_a8_erratum_scan (bfd *input_bfd,
4483 struct bfd_link_info *info,
48229727
JB		 4484 struct a8_erratum_fix **a8_fixes_p,
4485 unsigned int *num_a8_fixes_p,
4486 unsigned int *a8_fix_table_size_p,
4487 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4488 unsigned int num_a8_relocs,
4489 unsigned prev_num_a8_fixes,
4490 bfd_boolean *stub_changed_p)
48229727
JB		 4491{
4492 asection *section;
4493 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4494 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4495 unsigned int num_a8_fixes = *num_a8_fixes_p;
4496 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4497
4dfe6ac6
NC		 4498 if (htab == NULL)
4499 return FALSE;
4500
48229727
JB		 4501 for (section = input_bfd->sections;
4502 section != NULL;
4503 section = section->next)
4504 {
4505 bfd_byte *contents = NULL;
4506 struct _arm_elf_section_data *sec_data;
4507 unsigned int span;
4508 bfd_vma base_vma;
4509
4510 if (elf_section_type (section) != SHT_PROGBITS
4511 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4512 || (section->flags & SEC_EXCLUDE) != 0
4513 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4514 || (section->output_section == bfd_abs_section_ptr))
4515 continue;
4516
4517 base_vma = section->output_section->vma + section->output_offset;
4518
4519 if (elf_section_data (section)->this_hdr.contents != NULL)
4520 contents = elf_section_data (section)->this_hdr.contents;
4521 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4522 return TRUE;
48229727
JB		 4523
4524 sec_data = elf32_arm_section_data (section);
4525
4526 for (span = 0; span < sec_data->mapcount; span++)
4527 {
4528 unsigned int span_start = sec_data->map[span].vma;
4529 unsigned int span_end = (span == sec_data->mapcount - 1)
4530 ? section->size : sec_data->map[span + 1].vma;
4531 unsigned int i;
4532 char span_type = sec_data->map[span].type;
4533 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4534
4535 if (span_type != 't')
4536 continue;
4537
4538 /* Span is entirely within a single 4KB region: skip scanning. */
4539 if (((base_vma + span_start) & ~0xfff)
4540 == ((base_vma + span_end) & ~0xfff))
4541 continue;
4542
4543 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4544
4545 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4546 * The branch target is in the same 4KB region as the
4547 first half of the branch.
4548 * The instruction before the branch is a 32-bit
81694485 4549 length non-branch instruction. */
48229727
JB		 4550 for (i = span_start; i < span_end;)
4551 {
4552 unsigned int insn = bfd_getl16 (&contents[i]);
4553 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4554 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4555
4556 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4557 insn_32bit = TRUE;
4558
4559 if (insn_32bit)
4560 {
4561 /* Load the rest of the insn (in manual-friendly order). */
4562 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4563
4564 /* Encoding T4: B<c>.W. */
4565 is_b = (insn & 0xf800d000) == 0xf0009000;
4566 /* Encoding T1: BL<c>.W. */
4567 is_bl = (insn & 0xf800d000) == 0xf000d000;
4568 /* Encoding T2: BLX<c>.W. */
4569 is_blx = (insn & 0xf800d000) == 0xf000c000;
4570 /* Encoding T3: B<c>.W (not permitted in IT block). */
4571 is_bcc = (insn & 0xf800d000) == 0xf0008000
4572 && (insn & 0x07f00000) != 0x03800000;
4573 }
4574
4575 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4576
81694485
NC		 4577 if (((base_vma + i) & 0xfff) == 0xffe
4578 && insn_32bit
4579 && is_32bit_branch
4580 && last_was_32bit
4581 && ! last_was_branch)
48229727 4582 {
8f73510c 4583 bfd_signed_vma offset = 0;
48229727
JB		 4584 bfd_boolean force_target_arm = FALSE;
4585 bfd_boolean force_target_thumb = FALSE;
4586 bfd_vma target;
4587 enum elf32_arm_stub_type stub_type = arm_stub_none;
4588 struct a8_erratum_reloc key, *found;
7d24e6a6 4589 bfd_boolean use_plt = FALSE;
48229727
JB		 4590
4591 key.from = base_vma + i;
21d799b5
NC		 4592 found = (struct a8_erratum_reloc *)
4593 bsearch (&key, a8_relocs, num_a8_relocs,
4594 sizeof (struct a8_erratum_reloc),
4595 &a8_reloc_compare);
48229727
JB		 4596
4597 if (found)
4598 {
4599 char *error_message = NULL;
4600 struct elf_link_hash_entry *entry;
4601
4602 /* We don't care about the error returned from this
4603 function, only if there is glue or not. */
4604 entry = find_thumb_glue (info, found->sym_name,
4605 &error_message);
4606
4607 if (entry)
4608 found->non_a8_stub = TRUE;
4609
92750f34 4610 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4611 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4612 && found->hash->root.plt.offset != (bfd_vma) -1)
4613 use_plt = TRUE;
4614
4615 if (found->r_type == R_ARM_THM_CALL)
4616 {
35fc36a8
RS		 4617 if (found->branch_type == ST_BRANCH_TO_ARM
4618 || use_plt)
92750f34
DJ		 4619 force_target_arm = TRUE;
4620 else
4621 force_target_thumb = TRUE;
4622 }
48229727
JB		 4623 }
4624
4625 /* Check if we have an offending branch instruction. */
4626
4627 if (found && found->non_a8_stub)
4628 /* We've already made a stub for this instruction, e.g.
4629 it's a long branch or a Thumb->ARM stub. Assume that
4630 stub will suffice to work around the A8 erratum (see
4631 setting of always_after_branch above). */
4632 ;
4633 else if (is_bcc)
4634 {
4635 offset = (insn & 0x7ff) << 1;
4636 offset |= (insn & 0x3f0000) >> 4;
4637 offset |= (insn & 0x2000) ? 0x40000 : 0;
4638 offset |= (insn & 0x800) ? 0x80000 : 0;
4639 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4640 if (offset & 0x100000)
81694485 4641 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4642 stub_type = arm_stub_a8_veneer_b_cond;
4643 }
4644 else if (is_b || is_bl || is_blx)
4645 {
4646 int s = (insn & 0x4000000) != 0;
4647 int j1 = (insn & 0x2000) != 0;
4648 int j2 = (insn & 0x800) != 0;
4649 int i1 = !(j1 ^ s);
4650 int i2 = !(j2 ^ s);
4651
4652 offset = (insn & 0x7ff) << 1;
4653 offset |= (insn & 0x3ff0000) >> 4;
4654 offset |= i2 << 22;
4655 offset |= i1 << 23;
4656 offset |= s << 24;
4657 if (offset & 0x1000000)
81694485 4658 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4659
4660 if (is_blx)
81694485 4661 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4662
4663 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4664 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4665 }
4666
4667 if (stub_type != arm_stub_none)
4668 {
4669 bfd_vma pc_for_insn = base_vma + i + 4;
4670
4671 /* The original instruction is a BL, but the target is
4672 an ARM instruction. If we were not making a stub,
4673 the BL would have been converted to a BLX. Use the
4674 BLX stub instead in that case. */
4675 if (htab->use_blx && force_target_arm
4676 && stub_type == arm_stub_a8_veneer_bl)
4677 {
4678 stub_type = arm_stub_a8_veneer_blx;
4679 is_blx = TRUE;
4680 is_bl = FALSE;
4681 }
4682 /* Conversely, if the original instruction was
4683 BLX but the target is Thumb mode, use the BL
4684 stub. */
4685 else if (force_target_thumb
4686 && stub_type == arm_stub_a8_veneer_blx)
4687 {
4688 stub_type = arm_stub_a8_veneer_bl;
4689 is_blx = FALSE;
4690 is_bl = TRUE;
4691 }
4692
4693 if (is_blx)
81694485 4694 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4695
4696 /* If we found a relocation, use the proper destination,
4697 not the offset in the (unrelocated) instruction.
4698 Note this is always done if we switched the stub type
4699 above. */
4700 if (found)
81694485
NC		 4701 offset =
4702 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4703
7d24e6a6
RS		 4704 /* If the stub will use a Thumb-mode branch to a
4705 PLT target, redirect it to the preceding Thumb
4706 entry point. */
4707 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4708 offset -= PLT_THUMB_STUB_SIZE;
4709
48229727
JB		 4710 target = pc_for_insn + offset;
4711
4712 /* The BLX stub is ARM-mode code. Adjust the offset to
4713 take the different PC value (+8 instead of +4) into
4714 account. */
4715 if (stub_type == arm_stub_a8_veneer_blx)
4716 offset += 4;
4717
4718 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4719 {
eb7c4339 4720 char *stub_name = NULL;
48229727
JB		 4721
4722 if (num_a8_fixes == a8_fix_table_size)
4723 {
4724 a8_fix_table_size *= 2;
21d799b5
NC		 4725 a8_fixes = (struct a8_erratum_fix *)
4726 bfd_realloc (a8_fixes,
4727 sizeof (struct a8_erratum_fix)
4728 * a8_fix_table_size);
48229727
JB		 4729 }
4730
eb7c4339
NS		 4731 if (num_a8_fixes < prev_num_a8_fixes)
4732 {
4733 /* If we're doing a subsequent scan,
4734 check if we've found the same fix as
4735 before, and try and reuse the stub
4736 name. */
4737 stub_name = a8_fixes[num_a8_fixes].stub_name;
4738 if ((a8_fixes[num_a8_fixes].section != section)
4739 || (a8_fixes[num_a8_fixes].offset != i))
4740 {
4741 free (stub_name);
4742 stub_name = NULL;
4743 *stub_changed_p = TRUE;
4744 }
4745 }
4746
4747 if (!stub_name)
4748 {
21d799b5 4749 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4750 if (stub_name != NULL)
4751 sprintf (stub_name, "%x:%x", section->id, i);
4752 }
48229727
JB		 4753
4754 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4755 a8_fixes[num_a8_fixes].section = section;
4756 a8_fixes[num_a8_fixes].offset = i;
4757 a8_fixes[num_a8_fixes].addend = offset;
4758 a8_fixes[num_a8_fixes].orig_insn = insn;
4759 a8_fixes[num_a8_fixes].stub_name = stub_name;
4760 a8_fixes[num_a8_fixes].stub_type = stub_type;
35fc36a8
RS		 4761 a8_fixes[num_a8_fixes].branch_type =
4762 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727
JB		 4763
4764 num_a8_fixes++;
4765 }
4766 }
4767 }
4768
4769 i += insn_32bit ? 4 : 2;
4770 last_was_32bit = insn_32bit;
4771 last_was_branch = is_32bit_branch;
4772 }
4773 }
4774
4775 if (elf_section_data (section)->this_hdr.contents == NULL)
4776 free (contents);
4777 }
fe33d2fa 4778
48229727
JB		 4779 *a8_fixes_p = a8_fixes;
4780 *num_a8_fixes_p = num_a8_fixes;
4781 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4782
81694485 4783 return FALSE;
48229727
JB		 4784}
4785
906e58ca
NC		 4786/* Determine and set the size of the stub section for a final link.
4787
4788 The basic idea here is to examine all the relocations looking for
4789 PC-relative calls to a target that is unreachable with a "bl"
4790 instruction. */
4791
4792bfd_boolean
4793elf32_arm_size_stubs (bfd *output_bfd,
4794 bfd *stub_bfd,
4795 struct bfd_link_info *info,
4796 bfd_signed_vma group_size,
4797 asection * (*add_stub_section) (const char *, asection *),
4798 void (*layout_sections_again) (void))
4799{
4800 bfd_size_type stub_group_size;
07d72278 4801 bfd_boolean stubs_always_after_branch;
906e58ca 4802 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4803 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4804 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4805 struct a8_erratum_reloc *a8_relocs = NULL;
4806 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4807
4dfe6ac6
NC		 4808 if (htab == NULL)
4809 return FALSE;
4810
48229727
JB		 4811 if (htab->fix_cortex_a8)
4812 {
21d799b5
NC		 4813 a8_fixes = (struct a8_erratum_fix *)
4814 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4815 a8_relocs = (struct a8_erratum_reloc *)
4816 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4817 }
906e58ca
NC		 4818
4819 /* Propagate mach to stub bfd, because it may not have been
4820 finalized when we created stub_bfd. */
4821 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4822 bfd_get_mach (output_bfd));
4823
4824 /* Stash our params away. */
4825 htab->stub_bfd = stub_bfd;
4826 htab->add_stub_section = add_stub_section;
4827 htab->layout_sections_again = layout_sections_again;
07d72278 4828 stubs_always_after_branch = group_size < 0;
48229727
JB		 4829
4830 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4831 as the first half of a 32-bit branch straddling two 4K pages. This is a
4832 crude way of enforcing that. */
4833 if (htab->fix_cortex_a8)
4834 stubs_always_after_branch = 1;
4835
906e58ca
NC		 4836 if (group_size < 0)
4837 stub_group_size = -group_size;
4838 else
4839 stub_group_size = group_size;
4840
4841 if (stub_group_size == 1)
4842 {
4843 /* Default values. */
4844 /* Thumb branch range is +-4MB has to be used as the default
4845 maximum size (a given section can contain both ARM and Thumb
4846 code, so the worst case has to be taken into account).
4847
4848 This value is 24K less than that, which allows for 2025
4849 12-byte stubs. If we exceed that, then we will fail to link.
4850 The user will have to relink with an explicit group size
4851 option. */
4852 stub_group_size = 4170000;
4853 }
4854
07d72278 4855 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4856
3ae046cc
NS		 4857 /* If we're applying the cortex A8 fix, we need to determine the
4858 program header size now, because we cannot change it later --
4859 that could alter section placements. Notice the A8 erratum fix
4860 ends up requiring the section addresses to remain unchanged
4861 modulo the page size. That's something we cannot represent
4862 inside BFD, and we don't want to force the section alignment to
4863 be the page size. */
4864 if (htab->fix_cortex_a8)
4865 (*htab->layout_sections_again) ();
4866
906e58ca
NC		 4867 while (1)
4868 {
4869 bfd *input_bfd;
4870 unsigned int bfd_indx;
4871 asection *stub_sec;
eb7c4339
NS		 4872 bfd_boolean stub_changed = FALSE;
4873 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4874
48229727 4875 num_a8_fixes = 0;
906e58ca
NC		 4876 for (input_bfd = info->input_bfds, bfd_indx = 0;
4877 input_bfd != NULL;
4878 input_bfd = input_bfd->link_next, bfd_indx++)
4879 {
4880 Elf_Internal_Shdr *symtab_hdr;
4881 asection *section;
4882 Elf_Internal_Sym *local_syms = NULL;
4883
48229727
JB		 4884 num_a8_relocs = 0;
4885
906e58ca
NC		 4886 /* We'll need the symbol table in a second. */
4887 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4888 if (symtab_hdr->sh_info == 0)
4889 continue;
4890
4891 /* Walk over each section attached to the input bfd. */
4892 for (section = input_bfd->sections;
4893 section != NULL;
4894 section = section->next)
4895 {
4896 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4897
4898 /* If there aren't any relocs, then there's nothing more
4899 to do. */
4900 if ((section->flags & SEC_RELOC) == 0
4901 || section->reloc_count == 0
4902 || (section->flags & SEC_CODE) == 0)
4903 continue;
4904
4905 /* If this section is a link-once section that will be
4906 discarded, then don't create any stubs. */
4907 if (section->output_section == NULL
4908 || section->output_section->owner != output_bfd)
4909 continue;
4910
4911 /* Get the relocs. */
4912 internal_relocs
4913 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4914 NULL, info->keep_memory);
4915 if (internal_relocs == NULL)
4916 goto error_ret_free_local;
4917
4918 /* Now examine each relocation. */
4919 irela = internal_relocs;
4920 irelaend = irela + section->reloc_count;
4921 for (; irela < irelaend; irela++)
4922 {
4923 unsigned int r_type, r_indx;
4924 enum elf32_arm_stub_type stub_type;
4925 struct elf32_arm_stub_hash_entry *stub_entry;
4926 asection *sym_sec;
4927 bfd_vma sym_value;
4928 bfd_vma destination;
4929 struct elf32_arm_link_hash_entry *hash;
7413f23f 4930 const char *sym_name;
906e58ca
NC		 4931 char *stub_name;
4932 const asection *id_sec;
34e77a92 4933 unsigned char st_type;
35fc36a8 4934 enum arm_st_branch_type branch_type;
48229727 4935 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4936
4937 r_type = ELF32_R_TYPE (irela->r_info);
4938 r_indx = ELF32_R_SYM (irela->r_info);
4939
4940 if (r_type >= (unsigned int) R_ARM_max)
4941 {
4942 bfd_set_error (bfd_error_bad_value);
4943 error_ret_free_internal:
4944 if (elf_section_data (section)->relocs == NULL)
4945 free (internal_relocs);
4946 goto error_ret_free_local;
4947 }
0855e32b
NS		 4948
4949 hash = NULL;
4950 if (r_indx >= symtab_hdr->sh_info)
4951 hash = elf32_arm_hash_entry
4952 (elf_sym_hashes (input_bfd)
4953 [r_indx - symtab_hdr->sh_info]);
4954
4955 /* Only look for stubs on branch instructions, or
4956 non-relaxed TLSCALL */
906e58ca 4957 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4958 && (r_type != (unsigned int) R_ARM_THM_CALL)
4959 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4960 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4961 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 4962 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 4963 && (r_type != (unsigned int) R_ARM_PLT32)
4964 && !((r_type == (unsigned int) R_ARM_TLS_CALL
4965 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4966 && r_type == elf32_arm_tls_transition
4967 (info, r_type, &hash->root)
4968 && ((hash ? hash->tls_type
4969 : (elf32_arm_local_got_tls_type
4970 (input_bfd)[r_indx]))
4971 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 4972 continue;
4973
4974 /* Now determine the call target, its name, value,
4975 section. */
4976 sym_sec = NULL;
4977 sym_value = 0;
4978 destination = 0;
7413f23f 4979 sym_name = NULL;
0855e32b
NS		 4980
4981 if (r_type == (unsigned int) R_ARM_TLS_CALL
4982 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4983 {
4984 /* A non-relaxed TLS call. The target is the
4985 plt-resident trampoline and nothing to do
4986 with the symbol. */
4987 BFD_ASSERT (htab->tls_trampoline > 0);
4988 sym_sec = htab->root.splt;
4989 sym_value = htab->tls_trampoline;
4990 hash = 0;
34e77a92 4991 st_type = STT_FUNC;
35fc36a8 4992 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 4993 }
4994 else if (!hash)
906e58ca
NC		 4995 {
4996 /* It's a local symbol. */
4997 Elf_Internal_Sym *sym;
906e58ca
NC		 4998
4999 if (local_syms == NULL)
5000 {
5001 local_syms
5002 = (Elf_Internal_Sym *) symtab_hdr->contents;
5003 if (local_syms == NULL)
5004 local_syms
5005 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5006 symtab_hdr->sh_info, 0,
5007 NULL, NULL, NULL);
5008 if (local_syms == NULL)
5009 goto error_ret_free_internal;
5010 }
5011
5012 sym = local_syms + r_indx;
f6d250ce
TS		 5013 if (sym->st_shndx == SHN_UNDEF)
5014 sym_sec = bfd_und_section_ptr;
5015 else if (sym->st_shndx == SHN_ABS)
5016 sym_sec = bfd_abs_section_ptr;
5017 else if (sym->st_shndx == SHN_COMMON)
5018 sym_sec = bfd_com_section_ptr;
5019 else
5020 sym_sec =
5021 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5022
ffcb4889
NS		 5023 if (!sym_sec)
5024 /* This is an undefined symbol. It can never
5025 be resolved. */
5026 continue;
fe33d2fa 5027
906e58ca
NC		 5028 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5029 sym_value = sym->st_value;
5030 destination = (sym_value + irela->r_addend
5031 + sym_sec->output_offset
5032 + sym_sec->output_section->vma);
34e77a92 5033 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5034 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5035 sym_name
5036 = bfd_elf_string_from_elf_section (input_bfd,
5037 symtab_hdr->sh_link,
5038 sym->st_name);
906e58ca
NC		 5039 }
5040 else
5041 {
5042 /* It's an external symbol. */
906e58ca
NC		 5043 while (hash->root.root.type == bfd_link_hash_indirect
5044 || hash->root.root.type == bfd_link_hash_warning)
5045 hash = ((struct elf32_arm_link_hash_entry *)
5046 hash->root.root.u.i.link);
5047
5048 if (hash->root.root.type == bfd_link_hash_defined
5049 || hash->root.root.type == bfd_link_hash_defweak)
5050 {
5051 sym_sec = hash->root.root.u.def.section;
5052 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5053
5054 struct elf32_arm_link_hash_table *globals =
5055 elf32_arm_hash_table (info);
5056
5057 /* For a destination in a shared library,
5058 use the PLT stub as target address to
5059 decide whether a branch stub is
5060 needed. */
4dfe6ac6 5061 if (globals != NULL
362d30a1 5062 && globals->root.splt != NULL
4dfe6ac6 5063 && hash != NULL
022f8312
CL		 5064 && hash->root.plt.offset != (bfd_vma) -1)
5065 {
362d30a1 5066 sym_sec = globals->root.splt;
022f8312
CL		 5067 sym_value = hash->root.plt.offset;
5068 if (sym_sec->output_section != NULL)
5069 destination = (sym_value
5070 + sym_sec->output_offset
5071 + sym_sec->output_section->vma);
5072 }
5073 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5074 destination = (sym_value + irela->r_addend
5075 + sym_sec->output_offset
5076 + sym_sec->output_section->vma);
5077 }
69c5861e
CL		 5078 else if ((hash->root.root.type == bfd_link_hash_undefined)
5079 || (hash->root.root.type == bfd_link_hash_undefweak))
5080 {
5081 /* For a shared library, use the PLT stub as
5082 target address to decide whether a long
5083 branch stub is needed.
5084 For absolute code, they cannot be handled. */
5085 struct elf32_arm_link_hash_table *globals =
5086 elf32_arm_hash_table (info);
5087
4dfe6ac6 5088 if (globals != NULL
362d30a1 5089 && globals->root.splt != NULL
4dfe6ac6 5090 && hash != NULL
69c5861e
CL		 5091 && hash->root.plt.offset != (bfd_vma) -1)
5092 {
362d30a1 5093 sym_sec = globals->root.splt;
69c5861e
CL		 5094 sym_value = hash->root.plt.offset;
5095 if (sym_sec->output_section != NULL)
5096 destination = (sym_value
5097 + sym_sec->output_offset
5098 + sym_sec->output_section->vma);
5099 }
5100 else
5101 continue;
5102 }
906e58ca
NC		 5103 else
5104 {
5105 bfd_set_error (bfd_error_bad_value);
5106 goto error_ret_free_internal;
5107 }
34e77a92 5108 st_type = hash->root.type;
35fc36a8 5109 branch_type = hash->root.target_internal;
7413f23f 5110 sym_name = hash->root.root.root.string;
906e58ca
NC		 5111 }
5112
48229727 5113 do
7413f23f 5114 {
48229727
JB		 5115 /* Determine what (if any) linker stub is needed. */
5116 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5117 st_type, &branch_type,
5118 hash, destination, sym_sec,
48229727
JB		 5119 input_bfd, sym_name);
5120 if (stub_type == arm_stub_none)
5121 break;
5122
5123 /* Support for grouping stub sections. */
5124 id_sec = htab->stub_group[section->id].link_sec;
5125
5126 /* Get the name of this stub. */
5127 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5128 irela, stub_type);
48229727
JB		 5129 if (!stub_name)
5130 goto error_ret_free_internal;
5131
5132 /* We've either created a stub for this reloc already,
5133 or we are about to. */
5134 created_stub = TRUE;
5135
5136 stub_entry = arm_stub_hash_lookup
5137 (&htab->stub_hash_table, stub_name,
5138 FALSE, FALSE);
5139 if (stub_entry != NULL)
5140 {
5141 /* The proper stub has already been created. */
5142 free (stub_name);
eb7c4339 5143 stub_entry->target_value = sym_value;
48229727
JB		 5144 break;
5145 }
7413f23f 5146
48229727
JB		 5147 stub_entry = elf32_arm_add_stub (stub_name, section,
5148 htab);
5149 if (stub_entry == NULL)
5150 {
5151 free (stub_name);
5152 goto error_ret_free_internal;
5153 }
7413f23f 5154
48229727
JB		 5155 stub_entry->target_value = sym_value;
5156 stub_entry->target_section = sym_sec;
5157 stub_entry->stub_type = stub_type;
5158 stub_entry->h = hash;
35fc36a8 5159 stub_entry->branch_type = branch_type;
48229727
JB		 5160
5161 if (sym_name == NULL)
5162 sym_name = "unnamed";
21d799b5
NC		 5163 stub_entry->output_name = (char *)
5164 bfd_alloc (htab->stub_bfd,
48229727
JB		 5165 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5166 + strlen (sym_name));
5167 if (stub_entry->output_name == NULL)
5168 {
5169 free (stub_name);
5170 goto error_ret_free_internal;
5171 }
5172
5173 /* For historical reasons, use the existing names for
5174 ARM-to-Thumb and Thumb-to-ARM stubs. */
35fc36a8
RS		 5175 if ((r_type == (unsigned int) R_ARM_THM_CALL
5176 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5177 && branch_type == ST_BRANCH_TO_ARM)
48229727
JB		 5178 sprintf (stub_entry->output_name,
5179 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
35fc36a8
RS		 5180 else if ((r_type == (unsigned int) R_ARM_CALL
5181 || r_type == (unsigned int) R_ARM_JUMP24)
5182 && branch_type == ST_BRANCH_TO_THUMB)
48229727
JB		 5183 sprintf (stub_entry->output_name,
5184 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5185 else
5186 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5187 sym_name);
5188
5189 stub_changed = TRUE;
5190 }
5191 while (0);
5192
5193 /* Look for relocations which might trigger Cortex-A8
5194 erratum. */
5195 if (htab->fix_cortex_a8
5196 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5197 || r_type == (unsigned int) R_ARM_THM_JUMP19
5198 || r_type == (unsigned int) R_ARM_THM_CALL
5199 || r_type == (unsigned int) R_ARM_THM_XPC22))
5200 {
5201 bfd_vma from = section->output_section->vma
5202 + section->output_offset
5203 + irela->r_offset;
5204
5205 if ((from & 0xfff) == 0xffe)
5206 {
5207 /* Found a candidate. Note we haven't checked the
5208 destination is within 4K here: if we do so (and
5209 don't create an entry in a8_relocs) we can't tell
5210 that a branch should have been relocated when
5211 scanning later. */
5212 if (num_a8_relocs == a8_reloc_table_size)
5213 {
5214 a8_reloc_table_size *= 2;
21d799b5
NC		 5215 a8_relocs = (struct a8_erratum_reloc *)
5216 bfd_realloc (a8_relocs,
5217 sizeof (struct a8_erratum_reloc)
5218 * a8_reloc_table_size);
48229727
JB		 5219 }
5220
5221 a8_relocs[num_a8_relocs].from = from;
5222 a8_relocs[num_a8_relocs].destination = destination;
5223 a8_relocs[num_a8_relocs].r_type = r_type;
35fc36a8 5224 a8_relocs[num_a8_relocs].branch_type = branch_type;
48229727
JB		 5225 a8_relocs[num_a8_relocs].sym_name = sym_name;
5226 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 5227 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 5228
5229 num_a8_relocs++;
5230 }
5231 }
906e58ca
NC		 5232 }
5233
48229727
JB		 5234 /* We're done with the internal relocs, free them. */
5235 if (elf_section_data (section)->relocs == NULL)
5236 free (internal_relocs);
5237 }
5238
5239 if (htab->fix_cortex_a8)
5240 {
5241 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 5242 qsort (a8_relocs, num_a8_relocs,
5243 sizeof (struct a8_erratum_reloc),
48229727
JB		 5244 &a8_reloc_compare);
5245
5246 /* Scan for branches which might trigger Cortex-A8 erratum. */
5247 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5248 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5249 a8_relocs, num_a8_relocs,
5250 prev_num_a8_fixes, &stub_changed)
5251 != 0)
48229727 5252 goto error_ret_free_local;
5e681ec4 5253 }
5e681ec4
PB		 5254 }
5255
eb7c4339 5256 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 5257 stub_changed = TRUE;
5258
906e58ca
NC		 5259 if (!stub_changed)
5260 break;
5e681ec4 5261
906e58ca
NC		 5262 /* OK, we've added some stubs. Find out the new size of the
5263 stub sections. */
5264 for (stub_sec = htab->stub_bfd->sections;
5265 stub_sec != NULL;
5266 stub_sec = stub_sec->next)
3e6b1042
DJ		 5267 {
5268 /* Ignore non-stub sections. */
5269 if (!strstr (stub_sec->name, STUB_SUFFIX))
5270 continue;
5271
5272 stub_sec->size = 0;
5273 }
b34b2d70 5274
906e58ca
NC		 5275 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5276
48229727
JB		 5277 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5278 if (htab->fix_cortex_a8)
5279 for (i = 0; i < num_a8_fixes; i++)
5280 {
5281 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5282 a8_fixes[i].section, htab);
5283
5284 if (stub_sec == NULL)
5285 goto error_ret_free_local;
5286
5287 stub_sec->size
5288 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5289 NULL);
5290 }
5291
5292
906e58ca
NC		 5293 /* Ask the linker to do its stuff. */
5294 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5295 }
5296
48229727
JB		 5297 /* Add stubs for Cortex-A8 erratum fixes now. */
5298 if (htab->fix_cortex_a8)
5299 {
5300 for (i = 0; i < num_a8_fixes; i++)
5301 {
5302 struct elf32_arm_stub_hash_entry *stub_entry;
5303 char *stub_name = a8_fixes[i].stub_name;
5304 asection *section = a8_fixes[i].section;
5305 unsigned int section_id = a8_fixes[i].section->id;
5306 asection *link_sec = htab->stub_group[section_id].link_sec;
5307 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 5308 const insn_sequence *template_sequence;
48229727
JB		 5309 int template_size, size = 0;
5310
5311 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5312 TRUE, FALSE);
5313 if (stub_entry == NULL)
5314 {
5315 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5316 section->owner,
5317 stub_name);
5318 return FALSE;
5319 }
5320
5321 stub_entry->stub_sec = stub_sec;
5322 stub_entry->stub_offset = 0;
5323 stub_entry->id_sec = link_sec;
5324 stub_entry->stub_type = a8_fixes[i].stub_type;
5325 stub_entry->target_section = a8_fixes[i].section;
5326 stub_entry->target_value = a8_fixes[i].offset;
5327 stub_entry->target_addend = a8_fixes[i].addend;
5328 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5329 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5330
d3ce72d0
NC		 5331 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5332 &template_sequence,
48229727
JB		 5333 &template_size);
5334
5335 stub_entry->stub_size = size;
d3ce72d0 5336 stub_entry->stub_template = template_sequence;
48229727
JB		 5337 stub_entry->stub_template_size = template_size;
5338 }
5339
5340 /* Stash the Cortex-A8 erratum fix array for use later in
5341 elf32_arm_write_section(). */
5342 htab->a8_erratum_fixes = a8_fixes;
5343 htab->num_a8_erratum_fixes = num_a8_fixes;
5344 }
5345 else
5346 {
5347 htab->a8_erratum_fixes = NULL;
5348 htab->num_a8_erratum_fixes = 0;
5349 }
906e58ca
NC		 5350 return TRUE;
5351
5352 error_ret_free_local:
5353 return FALSE;
5e681ec4
PB		 5354}
5355
906e58ca
NC		 5356/* Build all the stubs associated with the current output file. The
5357 stubs are kept in a hash table attached to the main linker hash
5358 table. We also set up the .plt entries for statically linked PIC
5359 functions here. This function is called via arm_elf_finish in the
5360 linker. */
252b5132 5361
906e58ca
NC		 5362bfd_boolean
5363elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5364{
906e58ca
NC		 5365 asection *stub_sec;
5366 struct bfd_hash_table *table;
5367 struct elf32_arm_link_hash_table *htab;
252b5132 5368
906e58ca 5369 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5370 if (htab == NULL)
5371 return FALSE;
252b5132 5372
906e58ca
NC		 5373 for (stub_sec = htab->stub_bfd->sections;
5374 stub_sec != NULL;
5375 stub_sec = stub_sec->next)
252b5132 5376 {
906e58ca
NC		 5377 bfd_size_type size;
5378
8029a119 5379 /* Ignore non-stub sections. */
906e58ca
NC		 5380 if (!strstr (stub_sec->name, STUB_SUFFIX))
5381 continue;
5382
5383 /* Allocate memory to hold the linker stubs. */
5384 size = stub_sec->size;
21d799b5 5385 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5386 if (stub_sec->contents == NULL && size != 0)
5387 return FALSE;
5388 stub_sec->size = 0;
252b5132
RH		 5389 }
5390
906e58ca
NC		 5391 /* Build the stubs as directed by the stub hash table. */
5392 table = &htab->stub_hash_table;
5393 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5394 if (htab->fix_cortex_a8)
5395 {
5396 /* Place the cortex a8 stubs last. */
5397 htab->fix_cortex_a8 = -1;
5398 bfd_hash_traverse (table, arm_build_one_stub, info);
5399 }
252b5132 5400
906e58ca 5401 return TRUE;
252b5132
RH		 5402}
5403
9b485d32
NC		 5404/* Locate the Thumb encoded calling stub for NAME. */
5405
252b5132 5406static struct elf_link_hash_entry *
57e8b36a
NC		 5407find_thumb_glue (struct bfd_link_info *link_info,
5408 const char *name,
f2a9dd69 5409 char **error_message)
252b5132
RH		 5410{
5411 char *tmp_name;
5412 struct elf_link_hash_entry *hash;
5413 struct elf32_arm_link_hash_table *hash_table;
5414
5415 /* We need a pointer to the armelf specific hash table. */
5416 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5417 if (hash_table == NULL)
5418 return NULL;
252b5132 5419
21d799b5
NC		 5420 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5421 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5422
5423 BFD_ASSERT (tmp_name);
5424
5425 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5426
5427 hash = elf_link_hash_lookup
b34976b6 5428 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5429
b1657152
AM		 5430 if (hash == NULL
5431 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5432 tmp_name, name) == -1)
5433 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5434
5435 free (tmp_name);
5436
5437 return hash;
5438}
5439
9b485d32
NC		 5440/* Locate the ARM encoded calling stub for NAME. */
5441
252b5132 5442static struct elf_link_hash_entry *
57e8b36a
NC		 5443find_arm_glue (struct bfd_link_info *link_info,
5444 const char *name,
f2a9dd69 5445 char **error_message)
252b5132
RH		 5446{
5447 char *tmp_name;
5448 struct elf_link_hash_entry *myh;
5449 struct elf32_arm_link_hash_table *hash_table;
5450
5451 /* We need a pointer to the elfarm specific hash table. */
5452 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5453 if (hash_table == NULL)
5454 return NULL;
252b5132 5455
21d799b5
NC		 5456 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5457 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5458
5459 BFD_ASSERT (tmp_name);
5460
5461 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5462
5463 myh = elf_link_hash_lookup
b34976b6 5464 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5465
b1657152
AM		 5466 if (myh == NULL
5467 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5468 tmp_name, name) == -1)
5469 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5470
5471 free (tmp_name);
5472
5473 return myh;
5474}
5475
8f6277f5 5476/* ARM->Thumb glue (static images):
252b5132
RH		 5477
5478 .arm
5479 __func_from_arm:
5480 ldr r12, __func_addr
5481 bx r12
5482 __func_addr:
906e58ca 5483 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5484
26079076
PB		 5485 (v5t static images)
5486 .arm
5487 __func_from_arm:
5488 ldr pc, __func_addr
5489 __func_addr:
906e58ca 5490 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5491
8f6277f5
PB		 5492 (relocatable images)
5493 .arm
5494 __func_from_arm:
5495 ldr r12, __func_offset
5496 add r12, r12, pc
5497 bx r12
5498 __func_offset:
8029a119 5499 .word func - . */
8f6277f5
PB		 5500
5501#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5502static const insn32 a2t1_ldr_insn = 0xe59fc000;
5503static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5504static const insn32 a2t3_func_addr_insn = 0x00000001;
5505
26079076
PB		 5506#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5507static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5508static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5509
8f6277f5
PB		 5510#define ARM2THUMB_PIC_GLUE_SIZE 16
5511static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5512static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5513static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5514
9b485d32 5515/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5516
8029a119
NC		 5517 .thumb .thumb
5518 .align 2 .align 2
5519 __func_from_thumb: __func_from_thumb:
5520 bx pc push {r6, lr}
5521 nop ldr r6, __func_addr
5522 .arm mov lr, pc
5523 b func bx r6
fcef9eb7
NC		 5524 .arm
5525 ;; back_to_thumb
5526 ldmia r13! {r6, lr}
5527 bx lr
8029a119
NC		 5528 __func_addr:
5529 .word func */
252b5132
RH		 5530
5531#define THUMB2ARM_GLUE_SIZE 8
5532static const insn16 t2a1_bx_pc_insn = 0x4778;
5533static const insn16 t2a2_noop_insn = 0x46c0;
5534static const insn32 t2a3_b_insn = 0xea000000;
5535
c7b8f16e
JB		 5536#define VFP11_ERRATUM_VENEER_SIZE 8
5537
845b51d6
PB		 5538#define ARM_BX_VENEER_SIZE 12
5539static const insn32 armbx1_tst_insn = 0xe3100001;
5540static const insn32 armbx2_moveq_insn = 0x01a0f000;
5541static const insn32 armbx3_bx_insn = 0xe12fff10;
5542
7e392df6 5543#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5544static void
5545arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5546{
5547 asection * s;
8029a119 5548 bfd_byte * contents;
252b5132 5549
8029a119 5550 if (size == 0)
3e6b1042
DJ		 5551 {
5552 /* Do not include empty glue sections in the output. */
5553 if (abfd != NULL)
5554 {
5555 s = bfd_get_section_by_name (abfd, name);
5556 if (s != NULL)
5557 s->flags |= SEC_EXCLUDE;
5558 }
5559 return;
5560 }
252b5132 5561
8029a119 5562 BFD_ASSERT (abfd != NULL);
252b5132 5563
8029a119
NC		 5564 s = bfd_get_section_by_name (abfd, name);
5565 BFD_ASSERT (s != NULL);
252b5132 5566
21d799b5 5567 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5568
8029a119
NC		 5569 BFD_ASSERT (s->size == size);
5570 s->contents = contents;
5571}
906e58ca 5572
8029a119
NC		 5573bfd_boolean
5574bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5575{
5576 struct elf32_arm_link_hash_table * globals;
906e58ca 5577
8029a119
NC		 5578 globals = elf32_arm_hash_table (info);
5579 BFD_ASSERT (globals != NULL);
906e58ca 5580
8029a119
NC		 5581 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5582 globals->arm_glue_size,
5583 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5584
8029a119
NC		 5585 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5586 globals->thumb_glue_size,
5587 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5588
8029a119
NC		 5589 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5590 globals->vfp11_erratum_glue_size,
5591 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5592
8029a119
NC		 5593 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5594 globals->bx_glue_size,
845b51d6
PB		 5595 ARM_BX_GLUE_SECTION_NAME);
5596
b34976b6 5597 return TRUE;
252b5132
RH		 5598}
5599
a4fd1a8e 5600/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5601 returns the symbol identifying the stub. */
5602
a4fd1a8e 5603static struct elf_link_hash_entry *
57e8b36a
NC		 5604record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5605 struct elf_link_hash_entry * h)
252b5132
RH		 5606{
5607 const char * name = h->root.root.string;
63b0f745 5608 asection * s;
252b5132
RH		 5609 char * tmp_name;
5610 struct elf_link_hash_entry * myh;
14a793b2 5611 struct bfd_link_hash_entry * bh;
252b5132 5612 struct elf32_arm_link_hash_table * globals;
dc810e39 5613 bfd_vma val;
2f475487 5614 bfd_size_type size;
252b5132
RH		 5615
5616 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5617 BFD_ASSERT (globals != NULL);
5618 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5619
5620 s = bfd_get_section_by_name
5621 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5622
252b5132
RH		 5623 BFD_ASSERT (s != NULL);
5624
21d799b5
NC		 5625 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5626 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5627
5628 BFD_ASSERT (tmp_name);
5629
5630 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5631
5632 myh = elf_link_hash_lookup
b34976b6 5633 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5634
5635 if (myh != NULL)
5636 {
9b485d32 5637 /* We've already seen this guy. */
252b5132 5638 free (tmp_name);
a4fd1a8e 5639 return myh;
252b5132
RH		 5640 }
5641
57e8b36a
NC		 5642 /* The only trick here is using hash_table->arm_glue_size as the value.
5643 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5644 putting it. The +1 on the value marks that the stub has not been
5645 output yet - not that it is a Thumb function. */
14a793b2 5646 bh = NULL;
dc810e39
AM		 5647 val = globals->arm_glue_size + 1;
5648 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5649 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5650 NULL, TRUE, FALSE, &bh);
252b5132 5651
b7693d02
DJ		 5652 myh = (struct elf_link_hash_entry *) bh;
5653 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5654 myh->forced_local = 1;
5655
252b5132
RH		 5656 free (tmp_name);
5657
27e55c4d
PB		 5658 if (link_info->shared || globals->root.is_relocatable_executable
5659 || globals->pic_veneer)
2f475487 5660 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5661 else if (globals->use_blx)
5662 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5663 else
2f475487
AM		 5664 size = ARM2THUMB_STATIC_GLUE_SIZE;
5665
5666 s->size += size;
5667 globals->arm_glue_size += size;
252b5132 5668
a4fd1a8e 5669 return myh;
252b5132
RH		 5670}
5671
845b51d6
PB		 5672/* Allocate space for ARMv4 BX veneers. */
5673
5674static void
5675record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5676{
5677 asection * s;
5678 struct elf32_arm_link_hash_table *globals;
5679 char *tmp_name;
5680 struct elf_link_hash_entry *myh;
5681 struct bfd_link_hash_entry *bh;
5682 bfd_vma val;
5683
5684 /* BX PC does not need a veneer. */
5685 if (reg == 15)
5686 return;
5687
5688 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5689 BFD_ASSERT (globals != NULL);
5690 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5691
5692 /* Check if this veneer has already been allocated. */
5693 if (globals->bx_glue_offset[reg])
5694 return;
5695
5696 s = bfd_get_section_by_name
5697 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5698
5699 BFD_ASSERT (s != NULL);
5700
5701 /* Add symbol for veneer. */
21d799b5
NC		 5702 tmp_name = (char *)
5703 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5704
845b51d6 5705 BFD_ASSERT (tmp_name);
906e58ca 5706
845b51d6 5707 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5708
845b51d6
PB		 5709 myh = elf_link_hash_lookup
5710 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5711
845b51d6 5712 BFD_ASSERT (myh == NULL);
906e58ca 5713
845b51d6
PB		 5714 bh = NULL;
5715 val = globals->bx_glue_size;
5716 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5717 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5718 NULL, TRUE, FALSE, &bh);
5719
5720 myh = (struct elf_link_hash_entry *) bh;
5721 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5722 myh->forced_local = 1;
5723
5724 s->size += ARM_BX_VENEER_SIZE;
5725 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5726 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5727}
5728
5729
c7b8f16e
JB		 5730/* Add an entry to the code/data map for section SEC. */
5731
5732static void
5733elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5734{
5735 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5736 unsigned int newidx;
906e58ca 5737
c7b8f16e
JB		 5738 if (sec_data->map == NULL)
5739 {
21d799b5
NC		 5740 sec_data->map = (elf32_arm_section_map *)
5741 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5742 sec_data->mapcount = 0;
5743 sec_data->mapsize = 1;
5744 }
906e58ca 5745
c7b8f16e 5746 newidx = sec_data->mapcount++;
906e58ca 5747
c7b8f16e
JB		 5748 if (sec_data->mapcount > sec_data->mapsize)
5749 {
5750 sec_data->mapsize *= 2;
21d799b5
NC		 5751 sec_data->map = (elf32_arm_section_map *)
5752 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5753 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5754 }
5755
5756 if (sec_data->map)
5757 {
5758 sec_data->map[newidx].vma = vma;
5759 sec_data->map[newidx].type = type;
c7b8f16e 5760 }
c7b8f16e
JB		 5761}
5762
5763
5764/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5765 veneers are handled for now. */
5766
5767static bfd_vma
5768record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5769 elf32_vfp11_erratum_list *branch,
5770 bfd *branch_bfd,
5771 asection *branch_sec,
5772 unsigned int offset)
5773{
5774 asection *s;
5775 struct elf32_arm_link_hash_table *hash_table;
5776 char *tmp_name;
5777 struct elf_link_hash_entry *myh;
5778 struct bfd_link_hash_entry *bh;
5779 bfd_vma val;
5780 struct _arm_elf_section_data *sec_data;
c7b8f16e 5781 elf32_vfp11_erratum_list *newerr;
906e58ca 5782
c7b8f16e 5783 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5784 BFD_ASSERT (hash_table != NULL);
5785 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5786
c7b8f16e
JB		 5787 s = bfd_get_section_by_name
5788 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5789
c7b8f16e 5790 sec_data = elf32_arm_section_data (s);
906e58ca 5791
c7b8f16e 5792 BFD_ASSERT (s != NULL);
906e58ca 5793
21d799b5
NC		 5794 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5795 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5796
c7b8f16e 5797 BFD_ASSERT (tmp_name);
906e58ca 5798
c7b8f16e
JB		 5799 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5800 hash_table->num_vfp11_fixes);
906e58ca 5801
c7b8f16e
JB		 5802 myh = elf_link_hash_lookup
5803 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5804
c7b8f16e 5805 BFD_ASSERT (myh == NULL);
906e58ca 5806
c7b8f16e
JB		 5807 bh = NULL;
5808 val = hash_table->vfp11_erratum_glue_size;
5809 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5810 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5811 NULL, TRUE, FALSE, &bh);
5812
5813 myh = (struct elf_link_hash_entry *) bh;
5814 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5815 myh->forced_local = 1;
5816
5817 /* Link veneer back to calling location. */
c7e2358a 5818 sec_data->erratumcount += 1;
21d799b5
NC		 5819 newerr = (elf32_vfp11_erratum_list *)
5820 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5821
c7b8f16e
JB		 5822 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5823 newerr->vma = -1;
5824 newerr->u.v.branch = branch;
5825 newerr->u.v.id = hash_table->num_vfp11_fixes;
5826 branch->u.b.veneer = newerr;
5827
5828 newerr->next = sec_data->erratumlist;
5829 sec_data->erratumlist = newerr;
5830
5831 /* A symbol for the return from the veneer. */
5832 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5833 hash_table->num_vfp11_fixes);
5834
5835 myh = elf_link_hash_lookup
5836 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5837
c7b8f16e
JB		 5838 if (myh != NULL)
5839 abort ();
5840
5841 bh = NULL;
5842 val = offset + 4;
5843 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5844 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5845
c7b8f16e
JB		 5846 myh = (struct elf_link_hash_entry *) bh;
5847 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5848 myh->forced_local = 1;
5849
5850 free (tmp_name);
906e58ca 5851
c7b8f16e
JB		 5852 /* Generate a mapping symbol for the veneer section, and explicitly add an
5853 entry for that symbol to the code/data map for the section. */
5854 if (hash_table->vfp11_erratum_glue_size == 0)
5855 {
5856 bh = NULL;
5857 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5858 ever requires this erratum fix. */
5859 _bfd_generic_link_add_one_symbol (link_info,
5860 hash_table->bfd_of_glue_owner, "$a",
5861 BSF_LOCAL, s, 0, NULL,
5862 TRUE, FALSE, &bh);
5863
5864 myh = (struct elf_link_hash_entry *) bh;
5865 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5866 myh->forced_local = 1;
906e58ca 5867
c7b8f16e
JB		 5868 /* The elf32_arm_init_maps function only cares about symbols from input
5869 BFDs. We must make a note of this generated mapping symbol
5870 ourselves so that code byteswapping works properly in
5871 elf32_arm_write_section. */
5872 elf32_arm_section_map_add (s, 'a', 0);
5873 }
906e58ca 5874
c7b8f16e
JB		 5875 s->size += VFP11_ERRATUM_VENEER_SIZE;
5876 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5877 hash_table->num_vfp11_fixes++;
906e58ca 5878
c7b8f16e
JB		 5879 /* The offset of the veneer. */
5880 return val;
5881}
5882
8029a119 5883#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5884 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5885 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5886
5887/* Create a fake section for use by the ARM backend of the linker. */
5888
5889static bfd_boolean
5890arm_make_glue_section (bfd * abfd, const char * name)
5891{
5892 asection * sec;
5893
5894 sec = bfd_get_section_by_name (abfd, name);
5895 if (sec != NULL)
5896 /* Already made. */
5897 return TRUE;
5898
5899 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5900
5901 if (sec == NULL
5902 || !bfd_set_section_alignment (abfd, sec, 2))
5903 return FALSE;
5904
5905 /* Set the gc mark to prevent the section from being removed by garbage
5906 collection, despite the fact that no relocs refer to this section. */
5907 sec->gc_mark = 1;
5908
5909 return TRUE;
5910}
5911
8afb0e02
NC		 5912/* Add the glue sections to ABFD. This function is called from the
5913 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5914
b34976b6 5915bfd_boolean
57e8b36a
NC		 5916bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5917 struct bfd_link_info *info)
252b5132 5918{
8afb0e02
NC		 5919 /* If we are only performing a partial
5920 link do not bother adding the glue. */
1049f94e 5921 if (info->relocatable)
b34976b6 5922 return TRUE;
252b5132 5923
8029a119
NC		 5924 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5925 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5926 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5927 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5928}
5929
5930/* Select a BFD to be used to hold the sections used by the glue code.
5931 This function is called from the linker scripts in ld/emultempl/
8029a119 5932 {armelf/pe}.em. */
8afb0e02 5933
b34976b6 5934bfd_boolean
57e8b36a 5935bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5936{
5937 struct elf32_arm_link_hash_table *globals;
5938
5939 /* If we are only performing a partial link
5940 do not bother getting a bfd to hold the glue. */
1049f94e 5941 if (info->relocatable)
b34976b6 5942 return TRUE;
8afb0e02 5943
b7693d02
DJ		 5944 /* Make sure we don't attach the glue sections to a dynamic object. */
5945 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5946
8afb0e02 5947 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5948 BFD_ASSERT (globals != NULL);
5949
5950 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5951 return TRUE;
8afb0e02 5952
252b5132
RH		 5953 /* Save the bfd for later use. */
5954 globals->bfd_of_glue_owner = abfd;
cedb70c5 5955
b34976b6 5956 return TRUE;
252b5132
RH		 5957}
5958
906e58ca
NC		 5959static void
5960check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5961{
2de70689
MGD		 5962 int cpu_arch;
5963
5964 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5965 Tag_CPU_arch);
5966
5967 if (globals->fix_arm1176)
5968 {
5969 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
5970 globals->use_blx = 1;
5971 }
5972 else
5973 {
5974 if (cpu_arch > TAG_CPU_ARCH_V4T)
5975 globals->use_blx = 1;
5976 }
39b41c9c
PB		 5977}
5978
b34976b6 5979bfd_boolean
57e8b36a 5980bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5981 struct bfd_link_info *link_info)
252b5132
RH		 5982{
5983 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5984 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5985 Elf_Internal_Rela *irel, *irelend;
5986 bfd_byte *contents = NULL;
252b5132
RH		 5987
5988 asection *sec;
5989 struct elf32_arm_link_hash_table *globals;
5990
5991 /* If we are only performing a partial link do not bother
5992 to construct any glue. */
1049f94e 5993 if (link_info->relocatable)
b34976b6 5994 return TRUE;
252b5132 5995
39ce1a6a
NC		 5996 /* Here we have a bfd that is to be included on the link. We have a
5997 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5998 globals = elf32_arm_hash_table (link_info);
252b5132 5999 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6000
6001 check_use_blx (globals);
252b5132 6002
d504ffc8 6003 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6004 {
d003868e
AM		 6005 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6006 abfd);
e489d0ae
PB		 6007 return FALSE;
6008 }
f21f3fe0 6009
39ce1a6a
NC		 6010 /* PR 5398: If we have not decided to include any loadable sections in
6011 the output then we will not have a glue owner bfd. This is OK, it
6012 just means that there is nothing else for us to do here. */
6013 if (globals->bfd_of_glue_owner == NULL)
6014 return TRUE;
6015
252b5132
RH		 6016 /* Rummage around all the relocs and map the glue vectors. */
6017 sec = abfd->sections;
6018
6019 if (sec == NULL)
b34976b6 6020 return TRUE;
252b5132
RH		 6021
6022 for (; sec != NULL; sec = sec->next)
6023 {
6024 if (sec->reloc_count == 0)
6025 continue;
6026
2f475487
AM		 6027 if ((sec->flags & SEC_EXCLUDE) != 0)
6028 continue;
6029
0ffa91dd 6030 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6031
9b485d32 6032 /* Load the relocs. */
6cdc0ccc 6033 internal_relocs
906e58ca 6034 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6035
6cdc0ccc
AM		 6036 if (internal_relocs == NULL)
6037 goto error_return;
252b5132 6038
6cdc0ccc
AM		 6039 irelend = internal_relocs + sec->reloc_count;
6040 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6041 {
6042 long r_type;
6043 unsigned long r_index;
252b5132
RH		 6044
6045 struct elf_link_hash_entry *h;
6046
6047 r_type = ELF32_R_TYPE (irel->r_info);
6048 r_index = ELF32_R_SYM (irel->r_info);
6049
9b485d32 6050 /* These are the only relocation types we care about. */
ba96a88f 6051 if ( r_type != R_ARM_PC24
845b51d6 6052 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6053 continue;
6054
6055 /* Get the section contents if we haven't done so already. */
6056 if (contents == NULL)
6057 {
6058 /* Get cached copy if it exists. */
6059 if (elf_section_data (sec)->this_hdr.contents != NULL)
6060 contents = elf_section_data (sec)->this_hdr.contents;
6061 else
6062 {
6063 /* Go get them off disk. */
57e8b36a 6064 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6065 goto error_return;
6066 }
6067 }
6068
845b51d6
PB		 6069 if (r_type == R_ARM_V4BX)
6070 {
6071 int reg;
6072
6073 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6074 record_arm_bx_glue (link_info, reg);
6075 continue;
6076 }
6077
a7c10850 6078 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6079 h = NULL;
6080
9b485d32 6081 /* We don't care about local symbols. */
252b5132
RH		 6082 if (r_index < symtab_hdr->sh_info)
6083 continue;
6084
9b485d32 6085 /* This is an external symbol. */
252b5132
RH		 6086 r_index -= symtab_hdr->sh_info;
6087 h = (struct elf_link_hash_entry *)
6088 elf_sym_hashes (abfd)[r_index];
6089
6090 /* If the relocation is against a static symbol it must be within
6091 the current section and so cannot be a cross ARM/Thumb relocation. */
6092 if (h == NULL)
6093 continue;
6094
d504ffc8
DJ		 6095 /* If the call will go through a PLT entry then we do not need
6096 glue. */
362d30a1 6097 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6098 continue;
6099
252b5132
RH		 6100 switch (r_type)
6101 {
6102 case R_ARM_PC24:
6103 /* This one is a call from arm code. We need to look up
2f0ca46a 6104 the target of the call. If it is a thumb target, we
252b5132 6105 insert glue. */
35fc36a8 6106 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6107 record_arm_to_thumb_glue (link_info, h);
6108 break;
6109
252b5132 6110 default:
c6596c5e 6111 abort ();
252b5132
RH		 6112 }
6113 }
6cdc0ccc
AM		 6114
6115 if (contents != NULL
6116 && elf_section_data (sec)->this_hdr.contents != contents)
6117 free (contents);
6118 contents = NULL;
6119
6120 if (internal_relocs != NULL
6121 && elf_section_data (sec)->relocs != internal_relocs)
6122 free (internal_relocs);
6123 internal_relocs = NULL;
252b5132
RH		 6124 }
6125
b34976b6 6126 return TRUE;
9a5aca8c 6127
252b5132 6128error_return:
6cdc0ccc
AM		 6129 if (contents != NULL
6130 && elf_section_data (sec)->this_hdr.contents != contents)
6131 free (contents);
6132 if (internal_relocs != NULL
6133 && elf_section_data (sec)->relocs != internal_relocs)
6134 free (internal_relocs);
9a5aca8c 6135
b34976b6 6136 return FALSE;
252b5132 6137}
7e392df6 6138#endif
252b5132 6139
eb043451 6140
c7b8f16e
JB		 6141/* Initialise maps of ARM/Thumb/data for input BFDs. */
6142
6143void
6144bfd_elf32_arm_init_maps (bfd *abfd)
6145{
6146 Elf_Internal_Sym *isymbuf;
6147 Elf_Internal_Shdr *hdr;
6148 unsigned int i, localsyms;
6149
af1f4419
NC		 6150 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6151 if (! is_arm_elf (abfd))
6152 return;
6153
c7b8f16e
JB		 6154 if ((abfd->flags & DYNAMIC) != 0)
6155 return;
6156
0ffa91dd 6157 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6158 localsyms = hdr->sh_info;
6159
6160 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6161 should contain the number of local symbols, which should come before any
6162 global symbols. Mapping symbols are always local. */
6163 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6164 NULL);
6165
6166 /* No internal symbols read? Skip this BFD. */
6167 if (isymbuf == NULL)
6168 return;
6169
6170 for (i = 0; i < localsyms; i++)
6171 {
6172 Elf_Internal_Sym *isym = &isymbuf[i];
6173 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6174 const char *name;
906e58ca 6175
c7b8f16e
JB		 6176 if (sec != NULL
6177 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6178 {
6179 name = bfd_elf_string_from_elf_section (abfd,
6180 hdr->sh_link, isym->st_name);
906e58ca 6181
c7b8f16e
JB		 6182 if (bfd_is_arm_special_symbol_name (name,
6183 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6184 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6185 }
6186 }
6187}
6188
6189
48229727
JB		 6190/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6191 say what they wanted. */
6192
6193void
6194bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6195{
6196 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6197 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6198
4dfe6ac6
NC		 6199 if (globals == NULL)
6200 return;
6201
48229727
JB		 6202 if (globals->fix_cortex_a8 == -1)
6203 {
6204 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6205 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6206 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6207 || out_attr[Tag_CPU_arch_profile].i == 0))
6208 globals->fix_cortex_a8 = 1;
6209 else
6210 globals->fix_cortex_a8 = 0;
6211 }
6212}
6213
6214
c7b8f16e
JB		 6215void
6216bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6217{
6218 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6219 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6220
4dfe6ac6
NC		 6221 if (globals == NULL)
6222 return;
c7b8f16e
JB		 6223 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6224 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6225 {
6226 switch (globals->vfp11_fix)
6227 {
6228 case BFD_ARM_VFP11_FIX_DEFAULT:
6229 case BFD_ARM_VFP11_FIX_NONE:
6230 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6231 break;
906e58ca 6232
c7b8f16e
JB		 6233 default:
6234 /* Give a warning, but do as the user requests anyway. */
6235 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6236 "workaround is not necessary for target architecture"), obfd);
6237 }
6238 }
6239 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6240 /* For earlier architectures, we might need the workaround, but do not
6241 enable it by default. If users is running with broken hardware, they
6242 must enable the erratum fix explicitly. */
6243 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6244}
6245
6246
906e58ca
NC		 6247enum bfd_arm_vfp11_pipe
6248{
c7b8f16e
JB		 6249 VFP11_FMAC,
6250 VFP11_LS,
6251 VFP11_DS,
6252 VFP11_BAD
6253};
6254
6255/* Return a VFP register number. This is encoded as RX:X for single-precision
6256 registers, or X:RX for double-precision registers, where RX is the group of
6257 four bits in the instruction encoding and X is the single extension bit.
6258 RX and X fields are specified using their lowest (starting) bit. The return
6259 value is:
6260
6261 0...31: single-precision registers s0...s31
6262 32...63: double-precision registers d0...d31.
906e58ca 6263
c7b8f16e
JB		 6264 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6265 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6266
c7b8f16e
JB		 6267static unsigned int
6268bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6269 unsigned int x)
6270{
6271 if (is_double)
6272 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6273 else
6274 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6275}
6276
6277/* Set bits in *WMASK according to a register number REG as encoded by
6278 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6279
6280static void
6281bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6282{
6283 if (reg < 32)
6284 *wmask |= 1 << reg;
6285 else if (reg < 48)
6286 *wmask |= 3 << ((reg - 32) * 2);
6287}
6288
6289/* Return TRUE if WMASK overwrites anything in REGS. */
6290
6291static bfd_boolean
6292bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6293{
6294 int i;
906e58ca 6295
c7b8f16e
JB		 6296 for (i = 0; i < numregs; i++)
6297 {
6298 unsigned int reg = regs[i];
6299
6300 if (reg < 32 && (wmask & (1 << reg)) != 0)
6301 return TRUE;
906e58ca 6302
c7b8f16e
JB		 6303 reg -= 32;
6304
6305 if (reg >= 16)
6306 continue;
906e58ca 6307
c7b8f16e
JB		 6308 if ((wmask & (3 << (reg * 2))) != 0)
6309 return TRUE;
6310 }
906e58ca 6311
c7b8f16e
JB		 6312 return FALSE;
6313}
6314
6315/* In this function, we're interested in two things: finding input registers
6316 for VFP data-processing instructions, and finding the set of registers which
6317 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6318 hold the written set, so FLDM etc. are easy to deal with (we're only
6319 interested in 32 SP registers or 16 dp registers, due to the VFP version
6320 implemented by the chip in question). DP registers are marked by setting
6321 both SP registers in the write mask). */
6322
6323static enum bfd_arm_vfp11_pipe
6324bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6325 int *numregs)
6326{
91d6fa6a 6327 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6328 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6329
6330 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6331 {
6332 unsigned int pqrs;
6333 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6334 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6335
6336 pqrs = ((insn & 0x00800000) >> 20)
6337 | ((insn & 0x00300000) >> 19)
6338 | ((insn & 0x00000040) >> 6);
6339
6340 switch (pqrs)
6341 {
6342 case 0: /* fmac[sd]. */
6343 case 1: /* fnmac[sd]. */
6344 case 2: /* fmsc[sd]. */
6345 case 3: /* fnmsc[sd]. */
91d6fa6a 6346 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6347 bfd_arm_vfp11_write_mask (destmask, fd);
6348 regs[0] = fd;
6349 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6350 regs[2] = fm;
6351 *numregs = 3;
6352 break;
6353
6354 case 4: /* fmul[sd]. */
6355 case 5: /* fnmul[sd]. */
6356 case 6: /* fadd[sd]. */
6357 case 7: /* fsub[sd]. */
91d6fa6a 6358 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6359 goto vfp_binop;
6360
6361 case 8: /* fdiv[sd]. */
91d6fa6a 6362 vpipe = VFP11_DS;
c7b8f16e
JB		 6363 vfp_binop:
6364 bfd_arm_vfp11_write_mask (destmask, fd);
6365 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6366 regs[1] = fm;
6367 *numregs = 2;
6368 break;
6369
6370 case 15: /* extended opcode. */
6371 {
6372 unsigned int extn = ((insn >> 15) & 0x1e)
6373 | ((insn >> 7) & 1);
6374
6375 switch (extn)
6376 {
6377 case 0: /* fcpy[sd]. */
6378 case 1: /* fabs[sd]. */
6379 case 2: /* fneg[sd]. */
6380 case 8: /* fcmp[sd]. */
6381 case 9: /* fcmpe[sd]. */
6382 case 10: /* fcmpz[sd]. */
6383 case 11: /* fcmpez[sd]. */
6384 case 16: /* fuito[sd]. */
6385 case 17: /* fsito[sd]. */
6386 case 24: /* ftoui[sd]. */
6387 case 25: /* ftouiz[sd]. */
6388 case 26: /* ftosi[sd]. */
6389 case 27: /* ftosiz[sd]. */
6390 /* These instructions will not bounce due to underflow. */
6391 *numregs = 0;
91d6fa6a 6392 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6393 break;
6394
6395 case 3: /* fsqrt[sd]. */
6396 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6397 registers to cause the erratum in previous instructions. */
6398 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 6399 vpipe = VFP11_DS;
c7b8f16e
JB		 6400 break;
6401
6402 case 15: /* fcvt{ds,sd}. */
6403 {
6404 int rnum = 0;
6405
6406 bfd_arm_vfp11_write_mask (destmask, fd);
6407
6408 /* Only FCVTSD can underflow. */
6409 if ((insn & 0x100) != 0)
6410 regs[rnum++] = fm;
6411
6412 *numregs = rnum;
6413
91d6fa6a 6414 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6415 }
6416 break;
6417
6418 default:
6419 return VFP11_BAD;
6420 }
6421 }
6422 break;
6423
6424 default:
6425 return VFP11_BAD;
6426 }
6427 }
6428 /* Two-register transfer. */
6429 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6430 {
6431 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6432
c7b8f16e
JB		 6433 if ((insn & 0x100000) == 0)
6434 {
6435 if (is_double)
6436 bfd_arm_vfp11_write_mask (destmask, fm);
6437 else
6438 {
6439 bfd_arm_vfp11_write_mask (destmask, fm);
6440 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6441 }
6442 }
6443
91d6fa6a 6444 vpipe = VFP11_LS;
c7b8f16e
JB		 6445 }
6446 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6447 {
6448 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6449 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6450
c7b8f16e
JB		 6451 switch (puw)
6452 {
6453 case 0: /* Two-reg transfer. We should catch these above. */
6454 abort ();
906e58ca 6455
c7b8f16e
JB		 6456 case 2: /* fldm[sdx]. */
6457 case 3:
6458 case 5:
6459 {
6460 unsigned int i, offset = insn & 0xff;
6461
6462 if (is_double)
6463 offset >>= 1;
6464
6465 for (i = fd; i < fd + offset; i++)
6466 bfd_arm_vfp11_write_mask (destmask, i);
6467 }
6468 break;
906e58ca 6469
c7b8f16e
JB		 6470 case 4: /* fld[sd]. */
6471 case 6:
6472 bfd_arm_vfp11_write_mask (destmask, fd);
6473 break;
906e58ca 6474
c7b8f16e
JB		 6475 default:
6476 return VFP11_BAD;
6477 }
6478
91d6fa6a 6479 vpipe = VFP11_LS;
c7b8f16e
JB		 6480 }
6481 /* Single-register transfer. Note L==0. */
6482 else if ((insn & 0x0f100e10) == 0x0e000a10)
6483 {
6484 unsigned int opcode = (insn >> 21) & 7;
6485 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6486
6487 switch (opcode)
6488 {
6489 case 0: /* fmsr/fmdlr. */
6490 case 1: /* fmdhr. */
6491 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6492 destination register. I don't know if this is exactly right,
6493 but it is the conservative choice. */
6494 bfd_arm_vfp11_write_mask (destmask, fn);
6495 break;
6496
6497 case 7: /* fmxr. */
6498 break;
6499 }
6500
91d6fa6a 6501 vpipe = VFP11_LS;
c7b8f16e
JB		 6502 }
6503
91d6fa6a 6504 return vpipe;
c7b8f16e
JB		 6505}
6506
6507
6508static int elf32_arm_compare_mapping (const void * a, const void * b);
6509
6510
6511/* Look for potentially-troublesome code sequences which might trigger the
6512 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6513 (available from ARM) for details of the erratum. A short version is
6514 described in ld.texinfo. */
6515
6516bfd_boolean
6517bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6518{
6519 asection *sec;
6520 bfd_byte *contents = NULL;
6521 int state = 0;
6522 int regs[3], numregs = 0;
6523 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6524 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6525
4dfe6ac6
NC		 6526 if (globals == NULL)
6527 return FALSE;
6528
c7b8f16e
JB		 6529 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6530 The states transition as follows:
906e58ca 6531
c7b8f16e
JB		 6532 0 -> 1 (vector) or 0 -> 2 (scalar)
6533 A VFP FMAC-pipeline instruction has been seen. Fill
6534 regs[0]..regs[numregs-1] with its input operands. Remember this
6535 instruction in 'first_fmac'.
6536
6537 1 -> 2
6538 Any instruction, except for a VFP instruction which overwrites
6539 regs[*].
906e58ca 6540
c7b8f16e
JB		 6541 1 -> 3 [ -> 0 ] or
6542 2 -> 3 [ -> 0 ]
6543 A VFP instruction has been seen which overwrites any of regs[*].
6544 We must make a veneer! Reset state to 0 before examining next
6545 instruction.
906e58ca 6546
c7b8f16e
JB		 6547 2 -> 0
6548 If we fail to match anything in state 2, reset to state 0 and reset
6549 the instruction pointer to the instruction after 'first_fmac'.
6550
6551 If the VFP11 vector mode is in use, there must be at least two unrelated
6552 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6553 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6554
6555 /* If we are only performing a partial link do not bother
6556 to construct any glue. */
6557 if (link_info->relocatable)
6558 return TRUE;
6559
0ffa91dd
NC		 6560 /* Skip if this bfd does not correspond to an ELF image. */
6561 if (! is_arm_elf (abfd))
6562 return TRUE;
906e58ca 6563
c7b8f16e
JB		 6564 /* We should have chosen a fix type by the time we get here. */
6565 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6566
6567 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6568 return TRUE;
2e6030b9 6569
33a7ffc2
JM		 6570 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6571 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6572 return TRUE;
6573
c7b8f16e
JB		 6574 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6575 {
6576 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6577 struct _arm_elf_section_data *sec_data;
6578
6579 /* If we don't have executable progbits, we're not interested in this
6580 section. Also skip if section is to be excluded. */
6581 if (elf_section_type (sec) != SHT_PROGBITS
6582 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6583 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6584 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6585 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6586 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6587 continue;
6588
6589 sec_data = elf32_arm_section_data (sec);
906e58ca 6590
c7b8f16e
JB		 6591 if (sec_data->mapcount == 0)
6592 continue;
906e58ca 6593
c7b8f16e
JB		 6594 if (elf_section_data (sec)->this_hdr.contents != NULL)
6595 contents = elf_section_data (sec)->this_hdr.contents;
6596 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6597 goto error_return;
6598
6599 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6600 elf32_arm_compare_mapping);
6601
6602 for (span = 0; span < sec_data->mapcount; span++)
6603 {
6604 unsigned int span_start = sec_data->map[span].vma;
6605 unsigned int span_end = (span == sec_data->mapcount - 1)
6606 ? sec->size : sec_data->map[span + 1].vma;
6607 char span_type = sec_data->map[span].type;
906e58ca 6608
c7b8f16e
JB		 6609 /* FIXME: Only ARM mode is supported at present. We may need to
6610 support Thumb-2 mode also at some point. */
6611 if (span_type != 'a')
6612 continue;
6613
6614 for (i = span_start; i < span_end;)
6615 {
6616 unsigned int next_i = i + 4;
6617 unsigned int insn = bfd_big_endian (abfd)
6618 ? (contents[i] << 24)
6619 | (contents[i + 1] << 16)
6620 | (contents[i + 2] << 8)
6621 | contents[i + 3]
6622 : (contents[i + 3] << 24)
6623 | (contents[i + 2] << 16)
6624 | (contents[i + 1] << 8)
6625 | contents[i];
6626 unsigned int writemask = 0;
91d6fa6a 6627 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6628
6629 switch (state)
6630 {
6631 case 0:
91d6fa6a 6632 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6633 &numregs);
6634 /* I'm assuming the VFP11 erratum can trigger with denorm
6635 operands on either the FMAC or the DS pipeline. This might
6636 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6637 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6638 {
6639 state = use_vector ? 1 : 2;
6640 first_fmac = i;
6641 veneer_of_insn = insn;
6642 }
6643 break;
6644
6645 case 1:
6646 {
6647 int other_regs[3], other_numregs;
91d6fa6a 6648 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6649 other_regs,
6650 &other_numregs);
91d6fa6a 6651 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6652 && bfd_arm_vfp11_antidependency (writemask, regs,
6653 numregs))
6654 state = 3;
6655 else
6656 state = 2;
6657 }
6658 break;
6659
6660 case 2:
6661 {
6662 int other_regs[3], other_numregs;
91d6fa6a 6663 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6664 other_regs,
6665 &other_numregs);
91d6fa6a 6666 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6667 && bfd_arm_vfp11_antidependency (writemask, regs,
6668 numregs))
6669 state = 3;
6670 else
6671 {
6672 state = 0;
6673 next_i = first_fmac + 4;
6674 }
6675 }
6676 break;
6677
6678 case 3:
6679 abort (); /* Should be unreachable. */
6680 }
6681
6682 if (state == 3)
6683 {
21d799b5
NC		 6684 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6685 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6686
c7e2358a 6687 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6688
6689 newerr->u.b.vfp_insn = veneer_of_insn;
6690
6691 switch (span_type)
6692 {
6693 case 'a':
6694 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6695 break;
906e58ca 6696
c7b8f16e
JB		 6697 default:
6698 abort ();
6699 }
6700
6701 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6702 first_fmac);
6703
6704 newerr->vma = -1;
6705
6706 newerr->next = sec_data->erratumlist;
6707 sec_data->erratumlist = newerr;
6708
6709 state = 0;
6710 }
6711
6712 i = next_i;
6713 }
6714 }
906e58ca 6715
c7b8f16e
JB		 6716 if (contents != NULL
6717 && elf_section_data (sec)->this_hdr.contents != contents)
6718 free (contents);
6719 contents = NULL;
6720 }
6721
6722 return TRUE;
6723
6724error_return:
6725 if (contents != NULL
6726 && elf_section_data (sec)->this_hdr.contents != contents)
6727 free (contents);
906e58ca 6728
c7b8f16e
JB		 6729 return FALSE;
6730}
6731
6732/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6733 after sections have been laid out, using specially-named symbols. */
6734
6735void
6736bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6737 struct bfd_link_info *link_info)
6738{
6739 asection *sec;
6740 struct elf32_arm_link_hash_table *globals;
6741 char *tmp_name;
906e58ca 6742
c7b8f16e
JB		 6743 if (link_info->relocatable)
6744 return;
2e6030b9
MS		 6745
6746 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6747 if (! is_arm_elf (abfd))
2e6030b9
MS		 6748 return;
6749
c7b8f16e 6750 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6751 if (globals == NULL)
6752 return;
906e58ca 6753
21d799b5
NC		 6754 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6755 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6756
6757 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6758 {
6759 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6760 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6761
c7b8f16e
JB		 6762 for (; errnode != NULL; errnode = errnode->next)
6763 {
6764 struct elf_link_hash_entry *myh;
6765 bfd_vma vma;
6766
6767 switch (errnode->type)
6768 {
6769 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6770 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6771 /* Find veneer symbol. */
6772 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6773 errnode->u.b.veneer->u.v.id);
6774
6775 myh = elf_link_hash_lookup
6776 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6777
6778 if (myh == NULL)
6779 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6780 "`%s'"), abfd, tmp_name);
6781
6782 vma = myh->root.u.def.section->output_section->vma
6783 + myh->root.u.def.section->output_offset
6784 + myh->root.u.def.value;
6785
6786 errnode->u.b.veneer->vma = vma;
6787 break;
6788
6789 case VFP11_ERRATUM_ARM_VENEER:
6790 case VFP11_ERRATUM_THUMB_VENEER:
6791 /* Find return location. */
6792 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6793 errnode->u.v.id);
6794
6795 myh = elf_link_hash_lookup
6796 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6797
6798 if (myh == NULL)
6799 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6800 "`%s'"), abfd, tmp_name);
6801
6802 vma = myh->root.u.def.section->output_section->vma
6803 + myh->root.u.def.section->output_offset
6804 + myh->root.u.def.value;
6805
6806 errnode->u.v.branch->vma = vma;
6807 break;
906e58ca 6808
c7b8f16e
JB		 6809 default:
6810 abort ();
6811 }
6812 }
6813 }
906e58ca 6814
c7b8f16e
JB		 6815 free (tmp_name);
6816}
6817
6818
eb043451
PB		 6819/* Set target relocation values needed during linking. */
6820
6821void
bf21ed78
MS		 6822bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6823 struct bfd_link_info *link_info,
eb043451 6824 int target1_is_rel,
319850b4 6825 char * target2_type,
33bfe774 6826 int fix_v4bx,
c7b8f16e 6827 int use_blx,
bf21ed78 6828 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6829 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 6830 int pic_veneer, int fix_cortex_a8,
6831 int fix_arm1176)
eb043451
PB		 6832{
6833 struct elf32_arm_link_hash_table *globals;
6834
6835 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6836 if (globals == NULL)
6837 return;
eb043451
PB		 6838
6839 globals->target1_is_rel = target1_is_rel;
6840 if (strcmp (target2_type, "rel") == 0)
6841 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6842 else if (strcmp (target2_type, "abs") == 0)
6843 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6844 else if (strcmp (target2_type, "got-rel") == 0)
6845 globals->target2_reloc = R_ARM_GOT_PREL;
6846 else
6847 {
6848 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6849 target2_type);
6850 }
319850b4 6851 globals->fix_v4bx = fix_v4bx;
33bfe774 6852 globals->use_blx |= use_blx;
c7b8f16e 6853 globals->vfp11_fix = vfp11_fix;
27e55c4d 6854 globals->pic_veneer = pic_veneer;
48229727 6855 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 6856 globals->fix_arm1176 = fix_arm1176;
bf21ed78 6857
0ffa91dd
NC		 6858 BFD_ASSERT (is_arm_elf (output_bfd));
6859 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6860 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6861}
eb043451 6862
12a0a0fd 6863/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6864
12a0a0fd
PB		 6865static void
6866insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6867{
6868 bfd_vma upper;
6869 bfd_vma lower;
6870 int reloc_sign;
6871
6872 BFD_ASSERT ((offset & 1) == 0);
6873
6874 upper = bfd_get_16 (abfd, insn);
6875 lower = bfd_get_16 (abfd, insn + 2);
6876 reloc_sign = (offset < 0) ? 1 : 0;
6877 upper = (upper & ~(bfd_vma) 0x7ff)
6878 | ((offset >> 12) & 0x3ff)
6879 | (reloc_sign << 10);
906e58ca 6880 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6881 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6882 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6883 | ((offset >> 1) & 0x7ff);
6884 bfd_put_16 (abfd, upper, insn);
6885 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6886}
6887
9b485d32
NC		 6888/* Thumb code calling an ARM function. */
6889
252b5132 6890static int
57e8b36a
NC		 6891elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6892 const char * name,
6893 bfd * input_bfd,
6894 bfd * output_bfd,
6895 asection * input_section,
6896 bfd_byte * hit_data,
6897 asection * sym_sec,
6898 bfd_vma offset,
6899 bfd_signed_vma addend,
f2a9dd69
DJ		 6900 bfd_vma val,
6901 char **error_message)
252b5132 6902{
bcbdc74c 6903 asection * s = 0;
dc810e39 6904 bfd_vma my_offset;
252b5132 6905 long int ret_offset;
bcbdc74c
NC		 6906 struct elf_link_hash_entry * myh;
6907 struct elf32_arm_link_hash_table * globals;
252b5132 6908
f2a9dd69 6909 myh = find_thumb_glue (info, name, error_message);
252b5132 6910 if (myh == NULL)
b34976b6 6911 return FALSE;
252b5132
RH		 6912
6913 globals = elf32_arm_hash_table (info);
252b5132
RH		 6914 BFD_ASSERT (globals != NULL);
6915 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6916
6917 my_offset = myh->root.u.def.value;
6918
6919 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6920 THUMB2ARM_GLUE_SECTION_NAME);
6921
6922 BFD_ASSERT (s != NULL);
6923 BFD_ASSERT (s->contents != NULL);
6924 BFD_ASSERT (s->output_section != NULL);
6925
6926 if ((my_offset & 0x01) == 0x01)
6927 {
6928 if (sym_sec != NULL
6929 && sym_sec->owner != NULL
6930 && !INTERWORK_FLAG (sym_sec->owner))
6931 {
8f615d07 6932 (*_bfd_error_handler)
d003868e
AM		 6933 (_("%B(%s): warning: interworking not enabled.\n"
6934 " first occurrence: %B: thumb call to arm"),
6935 sym_sec->owner, input_bfd, name);
252b5132 6936
b34976b6 6937 return FALSE;
252b5132
RH		 6938 }
6939
6940 --my_offset;
6941 myh->root.u.def.value = my_offset;
6942
52ab56c2
PB		 6943 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6944 s->contents + my_offset);
252b5132 6945
52ab56c2
PB		 6946 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6947 s->contents + my_offset + 2);
252b5132
RH		 6948
6949 ret_offset =
9b485d32
NC		 6950 /* Address of destination of the stub. */
6951 ((bfd_signed_vma) val)
252b5132 6952 - ((bfd_signed_vma)
57e8b36a
NC		 6953 /* Offset from the start of the current section
6954 to the start of the stubs. */
9b485d32
NC		 6955 (s->output_offset
6956 /* Offset of the start of this stub from the start of the stubs. */
6957 + my_offset
6958 /* Address of the start of the current section. */
6959 + s->output_section->vma)
6960 /* The branch instruction is 4 bytes into the stub. */
6961 + 4
6962 /* ARM branches work from the pc of the instruction + 8. */
6963 + 8);
252b5132 6964
52ab56c2
PB		 6965 put_arm_insn (globals, output_bfd,
6966 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6967 s->contents + my_offset + 4);
252b5132
RH		 6968 }
6969
6970 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6971
427bfd90
NC		 6972 /* Now go back and fix up the original BL insn to point to here. */
6973 ret_offset =
6974 /* Address of where the stub is located. */
6975 (s->output_section->vma + s->output_offset + my_offset)
6976 /* Address of where the BL is located. */
57e8b36a
NC		 6977 - (input_section->output_section->vma + input_section->output_offset
6978 + offset)
427bfd90
NC		 6979 /* Addend in the relocation. */
6980 - addend
6981 /* Biassing for PC-relative addressing. */
6982 - 8;
252b5132 6983
12a0a0fd 6984 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6985
b34976b6 6986 return TRUE;
252b5132
RH		 6987}
6988
a4fd1a8e 6989/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6990
a4fd1a8e
PB		 6991static struct elf_link_hash_entry *
6992elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6993 const char * name,
6994 bfd * input_bfd,
6995 bfd * output_bfd,
6996 asection * sym_sec,
6997 bfd_vma val,
8029a119
NC		 6998 asection * s,
6999 char ** error_message)
252b5132 7000{
dc810e39 7001 bfd_vma my_offset;
252b5132 7002 long int ret_offset;
bcbdc74c
NC		 7003 struct elf_link_hash_entry * myh;
7004 struct elf32_arm_link_hash_table * globals;
252b5132 7005
f2a9dd69 7006 myh = find_arm_glue (info, name, error_message);
252b5132 7007 if (myh == NULL)
a4fd1a8e 7008 return NULL;
252b5132
RH		 7009
7010 globals = elf32_arm_hash_table (info);
252b5132
RH		 7011 BFD_ASSERT (globals != NULL);
7012 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7013
7014 my_offset = myh->root.u.def.value;
252b5132
RH		 7015
7016 if ((my_offset & 0x01) == 0x01)
7017 {
7018 if (sym_sec != NULL
7019 && sym_sec->owner != NULL
7020 && !INTERWORK_FLAG (sym_sec->owner))
7021 {
8f615d07 7022 (*_bfd_error_handler)
d003868e
AM		 7023 (_("%B(%s): warning: interworking not enabled.\n"
7024 " first occurrence: %B: arm call to thumb"),
7025 sym_sec->owner, input_bfd, name);
252b5132 7026 }
9b485d32 7027
252b5132
RH		 7028 --my_offset;
7029 myh->root.u.def.value = my_offset;
7030
27e55c4d
PB		 7031 if (info->shared || globals->root.is_relocatable_executable
7032 || globals->pic_veneer)
8f6277f5
PB		 7033 {
7034 /* For relocatable objects we can't use absolute addresses,
7035 so construct the address from a relative offset. */
7036 /* TODO: If the offset is small it's probably worth
7037 constructing the address with adds. */
52ab56c2
PB		 7038 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7039 s->contents + my_offset);
7040 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7041 s->contents + my_offset + 4);
7042 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7043 s->contents + my_offset + 8);
8f6277f5
PB		 7044 /* Adjust the offset by 4 for the position of the add,
7045 and 8 for the pipeline offset. */
7046 ret_offset = (val - (s->output_offset
7047 + s->output_section->vma
7048 + my_offset + 12))
7049 | 1;
7050 bfd_put_32 (output_bfd, ret_offset,
7051 s->contents + my_offset + 12);
7052 }
26079076
PB		 7053 else if (globals->use_blx)
7054 {
7055 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7056 s->contents + my_offset);
7057
7058 /* It's a thumb address. Add the low order bit. */
7059 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7060 s->contents + my_offset + 4);
7061 }
8f6277f5
PB		 7062 else
7063 {
52ab56c2
PB		 7064 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7065 s->contents + my_offset);
252b5132 7066
52ab56c2
PB		 7067 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7068 s->contents + my_offset + 4);
252b5132 7069
8f6277f5
PB		 7070 /* It's a thumb address. Add the low order bit. */
7071 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7072 s->contents + my_offset + 8);
8029a119
NC		 7073
7074 my_offset += 12;
8f6277f5 7075 }
252b5132
RH		 7076 }
7077
7078 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7079
a4fd1a8e
PB		 7080 return myh;
7081}
7082
7083/* Arm code calling a Thumb function. */
7084
7085static int
7086elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7087 const char * name,
7088 bfd * input_bfd,
7089 bfd * output_bfd,
7090 asection * input_section,
7091 bfd_byte * hit_data,
7092 asection * sym_sec,
7093 bfd_vma offset,
7094 bfd_signed_vma addend,
f2a9dd69
DJ		 7095 bfd_vma val,
7096 char **error_message)
a4fd1a8e
PB		 7097{
7098 unsigned long int tmp;
7099 bfd_vma my_offset;
7100 asection * s;
7101 long int ret_offset;
7102 struct elf_link_hash_entry * myh;
7103 struct elf32_arm_link_hash_table * globals;
7104
7105 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7106 BFD_ASSERT (globals != NULL);
7107 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7108
7109 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7110 ARM2THUMB_GLUE_SECTION_NAME);
7111 BFD_ASSERT (s != NULL);
7112 BFD_ASSERT (s->contents != NULL);
7113 BFD_ASSERT (s->output_section != NULL);
7114
7115 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7116 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7117 if (!myh)
7118 return FALSE;
7119
7120 my_offset = myh->root.u.def.value;
252b5132
RH		 7121 tmp = bfd_get_32 (input_bfd, hit_data);
7122 tmp = tmp & 0xFF000000;
7123
9b485d32 7124 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7125 ret_offset = (s->output_offset
7126 + my_offset
7127 + s->output_section->vma
7128 - (input_section->output_offset
7129 + input_section->output_section->vma
7130 + offset + addend)
7131 - 8);
9a5aca8c 7132
252b5132
RH		 7133 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7134
dc810e39 7135 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7136
b34976b6 7137 return TRUE;
252b5132
RH		 7138}
7139
a4fd1a8e
PB		 7140/* Populate Arm stub for an exported Thumb function. */
7141
7142static bfd_boolean
7143elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7144{
7145 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7146 asection * s;
7147 struct elf_link_hash_entry * myh;
7148 struct elf32_arm_link_hash_entry *eh;
7149 struct elf32_arm_link_hash_table * globals;
7150 asection *sec;
7151 bfd_vma val;
f2a9dd69 7152 char *error_message;
a4fd1a8e 7153
906e58ca 7154 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7155 /* Allocate stubs for exported Thumb functions on v4t. */
7156 if (eh->export_glue == NULL)
7157 return TRUE;
7158
7159 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7160 BFD_ASSERT (globals != NULL);
7161 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7162
7163 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7164 ARM2THUMB_GLUE_SECTION_NAME);
7165 BFD_ASSERT (s != NULL);
7166 BFD_ASSERT (s->contents != NULL);
7167 BFD_ASSERT (s->output_section != NULL);
7168
7169 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7170
7171 BFD_ASSERT (sec->output_section != NULL);
7172
a4fd1a8e
PB		 7173 val = eh->export_glue->root.u.def.value + sec->output_offset
7174 + sec->output_section->vma;
8029a119 7175
a4fd1a8e
PB		 7176 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7177 h->root.u.def.section->owner,
f2a9dd69
DJ		 7178 globals->obfd, sec, val, s,
7179 &error_message);
a4fd1a8e
PB		 7180 BFD_ASSERT (myh);
7181 return TRUE;
7182}
7183
845b51d6
PB		 7184/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7185
7186static bfd_vma
7187elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7188{
7189 bfd_byte *p;
7190 bfd_vma glue_addr;
7191 asection *s;
7192 struct elf32_arm_link_hash_table *globals;
7193
7194 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7195 BFD_ASSERT (globals != NULL);
7196 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7197
7198 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7199 ARM_BX_GLUE_SECTION_NAME);
7200 BFD_ASSERT (s != NULL);
7201 BFD_ASSERT (s->contents != NULL);
7202 BFD_ASSERT (s->output_section != NULL);
7203
7204 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7205
7206 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7207
7208 if ((globals->bx_glue_offset[reg] & 1) == 0)
7209 {
7210 p = s->contents + glue_addr;
7211 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7212 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7213 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7214 globals->bx_glue_offset[reg] |= 1;
7215 }
7216
7217 return glue_addr + s->output_section->vma + s->output_offset;
7218}
7219
a4fd1a8e
PB		 7220/* Generate Arm stubs for exported Thumb symbols. */
7221static void
906e58ca 7222elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7223 struct bfd_link_info *link_info)
7224{
7225 struct elf32_arm_link_hash_table * globals;
7226
8029a119
NC		 7227 if (link_info == NULL)
7228 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7229 return;
7230
7231 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7232 if (globals == NULL)
7233 return;
7234
84c08195
PB		 7235 /* If blx is available then exported Thumb symbols are OK and there is
7236 nothing to do. */
a4fd1a8e
PB		 7237 if (globals->use_blx)
7238 return;
7239
7240 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7241 link_info);
7242}
7243
47beaa6a
RS		 7244/* Reserve space for COUNT dynamic relocations in relocation selection
7245 SRELOC. */
7246
7247static void
7248elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7249 bfd_size_type count)
7250{
7251 struct elf32_arm_link_hash_table *htab;
7252
7253 htab = elf32_arm_hash_table (info);
7254 BFD_ASSERT (htab->root.dynamic_sections_created);
7255 if (sreloc == NULL)
7256 abort ();
7257 sreloc->size += RELOC_SIZE (htab) * count;
7258}
7259
34e77a92
RS		 7260/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7261 dynamic, the relocations should go in SRELOC, otherwise they should
7262 go in the special .rel.iplt section. */
7263
7264static void
7265elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7266 bfd_size_type count)
7267{
7268 struct elf32_arm_link_hash_table *htab;
7269
7270 htab = elf32_arm_hash_table (info);
7271 if (!htab->root.dynamic_sections_created)
7272 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7273 else
7274 {
7275 BFD_ASSERT (sreloc != NULL);
7276 sreloc->size += RELOC_SIZE (htab) * count;
7277 }
7278}
7279
47beaa6a
RS		 7280/* Add relocation REL to the end of relocation section SRELOC. */
7281
7282static void
7283elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7284 asection *sreloc, Elf_Internal_Rela *rel)
7285{
7286 bfd_byte *loc;
7287 struct elf32_arm_link_hash_table *htab;
7288
7289 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7290 if (!htab->root.dynamic_sections_created
7291 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7292 sreloc = htab->root.irelplt;
47beaa6a
RS		 7293 if (sreloc == NULL)
7294 abort ();
7295 loc = sreloc->contents;
7296 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7297 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7298 abort ();
7299 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7300}
7301
34e77a92
RS		 7302/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7303 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7304 to .plt. */
7305
7306static void
7307elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7308 bfd_boolean is_iplt_entry,
7309 union gotplt_union *root_plt,
7310 struct arm_plt_info *arm_plt)
7311{
7312 struct elf32_arm_link_hash_table *htab;
7313 asection *splt;
7314 asection *sgotplt;
7315
7316 htab = elf32_arm_hash_table (info);
7317
7318 if (is_iplt_entry)
7319 {
7320 splt = htab->root.iplt;
7321 sgotplt = htab->root.igotplt;
7322
7323 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7324 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7325 }
7326 else
7327 {
7328 splt = htab->root.splt;
7329 sgotplt = htab->root.sgotplt;
7330
7331 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7332 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7333
7334 /* If this is the first .plt entry, make room for the special
7335 first entry. */
7336 if (splt->size == 0)
7337 splt->size += htab->plt_header_size;
7338 }
7339
7340 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7341 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7342 splt->size += PLT_THUMB_STUB_SIZE;
7343 root_plt->offset = splt->size;
7344 splt->size += htab->plt_entry_size;
7345
7346 if (!htab->symbian_p)
7347 {
7348 /* We also need to make an entry in the .got.plt section, which
7349 will be placed in the .got section by the linker script. */
7350 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7351 sgotplt->size += 4;
7352 }
7353}
7354
7355/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7356 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7357 Otherwise, DYNINDX is the index of the symbol in the dynamic
7358 symbol table and SYM_VALUE is undefined.
7359
7360 ROOT_PLT points to the offset of the PLT entry from the start of its
7361 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7362 bookkeeping information. */
7363
7364static void
7365elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7366 union gotplt_union *root_plt,
7367 struct arm_plt_info *arm_plt,
7368 int dynindx, bfd_vma sym_value)
7369{
7370 struct elf32_arm_link_hash_table *htab;
7371 asection *sgot;
7372 asection *splt;
7373 asection *srel;
7374 bfd_byte *loc;
7375 bfd_vma plt_index;
7376 Elf_Internal_Rela rel;
7377 bfd_vma plt_header_size;
7378 bfd_vma got_header_size;
7379
7380 htab = elf32_arm_hash_table (info);
7381
7382 /* Pick the appropriate sections and sizes. */
7383 if (dynindx == -1)
7384 {
7385 splt = htab->root.iplt;
7386 sgot = htab->root.igotplt;
7387 srel = htab->root.irelplt;
7388
7389 /* There are no reserved entries in .igot.plt, and no special
7390 first entry in .iplt. */
7391 got_header_size = 0;
7392 plt_header_size = 0;
7393 }
7394 else
7395 {
7396 splt = htab->root.splt;
7397 sgot = htab->root.sgotplt;
7398 srel = htab->root.srelplt;
7399
7400 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7401 plt_header_size = htab->plt_header_size;
7402 }
7403 BFD_ASSERT (splt != NULL && srel != NULL);
7404
7405 /* Fill in the entry in the procedure linkage table. */
7406 if (htab->symbian_p)
7407 {
7408 BFD_ASSERT (dynindx >= 0);
7409 put_arm_insn (htab, output_bfd,
7410 elf32_arm_symbian_plt_entry[0],
7411 splt->contents + root_plt->offset);
7412 bfd_put_32 (output_bfd,
7413 elf32_arm_symbian_plt_entry[1],
7414 splt->contents + root_plt->offset + 4);
7415
7416 /* Fill in the entry in the .rel.plt section. */
7417 rel.r_offset = (splt->output_section->vma
7418 + splt->output_offset
7419 + root_plt->offset + 4);
7420 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7421
7422 /* Get the index in the procedure linkage table which
7423 corresponds to this symbol. This is the index of this symbol
7424 in all the symbols for which we are making plt entries. The
7425 first entry in the procedure linkage table is reserved. */
7426 plt_index = ((root_plt->offset - plt_header_size)
7427 / htab->plt_entry_size);
7428 }
7429 else
7430 {
7431 bfd_vma got_offset, got_address, plt_address;
7432 bfd_vma got_displacement, initial_got_entry;
7433 bfd_byte * ptr;
7434
7435 BFD_ASSERT (sgot != NULL);
7436
7437 /* Get the offset into the .(i)got.plt table of the entry that
7438 corresponds to this function. */
7439 got_offset = (arm_plt->got_offset & -2);
7440
7441 /* Get the index in the procedure linkage table which
7442 corresponds to this symbol. This is the index of this symbol
7443 in all the symbols for which we are making plt entries.
7444 After the reserved .got.plt entries, all symbols appear in
7445 the same order as in .plt. */
7446 plt_index = (got_offset - got_header_size) / 4;
7447
7448 /* Calculate the address of the GOT entry. */
7449 got_address = (sgot->output_section->vma
7450 + sgot->output_offset
7451 + got_offset);
7452
7453 /* ...and the address of the PLT entry. */
7454 plt_address = (splt->output_section->vma
7455 + splt->output_offset
7456 + root_plt->offset);
7457
7458 ptr = splt->contents + root_plt->offset;
7459 if (htab->vxworks_p && info->shared)
7460 {
7461 unsigned int i;
7462 bfd_vma val;
7463
7464 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7465 {
7466 val = elf32_arm_vxworks_shared_plt_entry[i];
7467 if (i == 2)
7468 val |= got_address - sgot->output_section->vma;
7469 if (i == 5)
7470 val |= plt_index * RELOC_SIZE (htab);
7471 if (i == 2 || i == 5)
7472 bfd_put_32 (output_bfd, val, ptr);
7473 else
7474 put_arm_insn (htab, output_bfd, val, ptr);
7475 }
7476 }
7477 else if (htab->vxworks_p)
7478 {
7479 unsigned int i;
7480 bfd_vma val;
7481
7482 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7483 {
7484 val = elf32_arm_vxworks_exec_plt_entry[i];
7485 if (i == 2)
7486 val |= got_address;
7487 if (i == 4)
7488 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7489 if (i == 5)
7490 val |= plt_index * RELOC_SIZE (htab);
7491 if (i == 2 || i == 5)
7492 bfd_put_32 (output_bfd, val, ptr);
7493 else
7494 put_arm_insn (htab, output_bfd, val, ptr);
7495 }
7496
7497 loc = (htab->srelplt2->contents
7498 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7499
7500 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7501 referencing the GOT for this PLT entry. */
7502 rel.r_offset = plt_address + 8;
7503 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7504 rel.r_addend = got_offset;
7505 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7506 loc += RELOC_SIZE (htab);
7507
7508 /* Create the R_ARM_ABS32 relocation referencing the
7509 beginning of the PLT for this GOT entry. */
7510 rel.r_offset = got_address;
7511 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7512 rel.r_addend = 0;
7513 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7514 }
7515 else
7516 {
7517 /* Calculate the displacement between the PLT slot and the
7518 entry in the GOT. The eight-byte offset accounts for the
7519 value produced by adding to pc in the first instruction
7520 of the PLT stub. */
7521 got_displacement = got_address - (plt_address + 8);
7522
7523 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7524
7525 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7526 {
7527 put_thumb_insn (htab, output_bfd,
7528 elf32_arm_plt_thumb_stub[0], ptr - 4);
7529 put_thumb_insn (htab, output_bfd,
7530 elf32_arm_plt_thumb_stub[1], ptr - 2);
7531 }
7532
7533 put_arm_insn (htab, output_bfd,
7534 elf32_arm_plt_entry[0]
7535 | ((got_displacement & 0x0ff00000) >> 20),
7536 ptr + 0);
7537 put_arm_insn (htab, output_bfd,
7538 elf32_arm_plt_entry[1]
7539 | ((got_displacement & 0x000ff000) >> 12),
7540 ptr+ 4);
7541 put_arm_insn (htab, output_bfd,
7542 elf32_arm_plt_entry[2]
7543 | (got_displacement & 0x00000fff),
7544 ptr + 8);
7545#ifdef FOUR_WORD_PLT
7546 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7547#endif
7548 }
7549
7550 /* Fill in the entry in the .rel(a).(i)plt section. */
7551 rel.r_offset = got_address;
7552 rel.r_addend = 0;
7553 if (dynindx == -1)
7554 {
7555 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7556 The dynamic linker or static executable then calls SYM_VALUE
7557 to determine the correct run-time value of the .igot.plt entry. */
7558 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7559 initial_got_entry = sym_value;
7560 }
7561 else
7562 {
7563 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7564 initial_got_entry = (splt->output_section->vma
7565 + splt->output_offset);
7566 }
7567
7568 /* Fill in the entry in the global offset table. */
7569 bfd_put_32 (output_bfd, initial_got_entry,
7570 sgot->contents + got_offset);
7571 }
7572
7573 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7574 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7575}
7576
eb043451
PB		 7577/* Some relocations map to different relocations depending on the
7578 target. Return the real relocation. */
8029a119 7579
eb043451
PB		 7580static int
7581arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7582 int r_type)
7583{
7584 switch (r_type)
7585 {
7586 case R_ARM_TARGET1:
7587 if (globals->target1_is_rel)
7588 return R_ARM_REL32;
7589 else
7590 return R_ARM_ABS32;
7591
7592 case R_ARM_TARGET2:
7593 return globals->target2_reloc;
7594
7595 default:
7596 return r_type;
7597 }
7598}
eb043451 7599
ba93b8ac
DJ		 7600/* Return the base VMA address which should be subtracted from real addresses
7601 when resolving @dtpoff relocation.
7602 This is PT_TLS segment p_vaddr. */
7603
7604static bfd_vma
7605dtpoff_base (struct bfd_link_info *info)
7606{
7607 /* If tls_sec is NULL, we should have signalled an error already. */
7608 if (elf_hash_table (info)->tls_sec == NULL)
7609 return 0;
7610 return elf_hash_table (info)->tls_sec->vma;
7611}
7612
7613/* Return the relocation value for @tpoff relocation
7614 if STT_TLS virtual address is ADDRESS. */
7615
7616static bfd_vma
7617tpoff (struct bfd_link_info *info, bfd_vma address)
7618{
7619 struct elf_link_hash_table *htab = elf_hash_table (info);
7620 bfd_vma base;
7621
7622 /* If tls_sec is NULL, we should have signalled an error already. */
7623 if (htab->tls_sec == NULL)
7624 return 0;
7625 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7626 return address - htab->tls_sec->vma + base;
7627}
7628
00a97672
RS		 7629/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7630 VALUE is the relocation value. */
7631
7632static bfd_reloc_status_type
7633elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7634{
7635 if (value > 0xfff)
7636 return bfd_reloc_overflow;
7637
7638 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7639 bfd_put_32 (abfd, value, data);
7640 return bfd_reloc_ok;
7641}
7642
0855e32b
NS		 7643/* Handle TLS relaxations. Relaxing is possible for symbols that use
7644 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7645 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7646
7647 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7648 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7649 case of error.
7650
7651 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7652 the pre-relaxed code. It would be nice if the relocs were updated
7653 to match the optimization. */
0855e32b
NS		 7654
7655static bfd_reloc_status_type
7656elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7657 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7658 Elf_Internal_Rela *rel, unsigned long is_local)
7659{
7660 unsigned long insn;
7661
7662 switch (ELF32_R_TYPE (rel->r_info))
7663 {
7664 default:
7665 return bfd_reloc_notsupported;
7666
7667 case R_ARM_TLS_GOTDESC:
7668 if (is_local)
7669 insn = 0;
7670 else
7671 {
7672 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7673 if (insn & 1)
7674 insn -= 5; /* THUMB */
7675 else
7676 insn -= 8; /* ARM */
7677 }
7678 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7679 return bfd_reloc_continue;
7680
7681 case R_ARM_THM_TLS_DESCSEQ:
7682 /* Thumb insn. */
7683 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7684 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7685 {
7686 if (is_local)
7687 /* nop */
7688 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7689 }
7690 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7691 {
7692 if (is_local)
7693 /* nop */
7694 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7695 else
7696 /* ldr rx,[ry] */
7697 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7698 }
7699 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7700 {
7701 if (is_local)
7702 /* nop */
7703 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7704 else
7705 /* mov r0, rx */
7706 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7707 contents + rel->r_offset);
7708 }
7709 else
7710 {
7711 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7712 /* It's a 32 bit instruction, fetch the rest of it for
7713 error generation. */
7714 insn = (insn << 16)
7715 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7716 (*_bfd_error_handler)
7717 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7718 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7719 return bfd_reloc_notsupported;
7720 }
7721 break;
7722
7723 case R_ARM_TLS_DESCSEQ:
7724 /* arm insn. */
7725 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7726 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7727 {
7728 if (is_local)
7729 /* mov rx, ry */
7730 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7731 contents + rel->r_offset);
7732 }
7733 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7734 {
7735 if (is_local)
7736 /* nop */
7737 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7738 else
7739 /* ldr rx,[ry] */
7740 bfd_put_32 (input_bfd, insn & 0xfffff000,
7741 contents + rel->r_offset);
7742 }
7743 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7744 {
7745 if (is_local)
7746 /* nop */
7747 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7748 else
7749 /* mov r0, rx */
7750 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7751 contents + rel->r_offset);
7752 }
7753 else
7754 {
7755 (*_bfd_error_handler)
7756 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7757 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7758 return bfd_reloc_notsupported;
7759 }
7760 break;
7761
7762 case R_ARM_TLS_CALL:
7763 /* GD->IE relaxation, turn the instruction into 'nop' or
7764 'ldr r0, [pc,r0]' */
7765 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7766 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7767 break;
7768
7769 case R_ARM_THM_TLS_CALL:
7770 /* GD->IE relaxation */
7771 if (!is_local)
7772 /* add r0,pc; ldr r0, [r0] */
7773 insn = 0x44786800;
7774 else if (arch_has_thumb2_nop (globals))
7775 /* nop.w */
7776 insn = 0xf3af8000;
7777 else
7778 /* nop; nop */
7779 insn = 0xbf00bf00;
7780
7781 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7782 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7783 break;
7784 }
7785 return bfd_reloc_ok;
7786}
7787
4962c51a
MS		 7788/* For a given value of n, calculate the value of G_n as required to
7789 deal with group relocations. We return it in the form of an
7790 encoded constant-and-rotation, together with the final residual. If n is
7791 specified as less than zero, then final_residual is filled with the
7792 input value and no further action is performed. */
7793
7794static bfd_vma
7795calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7796{
7797 int current_n;
7798 bfd_vma g_n;
7799 bfd_vma encoded_g_n = 0;
7800 bfd_vma residual = value; /* Also known as Y_n. */
7801
7802 for (current_n = 0; current_n <= n; current_n++)
7803 {
7804 int shift;
7805
7806 /* Calculate which part of the value to mask. */
7807 if (residual == 0)
7808 shift = 0;
7809 else
7810 {
7811 int msb;
7812
7813 /* Determine the most significant bit in the residual and
7814 align the resulting value to a 2-bit boundary. */
7815 for (msb = 30; msb >= 0; msb -= 2)
7816 if (residual & (3 << msb))
7817 break;
7818
7819 /* The desired shift is now (msb - 6), or zero, whichever
7820 is the greater. */
7821 shift = msb - 6;
7822 if (shift < 0)
7823 shift = 0;
7824 }
7825
7826 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7827 g_n = residual & (0xff << shift);
7828 encoded_g_n = (g_n >> shift)
7829 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7830
7831 /* Calculate the residual for the next time around. */
7832 residual &= ~g_n;
7833 }
7834
7835 *final_residual = residual;
7836
7837 return encoded_g_n;
7838}
7839
7840/* Given an ARM instruction, determine whether it is an ADD or a SUB.
7841 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 7842
4962c51a 7843static int
906e58ca 7844identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 7845{
7846 int opcode = insn & 0x1e00000;
7847
7848 if (opcode == 1 << 23) /* ADD */
7849 return 1;
7850
7851 if (opcode == 1 << 22) /* SUB */
7852 return -1;
7853
7854 return 0;
7855}
7856
252b5132 7857/* Perform a relocation as part of a final link. */
9b485d32 7858
252b5132 7859static bfd_reloc_status_type
57e8b36a
NC		 7860elf32_arm_final_link_relocate (reloc_howto_type * howto,
7861 bfd * input_bfd,
7862 bfd * output_bfd,
7863 asection * input_section,
7864 bfd_byte * contents,
7865 Elf_Internal_Rela * rel,
7866 bfd_vma value,
7867 struct bfd_link_info * info,
7868 asection * sym_sec,
7869 const char * sym_name,
34e77a92
RS		 7870 unsigned char st_type,
7871 enum arm_st_branch_type branch_type,
0945cdfd 7872 struct elf_link_hash_entry * h,
f2a9dd69 7873 bfd_boolean * unresolved_reloc_p,
8029a119 7874 char ** error_message)
252b5132
RH		 7875{
7876 unsigned long r_type = howto->type;
7877 unsigned long r_symndx;
7878 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 7879 bfd_vma * local_got_offsets;
0855e32b 7880 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 7881 asection * sgot;
7882 asection * splt;
252b5132 7883 asection * sreloc = NULL;
362d30a1 7884 asection * srelgot;
252b5132 7885 bfd_vma addend;
ba96a88f 7886 bfd_signed_vma signed_addend;
34e77a92
RS		 7887 unsigned char dynreloc_st_type;
7888 bfd_vma dynreloc_value;
ba96a88f 7889 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 7890 struct elf32_arm_link_hash_entry *eh;
7891 union gotplt_union *root_plt;
7892 struct arm_plt_info *arm_plt;
7893 bfd_vma plt_offset;
7894 bfd_vma gotplt_offset;
7895 bfd_boolean has_iplt_entry;
f21f3fe0 7896
9c504268 7897 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 7898 if (globals == NULL)
7899 return bfd_reloc_notsupported;
9c504268 7900
0ffa91dd
NC		 7901 BFD_ASSERT (is_arm_elf (input_bfd));
7902
7903 /* Some relocation types map to different relocations depending on the
9c504268 7904 target. We pick the right one here. */
eb043451 7905 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 7906
7907 /* It is possible to have linker relaxations on some TLS access
7908 models. Update our information here. */
7909 r_type = elf32_arm_tls_transition (info, r_type, h);
7910
eb043451
PB		 7911 if (r_type != howto->type)
7912 howto = elf32_arm_howto_from_type (r_type);
9c504268 7913
cac15327
NC		 7914 /* If the start address has been set, then set the EF_ARM_HASENTRY
7915 flag. Setting this more than once is redundant, but the cost is
7916 not too high, and it keeps the code simple.
99e4ae17 7917
cac15327
NC		 7918 The test is done here, rather than somewhere else, because the
7919 start address is only set just before the final link commences.
7920
7921 Note - if the user deliberately sets a start address of 0, the
7922 flag will not be set. */
7923 if (bfd_get_start_address (output_bfd) != 0)
7924 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 7925
34e77a92 7926 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 7927 sgot = globals->root.sgot;
252b5132 7928 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 7929 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
7930
34e77a92
RS		 7931 if (globals->root.dynamic_sections_created)
7932 srelgot = globals->root.srelgot;
7933 else
7934 srelgot = NULL;
7935
252b5132
RH		 7936 r_symndx = ELF32_R_SYM (rel->r_info);
7937
4e7fd91e 7938 if (globals->use_rel)
ba96a88f 7939 {
4e7fd91e
PB		 7940 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
7941
7942 if (addend & ((howto->src_mask + 1) >> 1))
7943 {
7944 signed_addend = -1;
7945 signed_addend &= ~ howto->src_mask;
7946 signed_addend |= addend;
7947 }
7948 else
7949 signed_addend = addend;
ba96a88f
NC		 7950 }
7951 else
4e7fd91e 7952 addend = signed_addend = rel->r_addend;
f21f3fe0 7953
34e77a92
RS		 7954 /* Record the symbol information that should be used in dynamic
7955 relocations. */
7956 dynreloc_st_type = st_type;
7957 dynreloc_value = value;
7958 if (branch_type == ST_BRANCH_TO_THUMB)
7959 dynreloc_value |= 1;
7960
7961 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
7962 VALUE appropriately for relocations that we resolve at link time. */
7963 has_iplt_entry = FALSE;
7964 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
7965 && root_plt->offset != (bfd_vma) -1)
7966 {
7967 plt_offset = root_plt->offset;
7968 gotplt_offset = arm_plt->got_offset;
7969
7970 if (h == NULL || eh->is_iplt)
7971 {
7972 has_iplt_entry = TRUE;
7973 splt = globals->root.iplt;
7974
7975 /* Populate .iplt entries here, because not all of them will
7976 be seen by finish_dynamic_symbol. The lower bit is set if
7977 we have already populated the entry. */
7978 if (plt_offset & 1)
7979 plt_offset--;
7980 else
7981 {
7982 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
7983 -1, dynreloc_value);
7984 root_plt->offset |= 1;
7985 }
7986
7987 /* Static relocations always resolve to the .iplt entry. */
7988 st_type = STT_FUNC;
7989 value = (splt->output_section->vma
7990 + splt->output_offset
7991 + plt_offset);
7992 branch_type = ST_BRANCH_TO_ARM;
7993
7994 /* If there are non-call relocations that resolve to the .iplt
7995 entry, then all dynamic ones must too. */
7996 if (arm_plt->noncall_refcount != 0)
7997 {
7998 dynreloc_st_type = st_type;
7999 dynreloc_value = value;
8000 }
8001 }
8002 else
8003 /* We populate the .plt entry in finish_dynamic_symbol. */
8004 splt = globals->root.splt;
8005 }
8006 else
8007 {
8008 splt = NULL;
8009 plt_offset = (bfd_vma) -1;
8010 gotplt_offset = (bfd_vma) -1;
8011 }
8012
252b5132
RH		 8013 switch (r_type)
8014 {
8015 case R_ARM_NONE:
28a094c2
DJ		 8016 /* We don't need to find a value for this symbol. It's just a
8017 marker. */
8018 *unresolved_reloc_p = FALSE;
252b5132
RH		 8019 return bfd_reloc_ok;
8020
00a97672
RS		 8021 case R_ARM_ABS12:
8022 if (!globals->vxworks_p)
8023 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8024
252b5132
RH		 8025 case R_ARM_PC24:
8026 case R_ARM_ABS32:
bb224fc3 8027 case R_ARM_ABS32_NOI:
252b5132 8028 case R_ARM_REL32:
bb224fc3 8029 case R_ARM_REL32_NOI:
5b5bb741
PB		 8030 case R_ARM_CALL:
8031 case R_ARM_JUMP24:
dfc5f959 8032 case R_ARM_XPC25:
eb043451 8033 case R_ARM_PREL31:
7359ea65 8034 case R_ARM_PLT32:
7359ea65
DJ		 8035 /* Handle relocations which should use the PLT entry. ABS32/REL32
8036 will use the symbol's value, which may point to a PLT entry, but we
8037 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8038 branches in this object should go to it, except if the PLT is too
8039 far away, in which case a long branch stub should be inserted. */
bb224fc3 8040 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 8041 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8042 && r_type != R_ARM_CALL
8043 && r_type != R_ARM_JUMP24
8044 && r_type != R_ARM_PLT32)
34e77a92 8045 && plt_offset != (bfd_vma) -1)
7359ea65 8046 {
34e77a92
RS		 8047 /* If we've created a .plt section, and assigned a PLT entry
8048 to this function, it must either be a STT_GNU_IFUNC reference
8049 or not be known to bind locally. In other cases, we should
8050 have cleared the PLT entry by now. */
8051 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8052
8053 value = (splt->output_section->vma
8054 + splt->output_offset
34e77a92 8055 + plt_offset);
0945cdfd 8056 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8057 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8058 contents, rel->r_offset, value,
00a97672 8059 rel->r_addend);
7359ea65
DJ		 8060 }
8061
67687978
PB		 8062 /* When generating a shared object or relocatable executable, these
8063 relocations are copied into the output file to be resolved at
8064 run time. */
8065 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8066 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8067 && !(globals->vxworks_p
3348747a
NS		 8068 && strcmp (input_section->output_section->name,
8069 ".tls_vars") == 0)
bb224fc3 8070 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8071 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 8072 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8073 && (h == NULL
8074 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8075 || h->root.type != bfd_link_hash_undefweak)
8076 && r_type != R_ARM_PC24
5b5bb741
PB		 8077 && r_type != R_ARM_CALL
8078 && r_type != R_ARM_JUMP24
ee06dc07 8079 && r_type != R_ARM_PREL31
7359ea65 8080 && r_type != R_ARM_PLT32)
252b5132 8081 {
947216bf 8082 Elf_Internal_Rela outrel;
b34976b6 8083 bfd_boolean skip, relocate;
f21f3fe0 8084
0945cdfd
DJ		 8085 *unresolved_reloc_p = FALSE;
8086
34e77a92 8087 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8088 {
83bac4b0
NC		 8089 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8090 ! globals->use_rel);
f21f3fe0 8091
83bac4b0 8092 if (sreloc == NULL)
252b5132 8093 return bfd_reloc_notsupported;
252b5132 8094 }
f21f3fe0 8095
b34976b6
AM		 8096 skip = FALSE;
8097 relocate = FALSE;
f21f3fe0 8098
00a97672 8099 outrel.r_addend = addend;
c629eae0
JJ		 8100 outrel.r_offset =
8101 _bfd_elf_section_offset (output_bfd, info, input_section,
8102 rel->r_offset);
8103 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8104 skip = TRUE;
0bb2d96a 8105 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8106 skip = TRUE, relocate = TRUE;
252b5132
RH		 8107 outrel.r_offset += (input_section->output_section->vma
8108 + input_section->output_offset);
f21f3fe0 8109
252b5132 8110 if (skip)
0bb2d96a 8111 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8112 else if (h != NULL
8113 && h->dynindx != -1
7359ea65 8114 && (!info->shared
5e681ec4 8115 || !info->symbolic
f5385ebf 8116 || !h->def_regular))
5e681ec4 8117 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8118 else
8119 {
a16385dc
MM		 8120 int symbol;
8121
5e681ec4 8122 /* This symbol is local, or marked to become local. */
34e77a92 8123 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8124 if (globals->symbian_p)
6366ff1e 8125 {
74541ad4
AM		 8126 asection *osec;
8127
6366ff1e
MM		 8128 /* On Symbian OS, the data segment and text segement
8129 can be relocated independently. Therefore, we
8130 must indicate the segment to which this
8131 relocation is relative. The BPABI allows us to
8132 use any symbol in the right segment; we just use
8133 the section symbol as it is convenient. (We
8134 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8135 will not appear in the dynamic symbol table.)
8136
8137 Note that the dynamic linker ignores the section
8138 symbol value, so we don't subtract osec->vma
8139 from the emitted reloc addend. */
10dbd1f3 8140 if (sym_sec)
74541ad4 8141 osec = sym_sec->output_section;
10dbd1f3 8142 else
74541ad4
AM		 8143 osec = input_section->output_section;
8144 symbol = elf_section_data (osec)->dynindx;
8145 if (symbol == 0)
8146 {
8147 struct elf_link_hash_table *htab = elf_hash_table (info);
8148
8149 if ((osec->flags & SEC_READONLY) == 0
8150 && htab->data_index_section != NULL)
8151 osec = htab->data_index_section;
8152 else
8153 osec = htab->text_index_section;
8154 symbol = elf_section_data (osec)->dynindx;
8155 }
6366ff1e
MM		 8156 BFD_ASSERT (symbol != 0);
8157 }
a16385dc
MM		 8158 else
8159 /* On SVR4-ish systems, the dynamic loader cannot
8160 relocate the text and data segments independently,
8161 so the symbol does not matter. */
8162 symbol = 0;
34e77a92
RS		 8163 if (dynreloc_st_type == STT_GNU_IFUNC)
8164 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8165 to the .iplt entry. Instead, every non-call reference
8166 must use an R_ARM_IRELATIVE relocation to obtain the
8167 correct run-time address. */
8168 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8169 else
8170 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8171 if (globals->use_rel)
8172 relocate = TRUE;
8173 else
34e77a92 8174 outrel.r_addend += dynreloc_value;
252b5132 8175 }
f21f3fe0 8176
47beaa6a 8177 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8178
f21f3fe0 8179 /* If this reloc is against an external symbol, we do not want to
252b5132 8180 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8181 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8182 if (! relocate)
8183 return bfd_reloc_ok;
9a5aca8c 8184
f21f3fe0 8185 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8186 contents, rel->r_offset,
8187 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8188 }
8189 else switch (r_type)
8190 {
00a97672
RS		 8191 case R_ARM_ABS12:
8192 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8193
dfc5f959 8194 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8195 case R_ARM_CALL:
8196 case R_ARM_JUMP24:
8029a119 8197 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8198 case R_ARM_PLT32:
906e58ca 8199 {
906e58ca
NC		 8200 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8201
dfc5f959 8202 if (r_type == R_ARM_XPC25)
252b5132 8203 {
dfc5f959
NC		 8204 /* Check for Arm calling Arm function. */
8205 /* FIXME: Should we translate the instruction into a BL
8206 instruction instead ? */
35fc36a8 8207 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8208 (*_bfd_error_handler)
8209 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8210 input_bfd,
8211 h ? h->root.root.string : "(local)");
dfc5f959 8212 }
155d87d7 8213 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8214 {
8215 /* Check for Arm calling Thumb function. */
35fc36a8 8216 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8217 {
f2a9dd69
DJ		 8218 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8219 output_bfd, input_section,
8220 hit_data, sym_sec, rel->r_offset,
8221 signed_addend, value,
8222 error_message))
8223 return bfd_reloc_ok;
8224 else
8225 return bfd_reloc_dangerous;
dfc5f959 8226 }
252b5132 8227 }
ba96a88f 8228
906e58ca 8229 /* Check if a stub has to be inserted because the
8029a119 8230 destination is too far or we are changing mode. */
155d87d7
CL		 8231 if ( r_type == R_ARM_CALL
8232 || r_type == R_ARM_JUMP24
8233 || r_type == R_ARM_PLT32)
906e58ca 8234 {
fe33d2fa
CL		 8235 enum elf32_arm_stub_type stub_type = arm_stub_none;
8236 struct elf32_arm_link_hash_entry *hash;
8237
8238 hash = (struct elf32_arm_link_hash_entry *) h;
8239 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8240 st_type, &branch_type,
8241 hash, value, sym_sec,
fe33d2fa 8242 input_bfd, sym_name);
5fa9e92f 8243
fe33d2fa 8244 if (stub_type != arm_stub_none)
906e58ca
NC		 8245 {
8246 /* The target is out of reach, so redirect the
8247 branch to the local stub for this function. */
906e58ca
NC		 8248 stub_entry = elf32_arm_get_stub_entry (input_section,
8249 sym_sec, h,
fe33d2fa
CL		 8250 rel, globals,
8251 stub_type);
9cd3e4e5
NC		 8252 {
8253 if (stub_entry != NULL)
8254 value = (stub_entry->stub_offset
8255 + stub_entry->stub_sec->output_offset
8256 + stub_entry->stub_sec->output_section->vma);
8257
8258 if (plt_offset != (bfd_vma) -1)
8259 *unresolved_reloc_p = FALSE;
8260 }
906e58ca 8261 }
fe33d2fa
CL		 8262 else
8263 {
8264 /* If the call goes through a PLT entry, make sure to
8265 check distance to the right destination address. */
34e77a92 8266 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8267 {
8268 value = (splt->output_section->vma
8269 + splt->output_offset
34e77a92 8270 + plt_offset);
fe33d2fa
CL		 8271 *unresolved_reloc_p = FALSE;
8272 /* The PLT entry is in ARM mode, regardless of the
8273 target function. */
35fc36a8 8274 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8275 }
8276 }
906e58ca
NC		 8277 }
8278
dea514f5
PB		 8279 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8280 where:
8281 S is the address of the symbol in the relocation.
8282 P is address of the instruction being relocated.
8283 A is the addend (extracted from the instruction) in bytes.
8284
8285 S is held in 'value'.
8286 P is the base address of the section containing the
8287 instruction plus the offset of the reloc into that
8288 section, ie:
8289 (input_section->output_section->vma +
8290 input_section->output_offset +
8291 rel->r_offset).
8292 A is the addend, converted into bytes, ie:
8293 (signed_addend * 4)
8294
8295 Note: None of these operations have knowledge of the pipeline
8296 size of the processor, thus it is up to the assembler to
8297 encode this information into the addend. */
8298 value -= (input_section->output_section->vma
8299 + input_section->output_offset);
8300 value -= rel->r_offset;
4e7fd91e
PB		 8301 if (globals->use_rel)
8302 value += (signed_addend << howto->size);
8303 else
8304 /* RELA addends do not have to be adjusted by howto->size. */
8305 value += signed_addend;
23080146 8306
dcb5e6e6
NC		 8307 signed_addend = value;
8308 signed_addend >>= howto->rightshift;
9a5aca8c 8309
5ab79981 8310 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8311 the next instruction unless a PLT entry will be created.
77b4f08f 8312 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8313 The jump to the next instruction is optimized as a NOP depending
8314 on the architecture. */
ffcb4889 8315 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8316 && plt_offset == (bfd_vma) -1)
77b4f08f 8317 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8318 {
cd1dac3d
DG		 8319 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8320
8321 if (arch_has_arm_nop (globals))
8322 value |= 0x0320f000;
8323 else
8324 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8325 }
8326 else
59f2c4e7 8327 {
9b485d32 8328 /* Perform a signed range check. */
dcb5e6e6 8329 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8330 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8331 return bfd_reloc_overflow;
9a5aca8c 8332
5ab79981 8333 addend = (value & 2);
39b41c9c 8334
5ab79981
PB		 8335 value = (signed_addend & howto->dst_mask)
8336 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8337
5ab79981
PB		 8338 if (r_type == R_ARM_CALL)
8339 {
155d87d7 8340 /* Set the H bit in the BLX instruction. */
35fc36a8 8341 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8342 {
8343 if (addend)
8344 value |= (1 << 24);
8345 else
8346 value &= ~(bfd_vma)(1 << 24);
8347 }
8348
5ab79981 8349 /* Select the correct instruction (BL or BLX). */
906e58ca 8350 /* Only if we are not handling a BL to a stub. In this
8029a119 8351 case, mode switching is performed by the stub. */
35fc36a8 8352 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8353 value |= (1 << 28);
63e1a0fc 8354 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8355 {
8356 value &= ~(bfd_vma)(1 << 28);
8357 value |= (1 << 24);
8358 }
39b41c9c
PB		 8359 }
8360 }
906e58ca 8361 }
252b5132 8362 break;
f21f3fe0 8363
252b5132
RH		 8364 case R_ARM_ABS32:
8365 value += addend;
35fc36a8 8366 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8367 value |= 1;
8368 break;
f21f3fe0 8369
bb224fc3
MS		 8370 case R_ARM_ABS32_NOI:
8371 value += addend;
8372 break;
8373
252b5132 8374 case R_ARM_REL32:
a8bc6c78 8375 value += addend;
35fc36a8 8376 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8377 value |= 1;
252b5132 8378 value -= (input_section->output_section->vma
62efb346 8379 + input_section->output_offset + rel->r_offset);
252b5132 8380 break;
eb043451 8381
bb224fc3
MS		 8382 case R_ARM_REL32_NOI:
8383 value += addend;
8384 value -= (input_section->output_section->vma
8385 + input_section->output_offset + rel->r_offset);
8386 break;
8387
eb043451
PB		 8388 case R_ARM_PREL31:
8389 value -= (input_section->output_section->vma
8390 + input_section->output_offset + rel->r_offset);
8391 value += signed_addend;
8392 if (! h || h->root.type != bfd_link_hash_undefweak)
8393 {
8029a119 8394 /* Check for overflow. */
eb043451
PB		 8395 if ((value ^ (value >> 1)) & (1 << 30))
8396 return bfd_reloc_overflow;
8397 }
8398 value &= 0x7fffffff;
8399 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8400 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8401 value |= 1;
8402 break;
252b5132 8403 }
f21f3fe0 8404
252b5132
RH		 8405 bfd_put_32 (input_bfd, value, hit_data);
8406 return bfd_reloc_ok;
8407
8408 case R_ARM_ABS8:
8409 value += addend;
4e67d4ca
DG		 8410
8411 /* There is no way to tell whether the user intended to use a signed or
8412 unsigned addend. When checking for overflow we accept either,
8413 as specified by the AAELF. */
8414 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8415 return bfd_reloc_overflow;
8416
8417 bfd_put_8 (input_bfd, value, hit_data);
8418 return bfd_reloc_ok;
8419
8420 case R_ARM_ABS16:
8421 value += addend;
8422
4e67d4ca
DG		 8423 /* See comment for R_ARM_ABS8. */
8424 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8425 return bfd_reloc_overflow;
8426
8427 bfd_put_16 (input_bfd, value, hit_data);
8428 return bfd_reloc_ok;
8429
252b5132 8430 case R_ARM_THM_ABS5:
9b485d32 8431 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8432 if (globals->use_rel)
8433 {
8434 /* Need to refetch addend. */
8435 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8436 /* ??? Need to determine shift amount from operand size. */
8437 addend >>= howto->rightshift;
8438 }
252b5132
RH		 8439 value += addend;
8440
8441 /* ??? Isn't value unsigned? */
8442 if ((long) value > 0x1f || (long) value < -0x10)
8443 return bfd_reloc_overflow;
8444
8445 /* ??? Value needs to be properly shifted into place first. */
8446 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8447 bfd_put_16 (input_bfd, value, hit_data);
8448 return bfd_reloc_ok;
8449
2cab6cc3
MS		 8450 case R_ARM_THM_ALU_PREL_11_0:
8451 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8452 {
8453 bfd_vma insn;
8454 bfd_signed_vma relocation;
8455
8456 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8457 | bfd_get_16 (input_bfd, hit_data + 2);
8458
8459 if (globals->use_rel)
8460 {
8461 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8462 | ((insn & (1 << 26)) >> 15);
8463 if (insn & 0xf00000)
8464 signed_addend = -signed_addend;
8465 }
8466
8467 relocation = value + signed_addend;
8468 relocation -= (input_section->output_section->vma
8469 + input_section->output_offset
8470 + rel->r_offset);
8471
8472 value = abs (relocation);
8473
8474 if (value >= 0x1000)
8475 return bfd_reloc_overflow;
8476
8477 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8478 | ((value & 0x700) << 4)
8479 | ((value & 0x800) << 15);
8480 if (relocation < 0)
8481 insn |= 0xa00000;
8482
8483 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8484 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8485
8486 return bfd_reloc_ok;
8487 }
8488
e1ec24c6
NC		 8489 case R_ARM_THM_PC8:
8490 /* PR 10073: This reloc is not generated by the GNU toolchain,
8491 but it is supported for compatibility with third party libraries
8492 generated by other compilers, specifically the ARM/IAR. */
8493 {
8494 bfd_vma insn;
8495 bfd_signed_vma relocation;
8496
8497 insn = bfd_get_16 (input_bfd, hit_data);
8498
8499 if (globals->use_rel)
8500 addend = (insn & 0x00ff) << 2;
8501
8502 relocation = value + addend;
8503 relocation -= (input_section->output_section->vma
8504 + input_section->output_offset
8505 + rel->r_offset);
8506
8507 value = abs (relocation);
8508
8509 /* We do not check for overflow of this reloc. Although strictly
8510 speaking this is incorrect, it appears to be necessary in order
8511 to work with IAR generated relocs. Since GCC and GAS do not
8512 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8513 a problem for them. */
8514 value &= 0x3fc;
8515
8516 insn = (insn & 0xff00) | (value >> 2);
8517
8518 bfd_put_16 (input_bfd, insn, hit_data);
8519
8520 return bfd_reloc_ok;
8521 }
8522
2cab6cc3
MS		 8523 case R_ARM_THM_PC12:
8524 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8525 {
8526 bfd_vma insn;
8527 bfd_signed_vma relocation;
8528
8529 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8530 | bfd_get_16 (input_bfd, hit_data + 2);
8531
8532 if (globals->use_rel)
8533 {
8534 signed_addend = insn & 0xfff;
8535 if (!(insn & (1 << 23)))
8536 signed_addend = -signed_addend;
8537 }
8538
8539 relocation = value + signed_addend;
8540 relocation -= (input_section->output_section->vma
8541 + input_section->output_offset
8542 + rel->r_offset);
8543
8544 value = abs (relocation);
8545
8546 if (value >= 0x1000)
8547 return bfd_reloc_overflow;
8548
8549 insn = (insn & 0xff7ff000) | value;
8550 if (relocation >= 0)
8551 insn |= (1 << 23);
8552
8553 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8554 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8555
8556 return bfd_reloc_ok;
8557 }
8558
dfc5f959 8559 case R_ARM_THM_XPC22:
c19d1205 8560 case R_ARM_THM_CALL:
bd97cb95 8561 case R_ARM_THM_JUMP24:
dfc5f959 8562 /* Thumb BL (branch long instruction). */
252b5132 8563 {
b34976b6 8564 bfd_vma relocation;
e95de063 8565 bfd_vma reloc_sign;
b34976b6
AM		 8566 bfd_boolean overflow = FALSE;
8567 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8568 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8569 bfd_signed_vma reloc_signed_max;
8570 bfd_signed_vma reloc_signed_min;
b34976b6 8571 bfd_vma check;
252b5132 8572 bfd_signed_vma signed_check;
e95de063 8573 int bitsize;
cd1dac3d 8574 const int thumb2 = using_thumb2 (globals);
252b5132 8575
5ab79981 8576 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8577 the next instruction unless a PLT entry will be created.
8578 The jump to the next instruction is optimized as a NOP.W for
8579 Thumb-2 enabled architectures. */
19540007 8580 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8581 && plt_offset == (bfd_vma) -1)
5ab79981 8582 {
cd1dac3d
DG		 8583 if (arch_has_thumb2_nop (globals))
8584 {
8585 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8586 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8587 }
8588 else
8589 {
8590 bfd_put_16 (input_bfd, 0xe000, hit_data);
8591 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8592 }
5ab79981
PB		 8593 return bfd_reloc_ok;
8594 }
8595
e95de063
MS		 8596 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8597 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8598 if (globals->use_rel)
8599 {
e95de063
MS		 8600 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8601 bfd_vma upper = upper_insn & 0x3ff;
8602 bfd_vma lower = lower_insn & 0x7ff;
8603 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8604 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8605 bfd_vma i1 = j1 ^ s ? 0 : 1;
8606 bfd_vma i2 = j2 ^ s ? 0 : 1;
8607
8608 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8609 /* Sign extend. */
8610 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8611
4e7fd91e
PB		 8612 signed_addend = addend;
8613 }
cb1afa5c 8614
dfc5f959
NC		 8615 if (r_type == R_ARM_THM_XPC22)
8616 {
8617 /* Check for Thumb to Thumb call. */
8618 /* FIXME: Should we translate the instruction into a BL
8619 instruction instead ? */
35fc36a8 8620 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8621 (*_bfd_error_handler)
8622 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8623 input_bfd,
8624 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8625 }
8626 else
252b5132 8627 {
dfc5f959
NC		 8628 /* If it is not a call to Thumb, assume call to Arm.
8629 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8630 function call at all, but rather a long jump. Calls through
8631 the PLT do not require stubs. */
34e77a92 8632 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8633 {
bd97cb95 8634 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8635 {
8636 /* Convert BL to BLX. */
8637 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8638 }
155d87d7
CL		 8639 else if (( r_type != R_ARM_THM_CALL)
8640 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8641 {
8642 if (elf32_thumb_to_arm_stub
8643 (info, sym_name, input_bfd, output_bfd, input_section,
8644 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8645 error_message))
8646 return bfd_reloc_ok;
8647 else
8648 return bfd_reloc_dangerous;
8649 }
da5938a2 8650 }
35fc36a8
RS		 8651 else if (branch_type == ST_BRANCH_TO_THUMB
8652 && globals->use_blx
bd97cb95 8653 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8654 {
8655 /* Make sure this is a BL. */
8656 lower_insn |= 0x1800;
8657 }
252b5132 8658 }
f21f3fe0 8659
fe33d2fa 8660 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8661 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8662 {
8663 /* Check if a stub has to be inserted because the destination
8029a119 8664 is too far. */
fe33d2fa
CL		 8665 struct elf32_arm_stub_hash_entry *stub_entry;
8666 struct elf32_arm_link_hash_entry *hash;
8667
8668 hash = (struct elf32_arm_link_hash_entry *) h;
8669
8670 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8671 st_type, &branch_type,
8672 hash, value, sym_sec,
fe33d2fa
CL		 8673 input_bfd, sym_name);
8674
8675 if (stub_type != arm_stub_none)
906e58ca
NC		 8676 {
8677 /* The target is out of reach or we are changing modes, so
8678 redirect the branch to the local stub for this
8679 function. */
8680 stub_entry = elf32_arm_get_stub_entry (input_section,
8681 sym_sec, h,
fe33d2fa
CL		 8682 rel, globals,
8683 stub_type);
906e58ca 8684 if (stub_entry != NULL)
9cd3e4e5
NC		 8685 {
8686 value = (stub_entry->stub_offset
8687 + stub_entry->stub_sec->output_offset
8688 + stub_entry->stub_sec->output_section->vma);
8689
8690 if (plt_offset != (bfd_vma) -1)
8691 *unresolved_reloc_p = FALSE;
8692 }
906e58ca 8693
f4ac8484 8694 /* If this call becomes a call to Arm, force BLX. */
155d87d7 8695 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 8696 {
8697 if ((stub_entry
8698 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 8699 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 8700 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8701 }
906e58ca
NC		 8702 }
8703 }
8704
fe33d2fa 8705 /* Handle calls via the PLT. */
34e77a92 8706 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8707 {
8708 value = (splt->output_section->vma
8709 + splt->output_offset
34e77a92 8710 + plt_offset);
fe33d2fa
CL		 8711
8712 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8713 {
8714 /* If the Thumb BLX instruction is available, convert
8715 the BL to a BLX instruction to call the ARM-mode
8716 PLT entry. */
8717 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8718 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8719 }
8720 else
8721 {
8722 /* Target the Thumb stub before the ARM PLT entry. */
8723 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8724 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8725 }
8726 *unresolved_reloc_p = FALSE;
8727 }
8728
ba96a88f 8729 relocation = value + signed_addend;
f21f3fe0 8730
252b5132 8731 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8732 + input_section->output_offset
8733 + rel->r_offset);
9a5aca8c 8734
252b5132
RH		 8735 check = relocation >> howto->rightshift;
8736
8737 /* If this is a signed value, the rightshift just dropped
8738 leading 1 bits (assuming twos complement). */
8739 if ((bfd_signed_vma) relocation >= 0)
8740 signed_check = check;
8741 else
8742 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8743
e95de063
MS		 8744 /* Calculate the permissable maximum and minimum values for
8745 this relocation according to whether we're relocating for
8746 Thumb-2 or not. */
8747 bitsize = howto->bitsize;
8748 if (!thumb2)
8749 bitsize -= 2;
f6ebfac0 8750 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8751 reloc_signed_min = ~reloc_signed_max;
8752
252b5132 8753 /* Assumes two's complement. */
ba96a88f 8754 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8755 overflow = TRUE;
252b5132 8756
bd97cb95 8757 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8758 /* For a BLX instruction, make sure that the relocation is rounded up
8759 to a word boundary. This follows the semantics of the instruction
8760 which specifies that bit 1 of the target address will come from bit
8761 1 of the base address. */
8762 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8763
e95de063
MS		 8764 /* Put RELOCATION back into the insn. Assumes two's complement.
8765 We use the Thumb-2 encoding, which is safe even if dealing with
8766 a Thumb-1 instruction by virtue of our overflow check above. */
8767 reloc_sign = (signed_check < 0) ? 1 : 0;
8768 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8769 | ((relocation >> 12) & 0x3ff)
8770 | (reloc_sign << 10);
906e58ca 8771 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 8772 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8773 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8774 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8775
252b5132
RH		 8776 /* Put the relocated value back in the object file: */
8777 bfd_put_16 (input_bfd, upper_insn, hit_data);
8778 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8779
8780 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8781 }
8782 break;
8783
c19d1205
ZW		 8784 case R_ARM_THM_JUMP19:
8785 /* Thumb32 conditional branch instruction. */
8786 {
8787 bfd_vma relocation;
8788 bfd_boolean overflow = FALSE;
8789 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8790 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8791 bfd_signed_vma reloc_signed_max = 0xffffe;
8792 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8793 bfd_signed_vma signed_check;
8794
8795 /* Need to refetch the addend, reconstruct the top three bits,
8796 and squish the two 11 bit pieces together. */
8797 if (globals->use_rel)
8798 {
8799 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 8800 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 8801 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8802 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8803 bfd_vma lower = (lower_insn & 0x07ff);
8804
a00a1f35
MS		 8805 upper |= J1 << 6;
8806 upper |= J2 << 7;
8807 upper |= (!S) << 8;
c19d1205
ZW		 8808 upper -= 0x0100; /* Sign extend. */
8809
8810 addend = (upper << 12) | (lower << 1);
8811 signed_addend = addend;
8812 }
8813
bd97cb95 8814 /* Handle calls via the PLT. */
34e77a92 8815 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 8816 {
8817 value = (splt->output_section->vma
8818 + splt->output_offset
34e77a92 8819 + plt_offset);
bd97cb95
DJ		 8820 /* Target the Thumb stub before the ARM PLT entry. */
8821 value -= PLT_THUMB_STUB_SIZE;
8822 *unresolved_reloc_p = FALSE;
8823 }
8824
c19d1205
ZW		 8825 /* ??? Should handle interworking? GCC might someday try to
8826 use this for tail calls. */
8827
8828 relocation = value + signed_addend;
8829 relocation -= (input_section->output_section->vma
8830 + input_section->output_offset
8831 + rel->r_offset);
a00a1f35 8832 signed_check = (bfd_signed_vma) relocation;
c19d1205 8833
c19d1205
ZW		 8834 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8835 overflow = TRUE;
8836
8837 /* Put RELOCATION back into the insn. */
8838 {
8839 bfd_vma S = (relocation & 0x00100000) >> 20;
8840 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8841 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8842 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8843 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8844
a00a1f35 8845 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 8846 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8847 }
8848
8849 /* Put the relocated value back in the object file: */
8850 bfd_put_16 (input_bfd, upper_insn, hit_data);
8851 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8852
8853 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8854 }
8855
8856 case R_ARM_THM_JUMP11:
8857 case R_ARM_THM_JUMP8:
8858 case R_ARM_THM_JUMP6:
51c5503b
NC		 8859 /* Thumb B (branch) instruction). */
8860 {
6cf9e9fe 8861 bfd_signed_vma relocation;
51c5503b
NC		 8862 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
8863 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 8864 bfd_signed_vma signed_check;
8865
c19d1205
ZW		 8866 /* CZB cannot jump backward. */
8867 if (r_type == R_ARM_THM_JUMP6)
8868 reloc_signed_min = 0;
8869
4e7fd91e 8870 if (globals->use_rel)
6cf9e9fe 8871 {
4e7fd91e
PB		 8872 /* Need to refetch addend. */
8873 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8874 if (addend & ((howto->src_mask + 1) >> 1))
8875 {
8876 signed_addend = -1;
8877 signed_addend &= ~ howto->src_mask;
8878 signed_addend |= addend;
8879 }
8880 else
8881 signed_addend = addend;
8882 /* The value in the insn has been right shifted. We need to
8883 undo this, so that we can perform the address calculation
8884 in terms of bytes. */
8885 signed_addend <<= howto->rightshift;
6cf9e9fe 8886 }
6cf9e9fe 8887 relocation = value + signed_addend;
51c5503b
NC		 8888
8889 relocation -= (input_section->output_section->vma
8890 + input_section->output_offset
8891 + rel->r_offset);
8892
6cf9e9fe
NC		 8893 relocation >>= howto->rightshift;
8894 signed_check = relocation;
c19d1205
ZW		 8895
8896 if (r_type == R_ARM_THM_JUMP6)
8897 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
8898 else
8899 relocation &= howto->dst_mask;
51c5503b 8900 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 8901
51c5503b
NC		 8902 bfd_put_16 (input_bfd, relocation, hit_data);
8903
8904 /* Assumes two's complement. */
8905 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8906 return bfd_reloc_overflow;
8907
8908 return bfd_reloc_ok;
8909 }
cedb70c5 8910
8375c36b
PB		 8911 case R_ARM_ALU_PCREL7_0:
8912 case R_ARM_ALU_PCREL15_8:
8913 case R_ARM_ALU_PCREL23_15:
8914 {
8915 bfd_vma insn;
8916 bfd_vma relocation;
8917
8918 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 8919 if (globals->use_rel)
8920 {
8921 /* Extract the addend. */
8922 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
8923 signed_addend = addend;
8924 }
8375c36b
PB		 8925 relocation = value + signed_addend;
8926
8927 relocation -= (input_section->output_section->vma
8928 + input_section->output_offset
8929 + rel->r_offset);
8930 insn = (insn & ~0xfff)
8931 | ((howto->bitpos << 7) & 0xf00)
8932 | ((relocation >> howto->bitpos) & 0xff);
8933 bfd_put_32 (input_bfd, value, hit_data);
8934 }
8935 return bfd_reloc_ok;
8936
252b5132
RH		 8937 case R_ARM_GNU_VTINHERIT:
8938 case R_ARM_GNU_VTENTRY:
8939 return bfd_reloc_ok;
8940
c19d1205 8941 case R_ARM_GOTOFF32:
252b5132
RH		 8942 /* Relocation is relative to the start of the
8943 global offset table. */
8944
8945 BFD_ASSERT (sgot != NULL);
8946 if (sgot == NULL)
8947 return bfd_reloc_notsupported;
9a5aca8c 8948
cedb70c5 8949 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 8950 address by one, so that attempts to call the function pointer will
8951 correctly interpret it as Thumb code. */
35fc36a8 8952 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 8953 value += 1;
8954
252b5132
RH		 8955 /* Note that sgot->output_offset is not involved in this
8956 calculation. We always want the start of .got. If we
8957 define _GLOBAL_OFFSET_TABLE in a different way, as is
8958 permitted by the ABI, we might have to change this
9b485d32 8959 calculation. */
252b5132 8960 value -= sgot->output_section->vma;
f21f3fe0 8961 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8962 contents, rel->r_offset, value,
00a97672 8963 rel->r_addend);
252b5132
RH		 8964
8965 case R_ARM_GOTPC:
a7c10850 8966 /* Use global offset table as symbol value. */
252b5132 8967 BFD_ASSERT (sgot != NULL);
f21f3fe0 8968
252b5132
RH		 8969 if (sgot == NULL)
8970 return bfd_reloc_notsupported;
8971
0945cdfd 8972 *unresolved_reloc_p = FALSE;
252b5132 8973 value = sgot->output_section->vma;
f21f3fe0 8974 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8975 contents, rel->r_offset, value,
00a97672 8976 rel->r_addend);
f21f3fe0 8977
252b5132 8978 case R_ARM_GOT32:
eb043451 8979 case R_ARM_GOT_PREL:
252b5132 8980 /* Relocation is to the entry for this symbol in the
9b485d32 8981 global offset table. */
252b5132
RH		 8982 if (sgot == NULL)
8983 return bfd_reloc_notsupported;
f21f3fe0 8984
34e77a92
RS		 8985 if (dynreloc_st_type == STT_GNU_IFUNC
8986 && plt_offset != (bfd_vma) -1
8987 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
8988 {
8989 /* We have a relocation against a locally-binding STT_GNU_IFUNC
8990 symbol, and the relocation resolves directly to the runtime
8991 target rather than to the .iplt entry. This means that any
8992 .got entry would be the same value as the .igot.plt entry,
8993 so there's no point creating both. */
8994 sgot = globals->root.igotplt;
8995 value = sgot->output_offset + gotplt_offset;
8996 }
8997 else if (h != NULL)
252b5132
RH		 8998 {
8999 bfd_vma off;
f21f3fe0 9000
252b5132
RH		 9001 off = h->got.offset;
9002 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9003 if ((off & 1) != 0)
252b5132 9004 {
b436d854
RS		 9005 /* We have already processsed one GOT relocation against
9006 this symbol. */
9007 off &= ~1;
9008 if (globals->root.dynamic_sections_created
9009 && !SYMBOL_REFERENCES_LOCAL (info, h))
9010 *unresolved_reloc_p = FALSE;
9011 }
9012 else
9013 {
9014 Elf_Internal_Rela outrel;
9015
9016 if (!SYMBOL_REFERENCES_LOCAL (info, h))
9017 {
9018 /* If the symbol doesn't resolve locally in a static
9019 object, we have an undefined reference. If the
9020 symbol doesn't resolve locally in a dynamic object,
9021 it should be resolved by the dynamic linker. */
9022 if (globals->root.dynamic_sections_created)
9023 {
9024 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9025 *unresolved_reloc_p = FALSE;
9026 }
9027 else
9028 outrel.r_info = 0;
9029 outrel.r_addend = 0;
9030 }
252b5132
RH		 9031 else
9032 {
34e77a92
RS		 9033 if (dynreloc_st_type == STT_GNU_IFUNC)
9034 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9035 else if (info->shared)
9036 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9037 else
9038 outrel.r_info = 0;
9039 outrel.r_addend = dynreloc_value;
b436d854 9040 }
ee29b9fb 9041
b436d854
RS		 9042 /* The GOT entry is initialized to zero by default.
9043 See if we should install a different value. */
9044 if (outrel.r_addend != 0
9045 && (outrel.r_info == 0 || globals->use_rel))
9046 {
9047 bfd_put_32 (output_bfd, outrel.r_addend,
9048 sgot->contents + off);
9049 outrel.r_addend = 0;
252b5132 9050 }
f21f3fe0 9051
b436d854
RS		 9052 if (outrel.r_info != 0)
9053 {
9054 outrel.r_offset = (sgot->output_section->vma
9055 + sgot->output_offset
9056 + off);
9057 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9058 }
9059 h->got.offset |= 1;
9060 }
252b5132
RH		 9061 value = sgot->output_offset + off;
9062 }
9063 else
9064 {
9065 bfd_vma off;
f21f3fe0 9066
252b5132
RH		 9067 BFD_ASSERT (local_got_offsets != NULL &&
9068 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9069
252b5132 9070 off = local_got_offsets[r_symndx];
f21f3fe0 9071
252b5132
RH		 9072 /* The offset must always be a multiple of 4. We use the
9073 least significant bit to record whether we have already
9b485d32 9074 generated the necessary reloc. */
252b5132
RH		 9075 if ((off & 1) != 0)
9076 off &= ~1;
9077 else
9078 {
00a97672 9079 if (globals->use_rel)
34e77a92 9080 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9081
34e77a92 9082 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9083 {
947216bf 9084 Elf_Internal_Rela outrel;
f21f3fe0 9085
34e77a92 9086 outrel.r_addend = addend + dynreloc_value;
252b5132 9087 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9088 + sgot->output_offset
252b5132 9089 + off);
34e77a92
RS		 9090 if (dynreloc_st_type == STT_GNU_IFUNC)
9091 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9092 else
9093 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9094 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9095 }
f21f3fe0 9096
252b5132
RH		 9097 local_got_offsets[r_symndx] |= 1;
9098 }
f21f3fe0 9099
252b5132
RH		 9100 value = sgot->output_offset + off;
9101 }
eb043451
PB		 9102 if (r_type != R_ARM_GOT32)
9103 value += sgot->output_section->vma;
9a5aca8c 9104
f21f3fe0 9105 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9106 contents, rel->r_offset, value,
00a97672 9107 rel->r_addend);
f21f3fe0 9108
ba93b8ac
DJ		 9109 case R_ARM_TLS_LDO32:
9110 value = value - dtpoff_base (info);
9111
9112 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9113 contents, rel->r_offset, value,
9114 rel->r_addend);
ba93b8ac
DJ		 9115
9116 case R_ARM_TLS_LDM32:
9117 {
9118 bfd_vma off;
9119
362d30a1 9120 if (sgot == NULL)
ba93b8ac
DJ		 9121 abort ();
9122
9123 off = globals->tls_ldm_got.offset;
9124
9125 if ((off & 1) != 0)
9126 off &= ~1;
9127 else
9128 {
9129 /* If we don't know the module number, create a relocation
9130 for it. */
9131 if (info->shared)
9132 {
9133 Elf_Internal_Rela outrel;
ba93b8ac 9134
362d30a1 9135 if (srelgot == NULL)
ba93b8ac
DJ		 9136 abort ();
9137
00a97672 9138 outrel.r_addend = 0;
362d30a1
RS		 9139 outrel.r_offset = (sgot->output_section->vma
9140 + sgot->output_offset + off);
ba93b8ac
DJ		 9141 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9142
00a97672
RS		 9143 if (globals->use_rel)
9144 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9145 sgot->contents + off);
ba93b8ac 9146
47beaa6a 9147 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9148 }
9149 else
362d30a1 9150 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9151
9152 globals->tls_ldm_got.offset |= 1;
9153 }
9154
362d30a1 9155 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9156 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9157
9158 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9159 contents, rel->r_offset, value,
00a97672 9160 rel->r_addend);
ba93b8ac
DJ		 9161 }
9162
0855e32b
NS		 9163 case R_ARM_TLS_CALL:
9164 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9165 case R_ARM_TLS_GD32:
9166 case R_ARM_TLS_IE32:
0855e32b
NS		 9167 case R_ARM_TLS_GOTDESC:
9168 case R_ARM_TLS_DESCSEQ:
9169 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9170 {
0855e32b
NS		 9171 bfd_vma off, offplt;
9172 int indx = 0;
ba93b8ac
DJ		 9173 char tls_type;
9174
0855e32b 9175 BFD_ASSERT (sgot != NULL);
ba93b8ac 9176
ba93b8ac
DJ		 9177 if (h != NULL)
9178 {
9179 bfd_boolean dyn;
9180 dyn = globals->root.dynamic_sections_created;
9181 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9182 && (!info->shared
9183 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9184 {
9185 *unresolved_reloc_p = FALSE;
9186 indx = h->dynindx;
9187 }
9188 off = h->got.offset;
0855e32b 9189 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9190 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9191 }
9192 else
9193 {
0855e32b 9194 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9195 off = local_got_offsets[r_symndx];
0855e32b 9196 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9197 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9198 }
9199
0855e32b
NS		 9200 /* Linker relaxations happens from one of the
9201 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9202 if (ELF32_R_TYPE(rel->r_info) != r_type)
9203 tls_type = GOT_TLS_IE;
9204
9205 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9206
9207 if ((off & 1) != 0)
9208 off &= ~1;
9209 else
9210 {
9211 bfd_boolean need_relocs = FALSE;
9212 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9213 int cur_off = off;
9214
9215 /* The GOT entries have not been initialized yet. Do it
9216 now, and emit any relocations. If both an IE GOT and a
9217 GD GOT are necessary, we emit the GD first. */
9218
9219 if ((info->shared || indx != 0)
9220 && (h == NULL
9221 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9222 || h->root.type != bfd_link_hash_undefweak))
9223 {
9224 need_relocs = TRUE;
0855e32b 9225 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9226 }
9227
0855e32b
NS		 9228 if (tls_type & GOT_TLS_GDESC)
9229 {
47beaa6a
RS		 9230 bfd_byte *loc;
9231
0855e32b
NS		 9232 /* We should have relaxed, unless this is an undefined
9233 weak symbol. */
9234 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9235 || info->shared);
9236 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9237 <= globals->root.sgotplt->size);
9238
9239 outrel.r_addend = 0;
9240 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9241 + globals->root.sgotplt->output_offset
9242 + offplt
9243 + globals->sgotplt_jump_table_size);
9244
9245 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9246 sreloc = globals->root.srelplt;
9247 loc = sreloc->contents;
9248 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9249 BFD_ASSERT (loc + RELOC_SIZE (globals)
9250 <= sreloc->contents + sreloc->size);
9251
9252 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9253
9254 /* For globals, the first word in the relocation gets
9255 the relocation index and the top bit set, or zero,
9256 if we're binding now. For locals, it gets the
9257 symbol's offset in the tls section. */
9258 bfd_put_32 (output_bfd,
9259 !h ? value - elf_hash_table (info)->tls_sec->vma
9260 : info->flags & DF_BIND_NOW ? 0
9261 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9262 globals->root.sgotplt->contents + offplt +
9263 globals->sgotplt_jump_table_size);
9264
9265 /* Second word in the relocation is always zero. */
9266 bfd_put_32 (output_bfd, 0,
9267 globals->root.sgotplt->contents + offplt +
9268 globals->sgotplt_jump_table_size + 4);
9269 }
ba93b8ac
DJ		 9270 if (tls_type & GOT_TLS_GD)
9271 {
9272 if (need_relocs)
9273 {
00a97672 9274 outrel.r_addend = 0;
362d30a1
RS		 9275 outrel.r_offset = (sgot->output_section->vma
9276 + sgot->output_offset
00a97672 9277 + cur_off);
ba93b8ac 9278 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9279
00a97672
RS		 9280 if (globals->use_rel)
9281 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9282 sgot->contents + cur_off);
00a97672 9283
47beaa6a 9284 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9285
9286 if (indx == 0)
9287 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9288 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9289 else
9290 {
00a97672 9291 outrel.r_addend = 0;
ba93b8ac
DJ		 9292 outrel.r_info = ELF32_R_INFO (indx,
9293 R_ARM_TLS_DTPOFF32);
9294 outrel.r_offset += 4;
00a97672
RS		 9295
9296 if (globals->use_rel)
9297 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9298 sgot->contents + cur_off + 4);
00a97672 9299
47beaa6a
RS		 9300 elf32_arm_add_dynreloc (output_bfd, info,
9301 srelgot, &outrel);
ba93b8ac
DJ		 9302 }
9303 }
9304 else
9305 {
9306 /* If we are not emitting relocations for a
9307 general dynamic reference, then we must be in a
9308 static link or an executable link with the
9309 symbol binding locally. Mark it as belonging
9310 to module 1, the executable. */
9311 bfd_put_32 (output_bfd, 1,
362d30a1 9312 sgot->contents + cur_off);
ba93b8ac 9313 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9314 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9315 }
9316
9317 cur_off += 8;
9318 }
9319
9320 if (tls_type & GOT_TLS_IE)
9321 {
9322 if (need_relocs)
9323 {
00a97672
RS		 9324 if (indx == 0)
9325 outrel.r_addend = value - dtpoff_base (info);
9326 else
9327 outrel.r_addend = 0;
362d30a1
RS		 9328 outrel.r_offset = (sgot->output_section->vma
9329 + sgot->output_offset
ba93b8ac
DJ		 9330 + cur_off);
9331 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9332
00a97672
RS		 9333 if (globals->use_rel)
9334 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9335 sgot->contents + cur_off);
ba93b8ac 9336
47beaa6a 9337 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9338 }
9339 else
9340 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9341 sgot->contents + cur_off);
ba93b8ac
DJ		 9342 cur_off += 4;
9343 }
9344
9345 if (h != NULL)
9346 h->got.offset |= 1;
9347 else
9348 local_got_offsets[r_symndx] |= 1;
9349 }
9350
9351 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9352 off += 8;
0855e32b
NS		 9353 else if (tls_type & GOT_TLS_GDESC)
9354 off = offplt;
9355
9356 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9357 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9358 {
9359 bfd_signed_vma offset;
12352d3f
PB		 9360 /* TLS stubs are arm mode. The original symbol is a
9361 data object, so branch_type is bogus. */
9362 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9363 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9364 = arm_type_of_stub (info, input_section, rel,
9365 st_type, &branch_type,
0855e32b
NS		 9366 (struct elf32_arm_link_hash_entry *)h,
9367 globals->tls_trampoline, globals->root.splt,
9368 input_bfd, sym_name);
9369
9370 if (stub_type != arm_stub_none)
9371 {
9372 struct elf32_arm_stub_hash_entry *stub_entry
9373 = elf32_arm_get_stub_entry
9374 (input_section, globals->root.splt, 0, rel,
9375 globals, stub_type);
9376 offset = (stub_entry->stub_offset
9377 + stub_entry->stub_sec->output_offset
9378 + stub_entry->stub_sec->output_section->vma);
9379 }
9380 else
9381 offset = (globals->root.splt->output_section->vma
9382 + globals->root.splt->output_offset
9383 + globals->tls_trampoline);
9384
9385 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9386 {
9387 unsigned long inst;
9388
9389 offset -= (input_section->output_section->vma +
9390 input_section->output_offset + rel->r_offset + 8);
9391
9392 inst = offset >> 2;
9393 inst &= 0x00ffffff;
9394 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9395 }
9396 else
9397 {
9398 /* Thumb blx encodes the offset in a complicated
9399 fashion. */
9400 unsigned upper_insn, lower_insn;
9401 unsigned neg;
9402
9403 offset -= (input_section->output_section->vma +
9404 input_section->output_offset
9405 + rel->r_offset + 4);
9406
12352d3f
PB		 9407 if (stub_type != arm_stub_none
9408 && arm_stub_is_thumb (stub_type))
9409 {
9410 lower_insn = 0xd000;
9411 }
9412 else
9413 {
9414 lower_insn = 0xc000;
9415 /* Round up the offset to a word boundary */
9416 offset = (offset + 2) & ~2;
9417 }
9418
0855e32b
NS		 9419 neg = offset < 0;
9420 upper_insn = (0xf000
9421 | ((offset >> 12) & 0x3ff)
9422 | (neg << 10));
12352d3f 9423 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9424 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9425 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9426 bfd_put_16 (input_bfd, upper_insn, hit_data);
9427 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9428 return bfd_reloc_ok;
9429 }
9430 }
9431 /* These relocations needs special care, as besides the fact
9432 they point somewhere in .gotplt, the addend must be
9433 adjusted accordingly depending on the type of instruction
9434 we refer to */
9435 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9436 {
9437 unsigned long data, insn;
9438 unsigned thumb;
9439
9440 data = bfd_get_32 (input_bfd, hit_data);
9441 thumb = data & 1;
9442 data &= ~1u;
9443
9444 if (thumb)
9445 {
9446 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9447 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9448 insn = (insn << 16)
9449 | bfd_get_16 (input_bfd,
9450 contents + rel->r_offset - data + 2);
9451 if ((insn & 0xf800c000) == 0xf000c000)
9452 /* bl/blx */
9453 value = -6;
9454 else if ((insn & 0xffffff00) == 0x4400)
9455 /* add */
9456 value = -5;
9457 else
9458 {
9459 (*_bfd_error_handler)
9460 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9461 input_bfd, input_section,
9462 (unsigned long)rel->r_offset, insn);
9463 return bfd_reloc_notsupported;
9464 }
9465 }
9466 else
9467 {
9468 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9469
9470 switch (insn >> 24)
9471 {
9472 case 0xeb: /* bl */
9473 case 0xfa: /* blx */
9474 value = -4;
9475 break;
9476
9477 case 0xe0: /* add */
9478 value = -8;
9479 break;
9480
9481 default:
9482 (*_bfd_error_handler)
9483 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9484 input_bfd, input_section,
9485 (unsigned long)rel->r_offset, insn);
9486 return bfd_reloc_notsupported;
9487 }
9488 }
9489
9490 value += ((globals->root.sgotplt->output_section->vma
9491 + globals->root.sgotplt->output_offset + off)
9492 - (input_section->output_section->vma
9493 + input_section->output_offset
9494 + rel->r_offset)
9495 + globals->sgotplt_jump_table_size);
9496 }
9497 else
9498 value = ((globals->root.sgot->output_section->vma
9499 + globals->root.sgot->output_offset + off)
9500 - (input_section->output_section->vma
9501 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9502
9503 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9504 contents, rel->r_offset, value,
00a97672 9505 rel->r_addend);
ba93b8ac
DJ		 9506 }
9507
9508 case R_ARM_TLS_LE32:
9ec0c936 9509 if (info->shared && !info->pie)
ba93b8ac
DJ		 9510 {
9511 (*_bfd_error_handler)
9512 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9513 input_bfd, input_section,
9514 (long) rel->r_offset, howto->name);
21d799b5 9515 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 9516 }
9517 else
9518 value = tpoff (info, value);
906e58ca 9519
ba93b8ac 9520 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9521 contents, rel->r_offset, value,
9522 rel->r_addend);
ba93b8ac 9523
319850b4
JB		 9524 case R_ARM_V4BX:
9525 if (globals->fix_v4bx)
845b51d6
PB		 9526 {
9527 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9528
845b51d6
PB		 9529 /* Ensure that we have a BX instruction. */
9530 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9531
845b51d6
PB		 9532 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9533 {
9534 /* Branch to veneer. */
9535 bfd_vma glue_addr;
9536 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9537 glue_addr -= input_section->output_section->vma
9538 + input_section->output_offset
9539 + rel->r_offset + 8;
9540 insn = (insn & 0xf0000000) | 0x0a000000
9541 | ((glue_addr >> 2) & 0x00ffffff);
9542 }
9543 else
9544 {
9545 /* Preserve Rm (lowest four bits) and the condition code
9546 (highest four bits). Other bits encode MOV PC,Rm. */
9547 insn = (insn & 0xf000000f) | 0x01a0f000;
9548 }
319850b4 9549
845b51d6
PB		 9550 bfd_put_32 (input_bfd, insn, hit_data);
9551 }
319850b4
JB		 9552 return bfd_reloc_ok;
9553
b6895b4f
PB		 9554 case R_ARM_MOVW_ABS_NC:
9555 case R_ARM_MOVT_ABS:
9556 case R_ARM_MOVW_PREL_NC:
9557 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9558 /* Until we properly support segment-base-relative addressing then
9559 we assume the segment base to be zero, as for the group relocations.
9560 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9561 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9562 case R_ARM_MOVW_BREL_NC:
9563 case R_ARM_MOVW_BREL:
9564 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9565 {
9566 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9567
9568 if (globals->use_rel)
9569 {
9570 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9571 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9572 }
92f5d02b 9573
b6895b4f 9574 value += signed_addend;
b6895b4f
PB		 9575
9576 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9577 value -= (input_section->output_section->vma
9578 + input_section->output_offset + rel->r_offset);
9579
92f5d02b
MS		 9580 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9581 return bfd_reloc_overflow;
9582
35fc36a8 9583 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9584 value |= 1;
9585
9586 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9587 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9588 value >>= 16;
9589
9590 insn &= 0xfff0f000;
9591 insn |= value & 0xfff;
9592 insn |= (value & 0xf000) << 4;
9593 bfd_put_32 (input_bfd, insn, hit_data);
9594 }
9595 return bfd_reloc_ok;
9596
9597 case R_ARM_THM_MOVW_ABS_NC:
9598 case R_ARM_THM_MOVT_ABS:
9599 case R_ARM_THM_MOVW_PREL_NC:
9600 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9601 /* Until we properly support segment-base-relative addressing then
9602 we assume the segment base to be zero, as for the above relocations.
9603 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9604 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9605 as R_ARM_THM_MOVT_ABS. */
9606 case R_ARM_THM_MOVW_BREL_NC:
9607 case R_ARM_THM_MOVW_BREL:
9608 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9609 {
9610 bfd_vma insn;
906e58ca 9611
b6895b4f
PB		 9612 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9613 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9614
9615 if (globals->use_rel)
9616 {
9617 addend = ((insn >> 4) & 0xf000)
9618 | ((insn >> 15) & 0x0800)
9619 | ((insn >> 4) & 0x0700)
9620 | (insn & 0x00ff);
39623e12 9621 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9622 }
92f5d02b 9623
b6895b4f 9624 value += signed_addend;
b6895b4f
PB		 9625
9626 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9627 value -= (input_section->output_section->vma
9628 + input_section->output_offset + rel->r_offset);
9629
92f5d02b
MS		 9630 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9631 return bfd_reloc_overflow;
9632
35fc36a8 9633 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9634 value |= 1;
9635
9636 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9637 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9638 value >>= 16;
9639
9640 insn &= 0xfbf08f00;
9641 insn |= (value & 0xf000) << 4;
9642 insn |= (value & 0x0800) << 15;
9643 insn |= (value & 0x0700) << 4;
9644 insn |= (value & 0x00ff);
9645
9646 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9647 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9648 }
9649 return bfd_reloc_ok;
9650
4962c51a
MS		 9651 case R_ARM_ALU_PC_G0_NC:
9652 case R_ARM_ALU_PC_G1_NC:
9653 case R_ARM_ALU_PC_G0:
9654 case R_ARM_ALU_PC_G1:
9655 case R_ARM_ALU_PC_G2:
9656 case R_ARM_ALU_SB_G0_NC:
9657 case R_ARM_ALU_SB_G1_NC:
9658 case R_ARM_ALU_SB_G0:
9659 case R_ARM_ALU_SB_G1:
9660 case R_ARM_ALU_SB_G2:
9661 {
9662 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9663 bfd_vma pc = input_section->output_section->vma
9664 + input_section->output_offset + rel->r_offset;
9665 /* sb should be the origin of the *segment* containing the symbol.
9666 It is not clear how to obtain this OS-dependent value, so we
9667 make an arbitrary choice of zero. */
9668 bfd_vma sb = 0;
9669 bfd_vma residual;
9670 bfd_vma g_n;
9671 bfd_signed_vma signed_value;
9672 int group = 0;
9673
9674 /* Determine which group of bits to select. */
9675 switch (r_type)
9676 {
9677 case R_ARM_ALU_PC_G0_NC:
9678 case R_ARM_ALU_PC_G0:
9679 case R_ARM_ALU_SB_G0_NC:
9680 case R_ARM_ALU_SB_G0:
9681 group = 0;
9682 break;
9683
9684 case R_ARM_ALU_PC_G1_NC:
9685 case R_ARM_ALU_PC_G1:
9686 case R_ARM_ALU_SB_G1_NC:
9687 case R_ARM_ALU_SB_G1:
9688 group = 1;
9689 break;
9690
9691 case R_ARM_ALU_PC_G2:
9692 case R_ARM_ALU_SB_G2:
9693 group = 2;
9694 break;
9695
9696 default:
906e58ca 9697 abort ();
4962c51a
MS		 9698 }
9699
9700 /* If REL, extract the addend from the insn. If RELA, it will
9701 have already been fetched for us. */
9702 if (globals->use_rel)
9703 {
9704 int negative;
9705 bfd_vma constant = insn & 0xff;
9706 bfd_vma rotation = (insn & 0xf00) >> 8;
9707
9708 if (rotation == 0)
9709 signed_addend = constant;
9710 else
9711 {
9712 /* Compensate for the fact that in the instruction, the
9713 rotation is stored in multiples of 2 bits. */
9714 rotation *= 2;
9715
9716 /* Rotate "constant" right by "rotation" bits. */
9717 signed_addend = (constant >> rotation) |
9718 (constant << (8 * sizeof (bfd_vma) - rotation));
9719 }
9720
9721 /* Determine if the instruction is an ADD or a SUB.
9722 (For REL, this determines the sign of the addend.) */
9723 negative = identify_add_or_sub (insn);
9724 if (negative == 0)
9725 {
9726 (*_bfd_error_handler)
9727 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9728 input_bfd, input_section,
9729 (long) rel->r_offset, howto->name);
906e58ca 9730 return bfd_reloc_overflow;
4962c51a
MS		 9731 }
9732
9733 signed_addend *= negative;
9734 }
9735
9736 /* Compute the value (X) to go in the place. */
9737 if (r_type == R_ARM_ALU_PC_G0_NC
9738 || r_type == R_ARM_ALU_PC_G1_NC
9739 || r_type == R_ARM_ALU_PC_G0
9740 || r_type == R_ARM_ALU_PC_G1
9741 || r_type == R_ARM_ALU_PC_G2)
9742 /* PC relative. */
9743 signed_value = value - pc + signed_addend;
9744 else
9745 /* Section base relative. */
9746 signed_value = value - sb + signed_addend;
9747
9748 /* If the target symbol is a Thumb function, then set the
9749 Thumb bit in the address. */
35fc36a8 9750 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 9751 signed_value |= 1;
9752
9753 /* Calculate the value of the relevant G_n, in encoded
9754 constant-with-rotation format. */
9755 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9756 &residual);
9757
9758 /* Check for overflow if required. */
9759 if ((r_type == R_ARM_ALU_PC_G0
9760 || r_type == R_ARM_ALU_PC_G1
9761 || r_type == R_ARM_ALU_PC_G2
9762 || r_type == R_ARM_ALU_SB_G0
9763 || r_type == R_ARM_ALU_SB_G1
9764 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9765 {
9766 (*_bfd_error_handler)
9767 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9768 input_bfd, input_section,
9769 (long) rel->r_offset, abs (signed_value), howto->name);
9770 return bfd_reloc_overflow;
9771 }
9772
9773 /* Mask out the value and the ADD/SUB part of the opcode; take care
9774 not to destroy the S bit. */
9775 insn &= 0xff1ff000;
9776
9777 /* Set the opcode according to whether the value to go in the
9778 place is negative. */
9779 if (signed_value < 0)
9780 insn |= 1 << 22;
9781 else
9782 insn |= 1 << 23;
9783
9784 /* Encode the offset. */
9785 insn |= g_n;
9786
9787 bfd_put_32 (input_bfd, insn, hit_data);
9788 }
9789 return bfd_reloc_ok;
9790
9791 case R_ARM_LDR_PC_G0:
9792 case R_ARM_LDR_PC_G1:
9793 case R_ARM_LDR_PC_G2:
9794 case R_ARM_LDR_SB_G0:
9795 case R_ARM_LDR_SB_G1:
9796 case R_ARM_LDR_SB_G2:
9797 {
9798 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9799 bfd_vma pc = input_section->output_section->vma
9800 + input_section->output_offset + rel->r_offset;
9801 bfd_vma sb = 0; /* See note above. */
9802 bfd_vma residual;
9803 bfd_signed_vma signed_value;
9804 int group = 0;
9805
9806 /* Determine which groups of bits to calculate. */
9807 switch (r_type)
9808 {
9809 case R_ARM_LDR_PC_G0:
9810 case R_ARM_LDR_SB_G0:
9811 group = 0;
9812 break;
9813
9814 case R_ARM_LDR_PC_G1:
9815 case R_ARM_LDR_SB_G1:
9816 group = 1;
9817 break;
9818
9819 case R_ARM_LDR_PC_G2:
9820 case R_ARM_LDR_SB_G2:
9821 group = 2;
9822 break;
9823
9824 default:
906e58ca 9825 abort ();
4962c51a
MS		 9826 }
9827
9828 /* If REL, extract the addend from the insn. If RELA, it will
9829 have already been fetched for us. */
9830 if (globals->use_rel)
9831 {
9832 int negative = (insn & (1 << 23)) ? 1 : -1;
9833 signed_addend = negative * (insn & 0xfff);
9834 }
9835
9836 /* Compute the value (X) to go in the place. */
9837 if (r_type == R_ARM_LDR_PC_G0
9838 || r_type == R_ARM_LDR_PC_G1
9839 || r_type == R_ARM_LDR_PC_G2)
9840 /* PC relative. */
9841 signed_value = value - pc + signed_addend;
9842 else
9843 /* Section base relative. */
9844 signed_value = value - sb + signed_addend;
9845
9846 /* Calculate the value of the relevant G_{n-1} to obtain
9847 the residual at that stage. */
9848 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9849
9850 /* Check for overflow. */
9851 if (residual >= 0x1000)
9852 {
9853 (*_bfd_error_handler)
9854 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9855 input_bfd, input_section,
9856 (long) rel->r_offset, abs (signed_value), howto->name);
9857 return bfd_reloc_overflow;
9858 }
9859
9860 /* Mask out the value and U bit. */
9861 insn &= 0xff7ff000;
9862
9863 /* Set the U bit if the value to go in the place is non-negative. */
9864 if (signed_value >= 0)
9865 insn |= 1 << 23;
9866
9867 /* Encode the offset. */
9868 insn |= residual;
9869
9870 bfd_put_32 (input_bfd, insn, hit_data);
9871 }
9872 return bfd_reloc_ok;
9873
9874 case R_ARM_LDRS_PC_G0:
9875 case R_ARM_LDRS_PC_G1:
9876 case R_ARM_LDRS_PC_G2:
9877 case R_ARM_LDRS_SB_G0:
9878 case R_ARM_LDRS_SB_G1:
9879 case R_ARM_LDRS_SB_G2:
9880 {
9881 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9882 bfd_vma pc = input_section->output_section->vma
9883 + input_section->output_offset + rel->r_offset;
9884 bfd_vma sb = 0; /* See note above. */
9885 bfd_vma residual;
9886 bfd_signed_vma signed_value;
9887 int group = 0;
9888
9889 /* Determine which groups of bits to calculate. */
9890 switch (r_type)
9891 {
9892 case R_ARM_LDRS_PC_G0:
9893 case R_ARM_LDRS_SB_G0:
9894 group = 0;
9895 break;
9896
9897 case R_ARM_LDRS_PC_G1:
9898 case R_ARM_LDRS_SB_G1:
9899 group = 1;
9900 break;
9901
9902 case R_ARM_LDRS_PC_G2:
9903 case R_ARM_LDRS_SB_G2:
9904 group = 2;
9905 break;
9906
9907 default:
906e58ca 9908 abort ();
4962c51a
MS		 9909 }
9910
9911 /* If REL, extract the addend from the insn. If RELA, it will
9912 have already been fetched for us. */
9913 if (globals->use_rel)
9914 {
9915 int negative = (insn & (1 << 23)) ? 1 : -1;
9916 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
9917 }
9918
9919 /* Compute the value (X) to go in the place. */
9920 if (r_type == R_ARM_LDRS_PC_G0
9921 || r_type == R_ARM_LDRS_PC_G1
9922 || r_type == R_ARM_LDRS_PC_G2)
9923 /* PC relative. */
9924 signed_value = value - pc + signed_addend;
9925 else
9926 /* Section base relative. */
9927 signed_value = value - sb + signed_addend;
9928
9929 /* Calculate the value of the relevant G_{n-1} to obtain
9930 the residual at that stage. */
9931 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9932
9933 /* Check for overflow. */
9934 if (residual >= 0x100)
9935 {
9936 (*_bfd_error_handler)
9937 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9938 input_bfd, input_section,
9939 (long) rel->r_offset, abs (signed_value), howto->name);
9940 return bfd_reloc_overflow;
9941 }
9942
9943 /* Mask out the value and U bit. */
9944 insn &= 0xff7ff0f0;
9945
9946 /* Set the U bit if the value to go in the place is non-negative. */
9947 if (signed_value >= 0)
9948 insn |= 1 << 23;
9949
9950 /* Encode the offset. */
9951 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
9952
9953 bfd_put_32 (input_bfd, insn, hit_data);
9954 }
9955 return bfd_reloc_ok;
9956
9957 case R_ARM_LDC_PC_G0:
9958 case R_ARM_LDC_PC_G1:
9959 case R_ARM_LDC_PC_G2:
9960 case R_ARM_LDC_SB_G0:
9961 case R_ARM_LDC_SB_G1:
9962 case R_ARM_LDC_SB_G2:
9963 {
9964 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9965 bfd_vma pc = input_section->output_section->vma
9966 + input_section->output_offset + rel->r_offset;
9967 bfd_vma sb = 0; /* See note above. */
9968 bfd_vma residual;
9969 bfd_signed_vma signed_value;
9970 int group = 0;
9971
9972 /* Determine which groups of bits to calculate. */
9973 switch (r_type)
9974 {
9975 case R_ARM_LDC_PC_G0:
9976 case R_ARM_LDC_SB_G0:
9977 group = 0;
9978 break;
9979
9980 case R_ARM_LDC_PC_G1:
9981 case R_ARM_LDC_SB_G1:
9982 group = 1;
9983 break;
9984
9985 case R_ARM_LDC_PC_G2:
9986 case R_ARM_LDC_SB_G2:
9987 group = 2;
9988 break;
9989
9990 default:
906e58ca 9991 abort ();
4962c51a
MS		 9992 }
9993
9994 /* If REL, extract the addend from the insn. If RELA, it will
9995 have already been fetched for us. */
9996 if (globals->use_rel)
9997 {
9998 int negative = (insn & (1 << 23)) ? 1 : -1;
9999 signed_addend = negative * ((insn & 0xff) << 2);
10000 }
10001
10002 /* Compute the value (X) to go in the place. */
10003 if (r_type == R_ARM_LDC_PC_G0
10004 || r_type == R_ARM_LDC_PC_G1
10005 || r_type == R_ARM_LDC_PC_G2)
10006 /* PC relative. */
10007 signed_value = value - pc + signed_addend;
10008 else
10009 /* Section base relative. */
10010 signed_value = value - sb + signed_addend;
10011
10012 /* Calculate the value of the relevant G_{n-1} to obtain
10013 the residual at that stage. */
10014 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10015
10016 /* Check for overflow. (The absolute value to go in the place must be
10017 divisible by four and, after having been divided by four, must
10018 fit in eight bits.) */
10019 if ((residual & 0x3) != 0 || residual >= 0x400)
10020 {
10021 (*_bfd_error_handler)
10022 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10023 input_bfd, input_section,
10024 (long) rel->r_offset, abs (signed_value), howto->name);
10025 return bfd_reloc_overflow;
10026 }
10027
10028 /* Mask out the value and U bit. */
10029 insn &= 0xff7fff00;
10030
10031 /* Set the U bit if the value to go in the place is non-negative. */
10032 if (signed_value >= 0)
10033 insn |= 1 << 23;
10034
10035 /* Encode the offset. */
10036 insn |= residual >> 2;
10037
10038 bfd_put_32 (input_bfd, insn, hit_data);
10039 }
10040 return bfd_reloc_ok;
10041
252b5132
RH		 10042 default:
10043 return bfd_reloc_notsupported;
10044 }
10045}
10046
98c1d4aa
NC		 10047/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10048static void
57e8b36a
NC		 10049arm_add_to_rel (bfd * abfd,
10050 bfd_byte * address,
10051 reloc_howto_type * howto,
10052 bfd_signed_vma increment)
98c1d4aa 10053{
98c1d4aa
NC		 10054 bfd_signed_vma addend;
10055
bd97cb95
DJ		 10056 if (howto->type == R_ARM_THM_CALL
10057 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10058 {
9a5aca8c
AM		 10059 int upper_insn, lower_insn;
10060 int upper, lower;
98c1d4aa 10061
9a5aca8c
AM		 10062 upper_insn = bfd_get_16 (abfd, address);
10063 lower_insn = bfd_get_16 (abfd, address + 2);
10064 upper = upper_insn & 0x7ff;
10065 lower = lower_insn & 0x7ff;
10066
10067 addend = (upper << 12) | (lower << 1);
ddda4409 10068 addend += increment;
9a5aca8c 10069 addend >>= 1;
98c1d4aa 10070
9a5aca8c
AM		 10071 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10072 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10073
dc810e39
AM		 10074 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10075 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10076 }
10077 else
10078 {
10079 bfd_vma contents;
10080
10081 contents = bfd_get_32 (abfd, address);
10082
10083 /* Get the (signed) value from the instruction. */
10084 addend = contents & howto->src_mask;
10085 if (addend & ((howto->src_mask + 1) >> 1))
10086 {
10087 bfd_signed_vma mask;
10088
10089 mask = -1;
10090 mask &= ~ howto->src_mask;
10091 addend |= mask;
10092 }
10093
10094 /* Add in the increment, (which is a byte value). */
10095 switch (howto->type)
10096 {
10097 default:
10098 addend += increment;
10099 break;
10100
10101 case R_ARM_PC24:
c6596c5e 10102 case R_ARM_PLT32:
5b5bb741
PB		 10103 case R_ARM_CALL:
10104 case R_ARM_JUMP24:
9a5aca8c 10105 addend <<= howto->size;
dc810e39 10106 addend += increment;
9a5aca8c
AM		 10107
10108 /* Should we check for overflow here ? */
10109
10110 /* Drop any undesired bits. */
10111 addend >>= howto->rightshift;
10112 break;
10113 }
10114
10115 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10116
10117 bfd_put_32 (abfd, contents, address);
ddda4409 10118 }
98c1d4aa 10119}
252b5132 10120
ba93b8ac
DJ		 10121#define IS_ARM_TLS_RELOC(R_TYPE) \
10122 ((R_TYPE) == R_ARM_TLS_GD32 \
10123 || (R_TYPE) == R_ARM_TLS_LDO32 \
10124 || (R_TYPE) == R_ARM_TLS_LDM32 \
10125 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10126 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10127 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10128 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10129 || (R_TYPE) == R_ARM_TLS_IE32 \
10130 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10131
10132/* Specific set of relocations for the gnu tls dialect. */
10133#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10134 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10135 || (R_TYPE) == R_ARM_TLS_CALL \
10136 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10137 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10138 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10139
252b5132 10140/* Relocate an ARM ELF section. */
906e58ca 10141
b34976b6 10142static bfd_boolean
57e8b36a
NC		 10143elf32_arm_relocate_section (bfd * output_bfd,
10144 struct bfd_link_info * info,
10145 bfd * input_bfd,
10146 asection * input_section,
10147 bfd_byte * contents,
10148 Elf_Internal_Rela * relocs,
10149 Elf_Internal_Sym * local_syms,
10150 asection ** local_sections)
252b5132 10151{
b34976b6
AM		 10152 Elf_Internal_Shdr *symtab_hdr;
10153 struct elf_link_hash_entry **sym_hashes;
10154 Elf_Internal_Rela *rel;
10155 Elf_Internal_Rela *relend;
10156 const char *name;
b32d3aa2 10157 struct elf32_arm_link_hash_table * globals;
252b5132 10158
4e7fd91e 10159 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10160 if (globals == NULL)
10161 return FALSE;
b491616a 10162
0ffa91dd 10163 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10164 sym_hashes = elf_sym_hashes (input_bfd);
10165
10166 rel = relocs;
10167 relend = relocs + input_section->reloc_count;
10168 for (; rel < relend; rel++)
10169 {
ba96a88f
NC		 10170 int r_type;
10171 reloc_howto_type * howto;
10172 unsigned long r_symndx;
10173 Elf_Internal_Sym * sym;
10174 asection * sec;
252b5132 10175 struct elf_link_hash_entry * h;
ba96a88f
NC		 10176 bfd_vma relocation;
10177 bfd_reloc_status_type r;
10178 arelent bfd_reloc;
ba93b8ac 10179 char sym_type;
0945cdfd 10180 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10181 char *error_message = NULL;
f21f3fe0 10182
252b5132 10183 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10184 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10185 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10186
ba96a88f
NC		 10187 if ( r_type == R_ARM_GNU_VTENTRY
10188 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 10189 continue;
10190
b32d3aa2 10191 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10192 howto = bfd_reloc.howto;
252b5132 10193
252b5132
RH		 10194 h = NULL;
10195 sym = NULL;
10196 sec = NULL;
9b485d32 10197
252b5132
RH		 10198 if (r_symndx < symtab_hdr->sh_info)
10199 {
10200 sym = local_syms + r_symndx;
ba93b8ac 10201 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10202 sec = local_sections[r_symndx];
ffcb4889
NS		 10203
10204 /* An object file might have a reference to a local
10205 undefined symbol. This is a daft object file, but we
10206 should at least do something about it. V4BX & NONE
10207 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10208 allowed to use the undefined symbol, so allow those.
10209 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10210 if (r_type != R_ARM_V4BX
10211 && r_type != R_ARM_NONE
77b4f08f 10212 && r_symndx != STN_UNDEF
ffcb4889
NS		 10213 && bfd_is_und_section (sec)
10214 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10215 {
10216 if (!info->callbacks->undefined_symbol
10217 (info, bfd_elf_string_from_elf_section
10218 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10219 input_bfd, input_section,
10220 rel->r_offset, TRUE))
10221 return FALSE;
10222 }
10223
4e7fd91e 10224 if (globals->use_rel)
f8df10f4 10225 {
4e7fd91e
PB		 10226 relocation = (sec->output_section->vma
10227 + sec->output_offset
10228 + sym->st_value);
ab96bf03
AM		 10229 if (!info->relocatable
10230 && (sec->flags & SEC_MERGE)
10231 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10232 {
4e7fd91e
PB		 10233 asection *msec;
10234 bfd_vma addend, value;
10235
39623e12 10236 switch (r_type)
4e7fd91e 10237 {
39623e12
PB		 10238 case R_ARM_MOVW_ABS_NC:
10239 case R_ARM_MOVT_ABS:
10240 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10241 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10242 addend = (addend ^ 0x8000) - 0x8000;
10243 break;
f8df10f4 10244
39623e12
PB		 10245 case R_ARM_THM_MOVW_ABS_NC:
10246 case R_ARM_THM_MOVT_ABS:
10247 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10248 << 16;
10249 value |= bfd_get_16 (input_bfd,
10250 contents + rel->r_offset + 2);
10251 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10252 | ((value & 0x04000000) >> 15);
10253 addend = (addend ^ 0x8000) - 0x8000;
10254 break;
f8df10f4 10255
39623e12
PB		 10256 default:
10257 if (howto->rightshift
10258 || (howto->src_mask & (howto->src_mask + 1)))
10259 {
10260 (*_bfd_error_handler)
10261 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10262 input_bfd, input_section,
10263 (long) rel->r_offset, howto->name);
10264 return FALSE;
10265 }
10266
10267 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10268
10269 /* Get the (signed) value from the instruction. */
10270 addend = value & howto->src_mask;
10271 if (addend & ((howto->src_mask + 1) >> 1))
10272 {
10273 bfd_signed_vma mask;
10274
10275 mask = -1;
10276 mask &= ~ howto->src_mask;
10277 addend |= mask;
10278 }
10279 break;
4e7fd91e 10280 }
39623e12 10281
4e7fd91e
PB		 10282 msec = sec;
10283 addend =
10284 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10285 - relocation;
10286 addend += msec->output_section->vma + msec->output_offset;
39623e12 10287
cc643b88 10288 /* Cases here must match those in the preceding
39623e12
PB		 10289 switch statement. */
10290 switch (r_type)
10291 {
10292 case R_ARM_MOVW_ABS_NC:
10293 case R_ARM_MOVT_ABS:
10294 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10295 | (addend & 0xfff);
10296 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10297 break;
10298
10299 case R_ARM_THM_MOVW_ABS_NC:
10300 case R_ARM_THM_MOVT_ABS:
10301 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10302 | (addend & 0xff) | ((addend & 0x0800) << 15);
10303 bfd_put_16 (input_bfd, value >> 16,
10304 contents + rel->r_offset);
10305 bfd_put_16 (input_bfd, value,
10306 contents + rel->r_offset + 2);
10307 break;
10308
10309 default:
10310 value = (value & ~ howto->dst_mask)
10311 | (addend & howto->dst_mask);
10312 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10313 break;
10314 }
f8df10f4 10315 }
f8df10f4 10316 }
4e7fd91e
PB		 10317 else
10318 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10319 }
10320 else
10321 {
560e09e9 10322 bfd_boolean warned;
560e09e9 10323
b2a8e766
AM		 10324 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10325 r_symndx, symtab_hdr, sym_hashes,
10326 h, sec, relocation,
10327 unresolved_reloc, warned);
ba93b8ac
DJ		 10328
10329 sym_type = h->type;
252b5132
RH		 10330 }
10331
ab96bf03 10332 if (sec != NULL && elf_discarded_section (sec))
e4067dbb
DJ		 10333 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10334 rel, relend, howto, contents);
ab96bf03
AM		 10335
10336 if (info->relocatable)
10337 {
10338 /* This is a relocatable link. We don't have to change
10339 anything, unless the reloc is against a section symbol,
10340 in which case we have to adjust according to where the
10341 section symbol winds up in the output section. */
10342 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10343 {
10344 if (globals->use_rel)
10345 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10346 howto, (bfd_signed_vma) sec->output_offset);
10347 else
10348 rel->r_addend += sec->output_offset;
10349 }
10350 continue;
10351 }
10352
252b5132
RH		 10353 if (h != NULL)
10354 name = h->root.root.string;
10355 else
10356 {
10357 name = (bfd_elf_string_from_elf_section
10358 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10359 if (name == NULL || *name == '\0')
10360 name = bfd_section_name (input_bfd, sec);
10361 }
f21f3fe0 10362
cf35638d 10363 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10364 && r_type != R_ARM_NONE
10365 && (h == NULL
10366 || h->root.type == bfd_link_hash_defined
10367 || h->root.type == bfd_link_hash_defweak)
10368 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10369 {
10370 (*_bfd_error_handler)
10371 ((sym_type == STT_TLS
10372 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10373 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10374 input_bfd,
10375 input_section,
10376 (long) rel->r_offset,
10377 howto->name,
10378 name);
10379 }
10380
0855e32b
NS		 10381 /* We call elf32_arm_final_link_relocate unless we're completely
10382 done, i.e., the relaxation produced the final output we want,
10383 and we won't let anybody mess with it. Also, we have to do
10384 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10385 both in relaxed and non-relaxed cases */
10386 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10387 || (IS_ARM_TLS_GNU_RELOC (r_type)
10388 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10389 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10390 & GOT_TLS_GDESC)))
10391 {
10392 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10393 contents, rel, h == NULL);
10394 /* This may have been marked unresolved because it came from
10395 a shared library. But we've just dealt with that. */
10396 unresolved_reloc = 0;
10397 }
10398 else
10399 r = bfd_reloc_continue;
10400
10401 if (r == bfd_reloc_continue)
10402 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10403 input_section, contents, rel,
34e77a92 10404 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10405 (h ? h->target_internal
10406 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10407 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10408
10409 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10410 because such sections are not SEC_ALLOC and thus ld.so will
10411 not process them. */
10412 if (unresolved_reloc
10413 && !((input_section->flags & SEC_DEBUGGING) != 0
1d5316ab
AM		 10414 && h->def_dynamic)
10415 && _bfd_elf_section_offset (output_bfd, info, input_section,
10416 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10417 {
10418 (*_bfd_error_handler)
843fe662
L		 10419 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10420 input_bfd,
10421 input_section,
10422 (long) rel->r_offset,
10423 howto->name,
10424 h->root.root.string);
0945cdfd
DJ		 10425 return FALSE;
10426 }
252b5132
RH		 10427
10428 if (r != bfd_reloc_ok)
10429 {
252b5132
RH		 10430 switch (r)
10431 {
10432 case bfd_reloc_overflow:
cf919dfd
PB		 10433 /* If the overflowing reloc was to an undefined symbol,
10434 we have already printed one error message and there
10435 is no point complaining again. */
10436 if ((! h ||
10437 h->root.type != bfd_link_hash_undefined)
10438 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10439 (info, (h ? &h->root : NULL), name, howto->name,
10440 (bfd_vma) 0, input_bfd, input_section,
10441 rel->r_offset))))
b34976b6 10442 return FALSE;
252b5132
RH		 10443 break;
10444
10445 case bfd_reloc_undefined:
10446 if (!((*info->callbacks->undefined_symbol)
10447 (info, name, input_bfd, input_section,
b34976b6
AM		 10448 rel->r_offset, TRUE)))
10449 return FALSE;
252b5132
RH		 10450 break;
10451
10452 case bfd_reloc_outofrange:
f2a9dd69 10453 error_message = _("out of range");
252b5132
RH		 10454 goto common_error;
10455
10456 case bfd_reloc_notsupported:
f2a9dd69 10457 error_message = _("unsupported relocation");
252b5132
RH		 10458 goto common_error;
10459
10460 case bfd_reloc_dangerous:
f2a9dd69 10461 /* error_message should already be set. */
252b5132
RH		 10462 goto common_error;
10463
10464 default:
f2a9dd69 10465 error_message = _("unknown error");
8029a119 10466 /* Fall through. */
252b5132
RH		 10467
10468 common_error:
f2a9dd69
DJ		 10469 BFD_ASSERT (error_message != NULL);
10470 if (!((*info->callbacks->reloc_dangerous)
10471 (info, error_message, input_bfd, input_section,
252b5132 10472 rel->r_offset)))
b34976b6 10473 return FALSE;
252b5132
RH		 10474 break;
10475 }
10476 }
10477 }
10478
b34976b6 10479 return TRUE;
252b5132
RH		 10480}
10481
91d6fa6a 10482/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10483 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10484 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10485 maintaining that condition). */
10486
10487static void
10488add_unwind_table_edit (arm_unwind_table_edit **head,
10489 arm_unwind_table_edit **tail,
10490 arm_unwind_edit_type type,
10491 asection *linked_section,
91d6fa6a 10492 unsigned int tindex)
2468f9c9 10493{
21d799b5
NC		 10494 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10495 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 10496
10497 new_edit->type = type;
10498 new_edit->linked_section = linked_section;
91d6fa6a 10499 new_edit->index = tindex;
2468f9c9 10500
91d6fa6a 10501 if (tindex > 0)
2468f9c9
PB		 10502 {
10503 new_edit->next = NULL;
10504
10505 if (*tail)
10506 (*tail)->next = new_edit;
10507
10508 (*tail) = new_edit;
10509
10510 if (!*head)
10511 (*head) = new_edit;
10512 }
10513 else
10514 {
10515 new_edit->next = *head;
10516
10517 if (!*tail)
10518 *tail = new_edit;
10519
10520 *head = new_edit;
10521 }
10522}
10523
10524static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10525
10526/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10527static void
10528adjust_exidx_size(asection *exidx_sec, int adjust)
10529{
10530 asection *out_sec;
10531
10532 if (!exidx_sec->rawsize)
10533 exidx_sec->rawsize = exidx_sec->size;
10534
10535 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10536 out_sec = exidx_sec->output_section;
10537 /* Adjust size of output section. */
10538 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10539}
10540
10541/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10542static void
10543insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10544{
10545 struct _arm_elf_section_data *exidx_arm_data;
10546
10547 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10548 add_unwind_table_edit (
10549 &exidx_arm_data->u.exidx.unwind_edit_list,
10550 &exidx_arm_data->u.exidx.unwind_edit_tail,
10551 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10552
10553 adjust_exidx_size(exidx_sec, 8);
10554}
10555
10556/* Scan .ARM.exidx tables, and create a list describing edits which should be
10557 made to those tables, such that:
10558
10559 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10560 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10561 codes which have been inlined into the index).
10562
85fdf906
AH		 10563 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10564
2468f9c9
PB		 10565 The edits are applied when the tables are written
10566 (in elf32_arm_write_section).
10567*/
10568
10569bfd_boolean
10570elf32_arm_fix_exidx_coverage (asection **text_section_order,
10571 unsigned int num_text_sections,
85fdf906
AH		 10572 struct bfd_link_info *info,
10573 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10574{
10575 bfd *inp;
10576 unsigned int last_second_word = 0, i;
10577 asection *last_exidx_sec = NULL;
10578 asection *last_text_sec = NULL;
10579 int last_unwind_type = -1;
10580
10581 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10582 text sections. */
10583 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10584 {
10585 asection *sec;
10586
10587 for (sec = inp->sections; sec != NULL; sec = sec->next)
10588 {
10589 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10590 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10591
dec9d5df 10592 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 10593 continue;
10594
10595 if (elf_sec->linked_to)
10596 {
10597 Elf_Internal_Shdr *linked_hdr
10598 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10599 struct _arm_elf_section_data *linked_sec_arm_data
10600 = get_arm_elf_section_data (linked_hdr->bfd_section);
10601
10602 if (linked_sec_arm_data == NULL)
10603 continue;
10604
10605 /* Link this .ARM.exidx section back from the text section it
10606 describes. */
10607 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10608 }
10609 }
10610 }
10611
10612 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10613 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10614 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10615
10616 for (i = 0; i < num_text_sections; i++)
10617 {
10618 asection *sec = text_section_order[i];
10619 asection *exidx_sec;
10620 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10621 struct _arm_elf_section_data *exidx_arm_data;
10622 bfd_byte *contents = NULL;
10623 int deleted_exidx_bytes = 0;
10624 bfd_vma j;
10625 arm_unwind_table_edit *unwind_edit_head = NULL;
10626 arm_unwind_table_edit *unwind_edit_tail = NULL;
10627 Elf_Internal_Shdr *hdr;
10628 bfd *ibfd;
10629
10630 if (arm_data == NULL)
10631 continue;
10632
10633 exidx_sec = arm_data->u.text.arm_exidx_sec;
10634 if (exidx_sec == NULL)
10635 {
10636 /* Section has no unwind data. */
10637 if (last_unwind_type == 0 || !last_exidx_sec)
10638 continue;
10639
10640 /* Ignore zero sized sections. */
10641 if (sec->size == 0)
10642 continue;
10643
10644 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10645 last_unwind_type = 0;
10646 continue;
10647 }
10648
22a8f80e
PB		 10649 /* Skip /DISCARD/ sections. */
10650 if (bfd_is_abs_section (exidx_sec->output_section))
10651 continue;
10652
2468f9c9
PB		 10653 hdr = &elf_section_data (exidx_sec)->this_hdr;
10654 if (hdr->sh_type != SHT_ARM_EXIDX)
10655 continue;
10656
10657 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10658 if (exidx_arm_data == NULL)
10659 continue;
10660
10661 ibfd = exidx_sec->owner;
10662
10663 if (hdr->contents != NULL)
10664 contents = hdr->contents;
10665 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10666 /* An error? */
10667 continue;
10668
10669 for (j = 0; j < hdr->sh_size; j += 8)
10670 {
10671 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10672 int unwind_type;
10673 int elide = 0;
10674
10675 /* An EXIDX_CANTUNWIND entry. */
10676 if (second_word == 1)
10677 {
10678 if (last_unwind_type == 0)
10679 elide = 1;
10680 unwind_type = 0;
10681 }
10682 /* Inlined unwinding data. Merge if equal to previous. */
10683 else if ((second_word & 0x80000000) != 0)
10684 {
85fdf906
AH		 10685 if (merge_exidx_entries
10686 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 10687 elide = 1;
10688 unwind_type = 1;
10689 last_second_word = second_word;
10690 }
10691 /* Normal table entry. In theory we could merge these too,
10692 but duplicate entries are likely to be much less common. */
10693 else
10694 unwind_type = 2;
10695
10696 if (elide)
10697 {
10698 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10699 DELETE_EXIDX_ENTRY, NULL, j / 8);
10700
10701 deleted_exidx_bytes += 8;
10702 }
10703
10704 last_unwind_type = unwind_type;
10705 }
10706
10707 /* Free contents if we allocated it ourselves. */
10708 if (contents != hdr->contents)
10709 free (contents);
10710
10711 /* Record edits to be applied later (in elf32_arm_write_section). */
10712 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10713 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10714
10715 if (deleted_exidx_bytes > 0)
10716 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10717
10718 last_exidx_sec = exidx_sec;
10719 last_text_sec = sec;
10720 }
10721
10722 /* Add terminating CANTUNWIND entry. */
10723 if (last_exidx_sec && last_unwind_type != 0)
10724 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10725
10726 return TRUE;
10727}
10728
3e6b1042
DJ		 10729static bfd_boolean
10730elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10731 bfd *ibfd, const char *name)
10732{
10733 asection *sec, *osec;
10734
10735 sec = bfd_get_section_by_name (ibfd, name);
10736 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10737 return TRUE;
10738
10739 osec = sec->output_section;
10740 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10741 return TRUE;
10742
10743 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10744 sec->output_offset, sec->size))
10745 return FALSE;
10746
10747 return TRUE;
10748}
10749
10750static bfd_boolean
10751elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10752{
10753 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 10754 asection *sec, *osec;
3e6b1042 10755
4dfe6ac6
NC		 10756 if (globals == NULL)
10757 return FALSE;
10758
3e6b1042
DJ		 10759 /* Invoke the regular ELF backend linker to do all the work. */
10760 if (!bfd_elf_final_link (abfd, info))
10761 return FALSE;
10762
fe33d2fa
CL		 10763 /* Process stub sections (eg BE8 encoding, ...). */
10764 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10765 int i;
cdb21a0a
NS		 10766 for (i=0; i<htab->top_id; i++)
10767 {
10768 sec = htab->stub_group[i].stub_sec;
10769 /* Only process it once, in its link_sec slot. */
10770 if (sec && i == htab->stub_group[i].link_sec->id)
10771 {
10772 osec = sec->output_section;
10773 elf32_arm_write_section (abfd, info, sec, sec->contents);
10774 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10775 sec->output_offset, sec->size))
10776 return FALSE;
10777 }
fe33d2fa 10778 }
fe33d2fa 10779
3e6b1042
DJ		 10780 /* Write out any glue sections now that we have created all the
10781 stubs. */
10782 if (globals->bfd_of_glue_owner != NULL)
10783 {
10784 if (! elf32_arm_output_glue_section (info, abfd,
10785 globals->bfd_of_glue_owner,
10786 ARM2THUMB_GLUE_SECTION_NAME))
10787 return FALSE;
10788
10789 if (! elf32_arm_output_glue_section (info, abfd,
10790 globals->bfd_of_glue_owner,
10791 THUMB2ARM_GLUE_SECTION_NAME))
10792 return FALSE;
10793
10794 if (! elf32_arm_output_glue_section (info, abfd,
10795 globals->bfd_of_glue_owner,
10796 VFP11_ERRATUM_VENEER_SECTION_NAME))
10797 return FALSE;
10798
10799 if (! elf32_arm_output_glue_section (info, abfd,
10800 globals->bfd_of_glue_owner,
10801 ARM_BX_GLUE_SECTION_NAME))
10802 return FALSE;
10803 }
10804
10805 return TRUE;
10806}
10807
c178919b
NC		 10808/* Set the right machine number. */
10809
10810static bfd_boolean
57e8b36a 10811elf32_arm_object_p (bfd *abfd)
c178919b 10812{
5a6c6817 10813 unsigned int mach;
57e8b36a 10814
5a6c6817 10815 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 10816
5a6c6817
NC		 10817 if (mach != bfd_mach_arm_unknown)
10818 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10819
10820 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
10821 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 10822
e16bb312 10823 else
5a6c6817 10824 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 10825
10826 return TRUE;
10827}
10828
fc830a83 10829/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 10830
b34976b6 10831static bfd_boolean
57e8b36a 10832elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 10833{
10834 if (elf_flags_init (abfd)
10835 && elf_elfheader (abfd)->e_flags != flags)
10836 {
fc830a83
NC		 10837 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
10838 {
fd2ec330 10839 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 10840 (*_bfd_error_handler)
10841 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
10842 abfd);
fc830a83 10843 else
d003868e
AM		 10844 _bfd_error_handler
10845 (_("Warning: Clearing the interworking flag of %B due to outside request"),
10846 abfd);
fc830a83 10847 }
252b5132
RH		 10848 }
10849 else
10850 {
10851 elf_elfheader (abfd)->e_flags = flags;
b34976b6 10852 elf_flags_init (abfd) = TRUE;
252b5132
RH		 10853 }
10854
b34976b6 10855 return TRUE;
252b5132
RH		 10856}
10857
fc830a83 10858/* Copy backend specific data from one object module to another. */
9b485d32 10859
b34976b6 10860static bfd_boolean
57e8b36a 10861elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 10862{
10863 flagword in_flags;
10864 flagword out_flags;
10865
0ffa91dd 10866 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10867 return TRUE;
252b5132 10868
fc830a83 10869 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 10870 out_flags = elf_elfheader (obfd)->e_flags;
10871
fc830a83
NC		 10872 if (elf_flags_init (obfd)
10873 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
10874 && in_flags != out_flags)
252b5132 10875 {
252b5132 10876 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 10877 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 10878 return FALSE;
252b5132
RH		 10879
10880 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 10881 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 10882 return FALSE;
252b5132
RH		 10883
10884 /* If the src and dest have different interworking flags
10885 then turn off the interworking bit. */
fd2ec330 10886 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 10887 {
fd2ec330 10888 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 10889 _bfd_error_handler
10890 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
10891 obfd, ibfd);
252b5132 10892
fd2ec330 10893 in_flags &= ~EF_ARM_INTERWORK;
252b5132 10894 }
1006ba19
PB		 10895
10896 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 10897 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
10898 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 10899 }
10900
10901 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 10902 elf_flags_init (obfd) = TRUE;
252b5132 10903
94a3258f
PB		 10904 /* Also copy the EI_OSABI field. */
10905 elf_elfheader (obfd)->e_ident[EI_OSABI] =
10906 elf_elfheader (ibfd)->e_ident[EI_OSABI];
10907
104d59d1
JM		 10908 /* Copy object attributes. */
10909 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 10910
10911 return TRUE;
10912}
10913
10914/* Values for Tag_ABI_PCS_R9_use. */
10915enum
10916{
10917 AEABI_R9_V6,
10918 AEABI_R9_SB,
10919 AEABI_R9_TLS,
10920 AEABI_R9_unused
10921};
10922
10923/* Values for Tag_ABI_PCS_RW_data. */
10924enum
10925{
10926 AEABI_PCS_RW_data_absolute,
10927 AEABI_PCS_RW_data_PCrel,
10928 AEABI_PCS_RW_data_SBrel,
10929 AEABI_PCS_RW_data_unused
10930};
10931
10932/* Values for Tag_ABI_enum_size. */
10933enum
10934{
10935 AEABI_enum_unused,
10936 AEABI_enum_short,
10937 AEABI_enum_wide,
10938 AEABI_enum_forced_wide
10939};
10940
104d59d1
JM		 10941/* Determine whether an object attribute tag takes an integer, a
10942 string or both. */
906e58ca 10943
104d59d1
JM		 10944static int
10945elf32_arm_obj_attrs_arg_type (int tag)
10946{
10947 if (tag == Tag_compatibility)
3483fe2e 10948 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 10949 else if (tag == Tag_nodefaults)
3483fe2e
AS		 10950 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
10951 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
10952 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 10953 else if (tag < 32)
3483fe2e 10954 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 10955 else
3483fe2e 10956 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 10957}
10958
5aa6ff7c
AS		 10959/* The ABI defines that Tag_conformance should be emitted first, and that
10960 Tag_nodefaults should be second (if either is defined). This sets those
10961 two positions, and bumps up the position of all the remaining tags to
10962 compensate. */
10963static int
10964elf32_arm_obj_attrs_order (int num)
10965{
3de4a297 10966 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 10967 return Tag_conformance;
3de4a297 10968 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 10969 return Tag_nodefaults;
10970 if ((num - 2) < Tag_nodefaults)
10971 return num - 2;
10972 if ((num - 1) < Tag_conformance)
10973 return num - 1;
10974 return num;
10975}
10976
e8b36cd1
JM		 10977/* Attribute numbers >=64 (mod 128) can be safely ignored. */
10978static bfd_boolean
10979elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
10980{
10981 if ((tag & 127) < 64)
10982 {
10983 _bfd_error_handler
10984 (_("%B: Unknown mandatory EABI object attribute %d"),
10985 abfd, tag);
10986 bfd_set_error (bfd_error_bad_value);
10987 return FALSE;
10988 }
10989 else
10990 {
10991 _bfd_error_handler
10992 (_("Warning: %B: Unknown EABI object attribute %d"),
10993 abfd, tag);
10994 return TRUE;
10995 }
10996}
10997
91e22acd
AS		 10998/* Read the architecture from the Tag_also_compatible_with attribute, if any.
10999 Returns -1 if no architecture could be read. */
11000
11001static int
11002get_secondary_compatible_arch (bfd *abfd)
11003{
11004 obj_attribute *attr =
11005 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11006
11007 /* Note: the tag and its argument below are uleb128 values, though
11008 currently-defined values fit in one byte for each. */
11009 if (attr->s
11010 && attr->s[0] == Tag_CPU_arch
11011 && (attr->s[1] & 128) != 128
11012 && attr->s[2] == 0)
11013 return attr->s[1];
11014
11015 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11016 return -1;
11017}
11018
11019/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11020 The tag is removed if ARCH is -1. */
11021
8e79c3df 11022static void
91e22acd 11023set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11024{
91e22acd
AS		 11025 obj_attribute *attr =
11026 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11027
91e22acd
AS		 11028 if (arch == -1)
11029 {
11030 attr->s = NULL;
11031 return;
8e79c3df 11032 }
91e22acd
AS		 11033
11034 /* Note: the tag and its argument below are uleb128 values, though
11035 currently-defined values fit in one byte for each. */
11036 if (!attr->s)
21d799b5 11037 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11038 attr->s[0] = Tag_CPU_arch;
11039 attr->s[1] = arch;
11040 attr->s[2] = '\0';
8e79c3df
CM		 11041}
11042
91e22acd
AS		 11043/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11044 into account. */
11045
11046static int
11047tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11048 int newtag, int secondary_compat)
8e79c3df 11049{
91e22acd
AS		 11050#define T(X) TAG_CPU_ARCH_##X
11051 int tagl, tagh, result;
11052 const int v6t2[] =
11053 {
11054 T(V6T2), /* PRE_V4. */
11055 T(V6T2), /* V4. */
11056 T(V6T2), /* V4T. */
11057 T(V6T2), /* V5T. */
11058 T(V6T2), /* V5TE. */
11059 T(V6T2), /* V5TEJ. */
11060 T(V6T2), /* V6. */
11061 T(V7), /* V6KZ. */
11062 T(V6T2) /* V6T2. */
11063 };
11064 const int v6k[] =
11065 {
11066 T(V6K), /* PRE_V4. */
11067 T(V6K), /* V4. */
11068 T(V6K), /* V4T. */
11069 T(V6K), /* V5T. */
11070 T(V6K), /* V5TE. */
11071 T(V6K), /* V5TEJ. */
11072 T(V6K), /* V6. */
11073 T(V6KZ), /* V6KZ. */
11074 T(V7), /* V6T2. */
11075 T(V6K) /* V6K. */
11076 };
11077 const int v7[] =
11078 {
11079 T(V7), /* PRE_V4. */
11080 T(V7), /* V4. */
11081 T(V7), /* V4T. */
11082 T(V7), /* V5T. */
11083 T(V7), /* V5TE. */
11084 T(V7), /* V5TEJ. */
11085 T(V7), /* V6. */
11086 T(V7), /* V6KZ. */
11087 T(V7), /* V6T2. */
11088 T(V7), /* V6K. */
11089 T(V7) /* V7. */
11090 };
11091 const int v6_m[] =
11092 {
11093 -1, /* PRE_V4. */
11094 -1, /* V4. */
11095 T(V6K), /* V4T. */
11096 T(V6K), /* V5T. */
11097 T(V6K), /* V5TE. */
11098 T(V6K), /* V5TEJ. */
11099 T(V6K), /* V6. */
11100 T(V6KZ), /* V6KZ. */
11101 T(V7), /* V6T2. */
11102 T(V6K), /* V6K. */
11103 T(V7), /* V7. */
11104 T(V6_M) /* V6_M. */
11105 };
11106 const int v6s_m[] =
11107 {
11108 -1, /* PRE_V4. */
11109 -1, /* V4. */
11110 T(V6K), /* V4T. */
11111 T(V6K), /* V5T. */
11112 T(V6K), /* V5TE. */
11113 T(V6K), /* V5TEJ. */
11114 T(V6K), /* V6. */
11115 T(V6KZ), /* V6KZ. */
11116 T(V7), /* V6T2. */
11117 T(V6K), /* V6K. */
11118 T(V7), /* V7. */
11119 T(V6S_M), /* V6_M. */
11120 T(V6S_M) /* V6S_M. */
11121 };
9e3c6df6
PB		 11122 const int v7e_m[] =
11123 {
11124 -1, /* PRE_V4. */
11125 -1, /* V4. */
11126 T(V7E_M), /* V4T. */
11127 T(V7E_M), /* V5T. */
11128 T(V7E_M), /* V5TE. */
11129 T(V7E_M), /* V5TEJ. */
11130 T(V7E_M), /* V6. */
11131 T(V7E_M), /* V6KZ. */
11132 T(V7E_M), /* V6T2. */
11133 T(V7E_M), /* V6K. */
11134 T(V7E_M), /* V7. */
11135 T(V7E_M), /* V6_M. */
11136 T(V7E_M), /* V6S_M. */
11137 T(V7E_M) /* V7E_M. */
11138 };
91e22acd
AS		 11139 const int v4t_plus_v6_m[] =
11140 {
11141 -1, /* PRE_V4. */
11142 -1, /* V4. */
11143 T(V4T), /* V4T. */
11144 T(V5T), /* V5T. */
11145 T(V5TE), /* V5TE. */
11146 T(V5TEJ), /* V5TEJ. */
11147 T(V6), /* V6. */
11148 T(V6KZ), /* V6KZ. */
11149 T(V6T2), /* V6T2. */
11150 T(V6K), /* V6K. */
11151 T(V7), /* V7. */
11152 T(V6_M), /* V6_M. */
11153 T(V6S_M), /* V6S_M. */
9e3c6df6 11154 T(V7E_M), /* V7E_M. */
91e22acd
AS		 11155 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11156 };
11157 const int *comb[] =
11158 {
11159 v6t2,
11160 v6k,
11161 v7,
11162 v6_m,
11163 v6s_m,
9e3c6df6 11164 v7e_m,
91e22acd
AS		 11165 /* Pseudo-architecture. */
11166 v4t_plus_v6_m
11167 };
11168
11169 /* Check we've not got a higher architecture than we know about. */
11170
9e3c6df6 11171 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11172 {
3895f852 11173 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11174 return -1;
11175 }
11176
11177 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11178
11179 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11180 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11181 oldtag = T(V4T_PLUS_V6_M);
11182
11183 /* And override the new tag if we have a Tag_also_compatible_with on the
11184 input. */
11185
11186 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11187 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11188 newtag = T(V4T_PLUS_V6_M);
11189
11190 tagl = (oldtag < newtag) ? oldtag : newtag;
11191 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11192
11193 /* Architectures before V6KZ add features monotonically. */
11194 if (tagh <= TAG_CPU_ARCH_V6KZ)
11195 return result;
11196
11197 result = comb[tagh - T(V6T2)][tagl];
11198
11199 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11200 as the canonical version. */
11201 if (result == T(V4T_PLUS_V6_M))
11202 {
11203 result = T(V4T);
11204 *secondary_compat_out = T(V6_M);
11205 }
11206 else
11207 *secondary_compat_out = -1;
11208
11209 if (result == -1)
11210 {
3895f852 11211 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11212 ibfd, oldtag, newtag);
11213 return -1;
11214 }
11215
11216 return result;
11217#undef T
8e79c3df
CM		 11218}
11219
ee065d83
PB		 11220/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11221 are conflicting attributes. */
906e58ca 11222
ee065d83
PB		 11223static bfd_boolean
11224elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11225{
104d59d1
JM		 11226 obj_attribute *in_attr;
11227 obj_attribute *out_attr;
ee065d83
PB		 11228 /* Some tags have 0 = don't care, 1 = strong requirement,
11229 2 = weak requirement. */
91e22acd 11230 static const int order_021[3] = {0, 2, 1};
ee065d83 11231 int i;
91e22acd 11232 bfd_boolean result = TRUE;
ee065d83 11233
3e6b1042
DJ		 11234 /* Skip the linker stubs file. This preserves previous behavior
11235 of accepting unknown attributes in the first input file - but
11236 is that a bug? */
11237 if (ibfd->flags & BFD_LINKER_CREATED)
11238 return TRUE;
11239
104d59d1 11240 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11241 {
11242 /* This is the first object. Copy the attributes. */
104d59d1 11243 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11244
cd21e546
MGD		 11245 out_attr = elf_known_obj_attributes_proc (obfd);
11246
004ae526
PB		 11247 /* Use the Tag_null value to indicate the attributes have been
11248 initialized. */
cd21e546 11249 out_attr[0].i = 1;
004ae526 11250
cd21e546
MGD		 11251 /* We do not output objects with Tag_MPextension_use_legacy - we move
11252 the attribute's value to Tag_MPextension_use. */
11253 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11254 {
11255 if (out_attr[Tag_MPextension_use].i != 0
11256 && out_attr[Tag_MPextension_use_legacy].i
11257 != out_attr[Tag_MPextension_use].i)
11258 {
11259 _bfd_error_handler
11260 (_("Error: %B has both the current and legacy "
11261 "Tag_MPextension_use attributes"), ibfd);
11262 result = FALSE;
11263 }
11264
11265 out_attr[Tag_MPextension_use] =
11266 out_attr[Tag_MPextension_use_legacy];
11267 out_attr[Tag_MPextension_use_legacy].type = 0;
11268 out_attr[Tag_MPextension_use_legacy].i = 0;
11269 }
11270
11271 return result;
ee065d83
PB		 11272 }
11273
104d59d1
JM		 11274 in_attr = elf_known_obj_attributes_proc (ibfd);
11275 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11276 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11277 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11278 {
8e79c3df 11279 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11280 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11281 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11282 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11283 {
11284 _bfd_error_handler
3895f852 11285 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11286 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11287 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11288 result = FALSE;
ee065d83
PB		 11289 }
11290 }
11291
3de4a297 11292 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11293 {
11294 /* Merge this attribute with existing attributes. */
11295 switch (i)
11296 {
11297 case Tag_CPU_raw_name:
11298 case Tag_CPU_name:
91e22acd 11299 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11300 break;
11301
11302 case Tag_ABI_optimization_goals:
11303 case Tag_ABI_FP_optimization_goals:
11304 /* Use the first value seen. */
11305 break;
11306
11307 case Tag_CPU_arch:
91e22acd
AS		 11308 {
11309 int secondary_compat = -1, secondary_compat_out = -1;
11310 unsigned int saved_out_attr = out_attr[i].i;
11311 static const char *name_table[] = {
11312 /* These aren't real CPU names, but we can't guess
11313 that from the architecture version alone. */
11314 "Pre v4",
11315 "ARM v4",
11316 "ARM v4T",
11317 "ARM v5T",
11318 "ARM v5TE",
11319 "ARM v5TEJ",
11320 "ARM v6",
11321 "ARM v6KZ",
11322 "ARM v6T2",
11323 "ARM v6K",
11324 "ARM v7",
11325 "ARM v6-M",
11326 "ARM v6S-M"
11327 };
11328
11329 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11330 secondary_compat = get_secondary_compatible_arch (ibfd);
11331 secondary_compat_out = get_secondary_compatible_arch (obfd);
11332 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11333 &secondary_compat_out,
11334 in_attr[i].i,
11335 secondary_compat);
11336 set_secondary_compatible_arch (obfd, secondary_compat_out);
11337
11338 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11339 if (out_attr[i].i == saved_out_attr)
11340 ; /* Leave the names alone. */
11341 else if (out_attr[i].i == in_attr[i].i)
11342 {
11343 /* The output architecture has been changed to match the
11344 input architecture. Use the input names. */
11345 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11346 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11347 : NULL;
11348 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11349 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11350 : NULL;
11351 }
11352 else
11353 {
11354 out_attr[Tag_CPU_name].s = NULL;
11355 out_attr[Tag_CPU_raw_name].s = NULL;
11356 }
11357
11358 /* If we still don't have a value for Tag_CPU_name,
11359 make one up now. Tag_CPU_raw_name remains blank. */
11360 if (out_attr[Tag_CPU_name].s == NULL
11361 && out_attr[i].i < ARRAY_SIZE (name_table))
11362 out_attr[Tag_CPU_name].s =
11363 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11364 }
11365 break;
11366
ee065d83
PB		 11367 case Tag_ARM_ISA_use:
11368 case Tag_THUMB_ISA_use:
ee065d83 11369 case Tag_WMMX_arch:
91e22acd
AS		 11370 case Tag_Advanced_SIMD_arch:
11371 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11372 case Tag_ABI_FP_rounding:
ee065d83
PB		 11373 case Tag_ABI_FP_exceptions:
11374 case Tag_ABI_FP_user_exceptions:
11375 case Tag_ABI_FP_number_model:
75375b3e 11376 case Tag_FP_HP_extension:
91e22acd
AS		 11377 case Tag_CPU_unaligned_access:
11378 case Tag_T2EE_use:
91e22acd 11379 case Tag_MPextension_use:
ee065d83
PB		 11380 /* Use the largest value specified. */
11381 if (in_attr[i].i > out_attr[i].i)
11382 out_attr[i].i = in_attr[i].i;
11383 break;
11384
75375b3e 11385 case Tag_ABI_align_preserved:
91e22acd
AS		 11386 case Tag_ABI_PCS_RO_data:
11387 /* Use the smallest value specified. */
11388 if (in_attr[i].i < out_attr[i].i)
11389 out_attr[i].i = in_attr[i].i;
11390 break;
11391
75375b3e 11392 case Tag_ABI_align_needed:
91e22acd 11393 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11394 && (in_attr[Tag_ABI_align_preserved].i == 0
11395 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11396 {
91e22acd
AS		 11397 /* This error message should be enabled once all non-conformant
11398 binaries in the toolchain have had the attributes set
11399 properly.
ee065d83 11400 _bfd_error_handler
3895f852 11401 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11402 obfd, ibfd);
11403 result = FALSE; */
ee065d83 11404 }
91e22acd
AS		 11405 /* Fall through. */
11406 case Tag_ABI_FP_denormal:
11407 case Tag_ABI_PCS_GOT_use:
11408 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11409 value if greater than 2 (for future-proofing). */
11410 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11411 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11412 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11413 out_attr[i].i = in_attr[i].i;
11414 break;
91e22acd 11415
75375b3e
MGD		 11416 case Tag_Virtualization_use:
11417 /* The virtualization tag effectively stores two bits of
11418 information: the intended use of TrustZone (in bit 0), and the
11419 intended use of Virtualization (in bit 1). */
11420 if (out_attr[i].i == 0)
11421 out_attr[i].i = in_attr[i].i;
11422 else if (in_attr[i].i != 0
11423 && in_attr[i].i != out_attr[i].i)
11424 {
11425 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11426 out_attr[i].i = 3;
11427 else
11428 {
11429 _bfd_error_handler
11430 (_("error: %B: unable to merge virtualization attributes "
11431 "with %B"),
11432 obfd, ibfd);
11433 result = FALSE;
11434 }
11435 }
11436 break;
91e22acd
AS		 11437
11438 case Tag_CPU_arch_profile:
11439 if (out_attr[i].i != in_attr[i].i)
11440 {
11441 /* 0 will merge with anything.
11442 'A' and 'S' merge to 'A'.
11443 'R' and 'S' merge to 'R'.
11444 'M' and 'A|R|S' is an error. */
11445 if (out_attr[i].i == 0
11446 || (out_attr[i].i == 'S'
11447 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11448 out_attr[i].i = in_attr[i].i;
11449 else if (in_attr[i].i == 0
11450 || (in_attr[i].i == 'S'
11451 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11452 ; /* Do nothing. */
11453 else
11454 {
11455 _bfd_error_handler
3895f852 11456 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11457 ibfd,
11458 in_attr[i].i ? in_attr[i].i : '0',
11459 out_attr[i].i ? out_attr[i].i : '0');
11460 result = FALSE;
11461 }
11462 }
11463 break;
75375b3e 11464 case Tag_FP_arch:
62f3b8c8 11465 {
4547cb56
NC		 11466 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11467 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11468 when it's 0. It might mean absence of FP hardware if
11469 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11470
62f3b8c8
PB		 11471 static const struct
11472 {
11473 int ver;
11474 int regs;
11475 } vfp_versions[7] =
11476 {
11477 {0, 0},
11478 {1, 16},
11479 {2, 16},
11480 {3, 32},
11481 {3, 16},
11482 {4, 32},
11483 {4, 16}
11484 };
11485 int ver;
11486 int regs;
11487 int newval;
11488
4547cb56
NC		 11489 /* If the output has no requirement about FP hardware,
11490 follow the requirement of the input. */
11491 if (out_attr[i].i == 0)
11492 {
11493 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11494 out_attr[i].i = in_attr[i].i;
11495 out_attr[Tag_ABI_HardFP_use].i
11496 = in_attr[Tag_ABI_HardFP_use].i;
11497 break;
11498 }
11499 /* If the input has no requirement about FP hardware, do
11500 nothing. */
11501 else if (in_attr[i].i == 0)
11502 {
11503 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11504 break;
11505 }
11506
11507 /* Both the input and the output have nonzero Tag_FP_arch.
11508 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11509
11510 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11511 do nothing. */
11512 if (in_attr[Tag_ABI_HardFP_use].i == 0
11513 && out_attr[Tag_ABI_HardFP_use].i == 0)
11514 ;
11515 /* If the input and the output have different Tag_ABI_HardFP_use,
11516 the combination of them is 3 (SP & DP). */
11517 else if (in_attr[Tag_ABI_HardFP_use].i
11518 != out_attr[Tag_ABI_HardFP_use].i)
11519 out_attr[Tag_ABI_HardFP_use].i = 3;
11520
11521 /* Now we can handle Tag_FP_arch. */
11522
62f3b8c8
PB		 11523 /* Values greater than 6 aren't defined, so just pick the
11524 biggest */
11525 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
11526 {
11527 out_attr[i] = in_attr[i];
11528 break;
11529 }
11530 /* The output uses the superset of input features
11531 (ISA version) and registers. */
11532 ver = vfp_versions[in_attr[i].i].ver;
11533 if (ver < vfp_versions[out_attr[i].i].ver)
11534 ver = vfp_versions[out_attr[i].i].ver;
11535 regs = vfp_versions[in_attr[i].i].regs;
11536 if (regs < vfp_versions[out_attr[i].i].regs)
11537 regs = vfp_versions[out_attr[i].i].regs;
11538 /* This assumes all possible supersets are also a valid
11539 options. */
11540 for (newval = 6; newval > 0; newval--)
11541 {
11542 if (regs == vfp_versions[newval].regs
11543 && ver == vfp_versions[newval].ver)
11544 break;
11545 }
11546 out_attr[i].i = newval;
11547 }
b1cc4aeb 11548 break;
ee065d83
PB		 11549 case Tag_PCS_config:
11550 if (out_attr[i].i == 0)
11551 out_attr[i].i = in_attr[i].i;
11552 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
11553 {
11554 /* It's sometimes ok to mix different configs, so this is only
11555 a warning. */
11556 _bfd_error_handler
11557 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11558 }
11559 break;
11560 case Tag_ABI_PCS_R9_use:
004ae526
PB		 11561 if (in_attr[i].i != out_attr[i].i
11562 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 11563 && in_attr[i].i != AEABI_R9_unused)
11564 {
11565 _bfd_error_handler
3895f852 11566 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 11567 result = FALSE;
ee065d83
PB		 11568 }
11569 if (out_attr[i].i == AEABI_R9_unused)
11570 out_attr[i].i = in_attr[i].i;
11571 break;
11572 case Tag_ABI_PCS_RW_data:
11573 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11574 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11575 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11576 {
11577 _bfd_error_handler
3895f852 11578 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 11579 ibfd);
91e22acd 11580 result = FALSE;
ee065d83
PB		 11581 }
11582 /* Use the smallest value specified. */
11583 if (in_attr[i].i < out_attr[i].i)
11584 out_attr[i].i = in_attr[i].i;
11585 break;
ee065d83 11586 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 11587 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11588 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 11589 {
11590 _bfd_error_handler
a9dc9481
JM		 11591 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11592 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 11593 }
a9dc9481 11594 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 11595 out_attr[i].i = in_attr[i].i;
11596 break;
ee065d83
PB		 11597 case Tag_ABI_enum_size:
11598 if (in_attr[i].i != AEABI_enum_unused)
11599 {
11600 if (out_attr[i].i == AEABI_enum_unused
11601 || out_attr[i].i == AEABI_enum_forced_wide)
11602 {
11603 /* The existing object is compatible with anything.
11604 Use whatever requirements the new object has. */
11605 out_attr[i].i = in_attr[i].i;
11606 }
11607 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 11608 && out_attr[i].i != in_attr[i].i
0ffa91dd 11609 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 11610 {
91e22acd 11611 static const char *aeabi_enum_names[] =
bf21ed78 11612 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 11613 const char *in_name =
11614 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11615 ? aeabi_enum_names[in_attr[i].i]
11616 : "<unknown>";
11617 const char *out_name =
11618 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11619 ? aeabi_enum_names[out_attr[i].i]
11620 : "<unknown>";
ee065d83 11621 _bfd_error_handler
bf21ed78 11622 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 11623 ibfd, in_name, out_name);
ee065d83
PB		 11624 }
11625 }
11626 break;
11627 case Tag_ABI_VFP_args:
11628 /* Aready done. */
11629 break;
11630 case Tag_ABI_WMMX_args:
11631 if (in_attr[i].i != out_attr[i].i)
11632 {
11633 _bfd_error_handler
3895f852 11634 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 11635 ibfd, obfd);
91e22acd 11636 result = FALSE;
ee065d83
PB		 11637 }
11638 break;
7b86a9fa
AS		 11639 case Tag_compatibility:
11640 /* Merged in target-independent code. */
11641 break;
91e22acd 11642 case Tag_ABI_HardFP_use:
4547cb56 11643 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 11644 break;
11645 case Tag_ABI_FP_16bit_format:
11646 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11647 {
11648 if (in_attr[i].i != out_attr[i].i)
11649 {
11650 _bfd_error_handler
3895f852 11651 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 11652 ibfd, obfd);
11653 result = FALSE;
11654 }
11655 }
11656 if (in_attr[i].i != 0)
11657 out_attr[i].i = in_attr[i].i;
11658 break;
7b86a9fa 11659
cd21e546
MGD		 11660 case Tag_DIV_use:
11661 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
11662 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
11663 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
11664 CPU. We will merge as follows: If the input attribute's value
11665 is one then the output attribute's value remains unchanged. If
11666 the input attribute's value is zero or two then if the output
11667 attribute's value is one the output value is set to the input
11668 value, otherwise the output value must be the same as the
11669 inputs. */
11670 if (in_attr[i].i != 1 && out_attr[i].i != 1)
11671 {
11672 if (in_attr[i].i != out_attr[i].i)
11673 {
11674 _bfd_error_handler
11675 (_("DIV usage mismatch between %B and %B"),
11676 ibfd, obfd);
11677 result = FALSE;
11678 }
11679 }
11680
11681 if (in_attr[i].i != 1)
11682 out_attr[i].i = in_attr[i].i;
11683
11684 break;
11685
11686 case Tag_MPextension_use_legacy:
11687 /* We don't output objects with Tag_MPextension_use_legacy - we
11688 move the value to Tag_MPextension_use. */
11689 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11690 {
11691 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11692 {
11693 _bfd_error_handler
11694 (_("%B has has both the current and legacy "
11695 "Tag_MPextension_use attributes"),
11696 ibfd);
11697 result = FALSE;
11698 }
11699 }
11700
11701 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11702 out_attr[Tag_MPextension_use] = in_attr[i];
11703
11704 break;
11705
91e22acd 11706 case Tag_nodefaults:
2d0bb761
AS		 11707 /* This tag is set if it exists, but the value is unused (and is
11708 typically zero). We don't actually need to do anything here -
11709 the merge happens automatically when the type flags are merged
11710 below. */
91e22acd
AS		 11711 break;
11712 case Tag_also_compatible_with:
11713 /* Already done in Tag_CPU_arch. */
11714 break;
11715 case Tag_conformance:
11716 /* Keep the attribute if it matches. Throw it away otherwise.
11717 No attribute means no claim to conform. */
11718 if (!in_attr[i].s || !out_attr[i].s
11719 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11720 out_attr[i].s = NULL;
11721 break;
3cfad14c 11722
91e22acd 11723 default:
e8b36cd1
JM		 11724 result
11725 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 11726 }
11727
11728 /* If out_attr was copied from in_attr then it won't have a type yet. */
11729 if (in_attr[i].type && !out_attr[i].type)
11730 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 11731 }
11732
104d59d1 11733 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 11734 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11735 return FALSE;
ee065d83 11736
104d59d1 11737 /* Check for any attributes not known on ARM. */
e8b36cd1 11738 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 11739
91e22acd 11740 return result;
252b5132
RH		 11741}
11742
3a4a14e9
PB		 11743
11744/* Return TRUE if the two EABI versions are incompatible. */
11745
11746static bfd_boolean
11747elf32_arm_versions_compatible (unsigned iver, unsigned over)
11748{
11749 /* v4 and v5 are the same spec before and after it was released,
11750 so allow mixing them. */
11751 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11752 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11753 return TRUE;
11754
11755 return (iver == over);
11756}
11757
252b5132
RH		 11758/* Merge backend specific data from an object file to the output
11759 object file when linking. */
9b485d32 11760
b34976b6 11761static bfd_boolean
21d799b5 11762elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 11763
9b485d32
NC		 11764/* Display the flags field. */
11765
b34976b6 11766static bfd_boolean
57e8b36a 11767elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 11768{
fc830a83
NC		 11769 FILE * file = (FILE *) ptr;
11770 unsigned long flags;
252b5132
RH		 11771
11772 BFD_ASSERT (abfd != NULL && ptr != NULL);
11773
11774 /* Print normal ELF private data. */
11775 _bfd_elf_print_private_bfd_data (abfd, ptr);
11776
fc830a83 11777 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 11778 /* Ignore init flag - it may not be set, despite the flags field
11779 containing valid data. */
252b5132
RH		 11780
11781 /* xgettext:c-format */
9b485d32 11782 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 11783
fc830a83
NC		 11784 switch (EF_ARM_EABI_VERSION (flags))
11785 {
11786 case EF_ARM_EABI_UNKNOWN:
4cc11e76 11787 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 11788 official ARM ELF extended ABI. Hence they are only decoded if
11789 the EABI version is not set. */
fd2ec330 11790 if (flags & EF_ARM_INTERWORK)
9b485d32 11791 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 11792
fd2ec330 11793 if (flags & EF_ARM_APCS_26)
6c571f00 11794 fprintf (file, " [APCS-26]");
fc830a83 11795 else
6c571f00 11796 fprintf (file, " [APCS-32]");
9a5aca8c 11797
96a846ea
RE		 11798 if (flags & EF_ARM_VFP_FLOAT)
11799 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 11800 else if (flags & EF_ARM_MAVERICK_FLOAT)
11801 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 11802 else
11803 fprintf (file, _(" [FPA float format]"));
11804
fd2ec330 11805 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 11806 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 11807
fd2ec330 11808 if (flags & EF_ARM_PIC)
9b485d32 11809 fprintf (file, _(" [position independent]"));
fc830a83 11810
fd2ec330 11811 if (flags & EF_ARM_NEW_ABI)
9b485d32 11812 fprintf (file, _(" [new ABI]"));
9a5aca8c 11813
fd2ec330 11814 if (flags & EF_ARM_OLD_ABI)
9b485d32 11815 fprintf (file, _(" [old ABI]"));
9a5aca8c 11816
fd2ec330 11817 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 11818 fprintf (file, _(" [software FP]"));
9a5aca8c 11819
96a846ea
RE		 11820 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
11821 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 11822 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
11823 | EF_ARM_MAVERICK_FLOAT);
fc830a83 11824 break;
9a5aca8c 11825
fc830a83 11826 case EF_ARM_EABI_VER1:
9b485d32 11827 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 11828
fc830a83 11829 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 11830 fprintf (file, _(" [sorted symbol table]"));
fc830a83 11831 else
9b485d32 11832 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 11833
fc830a83
NC		 11834 flags &= ~ EF_ARM_SYMSARESORTED;
11835 break;
9a5aca8c 11836
fd2ec330
PB		 11837 case EF_ARM_EABI_VER2:
11838 fprintf (file, _(" [Version2 EABI]"));
11839
11840 if (flags & EF_ARM_SYMSARESORTED)
11841 fprintf (file, _(" [sorted symbol table]"));
11842 else
11843 fprintf (file, _(" [unsorted symbol table]"));
11844
11845 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
11846 fprintf (file, _(" [dynamic symbols use segment index]"));
11847
11848 if (flags & EF_ARM_MAPSYMSFIRST)
11849 fprintf (file, _(" [mapping symbols precede others]"));
11850
99e4ae17 11851 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 11852 | EF_ARM_MAPSYMSFIRST);
11853 break;
11854
d507cf36
PB		 11855 case EF_ARM_EABI_VER3:
11856 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 11857 break;
11858
11859 case EF_ARM_EABI_VER4:
11860 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 11861 goto eabi;
d507cf36 11862
3a4a14e9
PB		 11863 case EF_ARM_EABI_VER5:
11864 fprintf (file, _(" [Version5 EABI]"));
11865 eabi:
d507cf36
PB		 11866 if (flags & EF_ARM_BE8)
11867 fprintf (file, _(" [BE8]"));
11868
11869 if (flags & EF_ARM_LE8)
11870 fprintf (file, _(" [LE8]"));
11871
11872 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
11873 break;
11874
fc830a83 11875 default:
9b485d32 11876 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 11877 break;
11878 }
252b5132 11879
fc830a83 11880 flags &= ~ EF_ARM_EABIMASK;
252b5132 11881
fc830a83 11882 if (flags & EF_ARM_RELEXEC)
9b485d32 11883 fprintf (file, _(" [relocatable executable]"));
252b5132 11884
fc830a83 11885 if (flags & EF_ARM_HASENTRY)
9b485d32 11886 fprintf (file, _(" [has entry point]"));
252b5132 11887
fc830a83
NC		 11888 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
11889
11890 if (flags)
9b485d32 11891 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 11892
252b5132
RH		 11893 fputc ('\n', file);
11894
b34976b6 11895 return TRUE;
252b5132
RH		 11896}
11897
11898static int
57e8b36a 11899elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 11900{
2f0ca46a
NC		 11901 switch (ELF_ST_TYPE (elf_sym->st_info))
11902 {
11903 case STT_ARM_TFUNC:
11904 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 11905
2f0ca46a
NC		 11906 case STT_ARM_16BIT:
11907 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
11908 This allows us to distinguish between data used by Thumb instructions
11909 and non-data (which is probably code) inside Thumb regions of an
11910 executable. */
1a0eb693 11911 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 11912 return ELF_ST_TYPE (elf_sym->st_info);
11913 break;
9a5aca8c 11914
ce855c42
NC		 11915 default:
11916 break;
2f0ca46a
NC		 11917 }
11918
11919 return type;
252b5132 11920}
f21f3fe0 11921
252b5132 11922static asection *
07adf181
AM		 11923elf32_arm_gc_mark_hook (asection *sec,
11924 struct bfd_link_info *info,
11925 Elf_Internal_Rela *rel,
11926 struct elf_link_hash_entry *h,
11927 Elf_Internal_Sym *sym)
252b5132
RH		 11928{
11929 if (h != NULL)
07adf181 11930 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 11931 {
11932 case R_ARM_GNU_VTINHERIT:
11933 case R_ARM_GNU_VTENTRY:
07adf181
AM		 11934 return NULL;
11935 }
9ad5cbcf 11936
07adf181 11937 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 11938}
11939
780a67af
NC		 11940/* Update the got entry reference counts for the section being removed. */
11941
b34976b6 11942static bfd_boolean
ba93b8ac
DJ		 11943elf32_arm_gc_sweep_hook (bfd * abfd,
11944 struct bfd_link_info * info,
11945 asection * sec,
11946 const Elf_Internal_Rela * relocs)
252b5132 11947{
5e681ec4
PB		 11948 Elf_Internal_Shdr *symtab_hdr;
11949 struct elf_link_hash_entry **sym_hashes;
11950 bfd_signed_vma *local_got_refcounts;
11951 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 11952 struct elf32_arm_link_hash_table * globals;
11953
7dda2462
TG		 11954 if (info->relocatable)
11955 return TRUE;
11956
eb043451 11957 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11958 if (globals == NULL)
11959 return FALSE;
5e681ec4
PB		 11960
11961 elf_section_data (sec)->local_dynrel = NULL;
11962
0ffa91dd 11963 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 11964 sym_hashes = elf_sym_hashes (abfd);
11965 local_got_refcounts = elf_local_got_refcounts (abfd);
11966
906e58ca 11967 check_use_blx (globals);
bd97cb95 11968
5e681ec4
PB		 11969 relend = relocs + sec->reloc_count;
11970 for (rel = relocs; rel < relend; rel++)
eb043451 11971 {
3eb128b2
AM		 11972 unsigned long r_symndx;
11973 struct elf_link_hash_entry *h = NULL;
f6e32f6d 11974 struct elf32_arm_link_hash_entry *eh;
eb043451 11975 int r_type;
34e77a92 11976 bfd_boolean call_reloc_p;
f6e32f6d
RS		 11977 bfd_boolean may_become_dynamic_p;
11978 bfd_boolean may_need_local_target_p;
34e77a92
RS		 11979 union gotplt_union *root_plt;
11980 struct arm_plt_info *arm_plt;
5e681ec4 11981
3eb128b2
AM		 11982 r_symndx = ELF32_R_SYM (rel->r_info);
11983 if (r_symndx >= symtab_hdr->sh_info)
11984 {
11985 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11986 while (h->root.type == bfd_link_hash_indirect
11987 || h->root.type == bfd_link_hash_warning)
11988 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11989 }
f6e32f6d
RS		 11990 eh = (struct elf32_arm_link_hash_entry *) h;
11991
34e77a92 11992 call_reloc_p = FALSE;
f6e32f6d
RS		 11993 may_become_dynamic_p = FALSE;
11994 may_need_local_target_p = FALSE;
3eb128b2 11995
eb043451 11996 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 11997 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 11998 switch (r_type)
11999 {
12000 case R_ARM_GOT32:
eb043451 12001 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12002 case R_ARM_TLS_GD32:
12003 case R_ARM_TLS_IE32:
3eb128b2 12004 if (h != NULL)
eb043451 12005 {
eb043451
PB		 12006 if (h->got.refcount > 0)
12007 h->got.refcount -= 1;
12008 }
12009 else if (local_got_refcounts != NULL)
12010 {
12011 if (local_got_refcounts[r_symndx] > 0)
12012 local_got_refcounts[r_symndx] -= 1;
12013 }
12014 break;
12015
ba93b8ac 12016 case R_ARM_TLS_LDM32:
4dfe6ac6 12017 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12018 break;
12019
eb043451
PB		 12020 case R_ARM_PC24:
12021 case R_ARM_PLT32:
5b5bb741
PB		 12022 case R_ARM_CALL:
12023 case R_ARM_JUMP24:
eb043451 12024 case R_ARM_PREL31:
c19d1205 12025 case R_ARM_THM_CALL:
bd97cb95
DJ		 12026 case R_ARM_THM_JUMP24:
12027 case R_ARM_THM_JUMP19:
34e77a92 12028 call_reloc_p = TRUE;
f6e32f6d
RS		 12029 may_need_local_target_p = TRUE;
12030 break;
12031
12032 case R_ARM_ABS12:
12033 if (!globals->vxworks_p)
12034 {
12035 may_need_local_target_p = TRUE;
12036 break;
12037 }
12038 /* Fall through. */
12039 case R_ARM_ABS32:
12040 case R_ARM_ABS32_NOI:
12041 case R_ARM_REL32:
12042 case R_ARM_REL32_NOI:
b6895b4f
PB		 12043 case R_ARM_MOVW_ABS_NC:
12044 case R_ARM_MOVT_ABS:
12045 case R_ARM_MOVW_PREL_NC:
12046 case R_ARM_MOVT_PREL:
12047 case R_ARM_THM_MOVW_ABS_NC:
12048 case R_ARM_THM_MOVT_ABS:
12049 case R_ARM_THM_MOVW_PREL_NC:
12050 case R_ARM_THM_MOVT_PREL:
b7693d02 12051 /* Should the interworking branches be here also? */
f6e32f6d 12052 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12053 && (sec->flags & SEC_ALLOC) != 0)
12054 {
12055 if (h == NULL
12056 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12057 {
12058 call_reloc_p = TRUE;
12059 may_need_local_target_p = TRUE;
12060 }
12061 else
12062 may_become_dynamic_p = TRUE;
12063 }
f6e32f6d
RS		 12064 else
12065 may_need_local_target_p = TRUE;
12066 break;
b7693d02 12067
f6e32f6d
RS		 12068 default:
12069 break;
12070 }
5e681ec4 12071
34e77a92
RS		 12072 if (may_need_local_target_p
12073 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12074 {
34e77a92
RS		 12075 BFD_ASSERT (root_plt->refcount > 0);
12076 root_plt->refcount -= 1;
12077
12078 if (!call_reloc_p)
12079 arm_plt->noncall_refcount--;
5e681ec4 12080
f6e32f6d 12081 if (r_type == R_ARM_THM_CALL)
34e77a92 12082 arm_plt->maybe_thumb_refcount--;
bd97cb95 12083
f6e32f6d
RS		 12084 if (r_type == R_ARM_THM_JUMP24
12085 || r_type == R_ARM_THM_JUMP19)
34e77a92 12086 arm_plt->thumb_refcount--;
f6e32f6d 12087 }
5e681ec4 12088
34e77a92 12089 if (may_become_dynamic_p)
f6e32f6d
RS		 12090 {
12091 struct elf_dyn_relocs **pp;
12092 struct elf_dyn_relocs *p;
5e681ec4 12093
34e77a92 12094 if (h != NULL)
9c489990 12095 pp = &(eh->dyn_relocs);
34e77a92
RS		 12096 else
12097 {
12098 Elf_Internal_Sym *isym;
12099
12100 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12101 abfd, r_symndx);
12102 if (isym == NULL)
12103 return FALSE;
12104 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12105 if (pp == NULL)
12106 return FALSE;
12107 }
9c489990 12108 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12109 if (p->sec == sec)
12110 {
12111 /* Everything must go for SEC. */
12112 *pp = p->next;
12113 break;
12114 }
eb043451
PB		 12115 }
12116 }
5e681ec4 12117
b34976b6 12118 return TRUE;
252b5132
RH		 12119}
12120
780a67af
NC		 12121/* Look through the relocs for a section during the first phase. */
12122
b34976b6 12123static bfd_boolean
57e8b36a
NC		 12124elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12125 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12126{
b34976b6
AM		 12127 Elf_Internal_Shdr *symtab_hdr;
12128 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12129 const Elf_Internal_Rela *rel;
12130 const Elf_Internal_Rela *rel_end;
12131 bfd *dynobj;
5e681ec4 12132 asection *sreloc;
5e681ec4 12133 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12134 bfd_boolean call_reloc_p;
12135 bfd_boolean may_become_dynamic_p;
12136 bfd_boolean may_need_local_target_p;
ce98a316 12137 unsigned long nsyms;
9a5aca8c 12138
1049f94e 12139 if (info->relocatable)
b34976b6 12140 return TRUE;
9a5aca8c 12141
0ffa91dd
NC		 12142 BFD_ASSERT (is_arm_elf (abfd));
12143
5e681ec4 12144 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12145 if (htab == NULL)
12146 return FALSE;
12147
5e681ec4 12148 sreloc = NULL;
9a5aca8c 12149
67687978
PB		 12150 /* Create dynamic sections for relocatable executables so that we can
12151 copy relocations. */
12152 if (htab->root.is_relocatable_executable
12153 && ! htab->root.dynamic_sections_created)
12154 {
12155 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12156 return FALSE;
12157 }
12158
cbc704f3
RS		 12159 if (htab->root.dynobj == NULL)
12160 htab->root.dynobj = abfd;
34e77a92
RS		 12161 if (!create_ifunc_sections (info))
12162 return FALSE;
cbc704f3
RS		 12163
12164 dynobj = htab->root.dynobj;
12165
0ffa91dd 12166 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12167 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 12168 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12169
252b5132
RH		 12170 rel_end = relocs + sec->reloc_count;
12171 for (rel = relocs; rel < rel_end; rel++)
12172 {
34e77a92 12173 Elf_Internal_Sym *isym;
252b5132 12174 struct elf_link_hash_entry *h;
b7693d02 12175 struct elf32_arm_link_hash_entry *eh;
252b5132 12176 unsigned long r_symndx;
eb043451 12177 int r_type;
9a5aca8c 12178
252b5132 12179 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12180 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12181 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12182
ce98a316
NC		 12183 if (r_symndx >= nsyms
12184 /* PR 9934: It is possible to have relocations that do not
12185 refer to symbols, thus it is also possible to have an
12186 object file containing relocations but no symbol table. */
cf35638d 12187 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12188 {
12189 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12190 r_symndx);
ba93b8ac
DJ		 12191 return FALSE;
12192 }
12193
34e77a92
RS		 12194 h = NULL;
12195 isym = NULL;
12196 if (nsyms > 0)
973a3492 12197 {
34e77a92
RS		 12198 if (r_symndx < symtab_hdr->sh_info)
12199 {
12200 /* A local symbol. */
12201 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12202 abfd, r_symndx);
12203 if (isym == NULL)
12204 return FALSE;
12205 }
12206 else
12207 {
12208 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12209 while (h->root.type == bfd_link_hash_indirect
12210 || h->root.type == bfd_link_hash_warning)
12211 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12212 }
973a3492 12213 }
9a5aca8c 12214
b7693d02
DJ		 12215 eh = (struct elf32_arm_link_hash_entry *) h;
12216
f6e32f6d
RS		 12217 call_reloc_p = FALSE;
12218 may_become_dynamic_p = FALSE;
12219 may_need_local_target_p = FALSE;
12220
0855e32b
NS		 12221 /* Could be done earlier, if h were already available. */
12222 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12223 switch (r_type)
252b5132 12224 {
5e681ec4 12225 case R_ARM_GOT32:
eb043451 12226 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12227 case R_ARM_TLS_GD32:
12228 case R_ARM_TLS_IE32:
0855e32b
NS		 12229 case R_ARM_TLS_GOTDESC:
12230 case R_ARM_TLS_DESCSEQ:
12231 case R_ARM_THM_TLS_DESCSEQ:
12232 case R_ARM_TLS_CALL:
12233 case R_ARM_THM_TLS_CALL:
5e681ec4 12234 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12235 {
12236 int tls_type, old_tls_type;
5e681ec4 12237
ba93b8ac
DJ		 12238 switch (r_type)
12239 {
12240 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
0855e32b 12241
ba93b8ac 12242 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
0855e32b
NS		 12243
12244 case R_ARM_TLS_GOTDESC:
12245 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12246 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12247 tls_type = GOT_TLS_GDESC; break;
12248
ba93b8ac
DJ		 12249 default: tls_type = GOT_NORMAL; break;
12250 }
252b5132 12251
ba93b8ac
DJ		 12252 if (h != NULL)
12253 {
12254 h->got.refcount++;
12255 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12256 }
12257 else
12258 {
ba93b8ac 12259 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12260 if (!elf32_arm_allocate_local_sym_info (abfd))
12261 return FALSE;
12262 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12263 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12264 }
12265
0855e32b
NS		 12266 /* If a variable is accessed with both tls methods, two
12267 slots may be created. */
12268 if (GOT_TLS_GD_ANY_P (old_tls_type)
12269 && GOT_TLS_GD_ANY_P (tls_type))
12270 tls_type |= old_tls_type;
12271
12272 /* We will already have issued an error message if there
12273 is a TLS/non-TLS mismatch, based on the symbol
12274 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12275 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12276 && tls_type != GOT_NORMAL)
12277 tls_type |= old_tls_type;
12278
0855e32b
NS		 12279 /* If the symbol is accessed in both IE and GDESC
12280 method, we're able to relax. Turn off the GDESC flag,
12281 without messing up with any other kind of tls types
12282 that may be involved */
12283 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12284 tls_type &= ~GOT_TLS_GDESC;
12285
ba93b8ac
DJ		 12286 if (old_tls_type != tls_type)
12287 {
12288 if (h != NULL)
12289 elf32_arm_hash_entry (h)->tls_type = tls_type;
12290 else
12291 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12292 }
12293 }
8029a119 12294 /* Fall through. */
ba93b8ac
DJ		 12295
12296 case R_ARM_TLS_LDM32:
12297 if (r_type == R_ARM_TLS_LDM32)
12298 htab->tls_ldm_got.refcount++;
8029a119 12299 /* Fall through. */
252b5132 12300
c19d1205 12301 case R_ARM_GOTOFF32:
5e681ec4 12302 case R_ARM_GOTPC:
cbc704f3
RS		 12303 if (htab->root.sgot == NULL
12304 && !create_got_section (htab->root.dynobj, info))
12305 return FALSE;
252b5132
RH		 12306 break;
12307
252b5132 12308 case R_ARM_PC24:
7359ea65 12309 case R_ARM_PLT32:
5b5bb741
PB		 12310 case R_ARM_CALL:
12311 case R_ARM_JUMP24:
eb043451 12312 case R_ARM_PREL31:
c19d1205 12313 case R_ARM_THM_CALL:
bd97cb95
DJ		 12314 case R_ARM_THM_JUMP24:
12315 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12316 call_reloc_p = TRUE;
12317 may_need_local_target_p = TRUE;
12318 break;
12319
12320 case R_ARM_ABS12:
12321 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12322 ldr __GOTT_INDEX__ offsets. */
12323 if (!htab->vxworks_p)
12324 {
12325 may_need_local_target_p = TRUE;
12326 break;
12327 }
12328 /* Fall through. */
39623e12 12329
96c23d59
JM		 12330 case R_ARM_MOVW_ABS_NC:
12331 case R_ARM_MOVT_ABS:
12332 case R_ARM_THM_MOVW_ABS_NC:
12333 case R_ARM_THM_MOVT_ABS:
12334 if (info->shared)
12335 {
12336 (*_bfd_error_handler)
12337 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12338 abfd, elf32_arm_howto_table_1[r_type].name,
12339 (h) ? h->root.root.string : "a local symbol");
12340 bfd_set_error (bfd_error_bad_value);
12341 return FALSE;
12342 }
12343
12344 /* Fall through. */
39623e12
PB		 12345 case R_ARM_ABS32:
12346 case R_ARM_ABS32_NOI:
12347 case R_ARM_REL32:
12348 case R_ARM_REL32_NOI:
b6895b4f
PB		 12349 case R_ARM_MOVW_PREL_NC:
12350 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12351 case R_ARM_THM_MOVW_PREL_NC:
12352 case R_ARM_THM_MOVT_PREL:
39623e12 12353
b7693d02 12354 /* Should the interworking branches be listed here? */
67687978 12355 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12356 && (sec->flags & SEC_ALLOC) != 0)
12357 {
12358 if (h == NULL
12359 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12360 {
12361 /* In shared libraries and relocatable executables,
12362 we treat local relative references as calls;
12363 see the related SYMBOL_CALLS_LOCAL code in
12364 allocate_dynrelocs. */
12365 call_reloc_p = TRUE;
12366 may_need_local_target_p = TRUE;
12367 }
12368 else
12369 /* We are creating a shared library or relocatable
12370 executable, and this is a reloc against a global symbol,
12371 or a non-PC-relative reloc against a local symbol.
12372 We may need to copy the reloc into the output. */
12373 may_become_dynamic_p = TRUE;
12374 }
f6e32f6d
RS		 12375 else
12376 may_need_local_target_p = TRUE;
252b5132
RH		 12377 break;
12378
12379 /* This relocation describes the C++ object vtable hierarchy.
12380 Reconstruct it for later use during GC. */
12381 case R_ARM_GNU_VTINHERIT:
c152c796 12382 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 12383 return FALSE;
252b5132 12384 break;
9a5aca8c 12385
252b5132
RH		 12386 /* This relocation describes which C++ vtable entries are actually
12387 used. Record for later use during GC. */
12388 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 12389 BFD_ASSERT (h != NULL);
12390 if (h != NULL
12391 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 12392 return FALSE;
252b5132
RH		 12393 break;
12394 }
f6e32f6d
RS		 12395
12396 if (h != NULL)
12397 {
12398 if (call_reloc_p)
12399 /* We may need a .plt entry if the function this reloc
12400 refers to is in a different object, regardless of the
12401 symbol's type. We can't tell for sure yet, because
12402 something later might force the symbol local. */
12403 h->needs_plt = 1;
12404 else if (may_need_local_target_p)
12405 /* If this reloc is in a read-only section, we might
12406 need a copy reloc. We can't check reliably at this
12407 stage whether the section is read-only, as input
12408 sections have not yet been mapped to output sections.
12409 Tentatively set the flag for now, and correct in
12410 adjust_dynamic_symbol. */
12411 h->non_got_ref = 1;
12412 }
12413
34e77a92
RS		 12414 if (may_need_local_target_p
12415 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12416 {
34e77a92
RS		 12417 union gotplt_union *root_plt;
12418 struct arm_plt_info *arm_plt;
12419 struct arm_local_iplt_info *local_iplt;
12420
12421 if (h != NULL)
12422 {
12423 root_plt = &h->plt;
12424 arm_plt = &eh->plt;
12425 }
12426 else
12427 {
12428 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12429 if (local_iplt == NULL)
12430 return FALSE;
12431 root_plt = &local_iplt->root;
12432 arm_plt = &local_iplt->arm;
12433 }
12434
f6e32f6d
RS		 12435 /* If the symbol is a function that doesn't bind locally,
12436 this relocation will need a PLT entry. */
34e77a92
RS		 12437 root_plt->refcount += 1;
12438
12439 if (!call_reloc_p)
12440 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12441
12442 /* It's too early to use htab->use_blx here, so we have to
12443 record possible blx references separately from
12444 relocs that definitely need a thumb stub. */
12445
12446 if (r_type == R_ARM_THM_CALL)
34e77a92 12447 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12448
12449 if (r_type == R_ARM_THM_JUMP24
12450 || r_type == R_ARM_THM_JUMP19)
34e77a92 12451 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12452 }
12453
12454 if (may_become_dynamic_p)
12455 {
12456 struct elf_dyn_relocs *p, **head;
12457
12458 /* Create a reloc section in dynobj. */
12459 if (sreloc == NULL)
12460 {
12461 sreloc = _bfd_elf_make_dynamic_reloc_section
12462 (sec, dynobj, 2, abfd, ! htab->use_rel);
12463
12464 if (sreloc == NULL)
12465 return FALSE;
12466
12467 /* BPABI objects never have dynamic relocations mapped. */
12468 if (htab->symbian_p)
12469 {
12470 flagword flags;
12471
12472 flags = bfd_get_section_flags (dynobj, sreloc);
12473 flags &= ~(SEC_LOAD | SEC_ALLOC);
12474 bfd_set_section_flags (dynobj, sreloc, flags);
12475 }
12476 }
12477
12478 /* If this is a global symbol, count the number of
12479 relocations we need for this symbol. */
12480 if (h != NULL)
12481 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12482 else
12483 {
34e77a92
RS		 12484 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12485 if (head == NULL)
f6e32f6d 12486 return FALSE;
f6e32f6d
RS		 12487 }
12488
12489 p = *head;
12490 if (p == NULL || p->sec != sec)
12491 {
12492 bfd_size_type amt = sizeof *p;
12493
12494 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12495 if (p == NULL)
12496 return FALSE;
12497 p->next = *head;
12498 *head = p;
12499 p->sec = sec;
12500 p->count = 0;
12501 p->pc_count = 0;
12502 }
12503
12504 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12505 p->pc_count += 1;
12506 p->count += 1;
12507 }
252b5132 12508 }
f21f3fe0 12509
b34976b6 12510 return TRUE;
252b5132
RH		 12511}
12512
6a5bb875
PB		 12513/* Unwinding tables are not referenced directly. This pass marks them as
12514 required if the corresponding code section is marked. */
12515
12516static bfd_boolean
906e58ca
NC		 12517elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12518 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12519{
12520 bfd *sub;
12521 Elf_Internal_Shdr **elf_shdrp;
12522 bfd_boolean again;
12523
7f6ab9f8
AM		 12524 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12525
6a5bb875
PB		 12526 /* Marking EH data may cause additional code sections to be marked,
12527 requiring multiple passes. */
12528 again = TRUE;
12529 while (again)
12530 {
12531 again = FALSE;
12532 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12533 {
12534 asection *o;
12535
0ffa91dd 12536 if (! is_arm_elf (sub))
6a5bb875
PB		 12537 continue;
12538
12539 elf_shdrp = elf_elfsections (sub);
12540 for (o = sub->sections; o != NULL; o = o->next)
12541 {
12542 Elf_Internal_Shdr *hdr;
0ffa91dd 12543
6a5bb875 12544 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 12545 if (hdr->sh_type == SHT_ARM_EXIDX
12546 && hdr->sh_link
12547 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 12548 && !o->gc_mark
12549 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12550 {
12551 again = TRUE;
12552 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12553 return FALSE;
12554 }
12555 }
12556 }
12557 }
12558
12559 return TRUE;
12560}
12561
3c9458e9
NC		 12562/* Treat mapping symbols as special target symbols. */
12563
12564static bfd_boolean
12565elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12566{
b0796911
PB		 12567 return bfd_is_arm_special_symbol_name (sym->name,
12568 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 12569}
12570
0367ecfb
NC		 12571/* This is a copy of elf_find_function() from elf.c except that
12572 ARM mapping symbols are ignored when looking for function names
12573 and STT_ARM_TFUNC is considered to a function type. */
252b5132 12574
0367ecfb
NC		 12575static bfd_boolean
12576arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12577 asection * section,
12578 asymbol ** symbols,
12579 bfd_vma offset,
12580 const char ** filename_ptr,
12581 const char ** functionname_ptr)
12582{
12583 const char * filename = NULL;
12584 asymbol * func = NULL;
12585 bfd_vma low_func = 0;
12586 asymbol ** p;
252b5132
RH		 12587
12588 for (p = symbols; *p != NULL; p++)
12589 {
12590 elf_symbol_type *q;
12591
12592 q = (elf_symbol_type *) *p;
12593
252b5132
RH		 12594 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12595 {
12596 default:
12597 break;
12598 case STT_FILE:
12599 filename = bfd_asymbol_name (&q->symbol);
12600 break;
252b5132
RH		 12601 case STT_FUNC:
12602 case STT_ARM_TFUNC:
9d2da7ca 12603 case STT_NOTYPE:
b0796911 12604 /* Skip mapping symbols. */
0367ecfb 12605 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 12606 && bfd_is_arm_special_symbol_name (q->symbol.name,
12607 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 12608 continue;
12609 /* Fall through. */
6b40fcba 12610 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 12611 && q->symbol.value >= low_func
12612 && q->symbol.value <= offset)
12613 {
12614 func = (asymbol *) q;
12615 low_func = q->symbol.value;
12616 }
12617 break;
12618 }
12619 }
12620
12621 if (func == NULL)
b34976b6 12622 return FALSE;
252b5132 12623
0367ecfb
NC		 12624 if (filename_ptr)
12625 *filename_ptr = filename;
12626 if (functionname_ptr)
12627 *functionname_ptr = bfd_asymbol_name (func);
12628
12629 return TRUE;
906e58ca 12630}
0367ecfb
NC		 12631
12632
12633/* Find the nearest line to a particular section and offset, for error
12634 reporting. This code is a duplicate of the code in elf.c, except
12635 that it uses arm_elf_find_function. */
12636
12637static bfd_boolean
12638elf32_arm_find_nearest_line (bfd * abfd,
12639 asection * section,
12640 asymbol ** symbols,
12641 bfd_vma offset,
12642 const char ** filename_ptr,
12643 const char ** functionname_ptr,
12644 unsigned int * line_ptr)
12645{
12646 bfd_boolean found = FALSE;
12647
12648 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12649
fc28f9aa
TG		 12650 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12651 section, symbols, offset,
0367ecfb
NC		 12652 filename_ptr, functionname_ptr,
12653 line_ptr, 0,
12654 & elf_tdata (abfd)->dwarf2_find_line_info))
12655 {
12656 if (!*functionname_ptr)
12657 arm_elf_find_function (abfd, section, symbols, offset,
12658 *filename_ptr ? NULL : filename_ptr,
12659 functionname_ptr);
f21f3fe0 12660
0367ecfb
NC		 12661 return TRUE;
12662 }
12663
12664 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12665 & found, filename_ptr,
12666 functionname_ptr, line_ptr,
12667 & elf_tdata (abfd)->line_info))
12668 return FALSE;
12669
12670 if (found && (*functionname_ptr || *line_ptr))
12671 return TRUE;
12672
12673 if (symbols == NULL)
12674 return FALSE;
12675
12676 if (! arm_elf_find_function (abfd, section, symbols, offset,
12677 filename_ptr, functionname_ptr))
12678 return FALSE;
12679
12680 *line_ptr = 0;
b34976b6 12681 return TRUE;
252b5132
RH		 12682}
12683
4ab527b0
FF		 12684static bfd_boolean
12685elf32_arm_find_inliner_info (bfd * abfd,
12686 const char ** filename_ptr,
12687 const char ** functionname_ptr,
12688 unsigned int * line_ptr)
12689{
12690 bfd_boolean found;
12691 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12692 functionname_ptr, line_ptr,
12693 & elf_tdata (abfd)->dwarf2_find_line_info);
12694 return found;
12695}
12696
252b5132
RH		 12697/* Adjust a symbol defined by a dynamic object and referenced by a
12698 regular object. The current definition is in some section of the
12699 dynamic object, but we're not including those sections. We have to
12700 change the definition to something the rest of the link can
12701 understand. */
12702
b34976b6 12703static bfd_boolean
57e8b36a
NC		 12704elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12705 struct elf_link_hash_entry * h)
252b5132
RH		 12706{
12707 bfd * dynobj;
12708 asection * s;
b7693d02 12709 struct elf32_arm_link_hash_entry * eh;
67687978 12710 struct elf32_arm_link_hash_table *globals;
252b5132 12711
67687978 12712 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12713 if (globals == NULL)
12714 return FALSE;
12715
252b5132
RH		 12716 dynobj = elf_hash_table (info)->dynobj;
12717
12718 /* Make sure we know what is going on here. */
12719 BFD_ASSERT (dynobj != NULL
f5385ebf 12720 && (h->needs_plt
34e77a92 12721 || h->type == STT_GNU_IFUNC
f6e332e6 12722 || h->u.weakdef != NULL
f5385ebf
AM		 12723 || (h->def_dynamic
12724 && h->ref_regular
12725 && !h->def_regular)));
252b5132 12726
b7693d02
DJ		 12727 eh = (struct elf32_arm_link_hash_entry *) h;
12728
252b5132
RH		 12729 /* If this is a function, put it in the procedure linkage table. We
12730 will fill in the contents of the procedure linkage table later,
12731 when we know the address of the .got section. */
34e77a92 12732 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 12733 {
34e77a92
RS		 12734 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12735 symbol binds locally. */
5e681ec4 12736 if (h->plt.refcount <= 0
34e77a92
RS		 12737 || (h->type != STT_GNU_IFUNC
12738 && (SYMBOL_CALLS_LOCAL (info, h)
12739 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12740 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 12741 {
12742 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 12743 file, but the symbol was never referred to by a dynamic
12744 object, or if all references were garbage collected. In
12745 such a case, we don't actually need to build a procedure
12746 linkage table, and we can just do a PC24 reloc instead. */
12747 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 12748 eh->plt.thumb_refcount = 0;
12749 eh->plt.maybe_thumb_refcount = 0;
12750 eh->plt.noncall_refcount = 0;
f5385ebf 12751 h->needs_plt = 0;
252b5132
RH		 12752 }
12753
b34976b6 12754 return TRUE;
252b5132 12755 }
5e681ec4 12756 else
b7693d02
DJ		 12757 {
12758 /* It's possible that we incorrectly decided a .plt reloc was
12759 needed for an R_ARM_PC24 or similar reloc to a non-function sym
12760 in check_relocs. We can't decide accurately between function
12761 and non-function syms in check-relocs; Objects loaded later in
12762 the link may change h->type. So fix it now. */
12763 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 12764 eh->plt.thumb_refcount = 0;
12765 eh->plt.maybe_thumb_refcount = 0;
12766 eh->plt.noncall_refcount = 0;
b7693d02 12767 }
252b5132
RH		 12768
12769 /* If this is a weak symbol, and there is a real definition, the
12770 processor independent code will have arranged for us to see the
12771 real definition first, and we can just use the same value. */
f6e332e6 12772 if (h->u.weakdef != NULL)
252b5132 12773 {
f6e332e6
AM		 12774 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
12775 || h->u.weakdef->root.type == bfd_link_hash_defweak);
12776 h->root.u.def.section = h->u.weakdef->root.u.def.section;
12777 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 12778 return TRUE;
252b5132
RH		 12779 }
12780
ba93b8ac
DJ		 12781 /* If there are no non-GOT references, we do not need a copy
12782 relocation. */
12783 if (!h->non_got_ref)
12784 return TRUE;
12785
252b5132
RH		 12786 /* This is a reference to a symbol defined by a dynamic object which
12787 is not a function. */
12788
12789 /* If we are creating a shared library, we must presume that the
12790 only references to the symbol are via the global offset table.
12791 For such cases we need not do anything here; the relocations will
67687978
PB		 12792 be handled correctly by relocate_section. Relocatable executables
12793 can reference data in shared objects directly, so we don't need to
12794 do anything here. */
12795 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 12796 return TRUE;
252b5132 12797
909272ee
AM		 12798 if (h->size == 0)
12799 {
12800 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
12801 h->root.root.string);
12802 return TRUE;
12803 }
12804
252b5132
RH		 12805 /* We must allocate the symbol in our .dynbss section, which will
12806 become part of the .bss section of the executable. There will be
12807 an entry for this symbol in the .dynsym section. The dynamic
12808 object will contain position independent code, so all references
12809 from the dynamic object to this symbol will go through the global
12810 offset table. The dynamic linker will use the .dynsym entry to
12811 determine the address it must put in the global offset table, so
12812 both the dynamic object and the regular object will refer to the
12813 same memory location for the variable. */
252b5132
RH		 12814 s = bfd_get_section_by_name (dynobj, ".dynbss");
12815 BFD_ASSERT (s != NULL);
12816
12817 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
12818 copy the initial value out of the dynamic object and into the
12819 runtime process image. We need to remember the offset into the
00a97672 12820 .rel(a).bss section we are going to use. */
252b5132
RH		 12821 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
12822 {
12823 asection *srel;
12824
00a97672 12825 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 12826 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 12827 h->needs_copy = 1;
252b5132
RH		 12828 }
12829
027297b7 12830 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 12831}
12832
5e681ec4
PB		 12833/* Allocate space in .plt, .got and associated reloc sections for
12834 dynamic relocs. */
12835
12836static bfd_boolean
47beaa6a 12837allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 12838{
12839 struct bfd_link_info *info;
12840 struct elf32_arm_link_hash_table *htab;
12841 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 12842 struct elf_dyn_relocs *p;
5e681ec4
PB		 12843
12844 if (h->root.type == bfd_link_hash_indirect)
12845 return TRUE;
12846
e6a6bb22
AM		 12847 eh = (struct elf32_arm_link_hash_entry *) h;
12848
5e681ec4
PB		 12849 info = (struct bfd_link_info *) inf;
12850 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12851 if (htab == NULL)
12852 return FALSE;
5e681ec4 12853
34e77a92 12854 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 12855 && h->plt.refcount > 0)
12856 {
12857 /* Make sure this symbol is output as a dynamic symbol.
12858 Undefined weak syms won't yet be marked as dynamic. */
12859 if (h->dynindx == -1
f5385ebf 12860 && !h->forced_local)
5e681ec4 12861 {
c152c796 12862 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12863 return FALSE;
12864 }
12865
34e77a92
RS		 12866 /* If the call in the PLT entry binds locally, the associated
12867 GOT entry should use an R_ARM_IRELATIVE relocation instead of
12868 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
12869 than the .plt section. */
12870 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
12871 {
12872 eh->is_iplt = 1;
12873 if (eh->plt.noncall_refcount == 0
12874 && SYMBOL_REFERENCES_LOCAL (info, h))
12875 /* All non-call references can be resolved directly.
12876 This means that they can (and in some cases, must)
12877 resolve directly to the run-time target, rather than
12878 to the PLT. That in turns means that any .got entry
12879 would be equal to the .igot.plt entry, so there's
12880 no point having both. */
12881 h->got.refcount = 0;
12882 }
12883
5e681ec4 12884 if (info->shared
34e77a92 12885 || eh->is_iplt
7359ea65 12886 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 12887 {
34e77a92 12888 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 12889
5e681ec4
PB		 12890 /* If this symbol is not defined in a regular file, and we are
12891 not generating a shared library, then set the symbol to this
12892 location in the .plt. This is required to make function
12893 pointers compare as equal between the normal executable and
12894 the shared library. */
12895 if (! info->shared
f5385ebf 12896 && !h->def_regular)
5e681ec4 12897 {
34e77a92 12898 h->root.u.def.section = htab->root.splt;
5e681ec4 12899 h->root.u.def.value = h->plt.offset;
5e681ec4 12900
67d74e43
DJ		 12901 /* Make sure the function is not marked as Thumb, in case
12902 it is the target of an ABS32 relocation, which will
12903 point to the PLT entry. */
35fc36a8 12904 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 12905 }
022f8312 12906
0855e32b 12907 htab->next_tls_desc_index++;
00a97672
RS		 12908
12909 /* VxWorks executables have a second set of relocations for
12910 each PLT entry. They go in a separate relocation section,
12911 which is processed by the kernel loader. */
12912 if (htab->vxworks_p && !info->shared)
12913 {
12914 /* There is a relocation for the initial PLT entry:
12915 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
12916 if (h->plt.offset == htab->plt_header_size)
47beaa6a 12917 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 12918
12919 /* There are two extra relocations for each subsequent
12920 PLT entry: an R_ARM_32 relocation for the GOT entry,
12921 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 12922 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 12923 }
5e681ec4
PB		 12924 }
12925 else
12926 {
12927 h->plt.offset = (bfd_vma) -1;
f5385ebf 12928 h->needs_plt = 0;
5e681ec4
PB		 12929 }
12930 }
12931 else
12932 {
12933 h->plt.offset = (bfd_vma) -1;
f5385ebf 12934 h->needs_plt = 0;
5e681ec4
PB		 12935 }
12936
0855e32b
NS		 12937 eh = (struct elf32_arm_link_hash_entry *) h;
12938 eh->tlsdesc_got = (bfd_vma) -1;
12939
5e681ec4
PB		 12940 if (h->got.refcount > 0)
12941 {
12942 asection *s;
12943 bfd_boolean dyn;
ba93b8ac
DJ		 12944 int tls_type = elf32_arm_hash_entry (h)->tls_type;
12945 int indx;
5e681ec4
PB		 12946
12947 /* Make sure this symbol is output as a dynamic symbol.
12948 Undefined weak syms won't yet be marked as dynamic. */
12949 if (h->dynindx == -1
f5385ebf 12950 && !h->forced_local)
5e681ec4 12951 {
c152c796 12952 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12953 return FALSE;
12954 }
12955
e5a52504
MM		 12956 if (!htab->symbian_p)
12957 {
362d30a1 12958 s = htab->root.sgot;
e5a52504 12959 h->got.offset = s->size;
ba93b8ac
DJ		 12960
12961 if (tls_type == GOT_UNKNOWN)
12962 abort ();
12963
12964 if (tls_type == GOT_NORMAL)
12965 /* Non-TLS symbols need one GOT slot. */
12966 s->size += 4;
12967 else
12968 {
0855e32b
NS		 12969 if (tls_type & GOT_TLS_GDESC)
12970 {
12971 /* R_ARM_TLS_DESC needs 2 GOT slots. */
12972 eh->tlsdesc_got
12973 = (htab->root.sgotplt->size
12974 - elf32_arm_compute_jump_table_size (htab));
12975 htab->root.sgotplt->size += 8;
12976 h->got.offset = (bfd_vma) -2;
34e77a92 12977 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 12978 reloc in the middle of .got.plt. */
12979 htab->num_tls_desc++;
12980 }
12981
ba93b8ac 12982 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 12983 {
12984 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
12985 the symbol is both GD and GDESC, got.offset may
12986 have been overwritten. */
12987 h->got.offset = s->size;
12988 s->size += 8;
12989 }
12990
ba93b8ac
DJ		 12991 if (tls_type & GOT_TLS_IE)
12992 /* R_ARM_TLS_IE32 needs one GOT slot. */
12993 s->size += 4;
12994 }
12995
e5a52504 12996 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 12997
12998 indx = 0;
12999 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13000 && (!info->shared
13001 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13002 indx = h->dynindx;
13003
13004 if (tls_type != GOT_NORMAL
13005 && (info->shared || indx != 0)
13006 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13007 || h->root.type != bfd_link_hash_undefweak))
13008 {
13009 if (tls_type & GOT_TLS_IE)
47beaa6a 13010 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13011
13012 if (tls_type & GOT_TLS_GD)
47beaa6a 13013 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13014
0855e32b
NS		 13015 if (tls_type & GOT_TLS_GDESC)
13016 {
47beaa6a 13017 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13018 /* GDESC needs a trampoline to jump to. */
13019 htab->tls_trampoline = -1;
13020 }
13021
13022 /* Only GD needs it. GDESC just emits one relocation per
13023 2 entries. */
13024 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13025 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13026 }
b436d854
RS		 13027 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13028 {
13029 if (htab->root.dynamic_sections_created)
13030 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13031 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13032 }
34e77a92
RS		 13033 else if (h->type == STT_GNU_IFUNC
13034 && eh->plt.noncall_refcount == 0)
13035 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13036 they all resolve dynamically instead. Reserve room for the
13037 GOT entry's R_ARM_IRELATIVE relocation. */
13038 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
b436d854
RS		 13039 else if (info->shared)
13040 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13041 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13042 }
5e681ec4
PB		 13043 }
13044 else
13045 h->got.offset = (bfd_vma) -1;
13046
a4fd1a8e
PB		 13047 /* Allocate stubs for exported Thumb functions on v4t. */
13048 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13049 && h->def_regular
35fc36a8 13050 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13051 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13052 {
13053 struct elf_link_hash_entry * th;
13054 struct bfd_link_hash_entry * bh;
13055 struct elf_link_hash_entry * myh;
13056 char name[1024];
13057 asection *s;
13058 bh = NULL;
13059 /* Create a new symbol to regist the real location of the function. */
13060 s = h->root.u.def.section;
906e58ca 13061 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13062 _bfd_generic_link_add_one_symbol (info, s->owner,
13063 name, BSF_GLOBAL, s,
13064 h->root.u.def.value,
13065 NULL, TRUE, FALSE, &bh);
13066
13067 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13068 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13069 myh->forced_local = 1;
35fc36a8 13070 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13071 eh->export_glue = myh;
13072 th = record_arm_to_thumb_glue (info, h);
13073 /* Point the symbol at the stub. */
13074 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13075 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13076 h->root.u.def.section = th->root.u.def.section;
13077 h->root.u.def.value = th->root.u.def.value & ~1;
13078 }
13079
0bdcacaf 13080 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13081 return TRUE;
13082
13083 /* In the shared -Bsymbolic case, discard space allocated for
13084 dynamic pc-relative relocs against symbols which turn out to be
13085 defined in regular objects. For the normal shared case, discard
13086 space for pc-relative relocs that have become local due to symbol
13087 visibility changes. */
13088
67687978 13089 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13090 {
7bdca076 13091 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 13092 R_ARM_REL32_NOI, which will appear on something like
13093 ".long foo - .". We want calls to protected symbols to resolve
13094 directly to the function rather than going via the plt. If people
13095 want function pointer comparisons to work as expected then they
13096 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13097 if (SYMBOL_CALLS_LOCAL (info, h))
13098 {
0bdcacaf 13099 struct elf_dyn_relocs **pp;
ba93b8ac 13100
0bdcacaf 13101 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13102 {
13103 p->count -= p->pc_count;
13104 p->pc_count = 0;
13105 if (p->count == 0)
13106 *pp = p->next;
13107 else
13108 pp = &p->next;
13109 }
13110 }
13111
4dfe6ac6 13112 if (htab->vxworks_p)
3348747a 13113 {
0bdcacaf 13114 struct elf_dyn_relocs **pp;
3348747a 13115
0bdcacaf 13116 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13117 {
0bdcacaf 13118 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13119 *pp = p->next;
13120 else
13121 pp = &p->next;
13122 }
13123 }
13124
ba93b8ac 13125 /* Also discard relocs on undefined weak syms with non-default
7359ea65 13126 visibility. */
0bdcacaf 13127 if (eh->dyn_relocs != NULL
5e681ec4 13128 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13129 {
13130 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13131 eh->dyn_relocs = NULL;
22d606e9
AM		 13132
13133 /* Make sure undefined weak symbols are output as a dynamic
13134 symbol in PIEs. */
13135 else if (h->dynindx == -1
13136 && !h->forced_local)
13137 {
13138 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13139 return FALSE;
13140 }
13141 }
13142
67687978
PB		 13143 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13144 && h->root.type == bfd_link_hash_new)
13145 {
13146 /* Output absolute symbols so that we can create relocations
13147 against them. For normal symbols we output a relocation
13148 against the section that contains them. */
13149 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13150 return FALSE;
13151 }
13152
5e681ec4
PB		 13153 }
13154 else
13155 {
13156 /* For the non-shared case, discard space for relocs against
13157 symbols which turn out to need copy relocs or are not
13158 dynamic. */
13159
f5385ebf
AM		 13160 if (!h->non_got_ref
13161 && ((h->def_dynamic
13162 && !h->def_regular)
5e681ec4
PB		 13163 || (htab->root.dynamic_sections_created
13164 && (h->root.type == bfd_link_hash_undefweak
13165 || h->root.type == bfd_link_hash_undefined))))
13166 {
13167 /* Make sure this symbol is output as a dynamic symbol.
13168 Undefined weak syms won't yet be marked as dynamic. */
13169 if (h->dynindx == -1
f5385ebf 13170 && !h->forced_local)
5e681ec4 13171 {
c152c796 13172 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13173 return FALSE;
13174 }
13175
13176 /* If that succeeded, we know we'll be keeping all the
13177 relocs. */
13178 if (h->dynindx != -1)
13179 goto keep;
13180 }
13181
0bdcacaf 13182 eh->dyn_relocs = NULL;
5e681ec4
PB		 13183
13184 keep: ;
13185 }
13186
13187 /* Finally, allocate space. */
0bdcacaf 13188 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13189 {
0bdcacaf 13190 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13191 if (h->type == STT_GNU_IFUNC
13192 && eh->plt.noncall_refcount == 0
13193 && SYMBOL_REFERENCES_LOCAL (info, h))
13194 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13195 else
13196 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13197 }
13198
13199 return TRUE;
13200}
13201
08d1f311
DJ		 13202/* Find any dynamic relocs that apply to read-only sections. */
13203
13204static bfd_boolean
8029a119 13205elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13206{
8029a119 13207 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13208 struct elf_dyn_relocs * p;
08d1f311 13209
08d1f311 13210 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13211 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13212 {
0bdcacaf 13213 asection *s = p->sec;
08d1f311
DJ		 13214
13215 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13216 {
13217 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13218
13219 info->flags |= DF_TEXTREL;
13220
13221 /* Not an error, just cut short the traversal. */
13222 return FALSE;
13223 }
13224 }
13225 return TRUE;
13226}
13227
d504ffc8
DJ		 13228void
13229bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13230 int byteswap_code)
13231{
13232 struct elf32_arm_link_hash_table *globals;
13233
13234 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13235 if (globals == NULL)
13236 return;
13237
d504ffc8
DJ		 13238 globals->byteswap_code = byteswap_code;
13239}
13240
252b5132
RH		 13241/* Set the sizes of the dynamic sections. */
13242
b34976b6 13243static bfd_boolean
57e8b36a
NC		 13244elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13245 struct bfd_link_info * info)
252b5132
RH		 13246{
13247 bfd * dynobj;
13248 asection * s;
b34976b6
AM		 13249 bfd_boolean plt;
13250 bfd_boolean relocs;
5e681ec4
PB		 13251 bfd *ibfd;
13252 struct elf32_arm_link_hash_table *htab;
252b5132 13253
5e681ec4 13254 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13255 if (htab == NULL)
13256 return FALSE;
13257
252b5132
RH		 13258 dynobj = elf_hash_table (info)->dynobj;
13259 BFD_ASSERT (dynobj != NULL);
39b41c9c 13260 check_use_blx (htab);
252b5132
RH		 13261
13262 if (elf_hash_table (info)->dynamic_sections_created)
13263 {
13264 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13265 if (info->executable)
252b5132
RH		 13266 {
13267 s = bfd_get_section_by_name (dynobj, ".interp");
13268 BFD_ASSERT (s != NULL);
eea6121a 13269 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13270 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13271 }
13272 }
5e681ec4
PB		 13273
13274 /* Set up .got offsets for local syms, and space for local dynamic
13275 relocs. */
13276 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 13277 {
5e681ec4
PB		 13278 bfd_signed_vma *local_got;
13279 bfd_signed_vma *end_local_got;
34e77a92 13280 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13281 char *local_tls_type;
0855e32b 13282 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13283 bfd_size_type locsymcount;
13284 Elf_Internal_Shdr *symtab_hdr;
13285 asection *srel;
4dfe6ac6 13286 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13287 unsigned int symndx;
5e681ec4 13288
0ffa91dd 13289 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13290 continue;
13291
13292 for (s = ibfd->sections; s != NULL; s = s->next)
13293 {
0bdcacaf 13294 struct elf_dyn_relocs *p;
5e681ec4 13295
0bdcacaf 13296 for (p = (struct elf_dyn_relocs *)
21d799b5 13297 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13298 {
0bdcacaf
RS		 13299 if (!bfd_is_abs_section (p->sec)
13300 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13301 {
13302 /* Input section has been discarded, either because
13303 it is a copy of a linkonce section or due to
13304 linker script /DISCARD/, so we'll be discarding
13305 the relocs too. */
13306 }
3348747a 13307 else if (is_vxworks
0bdcacaf 13308 && strcmp (p->sec->output_section->name,
3348747a
NS		 13309 ".tls_vars") == 0)
13310 {
13311 /* Relocations in vxworks .tls_vars sections are
13312 handled specially by the loader. */
13313 }
5e681ec4
PB		 13314 else if (p->count != 0)
13315 {
0bdcacaf 13316 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13317 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13318 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13319 info->flags |= DF_TEXTREL;
13320 }
13321 }
13322 }
13323
13324 local_got = elf_local_got_refcounts (ibfd);
13325 if (!local_got)
13326 continue;
13327
0ffa91dd 13328 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13329 locsymcount = symtab_hdr->sh_info;
13330 end_local_got = local_got + locsymcount;
34e77a92 13331 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13332 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13333 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13334 symndx = 0;
362d30a1
RS		 13335 s = htab->root.sgot;
13336 srel = htab->root.srelgot;
0855e32b 13337 for (; local_got < end_local_got;
34e77a92
RS		 13338 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13339 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13340 {
0855e32b 13341 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13342 local_iplt = *local_iplt_ptr;
13343 if (local_iplt != NULL)
13344 {
13345 struct elf_dyn_relocs *p;
13346
13347 if (local_iplt->root.refcount > 0)
13348 {
13349 elf32_arm_allocate_plt_entry (info, TRUE,
13350 &local_iplt->root,
13351 &local_iplt->arm);
13352 if (local_iplt->arm.noncall_refcount == 0)
13353 /* All references to the PLT are calls, so all
13354 non-call references can resolve directly to the
13355 run-time target. This means that the .got entry
13356 would be the same as the .igot.plt entry, so there's
13357 no point creating both. */
13358 *local_got = 0;
13359 }
13360 else
13361 {
13362 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13363 local_iplt->root.offset = (bfd_vma) -1;
13364 }
13365
13366 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13367 {
13368 asection *psrel;
13369
13370 psrel = elf_section_data (p->sec)->sreloc;
13371 if (local_iplt->arm.noncall_refcount == 0)
13372 elf32_arm_allocate_irelocs (info, psrel, p->count);
13373 else
13374 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13375 }
13376 }
5e681ec4
PB		 13377 if (*local_got > 0)
13378 {
34e77a92
RS		 13379 Elf_Internal_Sym *isym;
13380
eea6121a 13381 *local_got = s->size;
ba93b8ac
DJ		 13382 if (*local_tls_type & GOT_TLS_GD)
13383 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13384 s->size += 8;
0855e32b
NS		 13385 if (*local_tls_type & GOT_TLS_GDESC)
13386 {
13387 *local_tlsdesc_gotent = htab->root.sgotplt->size
13388 - elf32_arm_compute_jump_table_size (htab);
13389 htab->root.sgotplt->size += 8;
13390 *local_got = (bfd_vma) -2;
34e77a92 13391 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13392 reloc in the middle of .got.plt. */
13393 htab->num_tls_desc++;
13394 }
ba93b8ac
DJ		 13395 if (*local_tls_type & GOT_TLS_IE)
13396 s->size += 4;
ba93b8ac 13397
0855e32b
NS		 13398 if (*local_tls_type & GOT_NORMAL)
13399 {
13400 /* If the symbol is both GD and GDESC, *local_got
13401 may have been overwritten. */
13402 *local_got = s->size;
13403 s->size += 4;
13404 }
13405
34e77a92
RS		 13406 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13407 if (isym == NULL)
13408 return FALSE;
13409
13410 /* If all references to an STT_GNU_IFUNC PLT are calls,
13411 then all non-call references, including this GOT entry,
13412 resolve directly to the run-time target. */
13413 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13414 && (local_iplt == NULL
13415 || local_iplt->arm.noncall_refcount == 0))
13416 elf32_arm_allocate_irelocs (info, srel, 1);
13417 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13418 || *local_tls_type & GOT_TLS_GD)
47beaa6a 13419 elf32_arm_allocate_dynrelocs (info, srel, 1);
0855e32b
NS		 13420
13421 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13422 {
47beaa6a 13423 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13424 htab->tls_trampoline = -1;
13425 }
5e681ec4
PB		 13426 }
13427 else
13428 *local_got = (bfd_vma) -1;
13429 }
252b5132
RH		 13430 }
13431
ba93b8ac
DJ		 13432 if (htab->tls_ldm_got.refcount > 0)
13433 {
13434 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13435 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13436 htab->tls_ldm_got.offset = htab->root.sgot->size;
13437 htab->root.sgot->size += 8;
ba93b8ac 13438 if (info->shared)
47beaa6a 13439 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13440 }
13441 else
13442 htab->tls_ldm_got.offset = -1;
13443
5e681ec4
PB		 13444 /* Allocate global sym .plt and .got entries, and space for global
13445 sym dynamic relocs. */
47beaa6a 13446 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13447
d504ffc8
DJ		 13448 /* Here we rummage through the found bfds to collect glue information. */
13449 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 13450 {
0ffa91dd 13451 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13452 continue;
13453
c7b8f16e
JB		 13454 /* Initialise mapping tables for code/data. */
13455 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13456
c7b8f16e
JB		 13457 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13458 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13459 /* xgettext:c-format */
13460 _bfd_error_handler (_("Errors encountered processing file %s"),
13461 ibfd->filename);
13462 }
d504ffc8 13463
3e6b1042
DJ		 13464 /* Allocate space for the glue sections now that we've sized them. */
13465 bfd_elf32_arm_allocate_interworking_sections (info);
13466
0855e32b
NS		 13467 /* For every jump slot reserved in the sgotplt, reloc_count is
13468 incremented. However, when we reserve space for TLS descriptors,
13469 it's not incremented, so in order to compute the space reserved
13470 for them, it suffices to multiply the reloc count by the jump
13471 slot size. */
13472 if (htab->root.srelplt)
13473 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13474
13475 if (htab->tls_trampoline)
13476 {
13477 if (htab->root.splt->size == 0)
13478 htab->root.splt->size += htab->plt_header_size;
13479
13480 htab->tls_trampoline = htab->root.splt->size;
13481 htab->root.splt->size += htab->plt_entry_size;
13482
13483 /* If we're not using lazy TLS relocations, don't generate the
13484 PLT and GOT entries they require. */
13485 if (!(info->flags & DF_BIND_NOW))
13486 {
13487 htab->dt_tlsdesc_got = htab->root.sgot->size;
13488 htab->root.sgot->size += 4;
13489
13490 htab->dt_tlsdesc_plt = htab->root.splt->size;
13491 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13492 }
13493 }
13494
252b5132
RH		 13495 /* The check_relocs and adjust_dynamic_symbol entry points have
13496 determined the sizes of the various dynamic sections. Allocate
13497 memory for them. */
b34976b6
AM		 13498 plt = FALSE;
13499 relocs = FALSE;
252b5132
RH		 13500 for (s = dynobj->sections; s != NULL; s = s->next)
13501 {
13502 const char * name;
252b5132
RH		 13503
13504 if ((s->flags & SEC_LINKER_CREATED) == 0)
13505 continue;
13506
13507 /* It's OK to base decisions on the section name, because none
13508 of the dynobj section names depend upon the input files. */
13509 name = bfd_get_section_name (dynobj, s);
13510
34e77a92 13511 if (s == htab->root.splt)
252b5132 13512 {
c456f082
AM		 13513 /* Remember whether there is a PLT. */
13514 plt = s->size != 0;
252b5132 13515 }
0112cd26 13516 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13517 {
c456f082 13518 if (s->size != 0)
252b5132 13519 {
252b5132 13520 /* Remember whether there are any reloc sections other
00a97672 13521 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13522 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13523 relocs = TRUE;
252b5132
RH		 13524
13525 /* We use the reloc_count field as a counter if we need
13526 to copy relocs into the output file. */
13527 s->reloc_count = 0;
13528 }
13529 }
34e77a92
RS		 13530 else if (s != htab->root.sgot
13531 && s != htab->root.sgotplt
13532 && s != htab->root.iplt
13533 && s != htab->root.igotplt
13534 && s != htab->sdynbss)
252b5132
RH		 13535 {
13536 /* It's not one of our sections, so don't allocate space. */
13537 continue;
13538 }
13539
c456f082 13540 if (s->size == 0)
252b5132 13541 {
c456f082 13542 /* If we don't need this section, strip it from the
00a97672
RS		 13543 output file. This is mostly to handle .rel(a).bss and
13544 .rel(a).plt. We must create both sections in
c456f082
AM		 13545 create_dynamic_sections, because they must be created
13546 before the linker maps input sections to output
13547 sections. The linker does that before
13548 adjust_dynamic_symbol is called, and it is that
13549 function which decides whether anything needs to go
13550 into these sections. */
8423293d 13551 s->flags |= SEC_EXCLUDE;
252b5132
RH		 13552 continue;
13553 }
13554
c456f082
AM		 13555 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13556 continue;
13557
252b5132 13558 /* Allocate memory for the section contents. */
21d799b5 13559 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 13560 if (s->contents == NULL)
b34976b6 13561 return FALSE;
252b5132
RH		 13562 }
13563
13564 if (elf_hash_table (info)->dynamic_sections_created)
13565 {
13566 /* Add some entries to the .dynamic section. We fill in the
13567 values later, in elf32_arm_finish_dynamic_sections, but we
13568 must add the entries now so that we get the correct size for
13569 the .dynamic section. The DT_DEBUG entry is filled in by the
13570 dynamic linker and used by the debugger. */
dc810e39 13571#define add_dynamic_entry(TAG, VAL) \
5a580b3a 13572 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 13573
8532796c 13574 if (info->executable)
252b5132 13575 {
dc810e39 13576 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 13577 return FALSE;
252b5132
RH		 13578 }
13579
13580 if (plt)
13581 {
dc810e39
AM		 13582 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13583 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 13584 || !add_dynamic_entry (DT_PLTREL,
13585 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 13586 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 13587 return FALSE;
0855e32b
NS		 13588
13589 if (htab->dt_tlsdesc_plt &&
13590 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13591 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13592 return FALSE;
252b5132
RH		 13593 }
13594
13595 if (relocs)
13596 {
00a97672
RS		 13597 if (htab->use_rel)
13598 {
13599 if (!add_dynamic_entry (DT_REL, 0)
13600 || !add_dynamic_entry (DT_RELSZ, 0)
13601 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13602 return FALSE;
13603 }
13604 else
13605 {
13606 if (!add_dynamic_entry (DT_RELA, 0)
13607 || !add_dynamic_entry (DT_RELASZ, 0)
13608 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13609 return FALSE;
13610 }
252b5132
RH		 13611 }
13612
08d1f311
DJ		 13613 /* If any dynamic relocs apply to a read-only section,
13614 then we need a DT_TEXTREL entry. */
13615 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 13616 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13617 info);
08d1f311 13618
99e4ae17 13619 if ((info->flags & DF_TEXTREL) != 0)
252b5132 13620 {
dc810e39 13621 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 13622 return FALSE;
252b5132 13623 }
7a2b07ff
NS		 13624 if (htab->vxworks_p
13625 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13626 return FALSE;
252b5132 13627 }
8532796c 13628#undef add_dynamic_entry
252b5132 13629
b34976b6 13630 return TRUE;
252b5132
RH		 13631}
13632
0855e32b
NS		 13633/* Size sections even though they're not dynamic. We use it to setup
13634 _TLS_MODULE_BASE_, if needed. */
13635
13636static bfd_boolean
13637elf32_arm_always_size_sections (bfd *output_bfd,
13638 struct bfd_link_info *info)
13639{
13640 asection *tls_sec;
13641
13642 if (info->relocatable)
13643 return TRUE;
13644
13645 tls_sec = elf_hash_table (info)->tls_sec;
13646
13647 if (tls_sec)
13648 {
13649 struct elf_link_hash_entry *tlsbase;
13650
13651 tlsbase = elf_link_hash_lookup
13652 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13653
13654 if (tlsbase)
13655 {
13656 struct bfd_link_hash_entry *bh = NULL;
13657 const struct elf_backend_data *bed
13658 = get_elf_backend_data (output_bfd);
13659
13660 if (!(_bfd_generic_link_add_one_symbol
13661 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13662 tls_sec, 0, NULL, FALSE,
13663 bed->collect, &bh)))
13664 return FALSE;
13665
13666 tlsbase->type = STT_TLS;
13667 tlsbase = (struct elf_link_hash_entry *)bh;
13668 tlsbase->def_regular = 1;
13669 tlsbase->other = STV_HIDDEN;
13670 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13671 }
13672 }
13673 return TRUE;
13674}
13675
252b5132
RH		 13676/* Finish up dynamic symbol handling. We set the contents of various
13677 dynamic sections here. */
13678
b34976b6 13679static bfd_boolean
906e58ca
NC		 13680elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13681 struct bfd_link_info * info,
13682 struct elf_link_hash_entry * h,
13683 Elf_Internal_Sym * sym)
252b5132 13684{
e5a52504 13685 struct elf32_arm_link_hash_table *htab;
b7693d02 13686 struct elf32_arm_link_hash_entry *eh;
252b5132 13687
e5a52504 13688 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13689 if (htab == NULL)
13690 return FALSE;
13691
b7693d02 13692 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 13693
13694 if (h->plt.offset != (bfd_vma) -1)
13695 {
34e77a92 13696 if (!eh->is_iplt)
e5a52504 13697 {
34e77a92
RS		 13698 BFD_ASSERT (h->dynindx != -1);
13699 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13700 h->dynindx, 0);
e5a52504 13701 }
57e8b36a 13702
f5385ebf 13703 if (!h->def_regular)
252b5132
RH		 13704 {
13705 /* Mark the symbol as undefined, rather than as defined in
13706 the .plt section. Leave the value alone. */
13707 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 13708 /* If the symbol is weak, we do need to clear the value.
13709 Otherwise, the PLT entry would provide a definition for
13710 the symbol even if the symbol wasn't defined anywhere,
13711 and so the symbol would never be NULL. */
f5385ebf 13712 if (!h->ref_regular_nonweak)
d982ba73 13713 sym->st_value = 0;
252b5132 13714 }
34e77a92
RS		 13715 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13716 {
13717 /* At least one non-call relocation references this .iplt entry,
13718 so the .iplt entry is the function's canonical address. */
13719 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13720 sym->st_target_internal = ST_BRANCH_TO_ARM;
13721 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13722 (output_bfd, htab->root.iplt->output_section));
13723 sym->st_value = (h->plt.offset
13724 + htab->root.iplt->output_section->vma
13725 + htab->root.iplt->output_offset);
13726 }
252b5132
RH		 13727 }
13728
f5385ebf 13729 if (h->needs_copy)
252b5132
RH		 13730 {
13731 asection * s;
947216bf 13732 Elf_Internal_Rela rel;
252b5132
RH		 13733
13734 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 13735 BFD_ASSERT (h->dynindx != -1
13736 && (h->root.type == bfd_link_hash_defined
13737 || h->root.type == bfd_link_hash_defweak));
13738
362d30a1 13739 s = htab->srelbss;
252b5132
RH		 13740 BFD_ASSERT (s != NULL);
13741
00a97672 13742 rel.r_addend = 0;
252b5132
RH		 13743 rel.r_offset = (h->root.u.def.value
13744 + h->root.u.def.section->output_section->vma
13745 + h->root.u.def.section->output_offset);
13746 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 13747 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 13748 }
13749
00a97672
RS		 13750 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13751 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13752 to the ".got" section. */
252b5132 13753 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 13754 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 13755 sym->st_shndx = SHN_ABS;
13756
b34976b6 13757 return TRUE;
252b5132
RH		 13758}
13759
0855e32b
NS		 13760static void
13761arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13762 void *contents,
13763 const unsigned long *template, unsigned count)
13764{
13765 unsigned ix;
13766
13767 for (ix = 0; ix != count; ix++)
13768 {
13769 unsigned long insn = template[ix];
13770
13771 /* Emit mov pc,rx if bx is not permitted. */
13772 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
13773 insn = (insn & 0xf000000f) | 0x01a0f000;
13774 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
13775 }
13776}
13777
252b5132
RH		 13778/* Finish up the dynamic sections. */
13779
b34976b6 13780static bfd_boolean
57e8b36a 13781elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 13782{
13783 bfd * dynobj;
13784 asection * sgot;
13785 asection * sdyn;
4dfe6ac6
NC		 13786 struct elf32_arm_link_hash_table *htab;
13787
13788 htab = elf32_arm_hash_table (info);
13789 if (htab == NULL)
13790 return FALSE;
252b5132
RH		 13791
13792 dynobj = elf_hash_table (info)->dynobj;
13793
362d30a1 13794 sgot = htab->root.sgotplt;
894891db
NC		 13795 /* A broken linker script might have discarded the dynamic sections.
13796 Catch this here so that we do not seg-fault later on. */
13797 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
13798 return FALSE;
252b5132
RH		 13799 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
13800
13801 if (elf_hash_table (info)->dynamic_sections_created)
13802 {
13803 asection *splt;
13804 Elf32_External_Dyn *dyncon, *dynconend;
13805
362d30a1 13806 splt = htab->root.splt;
24a1ba0f 13807 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 13808 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 13809
13810 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 13811 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 13812
252b5132
RH		 13813 for (; dyncon < dynconend; dyncon++)
13814 {
13815 Elf_Internal_Dyn dyn;
13816 const char * name;
13817 asection * s;
13818
13819 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
13820
13821 switch (dyn.d_tag)
13822 {
229fcec5
MM		 13823 unsigned int type;
13824
252b5132 13825 default:
7a2b07ff
NS		 13826 if (htab->vxworks_p
13827 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
13828 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 13829 break;
13830
229fcec5
MM		 13831 case DT_HASH:
13832 name = ".hash";
13833 goto get_vma_if_bpabi;
13834 case DT_STRTAB:
13835 name = ".dynstr";
13836 goto get_vma_if_bpabi;
13837 case DT_SYMTAB:
13838 name = ".dynsym";
13839 goto get_vma_if_bpabi;
c0042f5d
MM		 13840 case DT_VERSYM:
13841 name = ".gnu.version";
13842 goto get_vma_if_bpabi;
13843 case DT_VERDEF:
13844 name = ".gnu.version_d";
13845 goto get_vma_if_bpabi;
13846 case DT_VERNEED:
13847 name = ".gnu.version_r";
13848 goto get_vma_if_bpabi;
13849
252b5132
RH		 13850 case DT_PLTGOT:
13851 name = ".got";
13852 goto get_vma;
13853 case DT_JMPREL:
00a97672 13854 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 13855 get_vma:
13856 s = bfd_get_section_by_name (output_bfd, name);
13857 BFD_ASSERT (s != NULL);
229fcec5
MM		 13858 if (!htab->symbian_p)
13859 dyn.d_un.d_ptr = s->vma;
13860 else
13861 /* In the BPABI, tags in the PT_DYNAMIC section point
13862 at the file offset, not the memory address, for the
13863 convenience of the post linker. */
13864 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 13865 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13866 break;
13867
229fcec5
MM		 13868 get_vma_if_bpabi:
13869 if (htab->symbian_p)
13870 goto get_vma;
13871 break;
13872
252b5132 13873 case DT_PLTRELSZ:
362d30a1 13874 s = htab->root.srelplt;
252b5132 13875 BFD_ASSERT (s != NULL);
eea6121a 13876 dyn.d_un.d_val = s->size;
252b5132
RH		 13877 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13878 break;
906e58ca 13879
252b5132 13880 case DT_RELSZ:
00a97672 13881 case DT_RELASZ:
229fcec5
MM		 13882 if (!htab->symbian_p)
13883 {
13884 /* My reading of the SVR4 ABI indicates that the
13885 procedure linkage table relocs (DT_JMPREL) should be
13886 included in the overall relocs (DT_REL). This is
13887 what Solaris does. However, UnixWare can not handle
13888 that case. Therefore, we override the DT_RELSZ entry
13889 here to make it not include the JMPREL relocs. Since
00a97672 13890 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 13891 other relocation sections, we don't have to worry
13892 about changing the DT_REL entry. */
362d30a1 13893 s = htab->root.srelplt;
229fcec5
MM		 13894 if (s != NULL)
13895 dyn.d_un.d_val -= s->size;
13896 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13897 break;
13898 }
8029a119 13899 /* Fall through. */
229fcec5
MM		 13900
13901 case DT_REL:
13902 case DT_RELA:
229fcec5
MM		 13903 /* In the BPABI, the DT_REL tag must point at the file
13904 offset, not the VMA, of the first relocation
13905 section. So, we use code similar to that in
13906 elflink.c, but do not check for SHF_ALLOC on the
13907 relcoation section, since relocations sections are
13908 never allocated under the BPABI. The comments above
13909 about Unixware notwithstanding, we include all of the
13910 relocations here. */
13911 if (htab->symbian_p)
13912 {
13913 unsigned int i;
13914 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
13915 ? SHT_REL : SHT_RELA);
13916 dyn.d_un.d_val = 0;
13917 for (i = 1; i < elf_numsections (output_bfd); i++)
13918 {
906e58ca 13919 Elf_Internal_Shdr *hdr
229fcec5
MM		 13920 = elf_elfsections (output_bfd)[i];
13921 if (hdr->sh_type == type)
13922 {
906e58ca 13923 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 13924 || dyn.d_tag == DT_RELASZ)
13925 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 13926 else if ((ufile_ptr) hdr->sh_offset
13927 <= dyn.d_un.d_val - 1)
229fcec5
MM		 13928 dyn.d_un.d_val = hdr->sh_offset;
13929 }
13930 }
13931 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13932 }
252b5132 13933 break;
88f7bcd5 13934
0855e32b
NS		 13935 case DT_TLSDESC_PLT:
13936 s = htab->root.splt;
13937 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13938 + htab->dt_tlsdesc_plt);
13939 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13940 break;
13941
13942 case DT_TLSDESC_GOT:
13943 s = htab->root.sgot;
13944 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13945 + htab->dt_tlsdesc_got);
13946 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13947 break;
13948
88f7bcd5
NC		 13949 /* Set the bottom bit of DT_INIT/FINI if the
13950 corresponding function is Thumb. */
13951 case DT_INIT:
13952 name = info->init_function;
13953 goto get_sym;
13954 case DT_FINI:
13955 name = info->fini_function;
13956 get_sym:
13957 /* If it wasn't set by elf_bfd_final_link
4cc11e76 13958 then there is nothing to adjust. */
88f7bcd5
NC		 13959 if (dyn.d_un.d_val != 0)
13960 {
13961 struct elf_link_hash_entry * eh;
13962
13963 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 13964 FALSE, FALSE, TRUE);
35fc36a8 13965 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 13966 {
13967 dyn.d_un.d_val |= 1;
b34976b6 13968 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 13969 }
13970 }
13971 break;
252b5132
RH		 13972 }
13973 }
13974
24a1ba0f 13975 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 13976 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 13977 {
00a97672
RS		 13978 const bfd_vma *plt0_entry;
13979 bfd_vma got_address, plt_address, got_displacement;
13980
13981 /* Calculate the addresses of the GOT and PLT. */
13982 got_address = sgot->output_section->vma + sgot->output_offset;
13983 plt_address = splt->output_section->vma + splt->output_offset;
13984
13985 if (htab->vxworks_p)
13986 {
13987 /* The VxWorks GOT is relocated by the dynamic linker.
13988 Therefore, we must emit relocations rather than simply
13989 computing the values now. */
13990 Elf_Internal_Rela rel;
13991
13992 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 13993 put_arm_insn (htab, output_bfd, plt0_entry[0],
13994 splt->contents + 0);
13995 put_arm_insn (htab, output_bfd, plt0_entry[1],
13996 splt->contents + 4);
13997 put_arm_insn (htab, output_bfd, plt0_entry[2],
13998 splt->contents + 8);
00a97672
RS		 13999 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14000
8029a119 14001 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14002 rel.r_offset = plt_address + 12;
14003 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14004 rel.r_addend = 0;
14005 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14006 htab->srelplt2->contents);
14007 }
14008 else
14009 {
14010 got_displacement = got_address - (plt_address + 16);
14011
14012 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14013 put_arm_insn (htab, output_bfd, plt0_entry[0],
14014 splt->contents + 0);
14015 put_arm_insn (htab, output_bfd, plt0_entry[1],
14016 splt->contents + 4);
14017 put_arm_insn (htab, output_bfd, plt0_entry[2],
14018 splt->contents + 8);
14019 put_arm_insn (htab, output_bfd, plt0_entry[3],
14020 splt->contents + 12);
5e681ec4 14021
5e681ec4 14022#ifdef FOUR_WORD_PLT
00a97672
RS		 14023 /* The displacement value goes in the otherwise-unused
14024 last word of the second entry. */
14025 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14026#else
00a97672 14027 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14028#endif
00a97672 14029 }
f7a74f8c 14030 }
252b5132
RH		 14031
14032 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14033 really seem like the right value. */
74541ad4
AM		 14034 if (splt->output_section->owner == output_bfd)
14035 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14036
0855e32b
NS		 14037 if (htab->dt_tlsdesc_plt)
14038 {
14039 bfd_vma got_address
14040 = sgot->output_section->vma + sgot->output_offset;
14041 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14042 + htab->root.sgot->output_offset);
14043 bfd_vma plt_address
14044 = splt->output_section->vma + splt->output_offset;
14045
14046 arm_put_trampoline (htab, output_bfd,
14047 splt->contents + htab->dt_tlsdesc_plt,
14048 dl_tlsdesc_lazy_trampoline, 6);
14049
14050 bfd_put_32 (output_bfd,
14051 gotplt_address + htab->dt_tlsdesc_got
14052 - (plt_address + htab->dt_tlsdesc_plt)
14053 - dl_tlsdesc_lazy_trampoline[6],
14054 splt->contents + htab->dt_tlsdesc_plt + 24);
14055 bfd_put_32 (output_bfd,
14056 got_address - (plt_address + htab->dt_tlsdesc_plt)
14057 - dl_tlsdesc_lazy_trampoline[7],
14058 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14059 }
14060
14061 if (htab->tls_trampoline)
14062 {
14063 arm_put_trampoline (htab, output_bfd,
14064 splt->contents + htab->tls_trampoline,
14065 tls_trampoline, 3);
14066#ifdef FOUR_WORD_PLT
14067 bfd_put_32 (output_bfd, 0x00000000,
14068 splt->contents + htab->tls_trampoline + 12);
14069#endif
14070 }
14071
362d30a1 14072 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14073 {
14074 /* Correct the .rel(a).plt.unloaded relocations. They will have
14075 incorrect symbol indexes. */
14076 int num_plts;
eed62c48 14077 unsigned char *p;
00a97672 14078
362d30a1 14079 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14080 / htab->plt_entry_size);
14081 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14082
14083 for (; num_plts; num_plts--)
14084 {
14085 Elf_Internal_Rela rel;
14086
14087 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14088 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14089 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14090 p += RELOC_SIZE (htab);
14091
14092 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14093 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14094 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14095 p += RELOC_SIZE (htab);
14096 }
14097 }
252b5132
RH		 14098 }
14099
14100 /* Fill in the first three entries in the global offset table. */
229fcec5 14101 if (sgot)
252b5132 14102 {
229fcec5
MM		 14103 if (sgot->size > 0)
14104 {
14105 if (sdyn == NULL)
14106 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14107 else
14108 bfd_put_32 (output_bfd,
14109 sdyn->output_section->vma + sdyn->output_offset,
14110 sgot->contents);
14111 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14112 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14113 }
252b5132 14114
229fcec5
MM		 14115 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14116 }
252b5132 14117
b34976b6 14118 return TRUE;
252b5132
RH		 14119}
14120
ba96a88f 14121static void
57e8b36a 14122elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14123{
9b485d32 14124 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14125 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14126
14127 i_ehdrp = elf_elfheader (abfd);
14128
94a3258f
PB		 14129 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14130 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14131 else
14132 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 14133 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14134
93204d3a
PB		 14135 if (link_info)
14136 {
14137 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14138 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14139 i_ehdrp->e_flags |= EF_ARM_BE8;
14140 }
ba96a88f
NC		 14141}
14142
99e4ae17 14143static enum elf_reloc_type_class
57e8b36a 14144elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 14145{
f51e552e 14146 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14147 {
14148 case R_ARM_RELATIVE:
14149 return reloc_class_relative;
14150 case R_ARM_JUMP_SLOT:
14151 return reloc_class_plt;
14152 case R_ARM_COPY:
14153 return reloc_class_copy;
14154 default:
14155 return reloc_class_normal;
14156 }
14157}
14158
e489d0ae 14159static void
57e8b36a 14160elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14161{
5a6c6817 14162 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14163}
14164
40a18ebd
NC		 14165/* Return TRUE if this is an unwinding table entry. */
14166
14167static bfd_boolean
14168is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14169{
0112cd26
NC		 14170 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14171 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14172}
14173
14174
14175/* Set the type and flags for an ARM section. We do this by
14176 the section name, which is a hack, but ought to work. */
14177
14178static bfd_boolean
14179elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14180{
14181 const char * name;
14182
14183 name = bfd_get_section_name (abfd, sec);
14184
14185 if (is_arm_elf_unwind_section_name (abfd, name))
14186 {
14187 hdr->sh_type = SHT_ARM_EXIDX;
14188 hdr->sh_flags |= SHF_LINK_ORDER;
14189 }
14190 return TRUE;
14191}
14192
6dc132d9
L		 14193/* Handle an ARM specific section when reading an object file. This is
14194 called when bfd_section_from_shdr finds a section with an unknown
14195 type. */
40a18ebd
NC		 14196
14197static bfd_boolean
14198elf32_arm_section_from_shdr (bfd *abfd,
14199 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14200 const char *name,
14201 int shindex)
40a18ebd
NC		 14202{
14203 /* There ought to be a place to keep ELF backend specific flags, but
14204 at the moment there isn't one. We just keep track of the
14205 sections by their name, instead. Fortunately, the ABI gives
14206 names for all the ARM specific sections, so we will probably get
14207 away with this. */
14208 switch (hdr->sh_type)
14209 {
14210 case SHT_ARM_EXIDX:
0951f019
RE		 14211 case SHT_ARM_PREEMPTMAP:
14212 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14213 break;
14214
14215 default:
14216 return FALSE;
14217 }
14218
6dc132d9 14219 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14220 return FALSE;
14221
14222 return TRUE;
14223}
e489d0ae 14224
44444f50
NC		 14225static _arm_elf_section_data *
14226get_arm_elf_section_data (asection * sec)
14227{
47b2e99c
JZ		 14228 if (sec && sec->owner && is_arm_elf (sec->owner))
14229 return elf32_arm_section_data (sec);
44444f50
NC		 14230 else
14231 return NULL;
8e3de13a
NC		 14232}
14233
4e617b1e
PB		 14234typedef struct
14235{
14236 void *finfo;
14237 struct bfd_link_info *info;
91a5743d
PB		 14238 asection *sec;
14239 int sec_shndx;
6e0b88f1
AM		 14240 int (*func) (void *, const char *, Elf_Internal_Sym *,
14241 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14242} output_arch_syminfo;
14243
14244enum map_symbol_type
14245{
14246 ARM_MAP_ARM,
14247 ARM_MAP_THUMB,
14248 ARM_MAP_DATA
14249};
14250
14251
7413f23f 14252/* Output a single mapping symbol. */
4e617b1e
PB		 14253
14254static bfd_boolean
7413f23f
DJ		 14255elf32_arm_output_map_sym (output_arch_syminfo *osi,
14256 enum map_symbol_type type,
14257 bfd_vma offset)
4e617b1e
PB		 14258{
14259 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14260 Elf_Internal_Sym sym;
14261
91a5743d
PB		 14262 sym.st_value = osi->sec->output_section->vma
14263 + osi->sec->output_offset
14264 + offset;
4e617b1e
PB		 14265 sym.st_size = 0;
14266 sym.st_other = 0;
14267 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14268 sym.st_shndx = osi->sec_shndx;
35fc36a8 14269 sym.st_target_internal = 0;
fe33d2fa 14270 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 14271 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14272}
14273
34e77a92
RS		 14274/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14275 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14276
14277static bfd_boolean
34e77a92
RS		 14278elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14279 bfd_boolean is_iplt_entry_p,
14280 union gotplt_union *root_plt,
14281 struct arm_plt_info *arm_plt)
4e617b1e 14282{
4e617b1e 14283 struct elf32_arm_link_hash_table *htab;
34e77a92 14284 bfd_vma addr, plt_header_size;
4e617b1e 14285
34e77a92 14286 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14287 return TRUE;
14288
4dfe6ac6
NC		 14289 htab = elf32_arm_hash_table (osi->info);
14290 if (htab == NULL)
14291 return FALSE;
14292
34e77a92
RS		 14293 if (is_iplt_entry_p)
14294 {
14295 osi->sec = htab->root.iplt;
14296 plt_header_size = 0;
14297 }
14298 else
14299 {
14300 osi->sec = htab->root.splt;
14301 plt_header_size = htab->plt_header_size;
14302 }
14303 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14304 (osi->info->output_bfd, osi->sec->output_section));
14305
14306 addr = root_plt->offset & -2;
4e617b1e
PB		 14307 if (htab->symbian_p)
14308 {
7413f23f 14309 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14310 return FALSE;
7413f23f 14311 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14312 return FALSE;
14313 }
14314 else if (htab->vxworks_p)
14315 {
7413f23f 14316 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14317 return FALSE;
7413f23f 14318 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14319 return FALSE;
7413f23f 14320 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14321 return FALSE;
7413f23f 14322 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14323 return FALSE;
14324 }
14325 else
14326 {
34e77a92 14327 bfd_boolean thumb_stub_p;
bd97cb95 14328
34e77a92
RS		 14329 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14330 if (thumb_stub_p)
4e617b1e 14331 {
7413f23f 14332 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14333 return FALSE;
14334 }
14335#ifdef FOUR_WORD_PLT
7413f23f 14336 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14337 return FALSE;
7413f23f 14338 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14339 return FALSE;
14340#else
906e58ca 14341 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14342 so only need to output a mapping symbol for the first PLT entry and
14343 entries with thumb thunks. */
34e77a92 14344 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14345 {
7413f23f 14346 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14347 return FALSE;
14348 }
14349#endif
14350 }
14351
14352 return TRUE;
14353}
14354
34e77a92
RS		 14355/* Output mapping symbols for PLT entries associated with H. */
14356
14357static bfd_boolean
14358elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14359{
14360 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14361 struct elf32_arm_link_hash_entry *eh;
14362
14363 if (h->root.type == bfd_link_hash_indirect)
14364 return TRUE;
14365
14366 if (h->root.type == bfd_link_hash_warning)
14367 /* When warning symbols are created, they **replace** the "real"
14368 entry in the hash table, thus we never get to see the real
14369 symbol in a hash traversal. So look at it now. */
14370 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14371
14372 eh = (struct elf32_arm_link_hash_entry *) h;
14373 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14374 &h->plt, &eh->plt);
14375}
14376
7413f23f
DJ		 14377/* Output a single local symbol for a generated stub. */
14378
14379static bfd_boolean
14380elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14381 bfd_vma offset, bfd_vma size)
14382{
7413f23f
DJ		 14383 Elf_Internal_Sym sym;
14384
7413f23f
DJ		 14385 sym.st_value = osi->sec->output_section->vma
14386 + osi->sec->output_offset
14387 + offset;
14388 sym.st_size = size;
14389 sym.st_other = 0;
14390 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14391 sym.st_shndx = osi->sec_shndx;
35fc36a8 14392 sym.st_target_internal = 0;
6e0b88f1 14393 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14394}
4e617b1e 14395
da5938a2 14396static bfd_boolean
8029a119
NC		 14397arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14398 void * in_arg)
da5938a2
NC		 14399{
14400 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14401 asection *stub_sec;
14402 bfd_vma addr;
7413f23f 14403 char *stub_name;
9a008db3 14404 output_arch_syminfo *osi;
d3ce72d0 14405 const insn_sequence *template_sequence;
461a49ca
DJ		 14406 enum stub_insn_type prev_type;
14407 int size;
14408 int i;
14409 enum map_symbol_type sym_type;
da5938a2
NC		 14410
14411 /* Massage our args to the form they really have. */
14412 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14413 osi = (output_arch_syminfo *) in_arg;
da5938a2 14414
da5938a2
NC		 14415 stub_sec = stub_entry->stub_sec;
14416
14417 /* Ensure this stub is attached to the current section being
7413f23f 14418 processed. */
da5938a2
NC		 14419 if (stub_sec != osi->sec)
14420 return TRUE;
14421
7413f23f
DJ		 14422 addr = (bfd_vma) stub_entry->stub_offset;
14423 stub_name = stub_entry->output_name;
da5938a2 14424
d3ce72d0
NC		 14425 template_sequence = stub_entry->stub_template;
14426 switch (template_sequence[0].type)
7413f23f 14427 {
461a49ca
DJ		 14428 case ARM_TYPE:
14429 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14430 return FALSE;
14431 break;
461a49ca 14432 case THUMB16_TYPE:
48229727 14433 case THUMB32_TYPE:
461a49ca
DJ		 14434 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14435 stub_entry->stub_size))
da5938a2
NC		 14436 return FALSE;
14437 break;
14438 default:
14439 BFD_FAIL ();
48229727 14440 return 0;
7413f23f 14441 }
da5938a2 14442
461a49ca
DJ		 14443 prev_type = DATA_TYPE;
14444 size = 0;
14445 for (i = 0; i < stub_entry->stub_template_size; i++)
14446 {
d3ce72d0 14447 switch (template_sequence[i].type)
461a49ca
DJ		 14448 {
14449 case ARM_TYPE:
14450 sym_type = ARM_MAP_ARM;
14451 break;
14452
14453 case THUMB16_TYPE:
48229727 14454 case THUMB32_TYPE:
461a49ca
DJ		 14455 sym_type = ARM_MAP_THUMB;
14456 break;
14457
14458 case DATA_TYPE:
14459 sym_type = ARM_MAP_DATA;
14460 break;
14461
14462 default:
14463 BFD_FAIL ();
4e31c731 14464 return FALSE;
461a49ca
DJ		 14465 }
14466
d3ce72d0 14467 if (template_sequence[i].type != prev_type)
461a49ca 14468 {
d3ce72d0 14469 prev_type = template_sequence[i].type;
461a49ca
DJ		 14470 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14471 return FALSE;
14472 }
14473
d3ce72d0 14474 switch (template_sequence[i].type)
461a49ca
DJ		 14475 {
14476 case ARM_TYPE:
48229727 14477 case THUMB32_TYPE:
461a49ca
DJ		 14478 size += 4;
14479 break;
14480
14481 case THUMB16_TYPE:
14482 size += 2;
14483 break;
14484
14485 case DATA_TYPE:
14486 size += 4;
14487 break;
14488
14489 default:
14490 BFD_FAIL ();
4e31c731 14491 return FALSE;
461a49ca
DJ		 14492 }
14493 }
14494
da5938a2
NC		 14495 return TRUE;
14496}
14497
33811162
DG		 14498/* Output mapping symbols for linker generated sections,
14499 and for those data-only sections that do not have a
14500 $d. */
4e617b1e
PB		 14501
14502static bfd_boolean
14503elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 14504 struct bfd_link_info *info,
14505 void *finfo,
6e0b88f1
AM		 14506 int (*func) (void *, const char *,
14507 Elf_Internal_Sym *,
14508 asection *,
14509 struct elf_link_hash_entry *))
4e617b1e
PB		 14510{
14511 output_arch_syminfo osi;
14512 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 14513 bfd_vma offset;
14514 bfd_size_type size;
33811162 14515 bfd *input_bfd;
4e617b1e
PB		 14516
14517 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14518 if (htab == NULL)
14519 return FALSE;
14520
906e58ca 14521 check_use_blx (htab);
91a5743d 14522
4e617b1e
PB		 14523 osi.finfo = finfo;
14524 osi.info = info;
14525 osi.func = func;
906e58ca 14526
33811162
DG		 14527 /* Add a $d mapping symbol to data-only sections that
14528 don't have any mapping symbol. This may result in (harmless) redundant
14529 mapping symbols. */
14530 for (input_bfd = info->input_bfds;
14531 input_bfd != NULL;
14532 input_bfd = input_bfd->link_next)
14533 {
14534 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14535 for (osi.sec = input_bfd->sections;
14536 osi.sec != NULL;
14537 osi.sec = osi.sec->next)
14538 {
14539 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 14540 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14541 != 0)
33811162
DG		 14542 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14543 == SEC_HAS_CONTENTS
14544 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 14545 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 14546 && osi.sec->size > 0
14547 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 14548 {
14549 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14550 (output_bfd, osi.sec->output_section);
14551 if (osi.sec_shndx != (int)SHN_BAD)
14552 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14553 }
14554 }
14555 }
14556
91a5743d
PB		 14557 /* ARM->Thumb glue. */
14558 if (htab->arm_glue_size > 0)
14559 {
14560 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14561 ARM2THUMB_GLUE_SECTION_NAME);
14562
14563 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14564 (output_bfd, osi.sec->output_section);
14565 if (info->shared || htab->root.is_relocatable_executable
14566 || htab->pic_veneer)
14567 size = ARM2THUMB_PIC_GLUE_SIZE;
14568 else if (htab->use_blx)
14569 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14570 else
14571 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 14572
91a5743d
PB		 14573 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14574 {
7413f23f
DJ		 14575 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14576 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 14577 }
14578 }
14579
14580 /* Thumb->ARM glue. */
14581 if (htab->thumb_glue_size > 0)
14582 {
14583 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14584 THUMB2ARM_GLUE_SECTION_NAME);
14585
14586 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14587 (output_bfd, osi.sec->output_section);
14588 size = THUMB2ARM_GLUE_SIZE;
14589
14590 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14591 {
7413f23f
DJ		 14592 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14593 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 14594 }
14595 }
14596
845b51d6
PB		 14597 /* ARMv4 BX veneers. */
14598 if (htab->bx_glue_size > 0)
14599 {
14600 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14601 ARM_BX_GLUE_SECTION_NAME);
14602
14603 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14604 (output_bfd, osi.sec->output_section);
14605
7413f23f 14606 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 14607 }
14608
8029a119
NC		 14609 /* Long calls stubs. */
14610 if (htab->stub_bfd && htab->stub_bfd->sections)
14611 {
da5938a2 14612 asection* stub_sec;
8029a119 14613
da5938a2
NC		 14614 for (stub_sec = htab->stub_bfd->sections;
14615 stub_sec != NULL;
8029a119
NC		 14616 stub_sec = stub_sec->next)
14617 {
14618 /* Ignore non-stub sections. */
14619 if (!strstr (stub_sec->name, STUB_SUFFIX))
14620 continue;
da5938a2 14621
8029a119 14622 osi.sec = stub_sec;
da5938a2 14623
8029a119
NC		 14624 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14625 (output_bfd, osi.sec->output_section);
da5938a2 14626
8029a119
NC		 14627 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14628 }
14629 }
da5938a2 14630
91a5743d 14631 /* Finally, output mapping symbols for the PLT. */
34e77a92 14632 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 14633 {
34e77a92
RS		 14634 osi.sec = htab->root.splt;
14635 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14636 (output_bfd, osi.sec->output_section));
14637
14638 /* Output mapping symbols for the plt header. SymbianOS does not have a
14639 plt header. */
14640 if (htab->vxworks_p)
14641 {
14642 /* VxWorks shared libraries have no PLT header. */
14643 if (!info->shared)
14644 {
14645 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14646 return FALSE;
14647 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14648 return FALSE;
14649 }
14650 }
14651 else if (!htab->symbian_p)
4e617b1e 14652 {
7413f23f 14653 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 14654 return FALSE;
34e77a92
RS		 14655#ifndef FOUR_WORD_PLT
14656 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 14657 return FALSE;
34e77a92 14658#endif
4e617b1e
PB		 14659 }
14660 }
34e77a92
RS		 14661 if ((htab->root.splt && htab->root.splt->size > 0)
14662 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 14663 {
34e77a92
RS		 14664 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14665 for (input_bfd = info->input_bfds;
14666 input_bfd != NULL;
14667 input_bfd = input_bfd->link_next)
14668 {
14669 struct arm_local_iplt_info **local_iplt;
14670 unsigned int i, num_syms;
4e617b1e 14671
34e77a92
RS		 14672 local_iplt = elf32_arm_local_iplt (input_bfd);
14673 if (local_iplt != NULL)
14674 {
14675 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14676 for (i = 0; i < num_syms; i++)
14677 if (local_iplt[i] != NULL
14678 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14679 &local_iplt[i]->root,
14680 &local_iplt[i]->arm))
14681 return FALSE;
14682 }
14683 }
14684 }
0855e32b
NS		 14685 if (htab->dt_tlsdesc_plt != 0)
14686 {
14687 /* Mapping symbols for the lazy tls trampoline. */
14688 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14689 return FALSE;
14690
14691 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14692 htab->dt_tlsdesc_plt + 24))
14693 return FALSE;
14694 }
14695 if (htab->tls_trampoline != 0)
14696 {
14697 /* Mapping symbols for the tls trampoline. */
14698 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14699 return FALSE;
14700#ifdef FOUR_WORD_PLT
14701 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14702 htab->tls_trampoline + 12))
14703 return FALSE;
14704#endif
14705 }
14706
4e617b1e
PB		 14707 return TRUE;
14708}
14709
e489d0ae
PB		 14710/* Allocate target specific section data. */
14711
14712static bfd_boolean
14713elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14714{
f592407e
AM		 14715 if (!sec->used_by_bfd)
14716 {
14717 _arm_elf_section_data *sdata;
14718 bfd_size_type amt = sizeof (*sdata);
e489d0ae 14719
21d799b5 14720 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 14721 if (sdata == NULL)
14722 return FALSE;
14723 sec->used_by_bfd = sdata;
14724 }
e489d0ae
PB		 14725
14726 return _bfd_elf_new_section_hook (abfd, sec);
14727}
14728
14729
14730/* Used to order a list of mapping symbols by address. */
14731
14732static int
14733elf32_arm_compare_mapping (const void * a, const void * b)
14734{
7f6a71ff
JM		 14735 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14736 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14737
14738 if (amap->vma > bmap->vma)
14739 return 1;
14740 else if (amap->vma < bmap->vma)
14741 return -1;
14742 else if (amap->type > bmap->type)
14743 /* Ensure results do not depend on the host qsort for objects with
14744 multiple mapping symbols at the same address by sorting on type
14745 after vma. */
14746 return 1;
14747 else if (amap->type < bmap->type)
14748 return -1;
14749 else
14750 return 0;
e489d0ae
PB		 14751}
14752
2468f9c9
PB		 14753/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
14754
14755static unsigned long
14756offset_prel31 (unsigned long addr, bfd_vma offset)
14757{
14758 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
14759}
14760
14761/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
14762 relocations. */
14763
14764static void
14765copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
14766{
14767 unsigned long first_word = bfd_get_32 (output_bfd, from);
14768 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
14769
14770 /* High bit of first word is supposed to be zero. */
14771 if ((first_word & 0x80000000ul) == 0)
14772 first_word = offset_prel31 (first_word, offset);
14773
14774 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
14775 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
14776 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
14777 second_word = offset_prel31 (second_word, offset);
14778
14779 bfd_put_32 (output_bfd, first_word, to);
14780 bfd_put_32 (output_bfd, second_word, to + 4);
14781}
e489d0ae 14782
48229727
JB		 14783/* Data for make_branch_to_a8_stub(). */
14784
14785struct a8_branch_to_stub_data {
14786 asection *writing_section;
14787 bfd_byte *contents;
14788};
14789
14790
14791/* Helper to insert branches to Cortex-A8 erratum stubs in the right
14792 places for a particular section. */
14793
14794static bfd_boolean
14795make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
14796 void *in_arg)
14797{
14798 struct elf32_arm_stub_hash_entry *stub_entry;
14799 struct a8_branch_to_stub_data *data;
14800 bfd_byte *contents;
14801 unsigned long branch_insn;
14802 bfd_vma veneered_insn_loc, veneer_entry_loc;
14803 bfd_signed_vma branch_offset;
14804 bfd *abfd;
91d6fa6a 14805 unsigned int target;
48229727
JB		 14806
14807 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14808 data = (struct a8_branch_to_stub_data *) in_arg;
14809
14810 if (stub_entry->target_section != data->writing_section
4563a860 14811 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 14812 return TRUE;
14813
14814 contents = data->contents;
14815
14816 veneered_insn_loc = stub_entry->target_section->output_section->vma
14817 + stub_entry->target_section->output_offset
14818 + stub_entry->target_value;
14819
14820 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
14821 + stub_entry->stub_sec->output_offset
14822 + stub_entry->stub_offset;
14823
14824 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
14825 veneered_insn_loc &= ~3u;
14826
14827 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
14828
14829 abfd = stub_entry->target_section->owner;
91d6fa6a 14830 target = stub_entry->target_value;
48229727
JB		 14831
14832 /* We attempt to avoid this condition by setting stubs_always_after_branch
14833 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
14834 This check is just to be on the safe side... */
14835 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
14836 {
14837 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
14838 "allocated in unsafe location"), abfd);
14839 return FALSE;
14840 }
14841
14842 switch (stub_entry->stub_type)
14843 {
14844 case arm_stub_a8_veneer_b:
14845 case arm_stub_a8_veneer_b_cond:
14846 branch_insn = 0xf0009000;
14847 goto jump24;
14848
14849 case arm_stub_a8_veneer_blx:
14850 branch_insn = 0xf000e800;
14851 goto jump24;
14852
14853 case arm_stub_a8_veneer_bl:
14854 {
14855 unsigned int i1, j1, i2, j2, s;
14856
14857 branch_insn = 0xf000d000;
14858
14859 jump24:
14860 if (branch_offset < -16777216 || branch_offset > 16777214)
14861 {
14862 /* There's not much we can do apart from complain if this
14863 happens. */
14864 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
14865 "of range (input file too large)"), abfd);
14866 return FALSE;
14867 }
14868
14869 /* i1 = not(j1 eor s), so:
14870 not i1 = j1 eor s
14871 j1 = (not i1) eor s. */
14872
14873 branch_insn |= (branch_offset >> 1) & 0x7ff;
14874 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
14875 i2 = (branch_offset >> 22) & 1;
14876 i1 = (branch_offset >> 23) & 1;
14877 s = (branch_offset >> 24) & 1;
14878 j1 = (!i1) ^ s;
14879 j2 = (!i2) ^ s;
14880 branch_insn |= j2 << 11;
14881 branch_insn |= j1 << 13;
14882 branch_insn |= s << 26;
14883 }
14884 break;
14885
14886 default:
14887 BFD_FAIL ();
14888 return FALSE;
14889 }
14890
91d6fa6a
NC		 14891 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
14892 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 14893
14894 return TRUE;
14895}
14896
e489d0ae
PB		 14897/* Do code byteswapping. Return FALSE afterwards so that the section is
14898 written out as normal. */
14899
14900static bfd_boolean
c7b8f16e 14901elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 14902 struct bfd_link_info *link_info,
14903 asection *sec,
e489d0ae
PB		 14904 bfd_byte *contents)
14905{
48229727 14906 unsigned int mapcount, errcount;
8e3de13a 14907 _arm_elf_section_data *arm_data;
c7b8f16e 14908 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 14909 elf32_arm_section_map *map;
c7b8f16e 14910 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 14911 bfd_vma ptr;
14912 bfd_vma end;
c7b8f16e 14913 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 14914 bfd_byte tmp;
48229727 14915 unsigned int i;
57e8b36a 14916
4dfe6ac6
NC		 14917 if (globals == NULL)
14918 return FALSE;
14919
8e3de13a
NC		 14920 /* If this section has not been allocated an _arm_elf_section_data
14921 structure then we cannot record anything. */
14922 arm_data = get_arm_elf_section_data (sec);
14923 if (arm_data == NULL)
14924 return FALSE;
14925
14926 mapcount = arm_data->mapcount;
14927 map = arm_data->map;
c7b8f16e
JB		 14928 errcount = arm_data->erratumcount;
14929
14930 if (errcount != 0)
14931 {
14932 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
14933
14934 for (errnode = arm_data->erratumlist; errnode != 0;
14935 errnode = errnode->next)
14936 {
91d6fa6a 14937 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 14938
14939 switch (errnode->type)
14940 {
14941 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
14942 {
14943 bfd_vma branch_to_veneer;
14944 /* Original condition code of instruction, plus bit mask for
14945 ARM B instruction. */
14946 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
14947 | 0x0a000000;
14948
14949 /* The instruction is before the label. */
91d6fa6a 14950 target -= 4;
c7b8f16e
JB		 14951
14952 /* Above offset included in -4 below. */
14953 branch_to_veneer = errnode->u.b.veneer->vma
14954 - errnode->vma - 4;
14955
14956 if ((signed) branch_to_veneer < -(1 << 25)
14957 || (signed) branch_to_veneer >= (1 << 25))
14958 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14959 "range"), output_bfd);
14960
14961 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 14962 contents[endianflip ^ target] = insn & 0xff;
14963 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14964 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14965 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14966 }
14967 break;
14968
14969 case VFP11_ERRATUM_ARM_VENEER:
14970 {
14971 bfd_vma branch_from_veneer;
14972 unsigned int insn;
14973
14974 /* Take size of veneer into account. */
14975 branch_from_veneer = errnode->u.v.branch->vma
14976 - errnode->vma - 12;
14977
14978 if ((signed) branch_from_veneer < -(1 << 25)
14979 || (signed) branch_from_veneer >= (1 << 25))
14980 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14981 "range"), output_bfd);
14982
14983 /* Original instruction. */
14984 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 14985 contents[endianflip ^ target] = insn & 0xff;
14986 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14987 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14988 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14989
14990 /* Branch back to insn after original insn. */
14991 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 14992 contents[endianflip ^ (target + 4)] = insn & 0xff;
14993 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
14994 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
14995 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14996 }
14997 break;
14998
14999 default:
15000 abort ();
15001 }
15002 }
15003 }
e489d0ae 15004
2468f9c9
PB		 15005 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15006 {
15007 arm_unwind_table_edit *edit_node
15008 = arm_data->u.exidx.unwind_edit_list;
15009 /* Now, sec->size is the size of the section we will write. The original
15010 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15011 markers) was sec->rawsize. (This isn't the case if we perform no
15012 edits, then rawsize will be zero and we should use size). */
21d799b5 15013 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15014 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15015 unsigned int in_index, out_index;
15016 bfd_vma add_to_offsets = 0;
15017
15018 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15019 {
15020 if (edit_node)
15021 {
15022 unsigned int edit_index = edit_node->index;
15023
15024 if (in_index < edit_index && in_index * 8 < input_size)
15025 {
15026 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15027 contents + in_index * 8, add_to_offsets);
15028 out_index++;
15029 in_index++;
15030 }
15031 else if (in_index == edit_index
15032 || (in_index * 8 >= input_size
15033 && edit_index == UINT_MAX))
15034 {
15035 switch (edit_node->type)
15036 {
15037 case DELETE_EXIDX_ENTRY:
15038 in_index++;
15039 add_to_offsets += 8;
15040 break;
15041
15042 case INSERT_EXIDX_CANTUNWIND_AT_END:
15043 {
15044 asection *text_sec = edit_node->linked_section;
15045 bfd_vma text_offset = text_sec->output_section->vma
15046 + text_sec->output_offset
15047 + text_sec->size;
15048 bfd_vma exidx_offset = offset + out_index * 8;
15049 unsigned long prel31_offset;
15050
15051 /* Note: this is meant to be equivalent to an
15052 R_ARM_PREL31 relocation. These synthetic
15053 EXIDX_CANTUNWIND markers are not relocated by the
15054 usual BFD method. */
15055 prel31_offset = (text_offset - exidx_offset)
15056 & 0x7ffffffful;
15057
15058 /* First address we can't unwind. */
15059 bfd_put_32 (output_bfd, prel31_offset,
15060 &edited_contents[out_index * 8]);
15061
15062 /* Code for EXIDX_CANTUNWIND. */
15063 bfd_put_32 (output_bfd, 0x1,
15064 &edited_contents[out_index * 8 + 4]);
15065
15066 out_index++;
15067 add_to_offsets -= 8;
15068 }
15069 break;
15070 }
15071
15072 edit_node = edit_node->next;
15073 }
15074 }
15075 else
15076 {
15077 /* No more edits, copy remaining entries verbatim. */
15078 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15079 contents + in_index * 8, add_to_offsets);
15080 out_index++;
15081 in_index++;
15082 }
15083 }
15084
15085 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15086 bfd_set_section_contents (output_bfd, sec->output_section,
15087 edited_contents,
15088 (file_ptr) sec->output_offset, sec->size);
15089
15090 return TRUE;
15091 }
15092
48229727
JB		 15093 /* Fix code to point to Cortex-A8 erratum stubs. */
15094 if (globals->fix_cortex_a8)
15095 {
15096 struct a8_branch_to_stub_data data;
15097
15098 data.writing_section = sec;
15099 data.contents = contents;
15100
15101 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15102 &data);
15103 }
15104
e489d0ae
PB		 15105 if (mapcount == 0)
15106 return FALSE;
15107
c7b8f16e 15108 if (globals->byteswap_code)
e489d0ae 15109 {
c7b8f16e 15110 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15111
c7b8f16e
JB		 15112 ptr = map[0].vma;
15113 for (i = 0; i < mapcount; i++)
15114 {
15115 if (i == mapcount - 1)
15116 end = sec->size;
15117 else
15118 end = map[i + 1].vma;
e489d0ae 15119
c7b8f16e 15120 switch (map[i].type)
e489d0ae 15121 {
c7b8f16e
JB		 15122 case 'a':
15123 /* Byte swap code words. */
15124 while (ptr + 3 < end)
15125 {
15126 tmp = contents[ptr];
15127 contents[ptr] = contents[ptr + 3];
15128 contents[ptr + 3] = tmp;
15129 tmp = contents[ptr + 1];
15130 contents[ptr + 1] = contents[ptr + 2];
15131 contents[ptr + 2] = tmp;
15132 ptr += 4;
15133 }
15134 break;
e489d0ae 15135
c7b8f16e
JB		 15136 case 't':
15137 /* Byte swap code halfwords. */
15138 while (ptr + 1 < end)
15139 {
15140 tmp = contents[ptr];
15141 contents[ptr] = contents[ptr + 1];
15142 contents[ptr + 1] = tmp;
15143 ptr += 2;
15144 }
15145 break;
15146
15147 case 'd':
15148 /* Leave data alone. */
15149 break;
15150 }
15151 ptr = end;
15152 }
e489d0ae 15153 }
8e3de13a 15154
93204d3a 15155 free (map);
47b2e99c 15156 arm_data->mapcount = -1;
c7b8f16e 15157 arm_data->mapsize = 0;
8e3de13a 15158 arm_data->map = NULL;
8e3de13a 15159
e489d0ae
PB		 15160 return FALSE;
15161}
15162
0beaef2b
PB		 15163/* Mangle thumb function symbols as we read them in. */
15164
8384fb8f 15165static bfd_boolean
0beaef2b
PB		 15166elf32_arm_swap_symbol_in (bfd * abfd,
15167 const void *psrc,
15168 const void *pshn,
15169 Elf_Internal_Sym *dst)
15170{
8384fb8f
AM		 15171 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15172 return FALSE;
0beaef2b
PB		 15173
15174 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15175 the address. */
63e1a0fc
PB		 15176 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15177 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15178 {
63e1a0fc
PB		 15179 if (dst->st_value & 1)
15180 {
15181 dst->st_value &= ~(bfd_vma) 1;
15182 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15183 }
15184 else
15185 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15186 }
15187 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15188 {
15189 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15190 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15191 }
35fc36a8
RS		 15192 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15193 dst->st_target_internal = ST_BRANCH_LONG;
15194 else
63e1a0fc 15195 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15196
8384fb8f 15197 return TRUE;
0beaef2b
PB		 15198}
15199
15200
15201/* Mangle thumb function symbols as we write them out. */
15202
15203static void
15204elf32_arm_swap_symbol_out (bfd *abfd,
15205 const Elf_Internal_Sym *src,
15206 void *cdst,
15207 void *shndx)
15208{
15209 Elf_Internal_Sym newsym;
15210
15211 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15212 of the address set, as per the new EABI. We do this unconditionally
15213 because objcopy does not set the elf header flags until after
15214 it writes out the symbol table. */
35fc36a8 15215 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15216 {
15217 newsym = *src;
34e77a92
RS		 15218 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15219 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 15220 if (newsym.st_shndx != SHN_UNDEF)
15221 {
15222 /* Do this only for defined symbols. At link type, the static
15223 linker will simulate the work of dynamic linker of resolving
15224 symbols and will carry over the thumbness of found symbols to
15225 the output symbol table. It's not clear how it happens, but
b0fead2b 15226 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 15227 runtime, and writing '1' for them will be confusing for users
15228 and possibly for dynamic linker itself.
15229 */
15230 newsym.st_value |= 1;
15231 }
906e58ca 15232
0beaef2b
PB		 15233 src = &newsym;
15234 }
15235 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15236}
15237
b294bdf8
MM		 15238/* Add the PT_ARM_EXIDX program header. */
15239
15240static bfd_boolean
906e58ca 15241elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15242 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15243{
15244 struct elf_segment_map *m;
15245 asection *sec;
15246
15247 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15248 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15249 {
15250 /* If there is already a PT_ARM_EXIDX header, then we do not
15251 want to add another one. This situation arises when running
15252 "strip"; the input binary already has the header. */
15253 m = elf_tdata (abfd)->segment_map;
15254 while (m && m->p_type != PT_ARM_EXIDX)
15255 m = m->next;
15256 if (!m)
15257 {
21d799b5
NC		 15258 m = (struct elf_segment_map *)
15259 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15260 if (m == NULL)
15261 return FALSE;
15262 m->p_type = PT_ARM_EXIDX;
15263 m->count = 1;
15264 m->sections[0] = sec;
15265
15266 m->next = elf_tdata (abfd)->segment_map;
15267 elf_tdata (abfd)->segment_map = m;
15268 }
15269 }
15270
15271 return TRUE;
15272}
15273
15274/* We may add a PT_ARM_EXIDX program header. */
15275
15276static int
a6b96beb
AM		 15277elf32_arm_additional_program_headers (bfd *abfd,
15278 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15279{
15280 asection *sec;
15281
15282 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15283 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15284 return 1;
15285 else
15286 return 0;
15287}
15288
34e77a92
RS		 15289/* Hook called by the linker routine which adds symbols from an object
15290 file. */
15291
15292static bfd_boolean
15293elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15294 Elf_Internal_Sym *sym, const char **namep,
15295 flagword *flagsp, asection **secp, bfd_vma *valp)
15296{
15297 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15298 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15299 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15300 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92
RS		 15301
15302 if (elf32_arm_hash_table (info)->vxworks_p
15303 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15304 flagsp, secp, valp))
15305 return FALSE;
15306
15307 return TRUE;
15308}
15309
0beaef2b 15310/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15311const struct elf_size_info elf32_arm_size_info =
15312{
0beaef2b
PB		 15313 sizeof (Elf32_External_Ehdr),
15314 sizeof (Elf32_External_Phdr),
15315 sizeof (Elf32_External_Shdr),
15316 sizeof (Elf32_External_Rel),
15317 sizeof (Elf32_External_Rela),
15318 sizeof (Elf32_External_Sym),
15319 sizeof (Elf32_External_Dyn),
15320 sizeof (Elf_External_Note),
15321 4,
15322 1,
15323 32, 2,
15324 ELFCLASS32, EV_CURRENT,
15325 bfd_elf32_write_out_phdrs,
15326 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15327 bfd_elf32_checksum_contents,
0beaef2b
PB		 15328 bfd_elf32_write_relocs,
15329 elf32_arm_swap_symbol_in,
15330 elf32_arm_swap_symbol_out,
15331 bfd_elf32_slurp_reloc_table,
15332 bfd_elf32_slurp_symbol_table,
15333 bfd_elf32_swap_dyn_in,
15334 bfd_elf32_swap_dyn_out,
15335 bfd_elf32_swap_reloc_in,
15336 bfd_elf32_swap_reloc_out,
15337 bfd_elf32_swap_reloca_in,
15338 bfd_elf32_swap_reloca_out
15339};
15340
252b5132 15341#define ELF_ARCH bfd_arch_arm
ae95ffa6 15342#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 15343#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 15344#ifdef __QNXTARGET__
15345#define ELF_MAXPAGESIZE 0x1000
15346#else
f21f3fe0 15347#define ELF_MAXPAGESIZE 0x8000
d0facd1b 15348#endif
b1342370 15349#define ELF_MINPAGESIZE 0x1000
24718e3b 15350#define ELF_COMMONPAGESIZE 0x1000
252b5132 15351
ba93b8ac
DJ		 15352#define bfd_elf32_mkobject elf32_arm_mkobject
15353
99e4ae17
AJ		 15354#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15355#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 15356#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15357#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15358#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 15359#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 15360#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 15361#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 15362#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 15363#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 15364#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 15365#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 15366#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 15367
15368#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15369#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 15370#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 15371#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15372#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 15373#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 15374#define elf_backend_write_section elf32_arm_write_section
252b5132 15375#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 15376#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 15377#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15378#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15379#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 15380#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 15381#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 15382#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 15383#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 15384#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 15385#define elf_backend_fake_sections elf32_arm_fake_sections
15386#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 15387#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 15388#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 15389#define elf_backend_size_info elf32_arm_size_info
b294bdf8 15390#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 15391#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15392#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15393#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 15394#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 15395
15396#define elf_backend_can_refcount 1
15397#define elf_backend_can_gc_sections 1
15398#define elf_backend_plt_readonly 1
15399#define elf_backend_want_got_plt 1
15400#define elf_backend_want_plt_sym 0
15401#define elf_backend_may_use_rel_p 1
15402#define elf_backend_may_use_rela_p 0
4e7fd91e 15403#define elf_backend_default_use_rela_p 0
252b5132 15404
04f7c78d 15405#define elf_backend_got_header_size 12
04f7c78d 15406
906e58ca
NC		 15407#undef elf_backend_obj_attrs_vendor
15408#define elf_backend_obj_attrs_vendor "aeabi"
15409#undef elf_backend_obj_attrs_section
15410#define elf_backend_obj_attrs_section ".ARM.attributes"
15411#undef elf_backend_obj_attrs_arg_type
15412#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15413#undef elf_backend_obj_attrs_section_type
104d59d1 15414#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 15415#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
e8b36cd1 15416#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 15417
252b5132 15418#include "elf32-target.h"
7f266840 15419
906e58ca 15420/* VxWorks Targets. */
4e7fd91e 15421
906e58ca 15422#undef TARGET_LITTLE_SYM
4e7fd91e 15423#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 15424#undef TARGET_LITTLE_NAME
4e7fd91e 15425#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 15426#undef TARGET_BIG_SYM
4e7fd91e 15427#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 15428#undef TARGET_BIG_NAME
4e7fd91e
PB		 15429#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15430
15431/* Like elf32_arm_link_hash_table_create -- but overrides
15432 appropriately for VxWorks. */
906e58ca 15433
4e7fd91e
PB		 15434static struct bfd_link_hash_table *
15435elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15436{
15437 struct bfd_link_hash_table *ret;
15438
15439 ret = elf32_arm_link_hash_table_create (abfd);
15440 if (ret)
15441 {
15442 struct elf32_arm_link_hash_table *htab
00a97672 15443 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 15444 htab->use_rel = 0;
00a97672 15445 htab->vxworks_p = 1;
4e7fd91e
PB		 15446 }
15447 return ret;
906e58ca 15448}
4e7fd91e 15449
00a97672
RS		 15450static void
15451elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15452{
15453 elf32_arm_final_write_processing (abfd, linker);
15454 elf_vxworks_final_write_processing (abfd, linker);
15455}
15456
906e58ca 15457#undef elf32_bed
4e7fd91e
PB		 15458#define elf32_bed elf32_arm_vxworks_bed
15459
906e58ca
NC		 15460#undef bfd_elf32_bfd_link_hash_table_create
15461#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 15462#undef elf_backend_final_write_processing
15463#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15464#undef elf_backend_emit_relocs
15465#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 15466
906e58ca 15467#undef elf_backend_may_use_rel_p
00a97672 15468#define elf_backend_may_use_rel_p 0
906e58ca 15469#undef elf_backend_may_use_rela_p
00a97672 15470#define elf_backend_may_use_rela_p 1
906e58ca 15471#undef elf_backend_default_use_rela_p
00a97672 15472#define elf_backend_default_use_rela_p 1
906e58ca 15473#undef elf_backend_want_plt_sym
00a97672 15474#define elf_backend_want_plt_sym 1
906e58ca 15475#undef ELF_MAXPAGESIZE
00a97672 15476#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 15477
15478#include "elf32-target.h"
15479
15480
21d799b5
NC		 15481/* Merge backend specific data from an object file to the output
15482 object file when linking. */
15483
15484static bfd_boolean
15485elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15486{
15487 flagword out_flags;
15488 flagword in_flags;
15489 bfd_boolean flags_compatible = TRUE;
15490 asection *sec;
15491
cc643b88 15492 /* Check if we have the same endianness. */
21d799b5
NC		 15493 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15494 return FALSE;
15495
15496 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15497 return TRUE;
15498
15499 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15500 return FALSE;
15501
15502 /* The input BFD must have had its flags initialised. */
15503 /* The following seems bogus to me -- The flags are initialized in
15504 the assembler but I don't think an elf_flags_init field is
15505 written into the object. */
15506 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15507
15508 in_flags = elf_elfheader (ibfd)->e_flags;
15509 out_flags = elf_elfheader (obfd)->e_flags;
15510
15511 /* In theory there is no reason why we couldn't handle this. However
15512 in practice it isn't even close to working and there is no real
15513 reason to want it. */
15514 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15515 && !(ibfd->flags & DYNAMIC)
15516 && (in_flags & EF_ARM_BE8))
15517 {
15518 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15519 ibfd);
15520 return FALSE;
15521 }
15522
15523 if (!elf_flags_init (obfd))
15524 {
15525 /* If the input is the default architecture and had the default
15526 flags then do not bother setting the flags for the output
15527 architecture, instead allow future merges to do this. If no
15528 future merges ever set these flags then they will retain their
15529 uninitialised values, which surprise surprise, correspond
15530 to the default values. */
15531 if (bfd_get_arch_info (ibfd)->the_default
15532 && elf_elfheader (ibfd)->e_flags == 0)
15533 return TRUE;
15534
15535 elf_flags_init (obfd) = TRUE;
15536 elf_elfheader (obfd)->e_flags = in_flags;
15537
15538 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15539 && bfd_get_arch_info (obfd)->the_default)
15540 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15541
15542 return TRUE;
15543 }
15544
15545 /* Determine what should happen if the input ARM architecture
15546 does not match the output ARM architecture. */
15547 if (! bfd_arm_merge_machines (ibfd, obfd))
15548 return FALSE;
15549
15550 /* Identical flags must be compatible. */
15551 if (in_flags == out_flags)
15552 return TRUE;
15553
15554 /* Check to see if the input BFD actually contains any sections. If
15555 not, its flags may not have been initialised either, but it
15556 cannot actually cause any incompatiblity. Do not short-circuit
15557 dynamic objects; their section list may be emptied by
15558 elf_link_add_object_symbols.
15559
15560 Also check to see if there are no code sections in the input.
15561 In this case there is no need to check for code specific flags.
15562 XXX - do we need to worry about floating-point format compatability
15563 in data sections ? */
15564 if (!(ibfd->flags & DYNAMIC))
15565 {
15566 bfd_boolean null_input_bfd = TRUE;
15567 bfd_boolean only_data_sections = TRUE;
15568
15569 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15570 {
15571 /* Ignore synthetic glue sections. */
15572 if (strcmp (sec->name, ".glue_7")
15573 && strcmp (sec->name, ".glue_7t"))
15574 {
15575 if ((bfd_get_section_flags (ibfd, sec)
15576 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15577 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15578 only_data_sections = FALSE;
15579
15580 null_input_bfd = FALSE;
15581 break;
15582 }
15583 }
15584
15585 if (null_input_bfd || only_data_sections)
15586 return TRUE;
15587 }
15588
15589 /* Complain about various flag mismatches. */
15590 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15591 EF_ARM_EABI_VERSION (out_flags)))
15592 {
15593 _bfd_error_handler
15594 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15595 ibfd, obfd,
15596 (in_flags & EF_ARM_EABIMASK) >> 24,
15597 (out_flags & EF_ARM_EABIMASK) >> 24);
15598 return FALSE;
15599 }
15600
15601 /* Not sure what needs to be checked for EABI versions >= 1. */
15602 /* VxWorks libraries do not use these flags. */
15603 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15604 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15605 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15606 {
15607 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15608 {
15609 _bfd_error_handler
15610 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15611 ibfd, obfd,
15612 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15613 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15614 flags_compatible = FALSE;
15615 }
15616
15617 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15618 {
15619 if (in_flags & EF_ARM_APCS_FLOAT)
15620 _bfd_error_handler
15621 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15622 ibfd, obfd);
15623 else
15624 _bfd_error_handler
15625 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15626 ibfd, obfd);
15627
15628 flags_compatible = FALSE;
15629 }
15630
15631 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15632 {
15633 if (in_flags & EF_ARM_VFP_FLOAT)
15634 _bfd_error_handler
15635 (_("error: %B uses VFP instructions, whereas %B does not"),
15636 ibfd, obfd);
15637 else
15638 _bfd_error_handler
15639 (_("error: %B uses FPA instructions, whereas %B does not"),
15640 ibfd, obfd);
15641
15642 flags_compatible = FALSE;
15643 }
15644
15645 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
15646 {
15647 if (in_flags & EF_ARM_MAVERICK_FLOAT)
15648 _bfd_error_handler
15649 (_("error: %B uses Maverick instructions, whereas %B does not"),
15650 ibfd, obfd);
15651 else
15652 _bfd_error_handler
15653 (_("error: %B does not use Maverick instructions, whereas %B does"),
15654 ibfd, obfd);
15655
15656 flags_compatible = FALSE;
15657 }
15658
15659#ifdef EF_ARM_SOFT_FLOAT
15660 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
15661 {
15662 /* We can allow interworking between code that is VFP format
15663 layout, and uses either soft float or integer regs for
15664 passing floating point arguments and results. We already
15665 know that the APCS_FLOAT flags match; similarly for VFP
15666 flags. */
15667 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
15668 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
15669 {
15670 if (in_flags & EF_ARM_SOFT_FLOAT)
15671 _bfd_error_handler
15672 (_("error: %B uses software FP, whereas %B uses hardware FP"),
15673 ibfd, obfd);
15674 else
15675 _bfd_error_handler
15676 (_("error: %B uses hardware FP, whereas %B uses software FP"),
15677 ibfd, obfd);
15678
15679 flags_compatible = FALSE;
15680 }
15681 }
15682#endif
15683
15684 /* Interworking mismatch is only a warning. */
15685 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
15686 {
15687 if (in_flags & EF_ARM_INTERWORK)
15688 {
15689 _bfd_error_handler
15690 (_("Warning: %B supports interworking, whereas %B does not"),
15691 ibfd, obfd);
15692 }
15693 else
15694 {
15695 _bfd_error_handler
15696 (_("Warning: %B does not support interworking, whereas %B does"),
15697 ibfd, obfd);
15698 }
15699 }
15700 }
15701
15702 return flags_compatible;
15703}
15704
15705
906e58ca 15706/* Symbian OS Targets. */
7f266840 15707
906e58ca 15708#undef TARGET_LITTLE_SYM
7f266840 15709#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 15710#undef TARGET_LITTLE_NAME
7f266840 15711#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 15712#undef TARGET_BIG_SYM
7f266840 15713#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 15714#undef TARGET_BIG_NAME
7f266840
DJ		 15715#define TARGET_BIG_NAME "elf32-bigarm-symbian"
15716
15717/* Like elf32_arm_link_hash_table_create -- but overrides
15718 appropriately for Symbian OS. */
906e58ca 15719
7f266840
DJ		 15720static struct bfd_link_hash_table *
15721elf32_arm_symbian_link_hash_table_create (bfd *abfd)
15722{
15723 struct bfd_link_hash_table *ret;
15724
15725 ret = elf32_arm_link_hash_table_create (abfd);
15726 if (ret)
15727 {
15728 struct elf32_arm_link_hash_table *htab
15729 = (struct elf32_arm_link_hash_table *)ret;
15730 /* There is no PLT header for Symbian OS. */
15731 htab->plt_header_size = 0;
95720a86
DJ		 15732 /* The PLT entries are each one instruction and one word. */
15733 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 15734 htab->symbian_p = 1;
33bfe774
JB		 15735 /* Symbian uses armv5t or above, so use_blx is always true. */
15736 htab->use_blx = 1;
67687978 15737 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 15738 }
15739 return ret;
906e58ca 15740}
7f266840 15741
b35d266b 15742static const struct bfd_elf_special_section
551b43fd 15743elf32_arm_symbian_special_sections[] =
7f266840 15744{
5cd3778d
MM		 15745 /* In a BPABI executable, the dynamic linking sections do not go in
15746 the loadable read-only segment. The post-linker may wish to
15747 refer to these sections, but they are not part of the final
15748 program image. */
0112cd26
NC		 15749 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
15750 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
15751 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
15752 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
15753 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 15754 /* These sections do not need to be writable as the SymbianOS
15755 postlinker will arrange things so that no dynamic relocation is
15756 required. */
0112cd26
NC		 15757 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
15758 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
15759 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
15760 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 15761};
15762
c3c76620 15763static void
906e58ca 15764elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 15765 struct bfd_link_info *link_info)
c3c76620
MM		 15766{
15767 /* BPABI objects are never loaded directly by an OS kernel; they are
15768 processed by a postlinker first, into an OS-specific format. If
15769 the D_PAGED bit is set on the file, BFD will align segments on
15770 page boundaries, so that an OS can directly map the file. With
15771 BPABI objects, that just results in wasted space. In addition,
15772 because we clear the D_PAGED bit, map_sections_to_segments will
15773 recognize that the program headers should not be mapped into any
15774 loadable segment. */
15775 abfd->flags &= ~D_PAGED;
906e58ca 15776 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 15777}
7f266840
DJ		 15778
15779static bfd_boolean
906e58ca 15780elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 15781 struct bfd_link_info *info)
7f266840
DJ		 15782{
15783 struct elf_segment_map *m;
15784 asection *dynsec;
15785
7f266840
DJ		 15786 /* BPABI shared libraries and executables should have a PT_DYNAMIC
15787 segment. However, because the .dynamic section is not marked
15788 with SEC_LOAD, the generic ELF code will not create such a
15789 segment. */
15790 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
15791 if (dynsec)
15792 {
8ded5a0f
AM		 15793 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
15794 if (m->p_type == PT_DYNAMIC)
15795 break;
15796
15797 if (m == NULL)
15798 {
15799 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
15800 m->next = elf_tdata (abfd)->segment_map;
15801 elf_tdata (abfd)->segment_map = m;
15802 }
7f266840
DJ		 15803 }
15804
b294bdf8
MM		 15805 /* Also call the generic arm routine. */
15806 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 15807}
15808
95720a86
DJ		 15809/* Return address for Ith PLT stub in section PLT, for relocation REL
15810 or (bfd_vma) -1 if it should not be included. */
15811
15812static bfd_vma
15813elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
15814 const arelent *rel ATTRIBUTE_UNUSED)
15815{
15816 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
15817}
15818
15819
8029a119 15820#undef elf32_bed
7f266840
DJ		 15821#define elf32_bed elf32_arm_symbian_bed
15822
15823/* The dynamic sections are not allocated on SymbianOS; the postlinker
15824 will process them and then discard them. */
906e58ca 15825#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 15826#define ELF_DYNAMIC_SEC_FLAGS \
15827 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
15828
00a97672 15829#undef elf_backend_emit_relocs
c3c76620 15830
906e58ca
NC		 15831#undef bfd_elf32_bfd_link_hash_table_create
15832#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
15833#undef elf_backend_special_sections
15834#define elf_backend_special_sections elf32_arm_symbian_special_sections
15835#undef elf_backend_begin_write_processing
15836#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
15837#undef elf_backend_final_write_processing
15838#define elf_backend_final_write_processing elf32_arm_final_write_processing
15839
15840#undef elf_backend_modify_segment_map
7f266840
DJ		 15841#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
15842
15843/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 15844#undef elf_backend_got_header_size
7f266840
DJ		 15845#define elf_backend_got_header_size 0
15846
15847/* Similarly, there is no .got.plt section. */
906e58ca 15848#undef elf_backend_want_got_plt
7f266840
DJ		 15849#define elf_backend_want_got_plt 0
15850
906e58ca 15851#undef elf_backend_plt_sym_val
95720a86
DJ		 15852#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
15853
906e58ca 15854#undef elf_backend_may_use_rel_p
00a97672 15855#define elf_backend_may_use_rel_p 1
906e58ca 15856#undef elf_backend_may_use_rela_p
00a97672 15857#define elf_backend_may_use_rela_p 0
906e58ca 15858#undef elf_backend_default_use_rela_p
00a97672 15859#define elf_backend_default_use_rela_p 0
906e58ca 15860#undef elf_backend_want_plt_sym
00a97672 15861#define elf_backend_want_plt_sym 0
906e58ca 15862#undef ELF_MAXPAGESIZE
00a97672 15863#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 15864
7f266840 15865#include "elf32-target.h"
GDB Binutils - Deliverables
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