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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
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252b5132 1/* 32-bit ELF support for ARM
e44a2c9c
AM		 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
7f266840 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
00a97672 24#include "libiberty.h"
7f266840
DJ		 25#include "libbfd.h"
26#include "elf-bfd.h"
00a97672 27#include "elf-vxworks.h"
ee065d83 28#include "elf/arm.h"
7f266840
DJ		 29
30#ifndef NUM_ELEM
31#define NUM_ELEM(a) (sizeof (a) / (sizeof (a)[0]))
32#endif
33
00a97672
RS		 34/* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36#define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39/* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41#define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46/* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48#define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53/* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55#define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
7f266840
DJ		 60#define elf_info_to_howto 0
61#define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63#define ARM_ELF_ABI_VERSION 0
64#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
24718e3b 66static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 67
7f266840
DJ		 68/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
69 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
70 in that slot. */
71
c19d1205 72static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840
DJ		 73{
74 /* No relocation */
75 HOWTO (R_ARM_NONE, /* type */
76 0, /* rightshift */
77 0, /* size (0 = byte, 1 = short, 2 = long) */
78 0, /* bitsize */
79 FALSE, /* pc_relative */
80 0, /* bitpos */
81 complain_overflow_dont,/* complain_on_overflow */
82 bfd_elf_generic_reloc, /* special_function */
83 "R_ARM_NONE", /* name */
84 FALSE, /* partial_inplace */
85 0, /* src_mask */
86 0, /* dst_mask */
87 FALSE), /* pcrel_offset */
88
89 HOWTO (R_ARM_PC24, /* type */
90 2, /* rightshift */
91 2, /* size (0 = byte, 1 = short, 2 = long) */
92 24, /* bitsize */
93 TRUE, /* pc_relative */
94 0, /* bitpos */
95 complain_overflow_signed,/* complain_on_overflow */
96 bfd_elf_generic_reloc, /* special_function */
97 "R_ARM_PC24", /* name */
98 FALSE, /* partial_inplace */
99 0x00ffffff, /* src_mask */
100 0x00ffffff, /* dst_mask */
101 TRUE), /* pcrel_offset */
102
103 /* 32 bit absolute */
104 HOWTO (R_ARM_ABS32, /* type */
105 0, /* rightshift */
106 2, /* size (0 = byte, 1 = short, 2 = long) */
107 32, /* bitsize */
108 FALSE, /* pc_relative */
109 0, /* bitpos */
110 complain_overflow_bitfield,/* complain_on_overflow */
111 bfd_elf_generic_reloc, /* special_function */
112 "R_ARM_ABS32", /* name */
113 FALSE, /* partial_inplace */
114 0xffffffff, /* src_mask */
115 0xffffffff, /* dst_mask */
116 FALSE), /* pcrel_offset */
117
118 /* standard 32bit pc-relative reloc */
119 HOWTO (R_ARM_REL32, /* type */
120 0, /* rightshift */
121 2, /* size (0 = byte, 1 = short, 2 = long) */
122 32, /* bitsize */
123 TRUE, /* pc_relative */
124 0, /* bitpos */
125 complain_overflow_bitfield,/* complain_on_overflow */
126 bfd_elf_generic_reloc, /* special_function */
127 "R_ARM_REL32", /* name */
128 FALSE, /* partial_inplace */
129 0xffffffff, /* src_mask */
130 0xffffffff, /* dst_mask */
131 TRUE), /* pcrel_offset */
132
c19d1205 133 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 134 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 135 0, /* rightshift */
136 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 137 32, /* bitsize */
138 TRUE, /* pc_relative */
7f266840 139 0, /* bitpos */
4962c51a 140 complain_overflow_dont,/* complain_on_overflow */
7f266840 141 bfd_elf_generic_reloc, /* special_function */
4962c51a 142 "R_ARM_LDR_PC_G0", /* name */
7f266840 143 FALSE, /* partial_inplace */
4962c51a
MS		 144 0xffffffff, /* src_mask */
145 0xffffffff, /* dst_mask */
146 TRUE), /* pcrel_offset */
7f266840
DJ		 147
148 /* 16 bit absolute */
149 HOWTO (R_ARM_ABS16, /* type */
150 0, /* rightshift */
151 1, /* size (0 = byte, 1 = short, 2 = long) */
152 16, /* bitsize */
153 FALSE, /* pc_relative */
154 0, /* bitpos */
155 complain_overflow_bitfield,/* complain_on_overflow */
156 bfd_elf_generic_reloc, /* special_function */
157 "R_ARM_ABS16", /* name */
158 FALSE, /* partial_inplace */
159 0x0000ffff, /* src_mask */
160 0x0000ffff, /* dst_mask */
161 FALSE), /* pcrel_offset */
162
163 /* 12 bit absolute */
164 HOWTO (R_ARM_ABS12, /* type */
165 0, /* rightshift */
166 2, /* size (0 = byte, 1 = short, 2 = long) */
167 12, /* bitsize */
168 FALSE, /* pc_relative */
169 0, /* bitpos */
170 complain_overflow_bitfield,/* complain_on_overflow */
171 bfd_elf_generic_reloc, /* special_function */
172 "R_ARM_ABS12", /* name */
173 FALSE, /* partial_inplace */
00a97672
RS		 174 0x00000fff, /* src_mask */
175 0x00000fff, /* dst_mask */
7f266840
DJ		 176 FALSE), /* pcrel_offset */
177
178 HOWTO (R_ARM_THM_ABS5, /* type */
179 6, /* rightshift */
180 1, /* size (0 = byte, 1 = short, 2 = long) */
181 5, /* bitsize */
182 FALSE, /* pc_relative */
183 0, /* bitpos */
184 complain_overflow_bitfield,/* complain_on_overflow */
185 bfd_elf_generic_reloc, /* special_function */
186 "R_ARM_THM_ABS5", /* name */
187 FALSE, /* partial_inplace */
188 0x000007e0, /* src_mask */
189 0x000007e0, /* dst_mask */
190 FALSE), /* pcrel_offset */
191
192 /* 8 bit absolute */
193 HOWTO (R_ARM_ABS8, /* type */
194 0, /* rightshift */
195 0, /* size (0 = byte, 1 = short, 2 = long) */
196 8, /* bitsize */
197 FALSE, /* pc_relative */
198 0, /* bitpos */
199 complain_overflow_bitfield,/* complain_on_overflow */
200 bfd_elf_generic_reloc, /* special_function */
201 "R_ARM_ABS8", /* name */
202 FALSE, /* partial_inplace */
203 0x000000ff, /* src_mask */
204 0x000000ff, /* dst_mask */
205 FALSE), /* pcrel_offset */
206
207 HOWTO (R_ARM_SBREL32, /* type */
208 0, /* rightshift */
209 2, /* size (0 = byte, 1 = short, 2 = long) */
210 32, /* bitsize */
211 FALSE, /* pc_relative */
212 0, /* bitpos */
213 complain_overflow_dont,/* complain_on_overflow */
214 bfd_elf_generic_reloc, /* special_function */
215 "R_ARM_SBREL32", /* name */
216 FALSE, /* partial_inplace */
217 0xffffffff, /* src_mask */
218 0xffffffff, /* dst_mask */
219 FALSE), /* pcrel_offset */
220
c19d1205 221 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 222 1, /* rightshift */
223 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 224 25, /* bitsize */
7f266840
DJ		 225 TRUE, /* pc_relative */
226 0, /* bitpos */
227 complain_overflow_signed,/* complain_on_overflow */
228 bfd_elf_generic_reloc, /* special_function */
c19d1205 229 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 230 FALSE, /* partial_inplace */
231 0x07ff07ff, /* src_mask */
232 0x07ff07ff, /* dst_mask */
233 TRUE), /* pcrel_offset */
234
235 HOWTO (R_ARM_THM_PC8, /* type */
236 1, /* rightshift */
237 1, /* size (0 = byte, 1 = short, 2 = long) */
238 8, /* bitsize */
239 TRUE, /* pc_relative */
240 0, /* bitpos */
241 complain_overflow_signed,/* complain_on_overflow */
242 bfd_elf_generic_reloc, /* special_function */
243 "R_ARM_THM_PC8", /* name */
244 FALSE, /* partial_inplace */
245 0x000000ff, /* src_mask */
246 0x000000ff, /* dst_mask */
247 TRUE), /* pcrel_offset */
248
c19d1205 249 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 250 1, /* rightshift */
251 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 252 32, /* bitsize */
253 FALSE, /* pc_relative */
7f266840
DJ		 254 0, /* bitpos */
255 complain_overflow_signed,/* complain_on_overflow */
256 bfd_elf_generic_reloc, /* special_function */
c19d1205 257 "R_ARM_BREL_ADJ", /* name */
7f266840 258 FALSE, /* partial_inplace */
c19d1205
ZW		 259 0xffffffff, /* src_mask */
260 0xffffffff, /* dst_mask */
261 FALSE), /* pcrel_offset */
7f266840
DJ		 262
263 HOWTO (R_ARM_SWI24, /* type */
264 0, /* rightshift */
265 0, /* size (0 = byte, 1 = short, 2 = long) */
266 0, /* bitsize */
267 FALSE, /* pc_relative */
268 0, /* bitpos */
269 complain_overflow_signed,/* complain_on_overflow */
270 bfd_elf_generic_reloc, /* special_function */
271 "R_ARM_SWI24", /* name */
272 FALSE, /* partial_inplace */
273 0x00000000, /* src_mask */
274 0x00000000, /* dst_mask */
275 FALSE), /* pcrel_offset */
276
277 HOWTO (R_ARM_THM_SWI8, /* type */
278 0, /* rightshift */
279 0, /* size (0 = byte, 1 = short, 2 = long) */
280 0, /* bitsize */
281 FALSE, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_signed,/* complain_on_overflow */
284 bfd_elf_generic_reloc, /* special_function */
285 "R_ARM_SWI8", /* name */
286 FALSE, /* partial_inplace */
287 0x00000000, /* src_mask */
288 0x00000000, /* dst_mask */
289 FALSE), /* pcrel_offset */
290
291 /* BLX instruction for the ARM. */
292 HOWTO (R_ARM_XPC25, /* type */
293 2, /* rightshift */
294 2, /* size (0 = byte, 1 = short, 2 = long) */
295 25, /* bitsize */
296 TRUE, /* pc_relative */
297 0, /* bitpos */
298 complain_overflow_signed,/* complain_on_overflow */
299 bfd_elf_generic_reloc, /* special_function */
300 "R_ARM_XPC25", /* name */
301 FALSE, /* partial_inplace */
302 0x00ffffff, /* src_mask */
303 0x00ffffff, /* dst_mask */
304 TRUE), /* pcrel_offset */
305
306 /* BLX instruction for the Thumb. */
307 HOWTO (R_ARM_THM_XPC22, /* type */
308 2, /* rightshift */
309 2, /* size (0 = byte, 1 = short, 2 = long) */
310 22, /* bitsize */
311 TRUE, /* pc_relative */
312 0, /* bitpos */
313 complain_overflow_signed,/* complain_on_overflow */
314 bfd_elf_generic_reloc, /* special_function */
315 "R_ARM_THM_XPC22", /* name */
316 FALSE, /* partial_inplace */
317 0x07ff07ff, /* src_mask */
318 0x07ff07ff, /* dst_mask */
319 TRUE), /* pcrel_offset */
320
ba93b8ac 321 /* Dynamic TLS relocations. */
7f266840 322
ba93b8ac
DJ		 323 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
324 0, /* rightshift */
325 2, /* size (0 = byte, 1 = short, 2 = long) */
326 32, /* bitsize */
327 FALSE, /* pc_relative */
328 0, /* bitpos */
329 complain_overflow_bitfield,/* complain_on_overflow */
330 bfd_elf_generic_reloc, /* special_function */
331 "R_ARM_TLS_DTPMOD32", /* name */
332 TRUE, /* partial_inplace */
333 0xffffffff, /* src_mask */
334 0xffffffff, /* dst_mask */
335 FALSE), /* pcrel_offset */
7f266840 336
ba93b8ac
DJ		 337 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
338 0, /* rightshift */
339 2, /* size (0 = byte, 1 = short, 2 = long) */
340 32, /* bitsize */
341 FALSE, /* pc_relative */
342 0, /* bitpos */
343 complain_overflow_bitfield,/* complain_on_overflow */
344 bfd_elf_generic_reloc, /* special_function */
345 "R_ARM_TLS_DTPOFF32", /* name */
346 TRUE, /* partial_inplace */
347 0xffffffff, /* src_mask */
348 0xffffffff, /* dst_mask */
349 FALSE), /* pcrel_offset */
7f266840 350
ba93b8ac
DJ		 351 HOWTO (R_ARM_TLS_TPOFF32, /* type */
352 0, /* rightshift */
353 2, /* size (0 = byte, 1 = short, 2 = long) */
354 32, /* bitsize */
355 FALSE, /* pc_relative */
356 0, /* bitpos */
357 complain_overflow_bitfield,/* complain_on_overflow */
358 bfd_elf_generic_reloc, /* special_function */
359 "R_ARM_TLS_TPOFF32", /* name */
360 TRUE, /* partial_inplace */
361 0xffffffff, /* src_mask */
362 0xffffffff, /* dst_mask */
363 FALSE), /* pcrel_offset */
7f266840
DJ		 364
365 /* Relocs used in ARM Linux */
366
367 HOWTO (R_ARM_COPY, /* type */
368 0, /* rightshift */
369 2, /* size (0 = byte, 1 = short, 2 = long) */
370 32, /* bitsize */
371 FALSE, /* pc_relative */
372 0, /* bitpos */
373 complain_overflow_bitfield,/* complain_on_overflow */
374 bfd_elf_generic_reloc, /* special_function */
375 "R_ARM_COPY", /* name */
376 TRUE, /* partial_inplace */
377 0xffffffff, /* src_mask */
378 0xffffffff, /* dst_mask */
379 FALSE), /* pcrel_offset */
380
381 HOWTO (R_ARM_GLOB_DAT, /* type */
382 0, /* rightshift */
383 2, /* size (0 = byte, 1 = short, 2 = long) */
384 32, /* bitsize */
385 FALSE, /* pc_relative */
386 0, /* bitpos */
387 complain_overflow_bitfield,/* complain_on_overflow */
388 bfd_elf_generic_reloc, /* special_function */
389 "R_ARM_GLOB_DAT", /* name */
390 TRUE, /* partial_inplace */
391 0xffffffff, /* src_mask */
392 0xffffffff, /* dst_mask */
393 FALSE), /* pcrel_offset */
394
395 HOWTO (R_ARM_JUMP_SLOT, /* type */
396 0, /* rightshift */
397 2, /* size (0 = byte, 1 = short, 2 = long) */
398 32, /* bitsize */
399 FALSE, /* pc_relative */
400 0, /* bitpos */
401 complain_overflow_bitfield,/* complain_on_overflow */
402 bfd_elf_generic_reloc, /* special_function */
403 "R_ARM_JUMP_SLOT", /* name */
404 TRUE, /* partial_inplace */
405 0xffffffff, /* src_mask */
406 0xffffffff, /* dst_mask */
407 FALSE), /* pcrel_offset */
408
409 HOWTO (R_ARM_RELATIVE, /* type */
410 0, /* rightshift */
411 2, /* size (0 = byte, 1 = short, 2 = long) */
412 32, /* bitsize */
413 FALSE, /* pc_relative */
414 0, /* bitpos */
415 complain_overflow_bitfield,/* complain_on_overflow */
416 bfd_elf_generic_reloc, /* special_function */
417 "R_ARM_RELATIVE", /* name */
418 TRUE, /* partial_inplace */
419 0xffffffff, /* src_mask */
420 0xffffffff, /* dst_mask */
421 FALSE), /* pcrel_offset */
422
c19d1205 423 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 424 0, /* rightshift */
425 2, /* size (0 = byte, 1 = short, 2 = long) */
426 32, /* bitsize */
427 FALSE, /* pc_relative */
428 0, /* bitpos */
429 complain_overflow_bitfield,/* complain_on_overflow */
430 bfd_elf_generic_reloc, /* special_function */
c19d1205 431 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 432 TRUE, /* partial_inplace */
433 0xffffffff, /* src_mask */
434 0xffffffff, /* dst_mask */
435 FALSE), /* pcrel_offset */
436
437 HOWTO (R_ARM_GOTPC, /* type */
438 0, /* rightshift */
439 2, /* size (0 = byte, 1 = short, 2 = long) */
440 32, /* bitsize */
441 TRUE, /* pc_relative */
442 0, /* bitpos */
443 complain_overflow_bitfield,/* complain_on_overflow */
444 bfd_elf_generic_reloc, /* special_function */
445 "R_ARM_GOTPC", /* name */
446 TRUE, /* partial_inplace */
447 0xffffffff, /* src_mask */
448 0xffffffff, /* dst_mask */
449 TRUE), /* pcrel_offset */
450
451 HOWTO (R_ARM_GOT32, /* type */
452 0, /* rightshift */
453 2, /* size (0 = byte, 1 = short, 2 = long) */
454 32, /* bitsize */
455 FALSE, /* pc_relative */
456 0, /* bitpos */
457 complain_overflow_bitfield,/* complain_on_overflow */
458 bfd_elf_generic_reloc, /* special_function */
459 "R_ARM_GOT32", /* name */
460 TRUE, /* partial_inplace */
461 0xffffffff, /* src_mask */
462 0xffffffff, /* dst_mask */
463 FALSE), /* pcrel_offset */
464
465 HOWTO (R_ARM_PLT32, /* type */
466 2, /* rightshift */
467 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 468 24, /* bitsize */
7f266840
DJ		 469 TRUE, /* pc_relative */
470 0, /* bitpos */
471 complain_overflow_bitfield,/* complain_on_overflow */
472 bfd_elf_generic_reloc, /* special_function */
473 "R_ARM_PLT32", /* name */
ce490eda 474 FALSE, /* partial_inplace */
7f266840
DJ		 475 0x00ffffff, /* src_mask */
476 0x00ffffff, /* dst_mask */
477 TRUE), /* pcrel_offset */
478
479 HOWTO (R_ARM_CALL, /* type */
480 2, /* rightshift */
481 2, /* size (0 = byte, 1 = short, 2 = long) */
482 24, /* bitsize */
483 TRUE, /* pc_relative */
484 0, /* bitpos */
485 complain_overflow_signed,/* complain_on_overflow */
486 bfd_elf_generic_reloc, /* special_function */
487 "R_ARM_CALL", /* name */
488 FALSE, /* partial_inplace */
489 0x00ffffff, /* src_mask */
490 0x00ffffff, /* dst_mask */
491 TRUE), /* pcrel_offset */
492
493 HOWTO (R_ARM_JUMP24, /* type */
494 2, /* rightshift */
495 2, /* size (0 = byte, 1 = short, 2 = long) */
496 24, /* bitsize */
497 TRUE, /* pc_relative */
498 0, /* bitpos */
499 complain_overflow_signed,/* complain_on_overflow */
500 bfd_elf_generic_reloc, /* special_function */
501 "R_ARM_JUMP24", /* name */
502 FALSE, /* partial_inplace */
503 0x00ffffff, /* src_mask */
504 0x00ffffff, /* dst_mask */
505 TRUE), /* pcrel_offset */
506
c19d1205
ZW		 507 HOWTO (R_ARM_THM_JUMP24, /* type */
508 1, /* rightshift */
509 2, /* size (0 = byte, 1 = short, 2 = long) */
510 24, /* bitsize */
511 TRUE, /* pc_relative */
7f266840 512 0, /* bitpos */
c19d1205 513 complain_overflow_signed,/* complain_on_overflow */
7f266840 514 bfd_elf_generic_reloc, /* special_function */
c19d1205 515 "R_ARM_THM_JUMP24", /* name */
7f266840 516 FALSE, /* partial_inplace */
c19d1205
ZW		 517 0x07ff2fff, /* src_mask */
518 0x07ff2fff, /* dst_mask */
519 TRUE), /* pcrel_offset */
7f266840 520
c19d1205 521 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 522 0, /* rightshift */
c19d1205
ZW		 523 2, /* size (0 = byte, 1 = short, 2 = long) */
524 32, /* bitsize */
7f266840
DJ		 525 FALSE, /* pc_relative */
526 0, /* bitpos */
527 complain_overflow_dont,/* complain_on_overflow */
528 bfd_elf_generic_reloc, /* special_function */
c19d1205 529 "R_ARM_BASE_ABS", /* name */
7f266840 530 FALSE, /* partial_inplace */
c19d1205
ZW		 531 0xffffffff, /* src_mask */
532 0xffffffff, /* dst_mask */
7f266840
DJ		 533 FALSE), /* pcrel_offset */
534
535 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
536 0, /* rightshift */
537 2, /* size (0 = byte, 1 = short, 2 = long) */
538 12, /* bitsize */
539 TRUE, /* pc_relative */
540 0, /* bitpos */
541 complain_overflow_dont,/* complain_on_overflow */
542 bfd_elf_generic_reloc, /* special_function */
543 "R_ARM_ALU_PCREL_7_0", /* name */
544 FALSE, /* partial_inplace */
545 0x00000fff, /* src_mask */
546 0x00000fff, /* dst_mask */
547 TRUE), /* pcrel_offset */
548
549 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
550 0, /* rightshift */
551 2, /* size (0 = byte, 1 = short, 2 = long) */
552 12, /* bitsize */
553 TRUE, /* pc_relative */
554 8, /* bitpos */
555 complain_overflow_dont,/* complain_on_overflow */
556 bfd_elf_generic_reloc, /* special_function */
557 "R_ARM_ALU_PCREL_15_8",/* name */
558 FALSE, /* partial_inplace */
559 0x00000fff, /* src_mask */
560 0x00000fff, /* dst_mask */
561 TRUE), /* pcrel_offset */
562
563 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
564 0, /* rightshift */
565 2, /* size (0 = byte, 1 = short, 2 = long) */
566 12, /* bitsize */
567 TRUE, /* pc_relative */
568 16, /* bitpos */
569 complain_overflow_dont,/* complain_on_overflow */
570 bfd_elf_generic_reloc, /* special_function */
571 "R_ARM_ALU_PCREL_23_15",/* name */
572 FALSE, /* partial_inplace */
573 0x00000fff, /* src_mask */
574 0x00000fff, /* dst_mask */
575 TRUE), /* pcrel_offset */
576
577 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
578 0, /* rightshift */
579 2, /* size (0 = byte, 1 = short, 2 = long) */
580 12, /* bitsize */
581 FALSE, /* pc_relative */
582 0, /* bitpos */
583 complain_overflow_dont,/* complain_on_overflow */
584 bfd_elf_generic_reloc, /* special_function */
585 "R_ARM_LDR_SBREL_11_0",/* name */
586 FALSE, /* partial_inplace */
587 0x00000fff, /* src_mask */
588 0x00000fff, /* dst_mask */
589 FALSE), /* pcrel_offset */
590
591 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
592 0, /* rightshift */
593 2, /* size (0 = byte, 1 = short, 2 = long) */
594 8, /* bitsize */
595 FALSE, /* pc_relative */
596 12, /* bitpos */
597 complain_overflow_dont,/* complain_on_overflow */
598 bfd_elf_generic_reloc, /* special_function */
599 "R_ARM_ALU_SBREL_19_12",/* name */
600 FALSE, /* partial_inplace */
601 0x000ff000, /* src_mask */
602 0x000ff000, /* dst_mask */
603 FALSE), /* pcrel_offset */
604
605 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
606 0, /* rightshift */
607 2, /* size (0 = byte, 1 = short, 2 = long) */
608 8, /* bitsize */
609 FALSE, /* pc_relative */
610 20, /* bitpos */
611 complain_overflow_dont,/* complain_on_overflow */
612 bfd_elf_generic_reloc, /* special_function */
613 "R_ARM_ALU_SBREL_27_20",/* name */
614 FALSE, /* partial_inplace */
615 0x0ff00000, /* src_mask */
616 0x0ff00000, /* dst_mask */
617 FALSE), /* pcrel_offset */
618
619 HOWTO (R_ARM_TARGET1, /* type */
620 0, /* rightshift */
621 2, /* size (0 = byte, 1 = short, 2 = long) */
622 32, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_dont,/* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_ARM_TARGET1", /* name */
628 FALSE, /* partial_inplace */
629 0xffffffff, /* src_mask */
630 0xffffffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 HOWTO (R_ARM_ROSEGREL32, /* type */
634 0, /* rightshift */
635 2, /* size (0 = byte, 1 = short, 2 = long) */
636 32, /* bitsize */
637 FALSE, /* pc_relative */
638 0, /* bitpos */
639 complain_overflow_dont,/* complain_on_overflow */
640 bfd_elf_generic_reloc, /* special_function */
641 "R_ARM_ROSEGREL32", /* name */
642 FALSE, /* partial_inplace */
643 0xffffffff, /* src_mask */
644 0xffffffff, /* dst_mask */
645 FALSE), /* pcrel_offset */
646
647 HOWTO (R_ARM_V4BX, /* type */
648 0, /* rightshift */
649 2, /* size (0 = byte, 1 = short, 2 = long) */
650 32, /* bitsize */
651 FALSE, /* pc_relative */
652 0, /* bitpos */
653 complain_overflow_dont,/* complain_on_overflow */
654 bfd_elf_generic_reloc, /* special_function */
655 "R_ARM_V4BX", /* name */
656 FALSE, /* partial_inplace */
657 0xffffffff, /* src_mask */
658 0xffffffff, /* dst_mask */
659 FALSE), /* pcrel_offset */
660
661 HOWTO (R_ARM_TARGET2, /* type */
662 0, /* rightshift */
663 2, /* size (0 = byte, 1 = short, 2 = long) */
664 32, /* bitsize */
665 FALSE, /* pc_relative */
666 0, /* bitpos */
667 complain_overflow_signed,/* complain_on_overflow */
668 bfd_elf_generic_reloc, /* special_function */
669 "R_ARM_TARGET2", /* name */
670 FALSE, /* partial_inplace */
671 0xffffffff, /* src_mask */
672 0xffffffff, /* dst_mask */
673 TRUE), /* pcrel_offset */
674
675 HOWTO (R_ARM_PREL31, /* type */
676 0, /* rightshift */
677 2, /* size (0 = byte, 1 = short, 2 = long) */
678 31, /* bitsize */
679 TRUE, /* pc_relative */
680 0, /* bitpos */
681 complain_overflow_signed,/* complain_on_overflow */
682 bfd_elf_generic_reloc, /* special_function */
683 "R_ARM_PREL31", /* name */
684 FALSE, /* partial_inplace */
685 0x7fffffff, /* src_mask */
686 0x7fffffff, /* dst_mask */
687 TRUE), /* pcrel_offset */
c19d1205
ZW		 688
689 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
690 0, /* rightshift */
691 2, /* size (0 = byte, 1 = short, 2 = long) */
692 16, /* bitsize */
693 FALSE, /* pc_relative */
694 0, /* bitpos */
695 complain_overflow_dont,/* complain_on_overflow */
696 bfd_elf_generic_reloc, /* special_function */
697 "R_ARM_MOVW_ABS_NC", /* name */
698 FALSE, /* partial_inplace */
39623e12
PB		 699 0x000f0fff, /* src_mask */
700 0x000f0fff, /* dst_mask */
c19d1205
ZW		 701 FALSE), /* pcrel_offset */
702
703 HOWTO (R_ARM_MOVT_ABS, /* type */
704 0, /* rightshift */
705 2, /* size (0 = byte, 1 = short, 2 = long) */
706 16, /* bitsize */
707 FALSE, /* pc_relative */
708 0, /* bitpos */
709 complain_overflow_bitfield,/* complain_on_overflow */
710 bfd_elf_generic_reloc, /* special_function */
711 "R_ARM_MOVT_ABS", /* name */
712 FALSE, /* partial_inplace */
39623e12
PB		 713 0x000f0fff, /* src_mask */
714 0x000f0fff, /* dst_mask */
c19d1205
ZW		 715 FALSE), /* pcrel_offset */
716
717 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
718 0, /* rightshift */
719 2, /* size (0 = byte, 1 = short, 2 = long) */
720 16, /* bitsize */
721 TRUE, /* pc_relative */
722 0, /* bitpos */
723 complain_overflow_dont,/* complain_on_overflow */
724 bfd_elf_generic_reloc, /* special_function */
725 "R_ARM_MOVW_PREL_NC", /* name */
726 FALSE, /* partial_inplace */
39623e12
PB		 727 0x000f0fff, /* src_mask */
728 0x000f0fff, /* dst_mask */
c19d1205
ZW		 729 TRUE), /* pcrel_offset */
730
731 HOWTO (R_ARM_MOVT_PREL, /* type */
732 0, /* rightshift */
733 2, /* size (0 = byte, 1 = short, 2 = long) */
734 16, /* bitsize */
735 TRUE, /* pc_relative */
736 0, /* bitpos */
737 complain_overflow_bitfield,/* complain_on_overflow */
738 bfd_elf_generic_reloc, /* special_function */
739 "R_ARM_MOVT_PREL", /* name */
740 FALSE, /* partial_inplace */
39623e12
PB		 741 0x000f0fff, /* src_mask */
742 0x000f0fff, /* dst_mask */
c19d1205
ZW		 743 TRUE), /* pcrel_offset */
744
745 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
746 0, /* rightshift */
747 2, /* size (0 = byte, 1 = short, 2 = long) */
748 16, /* bitsize */
749 FALSE, /* pc_relative */
750 0, /* bitpos */
751 complain_overflow_dont,/* complain_on_overflow */
752 bfd_elf_generic_reloc, /* special_function */
753 "R_ARM_THM_MOVW_ABS_NC",/* name */
754 FALSE, /* partial_inplace */
755 0x040f70ff, /* src_mask */
756 0x040f70ff, /* dst_mask */
757 FALSE), /* pcrel_offset */
758
759 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
760 0, /* rightshift */
761 2, /* size (0 = byte, 1 = short, 2 = long) */
762 16, /* bitsize */
763 FALSE, /* pc_relative */
764 0, /* bitpos */
765 complain_overflow_bitfield,/* complain_on_overflow */
766 bfd_elf_generic_reloc, /* special_function */
767 "R_ARM_THM_MOVT_ABS", /* name */
768 FALSE, /* partial_inplace */
769 0x040f70ff, /* src_mask */
770 0x040f70ff, /* dst_mask */
771 FALSE), /* pcrel_offset */
772
773 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
774 0, /* rightshift */
775 2, /* size (0 = byte, 1 = short, 2 = long) */
776 16, /* bitsize */
777 TRUE, /* pc_relative */
778 0, /* bitpos */
779 complain_overflow_dont,/* complain_on_overflow */
780 bfd_elf_generic_reloc, /* special_function */
781 "R_ARM_THM_MOVW_PREL_NC",/* name */
782 FALSE, /* partial_inplace */
783 0x040f70ff, /* src_mask */
784 0x040f70ff, /* dst_mask */
785 TRUE), /* pcrel_offset */
786
787 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
788 0, /* rightshift */
789 2, /* size (0 = byte, 1 = short, 2 = long) */
790 16, /* bitsize */
791 TRUE, /* pc_relative */
792 0, /* bitpos */
793 complain_overflow_bitfield,/* complain_on_overflow */
794 bfd_elf_generic_reloc, /* special_function */
795 "R_ARM_THM_MOVT_PREL", /* name */
796 FALSE, /* partial_inplace */
797 0x040f70ff, /* src_mask */
798 0x040f70ff, /* dst_mask */
799 TRUE), /* pcrel_offset */
800
801 HOWTO (R_ARM_THM_JUMP19, /* type */
802 1, /* rightshift */
803 2, /* size (0 = byte, 1 = short, 2 = long) */
804 19, /* bitsize */
805 TRUE, /* pc_relative */
806 0, /* bitpos */
807 complain_overflow_signed,/* complain_on_overflow */
808 bfd_elf_generic_reloc, /* special_function */
809 "R_ARM_THM_JUMP19", /* name */
810 FALSE, /* partial_inplace */
811 0x043f2fff, /* src_mask */
812 0x043f2fff, /* dst_mask */
813 TRUE), /* pcrel_offset */
814
815 HOWTO (R_ARM_THM_JUMP6, /* type */
816 1, /* rightshift */
817 1, /* size (0 = byte, 1 = short, 2 = long) */
818 6, /* bitsize */
819 TRUE, /* pc_relative */
820 0, /* bitpos */
821 complain_overflow_unsigned,/* complain_on_overflow */
822 bfd_elf_generic_reloc, /* special_function */
823 "R_ARM_THM_JUMP6", /* name */
824 FALSE, /* partial_inplace */
825 0x02f8, /* src_mask */
826 0x02f8, /* dst_mask */
827 TRUE), /* pcrel_offset */
828
829 /* These are declared as 13-bit signed relocations because we can
830 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
831 versa. */
832 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
833 0, /* rightshift */
834 2, /* size (0 = byte, 1 = short, 2 = long) */
835 13, /* bitsize */
836 TRUE, /* pc_relative */
837 0, /* bitpos */
2cab6cc3 838 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 839 bfd_elf_generic_reloc, /* special_function */
840 "R_ARM_THM_ALU_PREL_11_0",/* name */
841 FALSE, /* partial_inplace */
2cab6cc3
MS		 842 0xffffffff, /* src_mask */
843 0xffffffff, /* dst_mask */
c19d1205
ZW		 844 TRUE), /* pcrel_offset */
845
846 HOWTO (R_ARM_THM_PC12, /* type */
847 0, /* rightshift */
848 2, /* size (0 = byte, 1 = short, 2 = long) */
849 13, /* bitsize */
850 TRUE, /* pc_relative */
851 0, /* bitpos */
2cab6cc3 852 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 853 bfd_elf_generic_reloc, /* special_function */
854 "R_ARM_THM_PC12", /* name */
855 FALSE, /* partial_inplace */
2cab6cc3
MS		 856 0xffffffff, /* src_mask */
857 0xffffffff, /* dst_mask */
c19d1205
ZW		 858 TRUE), /* pcrel_offset */
859
860 HOWTO (R_ARM_ABS32_NOI, /* type */
861 0, /* rightshift */
862 2, /* size (0 = byte, 1 = short, 2 = long) */
863 32, /* bitsize */
864 FALSE, /* pc_relative */
865 0, /* bitpos */
866 complain_overflow_dont,/* complain_on_overflow */
867 bfd_elf_generic_reloc, /* special_function */
868 "R_ARM_ABS32_NOI", /* name */
869 FALSE, /* partial_inplace */
870 0xffffffff, /* src_mask */
871 0xffffffff, /* dst_mask */
872 FALSE), /* pcrel_offset */
873
874 HOWTO (R_ARM_REL32_NOI, /* type */
875 0, /* rightshift */
876 2, /* size (0 = byte, 1 = short, 2 = long) */
877 32, /* bitsize */
878 TRUE, /* pc_relative */
879 0, /* bitpos */
880 complain_overflow_dont,/* complain_on_overflow */
881 bfd_elf_generic_reloc, /* special_function */
882 "R_ARM_REL32_NOI", /* name */
883 FALSE, /* partial_inplace */
884 0xffffffff, /* src_mask */
885 0xffffffff, /* dst_mask */
886 FALSE), /* pcrel_offset */
7f266840 887
4962c51a
MS		 888 /* Group relocations. */
889
890 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
891 0, /* rightshift */
892 2, /* size (0 = byte, 1 = short, 2 = long) */
893 32, /* bitsize */
894 TRUE, /* pc_relative */
895 0, /* bitpos */
896 complain_overflow_dont,/* complain_on_overflow */
897 bfd_elf_generic_reloc, /* special_function */
898 "R_ARM_ALU_PC_G0_NC", /* name */
899 FALSE, /* partial_inplace */
900 0xffffffff, /* src_mask */
901 0xffffffff, /* dst_mask */
902 TRUE), /* pcrel_offset */
903
904 HOWTO (R_ARM_ALU_PC_G0, /* type */
905 0, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 32, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_dont,/* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_ARM_ALU_PC_G0", /* name */
913 FALSE, /* partial_inplace */
914 0xffffffff, /* src_mask */
915 0xffffffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
919 0, /* rightshift */
920 2, /* size (0 = byte, 1 = short, 2 = long) */
921 32, /* bitsize */
922 TRUE, /* pc_relative */
923 0, /* bitpos */
924 complain_overflow_dont,/* complain_on_overflow */
925 bfd_elf_generic_reloc, /* special_function */
926 "R_ARM_ALU_PC_G1_NC", /* name */
927 FALSE, /* partial_inplace */
928 0xffffffff, /* src_mask */
929 0xffffffff, /* dst_mask */
930 TRUE), /* pcrel_offset */
931
932 HOWTO (R_ARM_ALU_PC_G1, /* type */
933 0, /* rightshift */
934 2, /* size (0 = byte, 1 = short, 2 = long) */
935 32, /* bitsize */
936 TRUE, /* pc_relative */
937 0, /* bitpos */
938 complain_overflow_dont,/* complain_on_overflow */
939 bfd_elf_generic_reloc, /* special_function */
940 "R_ARM_ALU_PC_G1", /* name */
941 FALSE, /* partial_inplace */
942 0xffffffff, /* src_mask */
943 0xffffffff, /* dst_mask */
944 TRUE), /* pcrel_offset */
945
946 HOWTO (R_ARM_ALU_PC_G2, /* type */
947 0, /* rightshift */
948 2, /* size (0 = byte, 1 = short, 2 = long) */
949 32, /* bitsize */
950 TRUE, /* pc_relative */
951 0, /* bitpos */
952 complain_overflow_dont,/* complain_on_overflow */
953 bfd_elf_generic_reloc, /* special_function */
954 "R_ARM_ALU_PC_G2", /* name */
955 FALSE, /* partial_inplace */
956 0xffffffff, /* src_mask */
957 0xffffffff, /* dst_mask */
958 TRUE), /* pcrel_offset */
959
960 HOWTO (R_ARM_LDR_PC_G1, /* type */
961 0, /* rightshift */
962 2, /* size (0 = byte, 1 = short, 2 = long) */
963 32, /* bitsize */
964 TRUE, /* pc_relative */
965 0, /* bitpos */
966 complain_overflow_dont,/* complain_on_overflow */
967 bfd_elf_generic_reloc, /* special_function */
968 "R_ARM_LDR_PC_G1", /* name */
969 FALSE, /* partial_inplace */
970 0xffffffff, /* src_mask */
971 0xffffffff, /* dst_mask */
972 TRUE), /* pcrel_offset */
973
974 HOWTO (R_ARM_LDR_PC_G2, /* type */
975 0, /* rightshift */
976 2, /* size (0 = byte, 1 = short, 2 = long) */
977 32, /* bitsize */
978 TRUE, /* pc_relative */
979 0, /* bitpos */
980 complain_overflow_dont,/* complain_on_overflow */
981 bfd_elf_generic_reloc, /* special_function */
982 "R_ARM_LDR_PC_G2", /* name */
983 FALSE, /* partial_inplace */
984 0xffffffff, /* src_mask */
985 0xffffffff, /* dst_mask */
986 TRUE), /* pcrel_offset */
987
988 HOWTO (R_ARM_LDRS_PC_G0, /* type */
989 0, /* rightshift */
990 2, /* size (0 = byte, 1 = short, 2 = long) */
991 32, /* bitsize */
992 TRUE, /* pc_relative */
993 0, /* bitpos */
994 complain_overflow_dont,/* complain_on_overflow */
995 bfd_elf_generic_reloc, /* special_function */
996 "R_ARM_LDRS_PC_G0", /* name */
997 FALSE, /* partial_inplace */
998 0xffffffff, /* src_mask */
999 0xffffffff, /* dst_mask */
1000 TRUE), /* pcrel_offset */
1001
1002 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1003 0, /* rightshift */
1004 2, /* size (0 = byte, 1 = short, 2 = long) */
1005 32, /* bitsize */
1006 TRUE, /* pc_relative */
1007 0, /* bitpos */
1008 complain_overflow_dont,/* complain_on_overflow */
1009 bfd_elf_generic_reloc, /* special_function */
1010 "R_ARM_LDRS_PC_G1", /* name */
1011 FALSE, /* partial_inplace */
1012 0xffffffff, /* src_mask */
1013 0xffffffff, /* dst_mask */
1014 TRUE), /* pcrel_offset */
1015
1016 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1017 0, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 32, /* bitsize */
1020 TRUE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_ARM_LDRS_PC_G2", /* name */
1025 FALSE, /* partial_inplace */
1026 0xffffffff, /* src_mask */
1027 0xffffffff, /* dst_mask */
1028 TRUE), /* pcrel_offset */
1029
1030 HOWTO (R_ARM_LDC_PC_G0, /* type */
1031 0, /* rightshift */
1032 2, /* size (0 = byte, 1 = short, 2 = long) */
1033 32, /* bitsize */
1034 TRUE, /* pc_relative */
1035 0, /* bitpos */
1036 complain_overflow_dont,/* complain_on_overflow */
1037 bfd_elf_generic_reloc, /* special_function */
1038 "R_ARM_LDC_PC_G0", /* name */
1039 FALSE, /* partial_inplace */
1040 0xffffffff, /* src_mask */
1041 0xffffffff, /* dst_mask */
1042 TRUE), /* pcrel_offset */
1043
1044 HOWTO (R_ARM_LDC_PC_G1, /* type */
1045 0, /* rightshift */
1046 2, /* size (0 = byte, 1 = short, 2 = long) */
1047 32, /* bitsize */
1048 TRUE, /* pc_relative */
1049 0, /* bitpos */
1050 complain_overflow_dont,/* complain_on_overflow */
1051 bfd_elf_generic_reloc, /* special_function */
1052 "R_ARM_LDC_PC_G1", /* name */
1053 FALSE, /* partial_inplace */
1054 0xffffffff, /* src_mask */
1055 0xffffffff, /* dst_mask */
1056 TRUE), /* pcrel_offset */
1057
1058 HOWTO (R_ARM_LDC_PC_G2, /* type */
1059 0, /* rightshift */
1060 2, /* size (0 = byte, 1 = short, 2 = long) */
1061 32, /* bitsize */
1062 TRUE, /* pc_relative */
1063 0, /* bitpos */
1064 complain_overflow_dont,/* complain_on_overflow */
1065 bfd_elf_generic_reloc, /* special_function */
1066 "R_ARM_LDC_PC_G2", /* name */
1067 FALSE, /* partial_inplace */
1068 0xffffffff, /* src_mask */
1069 0xffffffff, /* dst_mask */
1070 TRUE), /* pcrel_offset */
1071
1072 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1073 0, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 32, /* bitsize */
1076 TRUE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 bfd_elf_generic_reloc, /* special_function */
1080 "R_ARM_ALU_SB_G0_NC", /* name */
1081 FALSE, /* partial_inplace */
1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
1084 TRUE), /* pcrel_offset */
1085
1086 HOWTO (R_ARM_ALU_SB_G0, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 32, /* bitsize */
1090 TRUE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_ARM_ALU_SB_G0", /* name */
1095 FALSE, /* partial_inplace */
1096 0xffffffff, /* src_mask */
1097 0xffffffff, /* dst_mask */
1098 TRUE), /* pcrel_offset */
1099
1100 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1101 0, /* rightshift */
1102 2, /* size (0 = byte, 1 = short, 2 = long) */
1103 32, /* bitsize */
1104 TRUE, /* pc_relative */
1105 0, /* bitpos */
1106 complain_overflow_dont,/* complain_on_overflow */
1107 bfd_elf_generic_reloc, /* special_function */
1108 "R_ARM_ALU_SB_G1_NC", /* name */
1109 FALSE, /* partial_inplace */
1110 0xffffffff, /* src_mask */
1111 0xffffffff, /* dst_mask */
1112 TRUE), /* pcrel_offset */
1113
1114 HOWTO (R_ARM_ALU_SB_G1, /* type */
1115 0, /* rightshift */
1116 2, /* size (0 = byte, 1 = short, 2 = long) */
1117 32, /* bitsize */
1118 TRUE, /* pc_relative */
1119 0, /* bitpos */
1120 complain_overflow_dont,/* complain_on_overflow */
1121 bfd_elf_generic_reloc, /* special_function */
1122 "R_ARM_ALU_SB_G1", /* name */
1123 FALSE, /* partial_inplace */
1124 0xffffffff, /* src_mask */
1125 0xffffffff, /* dst_mask */
1126 TRUE), /* pcrel_offset */
1127
1128 HOWTO (R_ARM_ALU_SB_G2, /* type */
1129 0, /* rightshift */
1130 2, /* size (0 = byte, 1 = short, 2 = long) */
1131 32, /* bitsize */
1132 TRUE, /* pc_relative */
1133 0, /* bitpos */
1134 complain_overflow_dont,/* complain_on_overflow */
1135 bfd_elf_generic_reloc, /* special_function */
1136 "R_ARM_ALU_SB_G2", /* name */
1137 FALSE, /* partial_inplace */
1138 0xffffffff, /* src_mask */
1139 0xffffffff, /* dst_mask */
1140 TRUE), /* pcrel_offset */
1141
1142 HOWTO (R_ARM_LDR_SB_G0, /* type */
1143 0, /* rightshift */
1144 2, /* size (0 = byte, 1 = short, 2 = long) */
1145 32, /* bitsize */
1146 TRUE, /* pc_relative */
1147 0, /* bitpos */
1148 complain_overflow_dont,/* complain_on_overflow */
1149 bfd_elf_generic_reloc, /* special_function */
1150 "R_ARM_LDR_SB_G0", /* name */
1151 FALSE, /* partial_inplace */
1152 0xffffffff, /* src_mask */
1153 0xffffffff, /* dst_mask */
1154 TRUE), /* pcrel_offset */
1155
1156 HOWTO (R_ARM_LDR_SB_G1, /* type */
1157 0, /* rightshift */
1158 2, /* size (0 = byte, 1 = short, 2 = long) */
1159 32, /* bitsize */
1160 TRUE, /* pc_relative */
1161 0, /* bitpos */
1162 complain_overflow_dont,/* complain_on_overflow */
1163 bfd_elf_generic_reloc, /* special_function */
1164 "R_ARM_LDR_SB_G1", /* name */
1165 FALSE, /* partial_inplace */
1166 0xffffffff, /* src_mask */
1167 0xffffffff, /* dst_mask */
1168 TRUE), /* pcrel_offset */
1169
1170 HOWTO (R_ARM_LDR_SB_G2, /* type */
1171 0, /* rightshift */
1172 2, /* size (0 = byte, 1 = short, 2 = long) */
1173 32, /* bitsize */
1174 TRUE, /* pc_relative */
1175 0, /* bitpos */
1176 complain_overflow_dont,/* complain_on_overflow */
1177 bfd_elf_generic_reloc, /* special_function */
1178 "R_ARM_LDR_SB_G2", /* name */
1179 FALSE, /* partial_inplace */
1180 0xffffffff, /* src_mask */
1181 0xffffffff, /* dst_mask */
1182 TRUE), /* pcrel_offset */
1183
1184 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1185 0, /* rightshift */
1186 2, /* size (0 = byte, 1 = short, 2 = long) */
1187 32, /* bitsize */
1188 TRUE, /* pc_relative */
1189 0, /* bitpos */
1190 complain_overflow_dont,/* complain_on_overflow */
1191 bfd_elf_generic_reloc, /* special_function */
1192 "R_ARM_LDRS_SB_G0", /* name */
1193 FALSE, /* partial_inplace */
1194 0xffffffff, /* src_mask */
1195 0xffffffff, /* dst_mask */
1196 TRUE), /* pcrel_offset */
1197
1198 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1199 0, /* rightshift */
1200 2, /* size (0 = byte, 1 = short, 2 = long) */
1201 32, /* bitsize */
1202 TRUE, /* pc_relative */
1203 0, /* bitpos */
1204 complain_overflow_dont,/* complain_on_overflow */
1205 bfd_elf_generic_reloc, /* special_function */
1206 "R_ARM_LDRS_SB_G1", /* name */
1207 FALSE, /* partial_inplace */
1208 0xffffffff, /* src_mask */
1209 0xffffffff, /* dst_mask */
1210 TRUE), /* pcrel_offset */
1211
1212 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1213 0, /* rightshift */
1214 2, /* size (0 = byte, 1 = short, 2 = long) */
1215 32, /* bitsize */
1216 TRUE, /* pc_relative */
1217 0, /* bitpos */
1218 complain_overflow_dont,/* complain_on_overflow */
1219 bfd_elf_generic_reloc, /* special_function */
1220 "R_ARM_LDRS_SB_G2", /* name */
1221 FALSE, /* partial_inplace */
1222 0xffffffff, /* src_mask */
1223 0xffffffff, /* dst_mask */
1224 TRUE), /* pcrel_offset */
1225
1226 HOWTO (R_ARM_LDC_SB_G0, /* type */
1227 0, /* rightshift */
1228 2, /* size (0 = byte, 1 = short, 2 = long) */
1229 32, /* bitsize */
1230 TRUE, /* pc_relative */
1231 0, /* bitpos */
1232 complain_overflow_dont,/* complain_on_overflow */
1233 bfd_elf_generic_reloc, /* special_function */
1234 "R_ARM_LDC_SB_G0", /* name */
1235 FALSE, /* partial_inplace */
1236 0xffffffff, /* src_mask */
1237 0xffffffff, /* dst_mask */
1238 TRUE), /* pcrel_offset */
1239
1240 HOWTO (R_ARM_LDC_SB_G1, /* type */
1241 0, /* rightshift */
1242 2, /* size (0 = byte, 1 = short, 2 = long) */
1243 32, /* bitsize */
1244 TRUE, /* pc_relative */
1245 0, /* bitpos */
1246 complain_overflow_dont,/* complain_on_overflow */
1247 bfd_elf_generic_reloc, /* special_function */
1248 "R_ARM_LDC_SB_G1", /* name */
1249 FALSE, /* partial_inplace */
1250 0xffffffff, /* src_mask */
1251 0xffffffff, /* dst_mask */
1252 TRUE), /* pcrel_offset */
1253
1254 HOWTO (R_ARM_LDC_SB_G2, /* type */
1255 0, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 32, /* bitsize */
1258 TRUE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont,/* complain_on_overflow */
1261 bfd_elf_generic_reloc, /* special_function */
1262 "R_ARM_LDC_SB_G2", /* name */
1263 FALSE, /* partial_inplace */
1264 0xffffffff, /* src_mask */
1265 0xffffffff, /* dst_mask */
1266 TRUE), /* pcrel_offset */
1267
1268 /* End of group relocations. */
c19d1205 1269
c19d1205
ZW		 1270 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1271 0, /* rightshift */
1272 2, /* size (0 = byte, 1 = short, 2 = long) */
1273 16, /* bitsize */
1274 FALSE, /* pc_relative */
1275 0, /* bitpos */
1276 complain_overflow_dont,/* complain_on_overflow */
1277 bfd_elf_generic_reloc, /* special_function */
1278 "R_ARM_MOVW_BREL_NC", /* name */
1279 FALSE, /* partial_inplace */
1280 0x0000ffff, /* src_mask */
1281 0x0000ffff, /* dst_mask */
1282 FALSE), /* pcrel_offset */
1283
1284 HOWTO (R_ARM_MOVT_BREL, /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 16, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_bitfield,/* complain_on_overflow */
1291 bfd_elf_generic_reloc, /* special_function */
1292 "R_ARM_MOVT_BREL", /* name */
1293 FALSE, /* partial_inplace */
1294 0x0000ffff, /* src_mask */
1295 0x0000ffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
1298 HOWTO (R_ARM_MOVW_BREL, /* type */
1299 0, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 16, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_ARM_MOVW_BREL", /* name */
1307 FALSE, /* partial_inplace */
1308 0x0000ffff, /* src_mask */
1309 0x0000ffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1313 0, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 16, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_ARM_THM_MOVW_BREL_NC",/* name */
1321 FALSE, /* partial_inplace */
1322 0x040f70ff, /* src_mask */
1323 0x040f70ff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1327 0, /* rightshift */
1328 2, /* size (0 = byte, 1 = short, 2 = long) */
1329 16, /* bitsize */
1330 FALSE, /* pc_relative */
1331 0, /* bitpos */
1332 complain_overflow_bitfield,/* complain_on_overflow */
1333 bfd_elf_generic_reloc, /* special_function */
1334 "R_ARM_THM_MOVT_BREL", /* name */
1335 FALSE, /* partial_inplace */
1336 0x040f70ff, /* src_mask */
1337 0x040f70ff, /* dst_mask */
1338 FALSE), /* pcrel_offset */
1339
1340 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1341 0, /* rightshift */
1342 2, /* size (0 = byte, 1 = short, 2 = long) */
1343 16, /* bitsize */
1344 FALSE, /* pc_relative */
1345 0, /* bitpos */
1346 complain_overflow_dont,/* complain_on_overflow */
1347 bfd_elf_generic_reloc, /* special_function */
1348 "R_ARM_THM_MOVW_BREL", /* name */
1349 FALSE, /* partial_inplace */
1350 0x040f70ff, /* src_mask */
1351 0x040f70ff, /* dst_mask */
1352 FALSE), /* pcrel_offset */
1353
1354 EMPTY_HOWTO (90), /* unallocated */
1355 EMPTY_HOWTO (91),
1356 EMPTY_HOWTO (92),
1357 EMPTY_HOWTO (93),
1358
1359 HOWTO (R_ARM_PLT32_ABS, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_dont,/* complain_on_overflow */
1366 bfd_elf_generic_reloc, /* special_function */
1367 "R_ARM_PLT32_ABS", /* name */
1368 FALSE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_GOT_ABS, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 32, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_GOT_ABS", /* name */
1382 FALSE, /* partial_inplace */
1383 0xffffffff, /* src_mask */
1384 0xffffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_GOT_PREL, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 32, /* bitsize */
1391 TRUE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_dont, /* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_GOT_PREL", /* name */
1396 FALSE, /* partial_inplace */
1397 0xffffffff, /* src_mask */
1398 0xffffffff, /* dst_mask */
1399 TRUE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_GOT_BREL12, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 12, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_bitfield,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_GOT_BREL12", /* name */
1410 FALSE, /* partial_inplace */
1411 0x00000fff, /* src_mask */
1412 0x00000fff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_GOTOFF12, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 12, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_bitfield,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_GOTOFF12", /* name */
1424 FALSE, /* partial_inplace */
1425 0x00000fff, /* src_mask */
1426 0x00000fff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1430
1431 /* GNU extension to record C++ vtable member usage */
1432 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1433 0, /* rightshift */
1434 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1435 0, /* bitsize */
ba93b8ac
DJ		 1436 FALSE, /* pc_relative */
1437 0, /* bitpos */
c19d1205
ZW		 1438 complain_overflow_dont, /* complain_on_overflow */
1439 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1440 "R_ARM_GNU_VTENTRY", /* name */
1441 FALSE, /* partial_inplace */
1442 0, /* src_mask */
1443 0, /* dst_mask */
1444 FALSE), /* pcrel_offset */
1445
1446 /* GNU extension to record C++ vtable hierarchy */
1447 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1448 0, /* rightshift */
1449 2, /* size (0 = byte, 1 = short, 2 = long) */
1450 0, /* bitsize */
1451 FALSE, /* pc_relative */
1452 0, /* bitpos */
1453 complain_overflow_dont, /* complain_on_overflow */
1454 NULL, /* special_function */
1455 "R_ARM_GNU_VTINHERIT", /* name */
1456 FALSE, /* partial_inplace */
1457 0, /* src_mask */
1458 0, /* dst_mask */
1459 FALSE), /* pcrel_offset */
1460
1461 HOWTO (R_ARM_THM_JUMP11, /* type */
1462 1, /* rightshift */
1463 1, /* size (0 = byte, 1 = short, 2 = long) */
1464 11, /* bitsize */
1465 TRUE, /* pc_relative */
1466 0, /* bitpos */
1467 complain_overflow_signed, /* complain_on_overflow */
1468 bfd_elf_generic_reloc, /* special_function */
1469 "R_ARM_THM_JUMP11", /* name */
1470 FALSE, /* partial_inplace */
1471 0x000007ff, /* src_mask */
1472 0x000007ff, /* dst_mask */
1473 TRUE), /* pcrel_offset */
1474
1475 HOWTO (R_ARM_THM_JUMP8, /* type */
1476 1, /* rightshift */
1477 1, /* size (0 = byte, 1 = short, 2 = long) */
1478 8, /* bitsize */
1479 TRUE, /* pc_relative */
1480 0, /* bitpos */
1481 complain_overflow_signed, /* complain_on_overflow */
1482 bfd_elf_generic_reloc, /* special_function */
1483 "R_ARM_THM_JUMP8", /* name */
1484 FALSE, /* partial_inplace */
1485 0x000000ff, /* src_mask */
1486 0x000000ff, /* dst_mask */
1487 TRUE), /* pcrel_offset */
ba93b8ac 1488
c19d1205
ZW		 1489 /* TLS relocations */
1490 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1491 0, /* rightshift */
1492 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 32, /* bitsize */
1494 FALSE, /* pc_relative */
1495 0, /* bitpos */
1496 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1497 NULL, /* special_function */
1498 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1499 TRUE, /* partial_inplace */
1500 0xffffffff, /* src_mask */
1501 0xffffffff, /* dst_mask */
c19d1205 1502 FALSE), /* pcrel_offset */
ba93b8ac 1503
ba93b8ac
DJ		 1504 HOWTO (R_ARM_TLS_LDM32, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 32, /* bitsize */
1508 FALSE, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_bitfield,/* complain_on_overflow */
1511 bfd_elf_generic_reloc, /* special_function */
1512 "R_ARM_TLS_LDM32", /* name */
1513 TRUE, /* partial_inplace */
1514 0xffffffff, /* src_mask */
1515 0xffffffff, /* dst_mask */
c19d1205 1516 FALSE), /* pcrel_offset */
ba93b8ac 1517
c19d1205 1518 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1519 0, /* rightshift */
1520 2, /* size (0 = byte, 1 = short, 2 = long) */
1521 32, /* bitsize */
1522 FALSE, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_bitfield,/* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
c19d1205 1526 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1527 TRUE, /* partial_inplace */
1528 0xffffffff, /* src_mask */
1529 0xffffffff, /* dst_mask */
c19d1205 1530 FALSE), /* pcrel_offset */
ba93b8ac 1531
ba93b8ac
DJ		 1532 HOWTO (R_ARM_TLS_IE32, /* type */
1533 0, /* rightshift */
1534 2, /* size (0 = byte, 1 = short, 2 = long) */
1535 32, /* bitsize */
1536 FALSE, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_bitfield,/* complain_on_overflow */
1539 NULL, /* special_function */
1540 "R_ARM_TLS_IE32", /* name */
1541 TRUE, /* partial_inplace */
1542 0xffffffff, /* src_mask */
1543 0xffffffff, /* dst_mask */
c19d1205 1544 FALSE), /* pcrel_offset */
7f266840 1545
c19d1205 1546 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1549 32, /* bitsize */
7f266840
DJ		 1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
c19d1205
ZW		 1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_ARM_TLS_LE32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
7f266840 1559
c19d1205
ZW		 1560 HOWTO (R_ARM_TLS_LDO12, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 12, /* bitsize */
1564 FALSE, /* pc_relative */
7f266840 1565 0, /* bitpos */
c19d1205 1566 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1567 bfd_elf_generic_reloc, /* special_function */
c19d1205 1568 "R_ARM_TLS_LDO12", /* name */
7f266840 1569 FALSE, /* partial_inplace */
c19d1205
ZW		 1570 0x00000fff, /* src_mask */
1571 0x00000fff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
7f266840 1573
c19d1205
ZW		 1574 HOWTO (R_ARM_TLS_LE12, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 12, /* bitsize */
1578 FALSE, /* pc_relative */
7f266840 1579 0, /* bitpos */
c19d1205 1580 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1581 bfd_elf_generic_reloc, /* special_function */
c19d1205 1582 "R_ARM_TLS_LE12", /* name */
7f266840 1583 FALSE, /* partial_inplace */
c19d1205
ZW		 1584 0x00000fff, /* src_mask */
1585 0x00000fff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
7f266840 1587
c19d1205 1588 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1591 12, /* bitsize */
1592 FALSE, /* pc_relative */
7f266840 1593 0, /* bitpos */
c19d1205 1594 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1595 bfd_elf_generic_reloc, /* special_function */
c19d1205 1596 "R_ARM_TLS_IE12GP", /* name */
7f266840 1597 FALSE, /* partial_inplace */
c19d1205
ZW		 1598 0x00000fff, /* src_mask */
1599 0x00000fff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601};
1602
1603/* 112-127 private relocations
1604 128 R_ARM_ME_TOO, obsolete
1605 129-255 unallocated in AAELF.
7f266840 1606
c19d1205
ZW		 1607 249-255 extended, currently unused, relocations: */
1608
4962c51a 1609static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1610{
1611 HOWTO (R_ARM_RREL32, /* type */
1612 0, /* rightshift */
1613 0, /* size (0 = byte, 1 = short, 2 = long) */
1614 0, /* bitsize */
1615 FALSE, /* pc_relative */
1616 0, /* bitpos */
1617 complain_overflow_dont,/* complain_on_overflow */
1618 bfd_elf_generic_reloc, /* special_function */
1619 "R_ARM_RREL32", /* name */
1620 FALSE, /* partial_inplace */
1621 0, /* src_mask */
1622 0, /* dst_mask */
1623 FALSE), /* pcrel_offset */
1624
1625 HOWTO (R_ARM_RABS32, /* type */
1626 0, /* rightshift */
1627 0, /* size (0 = byte, 1 = short, 2 = long) */
1628 0, /* bitsize */
1629 FALSE, /* pc_relative */
1630 0, /* bitpos */
1631 complain_overflow_dont,/* complain_on_overflow */
1632 bfd_elf_generic_reloc, /* special_function */
1633 "R_ARM_RABS32", /* name */
1634 FALSE, /* partial_inplace */
1635 0, /* src_mask */
1636 0, /* dst_mask */
1637 FALSE), /* pcrel_offset */
1638
1639 HOWTO (R_ARM_RPC24, /* type */
1640 0, /* rightshift */
1641 0, /* size (0 = byte, 1 = short, 2 = long) */
1642 0, /* bitsize */
1643 FALSE, /* pc_relative */
1644 0, /* bitpos */
1645 complain_overflow_dont,/* complain_on_overflow */
1646 bfd_elf_generic_reloc, /* special_function */
1647 "R_ARM_RPC24", /* name */
1648 FALSE, /* partial_inplace */
1649 0, /* src_mask */
1650 0, /* dst_mask */
1651 FALSE), /* pcrel_offset */
1652
1653 HOWTO (R_ARM_RBASE, /* type */
1654 0, /* rightshift */
1655 0, /* size (0 = byte, 1 = short, 2 = long) */
1656 0, /* bitsize */
1657 FALSE, /* pc_relative */
1658 0, /* bitpos */
1659 complain_overflow_dont,/* complain_on_overflow */
1660 bfd_elf_generic_reloc, /* special_function */
1661 "R_ARM_RBASE", /* name */
1662 FALSE, /* partial_inplace */
1663 0, /* src_mask */
1664 0, /* dst_mask */
1665 FALSE) /* pcrel_offset */
1666};
1667
1668static reloc_howto_type *
1669elf32_arm_howto_from_type (unsigned int r_type)
1670{
c19d1205
ZW		 1671 if (r_type < NUM_ELEM (elf32_arm_howto_table_1))
1672 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1673
c19d1205
ZW		 1674 if (r_type >= R_ARM_RREL32
1675 && r_type < R_ARM_RREL32 + NUM_ELEM (elf32_arm_howto_table_2))
4962c51a 1676 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1677
c19d1205 1678 return NULL;
7f266840
DJ		 1679}
1680
1681static void
1682elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1683 Elf_Internal_Rela * elf_reloc)
1684{
1685 unsigned int r_type;
1686
1687 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1688 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1689}
1690
1691struct elf32_arm_reloc_map
1692 {
1693 bfd_reloc_code_real_type bfd_reloc_val;
1694 unsigned char elf_reloc_val;
1695 };
1696
1697/* All entries in this list must also be present in elf32_arm_howto_table. */
1698static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1699 {
1700 {BFD_RELOC_NONE, R_ARM_NONE},
1701 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1702 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1703 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1704 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1705 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1706 {BFD_RELOC_32, R_ARM_ABS32},
1707 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1708 {BFD_RELOC_8, R_ARM_ABS8},
1709 {BFD_RELOC_16, R_ARM_ABS16},
1710 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1711 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1712 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1713 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1718 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1719 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1720 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1721 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1722 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1723 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1724 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1725 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1726 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1727 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1728 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1729 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1730 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1731 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1732 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1733 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1734 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1735 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1736 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1737 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1738 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1739 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1740 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1741 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1742 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1743 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1744 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1745 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1746 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1747 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1749 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1750 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1751 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1753 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1754 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1755 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1756 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1757 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1758 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1759 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1760 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1761 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1762 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1763 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1764 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1765 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1767 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1768 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1769 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1770 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1771 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1772 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1773 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1774 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1775 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1776 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1777 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1778 };
1779
1780static reloc_howto_type *
f1c71a59
ZW		 1781elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1782 bfd_reloc_code_real_type code)
7f266840
DJ		 1783{
1784 unsigned int i;
c19d1205
ZW		 1785 for (i = 0; i < NUM_ELEM (elf32_arm_reloc_map); i ++)
1786 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1787 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1788
c19d1205 1789 return NULL;
7f266840
DJ		 1790}
1791
157090f7
AM		 1792static reloc_howto_type *
1793elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1794 const char *r_name)
1795{
1796 unsigned int i;
1797
1798 for (i = 0;
1799 i < (sizeof (elf32_arm_howto_table_1)
1800 / sizeof (elf32_arm_howto_table_1[0]));
1801 i++)
1802 if (elf32_arm_howto_table_1[i].name != NULL
1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1804 return &elf32_arm_howto_table_1[i];
1805
1806 for (i = 0;
1807 i < (sizeof (elf32_arm_howto_table_2)
1808 / sizeof (elf32_arm_howto_table_2[0]));
1809 i++)
1810 if (elf32_arm_howto_table_2[i].name != NULL
1811 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1812 return &elf32_arm_howto_table_2[i];
1813
1814 return NULL;
1815}
1816
7f266840
DJ		 1817/* Support for core dump NOTE sections */
1818static bfd_boolean
f1c71a59 1819elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1820{
1821 int offset;
1822 size_t size;
1823
1824 switch (note->descsz)
1825 {
1826 default:
1827 return FALSE;
1828
1829 case 148: /* Linux/ARM 32-bit*/
1830 /* pr_cursig */
1831 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1832
1833 /* pr_pid */
1834 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1835
1836 /* pr_reg */
1837 offset = 72;
1838 size = 72;
1839
1840 break;
1841 }
1842
1843 /* Make a ".reg/999" section. */
1844 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1845 size, note->descpos + offset);
1846}
1847
1848static bfd_boolean
f1c71a59 1849elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1850{
1851 switch (note->descsz)
1852 {
1853 default:
1854 return FALSE;
1855
1856 case 124: /* Linux/ARM elf_prpsinfo */
1857 elf_tdata (abfd)->core_program
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1859 elf_tdata (abfd)->core_command
1860 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1861 }
1862
1863 /* Note that for some reason, a spurious space is tacked
1864 onto the end of the args in some (at least one anyway)
1865 implementations, so strip it off if it exists. */
1866
1867 {
1868 char *command = elf_tdata (abfd)->core_command;
1869 int n = strlen (command);
1870
1871 if (0 < n && command[n - 1] == ' ')
1872 command[n - 1] = '\0';
1873 }
1874
1875 return TRUE;
1876}
1877
1878#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1879#define TARGET_LITTLE_NAME "elf32-littlearm"
1880#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1881#define TARGET_BIG_NAME "elf32-bigarm"
1882
1883#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1884#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1885
252b5132
RH		 1886typedef unsigned long int insn32;
1887typedef unsigned short int insn16;
1888
3a4a14e9
PB		 1889/* In lieu of proper flags, assume all EABIv4 or later objects are
1890 interworkable. */
57e8b36a 1891#define INTERWORK_FLAG(abfd) \
3a4a14e9 1892 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
85a84e7a 1893 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
9b485d32 1894
252b5132
RH		 1895/* The linker script knows the section names for placement.
1896 The entry_names are used to do simple name mangling on the stubs.
1897 Given a function name, and its type, the stub can be found. The
9b485d32 1898 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1899#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1900#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1901
1902#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1903#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1904
c7b8f16e
JB		 1905#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1906#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1907
845b51d6
PB		 1908#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1909#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1910
252b5132
RH		 1911/* The name of the dynamic interpreter. This is put in the .interp
1912 section. */
1913#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1914
5e681ec4
PB		 1915#ifdef FOUR_WORD_PLT
1916
252b5132
RH		 1917/* The first entry in a procedure linkage table looks like
1918 this. It is set up so that any shared library function that is
59f2c4e7 1919 called before the relocation has been set up calls the dynamic
9b485d32 1920 linker first. */
e5a52504 1921static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1922 {
1923 0xe52de004, /* str lr, [sp, #-4]! */
1924 0xe59fe010, /* ldr lr, [pc, #16] */
1925 0xe08fe00e, /* add lr, pc, lr */
1926 0xe5bef008, /* ldr pc, [lr, #8]! */
1927 };
1928
1929/* Subsequent entries in a procedure linkage table look like
1930 this. */
e5a52504 1931static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1932 {
1933 0xe28fc600, /* add ip, pc, #NN */
1934 0xe28cca00, /* add ip, ip, #NN */
1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1936 0x00000000, /* unused */
1937 };
1938
1939#else
1940
5e681ec4
PB		 1941/* The first entry in a procedure linkage table looks like
1942 this. It is set up so that any shared library function that is
1943 called before the relocation has been set up calls the dynamic
1944 linker first. */
e5a52504 1945static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1946 {
5e681ec4
PB		 1947 0xe52de004, /* str lr, [sp, #-4]! */
1948 0xe59fe004, /* ldr lr, [pc, #4] */
1949 0xe08fe00e, /* add lr, pc, lr */
1950 0xe5bef008, /* ldr pc, [lr, #8]! */
1951 0x00000000, /* &GOT[0] - . */
917583ad 1952 };
252b5132
RH		 1953
1954/* Subsequent entries in a procedure linkage table look like
1955 this. */
e5a52504 1956static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1957 {
1958 0xe28fc600, /* add ip, pc, #0xNN00000 */
1959 0xe28cca00, /* add ip, ip, #0xNN000 */
1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1961 };
1962
1963#endif
252b5132 1964
00a97672
RS		 1965/* The format of the first entry in the procedure linkage table
1966 for a VxWorks executable. */
1967static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1968 {
1969 0xe52dc008, /* str ip,[sp,#-8]! */
1970 0xe59fc000, /* ldr ip,[pc] */
1971 0xe59cf008, /* ldr pc,[ip,#8] */
1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1973 };
1974
1975/* The format of subsequent entries in a VxWorks executable. */
1976static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1977 {
1978 0xe59fc000, /* ldr ip,[pc] */
1979 0xe59cf000, /* ldr pc,[ip] */
1980 0x00000000, /* .long @got */
1981 0xe59fc000, /* ldr ip,[pc] */
1982 0xea000000, /* b _PLT */
1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1984 };
1985
1986/* The format of entries in a VxWorks shared library. */
1987static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1988 {
1989 0xe59fc000, /* ldr ip,[pc] */
1990 0xe79cf009, /* ldr pc,[ip,r9] */
1991 0x00000000, /* .long @got */
1992 0xe59fc000, /* ldr ip,[pc] */
1993 0xe599f008, /* ldr pc,[r9,#8] */
1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1995 };
1996
b7693d02
DJ		 1997/* An initial stub used if the PLT entry is referenced from Thumb code. */
1998#define PLT_THUMB_STUB_SIZE 4
1999static const bfd_vma elf32_arm_plt_thumb_stub [] =
2000 {
2001 0x4778, /* bx pc */
2002 0x46c0 /* nop */
2003 };
2004
e5a52504
MM		 2005/* The entries in a PLT when using a DLL-based target with multiple
2006 address spaces. */
2007static const bfd_vma elf32_arm_symbian_plt_entry [] =
2008 {
83a358aa 2009 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2011 };
2012
e489d0ae
PB		 2013/* Used to build a map of a section. This is required for mixed-endian
2014 code/data. */
2015
2016typedef struct elf32_elf_section_map
2017{
2018 bfd_vma vma;
2019 char type;
2020}
2021elf32_arm_section_map;
2022
c7b8f16e
JB		 2023/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2024
2025typedef enum
2026{
2027 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2028 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2029 VFP11_ERRATUM_ARM_VENEER,
2030 VFP11_ERRATUM_THUMB_VENEER
2031}
2032elf32_vfp11_erratum_type;
2033
2034typedef struct elf32_vfp11_erratum_list
2035{
2036 struct elf32_vfp11_erratum_list *next;
2037 bfd_vma vma;
2038 union
2039 {
2040 struct
2041 {
2042 struct elf32_vfp11_erratum_list *veneer;
2043 unsigned int vfp_insn;
2044 } b;
2045 struct
2046 {
2047 struct elf32_vfp11_erratum_list *branch;
2048 unsigned int id;
2049 } v;
2050 } u;
2051 elf32_vfp11_erratum_type type;
2052}
2053elf32_vfp11_erratum_list;
2054
8e3de13a 2055typedef struct _arm_elf_section_data
e489d0ae
PB		 2056{
2057 struct bfd_elf_section_data elf;
8e3de13a 2058 unsigned int mapcount;
c7b8f16e 2059 unsigned int mapsize;
e489d0ae 2060 elf32_arm_section_map *map;
c7b8f16e
JB		 2061 unsigned int erratumcount;
2062 elf32_vfp11_erratum_list *erratumlist;
8e3de13a
NC		 2063}
2064_arm_elf_section_data;
e489d0ae
PB		 2065
2066#define elf32_arm_section_data(sec) \
8e3de13a 2067 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2068
ba93b8ac
DJ		 2069/* The size of the thread control block. */
2070#define TCB_SIZE 8
2071
0ffa91dd 2072struct elf_arm_obj_tdata
ba93b8ac
DJ		 2073{
2074 struct elf_obj_tdata root;
2075
2076 /* tls_type for each local got entry. */
2077 char *local_got_tls_type;
ee065d83 2078
bf21ed78
MS		 2079 /* Zero to warn when linking objects with incompatible enum sizes. */
2080 int no_enum_size_warning;
ba93b8ac
DJ		 2081};
2082
0ffa91dd
NC		 2083#define elf_arm_tdata(bfd) \
2084 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2085
0ffa91dd
NC		 2086#define elf32_arm_local_got_tls_type(bfd) \
2087 (elf_arm_tdata (bfd)->local_got_tls_type)
2088
2089#define is_arm_elf(bfd) \
2090 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2091 && elf_tdata (bfd) != NULL \
2092 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2093
2094static bfd_boolean
2095elf32_arm_mkobject (bfd *abfd)
2096{
0ffa91dd
NC		 2097 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2098 ARM_ELF_TDATA);
ba93b8ac
DJ		 2099}
2100
252b5132
RH		 2101/* The ARM linker needs to keep track of the number of relocs that it
2102 decides to copy in check_relocs for each symbol. This is so that
2103 it can discard PC relative relocs if it doesn't need them when
2104 linking with -Bsymbolic. We store the information in a field
2105 extending the regular ELF linker hash table. */
2106
ba93b8ac
DJ		 2107/* This structure keeps track of the number of relocs we have copied
2108 for a given symbol. */
5e681ec4 2109struct elf32_arm_relocs_copied
917583ad
NC		 2110 {
2111 /* Next section. */
5e681ec4 2112 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2113 /* A section in dynobj. */
2114 asection * section;
2115 /* Number of relocs copied in this section. */
2116 bfd_size_type count;
ba93b8ac
DJ		 2117 /* Number of PC-relative relocs copied in this section. */
2118 bfd_size_type pc_count;
917583ad 2119 };
252b5132 2120
ba93b8ac
DJ		 2121#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2122
ba96a88f 2123/* Arm ELF linker hash entry. */
252b5132 2124struct elf32_arm_link_hash_entry
917583ad
NC		 2125 {
2126 struct elf_link_hash_entry root;
252b5132 2127
917583ad 2128 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2129 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2130
2131 /* We reference count Thumb references to a PLT entry separately,
2132 so that we can emit the Thumb trampoline only if needed. */
2133 bfd_signed_vma plt_thumb_refcount;
2134
bd97cb95
DJ		 2135 /* Some references from Thumb code may be eliminated by BL->BLX
2136 conversion, so record them separately. */
2137 bfd_signed_vma plt_maybe_thumb_refcount;
2138
b7693d02
DJ		 2139 /* Since PLT entries have variable size if the Thumb prologue is
2140 used, we need to record the index into .got.plt instead of
2141 recomputing it from the PLT offset. */
2142 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2143
2144#define GOT_UNKNOWN 0
2145#define GOT_NORMAL 1
2146#define GOT_TLS_GD 2
2147#define GOT_TLS_IE 4
2148 unsigned char tls_type;
a4fd1a8e
PB		 2149
2150 /* The symbol marking the real symbol location for exported thumb
2151 symbols with Arm stubs. */
2152 struct elf_link_hash_entry *export_glue;
917583ad 2153 };
252b5132 2154
252b5132 2155/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2156#define elf32_arm_link_hash_traverse(table, func, info) \
2157 (elf_link_hash_traverse \
2158 (&(table)->root, \
b7693d02 2159 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2160 (info)))
2161
2162/* Get the ARM elf linker hash table from a link_info structure. */
2163#define elf32_arm_hash_table(info) \
2164 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2165
9b485d32 2166/* ARM ELF linker hash table. */
252b5132 2167struct elf32_arm_link_hash_table
917583ad
NC		 2168 {
2169 /* The main hash table. */
2170 struct elf_link_hash_table root;
252b5132 2171
4cc11e76 2172 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
dc810e39 2173 bfd_size_type thumb_glue_size;
252b5132 2174
4cc11e76 2175 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
dc810e39 2176 bfd_size_type arm_glue_size;
252b5132 2177
845b51d6
PB		 2178 /* The size in bytes of section containing the ARMv4 BX veneers. */
2179 bfd_size_type bx_glue_size;
2180
2181 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2182 veneer has been populated. */
2183 bfd_vma bx_glue_offset[15];
2184
c7b8f16e
JB		 2185 /* The size in bytes of the section containing glue for VFP11 erratum
2186 veneers. */
2187 bfd_size_type vfp11_erratum_glue_size;
2188
4cc11e76 2189 /* An arbitrary input BFD chosen to hold the glue sections. */
917583ad 2190 bfd * bfd_of_glue_owner;
ba96a88f 2191
e489d0ae
PB		 2192 /* Nonzero to output a BE8 image. */
2193 int byteswap_code;
2194
9c504268 2195 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
87bc043a 2196 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
9c504268
PB		 2197 int target1_is_rel;
2198
eb043451
PB		 2199 /* The relocation to use for R_ARM_TARGET2 relocations. */
2200 int target2_reloc;
2201
845b51d6
PB		 2202 /* 0 = Ignore R_ARM_V4BX.
2203 1 = Convert BX to MOV PC.
2204 2 = Generate v4 interworing stubs. */
319850b4
JB		 2205 int fix_v4bx;
2206
33bfe774
JB		 2207 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2208 int use_blx;
2209
c7b8f16e
JB		 2210 /* What sort of code sequences we should look for which may trigger the
2211 VFP11 denorm erratum. */
2212 bfd_arm_vfp11_fix vfp11_fix;
2213
2214 /* Global counter for the number of fixes we have emitted. */
2215 int num_vfp11_fixes;
2216
27e55c4d
PB		 2217 /* Nonzero to force PIC branch veneers. */
2218 int pic_veneer;
2219
e5a52504
MM		 2220 /* The number of bytes in the initial entry in the PLT. */
2221 bfd_size_type plt_header_size;
2222
2223 /* The number of bytes in the subsequent PLT etries. */
2224 bfd_size_type plt_entry_size;
2225
00a97672
RS		 2226 /* True if the target system is VxWorks. */
2227 int vxworks_p;
2228
e5a52504
MM		 2229 /* True if the target system is Symbian OS. */
2230 int symbian_p;
2231
4e7fd91e
PB		 2232 /* True if the target uses REL relocations. */
2233 int use_rel;
2234
5e681ec4
PB		 2235 /* Short-cuts to get to dynamic linker sections. */
2236 asection *sgot;
2237 asection *sgotplt;
2238 asection *srelgot;
2239 asection *splt;
2240 asection *srelplt;
2241 asection *sdynbss;
2242 asection *srelbss;
2243
00a97672
RS		 2244 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2245 asection *srelplt2;
2246
ba93b8ac
DJ		 2247 /* Data for R_ARM_TLS_LDM32 relocations. */
2248 union {
2249 bfd_signed_vma refcount;
2250 bfd_vma offset;
2251 } tls_ldm_got;
2252
5e681ec4
PB		 2253 /* Small local sym to section mapping cache. */
2254 struct sym_sec_cache sym_sec;
b7693d02
DJ		 2255
2256 /* For convenience in allocate_dynrelocs. */
2257 bfd * obfd;
917583ad 2258 };
252b5132 2259
780a67af
NC		 2260/* Create an entry in an ARM ELF linker hash table. */
2261
2262static struct bfd_hash_entry *
57e8b36a
NC		 2263elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2264 struct bfd_hash_table * table,
2265 const char * string)
780a67af
NC		 2266{
2267 struct elf32_arm_link_hash_entry * ret =
2268 (struct elf32_arm_link_hash_entry *) entry;
2269
2270 /* Allocate the structure if it has not already been allocated by a
2271 subclass. */
2272 if (ret == (struct elf32_arm_link_hash_entry *) NULL)
57e8b36a
NC		 2273 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2274 if (ret == NULL)
780a67af
NC		 2275 return (struct bfd_hash_entry *) ret;
2276
2277 /* Call the allocation method of the superclass. */
2278 ret = ((struct elf32_arm_link_hash_entry *)
2279 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2280 table, string));
57e8b36a 2281 if (ret != NULL)
b7693d02
DJ		 2282 {
2283 ret->relocs_copied = NULL;
ba93b8ac 2284 ret->tls_type = GOT_UNKNOWN;
b7693d02 2285 ret->plt_thumb_refcount = 0;
bd97cb95 2286 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2287 ret->plt_got_offset = -1;
a4fd1a8e 2288 ret->export_glue = NULL;
b7693d02 2289 }
780a67af
NC		 2290
2291 return (struct bfd_hash_entry *) ret;
2292}
2293
00a97672
RS		 2294/* Return true if NAME is the name of the relocation section associated
2295 with S. */
2296
2297static bfd_boolean
2298reloc_section_p (struct elf32_arm_link_hash_table *htab,
2299 const char *name, asection *s)
2300{
2301 if (htab->use_rel)
0112cd26 2302 return CONST_STRNEQ (name, ".rel") && strcmp (s->name, name + 4) == 0;
00a97672 2303 else
0112cd26 2304 return CONST_STRNEQ (name, ".rela") && strcmp (s->name, name + 5) == 0;
00a97672
RS		 2305}
2306
2307/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2308 shortcuts to them in our hash table. */
2309
2310static bfd_boolean
57e8b36a 2311create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2312{
2313 struct elf32_arm_link_hash_table *htab;
2314
e5a52504
MM		 2315 htab = elf32_arm_hash_table (info);
2316 /* BPABI objects never have a GOT, or associated sections. */
2317 if (htab->symbian_p)
2318 return TRUE;
2319
5e681ec4
PB		 2320 if (! _bfd_elf_create_got_section (dynobj, info))
2321 return FALSE;
2322
5e681ec4
PB		 2323 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2324 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2325 if (!htab->sgot || !htab->sgotplt)
2326 abort ();
2327
00a97672
RS		 2328 htab->srelgot = bfd_make_section_with_flags (dynobj,
2329 RELOC_SECTION (htab, ".got"),
3496cb2a
L		 2330 (SEC_ALLOC | SEC_LOAD
2331 | SEC_HAS_CONTENTS
2332 | SEC_IN_MEMORY
2333 | SEC_LINKER_CREATED
2334 | SEC_READONLY));
5e681ec4 2335 if (htab->srelgot == NULL
5e681ec4
PB		 2336 || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
2337 return FALSE;
2338 return TRUE;
2339}
2340
00a97672
RS		 2341/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2342 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2343 hash table. */
2344
2345static bfd_boolean
57e8b36a 2346elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2347{
2348 struct elf32_arm_link_hash_table *htab;
2349
2350 htab = elf32_arm_hash_table (info);
2351 if (!htab->sgot && !create_got_section (dynobj, info))
2352 return FALSE;
2353
2354 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2355 return FALSE;
2356
2357 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2358 htab->srelplt = bfd_get_section_by_name (dynobj,
2359 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2360 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2361 if (!info->shared)
00a97672
RS		 2362 htab->srelbss = bfd_get_section_by_name (dynobj,
2363 RELOC_SECTION (htab, ".bss"));
2364
2365 if (htab->vxworks_p)
2366 {
2367 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2368 return FALSE;
2369
2370 if (info->shared)
2371 {
2372 htab->plt_header_size = 0;
2373 htab->plt_entry_size
2374 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2375 }
2376 else
2377 {
2378 htab->plt_header_size
2379 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2380 htab->plt_entry_size
2381 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2382 }
2383 }
5e681ec4 2384
e5a52504
MM		 2385 if (!htab->splt
2386 || !htab->srelplt
2387 || !htab->sdynbss
5e681ec4
PB		 2388 || (!info->shared && !htab->srelbss))
2389 abort ();
2390
2391 return TRUE;
2392}
2393
2394/* Copy the extra info we tack onto an elf_link_hash_entry. */
2395
2396static void
fcfa13d2 2397elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
5e681ec4
PB		 2398 struct elf_link_hash_entry *dir,
2399 struct elf_link_hash_entry *ind)
2400{
2401 struct elf32_arm_link_hash_entry *edir, *eind;
2402
2403 edir = (struct elf32_arm_link_hash_entry *) dir;
2404 eind = (struct elf32_arm_link_hash_entry *) ind;
2405
2406 if (eind->relocs_copied != NULL)
2407 {
2408 if (edir->relocs_copied != NULL)
2409 {
2410 struct elf32_arm_relocs_copied **pp;
2411 struct elf32_arm_relocs_copied *p;
2412
fcfa13d2 2413 /* Add reloc counts against the indirect sym to the direct sym
5e681ec4
PB		 2414 list. Merge any entries against the same section. */
2415 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2416 {
2417 struct elf32_arm_relocs_copied *q;
2418
2419 for (q = edir->relocs_copied; q != NULL; q = q->next)
2420 if (q->section == p->section)
2421 {
ba93b8ac 2422 q->pc_count += p->pc_count;
5e681ec4
PB		 2423 q->count += p->count;
2424 *pp = p->next;
2425 break;
2426 }
2427 if (q == NULL)
2428 pp = &p->next;
2429 }
2430 *pp = edir->relocs_copied;
2431 }
2432
2433 edir->relocs_copied = eind->relocs_copied;
2434 eind->relocs_copied = NULL;
2435 }
2436
b34b2d70 2437 if (ind->root.type == bfd_link_hash_indirect)
ba93b8ac 2438 {
b34b2d70
DJ		 2439 /* Copy over PLT info. */
2440 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2441 eind->plt_thumb_refcount = 0;
bd97cb95
DJ		 2442 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2443 eind->plt_maybe_thumb_refcount = 0;
b34b2d70
DJ		 2444
2445 if (dir->got.refcount <= 0)
2446 {
2447 edir->tls_type = eind->tls_type;
2448 eind->tls_type = GOT_UNKNOWN;
2449 }
ba93b8ac
DJ		 2450 }
2451
fcfa13d2 2452 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
5e681ec4
PB		 2453}
2454
9b485d32 2455/* Create an ARM elf linker hash table. */
252b5132
RH		 2456
2457static struct bfd_link_hash_table *
57e8b36a 2458elf32_arm_link_hash_table_create (bfd *abfd)
252b5132
RH		 2459{
2460 struct elf32_arm_link_hash_table *ret;
dc810e39 2461 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
252b5132 2462
57e8b36a
NC		 2463 ret = bfd_malloc (amt);
2464 if (ret == NULL)
252b5132
RH		 2465 return NULL;
2466
57e8b36a 2467 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
66eb6687
AM		 2468 elf32_arm_link_hash_newfunc,
2469 sizeof (struct elf32_arm_link_hash_entry)))
252b5132 2470 {
e2d34d7d 2471 free (ret);
252b5132
RH		 2472 return NULL;
2473 }
2474
5e681ec4
PB		 2475 ret->sgot = NULL;
2476 ret->sgotplt = NULL;
2477 ret->srelgot = NULL;
2478 ret->splt = NULL;
2479 ret->srelplt = NULL;
2480 ret->sdynbss = NULL;
2481 ret->srelbss = NULL;
00a97672 2482 ret->srelplt2 = NULL;
252b5132
RH		 2483 ret->thumb_glue_size = 0;
2484 ret->arm_glue_size = 0;
845b51d6
PB		 2485 ret->bx_glue_size = 0;
2486 memset (ret->bx_glue_offset, 0, sizeof(ret->bx_glue_offset));
c7b8f16e
JB		 2487 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2488 ret->vfp11_erratum_glue_size = 0;
2489 ret->num_vfp11_fixes = 0;
252b5132 2490 ret->bfd_of_glue_owner = NULL;
e489d0ae 2491 ret->byteswap_code = 0;
9c504268 2492 ret->target1_is_rel = 0;
eb043451 2493 ret->target2_reloc = R_ARM_NONE;
e5a52504
MM		 2494#ifdef FOUR_WORD_PLT
2495 ret->plt_header_size = 16;
2496 ret->plt_entry_size = 16;
2497#else
2498 ret->plt_header_size = 20;
2499 ret->plt_entry_size = 12;
2500#endif
33bfe774
JB		 2501 ret->fix_v4bx = 0;
2502 ret->use_blx = 0;
00a97672 2503 ret->vxworks_p = 0;
e5a52504 2504 ret->symbian_p = 0;
4e7fd91e 2505 ret->use_rel = 1;
5e681ec4 2506 ret->sym_sec.abfd = NULL;
b7693d02 2507 ret->obfd = abfd;
ba93b8ac 2508 ret->tls_ldm_got.refcount = 0;
252b5132
RH		 2509
2510 return &ret->root.root;
2511}
2512
9b485d32
NC		 2513/* Locate the Thumb encoded calling stub for NAME. */
2514
252b5132 2515static struct elf_link_hash_entry *
57e8b36a
NC		 2516find_thumb_glue (struct bfd_link_info *link_info,
2517 const char *name,
f2a9dd69 2518 char **error_message)
252b5132
RH		 2519{
2520 char *tmp_name;
2521 struct elf_link_hash_entry *hash;
2522 struct elf32_arm_link_hash_table *hash_table;
2523
2524 /* We need a pointer to the armelf specific hash table. */
2525 hash_table = elf32_arm_hash_table (link_info);
2526
57e8b36a
NC		 2527 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2528 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2529
2530 BFD_ASSERT (tmp_name);
2531
2532 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2533
2534 hash = elf_link_hash_lookup
b34976b6 2535 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 2536
b1657152
AM		 2537 if (hash == NULL
2538 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
2539 tmp_name, name) == -1)
2540 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 2541
2542 free (tmp_name);
2543
2544 return hash;
2545}
2546
9b485d32
NC		 2547/* Locate the ARM encoded calling stub for NAME. */
2548
252b5132 2549static struct elf_link_hash_entry *
57e8b36a
NC		 2550find_arm_glue (struct bfd_link_info *link_info,
2551 const char *name,
f2a9dd69 2552 char **error_message)
252b5132
RH		 2553{
2554 char *tmp_name;
2555 struct elf_link_hash_entry *myh;
2556 struct elf32_arm_link_hash_table *hash_table;
2557
2558 /* We need a pointer to the elfarm specific hash table. */
2559 hash_table = elf32_arm_hash_table (link_info);
2560
57e8b36a
NC		 2561 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2562 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2563
2564 BFD_ASSERT (tmp_name);
2565
2566 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2567
2568 myh = elf_link_hash_lookup
b34976b6 2569 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 2570
b1657152
AM		 2571 if (myh == NULL
2572 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
2573 tmp_name, name) == -1)
2574 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 2575
2576 free (tmp_name);
2577
2578 return myh;
2579}
2580
8f6277f5 2581/* ARM->Thumb glue (static images):
252b5132
RH		 2582
2583 .arm
2584 __func_from_arm:
2585 ldr r12, __func_addr
2586 bx r12
2587 __func_addr:
8f6277f5 2588 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 2589
26079076
PB		 2590 (v5t static images)
2591 .arm
2592 __func_from_arm:
2593 ldr pc, __func_addr
2594 __func_addr:
2595 .word func @ behave as if you saw a ARM_32 reloc.
2596
8f6277f5
PB		 2597 (relocatable images)
2598 .arm
2599 __func_from_arm:
2600 ldr r12, __func_offset
2601 add r12, r12, pc
2602 bx r12
2603 __func_offset:
2604 .word func - .
2605 */
2606
2607#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 2608static const insn32 a2t1_ldr_insn = 0xe59fc000;
2609static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
2610static const insn32 a2t3_func_addr_insn = 0x00000001;
2611
26079076
PB		 2612#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
2613static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
2614static const insn32 a2t2v5_func_addr_insn = 0x00000001;
2615
8f6277f5
PB		 2616#define ARM2THUMB_PIC_GLUE_SIZE 16
2617static const insn32 a2t1p_ldr_insn = 0xe59fc004;
2618static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
2619static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
2620
9b485d32 2621/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132
RH		 2622
2623 .thumb .thumb
2624 .align 2 .align 2
2625 __func_from_thumb: __func_from_thumb:
2626 bx pc push {r6, lr}
2627 nop ldr r6, __func_addr
2628 .arm mov lr, pc
2629 __func_change_to_arm: bx r6
2630 b func .arm
2631 __func_back_to_thumb:
2632 ldmia r13! {r6, lr}
2633 bx lr
2634 __func_addr:
9b485d32 2635 .word func */
252b5132
RH		 2636
2637#define THUMB2ARM_GLUE_SIZE 8
2638static const insn16 t2a1_bx_pc_insn = 0x4778;
2639static const insn16 t2a2_noop_insn = 0x46c0;
2640static const insn32 t2a3_b_insn = 0xea000000;
2641
c7b8f16e
JB		 2642#define VFP11_ERRATUM_VENEER_SIZE 8
2643
845b51d6
PB		 2644#define ARM_BX_VENEER_SIZE 12
2645static const insn32 armbx1_tst_insn = 0xe3100001;
2646static const insn32 armbx2_moveq_insn = 0x01a0f000;
2647static const insn32 armbx3_bx_insn = 0xe12fff10;
2648
7e392df6 2649#ifndef ELFARM_NABI_C_INCLUDED
b34976b6 2650bfd_boolean
57e8b36a 2651bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
252b5132
RH		 2652{
2653 asection * s;
2654 bfd_byte * foo;
2655 struct elf32_arm_link_hash_table * globals;
2656
2657 globals = elf32_arm_hash_table (info);
2658
2659 BFD_ASSERT (globals != NULL);
2660
2661 if (globals->arm_glue_size != 0)
2662 {
2663 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2664
dc810e39
AM		 2665 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
2666 ARM2THUMB_GLUE_SECTION_NAME);
252b5132
RH		 2667
2668 BFD_ASSERT (s != NULL);
2669
57e8b36a 2670 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
252b5132 2671
2f475487 2672 BFD_ASSERT (s->size == globals->arm_glue_size);
252b5132
RH		 2673 s->contents = foo;
2674 }
2675
2676 if (globals->thumb_glue_size != 0)
2677 {
2678 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2679
2680 s = bfd_get_section_by_name
2681 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2682
2683 BFD_ASSERT (s != NULL);
2684
57e8b36a 2685 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
252b5132 2686
2f475487 2687 BFD_ASSERT (s->size == globals->thumb_glue_size);
252b5132
RH		 2688 s->contents = foo;
2689 }
c7b8f16e
JB		 2690
2691 if (globals->vfp11_erratum_glue_size != 0)
2692 {
2693 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2694
2695 s = bfd_get_section_by_name
2696 (globals->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2697
2698 BFD_ASSERT (s != NULL);
2699
2700 foo = bfd_alloc (globals->bfd_of_glue_owner,
2701 globals->vfp11_erratum_glue_size);
2702
2703 BFD_ASSERT (s->size == globals->vfp11_erratum_glue_size);
2704 s->contents = foo;
2705 }
252b5132 2706
845b51d6
PB		 2707 if (globals->bx_glue_size != 0)
2708 {
2709 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2710
2711 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
2712 ARM_BX_GLUE_SECTION_NAME);
2713
2714 BFD_ASSERT (s != NULL);
2715
2716 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->bx_glue_size);
2717
2718 BFD_ASSERT (s->size == globals->bx_glue_size);
2719 s->contents = foo;
2720 }
2721
b34976b6 2722 return TRUE;
252b5132
RH		 2723}
2724
a4fd1a8e
PB		 2725/* Allocate space and symbols for calling a Thumb function from Arm mode.
2726 returns the symbol identifying teh stub. */
2727static struct elf_link_hash_entry *
57e8b36a
NC		 2728record_arm_to_thumb_glue (struct bfd_link_info * link_info,
2729 struct elf_link_hash_entry * h)
252b5132
RH		 2730{
2731 const char * name = h->root.root.string;
63b0f745 2732 asection * s;
252b5132
RH		 2733 char * tmp_name;
2734 struct elf_link_hash_entry * myh;
14a793b2 2735 struct bfd_link_hash_entry * bh;
252b5132 2736 struct elf32_arm_link_hash_table * globals;
dc810e39 2737 bfd_vma val;
2f475487 2738 bfd_size_type size;
252b5132
RH		 2739
2740 globals = elf32_arm_hash_table (link_info);
2741
2742 BFD_ASSERT (globals != NULL);
2743 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2744
2745 s = bfd_get_section_by_name
2746 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
2747
252b5132
RH		 2748 BFD_ASSERT (s != NULL);
2749
57e8b36a 2750 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2751
2752 BFD_ASSERT (tmp_name);
2753
2754 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2755
2756 myh = elf_link_hash_lookup
b34976b6 2757 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 2758
2759 if (myh != NULL)
2760 {
9b485d32 2761 /* We've already seen this guy. */
252b5132 2762 free (tmp_name);
a4fd1a8e 2763 return myh;
252b5132
RH		 2764 }
2765
57e8b36a
NC		 2766 /* The only trick here is using hash_table->arm_glue_size as the value.
2767 Even though the section isn't allocated yet, this is where we will be
2768 putting it. */
14a793b2 2769 bh = NULL;
dc810e39
AM		 2770 val = globals->arm_glue_size + 1;
2771 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
2772 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2773 NULL, TRUE, FALSE, &bh);
252b5132 2774
b7693d02
DJ		 2775 myh = (struct elf_link_hash_entry *) bh;
2776 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2777 myh->forced_local = 1;
2778
252b5132
RH		 2779 free (tmp_name);
2780
27e55c4d
PB		 2781 if (link_info->shared || globals->root.is_relocatable_executable
2782 || globals->pic_veneer)
2f475487 2783 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 2784 else if (globals->use_blx)
2785 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 2786 else
2f475487
AM		 2787 size = ARM2THUMB_STATIC_GLUE_SIZE;
2788
2789 s->size += size;
2790 globals->arm_glue_size += size;
252b5132 2791
a4fd1a8e 2792 return myh;
252b5132
RH		 2793}
2794
2795static void
57e8b36a
NC		 2796record_thumb_to_arm_glue (struct bfd_link_info *link_info,
2797 struct elf_link_hash_entry *h)
252b5132
RH		 2798{
2799 const char *name = h->root.root.string;
63b0f745 2800 asection *s;
252b5132
RH		 2801 char *tmp_name;
2802 struct elf_link_hash_entry *myh;
14a793b2 2803 struct bfd_link_hash_entry *bh;
252b5132 2804 struct elf32_arm_link_hash_table *hash_table;
dc810e39 2805 bfd_vma val;
252b5132
RH		 2806
2807 hash_table = elf32_arm_hash_table (link_info);
2808
2809 BFD_ASSERT (hash_table != NULL);
2810 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2811
2812 s = bfd_get_section_by_name
2813 (hash_table->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2814
2815 BFD_ASSERT (s != NULL);
2816
57e8b36a
NC		 2817 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2818 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2819
2820 BFD_ASSERT (tmp_name);
2821
2822 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2823
2824 myh = elf_link_hash_lookup
b34976b6 2825 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 2826
2827 if (myh != NULL)
2828 {
9b485d32 2829 /* We've already seen this guy. */
252b5132 2830 free (tmp_name);
9b485d32 2831 return;
252b5132
RH		 2832 }
2833
14a793b2 2834 bh = NULL;
dc810e39
AM		 2835 val = hash_table->thumb_glue_size + 1;
2836 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2837 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2838 NULL, TRUE, FALSE, &bh);
252b5132 2839
9b485d32 2840 /* If we mark it 'Thumb', the disassembler will do a better job. */
14a793b2 2841 myh = (struct elf_link_hash_entry *) bh;
b7693d02
DJ		 2842 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
2843 myh->forced_local = 1;
252b5132
RH		 2844
2845 free (tmp_name);
2846
252b5132
RH		 2847#define CHANGE_TO_ARM "__%s_change_to_arm"
2848#define BACK_FROM_ARM "__%s_back_from_arm"
2849
9b485d32 2850 /* Allocate another symbol to mark where we switch to Arm mode. */
57e8b36a
NC		 2851 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2852 + strlen (CHANGE_TO_ARM) + 1);
252b5132
RH		 2853
2854 BFD_ASSERT (tmp_name);
2855
2856 sprintf (tmp_name, CHANGE_TO_ARM, name);
2857
14a793b2 2858 bh = NULL;
dc810e39
AM		 2859 val = hash_table->thumb_glue_size + 4,
2860 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2861 tmp_name, BSF_LOCAL, s, val,
b34976b6 2862 NULL, TRUE, FALSE, &bh);
252b5132
RH		 2863
2864 free (tmp_name);
2865
2f475487 2866 s->size += THUMB2ARM_GLUE_SIZE;
252b5132
RH		 2867 hash_table->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
2868
2869 return;
2870}
2871
c7b8f16e 2872
845b51d6
PB		 2873/* Allocate space for ARMv4 BX veneers. */
2874
2875static void
2876record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
2877{
2878 asection * s;
2879 struct elf32_arm_link_hash_table *globals;
2880 char *tmp_name;
2881 struct elf_link_hash_entry *myh;
2882 struct bfd_link_hash_entry *bh;
2883 bfd_vma val;
2884
2885 /* BX PC does not need a veneer. */
2886 if (reg == 15)
2887 return;
2888
2889 globals = elf32_arm_hash_table (link_info);
2890
2891 BFD_ASSERT (globals != NULL);
2892 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2893
2894 /* Check if this veneer has already been allocated. */
2895 if (globals->bx_glue_offset[reg])
2896 return;
2897
2898 s = bfd_get_section_by_name
2899 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
2900
2901 BFD_ASSERT (s != NULL);
2902
2903 /* Add symbol for veneer. */
2904 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
2905
2906 BFD_ASSERT (tmp_name);
2907
2908 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
2909
2910 myh = elf_link_hash_lookup
2911 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
2912
2913 BFD_ASSERT (myh == NULL);
2914
2915 bh = NULL;
2916 val = globals->bx_glue_size;
2917 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
2918 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
2919 NULL, TRUE, FALSE, &bh);
2920
2921 myh = (struct elf_link_hash_entry *) bh;
2922 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2923 myh->forced_local = 1;
2924
2925 s->size += ARM_BX_VENEER_SIZE;
2926 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
2927 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
2928}
2929
2930
c7b8f16e
JB		 2931/* Add an entry to the code/data map for section SEC. */
2932
2933static void
2934elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
2935{
2936 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
2937 unsigned int newidx;
2938
2939 if (sec_data->map == NULL)
2940 {
2941 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
2942 sec_data->mapcount = 0;
2943 sec_data->mapsize = 1;
2944 }
2945
2946 newidx = sec_data->mapcount++;
2947
2948 if (sec_data->mapcount > sec_data->mapsize)
2949 {
2950 sec_data->mapsize *= 2;
515ef31d
NC		 2951 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
2952 * sizeof (elf32_arm_section_map));
2953 }
2954
2955 if (sec_data->map)
2956 {
2957 sec_data->map[newidx].vma = vma;
2958 sec_data->map[newidx].type = type;
c7b8f16e 2959 }
c7b8f16e
JB		 2960}
2961
2962
2963/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
2964 veneers are handled for now. */
2965
2966static bfd_vma
2967record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
2968 elf32_vfp11_erratum_list *branch,
2969 bfd *branch_bfd,
2970 asection *branch_sec,
2971 unsigned int offset)
2972{
2973 asection *s;
2974 struct elf32_arm_link_hash_table *hash_table;
2975 char *tmp_name;
2976 struct elf_link_hash_entry *myh;
2977 struct bfd_link_hash_entry *bh;
2978 bfd_vma val;
2979 struct _arm_elf_section_data *sec_data;
2980 int errcount;
2981 elf32_vfp11_erratum_list *newerr;
2982
2983 hash_table = elf32_arm_hash_table (link_info);
2984
2985 BFD_ASSERT (hash_table != NULL);
2986 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2987
2988 s = bfd_get_section_by_name
2989 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2990
2991 sec_data = elf32_arm_section_data (s);
2992
2993 BFD_ASSERT (s != NULL);
2994
2995 tmp_name = bfd_malloc ((bfd_size_type) strlen
2996 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
2997
2998 BFD_ASSERT (tmp_name);
2999
3000 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
3001 hash_table->num_vfp11_fixes);
3002
3003 myh = elf_link_hash_lookup
3004 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
3005
3006 BFD_ASSERT (myh == NULL);
3007
3008 bh = NULL;
3009 val = hash_table->vfp11_erratum_glue_size;
3010 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
3011 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
3012 NULL, TRUE, FALSE, &bh);
3013
3014 myh = (struct elf_link_hash_entry *) bh;
3015 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
3016 myh->forced_local = 1;
3017
3018 /* Link veneer back to calling location. */
3019 errcount = ++(sec_data->erratumcount);
3020 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
3021
3022 newerr->type = VFP11_ERRATUM_ARM_VENEER;
3023 newerr->vma = -1;
3024 newerr->u.v.branch = branch;
3025 newerr->u.v.id = hash_table->num_vfp11_fixes;
3026 branch->u.b.veneer = newerr;
3027
3028 newerr->next = sec_data->erratumlist;
3029 sec_data->erratumlist = newerr;
3030
3031 /* A symbol for the return from the veneer. */
3032 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
3033 hash_table->num_vfp11_fixes);
3034
3035 myh = elf_link_hash_lookup
3036 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
3037
3038 if (myh != NULL)
3039 abort ();
3040
3041 bh = NULL;
3042 val = offset + 4;
3043 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
3044 branch_sec, val, NULL, TRUE, FALSE, &bh);
3045
3046 myh = (struct elf_link_hash_entry *) bh;
3047 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
3048 myh->forced_local = 1;
3049
3050 free (tmp_name);
3051
3052 /* Generate a mapping symbol for the veneer section, and explicitly add an
3053 entry for that symbol to the code/data map for the section. */
3054 if (hash_table->vfp11_erratum_glue_size == 0)
3055 {
3056 bh = NULL;
3057 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
3058 ever requires this erratum fix. */
3059 _bfd_generic_link_add_one_symbol (link_info,
3060 hash_table->bfd_of_glue_owner, "$a",
3061 BSF_LOCAL, s, 0, NULL,
3062 TRUE, FALSE, &bh);
3063
3064 myh = (struct elf_link_hash_entry *) bh;
3065 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
3066 myh->forced_local = 1;
3067
3068 /* The elf32_arm_init_maps function only cares about symbols from input
3069 BFDs. We must make a note of this generated mapping symbol
3070 ourselves so that code byteswapping works properly in
3071 elf32_arm_write_section. */
3072 elf32_arm_section_map_add (s, 'a', 0);
3073 }
3074
3075 s->size += VFP11_ERRATUM_VENEER_SIZE;
3076 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
3077 hash_table->num_vfp11_fixes++;
3078
3079 /* The offset of the veneer. */
3080 return val;
3081}
3082
8afb0e02
NC		 3083/* Add the glue sections to ABFD. This function is called from the
3084 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 3085
b34976b6 3086bfd_boolean
57e8b36a
NC		 3087bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
3088 struct bfd_link_info *info)
252b5132 3089{
252b5132
RH		 3090 flagword flags;
3091 asection *sec;
3092
8afb0e02
NC		 3093 /* If we are only performing a partial
3094 link do not bother adding the glue. */
1049f94e 3095 if (info->relocatable)
b34976b6 3096 return TRUE;
252b5132 3097
252b5132
RH		 3098 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
3099
3100 if (sec == NULL)
3101 {
57db232e
NC		 3102 /* Note: we do not include the flag SEC_LINKER_CREATED, as this
3103 will prevent elf_link_input_bfd() from processing the contents
3104 of this section. */
2f475487
AM		 3105 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3106 | SEC_CODE | SEC_READONLY);
252b5132 3107
3496cb2a
L		 3108 sec = bfd_make_section_with_flags (abfd,
3109 ARM2THUMB_GLUE_SECTION_NAME,
3110 flags);
252b5132
RH		 3111
3112 if (sec == NULL
252b5132 3113 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3114 return FALSE;
9a5aca8c 3115
57db232e
NC		 3116 /* Set the gc mark to prevent the section from being removed by garbage
3117 collection, despite the fact that no relocs refer to this section. */
3118 sec->gc_mark = 1;
252b5132
RH		 3119 }
3120
3121 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
3122
3123 if (sec == NULL)
3124 {
2f475487
AM		 3125 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3126 | SEC_CODE | SEC_READONLY);
252b5132 3127
3496cb2a
L		 3128 sec = bfd_make_section_with_flags (abfd,
3129 THUMB2ARM_GLUE_SECTION_NAME,
3130 flags);
252b5132
RH		 3131
3132 if (sec == NULL
252b5132 3133 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3134 return FALSE;
9a5aca8c 3135
57db232e 3136 sec->gc_mark = 1;
252b5132
RH		 3137 }
3138
c7b8f16e
JB		 3139 sec = bfd_get_section_by_name (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME);
3140
3141 if (sec == NULL)
3142 {
3143 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3144 | SEC_CODE | SEC_READONLY);
3145
3146 sec = bfd_make_section_with_flags (abfd,
3147 VFP11_ERRATUM_VENEER_SECTION_NAME,
3148 flags);
3149
3150 if (sec == NULL
3151 || !bfd_set_section_alignment (abfd, sec, 2))
3152 return FALSE;
3153
3154 sec->gc_mark = 1;
3155 }
3156
845b51d6
PB		 3157 sec = bfd_get_section_by_name (abfd, ARM_BX_GLUE_SECTION_NAME);
3158
3159 if (sec == NULL)
3160 {
3161 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3162 | SEC_CODE | SEC_READONLY);
3163
3164 sec = bfd_make_section_with_flags (abfd,
3165 ARM_BX_GLUE_SECTION_NAME,
3166 flags);
3167
3168 if (sec == NULL
3169 || !bfd_set_section_alignment (abfd, sec, 2))
3170 return FALSE;
3171
3172 sec->gc_mark = 1;
3173 }
3174
b34976b6 3175 return TRUE;
8afb0e02
NC		 3176}
3177
3178/* Select a BFD to be used to hold the sections used by the glue code.
3179 This function is called from the linker scripts in ld/emultempl/
3180 {armelf/pe}.em */
3181
b34976b6 3182bfd_boolean
57e8b36a 3183bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 3184{
3185 struct elf32_arm_link_hash_table *globals;
3186
3187 /* If we are only performing a partial link
3188 do not bother getting a bfd to hold the glue. */
1049f94e 3189 if (info->relocatable)
b34976b6 3190 return TRUE;
8afb0e02 3191
b7693d02
DJ		 3192 /* Make sure we don't attach the glue sections to a dynamic object. */
3193 BFD_ASSERT (!(abfd->flags & DYNAMIC));
3194
8afb0e02
NC		 3195 globals = elf32_arm_hash_table (info);
3196
3197 BFD_ASSERT (globals != NULL);
3198
3199 if (globals->bfd_of_glue_owner != NULL)
b34976b6 3200 return TRUE;
8afb0e02 3201
252b5132
RH		 3202 /* Save the bfd for later use. */
3203 globals->bfd_of_glue_owner = abfd;
cedb70c5 3204
b34976b6 3205 return TRUE;
252b5132
RH		 3206}
3207
39b41c9c
PB		 3208static void check_use_blx(struct elf32_arm_link_hash_table *globals)
3209{
104d59d1
JM		 3210 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3211 Tag_CPU_arch) > 2)
39b41c9c
PB		 3212 globals->use_blx = 1;
3213}
3214
b34976b6 3215bfd_boolean
57e8b36a 3216bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 3217 struct bfd_link_info *link_info)
252b5132
RH		 3218{
3219 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 3220 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 3221 Elf_Internal_Rela *irel, *irelend;
3222 bfd_byte *contents = NULL;
252b5132
RH		 3223
3224 asection *sec;
3225 struct elf32_arm_link_hash_table *globals;
3226
3227 /* If we are only performing a partial link do not bother
3228 to construct any glue. */
1049f94e 3229 if (link_info->relocatable)
b34976b6 3230 return TRUE;
252b5132 3231
39ce1a6a
NC		 3232 /* Here we have a bfd that is to be included on the link. We have a
3233 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 3234 globals = elf32_arm_hash_table (link_info);
3235
3236 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 3237
3238 check_use_blx (globals);
252b5132 3239
d504ffc8 3240 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 3241 {
d003868e
AM		 3242 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
3243 abfd);
e489d0ae
PB		 3244 return FALSE;
3245 }
f21f3fe0 3246
39ce1a6a
NC		 3247 /* PR 5398: If we have not decided to include any loadable sections in
3248 the output then we will not have a glue owner bfd. This is OK, it
3249 just means that there is nothing else for us to do here. */
3250 if (globals->bfd_of_glue_owner == NULL)
3251 return TRUE;
3252
252b5132
RH		 3253 /* Rummage around all the relocs and map the glue vectors. */
3254 sec = abfd->sections;
3255
3256 if (sec == NULL)
b34976b6 3257 return TRUE;
252b5132
RH		 3258
3259 for (; sec != NULL; sec = sec->next)
3260 {
3261 if (sec->reloc_count == 0)
3262 continue;
3263
2f475487
AM		 3264 if ((sec->flags & SEC_EXCLUDE) != 0)
3265 continue;
3266
0ffa91dd 3267 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 3268
9b485d32 3269 /* Load the relocs. */
6cdc0ccc 3270 internal_relocs
57e8b36a 3271 = _bfd_elf_link_read_relocs (abfd, sec, (void *) NULL,
45d6a902 3272 (Elf_Internal_Rela *) NULL, FALSE);
252b5132 3273
6cdc0ccc
AM		 3274 if (internal_relocs == NULL)
3275 goto error_return;
252b5132 3276
6cdc0ccc
AM		 3277 irelend = internal_relocs + sec->reloc_count;
3278 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 3279 {
3280 long r_type;
3281 unsigned long r_index;
252b5132
RH		 3282
3283 struct elf_link_hash_entry *h;
3284
3285 r_type = ELF32_R_TYPE (irel->r_info);
3286 r_index = ELF32_R_SYM (irel->r_info);
3287
9b485d32 3288 /* These are the only relocation types we care about. */
ba96a88f 3289 if ( r_type != R_ARM_PC24
b7693d02 3290 && r_type != R_ARM_PLT32
5b5bb741
PB		 3291 && r_type != R_ARM_CALL
3292 && r_type != R_ARM_JUMP24
bd97cb95 3293 && r_type != R_ARM_THM_CALL
845b51d6
PB		 3294 && r_type != R_ARM_THM_JUMP24
3295 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 3296 continue;
3297
3298 /* Get the section contents if we haven't done so already. */
3299 if (contents == NULL)
3300 {
3301 /* Get cached copy if it exists. */
3302 if (elf_section_data (sec)->this_hdr.contents != NULL)
3303 contents = elf_section_data (sec)->this_hdr.contents;
3304 else
3305 {
3306 /* Go get them off disk. */
57e8b36a 3307 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 3308 goto error_return;
3309 }
3310 }
3311
845b51d6
PB		 3312 if (r_type == R_ARM_V4BX)
3313 {
3314 int reg;
3315
3316 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
3317 record_arm_bx_glue (link_info, reg);
3318 continue;
3319 }
3320
a7c10850 3321 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 3322 h = NULL;
3323
9b485d32 3324 /* We don't care about local symbols. */
252b5132
RH		 3325 if (r_index < symtab_hdr->sh_info)
3326 continue;
3327
9b485d32 3328 /* This is an external symbol. */
252b5132
RH		 3329 r_index -= symtab_hdr->sh_info;
3330 h = (struct elf_link_hash_entry *)
3331 elf_sym_hashes (abfd)[r_index];
3332
3333 /* If the relocation is against a static symbol it must be within
3334 the current section and so cannot be a cross ARM/Thumb relocation. */
3335 if (h == NULL)
3336 continue;
3337
d504ffc8
DJ		 3338 /* If the call will go through a PLT entry then we do not need
3339 glue. */
3340 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 3341 continue;
3342
252b5132
RH		 3343 switch (r_type)
3344 {
3345 case R_ARM_PC24:
c6596c5e 3346 case R_ARM_PLT32:
5b5bb741
PB		 3347 case R_ARM_CALL:
3348 case R_ARM_JUMP24:
252b5132 3349 /* This one is a call from arm code. We need to look up
2f0ca46a 3350 the target of the call. If it is a thumb target, we
252b5132 3351 insert glue. */
39b41c9c
PB		 3352 if (ELF_ST_TYPE(h->type) == STT_ARM_TFUNC
3353 && !(r_type == R_ARM_CALL && globals->use_blx))
252b5132
RH		 3354 record_arm_to_thumb_glue (link_info, h);
3355 break;
3356
c19d1205 3357 case R_ARM_THM_CALL:
bd97cb95 3358 case R_ARM_THM_JUMP24:
f21f3fe0 3359 /* This one is a call from thumb code. We look
2f0ca46a 3360 up the target of the call. If it is not a thumb
bcbdc74c 3361 target, we insert glue. */
bd97cb95
DJ		 3362 if (ELF_ST_TYPE (h->type) != STT_ARM_TFUNC
3363 && !(globals->use_blx && r_type == R_ARM_THM_CALL)
5ab79981 3364 && h->root.type != bfd_link_hash_undefweak)
252b5132
RH		 3365 record_thumb_to_arm_glue (link_info, h);
3366 break;
3367
3368 default:
c6596c5e 3369 abort ();
252b5132
RH		 3370 }
3371 }
6cdc0ccc
AM		 3372
3373 if (contents != NULL
3374 && elf_section_data (sec)->this_hdr.contents != contents)
3375 free (contents);
3376 contents = NULL;
3377
3378 if (internal_relocs != NULL
3379 && elf_section_data (sec)->relocs != internal_relocs)
3380 free (internal_relocs);
3381 internal_relocs = NULL;
252b5132
RH		 3382 }
3383
b34976b6 3384 return TRUE;
9a5aca8c 3385
252b5132 3386error_return:
6cdc0ccc
AM		 3387 if (contents != NULL
3388 && elf_section_data (sec)->this_hdr.contents != contents)
3389 free (contents);
3390 if (internal_relocs != NULL
3391 && elf_section_data (sec)->relocs != internal_relocs)
3392 free (internal_relocs);
9a5aca8c 3393
b34976b6 3394 return FALSE;
252b5132 3395}
7e392df6 3396#endif
252b5132 3397
eb043451 3398
c7b8f16e
JB		 3399/* Initialise maps of ARM/Thumb/data for input BFDs. */
3400
3401void
3402bfd_elf32_arm_init_maps (bfd *abfd)
3403{
3404 Elf_Internal_Sym *isymbuf;
3405 Elf_Internal_Shdr *hdr;
3406 unsigned int i, localsyms;
3407
3408 if ((abfd->flags & DYNAMIC) != 0)
3409 return;
3410
0ffa91dd 3411 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 3412 localsyms = hdr->sh_info;
3413
3414 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
3415 should contain the number of local symbols, which should come before any
3416 global symbols. Mapping symbols are always local. */
3417 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
3418 NULL);
3419
3420 /* No internal symbols read? Skip this BFD. */
3421 if (isymbuf == NULL)
3422 return;
3423
3424 for (i = 0; i < localsyms; i++)
3425 {
3426 Elf_Internal_Sym *isym = &isymbuf[i];
3427 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3428 const char *name;
3429
3430 if (sec != NULL
3431 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
3432 {
3433 name = bfd_elf_string_from_elf_section (abfd,
3434 hdr->sh_link, isym->st_name);
3435
3436 if (bfd_is_arm_special_symbol_name (name,
3437 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
3438 elf32_arm_section_map_add (sec, name[1], isym->st_value);
3439 }
3440 }
3441}
3442
3443
3444void
3445bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
3446{
3447 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 3448 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
c7b8f16e
JB		 3449
3450 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
3451 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
3452 {
3453 switch (globals->vfp11_fix)
3454 {
3455 case BFD_ARM_VFP11_FIX_DEFAULT:
3456 case BFD_ARM_VFP11_FIX_NONE:
3457 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3458 break;
3459
3460 default:
3461 /* Give a warning, but do as the user requests anyway. */
3462 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
3463 "workaround is not necessary for target architecture"), obfd);
3464 }
3465 }
3466 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
3467 /* For earlier architectures, we might need the workaround, but do not
3468 enable it by default. If users is running with broken hardware, they
3469 must enable the erratum fix explicitly. */
3470 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3471}
3472
3473
3474enum bfd_arm_vfp11_pipe {
3475 VFP11_FMAC,
3476 VFP11_LS,
3477 VFP11_DS,
3478 VFP11_BAD
3479};
3480
3481/* Return a VFP register number. This is encoded as RX:X for single-precision
3482 registers, or X:RX for double-precision registers, where RX is the group of
3483 four bits in the instruction encoding and X is the single extension bit.
3484 RX and X fields are specified using their lowest (starting) bit. The return
3485 value is:
3486
3487 0...31: single-precision registers s0...s31
3488 32...63: double-precision registers d0...d31.
3489
3490 Although X should be zero for VFP11 (encoding d0...d15 only), we might
3491 encounter VFP3 instructions, so we allow the full range for DP registers. */
3492
3493static unsigned int
3494bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
3495 unsigned int x)
3496{
3497 if (is_double)
3498 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
3499 else
3500 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
3501}
3502
3503/* Set bits in *WMASK according to a register number REG as encoded by
3504 bfd_arm_vfp11_regno(). Ignore d16-d31. */
3505
3506static void
3507bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
3508{
3509 if (reg < 32)
3510 *wmask |= 1 << reg;
3511 else if (reg < 48)
3512 *wmask |= 3 << ((reg - 32) * 2);
3513}
3514
3515/* Return TRUE if WMASK overwrites anything in REGS. */
3516
3517static bfd_boolean
3518bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
3519{
3520 int i;
3521
3522 for (i = 0; i < numregs; i++)
3523 {
3524 unsigned int reg = regs[i];
3525
3526 if (reg < 32 && (wmask & (1 << reg)) != 0)
3527 return TRUE;
3528
3529 reg -= 32;
3530
3531 if (reg >= 16)
3532 continue;
3533
3534 if ((wmask & (3 << (reg * 2))) != 0)
3535 return TRUE;
3536 }
3537
3538 return FALSE;
3539}
3540
3541/* In this function, we're interested in two things: finding input registers
3542 for VFP data-processing instructions, and finding the set of registers which
3543 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
3544 hold the written set, so FLDM etc. are easy to deal with (we're only
3545 interested in 32 SP registers or 16 dp registers, due to the VFP version
3546 implemented by the chip in question). DP registers are marked by setting
3547 both SP registers in the write mask). */
3548
3549static enum bfd_arm_vfp11_pipe
3550bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
3551 int *numregs)
3552{
3553 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
3554 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
3555
3556 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
3557 {
3558 unsigned int pqrs;
3559 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3560 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3561
3562 pqrs = ((insn & 0x00800000) >> 20)
3563 | ((insn & 0x00300000) >> 19)
3564 | ((insn & 0x00000040) >> 6);
3565
3566 switch (pqrs)
3567 {
3568 case 0: /* fmac[sd]. */
3569 case 1: /* fnmac[sd]. */
3570 case 2: /* fmsc[sd]. */
3571 case 3: /* fnmsc[sd]. */
3572 pipe = VFP11_FMAC;
3573 bfd_arm_vfp11_write_mask (destmask, fd);
3574 regs[0] = fd;
3575 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3576 regs[2] = fm;
3577 *numregs = 3;
3578 break;
3579
3580 case 4: /* fmul[sd]. */
3581 case 5: /* fnmul[sd]. */
3582 case 6: /* fadd[sd]. */
3583 case 7: /* fsub[sd]. */
3584 pipe = VFP11_FMAC;
3585 goto vfp_binop;
3586
3587 case 8: /* fdiv[sd]. */
3588 pipe = VFP11_DS;
3589 vfp_binop:
3590 bfd_arm_vfp11_write_mask (destmask, fd);
3591 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3592 regs[1] = fm;
3593 *numregs = 2;
3594 break;
3595
3596 case 15: /* extended opcode. */
3597 {
3598 unsigned int extn = ((insn >> 15) & 0x1e)
3599 | ((insn >> 7) & 1);
3600
3601 switch (extn)
3602 {
3603 case 0: /* fcpy[sd]. */
3604 case 1: /* fabs[sd]. */
3605 case 2: /* fneg[sd]. */
3606 case 8: /* fcmp[sd]. */
3607 case 9: /* fcmpe[sd]. */
3608 case 10: /* fcmpz[sd]. */
3609 case 11: /* fcmpez[sd]. */
3610 case 16: /* fuito[sd]. */
3611 case 17: /* fsito[sd]. */
3612 case 24: /* ftoui[sd]. */
3613 case 25: /* ftouiz[sd]. */
3614 case 26: /* ftosi[sd]. */
3615 case 27: /* ftosiz[sd]. */
3616 /* These instructions will not bounce due to underflow. */
3617 *numregs = 0;
3618 pipe = VFP11_FMAC;
3619 break;
3620
3621 case 3: /* fsqrt[sd]. */
3622 /* fsqrt cannot underflow, but it can (perhaps) overwrite
3623 registers to cause the erratum in previous instructions. */
3624 bfd_arm_vfp11_write_mask (destmask, fd);
3625 pipe = VFP11_DS;
3626 break;
3627
3628 case 15: /* fcvt{ds,sd}. */
3629 {
3630 int rnum = 0;
3631
3632 bfd_arm_vfp11_write_mask (destmask, fd);
3633
3634 /* Only FCVTSD can underflow. */
3635 if ((insn & 0x100) != 0)
3636 regs[rnum++] = fm;
3637
3638 *numregs = rnum;
3639
3640 pipe = VFP11_FMAC;
3641 }
3642 break;
3643
3644 default:
3645 return VFP11_BAD;
3646 }
3647 }
3648 break;
3649
3650 default:
3651 return VFP11_BAD;
3652 }
3653 }
3654 /* Two-register transfer. */
3655 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
3656 {
3657 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3658
3659 if ((insn & 0x100000) == 0)
3660 {
3661 if (is_double)
3662 bfd_arm_vfp11_write_mask (destmask, fm);
3663 else
3664 {
3665 bfd_arm_vfp11_write_mask (destmask, fm);
3666 bfd_arm_vfp11_write_mask (destmask, fm + 1);
3667 }
3668 }
3669
3670 pipe = VFP11_LS;
3671 }
3672 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
3673 {
3674 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3675 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
3676
3677 switch (puw)
3678 {
3679 case 0: /* Two-reg transfer. We should catch these above. */
3680 abort ();
3681
3682 case 2: /* fldm[sdx]. */
3683 case 3:
3684 case 5:
3685 {
3686 unsigned int i, offset = insn & 0xff;
3687
3688 if (is_double)
3689 offset >>= 1;
3690
3691 for (i = fd; i < fd + offset; i++)
3692 bfd_arm_vfp11_write_mask (destmask, i);
3693 }
3694 break;
3695
3696 case 4: /* fld[sd]. */
3697 case 6:
3698 bfd_arm_vfp11_write_mask (destmask, fd);
3699 break;
3700
3701 default:
3702 return VFP11_BAD;
3703 }
3704
3705 pipe = VFP11_LS;
3706 }
3707 /* Single-register transfer. Note L==0. */
3708 else if ((insn & 0x0f100e10) == 0x0e000a10)
3709 {
3710 unsigned int opcode = (insn >> 21) & 7;
3711 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
3712
3713 switch (opcode)
3714 {
3715 case 0: /* fmsr/fmdlr. */
3716 case 1: /* fmdhr. */
3717 /* Mark fmdhr and fmdlr as writing to the whole of the DP
3718 destination register. I don't know if this is exactly right,
3719 but it is the conservative choice. */
3720 bfd_arm_vfp11_write_mask (destmask, fn);
3721 break;
3722
3723 case 7: /* fmxr. */
3724 break;
3725 }
3726
3727 pipe = VFP11_LS;
3728 }
3729
3730 return pipe;
3731}
3732
3733
3734static int elf32_arm_compare_mapping (const void * a, const void * b);
3735
3736
3737/* Look for potentially-troublesome code sequences which might trigger the
3738 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
3739 (available from ARM) for details of the erratum. A short version is
3740 described in ld.texinfo. */
3741
3742bfd_boolean
3743bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
3744{
3745 asection *sec;
3746 bfd_byte *contents = NULL;
3747 int state = 0;
3748 int regs[3], numregs = 0;
3749 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
3750 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
3751
3752 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
3753 The states transition as follows:
3754
3755 0 -> 1 (vector) or 0 -> 2 (scalar)
3756 A VFP FMAC-pipeline instruction has been seen. Fill
3757 regs[0]..regs[numregs-1] with its input operands. Remember this
3758 instruction in 'first_fmac'.
3759
3760 1 -> 2
3761 Any instruction, except for a VFP instruction which overwrites
3762 regs[*].
3763
3764 1 -> 3 [ -> 0 ] or
3765 2 -> 3 [ -> 0 ]
3766 A VFP instruction has been seen which overwrites any of regs[*].
3767 We must make a veneer! Reset state to 0 before examining next
3768 instruction.
3769
3770 2 -> 0
3771 If we fail to match anything in state 2, reset to state 0 and reset
3772 the instruction pointer to the instruction after 'first_fmac'.
3773
3774 If the VFP11 vector mode is in use, there must be at least two unrelated
3775 instructions between anti-dependent VFP11 instructions to properly avoid
3776 triggering the erratum, hence the use of the extra state 1.
3777 */
3778
3779 /* If we are only performing a partial link do not bother
3780 to construct any glue. */
3781 if (link_info->relocatable)
3782 return TRUE;
3783
0ffa91dd
NC		 3784 /* Skip if this bfd does not correspond to an ELF image. */
3785 if (! is_arm_elf (abfd))
3786 return TRUE;
3787
c7b8f16e
JB		 3788 /* We should have chosen a fix type by the time we get here. */
3789 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
3790
3791 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
3792 return TRUE;
2e6030b9 3793
c7b8f16e
JB		 3794 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3795 {
3796 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
3797 struct _arm_elf_section_data *sec_data;
3798
3799 /* If we don't have executable progbits, we're not interested in this
3800 section. Also skip if section is to be excluded. */
3801 if (elf_section_type (sec) != SHT_PROGBITS
3802 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
3803 || (sec->flags & SEC_EXCLUDE) != 0
3804 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
3805 continue;
3806
3807 sec_data = elf32_arm_section_data (sec);
3808
3809 if (sec_data->mapcount == 0)
3810 continue;
3811
3812 if (elf_section_data (sec)->this_hdr.contents != NULL)
3813 contents = elf_section_data (sec)->this_hdr.contents;
3814 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
3815 goto error_return;
3816
3817 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
3818 elf32_arm_compare_mapping);
3819
3820 for (span = 0; span < sec_data->mapcount; span++)
3821 {
3822 unsigned int span_start = sec_data->map[span].vma;
3823 unsigned int span_end = (span == sec_data->mapcount - 1)
3824 ? sec->size : sec_data->map[span + 1].vma;
3825 char span_type = sec_data->map[span].type;
3826
3827 /* FIXME: Only ARM mode is supported at present. We may need to
3828 support Thumb-2 mode also at some point. */
3829 if (span_type != 'a')
3830 continue;
3831
3832 for (i = span_start; i < span_end;)
3833 {
3834 unsigned int next_i = i + 4;
3835 unsigned int insn = bfd_big_endian (abfd)
3836 ? (contents[i] << 24)
3837 | (contents[i + 1] << 16)
3838 | (contents[i + 2] << 8)
3839 | contents[i + 3]
3840 : (contents[i + 3] << 24)
3841 | (contents[i + 2] << 16)
3842 | (contents[i + 1] << 8)
3843 | contents[i];
3844 unsigned int writemask = 0;
3845 enum bfd_arm_vfp11_pipe pipe;
3846
3847 switch (state)
3848 {
3849 case 0:
3850 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
3851 &numregs);
3852 /* I'm assuming the VFP11 erratum can trigger with denorm
3853 operands on either the FMAC or the DS pipeline. This might
3854 lead to slightly overenthusiastic veneer insertion. */
3855 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
3856 {
3857 state = use_vector ? 1 : 2;
3858 first_fmac = i;
3859 veneer_of_insn = insn;
3860 }
3861 break;
3862
3863 case 1:
3864 {
3865 int other_regs[3], other_numregs;
3866 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3867 other_regs,
3868 &other_numregs);
3869 if (pipe != VFP11_BAD
3870 && bfd_arm_vfp11_antidependency (writemask, regs,
3871 numregs))
3872 state = 3;
3873 else
3874 state = 2;
3875 }
3876 break;
3877
3878 case 2:
3879 {
3880 int other_regs[3], other_numregs;
3881 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3882 other_regs,
3883 &other_numregs);
3884 if (pipe != VFP11_BAD
3885 && bfd_arm_vfp11_antidependency (writemask, regs,
3886 numregs))
3887 state = 3;
3888 else
3889 {
3890 state = 0;
3891 next_i = first_fmac + 4;
3892 }
3893 }
3894 break;
3895
3896 case 3:
3897 abort (); /* Should be unreachable. */
3898 }
3899
3900 if (state == 3)
3901 {
3902 elf32_vfp11_erratum_list *newerr
3903 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
3904 int errcount;
3905
3906 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
3907
3908 newerr->u.b.vfp_insn = veneer_of_insn;
3909
3910 switch (span_type)
3911 {
3912 case 'a':
3913 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
3914 break;
3915
3916 default:
3917 abort ();
3918 }
3919
3920 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
3921 first_fmac);
3922
3923 newerr->vma = -1;
3924
3925 newerr->next = sec_data->erratumlist;
3926 sec_data->erratumlist = newerr;
3927
3928 state = 0;
3929 }
3930
3931 i = next_i;
3932 }
3933 }
3934
3935 if (contents != NULL
3936 && elf_section_data (sec)->this_hdr.contents != contents)
3937 free (contents);
3938 contents = NULL;
3939 }
3940
3941 return TRUE;
3942
3943error_return:
3944 if (contents != NULL
3945 && elf_section_data (sec)->this_hdr.contents != contents)
3946 free (contents);
3947
3948 return FALSE;
3949}
3950
3951/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
3952 after sections have been laid out, using specially-named symbols. */
3953
3954void
3955bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
3956 struct bfd_link_info *link_info)
3957{
3958 asection *sec;
3959 struct elf32_arm_link_hash_table *globals;
3960 char *tmp_name;
3961
3962 if (link_info->relocatable)
3963 return;
2e6030b9
MS		 3964
3965 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 3966 if (! is_arm_elf (abfd))
2e6030b9
MS		 3967 return;
3968
c7b8f16e
JB		 3969 globals = elf32_arm_hash_table (link_info);
3970
3971 tmp_name = bfd_malloc ((bfd_size_type) strlen
3972 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
3973
3974 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3975 {
3976 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
3977 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
3978
3979 for (; errnode != NULL; errnode = errnode->next)
3980 {
3981 struct elf_link_hash_entry *myh;
3982 bfd_vma vma;
3983
3984 switch (errnode->type)
3985 {
3986 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
3987 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
3988 /* Find veneer symbol. */
3989 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
3990 errnode->u.b.veneer->u.v.id);
3991
3992 myh = elf_link_hash_lookup
3993 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
3994
3995 if (myh == NULL)
3996 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
3997 "`%s'"), abfd, tmp_name);
3998
3999 vma = myh->root.u.def.section->output_section->vma
4000 + myh->root.u.def.section->output_offset
4001 + myh->root.u.def.value;
4002
4003 errnode->u.b.veneer->vma = vma;
4004 break;
4005
4006 case VFP11_ERRATUM_ARM_VENEER:
4007 case VFP11_ERRATUM_THUMB_VENEER:
4008 /* Find return location. */
4009 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
4010 errnode->u.v.id);
4011
4012 myh = elf_link_hash_lookup
4013 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
4014
4015 if (myh == NULL)
4016 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
4017 "`%s'"), abfd, tmp_name);
4018
4019 vma = myh->root.u.def.section->output_section->vma
4020 + myh->root.u.def.section->output_offset
4021 + myh->root.u.def.value;
4022
4023 errnode->u.v.branch->vma = vma;
4024 break;
4025
4026 default:
4027 abort ();
4028 }
4029 }
4030 }
4031
4032 free (tmp_name);
4033}
4034
4035
eb043451
PB		 4036/* Set target relocation values needed during linking. */
4037
4038void
bf21ed78
MS		 4039bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
4040 struct bfd_link_info *link_info,
eb043451 4041 int target1_is_rel,
319850b4 4042 char * target2_type,
33bfe774 4043 int fix_v4bx,
c7b8f16e 4044 int use_blx,
bf21ed78 4045 bfd_arm_vfp11_fix vfp11_fix,
27e55c4d 4046 int no_enum_warn, int pic_veneer)
eb043451
PB		 4047{
4048 struct elf32_arm_link_hash_table *globals;
4049
4050 globals = elf32_arm_hash_table (link_info);
4051
4052 globals->target1_is_rel = target1_is_rel;
4053 if (strcmp (target2_type, "rel") == 0)
4054 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 4055 else if (strcmp (target2_type, "abs") == 0)
4056 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 4057 else if (strcmp (target2_type, "got-rel") == 0)
4058 globals->target2_reloc = R_ARM_GOT_PREL;
4059 else
4060 {
4061 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
4062 target2_type);
4063 }
319850b4 4064 globals->fix_v4bx = fix_v4bx;
33bfe774 4065 globals->use_blx |= use_blx;
c7b8f16e 4066 globals->vfp11_fix = vfp11_fix;
27e55c4d 4067 globals->pic_veneer = pic_veneer;
bf21ed78 4068
0ffa91dd
NC		 4069 BFD_ASSERT (is_arm_elf (output_bfd));
4070 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
eb043451 4071}
eb043451 4072
12a0a0fd 4073/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 4074
12a0a0fd
PB		 4075static void
4076insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
4077{
4078 bfd_vma upper;
4079 bfd_vma lower;
4080 int reloc_sign;
4081
4082 BFD_ASSERT ((offset & 1) == 0);
4083
4084 upper = bfd_get_16 (abfd, insn);
4085 lower = bfd_get_16 (abfd, insn + 2);
4086 reloc_sign = (offset < 0) ? 1 : 0;
4087 upper = (upper & ~(bfd_vma) 0x7ff)
4088 | ((offset >> 12) & 0x3ff)
4089 | (reloc_sign << 10);
4090 lower = (lower & ~(bfd_vma) 0x2fff)
4091 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
4092 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
4093 | ((offset >> 1) & 0x7ff);
4094 bfd_put_16 (abfd, upper, insn);
4095 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 4096}
4097
52ab56c2
PB		 4098
4099/* Store an Arm insn into an output section not processed by
4100 elf32_arm_write_section. */
4101
4102static void
4103put_arm_insn (struct elf32_arm_link_hash_table *htab,
4104 bfd * output_bfd, bfd_vma val, void * ptr)
4105{
4106 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4107 bfd_putl32 (val, ptr);
4108 else
4109 bfd_putb32 (val, ptr);
4110}
4111
4112
4113/* Store a 16-bit Thumb insn into an output section not processed by
4114 elf32_arm_write_section. */
4115
4116static void
4117put_thumb_insn (struct elf32_arm_link_hash_table *htab,
4118 bfd * output_bfd, bfd_vma val, void * ptr)
4119{
4120 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4121 bfd_putl16 (val, ptr);
4122 else
4123 bfd_putb16 (val, ptr);
4124}
4125
4126
9b485d32
NC		 4127/* Thumb code calling an ARM function. */
4128
252b5132 4129static int
57e8b36a
NC		 4130elf32_thumb_to_arm_stub (struct bfd_link_info * info,
4131 const char * name,
4132 bfd * input_bfd,
4133 bfd * output_bfd,
4134 asection * input_section,
4135 bfd_byte * hit_data,
4136 asection * sym_sec,
4137 bfd_vma offset,
4138 bfd_signed_vma addend,
f2a9dd69
DJ		 4139 bfd_vma val,
4140 char **error_message)
252b5132 4141{
bcbdc74c 4142 asection * s = 0;
dc810e39 4143 bfd_vma my_offset;
252b5132 4144 long int ret_offset;
bcbdc74c
NC		 4145 struct elf_link_hash_entry * myh;
4146 struct elf32_arm_link_hash_table * globals;
252b5132 4147
f2a9dd69 4148 myh = find_thumb_glue (info, name, error_message);
252b5132 4149 if (myh == NULL)
b34976b6 4150 return FALSE;
252b5132
RH		 4151
4152 globals = elf32_arm_hash_table (info);
4153
4154 BFD_ASSERT (globals != NULL);
4155 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4156
4157 my_offset = myh->root.u.def.value;
4158
4159 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4160 THUMB2ARM_GLUE_SECTION_NAME);
4161
4162 BFD_ASSERT (s != NULL);
4163 BFD_ASSERT (s->contents != NULL);
4164 BFD_ASSERT (s->output_section != NULL);
4165
4166 if ((my_offset & 0x01) == 0x01)
4167 {
4168 if (sym_sec != NULL
4169 && sym_sec->owner != NULL
4170 && !INTERWORK_FLAG (sym_sec->owner))
4171 {
8f615d07 4172 (*_bfd_error_handler)
d003868e
AM		 4173 (_("%B(%s): warning: interworking not enabled.\n"
4174 " first occurrence: %B: thumb call to arm"),
4175 sym_sec->owner, input_bfd, name);
252b5132 4176
b34976b6 4177 return FALSE;
252b5132
RH		 4178 }
4179
4180 --my_offset;
4181 myh->root.u.def.value = my_offset;
4182
52ab56c2
PB		 4183 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
4184 s->contents + my_offset);
252b5132 4185
52ab56c2
PB		 4186 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
4187 s->contents + my_offset + 2);
252b5132
RH		 4188
4189 ret_offset =
9b485d32
NC		 4190 /* Address of destination of the stub. */
4191 ((bfd_signed_vma) val)
252b5132 4192 - ((bfd_signed_vma)
57e8b36a
NC		 4193 /* Offset from the start of the current section
4194 to the start of the stubs. */
9b485d32
NC		 4195 (s->output_offset
4196 /* Offset of the start of this stub from the start of the stubs. */
4197 + my_offset
4198 /* Address of the start of the current section. */
4199 + s->output_section->vma)
4200 /* The branch instruction is 4 bytes into the stub. */
4201 + 4
4202 /* ARM branches work from the pc of the instruction + 8. */
4203 + 8);
252b5132 4204
52ab56c2
PB		 4205 put_arm_insn (globals, output_bfd,
4206 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
4207 s->contents + my_offset + 4);
252b5132
RH		 4208 }
4209
4210 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
4211
427bfd90
NC		 4212 /* Now go back and fix up the original BL insn to point to here. */
4213 ret_offset =
4214 /* Address of where the stub is located. */
4215 (s->output_section->vma + s->output_offset + my_offset)
4216 /* Address of where the BL is located. */
57e8b36a
NC		 4217 - (input_section->output_section->vma + input_section->output_offset
4218 + offset)
427bfd90
NC		 4219 /* Addend in the relocation. */
4220 - addend
4221 /* Biassing for PC-relative addressing. */
4222 - 8;
252b5132 4223
12a0a0fd 4224 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 4225
b34976b6 4226 return TRUE;
252b5132
RH		 4227}
4228
a4fd1a8e 4229/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 4230
a4fd1a8e
PB		 4231static struct elf_link_hash_entry *
4232elf32_arm_create_thumb_stub (struct bfd_link_info * info,
4233 const char * name,
4234 bfd * input_bfd,
4235 bfd * output_bfd,
4236 asection * sym_sec,
4237 bfd_vma val,
f2a9dd69
DJ		 4238 asection *s,
4239 char **error_message)
252b5132 4240{
dc810e39 4241 bfd_vma my_offset;
252b5132 4242 long int ret_offset;
bcbdc74c
NC		 4243 struct elf_link_hash_entry * myh;
4244 struct elf32_arm_link_hash_table * globals;
252b5132 4245
f2a9dd69 4246 myh = find_arm_glue (info, name, error_message);
252b5132 4247 if (myh == NULL)
a4fd1a8e 4248 return NULL;
252b5132
RH		 4249
4250 globals = elf32_arm_hash_table (info);
4251
4252 BFD_ASSERT (globals != NULL);
4253 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4254
4255 my_offset = myh->root.u.def.value;
252b5132
RH		 4256
4257 if ((my_offset & 0x01) == 0x01)
4258 {
4259 if (sym_sec != NULL
4260 && sym_sec->owner != NULL
4261 && !INTERWORK_FLAG (sym_sec->owner))
4262 {
8f615d07 4263 (*_bfd_error_handler)
d003868e
AM		 4264 (_("%B(%s): warning: interworking not enabled.\n"
4265 " first occurrence: %B: arm call to thumb"),
4266 sym_sec->owner, input_bfd, name);
252b5132 4267 }
9b485d32 4268
252b5132
RH		 4269 --my_offset;
4270 myh->root.u.def.value = my_offset;
4271
27e55c4d
PB		 4272 if (info->shared || globals->root.is_relocatable_executable
4273 || globals->pic_veneer)
8f6277f5
PB		 4274 {
4275 /* For relocatable objects we can't use absolute addresses,
4276 so construct the address from a relative offset. */
4277 /* TODO: If the offset is small it's probably worth
4278 constructing the address with adds. */
52ab56c2
PB		 4279 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
4280 s->contents + my_offset);
4281 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
4282 s->contents + my_offset + 4);
4283 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
4284 s->contents + my_offset + 8);
8f6277f5
PB		 4285 /* Adjust the offset by 4 for the position of the add,
4286 and 8 for the pipeline offset. */
4287 ret_offset = (val - (s->output_offset
4288 + s->output_section->vma
4289 + my_offset + 12))
4290 | 1;
4291 bfd_put_32 (output_bfd, ret_offset,
4292 s->contents + my_offset + 12);
4293 }
26079076
PB		 4294 else if (globals->use_blx)
4295 {
4296 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
4297 s->contents + my_offset);
4298
4299 /* It's a thumb address. Add the low order bit. */
4300 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
4301 s->contents + my_offset + 4);
4302 }
8f6277f5
PB		 4303 else
4304 {
52ab56c2
PB		 4305 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
4306 s->contents + my_offset);
252b5132 4307
52ab56c2
PB		 4308 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
4309 s->contents + my_offset + 4);
252b5132 4310
8f6277f5
PB		 4311 /* It's a thumb address. Add the low order bit. */
4312 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
4313 s->contents + my_offset + 8);
4314 }
252b5132
RH		 4315 }
4316
4317 BFD_ASSERT (my_offset <= globals->arm_glue_size);
4318
a4fd1a8e
PB		 4319 return myh;
4320}
4321
4322/* Arm code calling a Thumb function. */
4323
4324static int
4325elf32_arm_to_thumb_stub (struct bfd_link_info * info,
4326 const char * name,
4327 bfd * input_bfd,
4328 bfd * output_bfd,
4329 asection * input_section,
4330 bfd_byte * hit_data,
4331 asection * sym_sec,
4332 bfd_vma offset,
4333 bfd_signed_vma addend,
f2a9dd69
DJ		 4334 bfd_vma val,
4335 char **error_message)
a4fd1a8e
PB		 4336{
4337 unsigned long int tmp;
4338 bfd_vma my_offset;
4339 asection * s;
4340 long int ret_offset;
4341 struct elf_link_hash_entry * myh;
4342 struct elf32_arm_link_hash_table * globals;
4343
4344 globals = elf32_arm_hash_table (info);
4345
4346 BFD_ASSERT (globals != NULL);
4347 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4348
4349 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4350 ARM2THUMB_GLUE_SECTION_NAME);
4351 BFD_ASSERT (s != NULL);
4352 BFD_ASSERT (s->contents != NULL);
4353 BFD_ASSERT (s->output_section != NULL);
4354
4355 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 4356 sym_sec, val, s, error_message);
a4fd1a8e
PB		 4357 if (!myh)
4358 return FALSE;
4359
4360 my_offset = myh->root.u.def.value;
252b5132
RH		 4361 tmp = bfd_get_32 (input_bfd, hit_data);
4362 tmp = tmp & 0xFF000000;
4363
9b485d32 4364 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 4365 ret_offset = (s->output_offset
4366 + my_offset
4367 + s->output_section->vma
4368 - (input_section->output_offset
4369 + input_section->output_section->vma
4370 + offset + addend)
4371 - 8);
9a5aca8c 4372
252b5132
RH		 4373 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
4374
dc810e39 4375 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 4376
b34976b6 4377 return TRUE;
252b5132
RH		 4378}
4379
a4fd1a8e
PB		 4380/* Populate Arm stub for an exported Thumb function. */
4381
4382static bfd_boolean
4383elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
4384{
4385 struct bfd_link_info * info = (struct bfd_link_info *) inf;
4386 asection * s;
4387 struct elf_link_hash_entry * myh;
4388 struct elf32_arm_link_hash_entry *eh;
4389 struct elf32_arm_link_hash_table * globals;
4390 asection *sec;
4391 bfd_vma val;
f2a9dd69 4392 char *error_message;
a4fd1a8e
PB		 4393
4394 eh = elf32_arm_hash_entry(h);
4395 /* Allocate stubs for exported Thumb functions on v4t. */
4396 if (eh->export_glue == NULL)
4397 return TRUE;
4398
4399 globals = elf32_arm_hash_table (info);
4400
4401 BFD_ASSERT (globals != NULL);
4402 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4403
4404 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4405 ARM2THUMB_GLUE_SECTION_NAME);
4406 BFD_ASSERT (s != NULL);
4407 BFD_ASSERT (s->contents != NULL);
4408 BFD_ASSERT (s->output_section != NULL);
4409
4410 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 4411
4412 BFD_ASSERT (sec->output_section != NULL);
4413
a4fd1a8e
PB		 4414 val = eh->export_glue->root.u.def.value + sec->output_offset
4415 + sec->output_section->vma;
4416 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
4417 h->root.u.def.section->owner,
f2a9dd69
DJ		 4418 globals->obfd, sec, val, s,
4419 &error_message);
a4fd1a8e
PB		 4420 BFD_ASSERT (myh);
4421 return TRUE;
4422}
4423
845b51d6
PB		 4424/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
4425
4426static bfd_vma
4427elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
4428{
4429 bfd_byte *p;
4430 bfd_vma glue_addr;
4431 asection *s;
4432 struct elf32_arm_link_hash_table *globals;
4433
4434 globals = elf32_arm_hash_table (info);
4435
4436 BFD_ASSERT (globals != NULL);
4437 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4438
4439 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4440 ARM_BX_GLUE_SECTION_NAME);
4441 BFD_ASSERT (s != NULL);
4442 BFD_ASSERT (s->contents != NULL);
4443 BFD_ASSERT (s->output_section != NULL);
4444
4445 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
4446
4447 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
4448
4449 if ((globals->bx_glue_offset[reg] & 1) == 0)
4450 {
4451 p = s->contents + glue_addr;
4452 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
4453 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
4454 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
4455 globals->bx_glue_offset[reg] |= 1;
4456 }
4457
4458 return glue_addr + s->output_section->vma + s->output_offset;
4459}
4460
a4fd1a8e
PB		 4461/* Generate Arm stubs for exported Thumb symbols. */
4462static void
4463elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
4464 struct bfd_link_info *link_info)
4465{
4466 struct elf32_arm_link_hash_table * globals;
4467
4468 if (!link_info)
4469 return;
4470
4471 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 4472 /* If blx is available then exported Thumb symbols are OK and there is
4473 nothing to do. */
a4fd1a8e
PB		 4474 if (globals->use_blx)
4475 return;
4476
4477 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
4478 link_info);
4479}
4480
eb043451
PB		 4481/* Some relocations map to different relocations depending on the
4482 target. Return the real relocation. */
4483static int
4484arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
4485 int r_type)
4486{
4487 switch (r_type)
4488 {
4489 case R_ARM_TARGET1:
4490 if (globals->target1_is_rel)
4491 return R_ARM_REL32;
4492 else
4493 return R_ARM_ABS32;
4494
4495 case R_ARM_TARGET2:
4496 return globals->target2_reloc;
4497
4498 default:
4499 return r_type;
4500 }
4501}
eb043451 4502
ba93b8ac
DJ		 4503/* Return the base VMA address which should be subtracted from real addresses
4504 when resolving @dtpoff relocation.
4505 This is PT_TLS segment p_vaddr. */
4506
4507static bfd_vma
4508dtpoff_base (struct bfd_link_info *info)
4509{
4510 /* If tls_sec is NULL, we should have signalled an error already. */
4511 if (elf_hash_table (info)->tls_sec == NULL)
4512 return 0;
4513 return elf_hash_table (info)->tls_sec->vma;
4514}
4515
4516/* Return the relocation value for @tpoff relocation
4517 if STT_TLS virtual address is ADDRESS. */
4518
4519static bfd_vma
4520tpoff (struct bfd_link_info *info, bfd_vma address)
4521{
4522 struct elf_link_hash_table *htab = elf_hash_table (info);
4523 bfd_vma base;
4524
4525 /* If tls_sec is NULL, we should have signalled an error already. */
4526 if (htab->tls_sec == NULL)
4527 return 0;
4528 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
4529 return address - htab->tls_sec->vma + base;
4530}
4531
00a97672
RS		 4532/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
4533 VALUE is the relocation value. */
4534
4535static bfd_reloc_status_type
4536elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
4537{
4538 if (value > 0xfff)
4539 return bfd_reloc_overflow;
4540
4541 value |= bfd_get_32 (abfd, data) & 0xfffff000;
4542 bfd_put_32 (abfd, value, data);
4543 return bfd_reloc_ok;
4544}
4545
4962c51a
MS		 4546/* For a given value of n, calculate the value of G_n as required to
4547 deal with group relocations. We return it in the form of an
4548 encoded constant-and-rotation, together with the final residual. If n is
4549 specified as less than zero, then final_residual is filled with the
4550 input value and no further action is performed. */
4551
4552static bfd_vma
4553calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
4554{
4555 int current_n;
4556 bfd_vma g_n;
4557 bfd_vma encoded_g_n = 0;
4558 bfd_vma residual = value; /* Also known as Y_n. */
4559
4560 for (current_n = 0; current_n <= n; current_n++)
4561 {
4562 int shift;
4563
4564 /* Calculate which part of the value to mask. */
4565 if (residual == 0)
4566 shift = 0;
4567 else
4568 {
4569 int msb;
4570
4571 /* Determine the most significant bit in the residual and
4572 align the resulting value to a 2-bit boundary. */
4573 for (msb = 30; msb >= 0; msb -= 2)
4574 if (residual & (3 << msb))
4575 break;
4576
4577 /* The desired shift is now (msb - 6), or zero, whichever
4578 is the greater. */
4579 shift = msb - 6;
4580 if (shift < 0)
4581 shift = 0;
4582 }
4583
4584 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
4585 g_n = residual & (0xff << shift);
4586 encoded_g_n = (g_n >> shift)
4587 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4588
4589 /* Calculate the residual for the next time around. */
4590 residual &= ~g_n;
4591 }
4592
4593 *final_residual = residual;
4594
4595 return encoded_g_n;
4596}
4597
4598/* Given an ARM instruction, determine whether it is an ADD or a SUB.
4599 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
4600static int
4601identify_add_or_sub(bfd_vma insn)
4602{
4603 int opcode = insn & 0x1e00000;
4604
4605 if (opcode == 1 << 23) /* ADD */
4606 return 1;
4607
4608 if (opcode == 1 << 22) /* SUB */
4609 return -1;
4610
4611 return 0;
4612}
4613
e95de063
MS		 4614/* Determine if we're dealing with a Thumb-2 object. */
4615
4616static int using_thumb2 (struct elf32_arm_link_hash_table *globals)
4617{
104d59d1
JM		 4618 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4619 Tag_CPU_arch);
e95de063
MS		 4620 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
4621}
4622
252b5132 4623/* Perform a relocation as part of a final link. */
9b485d32 4624
252b5132 4625static bfd_reloc_status_type
57e8b36a
NC		 4626elf32_arm_final_link_relocate (reloc_howto_type * howto,
4627 bfd * input_bfd,
4628 bfd * output_bfd,
4629 asection * input_section,
4630 bfd_byte * contents,
4631 Elf_Internal_Rela * rel,
4632 bfd_vma value,
4633 struct bfd_link_info * info,
4634 asection * sym_sec,
4635 const char * sym_name,
4636 int sym_flags,
0945cdfd 4637 struct elf_link_hash_entry * h,
f2a9dd69
DJ		 4638 bfd_boolean * unresolved_reloc_p,
4639 char **error_message)
252b5132
RH		 4640{
4641 unsigned long r_type = howto->type;
4642 unsigned long r_symndx;
4643 bfd_byte * hit_data = contents + rel->r_offset;
4644 bfd * dynobj = NULL;
4645 Elf_Internal_Shdr * symtab_hdr;
4646 struct elf_link_hash_entry ** sym_hashes;
4647 bfd_vma * local_got_offsets;
4648 asection * sgot = NULL;
4649 asection * splt = NULL;
4650 asection * sreloc = NULL;
252b5132 4651 bfd_vma addend;
ba96a88f
NC		 4652 bfd_signed_vma signed_addend;
4653 struct elf32_arm_link_hash_table * globals;
f21f3fe0 4654
9c504268
PB		 4655 globals = elf32_arm_hash_table (info);
4656
0ffa91dd
NC		 4657 BFD_ASSERT (is_arm_elf (input_bfd));
4658
4659 /* Some relocation types map to different relocations depending on the
9c504268 4660 target. We pick the right one here. */
eb043451
PB		 4661 r_type = arm_real_reloc_type (globals, r_type);
4662 if (r_type != howto->type)
4663 howto = elf32_arm_howto_from_type (r_type);
9c504268 4664
cac15327
NC		 4665 /* If the start address has been set, then set the EF_ARM_HASENTRY
4666 flag. Setting this more than once is redundant, but the cost is
4667 not too high, and it keeps the code simple.
99e4ae17 4668
cac15327
NC		 4669 The test is done here, rather than somewhere else, because the
4670 start address is only set just before the final link commences.
4671
4672 Note - if the user deliberately sets a start address of 0, the
4673 flag will not be set. */
4674 if (bfd_get_start_address (output_bfd) != 0)
4675 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 4676
252b5132
RH		 4677 dynobj = elf_hash_table (info)->dynobj;
4678 if (dynobj)
4679 {
4680 sgot = bfd_get_section_by_name (dynobj, ".got");
4681 splt = bfd_get_section_by_name (dynobj, ".plt");
4682 }
0ffa91dd 4683 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 4684 sym_hashes = elf_sym_hashes (input_bfd);
4685 local_got_offsets = elf_local_got_offsets (input_bfd);
4686 r_symndx = ELF32_R_SYM (rel->r_info);
4687
4e7fd91e 4688 if (globals->use_rel)
ba96a88f 4689 {
4e7fd91e
PB		 4690 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
4691
4692 if (addend & ((howto->src_mask + 1) >> 1))
4693 {
4694 signed_addend = -1;
4695 signed_addend &= ~ howto->src_mask;
4696 signed_addend |= addend;
4697 }
4698 else
4699 signed_addend = addend;
ba96a88f
NC		 4700 }
4701 else
4e7fd91e 4702 addend = signed_addend = rel->r_addend;
f21f3fe0 4703
252b5132
RH		 4704 switch (r_type)
4705 {
4706 case R_ARM_NONE:
28a094c2
DJ		 4707 /* We don't need to find a value for this symbol. It's just a
4708 marker. */
4709 *unresolved_reloc_p = FALSE;
252b5132
RH		 4710 return bfd_reloc_ok;
4711
00a97672
RS		 4712 case R_ARM_ABS12:
4713 if (!globals->vxworks_p)
4714 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4715
252b5132
RH		 4716 case R_ARM_PC24:
4717 case R_ARM_ABS32:
bb224fc3 4718 case R_ARM_ABS32_NOI:
252b5132 4719 case R_ARM_REL32:
bb224fc3 4720 case R_ARM_REL32_NOI:
5b5bb741
PB		 4721 case R_ARM_CALL:
4722 case R_ARM_JUMP24:
dfc5f959 4723 case R_ARM_XPC25:
eb043451 4724 case R_ARM_PREL31:
7359ea65 4725 case R_ARM_PLT32:
7359ea65
DJ		 4726 /* Handle relocations which should use the PLT entry. ABS32/REL32
4727 will use the symbol's value, which may point to a PLT entry, but we
4728 don't need to handle that here. If we created a PLT entry, all
4729 branches in this object should go to it. */
bb224fc3
MS		 4730 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
4731 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI)
7359ea65 4732 && h != NULL
c84cd8ee 4733 && splt != NULL
7359ea65
DJ		 4734 && h->plt.offset != (bfd_vma) -1)
4735 {
c84cd8ee
DJ		 4736 /* If we've created a .plt section, and assigned a PLT entry to
4737 this function, it should not be known to bind locally. If
4738 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 4739 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
4740
4741 value = (splt->output_section->vma
4742 + splt->output_offset
4743 + h->plt.offset);
0945cdfd 4744 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 4745 return _bfd_final_link_relocate (howto, input_bfd, input_section,
4746 contents, rel->r_offset, value,
00a97672 4747 rel->r_addend);
7359ea65
DJ		 4748 }
4749
67687978
PB		 4750 /* When generating a shared object or relocatable executable, these
4751 relocations are copied into the output file to be resolved at
4752 run time. */
4753 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 4754 && (input_section->flags & SEC_ALLOC)
bb224fc3 4755 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 4756 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 4757 && (h == NULL
4758 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
4759 || h->root.type != bfd_link_hash_undefweak)
4760 && r_type != R_ARM_PC24
5b5bb741
PB		 4761 && r_type != R_ARM_CALL
4762 && r_type != R_ARM_JUMP24
ee06dc07 4763 && r_type != R_ARM_PREL31
7359ea65 4764 && r_type != R_ARM_PLT32)
252b5132 4765 {
947216bf
AM		 4766 Elf_Internal_Rela outrel;
4767 bfd_byte *loc;
b34976b6 4768 bfd_boolean skip, relocate;
f21f3fe0 4769
0945cdfd
DJ		 4770 *unresolved_reloc_p = FALSE;
4771
252b5132
RH		 4772 if (sreloc == NULL)
4773 {
4774 const char * name;
f21f3fe0 4775
252b5132
RH		 4776 name = (bfd_elf_string_from_elf_section
4777 (input_bfd,
4778 elf_elfheader (input_bfd)->e_shstrndx,
4779 elf_section_data (input_section)->rel_hdr.sh_name));
4780 if (name == NULL)
4781 return bfd_reloc_notsupported;
f21f3fe0 4782
00a97672 4783 BFD_ASSERT (reloc_section_p (globals, name, input_section));
f21f3fe0 4784
252b5132
RH		 4785 sreloc = bfd_get_section_by_name (dynobj, name);
4786 BFD_ASSERT (sreloc != NULL);
4787 }
f21f3fe0 4788
b34976b6
AM		 4789 skip = FALSE;
4790 relocate = FALSE;
f21f3fe0 4791
00a97672 4792 outrel.r_addend = addend;
c629eae0
JJ		 4793 outrel.r_offset =
4794 _bfd_elf_section_offset (output_bfd, info, input_section,
4795 rel->r_offset);
4796 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 4797 skip = TRUE;
0bb2d96a 4798 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 4799 skip = TRUE, relocate = TRUE;
252b5132
RH		 4800 outrel.r_offset += (input_section->output_section->vma
4801 + input_section->output_offset);
f21f3fe0 4802
252b5132 4803 if (skip)
0bb2d96a 4804 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 4805 else if (h != NULL
4806 && h->dynindx != -1
7359ea65 4807 && (!info->shared
5e681ec4 4808 || !info->symbolic
f5385ebf 4809 || !h->def_regular))
5e681ec4 4810 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 4811 else
4812 {
a16385dc
MM		 4813 int symbol;
4814
5e681ec4 4815 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 4816 if (sym_flags == STT_ARM_TFUNC)
4817 value |= 1;
a16385dc 4818 if (globals->symbian_p)
6366ff1e 4819 {
74541ad4
AM		 4820 asection *osec;
4821
6366ff1e
MM		 4822 /* On Symbian OS, the data segment and text segement
4823 can be relocated independently. Therefore, we
4824 must indicate the segment to which this
4825 relocation is relative. The BPABI allows us to
4826 use any symbol in the right segment; we just use
4827 the section symbol as it is convenient. (We
4828 cannot use the symbol given by "h" directly as it
74541ad4
AM		 4829 will not appear in the dynamic symbol table.)
4830
4831 Note that the dynamic linker ignores the section
4832 symbol value, so we don't subtract osec->vma
4833 from the emitted reloc addend. */
10dbd1f3 4834 if (sym_sec)
74541ad4 4835 osec = sym_sec->output_section;
10dbd1f3 4836 else
74541ad4
AM		 4837 osec = input_section->output_section;
4838 symbol = elf_section_data (osec)->dynindx;
4839 if (symbol == 0)
4840 {
4841 struct elf_link_hash_table *htab = elf_hash_table (info);
4842
4843 if ((osec->flags & SEC_READONLY) == 0
4844 && htab->data_index_section != NULL)
4845 osec = htab->data_index_section;
4846 else
4847 osec = htab->text_index_section;
4848 symbol = elf_section_data (osec)->dynindx;
4849 }
6366ff1e
MM		 4850 BFD_ASSERT (symbol != 0);
4851 }
a16385dc
MM		 4852 else
4853 /* On SVR4-ish systems, the dynamic loader cannot
4854 relocate the text and data segments independently,
4855 so the symbol does not matter. */
4856 symbol = 0;
4857 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 4858 if (globals->use_rel)
4859 relocate = TRUE;
4860 else
4861 outrel.r_addend += value;
252b5132 4862 }
f21f3fe0 4863
947216bf 4864 loc = sreloc->contents;
00a97672
RS		 4865 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
4866 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 4867
f21f3fe0 4868 /* If this reloc is against an external symbol, we do not want to
252b5132 4869 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 4870 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 4871 if (! relocate)
4872 return bfd_reloc_ok;
9a5aca8c 4873
f21f3fe0 4874 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 4875 contents, rel->r_offset, value,
4876 (bfd_vma) 0);
4877 }
4878 else switch (r_type)
4879 {
00a97672
RS		 4880 case R_ARM_ABS12:
4881 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4882
dfc5f959 4883 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 4884 case R_ARM_CALL:
4885 case R_ARM_JUMP24:
dfc5f959 4886 case R_ARM_PC24: /* Arm B/BL instruction */
7359ea65 4887 case R_ARM_PLT32:
dfc5f959 4888 if (r_type == R_ARM_XPC25)
252b5132 4889 {
dfc5f959
NC		 4890 /* Check for Arm calling Arm function. */
4891 /* FIXME: Should we translate the instruction into a BL
4892 instruction instead ? */
4893 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 4894 (*_bfd_error_handler)
4895 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
4896 input_bfd,
4897 h ? h->root.root.string : "(local)");
dfc5f959 4898 }
39b41c9c 4899 else if (r_type != R_ARM_CALL || !globals->use_blx)
dfc5f959
NC		 4900 {
4901 /* Check for Arm calling Thumb function. */
4902 if (sym_flags == STT_ARM_TFUNC)
4903 {
f2a9dd69
DJ		 4904 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
4905 output_bfd, input_section,
4906 hit_data, sym_sec, rel->r_offset,
4907 signed_addend, value,
4908 error_message))
4909 return bfd_reloc_ok;
4910 else
4911 return bfd_reloc_dangerous;
dfc5f959 4912 }
252b5132 4913 }
ba96a88f 4914
dea514f5
PB		 4915 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
4916 where:
4917 S is the address of the symbol in the relocation.
4918 P is address of the instruction being relocated.
4919 A is the addend (extracted from the instruction) in bytes.
4920
4921 S is held in 'value'.
4922 P is the base address of the section containing the
4923 instruction plus the offset of the reloc into that
4924 section, ie:
4925 (input_section->output_section->vma +
4926 input_section->output_offset +
4927 rel->r_offset).
4928 A is the addend, converted into bytes, ie:
4929 (signed_addend * 4)
4930
4931 Note: None of these operations have knowledge of the pipeline
4932 size of the processor, thus it is up to the assembler to
4933 encode this information into the addend. */
4934 value -= (input_section->output_section->vma
4935 + input_section->output_offset);
4936 value -= rel->r_offset;
4e7fd91e
PB		 4937 if (globals->use_rel)
4938 value += (signed_addend << howto->size);
4939 else
4940 /* RELA addends do not have to be adjusted by howto->size. */
4941 value += signed_addend;
23080146 4942
dcb5e6e6
NC		 4943 signed_addend = value;
4944 signed_addend >>= howto->rightshift;
9a5aca8c 4945
5ab79981
PB		 4946 /* A branch to an undefined weak symbol is turned into a jump to
4947 the next instruction. */
4948 if (h && h->root.type == bfd_link_hash_undefweak)
4949 {
4950 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
4951 | 0x0affffff;
4952 }
4953 else
59f2c4e7 4954 {
9b485d32 4955 /* Perform a signed range check. */
dcb5e6e6 4956 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 4957 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
4958 return bfd_reloc_overflow;
9a5aca8c 4959
5ab79981 4960 addend = (value & 2);
39b41c9c 4961
5ab79981
PB		 4962 value = (signed_addend & howto->dst_mask)
4963 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 4964
5ab79981 4965 /* Set the H bit in the BLX instruction. */
39b41c9c 4966 if (sym_flags == STT_ARM_TFUNC)
39b41c9c 4967 {
5ab79981
PB		 4968 if (addend)
4969 value |= (1 << 24);
4970 else
4971 value &= ~(bfd_vma)(1 << 24);
4972 }
4973 if (r_type == R_ARM_CALL)
4974 {
4975 /* Select the correct instruction (BL or BLX). */
4976 if (sym_flags == STT_ARM_TFUNC)
4977 value |= (1 << 28);
4978 else
4979 {
4980 value &= ~(bfd_vma)(1 << 28);
4981 value |= (1 << 24);
4982 }
39b41c9c
PB		 4983 }
4984 }
252b5132 4985 break;
f21f3fe0 4986
252b5132
RH		 4987 case R_ARM_ABS32:
4988 value += addend;
4989 if (sym_flags == STT_ARM_TFUNC)
4990 value |= 1;
4991 break;
f21f3fe0 4992
bb224fc3
MS		 4993 case R_ARM_ABS32_NOI:
4994 value += addend;
4995 break;
4996
252b5132 4997 case R_ARM_REL32:
a8bc6c78
PB		 4998 value += addend;
4999 if (sym_flags == STT_ARM_TFUNC)
5000 value |= 1;
252b5132 5001 value -= (input_section->output_section->vma
62efb346 5002 + input_section->output_offset + rel->r_offset);
252b5132 5003 break;
eb043451 5004
bb224fc3
MS		 5005 case R_ARM_REL32_NOI:
5006 value += addend;
5007 value -= (input_section->output_section->vma
5008 + input_section->output_offset + rel->r_offset);
5009 break;
5010
eb043451
PB		 5011 case R_ARM_PREL31:
5012 value -= (input_section->output_section->vma
5013 + input_section->output_offset + rel->r_offset);
5014 value += signed_addend;
5015 if (! h || h->root.type != bfd_link_hash_undefweak)
5016 {
5017 /* Check for overflow */
5018 if ((value ^ (value >> 1)) & (1 << 30))
5019 return bfd_reloc_overflow;
5020 }
5021 value &= 0x7fffffff;
5022 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
5023 if (sym_flags == STT_ARM_TFUNC)
5024 value |= 1;
5025 break;
252b5132 5026 }
f21f3fe0 5027
252b5132
RH		 5028 bfd_put_32 (input_bfd, value, hit_data);
5029 return bfd_reloc_ok;
5030
5031 case R_ARM_ABS8:
5032 value += addend;
5033 if ((long) value > 0x7f || (long) value < -0x80)
5034 return bfd_reloc_overflow;
5035
5036 bfd_put_8 (input_bfd, value, hit_data);
5037 return bfd_reloc_ok;
5038
5039 case R_ARM_ABS16:
5040 value += addend;
5041
5042 if ((long) value > 0x7fff || (long) value < -0x8000)
5043 return bfd_reloc_overflow;
5044
5045 bfd_put_16 (input_bfd, value, hit_data);
5046 return bfd_reloc_ok;
5047
252b5132 5048 case R_ARM_THM_ABS5:
9b485d32 5049 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 5050 if (globals->use_rel)
5051 {
5052 /* Need to refetch addend. */
5053 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
5054 /* ??? Need to determine shift amount from operand size. */
5055 addend >>= howto->rightshift;
5056 }
252b5132
RH		 5057 value += addend;
5058
5059 /* ??? Isn't value unsigned? */
5060 if ((long) value > 0x1f || (long) value < -0x10)
5061 return bfd_reloc_overflow;
5062
5063 /* ??? Value needs to be properly shifted into place first. */
5064 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
5065 bfd_put_16 (input_bfd, value, hit_data);
5066 return bfd_reloc_ok;
5067
2cab6cc3
MS		 5068 case R_ARM_THM_ALU_PREL_11_0:
5069 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
5070 {
5071 bfd_vma insn;
5072 bfd_signed_vma relocation;
5073
5074 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
5075 | bfd_get_16 (input_bfd, hit_data + 2);
5076
5077 if (globals->use_rel)
5078 {
5079 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
5080 | ((insn & (1 << 26)) >> 15);
5081 if (insn & 0xf00000)
5082 signed_addend = -signed_addend;
5083 }
5084
5085 relocation = value + signed_addend;
5086 relocation -= (input_section->output_section->vma
5087 + input_section->output_offset
5088 + rel->r_offset);
5089
5090 value = abs (relocation);
5091
5092 if (value >= 0x1000)
5093 return bfd_reloc_overflow;
5094
5095 insn = (insn & 0xfb0f8f00) | (value & 0xff)
5096 | ((value & 0x700) << 4)
5097 | ((value & 0x800) << 15);
5098 if (relocation < 0)
5099 insn |= 0xa00000;
5100
5101 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5102 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5103
5104 return bfd_reloc_ok;
5105 }
5106
5107 case R_ARM_THM_PC12:
5108 /* Corresponds to: ldr.w reg, [pc, #offset]. */
5109 {
5110 bfd_vma insn;
5111 bfd_signed_vma relocation;
5112
5113 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
5114 | bfd_get_16 (input_bfd, hit_data + 2);
5115
5116 if (globals->use_rel)
5117 {
5118 signed_addend = insn & 0xfff;
5119 if (!(insn & (1 << 23)))
5120 signed_addend = -signed_addend;
5121 }
5122
5123 relocation = value + signed_addend;
5124 relocation -= (input_section->output_section->vma
5125 + input_section->output_offset
5126 + rel->r_offset);
5127
5128 value = abs (relocation);
5129
5130 if (value >= 0x1000)
5131 return bfd_reloc_overflow;
5132
5133 insn = (insn & 0xff7ff000) | value;
5134 if (relocation >= 0)
5135 insn |= (1 << 23);
5136
5137 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5138 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5139
5140 return bfd_reloc_ok;
5141 }
5142
dfc5f959 5143 case R_ARM_THM_XPC22:
c19d1205 5144 case R_ARM_THM_CALL:
bd97cb95 5145 case R_ARM_THM_JUMP24:
dfc5f959 5146 /* Thumb BL (branch long instruction). */
252b5132 5147 {
b34976b6 5148 bfd_vma relocation;
e95de063 5149 bfd_vma reloc_sign;
b34976b6
AM		 5150 bfd_boolean overflow = FALSE;
5151 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5152 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 5153 bfd_signed_vma reloc_signed_max;
5154 bfd_signed_vma reloc_signed_min;
b34976b6 5155 bfd_vma check;
252b5132 5156 bfd_signed_vma signed_check;
e95de063
MS		 5157 int bitsize;
5158 int thumb2 = using_thumb2 (globals);
252b5132 5159
5ab79981
PB		 5160 /* A branch to an undefined weak symbol is turned into a jump to
5161 the next instruction. */
5162 if (h && h->root.type == bfd_link_hash_undefweak)
5163 {
5164 bfd_put_16 (input_bfd, 0xe000, hit_data);
5165 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
5166 return bfd_reloc_ok;
5167 }
5168
e95de063
MS		 5169 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
5170 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 5171 if (globals->use_rel)
5172 {
e95de063
MS		 5173 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
5174 bfd_vma upper = upper_insn & 0x3ff;
5175 bfd_vma lower = lower_insn & 0x7ff;
5176 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
5177 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
5178 bfd_vma i1 = j1 ^ s ? 0 : 1;
5179 bfd_vma i2 = j2 ^ s ? 0 : 1;
5180
5181 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
5182 /* Sign extend. */
5183 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
5184
4e7fd91e
PB		 5185 signed_addend = addend;
5186 }
cb1afa5c 5187
dfc5f959
NC		 5188 if (r_type == R_ARM_THM_XPC22)
5189 {
5190 /* Check for Thumb to Thumb call. */
5191 /* FIXME: Should we translate the instruction into a BL
5192 instruction instead ? */
5193 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 5194 (*_bfd_error_handler)
5195 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
5196 input_bfd,
5197 h ? h->root.root.string : "(local)");
dfc5f959
NC		 5198 }
5199 else
252b5132 5200 {
dfc5f959
NC		 5201 /* If it is not a call to Thumb, assume call to Arm.
5202 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 5203 function call at all, but rather a long jump. Calls through
5204 the PLT do not require stubs. */
5205 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
5206 && (h == NULL || splt == NULL
5207 || h->plt.offset == (bfd_vma) -1))
dfc5f959 5208 {
bd97cb95 5209 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 5210 {
5211 /* Convert BL to BLX. */
5212 lower_insn = (lower_insn & ~0x1000) | 0x0800;
5213 }
5214 else if (elf32_thumb_to_arm_stub
dfc5f959 5215 (info, sym_name, input_bfd, output_bfd, input_section,
f2a9dd69
DJ		 5216 hit_data, sym_sec, rel->r_offset, signed_addend, value,
5217 error_message))
dfc5f959
NC		 5218 return bfd_reloc_ok;
5219 else
5220 return bfd_reloc_dangerous;
5221 }
bd97cb95
DJ		 5222 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
5223 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 5224 {
5225 /* Make sure this is a BL. */
5226 lower_insn |= 0x1800;
5227 }
252b5132 5228 }
f21f3fe0 5229
b7693d02
DJ		 5230 /* Handle calls via the PLT. */
5231 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
5232 {
5233 value = (splt->output_section->vma
5234 + splt->output_offset
5235 + h->plt.offset);
bd97cb95 5236 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 5237 {
5238 /* If the Thumb BLX instruction is available, convert the
5239 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 5240 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 5241 }
5242 else
5243 /* Target the Thumb stub before the ARM PLT entry. */
5244 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 5245 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 5246 }
5247
ba96a88f 5248 relocation = value + signed_addend;
f21f3fe0 5249
252b5132 5250 relocation -= (input_section->output_section->vma
ba96a88f
NC		 5251 + input_section->output_offset
5252 + rel->r_offset);
9a5aca8c 5253
252b5132
RH		 5254 check = relocation >> howto->rightshift;
5255
5256 /* If this is a signed value, the rightshift just dropped
5257 leading 1 bits (assuming twos complement). */
5258 if ((bfd_signed_vma) relocation >= 0)
5259 signed_check = check;
5260 else
5261 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
5262
e95de063
MS		 5263 /* Calculate the permissable maximum and minimum values for
5264 this relocation according to whether we're relocating for
5265 Thumb-2 or not. */
5266 bitsize = howto->bitsize;
5267 if (!thumb2)
5268 bitsize -= 2;
5269 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
5270 reloc_signed_min = ~reloc_signed_max;
5271
252b5132 5272 /* Assumes two's complement. */
ba96a88f 5273 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 5274 overflow = TRUE;
252b5132 5275
bd97cb95 5276 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 5277 /* For a BLX instruction, make sure that the relocation is rounded up
5278 to a word boundary. This follows the semantics of the instruction
5279 which specifies that bit 1 of the target address will come from bit
5280 1 of the base address. */
5281 relocation = (relocation + 2) & ~ 3;
cb1afa5c 5282
e95de063
MS		 5283 /* Put RELOCATION back into the insn. Assumes two's complement.
5284 We use the Thumb-2 encoding, which is safe even if dealing with
5285 a Thumb-1 instruction by virtue of our overflow check above. */
5286 reloc_sign = (signed_check < 0) ? 1 : 0;
5287 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
5288 | ((relocation >> 12) & 0x3ff)
5289 | (reloc_sign << 10);
5290 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
5291 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
5292 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
5293 | ((relocation >> 1) & 0x7ff);
c62e1cc3 5294
252b5132
RH		 5295 /* Put the relocated value back in the object file: */
5296 bfd_put_16 (input_bfd, upper_insn, hit_data);
5297 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5298
5299 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5300 }
5301 break;
5302
c19d1205
ZW		 5303 case R_ARM_THM_JUMP19:
5304 /* Thumb32 conditional branch instruction. */
5305 {
5306 bfd_vma relocation;
5307 bfd_boolean overflow = FALSE;
5308 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5309 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 5310 bfd_signed_vma reloc_signed_max = 0xffffe;
5311 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 5312 bfd_signed_vma signed_check;
5313
5314 /* Need to refetch the addend, reconstruct the top three bits,
5315 and squish the two 11 bit pieces together. */
5316 if (globals->use_rel)
5317 {
5318 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 5319 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 5320 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
5321 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
5322 bfd_vma lower = (lower_insn & 0x07ff);
5323
a00a1f35
MS		 5324 upper |= J1 << 6;
5325 upper |= J2 << 7;
5326 upper |= (!S) << 8;
c19d1205
ZW		 5327 upper -= 0x0100; /* Sign extend. */
5328
5329 addend = (upper << 12) | (lower << 1);
5330 signed_addend = addend;
5331 }
5332
bd97cb95
DJ		 5333 /* Handle calls via the PLT. */
5334 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
5335 {
5336 value = (splt->output_section->vma
5337 + splt->output_offset
5338 + h->plt.offset);
5339 /* Target the Thumb stub before the ARM PLT entry. */
5340 value -= PLT_THUMB_STUB_SIZE;
5341 *unresolved_reloc_p = FALSE;
5342 }
5343
c19d1205
ZW		 5344 /* ??? Should handle interworking? GCC might someday try to
5345 use this for tail calls. */
5346
5347 relocation = value + signed_addend;
5348 relocation -= (input_section->output_section->vma
5349 + input_section->output_offset
5350 + rel->r_offset);
a00a1f35 5351 signed_check = (bfd_signed_vma) relocation;
c19d1205 5352
c19d1205
ZW		 5353 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5354 overflow = TRUE;
5355
5356 /* Put RELOCATION back into the insn. */
5357 {
5358 bfd_vma S = (relocation & 0x00100000) >> 20;
5359 bfd_vma J2 = (relocation & 0x00080000) >> 19;
5360 bfd_vma J1 = (relocation & 0x00040000) >> 18;
5361 bfd_vma hi = (relocation & 0x0003f000) >> 12;
5362 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
5363
a00a1f35 5364 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 5365 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
5366 }
5367
5368 /* Put the relocated value back in the object file: */
5369 bfd_put_16 (input_bfd, upper_insn, hit_data);
5370 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5371
5372 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5373 }
5374
5375 case R_ARM_THM_JUMP11:
5376 case R_ARM_THM_JUMP8:
5377 case R_ARM_THM_JUMP6:
51c5503b
NC		 5378 /* Thumb B (branch) instruction). */
5379 {
6cf9e9fe 5380 bfd_signed_vma relocation;
51c5503b
NC		 5381 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
5382 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 5383 bfd_signed_vma signed_check;
5384
c19d1205
ZW		 5385 /* CZB cannot jump backward. */
5386 if (r_type == R_ARM_THM_JUMP6)
5387 reloc_signed_min = 0;
5388
4e7fd91e 5389 if (globals->use_rel)
6cf9e9fe 5390 {
4e7fd91e
PB		 5391 /* Need to refetch addend. */
5392 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
5393 if (addend & ((howto->src_mask + 1) >> 1))
5394 {
5395 signed_addend = -1;
5396 signed_addend &= ~ howto->src_mask;
5397 signed_addend |= addend;
5398 }
5399 else
5400 signed_addend = addend;
5401 /* The value in the insn has been right shifted. We need to
5402 undo this, so that we can perform the address calculation
5403 in terms of bytes. */
5404 signed_addend <<= howto->rightshift;
6cf9e9fe 5405 }
6cf9e9fe 5406 relocation = value + signed_addend;
51c5503b
NC		 5407
5408 relocation -= (input_section->output_section->vma
5409 + input_section->output_offset
5410 + rel->r_offset);
5411
6cf9e9fe
NC		 5412 relocation >>= howto->rightshift;
5413 signed_check = relocation;
c19d1205
ZW		 5414
5415 if (r_type == R_ARM_THM_JUMP6)
5416 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
5417 else
5418 relocation &= howto->dst_mask;
51c5503b 5419 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 5420
51c5503b
NC		 5421 bfd_put_16 (input_bfd, relocation, hit_data);
5422
5423 /* Assumes two's complement. */
5424 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5425 return bfd_reloc_overflow;
5426
5427 return bfd_reloc_ok;
5428 }
cedb70c5 5429
8375c36b
PB		 5430 case R_ARM_ALU_PCREL7_0:
5431 case R_ARM_ALU_PCREL15_8:
5432 case R_ARM_ALU_PCREL23_15:
5433 {
5434 bfd_vma insn;
5435 bfd_vma relocation;
5436
5437 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 5438 if (globals->use_rel)
5439 {
5440 /* Extract the addend. */
5441 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
5442 signed_addend = addend;
5443 }
8375c36b
PB		 5444 relocation = value + signed_addend;
5445
5446 relocation -= (input_section->output_section->vma
5447 + input_section->output_offset
5448 + rel->r_offset);
5449 insn = (insn & ~0xfff)
5450 | ((howto->bitpos << 7) & 0xf00)
5451 | ((relocation >> howto->bitpos) & 0xff);
5452 bfd_put_32 (input_bfd, value, hit_data);
5453 }
5454 return bfd_reloc_ok;
5455
252b5132
RH		 5456 case R_ARM_GNU_VTINHERIT:
5457 case R_ARM_GNU_VTENTRY:
5458 return bfd_reloc_ok;
5459
c19d1205 5460 case R_ARM_GOTOFF32:
252b5132
RH		 5461 /* Relocation is relative to the start of the
5462 global offset table. */
5463
5464 BFD_ASSERT (sgot != NULL);
5465 if (sgot == NULL)
5466 return bfd_reloc_notsupported;
9a5aca8c 5467
cedb70c5 5468 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 5469 address by one, so that attempts to call the function pointer will
5470 correctly interpret it as Thumb code. */
5471 if (sym_flags == STT_ARM_TFUNC)
5472 value += 1;
5473
252b5132
RH		 5474 /* Note that sgot->output_offset is not involved in this
5475 calculation. We always want the start of .got. If we
5476 define _GLOBAL_OFFSET_TABLE in a different way, as is
5477 permitted by the ABI, we might have to change this
9b485d32 5478 calculation. */
252b5132 5479 value -= sgot->output_section->vma;
f21f3fe0 5480 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5481 contents, rel->r_offset, value,
00a97672 5482 rel->r_addend);
252b5132
RH		 5483
5484 case R_ARM_GOTPC:
a7c10850 5485 /* Use global offset table as symbol value. */
252b5132 5486 BFD_ASSERT (sgot != NULL);
f21f3fe0 5487
252b5132
RH		 5488 if (sgot == NULL)
5489 return bfd_reloc_notsupported;
5490
0945cdfd 5491 *unresolved_reloc_p = FALSE;
252b5132 5492 value = sgot->output_section->vma;
f21f3fe0 5493 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5494 contents, rel->r_offset, value,
00a97672 5495 rel->r_addend);
f21f3fe0 5496
252b5132 5497 case R_ARM_GOT32:
eb043451 5498 case R_ARM_GOT_PREL:
252b5132 5499 /* Relocation is to the entry for this symbol in the
9b485d32 5500 global offset table. */
252b5132
RH		 5501 if (sgot == NULL)
5502 return bfd_reloc_notsupported;
f21f3fe0 5503
252b5132
RH		 5504 if (h != NULL)
5505 {
5506 bfd_vma off;
5e681ec4 5507 bfd_boolean dyn;
f21f3fe0 5508
252b5132
RH		 5509 off = h->got.offset;
5510 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 5511 dyn = globals->root.dynamic_sections_created;
f21f3fe0 5512
5e681ec4 5513 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 5514 || (info->shared
5e681ec4
PB		 5515 && SYMBOL_REFERENCES_LOCAL (info, h))
5516 || (ELF_ST_VISIBILITY (h->other)
5517 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 5518 {
5519 /* This is actually a static link, or it is a -Bsymbolic link
5520 and the symbol is defined locally. We must initialize this
5521 entry in the global offset table. Since the offset must
5522 always be a multiple of 4, we use the least significant bit
5523 to record whether we have initialized it already.
f21f3fe0 5524
00a97672 5525 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 5526 entry to initialize the value. This is done in the
9b485d32 5527 finish_dynamic_symbol routine. */
252b5132
RH		 5528 if ((off & 1) != 0)
5529 off &= ~1;
5530 else
5531 {
ee29b9fb
RE		 5532 /* If we are addressing a Thumb function, we need to
5533 adjust the address by one, so that attempts to
5534 call the function pointer will correctly
5535 interpret it as Thumb code. */
5536 if (sym_flags == STT_ARM_TFUNC)
5537 value |= 1;
5538
252b5132
RH		 5539 bfd_put_32 (output_bfd, value, sgot->contents + off);
5540 h->got.offset |= 1;
5541 }
5542 }
0945cdfd
DJ		 5543 else
5544 *unresolved_reloc_p = FALSE;
f21f3fe0 5545
252b5132
RH		 5546 value = sgot->output_offset + off;
5547 }
5548 else
5549 {
5550 bfd_vma off;
f21f3fe0 5551
252b5132
RH		 5552 BFD_ASSERT (local_got_offsets != NULL &&
5553 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 5554
252b5132 5555 off = local_got_offsets[r_symndx];
f21f3fe0 5556
252b5132
RH		 5557 /* The offset must always be a multiple of 4. We use the
5558 least significant bit to record whether we have already
9b485d32 5559 generated the necessary reloc. */
252b5132
RH		 5560 if ((off & 1) != 0)
5561 off &= ~1;
5562 else
5563 {
b7693d02
DJ		 5564 /* If we are addressing a Thumb function, we need to
5565 adjust the address by one, so that attempts to
5566 call the function pointer will correctly
5567 interpret it as Thumb code. */
5568 if (sym_flags == STT_ARM_TFUNC)
5569 value |= 1;
5570
00a97672
RS		 5571 if (globals->use_rel)
5572 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 5573
252b5132
RH		 5574 if (info->shared)
5575 {
5576 asection * srelgot;
947216bf
AM		 5577 Elf_Internal_Rela outrel;
5578 bfd_byte *loc;
f21f3fe0 5579
00a97672
RS		 5580 srelgot = (bfd_get_section_by_name
5581 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 5582 BFD_ASSERT (srelgot != NULL);
f21f3fe0 5583
00a97672 5584 outrel.r_addend = addend + value;
252b5132 5585 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 5586 + sgot->output_offset
252b5132
RH		 5587 + off);
5588 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 5589 loc = srelgot->contents;
00a97672
RS		 5590 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
5591 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 5592 }
f21f3fe0 5593
252b5132
RH		 5594 local_got_offsets[r_symndx] |= 1;
5595 }
f21f3fe0 5596
252b5132
RH		 5597 value = sgot->output_offset + off;
5598 }
eb043451
PB		 5599 if (r_type != R_ARM_GOT32)
5600 value += sgot->output_section->vma;
9a5aca8c 5601
f21f3fe0 5602 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5603 contents, rel->r_offset, value,
00a97672 5604 rel->r_addend);
f21f3fe0 5605
ba93b8ac
DJ		 5606 case R_ARM_TLS_LDO32:
5607 value = value - dtpoff_base (info);
5608
5609 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 5610 contents, rel->r_offset, value,
5611 rel->r_addend);
ba93b8ac
DJ		 5612
5613 case R_ARM_TLS_LDM32:
5614 {
5615 bfd_vma off;
5616
5617 if (globals->sgot == NULL)
5618 abort ();
5619
5620 off = globals->tls_ldm_got.offset;
5621
5622 if ((off & 1) != 0)
5623 off &= ~1;
5624 else
5625 {
5626 /* If we don't know the module number, create a relocation
5627 for it. */
5628 if (info->shared)
5629 {
5630 Elf_Internal_Rela outrel;
5631 bfd_byte *loc;
5632
5633 if (globals->srelgot == NULL)
5634 abort ();
5635
00a97672 5636 outrel.r_addend = 0;
ba93b8ac
DJ		 5637 outrel.r_offset = (globals->sgot->output_section->vma
5638 + globals->sgot->output_offset + off);
5639 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
5640
00a97672
RS		 5641 if (globals->use_rel)
5642 bfd_put_32 (output_bfd, outrel.r_addend,
5643 globals->sgot->contents + off);
ba93b8ac
DJ		 5644
5645 loc = globals->srelgot->contents;
00a97672
RS		 5646 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
5647 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 5648 }
5649 else
5650 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
5651
5652 globals->tls_ldm_got.offset |= 1;
5653 }
5654
5655 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5656 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5657
5658 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5659 contents, rel->r_offset, value,
00a97672 5660 rel->r_addend);
ba93b8ac
DJ		 5661 }
5662
5663 case R_ARM_TLS_GD32:
5664 case R_ARM_TLS_IE32:
5665 {
5666 bfd_vma off;
5667 int indx;
5668 char tls_type;
5669
5670 if (globals->sgot == NULL)
5671 abort ();
5672
5673 indx = 0;
5674 if (h != NULL)
5675 {
5676 bfd_boolean dyn;
5677 dyn = globals->root.dynamic_sections_created;
5678 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
5679 && (!info->shared
5680 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5681 {
5682 *unresolved_reloc_p = FALSE;
5683 indx = h->dynindx;
5684 }
5685 off = h->got.offset;
5686 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
5687 }
5688 else
5689 {
5690 if (local_got_offsets == NULL)
5691 abort ();
5692 off = local_got_offsets[r_symndx];
5693 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
5694 }
5695
5696 if (tls_type == GOT_UNKNOWN)
5697 abort ();
5698
5699 if ((off & 1) != 0)
5700 off &= ~1;
5701 else
5702 {
5703 bfd_boolean need_relocs = FALSE;
5704 Elf_Internal_Rela outrel;
5705 bfd_byte *loc = NULL;
5706 int cur_off = off;
5707
5708 /* The GOT entries have not been initialized yet. Do it
5709 now, and emit any relocations. If both an IE GOT and a
5710 GD GOT are necessary, we emit the GD first. */
5711
5712 if ((info->shared || indx != 0)
5713 && (h == NULL
5714 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5715 || h->root.type != bfd_link_hash_undefweak))
5716 {
5717 need_relocs = TRUE;
5718 if (globals->srelgot == NULL)
5719 abort ();
5720 loc = globals->srelgot->contents;
00a97672 5721 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 5722 }
5723
5724 if (tls_type & GOT_TLS_GD)
5725 {
5726 if (need_relocs)
5727 {
00a97672 5728 outrel.r_addend = 0;
ba93b8ac 5729 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 5730 + globals->sgot->output_offset
5731 + cur_off);
ba93b8ac 5732 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 5733
00a97672
RS		 5734 if (globals->use_rel)
5735 bfd_put_32 (output_bfd, outrel.r_addend,
5736 globals->sgot->contents + cur_off);
5737
5738 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5739 globals->srelgot->reloc_count++;
00a97672 5740 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5741
5742 if (indx == 0)
5743 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5744 globals->sgot->contents + cur_off + 4);
5745 else
5746 {
00a97672 5747 outrel.r_addend = 0;
ba93b8ac
DJ		 5748 outrel.r_info = ELF32_R_INFO (indx,
5749 R_ARM_TLS_DTPOFF32);
5750 outrel.r_offset += 4;
00a97672
RS		 5751
5752 if (globals->use_rel)
5753 bfd_put_32 (output_bfd, outrel.r_addend,
5754 globals->sgot->contents + cur_off + 4);
5755
5756
5757 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5758 globals->srelgot->reloc_count++;
00a97672 5759 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5760 }
5761 }
5762 else
5763 {
5764 /* If we are not emitting relocations for a
5765 general dynamic reference, then we must be in a
5766 static link or an executable link with the
5767 symbol binding locally. Mark it as belonging
5768 to module 1, the executable. */
5769 bfd_put_32 (output_bfd, 1,
5770 globals->sgot->contents + cur_off);
5771 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5772 globals->sgot->contents + cur_off + 4);
5773 }
5774
5775 cur_off += 8;
5776 }
5777
5778 if (tls_type & GOT_TLS_IE)
5779 {
5780 if (need_relocs)
5781 {
00a97672
RS		 5782 if (indx == 0)
5783 outrel.r_addend = value - dtpoff_base (info);
5784 else
5785 outrel.r_addend = 0;
ba93b8ac
DJ		 5786 outrel.r_offset = (globals->sgot->output_section->vma
5787 + globals->sgot->output_offset
5788 + cur_off);
5789 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
5790
00a97672
RS		 5791 if (globals->use_rel)
5792 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 5793 globals->sgot->contents + cur_off);
5794
00a97672 5795 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5796 globals->srelgot->reloc_count++;
00a97672 5797 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5798 }
5799 else
5800 bfd_put_32 (output_bfd, tpoff (info, value),
5801 globals->sgot->contents + cur_off);
5802 cur_off += 4;
5803 }
5804
5805 if (h != NULL)
5806 h->got.offset |= 1;
5807 else
5808 local_got_offsets[r_symndx] |= 1;
5809 }
5810
5811 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
5812 off += 8;
5813 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5814 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5815
5816 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5817 contents, rel->r_offset, value,
00a97672 5818 rel->r_addend);
ba93b8ac
DJ		 5819 }
5820
5821 case R_ARM_TLS_LE32:
5822 if (info->shared)
5823 {
5824 (*_bfd_error_handler)
5825 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
5826 input_bfd, input_section,
5827 (long) rel->r_offset, howto->name);
5828 return FALSE;
5829 }
5830 else
5831 value = tpoff (info, value);
5832
5833 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 5834 contents, rel->r_offset, value,
5835 rel->r_addend);
ba93b8ac 5836
319850b4
JB		 5837 case R_ARM_V4BX:
5838 if (globals->fix_v4bx)
845b51d6
PB		 5839 {
5840 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 5841
845b51d6
PB		 5842 /* Ensure that we have a BX instruction. */
5843 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 5844
845b51d6
PB		 5845 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
5846 {
5847 /* Branch to veneer. */
5848 bfd_vma glue_addr;
5849 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
5850 glue_addr -= input_section->output_section->vma
5851 + input_section->output_offset
5852 + rel->r_offset + 8;
5853 insn = (insn & 0xf0000000) | 0x0a000000
5854 | ((glue_addr >> 2) & 0x00ffffff);
5855 }
5856 else
5857 {
5858 /* Preserve Rm (lowest four bits) and the condition code
5859 (highest four bits). Other bits encode MOV PC,Rm. */
5860 insn = (insn & 0xf000000f) | 0x01a0f000;
5861 }
319850b4 5862
845b51d6
PB		 5863 bfd_put_32 (input_bfd, insn, hit_data);
5864 }
319850b4
JB		 5865 return bfd_reloc_ok;
5866
b6895b4f
PB		 5867 case R_ARM_MOVW_ABS_NC:
5868 case R_ARM_MOVT_ABS:
5869 case R_ARM_MOVW_PREL_NC:
5870 case R_ARM_MOVT_PREL:
92f5d02b
MS		 5871 /* Until we properly support segment-base-relative addressing then
5872 we assume the segment base to be zero, as for the group relocations.
5873 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
5874 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
5875 case R_ARM_MOVW_BREL_NC:
5876 case R_ARM_MOVW_BREL:
5877 case R_ARM_MOVT_BREL:
b6895b4f
PB		 5878 {
5879 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5880
5881 if (globals->use_rel)
5882 {
5883 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 5884 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 5885 }
92f5d02b 5886
b6895b4f 5887 value += signed_addend;
b6895b4f
PB		 5888
5889 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
5890 value -= (input_section->output_section->vma
5891 + input_section->output_offset + rel->r_offset);
5892
92f5d02b
MS		 5893 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
5894 return bfd_reloc_overflow;
5895
5896 if (sym_flags == STT_ARM_TFUNC)
5897 value |= 1;
5898
5899 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
5900 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 5901 value >>= 16;
5902
5903 insn &= 0xfff0f000;
5904 insn |= value & 0xfff;
5905 insn |= (value & 0xf000) << 4;
5906 bfd_put_32 (input_bfd, insn, hit_data);
5907 }
5908 return bfd_reloc_ok;
5909
5910 case R_ARM_THM_MOVW_ABS_NC:
5911 case R_ARM_THM_MOVT_ABS:
5912 case R_ARM_THM_MOVW_PREL_NC:
5913 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 5914 /* Until we properly support segment-base-relative addressing then
5915 we assume the segment base to be zero, as for the above relocations.
5916 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
5917 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
5918 as R_ARM_THM_MOVT_ABS. */
5919 case R_ARM_THM_MOVW_BREL_NC:
5920 case R_ARM_THM_MOVW_BREL:
5921 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 5922 {
5923 bfd_vma insn;
5924
5925 insn = bfd_get_16 (input_bfd, hit_data) << 16;
5926 insn |= bfd_get_16 (input_bfd, hit_data + 2);
5927
5928 if (globals->use_rel)
5929 {
5930 addend = ((insn >> 4) & 0xf000)
5931 | ((insn >> 15) & 0x0800)
5932 | ((insn >> 4) & 0x0700)
5933 | (insn & 0x00ff);
39623e12 5934 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 5935 }
92f5d02b 5936
b6895b4f 5937 value += signed_addend;
b6895b4f
PB		 5938
5939 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
5940 value -= (input_section->output_section->vma
5941 + input_section->output_offset + rel->r_offset);
5942
92f5d02b
MS		 5943 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
5944 return bfd_reloc_overflow;
5945
5946 if (sym_flags == STT_ARM_TFUNC)
5947 value |= 1;
5948
5949 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
5950 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 5951 value >>= 16;
5952
5953 insn &= 0xfbf08f00;
5954 insn |= (value & 0xf000) << 4;
5955 insn |= (value & 0x0800) << 15;
5956 insn |= (value & 0x0700) << 4;
5957 insn |= (value & 0x00ff);
5958
5959 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5960 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5961 }
5962 return bfd_reloc_ok;
5963
4962c51a
MS		 5964 case R_ARM_ALU_PC_G0_NC:
5965 case R_ARM_ALU_PC_G1_NC:
5966 case R_ARM_ALU_PC_G0:
5967 case R_ARM_ALU_PC_G1:
5968 case R_ARM_ALU_PC_G2:
5969 case R_ARM_ALU_SB_G0_NC:
5970 case R_ARM_ALU_SB_G1_NC:
5971 case R_ARM_ALU_SB_G0:
5972 case R_ARM_ALU_SB_G1:
5973 case R_ARM_ALU_SB_G2:
5974 {
5975 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5976 bfd_vma pc = input_section->output_section->vma
5977 + input_section->output_offset + rel->r_offset;
5978 /* sb should be the origin of the *segment* containing the symbol.
5979 It is not clear how to obtain this OS-dependent value, so we
5980 make an arbitrary choice of zero. */
5981 bfd_vma sb = 0;
5982 bfd_vma residual;
5983 bfd_vma g_n;
5984 bfd_signed_vma signed_value;
5985 int group = 0;
5986
5987 /* Determine which group of bits to select. */
5988 switch (r_type)
5989 {
5990 case R_ARM_ALU_PC_G0_NC:
5991 case R_ARM_ALU_PC_G0:
5992 case R_ARM_ALU_SB_G0_NC:
5993 case R_ARM_ALU_SB_G0:
5994 group = 0;
5995 break;
5996
5997 case R_ARM_ALU_PC_G1_NC:
5998 case R_ARM_ALU_PC_G1:
5999 case R_ARM_ALU_SB_G1_NC:
6000 case R_ARM_ALU_SB_G1:
6001 group = 1;
6002 break;
6003
6004 case R_ARM_ALU_PC_G2:
6005 case R_ARM_ALU_SB_G2:
6006 group = 2;
6007 break;
6008
6009 default:
6010 abort();
6011 }
6012
6013 /* If REL, extract the addend from the insn. If RELA, it will
6014 have already been fetched for us. */
6015 if (globals->use_rel)
6016 {
6017 int negative;
6018 bfd_vma constant = insn & 0xff;
6019 bfd_vma rotation = (insn & 0xf00) >> 8;
6020
6021 if (rotation == 0)
6022 signed_addend = constant;
6023 else
6024 {
6025 /* Compensate for the fact that in the instruction, the
6026 rotation is stored in multiples of 2 bits. */
6027 rotation *= 2;
6028
6029 /* Rotate "constant" right by "rotation" bits. */
6030 signed_addend = (constant >> rotation) |
6031 (constant << (8 * sizeof (bfd_vma) - rotation));
6032 }
6033
6034 /* Determine if the instruction is an ADD or a SUB.
6035 (For REL, this determines the sign of the addend.) */
6036 negative = identify_add_or_sub (insn);
6037 if (negative == 0)
6038 {
6039 (*_bfd_error_handler)
6040 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
6041 input_bfd, input_section,
6042 (long) rel->r_offset, howto->name);
6043 return bfd_reloc_overflow;
6044 }
6045
6046 signed_addend *= negative;
6047 }
6048
6049 /* Compute the value (X) to go in the place. */
6050 if (r_type == R_ARM_ALU_PC_G0_NC
6051 || r_type == R_ARM_ALU_PC_G1_NC
6052 || r_type == R_ARM_ALU_PC_G0
6053 || r_type == R_ARM_ALU_PC_G1
6054 || r_type == R_ARM_ALU_PC_G2)
6055 /* PC relative. */
6056 signed_value = value - pc + signed_addend;
6057 else
6058 /* Section base relative. */
6059 signed_value = value - sb + signed_addend;
6060
6061 /* If the target symbol is a Thumb function, then set the
6062 Thumb bit in the address. */
6063 if (sym_flags == STT_ARM_TFUNC)
6064 signed_value |= 1;
6065
6066 /* Calculate the value of the relevant G_n, in encoded
6067 constant-with-rotation format. */
6068 g_n = calculate_group_reloc_mask (abs (signed_value), group,
6069 &residual);
6070
6071 /* Check for overflow if required. */
6072 if ((r_type == R_ARM_ALU_PC_G0
6073 || r_type == R_ARM_ALU_PC_G1
6074 || r_type == R_ARM_ALU_PC_G2
6075 || r_type == R_ARM_ALU_SB_G0
6076 || r_type == R_ARM_ALU_SB_G1
6077 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
6078 {
6079 (*_bfd_error_handler)
6080 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6081 input_bfd, input_section,
6082 (long) rel->r_offset, abs (signed_value), howto->name);
6083 return bfd_reloc_overflow;
6084 }
6085
6086 /* Mask out the value and the ADD/SUB part of the opcode; take care
6087 not to destroy the S bit. */
6088 insn &= 0xff1ff000;
6089
6090 /* Set the opcode according to whether the value to go in the
6091 place is negative. */
6092 if (signed_value < 0)
6093 insn |= 1 << 22;
6094 else
6095 insn |= 1 << 23;
6096
6097 /* Encode the offset. */
6098 insn |= g_n;
6099
6100 bfd_put_32 (input_bfd, insn, hit_data);
6101 }
6102 return bfd_reloc_ok;
6103
6104 case R_ARM_LDR_PC_G0:
6105 case R_ARM_LDR_PC_G1:
6106 case R_ARM_LDR_PC_G2:
6107 case R_ARM_LDR_SB_G0:
6108 case R_ARM_LDR_SB_G1:
6109 case R_ARM_LDR_SB_G2:
6110 {
6111 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6112 bfd_vma pc = input_section->output_section->vma
6113 + input_section->output_offset + rel->r_offset;
6114 bfd_vma sb = 0; /* See note above. */
6115 bfd_vma residual;
6116 bfd_signed_vma signed_value;
6117 int group = 0;
6118
6119 /* Determine which groups of bits to calculate. */
6120 switch (r_type)
6121 {
6122 case R_ARM_LDR_PC_G0:
6123 case R_ARM_LDR_SB_G0:
6124 group = 0;
6125 break;
6126
6127 case R_ARM_LDR_PC_G1:
6128 case R_ARM_LDR_SB_G1:
6129 group = 1;
6130 break;
6131
6132 case R_ARM_LDR_PC_G2:
6133 case R_ARM_LDR_SB_G2:
6134 group = 2;
6135 break;
6136
6137 default:
6138 abort();
6139 }
6140
6141 /* If REL, extract the addend from the insn. If RELA, it will
6142 have already been fetched for us. */
6143 if (globals->use_rel)
6144 {
6145 int negative = (insn & (1 << 23)) ? 1 : -1;
6146 signed_addend = negative * (insn & 0xfff);
6147 }
6148
6149 /* Compute the value (X) to go in the place. */
6150 if (r_type == R_ARM_LDR_PC_G0
6151 || r_type == R_ARM_LDR_PC_G1
6152 || r_type == R_ARM_LDR_PC_G2)
6153 /* PC relative. */
6154 signed_value = value - pc + signed_addend;
6155 else
6156 /* Section base relative. */
6157 signed_value = value - sb + signed_addend;
6158
6159 /* Calculate the value of the relevant G_{n-1} to obtain
6160 the residual at that stage. */
6161 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6162
6163 /* Check for overflow. */
6164 if (residual >= 0x1000)
6165 {
6166 (*_bfd_error_handler)
6167 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6168 input_bfd, input_section,
6169 (long) rel->r_offset, abs (signed_value), howto->name);
6170 return bfd_reloc_overflow;
6171 }
6172
6173 /* Mask out the value and U bit. */
6174 insn &= 0xff7ff000;
6175
6176 /* Set the U bit if the value to go in the place is non-negative. */
6177 if (signed_value >= 0)
6178 insn |= 1 << 23;
6179
6180 /* Encode the offset. */
6181 insn |= residual;
6182
6183 bfd_put_32 (input_bfd, insn, hit_data);
6184 }
6185 return bfd_reloc_ok;
6186
6187 case R_ARM_LDRS_PC_G0:
6188 case R_ARM_LDRS_PC_G1:
6189 case R_ARM_LDRS_PC_G2:
6190 case R_ARM_LDRS_SB_G0:
6191 case R_ARM_LDRS_SB_G1:
6192 case R_ARM_LDRS_SB_G2:
6193 {
6194 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6195 bfd_vma pc = input_section->output_section->vma
6196 + input_section->output_offset + rel->r_offset;
6197 bfd_vma sb = 0; /* See note above. */
6198 bfd_vma residual;
6199 bfd_signed_vma signed_value;
6200 int group = 0;
6201
6202 /* Determine which groups of bits to calculate. */
6203 switch (r_type)
6204 {
6205 case R_ARM_LDRS_PC_G0:
6206 case R_ARM_LDRS_SB_G0:
6207 group = 0;
6208 break;
6209
6210 case R_ARM_LDRS_PC_G1:
6211 case R_ARM_LDRS_SB_G1:
6212 group = 1;
6213 break;
6214
6215 case R_ARM_LDRS_PC_G2:
6216 case R_ARM_LDRS_SB_G2:
6217 group = 2;
6218 break;
6219
6220 default:
6221 abort();
6222 }
6223
6224 /* If REL, extract the addend from the insn. If RELA, it will
6225 have already been fetched for us. */
6226 if (globals->use_rel)
6227 {
6228 int negative = (insn & (1 << 23)) ? 1 : -1;
6229 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
6230 }
6231
6232 /* Compute the value (X) to go in the place. */
6233 if (r_type == R_ARM_LDRS_PC_G0
6234 || r_type == R_ARM_LDRS_PC_G1
6235 || r_type == R_ARM_LDRS_PC_G2)
6236 /* PC relative. */
6237 signed_value = value - pc + signed_addend;
6238 else
6239 /* Section base relative. */
6240 signed_value = value - sb + signed_addend;
6241
6242 /* Calculate the value of the relevant G_{n-1} to obtain
6243 the residual at that stage. */
6244 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6245
6246 /* Check for overflow. */
6247 if (residual >= 0x100)
6248 {
6249 (*_bfd_error_handler)
6250 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6251 input_bfd, input_section,
6252 (long) rel->r_offset, abs (signed_value), howto->name);
6253 return bfd_reloc_overflow;
6254 }
6255
6256 /* Mask out the value and U bit. */
6257 insn &= 0xff7ff0f0;
6258
6259 /* Set the U bit if the value to go in the place is non-negative. */
6260 if (signed_value >= 0)
6261 insn |= 1 << 23;
6262
6263 /* Encode the offset. */
6264 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
6265
6266 bfd_put_32 (input_bfd, insn, hit_data);
6267 }
6268 return bfd_reloc_ok;
6269
6270 case R_ARM_LDC_PC_G0:
6271 case R_ARM_LDC_PC_G1:
6272 case R_ARM_LDC_PC_G2:
6273 case R_ARM_LDC_SB_G0:
6274 case R_ARM_LDC_SB_G1:
6275 case R_ARM_LDC_SB_G2:
6276 {
6277 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6278 bfd_vma pc = input_section->output_section->vma
6279 + input_section->output_offset + rel->r_offset;
6280 bfd_vma sb = 0; /* See note above. */
6281 bfd_vma residual;
6282 bfd_signed_vma signed_value;
6283 int group = 0;
6284
6285 /* Determine which groups of bits to calculate. */
6286 switch (r_type)
6287 {
6288 case R_ARM_LDC_PC_G0:
6289 case R_ARM_LDC_SB_G0:
6290 group = 0;
6291 break;
6292
6293 case R_ARM_LDC_PC_G1:
6294 case R_ARM_LDC_SB_G1:
6295 group = 1;
6296 break;
6297
6298 case R_ARM_LDC_PC_G2:
6299 case R_ARM_LDC_SB_G2:
6300 group = 2;
6301 break;
6302
6303 default:
6304 abort();
6305 }
6306
6307 /* If REL, extract the addend from the insn. If RELA, it will
6308 have already been fetched for us. */
6309 if (globals->use_rel)
6310 {
6311 int negative = (insn & (1 << 23)) ? 1 : -1;
6312 signed_addend = negative * ((insn & 0xff) << 2);
6313 }
6314
6315 /* Compute the value (X) to go in the place. */
6316 if (r_type == R_ARM_LDC_PC_G0
6317 || r_type == R_ARM_LDC_PC_G1
6318 || r_type == R_ARM_LDC_PC_G2)
6319 /* PC relative. */
6320 signed_value = value - pc + signed_addend;
6321 else
6322 /* Section base relative. */
6323 signed_value = value - sb + signed_addend;
6324
6325 /* Calculate the value of the relevant G_{n-1} to obtain
6326 the residual at that stage. */
6327 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6328
6329 /* Check for overflow. (The absolute value to go in the place must be
6330 divisible by four and, after having been divided by four, must
6331 fit in eight bits.) */
6332 if ((residual & 0x3) != 0 || residual >= 0x400)
6333 {
6334 (*_bfd_error_handler)
6335 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6336 input_bfd, input_section,
6337 (long) rel->r_offset, abs (signed_value), howto->name);
6338 return bfd_reloc_overflow;
6339 }
6340
6341 /* Mask out the value and U bit. */
6342 insn &= 0xff7fff00;
6343
6344 /* Set the U bit if the value to go in the place is non-negative. */
6345 if (signed_value >= 0)
6346 insn |= 1 << 23;
6347
6348 /* Encode the offset. */
6349 insn |= residual >> 2;
6350
6351 bfd_put_32 (input_bfd, insn, hit_data);
6352 }
6353 return bfd_reloc_ok;
6354
252b5132
RH		 6355 default:
6356 return bfd_reloc_notsupported;
6357 }
6358}
6359
98c1d4aa
NC		 6360/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
6361static void
57e8b36a
NC		 6362arm_add_to_rel (bfd * abfd,
6363 bfd_byte * address,
6364 reloc_howto_type * howto,
6365 bfd_signed_vma increment)
98c1d4aa 6366{
98c1d4aa
NC		 6367 bfd_signed_vma addend;
6368
bd97cb95
DJ		 6369 if (howto->type == R_ARM_THM_CALL
6370 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 6371 {
9a5aca8c
AM		 6372 int upper_insn, lower_insn;
6373 int upper, lower;
98c1d4aa 6374
9a5aca8c
AM		 6375 upper_insn = bfd_get_16 (abfd, address);
6376 lower_insn = bfd_get_16 (abfd, address + 2);
6377 upper = upper_insn & 0x7ff;
6378 lower = lower_insn & 0x7ff;
6379
6380 addend = (upper << 12) | (lower << 1);
ddda4409 6381 addend += increment;
9a5aca8c 6382 addend >>= 1;
98c1d4aa 6383
9a5aca8c
AM		 6384 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
6385 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
6386
dc810e39
AM		 6387 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
6388 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 6389 }
6390 else
6391 {
6392 bfd_vma contents;
6393
6394 contents = bfd_get_32 (abfd, address);
6395
6396 /* Get the (signed) value from the instruction. */
6397 addend = contents & howto->src_mask;
6398 if (addend & ((howto->src_mask + 1) >> 1))
6399 {
6400 bfd_signed_vma mask;
6401
6402 mask = -1;
6403 mask &= ~ howto->src_mask;
6404 addend |= mask;
6405 }
6406
6407 /* Add in the increment, (which is a byte value). */
6408 switch (howto->type)
6409 {
6410 default:
6411 addend += increment;
6412 break;
6413
6414 case R_ARM_PC24:
c6596c5e 6415 case R_ARM_PLT32:
5b5bb741
PB		 6416 case R_ARM_CALL:
6417 case R_ARM_JUMP24:
9a5aca8c 6418 addend <<= howto->size;
dc810e39 6419 addend += increment;
9a5aca8c
AM		 6420
6421 /* Should we check for overflow here ? */
6422
6423 /* Drop any undesired bits. */
6424 addend >>= howto->rightshift;
6425 break;
6426 }
6427
6428 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
6429
6430 bfd_put_32 (abfd, contents, address);
ddda4409 6431 }
98c1d4aa 6432}
252b5132 6433
ba93b8ac
DJ		 6434#define IS_ARM_TLS_RELOC(R_TYPE) \
6435 ((R_TYPE) == R_ARM_TLS_GD32 \
6436 || (R_TYPE) == R_ARM_TLS_LDO32 \
6437 || (R_TYPE) == R_ARM_TLS_LDM32 \
6438 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
6439 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
6440 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
6441 || (R_TYPE) == R_ARM_TLS_LE32 \
6442 || (R_TYPE) == R_ARM_TLS_IE32)
6443
252b5132 6444/* Relocate an ARM ELF section. */
b34976b6 6445static bfd_boolean
57e8b36a
NC		 6446elf32_arm_relocate_section (bfd * output_bfd,
6447 struct bfd_link_info * info,
6448 bfd * input_bfd,
6449 asection * input_section,
6450 bfd_byte * contents,
6451 Elf_Internal_Rela * relocs,
6452 Elf_Internal_Sym * local_syms,
6453 asection ** local_sections)
252b5132 6454{
b34976b6
AM		 6455 Elf_Internal_Shdr *symtab_hdr;
6456 struct elf_link_hash_entry **sym_hashes;
6457 Elf_Internal_Rela *rel;
6458 Elf_Internal_Rela *relend;
6459 const char *name;
b32d3aa2 6460 struct elf32_arm_link_hash_table * globals;
252b5132 6461
4e7fd91e 6462 globals = elf32_arm_hash_table (info);
b491616a 6463
0ffa91dd 6464 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6465 sym_hashes = elf_sym_hashes (input_bfd);
6466
6467 rel = relocs;
6468 relend = relocs + input_section->reloc_count;
6469 for (; rel < relend; rel++)
6470 {
ba96a88f
NC		 6471 int r_type;
6472 reloc_howto_type * howto;
6473 unsigned long r_symndx;
6474 Elf_Internal_Sym * sym;
6475 asection * sec;
252b5132 6476 struct elf_link_hash_entry * h;
ba96a88f
NC		 6477 bfd_vma relocation;
6478 bfd_reloc_status_type r;
6479 arelent bfd_reloc;
ba93b8ac 6480 char sym_type;
0945cdfd 6481 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 6482 char *error_message = NULL;
f21f3fe0 6483
252b5132 6484 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 6485 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 6486 r_type = arm_real_reloc_type (globals, r_type);
252b5132 6487
ba96a88f
NC		 6488 if ( r_type == R_ARM_GNU_VTENTRY
6489 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 6490 continue;
6491
b32d3aa2 6492 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 6493 howto = bfd_reloc.howto;
252b5132 6494
252b5132
RH		 6495 h = NULL;
6496 sym = NULL;
6497 sec = NULL;
9b485d32 6498
252b5132
RH		 6499 if (r_symndx < symtab_hdr->sh_info)
6500 {
6501 sym = local_syms + r_symndx;
ba93b8ac 6502 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 6503 sec = local_sections[r_symndx];
4e7fd91e 6504 if (globals->use_rel)
f8df10f4 6505 {
4e7fd91e
PB		 6506 relocation = (sec->output_section->vma
6507 + sec->output_offset
6508 + sym->st_value);
ab96bf03
AM		 6509 if (!info->relocatable
6510 && (sec->flags & SEC_MERGE)
6511 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 6512 {
4e7fd91e
PB		 6513 asection *msec;
6514 bfd_vma addend, value;
6515
39623e12 6516 switch (r_type)
4e7fd91e 6517 {
39623e12
PB		 6518 case R_ARM_MOVW_ABS_NC:
6519 case R_ARM_MOVT_ABS:
6520 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
6521 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
6522 addend = (addend ^ 0x8000) - 0x8000;
6523 break;
f8df10f4 6524
39623e12
PB		 6525 case R_ARM_THM_MOVW_ABS_NC:
6526 case R_ARM_THM_MOVT_ABS:
6527 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
6528 << 16;
6529 value |= bfd_get_16 (input_bfd,
6530 contents + rel->r_offset + 2);
6531 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
6532 | ((value & 0x04000000) >> 15);
6533 addend = (addend ^ 0x8000) - 0x8000;
6534 break;
f8df10f4 6535
39623e12
PB		 6536 default:
6537 if (howto->rightshift
6538 || (howto->src_mask & (howto->src_mask + 1)))
6539 {
6540 (*_bfd_error_handler)
6541 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
6542 input_bfd, input_section,
6543 (long) rel->r_offset, howto->name);
6544 return FALSE;
6545 }
6546
6547 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
6548
6549 /* Get the (signed) value from the instruction. */
6550 addend = value & howto->src_mask;
6551 if (addend & ((howto->src_mask + 1) >> 1))
6552 {
6553 bfd_signed_vma mask;
6554
6555 mask = -1;
6556 mask &= ~ howto->src_mask;
6557 addend |= mask;
6558 }
6559 break;
4e7fd91e 6560 }
39623e12 6561
4e7fd91e
PB		 6562 msec = sec;
6563 addend =
6564 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
6565 - relocation;
6566 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 6567
6568 /* Cases here must match those in the preceeding
6569 switch statement. */
6570 switch (r_type)
6571 {
6572 case R_ARM_MOVW_ABS_NC:
6573 case R_ARM_MOVT_ABS:
6574 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
6575 | (addend & 0xfff);
6576 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
6577 break;
6578
6579 case R_ARM_THM_MOVW_ABS_NC:
6580 case R_ARM_THM_MOVT_ABS:
6581 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
6582 | (addend & 0xff) | ((addend & 0x0800) << 15);
6583 bfd_put_16 (input_bfd, value >> 16,
6584 contents + rel->r_offset);
6585 bfd_put_16 (input_bfd, value,
6586 contents + rel->r_offset + 2);
6587 break;
6588
6589 default:
6590 value = (value & ~ howto->dst_mask)
6591 | (addend & howto->dst_mask);
6592 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
6593 break;
6594 }
f8df10f4 6595 }
f8df10f4 6596 }
4e7fd91e
PB		 6597 else
6598 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 6599 }
6600 else
6601 {
560e09e9 6602 bfd_boolean warned;
560e09e9 6603
b2a8e766
AM		 6604 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
6605 r_symndx, symtab_hdr, sym_hashes,
6606 h, sec, relocation,
6607 unresolved_reloc, warned);
ba93b8ac
DJ		 6608
6609 sym_type = h->type;
252b5132
RH		 6610 }
6611
ab96bf03
AM		 6612 if (sec != NULL && elf_discarded_section (sec))
6613 {
6614 /* For relocs against symbols from removed linkonce sections,
6615 or sections discarded by a linker script, we just want the
6616 section contents zeroed. Avoid any special processing. */
6617 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
6618 rel->r_info = 0;
6619 rel->r_addend = 0;
6620 continue;
6621 }
6622
6623 if (info->relocatable)
6624 {
6625 /* This is a relocatable link. We don't have to change
6626 anything, unless the reloc is against a section symbol,
6627 in which case we have to adjust according to where the
6628 section symbol winds up in the output section. */
6629 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
6630 {
6631 if (globals->use_rel)
6632 arm_add_to_rel (input_bfd, contents + rel->r_offset,
6633 howto, (bfd_signed_vma) sec->output_offset);
6634 else
6635 rel->r_addend += sec->output_offset;
6636 }
6637 continue;
6638 }
6639
252b5132
RH		 6640 if (h != NULL)
6641 name = h->root.root.string;
6642 else
6643 {
6644 name = (bfd_elf_string_from_elf_section
6645 (input_bfd, symtab_hdr->sh_link, sym->st_name));
6646 if (name == NULL || *name == '\0')
6647 name = bfd_section_name (input_bfd, sec);
6648 }
f21f3fe0 6649
ba93b8ac
DJ		 6650 if (r_symndx != 0
6651 && r_type != R_ARM_NONE
6652 && (h == NULL
6653 || h->root.type == bfd_link_hash_defined
6654 || h->root.type == bfd_link_hash_defweak)
6655 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
6656 {
6657 (*_bfd_error_handler)
6658 ((sym_type == STT_TLS
6659 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
6660 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
6661 input_bfd,
6662 input_section,
6663 (long) rel->r_offset,
6664 howto->name,
6665 name);
6666 }
6667
252b5132
RH		 6668 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
6669 input_section, contents, rel,
6670 relocation, info, sec, name,
6671 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 6672 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 6673 &unresolved_reloc, &error_message);
0945cdfd
DJ		 6674
6675 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
6676 because such sections are not SEC_ALLOC and thus ld.so will
6677 not process them. */
6678 if (unresolved_reloc
6679 && !((input_section->flags & SEC_DEBUGGING) != 0
6680 && h->def_dynamic))
6681 {
6682 (*_bfd_error_handler)
843fe662
L		 6683 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
6684 input_bfd,
6685 input_section,
6686 (long) rel->r_offset,
6687 howto->name,
6688 h->root.root.string);
0945cdfd
DJ		 6689 return FALSE;
6690 }
252b5132
RH		 6691
6692 if (r != bfd_reloc_ok)
6693 {
252b5132
RH		 6694 switch (r)
6695 {
6696 case bfd_reloc_overflow:
cf919dfd
PB		 6697 /* If the overflowing reloc was to an undefined symbol,
6698 we have already printed one error message and there
6699 is no point complaining again. */
6700 if ((! h ||
6701 h->root.type != bfd_link_hash_undefined)
6702 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 6703 (info, (h ? &h->root : NULL), name, howto->name,
6704 (bfd_vma) 0, input_bfd, input_section,
6705 rel->r_offset))))
b34976b6 6706 return FALSE;
252b5132
RH		 6707 break;
6708
6709 case bfd_reloc_undefined:
6710 if (!((*info->callbacks->undefined_symbol)
6711 (info, name, input_bfd, input_section,
b34976b6
AM		 6712 rel->r_offset, TRUE)))
6713 return FALSE;
252b5132
RH		 6714 break;
6715
6716 case bfd_reloc_outofrange:
f2a9dd69 6717 error_message = _("out of range");
252b5132
RH		 6718 goto common_error;
6719
6720 case bfd_reloc_notsupported:
f2a9dd69 6721 error_message = _("unsupported relocation");
252b5132
RH		 6722 goto common_error;
6723
6724 case bfd_reloc_dangerous:
f2a9dd69 6725 /* error_message should already be set. */
252b5132
RH		 6726 goto common_error;
6727
6728 default:
f2a9dd69 6729 error_message = _("unknown error");
252b5132
RH		 6730 /* fall through */
6731
6732 common_error:
f2a9dd69
DJ		 6733 BFD_ASSERT (error_message != NULL);
6734 if (!((*info->callbacks->reloc_dangerous)
6735 (info, error_message, input_bfd, input_section,
252b5132 6736 rel->r_offset)))
b34976b6 6737 return FALSE;
252b5132
RH		 6738 break;
6739 }
6740 }
6741 }
6742
b34976b6 6743 return TRUE;
252b5132
RH		 6744}
6745
c178919b
NC		 6746/* Set the right machine number. */
6747
6748static bfd_boolean
57e8b36a 6749elf32_arm_object_p (bfd *abfd)
c178919b 6750{
5a6c6817 6751 unsigned int mach;
57e8b36a 6752
5a6c6817 6753 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 6754
5a6c6817
NC		 6755 if (mach != bfd_mach_arm_unknown)
6756 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
6757
6758 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
6759 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 6760
e16bb312 6761 else
5a6c6817 6762 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 6763
6764 return TRUE;
6765}
6766
fc830a83 6767/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 6768
b34976b6 6769static bfd_boolean
57e8b36a 6770elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 6771{
6772 if (elf_flags_init (abfd)
6773 && elf_elfheader (abfd)->e_flags != flags)
6774 {
fc830a83
NC		 6775 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
6776 {
fd2ec330 6777 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 6778 (*_bfd_error_handler)
6779 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
6780 abfd);
fc830a83 6781 else
d003868e
AM		 6782 _bfd_error_handler
6783 (_("Warning: Clearing the interworking flag of %B due to outside request"),
6784 abfd);
fc830a83 6785 }
252b5132
RH		 6786 }
6787 else
6788 {
6789 elf_elfheader (abfd)->e_flags = flags;
b34976b6 6790 elf_flags_init (abfd) = TRUE;
252b5132
RH		 6791 }
6792
b34976b6 6793 return TRUE;
252b5132
RH		 6794}
6795
fc830a83 6796/* Copy backend specific data from one object module to another. */
9b485d32 6797
b34976b6 6798static bfd_boolean
57e8b36a 6799elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 6800{
6801 flagword in_flags;
6802 flagword out_flags;
6803
0ffa91dd 6804 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 6805 return TRUE;
252b5132 6806
fc830a83 6807 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 6808 out_flags = elf_elfheader (obfd)->e_flags;
6809
fc830a83
NC		 6810 if (elf_flags_init (obfd)
6811 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
6812 && in_flags != out_flags)
252b5132 6813 {
252b5132 6814 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 6815 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 6816 return FALSE;
252b5132
RH		 6817
6818 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 6819 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 6820 return FALSE;
252b5132
RH		 6821
6822 /* If the src and dest have different interworking flags
6823 then turn off the interworking bit. */
fd2ec330 6824 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 6825 {
fd2ec330 6826 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 6827 _bfd_error_handler
6828 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
6829 obfd, ibfd);
252b5132 6830
fd2ec330 6831 in_flags &= ~EF_ARM_INTERWORK;
252b5132 6832 }
1006ba19
PB		 6833
6834 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 6835 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
6836 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 6837 }
6838
6839 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 6840 elf_flags_init (obfd) = TRUE;
252b5132 6841
94a3258f
PB		 6842 /* Also copy the EI_OSABI field. */
6843 elf_elfheader (obfd)->e_ident[EI_OSABI] =
6844 elf_elfheader (ibfd)->e_ident[EI_OSABI];
6845
104d59d1
JM		 6846 /* Copy object attributes. */
6847 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 6848
6849 return TRUE;
6850}
6851
6852/* Values for Tag_ABI_PCS_R9_use. */
6853enum
6854{
6855 AEABI_R9_V6,
6856 AEABI_R9_SB,
6857 AEABI_R9_TLS,
6858 AEABI_R9_unused
6859};
6860
6861/* Values for Tag_ABI_PCS_RW_data. */
6862enum
6863{
6864 AEABI_PCS_RW_data_absolute,
6865 AEABI_PCS_RW_data_PCrel,
6866 AEABI_PCS_RW_data_SBrel,
6867 AEABI_PCS_RW_data_unused
6868};
6869
6870/* Values for Tag_ABI_enum_size. */
6871enum
6872{
6873 AEABI_enum_unused,
6874 AEABI_enum_short,
6875 AEABI_enum_wide,
6876 AEABI_enum_forced_wide
6877};
6878
104d59d1
JM		 6879/* Determine whether an object attribute tag takes an integer, a
6880 string or both. */
6881static int
6882elf32_arm_obj_attrs_arg_type (int tag)
6883{
6884 if (tag == Tag_compatibility)
6885 return 3;
6886 else if (tag == 4 || tag == 5)
6887 return 2;
6888 else if (tag < 32)
6889 return 1;
6890 else
6891 return (tag & 1) != 0 ? 2 : 1;
6892}
6893
ee065d83
PB		 6894/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
6895 are conflicting attributes. */
6896static bfd_boolean
6897elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
6898{
104d59d1
JM		 6899 obj_attribute *in_attr;
6900 obj_attribute *out_attr;
6901 obj_attribute_list *in_list;
ee065d83
PB		 6902 /* Some tags have 0 = don't care, 1 = strong requirement,
6903 2 = weak requirement. */
6904 static const int order_312[3] = {3, 1, 2};
6905 int i;
6906
104d59d1 6907 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 6908 {
6909 /* This is the first object. Copy the attributes. */
104d59d1 6910 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 6911
6912 /* Use the Tag_null value to indicate the attributes have been
6913 initialized. */
104d59d1 6914 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 6915
ee065d83
PB		 6916 return TRUE;
6917 }
6918
104d59d1
JM		 6919 in_attr = elf_known_obj_attributes_proc (ibfd);
6920 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 6921 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
6922 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
6923 {
6924 /* Ignore mismatches if teh object doesn't use floating point. */
6925 if (out_attr[Tag_ABI_FP_number_model].i == 0)
6926 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
6927 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
6928 {
6929 _bfd_error_handler
6930 (_("ERROR: %B uses VFP register arguments, %B does not"),
6931 ibfd, obfd);
6932 return FALSE;
6933 }
6934 }
6935
104d59d1 6936 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 6937 {
6938 /* Merge this attribute with existing attributes. */
6939 switch (i)
6940 {
6941 case Tag_CPU_raw_name:
6942 case Tag_CPU_name:
004ae526
PB		 6943 /* Use whichever has the greatest architecture requirements. We
6944 won't necessarily have both the above tags, so make sure input
6945 name is non-NULL. */
6946 if (in_attr[Tag_CPU_arch].i > out_attr[Tag_CPU_arch].i
6947 && in_attr[i].s)
104d59d1 6948 out_attr[i].s = _bfd_elf_attr_strdup (obfd, in_attr[i].s);
ee065d83
PB		 6949 break;
6950
6951 case Tag_ABI_optimization_goals:
6952 case Tag_ABI_FP_optimization_goals:
6953 /* Use the first value seen. */
6954 break;
6955
6956 case Tag_CPU_arch:
6957 case Tag_ARM_ISA_use:
6958 case Tag_THUMB_ISA_use:
6959 case Tag_VFP_arch:
6960 case Tag_WMMX_arch:
6961 case Tag_NEON_arch:
6962 /* ??? Do NEON and WMMX conflict? */
6963 case Tag_ABI_FP_rounding:
6964 case Tag_ABI_FP_denormal:
6965 case Tag_ABI_FP_exceptions:
6966 case Tag_ABI_FP_user_exceptions:
6967 case Tag_ABI_FP_number_model:
6968 case Tag_ABI_align8_preserved:
6969 case Tag_ABI_HardFP_use:
6970 /* Use the largest value specified. */
6971 if (in_attr[i].i > out_attr[i].i)
6972 out_attr[i].i = in_attr[i].i;
6973 break;
6974
6975 case Tag_CPU_arch_profile:
6976 /* Warn if conflicting architecture profiles used. */
6977 if (out_attr[i].i && in_attr[i].i && in_attr[i].i != out_attr[i].i)
6978 {
6979 _bfd_error_handler
6980 (_("ERROR: %B: Conflicting architecture profiles %c/%c"),
6981 ibfd, in_attr[i].i, out_attr[i].i);
6982 return FALSE;
6983 }
6984 if (in_attr[i].i)
6985 out_attr[i].i = in_attr[i].i;
6986 break;
6987 case Tag_PCS_config:
6988 if (out_attr[i].i == 0)
6989 out_attr[i].i = in_attr[i].i;
6990 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
6991 {
6992 /* It's sometimes ok to mix different configs, so this is only
6993 a warning. */
6994 _bfd_error_handler
6995 (_("Warning: %B: Conflicting platform configuration"), ibfd);
6996 }
6997 break;
6998 case Tag_ABI_PCS_R9_use:
004ae526
PB		 6999 if (in_attr[i].i != out_attr[i].i
7000 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 7001 && in_attr[i].i != AEABI_R9_unused)
7002 {
7003 _bfd_error_handler
7004 (_("ERROR: %B: Conflicting use of R9"), ibfd);
7005 return FALSE;
7006 }
7007 if (out_attr[i].i == AEABI_R9_unused)
7008 out_attr[i].i = in_attr[i].i;
7009 break;
7010 case Tag_ABI_PCS_RW_data:
7011 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
7012 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
7013 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
7014 {
7015 _bfd_error_handler
7016 (_("ERROR: %B: SB relative addressing conflicts with use of R9"),
7017 ibfd);
7018 return FALSE;
7019 }
7020 /* Use the smallest value specified. */
7021 if (in_attr[i].i < out_attr[i].i)
7022 out_attr[i].i = in_attr[i].i;
7023 break;
7024 case Tag_ABI_PCS_RO_data:
7025 /* Use the smallest value specified. */
7026 if (in_attr[i].i < out_attr[i].i)
7027 out_attr[i].i = in_attr[i].i;
7028 break;
7029 case Tag_ABI_PCS_GOT_use:
7030 if (in_attr[i].i > 2 || out_attr[i].i > 2
7031 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
7032 out_attr[i].i = in_attr[i].i;
7033 break;
7034 case Tag_ABI_PCS_wchar_t:
7035 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i)
7036 {
7037 _bfd_error_handler
7038 (_("ERROR: %B: Conflicting definitions of wchar_t"), ibfd);
7039 return FALSE;
7040 }
7041 if (in_attr[i].i)
7042 out_attr[i].i = in_attr[i].i;
7043 break;
7044 case Tag_ABI_align8_needed:
7045 /* ??? Check against Tag_ABI_align8_preserved. */
7046 if (in_attr[i].i > 2 || out_attr[i].i > 2
7047 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
7048 out_attr[i].i = in_attr[i].i;
7049 break;
7050 case Tag_ABI_enum_size:
7051 if (in_attr[i].i != AEABI_enum_unused)
7052 {
7053 if (out_attr[i].i == AEABI_enum_unused
7054 || out_attr[i].i == AEABI_enum_forced_wide)
7055 {
7056 /* The existing object is compatible with anything.
7057 Use whatever requirements the new object has. */
7058 out_attr[i].i = in_attr[i].i;
7059 }
7060 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 7061 && out_attr[i].i != in_attr[i].i
0ffa91dd 7062 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 7063 {
bf21ed78
MS		 7064 const char *aeabi_enum_names[] =
7065 { "", "variable-size", "32-bit", "" };
ee065d83 7066 _bfd_error_handler
bf21ed78
MS		 7067 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
7068 ibfd, aeabi_enum_names[in_attr[i].i],
7069 aeabi_enum_names[out_attr[i].i]);
ee065d83
PB		 7070 }
7071 }
7072 break;
7073 case Tag_ABI_VFP_args:
7074 /* Aready done. */
7075 break;
7076 case Tag_ABI_WMMX_args:
7077 if (in_attr[i].i != out_attr[i].i)
7078 {
7079 _bfd_error_handler
7080 (_("ERROR: %B uses iWMMXt register arguments, %B does not"),
7081 ibfd, obfd);
7082 return FALSE;
7083 }
7084 break;
7085 default: /* All known attributes should be explicitly covered. */
7086 abort ();
7087 }
3cfad14c
JM		 7088
7089 if (in_attr[i].type && !out_attr[i].type)
7090 switch (in_attr[i].type)
7091 {
7092 case 1:
7093 if (out_attr[i].i)
7094 out_attr[i].type = 1;
7095 break;
7096
7097 case 2:
7098 if (out_attr[i].s)
7099 out_attr[i].type = 2;
7100 break;
7101
7102 default:
7103 abort ();
7104 }
ee065d83
PB		 7105 }
7106
104d59d1
JM		 7107 /* Merge Tag_compatibility attributes and any common GNU ones. */
7108 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 7109
104d59d1
JM		 7110 /* Check for any attributes not known on ARM. */
7111 in_list = elf_other_obj_attributes_proc (ibfd);
7112 while (in_list && in_list->tag == Tag_compatibility)
7113 in_list = in_list->next;
ee065d83
PB		 7114
7115 for (; in_list; in_list = in_list->next)
7116 {
7117 if ((in_list->tag & 128) < 64)
eb111b1f
BE		 7118 {
7119 _bfd_error_handler
7120 (_("Warning: %B: Unknown EABI object attribute %d"),
7121 ibfd, in_list->tag);
7122 break;
7123 }
ee065d83 7124 }
b34976b6 7125 return TRUE;
252b5132
RH		 7126}
7127
3a4a14e9
PB		 7128
7129/* Return TRUE if the two EABI versions are incompatible. */
7130
7131static bfd_boolean
7132elf32_arm_versions_compatible (unsigned iver, unsigned over)
7133{
7134 /* v4 and v5 are the same spec before and after it was released,
7135 so allow mixing them. */
7136 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
7137 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
7138 return TRUE;
7139
7140 return (iver == over);
7141}
7142
252b5132
RH		 7143/* Merge backend specific data from an object file to the output
7144 object file when linking. */
9b485d32 7145
b34976b6 7146static bfd_boolean
57e8b36a 7147elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 7148{
7149 flagword out_flags;
7150 flagword in_flags;
b34976b6 7151 bfd_boolean flags_compatible = TRUE;
cf919dfd 7152 asection *sec;
252b5132 7153
9b485d32 7154 /* Check if we have the same endianess. */
82e51918 7155 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 7156 return FALSE;
1fe494a5 7157
0ffa91dd 7158 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 7159 return TRUE;
252b5132 7160
ee065d83
PB		 7161 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
7162 return FALSE;
7163
252b5132
RH		 7164 /* The input BFD must have had its flags initialised. */
7165 /* The following seems bogus to me -- The flags are initialized in
7166 the assembler but I don't think an elf_flags_init field is
9b485d32 7167 written into the object. */
252b5132
RH		 7168 /* BFD_ASSERT (elf_flags_init (ibfd)); */
7169
7170 in_flags = elf_elfheader (ibfd)->e_flags;
7171 out_flags = elf_elfheader (obfd)->e_flags;
7172
7173 if (!elf_flags_init (obfd))
7174 {
fe077fa6
NC		 7175 /* If the input is the default architecture and had the default
7176 flags then do not bother setting the flags for the output
7177 architecture, instead allow future merges to do this. If no
7178 future merges ever set these flags then they will retain their
7179 uninitialised values, which surprise surprise, correspond
252b5132 7180 to the default values. */
fe077fa6
NC		 7181 if (bfd_get_arch_info (ibfd)->the_default
7182 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 7183 return TRUE;
252b5132 7184
b34976b6 7185 elf_flags_init (obfd) = TRUE;
252b5132
RH		 7186 elf_elfheader (obfd)->e_flags = in_flags;
7187
7188 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
7189 && bfd_get_arch_info (obfd)->the_default)
7190 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
7191
b34976b6 7192 return TRUE;
252b5132
RH		 7193 }
7194
5a6c6817
NC		 7195 /* Determine what should happen if the input ARM architecture
7196 does not match the output ARM architecture. */
7197 if (! bfd_arm_merge_machines (ibfd, obfd))
7198 return FALSE;
e16bb312 7199
1006ba19 7200 /* Identical flags must be compatible. */
252b5132 7201 if (in_flags == out_flags)
b34976b6 7202 return TRUE;
252b5132 7203
35a0f415
DJ		 7204 /* Check to see if the input BFD actually contains any sections. If
7205 not, its flags may not have been initialised either, but it
8e3de13a 7206 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 7207 dynamic objects; their section list may be emptied by
d1f161ea 7208 elf_link_add_object_symbols.
35a0f415 7209
d1f161ea
NC		 7210 Also check to see if there are no code sections in the input.
7211 In this case there is no need to check for code specific flags.
7212 XXX - do we need to worry about floating-point format compatability
7213 in data sections ? */
35a0f415 7214 if (!(ibfd->flags & DYNAMIC))
cf919dfd 7215 {
35a0f415 7216 bfd_boolean null_input_bfd = TRUE;
d1f161ea 7217 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 7218
7219 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 7220 {
35a0f415
DJ		 7221 /* Ignore synthetic glue sections. */
7222 if (strcmp (sec->name, ".glue_7")
7223 && strcmp (sec->name, ".glue_7t"))
7224 {
d1f161ea
NC		 7225 if ((bfd_get_section_flags (ibfd, sec)
7226 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7227 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7228 only_data_sections = FALSE;
7229
35a0f415
DJ		 7230 null_input_bfd = FALSE;
7231 break;
7232 }
cf919dfd 7233 }
d1f161ea
NC		 7234
7235 if (null_input_bfd || only_data_sections)
35a0f415 7236 return TRUE;
cf919dfd 7237 }
cf919dfd 7238
252b5132 7239 /* Complain about various flag mismatches. */
3a4a14e9
PB		 7240 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
7241 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 7242 {
d003868e 7243 _bfd_error_handler
3656d5e3 7244 (_("ERROR: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 7245 ibfd, obfd,
7246 (in_flags & EF_ARM_EABIMASK) >> 24,
7247 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 7248 return FALSE;
fc830a83 7249 }
252b5132 7250
1006ba19 7251 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 7252 /* VxWorks libraries do not use these flags. */
7253 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
7254 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
7255 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 7256 {
fd2ec330 7257 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 7258 {
d003868e
AM		 7259 _bfd_error_handler
7260 (_("ERROR: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
7261 ibfd, obfd,
7262 in_flags & EF_ARM_APCS_26 ? 26 : 32,
7263 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 7264 flags_compatible = FALSE;
1006ba19 7265 }
252b5132 7266
fd2ec330 7267 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 7268 {
5eefb65f 7269 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e
AM		 7270 _bfd_error_handler
7271 (_("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers"),
7272 ibfd, obfd);
5eefb65f 7273 else
d003868e
AM		 7274 _bfd_error_handler
7275 (_("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers"),
7276 ibfd, obfd);
63b0f745 7277
b34976b6 7278 flags_compatible = FALSE;
1006ba19 7279 }
252b5132 7280
96a846ea 7281 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 7282 {
96a846ea 7283 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e
AM		 7284 _bfd_error_handler
7285 (_("ERROR: %B uses VFP instructions, whereas %B does not"),
7286 ibfd, obfd);
5eefb65f 7287 else
d003868e
AM		 7288 _bfd_error_handler
7289 (_("ERROR: %B uses FPA instructions, whereas %B does not"),
7290 ibfd, obfd);
fde78edd
NC		 7291
7292 flags_compatible = FALSE;
7293 }
7294
7295 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
7296 {
7297 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e
AM		 7298 _bfd_error_handler
7299 (_("ERROR: %B uses Maverick instructions, whereas %B does not"),
7300 ibfd, obfd);
fde78edd 7301 else
d003868e
AM		 7302 _bfd_error_handler
7303 (_("ERROR: %B does not use Maverick instructions, whereas %B does"),
7304 ibfd, obfd);
63b0f745 7305
b34976b6 7306 flags_compatible = FALSE;
1006ba19 7307 }
96a846ea
RE		 7308
7309#ifdef EF_ARM_SOFT_FLOAT
7310 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
7311 {
7312 /* We can allow interworking between code that is VFP format
7313 layout, and uses either soft float or integer regs for
7314 passing floating point arguments and results. We already
7315 know that the APCS_FLOAT flags match; similarly for VFP
7316 flags. */
7317 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
7318 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
7319 {
7320 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e
AM		 7321 _bfd_error_handler
7322 (_("ERROR: %B uses software FP, whereas %B uses hardware FP"),
7323 ibfd, obfd);
96a846ea 7324 else
d003868e
AM		 7325 _bfd_error_handler
7326 (_("ERROR: %B uses hardware FP, whereas %B uses software FP"),
7327 ibfd, obfd);
96a846ea 7328
b34976b6 7329 flags_compatible = FALSE;
96a846ea
RE		 7330 }
7331 }
ee43f35e 7332#endif
252b5132 7333
1006ba19 7334 /* Interworking mismatch is only a warning. */
fd2ec330 7335 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 7336 {
e3c8793a
NC		 7337 if (in_flags & EF_ARM_INTERWORK)
7338 {
d003868e
AM		 7339 _bfd_error_handler
7340 (_("Warning: %B supports interworking, whereas %B does not"),
7341 ibfd, obfd);
e3c8793a
NC		 7342 }
7343 else
7344 {
d003868e
AM		 7345 _bfd_error_handler
7346 (_("Warning: %B does not support interworking, whereas %B does"),
7347 ibfd, obfd);
e3c8793a 7348 }
8f615d07 7349 }
252b5132 7350 }
63b0f745 7351
1006ba19 7352 return flags_compatible;
252b5132
RH		 7353}
7354
9b485d32
NC		 7355/* Display the flags field. */
7356
b34976b6 7357static bfd_boolean
57e8b36a 7358elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 7359{
fc830a83
NC		 7360 FILE * file = (FILE *) ptr;
7361 unsigned long flags;
252b5132
RH		 7362
7363 BFD_ASSERT (abfd != NULL && ptr != NULL);
7364
7365 /* Print normal ELF private data. */
7366 _bfd_elf_print_private_bfd_data (abfd, ptr);
7367
fc830a83 7368 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 7369 /* Ignore init flag - it may not be set, despite the flags field
7370 containing valid data. */
252b5132
RH		 7371
7372 /* xgettext:c-format */
9b485d32 7373 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 7374
fc830a83
NC		 7375 switch (EF_ARM_EABI_VERSION (flags))
7376 {
7377 case EF_ARM_EABI_UNKNOWN:
4cc11e76 7378 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 7379 official ARM ELF extended ABI. Hence they are only decoded if
7380 the EABI version is not set. */
fd2ec330 7381 if (flags & EF_ARM_INTERWORK)
9b485d32 7382 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 7383
fd2ec330 7384 if (flags & EF_ARM_APCS_26)
6c571f00 7385 fprintf (file, " [APCS-26]");
fc830a83 7386 else
6c571f00 7387 fprintf (file, " [APCS-32]");
9a5aca8c 7388
96a846ea
RE		 7389 if (flags & EF_ARM_VFP_FLOAT)
7390 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 7391 else if (flags & EF_ARM_MAVERICK_FLOAT)
7392 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 7393 else
7394 fprintf (file, _(" [FPA float format]"));
7395
fd2ec330 7396 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 7397 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 7398
fd2ec330 7399 if (flags & EF_ARM_PIC)
9b485d32 7400 fprintf (file, _(" [position independent]"));
fc830a83 7401
fd2ec330 7402 if (flags & EF_ARM_NEW_ABI)
9b485d32 7403 fprintf (file, _(" [new ABI]"));
9a5aca8c 7404
fd2ec330 7405 if (flags & EF_ARM_OLD_ABI)
9b485d32 7406 fprintf (file, _(" [old ABI]"));
9a5aca8c 7407
fd2ec330 7408 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 7409 fprintf (file, _(" [software FP]"));
9a5aca8c 7410
96a846ea
RE		 7411 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
7412 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 7413 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
7414 | EF_ARM_MAVERICK_FLOAT);
fc830a83 7415 break;
9a5aca8c 7416
fc830a83 7417 case EF_ARM_EABI_VER1:
9b485d32 7418 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 7419
fc830a83 7420 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 7421 fprintf (file, _(" [sorted symbol table]"));
fc830a83 7422 else
9b485d32 7423 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 7424
fc830a83
NC		 7425 flags &= ~ EF_ARM_SYMSARESORTED;
7426 break;
9a5aca8c 7427
fd2ec330
PB		 7428 case EF_ARM_EABI_VER2:
7429 fprintf (file, _(" [Version2 EABI]"));
7430
7431 if (flags & EF_ARM_SYMSARESORTED)
7432 fprintf (file, _(" [sorted symbol table]"));
7433 else
7434 fprintf (file, _(" [unsorted symbol table]"));
7435
7436 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
7437 fprintf (file, _(" [dynamic symbols use segment index]"));
7438
7439 if (flags & EF_ARM_MAPSYMSFIRST)
7440 fprintf (file, _(" [mapping symbols precede others]"));
7441
99e4ae17 7442 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 7443 | EF_ARM_MAPSYMSFIRST);
7444 break;
7445
d507cf36
PB		 7446 case EF_ARM_EABI_VER3:
7447 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 7448 break;
7449
7450 case EF_ARM_EABI_VER4:
7451 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 7452 goto eabi;
d507cf36 7453
3a4a14e9
PB		 7454 case EF_ARM_EABI_VER5:
7455 fprintf (file, _(" [Version5 EABI]"));
7456 eabi:
d507cf36
PB		 7457 if (flags & EF_ARM_BE8)
7458 fprintf (file, _(" [BE8]"));
7459
7460 if (flags & EF_ARM_LE8)
7461 fprintf (file, _(" [LE8]"));
7462
7463 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
7464 break;
7465
fc830a83 7466 default:
9b485d32 7467 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 7468 break;
7469 }
252b5132 7470
fc830a83 7471 flags &= ~ EF_ARM_EABIMASK;
252b5132 7472
fc830a83 7473 if (flags & EF_ARM_RELEXEC)
9b485d32 7474 fprintf (file, _(" [relocatable executable]"));
252b5132 7475
fc830a83 7476 if (flags & EF_ARM_HASENTRY)
9b485d32 7477 fprintf (file, _(" [has entry point]"));
252b5132 7478
fc830a83
NC		 7479 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
7480
7481 if (flags)
9b485d32 7482 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 7483
252b5132
RH		 7484 fputc ('\n', file);
7485
b34976b6 7486 return TRUE;
252b5132
RH		 7487}
7488
7489static int
57e8b36a 7490elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 7491{
2f0ca46a
NC		 7492 switch (ELF_ST_TYPE (elf_sym->st_info))
7493 {
7494 case STT_ARM_TFUNC:
7495 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 7496
2f0ca46a
NC		 7497 case STT_ARM_16BIT:
7498 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
7499 This allows us to distinguish between data used by Thumb instructions
7500 and non-data (which is probably code) inside Thumb regions of an
7501 executable. */
1a0eb693 7502 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 7503 return ELF_ST_TYPE (elf_sym->st_info);
7504 break;
9a5aca8c 7505
ce855c42
NC		 7506 default:
7507 break;
2f0ca46a
NC		 7508 }
7509
7510 return type;
252b5132 7511}
f21f3fe0 7512
252b5132 7513static asection *
07adf181
AM		 7514elf32_arm_gc_mark_hook (asection *sec,
7515 struct bfd_link_info *info,
7516 Elf_Internal_Rela *rel,
7517 struct elf_link_hash_entry *h,
7518 Elf_Internal_Sym *sym)
252b5132
RH		 7519{
7520 if (h != NULL)
07adf181 7521 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 7522 {
7523 case R_ARM_GNU_VTINHERIT:
7524 case R_ARM_GNU_VTENTRY:
07adf181
AM		 7525 return NULL;
7526 }
9ad5cbcf 7527
07adf181 7528 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 7529}
7530
780a67af
NC		 7531/* Update the got entry reference counts for the section being removed. */
7532
b34976b6 7533static bfd_boolean
ba93b8ac
DJ		 7534elf32_arm_gc_sweep_hook (bfd * abfd,
7535 struct bfd_link_info * info,
7536 asection * sec,
7537 const Elf_Internal_Rela * relocs)
252b5132 7538{
5e681ec4
PB		 7539 Elf_Internal_Shdr *symtab_hdr;
7540 struct elf_link_hash_entry **sym_hashes;
7541 bfd_signed_vma *local_got_refcounts;
7542 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 7543 struct elf32_arm_link_hash_table * globals;
7544
7dda2462
TG		 7545 if (info->relocatable)
7546 return TRUE;
7547
eb043451 7548 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 7549
7550 elf_section_data (sec)->local_dynrel = NULL;
7551
0ffa91dd 7552 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 7553 sym_hashes = elf_sym_hashes (abfd);
7554 local_got_refcounts = elf_local_got_refcounts (abfd);
7555
bd97cb95
DJ		 7556 check_use_blx(globals);
7557
5e681ec4
PB		 7558 relend = relocs + sec->reloc_count;
7559 for (rel = relocs; rel < relend; rel++)
eb043451 7560 {
3eb128b2
AM		 7561 unsigned long r_symndx;
7562 struct elf_link_hash_entry *h = NULL;
eb043451 7563 int r_type;
5e681ec4 7564
3eb128b2
AM		 7565 r_symndx = ELF32_R_SYM (rel->r_info);
7566 if (r_symndx >= symtab_hdr->sh_info)
7567 {
7568 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7569 while (h->root.type == bfd_link_hash_indirect
7570 || h->root.type == bfd_link_hash_warning)
7571 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7572 }
7573
eb043451 7574 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7575 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 7576 switch (r_type)
7577 {
7578 case R_ARM_GOT32:
eb043451 7579 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 7580 case R_ARM_TLS_GD32:
7581 case R_ARM_TLS_IE32:
3eb128b2 7582 if (h != NULL)
eb043451 7583 {
eb043451
PB		 7584 if (h->got.refcount > 0)
7585 h->got.refcount -= 1;
7586 }
7587 else if (local_got_refcounts != NULL)
7588 {
7589 if (local_got_refcounts[r_symndx] > 0)
7590 local_got_refcounts[r_symndx] -= 1;
7591 }
7592 break;
7593
ba93b8ac
DJ		 7594 case R_ARM_TLS_LDM32:
7595 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
7596 break;
7597
eb043451 7598 case R_ARM_ABS32:
bb224fc3 7599 case R_ARM_ABS32_NOI:
eb043451 7600 case R_ARM_REL32:
bb224fc3 7601 case R_ARM_REL32_NOI:
eb043451
PB		 7602 case R_ARM_PC24:
7603 case R_ARM_PLT32:
5b5bb741
PB		 7604 case R_ARM_CALL:
7605 case R_ARM_JUMP24:
eb043451 7606 case R_ARM_PREL31:
c19d1205 7607 case R_ARM_THM_CALL:
bd97cb95
DJ		 7608 case R_ARM_THM_JUMP24:
7609 case R_ARM_THM_JUMP19:
b6895b4f
PB		 7610 case R_ARM_MOVW_ABS_NC:
7611 case R_ARM_MOVT_ABS:
7612 case R_ARM_MOVW_PREL_NC:
7613 case R_ARM_MOVT_PREL:
7614 case R_ARM_THM_MOVW_ABS_NC:
7615 case R_ARM_THM_MOVT_ABS:
7616 case R_ARM_THM_MOVW_PREL_NC:
7617 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 7618 /* Should the interworking branches be here also? */
7619
3eb128b2 7620 if (h != NULL)
eb043451
PB		 7621 {
7622 struct elf32_arm_link_hash_entry *eh;
7623 struct elf32_arm_relocs_copied **pp;
7624 struct elf32_arm_relocs_copied *p;
5e681ec4 7625
b7693d02 7626 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 7627
eb043451 7628 if (h->plt.refcount > 0)
b7693d02
DJ		 7629 {
7630 h->plt.refcount -= 1;
bd97cb95
DJ		 7631 if (r_type == R_ARM_THM_CALL)
7632 eh->plt_maybe_thumb_refcount--;
7633
7634 if (r_type == R_ARM_THM_JUMP24
7635 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 7636 eh->plt_thumb_refcount--;
7637 }
5e681ec4 7638
eb043451 7639 if (r_type == R_ARM_ABS32
bb224fc3
MS		 7640 || r_type == R_ARM_REL32
7641 || r_type == R_ARM_ABS32_NOI
7642 || r_type == R_ARM_REL32_NOI)
eb043451 7643 {
eb043451
PB		 7644 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
7645 pp = &p->next)
7646 if (p->section == sec)
7647 {
7648 p->count -= 1;
bb224fc3
MS		 7649 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
7650 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 7651 p->pc_count -= 1;
eb043451
PB		 7652 if (p->count == 0)
7653 *pp = p->next;
7654 break;
7655 }
7656 }
7657 }
7658 break;
5e681ec4 7659
eb043451
PB		 7660 default:
7661 break;
7662 }
7663 }
5e681ec4 7664
b34976b6 7665 return TRUE;
252b5132
RH		 7666}
7667
780a67af
NC		 7668/* Look through the relocs for a section during the first phase. */
7669
b34976b6 7670static bfd_boolean
57e8b36a
NC		 7671elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
7672 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 7673{
b34976b6
AM		 7674 Elf_Internal_Shdr *symtab_hdr;
7675 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 7676 const Elf_Internal_Rela *rel;
7677 const Elf_Internal_Rela *rel_end;
7678 bfd *dynobj;
5e681ec4 7679 asection *sreloc;
b34976b6 7680 bfd_vma *local_got_offsets;
5e681ec4 7681 struct elf32_arm_link_hash_table *htab;
39623e12 7682 bfd_boolean needs_plt;
9a5aca8c 7683
1049f94e 7684 if (info->relocatable)
b34976b6 7685 return TRUE;
9a5aca8c 7686
0ffa91dd
NC		 7687 BFD_ASSERT (is_arm_elf (abfd));
7688
5e681ec4
PB		 7689 htab = elf32_arm_hash_table (info);
7690 sreloc = NULL;
9a5aca8c 7691
67687978
PB		 7692 /* Create dynamic sections for relocatable executables so that we can
7693 copy relocations. */
7694 if (htab->root.is_relocatable_executable
7695 && ! htab->root.dynamic_sections_created)
7696 {
7697 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
7698 return FALSE;
7699 }
7700
252b5132
RH		 7701 dynobj = elf_hash_table (info)->dynobj;
7702 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 7703
0ffa91dd 7704 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 7705 sym_hashes = elf_sym_hashes (abfd);
9b485d32 7706
252b5132
RH		 7707 rel_end = relocs + sec->reloc_count;
7708 for (rel = relocs; rel < rel_end; rel++)
7709 {
7710 struct elf_link_hash_entry *h;
b7693d02 7711 struct elf32_arm_link_hash_entry *eh;
252b5132 7712 unsigned long r_symndx;
eb043451 7713 int r_type;
9a5aca8c 7714
252b5132 7715 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 7716 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7717 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac
DJ		 7718
7719 if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
7720 {
7721 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
7722 r_symndx);
7723 return FALSE;
7724 }
7725
252b5132
RH		 7726 if (r_symndx < symtab_hdr->sh_info)
7727 h = NULL;
7728 else
973a3492
L		 7729 {
7730 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7731 while (h->root.type == bfd_link_hash_indirect
7732 || h->root.type == bfd_link_hash_warning)
7733 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7734 }
9a5aca8c 7735
b7693d02
DJ		 7736 eh = (struct elf32_arm_link_hash_entry *) h;
7737
eb043451 7738 switch (r_type)
252b5132 7739 {
5e681ec4 7740 case R_ARM_GOT32:
eb043451 7741 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 7742 case R_ARM_TLS_GD32:
7743 case R_ARM_TLS_IE32:
5e681ec4 7744 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 7745 {
7746 int tls_type, old_tls_type;
5e681ec4 7747
ba93b8ac
DJ		 7748 switch (r_type)
7749 {
7750 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
7751 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
7752 default: tls_type = GOT_NORMAL; break;
7753 }
252b5132 7754
ba93b8ac
DJ		 7755 if (h != NULL)
7756 {
7757 h->got.refcount++;
7758 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
7759 }
7760 else
7761 {
7762 bfd_signed_vma *local_got_refcounts;
7763
7764 /* This is a global offset table entry for a local symbol. */
7765 local_got_refcounts = elf_local_got_refcounts (abfd);
7766 if (local_got_refcounts == NULL)
7767 {
7768 bfd_size_type size;
7769
7770 size = symtab_hdr->sh_info;
7771 size *= (sizeof (bfd_signed_vma) + sizeof(char));
7772 local_got_refcounts = bfd_zalloc (abfd, size);
7773 if (local_got_refcounts == NULL)
7774 return FALSE;
7775 elf_local_got_refcounts (abfd) = local_got_refcounts;
7776 elf32_arm_local_got_tls_type (abfd)
7777 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
7778 }
7779 local_got_refcounts[r_symndx] += 1;
7780 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
7781 }
7782
7783 /* We will already have issued an error message if there is a
7784 TLS / non-TLS mismatch, based on the symbol type. We don't
7785 support any linker relaxations. So just combine any TLS
7786 types needed. */
7787 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
7788 && tls_type != GOT_NORMAL)
7789 tls_type |= old_tls_type;
7790
7791 if (old_tls_type != tls_type)
7792 {
7793 if (h != NULL)
7794 elf32_arm_hash_entry (h)->tls_type = tls_type;
7795 else
7796 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
7797 }
7798 }
7799 /* Fall through */
7800
7801 case R_ARM_TLS_LDM32:
7802 if (r_type == R_ARM_TLS_LDM32)
7803 htab->tls_ldm_got.refcount++;
7804 /* Fall through */
252b5132 7805
c19d1205 7806 case R_ARM_GOTOFF32:
5e681ec4
PB		 7807 case R_ARM_GOTPC:
7808 if (htab->sgot == NULL)
7809 {
7810 if (htab->root.dynobj == NULL)
7811 htab->root.dynobj = abfd;
7812 if (!create_got_section (htab->root.dynobj, info))
7813 return FALSE;
7814 }
252b5132
RH		 7815 break;
7816
00a97672
RS		 7817 case R_ARM_ABS12:
7818 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
7819 ldr __GOTT_INDEX__ offsets. */
7820 if (!htab->vxworks_p)
7821 break;
7822 /* Fall through */
7823
252b5132 7824 case R_ARM_PC24:
7359ea65 7825 case R_ARM_PLT32:
5b5bb741
PB		 7826 case R_ARM_CALL:
7827 case R_ARM_JUMP24:
eb043451 7828 case R_ARM_PREL31:
c19d1205 7829 case R_ARM_THM_CALL:
bd97cb95
DJ		 7830 case R_ARM_THM_JUMP24:
7831 case R_ARM_THM_JUMP19:
39623e12
PB		 7832 needs_plt = 1;
7833 goto normal_reloc;
7834
7835 case R_ARM_ABS32:
7836 case R_ARM_ABS32_NOI:
7837 case R_ARM_REL32:
7838 case R_ARM_REL32_NOI:
b6895b4f
PB		 7839 case R_ARM_MOVW_ABS_NC:
7840 case R_ARM_MOVT_ABS:
7841 case R_ARM_MOVW_PREL_NC:
7842 case R_ARM_MOVT_PREL:
7843 case R_ARM_THM_MOVW_ABS_NC:
7844 case R_ARM_THM_MOVT_ABS:
7845 case R_ARM_THM_MOVW_PREL_NC:
7846 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 7847 needs_plt = 0;
7848 normal_reloc:
7849
b7693d02 7850 /* Should the interworking branches be listed here? */
7359ea65 7851 if (h != NULL)
5e681ec4
PB		 7852 {
7853 /* If this reloc is in a read-only section, we might
7854 need a copy reloc. We can't check reliably at this
7855 stage whether the section is read-only, as input
7856 sections have not yet been mapped to output sections.
7857 Tentatively set the flag for now, and correct in
7858 adjust_dynamic_symbol. */
7359ea65 7859 if (!info->shared)
f5385ebf 7860 h->non_got_ref = 1;
7359ea65 7861
5e681ec4 7862 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 7863 refers to is in a different object. We can't tell for
7864 sure yet, because something later might force the
7865 symbol local. */
39623e12 7866 if (needs_plt)
f5385ebf 7867 h->needs_plt = 1;
4f199be3
DJ		 7868
7869 /* If we create a PLT entry, this relocation will reference
7870 it, even if it's an ABS32 relocation. */
7871 h->plt.refcount += 1;
b7693d02 7872
bd97cb95
DJ		 7873 /* It's too early to use htab->use_blx here, so we have to
7874 record possible blx references separately from
7875 relocs that definitely need a thumb stub. */
7876
c19d1205 7877 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 7878 eh->plt_maybe_thumb_refcount += 1;
7879
7880 if (r_type == R_ARM_THM_JUMP24
7881 || r_type == R_ARM_THM_JUMP19)
b7693d02 7882 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 7883 }
7884
67687978
PB		 7885 /* If we are creating a shared library or relocatable executable,
7886 and this is a reloc against a global symbol, or a non PC
7887 relative reloc against a local symbol, then we need to copy
7888 the reloc into the shared library. However, if we are linking
7889 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 7890 global symbol which is defined in an object we are
7891 including in the link (i.e., DEF_REGULAR is set). At
7892 this point we have not seen all the input files, so it is
7893 possible that DEF_REGULAR is not set now but will be set
7894 later (it is never cleared). We account for that
7895 possibility below by storing information in the
5e681ec4 7896 relocs_copied field of the hash table entry. */
67687978 7897 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 7898 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 7899 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 7900 || (h != NULL && ! h->needs_plt
7901 && (! info->symbolic || ! h->def_regular))))
252b5132 7902 {
5e681ec4
PB		 7903 struct elf32_arm_relocs_copied *p, **head;
7904
252b5132
RH		 7905 /* When creating a shared object, we must copy these
7906 reloc types into the output file. We create a reloc
7907 section in dynobj and make room for this reloc. */
7908 if (sreloc == NULL)
7909 {
7910 const char * name;
7911
7912 name = (bfd_elf_string_from_elf_section
7913 (abfd,
7914 elf_elfheader (abfd)->e_shstrndx,
7915 elf_section_data (sec)->rel_hdr.sh_name));
7916 if (name == NULL)
b34976b6 7917 return FALSE;
252b5132 7918
00a97672 7919 BFD_ASSERT (reloc_section_p (htab, name, sec));
252b5132
RH		 7920
7921 sreloc = bfd_get_section_by_name (dynobj, name);
7922 if (sreloc == NULL)
7923 {
7924 flagword flags;
7925
252b5132
RH		 7926 flags = (SEC_HAS_CONTENTS | SEC_READONLY
7927 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
e5a52504
MM		 7928 if ((sec->flags & SEC_ALLOC) != 0
7929 /* BPABI objects never have dynamic
7930 relocations mapped. */
7931 && !htab->symbian_p)
252b5132 7932 flags |= SEC_ALLOC | SEC_LOAD;
3496cb2a
L		 7933 sreloc = bfd_make_section_with_flags (dynobj,
7934 name,
7935 flags);
252b5132 7936 if (sreloc == NULL
252b5132 7937 || ! bfd_set_section_alignment (dynobj, sreloc, 2))
b34976b6 7938 return FALSE;
252b5132 7939 }
5e681ec4
PB		 7940
7941 elf_section_data (sec)->sreloc = sreloc;
252b5132
RH		 7942 }
7943
5e681ec4
PB		 7944 /* If this is a global symbol, we count the number of
7945 relocations we need for this symbol. */
7946 if (h != NULL)
252b5132 7947 {
5e681ec4
PB		 7948 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
7949 }
7950 else
7951 {
7952 /* Track dynamic relocs needed for local syms too.
7953 We really need local syms available to do this
7954 easily. Oh well. */
57e8b36a 7955
5e681ec4 7956 asection *s;
6edfbbad
DJ		 7957 void *vpp;
7958
5e681ec4
PB		 7959 s = bfd_section_from_r_symndx (abfd, &htab->sym_sec,
7960 sec, r_symndx);
7961 if (s == NULL)
7962 return FALSE;
57e8b36a 7963
6edfbbad
DJ		 7964 vpp = &elf_section_data (s)->local_dynrel;
7965 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 7966 }
57e8b36a 7967
5e681ec4
PB		 7968 p = *head;
7969 if (p == NULL || p->section != sec)
7970 {
7971 bfd_size_type amt = sizeof *p;
57e8b36a 7972
5e681ec4 7973 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 7974 if (p == NULL)
5e681ec4
PB		 7975 return FALSE;
7976 p->next = *head;
7977 *head = p;
7978 p->section = sec;
7979 p->count = 0;
ba93b8ac 7980 p->pc_count = 0;
252b5132 7981 }
57e8b36a 7982
bb224fc3 7983 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 7984 p->pc_count += 1;
71a976dd 7985 p->count += 1;
252b5132
RH		 7986 }
7987 break;
7988
7989 /* This relocation describes the C++ object vtable hierarchy.
7990 Reconstruct it for later use during GC. */
7991 case R_ARM_GNU_VTINHERIT:
c152c796 7992 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 7993 return FALSE;
252b5132 7994 break;
9a5aca8c 7995
252b5132
RH		 7996 /* This relocation describes which C++ vtable entries are actually
7997 used. Record for later use during GC. */
7998 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 7999 BFD_ASSERT (h != NULL);
8000 if (h != NULL
8001 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 8002 return FALSE;
252b5132
RH		 8003 break;
8004 }
8005 }
f21f3fe0 8006
b34976b6 8007 return TRUE;
252b5132
RH		 8008}
8009
6a5bb875
PB		 8010/* Unwinding tables are not referenced directly. This pass marks them as
8011 required if the corresponding code section is marked. */
8012
8013static bfd_boolean
8014elf32_arm_gc_mark_extra_sections(struct bfd_link_info *info,
8015 elf_gc_mark_hook_fn gc_mark_hook)
8016{
8017 bfd *sub;
8018 Elf_Internal_Shdr **elf_shdrp;
8019 bfd_boolean again;
8020
8021 /* Marking EH data may cause additional code sections to be marked,
8022 requiring multiple passes. */
8023 again = TRUE;
8024 while (again)
8025 {
8026 again = FALSE;
8027 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
8028 {
8029 asection *o;
8030
0ffa91dd 8031 if (! is_arm_elf (sub))
6a5bb875
PB		 8032 continue;
8033
8034 elf_shdrp = elf_elfsections (sub);
8035 for (o = sub->sections; o != NULL; o = o->next)
8036 {
8037 Elf_Internal_Shdr *hdr;
0ffa91dd 8038
6a5bb875
PB		 8039 hdr = &elf_section_data (o)->this_hdr;
8040 if (hdr->sh_type == SHT_ARM_EXIDX && hdr->sh_link
8041 && !o->gc_mark
8042 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
8043 {
8044 again = TRUE;
8045 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
8046 return FALSE;
8047 }
8048 }
8049 }
8050 }
8051
8052 return TRUE;
8053}
8054
3c9458e9
NC		 8055/* Treat mapping symbols as special target symbols. */
8056
8057static bfd_boolean
8058elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
8059{
b0796911
PB		 8060 return bfd_is_arm_special_symbol_name (sym->name,
8061 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 8062}
8063
0367ecfb
NC		 8064/* This is a copy of elf_find_function() from elf.c except that
8065 ARM mapping symbols are ignored when looking for function names
8066 and STT_ARM_TFUNC is considered to a function type. */
252b5132 8067
0367ecfb
NC		 8068static bfd_boolean
8069arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
8070 asection * section,
8071 asymbol ** symbols,
8072 bfd_vma offset,
8073 const char ** filename_ptr,
8074 const char ** functionname_ptr)
8075{
8076 const char * filename = NULL;
8077 asymbol * func = NULL;
8078 bfd_vma low_func = 0;
8079 asymbol ** p;
252b5132
RH		 8080
8081 for (p = symbols; *p != NULL; p++)
8082 {
8083 elf_symbol_type *q;
8084
8085 q = (elf_symbol_type *) *p;
8086
252b5132
RH		 8087 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
8088 {
8089 default:
8090 break;
8091 case STT_FILE:
8092 filename = bfd_asymbol_name (&q->symbol);
8093 break;
252b5132
RH		 8094 case STT_FUNC:
8095 case STT_ARM_TFUNC:
9d2da7ca 8096 case STT_NOTYPE:
b0796911 8097 /* Skip mapping symbols. */
0367ecfb 8098 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 8099 && bfd_is_arm_special_symbol_name (q->symbol.name,
8100 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 8101 continue;
8102 /* Fall through. */
6b40fcba 8103 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 8104 && q->symbol.value >= low_func
8105 && q->symbol.value <= offset)
8106 {
8107 func = (asymbol *) q;
8108 low_func = q->symbol.value;
8109 }
8110 break;
8111 }
8112 }
8113
8114 if (func == NULL)
b34976b6 8115 return FALSE;
252b5132 8116
0367ecfb
NC		 8117 if (filename_ptr)
8118 *filename_ptr = filename;
8119 if (functionname_ptr)
8120 *functionname_ptr = bfd_asymbol_name (func);
8121
8122 return TRUE;
8123}
8124
8125
8126/* Find the nearest line to a particular section and offset, for error
8127 reporting. This code is a duplicate of the code in elf.c, except
8128 that it uses arm_elf_find_function. */
8129
8130static bfd_boolean
8131elf32_arm_find_nearest_line (bfd * abfd,
8132 asection * section,
8133 asymbol ** symbols,
8134 bfd_vma offset,
8135 const char ** filename_ptr,
8136 const char ** functionname_ptr,
8137 unsigned int * line_ptr)
8138{
8139 bfd_boolean found = FALSE;
8140
8141 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
8142
8143 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
8144 filename_ptr, functionname_ptr,
8145 line_ptr, 0,
8146 & elf_tdata (abfd)->dwarf2_find_line_info))
8147 {
8148 if (!*functionname_ptr)
8149 arm_elf_find_function (abfd, section, symbols, offset,
8150 *filename_ptr ? NULL : filename_ptr,
8151 functionname_ptr);
f21f3fe0 8152
0367ecfb
NC		 8153 return TRUE;
8154 }
8155
8156 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
8157 & found, filename_ptr,
8158 functionname_ptr, line_ptr,
8159 & elf_tdata (abfd)->line_info))
8160 return FALSE;
8161
8162 if (found && (*functionname_ptr || *line_ptr))
8163 return TRUE;
8164
8165 if (symbols == NULL)
8166 return FALSE;
8167
8168 if (! arm_elf_find_function (abfd, section, symbols, offset,
8169 filename_ptr, functionname_ptr))
8170 return FALSE;
8171
8172 *line_ptr = 0;
b34976b6 8173 return TRUE;
252b5132
RH		 8174}
8175
4ab527b0
FF		 8176static bfd_boolean
8177elf32_arm_find_inliner_info (bfd * abfd,
8178 const char ** filename_ptr,
8179 const char ** functionname_ptr,
8180 unsigned int * line_ptr)
8181{
8182 bfd_boolean found;
8183 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
8184 functionname_ptr, line_ptr,
8185 & elf_tdata (abfd)->dwarf2_find_line_info);
8186 return found;
8187}
8188
252b5132
RH		 8189/* Adjust a symbol defined by a dynamic object and referenced by a
8190 regular object. The current definition is in some section of the
8191 dynamic object, but we're not including those sections. We have to
8192 change the definition to something the rest of the link can
8193 understand. */
8194
b34976b6 8195static bfd_boolean
57e8b36a
NC		 8196elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
8197 struct elf_link_hash_entry * h)
252b5132
RH		 8198{
8199 bfd * dynobj;
8200 asection * s;
b7693d02 8201 struct elf32_arm_link_hash_entry * eh;
67687978 8202 struct elf32_arm_link_hash_table *globals;
252b5132 8203
67687978 8204 globals = elf32_arm_hash_table (info);
252b5132
RH		 8205 dynobj = elf_hash_table (info)->dynobj;
8206
8207 /* Make sure we know what is going on here. */
8208 BFD_ASSERT (dynobj != NULL
f5385ebf 8209 && (h->needs_plt
f6e332e6 8210 || h->u.weakdef != NULL
f5385ebf
AM		 8211 || (h->def_dynamic
8212 && h->ref_regular
8213 && !h->def_regular)));
252b5132 8214
b7693d02
DJ		 8215 eh = (struct elf32_arm_link_hash_entry *) h;
8216
252b5132
RH		 8217 /* If this is a function, put it in the procedure linkage table. We
8218 will fill in the contents of the procedure linkage table later,
8219 when we know the address of the .got section. */
b7693d02 8220 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 8221 || h->needs_plt)
252b5132 8222 {
5e681ec4
PB		 8223 if (h->plt.refcount <= 0
8224 || SYMBOL_CALLS_LOCAL (info, h)
8225 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
8226 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 8227 {
8228 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 8229 file, but the symbol was never referred to by a dynamic
8230 object, or if all references were garbage collected. In
8231 such a case, we don't actually need to build a procedure
8232 linkage table, and we can just do a PC24 reloc instead. */
8233 h->plt.offset = (bfd_vma) -1;
b7693d02 8234 eh->plt_thumb_refcount = 0;
bd97cb95 8235 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 8236 h->needs_plt = 0;
252b5132
RH		 8237 }
8238
b34976b6 8239 return TRUE;
252b5132 8240 }
5e681ec4 8241 else
b7693d02
DJ		 8242 {
8243 /* It's possible that we incorrectly decided a .plt reloc was
8244 needed for an R_ARM_PC24 or similar reloc to a non-function sym
8245 in check_relocs. We can't decide accurately between function
8246 and non-function syms in check-relocs; Objects loaded later in
8247 the link may change h->type. So fix it now. */
8248 h->plt.offset = (bfd_vma) -1;
8249 eh->plt_thumb_refcount = 0;
bd97cb95 8250 eh->plt_maybe_thumb_refcount = 0;
b7693d02 8251 }
252b5132
RH		 8252
8253 /* If this is a weak symbol, and there is a real definition, the
8254 processor independent code will have arranged for us to see the
8255 real definition first, and we can just use the same value. */
f6e332e6 8256 if (h->u.weakdef != NULL)
252b5132 8257 {
f6e332e6
AM		 8258 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
8259 || h->u.weakdef->root.type == bfd_link_hash_defweak);
8260 h->root.u.def.section = h->u.weakdef->root.u.def.section;
8261 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 8262 return TRUE;
252b5132
RH		 8263 }
8264
ba93b8ac
DJ		 8265 /* If there are no non-GOT references, we do not need a copy
8266 relocation. */
8267 if (!h->non_got_ref)
8268 return TRUE;
8269
252b5132
RH		 8270 /* This is a reference to a symbol defined by a dynamic object which
8271 is not a function. */
8272
8273 /* If we are creating a shared library, we must presume that the
8274 only references to the symbol are via the global offset table.
8275 For such cases we need not do anything here; the relocations will
67687978
PB		 8276 be handled correctly by relocate_section. Relocatable executables
8277 can reference data in shared objects directly, so we don't need to
8278 do anything here. */
8279 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 8280 return TRUE;
252b5132 8281
909272ee
AM		 8282 if (h->size == 0)
8283 {
8284 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
8285 h->root.root.string);
8286 return TRUE;
8287 }
8288
252b5132
RH		 8289 /* We must allocate the symbol in our .dynbss section, which will
8290 become part of the .bss section of the executable. There will be
8291 an entry for this symbol in the .dynsym section. The dynamic
8292 object will contain position independent code, so all references
8293 from the dynamic object to this symbol will go through the global
8294 offset table. The dynamic linker will use the .dynsym entry to
8295 determine the address it must put in the global offset table, so
8296 both the dynamic object and the regular object will refer to the
8297 same memory location for the variable. */
252b5132
RH		 8298 s = bfd_get_section_by_name (dynobj, ".dynbss");
8299 BFD_ASSERT (s != NULL);
8300
8301 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
8302 copy the initial value out of the dynamic object and into the
8303 runtime process image. We need to remember the offset into the
00a97672 8304 .rel(a).bss section we are going to use. */
252b5132
RH		 8305 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
8306 {
8307 asection *srel;
8308
00a97672 8309 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 8310 BFD_ASSERT (srel != NULL);
00a97672 8311 srel->size += RELOC_SIZE (globals);
f5385ebf 8312 h->needs_copy = 1;
252b5132
RH		 8313 }
8314
027297b7 8315 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 8316}
8317
5e681ec4
PB		 8318/* Allocate space in .plt, .got and associated reloc sections for
8319 dynamic relocs. */
8320
8321static bfd_boolean
57e8b36a 8322allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 8323{
8324 struct bfd_link_info *info;
8325 struct elf32_arm_link_hash_table *htab;
8326 struct elf32_arm_link_hash_entry *eh;
8327 struct elf32_arm_relocs_copied *p;
bd97cb95 8328 bfd_signed_vma thumb_refs;
5e681ec4 8329
b7693d02
DJ		 8330 eh = (struct elf32_arm_link_hash_entry *) h;
8331
5e681ec4
PB		 8332 if (h->root.type == bfd_link_hash_indirect)
8333 return TRUE;
8334
8335 if (h->root.type == bfd_link_hash_warning)
8336 /* When warning symbols are created, they **replace** the "real"
8337 entry in the hash table, thus we never get to see the real
8338 symbol in a hash traversal. So look at it now. */
8339 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8340
8341 info = (struct bfd_link_info *) inf;
8342 htab = elf32_arm_hash_table (info);
8343
8344 if (htab->root.dynamic_sections_created
8345 && h->plt.refcount > 0)
8346 {
8347 /* Make sure this symbol is output as a dynamic symbol.
8348 Undefined weak syms won't yet be marked as dynamic. */
8349 if (h->dynindx == -1
f5385ebf 8350 && !h->forced_local)
5e681ec4 8351 {
c152c796 8352 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8353 return FALSE;
8354 }
8355
8356 if (info->shared
7359ea65 8357 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 8358 {
8359 asection *s = htab->splt;
8360
8361 /* If this is the first .plt entry, make room for the special
8362 first entry. */
eea6121a 8363 if (s->size == 0)
e5a52504 8364 s->size += htab->plt_header_size;
5e681ec4 8365
eea6121a 8366 h->plt.offset = s->size;
5e681ec4 8367
b7693d02
DJ		 8368 /* If we will insert a Thumb trampoline before this PLT, leave room
8369 for it. */
bd97cb95
DJ		 8370 thumb_refs = eh->plt_thumb_refcount;
8371 if (!htab->use_blx)
8372 thumb_refs += eh->plt_maybe_thumb_refcount;
8373
8374 if (thumb_refs > 0)
b7693d02
DJ		 8375 {
8376 h->plt.offset += PLT_THUMB_STUB_SIZE;
8377 s->size += PLT_THUMB_STUB_SIZE;
8378 }
8379
5e681ec4
PB		 8380 /* If this symbol is not defined in a regular file, and we are
8381 not generating a shared library, then set the symbol to this
8382 location in the .plt. This is required to make function
8383 pointers compare as equal between the normal executable and
8384 the shared library. */
8385 if (! info->shared
f5385ebf 8386 && !h->def_regular)
5e681ec4
PB		 8387 {
8388 h->root.u.def.section = s;
8389 h->root.u.def.value = h->plt.offset;
b7693d02
DJ		 8390
8391 /* Make sure the function is not marked as Thumb, in case
8392 it is the target of an ABS32 relocation, which will
8393 point to the PLT entry. */
8394 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
8395 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
5e681ec4
PB		 8396 }
8397
8398 /* Make room for this entry. */
e5a52504 8399 s->size += htab->plt_entry_size;
5e681ec4 8400
e5a52504 8401 if (!htab->symbian_p)
b7693d02
DJ		 8402 {
8403 /* We also need to make an entry in the .got.plt section, which
8404 will be placed in the .got section by the linker script. */
8405 eh->plt_got_offset = htab->sgotplt->size;
8406 htab->sgotplt->size += 4;
8407 }
5e681ec4 8408
00a97672
RS		 8409 /* We also need to make an entry in the .rel(a).plt section. */
8410 htab->srelplt->size += RELOC_SIZE (htab);
8411
8412 /* VxWorks executables have a second set of relocations for
8413 each PLT entry. They go in a separate relocation section,
8414 which is processed by the kernel loader. */
8415 if (htab->vxworks_p && !info->shared)
8416 {
8417 /* There is a relocation for the initial PLT entry:
8418 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
8419 if (h->plt.offset == htab->plt_header_size)
8420 htab->srelplt2->size += RELOC_SIZE (htab);
8421
8422 /* There are two extra relocations for each subsequent
8423 PLT entry: an R_ARM_32 relocation for the GOT entry,
8424 and an R_ARM_32 relocation for the PLT entry. */
8425 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
8426 }
5e681ec4
PB		 8427 }
8428 else
8429 {
8430 h->plt.offset = (bfd_vma) -1;
f5385ebf 8431 h->needs_plt = 0;
5e681ec4
PB		 8432 }
8433 }
8434 else
8435 {
8436 h->plt.offset = (bfd_vma) -1;
f5385ebf 8437 h->needs_plt = 0;
5e681ec4
PB		 8438 }
8439
8440 if (h->got.refcount > 0)
8441 {
8442 asection *s;
8443 bfd_boolean dyn;
ba93b8ac
DJ		 8444 int tls_type = elf32_arm_hash_entry (h)->tls_type;
8445 int indx;
5e681ec4
PB		 8446
8447 /* Make sure this symbol is output as a dynamic symbol.
8448 Undefined weak syms won't yet be marked as dynamic. */
8449 if (h->dynindx == -1
f5385ebf 8450 && !h->forced_local)
5e681ec4 8451 {
c152c796 8452 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8453 return FALSE;
8454 }
8455
e5a52504
MM		 8456 if (!htab->symbian_p)
8457 {
8458 s = htab->sgot;
8459 h->got.offset = s->size;
ba93b8ac
DJ		 8460
8461 if (tls_type == GOT_UNKNOWN)
8462 abort ();
8463
8464 if (tls_type == GOT_NORMAL)
8465 /* Non-TLS symbols need one GOT slot. */
8466 s->size += 4;
8467 else
8468 {
8469 if (tls_type & GOT_TLS_GD)
8470 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
8471 s->size += 8;
8472 if (tls_type & GOT_TLS_IE)
8473 /* R_ARM_TLS_IE32 needs one GOT slot. */
8474 s->size += 4;
8475 }
8476
e5a52504 8477 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 8478
8479 indx = 0;
8480 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8481 && (!info->shared
8482 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8483 indx = h->dynindx;
8484
8485 if (tls_type != GOT_NORMAL
8486 && (info->shared || indx != 0)
8487 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8488 || h->root.type != bfd_link_hash_undefweak))
8489 {
8490 if (tls_type & GOT_TLS_IE)
00a97672 8491 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8492
8493 if (tls_type & GOT_TLS_GD)
00a97672 8494 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8495
8496 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 8497 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8498 }
8499 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8500 || h->root.type != bfd_link_hash_undefweak)
8501 && (info->shared
8502 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 8503 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 8504 }
5e681ec4
PB		 8505 }
8506 else
8507 h->got.offset = (bfd_vma) -1;
8508
a4fd1a8e
PB		 8509 /* Allocate stubs for exported Thumb functions on v4t. */
8510 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 8511 && h->def_regular
a4fd1a8e
PB		 8512 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
8513 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
8514 {
8515 struct elf_link_hash_entry * th;
8516 struct bfd_link_hash_entry * bh;
8517 struct elf_link_hash_entry * myh;
8518 char name[1024];
8519 asection *s;
8520 bh = NULL;
8521 /* Create a new symbol to regist the real location of the function. */
8522 s = h->root.u.def.section;
8523 sprintf(name, "__real_%s", h->root.root.string);
8524 _bfd_generic_link_add_one_symbol (info, s->owner,
8525 name, BSF_GLOBAL, s,
8526 h->root.u.def.value,
8527 NULL, TRUE, FALSE, &bh);
8528
8529 myh = (struct elf_link_hash_entry *) bh;
8530 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
8531 myh->forced_local = 1;
8532 eh->export_glue = myh;
8533 th = record_arm_to_thumb_glue (info, h);
8534 /* Point the symbol at the stub. */
8535 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
8536 h->root.u.def.section = th->root.u.def.section;
8537 h->root.u.def.value = th->root.u.def.value & ~1;
8538 }
8539
5e681ec4
PB		 8540 if (eh->relocs_copied == NULL)
8541 return TRUE;
8542
8543 /* In the shared -Bsymbolic case, discard space allocated for
8544 dynamic pc-relative relocs against symbols which turn out to be
8545 defined in regular objects. For the normal shared case, discard
8546 space for pc-relative relocs that have become local due to symbol
8547 visibility changes. */
8548
67687978 8549 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 8550 {
7bdca076 8551 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 8552 R_ARM_REL32_NOI, which will appear on something like
8553 ".long foo - .". We want calls to protected symbols to resolve
8554 directly to the function rather than going via the plt. If people
8555 want function pointer comparisons to work as expected then they
8556 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 8557 if (SYMBOL_CALLS_LOCAL (info, h))
8558 {
8559 struct elf32_arm_relocs_copied **pp;
8560
8561 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
8562 {
8563 p->count -= p->pc_count;
8564 p->pc_count = 0;
8565 if (p->count == 0)
8566 *pp = p->next;
8567 else
8568 pp = &p->next;
8569 }
8570 }
8571
8572 /* Also discard relocs on undefined weak syms with non-default
7359ea65 8573 visibility. */
22d606e9 8574 if (eh->relocs_copied != NULL
5e681ec4 8575 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 8576 {
8577 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
8578 eh->relocs_copied = NULL;
8579
8580 /* Make sure undefined weak symbols are output as a dynamic
8581 symbol in PIEs. */
8582 else if (h->dynindx == -1
8583 && !h->forced_local)
8584 {
8585 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8586 return FALSE;
8587 }
8588 }
8589
67687978
PB		 8590 else if (htab->root.is_relocatable_executable && h->dynindx == -1
8591 && h->root.type == bfd_link_hash_new)
8592 {
8593 /* Output absolute symbols so that we can create relocations
8594 against them. For normal symbols we output a relocation
8595 against the section that contains them. */
8596 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8597 return FALSE;
8598 }
8599
5e681ec4
PB		 8600 }
8601 else
8602 {
8603 /* For the non-shared case, discard space for relocs against
8604 symbols which turn out to need copy relocs or are not
8605 dynamic. */
8606
f5385ebf
AM		 8607 if (!h->non_got_ref
8608 && ((h->def_dynamic
8609 && !h->def_regular)
5e681ec4
PB		 8610 || (htab->root.dynamic_sections_created
8611 && (h->root.type == bfd_link_hash_undefweak
8612 || h->root.type == bfd_link_hash_undefined))))
8613 {
8614 /* Make sure this symbol is output as a dynamic symbol.
8615 Undefined weak syms won't yet be marked as dynamic. */
8616 if (h->dynindx == -1
f5385ebf 8617 && !h->forced_local)
5e681ec4 8618 {
c152c796 8619 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8620 return FALSE;
8621 }
8622
8623 /* If that succeeded, we know we'll be keeping all the
8624 relocs. */
8625 if (h->dynindx != -1)
8626 goto keep;
8627 }
8628
8629 eh->relocs_copied = NULL;
8630
8631 keep: ;
8632 }
8633
8634 /* Finally, allocate space. */
8635 for (p = eh->relocs_copied; p != NULL; p = p->next)
8636 {
8637 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 8638 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 8639 }
8640
8641 return TRUE;
8642}
8643
08d1f311
DJ		 8644/* Find any dynamic relocs that apply to read-only sections. */
8645
8646static bfd_boolean
8647elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry *h, PTR inf)
8648{
8649 struct elf32_arm_link_hash_entry *eh;
8650 struct elf32_arm_relocs_copied *p;
8651
8652 if (h->root.type == bfd_link_hash_warning)
8653 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8654
8655 eh = (struct elf32_arm_link_hash_entry *) h;
8656 for (p = eh->relocs_copied; p != NULL; p = p->next)
8657 {
8658 asection *s = p->section;
8659
8660 if (s != NULL && (s->flags & SEC_READONLY) != 0)
8661 {
8662 struct bfd_link_info *info = (struct bfd_link_info *) inf;
8663
8664 info->flags |= DF_TEXTREL;
8665
8666 /* Not an error, just cut short the traversal. */
8667 return FALSE;
8668 }
8669 }
8670 return TRUE;
8671}
8672
d504ffc8
DJ		 8673void
8674bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
8675 int byteswap_code)
8676{
8677 struct elf32_arm_link_hash_table *globals;
8678
8679 globals = elf32_arm_hash_table (info);
8680 globals->byteswap_code = byteswap_code;
8681}
8682
252b5132
RH		 8683/* Set the sizes of the dynamic sections. */
8684
b34976b6 8685static bfd_boolean
57e8b36a
NC		 8686elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
8687 struct bfd_link_info * info)
252b5132
RH		 8688{
8689 bfd * dynobj;
8690 asection * s;
b34976b6
AM		 8691 bfd_boolean plt;
8692 bfd_boolean relocs;
5e681ec4
PB		 8693 bfd *ibfd;
8694 struct elf32_arm_link_hash_table *htab;
252b5132 8695
5e681ec4 8696 htab = elf32_arm_hash_table (info);
252b5132
RH		 8697 dynobj = elf_hash_table (info)->dynobj;
8698 BFD_ASSERT (dynobj != NULL);
39b41c9c 8699 check_use_blx (htab);
252b5132
RH		 8700
8701 if (elf_hash_table (info)->dynamic_sections_created)
8702 {
8703 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 8704 if (info->executable)
252b5132
RH		 8705 {
8706 s = bfd_get_section_by_name (dynobj, ".interp");
8707 BFD_ASSERT (s != NULL);
eea6121a 8708 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 8709 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
8710 }
8711 }
5e681ec4
PB		 8712
8713 /* Set up .got offsets for local syms, and space for local dynamic
8714 relocs. */
8715 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 8716 {
5e681ec4
PB		 8717 bfd_signed_vma *local_got;
8718 bfd_signed_vma *end_local_got;
8719 char *local_tls_type;
8720 bfd_size_type locsymcount;
8721 Elf_Internal_Shdr *symtab_hdr;
8722 asection *srel;
8723
0ffa91dd 8724 if (! is_arm_elf (ibfd))
5e681ec4
PB		 8725 continue;
8726
8727 for (s = ibfd->sections; s != NULL; s = s->next)
8728 {
8729 struct elf32_arm_relocs_copied *p;
8730
6edfbbad 8731 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 8732 {
8733 if (!bfd_is_abs_section (p->section)
8734 && bfd_is_abs_section (p->section->output_section))
8735 {
8736 /* Input section has been discarded, either because
8737 it is a copy of a linkonce section or due to
8738 linker script /DISCARD/, so we'll be discarding
8739 the relocs too. */
8740 }
8741 else if (p->count != 0)
8742 {
8743 srel = elf_section_data (p->section)->sreloc;
00a97672 8744 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 8745 if ((p->section->output_section->flags & SEC_READONLY) != 0)
8746 info->flags |= DF_TEXTREL;
8747 }
8748 }
8749 }
8750
8751 local_got = elf_local_got_refcounts (ibfd);
8752 if (!local_got)
8753 continue;
8754
0ffa91dd 8755 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 8756 locsymcount = symtab_hdr->sh_info;
8757 end_local_got = local_got + locsymcount;
ba93b8ac 8758 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 8759 s = htab->sgot;
8760 srel = htab->srelgot;
8761 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
8762 {
8763 if (*local_got > 0)
8764 {
eea6121a 8765 *local_got = s->size;
ba93b8ac
DJ		 8766 if (*local_tls_type & GOT_TLS_GD)
8767 /* TLS_GD relocs need an 8-byte structure in the GOT. */
8768 s->size += 8;
8769 if (*local_tls_type & GOT_TLS_IE)
8770 s->size += 4;
8771 if (*local_tls_type == GOT_NORMAL)
8772 s->size += 4;
8773
8774 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 8775 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 8776 }
8777 else
8778 *local_got = (bfd_vma) -1;
8779 }
252b5132
RH		 8780 }
8781
ba93b8ac
DJ		 8782 if (htab->tls_ldm_got.refcount > 0)
8783 {
8784 /* Allocate two GOT entries and one dynamic relocation (if necessary)
8785 for R_ARM_TLS_LDM32 relocations. */
8786 htab->tls_ldm_got.offset = htab->sgot->size;
8787 htab->sgot->size += 8;
8788 if (info->shared)
00a97672 8789 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8790 }
8791 else
8792 htab->tls_ldm_got.offset = -1;
8793
5e681ec4
PB		 8794 /* Allocate global sym .plt and .got entries, and space for global
8795 sym dynamic relocs. */
57e8b36a 8796 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 8797
d504ffc8
DJ		 8798 /* Here we rummage through the found bfds to collect glue information. */
8799 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 8800 {
0ffa91dd 8801 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 8802 continue;
8803
c7b8f16e
JB		 8804 /* Initialise mapping tables for code/data. */
8805 bfd_elf32_arm_init_maps (ibfd);
8806
8807 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
8808 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
8809 /* xgettext:c-format */
8810 _bfd_error_handler (_("Errors encountered processing file %s"),
8811 ibfd->filename);
8812 }
d504ffc8 8813
252b5132
RH		 8814 /* The check_relocs and adjust_dynamic_symbol entry points have
8815 determined the sizes of the various dynamic sections. Allocate
8816 memory for them. */
b34976b6
AM		 8817 plt = FALSE;
8818 relocs = FALSE;
252b5132
RH		 8819 for (s = dynobj->sections; s != NULL; s = s->next)
8820 {
8821 const char * name;
252b5132
RH		 8822
8823 if ((s->flags & SEC_LINKER_CREATED) == 0)
8824 continue;
8825
8826 /* It's OK to base decisions on the section name, because none
8827 of the dynobj section names depend upon the input files. */
8828 name = bfd_get_section_name (dynobj, s);
8829
24a1ba0f 8830 if (strcmp (name, ".plt") == 0)
252b5132 8831 {
c456f082
AM		 8832 /* Remember whether there is a PLT. */
8833 plt = s->size != 0;
252b5132 8834 }
0112cd26 8835 else if (CONST_STRNEQ (name, ".rel"))
252b5132 8836 {
c456f082 8837 if (s->size != 0)
252b5132 8838 {
252b5132 8839 /* Remember whether there are any reloc sections other
00a97672
RS		 8840 than .rel(a).plt and .rela.plt.unloaded. */
8841 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 8842 relocs = TRUE;
252b5132
RH		 8843
8844 /* We use the reloc_count field as a counter if we need
8845 to copy relocs into the output file. */
8846 s->reloc_count = 0;
8847 }
8848 }
0112cd26 8849 else if (! CONST_STRNEQ (name, ".got")
c456f082 8850 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 8851 {
8852 /* It's not one of our sections, so don't allocate space. */
8853 continue;
8854 }
8855
c456f082 8856 if (s->size == 0)
252b5132 8857 {
c456f082 8858 /* If we don't need this section, strip it from the
00a97672
RS		 8859 output file. This is mostly to handle .rel(a).bss and
8860 .rel(a).plt. We must create both sections in
c456f082
AM		 8861 create_dynamic_sections, because they must be created
8862 before the linker maps input sections to output
8863 sections. The linker does that before
8864 adjust_dynamic_symbol is called, and it is that
8865 function which decides whether anything needs to go
8866 into these sections. */
8423293d 8867 s->flags |= SEC_EXCLUDE;
252b5132
RH		 8868 continue;
8869 }
8870
c456f082
AM		 8871 if ((s->flags & SEC_HAS_CONTENTS) == 0)
8872 continue;
8873
252b5132 8874 /* Allocate memory for the section contents. */
eea6121a 8875 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
c456f082 8876 if (s->contents == NULL)
b34976b6 8877 return FALSE;
252b5132
RH		 8878 }
8879
8880 if (elf_hash_table (info)->dynamic_sections_created)
8881 {
8882 /* Add some entries to the .dynamic section. We fill in the
8883 values later, in elf32_arm_finish_dynamic_sections, but we
8884 must add the entries now so that we get the correct size for
8885 the .dynamic section. The DT_DEBUG entry is filled in by the
8886 dynamic linker and used by the debugger. */
dc810e39 8887#define add_dynamic_entry(TAG, VAL) \
5a580b3a 8888 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 8889
8532796c 8890 if (info->executable)
252b5132 8891 {
dc810e39 8892 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 8893 return FALSE;
252b5132
RH		 8894 }
8895
8896 if (plt)
8897 {
dc810e39
AM		 8898 if ( !add_dynamic_entry (DT_PLTGOT, 0)
8899 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 8900 || !add_dynamic_entry (DT_PLTREL,
8901 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 8902 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 8903 return FALSE;
252b5132
RH		 8904 }
8905
8906 if (relocs)
8907 {
00a97672
RS		 8908 if (htab->use_rel)
8909 {
8910 if (!add_dynamic_entry (DT_REL, 0)
8911 || !add_dynamic_entry (DT_RELSZ, 0)
8912 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
8913 return FALSE;
8914 }
8915 else
8916 {
8917 if (!add_dynamic_entry (DT_RELA, 0)
8918 || !add_dynamic_entry (DT_RELASZ, 0)
8919 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
8920 return FALSE;
8921 }
252b5132
RH		 8922 }
8923
08d1f311
DJ		 8924 /* If any dynamic relocs apply to a read-only section,
8925 then we need a DT_TEXTREL entry. */
8926 if ((info->flags & DF_TEXTREL) == 0)
8927 elf_link_hash_traverse (&htab->root, elf32_arm_readonly_dynrelocs,
8928 (PTR) info);
8929
99e4ae17 8930 if ((info->flags & DF_TEXTREL) != 0)
252b5132 8931 {
dc810e39 8932 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 8933 return FALSE;
252b5132 8934 }
7a2b07ff
NS		 8935 if (htab->vxworks_p
8936 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
8937 return FALSE;
252b5132 8938 }
8532796c 8939#undef add_dynamic_entry
252b5132 8940
b34976b6 8941 return TRUE;
252b5132
RH		 8942}
8943
252b5132
RH		 8944/* Finish up dynamic symbol handling. We set the contents of various
8945 dynamic sections here. */
8946
b34976b6 8947static bfd_boolean
57e8b36a
NC		 8948elf32_arm_finish_dynamic_symbol (bfd * output_bfd, struct bfd_link_info * info,
8949 struct elf_link_hash_entry * h, Elf_Internal_Sym * sym)
252b5132
RH		 8950{
8951 bfd * dynobj;
e5a52504 8952 struct elf32_arm_link_hash_table *htab;
b7693d02 8953 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 8954
8955 dynobj = elf_hash_table (info)->dynobj;
e5a52504 8956 htab = elf32_arm_hash_table (info);
b7693d02 8957 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 8958
8959 if (h->plt.offset != (bfd_vma) -1)
8960 {
8961 asection * splt;
252b5132 8962 asection * srel;
e5a52504 8963 bfd_byte *loc;
24a1ba0f 8964 bfd_vma plt_index;
947216bf 8965 Elf_Internal_Rela rel;
252b5132
RH		 8966
8967 /* This symbol has an entry in the procedure linkage table. Set
8968 it up. */
8969
8970 BFD_ASSERT (h->dynindx != -1);
8971
8972 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 8973 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 8974 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 8975
e5a52504
MM		 8976 /* Fill in the entry in the procedure linkage table. */
8977 if (htab->symbian_p)
8978 {
52ab56c2
PB		 8979 put_arm_insn (htab, output_bfd,
8980 elf32_arm_symbian_plt_entry[0],
8981 splt->contents + h->plt.offset);
8982 bfd_put_32 (output_bfd,
8983 elf32_arm_symbian_plt_entry[1],
8984 splt->contents + h->plt.offset + 4);
e5a52504
MM		 8985
8986 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 8987 rel.r_offset = (splt->output_section->vma
8988 + splt->output_offset
52ab56c2 8989 + h->plt.offset + 4);
e5a52504 8990 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 8991
8992 /* Get the index in the procedure linkage table which
8993 corresponds to this symbol. This is the index of this symbol
8994 in all the symbols for which we are making plt entries. The
8995 first entry in the procedure linkage table is reserved. */
8996 plt_index = ((h->plt.offset - htab->plt_header_size)
8997 / htab->plt_entry_size);
e5a52504
MM		 8998 }
8999 else
9000 {
00a97672 9001 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 9002 bfd_vma got_displacement;
9003 asection * sgot;
52ab56c2 9004 bfd_byte * ptr;
e5a52504
MM		 9005
9006 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
9007 BFD_ASSERT (sgot != NULL);
9008
b7693d02
DJ		 9009 /* Get the offset into the .got.plt table of the entry that
9010 corresponds to this function. */
9011 got_offset = eh->plt_got_offset;
9012
9013 /* Get the index in the procedure linkage table which
9014 corresponds to this symbol. This is the index of this symbol
9015 in all the symbols for which we are making plt entries. The
9016 first three entries in .got.plt are reserved; after that
9017 symbols appear in the same order as in .plt. */
9018 plt_index = (got_offset - 12) / 4;
e5a52504 9019
00a97672
RS		 9020 /* Calculate the address of the GOT entry. */
9021 got_address = (sgot->output_section->vma
9022 + sgot->output_offset
9023 + got_offset);
5e681ec4 9024
00a97672
RS		 9025 /* ...and the address of the PLT entry. */
9026 plt_address = (splt->output_section->vma
9027 + splt->output_offset
9028 + h->plt.offset);
5e681ec4 9029
52ab56c2 9030 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 9031 if (htab->vxworks_p && info->shared)
9032 {
9033 unsigned int i;
9034 bfd_vma val;
9035
52ab56c2 9036 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 9037 {
9038 val = elf32_arm_vxworks_shared_plt_entry[i];
9039 if (i == 2)
9040 val |= got_address - sgot->output_section->vma;
9041 if (i == 5)
9042 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 9043 if (i == 2 || i == 5)
9044 bfd_put_32 (output_bfd, val, ptr);
9045 else
9046 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 9047 }
9048 }
9049 else if (htab->vxworks_p)
b7693d02 9050 {
00a97672
RS		 9051 unsigned int i;
9052 bfd_vma val;
9053
d3753b85 9054 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 9055 {
9056 val = elf32_arm_vxworks_exec_plt_entry[i];
9057 if (i == 2)
9058 val |= got_address;
9059 if (i == 4)
9060 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
9061 if (i == 5)
9062 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 9063 if (i == 2 || i == 5)
9064 bfd_put_32 (output_bfd, val, ptr);
9065 else
9066 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 9067 }
9068
9069 loc = (htab->srelplt2->contents
9070 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9071
9072 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9073 referencing the GOT for this PLT entry. */
9074 rel.r_offset = plt_address + 8;
9075 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9076 rel.r_addend = got_offset;
9077 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9078 loc += RELOC_SIZE (htab);
9079
9080 /* Create the R_ARM_ABS32 relocation referencing the
9081 beginning of the PLT for this GOT entry. */
9082 rel.r_offset = got_address;
9083 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9084 rel.r_addend = 0;
9085 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 9086 }
00a97672
RS		 9087 else
9088 {
bd97cb95 9089 bfd_signed_vma thumb_refs;
00a97672
RS		 9090 /* Calculate the displacement between the PLT slot and the
9091 entry in the GOT. The eight-byte offset accounts for the
9092 value produced by adding to pc in the first instruction
9093 of the PLT stub. */
9094 got_displacement = got_address - (plt_address + 8);
b7693d02 9095
00a97672
RS		 9096 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9097
bd97cb95
DJ		 9098 thumb_refs = eh->plt_thumb_refcount;
9099 if (!htab->use_blx)
9100 thumb_refs += eh->plt_maybe_thumb_refcount;
9101
9102 if (thumb_refs > 0)
00a97672 9103 {
52ab56c2
PB		 9104 put_thumb_insn (htab, output_bfd,
9105 elf32_arm_plt_thumb_stub[0], ptr - 4);
9106 put_thumb_insn (htab, output_bfd,
9107 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 9108 }
9109
52ab56c2
PB		 9110 put_arm_insn (htab, output_bfd,
9111 elf32_arm_plt_entry[0]
9112 | ((got_displacement & 0x0ff00000) >> 20),
9113 ptr + 0);
9114 put_arm_insn (htab, output_bfd,
9115 elf32_arm_plt_entry[1]
9116 | ((got_displacement & 0x000ff000) >> 12),
9117 ptr+ 4);
9118 put_arm_insn (htab, output_bfd,
9119 elf32_arm_plt_entry[2]
9120 | (got_displacement & 0x00000fff),
9121 ptr + 8);
5e681ec4 9122#ifdef FOUR_WORD_PLT
52ab56c2 9123 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 9124#endif
00a97672 9125 }
252b5132 9126
e5a52504
MM		 9127 /* Fill in the entry in the global offset table. */
9128 bfd_put_32 (output_bfd,
9129 (splt->output_section->vma
9130 + splt->output_offset),
9131 sgot->contents + got_offset);
9132
00a97672
RS		 9133 /* Fill in the entry in the .rel(a).plt section. */
9134 rel.r_addend = 0;
9135 rel.r_offset = got_address;
e5a52504
MM		 9136 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
9137 }
57e8b36a 9138
00a97672
RS		 9139 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9140 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 9141
f5385ebf 9142 if (!h->def_regular)
252b5132
RH		 9143 {
9144 /* Mark the symbol as undefined, rather than as defined in
9145 the .plt section. Leave the value alone. */
9146 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 9147 /* If the symbol is weak, we do need to clear the value.
9148 Otherwise, the PLT entry would provide a definition for
9149 the symbol even if the symbol wasn't defined anywhere,
9150 and so the symbol would never be NULL. */
f5385ebf 9151 if (!h->ref_regular_nonweak)
d982ba73 9152 sym->st_value = 0;
252b5132
RH		 9153 }
9154 }
9155
ba93b8ac
DJ		 9156 if (h->got.offset != (bfd_vma) -1
9157 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
9158 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 9159 {
9160 asection * sgot;
9161 asection * srel;
947216bf
AM		 9162 Elf_Internal_Rela rel;
9163 bfd_byte *loc;
00a97672 9164 bfd_vma offset;
252b5132
RH		 9165
9166 /* This symbol has an entry in the global offset table. Set it
9167 up. */
252b5132 9168 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 9169 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 9170 BFD_ASSERT (sgot != NULL && srel != NULL);
9171
00a97672
RS		 9172 offset = (h->got.offset & ~(bfd_vma) 1);
9173 rel.r_addend = 0;
252b5132
RH		 9174 rel.r_offset = (sgot->output_section->vma
9175 + sgot->output_offset
00a97672 9176 + offset);
252b5132 9177
5e681ec4
PB		 9178 /* If this is a static link, or it is a -Bsymbolic link and the
9179 symbol is defined locally or was forced to be local because
9180 of a version file, we just want to emit a RELATIVE reloc.
9181 The entry in the global offset table will already have been
9182 initialized in the relocate_section function. */
252b5132 9183 if (info->shared
5e681ec4
PB		 9184 && SYMBOL_REFERENCES_LOCAL (info, h))
9185 {
9186 BFD_ASSERT((h->got.offset & 1) != 0);
9187 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 9188 if (!htab->use_rel)
9189 {
9190 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
9191 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
9192 }
5e681ec4 9193 }
252b5132
RH		 9194 else
9195 {
5e681ec4 9196 BFD_ASSERT((h->got.offset & 1) == 0);
00a97672 9197 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 9198 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9199 }
9200
00a97672
RS		 9201 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
9202 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 9203 }
9204
f5385ebf 9205 if (h->needs_copy)
252b5132
RH		 9206 {
9207 asection * s;
947216bf
AM		 9208 Elf_Internal_Rela rel;
9209 bfd_byte *loc;
252b5132
RH		 9210
9211 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 9212 BFD_ASSERT (h->dynindx != -1
9213 && (h->root.type == bfd_link_hash_defined
9214 || h->root.type == bfd_link_hash_defweak));
9215
9216 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 9217 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 9218 BFD_ASSERT (s != NULL);
9219
00a97672 9220 rel.r_addend = 0;
252b5132
RH		 9221 rel.r_offset = (h->root.u.def.value
9222 + h->root.u.def.section->output_section->vma
9223 + h->root.u.def.section->output_offset);
9224 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 9225 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
9226 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 9227 }
9228
00a97672
RS		 9229 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
9230 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
9231 to the ".got" section. */
252b5132 9232 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 9233 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 9234 sym->st_shndx = SHN_ABS;
9235
b34976b6 9236 return TRUE;
252b5132
RH		 9237}
9238
9239/* Finish up the dynamic sections. */
9240
b34976b6 9241static bfd_boolean
57e8b36a 9242elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 9243{
9244 bfd * dynobj;
9245 asection * sgot;
9246 asection * sdyn;
9247
9248 dynobj = elf_hash_table (info)->dynobj;
9249
9250 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 9251 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 9252 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
9253
9254 if (elf_hash_table (info)->dynamic_sections_created)
9255 {
9256 asection *splt;
9257 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 9258 struct elf32_arm_link_hash_table *htab;
252b5132 9259
229fcec5 9260 htab = elf32_arm_hash_table (info);
252b5132 9261 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 9262 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 9263
9264 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 9265 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 9266
252b5132
RH		 9267 for (; dyncon < dynconend; dyncon++)
9268 {
9269 Elf_Internal_Dyn dyn;
9270 const char * name;
9271 asection * s;
9272
9273 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
9274
9275 switch (dyn.d_tag)
9276 {
229fcec5
MM		 9277 unsigned int type;
9278
252b5132 9279 default:
7a2b07ff
NS		 9280 if (htab->vxworks_p
9281 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
9282 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 9283 break;
9284
229fcec5
MM		 9285 case DT_HASH:
9286 name = ".hash";
9287 goto get_vma_if_bpabi;
9288 case DT_STRTAB:
9289 name = ".dynstr";
9290 goto get_vma_if_bpabi;
9291 case DT_SYMTAB:
9292 name = ".dynsym";
9293 goto get_vma_if_bpabi;
c0042f5d
MM		 9294 case DT_VERSYM:
9295 name = ".gnu.version";
9296 goto get_vma_if_bpabi;
9297 case DT_VERDEF:
9298 name = ".gnu.version_d";
9299 goto get_vma_if_bpabi;
9300 case DT_VERNEED:
9301 name = ".gnu.version_r";
9302 goto get_vma_if_bpabi;
9303
252b5132
RH		 9304 case DT_PLTGOT:
9305 name = ".got";
9306 goto get_vma;
9307 case DT_JMPREL:
00a97672 9308 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 9309 get_vma:
9310 s = bfd_get_section_by_name (output_bfd, name);
9311 BFD_ASSERT (s != NULL);
229fcec5
MM		 9312 if (!htab->symbian_p)
9313 dyn.d_un.d_ptr = s->vma;
9314 else
9315 /* In the BPABI, tags in the PT_DYNAMIC section point
9316 at the file offset, not the memory address, for the
9317 convenience of the post linker. */
9318 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 9319 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9320 break;
9321
229fcec5
MM		 9322 get_vma_if_bpabi:
9323 if (htab->symbian_p)
9324 goto get_vma;
9325 break;
9326
252b5132 9327 case DT_PLTRELSZ:
00a97672
RS		 9328 s = bfd_get_section_by_name (output_bfd,
9329 RELOC_SECTION (htab, ".plt"));
252b5132 9330 BFD_ASSERT (s != NULL);
eea6121a 9331 dyn.d_un.d_val = s->size;
252b5132
RH		 9332 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9333 break;
229fcec5 9334
252b5132 9335 case DT_RELSZ:
00a97672 9336 case DT_RELASZ:
229fcec5
MM		 9337 if (!htab->symbian_p)
9338 {
9339 /* My reading of the SVR4 ABI indicates that the
9340 procedure linkage table relocs (DT_JMPREL) should be
9341 included in the overall relocs (DT_REL). This is
9342 what Solaris does. However, UnixWare can not handle
9343 that case. Therefore, we override the DT_RELSZ entry
9344 here to make it not include the JMPREL relocs. Since
00a97672 9345 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 9346 other relocation sections, we don't have to worry
9347 about changing the DT_REL entry. */
00a97672
RS		 9348 s = bfd_get_section_by_name (output_bfd,
9349 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 9350 if (s != NULL)
9351 dyn.d_un.d_val -= s->size;
9352 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9353 break;
9354 }
9355 /* Fall through */
9356
9357 case DT_REL:
9358 case DT_RELA:
229fcec5
MM		 9359 /* In the BPABI, the DT_REL tag must point at the file
9360 offset, not the VMA, of the first relocation
9361 section. So, we use code similar to that in
9362 elflink.c, but do not check for SHF_ALLOC on the
9363 relcoation section, since relocations sections are
9364 never allocated under the BPABI. The comments above
9365 about Unixware notwithstanding, we include all of the
9366 relocations here. */
9367 if (htab->symbian_p)
9368 {
9369 unsigned int i;
9370 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
9371 ? SHT_REL : SHT_RELA);
9372 dyn.d_un.d_val = 0;
9373 for (i = 1; i < elf_numsections (output_bfd); i++)
9374 {
9375 Elf_Internal_Shdr *hdr
9376 = elf_elfsections (output_bfd)[i];
9377 if (hdr->sh_type == type)
9378 {
9379 if (dyn.d_tag == DT_RELSZ
9380 || dyn.d_tag == DT_RELASZ)
9381 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 9382 else if ((ufile_ptr) hdr->sh_offset
9383 <= dyn.d_un.d_val - 1)
229fcec5
MM		 9384 dyn.d_un.d_val = hdr->sh_offset;
9385 }
9386 }
9387 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9388 }
252b5132 9389 break;
88f7bcd5
NC		 9390
9391 /* Set the bottom bit of DT_INIT/FINI if the
9392 corresponding function is Thumb. */
9393 case DT_INIT:
9394 name = info->init_function;
9395 goto get_sym;
9396 case DT_FINI:
9397 name = info->fini_function;
9398 get_sym:
9399 /* If it wasn't set by elf_bfd_final_link
4cc11e76 9400 then there is nothing to adjust. */
88f7bcd5
NC		 9401 if (dyn.d_un.d_val != 0)
9402 {
9403 struct elf_link_hash_entry * eh;
9404
9405 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 9406 FALSE, FALSE, TRUE);
88f7bcd5
NC		 9407 if (eh != (struct elf_link_hash_entry *) NULL
9408 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
9409 {
9410 dyn.d_un.d_val |= 1;
b34976b6 9411 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 9412 }
9413 }
9414 break;
252b5132
RH		 9415 }
9416 }
9417
24a1ba0f 9418 /* Fill in the first entry in the procedure linkage table. */
e5a52504 9419 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 9420 {
00a97672
RS		 9421 const bfd_vma *plt0_entry;
9422 bfd_vma got_address, plt_address, got_displacement;
9423
9424 /* Calculate the addresses of the GOT and PLT. */
9425 got_address = sgot->output_section->vma + sgot->output_offset;
9426 plt_address = splt->output_section->vma + splt->output_offset;
9427
9428 if (htab->vxworks_p)
9429 {
9430 /* The VxWorks GOT is relocated by the dynamic linker.
9431 Therefore, we must emit relocations rather than simply
9432 computing the values now. */
9433 Elf_Internal_Rela rel;
9434
9435 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 9436 put_arm_insn (htab, output_bfd, plt0_entry[0],
9437 splt->contents + 0);
9438 put_arm_insn (htab, output_bfd, plt0_entry[1],
9439 splt->contents + 4);
9440 put_arm_insn (htab, output_bfd, plt0_entry[2],
9441 splt->contents + 8);
00a97672
RS		 9442 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
9443
9444 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
9445 rel.r_offset = plt_address + 12;
9446 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9447 rel.r_addend = 0;
9448 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
9449 htab->srelplt2->contents);
9450 }
9451 else
9452 {
9453 got_displacement = got_address - (plt_address + 16);
9454
9455 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 9456 put_arm_insn (htab, output_bfd, plt0_entry[0],
9457 splt->contents + 0);
9458 put_arm_insn (htab, output_bfd, plt0_entry[1],
9459 splt->contents + 4);
9460 put_arm_insn (htab, output_bfd, plt0_entry[2],
9461 splt->contents + 8);
9462 put_arm_insn (htab, output_bfd, plt0_entry[3],
9463 splt->contents + 12);
5e681ec4 9464
5e681ec4 9465#ifdef FOUR_WORD_PLT
00a97672
RS		 9466 /* The displacement value goes in the otherwise-unused
9467 last word of the second entry. */
9468 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 9469#else
00a97672 9470 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 9471#endif
00a97672 9472 }
f7a74f8c 9473 }
252b5132
RH		 9474
9475 /* UnixWare sets the entsize of .plt to 4, although that doesn't
9476 really seem like the right value. */
74541ad4
AM		 9477 if (splt->output_section->owner == output_bfd)
9478 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 9479
9480 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
9481 {
9482 /* Correct the .rel(a).plt.unloaded relocations. They will have
9483 incorrect symbol indexes. */
9484 int num_plts;
eed62c48 9485 unsigned char *p;
00a97672
RS		 9486
9487 num_plts = ((htab->splt->size - htab->plt_header_size)
9488 / htab->plt_entry_size);
9489 p = htab->srelplt2->contents + RELOC_SIZE (htab);
9490
9491 for (; num_plts; num_plts--)
9492 {
9493 Elf_Internal_Rela rel;
9494
9495 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9496 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9497 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9498 p += RELOC_SIZE (htab);
9499
9500 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9501 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9502 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9503 p += RELOC_SIZE (htab);
9504 }
9505 }
252b5132
RH		 9506 }
9507
9508 /* Fill in the first three entries in the global offset table. */
229fcec5 9509 if (sgot)
252b5132 9510 {
229fcec5
MM		 9511 if (sgot->size > 0)
9512 {
9513 if (sdyn == NULL)
9514 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
9515 else
9516 bfd_put_32 (output_bfd,
9517 sdyn->output_section->vma + sdyn->output_offset,
9518 sgot->contents);
9519 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
9520 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
9521 }
252b5132 9522
229fcec5
MM		 9523 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
9524 }
252b5132 9525
b34976b6 9526 return TRUE;
252b5132
RH		 9527}
9528
ba96a88f 9529static void
57e8b36a 9530elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 9531{
9b485d32 9532 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 9533 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 9534
9535 i_ehdrp = elf_elfheader (abfd);
9536
94a3258f
PB		 9537 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
9538 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
9539 else
9540 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 9541 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 9542
93204d3a
PB		 9543 if (link_info)
9544 {
9545 globals = elf32_arm_hash_table (link_info);
9546 if (globals->byteswap_code)
9547 i_ehdrp->e_flags |= EF_ARM_BE8;
9548 }
ba96a88f
NC		 9549}
9550
99e4ae17 9551static enum elf_reloc_type_class
57e8b36a 9552elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 9553{
f51e552e 9554 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 9555 {
9556 case R_ARM_RELATIVE:
9557 return reloc_class_relative;
9558 case R_ARM_JUMP_SLOT:
9559 return reloc_class_plt;
9560 case R_ARM_COPY:
9561 return reloc_class_copy;
9562 default:
9563 return reloc_class_normal;
9564 }
9565}
9566
e16bb312
NC		 9567/* Set the right machine number for an Arm ELF file. */
9568
9569static bfd_boolean
57e8b36a 9570elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 9571{
9572 if (hdr->sh_type == SHT_NOTE)
9573 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
9574
9575 return TRUE;
9576}
9577
e489d0ae 9578static void
57e8b36a 9579elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 9580{
5a6c6817 9581 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 9582}
9583
40a18ebd
NC		 9584/* Return TRUE if this is an unwinding table entry. */
9585
9586static bfd_boolean
9587is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
9588{
0112cd26
NC		 9589 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
9590 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 9591}
9592
9593
9594/* Set the type and flags for an ARM section. We do this by
9595 the section name, which is a hack, but ought to work. */
9596
9597static bfd_boolean
9598elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
9599{
9600 const char * name;
9601
9602 name = bfd_get_section_name (abfd, sec);
9603
9604 if (is_arm_elf_unwind_section_name (abfd, name))
9605 {
9606 hdr->sh_type = SHT_ARM_EXIDX;
9607 hdr->sh_flags |= SHF_LINK_ORDER;
9608 }
9609 return TRUE;
9610}
9611
6dc132d9
L		 9612/* Handle an ARM specific section when reading an object file. This is
9613 called when bfd_section_from_shdr finds a section with an unknown
9614 type. */
40a18ebd
NC		 9615
9616static bfd_boolean
9617elf32_arm_section_from_shdr (bfd *abfd,
9618 Elf_Internal_Shdr * hdr,
6dc132d9
L		 9619 const char *name,
9620 int shindex)
40a18ebd
NC		 9621{
9622 /* There ought to be a place to keep ELF backend specific flags, but
9623 at the moment there isn't one. We just keep track of the
9624 sections by their name, instead. Fortunately, the ABI gives
9625 names for all the ARM specific sections, so we will probably get
9626 away with this. */
9627 switch (hdr->sh_type)
9628 {
9629 case SHT_ARM_EXIDX:
0951f019
RE		 9630 case SHT_ARM_PREEMPTMAP:
9631 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 9632 break;
9633
9634 default:
9635 return FALSE;
9636 }
9637
6dc132d9 9638 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 9639 return FALSE;
9640
9641 return TRUE;
9642}
e489d0ae 9643
8e3de13a
NC		 9644/* A structure used to record a list of sections, independently
9645 of the next and prev fields in the asection structure. */
9646typedef struct section_list
9647{
9648 asection * sec;
9649 struct section_list * next;
9650 struct section_list * prev;
9651}
9652section_list;
9653
9654/* Unfortunately we need to keep a list of sections for which
9655 an _arm_elf_section_data structure has been allocated. This
9656 is because it is possible for functions like elf32_arm_write_section
9657 to be called on a section which has had an elf_data_structure
9658 allocated for it (and so the used_by_bfd field is valid) but
9659 for which the ARM extended version of this structure - the
9660 _arm_elf_section_data structure - has not been allocated. */
9661static section_list * sections_with_arm_elf_section_data = NULL;
9662
9663static void
957c6e41 9664record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 9665{
9666 struct section_list * entry;
9667
957c6e41 9668 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 9669 if (entry == NULL)
9670 return;
9671 entry->sec = sec;
9672 entry->next = sections_with_arm_elf_section_data;
9673 entry->prev = NULL;
9674 if (entry->next != NULL)
9675 entry->next->prev = entry;
9676 sections_with_arm_elf_section_data = entry;
9677}
9678
44444f50
NC		 9679static struct section_list *
9680find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 9681{
9682 struct section_list * entry;
bd4aae00 9683 static struct section_list * last_entry = NULL;
8e3de13a 9684
bd4aae00
NC		 9685 /* This is a short cut for the typical case where the sections are added
9686 to the sections_with_arm_elf_section_data list in forward order and
9687 then looked up here in backwards order. This makes a real difference
9688 to the ld-srec/sec64k.exp linker test. */
44444f50 9689 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 9690 if (last_entry != NULL)
9691 {
9692 if (last_entry->sec == sec)
44444f50
NC		 9693 entry = last_entry;
9694 else if (last_entry->next != NULL
9695 && last_entry->next->sec == sec)
9696 entry = last_entry->next;
bd4aae00 9697 }
44444f50
NC		 9698
9699 for (; entry; entry = entry->next)
8e3de13a 9700 if (entry->sec == sec)
44444f50 9701 break;
bd4aae00 9702
44444f50
NC		 9703 if (entry)
9704 /* Record the entry prior to this one - it is the entry we are most
9705 likely to want to locate next time. Also this way if we have been
9706 called from unrecord_section_with_arm_elf_section_data() we will not
9707 be caching a pointer that is about to be freed. */
9708 last_entry = entry->prev;
9709
9710 return entry;
9711}
9712
9713static _arm_elf_section_data *
9714get_arm_elf_section_data (asection * sec)
9715{
9716 struct section_list * entry;
9717
9718 entry = find_arm_elf_section_entry (sec);
9719
9720 if (entry)
9721 return elf32_arm_section_data (entry->sec);
9722 else
9723 return NULL;
8e3de13a
NC		 9724}
9725
9726static void
9727unrecord_section_with_arm_elf_section_data (asection * sec)
9728{
9729 struct section_list * entry;
9730
44444f50
NC		 9731 entry = find_arm_elf_section_entry (sec);
9732
9733 if (entry)
9734 {
9735 if (entry->prev != NULL)
9736 entry->prev->next = entry->next;
9737 if (entry->next != NULL)
9738 entry->next->prev = entry->prev;
9739 if (entry == sections_with_arm_elf_section_data)
9740 sections_with_arm_elf_section_data = entry->next;
9741 free (entry);
9742 }
8e3de13a
NC		 9743}
9744
e489d0ae 9745
4e617b1e
PB		 9746typedef struct
9747{
9748 void *finfo;
9749 struct bfd_link_info *info;
91a5743d
PB		 9750 asection *sec;
9751 int sec_shndx;
4e617b1e
PB		 9752 bfd_boolean (*func) (void *, const char *, Elf_Internal_Sym *,
9753 asection *, struct elf_link_hash_entry *);
9754} output_arch_syminfo;
9755
9756enum map_symbol_type
9757{
9758 ARM_MAP_ARM,
9759 ARM_MAP_THUMB,
9760 ARM_MAP_DATA
9761};
9762
9763
9764/* Output a single PLT mapping symbol. */
9765
9766static bfd_boolean
9767elf32_arm_ouput_plt_map_sym (output_arch_syminfo *osi,
9768 enum map_symbol_type type,
9769 bfd_vma offset)
9770{
9771 static const char *names[3] = {"$a", "$t", "$d"};
9772 struct elf32_arm_link_hash_table *htab;
9773 Elf_Internal_Sym sym;
9774
9775 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 9776 sym.st_value = osi->sec->output_section->vma
9777 + osi->sec->output_offset
9778 + offset;
4e617b1e
PB		 9779 sym.st_size = 0;
9780 sym.st_other = 0;
9781 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d
PB		 9782 sym.st_shndx = osi->sec_shndx;
9783 if (!osi->func (osi->finfo, names[type], &sym, osi->sec, NULL))
4e617b1e
PB		 9784 return FALSE;
9785 return TRUE;
9786}
9787
9788
9789/* Output mapping symbols for PLT entries associated with H. */
9790
9791static bfd_boolean
9792elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
9793{
9794 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
9795 struct elf32_arm_link_hash_table *htab;
9796 struct elf32_arm_link_hash_entry *eh;
9797 bfd_vma addr;
9798
9799 htab = elf32_arm_hash_table (osi->info);
9800
9801 if (h->root.type == bfd_link_hash_indirect)
9802 return TRUE;
9803
9804 if (h->root.type == bfd_link_hash_warning)
9805 /* When warning symbols are created, they **replace** the "real"
9806 entry in the hash table, thus we never get to see the real
9807 symbol in a hash traversal. So look at it now. */
9808 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9809
9810 if (h->plt.offset == (bfd_vma) -1)
9811 return TRUE;
9812
9813 eh = (struct elf32_arm_link_hash_entry *) h;
9814 addr = h->plt.offset;
9815 if (htab->symbian_p)
9816 {
9817 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9818 return FALSE;
9819 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 4))
9820 return FALSE;
9821 }
9822 else if (htab->vxworks_p)
9823 {
9824 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9825 return FALSE;
9826 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 8))
9827 return FALSE;
9828 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr + 12))
9829 return FALSE;
9830 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 20))
9831 return FALSE;
9832 }
9833 else
9834 {
bd97cb95
DJ		 9835 bfd_signed_vma thumb_refs;
9836
9837 thumb_refs = eh->plt_thumb_refcount;
9838 if (!htab->use_blx)
9839 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 9840
bd97cb95 9841 if (thumb_refs > 0)
4e617b1e
PB		 9842 {
9843 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_THUMB, addr - 4))
9844 return FALSE;
9845 }
9846#ifdef FOUR_WORD_PLT
9847 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9848 return FALSE;
9849 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 12))
9850 return FALSE;
9851#else
9852 /* A three-word PLT with no Thumb thunk contains only Arm code,
9853 so only need to output a mapping symbol for the first PLT entry and
9854 entries with thumb thunks. */
bd97cb95 9855 if (thumb_refs > 0 || addr == 20)
4e617b1e
PB		 9856 {
9857 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9858 return FALSE;
9859 }
9860#endif
9861 }
9862
9863 return TRUE;
9864}
9865
9866
91a5743d 9867/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 9868
9869static bfd_boolean
9870elf32_arm_output_arch_local_syms (bfd *output_bfd,
9871 struct bfd_link_info *info,
9872 void *finfo, bfd_boolean (*func) (void *, const char *,
9873 Elf_Internal_Sym *,
9874 asection *,
9875 struct elf_link_hash_entry *))
9876{
9877 output_arch_syminfo osi;
9878 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 9879 bfd_vma offset;
9880 bfd_size_type size;
4e617b1e
PB		 9881
9882 htab = elf32_arm_hash_table (info);
4e617b1e 9883 check_use_blx(htab);
91a5743d 9884
4e617b1e
PB		 9885 osi.finfo = finfo;
9886 osi.info = info;
9887 osi.func = func;
91a5743d
PB		 9888
9889 /* ARM->Thumb glue. */
9890 if (htab->arm_glue_size > 0)
9891 {
9892 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9893 ARM2THUMB_GLUE_SECTION_NAME);
9894
9895 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9896 (output_bfd, osi.sec->output_section);
9897 if (info->shared || htab->root.is_relocatable_executable
9898 || htab->pic_veneer)
9899 size = ARM2THUMB_PIC_GLUE_SIZE;
9900 else if (htab->use_blx)
9901 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
9902 else
9903 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 9904
91a5743d
PB		 9905 for (offset = 0; offset < htab->arm_glue_size; offset += size)
9906 {
9907 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset);
9908 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
9909 }
9910 }
9911
9912 /* Thumb->ARM glue. */
9913 if (htab->thumb_glue_size > 0)
9914 {
9915 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9916 THUMB2ARM_GLUE_SECTION_NAME);
9917
9918 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9919 (output_bfd, osi.sec->output_section);
9920 size = THUMB2ARM_GLUE_SIZE;
9921
9922 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
9923 {
9924 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_THUMB, offset);
9925 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset + 4);
9926 }
9927 }
9928
845b51d6
PB		 9929 /* ARMv4 BX veneers. */
9930 if (htab->bx_glue_size > 0)
9931 {
9932 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9933 ARM_BX_GLUE_SECTION_NAME);
9934
9935 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9936 (output_bfd, osi.sec->output_section);
9937
9938 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0);
9939 }
9940
91a5743d
PB		 9941 /* Finally, output mapping symbols for the PLT. */
9942 if (!htab->splt || htab->splt->size == 0)
9943 return TRUE;
9944
9945 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
9946 htab->splt->output_section);
9947 osi.sec = htab->splt;
4e617b1e
PB		 9948 /* Output mapping symbols for the plt header. SymbianOS does not have a
9949 plt header. */
9950 if (htab->vxworks_p)
9951 {
9952 /* VxWorks shared libraries have no PLT header. */
9953 if (!info->shared)
9954 {
9955 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9956 return FALSE;
9957 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 12))
9958 return FALSE;
9959 }
9960 }
9961 else if (!htab->symbian_p)
9962 {
9963 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9964 return FALSE;
9965#ifndef FOUR_WORD_PLT
9966 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 16))
9967 return FALSE;
9968#endif
9969 }
9970
9971 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
9972 return TRUE;
9973}
9974
e489d0ae
PB		 9975/* Allocate target specific section data. */
9976
9977static bfd_boolean
9978elf32_arm_new_section_hook (bfd *abfd, asection *sec)
9979{
f592407e
AM		 9980 if (!sec->used_by_bfd)
9981 {
9982 _arm_elf_section_data *sdata;
9983 bfd_size_type amt = sizeof (*sdata);
e489d0ae 9984
f592407e
AM		 9985 sdata = bfd_zalloc (abfd, amt);
9986 if (sdata == NULL)
9987 return FALSE;
9988 sec->used_by_bfd = sdata;
9989 }
e489d0ae 9990
957c6e41 9991 record_section_with_arm_elf_section_data (sec);
8e3de13a 9992
e489d0ae
PB		 9993 return _bfd_elf_new_section_hook (abfd, sec);
9994}
9995
9996
9997/* Used to order a list of mapping symbols by address. */
9998
9999static int
10000elf32_arm_compare_mapping (const void * a, const void * b)
10001{
7f6a71ff
JM		 10002 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
10003 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
10004
10005 if (amap->vma > bmap->vma)
10006 return 1;
10007 else if (amap->vma < bmap->vma)
10008 return -1;
10009 else if (amap->type > bmap->type)
10010 /* Ensure results do not depend on the host qsort for objects with
10011 multiple mapping symbols at the same address by sorting on type
10012 after vma. */
10013 return 1;
10014 else if (amap->type < bmap->type)
10015 return -1;
10016 else
10017 return 0;
e489d0ae
PB		 10018}
10019
10020
10021/* Do code byteswapping. Return FALSE afterwards so that the section is
10022 written out as normal. */
10023
10024static bfd_boolean
c7b8f16e
JB		 10025elf32_arm_write_section (bfd *output_bfd,
10026 struct bfd_link_info *link_info, asection *sec,
e489d0ae
PB		 10027 bfd_byte *contents)
10028{
c7b8f16e 10029 int mapcount, errcount;
8e3de13a 10030 _arm_elf_section_data *arm_data;
c7b8f16e 10031 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 10032 elf32_arm_section_map *map;
c7b8f16e 10033 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 10034 bfd_vma ptr;
10035 bfd_vma end;
c7b8f16e 10036 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae
PB		 10037 bfd_byte tmp;
10038 int i;
57e8b36a 10039
8e3de13a
NC		 10040 /* If this section has not been allocated an _arm_elf_section_data
10041 structure then we cannot record anything. */
10042 arm_data = get_arm_elf_section_data (sec);
10043 if (arm_data == NULL)
10044 return FALSE;
10045
10046 mapcount = arm_data->mapcount;
10047 map = arm_data->map;
c7b8f16e
JB		 10048 errcount = arm_data->erratumcount;
10049
10050 if (errcount != 0)
10051 {
10052 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
10053
10054 for (errnode = arm_data->erratumlist; errnode != 0;
10055 errnode = errnode->next)
10056 {
10057 bfd_vma index = errnode->vma - offset;
10058
10059 switch (errnode->type)
10060 {
10061 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
10062 {
10063 bfd_vma branch_to_veneer;
10064 /* Original condition code of instruction, plus bit mask for
10065 ARM B instruction. */
10066 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
10067 | 0x0a000000;
10068
10069 /* The instruction is before the label. */
10070 index -= 4;
10071
10072 /* Above offset included in -4 below. */
10073 branch_to_veneer = errnode->u.b.veneer->vma
10074 - errnode->vma - 4;
10075
10076 if ((signed) branch_to_veneer < -(1 << 25)
10077 || (signed) branch_to_veneer >= (1 << 25))
10078 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
10079 "range"), output_bfd);
10080
10081 insn |= (branch_to_veneer >> 2) & 0xffffff;
10082 contents[endianflip ^ index] = insn & 0xff;
10083 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
10084 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
10085 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
10086 }
10087 break;
10088
10089 case VFP11_ERRATUM_ARM_VENEER:
10090 {
10091 bfd_vma branch_from_veneer;
10092 unsigned int insn;
10093
10094 /* Take size of veneer into account. */
10095 branch_from_veneer = errnode->u.v.branch->vma
10096 - errnode->vma - 12;
10097
10098 if ((signed) branch_from_veneer < -(1 << 25)
10099 || (signed) branch_from_veneer >= (1 << 25))
10100 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
10101 "range"), output_bfd);
10102
10103 /* Original instruction. */
10104 insn = errnode->u.v.branch->u.b.vfp_insn;
10105 contents[endianflip ^ index] = insn & 0xff;
10106 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
10107 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
10108 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
10109
10110 /* Branch back to insn after original insn. */
10111 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
10112 contents[endianflip ^ (index + 4)] = insn & 0xff;
10113 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
10114 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
10115 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
10116 }
10117 break;
10118
10119 default:
10120 abort ();
10121 }
10122 }
10123 }
e489d0ae
PB		 10124
10125 if (mapcount == 0)
10126 return FALSE;
10127
c7b8f16e 10128 if (globals->byteswap_code)
e489d0ae 10129 {
c7b8f16e 10130 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 10131
c7b8f16e
JB		 10132 ptr = map[0].vma;
10133 for (i = 0; i < mapcount; i++)
10134 {
10135 if (i == mapcount - 1)
10136 end = sec->size;
10137 else
10138 end = map[i + 1].vma;
e489d0ae 10139
c7b8f16e 10140 switch (map[i].type)
e489d0ae 10141 {
c7b8f16e
JB		 10142 case 'a':
10143 /* Byte swap code words. */
10144 while (ptr + 3 < end)
10145 {
10146 tmp = contents[ptr];
10147 contents[ptr] = contents[ptr + 3];
10148 contents[ptr + 3] = tmp;
10149 tmp = contents[ptr + 1];
10150 contents[ptr + 1] = contents[ptr + 2];
10151 contents[ptr + 2] = tmp;
10152 ptr += 4;
10153 }
10154 break;
e489d0ae 10155
c7b8f16e
JB		 10156 case 't':
10157 /* Byte swap code halfwords. */
10158 while (ptr + 1 < end)
10159 {
10160 tmp = contents[ptr];
10161 contents[ptr] = contents[ptr + 1];
10162 contents[ptr + 1] = tmp;
10163 ptr += 2;
10164 }
10165 break;
10166
10167 case 'd':
10168 /* Leave data alone. */
10169 break;
10170 }
10171 ptr = end;
10172 }
e489d0ae 10173 }
8e3de13a 10174
93204d3a 10175 free (map);
8e3de13a 10176 arm_data->mapcount = 0;
c7b8f16e 10177 arm_data->mapsize = 0;
8e3de13a
NC		 10178 arm_data->map = NULL;
10179 unrecord_section_with_arm_elf_section_data (sec);
10180
e489d0ae
PB		 10181 return FALSE;
10182}
10183
957c6e41
NC		 10184static void
10185unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
10186 asection * sec,
10187 void * ignore ATTRIBUTE_UNUSED)
10188{
10189 unrecord_section_with_arm_elf_section_data (sec);
10190}
10191
10192static bfd_boolean
10193elf32_arm_close_and_cleanup (bfd * abfd)
10194{
b25e3d87
L		 10195 if (abfd->sections)
10196 bfd_map_over_sections (abfd,
10197 unrecord_section_via_map_over_sections,
10198 NULL);
957c6e41
NC		 10199
10200 return _bfd_elf_close_and_cleanup (abfd);
10201}
10202
b25e3d87
L		 10203static bfd_boolean
10204elf32_arm_bfd_free_cached_info (bfd * abfd)
10205{
10206 if (abfd->sections)
10207 bfd_map_over_sections (abfd,
10208 unrecord_section_via_map_over_sections,
10209 NULL);
10210
10211 return _bfd_free_cached_info (abfd);
10212}
10213
b7693d02
DJ		 10214/* Display STT_ARM_TFUNC symbols as functions. */
10215
10216static void
10217elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
10218 asymbol *asym)
10219{
10220 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
10221
10222 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
10223 elfsym->symbol.flags |= BSF_FUNCTION;
10224}
10225
0beaef2b
PB		 10226
10227/* Mangle thumb function symbols as we read them in. */
10228
8384fb8f 10229static bfd_boolean
0beaef2b
PB		 10230elf32_arm_swap_symbol_in (bfd * abfd,
10231 const void *psrc,
10232 const void *pshn,
10233 Elf_Internal_Sym *dst)
10234{
8384fb8f
AM		 10235 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
10236 return FALSE;
0beaef2b
PB		 10237
10238 /* New EABI objects mark thumb function symbols by setting the low bit of
10239 the address. Turn these into STT_ARM_TFUNC. */
10240 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
10241 && (dst->st_value & 1))
10242 {
10243 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
10244 dst->st_value &= ~(bfd_vma) 1;
10245 }
8384fb8f 10246 return TRUE;
0beaef2b
PB		 10247}
10248
10249
10250/* Mangle thumb function symbols as we write them out. */
10251
10252static void
10253elf32_arm_swap_symbol_out (bfd *abfd,
10254 const Elf_Internal_Sym *src,
10255 void *cdst,
10256 void *shndx)
10257{
10258 Elf_Internal_Sym newsym;
10259
10260 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
10261 of the address set, as per the new EABI. We do this unconditionally
10262 because objcopy does not set the elf header flags until after
10263 it writes out the symbol table. */
10264 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
10265 {
10266 newsym = *src;
10267 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 10268 if (newsym.st_shndx != SHN_UNDEF)
10269 {
10270 /* Do this only for defined symbols. At link type, the static
10271 linker will simulate the work of dynamic linker of resolving
10272 symbols and will carry over the thumbness of found symbols to
10273 the output symbol table. It's not clear how it happens, but
b0fead2b 10274 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 10275 runtime, and writing '1' for them will be confusing for users
10276 and possibly for dynamic linker itself.
10277 */
10278 newsym.st_value |= 1;
10279 }
0beaef2b
PB		 10280
10281 src = &newsym;
10282 }
10283 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
10284}
10285
b294bdf8
MM		 10286/* Add the PT_ARM_EXIDX program header. */
10287
10288static bfd_boolean
10289elf32_arm_modify_segment_map (bfd *abfd,
10290 struct bfd_link_info *info ATTRIBUTE_UNUSED)
10291{
10292 struct elf_segment_map *m;
10293 asection *sec;
10294
10295 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10296 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10297 {
10298 /* If there is already a PT_ARM_EXIDX header, then we do not
10299 want to add another one. This situation arises when running
10300 "strip"; the input binary already has the header. */
10301 m = elf_tdata (abfd)->segment_map;
10302 while (m && m->p_type != PT_ARM_EXIDX)
10303 m = m->next;
10304 if (!m)
10305 {
10306 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
10307 if (m == NULL)
10308 return FALSE;
10309 m->p_type = PT_ARM_EXIDX;
10310 m->count = 1;
10311 m->sections[0] = sec;
10312
10313 m->next = elf_tdata (abfd)->segment_map;
10314 elf_tdata (abfd)->segment_map = m;
10315 }
10316 }
10317
10318 return TRUE;
10319}
10320
10321/* We may add a PT_ARM_EXIDX program header. */
10322
10323static int
a6b96beb
AM		 10324elf32_arm_additional_program_headers (bfd *abfd,
10325 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 10326{
10327 asection *sec;
10328
10329 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10330 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10331 return 1;
10332 else
10333 return 0;
10334}
10335
fcb93ecf
PB		 10336/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
10337static bfd_boolean
10338elf32_arm_is_function_type (unsigned int type)
10339{
10340 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
10341}
10342
0beaef2b
PB		 10343/* We use this to override swap_symbol_in and swap_symbol_out. */
10344const struct elf_size_info elf32_arm_size_info = {
10345 sizeof (Elf32_External_Ehdr),
10346 sizeof (Elf32_External_Phdr),
10347 sizeof (Elf32_External_Shdr),
10348 sizeof (Elf32_External_Rel),
10349 sizeof (Elf32_External_Rela),
10350 sizeof (Elf32_External_Sym),
10351 sizeof (Elf32_External_Dyn),
10352 sizeof (Elf_External_Note),
10353 4,
10354 1,
10355 32, 2,
10356 ELFCLASS32, EV_CURRENT,
10357 bfd_elf32_write_out_phdrs,
10358 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 10359 bfd_elf32_checksum_contents,
0beaef2b
PB		 10360 bfd_elf32_write_relocs,
10361 elf32_arm_swap_symbol_in,
10362 elf32_arm_swap_symbol_out,
10363 bfd_elf32_slurp_reloc_table,
10364 bfd_elf32_slurp_symbol_table,
10365 bfd_elf32_swap_dyn_in,
10366 bfd_elf32_swap_dyn_out,
10367 bfd_elf32_swap_reloc_in,
10368 bfd_elf32_swap_reloc_out,
10369 bfd_elf32_swap_reloca_in,
10370 bfd_elf32_swap_reloca_out
10371};
10372
252b5132
RH		 10373#define ELF_ARCH bfd_arch_arm
10374#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 10375#ifdef __QNXTARGET__
10376#define ELF_MAXPAGESIZE 0x1000
10377#else
f21f3fe0 10378#define ELF_MAXPAGESIZE 0x8000
d0facd1b 10379#endif
b1342370 10380#define ELF_MINPAGESIZE 0x1000
24718e3b 10381#define ELF_COMMONPAGESIZE 0x1000
252b5132 10382
ba93b8ac
DJ		 10383#define bfd_elf32_mkobject elf32_arm_mkobject
10384
99e4ae17
AJ		 10385#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
10386#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 10387#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
10388#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
10389#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
dc810e39 10390#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 10391#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 10392#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 10393#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 10394#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 10395#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 10396#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 10397#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
252b5132
RH		 10398
10399#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
10400#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 10401#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 10402#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
10403#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 10404#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 10405#define elf_backend_write_section elf32_arm_write_section
252b5132 10406#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 10407#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 10408#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
10409#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
10410#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 10411#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 10412#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 10413#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 10414#define elf_backend_object_p elf32_arm_object_p
e16bb312 10415#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 10416#define elf_backend_fake_sections elf32_arm_fake_sections
10417#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 10418#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 10419#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 10420#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 10421#define elf_backend_size_info elf32_arm_size_info
b294bdf8
MM		 10422#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
10423#define elf_backend_additional_program_headers \
10424 elf32_arm_additional_program_headers
4e617b1e
PB		 10425#define elf_backend_output_arch_local_syms \
10426 elf32_arm_output_arch_local_syms
a4fd1a8e
PB		 10427#define elf_backend_begin_write_processing \
10428 elf32_arm_begin_write_processing
fcb93ecf 10429#define elf_backend_is_function_type elf32_arm_is_function_type
252b5132 10430
5e681ec4 10431#define elf_backend_can_refcount 1
252b5132
RH		 10432#define elf_backend_can_gc_sections 1
10433#define elf_backend_plt_readonly 1
10434#define elf_backend_want_got_plt 1
10435#define elf_backend_want_plt_sym 0
4e7fd91e
PB		 10436#define elf_backend_may_use_rel_p 1
10437#define elf_backend_may_use_rela_p 0
10438#define elf_backend_default_use_rela_p 0
252b5132 10439
04f7c78d 10440#define elf_backend_got_header_size 12
04f7c78d 10441
104d59d1
JM		 10442#undef elf_backend_obj_attrs_vendor
10443#define elf_backend_obj_attrs_vendor "aeabi"
10444#undef elf_backend_obj_attrs_section
10445#define elf_backend_obj_attrs_section ".ARM.attributes"
10446#undef elf_backend_obj_attrs_arg_type
10447#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
10448#undef elf_backend_obj_attrs_section_type
10449#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
10450
252b5132 10451#include "elf32-target.h"
7f266840 10452
4e7fd91e
PB		 10453/* VxWorks Targets */
10454
10455#undef TARGET_LITTLE_SYM
10456#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
10457#undef TARGET_LITTLE_NAME
10458#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
10459#undef TARGET_BIG_SYM
10460#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
10461#undef TARGET_BIG_NAME
10462#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
10463
10464/* Like elf32_arm_link_hash_table_create -- but overrides
10465 appropriately for VxWorks. */
10466static struct bfd_link_hash_table *
10467elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
10468{
10469 struct bfd_link_hash_table *ret;
10470
10471 ret = elf32_arm_link_hash_table_create (abfd);
10472 if (ret)
10473 {
10474 struct elf32_arm_link_hash_table *htab
00a97672 10475 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 10476 htab->use_rel = 0;
00a97672 10477 htab->vxworks_p = 1;
4e7fd91e
PB		 10478 }
10479 return ret;
10480}
10481
00a97672
RS		 10482static void
10483elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
10484{
10485 elf32_arm_final_write_processing (abfd, linker);
10486 elf_vxworks_final_write_processing (abfd, linker);
10487}
10488
4e7fd91e
PB		 10489#undef elf32_bed
10490#define elf32_bed elf32_arm_vxworks_bed
10491
10492#undef bfd_elf32_bfd_link_hash_table_create
10493#define bfd_elf32_bfd_link_hash_table_create \
10494 elf32_arm_vxworks_link_hash_table_create
00a97672
RS		 10495#undef elf_backend_add_symbol_hook
10496#define elf_backend_add_symbol_hook \
10497 elf_vxworks_add_symbol_hook
10498#undef elf_backend_final_write_processing
10499#define elf_backend_final_write_processing \
10500 elf32_arm_vxworks_final_write_processing
10501#undef elf_backend_emit_relocs
10502#define elf_backend_emit_relocs \
10503 elf_vxworks_emit_relocs
4e7fd91e
PB		 10504
10505#undef elf_backend_may_use_rel_p
00a97672 10506#define elf_backend_may_use_rel_p 0
4e7fd91e 10507#undef elf_backend_may_use_rela_p
00a97672 10508#define elf_backend_may_use_rela_p 1
4e7fd91e 10509#undef elf_backend_default_use_rela_p
00a97672 10510#define elf_backend_default_use_rela_p 1
00a97672
RS		 10511#undef elf_backend_want_plt_sym
10512#define elf_backend_want_plt_sym 1
10513#undef ELF_MAXPAGESIZE
10514#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 10515
10516#include "elf32-target.h"
10517
10518
7f266840
DJ		 10519/* Symbian OS Targets */
10520
10521#undef TARGET_LITTLE_SYM
10522#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
10523#undef TARGET_LITTLE_NAME
10524#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
10525#undef TARGET_BIG_SYM
10526#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
10527#undef TARGET_BIG_NAME
10528#define TARGET_BIG_NAME "elf32-bigarm-symbian"
10529
10530/* Like elf32_arm_link_hash_table_create -- but overrides
10531 appropriately for Symbian OS. */
10532static struct bfd_link_hash_table *
10533elf32_arm_symbian_link_hash_table_create (bfd *abfd)
10534{
10535 struct bfd_link_hash_table *ret;
10536
10537 ret = elf32_arm_link_hash_table_create (abfd);
10538 if (ret)
10539 {
10540 struct elf32_arm_link_hash_table *htab
10541 = (struct elf32_arm_link_hash_table *)ret;
10542 /* There is no PLT header for Symbian OS. */
10543 htab->plt_header_size = 0;
10544 /* The PLT entries are each three instructions. */
10545 htab->plt_entry_size = 4 * NUM_ELEM (elf32_arm_symbian_plt_entry);
10546 htab->symbian_p = 1;
33bfe774
JB		 10547 /* Symbian uses armv5t or above, so use_blx is always true. */
10548 htab->use_blx = 1;
67687978 10549 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 10550 }
10551 return ret;
10552}
10553
b35d266b 10554static const struct bfd_elf_special_section
551b43fd 10555elf32_arm_symbian_special_sections[] =
7f266840 10556{
5cd3778d
MM		 10557 /* In a BPABI executable, the dynamic linking sections do not go in
10558 the loadable read-only segment. The post-linker may wish to
10559 refer to these sections, but they are not part of the final
10560 program image. */
0112cd26
NC		 10561 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
10562 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
10563 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
10564 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
10565 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 10566 /* These sections do not need to be writable as the SymbianOS
10567 postlinker will arrange things so that no dynamic relocation is
10568 required. */
0112cd26
NC		 10569 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
10570 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
10571 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
10572 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 10573};
10574
c3c76620 10575static void
b34af79c 10576elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 10577 struct bfd_link_info *link_info)
c3c76620
MM		 10578{
10579 /* BPABI objects are never loaded directly by an OS kernel; they are
10580 processed by a postlinker first, into an OS-specific format. If
10581 the D_PAGED bit is set on the file, BFD will align segments on
10582 page boundaries, so that an OS can directly map the file. With
10583 BPABI objects, that just results in wasted space. In addition,
10584 because we clear the D_PAGED bit, map_sections_to_segments will
10585 recognize that the program headers should not be mapped into any
10586 loadable segment. */
10587 abfd->flags &= ~D_PAGED;
a4fd1a8e 10588 elf32_arm_begin_write_processing(abfd, link_info);
c3c76620 10589}
7f266840
DJ		 10590
10591static bfd_boolean
b34af79c 10592elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 10593 struct bfd_link_info *info)
7f266840
DJ		 10594{
10595 struct elf_segment_map *m;
10596 asection *dynsec;
10597
7f266840
DJ		 10598 /* BPABI shared libraries and executables should have a PT_DYNAMIC
10599 segment. However, because the .dynamic section is not marked
10600 with SEC_LOAD, the generic ELF code will not create such a
10601 segment. */
10602 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
10603 if (dynsec)
10604 {
8ded5a0f
AM		 10605 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
10606 if (m->p_type == PT_DYNAMIC)
10607 break;
10608
10609 if (m == NULL)
10610 {
10611 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
10612 m->next = elf_tdata (abfd)->segment_map;
10613 elf_tdata (abfd)->segment_map = m;
10614 }
7f266840
DJ		 10615 }
10616
b294bdf8
MM		 10617 /* Also call the generic arm routine. */
10618 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 10619}
10620
10621#undef elf32_bed
10622#define elf32_bed elf32_arm_symbian_bed
10623
10624/* The dynamic sections are not allocated on SymbianOS; the postlinker
10625 will process them and then discard them. */
10626#undef ELF_DYNAMIC_SEC_FLAGS
10627#define ELF_DYNAMIC_SEC_FLAGS \
10628 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
10629
10630#undef bfd_elf32_bfd_link_hash_table_create
10631#define bfd_elf32_bfd_link_hash_table_create \
10632 elf32_arm_symbian_link_hash_table_create
00a97672 10633#undef elf_backend_add_symbol_hook
7f266840 10634
29ef7005
L		 10635#undef elf_backend_special_sections
10636#define elf_backend_special_sections elf32_arm_symbian_special_sections
7f266840 10637
c3c76620
MM		 10638#undef elf_backend_begin_write_processing
10639#define elf_backend_begin_write_processing \
10640 elf32_arm_symbian_begin_write_processing
00a97672
RS		 10641#undef elf_backend_final_write_processing
10642#define elf_backend_final_write_processing \
10643 elf32_arm_final_write_processing
10644#undef elf_backend_emit_relocs
c3c76620 10645
7f266840
DJ		 10646#undef elf_backend_modify_segment_map
10647#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
10648
10649/* There is no .got section for BPABI objects, and hence no header. */
10650#undef elf_backend_got_header_size
10651#define elf_backend_got_header_size 0
10652
10653/* Similarly, there is no .got.plt section. */
10654#undef elf_backend_want_got_plt
10655#define elf_backend_want_got_plt 0
10656
4e7fd91e 10657#undef elf_backend_may_use_rel_p
00a97672 10658#define elf_backend_may_use_rel_p 1
4e7fd91e 10659#undef elf_backend_may_use_rela_p
00a97672 10660#define elf_backend_may_use_rela_p 0
4e7fd91e 10661#undef elf_backend_default_use_rela_p
00a97672 10662#define elf_backend_default_use_rela_p 0
00a97672
RS		 10663#undef elf_backend_want_plt_sym
10664#define elf_backend_want_plt_sym 0
10665#undef ELF_MAXPAGESIZE
10666#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 10667
7f266840 10668#include "elf32-target.h"
GDB Binutils - Deliverables
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