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2009-08-04 Sandra Loosemore <sandra@codesourcery.com>
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
81694485 3 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
24718e3b 64static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 65
3e6b1042
DJ		 66static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
68 asection *sec,
69 bfd_byte *contents);
70
7f266840
DJ		 71/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
74
c19d1205 75static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 76{
8029a119 77 /* No relocation. */
7f266840
DJ		 78 HOWTO (R_ARM_NONE, /* type */
79 0, /* rightshift */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
81 0, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
88 0, /* src_mask */
89 0, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 HOWTO (R_ARM_PC24, /* type */
93 2, /* rightshift */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
95 24, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
108 0, /* rightshift */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
110 32, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
123 0, /* rightshift */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
125 32, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
c19d1205 136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 137 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 138 0, /* rightshift */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 140 32, /* bitsize */
141 TRUE, /* pc_relative */
7f266840 142 0, /* bitpos */
4962c51a 143 complain_overflow_dont,/* complain_on_overflow */
7f266840 144 bfd_elf_generic_reloc, /* special_function */
4962c51a 145 "R_ARM_LDR_PC_G0", /* name */
7f266840 146 FALSE, /* partial_inplace */
4962c51a
MS		 147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
7f266840
DJ		 150
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
153 0, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 FALSE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
165
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
168 0, /* rightshift */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
170 12, /* bitsize */
171 FALSE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
00a97672
RS		 177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
7f266840
DJ		 179 FALSE), /* pcrel_offset */
180
181 HOWTO (R_ARM_THM_ABS5, /* type */
182 6, /* rightshift */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
184 5, /* bitsize */
185 FALSE, /* pc_relative */
186 0, /* bitpos */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
194
195 /* 8 bit absolute */
196 HOWTO (R_ARM_ABS8, /* type */
197 0, /* rightshift */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
199 8, /* bitsize */
200 FALSE, /* pc_relative */
201 0, /* bitpos */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
209
210 HOWTO (R_ARM_SBREL32, /* type */
211 0, /* rightshift */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
213 32, /* bitsize */
214 FALSE, /* pc_relative */
215 0, /* bitpos */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
223
c19d1205 224 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 225 1, /* rightshift */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 227 25, /* bitsize */
7f266840
DJ		 228 TRUE, /* pc_relative */
229 0, /* bitpos */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
c19d1205 232 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 233 FALSE, /* partial_inplace */
234 0x07ff07ff, /* src_mask */
235 0x07ff07ff, /* dst_mask */
236 TRUE), /* pcrel_offset */
237
238 HOWTO (R_ARM_THM_PC8, /* type */
239 1, /* rightshift */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
241 8, /* bitsize */
242 TRUE, /* pc_relative */
243 0, /* bitpos */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
251
c19d1205 252 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 255 32, /* bitsize */
256 FALSE, /* pc_relative */
7f266840
DJ		 257 0, /* bitpos */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
c19d1205 260 "R_ARM_BREL_ADJ", /* name */
7f266840 261 FALSE, /* partial_inplace */
c19d1205
ZW		 262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
7f266840
DJ		 265
266 HOWTO (R_ARM_SWI24, /* type */
267 0, /* rightshift */
268 0, /* size (0 = byte, 1 = short, 2 = long) */
269 0, /* bitsize */
270 FALSE, /* pc_relative */
271 0, /* bitpos */
272 complain_overflow_signed,/* complain_on_overflow */
273 bfd_elf_generic_reloc, /* special_function */
274 "R_ARM_SWI24", /* name */
275 FALSE, /* partial_inplace */
276 0x00000000, /* src_mask */
277 0x00000000, /* dst_mask */
278 FALSE), /* pcrel_offset */
279
280 HOWTO (R_ARM_THM_SWI8, /* type */
281 0, /* rightshift */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
283 0, /* bitsize */
284 FALSE, /* pc_relative */
285 0, /* bitpos */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
293
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
296 2, /* rightshift */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
298 25, /* bitsize */
299 TRUE, /* pc_relative */
300 0, /* bitpos */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
308
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
311 2, /* rightshift */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
313 22, /* bitsize */
314 TRUE, /* pc_relative */
315 0, /* bitpos */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
320 0x07ff07ff, /* src_mask */
321 0x07ff07ff, /* dst_mask */
322 TRUE), /* pcrel_offset */
323
ba93b8ac 324 /* Dynamic TLS relocations. */
7f266840 325
ba93b8ac
DJ		 326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
327 0, /* rightshift */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
329 32, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
7f266840 339
ba93b8ac
DJ		 340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
341 0, /* rightshift */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
343 32, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
7f266840 353
ba93b8ac
DJ		 354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
7f266840
DJ		 367
368 /* Relocs used in ARM Linux */
369
370 HOWTO (R_ARM_COPY, /* type */
371 0, /* rightshift */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
373 32, /* bitsize */
374 FALSE, /* pc_relative */
375 0, /* bitpos */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
383
384 HOWTO (R_ARM_GLOB_DAT, /* type */
385 0, /* rightshift */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
387 32, /* bitsize */
388 FALSE, /* pc_relative */
389 0, /* bitpos */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
397
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
399 0, /* rightshift */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
401 32, /* bitsize */
402 FALSE, /* pc_relative */
403 0, /* bitpos */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
411
412 HOWTO (R_ARM_RELATIVE, /* type */
413 0, /* rightshift */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
415 32, /* bitsize */
416 FALSE, /* pc_relative */
417 0, /* bitpos */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
425
c19d1205 426 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 427 0, /* rightshift */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
429 32, /* bitsize */
430 FALSE, /* pc_relative */
431 0, /* bitpos */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
c19d1205 434 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
439
440 HOWTO (R_ARM_GOTPC, /* type */
441 0, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 32, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 HOWTO (R_ARM_GOT32, /* type */
455 0, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 32, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 HOWTO (R_ARM_PLT32, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 471 24, /* bitsize */
7f266840
DJ		 472 TRUE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
ce490eda 477 FALSE, /* partial_inplace */
7f266840
DJ		 478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
481
482 HOWTO (R_ARM_CALL, /* type */
483 2, /* rightshift */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
485 24, /* bitsize */
486 TRUE, /* pc_relative */
487 0, /* bitpos */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
495
496 HOWTO (R_ARM_JUMP24, /* type */
497 2, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 24, /* bitsize */
500 TRUE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
509
c19d1205
ZW		 510 HOWTO (R_ARM_THM_JUMP24, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 24, /* bitsize */
514 TRUE, /* pc_relative */
7f266840 515 0, /* bitpos */
c19d1205 516 complain_overflow_signed,/* complain_on_overflow */
7f266840 517 bfd_elf_generic_reloc, /* special_function */
c19d1205 518 "R_ARM_THM_JUMP24", /* name */
7f266840 519 FALSE, /* partial_inplace */
c19d1205
ZW		 520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
7f266840 523
c19d1205 524 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 525 0, /* rightshift */
c19d1205
ZW		 526 2, /* size (0 = byte, 1 = short, 2 = long) */
527 32, /* bitsize */
7f266840
DJ		 528 FALSE, /* pc_relative */
529 0, /* bitpos */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
c19d1205 532 "R_ARM_BASE_ABS", /* name */
7f266840 533 FALSE, /* partial_inplace */
c19d1205
ZW		 534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
7f266840
DJ		 536 FALSE), /* pcrel_offset */
537
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 12, /* bitsize */
542 TRUE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
551
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
553 0, /* rightshift */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
555 12, /* bitsize */
556 TRUE, /* pc_relative */
557 8, /* bitpos */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
565
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
567 0, /* rightshift */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
569 12, /* bitsize */
570 TRUE, /* pc_relative */
571 16, /* bitpos */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
579
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
581 0, /* rightshift */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
583 12, /* bitsize */
584 FALSE, /* pc_relative */
585 0, /* bitpos */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
593
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
595 0, /* rightshift */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
597 8, /* bitsize */
598 FALSE, /* pc_relative */
599 12, /* bitpos */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
607
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
609 0, /* rightshift */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
611 8, /* bitsize */
612 FALSE, /* pc_relative */
613 20, /* bitpos */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
621
622 HOWTO (R_ARM_TARGET1, /* type */
623 0, /* rightshift */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
625 32, /* bitsize */
626 FALSE, /* pc_relative */
627 0, /* bitpos */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
635
636 HOWTO (R_ARM_ROSEGREL32, /* type */
637 0, /* rightshift */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
639 32, /* bitsize */
640 FALSE, /* pc_relative */
641 0, /* bitpos */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
649
650 HOWTO (R_ARM_V4BX, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 32, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_ARM_TARGET2, /* type */
665 0, /* rightshift */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
667 32, /* bitsize */
668 FALSE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 HOWTO (R_ARM_PREL31, /* type */
679 0, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 31, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
c19d1205
ZW		 691
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
693 0, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
39623e12
PB		 702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
c19d1205
ZW		 704 FALSE), /* pcrel_offset */
705
706 HOWTO (R_ARM_MOVT_ABS, /* type */
707 0, /* rightshift */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
709 16, /* bitsize */
710 FALSE, /* pc_relative */
711 0, /* bitpos */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
39623e12
PB		 716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
c19d1205
ZW		 718 FALSE), /* pcrel_offset */
719
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
721 0, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 16, /* bitsize */
724 TRUE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
39623e12
PB		 730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
c19d1205
ZW		 732 TRUE), /* pcrel_offset */
733
734 HOWTO (R_ARM_MOVT_PREL, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 16, /* bitsize */
738 TRUE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
39623e12
PB		 744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
c19d1205
ZW		 746 TRUE), /* pcrel_offset */
747
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 16, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
763 0, /* rightshift */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
765 16, /* bitsize */
766 FALSE, /* pc_relative */
767 0, /* bitpos */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
775
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
777 0, /* rightshift */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
779 16, /* bitsize */
780 TRUE, /* pc_relative */
781 0, /* bitpos */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
789
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
791 0, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
793 16, /* bitsize */
794 TRUE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
803
804 HOWTO (R_ARM_THM_JUMP19, /* type */
805 1, /* rightshift */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
807 19, /* bitsize */
808 TRUE, /* pc_relative */
809 0, /* bitpos */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
817
818 HOWTO (R_ARM_THM_JUMP6, /* type */
819 1, /* rightshift */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
821 6, /* bitsize */
822 TRUE, /* pc_relative */
823 0, /* bitpos */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
831
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
836 0, /* rightshift */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
838 13, /* bitsize */
839 TRUE, /* pc_relative */
840 0, /* bitpos */
2cab6cc3 841 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
2cab6cc3
MS		 845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
c19d1205
ZW		 847 TRUE), /* pcrel_offset */
848
849 HOWTO (R_ARM_THM_PC12, /* type */
850 0, /* rightshift */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
852 13, /* bitsize */
853 TRUE, /* pc_relative */
854 0, /* bitpos */
2cab6cc3 855 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
2cab6cc3
MS		 859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
c19d1205
ZW		 861 TRUE), /* pcrel_offset */
862
863 HOWTO (R_ARM_ABS32_NOI, /* type */
864 0, /* rightshift */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
866 32, /* bitsize */
867 FALSE, /* pc_relative */
868 0, /* bitpos */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
876
877 HOWTO (R_ARM_REL32_NOI, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 TRUE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
7f266840 890
4962c51a
MS		 891 /* Group relocations. */
892
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
894 0, /* rightshift */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
896 32, /* bitsize */
897 TRUE, /* pc_relative */
898 0, /* bitpos */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
906
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 32, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 TRUE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
934
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 32, /* bitsize */
939 TRUE, /* pc_relative */
940 0, /* bitpos */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
948
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
950 0, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 32, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
964 0, /* rightshift */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
966 32, /* bitsize */
967 TRUE, /* pc_relative */
968 0, /* bitpos */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
976
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
978 0, /* rightshift */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
980 32, /* bitsize */
981 TRUE, /* pc_relative */
982 0, /* bitpos */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
990
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
992 0, /* rightshift */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
994 32, /* bitsize */
995 TRUE, /* pc_relative */
996 0, /* bitpos */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1004
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1006 0, /* rightshift */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1008 32, /* bitsize */
1009 TRUE, /* pc_relative */
1010 0, /* bitpos */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1018
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1020 0, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 32, /* bitsize */
1023 TRUE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1032
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1034 0, /* rightshift */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1036 32, /* bitsize */
1037 TRUE, /* pc_relative */
1038 0, /* bitpos */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1046
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1048 0, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 32, /* bitsize */
1051 TRUE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1062 0, /* rightshift */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1064 32, /* bitsize */
1065 TRUE, /* pc_relative */
1066 0, /* bitpos */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1074
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1076 0, /* rightshift */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1078 32, /* bitsize */
1079 TRUE, /* pc_relative */
1080 0, /* bitpos */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1088
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1090 0, /* rightshift */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1092 32, /* bitsize */
1093 TRUE, /* pc_relative */
1094 0, /* bitpos */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1102
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 TRUE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1116
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 TRUE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1130
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1132 0, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 32, /* bitsize */
1135 TRUE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1144
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1146 0, /* rightshift */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1148 32, /* bitsize */
1149 TRUE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1158
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
1163 TRUE, /* pc_relative */
1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1172
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1174 0, /* rightshift */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1176 32, /* bitsize */
1177 TRUE, /* pc_relative */
1178 0, /* bitpos */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1186
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1188 0, /* rightshift */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1190 32, /* bitsize */
1191 TRUE, /* pc_relative */
1192 0, /* bitpos */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1200
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1202 0, /* rightshift */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1204 32, /* bitsize */
1205 TRUE, /* pc_relative */
1206 0, /* bitpos */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1214
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1216 0, /* rightshift */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1218 32, /* bitsize */
1219 TRUE, /* pc_relative */
1220 0, /* bitpos */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1228
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1230 0, /* rightshift */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1232 32, /* bitsize */
1233 TRUE, /* pc_relative */
1234 0, /* bitpos */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1242
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1244 0, /* rightshift */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1246 32, /* bitsize */
1247 TRUE, /* pc_relative */
1248 0, /* bitpos */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1256
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1258 0, /* rightshift */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1260 32, /* bitsize */
1261 TRUE, /* pc_relative */
1262 0, /* bitpos */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1270
1271 /* End of group relocations. */
c19d1205 1272
c19d1205
ZW		 1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1274 0, /* rightshift */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1276 16, /* bitsize */
1277 FALSE, /* pc_relative */
1278 0, /* bitpos */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1286
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1288 0, /* rightshift */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1290 16, /* bitsize */
1291 FALSE, /* pc_relative */
1292 0, /* bitpos */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1300
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1302 0, /* rightshift */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1304 16, /* bitsize */
1305 FALSE, /* pc_relative */
1306 0, /* bitpos */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1314
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1316 0, /* rightshift */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1318 16, /* bitsize */
1319 FALSE, /* pc_relative */
1320 0, /* bitpos */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1328
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1330 0, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 16, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 16, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
8029a119 1357 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1358 EMPTY_HOWTO (91),
1359 EMPTY_HOWTO (92),
1360 EMPTY_HOWTO (93),
1361
1362 HOWTO (R_ARM_PLT32_ABS, /* type */
1363 0, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 32, /* bitsize */
1366 FALSE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont,/* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
1370 "R_ARM_PLT32_ABS", /* name */
1371 FALSE, /* partial_inplace */
1372 0xffffffff, /* src_mask */
1373 0xffffffff, /* dst_mask */
1374 FALSE), /* pcrel_offset */
1375
1376 HOWTO (R_ARM_GOT_ABS, /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 32, /* bitsize */
1380 FALSE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont,/* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 "R_ARM_GOT_ABS", /* name */
1385 FALSE, /* partial_inplace */
1386 0xffffffff, /* src_mask */
1387 0xffffffff, /* dst_mask */
1388 FALSE), /* pcrel_offset */
1389
1390 HOWTO (R_ARM_GOT_PREL, /* type */
1391 0, /* rightshift */
1392 2, /* size (0 = byte, 1 = short, 2 = long) */
1393 32, /* bitsize */
1394 TRUE, /* pc_relative */
1395 0, /* bitpos */
1396 complain_overflow_dont, /* complain_on_overflow */
1397 bfd_elf_generic_reloc, /* special_function */
1398 "R_ARM_GOT_PREL", /* name */
1399 FALSE, /* partial_inplace */
1400 0xffffffff, /* src_mask */
1401 0xffffffff, /* dst_mask */
1402 TRUE), /* pcrel_offset */
1403
1404 HOWTO (R_ARM_GOT_BREL12, /* type */
1405 0, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 12, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_bitfield,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_ARM_GOT_BREL12", /* name */
1413 FALSE, /* partial_inplace */
1414 0x00000fff, /* src_mask */
1415 0x00000fff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417
1418 HOWTO (R_ARM_GOTOFF12, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_bitfield,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_ARM_GOTOFF12", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431
1432 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1433
1434 /* GNU extension to record C++ vtable member usage */
1435 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1436 0, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1438 0, /* bitsize */
ba93b8ac
DJ		 1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
c19d1205
ZW		 1441 complain_overflow_dont, /* complain_on_overflow */
1442 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1443 "R_ARM_GNU_VTENTRY", /* name */
1444 FALSE, /* partial_inplace */
1445 0, /* src_mask */
1446 0, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
1449 /* GNU extension to record C++ vtable hierarchy */
1450 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1451 0, /* rightshift */
1452 2, /* size (0 = byte, 1 = short, 2 = long) */
1453 0, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont, /* complain_on_overflow */
1457 NULL, /* special_function */
1458 "R_ARM_GNU_VTINHERIT", /* name */
1459 FALSE, /* partial_inplace */
1460 0, /* src_mask */
1461 0, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463
1464 HOWTO (R_ARM_THM_JUMP11, /* type */
1465 1, /* rightshift */
1466 1, /* size (0 = byte, 1 = short, 2 = long) */
1467 11, /* bitsize */
1468 TRUE, /* pc_relative */
1469 0, /* bitpos */
1470 complain_overflow_signed, /* complain_on_overflow */
1471 bfd_elf_generic_reloc, /* special_function */
1472 "R_ARM_THM_JUMP11", /* name */
1473 FALSE, /* partial_inplace */
1474 0x000007ff, /* src_mask */
1475 0x000007ff, /* dst_mask */
1476 TRUE), /* pcrel_offset */
1477
1478 HOWTO (R_ARM_THM_JUMP8, /* type */
1479 1, /* rightshift */
1480 1, /* size (0 = byte, 1 = short, 2 = long) */
1481 8, /* bitsize */
1482 TRUE, /* pc_relative */
1483 0, /* bitpos */
1484 complain_overflow_signed, /* complain_on_overflow */
1485 bfd_elf_generic_reloc, /* special_function */
1486 "R_ARM_THM_JUMP8", /* name */
1487 FALSE, /* partial_inplace */
1488 0x000000ff, /* src_mask */
1489 0x000000ff, /* dst_mask */
1490 TRUE), /* pcrel_offset */
ba93b8ac 1491
c19d1205
ZW		 1492 /* TLS relocations */
1493 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 32, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1500 NULL, /* special_function */
1501 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1502 TRUE, /* partial_inplace */
1503 0xffffffff, /* src_mask */
1504 0xffffffff, /* dst_mask */
c19d1205 1505 FALSE), /* pcrel_offset */
ba93b8ac 1506
ba93b8ac
DJ		 1507 HOWTO (R_ARM_TLS_LDM32, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 32, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_bitfield,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_ARM_TLS_LDM32", /* name */
1516 TRUE, /* partial_inplace */
1517 0xffffffff, /* src_mask */
1518 0xffffffff, /* dst_mask */
c19d1205 1519 FALSE), /* pcrel_offset */
ba93b8ac 1520
c19d1205 1521 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1522 0, /* rightshift */
1523 2, /* size (0 = byte, 1 = short, 2 = long) */
1524 32, /* bitsize */
1525 FALSE, /* pc_relative */
1526 0, /* bitpos */
1527 complain_overflow_bitfield,/* complain_on_overflow */
1528 bfd_elf_generic_reloc, /* special_function */
c19d1205 1529 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1530 TRUE, /* partial_inplace */
1531 0xffffffff, /* src_mask */
1532 0xffffffff, /* dst_mask */
c19d1205 1533 FALSE), /* pcrel_offset */
ba93b8ac 1534
ba93b8ac
DJ		 1535 HOWTO (R_ARM_TLS_IE32, /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 32, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_bitfield,/* complain_on_overflow */
1542 NULL, /* special_function */
1543 "R_ARM_TLS_IE32", /* name */
1544 TRUE, /* partial_inplace */
1545 0xffffffff, /* src_mask */
1546 0xffffffff, /* dst_mask */
c19d1205 1547 FALSE), /* pcrel_offset */
7f266840 1548
c19d1205 1549 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1550 0, /* rightshift */
1551 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1552 32, /* bitsize */
7f266840
DJ		 1553 FALSE, /* pc_relative */
1554 0, /* bitpos */
c19d1205
ZW		 1555 complain_overflow_bitfield,/* complain_on_overflow */
1556 bfd_elf_generic_reloc, /* special_function */
1557 "R_ARM_TLS_LE32", /* name */
1558 TRUE, /* partial_inplace */
1559 0xffffffff, /* src_mask */
1560 0xffffffff, /* dst_mask */
1561 FALSE), /* pcrel_offset */
7f266840 1562
c19d1205
ZW		 1563 HOWTO (R_ARM_TLS_LDO12, /* type */
1564 0, /* rightshift */
1565 2, /* size (0 = byte, 1 = short, 2 = long) */
1566 12, /* bitsize */
1567 FALSE, /* pc_relative */
7f266840 1568 0, /* bitpos */
c19d1205 1569 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1570 bfd_elf_generic_reloc, /* special_function */
c19d1205 1571 "R_ARM_TLS_LDO12", /* name */
7f266840 1572 FALSE, /* partial_inplace */
c19d1205
ZW		 1573 0x00000fff, /* src_mask */
1574 0x00000fff, /* dst_mask */
1575 FALSE), /* pcrel_offset */
7f266840 1576
c19d1205
ZW		 1577 HOWTO (R_ARM_TLS_LE12, /* type */
1578 0, /* rightshift */
1579 2, /* size (0 = byte, 1 = short, 2 = long) */
1580 12, /* bitsize */
1581 FALSE, /* pc_relative */
7f266840 1582 0, /* bitpos */
c19d1205 1583 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1584 bfd_elf_generic_reloc, /* special_function */
c19d1205 1585 "R_ARM_TLS_LE12", /* name */
7f266840 1586 FALSE, /* partial_inplace */
c19d1205
ZW		 1587 0x00000fff, /* src_mask */
1588 0x00000fff, /* dst_mask */
1589 FALSE), /* pcrel_offset */
7f266840 1590
c19d1205 1591 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1592 0, /* rightshift */
1593 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1594 12, /* bitsize */
1595 FALSE, /* pc_relative */
7f266840 1596 0, /* bitpos */
c19d1205 1597 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1598 bfd_elf_generic_reloc, /* special_function */
c19d1205 1599 "R_ARM_TLS_IE12GP", /* name */
7f266840 1600 FALSE, /* partial_inplace */
c19d1205
ZW		 1601 0x00000fff, /* src_mask */
1602 0x00000fff, /* dst_mask */
1603 FALSE), /* pcrel_offset */
1604};
1605
1606/* 112-127 private relocations
1607 128 R_ARM_ME_TOO, obsolete
1608 129-255 unallocated in AAELF.
7f266840 1609
c19d1205
ZW		 1610 249-255 extended, currently unused, relocations: */
1611
4962c51a 1612static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1613{
1614 HOWTO (R_ARM_RREL32, /* type */
1615 0, /* rightshift */
1616 0, /* size (0 = byte, 1 = short, 2 = long) */
1617 0, /* bitsize */
1618 FALSE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_dont,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_ARM_RREL32", /* name */
1623 FALSE, /* partial_inplace */
1624 0, /* src_mask */
1625 0, /* dst_mask */
1626 FALSE), /* pcrel_offset */
1627
1628 HOWTO (R_ARM_RABS32, /* type */
1629 0, /* rightshift */
1630 0, /* size (0 = byte, 1 = short, 2 = long) */
1631 0, /* bitsize */
1632 FALSE, /* pc_relative */
1633 0, /* bitpos */
1634 complain_overflow_dont,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_ARM_RABS32", /* name */
1637 FALSE, /* partial_inplace */
1638 0, /* src_mask */
1639 0, /* dst_mask */
1640 FALSE), /* pcrel_offset */
1641
1642 HOWTO (R_ARM_RPC24, /* type */
1643 0, /* rightshift */
1644 0, /* size (0 = byte, 1 = short, 2 = long) */
1645 0, /* bitsize */
1646 FALSE, /* pc_relative */
1647 0, /* bitpos */
1648 complain_overflow_dont,/* complain_on_overflow */
1649 bfd_elf_generic_reloc, /* special_function */
1650 "R_ARM_RPC24", /* name */
1651 FALSE, /* partial_inplace */
1652 0, /* src_mask */
1653 0, /* dst_mask */
1654 FALSE), /* pcrel_offset */
1655
1656 HOWTO (R_ARM_RBASE, /* type */
1657 0, /* rightshift */
1658 0, /* size (0 = byte, 1 = short, 2 = long) */
1659 0, /* bitsize */
1660 FALSE, /* pc_relative */
1661 0, /* bitpos */
1662 complain_overflow_dont,/* complain_on_overflow */
1663 bfd_elf_generic_reloc, /* special_function */
1664 "R_ARM_RBASE", /* name */
1665 FALSE, /* partial_inplace */
1666 0, /* src_mask */
1667 0, /* dst_mask */
1668 FALSE) /* pcrel_offset */
1669};
1670
1671static reloc_howto_type *
1672elf32_arm_howto_from_type (unsigned int r_type)
1673{
906e58ca 1674 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1675 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1676
c19d1205 1677 if (r_type >= R_ARM_RREL32
906e58ca 1678 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1679 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1680
c19d1205 1681 return NULL;
7f266840
DJ		 1682}
1683
1684static void
1685elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1686 Elf_Internal_Rela * elf_reloc)
1687{
1688 unsigned int r_type;
1689
1690 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1691 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1692}
1693
1694struct elf32_arm_reloc_map
1695 {
1696 bfd_reloc_code_real_type bfd_reloc_val;
1697 unsigned char elf_reloc_val;
1698 };
1699
1700/* All entries in this list must also be present in elf32_arm_howto_table. */
1701static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1702 {
1703 {BFD_RELOC_NONE, R_ARM_NONE},
1704 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1705 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1706 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1707 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1708 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1709 {BFD_RELOC_32, R_ARM_ABS32},
1710 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1711 {BFD_RELOC_8, R_ARM_ABS8},
1712 {BFD_RELOC_16, R_ARM_ABS16},
1713 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1714 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1715 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1719 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1720 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1721 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1722 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1723 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1724 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1726 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1727 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1728 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1729 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1730 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1731 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1732 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1733 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1734 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1735 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1736 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1737 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1738 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1739 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1740 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1741 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1742 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1743 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1744 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1745 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1746 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1747 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1748 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1749 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1750 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1751 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1752 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1753 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1754 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1755 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1756 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1757 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1758 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1759 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1760 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1761 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1762 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1763 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1764 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1765 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1766 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1767 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1768 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1769 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1770 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1771 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1772 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1773 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1774 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1775 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1776 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1777 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1778 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1779 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1780 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1781 };
1782
1783static reloc_howto_type *
f1c71a59
ZW		 1784elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1785 bfd_reloc_code_real_type code)
7f266840
DJ		 1786{
1787 unsigned int i;
8029a119 1788
906e58ca 1789 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1790 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1791 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1792
c19d1205 1793 return NULL;
7f266840
DJ		 1794}
1795
157090f7
AM		 1796static reloc_howto_type *
1797elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1798 const char *r_name)
1799{
1800 unsigned int i;
1801
906e58ca 1802 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1803 if (elf32_arm_howto_table_1[i].name != NULL
1804 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1805 return &elf32_arm_howto_table_1[i];
1806
906e58ca 1807 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1808 if (elf32_arm_howto_table_2[i].name != NULL
1809 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1810 return &elf32_arm_howto_table_2[i];
1811
1812 return NULL;
1813}
1814
906e58ca
NC		 1815/* Support for core dump NOTE sections. */
1816
7f266840 1817static bfd_boolean
f1c71a59 1818elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1819{
1820 int offset;
1821 size_t size;
1822
1823 switch (note->descsz)
1824 {
1825 default:
1826 return FALSE;
1827
8029a119 1828 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1829 /* pr_cursig */
1830 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1831
1832 /* pr_pid */
1833 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1834
1835 /* pr_reg */
1836 offset = 72;
1837 size = 72;
1838
1839 break;
1840 }
1841
1842 /* Make a ".reg/999" section. */
1843 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1844 size, note->descpos + offset);
1845}
1846
1847static bfd_boolean
f1c71a59 1848elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1849{
1850 switch (note->descsz)
1851 {
1852 default:
1853 return FALSE;
1854
8029a119 1855 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1856 elf_tdata (abfd)->core_program
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1858 elf_tdata (abfd)->core_command
1859 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1860 }
1861
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
7f266840
DJ		 1865 {
1866 char *command = elf_tdata (abfd)->core_command;
1867 int n = strlen (command);
1868
1869 if (0 < n && command[n - 1] == ' ')
1870 command[n - 1] = '\0';
1871 }
1872
1873 return TRUE;
1874}
1875
1876#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1877#define TARGET_LITTLE_NAME "elf32-littlearm"
1878#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1879#define TARGET_BIG_NAME "elf32-bigarm"
1880
1881#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1882#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1883
252b5132
RH		 1884typedef unsigned long int insn32;
1885typedef unsigned short int insn16;
1886
3a4a14e9
PB		 1887/* In lieu of proper flags, assume all EABIv4 or later objects are
1888 interworkable. */
57e8b36a 1889#define INTERWORK_FLAG(abfd) \
3a4a14e9 1890 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1891 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1892 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1893
252b5132
RH		 1894/* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
9b485d32 1897 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1898#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1899#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1900
1901#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1902#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1903
c7b8f16e
JB		 1904#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1905#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1906
845b51d6
PB		 1907#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1908#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1909
7413f23f
DJ		 1910#define STUB_ENTRY_NAME "__%s_veneer"
1911
252b5132
RH		 1912/* The name of the dynamic interpreter. This is put in the .interp
1913 section. */
1914#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1915
5e681ec4
PB		 1916#ifdef FOUR_WORD_PLT
1917
252b5132
RH		 1918/* The first entry in a procedure linkage table looks like
1919 this. It is set up so that any shared library function that is
59f2c4e7 1920 called before the relocation has been set up calls the dynamic
9b485d32 1921 linker first. */
e5a52504 1922static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1923 {
1924 0xe52de004, /* str lr, [sp, #-4]! */
1925 0xe59fe010, /* ldr lr, [pc, #16] */
1926 0xe08fe00e, /* add lr, pc, lr */
1927 0xe5bef008, /* ldr pc, [lr, #8]! */
1928 };
1929
1930/* Subsequent entries in a procedure linkage table look like
1931 this. */
e5a52504 1932static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1933 {
1934 0xe28fc600, /* add ip, pc, #NN */
1935 0xe28cca00, /* add ip, ip, #NN */
1936 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1937 0x00000000, /* unused */
1938 };
1939
1940#else
1941
5e681ec4
PB		 1942/* The first entry in a procedure linkage table looks like
1943 this. It is set up so that any shared library function that is
1944 called before the relocation has been set up calls the dynamic
1945 linker first. */
e5a52504 1946static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1947 {
5e681ec4
PB		 1948 0xe52de004, /* str lr, [sp, #-4]! */
1949 0xe59fe004, /* ldr lr, [pc, #4] */
1950 0xe08fe00e, /* add lr, pc, lr */
1951 0xe5bef008, /* ldr pc, [lr, #8]! */
1952 0x00000000, /* &GOT[0] - . */
917583ad 1953 };
252b5132
RH		 1954
1955/* Subsequent entries in a procedure linkage table look like
1956 this. */
e5a52504 1957static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1958 {
1959 0xe28fc600, /* add ip, pc, #0xNN00000 */
1960 0xe28cca00, /* add ip, ip, #0xNN000 */
1961 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1962 };
1963
1964#endif
252b5132 1965
00a97672
RS		 1966/* The format of the first entry in the procedure linkage table
1967 for a VxWorks executable. */
1968static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1969 {
1970 0xe52dc008, /* str ip,[sp,#-8]! */
1971 0xe59fc000, /* ldr ip,[pc] */
1972 0xe59cf008, /* ldr pc,[ip,#8] */
1973 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1974 };
1975
1976/* The format of subsequent entries in a VxWorks executable. */
1977static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1978 {
1979 0xe59fc000, /* ldr ip,[pc] */
1980 0xe59cf000, /* ldr pc,[ip] */
1981 0x00000000, /* .long @got */
1982 0xe59fc000, /* ldr ip,[pc] */
1983 0xea000000, /* b _PLT */
1984 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1985 };
1986
1987/* The format of entries in a VxWorks shared library. */
1988static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1989 {
1990 0xe59fc000, /* ldr ip,[pc] */
1991 0xe79cf009, /* ldr pc,[ip,r9] */
1992 0x00000000, /* .long @got */
1993 0xe59fc000, /* ldr ip,[pc] */
1994 0xe599f008, /* ldr pc,[r9,#8] */
1995 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1996 };
1997
b7693d02
DJ		 1998/* An initial stub used if the PLT entry is referenced from Thumb code. */
1999#define PLT_THUMB_STUB_SIZE 4
2000static const bfd_vma elf32_arm_plt_thumb_stub [] =
2001 {
2002 0x4778, /* bx pc */
2003 0x46c0 /* nop */
2004 };
2005
e5a52504
MM		 2006/* The entries in a PLT when using a DLL-based target with multiple
2007 address spaces. */
906e58ca 2008static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2009 {
83a358aa 2010 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2011 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2012 };
2013
906e58ca
NC		 2014#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2015#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2016#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2017#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2018#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2019#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2020
461a49ca
DJ		 2021enum stub_insn_type
2022 {
2023 THUMB16_TYPE = 1,
2024 THUMB32_TYPE,
2025 ARM_TYPE,
2026 DATA_TYPE
2027 };
2028
48229727
JB		 2029#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2030/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2031 is inserted in arm_build_one_stub(). */
2032#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2033#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2034#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2035#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2036#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2037#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2038
2039typedef struct
2040{
2041 bfd_vma data;
2042 enum stub_insn_type type;
ebe24dd4 2043 unsigned int r_type;
461a49ca
DJ		 2044 int reloc_addend;
2045} insn_sequence;
2046
fea2b4d6
CL		 2047/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2048 to reach the stub if necessary. */
461a49ca 2049static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2050 {
461a49ca
DJ		 2051 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2052 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2053 };
2054
fea2b4d6
CL		 2055/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2056 available. */
461a49ca 2057static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2058 {
461a49ca
DJ		 2059 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2060 ARM_INSN(0xe12fff1c), /* bx ip */
2061 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2062 };
2063
d3626fb0 2064/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2065static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2066 {
461a49ca
DJ		 2067 THUMB16_INSN(0xb401), /* push {r0} */
2068 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2069 THUMB16_INSN(0x4684), /* mov ip, r0 */
2070 THUMB16_INSN(0xbc01), /* pop {r0} */
2071 THUMB16_INSN(0x4760), /* bx ip */
2072 THUMB16_INSN(0xbf00), /* nop */
2073 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2074 };
2075
d3626fb0
CL		 2076/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2077 allowed. */
2078static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2079 {
2080 THUMB16_INSN(0x4778), /* bx pc */
2081 THUMB16_INSN(0x46c0), /* nop */
2082 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2083 ARM_INSN(0xe12fff1c), /* bx ip */
2084 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2085 };
2086
fea2b4d6
CL		 2087/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2088 available. */
461a49ca 2089static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2090 {
461a49ca
DJ		 2091 THUMB16_INSN(0x4778), /* bx pc */
2092 THUMB16_INSN(0x46c0), /* nop */
2093 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2094 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2095 };
2096
fea2b4d6
CL		 2097/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2098 one, when the destination is close enough. */
461a49ca 2099static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2100 {
461a49ca
DJ		 2101 THUMB16_INSN(0x4778), /* bx pc */
2102 THUMB16_INSN(0x46c0), /* nop */
2103 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2104 };
2105
cf3eccff 2106/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2107 blx to reach the stub if necessary. */
cf3eccff 2108static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2109 {
461a49ca
DJ		 2110 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2111 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2112 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2113 };
2114
cf3eccff
DJ		 2115/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2116 blx to reach the stub if necessary. We can not add into pc;
2117 it is not guaranteed to mode switch (different in ARMv6 and
2118 ARMv7). */
2119static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2120 {
2121 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2122 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2123 ARM_INSN(0xe12fff1c), /* bx ip */
2124 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2125 };
2126
ebe24dd4
CL		 2127/* V4T ARM -> ARM long branch stub, PIC. */
2128static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2129 {
2130 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2131 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2132 ARM_INSN(0xe12fff1c), /* bx ip */
2133 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2134 };
2135
2136/* V4T Thumb -> ARM long branch stub, PIC. */
2137static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2138 {
2139 THUMB16_INSN(0x4778), /* bx pc */
2140 THUMB16_INSN(0x46c0), /* nop */
2141 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2142 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2143 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2144 };
2145
d3626fb0
CL		 2146/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2147 architectures. */
ebe24dd4
CL		 2148static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2149 {
2150 THUMB16_INSN(0xb401), /* push {r0} */
2151 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2152 THUMB16_INSN(0x46fc), /* mov ip, pc */
2153 THUMB16_INSN(0x4484), /* add ip, r0 */
2154 THUMB16_INSN(0xbc01), /* pop {r0} */
2155 THUMB16_INSN(0x4760), /* bx ip */
2156 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2157 };
2158
d3626fb0
CL		 2159/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2160 allowed. */
2161static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2162 {
2163 THUMB16_INSN(0x4778), /* bx pc */
2164 THUMB16_INSN(0x46c0), /* nop */
2165 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2166 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2167 ARM_INSN(0xe12fff1c), /* bx ip */
2168 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2169 };
2170
48229727
JB		 2171/* Cortex-A8 erratum-workaround stubs. */
2172
2173/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2174 can't use a conditional branch to reach this stub). */
2175
2176static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2177 {
2178 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2179 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2180 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2181 };
2182
2183/* Stub used for b.w and bl.w instructions. */
2184
2185static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2186 {
2187 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2188 };
2189
2190static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2191 {
2192 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2193 };
2194
2195/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2196 instruction (which switches to ARM mode) to point to this stub. Jump to the
2197 real destination using an ARM-mode branch. */
2198
2199static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2200 {
2201 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2202 };
2203
906e58ca
NC		 2204/* Section name for stubs is the associated section name plus this
2205 string. */
2206#define STUB_SUFFIX ".stub"
2207
738a79f6
CL		 2208/* One entry per long/short branch stub defined above. */
2209#define DEF_STUBS \
2210 DEF_STUB(long_branch_any_any) \
2211 DEF_STUB(long_branch_v4t_arm_thumb) \
2212 DEF_STUB(long_branch_thumb_only) \
2213 DEF_STUB(long_branch_v4t_thumb_thumb) \
2214 DEF_STUB(long_branch_v4t_thumb_arm) \
2215 DEF_STUB(short_branch_v4t_thumb_arm) \
2216 DEF_STUB(long_branch_any_arm_pic) \
2217 DEF_STUB(long_branch_any_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2220 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2221 DEF_STUB(long_branch_thumb_only_pic) \
2222 DEF_STUB(a8_veneer_b_cond) \
2223 DEF_STUB(a8_veneer_b) \
2224 DEF_STUB(a8_veneer_bl) \
2225 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2226
2227#define DEF_STUB(x) arm_stub_##x,
2228enum elf32_arm_stub_type {
906e58ca 2229 arm_stub_none,
738a79f6
CL		 2230 DEF_STUBS
2231};
2232#undef DEF_STUB
2233
2234typedef struct
2235{
2236 const insn_sequence* template;
2237 int template_size;
2238} stub_def;
2239
2240#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2241static const stub_def stub_definitions[] = {
2242 {NULL, 0},
2243 DEF_STUBS
906e58ca
NC		 2244};
2245
2246struct elf32_arm_stub_hash_entry
2247{
2248 /* Base hash table entry structure. */
2249 struct bfd_hash_entry root;
2250
2251 /* The stub section. */
2252 asection *stub_sec;
2253
2254 /* Offset within stub_sec of the beginning of this stub. */
2255 bfd_vma stub_offset;
2256
2257 /* Given the symbol's value and its section we can determine its final
2258 value when building the stubs (so the stub knows where to jump). */
2259 bfd_vma target_value;
2260 asection *target_section;
2261
48229727
JB		 2262 /* Offset to apply to relocation referencing target_value. */
2263 bfd_vma target_addend;
2264
2265 /* The instruction which caused this stub to be generated (only valid for
2266 Cortex-A8 erratum workaround stubs at present). */
2267 unsigned long orig_insn;
2268
461a49ca 2269 /* The stub type. */
906e58ca 2270 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2271 /* Its encoding size in bytes. */
2272 int stub_size;
2273 /* Its template. */
2274 const insn_sequence *stub_template;
2275 /* The size of the template (number of entries). */
2276 int stub_template_size;
906e58ca
NC		 2277
2278 /* The symbol table entry, if any, that this was derived from. */
2279 struct elf32_arm_link_hash_entry *h;
2280
2281 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2282 unsigned char st_type;
2283
2284 /* Where this stub is being called from, or, in the case of combined
2285 stub sections, the first input section in the group. */
2286 asection *id_sec;
7413f23f
DJ		 2287
2288 /* The name for the local symbol at the start of this stub. The
2289 stub name in the hash table has to be unique; this does not, so
2290 it can be friendlier. */
2291 char *output_name;
906e58ca
NC		 2292};
2293
e489d0ae
PB		 2294/* Used to build a map of a section. This is required for mixed-endian
2295 code/data. */
2296
2297typedef struct elf32_elf_section_map
2298{
2299 bfd_vma vma;
2300 char type;
2301}
2302elf32_arm_section_map;
2303
c7b8f16e
JB		 2304/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2305
2306typedef enum
2307{
2308 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2309 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2310 VFP11_ERRATUM_ARM_VENEER,
2311 VFP11_ERRATUM_THUMB_VENEER
2312}
2313elf32_vfp11_erratum_type;
2314
2315typedef struct elf32_vfp11_erratum_list
2316{
2317 struct elf32_vfp11_erratum_list *next;
2318 bfd_vma vma;
2319 union
2320 {
2321 struct
2322 {
2323 struct elf32_vfp11_erratum_list *veneer;
2324 unsigned int vfp_insn;
2325 } b;
2326 struct
2327 {
2328 struct elf32_vfp11_erratum_list *branch;
2329 unsigned int id;
2330 } v;
2331 } u;
2332 elf32_vfp11_erratum_type type;
2333}
2334elf32_vfp11_erratum_list;
2335
2468f9c9
PB		 2336typedef enum
2337{
2338 DELETE_EXIDX_ENTRY,
2339 INSERT_EXIDX_CANTUNWIND_AT_END
2340}
2341arm_unwind_edit_type;
2342
2343/* A (sorted) list of edits to apply to an unwind table. */
2344typedef struct arm_unwind_table_edit
2345{
2346 arm_unwind_edit_type type;
2347 /* Note: we sometimes want to insert an unwind entry corresponding to a
2348 section different from the one we're currently writing out, so record the
2349 (text) section this edit relates to here. */
2350 asection *linked_section;
2351 unsigned int index;
2352 struct arm_unwind_table_edit *next;
2353}
2354arm_unwind_table_edit;
2355
8e3de13a 2356typedef struct _arm_elf_section_data
e489d0ae 2357{
2468f9c9 2358 /* Information about mapping symbols. */
e489d0ae 2359 struct bfd_elf_section_data elf;
8e3de13a 2360 unsigned int mapcount;
c7b8f16e 2361 unsigned int mapsize;
e489d0ae 2362 elf32_arm_section_map *map;
2468f9c9 2363 /* Information about CPU errata. */
c7b8f16e
JB		 2364 unsigned int erratumcount;
2365 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2366 /* Information about unwind tables. */
2367 union
2368 {
2369 /* Unwind info attached to a text section. */
2370 struct
2371 {
2372 asection *arm_exidx_sec;
2373 } text;
2374
2375 /* Unwind info attached to an .ARM.exidx section. */
2376 struct
2377 {
2378 arm_unwind_table_edit *unwind_edit_list;
2379 arm_unwind_table_edit *unwind_edit_tail;
2380 } exidx;
2381 } u;
8e3de13a
NC		 2382}
2383_arm_elf_section_data;
e489d0ae
PB		 2384
2385#define elf32_arm_section_data(sec) \
8e3de13a 2386 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2387
48229727
JB		 2388/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2389 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2390 so may be created multiple times: we use an array of these entries whilst
2391 relaxing which we can refresh easily, then create stubs for each potentially
2392 erratum-triggering instruction once we've settled on a solution. */
2393
2394struct a8_erratum_fix {
2395 bfd *input_bfd;
2396 asection *section;
2397 bfd_vma offset;
2398 bfd_vma addend;
2399 unsigned long orig_insn;
2400 char *stub_name;
2401 enum elf32_arm_stub_type stub_type;
2402};
2403
2404/* A table of relocs applied to branches which might trigger Cortex-A8
2405 erratum. */
2406
2407struct a8_erratum_reloc {
2408 bfd_vma from;
2409 bfd_vma destination;
2410 unsigned int r_type;
2411 unsigned char st_type;
2412 const char *sym_name;
2413 bfd_boolean non_a8_stub;
2414};
2415
ba93b8ac
DJ		 2416/* The size of the thread control block. */
2417#define TCB_SIZE 8
2418
0ffa91dd 2419struct elf_arm_obj_tdata
ba93b8ac
DJ		 2420{
2421 struct elf_obj_tdata root;
2422
2423 /* tls_type for each local got entry. */
2424 char *local_got_tls_type;
ee065d83 2425
bf21ed78
MS		 2426 /* Zero to warn when linking objects with incompatible enum sizes. */
2427 int no_enum_size_warning;
a9dc9481
JM		 2428
2429 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2430 int no_wchar_size_warning;
ba93b8ac
DJ		 2431};
2432
0ffa91dd
NC		 2433#define elf_arm_tdata(bfd) \
2434 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2435
0ffa91dd
NC		 2436#define elf32_arm_local_got_tls_type(bfd) \
2437 (elf_arm_tdata (bfd)->local_got_tls_type)
2438
2439#define is_arm_elf(bfd) \
2440 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2441 && elf_tdata (bfd) != NULL \
2442 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2443
2444static bfd_boolean
2445elf32_arm_mkobject (bfd *abfd)
2446{
0ffa91dd
NC		 2447 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2448 ARM_ELF_TDATA);
ba93b8ac
DJ		 2449}
2450
252b5132
RH		 2451/* The ARM linker needs to keep track of the number of relocs that it
2452 decides to copy in check_relocs for each symbol. This is so that
2453 it can discard PC relative relocs if it doesn't need them when
2454 linking with -Bsymbolic. We store the information in a field
2455 extending the regular ELF linker hash table. */
2456
ba93b8ac
DJ		 2457/* This structure keeps track of the number of relocs we have copied
2458 for a given symbol. */
5e681ec4 2459struct elf32_arm_relocs_copied
917583ad
NC		 2460 {
2461 /* Next section. */
5e681ec4 2462 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2463 /* A section in dynobj. */
2464 asection * section;
2465 /* Number of relocs copied in this section. */
2466 bfd_size_type count;
ba93b8ac
DJ		 2467 /* Number of PC-relative relocs copied in this section. */
2468 bfd_size_type pc_count;
917583ad 2469 };
252b5132 2470
ba93b8ac
DJ		 2471#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2472
ba96a88f 2473/* Arm ELF linker hash entry. */
252b5132 2474struct elf32_arm_link_hash_entry
917583ad
NC		 2475 {
2476 struct elf_link_hash_entry root;
252b5132 2477
917583ad 2478 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2479 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2480
2481 /* We reference count Thumb references to a PLT entry separately,
2482 so that we can emit the Thumb trampoline only if needed. */
2483 bfd_signed_vma plt_thumb_refcount;
2484
bd97cb95
DJ		 2485 /* Some references from Thumb code may be eliminated by BL->BLX
2486 conversion, so record them separately. */
2487 bfd_signed_vma plt_maybe_thumb_refcount;
2488
b7693d02
DJ		 2489 /* Since PLT entries have variable size if the Thumb prologue is
2490 used, we need to record the index into .got.plt instead of
2491 recomputing it from the PLT offset. */
2492 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2493
2494#define GOT_UNKNOWN 0
2495#define GOT_NORMAL 1
2496#define GOT_TLS_GD 2
2497#define GOT_TLS_IE 4
2498 unsigned char tls_type;
a4fd1a8e
PB		 2499
2500 /* The symbol marking the real symbol location for exported thumb
2501 symbols with Arm stubs. */
2502 struct elf_link_hash_entry *export_glue;
906e58ca 2503
da5938a2 2504 /* A pointer to the most recently used stub hash entry against this
8029a119 2505 symbol. */
da5938a2 2506 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2507 };
252b5132 2508
252b5132 2509/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2510#define elf32_arm_link_hash_traverse(table, func, info) \
2511 (elf_link_hash_traverse \
2512 (&(table)->root, \
b7693d02 2513 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2514 (info)))
2515
2516/* Get the ARM elf linker hash table from a link_info structure. */
2517#define elf32_arm_hash_table(info) \
2518 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2519
906e58ca
NC		 2520#define arm_stub_hash_lookup(table, string, create, copy) \
2521 ((struct elf32_arm_stub_hash_entry *) \
2522 bfd_hash_lookup ((table), (string), (create), (copy)))
2523
9b485d32 2524/* ARM ELF linker hash table. */
252b5132 2525struct elf32_arm_link_hash_table
906e58ca
NC		 2526{
2527 /* The main hash table. */
2528 struct elf_link_hash_table root;
252b5132 2529
906e58ca
NC		 2530 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2531 bfd_size_type thumb_glue_size;
252b5132 2532
906e58ca
NC		 2533 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2534 bfd_size_type arm_glue_size;
252b5132 2535
906e58ca
NC		 2536 /* The size in bytes of section containing the ARMv4 BX veneers. */
2537 bfd_size_type bx_glue_size;
845b51d6 2538
906e58ca
NC		 2539 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2540 veneer has been populated. */
2541 bfd_vma bx_glue_offset[15];
845b51d6 2542
906e58ca
NC		 2543 /* The size in bytes of the section containing glue for VFP11 erratum
2544 veneers. */
2545 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2546
48229727
JB		 2547 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2548 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2549 elf32_arm_write_section(). */
2550 struct a8_erratum_fix *a8_erratum_fixes;
2551 unsigned int num_a8_erratum_fixes;
2552
906e58ca
NC		 2553 /* An arbitrary input BFD chosen to hold the glue sections. */
2554 bfd * bfd_of_glue_owner;
ba96a88f 2555
906e58ca
NC		 2556 /* Nonzero to output a BE8 image. */
2557 int byteswap_code;
e489d0ae 2558
906e58ca
NC		 2559 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2560 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2561 int target1_is_rel;
9c504268 2562
906e58ca
NC		 2563 /* The relocation to use for R_ARM_TARGET2 relocations. */
2564 int target2_reloc;
eb043451 2565
906e58ca
NC		 2566 /* 0 = Ignore R_ARM_V4BX.
2567 1 = Convert BX to MOV PC.
2568 2 = Generate v4 interworing stubs. */
2569 int fix_v4bx;
319850b4 2570
48229727
JB		 2571 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2572 int fix_cortex_a8;
2573
906e58ca
NC		 2574 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2575 int use_blx;
33bfe774 2576
906e58ca
NC		 2577 /* What sort of code sequences we should look for which may trigger the
2578 VFP11 denorm erratum. */
2579 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2580
906e58ca
NC		 2581 /* Global counter for the number of fixes we have emitted. */
2582 int num_vfp11_fixes;
c7b8f16e 2583
906e58ca
NC		 2584 /* Nonzero to force PIC branch veneers. */
2585 int pic_veneer;
27e55c4d 2586
906e58ca
NC		 2587 /* The number of bytes in the initial entry in the PLT. */
2588 bfd_size_type plt_header_size;
e5a52504 2589
906e58ca
NC		 2590 /* The number of bytes in the subsequent PLT etries. */
2591 bfd_size_type plt_entry_size;
e5a52504 2592
906e58ca
NC		 2593 /* True if the target system is VxWorks. */
2594 int vxworks_p;
00a97672 2595
906e58ca
NC		 2596 /* True if the target system is Symbian OS. */
2597 int symbian_p;
e5a52504 2598
906e58ca
NC		 2599 /* True if the target uses REL relocations. */
2600 int use_rel;
4e7fd91e 2601
906e58ca
NC		 2602 /* Short-cuts to get to dynamic linker sections. */
2603 asection *sgot;
2604 asection *sgotplt;
2605 asection *srelgot;
2606 asection *splt;
2607 asection *srelplt;
2608 asection *sdynbss;
2609 asection *srelbss;
5e681ec4 2610
906e58ca
NC		 2611 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2612 asection *srelplt2;
00a97672 2613
906e58ca
NC		 2614 /* Data for R_ARM_TLS_LDM32 relocations. */
2615 union
2616 {
2617 bfd_signed_vma refcount;
2618 bfd_vma offset;
2619 } tls_ldm_got;
b7693d02 2620
87d72d41
AM		 2621 /* Small local sym cache. */
2622 struct sym_cache sym_cache;
906e58ca
NC		 2623
2624 /* For convenience in allocate_dynrelocs. */
2625 bfd * obfd;
2626
2627 /* The stub hash table. */
2628 struct bfd_hash_table stub_hash_table;
2629
2630 /* Linker stub bfd. */
2631 bfd *stub_bfd;
2632
2633 /* Linker call-backs. */
2634 asection * (*add_stub_section) (const char *, asection *);
2635 void (*layout_sections_again) (void);
2636
2637 /* Array to keep track of which stub sections have been created, and
2638 information on stub grouping. */
2639 struct map_stub
2640 {
2641 /* This is the section to which stubs in the group will be
2642 attached. */
2643 asection *link_sec;
2644 /* The stub section. */
2645 asection *stub_sec;
2646 } *stub_group;
2647
2648 /* Assorted information used by elf32_arm_size_stubs. */
2649 unsigned int bfd_count;
2650 int top_index;
2651 asection **input_list;
2652};
252b5132 2653
780a67af
NC		 2654/* Create an entry in an ARM ELF linker hash table. */
2655
2656static struct bfd_hash_entry *
57e8b36a
NC		 2657elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2658 struct bfd_hash_table * table,
2659 const char * string)
780a67af
NC		 2660{
2661 struct elf32_arm_link_hash_entry * ret =
2662 (struct elf32_arm_link_hash_entry *) entry;
2663
2664 /* Allocate the structure if it has not already been allocated by a
2665 subclass. */
906e58ca 2666 if (ret == NULL)
57e8b36a
NC		 2667 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2668 if (ret == NULL)
780a67af
NC		 2669 return (struct bfd_hash_entry *) ret;
2670
2671 /* Call the allocation method of the superclass. */
2672 ret = ((struct elf32_arm_link_hash_entry *)
2673 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2674 table, string));
57e8b36a 2675 if (ret != NULL)
b7693d02
DJ		 2676 {
2677 ret->relocs_copied = NULL;
ba93b8ac 2678 ret->tls_type = GOT_UNKNOWN;
b7693d02 2679 ret->plt_thumb_refcount = 0;
bd97cb95 2680 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2681 ret->plt_got_offset = -1;
a4fd1a8e 2682 ret->export_glue = NULL;
906e58ca
NC		 2683
2684 ret->stub_cache = NULL;
b7693d02 2685 }
780a67af
NC		 2686
2687 return (struct bfd_hash_entry *) ret;
2688}
2689
906e58ca
NC		 2690/* Initialize an entry in the stub hash table. */
2691
2692static struct bfd_hash_entry *
2693stub_hash_newfunc (struct bfd_hash_entry *entry,
2694 struct bfd_hash_table *table,
2695 const char *string)
2696{
2697 /* Allocate the structure if it has not already been allocated by a
2698 subclass. */
2699 if (entry == NULL)
2700 {
2701 entry = bfd_hash_allocate (table,
2702 sizeof (struct elf32_arm_stub_hash_entry));
2703 if (entry == NULL)
2704 return entry;
2705 }
2706
2707 /* Call the allocation method of the superclass. */
2708 entry = bfd_hash_newfunc (entry, table, string);
2709 if (entry != NULL)
2710 {
2711 struct elf32_arm_stub_hash_entry *eh;
2712
2713 /* Initialize the local fields. */
2714 eh = (struct elf32_arm_stub_hash_entry *) entry;
2715 eh->stub_sec = NULL;
2716 eh->stub_offset = 0;
2717 eh->target_value = 0;
2718 eh->target_section = NULL;
cedfb179
DK		 2719 eh->target_addend = 0;
2720 eh->orig_insn = 0;
906e58ca 2721 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2722 eh->stub_size = 0;
2723 eh->stub_template = NULL;
2724 eh->stub_template_size = 0;
906e58ca
NC		 2725 eh->h = NULL;
2726 eh->id_sec = NULL;
d8d2f433 2727 eh->output_name = NULL;
906e58ca
NC		 2728 }
2729
2730 return entry;
2731}
2732
00a97672 2733/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2734 shortcuts to them in our hash table. */
2735
2736static bfd_boolean
57e8b36a 2737create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2738{
2739 struct elf32_arm_link_hash_table *htab;
2740
e5a52504
MM		 2741 htab = elf32_arm_hash_table (info);
2742 /* BPABI objects never have a GOT, or associated sections. */
2743 if (htab->symbian_p)
2744 return TRUE;
2745
5e681ec4
PB		 2746 if (! _bfd_elf_create_got_section (dynobj, info))
2747 return FALSE;
2748
5e681ec4
PB		 2749 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2750 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2751 if (!htab->sgot || !htab->sgotplt)
2752 abort ();
2753
64e77c6d
L		 2754 htab->srelgot = bfd_get_section_by_name (dynobj,
2755 RELOC_SECTION (htab, ".got"));
2756 if (htab->srelgot == NULL)
5e681ec4
PB		 2757 return FALSE;
2758 return TRUE;
2759}
2760
00a97672
RS		 2761/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2762 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2763 hash table. */
2764
2765static bfd_boolean
57e8b36a 2766elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2767{
2768 struct elf32_arm_link_hash_table *htab;
2769
2770 htab = elf32_arm_hash_table (info);
2771 if (!htab->sgot && !create_got_section (dynobj, info))
2772 return FALSE;
2773
2774 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2775 return FALSE;
2776
2777 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2778 htab->srelplt = bfd_get_section_by_name (dynobj,
2779 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2780 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2781 if (!info->shared)
00a97672
RS		 2782 htab->srelbss = bfd_get_section_by_name (dynobj,
2783 RELOC_SECTION (htab, ".bss"));
2784
2785 if (htab->vxworks_p)
2786 {
2787 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2788 return FALSE;
2789
2790 if (info->shared)
2791 {
2792 htab->plt_header_size = 0;
2793 htab->plt_entry_size
2794 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2795 }
2796 else
2797 {
2798 htab->plt_header_size
2799 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2800 htab->plt_entry_size
2801 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2802 }
2803 }
5e681ec4 2804
906e58ca 2805 if (!htab->splt
e5a52504
MM		 2806 || !htab->srelplt
2807 || !htab->sdynbss
5e681ec4
PB		 2808 || (!info->shared && !htab->srelbss))
2809 abort ();
2810
2811 return TRUE;
2812}
2813
906e58ca
NC		 2814/* Copy the extra info we tack onto an elf_link_hash_entry. */
2815
2816static void
2817elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2818 struct elf_link_hash_entry *dir,
2819 struct elf_link_hash_entry *ind)
2820{
2821 struct elf32_arm_link_hash_entry *edir, *eind;
2822
2823 edir = (struct elf32_arm_link_hash_entry *) dir;
2824 eind = (struct elf32_arm_link_hash_entry *) ind;
2825
2826 if (eind->relocs_copied != NULL)
2827 {
2828 if (edir->relocs_copied != NULL)
2829 {
2830 struct elf32_arm_relocs_copied **pp;
2831 struct elf32_arm_relocs_copied *p;
2832
2833 /* Add reloc counts against the indirect sym to the direct sym
2834 list. Merge any entries against the same section. */
2835 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2836 {
2837 struct elf32_arm_relocs_copied *q;
2838
2839 for (q = edir->relocs_copied; q != NULL; q = q->next)
2840 if (q->section == p->section)
2841 {
2842 q->pc_count += p->pc_count;
2843 q->count += p->count;
2844 *pp = p->next;
2845 break;
2846 }
2847 if (q == NULL)
2848 pp = &p->next;
2849 }
2850 *pp = edir->relocs_copied;
2851 }
2852
2853 edir->relocs_copied = eind->relocs_copied;
2854 eind->relocs_copied = NULL;
2855 }
2856
2857 if (ind->root.type == bfd_link_hash_indirect)
2858 {
2859 /* Copy over PLT info. */
2860 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2861 eind->plt_thumb_refcount = 0;
2862 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2863 eind->plt_maybe_thumb_refcount = 0;
2864
2865 if (dir->got.refcount <= 0)
2866 {
2867 edir->tls_type = eind->tls_type;
2868 eind->tls_type = GOT_UNKNOWN;
2869 }
2870 }
2871
2872 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2873}
2874
2875/* Create an ARM elf linker hash table. */
2876
2877static struct bfd_link_hash_table *
2878elf32_arm_link_hash_table_create (bfd *abfd)
2879{
2880 struct elf32_arm_link_hash_table *ret;
2881 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2882
2883 ret = bfd_malloc (amt);
2884 if (ret == NULL)
2885 return NULL;
2886
2887 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2888 elf32_arm_link_hash_newfunc,
2889 sizeof (struct elf32_arm_link_hash_entry)))
2890 {
2891 free (ret);
2892 return NULL;
2893 }
2894
2895 ret->sgot = NULL;
2896 ret->sgotplt = NULL;
2897 ret->srelgot = NULL;
2898 ret->splt = NULL;
2899 ret->srelplt = NULL;
2900 ret->sdynbss = NULL;
2901 ret->srelbss = NULL;
2902 ret->srelplt2 = NULL;
2903 ret->thumb_glue_size = 0;
2904 ret->arm_glue_size = 0;
2905 ret->bx_glue_size = 0;
2906 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2907 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2908 ret->vfp11_erratum_glue_size = 0;
2909 ret->num_vfp11_fixes = 0;
48229727 2910 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2911 ret->bfd_of_glue_owner = NULL;
2912 ret->byteswap_code = 0;
2913 ret->target1_is_rel = 0;
2914 ret->target2_reloc = R_ARM_NONE;
2915#ifdef FOUR_WORD_PLT
2916 ret->plt_header_size = 16;
2917 ret->plt_entry_size = 16;
2918#else
2919 ret->plt_header_size = 20;
2920 ret->plt_entry_size = 12;
2921#endif
2922 ret->fix_v4bx = 0;
2923 ret->use_blx = 0;
2924 ret->vxworks_p = 0;
2925 ret->symbian_p = 0;
2926 ret->use_rel = 1;
87d72d41 2927 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2928 ret->obfd = abfd;
2929 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2930 ret->stub_bfd = NULL;
2931 ret->add_stub_section = NULL;
2932 ret->layout_sections_again = NULL;
2933 ret->stub_group = NULL;
2934 ret->bfd_count = 0;
2935 ret->top_index = 0;
2936 ret->input_list = NULL;
906e58ca
NC		 2937
2938 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2939 sizeof (struct elf32_arm_stub_hash_entry)))
2940 {
2941 free (ret);
2942 return NULL;
2943 }
2944
2945 return &ret->root.root;
2946}
2947
2948/* Free the derived linker hash table. */
2949
2950static void
2951elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2952{
2953 struct elf32_arm_link_hash_table *ret
2954 = (struct elf32_arm_link_hash_table *) hash;
2955
2956 bfd_hash_table_free (&ret->stub_hash_table);
2957 _bfd_generic_link_hash_table_free (hash);
2958}
2959
2960/* Determine if we're dealing with a Thumb only architecture. */
2961
2962static bfd_boolean
2963using_thumb_only (struct elf32_arm_link_hash_table *globals)
2964{
2965 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2966 Tag_CPU_arch);
2967 int profile;
2968
2969 if (arch != TAG_CPU_ARCH_V7)
2970 return FALSE;
2971
2972 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2973 Tag_CPU_arch_profile);
2974
2975 return profile == 'M';
2976}
2977
2978/* Determine if we're dealing with a Thumb-2 object. */
2979
2980static bfd_boolean
2981using_thumb2 (struct elf32_arm_link_hash_table *globals)
2982{
2983 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2984 Tag_CPU_arch);
2985 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2986}
2987
f4ac8484
DJ		 2988static bfd_boolean
2989arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
2990{
2991 switch (stub_type)
2992 {
fea2b4d6
CL		 2993 case arm_stub_long_branch_thumb_only:
2994 case arm_stub_long_branch_v4t_thumb_arm:
2995 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 2996 case arm_stub_long_branch_v4t_thumb_arm_pic:
2997 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 2998 return TRUE;
2999 case arm_stub_none:
3000 BFD_FAIL ();
3001 return FALSE;
3002 break;
3003 default:
3004 return FALSE;
3005 }
3006}
3007
906e58ca
NC		 3008/* Determine the type of stub needed, if any, for a call. */
3009
3010static enum elf32_arm_stub_type
3011arm_type_of_stub (struct bfd_link_info *info,
3012 asection *input_sec,
3013 const Elf_Internal_Rela *rel,
3014 unsigned char st_type,
3015 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3016 bfd_vma destination,
3017 asection *sym_sec,
3018 bfd *input_bfd,
3019 const char *name)
906e58ca
NC		 3020{
3021 bfd_vma location;
3022 bfd_signed_vma branch_offset;
3023 unsigned int r_type;
3024 struct elf32_arm_link_hash_table * globals;
3025 int thumb2;
3026 int thumb_only;
3027 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3028 int use_plt = 0;
906e58ca 3029
da5938a2 3030 /* We don't know the actual type of destination in case it is of
8029a119 3031 type STT_SECTION: give up. */
da5938a2
NC		 3032 if (st_type == STT_SECTION)
3033 return stub_type;
3034
906e58ca
NC		 3035 globals = elf32_arm_hash_table (info);
3036
3037 thumb_only = using_thumb_only (globals);
3038
3039 thumb2 = using_thumb2 (globals);
3040
3041 /* Determine where the call point is. */
3042 location = (input_sec->output_offset
3043 + input_sec->output_section->vma
3044 + rel->r_offset);
3045
3046 branch_offset = (bfd_signed_vma)(destination - location);
3047
3048 r_type = ELF32_R_TYPE (rel->r_info);
3049
5fa9e92f 3050 /* Keep a simpler condition, for the sake of clarity. */
329dcd78 3051 if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3052 {
3053 use_plt = 1;
3054 /* Note when dealing with PLT entries: the main PLT stub is in
3055 ARM mode, so if the branch is in Thumb mode, another
3056 Thumb->ARM stub will be inserted later just before the ARM
3057 PLT stub. We don't take this extra distance into account
3058 here, because if a long branch stub is needed, we'll add a
3059 Thumb->Arm one and branch directly to the ARM PLT entry
3060 because it avoids spreading offset corrections in several
3061 places. */
3062 }
906e58ca 3063
155d87d7 3064 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3065 {
5fa9e92f
CL		 3066 /* Handle cases where:
3067 - this call goes too far (different Thumb/Thumb2 max
3068 distance)
155d87d7
CL		 3069 - it's a Thumb->Arm call and blx is not available, or it's a
3070 Thumb->Arm branch (not bl). A stub is needed in this case,
3071 but only if this call is not through a PLT entry. Indeed,
3072 PLT stubs handle mode switching already.
5fa9e92f 3073 */
906e58ca
NC		 3074 if ((!thumb2
3075 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3076 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3077 || (thumb2
3078 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3079 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3080 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3081 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3082 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3083 && !use_plt))
906e58ca
NC		 3084 {
3085 if (st_type == STT_ARM_TFUNC)
3086 {
3087 /* Thumb to thumb. */
3088 if (!thumb_only)
3089 {
3090 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3091 /* PIC stubs. */
155d87d7
CL		 3092 ? ((globals->use_blx
3093 && (r_type ==R_ARM_THM_CALL))
3094 /* V5T and above. Stub starts with ARM code, so
3095 we must be able to switch mode before
3096 reaching it, which is only possible for 'bl'
3097 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3098 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3099 /* On V4T, use Thumb code only. */
d3626fb0 3100 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3101
3102 /* non-PIC stubs. */
155d87d7
CL		 3103 : ((globals->use_blx
3104 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3105 /* V5T and above. */
3106 ? arm_stub_long_branch_any_any
3107 /* V4T. */
d3626fb0 3108 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3109 }
3110 else
3111 {
3112 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3113 /* PIC stub. */
3114 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3115 /* non-PIC stub. */
3116 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3117 }
3118 }
3119 else
3120 {
3121 /* Thumb to arm. */
c820be07
NC		 3122 if (sym_sec != NULL
3123 && sym_sec->owner != NULL
3124 && !INTERWORK_FLAG (sym_sec->owner))
3125 {
3126 (*_bfd_error_handler)
3127 (_("%B(%s): warning: interworking not enabled.\n"
3128 " first occurrence: %B: Thumb call to ARM"),
3129 sym_sec->owner, input_bfd, name);
3130 }
3131
906e58ca 3132 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3133 /* PIC stubs. */
155d87d7
CL		 3134 ? ((globals->use_blx
3135 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3136 /* V5T and above. */
cf3eccff 3137 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3138 /* V4T PIC stub. */
3139 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3140
3141 /* non-PIC stubs. */
155d87d7
CL		 3142 : ((globals->use_blx
3143 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3144 /* V5T and above. */
3145 ? arm_stub_long_branch_any_any
3146 /* V4T. */
3147 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3148
3149 /* Handle v4t short branches. */
fea2b4d6 3150 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3151 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3152 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3153 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3154 }
3155 }
3156 }
155d87d7 3157 else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
906e58ca
NC		 3158 {
3159 if (st_type == STT_ARM_TFUNC)
3160 {
3161 /* Arm to thumb. */
c820be07
NC		 3162
3163 if (sym_sec != NULL
3164 && sym_sec->owner != NULL
3165 && !INTERWORK_FLAG (sym_sec->owner))
3166 {
3167 (*_bfd_error_handler)
3168 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3169 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3170 sym_sec->owner, input_bfd, name);
3171 }
3172
3173 /* We have an extra 2-bytes reach because of
3174 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3175 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3176 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3177 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3178 || (r_type == R_ARM_JUMP24)
3179 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3180 {
3181 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3182 /* PIC stubs. */
ebe24dd4
CL		 3183 ? ((globals->use_blx)
3184 /* V5T and above. */
3185 ? arm_stub_long_branch_any_thumb_pic
3186 /* V4T stub. */
3187 : arm_stub_long_branch_v4t_arm_thumb_pic)
3188
c2b4a39d
CL		 3189 /* non-PIC stubs. */
3190 : ((globals->use_blx)
3191 /* V5T and above. */
3192 ? arm_stub_long_branch_any_any
3193 /* V4T. */
3194 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3195 }
3196 }
3197 else
3198 {
3199 /* Arm to arm. */
3200 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3201 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3202 {
3203 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3204 /* PIC stubs. */
cf3eccff 3205 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3206 /* non-PIC stubs. */
fea2b4d6 3207 : arm_stub_long_branch_any_any;
906e58ca
NC		 3208 }
3209 }
3210 }
3211
3212 return stub_type;
3213}
3214
3215/* Build a name for an entry in the stub hash table. */
3216
3217static char *
3218elf32_arm_stub_name (const asection *input_section,
3219 const asection *sym_sec,
3220 const struct elf32_arm_link_hash_entry *hash,
3221 const Elf_Internal_Rela *rel)
3222{
3223 char *stub_name;
3224 bfd_size_type len;
3225
3226 if (hash)
3227 {
3228 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
3229 stub_name = bfd_malloc (len);
3230 if (stub_name != NULL)
3231 sprintf (stub_name, "%08x_%s+%x",
3232 input_section->id & 0xffffffff,
3233 hash->root.root.root.string,
3234 (int) rel->r_addend & 0xffffffff);
3235 }
3236 else
3237 {
3238 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
3239 stub_name = bfd_malloc (len);
3240 if (stub_name != NULL)
3241 sprintf (stub_name, "%08x_%x:%x+%x",
3242 input_section->id & 0xffffffff,
3243 sym_sec->id & 0xffffffff,
3244 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3245 (int) rel->r_addend & 0xffffffff);
3246 }
3247
3248 return stub_name;
3249}
3250
3251/* Look up an entry in the stub hash. Stub entries are cached because
3252 creating the stub name takes a bit of time. */
3253
3254static struct elf32_arm_stub_hash_entry *
3255elf32_arm_get_stub_entry (const asection *input_section,
3256 const asection *sym_sec,
3257 struct elf_link_hash_entry *hash,
3258 const Elf_Internal_Rela *rel,
3259 struct elf32_arm_link_hash_table *htab)
3260{
3261 struct elf32_arm_stub_hash_entry *stub_entry;
3262 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3263 const asection *id_sec;
3264
3265 if ((input_section->flags & SEC_CODE) == 0)
3266 return NULL;
3267
3268 /* If this input section is part of a group of sections sharing one
3269 stub section, then use the id of the first section in the group.
3270 Stub names need to include a section id, as there may well be
3271 more than one stub used to reach say, printf, and we need to
3272 distinguish between them. */
3273 id_sec = htab->stub_group[input_section->id].link_sec;
3274
3275 if (h != NULL && h->stub_cache != NULL
3276 && h->stub_cache->h == h
3277 && h->stub_cache->id_sec == id_sec)
3278 {
3279 stub_entry = h->stub_cache;
3280 }
3281 else
3282 {
3283 char *stub_name;
3284
3285 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
3286 if (stub_name == NULL)
3287 return NULL;
3288
3289 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3290 stub_name, FALSE, FALSE);
3291 if (h != NULL)
3292 h->stub_cache = stub_entry;
3293
3294 free (stub_name);
3295 }
3296
3297 return stub_entry;
3298}
3299
48229727
JB		 3300/* Find or create a stub section. Returns a pointer to the stub section, and
3301 the section to which the stub section will be attached (in *LINK_SEC_P).
3302 LINK_SEC_P may be NULL. */
906e58ca 3303
48229727
JB		 3304static asection *
3305elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3306 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3307{
3308 asection *link_sec;
3309 asection *stub_sec;
906e58ca
NC		 3310
3311 link_sec = htab->stub_group[section->id].link_sec;
3312 stub_sec = htab->stub_group[section->id].stub_sec;
3313 if (stub_sec == NULL)
3314 {
3315 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3316 if (stub_sec == NULL)
3317 {
3318 size_t namelen;
3319 bfd_size_type len;
3320 char *s_name;
3321
3322 namelen = strlen (link_sec->name);
3323 len = namelen + sizeof (STUB_SUFFIX);
3324 s_name = bfd_alloc (htab->stub_bfd, len);
3325 if (s_name == NULL)
3326 return NULL;
3327
3328 memcpy (s_name, link_sec->name, namelen);
3329 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3330 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3331 if (stub_sec == NULL)
3332 return NULL;
3333 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3334 }
3335 htab->stub_group[section->id].stub_sec = stub_sec;
3336 }
48229727
JB		 3337
3338 if (link_sec_p)
3339 *link_sec_p = link_sec;
3340
3341 return stub_sec;
3342}
3343
3344/* Add a new stub entry to the stub hash. Not all fields of the new
3345 stub entry are initialised. */
3346
3347static struct elf32_arm_stub_hash_entry *
3348elf32_arm_add_stub (const char *stub_name,
3349 asection *section,
3350 struct elf32_arm_link_hash_table *htab)
3351{
3352 asection *link_sec;
3353 asection *stub_sec;
3354 struct elf32_arm_stub_hash_entry *stub_entry;
3355
3356 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3357 if (stub_sec == NULL)
3358 return NULL;
906e58ca
NC		 3359
3360 /* Enter this entry into the linker stub hash table. */
3361 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3362 TRUE, FALSE);
3363 if (stub_entry == NULL)
3364 {
3365 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3366 section->owner,
3367 stub_name);
3368 return NULL;
3369 }
3370
3371 stub_entry->stub_sec = stub_sec;
3372 stub_entry->stub_offset = 0;
3373 stub_entry->id_sec = link_sec;
3374
906e58ca
NC		 3375 return stub_entry;
3376}
3377
3378/* Store an Arm insn into an output section not processed by
3379 elf32_arm_write_section. */
3380
3381static void
8029a119
NC		 3382put_arm_insn (struct elf32_arm_link_hash_table * htab,
3383 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3384{
3385 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3386 bfd_putl32 (val, ptr);
3387 else
3388 bfd_putb32 (val, ptr);
3389}
3390
3391/* Store a 16-bit Thumb insn into an output section not processed by
3392 elf32_arm_write_section. */
3393
3394static void
8029a119
NC		 3395put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3396 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3397{
3398 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3399 bfd_putl16 (val, ptr);
3400 else
3401 bfd_putb16 (val, ptr);
3402}
3403
48229727
JB		 3404static bfd_reloc_status_type elf32_arm_final_link_relocate
3405 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3406 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3407 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3408
906e58ca
NC		 3409static bfd_boolean
3410arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3411 void * in_arg)
3412{
48229727 3413#define MAXRELOCS 2
906e58ca
NC		 3414 struct elf32_arm_stub_hash_entry *stub_entry;
3415 struct bfd_link_info *info;
3416 struct elf32_arm_link_hash_table *htab;
3417 asection *stub_sec;
3418 bfd *stub_bfd;
3419 bfd_vma stub_addr;
3420 bfd_byte *loc;
3421 bfd_vma sym_value;
3422 int template_size;
3423 int size;
461a49ca 3424 const insn_sequence *template;
906e58ca
NC		 3425 int i;
3426 struct elf32_arm_link_hash_table * globals;
48229727
JB		 3427 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3428 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3429 int nrelocs = 0;
906e58ca
NC		 3430
3431 /* Massage our args to the form they really have. */
3432 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3433 info = (struct bfd_link_info *) in_arg;
3434
3435 globals = elf32_arm_hash_table (info);
3436
3437 htab = elf32_arm_hash_table (info);
3438 stub_sec = stub_entry->stub_sec;
3439
3440 /* Make a note of the offset within the stubs for this entry. */
3441 stub_entry->stub_offset = stub_sec->size;
3442 loc = stub_sec->contents + stub_entry->stub_offset;
3443
3444 stub_bfd = stub_sec->owner;
3445
3446 /* This is the address of the start of the stub. */
3447 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3448 + stub_entry->stub_offset;
3449
3450 /* This is the address of the stub destination. */
3451 sym_value = (stub_entry->target_value
3452 + stub_entry->target_section->output_offset
3453 + stub_entry->target_section->output_section->vma);
3454
461a49ca
DJ		 3455 template = stub_entry->stub_template;
3456 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3457
3458 size = 0;
461a49ca 3459 for (i = 0; i < template_size; i++)
906e58ca 3460 {
4e31c731 3461 switch (template[i].type)
461a49ca
DJ		 3462 {
3463 case THUMB16_TYPE:
48229727
JB		 3464 {
3465 bfd_vma data = template[i].data;
3466 if (template[i].reloc_addend != 0)
3467 {
3468 /* We've borrowed the reloc_addend field to mean we should
3469 insert a condition code into this (Thumb-1 branch)
3470 instruction. See THUMB16_BCOND_INSN. */
3471 BFD_ASSERT ((data & 0xff00) == 0xd000);
3472 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3473 }
3474 put_thumb_insn (globals, stub_bfd, data, loc + size);
3475 size += 2;
3476 }
461a49ca 3477 break;
906e58ca 3478
48229727
JB		 3479 case THUMB32_TYPE:
3480 put_thumb_insn (globals, stub_bfd, (template[i].data >> 16) & 0xffff,
3481 loc + size);
3482 put_thumb_insn (globals, stub_bfd, template[i].data & 0xffff,
3483 loc + size + 2);
3484 if (template[i].r_type != R_ARM_NONE)
3485 {
3486 stub_reloc_idx[nrelocs] = i;
3487 stub_reloc_offset[nrelocs++] = size;
3488 }
3489 size += 4;
3490 break;
3491
461a49ca
DJ		 3492 case ARM_TYPE:
3493 put_arm_insn (globals, stub_bfd, template[i].data, loc + size);
3494 /* Handle cases where the target is encoded within the
3495 instruction. */
ebe24dd4 3496 if (template[i].r_type == R_ARM_JUMP24)
461a49ca 3497 {
48229727
JB		 3498 stub_reloc_idx[nrelocs] = i;
3499 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3500 }
3501 size += 4;
3502 break;
3503
3504 case DATA_TYPE:
3505 bfd_put_32 (stub_bfd, template[i].data, loc + size);
48229727
JB		 3506 stub_reloc_idx[nrelocs] = i;
3507 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3508 size += 4;
3509 break;
3510
3511 default:
3512 BFD_FAIL ();
3513 return FALSE;
3514 }
906e58ca 3515 }
461a49ca 3516
906e58ca
NC		 3517 stub_sec->size += size;
3518
461a49ca
DJ		 3519 /* Stub size has already been computed in arm_size_one_stub. Check
3520 consistency. */
3521 BFD_ASSERT (size == stub_entry->stub_size);
3522
906e58ca
NC		 3523 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3524 if (stub_entry->st_type == STT_ARM_TFUNC)
3525 sym_value |= 1;
3526
48229727
JB		 3527 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3528 in each stub. */
3529 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3530
48229727
JB		 3531 for (i = 0; i < nrelocs; i++)
3532 if (template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3533 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3534 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3535 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
3536 {
3537 Elf_Internal_Rela rel;
3538 bfd_boolean unresolved_reloc;
3539 char *error_message;
3540 int sym_flags
3541 = (template[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
3542 ? STT_ARM_TFUNC : 0;
3543 bfd_vma points_to = sym_value + stub_entry->target_addend;
3544
3545 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3546 rel.r_info = ELF32_R_INFO (0, template[stub_reloc_idx[i]].r_type);
3547 rel.r_addend = template[stub_reloc_idx[i]].reloc_addend;
3548
3549 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3550 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3551 template should refer back to the instruction after the original
3552 branch. */
3553 points_to = sym_value;
3554
33c6a8fc
JB		 3555 /* There may be unintended consequences if this is not true. */
3556 BFD_ASSERT (stub_entry->h == NULL);
3557
48229727
JB		 3558 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3559 properly. We should probably use this function unconditionally,
3560 rather than only for certain relocations listed in the enclosing
3561 conditional, for the sake of consistency. */
3562 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3563 (template[stub_reloc_idx[i]].r_type),
3564 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3565 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3566 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3567 &error_message);
3568 }
3569 else
3570 {
3571 _bfd_final_link_relocate (elf32_arm_howto_from_type
3572 (template[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
3573 stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
3574 sym_value + stub_entry->target_addend,
3575 template[stub_reloc_idx[i]].reloc_addend);
3576 }
906e58ca
NC		 3577
3578 return TRUE;
48229727 3579#undef MAXRELOCS
906e58ca
NC		 3580}
3581
48229727
JB		 3582/* Calculate the template, template size and instruction size for a stub.
3583 Return value is the instruction size. */
906e58ca 3584
48229727
JB		 3585static unsigned int
3586find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3587 const insn_sequence **stub_template,
3588 int *stub_template_size)
906e58ca 3589{
48229727
JB		 3590 const insn_sequence *template = NULL;
3591 int template_size = 0, i;
3592 unsigned int size;
906e58ca 3593
48229727
JB		 3594 template = stub_definitions[stub_type].template;
3595 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3596
3597 size = 0;
461a49ca
DJ		 3598 for (i = 0; i < template_size; i++)
3599 {
4e31c731 3600 switch (template[i].type)
461a49ca
DJ		 3601 {
3602 case THUMB16_TYPE:
3603 size += 2;
3604 break;
3605
3606 case ARM_TYPE:
48229727 3607 case THUMB32_TYPE:
461a49ca
DJ		 3608 case DATA_TYPE:
3609 size += 4;
3610 break;
3611
3612 default:
3613 BFD_FAIL ();
3614 return FALSE;
3615 }
3616 }
3617
48229727
JB		 3618 if (stub_template)
3619 *stub_template = template;
3620
3621 if (stub_template_size)
3622 *stub_template_size = template_size;
3623
3624 return size;
3625}
3626
3627/* As above, but don't actually build the stub. Just bump offset so
3628 we know stub section sizes. */
3629
3630static bfd_boolean
3631arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3632 void * in_arg)
3633{
3634 struct elf32_arm_stub_hash_entry *stub_entry;
3635 struct elf32_arm_link_hash_table *htab;
3636 const insn_sequence *template;
3637 int template_size, size;
3638
3639 /* Massage our args to the form they really have. */
3640 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3641 htab = (struct elf32_arm_link_hash_table *) in_arg;
3642
3643 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3644 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3645
3646 size = find_stub_size_and_template (stub_entry->stub_type, &template,
3647 &template_size);
3648
461a49ca
DJ		 3649 stub_entry->stub_size = size;
3650 stub_entry->stub_template = template;
3651 stub_entry->stub_template_size = template_size;
3652
906e58ca
NC		 3653 size = (size + 7) & ~7;
3654 stub_entry->stub_sec->size += size;
461a49ca 3655
906e58ca
NC		 3656 return TRUE;
3657}
3658
3659/* External entry points for sizing and building linker stubs. */
3660
3661/* Set up various things so that we can make a list of input sections
3662 for each output section included in the link. Returns -1 on error,
3663 0 when no stubs will be needed, and 1 on success. */
3664
3665int
3666elf32_arm_setup_section_lists (bfd *output_bfd,
3667 struct bfd_link_info *info)
3668{
3669 bfd *input_bfd;
3670 unsigned int bfd_count;
3671 int top_id, top_index;
3672 asection *section;
3673 asection **input_list, **list;
3674 bfd_size_type amt;
3675 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3676
3677 if (! is_elf_hash_table (htab))
3678 return 0;
3679
3680 /* Count the number of input BFDs and find the top input section id. */
3681 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3682 input_bfd != NULL;
3683 input_bfd = input_bfd->link_next)
3684 {
3685 bfd_count += 1;
3686 for (section = input_bfd->sections;
3687 section != NULL;
3688 section = section->next)
3689 {
3690 if (top_id < section->id)
3691 top_id = section->id;
3692 }
3693 }
3694 htab->bfd_count = bfd_count;
3695
3696 amt = sizeof (struct map_stub) * (top_id + 1);
3697 htab->stub_group = bfd_zmalloc (amt);
3698 if (htab->stub_group == NULL)
3699 return -1;
3700
3701 /* We can't use output_bfd->section_count here to find the top output
3702 section index as some sections may have been removed, and
3703 _bfd_strip_section_from_output doesn't renumber the indices. */
3704 for (section = output_bfd->sections, top_index = 0;
3705 section != NULL;
3706 section = section->next)
3707 {
3708 if (top_index < section->index)
3709 top_index = section->index;
3710 }
3711
3712 htab->top_index = top_index;
3713 amt = sizeof (asection *) * (top_index + 1);
3714 input_list = bfd_malloc (amt);
3715 htab->input_list = input_list;
3716 if (input_list == NULL)
3717 return -1;
3718
3719 /* For sections we aren't interested in, mark their entries with a
3720 value we can check later. */
3721 list = input_list + top_index;
3722 do
3723 *list = bfd_abs_section_ptr;
3724 while (list-- != input_list);
3725
3726 for (section = output_bfd->sections;
3727 section != NULL;
3728 section = section->next)
3729 {
3730 if ((section->flags & SEC_CODE) != 0)
3731 input_list[section->index] = NULL;
3732 }
3733
3734 return 1;
3735}
3736
3737/* The linker repeatedly calls this function for each input section,
3738 in the order that input sections are linked into output sections.
3739 Build lists of input sections to determine groupings between which
3740 we may insert linker stubs. */
3741
3742void
3743elf32_arm_next_input_section (struct bfd_link_info *info,
3744 asection *isec)
3745{
3746 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3747
3748 if (isec->output_section->index <= htab->top_index)
3749 {
3750 asection **list = htab->input_list + isec->output_section->index;
3751
3752 if (*list != bfd_abs_section_ptr)
3753 {
3754 /* Steal the link_sec pointer for our list. */
3755#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3756 /* This happens to make the list in reverse order,
07d72278 3757 which we reverse later. */
906e58ca
NC		 3758 PREV_SEC (isec) = *list;
3759 *list = isec;
3760 }
3761 }
3762}
3763
3764/* See whether we can group stub sections together. Grouping stub
3765 sections may result in fewer stubs. More importantly, we need to
07d72278 3766 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3767 .fini output sections respectively, because glibc splits the
3768 _init and _fini functions into multiple parts. Putting a stub in
3769 the middle of a function is not a good idea. */
3770
3771static void
3772group_sections (struct elf32_arm_link_hash_table *htab,
3773 bfd_size_type stub_group_size,
07d72278 3774 bfd_boolean stubs_always_after_branch)
906e58ca 3775{
07d72278 3776 asection **list = htab->input_list;
906e58ca
NC		 3777
3778 do
3779 {
3780 asection *tail = *list;
07d72278 3781 asection *head;
906e58ca
NC		 3782
3783 if (tail == bfd_abs_section_ptr)
3784 continue;
3785
07d72278
DJ		 3786 /* Reverse the list: we must avoid placing stubs at the
3787 beginning of the section because the beginning of the text
3788 section may be required for an interrupt vector in bare metal
3789 code. */
3790#define NEXT_SEC PREV_SEC
e780aef2
CL		 3791 head = NULL;
3792 while (tail != NULL)
3793 {
3794 /* Pop from tail. */
3795 asection *item = tail;
3796 tail = PREV_SEC (item);
3797
3798 /* Push on head. */
3799 NEXT_SEC (item) = head;
3800 head = item;
3801 }
07d72278
DJ		 3802
3803 while (head != NULL)
906e58ca
NC		 3804 {
3805 asection *curr;
07d72278 3806 asection *next;
e780aef2
CL		 3807 bfd_vma stub_group_start = head->output_offset;
3808 bfd_vma end_of_next;
906e58ca 3809
07d72278 3810 curr = head;
e780aef2 3811 while (NEXT_SEC (curr) != NULL)
8cd931b7 3812 {
e780aef2
CL		 3813 next = NEXT_SEC (curr);
3814 end_of_next = next->output_offset + next->size;
3815 if (end_of_next - stub_group_start >= stub_group_size)
3816 /* End of NEXT is too far from start, so stop. */
8cd931b7 3817 break;
e780aef2
CL		 3818 /* Add NEXT to the group. */
3819 curr = next;
8cd931b7 3820 }
906e58ca 3821
07d72278 3822 /* OK, the size from the start to the start of CURR is less
906e58ca 3823 than stub_group_size and thus can be handled by one stub
07d72278 3824 section. (Or the head section is itself larger than
906e58ca
NC		 3825 stub_group_size, in which case we may be toast.)
3826 We should really be keeping track of the total size of
3827 stubs added here, as stubs contribute to the final output
7fb9f789 3828 section size. */
906e58ca
NC		 3829 do
3830 {
07d72278 3831 next = NEXT_SEC (head);
906e58ca 3832 /* Set up this stub group. */
07d72278 3833 htab->stub_group[head->id].link_sec = curr;
906e58ca 3834 }
07d72278 3835 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3836
3837 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3838 bytes after the stub section can be handled by it too. */
3839 if (!stubs_always_after_branch)
906e58ca 3840 {
e780aef2
CL		 3841 stub_group_start = curr->output_offset + curr->size;
3842
8cd931b7 3843 while (next != NULL)
906e58ca 3844 {
e780aef2
CL		 3845 end_of_next = next->output_offset + next->size;
3846 if (end_of_next - stub_group_start >= stub_group_size)
3847 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3848 break;
e780aef2 3849 /* Add NEXT to the stub group. */
07d72278
DJ		 3850 head = next;
3851 next = NEXT_SEC (head);
3852 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3853 }
3854 }
07d72278 3855 head = next;
906e58ca
NC		 3856 }
3857 }
07d72278 3858 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3859
3860 free (htab->input_list);
3861#undef PREV_SEC
07d72278 3862#undef NEXT_SEC
906e58ca
NC		 3863}
3864
48229727
JB		 3865/* Comparison function for sorting/searching relocations relating to Cortex-A8
3866 erratum fix. */
3867
3868static int
3869a8_reloc_compare (const void *a, const void *b)
3870{
3871 const struct a8_erratum_reloc *ra = a, *rb = b;
3872
3873 if (ra->from < rb->from)
3874 return -1;
3875 else if (ra->from > rb->from)
3876 return 1;
3877 else
3878 return 0;
3879}
3880
3881static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3882 const char *, char **);
3883
3884/* Helper function to scan code for sequences which might trigger the Cortex-A8
3885 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3886 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3887 otherwise. */
3888
81694485
NC		 3889static bfd_boolean
3890cortex_a8_erratum_scan (bfd *input_bfd,
3891 struct bfd_link_info *info,
48229727
JB		 3892 struct a8_erratum_fix **a8_fixes_p,
3893 unsigned int *num_a8_fixes_p,
3894 unsigned int *a8_fix_table_size_p,
3895 struct a8_erratum_reloc *a8_relocs,
3896 unsigned int num_a8_relocs)
3897{
3898 asection *section;
3899 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3900 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3901 unsigned int num_a8_fixes = *num_a8_fixes_p;
3902 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3903
3904 for (section = input_bfd->sections;
3905 section != NULL;
3906 section = section->next)
3907 {
3908 bfd_byte *contents = NULL;
3909 struct _arm_elf_section_data *sec_data;
3910 unsigned int span;
3911 bfd_vma base_vma;
3912
3913 if (elf_section_type (section) != SHT_PROGBITS
3914 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
3915 || (section->flags & SEC_EXCLUDE) != 0
3916 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
3917 || (section->output_section == bfd_abs_section_ptr))
3918 continue;
3919
3920 base_vma = section->output_section->vma + section->output_offset;
3921
3922 if (elf_section_data (section)->this_hdr.contents != NULL)
3923 contents = elf_section_data (section)->this_hdr.contents;
3924 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 3925 return TRUE;
48229727
JB		 3926
3927 sec_data = elf32_arm_section_data (section);
3928
3929 for (span = 0; span < sec_data->mapcount; span++)
3930 {
3931 unsigned int span_start = sec_data->map[span].vma;
3932 unsigned int span_end = (span == sec_data->mapcount - 1)
3933 ? section->size : sec_data->map[span + 1].vma;
3934 unsigned int i;
3935 char span_type = sec_data->map[span].type;
3936 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
3937
3938 if (span_type != 't')
3939 continue;
3940
3941 /* Span is entirely within a single 4KB region: skip scanning. */
3942 if (((base_vma + span_start) & ~0xfff)
3943 == ((base_vma + span_end) & ~0xfff))
3944 continue;
3945
3946 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
3947
3948 * The opcode is BLX.W, BL.W, B.W, Bcc.W
3949 * The branch target is in the same 4KB region as the
3950 first half of the branch.
3951 * The instruction before the branch is a 32-bit
81694485 3952 length non-branch instruction. */
48229727
JB		 3953 for (i = span_start; i < span_end;)
3954 {
3955 unsigned int insn = bfd_getl16 (&contents[i]);
3956 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
3957 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
3958
3959 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
3960 insn_32bit = TRUE;
3961
3962 if (insn_32bit)
3963 {
3964 /* Load the rest of the insn (in manual-friendly order). */
3965 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
3966
3967 /* Encoding T4: B<c>.W. */
3968 is_b = (insn & 0xf800d000) == 0xf0009000;
3969 /* Encoding T1: BL<c>.W. */
3970 is_bl = (insn & 0xf800d000) == 0xf000d000;
3971 /* Encoding T2: BLX<c>.W. */
3972 is_blx = (insn & 0xf800d000) == 0xf000c000;
3973 /* Encoding T3: B<c>.W (not permitted in IT block). */
3974 is_bcc = (insn & 0xf800d000) == 0xf0008000
3975 && (insn & 0x07f00000) != 0x03800000;
3976 }
3977
3978 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
3979
81694485
NC		 3980 if (((base_vma + i) & 0xfff) == 0xffe
3981 && insn_32bit
3982 && is_32bit_branch
3983 && last_was_32bit
3984 && ! last_was_branch)
48229727 3985 {
81694485 3986 bfd_signed_vma offset;
48229727
JB		 3987 bfd_boolean force_target_arm = FALSE;
3988 bfd_boolean force_target_thumb = FALSE;
3989 bfd_vma target;
3990 enum elf32_arm_stub_type stub_type = arm_stub_none;
3991 struct a8_erratum_reloc key, *found;
3992
3993 key.from = base_vma + i;
3994 found = bsearch (&key, a8_relocs, num_a8_relocs,
3995 sizeof (struct a8_erratum_reloc),
3996 &a8_reloc_compare);
3997
3998 if (found)
3999 {
4000 char *error_message = NULL;
4001 struct elf_link_hash_entry *entry;
4002
4003 /* We don't care about the error returned from this
4004 function, only if there is glue or not. */
4005 entry = find_thumb_glue (info, found->sym_name,
4006 &error_message);
4007
4008 if (entry)
4009 found->non_a8_stub = TRUE;
4010
4011 if (found->r_type == R_ARM_THM_CALL
4012 && found->st_type != STT_ARM_TFUNC)
4013 force_target_arm = TRUE;
4014 else if (found->r_type == R_ARM_THM_CALL
4015 && found->st_type == STT_ARM_TFUNC)
4016 force_target_thumb = TRUE;
4017 }
4018
4019 /* Check if we have an offending branch instruction. */
4020
4021 if (found && found->non_a8_stub)
4022 /* We've already made a stub for this instruction, e.g.
4023 it's a long branch or a Thumb->ARM stub. Assume that
4024 stub will suffice to work around the A8 erratum (see
4025 setting of always_after_branch above). */
4026 ;
4027 else if (is_bcc)
4028 {
4029 offset = (insn & 0x7ff) << 1;
4030 offset |= (insn & 0x3f0000) >> 4;
4031 offset |= (insn & 0x2000) ? 0x40000 : 0;
4032 offset |= (insn & 0x800) ? 0x80000 : 0;
4033 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4034 if (offset & 0x100000)
81694485 4035 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4036 stub_type = arm_stub_a8_veneer_b_cond;
4037 }
4038 else if (is_b || is_bl || is_blx)
4039 {
4040 int s = (insn & 0x4000000) != 0;
4041 int j1 = (insn & 0x2000) != 0;
4042 int j2 = (insn & 0x800) != 0;
4043 int i1 = !(j1 ^ s);
4044 int i2 = !(j2 ^ s);
4045
4046 offset = (insn & 0x7ff) << 1;
4047 offset |= (insn & 0x3ff0000) >> 4;
4048 offset |= i2 << 22;
4049 offset |= i1 << 23;
4050 offset |= s << 24;
4051 if (offset & 0x1000000)
81694485 4052 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4053
4054 if (is_blx)
81694485 4055 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4056
4057 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4058 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4059 }
4060
4061 if (stub_type != arm_stub_none)
4062 {
4063 bfd_vma pc_for_insn = base_vma + i + 4;
4064
4065 /* The original instruction is a BL, but the target is
4066 an ARM instruction. If we were not making a stub,
4067 the BL would have been converted to a BLX. Use the
4068 BLX stub instead in that case. */
4069 if (htab->use_blx && force_target_arm
4070 && stub_type == arm_stub_a8_veneer_bl)
4071 {
4072 stub_type = arm_stub_a8_veneer_blx;
4073 is_blx = TRUE;
4074 is_bl = FALSE;
4075 }
4076 /* Conversely, if the original instruction was
4077 BLX but the target is Thumb mode, use the BL
4078 stub. */
4079 else if (force_target_thumb
4080 && stub_type == arm_stub_a8_veneer_blx)
4081 {
4082 stub_type = arm_stub_a8_veneer_bl;
4083 is_blx = FALSE;
4084 is_bl = TRUE;
4085 }
4086
4087 if (is_blx)
81694485 4088 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4089
4090 /* If we found a relocation, use the proper destination,
4091 not the offset in the (unrelocated) instruction.
4092 Note this is always done if we switched the stub type
4093 above. */
4094 if (found)
81694485
NC		 4095 offset =
4096 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4097
4098 target = pc_for_insn + offset;
4099
4100 /* The BLX stub is ARM-mode code. Adjust the offset to
4101 take the different PC value (+8 instead of +4) into
4102 account. */
4103 if (stub_type == arm_stub_a8_veneer_blx)
4104 offset += 4;
4105
4106 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4107 {
4108 char *stub_name;
4109
4110 if (num_a8_fixes == a8_fix_table_size)
4111 {
4112 a8_fix_table_size *= 2;
4113 a8_fixes = bfd_realloc (a8_fixes,
4114 sizeof (struct a8_erratum_fix)
4115 * a8_fix_table_size);
4116 }
4117
4118 stub_name = bfd_malloc (8 + 1 + 8 + 1);
4119 if (stub_name != NULL)
4120 sprintf (stub_name, "%x:%x", section->id, i);
4121
4122 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4123 a8_fixes[num_a8_fixes].section = section;
4124 a8_fixes[num_a8_fixes].offset = i;
4125 a8_fixes[num_a8_fixes].addend = offset;
4126 a8_fixes[num_a8_fixes].orig_insn = insn;
4127 a8_fixes[num_a8_fixes].stub_name = stub_name;
4128 a8_fixes[num_a8_fixes].stub_type = stub_type;
4129
4130 num_a8_fixes++;
4131 }
4132 }
4133 }
4134
4135 i += insn_32bit ? 4 : 2;
4136 last_was_32bit = insn_32bit;
4137 last_was_branch = is_32bit_branch;
4138 }
4139 }
4140
4141 if (elf_section_data (section)->this_hdr.contents == NULL)
4142 free (contents);
4143 }
4144
4145 *a8_fixes_p = a8_fixes;
4146 *num_a8_fixes_p = num_a8_fixes;
4147 *a8_fix_table_size_p = a8_fix_table_size;
4148
81694485 4149 return FALSE;
48229727
JB		 4150}
4151
906e58ca
NC		 4152/* Determine and set the size of the stub section for a final link.
4153
4154 The basic idea here is to examine all the relocations looking for
4155 PC-relative calls to a target that is unreachable with a "bl"
4156 instruction. */
4157
4158bfd_boolean
4159elf32_arm_size_stubs (bfd *output_bfd,
4160 bfd *stub_bfd,
4161 struct bfd_link_info *info,
4162 bfd_signed_vma group_size,
4163 asection * (*add_stub_section) (const char *, asection *),
4164 void (*layout_sections_again) (void))
4165{
4166 bfd_size_type stub_group_size;
07d72278 4167 bfd_boolean stubs_always_after_branch;
906e58ca
NC		 4168 bfd_boolean stub_changed = 0;
4169 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727
JB		 4170 struct a8_erratum_fix *a8_fixes = NULL;
4171 unsigned int num_a8_fixes = 0, prev_num_a8_fixes = 0, a8_fix_table_size = 10;
4172 struct a8_erratum_reloc *a8_relocs = NULL;
4173 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4174
4175 if (htab->fix_cortex_a8)
4176 {
4177 a8_fixes = bfd_zmalloc (sizeof (struct a8_erratum_fix)
4178 * a8_fix_table_size);
4179 a8_relocs = bfd_zmalloc (sizeof (struct a8_erratum_reloc)
4180 * a8_reloc_table_size);
4181 }
906e58ca
NC		 4182
4183 /* Propagate mach to stub bfd, because it may not have been
4184 finalized when we created stub_bfd. */
4185 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4186 bfd_get_mach (output_bfd));
4187
4188 /* Stash our params away. */
4189 htab->stub_bfd = stub_bfd;
4190 htab->add_stub_section = add_stub_section;
4191 htab->layout_sections_again = layout_sections_again;
07d72278 4192 stubs_always_after_branch = group_size < 0;
48229727
JB		 4193
4194 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4195 as the first half of a 32-bit branch straddling two 4K pages. This is a
4196 crude way of enforcing that. */
4197 if (htab->fix_cortex_a8)
4198 stubs_always_after_branch = 1;
4199
906e58ca
NC		 4200 if (group_size < 0)
4201 stub_group_size = -group_size;
4202 else
4203 stub_group_size = group_size;
4204
4205 if (stub_group_size == 1)
4206 {
4207 /* Default values. */
4208 /* Thumb branch range is +-4MB has to be used as the default
4209 maximum size (a given section can contain both ARM and Thumb
4210 code, so the worst case has to be taken into account).
4211
4212 This value is 24K less than that, which allows for 2025
4213 12-byte stubs. If we exceed that, then we will fail to link.
4214 The user will have to relink with an explicit group size
4215 option. */
4216 stub_group_size = 4170000;
4217 }
4218
07d72278 4219 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca
NC		 4220
4221 while (1)
4222 {
4223 bfd *input_bfd;
4224 unsigned int bfd_indx;
4225 asection *stub_sec;
4226
48229727
JB		 4227 num_a8_fixes = 0;
4228
906e58ca
NC		 4229 for (input_bfd = info->input_bfds, bfd_indx = 0;
4230 input_bfd != NULL;
4231 input_bfd = input_bfd->link_next, bfd_indx++)
4232 {
4233 Elf_Internal_Shdr *symtab_hdr;
4234 asection *section;
4235 Elf_Internal_Sym *local_syms = NULL;
4236
48229727
JB		 4237 num_a8_relocs = 0;
4238
906e58ca
NC		 4239 /* We'll need the symbol table in a second. */
4240 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4241 if (symtab_hdr->sh_info == 0)
4242 continue;
4243
4244 /* Walk over each section attached to the input bfd. */
4245 for (section = input_bfd->sections;
4246 section != NULL;
4247 section = section->next)
4248 {
4249 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4250
4251 /* If there aren't any relocs, then there's nothing more
4252 to do. */
4253 if ((section->flags & SEC_RELOC) == 0
4254 || section->reloc_count == 0
4255 || (section->flags & SEC_CODE) == 0)
4256 continue;
4257
4258 /* If this section is a link-once section that will be
4259 discarded, then don't create any stubs. */
4260 if (section->output_section == NULL
4261 || section->output_section->owner != output_bfd)
4262 continue;
4263
4264 /* Get the relocs. */
4265 internal_relocs
4266 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4267 NULL, info->keep_memory);
4268 if (internal_relocs == NULL)
4269 goto error_ret_free_local;
4270
4271 /* Now examine each relocation. */
4272 irela = internal_relocs;
4273 irelaend = irela + section->reloc_count;
4274 for (; irela < irelaend; irela++)
4275 {
4276 unsigned int r_type, r_indx;
4277 enum elf32_arm_stub_type stub_type;
4278 struct elf32_arm_stub_hash_entry *stub_entry;
4279 asection *sym_sec;
4280 bfd_vma sym_value;
4281 bfd_vma destination;
4282 struct elf32_arm_link_hash_entry *hash;
7413f23f 4283 const char *sym_name;
906e58ca
NC		 4284 char *stub_name;
4285 const asection *id_sec;
4286 unsigned char st_type;
48229727 4287 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4288
4289 r_type = ELF32_R_TYPE (irela->r_info);
4290 r_indx = ELF32_R_SYM (irela->r_info);
4291
4292 if (r_type >= (unsigned int) R_ARM_max)
4293 {
4294 bfd_set_error (bfd_error_bad_value);
4295 error_ret_free_internal:
4296 if (elf_section_data (section)->relocs == NULL)
4297 free (internal_relocs);
4298 goto error_ret_free_local;
4299 }
4300
155d87d7 4301 /* Only look for stubs on branch instructions. */
906e58ca 4302 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4303 && (r_type != (unsigned int) R_ARM_THM_CALL)
4304 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4305 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4306 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4307 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4308 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4309 continue;
4310
4311 /* Now determine the call target, its name, value,
4312 section. */
4313 sym_sec = NULL;
4314 sym_value = 0;
4315 destination = 0;
4316 hash = NULL;
7413f23f 4317 sym_name = NULL;
906e58ca
NC		 4318 if (r_indx < symtab_hdr->sh_info)
4319 {
4320 /* It's a local symbol. */
4321 Elf_Internal_Sym *sym;
4322 Elf_Internal_Shdr *hdr;
4323
4324 if (local_syms == NULL)
4325 {
4326 local_syms
4327 = (Elf_Internal_Sym *) symtab_hdr->contents;
4328 if (local_syms == NULL)
4329 local_syms
4330 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4331 symtab_hdr->sh_info, 0,
4332 NULL, NULL, NULL);
4333 if (local_syms == NULL)
4334 goto error_ret_free_internal;
4335 }
4336
4337 sym = local_syms + r_indx;
4338 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4339 sym_sec = hdr->bfd_section;
4340 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4341 sym_value = sym->st_value;
4342 destination = (sym_value + irela->r_addend
4343 + sym_sec->output_offset
4344 + sym_sec->output_section->vma);
4345 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4346 sym_name
4347 = bfd_elf_string_from_elf_section (input_bfd,
4348 symtab_hdr->sh_link,
4349 sym->st_name);
906e58ca
NC		 4350 }
4351 else
4352 {
4353 /* It's an external symbol. */
4354 int e_indx;
4355
4356 e_indx = r_indx - symtab_hdr->sh_info;
4357 hash = ((struct elf32_arm_link_hash_entry *)
4358 elf_sym_hashes (input_bfd)[e_indx]);
4359
4360 while (hash->root.root.type == bfd_link_hash_indirect
4361 || hash->root.root.type == bfd_link_hash_warning)
4362 hash = ((struct elf32_arm_link_hash_entry *)
4363 hash->root.root.u.i.link);
4364
4365 if (hash->root.root.type == bfd_link_hash_defined
4366 || hash->root.root.type == bfd_link_hash_defweak)
4367 {
4368 sym_sec = hash->root.root.u.def.section;
4369 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4370
4371 struct elf32_arm_link_hash_table *globals =
4372 elf32_arm_hash_table (info);
4373
4374 /* For a destination in a shared library,
4375 use the PLT stub as target address to
4376 decide whether a branch stub is
4377 needed. */
4378 if (globals->splt != NULL && hash != NULL
4379 && hash->root.plt.offset != (bfd_vma) -1)
4380 {
4381 sym_sec = globals->splt;
4382 sym_value = hash->root.plt.offset;
4383 if (sym_sec->output_section != NULL)
4384 destination = (sym_value
4385 + sym_sec->output_offset
4386 + sym_sec->output_section->vma);
4387 }
4388 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4389 destination = (sym_value + irela->r_addend
4390 + sym_sec->output_offset
4391 + sym_sec->output_section->vma);
4392 }
69c5861e
CL		 4393 else if ((hash->root.root.type == bfd_link_hash_undefined)
4394 || (hash->root.root.type == bfd_link_hash_undefweak))
4395 {
4396 /* For a shared library, use the PLT stub as
4397 target address to decide whether a long
4398 branch stub is needed.
4399 For absolute code, they cannot be handled. */
4400 struct elf32_arm_link_hash_table *globals =
4401 elf32_arm_hash_table (info);
4402
4403 if (globals->splt != NULL && hash != NULL
4404 && hash->root.plt.offset != (bfd_vma) -1)
4405 {
4406 sym_sec = globals->splt;
4407 sym_value = hash->root.plt.offset;
4408 if (sym_sec->output_section != NULL)
4409 destination = (sym_value
4410 + sym_sec->output_offset
4411 + sym_sec->output_section->vma);
4412 }
4413 else
4414 continue;
4415 }
906e58ca
NC		 4416 else
4417 {
4418 bfd_set_error (bfd_error_bad_value);
4419 goto error_ret_free_internal;
4420 }
4421 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4422 sym_name = hash->root.root.root.string;
906e58ca
NC		 4423 }
4424
48229727 4425 do
7413f23f 4426 {
48229727
JB		 4427 /* Determine what (if any) linker stub is needed. */
4428 stub_type = arm_type_of_stub (info, section, irela,
4429 st_type, hash,
4430 destination, sym_sec,
4431 input_bfd, sym_name);
4432 if (stub_type == arm_stub_none)
4433 break;
4434
4435 /* Support for grouping stub sections. */
4436 id_sec = htab->stub_group[section->id].link_sec;
4437
4438 /* Get the name of this stub. */
4439 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
4440 irela);
4441 if (!stub_name)
4442 goto error_ret_free_internal;
4443
4444 /* We've either created a stub for this reloc already,
4445 or we are about to. */
4446 created_stub = TRUE;
4447
4448 stub_entry = arm_stub_hash_lookup
4449 (&htab->stub_hash_table, stub_name,
4450 FALSE, FALSE);
4451 if (stub_entry != NULL)
4452 {
4453 /* The proper stub has already been created. */
4454 free (stub_name);
4455 break;
4456 }
7413f23f 4457
48229727
JB		 4458 stub_entry = elf32_arm_add_stub (stub_name, section,
4459 htab);
4460 if (stub_entry == NULL)
4461 {
4462 free (stub_name);
4463 goto error_ret_free_internal;
4464 }
7413f23f 4465
48229727
JB		 4466 stub_entry->target_value = sym_value;
4467 stub_entry->target_section = sym_sec;
4468 stub_entry->stub_type = stub_type;
4469 stub_entry->h = hash;
4470 stub_entry->st_type = st_type;
4471
4472 if (sym_name == NULL)
4473 sym_name = "unnamed";
4474 stub_entry->output_name
4475 = bfd_alloc (htab->stub_bfd,
4476 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4477 + strlen (sym_name));
4478 if (stub_entry->output_name == NULL)
4479 {
4480 free (stub_name);
4481 goto error_ret_free_internal;
4482 }
4483
4484 /* For historical reasons, use the existing names for
4485 ARM-to-Thumb and Thumb-to-ARM stubs. */
4486 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4487 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4488 && st_type != STT_ARM_TFUNC)
4489 sprintf (stub_entry->output_name,
4490 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4491 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4492 || (r_type == (unsigned int) R_ARM_JUMP24))
4493 && st_type == STT_ARM_TFUNC)
4494 sprintf (stub_entry->output_name,
4495 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4496 else
4497 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4498 sym_name);
4499
4500 stub_changed = TRUE;
4501 }
4502 while (0);
4503
4504 /* Look for relocations which might trigger Cortex-A8
4505 erratum. */
4506 if (htab->fix_cortex_a8
4507 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4508 || r_type == (unsigned int) R_ARM_THM_JUMP19
4509 || r_type == (unsigned int) R_ARM_THM_CALL
4510 || r_type == (unsigned int) R_ARM_THM_XPC22))
4511 {
4512 bfd_vma from = section->output_section->vma
4513 + section->output_offset
4514 + irela->r_offset;
4515
4516 if ((from & 0xfff) == 0xffe)
4517 {
4518 /* Found a candidate. Note we haven't checked the
4519 destination is within 4K here: if we do so (and
4520 don't create an entry in a8_relocs) we can't tell
4521 that a branch should have been relocated when
4522 scanning later. */
4523 if (num_a8_relocs == a8_reloc_table_size)
4524 {
4525 a8_reloc_table_size *= 2;
4526 a8_relocs = bfd_realloc (a8_relocs,
4527 sizeof (struct a8_erratum_reloc)
4528 * a8_reloc_table_size);
4529 }
4530
4531 a8_relocs[num_a8_relocs].from = from;
4532 a8_relocs[num_a8_relocs].destination = destination;
4533 a8_relocs[num_a8_relocs].r_type = r_type;
4534 a8_relocs[num_a8_relocs].st_type = st_type;
4535 a8_relocs[num_a8_relocs].sym_name = sym_name;
4536 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4537
4538 num_a8_relocs++;
4539 }
4540 }
906e58ca
NC		 4541 }
4542
48229727
JB		 4543 /* We're done with the internal relocs, free them. */
4544 if (elf_section_data (section)->relocs == NULL)
4545 free (internal_relocs);
4546 }
4547
4548 if (htab->fix_cortex_a8)
4549 {
4550 /* Sort relocs which might apply to Cortex-A8 erratum. */
4551 qsort (a8_relocs, num_a8_relocs, sizeof (struct a8_erratum_reloc),
4552 &a8_reloc_compare);
4553
4554 /* Scan for branches which might trigger Cortex-A8 erratum. */
4555 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4556 &num_a8_fixes, &a8_fix_table_size,
4557 a8_relocs, num_a8_relocs) != 0)
4558 goto error_ret_free_local;
5e681ec4 4559 }
5e681ec4
PB		 4560 }
4561
48229727
JB		 4562 if (htab->fix_cortex_a8 && num_a8_fixes != prev_num_a8_fixes)
4563 stub_changed = TRUE;
4564
906e58ca
NC		 4565 if (!stub_changed)
4566 break;
5e681ec4 4567
906e58ca
NC		 4568 /* OK, we've added some stubs. Find out the new size of the
4569 stub sections. */
4570 for (stub_sec = htab->stub_bfd->sections;
4571 stub_sec != NULL;
4572 stub_sec = stub_sec->next)
3e6b1042
DJ		 4573 {
4574 /* Ignore non-stub sections. */
4575 if (!strstr (stub_sec->name, STUB_SUFFIX))
4576 continue;
4577
4578 stub_sec->size = 0;
4579 }
b34b2d70 4580
906e58ca
NC		 4581 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4582
48229727
JB		 4583 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4584 if (htab->fix_cortex_a8)
4585 for (i = 0; i < num_a8_fixes; i++)
4586 {
4587 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4588 a8_fixes[i].section, htab);
4589
4590 if (stub_sec == NULL)
4591 goto error_ret_free_local;
4592
4593 stub_sec->size
4594 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4595 NULL);
4596 }
4597
4598
906e58ca
NC		 4599 /* Ask the linker to do its stuff. */
4600 (*htab->layout_sections_again) ();
4601 stub_changed = FALSE;
48229727 4602 prev_num_a8_fixes = num_a8_fixes;
ba93b8ac
DJ		 4603 }
4604
48229727
JB		 4605 /* Add stubs for Cortex-A8 erratum fixes now. */
4606 if (htab->fix_cortex_a8)
4607 {
4608 for (i = 0; i < num_a8_fixes; i++)
4609 {
4610 struct elf32_arm_stub_hash_entry *stub_entry;
4611 char *stub_name = a8_fixes[i].stub_name;
4612 asection *section = a8_fixes[i].section;
4613 unsigned int section_id = a8_fixes[i].section->id;
4614 asection *link_sec = htab->stub_group[section_id].link_sec;
4615 asection *stub_sec = htab->stub_group[section_id].stub_sec;
4616 const insn_sequence *template;
4617 int template_size, size = 0;
4618
4619 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4620 TRUE, FALSE);
4621 if (stub_entry == NULL)
4622 {
4623 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4624 section->owner,
4625 stub_name);
4626 return FALSE;
4627 }
4628
4629 stub_entry->stub_sec = stub_sec;
4630 stub_entry->stub_offset = 0;
4631 stub_entry->id_sec = link_sec;
4632 stub_entry->stub_type = a8_fixes[i].stub_type;
4633 stub_entry->target_section = a8_fixes[i].section;
4634 stub_entry->target_value = a8_fixes[i].offset;
4635 stub_entry->target_addend = a8_fixes[i].addend;
4636 stub_entry->orig_insn = a8_fixes[i].orig_insn;
4637 stub_entry->st_type = STT_ARM_TFUNC;
4638
4639 size = find_stub_size_and_template (a8_fixes[i].stub_type, &template,
4640 &template_size);
4641
4642 stub_entry->stub_size = size;
4643 stub_entry->stub_template = template;
4644 stub_entry->stub_template_size = template_size;
4645 }
4646
4647 /* Stash the Cortex-A8 erratum fix array for use later in
4648 elf32_arm_write_section(). */
4649 htab->a8_erratum_fixes = a8_fixes;
4650 htab->num_a8_erratum_fixes = num_a8_fixes;
4651 }
4652 else
4653 {
4654 htab->a8_erratum_fixes = NULL;
4655 htab->num_a8_erratum_fixes = 0;
4656 }
906e58ca
NC		 4657 return TRUE;
4658
4659 error_ret_free_local:
4660 return FALSE;
5e681ec4
PB		 4661}
4662
906e58ca
NC		 4663/* Build all the stubs associated with the current output file. The
4664 stubs are kept in a hash table attached to the main linker hash
4665 table. We also set up the .plt entries for statically linked PIC
4666 functions here. This function is called via arm_elf_finish in the
4667 linker. */
252b5132 4668
906e58ca
NC		 4669bfd_boolean
4670elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4671{
906e58ca
NC		 4672 asection *stub_sec;
4673 struct bfd_hash_table *table;
4674 struct elf32_arm_link_hash_table *htab;
252b5132 4675
906e58ca 4676 htab = elf32_arm_hash_table (info);
252b5132 4677
906e58ca
NC		 4678 for (stub_sec = htab->stub_bfd->sections;
4679 stub_sec != NULL;
4680 stub_sec = stub_sec->next)
252b5132 4681 {
906e58ca
NC		 4682 bfd_size_type size;
4683
8029a119 4684 /* Ignore non-stub sections. */
906e58ca
NC		 4685 if (!strstr (stub_sec->name, STUB_SUFFIX))
4686 continue;
4687
4688 /* Allocate memory to hold the linker stubs. */
4689 size = stub_sec->size;
4690 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
4691 if (stub_sec->contents == NULL && size != 0)
4692 return FALSE;
4693 stub_sec->size = 0;
252b5132
RH		 4694 }
4695
906e58ca
NC		 4696 /* Build the stubs as directed by the stub hash table. */
4697 table = &htab->stub_hash_table;
4698 bfd_hash_traverse (table, arm_build_one_stub, info);
252b5132 4699
906e58ca 4700 return TRUE;
252b5132
RH		 4701}
4702
9b485d32
NC		 4703/* Locate the Thumb encoded calling stub for NAME. */
4704
252b5132 4705static struct elf_link_hash_entry *
57e8b36a
NC		 4706find_thumb_glue (struct bfd_link_info *link_info,
4707 const char *name,
f2a9dd69 4708 char **error_message)
252b5132
RH		 4709{
4710 char *tmp_name;
4711 struct elf_link_hash_entry *hash;
4712 struct elf32_arm_link_hash_table *hash_table;
4713
4714 /* We need a pointer to the armelf specific hash table. */
4715 hash_table = elf32_arm_hash_table (link_info);
4716
57e8b36a
NC		 4717 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4718 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4719
4720 BFD_ASSERT (tmp_name);
4721
4722 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4723
4724 hash = elf_link_hash_lookup
b34976b6 4725 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4726
b1657152
AM		 4727 if (hash == NULL
4728 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4729 tmp_name, name) == -1)
4730 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4731
4732 free (tmp_name);
4733
4734 return hash;
4735}
4736
9b485d32
NC		 4737/* Locate the ARM encoded calling stub for NAME. */
4738
252b5132 4739static struct elf_link_hash_entry *
57e8b36a
NC		 4740find_arm_glue (struct bfd_link_info *link_info,
4741 const char *name,
f2a9dd69 4742 char **error_message)
252b5132
RH		 4743{
4744 char *tmp_name;
4745 struct elf_link_hash_entry *myh;
4746 struct elf32_arm_link_hash_table *hash_table;
4747
4748 /* We need a pointer to the elfarm specific hash table. */
4749 hash_table = elf32_arm_hash_table (link_info);
4750
57e8b36a
NC		 4751 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4752 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4753
4754 BFD_ASSERT (tmp_name);
4755
4756 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4757
4758 myh = elf_link_hash_lookup
b34976b6 4759 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4760
b1657152
AM		 4761 if (myh == NULL
4762 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4763 tmp_name, name) == -1)
4764 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4765
4766 free (tmp_name);
4767
4768 return myh;
4769}
4770
8f6277f5 4771/* ARM->Thumb glue (static images):
252b5132
RH		 4772
4773 .arm
4774 __func_from_arm:
4775 ldr r12, __func_addr
4776 bx r12
4777 __func_addr:
906e58ca 4778 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4779
26079076
PB		 4780 (v5t static images)
4781 .arm
4782 __func_from_arm:
4783 ldr pc, __func_addr
4784 __func_addr:
906e58ca 4785 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4786
8f6277f5
PB		 4787 (relocatable images)
4788 .arm
4789 __func_from_arm:
4790 ldr r12, __func_offset
4791 add r12, r12, pc
4792 bx r12
4793 __func_offset:
8029a119 4794 .word func - . */
8f6277f5
PB		 4795
4796#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4797static const insn32 a2t1_ldr_insn = 0xe59fc000;
4798static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4799static const insn32 a2t3_func_addr_insn = 0x00000001;
4800
26079076
PB		 4801#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4802static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4803static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4804
8f6277f5
PB		 4805#define ARM2THUMB_PIC_GLUE_SIZE 16
4806static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4807static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4808static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4809
9b485d32 4810/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4811
8029a119
NC		 4812 .thumb .thumb
4813 .align 2 .align 2
4814 __func_from_thumb: __func_from_thumb:
4815 bx pc push {r6, lr}
4816 nop ldr r6, __func_addr
4817 .arm mov lr, pc
4818 b func bx r6
fcef9eb7
NC		 4819 .arm
4820 ;; back_to_thumb
4821 ldmia r13! {r6, lr}
4822 bx lr
8029a119
NC		 4823 __func_addr:
4824 .word func */
252b5132
RH		 4825
4826#define THUMB2ARM_GLUE_SIZE 8
4827static const insn16 t2a1_bx_pc_insn = 0x4778;
4828static const insn16 t2a2_noop_insn = 0x46c0;
4829static const insn32 t2a3_b_insn = 0xea000000;
4830
c7b8f16e
JB		 4831#define VFP11_ERRATUM_VENEER_SIZE 8
4832
845b51d6
PB		 4833#define ARM_BX_VENEER_SIZE 12
4834static const insn32 armbx1_tst_insn = 0xe3100001;
4835static const insn32 armbx2_moveq_insn = 0x01a0f000;
4836static const insn32 armbx3_bx_insn = 0xe12fff10;
4837
7e392df6 4838#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4839static void
4840arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4841{
4842 asection * s;
8029a119 4843 bfd_byte * contents;
252b5132 4844
8029a119 4845 if (size == 0)
3e6b1042
DJ		 4846 {
4847 /* Do not include empty glue sections in the output. */
4848 if (abfd != NULL)
4849 {
4850 s = bfd_get_section_by_name (abfd, name);
4851 if (s != NULL)
4852 s->flags |= SEC_EXCLUDE;
4853 }
4854 return;
4855 }
252b5132 4856
8029a119 4857 BFD_ASSERT (abfd != NULL);
252b5132 4858
8029a119
NC		 4859 s = bfd_get_section_by_name (abfd, name);
4860 BFD_ASSERT (s != NULL);
252b5132 4861
8029a119 4862 contents = bfd_alloc (abfd, size);
252b5132 4863
8029a119
NC		 4864 BFD_ASSERT (s->size == size);
4865 s->contents = contents;
4866}
906e58ca 4867
8029a119
NC		 4868bfd_boolean
4869bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
4870{
4871 struct elf32_arm_link_hash_table * globals;
906e58ca 4872
8029a119
NC		 4873 globals = elf32_arm_hash_table (info);
4874 BFD_ASSERT (globals != NULL);
906e58ca 4875
8029a119
NC		 4876 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4877 globals->arm_glue_size,
4878 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 4879
8029a119
NC		 4880 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4881 globals->thumb_glue_size,
4882 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 4883
8029a119
NC		 4884 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4885 globals->vfp11_erratum_glue_size,
4886 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 4887
8029a119
NC		 4888 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4889 globals->bx_glue_size,
845b51d6
PB		 4890 ARM_BX_GLUE_SECTION_NAME);
4891
b34976b6 4892 return TRUE;
252b5132
RH		 4893}
4894
a4fd1a8e 4895/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 4896 returns the symbol identifying the stub. */
4897
a4fd1a8e 4898static struct elf_link_hash_entry *
57e8b36a
NC		 4899record_arm_to_thumb_glue (struct bfd_link_info * link_info,
4900 struct elf_link_hash_entry * h)
252b5132
RH		 4901{
4902 const char * name = h->root.root.string;
63b0f745 4903 asection * s;
252b5132
RH		 4904 char * tmp_name;
4905 struct elf_link_hash_entry * myh;
14a793b2 4906 struct bfd_link_hash_entry * bh;
252b5132 4907 struct elf32_arm_link_hash_table * globals;
dc810e39 4908 bfd_vma val;
2f475487 4909 bfd_size_type size;
252b5132
RH		 4910
4911 globals = elf32_arm_hash_table (link_info);
4912
4913 BFD_ASSERT (globals != NULL);
4914 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4915
4916 s = bfd_get_section_by_name
4917 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
4918
252b5132
RH		 4919 BFD_ASSERT (s != NULL);
4920
57e8b36a 4921 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4922
4923 BFD_ASSERT (tmp_name);
4924
4925 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4926
4927 myh = elf_link_hash_lookup
b34976b6 4928 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 4929
4930 if (myh != NULL)
4931 {
9b485d32 4932 /* We've already seen this guy. */
252b5132 4933 free (tmp_name);
a4fd1a8e 4934 return myh;
252b5132
RH		 4935 }
4936
57e8b36a
NC		 4937 /* The only trick here is using hash_table->arm_glue_size as the value.
4938 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 4939 putting it. The +1 on the value marks that the stub has not been
4940 output yet - not that it is a Thumb function. */
14a793b2 4941 bh = NULL;
dc810e39
AM		 4942 val = globals->arm_glue_size + 1;
4943 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
4944 tmp_name, BSF_GLOBAL, s, val,
b34976b6 4945 NULL, TRUE, FALSE, &bh);
252b5132 4946
b7693d02
DJ		 4947 myh = (struct elf_link_hash_entry *) bh;
4948 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4949 myh->forced_local = 1;
4950
252b5132
RH		 4951 free (tmp_name);
4952
27e55c4d
PB		 4953 if (link_info->shared || globals->root.is_relocatable_executable
4954 || globals->pic_veneer)
2f475487 4955 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 4956 else if (globals->use_blx)
4957 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 4958 else
2f475487
AM		 4959 size = ARM2THUMB_STATIC_GLUE_SIZE;
4960
4961 s->size += size;
4962 globals->arm_glue_size += size;
252b5132 4963
a4fd1a8e 4964 return myh;
252b5132
RH		 4965}
4966
845b51d6
PB		 4967/* Allocate space for ARMv4 BX veneers. */
4968
4969static void
4970record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
4971{
4972 asection * s;
4973 struct elf32_arm_link_hash_table *globals;
4974 char *tmp_name;
4975 struct elf_link_hash_entry *myh;
4976 struct bfd_link_hash_entry *bh;
4977 bfd_vma val;
4978
4979 /* BX PC does not need a veneer. */
4980 if (reg == 15)
4981 return;
4982
4983 globals = elf32_arm_hash_table (link_info);
4984
4985 BFD_ASSERT (globals != NULL);
4986 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4987
4988 /* Check if this veneer has already been allocated. */
4989 if (globals->bx_glue_offset[reg])
4990 return;
4991
4992 s = bfd_get_section_by_name
4993 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
4994
4995 BFD_ASSERT (s != NULL);
4996
4997 /* Add symbol for veneer. */
4998 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 4999
845b51d6 5000 BFD_ASSERT (tmp_name);
906e58ca 5001
845b51d6 5002 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5003
845b51d6
PB		 5004 myh = elf_link_hash_lookup
5005 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5006
845b51d6 5007 BFD_ASSERT (myh == NULL);
906e58ca 5008
845b51d6
PB		 5009 bh = NULL;
5010 val = globals->bx_glue_size;
5011 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5012 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5013 NULL, TRUE, FALSE, &bh);
5014
5015 myh = (struct elf_link_hash_entry *) bh;
5016 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5017 myh->forced_local = 1;
5018
5019 s->size += ARM_BX_VENEER_SIZE;
5020 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5021 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5022}
5023
5024
c7b8f16e
JB		 5025/* Add an entry to the code/data map for section SEC. */
5026
5027static void
5028elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5029{
5030 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5031 unsigned int newidx;
906e58ca 5032
c7b8f16e
JB		 5033 if (sec_data->map == NULL)
5034 {
5035 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
5036 sec_data->mapcount = 0;
5037 sec_data->mapsize = 1;
5038 }
906e58ca 5039
c7b8f16e 5040 newidx = sec_data->mapcount++;
906e58ca 5041
c7b8f16e
JB		 5042 if (sec_data->mapcount > sec_data->mapsize)
5043 {
5044 sec_data->mapsize *= 2;
515ef31d
NC		 5045 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5046 * sizeof (elf32_arm_section_map));
5047 }
5048
5049 if (sec_data->map)
5050 {
5051 sec_data->map[newidx].vma = vma;
5052 sec_data->map[newidx].type = type;
c7b8f16e 5053 }
c7b8f16e
JB		 5054}
5055
5056
5057/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5058 veneers are handled for now. */
5059
5060static bfd_vma
5061record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5062 elf32_vfp11_erratum_list *branch,
5063 bfd *branch_bfd,
5064 asection *branch_sec,
5065 unsigned int offset)
5066{
5067 asection *s;
5068 struct elf32_arm_link_hash_table *hash_table;
5069 char *tmp_name;
5070 struct elf_link_hash_entry *myh;
5071 struct bfd_link_hash_entry *bh;
5072 bfd_vma val;
5073 struct _arm_elf_section_data *sec_data;
5074 int errcount;
5075 elf32_vfp11_erratum_list *newerr;
906e58ca 5076
c7b8f16e 5077 hash_table = elf32_arm_hash_table (link_info);
906e58ca 5078
c7b8f16e
JB		 5079 BFD_ASSERT (hash_table != NULL);
5080 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5081
c7b8f16e
JB		 5082 s = bfd_get_section_by_name
5083 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5084
c7b8f16e 5085 sec_data = elf32_arm_section_data (s);
906e58ca 5086
c7b8f16e 5087 BFD_ASSERT (s != NULL);
906e58ca 5088
c7b8f16e
JB		 5089 tmp_name = bfd_malloc ((bfd_size_type) strlen
5090 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5091
c7b8f16e 5092 BFD_ASSERT (tmp_name);
906e58ca 5093
c7b8f16e
JB		 5094 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5095 hash_table->num_vfp11_fixes);
906e58ca 5096
c7b8f16e
JB		 5097 myh = elf_link_hash_lookup
5098 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5099
c7b8f16e 5100 BFD_ASSERT (myh == NULL);
906e58ca 5101
c7b8f16e
JB		 5102 bh = NULL;
5103 val = hash_table->vfp11_erratum_glue_size;
5104 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5105 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5106 NULL, TRUE, FALSE, &bh);
5107
5108 myh = (struct elf_link_hash_entry *) bh;
5109 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5110 myh->forced_local = 1;
5111
5112 /* Link veneer back to calling location. */
5113 errcount = ++(sec_data->erratumcount);
5114 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5115
c7b8f16e
JB		 5116 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5117 newerr->vma = -1;
5118 newerr->u.v.branch = branch;
5119 newerr->u.v.id = hash_table->num_vfp11_fixes;
5120 branch->u.b.veneer = newerr;
5121
5122 newerr->next = sec_data->erratumlist;
5123 sec_data->erratumlist = newerr;
5124
5125 /* A symbol for the return from the veneer. */
5126 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5127 hash_table->num_vfp11_fixes);
5128
5129 myh = elf_link_hash_lookup
5130 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5131
c7b8f16e
JB		 5132 if (myh != NULL)
5133 abort ();
5134
5135 bh = NULL;
5136 val = offset + 4;
5137 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5138 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5139
c7b8f16e
JB		 5140 myh = (struct elf_link_hash_entry *) bh;
5141 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5142 myh->forced_local = 1;
5143
5144 free (tmp_name);
906e58ca 5145
c7b8f16e
JB		 5146 /* Generate a mapping symbol for the veneer section, and explicitly add an
5147 entry for that symbol to the code/data map for the section. */
5148 if (hash_table->vfp11_erratum_glue_size == 0)
5149 {
5150 bh = NULL;
5151 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5152 ever requires this erratum fix. */
5153 _bfd_generic_link_add_one_symbol (link_info,
5154 hash_table->bfd_of_glue_owner, "$a",
5155 BSF_LOCAL, s, 0, NULL,
5156 TRUE, FALSE, &bh);
5157
5158 myh = (struct elf_link_hash_entry *) bh;
5159 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5160 myh->forced_local = 1;
906e58ca 5161
c7b8f16e
JB		 5162 /* The elf32_arm_init_maps function only cares about symbols from input
5163 BFDs. We must make a note of this generated mapping symbol
5164 ourselves so that code byteswapping works properly in
5165 elf32_arm_write_section. */
5166 elf32_arm_section_map_add (s, 'a', 0);
5167 }
906e58ca 5168
c7b8f16e
JB		 5169 s->size += VFP11_ERRATUM_VENEER_SIZE;
5170 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5171 hash_table->num_vfp11_fixes++;
906e58ca 5172
c7b8f16e
JB		 5173 /* The offset of the veneer. */
5174 return val;
5175}
5176
8029a119 5177#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5178 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5179 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5180
5181/* Create a fake section for use by the ARM backend of the linker. */
5182
5183static bfd_boolean
5184arm_make_glue_section (bfd * abfd, const char * name)
5185{
5186 asection * sec;
5187
5188 sec = bfd_get_section_by_name (abfd, name);
5189 if (sec != NULL)
5190 /* Already made. */
5191 return TRUE;
5192
5193 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5194
5195 if (sec == NULL
5196 || !bfd_set_section_alignment (abfd, sec, 2))
5197 return FALSE;
5198
5199 /* Set the gc mark to prevent the section from being removed by garbage
5200 collection, despite the fact that no relocs refer to this section. */
5201 sec->gc_mark = 1;
5202
5203 return TRUE;
5204}
5205
8afb0e02
NC		 5206/* Add the glue sections to ABFD. This function is called from the
5207 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5208
b34976b6 5209bfd_boolean
57e8b36a
NC		 5210bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5211 struct bfd_link_info *info)
252b5132 5212{
8afb0e02
NC		 5213 /* If we are only performing a partial
5214 link do not bother adding the glue. */
1049f94e 5215 if (info->relocatable)
b34976b6 5216 return TRUE;
252b5132 5217
8029a119
NC		 5218 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5219 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5220 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5221 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5222}
5223
5224/* Select a BFD to be used to hold the sections used by the glue code.
5225 This function is called from the linker scripts in ld/emultempl/
8029a119 5226 {armelf/pe}.em. */
8afb0e02 5227
b34976b6 5228bfd_boolean
57e8b36a 5229bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5230{
5231 struct elf32_arm_link_hash_table *globals;
5232
5233 /* If we are only performing a partial link
5234 do not bother getting a bfd to hold the glue. */
1049f94e 5235 if (info->relocatable)
b34976b6 5236 return TRUE;
8afb0e02 5237
b7693d02
DJ		 5238 /* Make sure we don't attach the glue sections to a dynamic object. */
5239 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5240
8afb0e02
NC		 5241 globals = elf32_arm_hash_table (info);
5242
5243 BFD_ASSERT (globals != NULL);
5244
5245 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5246 return TRUE;
8afb0e02 5247
252b5132
RH		 5248 /* Save the bfd for later use. */
5249 globals->bfd_of_glue_owner = abfd;
cedb70c5 5250
b34976b6 5251 return TRUE;
252b5132
RH		 5252}
5253
906e58ca
NC		 5254static void
5255check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5256{
104d59d1
JM		 5257 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5258 Tag_CPU_arch) > 2)
39b41c9c
PB		 5259 globals->use_blx = 1;
5260}
5261
b34976b6 5262bfd_boolean
57e8b36a 5263bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5264 struct bfd_link_info *link_info)
252b5132
RH		 5265{
5266 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5267 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5268 Elf_Internal_Rela *irel, *irelend;
5269 bfd_byte *contents = NULL;
252b5132
RH		 5270
5271 asection *sec;
5272 struct elf32_arm_link_hash_table *globals;
5273
5274 /* If we are only performing a partial link do not bother
5275 to construct any glue. */
1049f94e 5276 if (link_info->relocatable)
b34976b6 5277 return TRUE;
252b5132 5278
39ce1a6a
NC		 5279 /* Here we have a bfd that is to be included on the link. We have a
5280 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 5281 globals = elf32_arm_hash_table (link_info);
5282
5283 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5284
5285 check_use_blx (globals);
252b5132 5286
d504ffc8 5287 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5288 {
d003868e
AM		 5289 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5290 abfd);
e489d0ae
PB		 5291 return FALSE;
5292 }
f21f3fe0 5293
39ce1a6a
NC		 5294 /* PR 5398: If we have not decided to include any loadable sections in
5295 the output then we will not have a glue owner bfd. This is OK, it
5296 just means that there is nothing else for us to do here. */
5297 if (globals->bfd_of_glue_owner == NULL)
5298 return TRUE;
5299
252b5132
RH		 5300 /* Rummage around all the relocs and map the glue vectors. */
5301 sec = abfd->sections;
5302
5303 if (sec == NULL)
b34976b6 5304 return TRUE;
252b5132
RH		 5305
5306 for (; sec != NULL; sec = sec->next)
5307 {
5308 if (sec->reloc_count == 0)
5309 continue;
5310
2f475487
AM		 5311 if ((sec->flags & SEC_EXCLUDE) != 0)
5312 continue;
5313
0ffa91dd 5314 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5315
9b485d32 5316 /* Load the relocs. */
6cdc0ccc 5317 internal_relocs
906e58ca 5318 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5319
6cdc0ccc
AM		 5320 if (internal_relocs == NULL)
5321 goto error_return;
252b5132 5322
6cdc0ccc
AM		 5323 irelend = internal_relocs + sec->reloc_count;
5324 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5325 {
5326 long r_type;
5327 unsigned long r_index;
252b5132
RH		 5328
5329 struct elf_link_hash_entry *h;
5330
5331 r_type = ELF32_R_TYPE (irel->r_info);
5332 r_index = ELF32_R_SYM (irel->r_info);
5333
9b485d32 5334 /* These are the only relocation types we care about. */
ba96a88f 5335 if ( r_type != R_ARM_PC24
845b51d6 5336 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5337 continue;
5338
5339 /* Get the section contents if we haven't done so already. */
5340 if (contents == NULL)
5341 {
5342 /* Get cached copy if it exists. */
5343 if (elf_section_data (sec)->this_hdr.contents != NULL)
5344 contents = elf_section_data (sec)->this_hdr.contents;
5345 else
5346 {
5347 /* Go get them off disk. */
57e8b36a 5348 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5349 goto error_return;
5350 }
5351 }
5352
845b51d6
PB		 5353 if (r_type == R_ARM_V4BX)
5354 {
5355 int reg;
5356
5357 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5358 record_arm_bx_glue (link_info, reg);
5359 continue;
5360 }
5361
a7c10850 5362 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5363 h = NULL;
5364
9b485d32 5365 /* We don't care about local symbols. */
252b5132
RH		 5366 if (r_index < symtab_hdr->sh_info)
5367 continue;
5368
9b485d32 5369 /* This is an external symbol. */
252b5132
RH		 5370 r_index -= symtab_hdr->sh_info;
5371 h = (struct elf_link_hash_entry *)
5372 elf_sym_hashes (abfd)[r_index];
5373
5374 /* If the relocation is against a static symbol it must be within
5375 the current section and so cannot be a cross ARM/Thumb relocation. */
5376 if (h == NULL)
5377 continue;
5378
d504ffc8
DJ		 5379 /* If the call will go through a PLT entry then we do not need
5380 glue. */
5381 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5382 continue;
5383
252b5132
RH		 5384 switch (r_type)
5385 {
5386 case R_ARM_PC24:
5387 /* This one is a call from arm code. We need to look up
2f0ca46a 5388 the target of the call. If it is a thumb target, we
252b5132 5389 insert glue. */
ebe24dd4 5390 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5391 record_arm_to_thumb_glue (link_info, h);
5392 break;
5393
252b5132 5394 default:
c6596c5e 5395 abort ();
252b5132
RH		 5396 }
5397 }
6cdc0ccc
AM		 5398
5399 if (contents != NULL
5400 && elf_section_data (sec)->this_hdr.contents != contents)
5401 free (contents);
5402 contents = NULL;
5403
5404 if (internal_relocs != NULL
5405 && elf_section_data (sec)->relocs != internal_relocs)
5406 free (internal_relocs);
5407 internal_relocs = NULL;
252b5132
RH		 5408 }
5409
b34976b6 5410 return TRUE;
9a5aca8c 5411
252b5132 5412error_return:
6cdc0ccc
AM		 5413 if (contents != NULL
5414 && elf_section_data (sec)->this_hdr.contents != contents)
5415 free (contents);
5416 if (internal_relocs != NULL
5417 && elf_section_data (sec)->relocs != internal_relocs)
5418 free (internal_relocs);
9a5aca8c 5419
b34976b6 5420 return FALSE;
252b5132 5421}
7e392df6 5422#endif
252b5132 5423
eb043451 5424
c7b8f16e
JB		 5425/* Initialise maps of ARM/Thumb/data for input BFDs. */
5426
5427void
5428bfd_elf32_arm_init_maps (bfd *abfd)
5429{
5430 Elf_Internal_Sym *isymbuf;
5431 Elf_Internal_Shdr *hdr;
5432 unsigned int i, localsyms;
5433
af1f4419
NC		 5434 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5435 if (! is_arm_elf (abfd))
5436 return;
5437
c7b8f16e
JB		 5438 if ((abfd->flags & DYNAMIC) != 0)
5439 return;
5440
0ffa91dd 5441 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5442 localsyms = hdr->sh_info;
5443
5444 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5445 should contain the number of local symbols, which should come before any
5446 global symbols. Mapping symbols are always local. */
5447 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5448 NULL);
5449
5450 /* No internal symbols read? Skip this BFD. */
5451 if (isymbuf == NULL)
5452 return;
5453
5454 for (i = 0; i < localsyms; i++)
5455 {
5456 Elf_Internal_Sym *isym = &isymbuf[i];
5457 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5458 const char *name;
906e58ca 5459
c7b8f16e
JB		 5460 if (sec != NULL
5461 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5462 {
5463 name = bfd_elf_string_from_elf_section (abfd,
5464 hdr->sh_link, isym->st_name);
906e58ca 5465
c7b8f16e
JB		 5466 if (bfd_is_arm_special_symbol_name (name,
5467 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5468 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5469 }
5470 }
5471}
5472
5473
48229727
JB		 5474/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5475 say what they wanted. */
5476
5477void
5478bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5479{
5480 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5481 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5482
5483 if (globals->fix_cortex_a8 == -1)
5484 {
5485 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5486 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5487 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5488 || out_attr[Tag_CPU_arch_profile].i == 0))
5489 globals->fix_cortex_a8 = 1;
5490 else
5491 globals->fix_cortex_a8 = 0;
5492 }
5493}
5494
5495
c7b8f16e
JB		 5496void
5497bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5498{
5499 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5500 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5501
c7b8f16e
JB		 5502 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5503 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5504 {
5505 switch (globals->vfp11_fix)
5506 {
5507 case BFD_ARM_VFP11_FIX_DEFAULT:
5508 case BFD_ARM_VFP11_FIX_NONE:
5509 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5510 break;
906e58ca 5511
c7b8f16e
JB		 5512 default:
5513 /* Give a warning, but do as the user requests anyway. */
5514 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5515 "workaround is not necessary for target architecture"), obfd);
5516 }
5517 }
5518 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5519 /* For earlier architectures, we might need the workaround, but do not
5520 enable it by default. If users is running with broken hardware, they
5521 must enable the erratum fix explicitly. */
5522 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5523}
5524
5525
906e58ca
NC		 5526enum bfd_arm_vfp11_pipe
5527{
c7b8f16e
JB		 5528 VFP11_FMAC,
5529 VFP11_LS,
5530 VFP11_DS,
5531 VFP11_BAD
5532};
5533
5534/* Return a VFP register number. This is encoded as RX:X for single-precision
5535 registers, or X:RX for double-precision registers, where RX is the group of
5536 four bits in the instruction encoding and X is the single extension bit.
5537 RX and X fields are specified using their lowest (starting) bit. The return
5538 value is:
5539
5540 0...31: single-precision registers s0...s31
5541 32...63: double-precision registers d0...d31.
906e58ca 5542
c7b8f16e
JB		 5543 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5544 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5545
c7b8f16e
JB		 5546static unsigned int
5547bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5548 unsigned int x)
5549{
5550 if (is_double)
5551 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5552 else
5553 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5554}
5555
5556/* Set bits in *WMASK according to a register number REG as encoded by
5557 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5558
5559static void
5560bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5561{
5562 if (reg < 32)
5563 *wmask |= 1 << reg;
5564 else if (reg < 48)
5565 *wmask |= 3 << ((reg - 32) * 2);
5566}
5567
5568/* Return TRUE if WMASK overwrites anything in REGS. */
5569
5570static bfd_boolean
5571bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5572{
5573 int i;
906e58ca 5574
c7b8f16e
JB		 5575 for (i = 0; i < numregs; i++)
5576 {
5577 unsigned int reg = regs[i];
5578
5579 if (reg < 32 && (wmask & (1 << reg)) != 0)
5580 return TRUE;
906e58ca 5581
c7b8f16e
JB		 5582 reg -= 32;
5583
5584 if (reg >= 16)
5585 continue;
906e58ca 5586
c7b8f16e
JB		 5587 if ((wmask & (3 << (reg * 2))) != 0)
5588 return TRUE;
5589 }
906e58ca 5590
c7b8f16e
JB		 5591 return FALSE;
5592}
5593
5594/* In this function, we're interested in two things: finding input registers
5595 for VFP data-processing instructions, and finding the set of registers which
5596 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5597 hold the written set, so FLDM etc. are easy to deal with (we're only
5598 interested in 32 SP registers or 16 dp registers, due to the VFP version
5599 implemented by the chip in question). DP registers are marked by setting
5600 both SP registers in the write mask). */
5601
5602static enum bfd_arm_vfp11_pipe
5603bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5604 int *numregs)
5605{
5606 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
5607 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5608
5609 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5610 {
5611 unsigned int pqrs;
5612 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5613 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5614
5615 pqrs = ((insn & 0x00800000) >> 20)
5616 | ((insn & 0x00300000) >> 19)
5617 | ((insn & 0x00000040) >> 6);
5618
5619 switch (pqrs)
5620 {
5621 case 0: /* fmac[sd]. */
5622 case 1: /* fnmac[sd]. */
5623 case 2: /* fmsc[sd]. */
5624 case 3: /* fnmsc[sd]. */
5625 pipe = VFP11_FMAC;
5626 bfd_arm_vfp11_write_mask (destmask, fd);
5627 regs[0] = fd;
5628 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5629 regs[2] = fm;
5630 *numregs = 3;
5631 break;
5632
5633 case 4: /* fmul[sd]. */
5634 case 5: /* fnmul[sd]. */
5635 case 6: /* fadd[sd]. */
5636 case 7: /* fsub[sd]. */
5637 pipe = VFP11_FMAC;
5638 goto vfp_binop;
5639
5640 case 8: /* fdiv[sd]. */
5641 pipe = VFP11_DS;
5642 vfp_binop:
5643 bfd_arm_vfp11_write_mask (destmask, fd);
5644 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5645 regs[1] = fm;
5646 *numregs = 2;
5647 break;
5648
5649 case 15: /* extended opcode. */
5650 {
5651 unsigned int extn = ((insn >> 15) & 0x1e)
5652 | ((insn >> 7) & 1);
5653
5654 switch (extn)
5655 {
5656 case 0: /* fcpy[sd]. */
5657 case 1: /* fabs[sd]. */
5658 case 2: /* fneg[sd]. */
5659 case 8: /* fcmp[sd]. */
5660 case 9: /* fcmpe[sd]. */
5661 case 10: /* fcmpz[sd]. */
5662 case 11: /* fcmpez[sd]. */
5663 case 16: /* fuito[sd]. */
5664 case 17: /* fsito[sd]. */
5665 case 24: /* ftoui[sd]. */
5666 case 25: /* ftouiz[sd]. */
5667 case 26: /* ftosi[sd]. */
5668 case 27: /* ftosiz[sd]. */
5669 /* These instructions will not bounce due to underflow. */
5670 *numregs = 0;
5671 pipe = VFP11_FMAC;
5672 break;
5673
5674 case 3: /* fsqrt[sd]. */
5675 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5676 registers to cause the erratum in previous instructions. */
5677 bfd_arm_vfp11_write_mask (destmask, fd);
5678 pipe = VFP11_DS;
5679 break;
5680
5681 case 15: /* fcvt{ds,sd}. */
5682 {
5683 int rnum = 0;
5684
5685 bfd_arm_vfp11_write_mask (destmask, fd);
5686
5687 /* Only FCVTSD can underflow. */
5688 if ((insn & 0x100) != 0)
5689 regs[rnum++] = fm;
5690
5691 *numregs = rnum;
5692
5693 pipe = VFP11_FMAC;
5694 }
5695 break;
5696
5697 default:
5698 return VFP11_BAD;
5699 }
5700 }
5701 break;
5702
5703 default:
5704 return VFP11_BAD;
5705 }
5706 }
5707 /* Two-register transfer. */
5708 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5709 {
5710 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5711
c7b8f16e
JB		 5712 if ((insn & 0x100000) == 0)
5713 {
5714 if (is_double)
5715 bfd_arm_vfp11_write_mask (destmask, fm);
5716 else
5717 {
5718 bfd_arm_vfp11_write_mask (destmask, fm);
5719 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5720 }
5721 }
5722
5723 pipe = VFP11_LS;
5724 }
5725 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5726 {
5727 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5728 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5729
c7b8f16e
JB		 5730 switch (puw)
5731 {
5732 case 0: /* Two-reg transfer. We should catch these above. */
5733 abort ();
906e58ca 5734
c7b8f16e
JB		 5735 case 2: /* fldm[sdx]. */
5736 case 3:
5737 case 5:
5738 {
5739 unsigned int i, offset = insn & 0xff;
5740
5741 if (is_double)
5742 offset >>= 1;
5743
5744 for (i = fd; i < fd + offset; i++)
5745 bfd_arm_vfp11_write_mask (destmask, i);
5746 }
5747 break;
906e58ca 5748
c7b8f16e
JB		 5749 case 4: /* fld[sd]. */
5750 case 6:
5751 bfd_arm_vfp11_write_mask (destmask, fd);
5752 break;
906e58ca 5753
c7b8f16e
JB		 5754 default:
5755 return VFP11_BAD;
5756 }
5757
5758 pipe = VFP11_LS;
5759 }
5760 /* Single-register transfer. Note L==0. */
5761 else if ((insn & 0x0f100e10) == 0x0e000a10)
5762 {
5763 unsigned int opcode = (insn >> 21) & 7;
5764 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5765
5766 switch (opcode)
5767 {
5768 case 0: /* fmsr/fmdlr. */
5769 case 1: /* fmdhr. */
5770 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5771 destination register. I don't know if this is exactly right,
5772 but it is the conservative choice. */
5773 bfd_arm_vfp11_write_mask (destmask, fn);
5774 break;
5775
5776 case 7: /* fmxr. */
5777 break;
5778 }
5779
5780 pipe = VFP11_LS;
5781 }
5782
5783 return pipe;
5784}
5785
5786
5787static int elf32_arm_compare_mapping (const void * a, const void * b);
5788
5789
5790/* Look for potentially-troublesome code sequences which might trigger the
5791 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5792 (available from ARM) for details of the erratum. A short version is
5793 described in ld.texinfo. */
5794
5795bfd_boolean
5796bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5797{
5798 asection *sec;
5799 bfd_byte *contents = NULL;
5800 int state = 0;
5801 int regs[3], numregs = 0;
5802 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5803 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5804
c7b8f16e
JB		 5805 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5806 The states transition as follows:
906e58ca 5807
c7b8f16e
JB		 5808 0 -> 1 (vector) or 0 -> 2 (scalar)
5809 A VFP FMAC-pipeline instruction has been seen. Fill
5810 regs[0]..regs[numregs-1] with its input operands. Remember this
5811 instruction in 'first_fmac'.
5812
5813 1 -> 2
5814 Any instruction, except for a VFP instruction which overwrites
5815 regs[*].
906e58ca 5816
c7b8f16e
JB		 5817 1 -> 3 [ -> 0 ] or
5818 2 -> 3 [ -> 0 ]
5819 A VFP instruction has been seen which overwrites any of regs[*].
5820 We must make a veneer! Reset state to 0 before examining next
5821 instruction.
906e58ca 5822
c7b8f16e
JB		 5823 2 -> 0
5824 If we fail to match anything in state 2, reset to state 0 and reset
5825 the instruction pointer to the instruction after 'first_fmac'.
5826
5827 If the VFP11 vector mode is in use, there must be at least two unrelated
5828 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5829 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5830
5831 /* If we are only performing a partial link do not bother
5832 to construct any glue. */
5833 if (link_info->relocatable)
5834 return TRUE;
5835
0ffa91dd
NC		 5836 /* Skip if this bfd does not correspond to an ELF image. */
5837 if (! is_arm_elf (abfd))
5838 return TRUE;
906e58ca 5839
c7b8f16e
JB		 5840 /* We should have chosen a fix type by the time we get here. */
5841 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
5842
5843 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
5844 return TRUE;
2e6030b9 5845
33a7ffc2
JM		 5846 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5847 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
5848 return TRUE;
5849
c7b8f16e
JB		 5850 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5851 {
5852 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
5853 struct _arm_elf_section_data *sec_data;
5854
5855 /* If we don't have executable progbits, we're not interested in this
5856 section. Also skip if section is to be excluded. */
5857 if (elf_section_type (sec) != SHT_PROGBITS
5858 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
5859 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 5860 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
5861 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 5862 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
5863 continue;
5864
5865 sec_data = elf32_arm_section_data (sec);
906e58ca 5866
c7b8f16e
JB		 5867 if (sec_data->mapcount == 0)
5868 continue;
906e58ca 5869
c7b8f16e
JB		 5870 if (elf_section_data (sec)->this_hdr.contents != NULL)
5871 contents = elf_section_data (sec)->this_hdr.contents;
5872 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5873 goto error_return;
5874
5875 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
5876 elf32_arm_compare_mapping);
5877
5878 for (span = 0; span < sec_data->mapcount; span++)
5879 {
5880 unsigned int span_start = sec_data->map[span].vma;
5881 unsigned int span_end = (span == sec_data->mapcount - 1)
5882 ? sec->size : sec_data->map[span + 1].vma;
5883 char span_type = sec_data->map[span].type;
906e58ca 5884
c7b8f16e
JB		 5885 /* FIXME: Only ARM mode is supported at present. We may need to
5886 support Thumb-2 mode also at some point. */
5887 if (span_type != 'a')
5888 continue;
5889
5890 for (i = span_start; i < span_end;)
5891 {
5892 unsigned int next_i = i + 4;
5893 unsigned int insn = bfd_big_endian (abfd)
5894 ? (contents[i] << 24)
5895 | (contents[i + 1] << 16)
5896 | (contents[i + 2] << 8)
5897 | contents[i + 3]
5898 : (contents[i + 3] << 24)
5899 | (contents[i + 2] << 16)
5900 | (contents[i + 1] << 8)
5901 | contents[i];
5902 unsigned int writemask = 0;
5903 enum bfd_arm_vfp11_pipe pipe;
5904
5905 switch (state)
5906 {
5907 case 0:
5908 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
5909 &numregs);
5910 /* I'm assuming the VFP11 erratum can trigger with denorm
5911 operands on either the FMAC or the DS pipeline. This might
5912 lead to slightly overenthusiastic veneer insertion. */
5913 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
5914 {
5915 state = use_vector ? 1 : 2;
5916 first_fmac = i;
5917 veneer_of_insn = insn;
5918 }
5919 break;
5920
5921 case 1:
5922 {
5923 int other_regs[3], other_numregs;
5924 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5925 other_regs,
5926 &other_numregs);
5927 if (pipe != VFP11_BAD
5928 && bfd_arm_vfp11_antidependency (writemask, regs,
5929 numregs))
5930 state = 3;
5931 else
5932 state = 2;
5933 }
5934 break;
5935
5936 case 2:
5937 {
5938 int other_regs[3], other_numregs;
5939 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5940 other_regs,
5941 &other_numregs);
5942 if (pipe != VFP11_BAD
5943 && bfd_arm_vfp11_antidependency (writemask, regs,
5944 numregs))
5945 state = 3;
5946 else
5947 {
5948 state = 0;
5949 next_i = first_fmac + 4;
5950 }
5951 }
5952 break;
5953
5954 case 3:
5955 abort (); /* Should be unreachable. */
5956 }
5957
5958 if (state == 3)
5959 {
5960 elf32_vfp11_erratum_list *newerr
5961 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5962 int errcount;
5963
5964 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
5965
5966 newerr->u.b.vfp_insn = veneer_of_insn;
5967
5968 switch (span_type)
5969 {
5970 case 'a':
5971 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
5972 break;
906e58ca 5973
c7b8f16e
JB		 5974 default:
5975 abort ();
5976 }
5977
5978 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
5979 first_fmac);
5980
5981 newerr->vma = -1;
5982
5983 newerr->next = sec_data->erratumlist;
5984 sec_data->erratumlist = newerr;
5985
5986 state = 0;
5987 }
5988
5989 i = next_i;
5990 }
5991 }
906e58ca 5992
c7b8f16e
JB		 5993 if (contents != NULL
5994 && elf_section_data (sec)->this_hdr.contents != contents)
5995 free (contents);
5996 contents = NULL;
5997 }
5998
5999 return TRUE;
6000
6001error_return:
6002 if (contents != NULL
6003 && elf_section_data (sec)->this_hdr.contents != contents)
6004 free (contents);
906e58ca 6005
c7b8f16e
JB		 6006 return FALSE;
6007}
6008
6009/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6010 after sections have been laid out, using specially-named symbols. */
6011
6012void
6013bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6014 struct bfd_link_info *link_info)
6015{
6016 asection *sec;
6017 struct elf32_arm_link_hash_table *globals;
6018 char *tmp_name;
906e58ca 6019
c7b8f16e
JB		 6020 if (link_info->relocatable)
6021 return;
2e6030b9
MS		 6022
6023 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6024 if (! is_arm_elf (abfd))
2e6030b9
MS		 6025 return;
6026
c7b8f16e 6027 globals = elf32_arm_hash_table (link_info);
906e58ca 6028
c7b8f16e
JB		 6029 tmp_name = bfd_malloc ((bfd_size_type) strlen
6030 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6031
6032 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6033 {
6034 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6035 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6036
c7b8f16e
JB		 6037 for (; errnode != NULL; errnode = errnode->next)
6038 {
6039 struct elf_link_hash_entry *myh;
6040 bfd_vma vma;
6041
6042 switch (errnode->type)
6043 {
6044 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6045 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6046 /* Find veneer symbol. */
6047 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6048 errnode->u.b.veneer->u.v.id);
6049
6050 myh = elf_link_hash_lookup
6051 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6052
6053 if (myh == NULL)
6054 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6055 "`%s'"), abfd, tmp_name);
6056
6057 vma = myh->root.u.def.section->output_section->vma
6058 + myh->root.u.def.section->output_offset
6059 + myh->root.u.def.value;
6060
6061 errnode->u.b.veneer->vma = vma;
6062 break;
6063
6064 case VFP11_ERRATUM_ARM_VENEER:
6065 case VFP11_ERRATUM_THUMB_VENEER:
6066 /* Find return location. */
6067 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6068 errnode->u.v.id);
6069
6070 myh = elf_link_hash_lookup
6071 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6072
6073 if (myh == NULL)
6074 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6075 "`%s'"), abfd, tmp_name);
6076
6077 vma = myh->root.u.def.section->output_section->vma
6078 + myh->root.u.def.section->output_offset
6079 + myh->root.u.def.value;
6080
6081 errnode->u.v.branch->vma = vma;
6082 break;
906e58ca 6083
c7b8f16e
JB		 6084 default:
6085 abort ();
6086 }
6087 }
6088 }
906e58ca 6089
c7b8f16e
JB		 6090 free (tmp_name);
6091}
6092
6093
eb043451
PB		 6094/* Set target relocation values needed during linking. */
6095
6096void
bf21ed78
MS		 6097bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6098 struct bfd_link_info *link_info,
eb043451 6099 int target1_is_rel,
319850b4 6100 char * target2_type,
33bfe774 6101 int fix_v4bx,
c7b8f16e 6102 int use_blx,
bf21ed78 6103 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6104 int no_enum_warn, int no_wchar_warn,
48229727 6105 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6106{
6107 struct elf32_arm_link_hash_table *globals;
6108
6109 globals = elf32_arm_hash_table (link_info);
6110
6111 globals->target1_is_rel = target1_is_rel;
6112 if (strcmp (target2_type, "rel") == 0)
6113 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6114 else if (strcmp (target2_type, "abs") == 0)
6115 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6116 else if (strcmp (target2_type, "got-rel") == 0)
6117 globals->target2_reloc = R_ARM_GOT_PREL;
6118 else
6119 {
6120 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6121 target2_type);
6122 }
319850b4 6123 globals->fix_v4bx = fix_v4bx;
33bfe774 6124 globals->use_blx |= use_blx;
c7b8f16e 6125 globals->vfp11_fix = vfp11_fix;
27e55c4d 6126 globals->pic_veneer = pic_veneer;
48229727 6127 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6128
0ffa91dd
NC		 6129 BFD_ASSERT (is_arm_elf (output_bfd));
6130 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6131 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6132}
eb043451 6133
12a0a0fd 6134/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6135
12a0a0fd
PB		 6136static void
6137insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6138{
6139 bfd_vma upper;
6140 bfd_vma lower;
6141 int reloc_sign;
6142
6143 BFD_ASSERT ((offset & 1) == 0);
6144
6145 upper = bfd_get_16 (abfd, insn);
6146 lower = bfd_get_16 (abfd, insn + 2);
6147 reloc_sign = (offset < 0) ? 1 : 0;
6148 upper = (upper & ~(bfd_vma) 0x7ff)
6149 | ((offset >> 12) & 0x3ff)
6150 | (reloc_sign << 10);
906e58ca 6151 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6152 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6153 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6154 | ((offset >> 1) & 0x7ff);
6155 bfd_put_16 (abfd, upper, insn);
6156 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6157}
6158
9b485d32
NC		 6159/* Thumb code calling an ARM function. */
6160
252b5132 6161static int
57e8b36a
NC		 6162elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6163 const char * name,
6164 bfd * input_bfd,
6165 bfd * output_bfd,
6166 asection * input_section,
6167 bfd_byte * hit_data,
6168 asection * sym_sec,
6169 bfd_vma offset,
6170 bfd_signed_vma addend,
f2a9dd69
DJ		 6171 bfd_vma val,
6172 char **error_message)
252b5132 6173{
bcbdc74c 6174 asection * s = 0;
dc810e39 6175 bfd_vma my_offset;
252b5132 6176 long int ret_offset;
bcbdc74c
NC		 6177 struct elf_link_hash_entry * myh;
6178 struct elf32_arm_link_hash_table * globals;
252b5132 6179
f2a9dd69 6180 myh = find_thumb_glue (info, name, error_message);
252b5132 6181 if (myh == NULL)
b34976b6 6182 return FALSE;
252b5132
RH		 6183
6184 globals = elf32_arm_hash_table (info);
6185
6186 BFD_ASSERT (globals != NULL);
6187 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6188
6189 my_offset = myh->root.u.def.value;
6190
6191 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6192 THUMB2ARM_GLUE_SECTION_NAME);
6193
6194 BFD_ASSERT (s != NULL);
6195 BFD_ASSERT (s->contents != NULL);
6196 BFD_ASSERT (s->output_section != NULL);
6197
6198 if ((my_offset & 0x01) == 0x01)
6199 {
6200 if (sym_sec != NULL
6201 && sym_sec->owner != NULL
6202 && !INTERWORK_FLAG (sym_sec->owner))
6203 {
8f615d07 6204 (*_bfd_error_handler)
d003868e
AM		 6205 (_("%B(%s): warning: interworking not enabled.\n"
6206 " first occurrence: %B: thumb call to arm"),
6207 sym_sec->owner, input_bfd, name);
252b5132 6208
b34976b6 6209 return FALSE;
252b5132
RH		 6210 }
6211
6212 --my_offset;
6213 myh->root.u.def.value = my_offset;
6214
52ab56c2
PB		 6215 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6216 s->contents + my_offset);
252b5132 6217
52ab56c2
PB		 6218 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6219 s->contents + my_offset + 2);
252b5132
RH		 6220
6221 ret_offset =
9b485d32
NC		 6222 /* Address of destination of the stub. */
6223 ((bfd_signed_vma) val)
252b5132 6224 - ((bfd_signed_vma)
57e8b36a
NC		 6225 /* Offset from the start of the current section
6226 to the start of the stubs. */
9b485d32
NC		 6227 (s->output_offset
6228 /* Offset of the start of this stub from the start of the stubs. */
6229 + my_offset
6230 /* Address of the start of the current section. */
6231 + s->output_section->vma)
6232 /* The branch instruction is 4 bytes into the stub. */
6233 + 4
6234 /* ARM branches work from the pc of the instruction + 8. */
6235 + 8);
252b5132 6236
52ab56c2
PB		 6237 put_arm_insn (globals, output_bfd,
6238 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6239 s->contents + my_offset + 4);
252b5132
RH		 6240 }
6241
6242 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6243
427bfd90
NC		 6244 /* Now go back and fix up the original BL insn to point to here. */
6245 ret_offset =
6246 /* Address of where the stub is located. */
6247 (s->output_section->vma + s->output_offset + my_offset)
6248 /* Address of where the BL is located. */
57e8b36a
NC		 6249 - (input_section->output_section->vma + input_section->output_offset
6250 + offset)
427bfd90
NC		 6251 /* Addend in the relocation. */
6252 - addend
6253 /* Biassing for PC-relative addressing. */
6254 - 8;
252b5132 6255
12a0a0fd 6256 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6257
b34976b6 6258 return TRUE;
252b5132
RH		 6259}
6260
a4fd1a8e 6261/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6262
a4fd1a8e
PB		 6263static struct elf_link_hash_entry *
6264elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6265 const char * name,
6266 bfd * input_bfd,
6267 bfd * output_bfd,
6268 asection * sym_sec,
6269 bfd_vma val,
8029a119
NC		 6270 asection * s,
6271 char ** error_message)
252b5132 6272{
dc810e39 6273 bfd_vma my_offset;
252b5132 6274 long int ret_offset;
bcbdc74c
NC		 6275 struct elf_link_hash_entry * myh;
6276 struct elf32_arm_link_hash_table * globals;
252b5132 6277
f2a9dd69 6278 myh = find_arm_glue (info, name, error_message);
252b5132 6279 if (myh == NULL)
a4fd1a8e 6280 return NULL;
252b5132
RH		 6281
6282 globals = elf32_arm_hash_table (info);
6283
6284 BFD_ASSERT (globals != NULL);
6285 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6286
6287 my_offset = myh->root.u.def.value;
252b5132
RH		 6288
6289 if ((my_offset & 0x01) == 0x01)
6290 {
6291 if (sym_sec != NULL
6292 && sym_sec->owner != NULL
6293 && !INTERWORK_FLAG (sym_sec->owner))
6294 {
8f615d07 6295 (*_bfd_error_handler)
d003868e
AM		 6296 (_("%B(%s): warning: interworking not enabled.\n"
6297 " first occurrence: %B: arm call to thumb"),
6298 sym_sec->owner, input_bfd, name);
252b5132 6299 }
9b485d32 6300
252b5132
RH		 6301 --my_offset;
6302 myh->root.u.def.value = my_offset;
6303
27e55c4d
PB		 6304 if (info->shared || globals->root.is_relocatable_executable
6305 || globals->pic_veneer)
8f6277f5
PB		 6306 {
6307 /* For relocatable objects we can't use absolute addresses,
6308 so construct the address from a relative offset. */
6309 /* TODO: If the offset is small it's probably worth
6310 constructing the address with adds. */
52ab56c2
PB		 6311 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6312 s->contents + my_offset);
6313 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6314 s->contents + my_offset + 4);
6315 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6316 s->contents + my_offset + 8);
8f6277f5
PB		 6317 /* Adjust the offset by 4 for the position of the add,
6318 and 8 for the pipeline offset. */
6319 ret_offset = (val - (s->output_offset
6320 + s->output_section->vma
6321 + my_offset + 12))
6322 | 1;
6323 bfd_put_32 (output_bfd, ret_offset,
6324 s->contents + my_offset + 12);
6325 }
26079076
PB		 6326 else if (globals->use_blx)
6327 {
6328 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6329 s->contents + my_offset);
6330
6331 /* It's a thumb address. Add the low order bit. */
6332 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6333 s->contents + my_offset + 4);
6334 }
8f6277f5
PB		 6335 else
6336 {
52ab56c2
PB		 6337 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6338 s->contents + my_offset);
252b5132 6339
52ab56c2
PB		 6340 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6341 s->contents + my_offset + 4);
252b5132 6342
8f6277f5
PB		 6343 /* It's a thumb address. Add the low order bit. */
6344 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6345 s->contents + my_offset + 8);
8029a119
NC		 6346
6347 my_offset += 12;
8f6277f5 6348 }
252b5132
RH		 6349 }
6350
6351 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6352
a4fd1a8e
PB		 6353 return myh;
6354}
6355
6356/* Arm code calling a Thumb function. */
6357
6358static int
6359elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6360 const char * name,
6361 bfd * input_bfd,
6362 bfd * output_bfd,
6363 asection * input_section,
6364 bfd_byte * hit_data,
6365 asection * sym_sec,
6366 bfd_vma offset,
6367 bfd_signed_vma addend,
f2a9dd69
DJ		 6368 bfd_vma val,
6369 char **error_message)
a4fd1a8e
PB		 6370{
6371 unsigned long int tmp;
6372 bfd_vma my_offset;
6373 asection * s;
6374 long int ret_offset;
6375 struct elf_link_hash_entry * myh;
6376 struct elf32_arm_link_hash_table * globals;
6377
6378 globals = elf32_arm_hash_table (info);
6379
6380 BFD_ASSERT (globals != NULL);
6381 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6382
6383 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6384 ARM2THUMB_GLUE_SECTION_NAME);
6385 BFD_ASSERT (s != NULL);
6386 BFD_ASSERT (s->contents != NULL);
6387 BFD_ASSERT (s->output_section != NULL);
6388
6389 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6390 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6391 if (!myh)
6392 return FALSE;
6393
6394 my_offset = myh->root.u.def.value;
252b5132
RH		 6395 tmp = bfd_get_32 (input_bfd, hit_data);
6396 tmp = tmp & 0xFF000000;
6397
9b485d32 6398 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6399 ret_offset = (s->output_offset
6400 + my_offset
6401 + s->output_section->vma
6402 - (input_section->output_offset
6403 + input_section->output_section->vma
6404 + offset + addend)
6405 - 8);
9a5aca8c 6406
252b5132
RH		 6407 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6408
dc810e39 6409 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6410
b34976b6 6411 return TRUE;
252b5132
RH		 6412}
6413
a4fd1a8e
PB		 6414/* Populate Arm stub for an exported Thumb function. */
6415
6416static bfd_boolean
6417elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6418{
6419 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6420 asection * s;
6421 struct elf_link_hash_entry * myh;
6422 struct elf32_arm_link_hash_entry *eh;
6423 struct elf32_arm_link_hash_table * globals;
6424 asection *sec;
6425 bfd_vma val;
f2a9dd69 6426 char *error_message;
a4fd1a8e 6427
906e58ca 6428 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6429 /* Allocate stubs for exported Thumb functions on v4t. */
6430 if (eh->export_glue == NULL)
6431 return TRUE;
6432
6433 globals = elf32_arm_hash_table (info);
6434
6435 BFD_ASSERT (globals != NULL);
6436 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6437
6438 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6439 ARM2THUMB_GLUE_SECTION_NAME);
6440 BFD_ASSERT (s != NULL);
6441 BFD_ASSERT (s->contents != NULL);
6442 BFD_ASSERT (s->output_section != NULL);
6443
6444 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6445
6446 BFD_ASSERT (sec->output_section != NULL);
6447
a4fd1a8e
PB		 6448 val = eh->export_glue->root.u.def.value + sec->output_offset
6449 + sec->output_section->vma;
8029a119 6450
a4fd1a8e
PB		 6451 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6452 h->root.u.def.section->owner,
f2a9dd69
DJ		 6453 globals->obfd, sec, val, s,
6454 &error_message);
a4fd1a8e
PB		 6455 BFD_ASSERT (myh);
6456 return TRUE;
6457}
6458
845b51d6
PB		 6459/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6460
6461static bfd_vma
6462elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6463{
6464 bfd_byte *p;
6465 bfd_vma glue_addr;
6466 asection *s;
6467 struct elf32_arm_link_hash_table *globals;
6468
6469 globals = elf32_arm_hash_table (info);
6470
6471 BFD_ASSERT (globals != NULL);
6472 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6473
6474 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6475 ARM_BX_GLUE_SECTION_NAME);
6476 BFD_ASSERT (s != NULL);
6477 BFD_ASSERT (s->contents != NULL);
6478 BFD_ASSERT (s->output_section != NULL);
6479
6480 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6481
6482 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6483
6484 if ((globals->bx_glue_offset[reg] & 1) == 0)
6485 {
6486 p = s->contents + glue_addr;
6487 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6488 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6489 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6490 globals->bx_glue_offset[reg] |= 1;
6491 }
6492
6493 return glue_addr + s->output_section->vma + s->output_offset;
6494}
6495
a4fd1a8e
PB		 6496/* Generate Arm stubs for exported Thumb symbols. */
6497static void
906e58ca 6498elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6499 struct bfd_link_info *link_info)
6500{
6501 struct elf32_arm_link_hash_table * globals;
6502
8029a119
NC		 6503 if (link_info == NULL)
6504 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6505 return;
6506
6507 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 6508 /* If blx is available then exported Thumb symbols are OK and there is
6509 nothing to do. */
a4fd1a8e
PB		 6510 if (globals->use_blx)
6511 return;
6512
6513 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6514 link_info);
6515}
6516
eb043451
PB		 6517/* Some relocations map to different relocations depending on the
6518 target. Return the real relocation. */
8029a119 6519
eb043451
PB		 6520static int
6521arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6522 int r_type)
6523{
6524 switch (r_type)
6525 {
6526 case R_ARM_TARGET1:
6527 if (globals->target1_is_rel)
6528 return R_ARM_REL32;
6529 else
6530 return R_ARM_ABS32;
6531
6532 case R_ARM_TARGET2:
6533 return globals->target2_reloc;
6534
6535 default:
6536 return r_type;
6537 }
6538}
eb043451 6539
ba93b8ac
DJ		 6540/* Return the base VMA address which should be subtracted from real addresses
6541 when resolving @dtpoff relocation.
6542 This is PT_TLS segment p_vaddr. */
6543
6544static bfd_vma
6545dtpoff_base (struct bfd_link_info *info)
6546{
6547 /* If tls_sec is NULL, we should have signalled an error already. */
6548 if (elf_hash_table (info)->tls_sec == NULL)
6549 return 0;
6550 return elf_hash_table (info)->tls_sec->vma;
6551}
6552
6553/* Return the relocation value for @tpoff relocation
6554 if STT_TLS virtual address is ADDRESS. */
6555
6556static bfd_vma
6557tpoff (struct bfd_link_info *info, bfd_vma address)
6558{
6559 struct elf_link_hash_table *htab = elf_hash_table (info);
6560 bfd_vma base;
6561
6562 /* If tls_sec is NULL, we should have signalled an error already. */
6563 if (htab->tls_sec == NULL)
6564 return 0;
6565 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6566 return address - htab->tls_sec->vma + base;
6567}
6568
00a97672
RS		 6569/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6570 VALUE is the relocation value. */
6571
6572static bfd_reloc_status_type
6573elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6574{
6575 if (value > 0xfff)
6576 return bfd_reloc_overflow;
6577
6578 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6579 bfd_put_32 (abfd, value, data);
6580 return bfd_reloc_ok;
6581}
6582
4962c51a
MS		 6583/* For a given value of n, calculate the value of G_n as required to
6584 deal with group relocations. We return it in the form of an
6585 encoded constant-and-rotation, together with the final residual. If n is
6586 specified as less than zero, then final_residual is filled with the
6587 input value and no further action is performed. */
6588
6589static bfd_vma
6590calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6591{
6592 int current_n;
6593 bfd_vma g_n;
6594 bfd_vma encoded_g_n = 0;
6595 bfd_vma residual = value; /* Also known as Y_n. */
6596
6597 for (current_n = 0; current_n <= n; current_n++)
6598 {
6599 int shift;
6600
6601 /* Calculate which part of the value to mask. */
6602 if (residual == 0)
6603 shift = 0;
6604 else
6605 {
6606 int msb;
6607
6608 /* Determine the most significant bit in the residual and
6609 align the resulting value to a 2-bit boundary. */
6610 for (msb = 30; msb >= 0; msb -= 2)
6611 if (residual & (3 << msb))
6612 break;
6613
6614 /* The desired shift is now (msb - 6), or zero, whichever
6615 is the greater. */
6616 shift = msb - 6;
6617 if (shift < 0)
6618 shift = 0;
6619 }
6620
6621 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6622 g_n = residual & (0xff << shift);
6623 encoded_g_n = (g_n >> shift)
6624 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6625
6626 /* Calculate the residual for the next time around. */
6627 residual &= ~g_n;
6628 }
6629
6630 *final_residual = residual;
6631
6632 return encoded_g_n;
6633}
6634
6635/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6636 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6637
4962c51a 6638static int
906e58ca 6639identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6640{
6641 int opcode = insn & 0x1e00000;
6642
6643 if (opcode == 1 << 23) /* ADD */
6644 return 1;
6645
6646 if (opcode == 1 << 22) /* SUB */
6647 return -1;
6648
6649 return 0;
6650}
6651
252b5132 6652/* Perform a relocation as part of a final link. */
9b485d32 6653
252b5132 6654static bfd_reloc_status_type
57e8b36a
NC		 6655elf32_arm_final_link_relocate (reloc_howto_type * howto,
6656 bfd * input_bfd,
6657 bfd * output_bfd,
6658 asection * input_section,
6659 bfd_byte * contents,
6660 Elf_Internal_Rela * rel,
6661 bfd_vma value,
6662 struct bfd_link_info * info,
6663 asection * sym_sec,
6664 const char * sym_name,
6665 int sym_flags,
0945cdfd 6666 struct elf_link_hash_entry * h,
f2a9dd69 6667 bfd_boolean * unresolved_reloc_p,
8029a119 6668 char ** error_message)
252b5132
RH		 6669{
6670 unsigned long r_type = howto->type;
6671 unsigned long r_symndx;
6672 bfd_byte * hit_data = contents + rel->r_offset;
6673 bfd * dynobj = NULL;
6674 Elf_Internal_Shdr * symtab_hdr;
6675 struct elf_link_hash_entry ** sym_hashes;
6676 bfd_vma * local_got_offsets;
6677 asection * sgot = NULL;
6678 asection * splt = NULL;
6679 asection * sreloc = NULL;
252b5132 6680 bfd_vma addend;
ba96a88f
NC		 6681 bfd_signed_vma signed_addend;
6682 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6683
9c504268
PB		 6684 globals = elf32_arm_hash_table (info);
6685
0ffa91dd
NC		 6686 BFD_ASSERT (is_arm_elf (input_bfd));
6687
6688 /* Some relocation types map to different relocations depending on the
9c504268 6689 target. We pick the right one here. */
eb043451
PB		 6690 r_type = arm_real_reloc_type (globals, r_type);
6691 if (r_type != howto->type)
6692 howto = elf32_arm_howto_from_type (r_type);
9c504268 6693
cac15327
NC		 6694 /* If the start address has been set, then set the EF_ARM_HASENTRY
6695 flag. Setting this more than once is redundant, but the cost is
6696 not too high, and it keeps the code simple.
99e4ae17 6697
cac15327
NC		 6698 The test is done here, rather than somewhere else, because the
6699 start address is only set just before the final link commences.
6700
6701 Note - if the user deliberately sets a start address of 0, the
6702 flag will not be set. */
6703 if (bfd_get_start_address (output_bfd) != 0)
6704 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6705
252b5132
RH		 6706 dynobj = elf_hash_table (info)->dynobj;
6707 if (dynobj)
6708 {
6709 sgot = bfd_get_section_by_name (dynobj, ".got");
6710 splt = bfd_get_section_by_name (dynobj, ".plt");
6711 }
0ffa91dd 6712 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6713 sym_hashes = elf_sym_hashes (input_bfd);
6714 local_got_offsets = elf_local_got_offsets (input_bfd);
6715 r_symndx = ELF32_R_SYM (rel->r_info);
6716
4e7fd91e 6717 if (globals->use_rel)
ba96a88f 6718 {
4e7fd91e
PB		 6719 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6720
6721 if (addend & ((howto->src_mask + 1) >> 1))
6722 {
6723 signed_addend = -1;
6724 signed_addend &= ~ howto->src_mask;
6725 signed_addend |= addend;
6726 }
6727 else
6728 signed_addend = addend;
ba96a88f
NC		 6729 }
6730 else
4e7fd91e 6731 addend = signed_addend = rel->r_addend;
f21f3fe0 6732
252b5132
RH		 6733 switch (r_type)
6734 {
6735 case R_ARM_NONE:
28a094c2
DJ		 6736 /* We don't need to find a value for this symbol. It's just a
6737 marker. */
6738 *unresolved_reloc_p = FALSE;
252b5132
RH		 6739 return bfd_reloc_ok;
6740
00a97672
RS		 6741 case R_ARM_ABS12:
6742 if (!globals->vxworks_p)
6743 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6744
252b5132
RH		 6745 case R_ARM_PC24:
6746 case R_ARM_ABS32:
bb224fc3 6747 case R_ARM_ABS32_NOI:
252b5132 6748 case R_ARM_REL32:
bb224fc3 6749 case R_ARM_REL32_NOI:
5b5bb741
PB		 6750 case R_ARM_CALL:
6751 case R_ARM_JUMP24:
dfc5f959 6752 case R_ARM_XPC25:
eb043451 6753 case R_ARM_PREL31:
7359ea65 6754 case R_ARM_PLT32:
7359ea65
DJ		 6755 /* Handle relocations which should use the PLT entry. ABS32/REL32
6756 will use the symbol's value, which may point to a PLT entry, but we
6757 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6758 branches in this object should go to it, except if the PLT is too
6759 far away, in which case a long branch stub should be inserted. */
bb224fc3 6760 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6761 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6762 && r_type != R_ARM_CALL
6763 && r_type != R_ARM_JUMP24
6764 && r_type != R_ARM_PLT32)
7359ea65 6765 && h != NULL
c84cd8ee 6766 && splt != NULL
7359ea65
DJ		 6767 && h->plt.offset != (bfd_vma) -1)
6768 {
c84cd8ee
DJ		 6769 /* If we've created a .plt section, and assigned a PLT entry to
6770 this function, it should not be known to bind locally. If
6771 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6772 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6773
6774 value = (splt->output_section->vma
6775 + splt->output_offset
6776 + h->plt.offset);
0945cdfd 6777 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6778 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6779 contents, rel->r_offset, value,
00a97672 6780 rel->r_addend);
7359ea65
DJ		 6781 }
6782
67687978
PB		 6783 /* When generating a shared object or relocatable executable, these
6784 relocations are copied into the output file to be resolved at
6785 run time. */
6786 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6787 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 6788 && !(elf32_arm_hash_table (info)->vxworks_p
6789 && strcmp (input_section->output_section->name,
6790 ".tls_vars") == 0)
bb224fc3 6791 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6792 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 6793 && (h == NULL
6794 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6795 || h->root.type != bfd_link_hash_undefweak)
6796 && r_type != R_ARM_PC24
5b5bb741
PB		 6797 && r_type != R_ARM_CALL
6798 && r_type != R_ARM_JUMP24
ee06dc07 6799 && r_type != R_ARM_PREL31
7359ea65 6800 && r_type != R_ARM_PLT32)
252b5132 6801 {
947216bf
AM		 6802 Elf_Internal_Rela outrel;
6803 bfd_byte *loc;
b34976b6 6804 bfd_boolean skip, relocate;
f21f3fe0 6805
0945cdfd
DJ		 6806 *unresolved_reloc_p = FALSE;
6807
252b5132
RH		 6808 if (sreloc == NULL)
6809 {
83bac4b0
NC		 6810 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6811 ! globals->use_rel);
f21f3fe0 6812
83bac4b0 6813 if (sreloc == NULL)
252b5132 6814 return bfd_reloc_notsupported;
252b5132 6815 }
f21f3fe0 6816
b34976b6
AM		 6817 skip = FALSE;
6818 relocate = FALSE;
f21f3fe0 6819
00a97672 6820 outrel.r_addend = addend;
c629eae0
JJ		 6821 outrel.r_offset =
6822 _bfd_elf_section_offset (output_bfd, info, input_section,
6823 rel->r_offset);
6824 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6825 skip = TRUE;
0bb2d96a 6826 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6827 skip = TRUE, relocate = TRUE;
252b5132
RH		 6828 outrel.r_offset += (input_section->output_section->vma
6829 + input_section->output_offset);
f21f3fe0 6830
252b5132 6831 if (skip)
0bb2d96a 6832 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6833 else if (h != NULL
6834 && h->dynindx != -1
7359ea65 6835 && (!info->shared
5e681ec4 6836 || !info->symbolic
f5385ebf 6837 || !h->def_regular))
5e681ec4 6838 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6839 else
6840 {
a16385dc
MM		 6841 int symbol;
6842
5e681ec4 6843 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 6844 if (sym_flags == STT_ARM_TFUNC)
6845 value |= 1;
a16385dc 6846 if (globals->symbian_p)
6366ff1e 6847 {
74541ad4
AM		 6848 asection *osec;
6849
6366ff1e
MM		 6850 /* On Symbian OS, the data segment and text segement
6851 can be relocated independently. Therefore, we
6852 must indicate the segment to which this
6853 relocation is relative. The BPABI allows us to
6854 use any symbol in the right segment; we just use
6855 the section symbol as it is convenient. (We
6856 cannot use the symbol given by "h" directly as it
74541ad4
AM		 6857 will not appear in the dynamic symbol table.)
6858
6859 Note that the dynamic linker ignores the section
6860 symbol value, so we don't subtract osec->vma
6861 from the emitted reloc addend. */
10dbd1f3 6862 if (sym_sec)
74541ad4 6863 osec = sym_sec->output_section;
10dbd1f3 6864 else
74541ad4
AM		 6865 osec = input_section->output_section;
6866 symbol = elf_section_data (osec)->dynindx;
6867 if (symbol == 0)
6868 {
6869 struct elf_link_hash_table *htab = elf_hash_table (info);
6870
6871 if ((osec->flags & SEC_READONLY) == 0
6872 && htab->data_index_section != NULL)
6873 osec = htab->data_index_section;
6874 else
6875 osec = htab->text_index_section;
6876 symbol = elf_section_data (osec)->dynindx;
6877 }
6366ff1e
MM		 6878 BFD_ASSERT (symbol != 0);
6879 }
a16385dc
MM		 6880 else
6881 /* On SVR4-ish systems, the dynamic loader cannot
6882 relocate the text and data segments independently,
6883 so the symbol does not matter. */
6884 symbol = 0;
6885 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 6886 if (globals->use_rel)
6887 relocate = TRUE;
6888 else
6889 outrel.r_addend += value;
252b5132 6890 }
f21f3fe0 6891
947216bf 6892 loc = sreloc->contents;
00a97672
RS		 6893 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
6894 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 6895
f21f3fe0 6896 /* If this reloc is against an external symbol, we do not want to
252b5132 6897 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 6898 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 6899 if (! relocate)
6900 return bfd_reloc_ok;
9a5aca8c 6901
f21f3fe0 6902 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 6903 contents, rel->r_offset, value,
6904 (bfd_vma) 0);
6905 }
6906 else switch (r_type)
6907 {
00a97672
RS		 6908 case R_ARM_ABS12:
6909 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6910
dfc5f959 6911 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 6912 case R_ARM_CALL:
6913 case R_ARM_JUMP24:
8029a119 6914 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 6915 case R_ARM_PLT32:
906e58ca
NC		 6916 {
6917 bfd_vma from;
6918 bfd_signed_vma branch_offset;
6919 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6920
dfc5f959 6921 if (r_type == R_ARM_XPC25)
252b5132 6922 {
dfc5f959
NC		 6923 /* Check for Arm calling Arm function. */
6924 /* FIXME: Should we translate the instruction into a BL
6925 instruction instead ? */
6926 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 6927 (*_bfd_error_handler)
6928 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
6929 input_bfd,
6930 h ? h->root.root.string : "(local)");
dfc5f959 6931 }
155d87d7 6932 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 6933 {
6934 /* Check for Arm calling Thumb function. */
6935 if (sym_flags == STT_ARM_TFUNC)
6936 {
f2a9dd69
DJ		 6937 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
6938 output_bfd, input_section,
6939 hit_data, sym_sec, rel->r_offset,
6940 signed_addend, value,
6941 error_message))
6942 return bfd_reloc_ok;
6943 else
6944 return bfd_reloc_dangerous;
dfc5f959 6945 }
252b5132 6946 }
ba96a88f 6947
906e58ca 6948 /* Check if a stub has to be inserted because the
8029a119 6949 destination is too far or we are changing mode. */
155d87d7
CL		 6950 if ( r_type == R_ARM_CALL
6951 || r_type == R_ARM_JUMP24
6952 || r_type == R_ARM_PLT32)
906e58ca 6953 {
5fa9e92f
CL		 6954 /* If the call goes through a PLT entry, make sure to
6955 check distance to the right destination address. */
6956 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
6957 {
6958 value = (splt->output_section->vma
6959 + splt->output_offset
6960 + h->plt.offset);
6961 *unresolved_reloc_p = FALSE;
6962 }
6963
6964 from = (input_section->output_section->vma
6965 + input_section->output_offset
6966 + rel->r_offset);
6967 branch_offset = (bfd_signed_vma)(value - from);
6968
906e58ca
NC		 6969 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
6970 || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
155d87d7
CL		 6971 || ((sym_flags == STT_ARM_TFUNC)
6972 && (((r_type == R_ARM_CALL) && !globals->use_blx)
6973 || (r_type == R_ARM_JUMP24)
6974 || (r_type == R_ARM_PLT32) ))
6975 )
906e58ca
NC		 6976 {
6977 /* The target is out of reach, so redirect the
6978 branch to the local stub for this function. */
6979
6980 stub_entry = elf32_arm_get_stub_entry (input_section,
6981 sym_sec, h,
6982 rel, globals);
6983 if (stub_entry != NULL)
6984 value = (stub_entry->stub_offset
6985 + stub_entry->stub_sec->output_offset
6986 + stub_entry->stub_sec->output_section->vma);
6987 }
6988 }
6989
dea514f5
PB		 6990 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
6991 where:
6992 S is the address of the symbol in the relocation.
6993 P is address of the instruction being relocated.
6994 A is the addend (extracted from the instruction) in bytes.
6995
6996 S is held in 'value'.
6997 P is the base address of the section containing the
6998 instruction plus the offset of the reloc into that
6999 section, ie:
7000 (input_section->output_section->vma +
7001 input_section->output_offset +
7002 rel->r_offset).
7003 A is the addend, converted into bytes, ie:
7004 (signed_addend * 4)
7005
7006 Note: None of these operations have knowledge of the pipeline
7007 size of the processor, thus it is up to the assembler to
7008 encode this information into the addend. */
7009 value -= (input_section->output_section->vma
7010 + input_section->output_offset);
7011 value -= rel->r_offset;
4e7fd91e
PB		 7012 if (globals->use_rel)
7013 value += (signed_addend << howto->size);
7014 else
7015 /* RELA addends do not have to be adjusted by howto->size. */
7016 value += signed_addend;
23080146 7017
dcb5e6e6
NC		 7018 signed_addend = value;
7019 signed_addend >>= howto->rightshift;
9a5aca8c 7020
5ab79981 7021 /* A branch to an undefined weak symbol is turned into a jump to
82b5c97a
CL		 7022 the next instruction unless a PLT entry will be created. */
7023 if (h && h->root.type == bfd_link_hash_undefweak
7024 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 7025 {
7026 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
7027 | 0x0affffff;
7028 }
7029 else
59f2c4e7 7030 {
9b485d32 7031 /* Perform a signed range check. */
dcb5e6e6 7032 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7033 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7034 return bfd_reloc_overflow;
9a5aca8c 7035
5ab79981 7036 addend = (value & 2);
39b41c9c 7037
5ab79981
PB		 7038 value = (signed_addend & howto->dst_mask)
7039 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7040
5ab79981
PB		 7041 if (r_type == R_ARM_CALL)
7042 {
155d87d7
CL		 7043 /* Set the H bit in the BLX instruction. */
7044 if (sym_flags == STT_ARM_TFUNC)
7045 {
7046 if (addend)
7047 value |= (1 << 24);
7048 else
7049 value &= ~(bfd_vma)(1 << 24);
7050 }
7051
5ab79981 7052 /* Select the correct instruction (BL or BLX). */
906e58ca 7053 /* Only if we are not handling a BL to a stub. In this
8029a119 7054 case, mode switching is performed by the stub. */
906e58ca 7055 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7056 value |= (1 << 28);
7057 else
7058 {
7059 value &= ~(bfd_vma)(1 << 28);
7060 value |= (1 << 24);
7061 }
39b41c9c
PB		 7062 }
7063 }
906e58ca 7064 }
252b5132 7065 break;
f21f3fe0 7066
252b5132
RH		 7067 case R_ARM_ABS32:
7068 value += addend;
7069 if (sym_flags == STT_ARM_TFUNC)
7070 value |= 1;
7071 break;
f21f3fe0 7072
bb224fc3
MS		 7073 case R_ARM_ABS32_NOI:
7074 value += addend;
7075 break;
7076
252b5132 7077 case R_ARM_REL32:
a8bc6c78
PB		 7078 value += addend;
7079 if (sym_flags == STT_ARM_TFUNC)
7080 value |= 1;
252b5132 7081 value -= (input_section->output_section->vma
62efb346 7082 + input_section->output_offset + rel->r_offset);
252b5132 7083 break;
eb043451 7084
bb224fc3
MS		 7085 case R_ARM_REL32_NOI:
7086 value += addend;
7087 value -= (input_section->output_section->vma
7088 + input_section->output_offset + rel->r_offset);
7089 break;
7090
eb043451
PB		 7091 case R_ARM_PREL31:
7092 value -= (input_section->output_section->vma
7093 + input_section->output_offset + rel->r_offset);
7094 value += signed_addend;
7095 if (! h || h->root.type != bfd_link_hash_undefweak)
7096 {
8029a119 7097 /* Check for overflow. */
eb043451
PB		 7098 if ((value ^ (value >> 1)) & (1 << 30))
7099 return bfd_reloc_overflow;
7100 }
7101 value &= 0x7fffffff;
7102 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7103 if (sym_flags == STT_ARM_TFUNC)
7104 value |= 1;
7105 break;
252b5132 7106 }
f21f3fe0 7107
252b5132
RH		 7108 bfd_put_32 (input_bfd, value, hit_data);
7109 return bfd_reloc_ok;
7110
7111 case R_ARM_ABS8:
7112 value += addend;
7113 if ((long) value > 0x7f || (long) value < -0x80)
7114 return bfd_reloc_overflow;
7115
7116 bfd_put_8 (input_bfd, value, hit_data);
7117 return bfd_reloc_ok;
7118
7119 case R_ARM_ABS16:
7120 value += addend;
7121
7122 if ((long) value > 0x7fff || (long) value < -0x8000)
7123 return bfd_reloc_overflow;
7124
7125 bfd_put_16 (input_bfd, value, hit_data);
7126 return bfd_reloc_ok;
7127
252b5132 7128 case R_ARM_THM_ABS5:
9b485d32 7129 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7130 if (globals->use_rel)
7131 {
7132 /* Need to refetch addend. */
7133 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7134 /* ??? Need to determine shift amount from operand size. */
7135 addend >>= howto->rightshift;
7136 }
252b5132
RH		 7137 value += addend;
7138
7139 /* ??? Isn't value unsigned? */
7140 if ((long) value > 0x1f || (long) value < -0x10)
7141 return bfd_reloc_overflow;
7142
7143 /* ??? Value needs to be properly shifted into place first. */
7144 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7145 bfd_put_16 (input_bfd, value, hit_data);
7146 return bfd_reloc_ok;
7147
2cab6cc3
MS		 7148 case R_ARM_THM_ALU_PREL_11_0:
7149 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7150 {
7151 bfd_vma insn;
7152 bfd_signed_vma relocation;
7153
7154 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7155 | bfd_get_16 (input_bfd, hit_data + 2);
7156
7157 if (globals->use_rel)
7158 {
7159 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7160 | ((insn & (1 << 26)) >> 15);
7161 if (insn & 0xf00000)
7162 signed_addend = -signed_addend;
7163 }
7164
7165 relocation = value + signed_addend;
7166 relocation -= (input_section->output_section->vma
7167 + input_section->output_offset
7168 + rel->r_offset);
7169
7170 value = abs (relocation);
7171
7172 if (value >= 0x1000)
7173 return bfd_reloc_overflow;
7174
7175 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7176 | ((value & 0x700) << 4)
7177 | ((value & 0x800) << 15);
7178 if (relocation < 0)
7179 insn |= 0xa00000;
7180
7181 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7182 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7183
7184 return bfd_reloc_ok;
7185 }
7186
e1ec24c6
NC		 7187 case R_ARM_THM_PC8:
7188 /* PR 10073: This reloc is not generated by the GNU toolchain,
7189 but it is supported for compatibility with third party libraries
7190 generated by other compilers, specifically the ARM/IAR. */
7191 {
7192 bfd_vma insn;
7193 bfd_signed_vma relocation;
7194
7195 insn = bfd_get_16 (input_bfd, hit_data);
7196
7197 if (globals->use_rel)
7198 addend = (insn & 0x00ff) << 2;
7199
7200 relocation = value + addend;
7201 relocation -= (input_section->output_section->vma
7202 + input_section->output_offset
7203 + rel->r_offset);
7204
7205 value = abs (relocation);
7206
7207 /* We do not check for overflow of this reloc. Although strictly
7208 speaking this is incorrect, it appears to be necessary in order
7209 to work with IAR generated relocs. Since GCC and GAS do not
7210 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7211 a problem for them. */
7212 value &= 0x3fc;
7213
7214 insn = (insn & 0xff00) | (value >> 2);
7215
7216 bfd_put_16 (input_bfd, insn, hit_data);
7217
7218 return bfd_reloc_ok;
7219 }
7220
2cab6cc3
MS		 7221 case R_ARM_THM_PC12:
7222 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7223 {
7224 bfd_vma insn;
7225 bfd_signed_vma relocation;
7226
7227 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7228 | bfd_get_16 (input_bfd, hit_data + 2);
7229
7230 if (globals->use_rel)
7231 {
7232 signed_addend = insn & 0xfff;
7233 if (!(insn & (1 << 23)))
7234 signed_addend = -signed_addend;
7235 }
7236
7237 relocation = value + signed_addend;
7238 relocation -= (input_section->output_section->vma
7239 + input_section->output_offset
7240 + rel->r_offset);
7241
7242 value = abs (relocation);
7243
7244 if (value >= 0x1000)
7245 return bfd_reloc_overflow;
7246
7247 insn = (insn & 0xff7ff000) | value;
7248 if (relocation >= 0)
7249 insn |= (1 << 23);
7250
7251 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7252 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7253
7254 return bfd_reloc_ok;
7255 }
7256
dfc5f959 7257 case R_ARM_THM_XPC22:
c19d1205 7258 case R_ARM_THM_CALL:
bd97cb95 7259 case R_ARM_THM_JUMP24:
dfc5f959 7260 /* Thumb BL (branch long instruction). */
252b5132 7261 {
b34976b6 7262 bfd_vma relocation;
e95de063 7263 bfd_vma reloc_sign;
b34976b6
AM		 7264 bfd_boolean overflow = FALSE;
7265 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7266 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7267 bfd_signed_vma reloc_signed_max;
7268 bfd_signed_vma reloc_signed_min;
b34976b6 7269 bfd_vma check;
252b5132 7270 bfd_signed_vma signed_check;
e95de063
MS		 7271 int bitsize;
7272 int thumb2 = using_thumb2 (globals);
252b5132 7273
5ab79981 7274 /* A branch to an undefined weak symbol is turned into a jump to
19540007
JM		 7275 the next instruction unless a PLT entry will be created. */
7276 if (h && h->root.type == bfd_link_hash_undefweak
7277 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 7278 {
7279 bfd_put_16 (input_bfd, 0xe000, hit_data);
7280 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7281 return bfd_reloc_ok;
7282 }
7283
e95de063
MS		 7284 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7285 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7286 if (globals->use_rel)
7287 {
e95de063
MS		 7288 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7289 bfd_vma upper = upper_insn & 0x3ff;
7290 bfd_vma lower = lower_insn & 0x7ff;
7291 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7292 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7293 bfd_vma i1 = j1 ^ s ? 0 : 1;
7294 bfd_vma i2 = j2 ^ s ? 0 : 1;
7295
7296 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7297 /* Sign extend. */
7298 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7299
4e7fd91e
PB		 7300 signed_addend = addend;
7301 }
cb1afa5c 7302
dfc5f959
NC		 7303 if (r_type == R_ARM_THM_XPC22)
7304 {
7305 /* Check for Thumb to Thumb call. */
7306 /* FIXME: Should we translate the instruction into a BL
7307 instruction instead ? */
7308 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7309 (*_bfd_error_handler)
7310 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7311 input_bfd,
7312 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7313 }
7314 else
252b5132 7315 {
dfc5f959
NC		 7316 /* If it is not a call to Thumb, assume call to Arm.
7317 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7318 function call at all, but rather a long jump. Calls through
7319 the PLT do not require stubs. */
7320 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7321 && (h == NULL || splt == NULL
7322 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7323 {
bd97cb95 7324 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7325 {
7326 /* Convert BL to BLX. */
7327 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7328 }
155d87d7
CL		 7329 else if (( r_type != R_ARM_THM_CALL)
7330 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7331 {
7332 if (elf32_thumb_to_arm_stub
7333 (info, sym_name, input_bfd, output_bfd, input_section,
7334 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7335 error_message))
7336 return bfd_reloc_ok;
7337 else
7338 return bfd_reloc_dangerous;
7339 }
da5938a2 7340 }
bd97cb95
DJ		 7341 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7342 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7343 {
7344 /* Make sure this is a BL. */
7345 lower_insn |= 0x1800;
7346 }
252b5132 7347 }
f21f3fe0 7348
b7693d02
DJ		 7349 /* Handle calls via the PLT. */
7350 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7351 {
7352 value = (splt->output_section->vma
7353 + splt->output_offset
7354 + h->plt.offset);
bd97cb95 7355 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 7356 {
7357 /* If the Thumb BLX instruction is available, convert the
7358 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 7359 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 7360 }
7361 else
7362 /* Target the Thumb stub before the ARM PLT entry. */
7363 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 7364 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 7365 }
7366
155d87d7 7367 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7368 {
7369 /* Check if a stub has to be inserted because the destination
8029a119 7370 is too far. */
906e58ca
NC		 7371 bfd_vma from;
7372 bfd_signed_vma branch_offset;
7373 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7374
7375 from = (input_section->output_section->vma
7376 + input_section->output_offset
7377 + rel->r_offset);
7378 branch_offset = (bfd_signed_vma)(value - from);
7379
7380 if ((!thumb2
7381 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
7382 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
7383 ||
7384 (thumb2
7385 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
f4ac8484 7386 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
155d87d7
CL		 7387 || ((sym_flags != STT_ARM_TFUNC)
7388 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
7389 || r_type == R_ARM_THM_JUMP24)))
906e58ca
NC		 7390 {
7391 /* The target is out of reach or we are changing modes, so
7392 redirect the branch to the local stub for this
7393 function. */
7394 stub_entry = elf32_arm_get_stub_entry (input_section,
7395 sym_sec, h,
7396 rel, globals);
7397 if (stub_entry != NULL)
7398 value = (stub_entry->stub_offset
7399 + stub_entry->stub_sec->output_offset
7400 + stub_entry->stub_sec->output_section->vma);
7401
f4ac8484 7402 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7403 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7404 {
7405 if ((stub_entry
7406 && !arm_stub_is_thumb (stub_entry->stub_type))
7407 || (sym_flags != STT_ARM_TFUNC))
7408 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7409 }
906e58ca
NC		 7410 }
7411 }
7412
ba96a88f 7413 relocation = value + signed_addend;
f21f3fe0 7414
252b5132 7415 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7416 + input_section->output_offset
7417 + rel->r_offset);
9a5aca8c 7418
252b5132
RH		 7419 check = relocation >> howto->rightshift;
7420
7421 /* If this is a signed value, the rightshift just dropped
7422 leading 1 bits (assuming twos complement). */
7423 if ((bfd_signed_vma) relocation >= 0)
7424 signed_check = check;
7425 else
7426 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7427
e95de063
MS		 7428 /* Calculate the permissable maximum and minimum values for
7429 this relocation according to whether we're relocating for
7430 Thumb-2 or not. */
7431 bitsize = howto->bitsize;
7432 if (!thumb2)
7433 bitsize -= 2;
7434 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
7435 reloc_signed_min = ~reloc_signed_max;
7436
252b5132 7437 /* Assumes two's complement. */
ba96a88f 7438 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7439 overflow = TRUE;
252b5132 7440
bd97cb95 7441 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7442 /* For a BLX instruction, make sure that the relocation is rounded up
7443 to a word boundary. This follows the semantics of the instruction
7444 which specifies that bit 1 of the target address will come from bit
7445 1 of the base address. */
7446 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7447
e95de063
MS		 7448 /* Put RELOCATION back into the insn. Assumes two's complement.
7449 We use the Thumb-2 encoding, which is safe even if dealing with
7450 a Thumb-1 instruction by virtue of our overflow check above. */
7451 reloc_sign = (signed_check < 0) ? 1 : 0;
7452 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7453 | ((relocation >> 12) & 0x3ff)
7454 | (reloc_sign << 10);
906e58ca 7455 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7456 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7457 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7458 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7459
252b5132
RH		 7460 /* Put the relocated value back in the object file: */
7461 bfd_put_16 (input_bfd, upper_insn, hit_data);
7462 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7463
7464 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7465 }
7466 break;
7467
c19d1205
ZW		 7468 case R_ARM_THM_JUMP19:
7469 /* Thumb32 conditional branch instruction. */
7470 {
7471 bfd_vma relocation;
7472 bfd_boolean overflow = FALSE;
7473 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7474 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7475 bfd_signed_vma reloc_signed_max = 0xffffe;
7476 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7477 bfd_signed_vma signed_check;
7478
7479 /* Need to refetch the addend, reconstruct the top three bits,
7480 and squish the two 11 bit pieces together. */
7481 if (globals->use_rel)
7482 {
7483 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7484 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7485 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7486 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7487 bfd_vma lower = (lower_insn & 0x07ff);
7488
a00a1f35
MS		 7489 upper |= J1 << 6;
7490 upper |= J2 << 7;
7491 upper |= (!S) << 8;
c19d1205
ZW		 7492 upper -= 0x0100; /* Sign extend. */
7493
7494 addend = (upper << 12) | (lower << 1);
7495 signed_addend = addend;
7496 }
7497
bd97cb95
DJ		 7498 /* Handle calls via the PLT. */
7499 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7500 {
7501 value = (splt->output_section->vma
7502 + splt->output_offset
7503 + h->plt.offset);
7504 /* Target the Thumb stub before the ARM PLT entry. */
7505 value -= PLT_THUMB_STUB_SIZE;
7506 *unresolved_reloc_p = FALSE;
7507 }
7508
c19d1205
ZW		 7509 /* ??? Should handle interworking? GCC might someday try to
7510 use this for tail calls. */
7511
7512 relocation = value + signed_addend;
7513 relocation -= (input_section->output_section->vma
7514 + input_section->output_offset
7515 + rel->r_offset);
a00a1f35 7516 signed_check = (bfd_signed_vma) relocation;
c19d1205 7517
c19d1205
ZW		 7518 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7519 overflow = TRUE;
7520
7521 /* Put RELOCATION back into the insn. */
7522 {
7523 bfd_vma S = (relocation & 0x00100000) >> 20;
7524 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7525 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7526 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7527 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7528
a00a1f35 7529 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7530 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7531 }
7532
7533 /* Put the relocated value back in the object file: */
7534 bfd_put_16 (input_bfd, upper_insn, hit_data);
7535 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7536
7537 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7538 }
7539
7540 case R_ARM_THM_JUMP11:
7541 case R_ARM_THM_JUMP8:
7542 case R_ARM_THM_JUMP6:
51c5503b
NC		 7543 /* Thumb B (branch) instruction). */
7544 {
6cf9e9fe 7545 bfd_signed_vma relocation;
51c5503b
NC		 7546 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7547 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7548 bfd_signed_vma signed_check;
7549
c19d1205
ZW		 7550 /* CZB cannot jump backward. */
7551 if (r_type == R_ARM_THM_JUMP6)
7552 reloc_signed_min = 0;
7553
4e7fd91e 7554 if (globals->use_rel)
6cf9e9fe 7555 {
4e7fd91e
PB		 7556 /* Need to refetch addend. */
7557 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7558 if (addend & ((howto->src_mask + 1) >> 1))
7559 {
7560 signed_addend = -1;
7561 signed_addend &= ~ howto->src_mask;
7562 signed_addend |= addend;
7563 }
7564 else
7565 signed_addend = addend;
7566 /* The value in the insn has been right shifted. We need to
7567 undo this, so that we can perform the address calculation
7568 in terms of bytes. */
7569 signed_addend <<= howto->rightshift;
6cf9e9fe 7570 }
6cf9e9fe 7571 relocation = value + signed_addend;
51c5503b
NC		 7572
7573 relocation -= (input_section->output_section->vma
7574 + input_section->output_offset
7575 + rel->r_offset);
7576
6cf9e9fe
NC		 7577 relocation >>= howto->rightshift;
7578 signed_check = relocation;
c19d1205
ZW		 7579
7580 if (r_type == R_ARM_THM_JUMP6)
7581 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7582 else
7583 relocation &= howto->dst_mask;
51c5503b 7584 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7585
51c5503b
NC		 7586 bfd_put_16 (input_bfd, relocation, hit_data);
7587
7588 /* Assumes two's complement. */
7589 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7590 return bfd_reloc_overflow;
7591
7592 return bfd_reloc_ok;
7593 }
cedb70c5 7594
8375c36b
PB		 7595 case R_ARM_ALU_PCREL7_0:
7596 case R_ARM_ALU_PCREL15_8:
7597 case R_ARM_ALU_PCREL23_15:
7598 {
7599 bfd_vma insn;
7600 bfd_vma relocation;
7601
7602 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7603 if (globals->use_rel)
7604 {
7605 /* Extract the addend. */
7606 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7607 signed_addend = addend;
7608 }
8375c36b
PB		 7609 relocation = value + signed_addend;
7610
7611 relocation -= (input_section->output_section->vma
7612 + input_section->output_offset
7613 + rel->r_offset);
7614 insn = (insn & ~0xfff)
7615 | ((howto->bitpos << 7) & 0xf00)
7616 | ((relocation >> howto->bitpos) & 0xff);
7617 bfd_put_32 (input_bfd, value, hit_data);
7618 }
7619 return bfd_reloc_ok;
7620
252b5132
RH		 7621 case R_ARM_GNU_VTINHERIT:
7622 case R_ARM_GNU_VTENTRY:
7623 return bfd_reloc_ok;
7624
c19d1205 7625 case R_ARM_GOTOFF32:
252b5132
RH		 7626 /* Relocation is relative to the start of the
7627 global offset table. */
7628
7629 BFD_ASSERT (sgot != NULL);
7630 if (sgot == NULL)
7631 return bfd_reloc_notsupported;
9a5aca8c 7632
cedb70c5 7633 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7634 address by one, so that attempts to call the function pointer will
7635 correctly interpret it as Thumb code. */
7636 if (sym_flags == STT_ARM_TFUNC)
7637 value += 1;
7638
252b5132
RH		 7639 /* Note that sgot->output_offset is not involved in this
7640 calculation. We always want the start of .got. If we
7641 define _GLOBAL_OFFSET_TABLE in a different way, as is
7642 permitted by the ABI, we might have to change this
9b485d32 7643 calculation. */
252b5132 7644 value -= sgot->output_section->vma;
f21f3fe0 7645 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7646 contents, rel->r_offset, value,
00a97672 7647 rel->r_addend);
252b5132
RH		 7648
7649 case R_ARM_GOTPC:
a7c10850 7650 /* Use global offset table as symbol value. */
252b5132 7651 BFD_ASSERT (sgot != NULL);
f21f3fe0 7652
252b5132
RH		 7653 if (sgot == NULL)
7654 return bfd_reloc_notsupported;
7655
0945cdfd 7656 *unresolved_reloc_p = FALSE;
252b5132 7657 value = sgot->output_section->vma;
f21f3fe0 7658 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7659 contents, rel->r_offset, value,
00a97672 7660 rel->r_addend);
f21f3fe0 7661
252b5132 7662 case R_ARM_GOT32:
eb043451 7663 case R_ARM_GOT_PREL:
252b5132 7664 /* Relocation is to the entry for this symbol in the
9b485d32 7665 global offset table. */
252b5132
RH		 7666 if (sgot == NULL)
7667 return bfd_reloc_notsupported;
f21f3fe0 7668
252b5132
RH		 7669 if (h != NULL)
7670 {
7671 bfd_vma off;
5e681ec4 7672 bfd_boolean dyn;
f21f3fe0 7673
252b5132
RH		 7674 off = h->got.offset;
7675 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7676 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7677
5e681ec4 7678 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7679 || (info->shared
5e681ec4
PB		 7680 && SYMBOL_REFERENCES_LOCAL (info, h))
7681 || (ELF_ST_VISIBILITY (h->other)
7682 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7683 {
7684 /* This is actually a static link, or it is a -Bsymbolic link
7685 and the symbol is defined locally. We must initialize this
7686 entry in the global offset table. Since the offset must
7687 always be a multiple of 4, we use the least significant bit
7688 to record whether we have initialized it already.
f21f3fe0 7689
00a97672 7690 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7691 entry to initialize the value. This is done in the
9b485d32 7692 finish_dynamic_symbol routine. */
252b5132
RH		 7693 if ((off & 1) != 0)
7694 off &= ~1;
7695 else
7696 {
ee29b9fb
RE		 7697 /* If we are addressing a Thumb function, we need to
7698 adjust the address by one, so that attempts to
7699 call the function pointer will correctly
7700 interpret it as Thumb code. */
7701 if (sym_flags == STT_ARM_TFUNC)
7702 value |= 1;
7703
252b5132
RH		 7704 bfd_put_32 (output_bfd, value, sgot->contents + off);
7705 h->got.offset |= 1;
7706 }
7707 }
0945cdfd
DJ		 7708 else
7709 *unresolved_reloc_p = FALSE;
f21f3fe0 7710
252b5132
RH		 7711 value = sgot->output_offset + off;
7712 }
7713 else
7714 {
7715 bfd_vma off;
f21f3fe0 7716
252b5132
RH		 7717 BFD_ASSERT (local_got_offsets != NULL &&
7718 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7719
252b5132 7720 off = local_got_offsets[r_symndx];
f21f3fe0 7721
252b5132
RH		 7722 /* The offset must always be a multiple of 4. We use the
7723 least significant bit to record whether we have already
9b485d32 7724 generated the necessary reloc. */
252b5132
RH		 7725 if ((off & 1) != 0)
7726 off &= ~1;
7727 else
7728 {
b7693d02
DJ		 7729 /* If we are addressing a Thumb function, we need to
7730 adjust the address by one, so that attempts to
7731 call the function pointer will correctly
7732 interpret it as Thumb code. */
7733 if (sym_flags == STT_ARM_TFUNC)
7734 value |= 1;
7735
00a97672
RS		 7736 if (globals->use_rel)
7737 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7738
252b5132
RH		 7739 if (info->shared)
7740 {
7741 asection * srelgot;
947216bf
AM		 7742 Elf_Internal_Rela outrel;
7743 bfd_byte *loc;
f21f3fe0 7744
00a97672
RS		 7745 srelgot = (bfd_get_section_by_name
7746 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7747 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7748
00a97672 7749 outrel.r_addend = addend + value;
252b5132 7750 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7751 + sgot->output_offset
252b5132
RH		 7752 + off);
7753 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7754 loc = srelgot->contents;
00a97672
RS		 7755 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7756 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7757 }
f21f3fe0 7758
252b5132
RH		 7759 local_got_offsets[r_symndx] |= 1;
7760 }
f21f3fe0 7761
252b5132
RH		 7762 value = sgot->output_offset + off;
7763 }
eb043451
PB		 7764 if (r_type != R_ARM_GOT32)
7765 value += sgot->output_section->vma;
9a5aca8c 7766
f21f3fe0 7767 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7768 contents, rel->r_offset, value,
00a97672 7769 rel->r_addend);
f21f3fe0 7770
ba93b8ac
DJ		 7771 case R_ARM_TLS_LDO32:
7772 value = value - dtpoff_base (info);
7773
7774 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7775 contents, rel->r_offset, value,
7776 rel->r_addend);
ba93b8ac
DJ		 7777
7778 case R_ARM_TLS_LDM32:
7779 {
7780 bfd_vma off;
7781
7782 if (globals->sgot == NULL)
7783 abort ();
7784
7785 off = globals->tls_ldm_got.offset;
7786
7787 if ((off & 1) != 0)
7788 off &= ~1;
7789 else
7790 {
7791 /* If we don't know the module number, create a relocation
7792 for it. */
7793 if (info->shared)
7794 {
7795 Elf_Internal_Rela outrel;
7796 bfd_byte *loc;
7797
7798 if (globals->srelgot == NULL)
7799 abort ();
7800
00a97672 7801 outrel.r_addend = 0;
ba93b8ac
DJ		 7802 outrel.r_offset = (globals->sgot->output_section->vma
7803 + globals->sgot->output_offset + off);
7804 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7805
00a97672
RS		 7806 if (globals->use_rel)
7807 bfd_put_32 (output_bfd, outrel.r_addend,
7808 globals->sgot->contents + off);
ba93b8ac
DJ		 7809
7810 loc = globals->srelgot->contents;
00a97672
RS		 7811 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
7812 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7813 }
7814 else
7815 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
7816
7817 globals->tls_ldm_got.offset |= 1;
7818 }
7819
906e58ca 7820 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7821 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7822
7823 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7824 contents, rel->r_offset, value,
00a97672 7825 rel->r_addend);
ba93b8ac
DJ		 7826 }
7827
7828 case R_ARM_TLS_GD32:
7829 case R_ARM_TLS_IE32:
7830 {
7831 bfd_vma off;
7832 int indx;
7833 char tls_type;
7834
7835 if (globals->sgot == NULL)
7836 abort ();
7837
7838 indx = 0;
7839 if (h != NULL)
7840 {
7841 bfd_boolean dyn;
7842 dyn = globals->root.dynamic_sections_created;
7843 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7844 && (!info->shared
7845 || !SYMBOL_REFERENCES_LOCAL (info, h)))
7846 {
7847 *unresolved_reloc_p = FALSE;
7848 indx = h->dynindx;
7849 }
7850 off = h->got.offset;
7851 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
7852 }
7853 else
7854 {
7855 if (local_got_offsets == NULL)
7856 abort ();
7857 off = local_got_offsets[r_symndx];
7858 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
7859 }
7860
7861 if (tls_type == GOT_UNKNOWN)
7862 abort ();
7863
7864 if ((off & 1) != 0)
7865 off &= ~1;
7866 else
7867 {
7868 bfd_boolean need_relocs = FALSE;
7869 Elf_Internal_Rela outrel;
7870 bfd_byte *loc = NULL;
7871 int cur_off = off;
7872
7873 /* The GOT entries have not been initialized yet. Do it
7874 now, and emit any relocations. If both an IE GOT and a
7875 GD GOT are necessary, we emit the GD first. */
7876
7877 if ((info->shared || indx != 0)
7878 && (h == NULL
7879 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7880 || h->root.type != bfd_link_hash_undefweak))
7881 {
7882 need_relocs = TRUE;
7883 if (globals->srelgot == NULL)
7884 abort ();
7885 loc = globals->srelgot->contents;
00a97672 7886 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 7887 }
7888
7889 if (tls_type & GOT_TLS_GD)
7890 {
7891 if (need_relocs)
7892 {
00a97672 7893 outrel.r_addend = 0;
ba93b8ac 7894 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 7895 + globals->sgot->output_offset
7896 + cur_off);
ba93b8ac 7897 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 7898
00a97672
RS		 7899 if (globals->use_rel)
7900 bfd_put_32 (output_bfd, outrel.r_addend,
7901 globals->sgot->contents + cur_off);
7902
7903 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7904 globals->srelgot->reloc_count++;
00a97672 7905 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7906
7907 if (indx == 0)
7908 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7909 globals->sgot->contents + cur_off + 4);
7910 else
7911 {
00a97672 7912 outrel.r_addend = 0;
ba93b8ac
DJ		 7913 outrel.r_info = ELF32_R_INFO (indx,
7914 R_ARM_TLS_DTPOFF32);
7915 outrel.r_offset += 4;
00a97672
RS		 7916
7917 if (globals->use_rel)
7918 bfd_put_32 (output_bfd, outrel.r_addend,
7919 globals->sgot->contents + cur_off + 4);
7920
7921
7922 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7923 globals->srelgot->reloc_count++;
00a97672 7924 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7925 }
7926 }
7927 else
7928 {
7929 /* If we are not emitting relocations for a
7930 general dynamic reference, then we must be in a
7931 static link or an executable link with the
7932 symbol binding locally. Mark it as belonging
7933 to module 1, the executable. */
7934 bfd_put_32 (output_bfd, 1,
7935 globals->sgot->contents + cur_off);
7936 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7937 globals->sgot->contents + cur_off + 4);
7938 }
7939
7940 cur_off += 8;
7941 }
7942
7943 if (tls_type & GOT_TLS_IE)
7944 {
7945 if (need_relocs)
7946 {
00a97672
RS		 7947 if (indx == 0)
7948 outrel.r_addend = value - dtpoff_base (info);
7949 else
7950 outrel.r_addend = 0;
ba93b8ac
DJ		 7951 outrel.r_offset = (globals->sgot->output_section->vma
7952 + globals->sgot->output_offset
7953 + cur_off);
7954 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
7955
00a97672
RS		 7956 if (globals->use_rel)
7957 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 7958 globals->sgot->contents + cur_off);
7959
00a97672 7960 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7961 globals->srelgot->reloc_count++;
00a97672 7962 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7963 }
7964 else
7965 bfd_put_32 (output_bfd, tpoff (info, value),
7966 globals->sgot->contents + cur_off);
7967 cur_off += 4;
7968 }
7969
7970 if (h != NULL)
7971 h->got.offset |= 1;
7972 else
7973 local_got_offsets[r_symndx] |= 1;
7974 }
7975
7976 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
7977 off += 8;
906e58ca 7978 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7979 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7980
7981 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7982 contents, rel->r_offset, value,
00a97672 7983 rel->r_addend);
ba93b8ac
DJ		 7984 }
7985
7986 case R_ARM_TLS_LE32:
7987 if (info->shared)
7988 {
7989 (*_bfd_error_handler)
7990 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
7991 input_bfd, input_section,
7992 (long) rel->r_offset, howto->name);
906e58ca 7993 return FALSE;
ba93b8ac
DJ		 7994 }
7995 else
7996 value = tpoff (info, value);
906e58ca 7997
ba93b8ac 7998 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7999 contents, rel->r_offset, value,
8000 rel->r_addend);
ba93b8ac 8001
319850b4
JB		 8002 case R_ARM_V4BX:
8003 if (globals->fix_v4bx)
845b51d6
PB		 8004 {
8005 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8006
845b51d6
PB		 8007 /* Ensure that we have a BX instruction. */
8008 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8009
845b51d6
PB		 8010 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8011 {
8012 /* Branch to veneer. */
8013 bfd_vma glue_addr;
8014 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8015 glue_addr -= input_section->output_section->vma
8016 + input_section->output_offset
8017 + rel->r_offset + 8;
8018 insn = (insn & 0xf0000000) | 0x0a000000
8019 | ((glue_addr >> 2) & 0x00ffffff);
8020 }
8021 else
8022 {
8023 /* Preserve Rm (lowest four bits) and the condition code
8024 (highest four bits). Other bits encode MOV PC,Rm. */
8025 insn = (insn & 0xf000000f) | 0x01a0f000;
8026 }
319850b4 8027
845b51d6
PB		 8028 bfd_put_32 (input_bfd, insn, hit_data);
8029 }
319850b4
JB		 8030 return bfd_reloc_ok;
8031
b6895b4f
PB		 8032 case R_ARM_MOVW_ABS_NC:
8033 case R_ARM_MOVT_ABS:
8034 case R_ARM_MOVW_PREL_NC:
8035 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8036 /* Until we properly support segment-base-relative addressing then
8037 we assume the segment base to be zero, as for the group relocations.
8038 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8039 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8040 case R_ARM_MOVW_BREL_NC:
8041 case R_ARM_MOVW_BREL:
8042 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8043 {
8044 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8045
8046 if (globals->use_rel)
8047 {
8048 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8049 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8050 }
92f5d02b 8051
b6895b4f 8052 value += signed_addend;
b6895b4f
PB		 8053
8054 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8055 value -= (input_section->output_section->vma
8056 + input_section->output_offset + rel->r_offset);
8057
92f5d02b
MS		 8058 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8059 return bfd_reloc_overflow;
8060
8061 if (sym_flags == STT_ARM_TFUNC)
8062 value |= 1;
8063
8064 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8065 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8066 value >>= 16;
8067
8068 insn &= 0xfff0f000;
8069 insn |= value & 0xfff;
8070 insn |= (value & 0xf000) << 4;
8071 bfd_put_32 (input_bfd, insn, hit_data);
8072 }
8073 return bfd_reloc_ok;
8074
8075 case R_ARM_THM_MOVW_ABS_NC:
8076 case R_ARM_THM_MOVT_ABS:
8077 case R_ARM_THM_MOVW_PREL_NC:
8078 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8079 /* Until we properly support segment-base-relative addressing then
8080 we assume the segment base to be zero, as for the above relocations.
8081 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8082 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8083 as R_ARM_THM_MOVT_ABS. */
8084 case R_ARM_THM_MOVW_BREL_NC:
8085 case R_ARM_THM_MOVW_BREL:
8086 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8087 {
8088 bfd_vma insn;
906e58ca 8089
b6895b4f
PB		 8090 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8091 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8092
8093 if (globals->use_rel)
8094 {
8095 addend = ((insn >> 4) & 0xf000)
8096 | ((insn >> 15) & 0x0800)
8097 | ((insn >> 4) & 0x0700)
8098 | (insn & 0x00ff);
39623e12 8099 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8100 }
92f5d02b 8101
b6895b4f 8102 value += signed_addend;
b6895b4f
PB		 8103
8104 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8105 value -= (input_section->output_section->vma
8106 + input_section->output_offset + rel->r_offset);
8107
92f5d02b
MS		 8108 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8109 return bfd_reloc_overflow;
8110
8111 if (sym_flags == STT_ARM_TFUNC)
8112 value |= 1;
8113
8114 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8115 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8116 value >>= 16;
8117
8118 insn &= 0xfbf08f00;
8119 insn |= (value & 0xf000) << 4;
8120 insn |= (value & 0x0800) << 15;
8121 insn |= (value & 0x0700) << 4;
8122 insn |= (value & 0x00ff);
8123
8124 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8125 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8126 }
8127 return bfd_reloc_ok;
8128
4962c51a
MS		 8129 case R_ARM_ALU_PC_G0_NC:
8130 case R_ARM_ALU_PC_G1_NC:
8131 case R_ARM_ALU_PC_G0:
8132 case R_ARM_ALU_PC_G1:
8133 case R_ARM_ALU_PC_G2:
8134 case R_ARM_ALU_SB_G0_NC:
8135 case R_ARM_ALU_SB_G1_NC:
8136 case R_ARM_ALU_SB_G0:
8137 case R_ARM_ALU_SB_G1:
8138 case R_ARM_ALU_SB_G2:
8139 {
8140 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8141 bfd_vma pc = input_section->output_section->vma
8142 + input_section->output_offset + rel->r_offset;
8143 /* sb should be the origin of the *segment* containing the symbol.
8144 It is not clear how to obtain this OS-dependent value, so we
8145 make an arbitrary choice of zero. */
8146 bfd_vma sb = 0;
8147 bfd_vma residual;
8148 bfd_vma g_n;
8149 bfd_signed_vma signed_value;
8150 int group = 0;
8151
8152 /* Determine which group of bits to select. */
8153 switch (r_type)
8154 {
8155 case R_ARM_ALU_PC_G0_NC:
8156 case R_ARM_ALU_PC_G0:
8157 case R_ARM_ALU_SB_G0_NC:
8158 case R_ARM_ALU_SB_G0:
8159 group = 0;
8160 break;
8161
8162 case R_ARM_ALU_PC_G1_NC:
8163 case R_ARM_ALU_PC_G1:
8164 case R_ARM_ALU_SB_G1_NC:
8165 case R_ARM_ALU_SB_G1:
8166 group = 1;
8167 break;
8168
8169 case R_ARM_ALU_PC_G2:
8170 case R_ARM_ALU_SB_G2:
8171 group = 2;
8172 break;
8173
8174 default:
906e58ca 8175 abort ();
4962c51a
MS		 8176 }
8177
8178 /* If REL, extract the addend from the insn. If RELA, it will
8179 have already been fetched for us. */
8180 if (globals->use_rel)
8181 {
8182 int negative;
8183 bfd_vma constant = insn & 0xff;
8184 bfd_vma rotation = (insn & 0xf00) >> 8;
8185
8186 if (rotation == 0)
8187 signed_addend = constant;
8188 else
8189 {
8190 /* Compensate for the fact that in the instruction, the
8191 rotation is stored in multiples of 2 bits. */
8192 rotation *= 2;
8193
8194 /* Rotate "constant" right by "rotation" bits. */
8195 signed_addend = (constant >> rotation) |
8196 (constant << (8 * sizeof (bfd_vma) - rotation));
8197 }
8198
8199 /* Determine if the instruction is an ADD or a SUB.
8200 (For REL, this determines the sign of the addend.) */
8201 negative = identify_add_or_sub (insn);
8202 if (negative == 0)
8203 {
8204 (*_bfd_error_handler)
8205 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8206 input_bfd, input_section,
8207 (long) rel->r_offset, howto->name);
906e58ca 8208 return bfd_reloc_overflow;
4962c51a
MS		 8209 }
8210
8211 signed_addend *= negative;
8212 }
8213
8214 /* Compute the value (X) to go in the place. */
8215 if (r_type == R_ARM_ALU_PC_G0_NC
8216 || r_type == R_ARM_ALU_PC_G1_NC
8217 || r_type == R_ARM_ALU_PC_G0
8218 || r_type == R_ARM_ALU_PC_G1
8219 || r_type == R_ARM_ALU_PC_G2)
8220 /* PC relative. */
8221 signed_value = value - pc + signed_addend;
8222 else
8223 /* Section base relative. */
8224 signed_value = value - sb + signed_addend;
8225
8226 /* If the target symbol is a Thumb function, then set the
8227 Thumb bit in the address. */
8228 if (sym_flags == STT_ARM_TFUNC)
8229 signed_value |= 1;
8230
8231 /* Calculate the value of the relevant G_n, in encoded
8232 constant-with-rotation format. */
8233 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8234 &residual);
8235
8236 /* Check for overflow if required. */
8237 if ((r_type == R_ARM_ALU_PC_G0
8238 || r_type == R_ARM_ALU_PC_G1
8239 || r_type == R_ARM_ALU_PC_G2
8240 || r_type == R_ARM_ALU_SB_G0
8241 || r_type == R_ARM_ALU_SB_G1
8242 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8243 {
8244 (*_bfd_error_handler)
8245 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8246 input_bfd, input_section,
8247 (long) rel->r_offset, abs (signed_value), howto->name);
8248 return bfd_reloc_overflow;
8249 }
8250
8251 /* Mask out the value and the ADD/SUB part of the opcode; take care
8252 not to destroy the S bit. */
8253 insn &= 0xff1ff000;
8254
8255 /* Set the opcode according to whether the value to go in the
8256 place is negative. */
8257 if (signed_value < 0)
8258 insn |= 1 << 22;
8259 else
8260 insn |= 1 << 23;
8261
8262 /* Encode the offset. */
8263 insn |= g_n;
8264
8265 bfd_put_32 (input_bfd, insn, hit_data);
8266 }
8267 return bfd_reloc_ok;
8268
8269 case R_ARM_LDR_PC_G0:
8270 case R_ARM_LDR_PC_G1:
8271 case R_ARM_LDR_PC_G2:
8272 case R_ARM_LDR_SB_G0:
8273 case R_ARM_LDR_SB_G1:
8274 case R_ARM_LDR_SB_G2:
8275 {
8276 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8277 bfd_vma pc = input_section->output_section->vma
8278 + input_section->output_offset + rel->r_offset;
8279 bfd_vma sb = 0; /* See note above. */
8280 bfd_vma residual;
8281 bfd_signed_vma signed_value;
8282 int group = 0;
8283
8284 /* Determine which groups of bits to calculate. */
8285 switch (r_type)
8286 {
8287 case R_ARM_LDR_PC_G0:
8288 case R_ARM_LDR_SB_G0:
8289 group = 0;
8290 break;
8291
8292 case R_ARM_LDR_PC_G1:
8293 case R_ARM_LDR_SB_G1:
8294 group = 1;
8295 break;
8296
8297 case R_ARM_LDR_PC_G2:
8298 case R_ARM_LDR_SB_G2:
8299 group = 2;
8300 break;
8301
8302 default:
906e58ca 8303 abort ();
4962c51a
MS		 8304 }
8305
8306 /* If REL, extract the addend from the insn. If RELA, it will
8307 have already been fetched for us. */
8308 if (globals->use_rel)
8309 {
8310 int negative = (insn & (1 << 23)) ? 1 : -1;
8311 signed_addend = negative * (insn & 0xfff);
8312 }
8313
8314 /* Compute the value (X) to go in the place. */
8315 if (r_type == R_ARM_LDR_PC_G0
8316 || r_type == R_ARM_LDR_PC_G1
8317 || r_type == R_ARM_LDR_PC_G2)
8318 /* PC relative. */
8319 signed_value = value - pc + signed_addend;
8320 else
8321 /* Section base relative. */
8322 signed_value = value - sb + signed_addend;
8323
8324 /* Calculate the value of the relevant G_{n-1} to obtain
8325 the residual at that stage. */
8326 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8327
8328 /* Check for overflow. */
8329 if (residual >= 0x1000)
8330 {
8331 (*_bfd_error_handler)
8332 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8333 input_bfd, input_section,
8334 (long) rel->r_offset, abs (signed_value), howto->name);
8335 return bfd_reloc_overflow;
8336 }
8337
8338 /* Mask out the value and U bit. */
8339 insn &= 0xff7ff000;
8340
8341 /* Set the U bit if the value to go in the place is non-negative. */
8342 if (signed_value >= 0)
8343 insn |= 1 << 23;
8344
8345 /* Encode the offset. */
8346 insn |= residual;
8347
8348 bfd_put_32 (input_bfd, insn, hit_data);
8349 }
8350 return bfd_reloc_ok;
8351
8352 case R_ARM_LDRS_PC_G0:
8353 case R_ARM_LDRS_PC_G1:
8354 case R_ARM_LDRS_PC_G2:
8355 case R_ARM_LDRS_SB_G0:
8356 case R_ARM_LDRS_SB_G1:
8357 case R_ARM_LDRS_SB_G2:
8358 {
8359 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8360 bfd_vma pc = input_section->output_section->vma
8361 + input_section->output_offset + rel->r_offset;
8362 bfd_vma sb = 0; /* See note above. */
8363 bfd_vma residual;
8364 bfd_signed_vma signed_value;
8365 int group = 0;
8366
8367 /* Determine which groups of bits to calculate. */
8368 switch (r_type)
8369 {
8370 case R_ARM_LDRS_PC_G0:
8371 case R_ARM_LDRS_SB_G0:
8372 group = 0;
8373 break;
8374
8375 case R_ARM_LDRS_PC_G1:
8376 case R_ARM_LDRS_SB_G1:
8377 group = 1;
8378 break;
8379
8380 case R_ARM_LDRS_PC_G2:
8381 case R_ARM_LDRS_SB_G2:
8382 group = 2;
8383 break;
8384
8385 default:
906e58ca 8386 abort ();
4962c51a
MS		 8387 }
8388
8389 /* If REL, extract the addend from the insn. If RELA, it will
8390 have already been fetched for us. */
8391 if (globals->use_rel)
8392 {
8393 int negative = (insn & (1 << 23)) ? 1 : -1;
8394 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8395 }
8396
8397 /* Compute the value (X) to go in the place. */
8398 if (r_type == R_ARM_LDRS_PC_G0
8399 || r_type == R_ARM_LDRS_PC_G1
8400 || r_type == R_ARM_LDRS_PC_G2)
8401 /* PC relative. */
8402 signed_value = value - pc + signed_addend;
8403 else
8404 /* Section base relative. */
8405 signed_value = value - sb + signed_addend;
8406
8407 /* Calculate the value of the relevant G_{n-1} to obtain
8408 the residual at that stage. */
8409 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8410
8411 /* Check for overflow. */
8412 if (residual >= 0x100)
8413 {
8414 (*_bfd_error_handler)
8415 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8416 input_bfd, input_section,
8417 (long) rel->r_offset, abs (signed_value), howto->name);
8418 return bfd_reloc_overflow;
8419 }
8420
8421 /* Mask out the value and U bit. */
8422 insn &= 0xff7ff0f0;
8423
8424 /* Set the U bit if the value to go in the place is non-negative. */
8425 if (signed_value >= 0)
8426 insn |= 1 << 23;
8427
8428 /* Encode the offset. */
8429 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8430
8431 bfd_put_32 (input_bfd, insn, hit_data);
8432 }
8433 return bfd_reloc_ok;
8434
8435 case R_ARM_LDC_PC_G0:
8436 case R_ARM_LDC_PC_G1:
8437 case R_ARM_LDC_PC_G2:
8438 case R_ARM_LDC_SB_G0:
8439 case R_ARM_LDC_SB_G1:
8440 case R_ARM_LDC_SB_G2:
8441 {
8442 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8443 bfd_vma pc = input_section->output_section->vma
8444 + input_section->output_offset + rel->r_offset;
8445 bfd_vma sb = 0; /* See note above. */
8446 bfd_vma residual;
8447 bfd_signed_vma signed_value;
8448 int group = 0;
8449
8450 /* Determine which groups of bits to calculate. */
8451 switch (r_type)
8452 {
8453 case R_ARM_LDC_PC_G0:
8454 case R_ARM_LDC_SB_G0:
8455 group = 0;
8456 break;
8457
8458 case R_ARM_LDC_PC_G1:
8459 case R_ARM_LDC_SB_G1:
8460 group = 1;
8461 break;
8462
8463 case R_ARM_LDC_PC_G2:
8464 case R_ARM_LDC_SB_G2:
8465 group = 2;
8466 break;
8467
8468 default:
906e58ca 8469 abort ();
4962c51a
MS		 8470 }
8471
8472 /* If REL, extract the addend from the insn. If RELA, it will
8473 have already been fetched for us. */
8474 if (globals->use_rel)
8475 {
8476 int negative = (insn & (1 << 23)) ? 1 : -1;
8477 signed_addend = negative * ((insn & 0xff) << 2);
8478 }
8479
8480 /* Compute the value (X) to go in the place. */
8481 if (r_type == R_ARM_LDC_PC_G0
8482 || r_type == R_ARM_LDC_PC_G1
8483 || r_type == R_ARM_LDC_PC_G2)
8484 /* PC relative. */
8485 signed_value = value - pc + signed_addend;
8486 else
8487 /* Section base relative. */
8488 signed_value = value - sb + signed_addend;
8489
8490 /* Calculate the value of the relevant G_{n-1} to obtain
8491 the residual at that stage. */
8492 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8493
8494 /* Check for overflow. (The absolute value to go in the place must be
8495 divisible by four and, after having been divided by four, must
8496 fit in eight bits.) */
8497 if ((residual & 0x3) != 0 || residual >= 0x400)
8498 {
8499 (*_bfd_error_handler)
8500 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8501 input_bfd, input_section,
8502 (long) rel->r_offset, abs (signed_value), howto->name);
8503 return bfd_reloc_overflow;
8504 }
8505
8506 /* Mask out the value and U bit. */
8507 insn &= 0xff7fff00;
8508
8509 /* Set the U bit if the value to go in the place is non-negative. */
8510 if (signed_value >= 0)
8511 insn |= 1 << 23;
8512
8513 /* Encode the offset. */
8514 insn |= residual >> 2;
8515
8516 bfd_put_32 (input_bfd, insn, hit_data);
8517 }
8518 return bfd_reloc_ok;
8519
252b5132
RH		 8520 default:
8521 return bfd_reloc_notsupported;
8522 }
8523}
8524
98c1d4aa
NC		 8525/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8526static void
57e8b36a
NC		 8527arm_add_to_rel (bfd * abfd,
8528 bfd_byte * address,
8529 reloc_howto_type * howto,
8530 bfd_signed_vma increment)
98c1d4aa 8531{
98c1d4aa
NC		 8532 bfd_signed_vma addend;
8533
bd97cb95
DJ		 8534 if (howto->type == R_ARM_THM_CALL
8535 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8536 {
9a5aca8c
AM		 8537 int upper_insn, lower_insn;
8538 int upper, lower;
98c1d4aa 8539
9a5aca8c
AM		 8540 upper_insn = bfd_get_16 (abfd, address);
8541 lower_insn = bfd_get_16 (abfd, address + 2);
8542 upper = upper_insn & 0x7ff;
8543 lower = lower_insn & 0x7ff;
8544
8545 addend = (upper << 12) | (lower << 1);
ddda4409 8546 addend += increment;
9a5aca8c 8547 addend >>= 1;
98c1d4aa 8548
9a5aca8c
AM		 8549 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8550 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8551
dc810e39
AM		 8552 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8553 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8554 }
8555 else
8556 {
8557 bfd_vma contents;
8558
8559 contents = bfd_get_32 (abfd, address);
8560
8561 /* Get the (signed) value from the instruction. */
8562 addend = contents & howto->src_mask;
8563 if (addend & ((howto->src_mask + 1) >> 1))
8564 {
8565 bfd_signed_vma mask;
8566
8567 mask = -1;
8568 mask &= ~ howto->src_mask;
8569 addend |= mask;
8570 }
8571
8572 /* Add in the increment, (which is a byte value). */
8573 switch (howto->type)
8574 {
8575 default:
8576 addend += increment;
8577 break;
8578
8579 case R_ARM_PC24:
c6596c5e 8580 case R_ARM_PLT32:
5b5bb741
PB		 8581 case R_ARM_CALL:
8582 case R_ARM_JUMP24:
9a5aca8c 8583 addend <<= howto->size;
dc810e39 8584 addend += increment;
9a5aca8c
AM		 8585
8586 /* Should we check for overflow here ? */
8587
8588 /* Drop any undesired bits. */
8589 addend >>= howto->rightshift;
8590 break;
8591 }
8592
8593 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8594
8595 bfd_put_32 (abfd, contents, address);
ddda4409 8596 }
98c1d4aa 8597}
252b5132 8598
ba93b8ac
DJ		 8599#define IS_ARM_TLS_RELOC(R_TYPE) \
8600 ((R_TYPE) == R_ARM_TLS_GD32 \
8601 || (R_TYPE) == R_ARM_TLS_LDO32 \
8602 || (R_TYPE) == R_ARM_TLS_LDM32 \
8603 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8604 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8605 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8606 || (R_TYPE) == R_ARM_TLS_LE32 \
8607 || (R_TYPE) == R_ARM_TLS_IE32)
8608
252b5132 8609/* Relocate an ARM ELF section. */
906e58ca 8610
b34976b6 8611static bfd_boolean
57e8b36a
NC		 8612elf32_arm_relocate_section (bfd * output_bfd,
8613 struct bfd_link_info * info,
8614 bfd * input_bfd,
8615 asection * input_section,
8616 bfd_byte * contents,
8617 Elf_Internal_Rela * relocs,
8618 Elf_Internal_Sym * local_syms,
8619 asection ** local_sections)
252b5132 8620{
b34976b6
AM		 8621 Elf_Internal_Shdr *symtab_hdr;
8622 struct elf_link_hash_entry **sym_hashes;
8623 Elf_Internal_Rela *rel;
8624 Elf_Internal_Rela *relend;
8625 const char *name;
b32d3aa2 8626 struct elf32_arm_link_hash_table * globals;
252b5132 8627
4e7fd91e 8628 globals = elf32_arm_hash_table (info);
b491616a 8629
0ffa91dd 8630 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8631 sym_hashes = elf_sym_hashes (input_bfd);
8632
8633 rel = relocs;
8634 relend = relocs + input_section->reloc_count;
8635 for (; rel < relend; rel++)
8636 {
ba96a88f
NC		 8637 int r_type;
8638 reloc_howto_type * howto;
8639 unsigned long r_symndx;
8640 Elf_Internal_Sym * sym;
8641 asection * sec;
252b5132 8642 struct elf_link_hash_entry * h;
ba96a88f
NC		 8643 bfd_vma relocation;
8644 bfd_reloc_status_type r;
8645 arelent bfd_reloc;
ba93b8ac 8646 char sym_type;
0945cdfd 8647 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8648 char *error_message = NULL;
f21f3fe0 8649
252b5132 8650 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8651 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8652 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8653
ba96a88f
NC		 8654 if ( r_type == R_ARM_GNU_VTENTRY
8655 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8656 continue;
8657
b32d3aa2 8658 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8659 howto = bfd_reloc.howto;
252b5132 8660
252b5132
RH		 8661 h = NULL;
8662 sym = NULL;
8663 sec = NULL;
9b485d32 8664
252b5132
RH		 8665 if (r_symndx < symtab_hdr->sh_info)
8666 {
8667 sym = local_syms + r_symndx;
ba93b8ac 8668 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8669 sec = local_sections[r_symndx];
4e7fd91e 8670 if (globals->use_rel)
f8df10f4 8671 {
4e7fd91e
PB		 8672 relocation = (sec->output_section->vma
8673 + sec->output_offset
8674 + sym->st_value);
ab96bf03
AM		 8675 if (!info->relocatable
8676 && (sec->flags & SEC_MERGE)
8677 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8678 {
4e7fd91e
PB		 8679 asection *msec;
8680 bfd_vma addend, value;
8681
39623e12 8682 switch (r_type)
4e7fd91e 8683 {
39623e12
PB		 8684 case R_ARM_MOVW_ABS_NC:
8685 case R_ARM_MOVT_ABS:
8686 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8687 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8688 addend = (addend ^ 0x8000) - 0x8000;
8689 break;
f8df10f4 8690
39623e12
PB		 8691 case R_ARM_THM_MOVW_ABS_NC:
8692 case R_ARM_THM_MOVT_ABS:
8693 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8694 << 16;
8695 value |= bfd_get_16 (input_bfd,
8696 contents + rel->r_offset + 2);
8697 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8698 | ((value & 0x04000000) >> 15);
8699 addend = (addend ^ 0x8000) - 0x8000;
8700 break;
f8df10f4 8701
39623e12
PB		 8702 default:
8703 if (howto->rightshift
8704 || (howto->src_mask & (howto->src_mask + 1)))
8705 {
8706 (*_bfd_error_handler)
8707 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8708 input_bfd, input_section,
8709 (long) rel->r_offset, howto->name);
8710 return FALSE;
8711 }
8712
8713 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8714
8715 /* Get the (signed) value from the instruction. */
8716 addend = value & howto->src_mask;
8717 if (addend & ((howto->src_mask + 1) >> 1))
8718 {
8719 bfd_signed_vma mask;
8720
8721 mask = -1;
8722 mask &= ~ howto->src_mask;
8723 addend |= mask;
8724 }
8725 break;
4e7fd91e 8726 }
39623e12 8727
4e7fd91e
PB		 8728 msec = sec;
8729 addend =
8730 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8731 - relocation;
8732 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8733
8734 /* Cases here must match those in the preceeding
8735 switch statement. */
8736 switch (r_type)
8737 {
8738 case R_ARM_MOVW_ABS_NC:
8739 case R_ARM_MOVT_ABS:
8740 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8741 | (addend & 0xfff);
8742 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8743 break;
8744
8745 case R_ARM_THM_MOVW_ABS_NC:
8746 case R_ARM_THM_MOVT_ABS:
8747 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8748 | (addend & 0xff) | ((addend & 0x0800) << 15);
8749 bfd_put_16 (input_bfd, value >> 16,
8750 contents + rel->r_offset);
8751 bfd_put_16 (input_bfd, value,
8752 contents + rel->r_offset + 2);
8753 break;
8754
8755 default:
8756 value = (value & ~ howto->dst_mask)
8757 | (addend & howto->dst_mask);
8758 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8759 break;
8760 }
f8df10f4 8761 }
f8df10f4 8762 }
4e7fd91e
PB		 8763 else
8764 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8765 }
8766 else
8767 {
560e09e9 8768 bfd_boolean warned;
560e09e9 8769
b2a8e766
AM		 8770 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8771 r_symndx, symtab_hdr, sym_hashes,
8772 h, sec, relocation,
8773 unresolved_reloc, warned);
ba93b8ac
DJ		 8774
8775 sym_type = h->type;
252b5132
RH		 8776 }
8777
ab96bf03
AM		 8778 if (sec != NULL && elf_discarded_section (sec))
8779 {
8780 /* For relocs against symbols from removed linkonce sections,
8781 or sections discarded by a linker script, we just want the
8782 section contents zeroed. Avoid any special processing. */
8783 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
8784 rel->r_info = 0;
8785 rel->r_addend = 0;
8786 continue;
8787 }
8788
8789 if (info->relocatable)
8790 {
8791 /* This is a relocatable link. We don't have to change
8792 anything, unless the reloc is against a section symbol,
8793 in which case we have to adjust according to where the
8794 section symbol winds up in the output section. */
8795 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8796 {
8797 if (globals->use_rel)
8798 arm_add_to_rel (input_bfd, contents + rel->r_offset,
8799 howto, (bfd_signed_vma) sec->output_offset);
8800 else
8801 rel->r_addend += sec->output_offset;
8802 }
8803 continue;
8804 }
8805
252b5132
RH		 8806 if (h != NULL)
8807 name = h->root.root.string;
8808 else
8809 {
8810 name = (bfd_elf_string_from_elf_section
8811 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8812 if (name == NULL || *name == '\0')
8813 name = bfd_section_name (input_bfd, sec);
8814 }
f21f3fe0 8815
ba93b8ac
DJ		 8816 if (r_symndx != 0
8817 && r_type != R_ARM_NONE
8818 && (h == NULL
8819 || h->root.type == bfd_link_hash_defined
8820 || h->root.type == bfd_link_hash_defweak)
8821 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
8822 {
8823 (*_bfd_error_handler)
8824 ((sym_type == STT_TLS
8825 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
8826 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
8827 input_bfd,
8828 input_section,
8829 (long) rel->r_offset,
8830 howto->name,
8831 name);
8832 }
8833
252b5132
RH		 8834 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
8835 input_section, contents, rel,
8836 relocation, info, sec, name,
8837 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 8838 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 8839 &unresolved_reloc, &error_message);
0945cdfd
DJ		 8840
8841 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8842 because such sections are not SEC_ALLOC and thus ld.so will
8843 not process them. */
8844 if (unresolved_reloc
8845 && !((input_section->flags & SEC_DEBUGGING) != 0
8846 && h->def_dynamic))
8847 {
8848 (*_bfd_error_handler)
843fe662
L		 8849 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
8850 input_bfd,
8851 input_section,
8852 (long) rel->r_offset,
8853 howto->name,
8854 h->root.root.string);
0945cdfd
DJ		 8855 return FALSE;
8856 }
252b5132
RH		 8857
8858 if (r != bfd_reloc_ok)
8859 {
252b5132
RH		 8860 switch (r)
8861 {
8862 case bfd_reloc_overflow:
cf919dfd
PB		 8863 /* If the overflowing reloc was to an undefined symbol,
8864 we have already printed one error message and there
8865 is no point complaining again. */
8866 if ((! h ||
8867 h->root.type != bfd_link_hash_undefined)
8868 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 8869 (info, (h ? &h->root : NULL), name, howto->name,
8870 (bfd_vma) 0, input_bfd, input_section,
8871 rel->r_offset))))
b34976b6 8872 return FALSE;
252b5132
RH		 8873 break;
8874
8875 case bfd_reloc_undefined:
8876 if (!((*info->callbacks->undefined_symbol)
8877 (info, name, input_bfd, input_section,
b34976b6
AM		 8878 rel->r_offset, TRUE)))
8879 return FALSE;
252b5132
RH		 8880 break;
8881
8882 case bfd_reloc_outofrange:
f2a9dd69 8883 error_message = _("out of range");
252b5132
RH		 8884 goto common_error;
8885
8886 case bfd_reloc_notsupported:
f2a9dd69 8887 error_message = _("unsupported relocation");
252b5132
RH		 8888 goto common_error;
8889
8890 case bfd_reloc_dangerous:
f2a9dd69 8891 /* error_message should already be set. */
252b5132
RH		 8892 goto common_error;
8893
8894 default:
f2a9dd69 8895 error_message = _("unknown error");
8029a119 8896 /* Fall through. */
252b5132
RH		 8897
8898 common_error:
f2a9dd69
DJ		 8899 BFD_ASSERT (error_message != NULL);
8900 if (!((*info->callbacks->reloc_dangerous)
8901 (info, error_message, input_bfd, input_section,
252b5132 8902 rel->r_offset)))
b34976b6 8903 return FALSE;
252b5132
RH		 8904 break;
8905 }
8906 }
8907 }
8908
b34976b6 8909 return TRUE;
252b5132
RH		 8910}
8911
2468f9c9
PB		 8912/* Add a new unwind edit to the list described by HEAD, TAIL. If INDEX is zero,
8913 adds the edit to the start of the list. (The list must be built in order of
8914 ascending INDEX: the function's callers are primarily responsible for
8915 maintaining that condition). */
8916
8917static void
8918add_unwind_table_edit (arm_unwind_table_edit **head,
8919 arm_unwind_table_edit **tail,
8920 arm_unwind_edit_type type,
8921 asection *linked_section,
8922 unsigned int index)
8923{
8924 arm_unwind_table_edit *new_edit = xmalloc (sizeof (arm_unwind_table_edit));
8925
8926 new_edit->type = type;
8927 new_edit->linked_section = linked_section;
8928 new_edit->index = index;
8929
8930 if (index > 0)
8931 {
8932 new_edit->next = NULL;
8933
8934 if (*tail)
8935 (*tail)->next = new_edit;
8936
8937 (*tail) = new_edit;
8938
8939 if (!*head)
8940 (*head) = new_edit;
8941 }
8942 else
8943 {
8944 new_edit->next = *head;
8945
8946 if (!*tail)
8947 *tail = new_edit;
8948
8949 *head = new_edit;
8950 }
8951}
8952
8953static _arm_elf_section_data *get_arm_elf_section_data (asection *);
8954
8955/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
8956static void
8957adjust_exidx_size(asection *exidx_sec, int adjust)
8958{
8959 asection *out_sec;
8960
8961 if (!exidx_sec->rawsize)
8962 exidx_sec->rawsize = exidx_sec->size;
8963
8964 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
8965 out_sec = exidx_sec->output_section;
8966 /* Adjust size of output section. */
8967 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
8968}
8969
8970/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
8971static void
8972insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
8973{
8974 struct _arm_elf_section_data *exidx_arm_data;
8975
8976 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
8977 add_unwind_table_edit (
8978 &exidx_arm_data->u.exidx.unwind_edit_list,
8979 &exidx_arm_data->u.exidx.unwind_edit_tail,
8980 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
8981
8982 adjust_exidx_size(exidx_sec, 8);
8983}
8984
8985/* Scan .ARM.exidx tables, and create a list describing edits which should be
8986 made to those tables, such that:
8987
8988 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
8989 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
8990 codes which have been inlined into the index).
8991
8992 The edits are applied when the tables are written
8993 (in elf32_arm_write_section).
8994*/
8995
8996bfd_boolean
8997elf32_arm_fix_exidx_coverage (asection **text_section_order,
8998 unsigned int num_text_sections,
8999 struct bfd_link_info *info)
9000{
9001 bfd *inp;
9002 unsigned int last_second_word = 0, i;
9003 asection *last_exidx_sec = NULL;
9004 asection *last_text_sec = NULL;
9005 int last_unwind_type = -1;
9006
9007 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9008 text sections. */
9009 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9010 {
9011 asection *sec;
9012
9013 for (sec = inp->sections; sec != NULL; sec = sec->next)
9014 {
9015 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9016 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9017
dec9d5df 9018 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9019 continue;
9020
9021 if (elf_sec->linked_to)
9022 {
9023 Elf_Internal_Shdr *linked_hdr
9024 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9025 struct _arm_elf_section_data *linked_sec_arm_data
9026 = get_arm_elf_section_data (linked_hdr->bfd_section);
9027
9028 if (linked_sec_arm_data == NULL)
9029 continue;
9030
9031 /* Link this .ARM.exidx section back from the text section it
9032 describes. */
9033 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9034 }
9035 }
9036 }
9037
9038 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9039 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
9040 and add EXIDX_CANTUNWIND entries for sections with no unwind table data.
9041 */
9042
9043 for (i = 0; i < num_text_sections; i++)
9044 {
9045 asection *sec = text_section_order[i];
9046 asection *exidx_sec;
9047 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9048 struct _arm_elf_section_data *exidx_arm_data;
9049 bfd_byte *contents = NULL;
9050 int deleted_exidx_bytes = 0;
9051 bfd_vma j;
9052 arm_unwind_table_edit *unwind_edit_head = NULL;
9053 arm_unwind_table_edit *unwind_edit_tail = NULL;
9054 Elf_Internal_Shdr *hdr;
9055 bfd *ibfd;
9056
9057 if (arm_data == NULL)
9058 continue;
9059
9060 exidx_sec = arm_data->u.text.arm_exidx_sec;
9061 if (exidx_sec == NULL)
9062 {
9063 /* Section has no unwind data. */
9064 if (last_unwind_type == 0 || !last_exidx_sec)
9065 continue;
9066
9067 /* Ignore zero sized sections. */
9068 if (sec->size == 0)
9069 continue;
9070
9071 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9072 last_unwind_type = 0;
9073 continue;
9074 }
9075
22a8f80e
PB		 9076 /* Skip /DISCARD/ sections. */
9077 if (bfd_is_abs_section (exidx_sec->output_section))
9078 continue;
9079
2468f9c9
PB		 9080 hdr = &elf_section_data (exidx_sec)->this_hdr;
9081 if (hdr->sh_type != SHT_ARM_EXIDX)
9082 continue;
9083
9084 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9085 if (exidx_arm_data == NULL)
9086 continue;
9087
9088 ibfd = exidx_sec->owner;
9089
9090 if (hdr->contents != NULL)
9091 contents = hdr->contents;
9092 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9093 /* An error? */
9094 continue;
9095
9096 for (j = 0; j < hdr->sh_size; j += 8)
9097 {
9098 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9099 int unwind_type;
9100 int elide = 0;
9101
9102 /* An EXIDX_CANTUNWIND entry. */
9103 if (second_word == 1)
9104 {
9105 if (last_unwind_type == 0)
9106 elide = 1;
9107 unwind_type = 0;
9108 }
9109 /* Inlined unwinding data. Merge if equal to previous. */
9110 else if ((second_word & 0x80000000) != 0)
9111 {
9112 if (last_second_word == second_word && last_unwind_type == 1)
9113 elide = 1;
9114 unwind_type = 1;
9115 last_second_word = second_word;
9116 }
9117 /* Normal table entry. In theory we could merge these too,
9118 but duplicate entries are likely to be much less common. */
9119 else
9120 unwind_type = 2;
9121
9122 if (elide)
9123 {
9124 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9125 DELETE_EXIDX_ENTRY, NULL, j / 8);
9126
9127 deleted_exidx_bytes += 8;
9128 }
9129
9130 last_unwind_type = unwind_type;
9131 }
9132
9133 /* Free contents if we allocated it ourselves. */
9134 if (contents != hdr->contents)
9135 free (contents);
9136
9137 /* Record edits to be applied later (in elf32_arm_write_section). */
9138 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9139 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9140
9141 if (deleted_exidx_bytes > 0)
9142 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9143
9144 last_exidx_sec = exidx_sec;
9145 last_text_sec = sec;
9146 }
9147
9148 /* Add terminating CANTUNWIND entry. */
9149 if (last_exidx_sec && last_unwind_type != 0)
9150 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9151
9152 return TRUE;
9153}
9154
3e6b1042
DJ		 9155static bfd_boolean
9156elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9157 bfd *ibfd, const char *name)
9158{
9159 asection *sec, *osec;
9160
9161 sec = bfd_get_section_by_name (ibfd, name);
9162 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9163 return TRUE;
9164
9165 osec = sec->output_section;
9166 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9167 return TRUE;
9168
9169 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9170 sec->output_offset, sec->size))
9171 return FALSE;
9172
9173 return TRUE;
9174}
9175
9176static bfd_boolean
9177elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9178{
9179 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
9180
9181 /* Invoke the regular ELF backend linker to do all the work. */
9182 if (!bfd_elf_final_link (abfd, info))
9183 return FALSE;
9184
9185 /* Write out any glue sections now that we have created all the
9186 stubs. */
9187 if (globals->bfd_of_glue_owner != NULL)
9188 {
9189 if (! elf32_arm_output_glue_section (info, abfd,
9190 globals->bfd_of_glue_owner,
9191 ARM2THUMB_GLUE_SECTION_NAME))
9192 return FALSE;
9193
9194 if (! elf32_arm_output_glue_section (info, abfd,
9195 globals->bfd_of_glue_owner,
9196 THUMB2ARM_GLUE_SECTION_NAME))
9197 return FALSE;
9198
9199 if (! elf32_arm_output_glue_section (info, abfd,
9200 globals->bfd_of_glue_owner,
9201 VFP11_ERRATUM_VENEER_SECTION_NAME))
9202 return FALSE;
9203
9204 if (! elf32_arm_output_glue_section (info, abfd,
9205 globals->bfd_of_glue_owner,
9206 ARM_BX_GLUE_SECTION_NAME))
9207 return FALSE;
9208 }
9209
9210 return TRUE;
9211}
9212
c178919b
NC		 9213/* Set the right machine number. */
9214
9215static bfd_boolean
57e8b36a 9216elf32_arm_object_p (bfd *abfd)
c178919b 9217{
5a6c6817 9218 unsigned int mach;
57e8b36a 9219
5a6c6817 9220 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9221
5a6c6817
NC		 9222 if (mach != bfd_mach_arm_unknown)
9223 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9224
9225 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9226 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9227
e16bb312 9228 else
5a6c6817 9229 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9230
9231 return TRUE;
9232}
9233
fc830a83 9234/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9235
b34976b6 9236static bfd_boolean
57e8b36a 9237elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9238{
9239 if (elf_flags_init (abfd)
9240 && elf_elfheader (abfd)->e_flags != flags)
9241 {
fc830a83
NC		 9242 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9243 {
fd2ec330 9244 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9245 (*_bfd_error_handler)
9246 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9247 abfd);
fc830a83 9248 else
d003868e
AM		 9249 _bfd_error_handler
9250 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9251 abfd);
fc830a83 9252 }
252b5132
RH		 9253 }
9254 else
9255 {
9256 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9257 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9258 }
9259
b34976b6 9260 return TRUE;
252b5132
RH		 9261}
9262
fc830a83 9263/* Copy backend specific data from one object module to another. */
9b485d32 9264
b34976b6 9265static bfd_boolean
57e8b36a 9266elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9267{
9268 flagword in_flags;
9269 flagword out_flags;
9270
0ffa91dd 9271 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9272 return TRUE;
252b5132 9273
fc830a83 9274 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9275 out_flags = elf_elfheader (obfd)->e_flags;
9276
fc830a83
NC		 9277 if (elf_flags_init (obfd)
9278 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9279 && in_flags != out_flags)
252b5132 9280 {
252b5132 9281 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9282 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9283 return FALSE;
252b5132
RH		 9284
9285 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9286 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9287 return FALSE;
252b5132
RH		 9288
9289 /* If the src and dest have different interworking flags
9290 then turn off the interworking bit. */
fd2ec330 9291 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9292 {
fd2ec330 9293 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9294 _bfd_error_handler
9295 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9296 obfd, ibfd);
252b5132 9297
fd2ec330 9298 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9299 }
1006ba19
PB		 9300
9301 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9302 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9303 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9304 }
9305
9306 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9307 elf_flags_init (obfd) = TRUE;
252b5132 9308
94a3258f
PB		 9309 /* Also copy the EI_OSABI field. */
9310 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9311 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9312
104d59d1
JM		 9313 /* Copy object attributes. */
9314 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9315
9316 return TRUE;
9317}
9318
9319/* Values for Tag_ABI_PCS_R9_use. */
9320enum
9321{
9322 AEABI_R9_V6,
9323 AEABI_R9_SB,
9324 AEABI_R9_TLS,
9325 AEABI_R9_unused
9326};
9327
9328/* Values for Tag_ABI_PCS_RW_data. */
9329enum
9330{
9331 AEABI_PCS_RW_data_absolute,
9332 AEABI_PCS_RW_data_PCrel,
9333 AEABI_PCS_RW_data_SBrel,
9334 AEABI_PCS_RW_data_unused
9335};
9336
9337/* Values for Tag_ABI_enum_size. */
9338enum
9339{
9340 AEABI_enum_unused,
9341 AEABI_enum_short,
9342 AEABI_enum_wide,
9343 AEABI_enum_forced_wide
9344};
9345
104d59d1
JM		 9346/* Determine whether an object attribute tag takes an integer, a
9347 string or both. */
906e58ca 9348
104d59d1
JM		 9349static int
9350elf32_arm_obj_attrs_arg_type (int tag)
9351{
9352 if (tag == Tag_compatibility)
3483fe2e 9353 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9354 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9355 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9356 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9357 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9358 else if (tag < 32)
3483fe2e 9359 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9360 else
3483fe2e 9361 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9362}
9363
5aa6ff7c
AS		 9364/* The ABI defines that Tag_conformance should be emitted first, and that
9365 Tag_nodefaults should be second (if either is defined). This sets those
9366 two positions, and bumps up the position of all the remaining tags to
9367 compensate. */
9368static int
9369elf32_arm_obj_attrs_order (int num)
9370{
9371 if (num == 4)
9372 return Tag_conformance;
9373 if (num == 5)
9374 return Tag_nodefaults;
9375 if ((num - 2) < Tag_nodefaults)
9376 return num - 2;
9377 if ((num - 1) < Tag_conformance)
9378 return num - 1;
9379 return num;
9380}
9381
91e22acd
AS		 9382/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9383 Returns -1 if no architecture could be read. */
9384
9385static int
9386get_secondary_compatible_arch (bfd *abfd)
9387{
9388 obj_attribute *attr =
9389 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9390
9391 /* Note: the tag and its argument below are uleb128 values, though
9392 currently-defined values fit in one byte for each. */
9393 if (attr->s
9394 && attr->s[0] == Tag_CPU_arch
9395 && (attr->s[1] & 128) != 128
9396 && attr->s[2] == 0)
9397 return attr->s[1];
9398
9399 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9400 return -1;
9401}
9402
9403/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9404 The tag is removed if ARCH is -1. */
9405
8e79c3df 9406static void
91e22acd 9407set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9408{
91e22acd
AS		 9409 obj_attribute *attr =
9410 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9411
91e22acd
AS		 9412 if (arch == -1)
9413 {
9414 attr->s = NULL;
9415 return;
8e79c3df 9416 }
91e22acd
AS		 9417
9418 /* Note: the tag and its argument below are uleb128 values, though
9419 currently-defined values fit in one byte for each. */
9420 if (!attr->s)
9421 attr->s = bfd_alloc (abfd, 3);
9422 attr->s[0] = Tag_CPU_arch;
9423 attr->s[1] = arch;
9424 attr->s[2] = '\0';
8e79c3df
CM		 9425}
9426
91e22acd
AS		 9427/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9428 into account. */
9429
9430static int
9431tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9432 int newtag, int secondary_compat)
8e79c3df 9433{
91e22acd
AS		 9434#define T(X) TAG_CPU_ARCH_##X
9435 int tagl, tagh, result;
9436 const int v6t2[] =
9437 {
9438 T(V6T2), /* PRE_V4. */
9439 T(V6T2), /* V4. */
9440 T(V6T2), /* V4T. */
9441 T(V6T2), /* V5T. */
9442 T(V6T2), /* V5TE. */
9443 T(V6T2), /* V5TEJ. */
9444 T(V6T2), /* V6. */
9445 T(V7), /* V6KZ. */
9446 T(V6T2) /* V6T2. */
9447 };
9448 const int v6k[] =
9449 {
9450 T(V6K), /* PRE_V4. */
9451 T(V6K), /* V4. */
9452 T(V6K), /* V4T. */
9453 T(V6K), /* V5T. */
9454 T(V6K), /* V5TE. */
9455 T(V6K), /* V5TEJ. */
9456 T(V6K), /* V6. */
9457 T(V6KZ), /* V6KZ. */
9458 T(V7), /* V6T2. */
9459 T(V6K) /* V6K. */
9460 };
9461 const int v7[] =
9462 {
9463 T(V7), /* PRE_V4. */
9464 T(V7), /* V4. */
9465 T(V7), /* V4T. */
9466 T(V7), /* V5T. */
9467 T(V7), /* V5TE. */
9468 T(V7), /* V5TEJ. */
9469 T(V7), /* V6. */
9470 T(V7), /* V6KZ. */
9471 T(V7), /* V6T2. */
9472 T(V7), /* V6K. */
9473 T(V7) /* V7. */
9474 };
9475 const int v6_m[] =
9476 {
9477 -1, /* PRE_V4. */
9478 -1, /* V4. */
9479 T(V6K), /* V4T. */
9480 T(V6K), /* V5T. */
9481 T(V6K), /* V5TE. */
9482 T(V6K), /* V5TEJ. */
9483 T(V6K), /* V6. */
9484 T(V6KZ), /* V6KZ. */
9485 T(V7), /* V6T2. */
9486 T(V6K), /* V6K. */
9487 T(V7), /* V7. */
9488 T(V6_M) /* V6_M. */
9489 };
9490 const int v6s_m[] =
9491 {
9492 -1, /* PRE_V4. */
9493 -1, /* V4. */
9494 T(V6K), /* V4T. */
9495 T(V6K), /* V5T. */
9496 T(V6K), /* V5TE. */
9497 T(V6K), /* V5TEJ. */
9498 T(V6K), /* V6. */
9499 T(V6KZ), /* V6KZ. */
9500 T(V7), /* V6T2. */
9501 T(V6K), /* V6K. */
9502 T(V7), /* V7. */
9503 T(V6S_M), /* V6_M. */
9504 T(V6S_M) /* V6S_M. */
9505 };
9506 const int v4t_plus_v6_m[] =
9507 {
9508 -1, /* PRE_V4. */
9509 -1, /* V4. */
9510 T(V4T), /* V4T. */
9511 T(V5T), /* V5T. */
9512 T(V5TE), /* V5TE. */
9513 T(V5TEJ), /* V5TEJ. */
9514 T(V6), /* V6. */
9515 T(V6KZ), /* V6KZ. */
9516 T(V6T2), /* V6T2. */
9517 T(V6K), /* V6K. */
9518 T(V7), /* V7. */
9519 T(V6_M), /* V6_M. */
9520 T(V6S_M), /* V6S_M. */
9521 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9522 };
9523 const int *comb[] =
9524 {
9525 v6t2,
9526 v6k,
9527 v7,
9528 v6_m,
9529 v6s_m,
9530 /* Pseudo-architecture. */
9531 v4t_plus_v6_m
9532 };
9533
9534 /* Check we've not got a higher architecture than we know about. */
9535
9536 if (oldtag >= MAX_TAG_CPU_ARCH || newtag >= MAX_TAG_CPU_ARCH)
9537 {
3895f852 9538 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9539 return -1;
9540 }
9541
9542 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9543
9544 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9545 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9546 oldtag = T(V4T_PLUS_V6_M);
9547
9548 /* And override the new tag if we have a Tag_also_compatible_with on the
9549 input. */
9550
9551 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9552 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9553 newtag = T(V4T_PLUS_V6_M);
9554
9555 tagl = (oldtag < newtag) ? oldtag : newtag;
9556 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9557
9558 /* Architectures before V6KZ add features monotonically. */
9559 if (tagh <= TAG_CPU_ARCH_V6KZ)
9560 return result;
9561
9562 result = comb[tagh - T(V6T2)][tagl];
9563
9564 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9565 as the canonical version. */
9566 if (result == T(V4T_PLUS_V6_M))
9567 {
9568 result = T(V4T);
9569 *secondary_compat_out = T(V6_M);
9570 }
9571 else
9572 *secondary_compat_out = -1;
9573
9574 if (result == -1)
9575 {
3895f852 9576 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9577 ibfd, oldtag, newtag);
9578 return -1;
9579 }
9580
9581 return result;
9582#undef T
8e79c3df
CM		 9583}
9584
ee065d83
PB		 9585/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9586 are conflicting attributes. */
906e58ca 9587
ee065d83
PB		 9588static bfd_boolean
9589elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9590{
104d59d1
JM		 9591 obj_attribute *in_attr;
9592 obj_attribute *out_attr;
9593 obj_attribute_list *in_list;
8e79c3df 9594 obj_attribute_list *out_list;
91e22acd 9595 obj_attribute_list **out_listp;
ee065d83
PB		 9596 /* Some tags have 0 = don't care, 1 = strong requirement,
9597 2 = weak requirement. */
91e22acd 9598 static const int order_021[3] = {0, 2, 1};
b1cc4aeb
PB		 9599 /* For use with Tag_VFP_arch. */
9600 static const int order_01243[5] = {0, 1, 2, 4, 3};
ee065d83 9601 int i;
91e22acd 9602 bfd_boolean result = TRUE;
ee065d83 9603
3e6b1042
DJ		 9604 /* Skip the linker stubs file. This preserves previous behavior
9605 of accepting unknown attributes in the first input file - but
9606 is that a bug? */
9607 if (ibfd->flags & BFD_LINKER_CREATED)
9608 return TRUE;
9609
104d59d1 9610 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9611 {
9612 /* This is the first object. Copy the attributes. */
104d59d1 9613 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 9614
9615 /* Use the Tag_null value to indicate the attributes have been
9616 initialized. */
104d59d1 9617 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 9618
ee065d83
PB		 9619 return TRUE;
9620 }
9621
104d59d1
JM		 9622 in_attr = elf_known_obj_attributes_proc (ibfd);
9623 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9624 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9625 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9626 {
8e79c3df 9627 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9628 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9629 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9630 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9631 {
9632 _bfd_error_handler
3895f852 9633 (_("error: %B uses VFP register arguments, %B does not"),
ee065d83 9634 ibfd, obfd);
91e22acd 9635 result = FALSE;
ee065d83
PB		 9636 }
9637 }
9638
104d59d1 9639 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9640 {
9641 /* Merge this attribute with existing attributes. */
9642 switch (i)
9643 {
9644 case Tag_CPU_raw_name:
9645 case Tag_CPU_name:
91e22acd 9646 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9647 break;
9648
9649 case Tag_ABI_optimization_goals:
9650 case Tag_ABI_FP_optimization_goals:
9651 /* Use the first value seen. */
9652 break;
9653
9654 case Tag_CPU_arch:
91e22acd
AS		 9655 {
9656 int secondary_compat = -1, secondary_compat_out = -1;
9657 unsigned int saved_out_attr = out_attr[i].i;
9658 static const char *name_table[] = {
9659 /* These aren't real CPU names, but we can't guess
9660 that from the architecture version alone. */
9661 "Pre v4",
9662 "ARM v4",
9663 "ARM v4T",
9664 "ARM v5T",
9665 "ARM v5TE",
9666 "ARM v5TEJ",
9667 "ARM v6",
9668 "ARM v6KZ",
9669 "ARM v6T2",
9670 "ARM v6K",
9671 "ARM v7",
9672 "ARM v6-M",
9673 "ARM v6S-M"
9674 };
9675
9676 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9677 secondary_compat = get_secondary_compatible_arch (ibfd);
9678 secondary_compat_out = get_secondary_compatible_arch (obfd);
9679 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9680 &secondary_compat_out,
9681 in_attr[i].i,
9682 secondary_compat);
9683 set_secondary_compatible_arch (obfd, secondary_compat_out);
9684
9685 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9686 if (out_attr[i].i == saved_out_attr)
9687 ; /* Leave the names alone. */
9688 else if (out_attr[i].i == in_attr[i].i)
9689 {
9690 /* The output architecture has been changed to match the
9691 input architecture. Use the input names. */
9692 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9693 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9694 : NULL;
9695 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9696 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9697 : NULL;
9698 }
9699 else
9700 {
9701 out_attr[Tag_CPU_name].s = NULL;
9702 out_attr[Tag_CPU_raw_name].s = NULL;
9703 }
9704
9705 /* If we still don't have a value for Tag_CPU_name,
9706 make one up now. Tag_CPU_raw_name remains blank. */
9707 if (out_attr[Tag_CPU_name].s == NULL
9708 && out_attr[i].i < ARRAY_SIZE (name_table))
9709 out_attr[Tag_CPU_name].s =
9710 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9711 }
9712 break;
9713
ee065d83
PB		 9714 case Tag_ARM_ISA_use:
9715 case Tag_THUMB_ISA_use:
ee065d83 9716 case Tag_WMMX_arch:
91e22acd
AS		 9717 case Tag_Advanced_SIMD_arch:
9718 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 9719 case Tag_ABI_FP_rounding:
ee065d83
PB		 9720 case Tag_ABI_FP_exceptions:
9721 case Tag_ABI_FP_user_exceptions:
9722 case Tag_ABI_FP_number_model:
91e22acd
AS		 9723 case Tag_VFP_HP_extension:
9724 case Tag_CPU_unaligned_access:
9725 case Tag_T2EE_use:
9726 case Tag_Virtualization_use:
9727 case Tag_MPextension_use:
ee065d83
PB		 9728 /* Use the largest value specified. */
9729 if (in_attr[i].i > out_attr[i].i)
9730 out_attr[i].i = in_attr[i].i;
9731 break;
9732
91e22acd
AS		 9733 case Tag_ABI_align8_preserved:
9734 case Tag_ABI_PCS_RO_data:
9735 /* Use the smallest value specified. */
9736 if (in_attr[i].i < out_attr[i].i)
9737 out_attr[i].i = in_attr[i].i;
9738 break;
9739
9740 case Tag_ABI_align8_needed:
9741 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
9742 && (in_attr[Tag_ABI_align8_preserved].i == 0
9743 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 9744 {
91e22acd
AS		 9745 /* This error message should be enabled once all non-conformant
9746 binaries in the toolchain have had the attributes set
9747 properly.
ee065d83 9748 _bfd_error_handler
3895f852 9749 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 9750 obfd, ibfd);
9751 result = FALSE; */
ee065d83 9752 }
91e22acd
AS		 9753 /* Fall through. */
9754 case Tag_ABI_FP_denormal:
9755 case Tag_ABI_PCS_GOT_use:
9756 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
9757 value if greater than 2 (for future-proofing). */
9758 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
9759 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
9760 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 9761 out_attr[i].i = in_attr[i].i;
9762 break;
91e22acd
AS		 9763
9764
9765 case Tag_CPU_arch_profile:
9766 if (out_attr[i].i != in_attr[i].i)
9767 {
9768 /* 0 will merge with anything.
9769 'A' and 'S' merge to 'A'.
9770 'R' and 'S' merge to 'R'.
9771 'M' and 'A|R|S' is an error. */
9772 if (out_attr[i].i == 0
9773 || (out_attr[i].i == 'S'
9774 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
9775 out_attr[i].i = in_attr[i].i;
9776 else if (in_attr[i].i == 0
9777 || (in_attr[i].i == 'S'
9778 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
9779 ; /* Do nothing. */
9780 else
9781 {
9782 _bfd_error_handler
3895f852 9783 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 9784 ibfd,
9785 in_attr[i].i ? in_attr[i].i : '0',
9786 out_attr[i].i ? out_attr[i].i : '0');
9787 result = FALSE;
9788 }
9789 }
9790 break;
b1cc4aeb 9791 case Tag_VFP_arch:
91e22acd
AS		 9792 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
9793 largest value if greater than 4 (for future-proofing). */
9794 if ((in_attr[i].i > 4 && in_attr[i].i > out_attr[i].i)
9795 || (in_attr[i].i <= 4 && out_attr[i].i <= 4
9796 && order_01243[in_attr[i].i] > order_01243[out_attr[i].i]))
b1cc4aeb
PB		 9797 out_attr[i].i = in_attr[i].i;
9798 break;
ee065d83
PB		 9799 case Tag_PCS_config:
9800 if (out_attr[i].i == 0)
9801 out_attr[i].i = in_attr[i].i;
9802 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
9803 {
9804 /* It's sometimes ok to mix different configs, so this is only
9805 a warning. */
9806 _bfd_error_handler
9807 (_("Warning: %B: Conflicting platform configuration"), ibfd);
9808 }
9809 break;
9810 case Tag_ABI_PCS_R9_use:
004ae526
PB		 9811 if (in_attr[i].i != out_attr[i].i
9812 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 9813 && in_attr[i].i != AEABI_R9_unused)
9814 {
9815 _bfd_error_handler
3895f852 9816 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 9817 result = FALSE;
ee065d83
PB		 9818 }
9819 if (out_attr[i].i == AEABI_R9_unused)
9820 out_attr[i].i = in_attr[i].i;
9821 break;
9822 case Tag_ABI_PCS_RW_data:
9823 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
9824 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
9825 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
9826 {
9827 _bfd_error_handler
3895f852 9828 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 9829 ibfd);
91e22acd 9830 result = FALSE;
ee065d83
PB		 9831 }
9832 /* Use the smallest value specified. */
9833 if (in_attr[i].i < out_attr[i].i)
9834 out_attr[i].i = in_attr[i].i;
9835 break;
ee065d83 9836 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 9837 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
9838 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 9839 {
9840 _bfd_error_handler
a9dc9481
JM		 9841 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
9842 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 9843 }
a9dc9481 9844 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 9845 out_attr[i].i = in_attr[i].i;
9846 break;
ee065d83
PB		 9847 case Tag_ABI_enum_size:
9848 if (in_attr[i].i != AEABI_enum_unused)
9849 {
9850 if (out_attr[i].i == AEABI_enum_unused
9851 || out_attr[i].i == AEABI_enum_forced_wide)
9852 {
9853 /* The existing object is compatible with anything.
9854 Use whatever requirements the new object has. */
9855 out_attr[i].i = in_attr[i].i;
9856 }
9857 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 9858 && out_attr[i].i != in_attr[i].i
0ffa91dd 9859 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 9860 {
91e22acd 9861 static const char *aeabi_enum_names[] =
bf21ed78 9862 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 9863 const char *in_name =
9864 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9865 ? aeabi_enum_names[in_attr[i].i]
9866 : "<unknown>";
9867 const char *out_name =
9868 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9869 ? aeabi_enum_names[out_attr[i].i]
9870 : "<unknown>";
ee065d83 9871 _bfd_error_handler
bf21ed78 9872 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 9873 ibfd, in_name, out_name);
ee065d83
PB		 9874 }
9875 }
9876 break;
9877 case Tag_ABI_VFP_args:
9878 /* Aready done. */
9879 break;
9880 case Tag_ABI_WMMX_args:
9881 if (in_attr[i].i != out_attr[i].i)
9882 {
9883 _bfd_error_handler
3895f852 9884 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 9885 ibfd, obfd);
91e22acd 9886 result = FALSE;
ee065d83
PB		 9887 }
9888 break;
7b86a9fa
AS		 9889 case Tag_compatibility:
9890 /* Merged in target-independent code. */
9891 break;
91e22acd
AS		 9892 case Tag_ABI_HardFP_use:
9893 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
9894 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
9895 || (in_attr[i].i == 2 && out_attr[i].i == 1))
9896 out_attr[i].i = 3;
9897 else if (in_attr[i].i > out_attr[i].i)
9898 out_attr[i].i = in_attr[i].i;
9899 break;
9900 case Tag_ABI_FP_16bit_format:
9901 if (in_attr[i].i != 0 && out_attr[i].i != 0)
9902 {
9903 if (in_attr[i].i != out_attr[i].i)
9904 {
9905 _bfd_error_handler
3895f852 9906 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 9907 ibfd, obfd);
9908 result = FALSE;
9909 }
9910 }
9911 if (in_attr[i].i != 0)
9912 out_attr[i].i = in_attr[i].i;
9913 break;
7b86a9fa 9914
91e22acd 9915 case Tag_nodefaults:
2d0bb761
AS		 9916 /* This tag is set if it exists, but the value is unused (and is
9917 typically zero). We don't actually need to do anything here -
9918 the merge happens automatically when the type flags are merged
9919 below. */
91e22acd
AS		 9920 break;
9921 case Tag_also_compatible_with:
9922 /* Already done in Tag_CPU_arch. */
9923 break;
9924 case Tag_conformance:
9925 /* Keep the attribute if it matches. Throw it away otherwise.
9926 No attribute means no claim to conform. */
9927 if (!in_attr[i].s || !out_attr[i].s
9928 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
9929 out_attr[i].s = NULL;
9930 break;
3cfad14c 9931
91e22acd 9932 default:
3cfad14c 9933 {
91e22acd
AS		 9934 bfd *err_bfd = NULL;
9935
9936 /* The "known_obj_attributes" table does contain some undefined
9937 attributes. Ensure that there are unused. */
9938 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
9939 err_bfd = obfd;
9940 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
9941 err_bfd = ibfd;
9942
9943 if (err_bfd != NULL)
9944 {
9945 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9946 if ((i & 127) < 64)
9947 {
9948 _bfd_error_handler
9949 (_("%B: Unknown mandatory EABI object attribute %d"),
9950 err_bfd, i);
9951 bfd_set_error (bfd_error_bad_value);
9952 result = FALSE;
9953 }
9954 else
9955 {
9956 _bfd_error_handler
9957 (_("Warning: %B: Unknown EABI object attribute %d"),
9958 err_bfd, i);
9959 }
9960 }
9961
9962 /* Only pass on attributes that match in both inputs. */
9963 if (in_attr[i].i != out_attr[i].i
9964 || in_attr[i].s != out_attr[i].s
9965 || (in_attr[i].s != NULL && out_attr[i].s != NULL
9966 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
9967 {
9968 out_attr[i].i = 0;
9969 out_attr[i].s = NULL;
9970 }
3cfad14c 9971 }
91e22acd
AS		 9972 }
9973
9974 /* If out_attr was copied from in_attr then it won't have a type yet. */
9975 if (in_attr[i].type && !out_attr[i].type)
9976 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 9977 }
9978
104d59d1
JM		 9979 /* Merge Tag_compatibility attributes and any common GNU ones. */
9980 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 9981
104d59d1
JM		 9982 /* Check for any attributes not known on ARM. */
9983 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 9984 out_listp = &elf_other_obj_attributes_proc (obfd);
9985 out_list = *out_listp;
8e79c3df 9986
91e22acd 9987 for (; in_list || out_list; )
ee065d83 9988 {
91e22acd
AS		 9989 bfd *err_bfd = NULL;
9990 int err_tag = 0;
8e79c3df
CM		 9991
9992 /* The tags for each list are in numerical order. */
9993 /* If the tags are equal, then merge. */
91e22acd 9994 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 9995 {
91e22acd
AS		 9996 /* This attribute only exists in obfd. We can't merge, and we don't
9997 know what the tag means, so delete it. */
9998 err_bfd = obfd;
9999 err_tag = out_list->tag;
10000 *out_listp = out_list->next;
10001 out_list = *out_listp;
8e79c3df 10002 }
91e22acd 10003 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 10004 {
91e22acd
AS		 10005 /* This attribute only exists in ibfd. We can't merge, and we don't
10006 know what the tag means, so ignore it. */
10007 err_bfd = ibfd;
10008 err_tag = in_list->tag;
8e79c3df 10009 in_list = in_list->next;
eb111b1f 10010 }
91e22acd
AS		 10011 else /* The tags are equal. */
10012 {
10013 /* As present, all attributes in the list are unknown, and
10014 therefore can't be merged meaningfully. */
10015 err_bfd = obfd;
10016 err_tag = out_list->tag;
10017
10018 /* Only pass on attributes that match in both inputs. */
10019 if (in_list->attr.i != out_list->attr.i
10020 || in_list->attr.s != out_list->attr.s
10021 || (in_list->attr.s && out_list->attr.s
10022 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10023 {
10024 /* No match. Delete the attribute. */
10025 *out_listp = out_list->next;
10026 out_list = *out_listp;
10027 }
10028 else
10029 {
10030 /* Matched. Keep the attribute and move to the next. */
10031 out_list = out_list->next;
10032 in_list = in_list->next;
10033 }
10034 }
10035
10036 if (err_bfd)
10037 {
10038 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10039 if ((err_tag & 127) < 64)
10040 {
10041 _bfd_error_handler
10042 (_("%B: Unknown mandatory EABI object attribute %d"),
10043 err_bfd, err_tag);
10044 bfd_set_error (bfd_error_bad_value);
10045 result = FALSE;
10046 }
10047 else
10048 {
10049 _bfd_error_handler
10050 (_("Warning: %B: Unknown EABI object attribute %d"),
10051 err_bfd, err_tag);
10052 }
10053 }
ee065d83 10054 }
91e22acd 10055 return result;
252b5132
RH		 10056}
10057
3a4a14e9
PB		 10058
10059/* Return TRUE if the two EABI versions are incompatible. */
10060
10061static bfd_boolean
10062elf32_arm_versions_compatible (unsigned iver, unsigned over)
10063{
10064 /* v4 and v5 are the same spec before and after it was released,
10065 so allow mixing them. */
10066 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10067 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10068 return TRUE;
10069
10070 return (iver == over);
10071}
10072
252b5132
RH		 10073/* Merge backend specific data from an object file to the output
10074 object file when linking. */
9b485d32 10075
b34976b6 10076static bfd_boolean
57e8b36a 10077elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 10078{
10079 flagword out_flags;
10080 flagword in_flags;
b34976b6 10081 bfd_boolean flags_compatible = TRUE;
cf919dfd 10082 asection *sec;
252b5132 10083
9b485d32 10084 /* Check if we have the same endianess. */
82e51918 10085 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 10086 return FALSE;
1fe494a5 10087
0ffa91dd 10088 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10089 return TRUE;
252b5132 10090
ee065d83
PB		 10091 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
10092 return FALSE;
10093
252b5132
RH		 10094 /* The input BFD must have had its flags initialised. */
10095 /* The following seems bogus to me -- The flags are initialized in
10096 the assembler but I don't think an elf_flags_init field is
9b485d32 10097 written into the object. */
252b5132
RH		 10098 /* BFD_ASSERT (elf_flags_init (ibfd)); */
10099
10100 in_flags = elf_elfheader (ibfd)->e_flags;
10101 out_flags = elf_elfheader (obfd)->e_flags;
10102
23684067
PB		 10103 /* In theory there is no reason why we couldn't handle this. However
10104 in practice it isn't even close to working and there is no real
10105 reason to want it. */
10106 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
c13bb2ea 10107 && !(ibfd->flags & DYNAMIC)
23684067
PB		 10108 && (in_flags & EF_ARM_BE8))
10109 {
3895f852 10110 _bfd_error_handler (_("error: %B is already in final BE8 format"),
23684067
PB		 10111 ibfd);
10112 return FALSE;
10113 }
10114
252b5132
RH		 10115 if (!elf_flags_init (obfd))
10116 {
fe077fa6
NC		 10117 /* If the input is the default architecture and had the default
10118 flags then do not bother setting the flags for the output
10119 architecture, instead allow future merges to do this. If no
10120 future merges ever set these flags then they will retain their
10121 uninitialised values, which surprise surprise, correspond
252b5132 10122 to the default values. */
fe077fa6
NC		 10123 if (bfd_get_arch_info (ibfd)->the_default
10124 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 10125 return TRUE;
252b5132 10126
b34976b6 10127 elf_flags_init (obfd) = TRUE;
252b5132
RH		 10128 elf_elfheader (obfd)->e_flags = in_flags;
10129
10130 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
10131 && bfd_get_arch_info (obfd)->the_default)
10132 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
10133
b34976b6 10134 return TRUE;
252b5132
RH		 10135 }
10136
5a6c6817
NC		 10137 /* Determine what should happen if the input ARM architecture
10138 does not match the output ARM architecture. */
10139 if (! bfd_arm_merge_machines (ibfd, obfd))
10140 return FALSE;
e16bb312 10141
1006ba19 10142 /* Identical flags must be compatible. */
252b5132 10143 if (in_flags == out_flags)
b34976b6 10144 return TRUE;
252b5132 10145
35a0f415
DJ		 10146 /* Check to see if the input BFD actually contains any sections. If
10147 not, its flags may not have been initialised either, but it
8e3de13a 10148 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 10149 dynamic objects; their section list may be emptied by
d1f161ea 10150 elf_link_add_object_symbols.
35a0f415 10151
d1f161ea
NC		 10152 Also check to see if there are no code sections in the input.
10153 In this case there is no need to check for code specific flags.
10154 XXX - do we need to worry about floating-point format compatability
10155 in data sections ? */
35a0f415 10156 if (!(ibfd->flags & DYNAMIC))
cf919dfd 10157 {
35a0f415 10158 bfd_boolean null_input_bfd = TRUE;
d1f161ea 10159 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 10160
10161 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 10162 {
35a0f415
DJ		 10163 /* Ignore synthetic glue sections. */
10164 if (strcmp (sec->name, ".glue_7")
10165 && strcmp (sec->name, ".glue_7t"))
10166 {
d1f161ea
NC		 10167 if ((bfd_get_section_flags (ibfd, sec)
10168 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10169 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10170 only_data_sections = FALSE;
10171
35a0f415
DJ		 10172 null_input_bfd = FALSE;
10173 break;
10174 }
cf919dfd 10175 }
d1f161ea
NC		 10176
10177 if (null_input_bfd || only_data_sections)
35a0f415 10178 return TRUE;
cf919dfd 10179 }
cf919dfd 10180
252b5132 10181 /* Complain about various flag mismatches. */
3a4a14e9
PB		 10182 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
10183 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 10184 {
d003868e 10185 _bfd_error_handler
3895f852 10186 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 10187 ibfd, obfd,
10188 (in_flags & EF_ARM_EABIMASK) >> 24,
10189 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 10190 return FALSE;
fc830a83 10191 }
252b5132 10192
1006ba19 10193 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 10194 /* VxWorks libraries do not use these flags. */
10195 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
10196 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
10197 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 10198 {
fd2ec330 10199 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 10200 {
d003868e 10201 _bfd_error_handler
3895f852 10202 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
d003868e
AM		 10203 ibfd, obfd,
10204 in_flags & EF_ARM_APCS_26 ? 26 : 32,
10205 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 10206 flags_compatible = FALSE;
1006ba19 10207 }
252b5132 10208
fd2ec330 10209 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 10210 {
5eefb65f 10211 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e 10212 _bfd_error_handler
3895f852 10213 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
d003868e 10214 ibfd, obfd);
5eefb65f 10215 else
d003868e 10216 _bfd_error_handler
3895f852 10217 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
d003868e 10218 ibfd, obfd);
63b0f745 10219
b34976b6 10220 flags_compatible = FALSE;
1006ba19 10221 }
252b5132 10222
96a846ea 10223 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 10224 {
96a846ea 10225 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e 10226 _bfd_error_handler
3895f852 10227 (_("error: %B uses VFP instructions, whereas %B does not"),
d003868e 10228 ibfd, obfd);
5eefb65f 10229 else
d003868e 10230 _bfd_error_handler
3895f852 10231 (_("error: %B uses FPA instructions, whereas %B does not"),
d003868e 10232 ibfd, obfd);
fde78edd
NC		 10233
10234 flags_compatible = FALSE;
10235 }
10236
10237 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
10238 {
10239 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e 10240 _bfd_error_handler
3895f852 10241 (_("error: %B uses Maverick instructions, whereas %B does not"),
d003868e 10242 ibfd, obfd);
fde78edd 10243 else
d003868e 10244 _bfd_error_handler
3895f852 10245 (_("error: %B does not use Maverick instructions, whereas %B does"),
d003868e 10246 ibfd, obfd);
63b0f745 10247
b34976b6 10248 flags_compatible = FALSE;
1006ba19 10249 }
96a846ea
RE		 10250
10251#ifdef EF_ARM_SOFT_FLOAT
10252 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
10253 {
10254 /* We can allow interworking between code that is VFP format
10255 layout, and uses either soft float or integer regs for
10256 passing floating point arguments and results. We already
10257 know that the APCS_FLOAT flags match; similarly for VFP
10258 flags. */
10259 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
10260 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
10261 {
10262 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e 10263 _bfd_error_handler
3895f852 10264 (_("error: %B uses software FP, whereas %B uses hardware FP"),
d003868e 10265 ibfd, obfd);
96a846ea 10266 else
d003868e 10267 _bfd_error_handler
3895f852 10268 (_("error: %B uses hardware FP, whereas %B uses software FP"),
d003868e 10269 ibfd, obfd);
96a846ea 10270
b34976b6 10271 flags_compatible = FALSE;
96a846ea
RE		 10272 }
10273 }
ee43f35e 10274#endif
252b5132 10275
1006ba19 10276 /* Interworking mismatch is only a warning. */
fd2ec330 10277 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 10278 {
e3c8793a
NC		 10279 if (in_flags & EF_ARM_INTERWORK)
10280 {
d003868e
AM		 10281 _bfd_error_handler
10282 (_("Warning: %B supports interworking, whereas %B does not"),
10283 ibfd, obfd);
e3c8793a
NC		 10284 }
10285 else
10286 {
d003868e
AM		 10287 _bfd_error_handler
10288 (_("Warning: %B does not support interworking, whereas %B does"),
10289 ibfd, obfd);
e3c8793a 10290 }
8f615d07 10291 }
252b5132 10292 }
63b0f745 10293
1006ba19 10294 return flags_compatible;
252b5132
RH		 10295}
10296
9b485d32
NC		 10297/* Display the flags field. */
10298
b34976b6 10299static bfd_boolean
57e8b36a 10300elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10301{
fc830a83
NC		 10302 FILE * file = (FILE *) ptr;
10303 unsigned long flags;
252b5132
RH		 10304
10305 BFD_ASSERT (abfd != NULL && ptr != NULL);
10306
10307 /* Print normal ELF private data. */
10308 _bfd_elf_print_private_bfd_data (abfd, ptr);
10309
fc830a83 10310 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10311 /* Ignore init flag - it may not be set, despite the flags field
10312 containing valid data. */
252b5132
RH		 10313
10314 /* xgettext:c-format */
9b485d32 10315 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10316
fc830a83
NC		 10317 switch (EF_ARM_EABI_VERSION (flags))
10318 {
10319 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10320 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10321 official ARM ELF extended ABI. Hence they are only decoded if
10322 the EABI version is not set. */
fd2ec330 10323 if (flags & EF_ARM_INTERWORK)
9b485d32 10324 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10325
fd2ec330 10326 if (flags & EF_ARM_APCS_26)
6c571f00 10327 fprintf (file, " [APCS-26]");
fc830a83 10328 else
6c571f00 10329 fprintf (file, " [APCS-32]");
9a5aca8c 10330
96a846ea
RE		 10331 if (flags & EF_ARM_VFP_FLOAT)
10332 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10333 else if (flags & EF_ARM_MAVERICK_FLOAT)
10334 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10335 else
10336 fprintf (file, _(" [FPA float format]"));
10337
fd2ec330 10338 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10339 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10340
fd2ec330 10341 if (flags & EF_ARM_PIC)
9b485d32 10342 fprintf (file, _(" [position independent]"));
fc830a83 10343
fd2ec330 10344 if (flags & EF_ARM_NEW_ABI)
9b485d32 10345 fprintf (file, _(" [new ABI]"));
9a5aca8c 10346
fd2ec330 10347 if (flags & EF_ARM_OLD_ABI)
9b485d32 10348 fprintf (file, _(" [old ABI]"));
9a5aca8c 10349
fd2ec330 10350 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10351 fprintf (file, _(" [software FP]"));
9a5aca8c 10352
96a846ea
RE		 10353 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10354 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10355 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10356 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10357 break;
9a5aca8c 10358
fc830a83 10359 case EF_ARM_EABI_VER1:
9b485d32 10360 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10361
fc830a83 10362 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10363 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10364 else
9b485d32 10365 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10366
fc830a83
NC		 10367 flags &= ~ EF_ARM_SYMSARESORTED;
10368 break;
9a5aca8c 10369
fd2ec330
PB		 10370 case EF_ARM_EABI_VER2:
10371 fprintf (file, _(" [Version2 EABI]"));
10372
10373 if (flags & EF_ARM_SYMSARESORTED)
10374 fprintf (file, _(" [sorted symbol table]"));
10375 else
10376 fprintf (file, _(" [unsorted symbol table]"));
10377
10378 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10379 fprintf (file, _(" [dynamic symbols use segment index]"));
10380
10381 if (flags & EF_ARM_MAPSYMSFIRST)
10382 fprintf (file, _(" [mapping symbols precede others]"));
10383
99e4ae17 10384 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10385 | EF_ARM_MAPSYMSFIRST);
10386 break;
10387
d507cf36
PB		 10388 case EF_ARM_EABI_VER3:
10389 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10390 break;
10391
10392 case EF_ARM_EABI_VER4:
10393 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10394 goto eabi;
d507cf36 10395
3a4a14e9
PB		 10396 case EF_ARM_EABI_VER5:
10397 fprintf (file, _(" [Version5 EABI]"));
10398 eabi:
d507cf36
PB		 10399 if (flags & EF_ARM_BE8)
10400 fprintf (file, _(" [BE8]"));
10401
10402 if (flags & EF_ARM_LE8)
10403 fprintf (file, _(" [LE8]"));
10404
10405 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10406 break;
10407
fc830a83 10408 default:
9b485d32 10409 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10410 break;
10411 }
252b5132 10412
fc830a83 10413 flags &= ~ EF_ARM_EABIMASK;
252b5132 10414
fc830a83 10415 if (flags & EF_ARM_RELEXEC)
9b485d32 10416 fprintf (file, _(" [relocatable executable]"));
252b5132 10417
fc830a83 10418 if (flags & EF_ARM_HASENTRY)
9b485d32 10419 fprintf (file, _(" [has entry point]"));
252b5132 10420
fc830a83
NC		 10421 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10422
10423 if (flags)
9b485d32 10424 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10425
252b5132
RH		 10426 fputc ('\n', file);
10427
b34976b6 10428 return TRUE;
252b5132
RH		 10429}
10430
10431static int
57e8b36a 10432elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10433{
2f0ca46a
NC		 10434 switch (ELF_ST_TYPE (elf_sym->st_info))
10435 {
10436 case STT_ARM_TFUNC:
10437 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10438
2f0ca46a
NC		 10439 case STT_ARM_16BIT:
10440 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10441 This allows us to distinguish between data used by Thumb instructions
10442 and non-data (which is probably code) inside Thumb regions of an
10443 executable. */
1a0eb693 10444 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10445 return ELF_ST_TYPE (elf_sym->st_info);
10446 break;
9a5aca8c 10447
ce855c42
NC		 10448 default:
10449 break;
2f0ca46a
NC		 10450 }
10451
10452 return type;
252b5132 10453}
f21f3fe0 10454
252b5132 10455static asection *
07adf181
AM		 10456elf32_arm_gc_mark_hook (asection *sec,
10457 struct bfd_link_info *info,
10458 Elf_Internal_Rela *rel,
10459 struct elf_link_hash_entry *h,
10460 Elf_Internal_Sym *sym)
252b5132
RH		 10461{
10462 if (h != NULL)
07adf181 10463 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10464 {
10465 case R_ARM_GNU_VTINHERIT:
10466 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10467 return NULL;
10468 }
9ad5cbcf 10469
07adf181 10470 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10471}
10472
780a67af
NC		 10473/* Update the got entry reference counts for the section being removed. */
10474
b34976b6 10475static bfd_boolean
ba93b8ac
DJ		 10476elf32_arm_gc_sweep_hook (bfd * abfd,
10477 struct bfd_link_info * info,
10478 asection * sec,
10479 const Elf_Internal_Rela * relocs)
252b5132 10480{
5e681ec4
PB		 10481 Elf_Internal_Shdr *symtab_hdr;
10482 struct elf_link_hash_entry **sym_hashes;
10483 bfd_signed_vma *local_got_refcounts;
10484 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10485 struct elf32_arm_link_hash_table * globals;
10486
7dda2462
TG		 10487 if (info->relocatable)
10488 return TRUE;
10489
eb043451 10490 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 10491
10492 elf_section_data (sec)->local_dynrel = NULL;
10493
0ffa91dd 10494 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10495 sym_hashes = elf_sym_hashes (abfd);
10496 local_got_refcounts = elf_local_got_refcounts (abfd);
10497
906e58ca 10498 check_use_blx (globals);
bd97cb95 10499
5e681ec4
PB		 10500 relend = relocs + sec->reloc_count;
10501 for (rel = relocs; rel < relend; rel++)
eb043451 10502 {
3eb128b2
AM		 10503 unsigned long r_symndx;
10504 struct elf_link_hash_entry *h = NULL;
eb043451 10505 int r_type;
5e681ec4 10506
3eb128b2
AM		 10507 r_symndx = ELF32_R_SYM (rel->r_info);
10508 if (r_symndx >= symtab_hdr->sh_info)
10509 {
10510 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10511 while (h->root.type == bfd_link_hash_indirect
10512 || h->root.type == bfd_link_hash_warning)
10513 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10514 }
10515
eb043451 10516 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10517 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10518 switch (r_type)
10519 {
10520 case R_ARM_GOT32:
eb043451 10521 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10522 case R_ARM_TLS_GD32:
10523 case R_ARM_TLS_IE32:
3eb128b2 10524 if (h != NULL)
eb043451 10525 {
eb043451
PB		 10526 if (h->got.refcount > 0)
10527 h->got.refcount -= 1;
10528 }
10529 else if (local_got_refcounts != NULL)
10530 {
10531 if (local_got_refcounts[r_symndx] > 0)
10532 local_got_refcounts[r_symndx] -= 1;
10533 }
10534 break;
10535
ba93b8ac
DJ		 10536 case R_ARM_TLS_LDM32:
10537 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
10538 break;
10539
eb043451 10540 case R_ARM_ABS32:
bb224fc3 10541 case R_ARM_ABS32_NOI:
eb043451 10542 case R_ARM_REL32:
bb224fc3 10543 case R_ARM_REL32_NOI:
eb043451
PB		 10544 case R_ARM_PC24:
10545 case R_ARM_PLT32:
5b5bb741
PB		 10546 case R_ARM_CALL:
10547 case R_ARM_JUMP24:
eb043451 10548 case R_ARM_PREL31:
c19d1205 10549 case R_ARM_THM_CALL:
bd97cb95
DJ		 10550 case R_ARM_THM_JUMP24:
10551 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10552 case R_ARM_MOVW_ABS_NC:
10553 case R_ARM_MOVT_ABS:
10554 case R_ARM_MOVW_PREL_NC:
10555 case R_ARM_MOVT_PREL:
10556 case R_ARM_THM_MOVW_ABS_NC:
10557 case R_ARM_THM_MOVT_ABS:
10558 case R_ARM_THM_MOVW_PREL_NC:
10559 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10560 /* Should the interworking branches be here also? */
10561
3eb128b2 10562 if (h != NULL)
eb043451
PB		 10563 {
10564 struct elf32_arm_link_hash_entry *eh;
10565 struct elf32_arm_relocs_copied **pp;
10566 struct elf32_arm_relocs_copied *p;
5e681ec4 10567
b7693d02 10568 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10569
eb043451 10570 if (h->plt.refcount > 0)
b7693d02
DJ		 10571 {
10572 h->plt.refcount -= 1;
bd97cb95
DJ		 10573 if (r_type == R_ARM_THM_CALL)
10574 eh->plt_maybe_thumb_refcount--;
10575
10576 if (r_type == R_ARM_THM_JUMP24
10577 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10578 eh->plt_thumb_refcount--;
10579 }
5e681ec4 10580
eb043451 10581 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10582 || r_type == R_ARM_REL32
10583 || r_type == R_ARM_ABS32_NOI
10584 || r_type == R_ARM_REL32_NOI)
eb043451 10585 {
eb043451
PB		 10586 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10587 pp = &p->next)
10588 if (p->section == sec)
10589 {
10590 p->count -= 1;
bb224fc3
MS		 10591 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10592 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10593 p->pc_count -= 1;
eb043451
PB		 10594 if (p->count == 0)
10595 *pp = p->next;
10596 break;
10597 }
10598 }
10599 }
10600 break;
5e681ec4 10601
eb043451
PB		 10602 default:
10603 break;
10604 }
10605 }
5e681ec4 10606
b34976b6 10607 return TRUE;
252b5132
RH		 10608}
10609
780a67af
NC		 10610/* Look through the relocs for a section during the first phase. */
10611
b34976b6 10612static bfd_boolean
57e8b36a
NC		 10613elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10614 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10615{
b34976b6
AM		 10616 Elf_Internal_Shdr *symtab_hdr;
10617 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10618 const Elf_Internal_Rela *rel;
10619 const Elf_Internal_Rela *rel_end;
10620 bfd *dynobj;
5e681ec4 10621 asection *sreloc;
b34976b6 10622 bfd_vma *local_got_offsets;
5e681ec4 10623 struct elf32_arm_link_hash_table *htab;
39623e12 10624 bfd_boolean needs_plt;
ce98a316 10625 unsigned long nsyms;
9a5aca8c 10626
1049f94e 10627 if (info->relocatable)
b34976b6 10628 return TRUE;
9a5aca8c 10629
0ffa91dd
NC		 10630 BFD_ASSERT (is_arm_elf (abfd));
10631
5e681ec4
PB		 10632 htab = elf32_arm_hash_table (info);
10633 sreloc = NULL;
9a5aca8c 10634
67687978
PB		 10635 /* Create dynamic sections for relocatable executables so that we can
10636 copy relocations. */
10637 if (htab->root.is_relocatable_executable
10638 && ! htab->root.dynamic_sections_created)
10639 {
10640 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10641 return FALSE;
10642 }
10643
252b5132
RH		 10644 dynobj = elf_hash_table (info)->dynobj;
10645 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10646
0ffa91dd 10647 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10648 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10649 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10650
252b5132
RH		 10651 rel_end = relocs + sec->reloc_count;
10652 for (rel = relocs; rel < rel_end; rel++)
10653 {
10654 struct elf_link_hash_entry *h;
b7693d02 10655 struct elf32_arm_link_hash_entry *eh;
252b5132 10656 unsigned long r_symndx;
eb043451 10657 int r_type;
9a5aca8c 10658
252b5132 10659 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10660 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10661 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10662
ce98a316
NC		 10663 if (r_symndx >= nsyms
10664 /* PR 9934: It is possible to have relocations that do not
10665 refer to symbols, thus it is also possible to have an
10666 object file containing relocations but no symbol table. */
10667 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10668 {
10669 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10670 r_symndx);
ba93b8ac
DJ		 10671 return FALSE;
10672 }
10673
ce98a316 10674 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10675 h = NULL;
10676 else
973a3492
L		 10677 {
10678 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10679 while (h->root.type == bfd_link_hash_indirect
10680 || h->root.type == bfd_link_hash_warning)
10681 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10682 }
9a5aca8c 10683
b7693d02
DJ		 10684 eh = (struct elf32_arm_link_hash_entry *) h;
10685
eb043451 10686 switch (r_type)
252b5132 10687 {
5e681ec4 10688 case R_ARM_GOT32:
eb043451 10689 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10690 case R_ARM_TLS_GD32:
10691 case R_ARM_TLS_IE32:
5e681ec4 10692 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10693 {
10694 int tls_type, old_tls_type;
5e681ec4 10695
ba93b8ac
DJ		 10696 switch (r_type)
10697 {
10698 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10699 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10700 default: tls_type = GOT_NORMAL; break;
10701 }
252b5132 10702
ba93b8ac
DJ		 10703 if (h != NULL)
10704 {
10705 h->got.refcount++;
10706 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10707 }
10708 else
10709 {
10710 bfd_signed_vma *local_got_refcounts;
10711
10712 /* This is a global offset table entry for a local symbol. */
10713 local_got_refcounts = elf_local_got_refcounts (abfd);
10714 if (local_got_refcounts == NULL)
10715 {
10716 bfd_size_type size;
906e58ca 10717
ba93b8ac 10718 size = symtab_hdr->sh_info;
906e58ca 10719 size *= (sizeof (bfd_signed_vma) + sizeof (char));
ba93b8ac
DJ		 10720 local_got_refcounts = bfd_zalloc (abfd, size);
10721 if (local_got_refcounts == NULL)
10722 return FALSE;
10723 elf_local_got_refcounts (abfd) = local_got_refcounts;
10724 elf32_arm_local_got_tls_type (abfd)
10725 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10726 }
10727 local_got_refcounts[r_symndx] += 1;
10728 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10729 }
10730
10731 /* We will already have issued an error message if there is a
10732 TLS / non-TLS mismatch, based on the symbol type. We don't
10733 support any linker relaxations. So just combine any TLS
10734 types needed. */
10735 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10736 && tls_type != GOT_NORMAL)
10737 tls_type |= old_tls_type;
10738
10739 if (old_tls_type != tls_type)
10740 {
10741 if (h != NULL)
10742 elf32_arm_hash_entry (h)->tls_type = tls_type;
10743 else
10744 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10745 }
10746 }
8029a119 10747 /* Fall through. */
ba93b8ac
DJ		 10748
10749 case R_ARM_TLS_LDM32:
10750 if (r_type == R_ARM_TLS_LDM32)
10751 htab->tls_ldm_got.refcount++;
8029a119 10752 /* Fall through. */
252b5132 10753
c19d1205 10754 case R_ARM_GOTOFF32:
5e681ec4
PB		 10755 case R_ARM_GOTPC:
10756 if (htab->sgot == NULL)
10757 {
10758 if (htab->root.dynobj == NULL)
10759 htab->root.dynobj = abfd;
10760 if (!create_got_section (htab->root.dynobj, info))
10761 return FALSE;
10762 }
252b5132
RH		 10763 break;
10764
00a97672
RS		 10765 case R_ARM_ABS12:
10766 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10767 ldr __GOTT_INDEX__ offsets. */
10768 if (!htab->vxworks_p)
10769 break;
8029a119 10770 /* Fall through. */
00a97672 10771
252b5132 10772 case R_ARM_PC24:
7359ea65 10773 case R_ARM_PLT32:
5b5bb741
PB		 10774 case R_ARM_CALL:
10775 case R_ARM_JUMP24:
eb043451 10776 case R_ARM_PREL31:
c19d1205 10777 case R_ARM_THM_CALL:
bd97cb95
DJ		 10778 case R_ARM_THM_JUMP24:
10779 case R_ARM_THM_JUMP19:
39623e12
PB		 10780 needs_plt = 1;
10781 goto normal_reloc;
10782
96c23d59
JM		 10783 case R_ARM_MOVW_ABS_NC:
10784 case R_ARM_MOVT_ABS:
10785 case R_ARM_THM_MOVW_ABS_NC:
10786 case R_ARM_THM_MOVT_ABS:
10787 if (info->shared)
10788 {
10789 (*_bfd_error_handler)
10790 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10791 abfd, elf32_arm_howto_table_1[r_type].name,
10792 (h) ? h->root.root.string : "a local symbol");
10793 bfd_set_error (bfd_error_bad_value);
10794 return FALSE;
10795 }
10796
10797 /* Fall through. */
39623e12
PB		 10798 case R_ARM_ABS32:
10799 case R_ARM_ABS32_NOI:
10800 case R_ARM_REL32:
10801 case R_ARM_REL32_NOI:
b6895b4f
PB		 10802 case R_ARM_MOVW_PREL_NC:
10803 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10804 case R_ARM_THM_MOVW_PREL_NC:
10805 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10806 needs_plt = 0;
10807 normal_reloc:
10808
b7693d02 10809 /* Should the interworking branches be listed here? */
7359ea65 10810 if (h != NULL)
5e681ec4
PB		 10811 {
10812 /* If this reloc is in a read-only section, we might
10813 need a copy reloc. We can't check reliably at this
10814 stage whether the section is read-only, as input
10815 sections have not yet been mapped to output sections.
10816 Tentatively set the flag for now, and correct in
10817 adjust_dynamic_symbol. */
7359ea65 10818 if (!info->shared)
f5385ebf 10819 h->non_got_ref = 1;
7359ea65 10820
5e681ec4 10821 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10822 refers to is in a different object. We can't tell for
10823 sure yet, because something later might force the
10824 symbol local. */
39623e12 10825 if (needs_plt)
f5385ebf 10826 h->needs_plt = 1;
4f199be3
DJ		 10827
10828 /* If we create a PLT entry, this relocation will reference
10829 it, even if it's an ABS32 relocation. */
10830 h->plt.refcount += 1;
b7693d02 10831
bd97cb95
DJ		 10832 /* It's too early to use htab->use_blx here, so we have to
10833 record possible blx references separately from
10834 relocs that definitely need a thumb stub. */
10835
c19d1205 10836 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10837 eh->plt_maybe_thumb_refcount += 1;
10838
10839 if (r_type == R_ARM_THM_JUMP24
10840 || r_type == R_ARM_THM_JUMP19)
b7693d02 10841 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10842 }
10843
67687978
PB		 10844 /* If we are creating a shared library or relocatable executable,
10845 and this is a reloc against a global symbol, or a non PC
10846 relative reloc against a local symbol, then we need to copy
10847 the reloc into the shared library. However, if we are linking
10848 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10849 global symbol which is defined in an object we are
10850 including in the link (i.e., DEF_REGULAR is set). At
10851 this point we have not seen all the input files, so it is
10852 possible that DEF_REGULAR is not set now but will be set
10853 later (it is never cleared). We account for that
10854 possibility below by storing information in the
5e681ec4 10855 relocs_copied field of the hash table entry. */
67687978 10856 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10857 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10858 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10859 || (h != NULL && ! h->needs_plt
10860 && (! info->symbolic || ! h->def_regular))))
252b5132 10861 {
5e681ec4
PB		 10862 struct elf32_arm_relocs_copied *p, **head;
10863
252b5132
RH		 10864 /* When creating a shared object, we must copy these
10865 reloc types into the output file. We create a reloc
10866 section in dynobj and make room for this reloc. */
83bac4b0 10867 if (sreloc == NULL)
252b5132 10868 {
83bac4b0
NC		 10869 sreloc = _bfd_elf_make_dynamic_reloc_section
10870 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10871
83bac4b0 10872 if (sreloc == NULL)
b34976b6 10873 return FALSE;
252b5132 10874
83bac4b0 10875 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 10876 if (htab->symbian_p)
252b5132 10877 {
83bac4b0 10878 flagword flags;
5e681ec4 10879
83bac4b0 10880 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 10881 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 10882 bfd_set_section_flags (dynobj, sreloc, flags);
10883 }
252b5132
RH		 10884 }
10885
5e681ec4
PB		 10886 /* If this is a global symbol, we count the number of
10887 relocations we need for this symbol. */
10888 if (h != NULL)
252b5132 10889 {
5e681ec4
PB		 10890 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
10891 }
10892 else
10893 {
10894 /* Track dynamic relocs needed for local syms too.
10895 We really need local syms available to do this
10896 easily. Oh well. */
5e681ec4 10897 asection *s;
6edfbbad 10898 void *vpp;
87d72d41 10899 Elf_Internal_Sym *isym;
6edfbbad 10900
87d72d41
AM		 10901 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
10902 abfd, r_symndx);
10903 if (isym == NULL)
5e681ec4 10904 return FALSE;
57e8b36a 10905
87d72d41
AM		 10906 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
10907 if (s == NULL)
10908 s = sec;
10909
6edfbbad
DJ		 10910 vpp = &elf_section_data (s)->local_dynrel;
10911 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 10912 }
57e8b36a 10913
5e681ec4
PB		 10914 p = *head;
10915 if (p == NULL || p->section != sec)
10916 {
10917 bfd_size_type amt = sizeof *p;
57e8b36a 10918
5e681ec4 10919 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 10920 if (p == NULL)
5e681ec4
PB		 10921 return FALSE;
10922 p->next = *head;
10923 *head = p;
10924 p->section = sec;
10925 p->count = 0;
ba93b8ac 10926 p->pc_count = 0;
252b5132 10927 }
57e8b36a 10928
bb224fc3 10929 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 10930 p->pc_count += 1;
71a976dd 10931 p->count += 1;
252b5132
RH		 10932 }
10933 break;
10934
10935 /* This relocation describes the C++ object vtable hierarchy.
10936 Reconstruct it for later use during GC. */
10937 case R_ARM_GNU_VTINHERIT:
c152c796 10938 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 10939 return FALSE;
252b5132 10940 break;
9a5aca8c 10941
252b5132
RH		 10942 /* This relocation describes which C++ vtable entries are actually
10943 used. Record for later use during GC. */
10944 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 10945 BFD_ASSERT (h != NULL);
10946 if (h != NULL
10947 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 10948 return FALSE;
252b5132
RH		 10949 break;
10950 }
10951 }
f21f3fe0 10952
b34976b6 10953 return TRUE;
252b5132
RH		 10954}
10955
6a5bb875
PB		 10956/* Unwinding tables are not referenced directly. This pass marks them as
10957 required if the corresponding code section is marked. */
10958
10959static bfd_boolean
906e58ca
NC		 10960elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
10961 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 10962{
10963 bfd *sub;
10964 Elf_Internal_Shdr **elf_shdrp;
10965 bfd_boolean again;
10966
10967 /* Marking EH data may cause additional code sections to be marked,
10968 requiring multiple passes. */
10969 again = TRUE;
10970 while (again)
10971 {
10972 again = FALSE;
10973 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
10974 {
10975 asection *o;
10976
0ffa91dd 10977 if (! is_arm_elf (sub))
6a5bb875
PB		 10978 continue;
10979
10980 elf_shdrp = elf_elfsections (sub);
10981 for (o = sub->sections; o != NULL; o = o->next)
10982 {
10983 Elf_Internal_Shdr *hdr;
0ffa91dd 10984
6a5bb875 10985 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 10986 if (hdr->sh_type == SHT_ARM_EXIDX
10987 && hdr->sh_link
10988 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 10989 && !o->gc_mark
10990 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
10991 {
10992 again = TRUE;
10993 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
10994 return FALSE;
10995 }
10996 }
10997 }
10998 }
10999
11000 return TRUE;
11001}
11002
3c9458e9
NC		 11003/* Treat mapping symbols as special target symbols. */
11004
11005static bfd_boolean
11006elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11007{
b0796911
PB		 11008 return bfd_is_arm_special_symbol_name (sym->name,
11009 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11010}
11011
0367ecfb
NC		 11012/* This is a copy of elf_find_function() from elf.c except that
11013 ARM mapping symbols are ignored when looking for function names
11014 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11015
0367ecfb
NC		 11016static bfd_boolean
11017arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11018 asection * section,
11019 asymbol ** symbols,
11020 bfd_vma offset,
11021 const char ** filename_ptr,
11022 const char ** functionname_ptr)
11023{
11024 const char * filename = NULL;
11025 asymbol * func = NULL;
11026 bfd_vma low_func = 0;
11027 asymbol ** p;
252b5132
RH		 11028
11029 for (p = symbols; *p != NULL; p++)
11030 {
11031 elf_symbol_type *q;
11032
11033 q = (elf_symbol_type *) *p;
11034
252b5132
RH		 11035 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11036 {
11037 default:
11038 break;
11039 case STT_FILE:
11040 filename = bfd_asymbol_name (&q->symbol);
11041 break;
252b5132
RH		 11042 case STT_FUNC:
11043 case STT_ARM_TFUNC:
9d2da7ca 11044 case STT_NOTYPE:
b0796911 11045 /* Skip mapping symbols. */
0367ecfb 11046 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11047 && bfd_is_arm_special_symbol_name (q->symbol.name,
11048 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11049 continue;
11050 /* Fall through. */
6b40fcba 11051 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11052 && q->symbol.value >= low_func
11053 && q->symbol.value <= offset)
11054 {
11055 func = (asymbol *) q;
11056 low_func = q->symbol.value;
11057 }
11058 break;
11059 }
11060 }
11061
11062 if (func == NULL)
b34976b6 11063 return FALSE;
252b5132 11064
0367ecfb
NC		 11065 if (filename_ptr)
11066 *filename_ptr = filename;
11067 if (functionname_ptr)
11068 *functionname_ptr = bfd_asymbol_name (func);
11069
11070 return TRUE;
906e58ca 11071}
0367ecfb
NC		 11072
11073
11074/* Find the nearest line to a particular section and offset, for error
11075 reporting. This code is a duplicate of the code in elf.c, except
11076 that it uses arm_elf_find_function. */
11077
11078static bfd_boolean
11079elf32_arm_find_nearest_line (bfd * abfd,
11080 asection * section,
11081 asymbol ** symbols,
11082 bfd_vma offset,
11083 const char ** filename_ptr,
11084 const char ** functionname_ptr,
11085 unsigned int * line_ptr)
11086{
11087 bfd_boolean found = FALSE;
11088
11089 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11090
11091 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11092 filename_ptr, functionname_ptr,
11093 line_ptr, 0,
11094 & elf_tdata (abfd)->dwarf2_find_line_info))
11095 {
11096 if (!*functionname_ptr)
11097 arm_elf_find_function (abfd, section, symbols, offset,
11098 *filename_ptr ? NULL : filename_ptr,
11099 functionname_ptr);
f21f3fe0 11100
0367ecfb
NC		 11101 return TRUE;
11102 }
11103
11104 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11105 & found, filename_ptr,
11106 functionname_ptr, line_ptr,
11107 & elf_tdata (abfd)->line_info))
11108 return FALSE;
11109
11110 if (found && (*functionname_ptr || *line_ptr))
11111 return TRUE;
11112
11113 if (symbols == NULL)
11114 return FALSE;
11115
11116 if (! arm_elf_find_function (abfd, section, symbols, offset,
11117 filename_ptr, functionname_ptr))
11118 return FALSE;
11119
11120 *line_ptr = 0;
b34976b6 11121 return TRUE;
252b5132
RH		 11122}
11123
4ab527b0
FF		 11124static bfd_boolean
11125elf32_arm_find_inliner_info (bfd * abfd,
11126 const char ** filename_ptr,
11127 const char ** functionname_ptr,
11128 unsigned int * line_ptr)
11129{
11130 bfd_boolean found;
11131 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11132 functionname_ptr, line_ptr,
11133 & elf_tdata (abfd)->dwarf2_find_line_info);
11134 return found;
11135}
11136
252b5132
RH		 11137/* Adjust a symbol defined by a dynamic object and referenced by a
11138 regular object. The current definition is in some section of the
11139 dynamic object, but we're not including those sections. We have to
11140 change the definition to something the rest of the link can
11141 understand. */
11142
b34976b6 11143static bfd_boolean
57e8b36a
NC		 11144elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11145 struct elf_link_hash_entry * h)
252b5132
RH		 11146{
11147 bfd * dynobj;
11148 asection * s;
b7693d02 11149 struct elf32_arm_link_hash_entry * eh;
67687978 11150 struct elf32_arm_link_hash_table *globals;
252b5132 11151
67687978 11152 globals = elf32_arm_hash_table (info);
252b5132
RH		 11153 dynobj = elf_hash_table (info)->dynobj;
11154
11155 /* Make sure we know what is going on here. */
11156 BFD_ASSERT (dynobj != NULL
f5385ebf 11157 && (h->needs_plt
f6e332e6 11158 || h->u.weakdef != NULL
f5385ebf
AM		 11159 || (h->def_dynamic
11160 && h->ref_regular
11161 && !h->def_regular)));
252b5132 11162
b7693d02
DJ		 11163 eh = (struct elf32_arm_link_hash_entry *) h;
11164
252b5132
RH		 11165 /* If this is a function, put it in the procedure linkage table. We
11166 will fill in the contents of the procedure linkage table later,
11167 when we know the address of the .got section. */
0f88be7a 11168 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11169 || h->needs_plt)
252b5132 11170 {
5e681ec4
PB		 11171 if (h->plt.refcount <= 0
11172 || SYMBOL_CALLS_LOCAL (info, h)
11173 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11174 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11175 {
11176 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11177 file, but the symbol was never referred to by a dynamic
11178 object, or if all references were garbage collected. In
11179 such a case, we don't actually need to build a procedure
11180 linkage table, and we can just do a PC24 reloc instead. */
11181 h->plt.offset = (bfd_vma) -1;
b7693d02 11182 eh->plt_thumb_refcount = 0;
bd97cb95 11183 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11184 h->needs_plt = 0;
252b5132
RH		 11185 }
11186
b34976b6 11187 return TRUE;
252b5132 11188 }
5e681ec4 11189 else
b7693d02
DJ		 11190 {
11191 /* It's possible that we incorrectly decided a .plt reloc was
11192 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11193 in check_relocs. We can't decide accurately between function
11194 and non-function syms in check-relocs; Objects loaded later in
11195 the link may change h->type. So fix it now. */
11196 h->plt.offset = (bfd_vma) -1;
11197 eh->plt_thumb_refcount = 0;
bd97cb95 11198 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11199 }
252b5132
RH		 11200
11201 /* If this is a weak symbol, and there is a real definition, the
11202 processor independent code will have arranged for us to see the
11203 real definition first, and we can just use the same value. */
f6e332e6 11204 if (h->u.weakdef != NULL)
252b5132 11205 {
f6e332e6
AM		 11206 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11207 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11208 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11209 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11210 return TRUE;
252b5132
RH		 11211 }
11212
ba93b8ac
DJ		 11213 /* If there are no non-GOT references, we do not need a copy
11214 relocation. */
11215 if (!h->non_got_ref)
11216 return TRUE;
11217
252b5132
RH		 11218 /* This is a reference to a symbol defined by a dynamic object which
11219 is not a function. */
11220
11221 /* If we are creating a shared library, we must presume that the
11222 only references to the symbol are via the global offset table.
11223 For such cases we need not do anything here; the relocations will
67687978
PB		 11224 be handled correctly by relocate_section. Relocatable executables
11225 can reference data in shared objects directly, so we don't need to
11226 do anything here. */
11227 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11228 return TRUE;
252b5132 11229
909272ee
AM		 11230 if (h->size == 0)
11231 {
11232 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11233 h->root.root.string);
11234 return TRUE;
11235 }
11236
252b5132
RH		 11237 /* We must allocate the symbol in our .dynbss section, which will
11238 become part of the .bss section of the executable. There will be
11239 an entry for this symbol in the .dynsym section. The dynamic
11240 object will contain position independent code, so all references
11241 from the dynamic object to this symbol will go through the global
11242 offset table. The dynamic linker will use the .dynsym entry to
11243 determine the address it must put in the global offset table, so
11244 both the dynamic object and the regular object will refer to the
11245 same memory location for the variable. */
252b5132
RH		 11246 s = bfd_get_section_by_name (dynobj, ".dynbss");
11247 BFD_ASSERT (s != NULL);
11248
11249 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11250 copy the initial value out of the dynamic object and into the
11251 runtime process image. We need to remember the offset into the
00a97672 11252 .rel(a).bss section we are going to use. */
252b5132
RH		 11253 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11254 {
11255 asection *srel;
11256
00a97672 11257 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11258 BFD_ASSERT (srel != NULL);
00a97672 11259 srel->size += RELOC_SIZE (globals);
f5385ebf 11260 h->needs_copy = 1;
252b5132
RH		 11261 }
11262
027297b7 11263 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11264}
11265
5e681ec4
PB		 11266/* Allocate space in .plt, .got and associated reloc sections for
11267 dynamic relocs. */
11268
11269static bfd_boolean
57e8b36a 11270allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11271{
11272 struct bfd_link_info *info;
11273 struct elf32_arm_link_hash_table *htab;
11274 struct elf32_arm_link_hash_entry *eh;
11275 struct elf32_arm_relocs_copied *p;
bd97cb95 11276 bfd_signed_vma thumb_refs;
5e681ec4 11277
b7693d02
DJ		 11278 eh = (struct elf32_arm_link_hash_entry *) h;
11279
5e681ec4
PB		 11280 if (h->root.type == bfd_link_hash_indirect)
11281 return TRUE;
11282
11283 if (h->root.type == bfd_link_hash_warning)
11284 /* When warning symbols are created, they **replace** the "real"
11285 entry in the hash table, thus we never get to see the real
11286 symbol in a hash traversal. So look at it now. */
11287 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11288
11289 info = (struct bfd_link_info *) inf;
11290 htab = elf32_arm_hash_table (info);
11291
11292 if (htab->root.dynamic_sections_created
11293 && h->plt.refcount > 0)
11294 {
11295 /* Make sure this symbol is output as a dynamic symbol.
11296 Undefined weak syms won't yet be marked as dynamic. */
11297 if (h->dynindx == -1
f5385ebf 11298 && !h->forced_local)
5e681ec4 11299 {
c152c796 11300 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11301 return FALSE;
11302 }
11303
11304 if (info->shared
7359ea65 11305 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11306 {
11307 asection *s = htab->splt;
11308
11309 /* If this is the first .plt entry, make room for the special
11310 first entry. */
eea6121a 11311 if (s->size == 0)
e5a52504 11312 s->size += htab->plt_header_size;
5e681ec4 11313
eea6121a 11314 h->plt.offset = s->size;
5e681ec4 11315
b7693d02
DJ		 11316 /* If we will insert a Thumb trampoline before this PLT, leave room
11317 for it. */
bd97cb95
DJ		 11318 thumb_refs = eh->plt_thumb_refcount;
11319 if (!htab->use_blx)
11320 thumb_refs += eh->plt_maybe_thumb_refcount;
11321
11322 if (thumb_refs > 0)
b7693d02
DJ		 11323 {
11324 h->plt.offset += PLT_THUMB_STUB_SIZE;
11325 s->size += PLT_THUMB_STUB_SIZE;
11326 }
11327
5e681ec4
PB		 11328 /* If this symbol is not defined in a regular file, and we are
11329 not generating a shared library, then set the symbol to this
11330 location in the .plt. This is required to make function
11331 pointers compare as equal between the normal executable and
11332 the shared library. */
11333 if (! info->shared
f5385ebf 11334 && !h->def_regular)
5e681ec4
PB		 11335 {
11336 h->root.u.def.section = s;
11337 h->root.u.def.value = h->plt.offset;
11338 }
11339
022f8312
CL		 11340 /* Make sure the function is not marked as Thumb, in case
11341 it is the target of an ABS32 relocation, which will
11342 point to the PLT entry. */
11343 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11344 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11345
5e681ec4 11346 /* Make room for this entry. */
e5a52504 11347 s->size += htab->plt_entry_size;
5e681ec4 11348
e5a52504 11349 if (!htab->symbian_p)
b7693d02
DJ		 11350 {
11351 /* We also need to make an entry in the .got.plt section, which
11352 will be placed in the .got section by the linker script. */
11353 eh->plt_got_offset = htab->sgotplt->size;
11354 htab->sgotplt->size += 4;
11355 }
5e681ec4 11356
00a97672
RS		 11357 /* We also need to make an entry in the .rel(a).plt section. */
11358 htab->srelplt->size += RELOC_SIZE (htab);
11359
11360 /* VxWorks executables have a second set of relocations for
11361 each PLT entry. They go in a separate relocation section,
11362 which is processed by the kernel loader. */
11363 if (htab->vxworks_p && !info->shared)
11364 {
11365 /* There is a relocation for the initial PLT entry:
11366 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11367 if (h->plt.offset == htab->plt_header_size)
11368 htab->srelplt2->size += RELOC_SIZE (htab);
11369
11370 /* There are two extra relocations for each subsequent
11371 PLT entry: an R_ARM_32 relocation for the GOT entry,
11372 and an R_ARM_32 relocation for the PLT entry. */
11373 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11374 }
5e681ec4
PB		 11375 }
11376 else
11377 {
11378 h->plt.offset = (bfd_vma) -1;
f5385ebf 11379 h->needs_plt = 0;
5e681ec4
PB		 11380 }
11381 }
11382 else
11383 {
11384 h->plt.offset = (bfd_vma) -1;
f5385ebf 11385 h->needs_plt = 0;
5e681ec4
PB		 11386 }
11387
11388 if (h->got.refcount > 0)
11389 {
11390 asection *s;
11391 bfd_boolean dyn;
ba93b8ac
DJ		 11392 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11393 int indx;
5e681ec4
PB		 11394
11395 /* Make sure this symbol is output as a dynamic symbol.
11396 Undefined weak syms won't yet be marked as dynamic. */
11397 if (h->dynindx == -1
f5385ebf 11398 && !h->forced_local)
5e681ec4 11399 {
c152c796 11400 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11401 return FALSE;
11402 }
11403
e5a52504
MM		 11404 if (!htab->symbian_p)
11405 {
11406 s = htab->sgot;
11407 h->got.offset = s->size;
ba93b8ac
DJ		 11408
11409 if (tls_type == GOT_UNKNOWN)
11410 abort ();
11411
11412 if (tls_type == GOT_NORMAL)
11413 /* Non-TLS symbols need one GOT slot. */
11414 s->size += 4;
11415 else
11416 {
11417 if (tls_type & GOT_TLS_GD)
11418 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11419 s->size += 8;
11420 if (tls_type & GOT_TLS_IE)
11421 /* R_ARM_TLS_IE32 needs one GOT slot. */
11422 s->size += 4;
11423 }
11424
e5a52504 11425 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11426
11427 indx = 0;
11428 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11429 && (!info->shared
11430 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11431 indx = h->dynindx;
11432
11433 if (tls_type != GOT_NORMAL
11434 && (info->shared || indx != 0)
11435 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11436 || h->root.type != bfd_link_hash_undefweak))
11437 {
11438 if (tls_type & GOT_TLS_IE)
00a97672 11439 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11440
11441 if (tls_type & GOT_TLS_GD)
00a97672 11442 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11443
11444 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11445 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11446 }
11447 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11448 || h->root.type != bfd_link_hash_undefweak)
11449 && (info->shared
11450 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11451 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11452 }
5e681ec4
PB		 11453 }
11454 else
11455 h->got.offset = (bfd_vma) -1;
11456
a4fd1a8e
PB		 11457 /* Allocate stubs for exported Thumb functions on v4t. */
11458 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11459 && h->def_regular
a4fd1a8e
PB		 11460 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11461 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11462 {
11463 struct elf_link_hash_entry * th;
11464 struct bfd_link_hash_entry * bh;
11465 struct elf_link_hash_entry * myh;
11466 char name[1024];
11467 asection *s;
11468 bh = NULL;
11469 /* Create a new symbol to regist the real location of the function. */
11470 s = h->root.u.def.section;
906e58ca 11471 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11472 _bfd_generic_link_add_one_symbol (info, s->owner,
11473 name, BSF_GLOBAL, s,
11474 h->root.u.def.value,
11475 NULL, TRUE, FALSE, &bh);
11476
11477 myh = (struct elf_link_hash_entry *) bh;
11478 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11479 myh->forced_local = 1;
11480 eh->export_glue = myh;
11481 th = record_arm_to_thumb_glue (info, h);
11482 /* Point the symbol at the stub. */
11483 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11484 h->root.u.def.section = th->root.u.def.section;
11485 h->root.u.def.value = th->root.u.def.value & ~1;
11486 }
11487
5e681ec4
PB		 11488 if (eh->relocs_copied == NULL)
11489 return TRUE;
11490
11491 /* In the shared -Bsymbolic case, discard space allocated for
11492 dynamic pc-relative relocs against symbols which turn out to be
11493 defined in regular objects. For the normal shared case, discard
11494 space for pc-relative relocs that have become local due to symbol
11495 visibility changes. */
11496
67687978 11497 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11498 {
7bdca076 11499 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11500 R_ARM_REL32_NOI, which will appear on something like
11501 ".long foo - .". We want calls to protected symbols to resolve
11502 directly to the function rather than going via the plt. If people
11503 want function pointer comparisons to work as expected then they
11504 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11505 if (SYMBOL_CALLS_LOCAL (info, h))
11506 {
11507 struct elf32_arm_relocs_copied **pp;
11508
11509 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11510 {
11511 p->count -= p->pc_count;
11512 p->pc_count = 0;
11513 if (p->count == 0)
11514 *pp = p->next;
11515 else
11516 pp = &p->next;
11517 }
11518 }
11519
3348747a
NS		 11520 if (elf32_arm_hash_table (info)->vxworks_p)
11521 {
11522 struct elf32_arm_relocs_copied **pp;
11523
11524 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11525 {
11526 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11527 *pp = p->next;
11528 else
11529 pp = &p->next;
11530 }
11531 }
11532
ba93b8ac 11533 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11534 visibility. */
22d606e9 11535 if (eh->relocs_copied != NULL
5e681ec4 11536 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11537 {
11538 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11539 eh->relocs_copied = NULL;
11540
11541 /* Make sure undefined weak symbols are output as a dynamic
11542 symbol in PIEs. */
11543 else if (h->dynindx == -1
11544 && !h->forced_local)
11545 {
11546 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11547 return FALSE;
11548 }
11549 }
11550
67687978
PB		 11551 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11552 && h->root.type == bfd_link_hash_new)
11553 {
11554 /* Output absolute symbols so that we can create relocations
11555 against them. For normal symbols we output a relocation
11556 against the section that contains them. */
11557 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11558 return FALSE;
11559 }
11560
5e681ec4
PB		 11561 }
11562 else
11563 {
11564 /* For the non-shared case, discard space for relocs against
11565 symbols which turn out to need copy relocs or are not
11566 dynamic. */
11567
f5385ebf
AM		 11568 if (!h->non_got_ref
11569 && ((h->def_dynamic
11570 && !h->def_regular)
5e681ec4
PB		 11571 || (htab->root.dynamic_sections_created
11572 && (h->root.type == bfd_link_hash_undefweak
11573 || h->root.type == bfd_link_hash_undefined))))
11574 {
11575 /* Make sure this symbol is output as a dynamic symbol.
11576 Undefined weak syms won't yet be marked as dynamic. */
11577 if (h->dynindx == -1
f5385ebf 11578 && !h->forced_local)
5e681ec4 11579 {
c152c796 11580 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11581 return FALSE;
11582 }
11583
11584 /* If that succeeded, we know we'll be keeping all the
11585 relocs. */
11586 if (h->dynindx != -1)
11587 goto keep;
11588 }
11589
11590 eh->relocs_copied = NULL;
11591
11592 keep: ;
11593 }
11594
11595 /* Finally, allocate space. */
11596 for (p = eh->relocs_copied; p != NULL; p = p->next)
11597 {
11598 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11599 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11600 }
11601
11602 return TRUE;
11603}
11604
08d1f311
DJ		 11605/* Find any dynamic relocs that apply to read-only sections. */
11606
11607static bfd_boolean
8029a119 11608elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11609{
8029a119
NC		 11610 struct elf32_arm_link_hash_entry * eh;
11611 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11612
11613 if (h->root.type == bfd_link_hash_warning)
11614 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11615
11616 eh = (struct elf32_arm_link_hash_entry *) h;
11617 for (p = eh->relocs_copied; p != NULL; p = p->next)
11618 {
11619 asection *s = p->section;
11620
11621 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11622 {
11623 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11624
11625 info->flags |= DF_TEXTREL;
11626
11627 /* Not an error, just cut short the traversal. */
11628 return FALSE;
11629 }
11630 }
11631 return TRUE;
11632}
11633
d504ffc8
DJ		 11634void
11635bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11636 int byteswap_code)
11637{
11638 struct elf32_arm_link_hash_table *globals;
11639
11640 globals = elf32_arm_hash_table (info);
11641 globals->byteswap_code = byteswap_code;
11642}
11643
252b5132
RH		 11644/* Set the sizes of the dynamic sections. */
11645
b34976b6 11646static bfd_boolean
57e8b36a
NC		 11647elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11648 struct bfd_link_info * info)
252b5132
RH		 11649{
11650 bfd * dynobj;
11651 asection * s;
b34976b6
AM		 11652 bfd_boolean plt;
11653 bfd_boolean relocs;
5e681ec4
PB		 11654 bfd *ibfd;
11655 struct elf32_arm_link_hash_table *htab;
252b5132 11656
5e681ec4 11657 htab = elf32_arm_hash_table (info);
252b5132
RH		 11658 dynobj = elf_hash_table (info)->dynobj;
11659 BFD_ASSERT (dynobj != NULL);
39b41c9c 11660 check_use_blx (htab);
252b5132
RH		 11661
11662 if (elf_hash_table (info)->dynamic_sections_created)
11663 {
11664 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11665 if (info->executable)
252b5132
RH		 11666 {
11667 s = bfd_get_section_by_name (dynobj, ".interp");
11668 BFD_ASSERT (s != NULL);
eea6121a 11669 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11670 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11671 }
11672 }
5e681ec4
PB		 11673
11674 /* Set up .got offsets for local syms, and space for local dynamic
11675 relocs. */
11676 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11677 {
5e681ec4
PB		 11678 bfd_signed_vma *local_got;
11679 bfd_signed_vma *end_local_got;
11680 char *local_tls_type;
11681 bfd_size_type locsymcount;
11682 Elf_Internal_Shdr *symtab_hdr;
11683 asection *srel;
3348747a 11684 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 11685
0ffa91dd 11686 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11687 continue;
11688
11689 for (s = ibfd->sections; s != NULL; s = s->next)
11690 {
11691 struct elf32_arm_relocs_copied *p;
11692
6edfbbad 11693 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11694 {
11695 if (!bfd_is_abs_section (p->section)
11696 && bfd_is_abs_section (p->section->output_section))
11697 {
11698 /* Input section has been discarded, either because
11699 it is a copy of a linkonce section or due to
11700 linker script /DISCARD/, so we'll be discarding
11701 the relocs too. */
11702 }
3348747a
NS		 11703 else if (is_vxworks
11704 && strcmp (p->section->output_section->name,
11705 ".tls_vars") == 0)
11706 {
11707 /* Relocations in vxworks .tls_vars sections are
11708 handled specially by the loader. */
11709 }
5e681ec4
PB		 11710 else if (p->count != 0)
11711 {
11712 srel = elf_section_data (p->section)->sreloc;
00a97672 11713 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11714 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11715 info->flags |= DF_TEXTREL;
11716 }
11717 }
11718 }
11719
11720 local_got = elf_local_got_refcounts (ibfd);
11721 if (!local_got)
11722 continue;
11723
0ffa91dd 11724 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11725 locsymcount = symtab_hdr->sh_info;
11726 end_local_got = local_got + locsymcount;
ba93b8ac 11727 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11728 s = htab->sgot;
11729 srel = htab->srelgot;
11730 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11731 {
11732 if (*local_got > 0)
11733 {
eea6121a 11734 *local_got = s->size;
ba93b8ac
DJ		 11735 if (*local_tls_type & GOT_TLS_GD)
11736 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11737 s->size += 8;
11738 if (*local_tls_type & GOT_TLS_IE)
11739 s->size += 4;
11740 if (*local_tls_type == GOT_NORMAL)
11741 s->size += 4;
11742
11743 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11744 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11745 }
11746 else
11747 *local_got = (bfd_vma) -1;
11748 }
252b5132
RH		 11749 }
11750
ba93b8ac
DJ		 11751 if (htab->tls_ldm_got.refcount > 0)
11752 {
11753 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11754 for R_ARM_TLS_LDM32 relocations. */
11755 htab->tls_ldm_got.offset = htab->sgot->size;
11756 htab->sgot->size += 8;
11757 if (info->shared)
00a97672 11758 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11759 }
11760 else
11761 htab->tls_ldm_got.offset = -1;
11762
5e681ec4
PB		 11763 /* Allocate global sym .plt and .got entries, and space for global
11764 sym dynamic relocs. */
57e8b36a 11765 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11766
d504ffc8
DJ		 11767 /* Here we rummage through the found bfds to collect glue information. */
11768 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11769 {
0ffa91dd 11770 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11771 continue;
11772
c7b8f16e
JB		 11773 /* Initialise mapping tables for code/data. */
11774 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11775
c7b8f16e
JB		 11776 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11777 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11778 /* xgettext:c-format */
11779 _bfd_error_handler (_("Errors encountered processing file %s"),
11780 ibfd->filename);
11781 }
d504ffc8 11782
3e6b1042
DJ		 11783 /* Allocate space for the glue sections now that we've sized them. */
11784 bfd_elf32_arm_allocate_interworking_sections (info);
11785
252b5132
RH		 11786 /* The check_relocs and adjust_dynamic_symbol entry points have
11787 determined the sizes of the various dynamic sections. Allocate
11788 memory for them. */
b34976b6
AM		 11789 plt = FALSE;
11790 relocs = FALSE;
252b5132
RH		 11791 for (s = dynobj->sections; s != NULL; s = s->next)
11792 {
11793 const char * name;
252b5132
RH		 11794
11795 if ((s->flags & SEC_LINKER_CREATED) == 0)
11796 continue;
11797
11798 /* It's OK to base decisions on the section name, because none
11799 of the dynobj section names depend upon the input files. */
11800 name = bfd_get_section_name (dynobj, s);
11801
24a1ba0f 11802 if (strcmp (name, ".plt") == 0)
252b5132 11803 {
c456f082
AM		 11804 /* Remember whether there is a PLT. */
11805 plt = s->size != 0;
252b5132 11806 }
0112cd26 11807 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11808 {
c456f082 11809 if (s->size != 0)
252b5132 11810 {
252b5132 11811 /* Remember whether there are any reloc sections other
00a97672
RS		 11812 than .rel(a).plt and .rela.plt.unloaded. */
11813 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11814 relocs = TRUE;
252b5132
RH		 11815
11816 /* We use the reloc_count field as a counter if we need
11817 to copy relocs into the output file. */
11818 s->reloc_count = 0;
11819 }
11820 }
0112cd26 11821 else if (! CONST_STRNEQ (name, ".got")
c456f082 11822 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11823 {
11824 /* It's not one of our sections, so don't allocate space. */
11825 continue;
11826 }
11827
c456f082 11828 if (s->size == 0)
252b5132 11829 {
c456f082 11830 /* If we don't need this section, strip it from the
00a97672
RS		 11831 output file. This is mostly to handle .rel(a).bss and
11832 .rel(a).plt. We must create both sections in
c456f082
AM		 11833 create_dynamic_sections, because they must be created
11834 before the linker maps input sections to output
11835 sections. The linker does that before
11836 adjust_dynamic_symbol is called, and it is that
11837 function which decides whether anything needs to go
11838 into these sections. */
8423293d 11839 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11840 continue;
11841 }
11842
c456f082
AM		 11843 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11844 continue;
11845
252b5132 11846 /* Allocate memory for the section contents. */
906e58ca 11847 s->contents = bfd_zalloc (dynobj, s->size);
c456f082 11848 if (s->contents == NULL)
b34976b6 11849 return FALSE;
252b5132
RH		 11850 }
11851
11852 if (elf_hash_table (info)->dynamic_sections_created)
11853 {
11854 /* Add some entries to the .dynamic section. We fill in the
11855 values later, in elf32_arm_finish_dynamic_sections, but we
11856 must add the entries now so that we get the correct size for
11857 the .dynamic section. The DT_DEBUG entry is filled in by the
11858 dynamic linker and used by the debugger. */
dc810e39 11859#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11860 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 11861
8532796c 11862 if (info->executable)
252b5132 11863 {
dc810e39 11864 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 11865 return FALSE;
252b5132
RH		 11866 }
11867
11868 if (plt)
11869 {
dc810e39
AM		 11870 if ( !add_dynamic_entry (DT_PLTGOT, 0)
11871 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 11872 || !add_dynamic_entry (DT_PLTREL,
11873 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 11874 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 11875 return FALSE;
252b5132
RH		 11876 }
11877
11878 if (relocs)
11879 {
00a97672
RS		 11880 if (htab->use_rel)
11881 {
11882 if (!add_dynamic_entry (DT_REL, 0)
11883 || !add_dynamic_entry (DT_RELSZ, 0)
11884 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
11885 return FALSE;
11886 }
11887 else
11888 {
11889 if (!add_dynamic_entry (DT_RELA, 0)
11890 || !add_dynamic_entry (DT_RELASZ, 0)
11891 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
11892 return FALSE;
11893 }
252b5132
RH		 11894 }
11895
08d1f311
DJ		 11896 /* If any dynamic relocs apply to a read-only section,
11897 then we need a DT_TEXTREL entry. */
11898 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 11899 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
11900 info);
08d1f311 11901
99e4ae17 11902 if ((info->flags & DF_TEXTREL) != 0)
252b5132 11903 {
dc810e39 11904 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 11905 return FALSE;
252b5132 11906 }
7a2b07ff
NS		 11907 if (htab->vxworks_p
11908 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
11909 return FALSE;
252b5132 11910 }
8532796c 11911#undef add_dynamic_entry
252b5132 11912
b34976b6 11913 return TRUE;
252b5132
RH		 11914}
11915
252b5132
RH		 11916/* Finish up dynamic symbol handling. We set the contents of various
11917 dynamic sections here. */
11918
b34976b6 11919static bfd_boolean
906e58ca
NC		 11920elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
11921 struct bfd_link_info * info,
11922 struct elf_link_hash_entry * h,
11923 Elf_Internal_Sym * sym)
252b5132
RH		 11924{
11925 bfd * dynobj;
e5a52504 11926 struct elf32_arm_link_hash_table *htab;
b7693d02 11927 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 11928
11929 dynobj = elf_hash_table (info)->dynobj;
e5a52504 11930 htab = elf32_arm_hash_table (info);
b7693d02 11931 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 11932
11933 if (h->plt.offset != (bfd_vma) -1)
11934 {
11935 asection * splt;
252b5132 11936 asection * srel;
e5a52504 11937 bfd_byte *loc;
24a1ba0f 11938 bfd_vma plt_index;
947216bf 11939 Elf_Internal_Rela rel;
252b5132
RH		 11940
11941 /* This symbol has an entry in the procedure linkage table. Set
11942 it up. */
11943
11944 BFD_ASSERT (h->dynindx != -1);
11945
11946 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 11947 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 11948 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 11949
e5a52504
MM		 11950 /* Fill in the entry in the procedure linkage table. */
11951 if (htab->symbian_p)
11952 {
906e58ca 11953 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 11954 elf32_arm_symbian_plt_entry[0],
11955 splt->contents + h->plt.offset);
906e58ca 11956 bfd_put_32 (output_bfd,
52ab56c2
PB		 11957 elf32_arm_symbian_plt_entry[1],
11958 splt->contents + h->plt.offset + 4);
906e58ca 11959
e5a52504 11960 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 11961 rel.r_offset = (splt->output_section->vma
11962 + splt->output_offset
52ab56c2 11963 + h->plt.offset + 4);
e5a52504 11964 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 11965
11966 /* Get the index in the procedure linkage table which
11967 corresponds to this symbol. This is the index of this symbol
11968 in all the symbols for which we are making plt entries. The
11969 first entry in the procedure linkage table is reserved. */
906e58ca 11970 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 11971 / htab->plt_entry_size);
e5a52504
MM		 11972 }
11973 else
11974 {
00a97672 11975 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 11976 bfd_vma got_displacement;
11977 asection * sgot;
52ab56c2 11978 bfd_byte * ptr;
906e58ca 11979
e5a52504
MM		 11980 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
11981 BFD_ASSERT (sgot != NULL);
11982
b7693d02
DJ		 11983 /* Get the offset into the .got.plt table of the entry that
11984 corresponds to this function. */
11985 got_offset = eh->plt_got_offset;
11986
11987 /* Get the index in the procedure linkage table which
11988 corresponds to this symbol. This is the index of this symbol
11989 in all the symbols for which we are making plt entries. The
11990 first three entries in .got.plt are reserved; after that
11991 symbols appear in the same order as in .plt. */
11992 plt_index = (got_offset - 12) / 4;
e5a52504 11993
00a97672
RS		 11994 /* Calculate the address of the GOT entry. */
11995 got_address = (sgot->output_section->vma
11996 + sgot->output_offset
11997 + got_offset);
5e681ec4 11998
00a97672
RS		 11999 /* ...and the address of the PLT entry. */
12000 plt_address = (splt->output_section->vma
12001 + splt->output_offset
12002 + h->plt.offset);
5e681ec4 12003
52ab56c2 12004 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 12005 if (htab->vxworks_p && info->shared)
12006 {
12007 unsigned int i;
12008 bfd_vma val;
12009
52ab56c2 12010 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12011 {
12012 val = elf32_arm_vxworks_shared_plt_entry[i];
12013 if (i == 2)
12014 val |= got_address - sgot->output_section->vma;
12015 if (i == 5)
12016 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12017 if (i == 2 || i == 5)
12018 bfd_put_32 (output_bfd, val, ptr);
12019 else
12020 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12021 }
12022 }
12023 else if (htab->vxworks_p)
b7693d02 12024 {
00a97672
RS		 12025 unsigned int i;
12026 bfd_vma val;
12027
d3753b85 12028 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12029 {
12030 val = elf32_arm_vxworks_exec_plt_entry[i];
12031 if (i == 2)
12032 val |= got_address;
12033 if (i == 4)
12034 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12035 if (i == 5)
12036 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12037 if (i == 2 || i == 5)
12038 bfd_put_32 (output_bfd, val, ptr);
12039 else
12040 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12041 }
12042
12043 loc = (htab->srelplt2->contents
12044 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12045
12046 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12047 referencing the GOT for this PLT entry. */
12048 rel.r_offset = plt_address + 8;
12049 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12050 rel.r_addend = got_offset;
12051 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12052 loc += RELOC_SIZE (htab);
12053
12054 /* Create the R_ARM_ABS32 relocation referencing the
12055 beginning of the PLT for this GOT entry. */
12056 rel.r_offset = got_address;
12057 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12058 rel.r_addend = 0;
12059 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12060 }
00a97672
RS		 12061 else
12062 {
bd97cb95 12063 bfd_signed_vma thumb_refs;
00a97672
RS		 12064 /* Calculate the displacement between the PLT slot and the
12065 entry in the GOT. The eight-byte offset accounts for the
12066 value produced by adding to pc in the first instruction
12067 of the PLT stub. */
12068 got_displacement = got_address - (plt_address + 8);
b7693d02 12069
00a97672
RS		 12070 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12071
bd97cb95
DJ		 12072 thumb_refs = eh->plt_thumb_refcount;
12073 if (!htab->use_blx)
12074 thumb_refs += eh->plt_maybe_thumb_refcount;
12075
12076 if (thumb_refs > 0)
00a97672 12077 {
52ab56c2
PB		 12078 put_thumb_insn (htab, output_bfd,
12079 elf32_arm_plt_thumb_stub[0], ptr - 4);
12080 put_thumb_insn (htab, output_bfd,
12081 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12082 }
12083
52ab56c2
PB		 12084 put_arm_insn (htab, output_bfd,
12085 elf32_arm_plt_entry[0]
12086 | ((got_displacement & 0x0ff00000) >> 20),
12087 ptr + 0);
12088 put_arm_insn (htab, output_bfd,
12089 elf32_arm_plt_entry[1]
12090 | ((got_displacement & 0x000ff000) >> 12),
12091 ptr+ 4);
12092 put_arm_insn (htab, output_bfd,
12093 elf32_arm_plt_entry[2]
12094 | (got_displacement & 0x00000fff),
12095 ptr + 8);
5e681ec4 12096#ifdef FOUR_WORD_PLT
52ab56c2 12097 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12098#endif
00a97672 12099 }
252b5132 12100
e5a52504
MM		 12101 /* Fill in the entry in the global offset table. */
12102 bfd_put_32 (output_bfd,
12103 (splt->output_section->vma
12104 + splt->output_offset),
12105 sgot->contents + got_offset);
906e58ca 12106
00a97672
RS		 12107 /* Fill in the entry in the .rel(a).plt section. */
12108 rel.r_addend = 0;
12109 rel.r_offset = got_address;
e5a52504
MM		 12110 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12111 }
57e8b36a 12112
00a97672
RS		 12113 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12114 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12115
f5385ebf 12116 if (!h->def_regular)
252b5132
RH		 12117 {
12118 /* Mark the symbol as undefined, rather than as defined in
12119 the .plt section. Leave the value alone. */
12120 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12121 /* If the symbol is weak, we do need to clear the value.
12122 Otherwise, the PLT entry would provide a definition for
12123 the symbol even if the symbol wasn't defined anywhere,
12124 and so the symbol would never be NULL. */
f5385ebf 12125 if (!h->ref_regular_nonweak)
d982ba73 12126 sym->st_value = 0;
252b5132
RH		 12127 }
12128 }
12129
ba93b8ac
DJ		 12130 if (h->got.offset != (bfd_vma) -1
12131 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12132 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12133 {
12134 asection * sgot;
12135 asection * srel;
947216bf
AM		 12136 Elf_Internal_Rela rel;
12137 bfd_byte *loc;
00a97672 12138 bfd_vma offset;
252b5132
RH		 12139
12140 /* This symbol has an entry in the global offset table. Set it
12141 up. */
252b5132 12142 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12143 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12144 BFD_ASSERT (sgot != NULL && srel != NULL);
12145
00a97672
RS		 12146 offset = (h->got.offset & ~(bfd_vma) 1);
12147 rel.r_addend = 0;
252b5132
RH		 12148 rel.r_offset = (sgot->output_section->vma
12149 + sgot->output_offset
00a97672 12150 + offset);
252b5132 12151
5e681ec4
PB		 12152 /* If this is a static link, or it is a -Bsymbolic link and the
12153 symbol is defined locally or was forced to be local because
12154 of a version file, we just want to emit a RELATIVE reloc.
12155 The entry in the global offset table will already have been
12156 initialized in the relocate_section function. */
252b5132 12157 if (info->shared
5e681ec4
PB		 12158 && SYMBOL_REFERENCES_LOCAL (info, h))
12159 {
906e58ca 12160 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12161 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12162 if (!htab->use_rel)
12163 {
12164 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12165 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12166 }
5e681ec4 12167 }
252b5132
RH		 12168 else
12169 {
906e58ca 12170 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12171 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12172 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12173 }
12174
00a97672
RS		 12175 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12176 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12177 }
12178
f5385ebf 12179 if (h->needs_copy)
252b5132
RH		 12180 {
12181 asection * s;
947216bf
AM		 12182 Elf_Internal_Rela rel;
12183 bfd_byte *loc;
252b5132
RH		 12184
12185 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12186 BFD_ASSERT (h->dynindx != -1
12187 && (h->root.type == bfd_link_hash_defined
12188 || h->root.type == bfd_link_hash_defweak));
12189
12190 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12191 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12192 BFD_ASSERT (s != NULL);
12193
00a97672 12194 rel.r_addend = 0;
252b5132
RH		 12195 rel.r_offset = (h->root.u.def.value
12196 + h->root.u.def.section->output_section->vma
12197 + h->root.u.def.section->output_offset);
12198 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12199 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12200 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12201 }
12202
00a97672
RS		 12203 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12204 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12205 to the ".got" section. */
252b5132 12206 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12207 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12208 sym->st_shndx = SHN_ABS;
12209
b34976b6 12210 return TRUE;
252b5132
RH		 12211}
12212
12213/* Finish up the dynamic sections. */
12214
b34976b6 12215static bfd_boolean
57e8b36a 12216elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12217{
12218 bfd * dynobj;
12219 asection * sgot;
12220 asection * sdyn;
12221
12222 dynobj = elf_hash_table (info)->dynobj;
12223
12224 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 12225 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 12226 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12227
12228 if (elf_hash_table (info)->dynamic_sections_created)
12229 {
12230 asection *splt;
12231 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 12232 struct elf32_arm_link_hash_table *htab;
252b5132 12233
229fcec5 12234 htab = elf32_arm_hash_table (info);
252b5132 12235 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12236 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12237
12238 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12239 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12240
252b5132
RH		 12241 for (; dyncon < dynconend; dyncon++)
12242 {
12243 Elf_Internal_Dyn dyn;
12244 const char * name;
12245 asection * s;
12246
12247 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12248
12249 switch (dyn.d_tag)
12250 {
229fcec5
MM		 12251 unsigned int type;
12252
252b5132 12253 default:
7a2b07ff
NS		 12254 if (htab->vxworks_p
12255 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12256 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12257 break;
12258
229fcec5
MM		 12259 case DT_HASH:
12260 name = ".hash";
12261 goto get_vma_if_bpabi;
12262 case DT_STRTAB:
12263 name = ".dynstr";
12264 goto get_vma_if_bpabi;
12265 case DT_SYMTAB:
12266 name = ".dynsym";
12267 goto get_vma_if_bpabi;
c0042f5d
MM		 12268 case DT_VERSYM:
12269 name = ".gnu.version";
12270 goto get_vma_if_bpabi;
12271 case DT_VERDEF:
12272 name = ".gnu.version_d";
12273 goto get_vma_if_bpabi;
12274 case DT_VERNEED:
12275 name = ".gnu.version_r";
12276 goto get_vma_if_bpabi;
12277
252b5132
RH		 12278 case DT_PLTGOT:
12279 name = ".got";
12280 goto get_vma;
12281 case DT_JMPREL:
00a97672 12282 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12283 get_vma:
12284 s = bfd_get_section_by_name (output_bfd, name);
12285 BFD_ASSERT (s != NULL);
229fcec5
MM		 12286 if (!htab->symbian_p)
12287 dyn.d_un.d_ptr = s->vma;
12288 else
12289 /* In the BPABI, tags in the PT_DYNAMIC section point
12290 at the file offset, not the memory address, for the
12291 convenience of the post linker. */
12292 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12293 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12294 break;
12295
229fcec5
MM		 12296 get_vma_if_bpabi:
12297 if (htab->symbian_p)
12298 goto get_vma;
12299 break;
12300
252b5132 12301 case DT_PLTRELSZ:
00a97672
RS		 12302 s = bfd_get_section_by_name (output_bfd,
12303 RELOC_SECTION (htab, ".plt"));
252b5132 12304 BFD_ASSERT (s != NULL);
eea6121a 12305 dyn.d_un.d_val = s->size;
252b5132
RH		 12306 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12307 break;
906e58ca 12308
252b5132 12309 case DT_RELSZ:
00a97672 12310 case DT_RELASZ:
229fcec5
MM		 12311 if (!htab->symbian_p)
12312 {
12313 /* My reading of the SVR4 ABI indicates that the
12314 procedure linkage table relocs (DT_JMPREL) should be
12315 included in the overall relocs (DT_REL). This is
12316 what Solaris does. However, UnixWare can not handle
12317 that case. Therefore, we override the DT_RELSZ entry
12318 here to make it not include the JMPREL relocs. Since
00a97672 12319 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12320 other relocation sections, we don't have to worry
12321 about changing the DT_REL entry. */
00a97672
RS		 12322 s = bfd_get_section_by_name (output_bfd,
12323 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12324 if (s != NULL)
12325 dyn.d_un.d_val -= s->size;
12326 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12327 break;
12328 }
8029a119 12329 /* Fall through. */
229fcec5
MM		 12330
12331 case DT_REL:
12332 case DT_RELA:
229fcec5
MM		 12333 /* In the BPABI, the DT_REL tag must point at the file
12334 offset, not the VMA, of the first relocation
12335 section. So, we use code similar to that in
12336 elflink.c, but do not check for SHF_ALLOC on the
12337 relcoation section, since relocations sections are
12338 never allocated under the BPABI. The comments above
12339 about Unixware notwithstanding, we include all of the
12340 relocations here. */
12341 if (htab->symbian_p)
12342 {
12343 unsigned int i;
12344 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12345 ? SHT_REL : SHT_RELA);
12346 dyn.d_un.d_val = 0;
12347 for (i = 1; i < elf_numsections (output_bfd); i++)
12348 {
906e58ca 12349 Elf_Internal_Shdr *hdr
229fcec5
MM		 12350 = elf_elfsections (output_bfd)[i];
12351 if (hdr->sh_type == type)
12352 {
906e58ca 12353 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12354 || dyn.d_tag == DT_RELASZ)
12355 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12356 else if ((ufile_ptr) hdr->sh_offset
12357 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12358 dyn.d_un.d_val = hdr->sh_offset;
12359 }
12360 }
12361 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12362 }
252b5132 12363 break;
88f7bcd5
NC		 12364
12365 /* Set the bottom bit of DT_INIT/FINI if the
12366 corresponding function is Thumb. */
12367 case DT_INIT:
12368 name = info->init_function;
12369 goto get_sym;
12370 case DT_FINI:
12371 name = info->fini_function;
12372 get_sym:
12373 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12374 then there is nothing to adjust. */
88f7bcd5
NC		 12375 if (dyn.d_un.d_val != 0)
12376 {
12377 struct elf_link_hash_entry * eh;
12378
12379 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12380 FALSE, FALSE, TRUE);
906e58ca 12381 if (eh != NULL
88f7bcd5
NC		 12382 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12383 {
12384 dyn.d_un.d_val |= 1;
b34976b6 12385 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12386 }
12387 }
12388 break;
252b5132
RH		 12389 }
12390 }
12391
24a1ba0f 12392 /* Fill in the first entry in the procedure linkage table. */
e5a52504 12393 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 12394 {
00a97672
RS		 12395 const bfd_vma *plt0_entry;
12396 bfd_vma got_address, plt_address, got_displacement;
12397
12398 /* Calculate the addresses of the GOT and PLT. */
12399 got_address = sgot->output_section->vma + sgot->output_offset;
12400 plt_address = splt->output_section->vma + splt->output_offset;
12401
12402 if (htab->vxworks_p)
12403 {
12404 /* The VxWorks GOT is relocated by the dynamic linker.
12405 Therefore, we must emit relocations rather than simply
12406 computing the values now. */
12407 Elf_Internal_Rela rel;
12408
12409 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12410 put_arm_insn (htab, output_bfd, plt0_entry[0],
12411 splt->contents + 0);
12412 put_arm_insn (htab, output_bfd, plt0_entry[1],
12413 splt->contents + 4);
12414 put_arm_insn (htab, output_bfd, plt0_entry[2],
12415 splt->contents + 8);
00a97672
RS		 12416 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12417
8029a119 12418 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12419 rel.r_offset = plt_address + 12;
12420 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12421 rel.r_addend = 0;
12422 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12423 htab->srelplt2->contents);
12424 }
12425 else
12426 {
12427 got_displacement = got_address - (plt_address + 16);
12428
12429 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12430 put_arm_insn (htab, output_bfd, plt0_entry[0],
12431 splt->contents + 0);
12432 put_arm_insn (htab, output_bfd, plt0_entry[1],
12433 splt->contents + 4);
12434 put_arm_insn (htab, output_bfd, plt0_entry[2],
12435 splt->contents + 8);
12436 put_arm_insn (htab, output_bfd, plt0_entry[3],
12437 splt->contents + 12);
5e681ec4 12438
5e681ec4 12439#ifdef FOUR_WORD_PLT
00a97672
RS		 12440 /* The displacement value goes in the otherwise-unused
12441 last word of the second entry. */
12442 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12443#else
00a97672 12444 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12445#endif
00a97672 12446 }
f7a74f8c 12447 }
252b5132
RH		 12448
12449 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12450 really seem like the right value. */
74541ad4
AM		 12451 if (splt->output_section->owner == output_bfd)
12452 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12453
12454 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12455 {
12456 /* Correct the .rel(a).plt.unloaded relocations. They will have
12457 incorrect symbol indexes. */
12458 int num_plts;
eed62c48 12459 unsigned char *p;
00a97672
RS		 12460
12461 num_plts = ((htab->splt->size - htab->plt_header_size)
12462 / htab->plt_entry_size);
12463 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12464
12465 for (; num_plts; num_plts--)
12466 {
12467 Elf_Internal_Rela rel;
12468
12469 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12470 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12471 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12472 p += RELOC_SIZE (htab);
12473
12474 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12475 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12476 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12477 p += RELOC_SIZE (htab);
12478 }
12479 }
252b5132
RH		 12480 }
12481
12482 /* Fill in the first three entries in the global offset table. */
229fcec5 12483 if (sgot)
252b5132 12484 {
229fcec5
MM		 12485 if (sgot->size > 0)
12486 {
12487 if (sdyn == NULL)
12488 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12489 else
12490 bfd_put_32 (output_bfd,
12491 sdyn->output_section->vma + sdyn->output_offset,
12492 sgot->contents);
12493 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12494 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12495 }
252b5132 12496
229fcec5
MM		 12497 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12498 }
252b5132 12499
b34976b6 12500 return TRUE;
252b5132
RH		 12501}
12502
ba96a88f 12503static void
57e8b36a 12504elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12505{
9b485d32 12506 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12507 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12508
12509 i_ehdrp = elf_elfheader (abfd);
12510
94a3258f
PB		 12511 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12512 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12513 else
12514 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12515 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12516
93204d3a
PB		 12517 if (link_info)
12518 {
12519 globals = elf32_arm_hash_table (link_info);
12520 if (globals->byteswap_code)
12521 i_ehdrp->e_flags |= EF_ARM_BE8;
12522 }
ba96a88f
NC		 12523}
12524
99e4ae17 12525static enum elf_reloc_type_class
57e8b36a 12526elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12527{
f51e552e 12528 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12529 {
12530 case R_ARM_RELATIVE:
12531 return reloc_class_relative;
12532 case R_ARM_JUMP_SLOT:
12533 return reloc_class_plt;
12534 case R_ARM_COPY:
12535 return reloc_class_copy;
12536 default:
12537 return reloc_class_normal;
12538 }
12539}
12540
e16bb312
NC		 12541/* Set the right machine number for an Arm ELF file. */
12542
12543static bfd_boolean
57e8b36a 12544elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12545{
12546 if (hdr->sh_type == SHT_NOTE)
12547 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12548
12549 return TRUE;
12550}
12551
e489d0ae 12552static void
57e8b36a 12553elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12554{
5a6c6817 12555 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12556}
12557
40a18ebd
NC		 12558/* Return TRUE if this is an unwinding table entry. */
12559
12560static bfd_boolean
12561is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12562{
0112cd26
NC		 12563 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12564 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12565}
12566
12567
12568/* Set the type and flags for an ARM section. We do this by
12569 the section name, which is a hack, but ought to work. */
12570
12571static bfd_boolean
12572elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12573{
12574 const char * name;
12575
12576 name = bfd_get_section_name (abfd, sec);
12577
12578 if (is_arm_elf_unwind_section_name (abfd, name))
12579 {
12580 hdr->sh_type = SHT_ARM_EXIDX;
12581 hdr->sh_flags |= SHF_LINK_ORDER;
12582 }
12583 return TRUE;
12584}
12585
6dc132d9
L		 12586/* Handle an ARM specific section when reading an object file. This is
12587 called when bfd_section_from_shdr finds a section with an unknown
12588 type. */
40a18ebd
NC		 12589
12590static bfd_boolean
12591elf32_arm_section_from_shdr (bfd *abfd,
12592 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12593 const char *name,
12594 int shindex)
40a18ebd
NC		 12595{
12596 /* There ought to be a place to keep ELF backend specific flags, but
12597 at the moment there isn't one. We just keep track of the
12598 sections by their name, instead. Fortunately, the ABI gives
12599 names for all the ARM specific sections, so we will probably get
12600 away with this. */
12601 switch (hdr->sh_type)
12602 {
12603 case SHT_ARM_EXIDX:
0951f019
RE		 12604 case SHT_ARM_PREEMPTMAP:
12605 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12606 break;
12607
12608 default:
12609 return FALSE;
12610 }
12611
6dc132d9 12612 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12613 return FALSE;
12614
12615 return TRUE;
12616}
e489d0ae 12617
8e3de13a
NC		 12618/* A structure used to record a list of sections, independently
12619 of the next and prev fields in the asection structure. */
12620typedef struct section_list
12621{
12622 asection * sec;
12623 struct section_list * next;
12624 struct section_list * prev;
12625}
12626section_list;
12627
12628/* Unfortunately we need to keep a list of sections for which
12629 an _arm_elf_section_data structure has been allocated. This
12630 is because it is possible for functions like elf32_arm_write_section
12631 to be called on a section which has had an elf_data_structure
12632 allocated for it (and so the used_by_bfd field is valid) but
12633 for which the ARM extended version of this structure - the
12634 _arm_elf_section_data structure - has not been allocated. */
12635static section_list * sections_with_arm_elf_section_data = NULL;
12636
12637static void
957c6e41 12638record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 12639{
12640 struct section_list * entry;
12641
957c6e41 12642 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 12643 if (entry == NULL)
12644 return;
12645 entry->sec = sec;
12646 entry->next = sections_with_arm_elf_section_data;
12647 entry->prev = NULL;
12648 if (entry->next != NULL)
12649 entry->next->prev = entry;
12650 sections_with_arm_elf_section_data = entry;
12651}
12652
44444f50
NC		 12653static struct section_list *
12654find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 12655{
12656 struct section_list * entry;
bd4aae00 12657 static struct section_list * last_entry = NULL;
8e3de13a 12658
bd4aae00
NC		 12659 /* This is a short cut for the typical case where the sections are added
12660 to the sections_with_arm_elf_section_data list in forward order and
12661 then looked up here in backwards order. This makes a real difference
12662 to the ld-srec/sec64k.exp linker test. */
44444f50 12663 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 12664 if (last_entry != NULL)
12665 {
12666 if (last_entry->sec == sec)
44444f50
NC		 12667 entry = last_entry;
12668 else if (last_entry->next != NULL
12669 && last_entry->next->sec == sec)
12670 entry = last_entry->next;
bd4aae00 12671 }
44444f50
NC		 12672
12673 for (; entry; entry = entry->next)
8e3de13a 12674 if (entry->sec == sec)
44444f50 12675 break;
bd4aae00 12676
44444f50
NC		 12677 if (entry)
12678 /* Record the entry prior to this one - it is the entry we are most
12679 likely to want to locate next time. Also this way if we have been
12680 called from unrecord_section_with_arm_elf_section_data() we will not
12681 be caching a pointer that is about to be freed. */
12682 last_entry = entry->prev;
12683
12684 return entry;
12685}
12686
12687static _arm_elf_section_data *
12688get_arm_elf_section_data (asection * sec)
12689{
12690 struct section_list * entry;
12691
12692 entry = find_arm_elf_section_entry (sec);
12693
12694 if (entry)
12695 return elf32_arm_section_data (entry->sec);
12696 else
12697 return NULL;
8e3de13a
NC		 12698}
12699
12700static void
12701unrecord_section_with_arm_elf_section_data (asection * sec)
12702{
12703 struct section_list * entry;
12704
44444f50
NC		 12705 entry = find_arm_elf_section_entry (sec);
12706
12707 if (entry)
12708 {
12709 if (entry->prev != NULL)
12710 entry->prev->next = entry->next;
12711 if (entry->next != NULL)
12712 entry->next->prev = entry->prev;
12713 if (entry == sections_with_arm_elf_section_data)
12714 sections_with_arm_elf_section_data = entry->next;
12715 free (entry);
12716 }
8e3de13a
NC		 12717}
12718
e489d0ae 12719
4e617b1e
PB		 12720typedef struct
12721{
12722 void *finfo;
12723 struct bfd_link_info *info;
91a5743d
PB		 12724 asection *sec;
12725 int sec_shndx;
6e0b88f1
AM		 12726 int (*func) (void *, const char *, Elf_Internal_Sym *,
12727 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12728} output_arch_syminfo;
12729
12730enum map_symbol_type
12731{
12732 ARM_MAP_ARM,
12733 ARM_MAP_THUMB,
12734 ARM_MAP_DATA
12735};
12736
12737
7413f23f 12738/* Output a single mapping symbol. */
4e617b1e
PB		 12739
12740static bfd_boolean
7413f23f
DJ		 12741elf32_arm_output_map_sym (output_arch_syminfo *osi,
12742 enum map_symbol_type type,
12743 bfd_vma offset)
4e617b1e
PB		 12744{
12745 static const char *names[3] = {"$a", "$t", "$d"};
12746 struct elf32_arm_link_hash_table *htab;
12747 Elf_Internal_Sym sym;
12748
12749 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 12750 sym.st_value = osi->sec->output_section->vma
12751 + osi->sec->output_offset
12752 + offset;
4e617b1e
PB		 12753 sym.st_size = 0;
12754 sym.st_other = 0;
12755 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12756 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12757 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12758}
12759
12760
12761/* Output mapping symbols for PLT entries associated with H. */
12762
12763static bfd_boolean
12764elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12765{
12766 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12767 struct elf32_arm_link_hash_table *htab;
12768 struct elf32_arm_link_hash_entry *eh;
12769 bfd_vma addr;
12770
12771 htab = elf32_arm_hash_table (osi->info);
12772
12773 if (h->root.type == bfd_link_hash_indirect)
12774 return TRUE;
12775
12776 if (h->root.type == bfd_link_hash_warning)
12777 /* When warning symbols are created, they **replace** the "real"
12778 entry in the hash table, thus we never get to see the real
12779 symbol in a hash traversal. So look at it now. */
12780 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12781
12782 if (h->plt.offset == (bfd_vma) -1)
12783 return TRUE;
12784
12785 eh = (struct elf32_arm_link_hash_entry *) h;
12786 addr = h->plt.offset;
12787 if (htab->symbian_p)
12788 {
7413f23f 12789 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12790 return FALSE;
7413f23f 12791 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12792 return FALSE;
12793 }
12794 else if (htab->vxworks_p)
12795 {
7413f23f 12796 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12797 return FALSE;
7413f23f 12798 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12799 return FALSE;
7413f23f 12800 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12801 return FALSE;
7413f23f 12802 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12803 return FALSE;
12804 }
12805 else
12806 {
bd97cb95
DJ		 12807 bfd_signed_vma thumb_refs;
12808
12809 thumb_refs = eh->plt_thumb_refcount;
12810 if (!htab->use_blx)
12811 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12812
bd97cb95 12813 if (thumb_refs > 0)
4e617b1e 12814 {
7413f23f 12815 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12816 return FALSE;
12817 }
12818#ifdef FOUR_WORD_PLT
7413f23f 12819 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12820 return FALSE;
7413f23f 12821 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12822 return FALSE;
12823#else
906e58ca 12824 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12825 so only need to output a mapping symbol for the first PLT entry and
12826 entries with thumb thunks. */
bd97cb95 12827 if (thumb_refs > 0 || addr == 20)
4e617b1e 12828 {
7413f23f 12829 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12830 return FALSE;
12831 }
12832#endif
12833 }
12834
12835 return TRUE;
12836}
12837
7413f23f
DJ		 12838/* Output a single local symbol for a generated stub. */
12839
12840static bfd_boolean
12841elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12842 bfd_vma offset, bfd_vma size)
12843{
12844 struct elf32_arm_link_hash_table *htab;
12845 Elf_Internal_Sym sym;
12846
12847 htab = elf32_arm_hash_table (osi->info);
12848 sym.st_value = osi->sec->output_section->vma
12849 + osi->sec->output_offset
12850 + offset;
12851 sym.st_size = size;
12852 sym.st_other = 0;
12853 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12854 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12855 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12856}
4e617b1e 12857
da5938a2 12858static bfd_boolean
8029a119
NC		 12859arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12860 void * in_arg)
da5938a2
NC		 12861{
12862 struct elf32_arm_stub_hash_entry *stub_entry;
12863 struct bfd_link_info *info;
12864 struct elf32_arm_link_hash_table *htab;
12865 asection *stub_sec;
12866 bfd_vma addr;
7413f23f 12867 char *stub_name;
9a008db3 12868 output_arch_syminfo *osi;
461a49ca
DJ		 12869 const insn_sequence *template;
12870 enum stub_insn_type prev_type;
12871 int size;
12872 int i;
12873 enum map_symbol_type sym_type;
da5938a2
NC		 12874
12875 /* Massage our args to the form they really have. */
12876 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12877 osi = (output_arch_syminfo *) in_arg;
da5938a2 12878
da5938a2
NC		 12879 info = osi->info;
12880
12881 htab = elf32_arm_hash_table (info);
12882 stub_sec = stub_entry->stub_sec;
12883
12884 /* Ensure this stub is attached to the current section being
7413f23f 12885 processed. */
da5938a2
NC		 12886 if (stub_sec != osi->sec)
12887 return TRUE;
12888
7413f23f
DJ		 12889 addr = (bfd_vma) stub_entry->stub_offset;
12890 stub_name = stub_entry->output_name;
da5938a2 12891
461a49ca 12892 template = stub_entry->stub_template;
4e31c731 12893 switch (template[0].type)
7413f23f 12894 {
461a49ca
DJ		 12895 case ARM_TYPE:
12896 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 12897 return FALSE;
12898 break;
461a49ca 12899 case THUMB16_TYPE:
48229727 12900 case THUMB32_TYPE:
461a49ca
DJ		 12901 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
12902 stub_entry->stub_size))
da5938a2
NC		 12903 return FALSE;
12904 break;
12905 default:
12906 BFD_FAIL ();
48229727 12907 return 0;
7413f23f 12908 }
da5938a2 12909
461a49ca
DJ		 12910 prev_type = DATA_TYPE;
12911 size = 0;
12912 for (i = 0; i < stub_entry->stub_template_size; i++)
12913 {
4e31c731 12914 switch (template[i].type)
461a49ca
DJ		 12915 {
12916 case ARM_TYPE:
12917 sym_type = ARM_MAP_ARM;
12918 break;
12919
12920 case THUMB16_TYPE:
48229727 12921 case THUMB32_TYPE:
461a49ca
DJ		 12922 sym_type = ARM_MAP_THUMB;
12923 break;
12924
12925 case DATA_TYPE:
12926 sym_type = ARM_MAP_DATA;
12927 break;
12928
12929 default:
12930 BFD_FAIL ();
4e31c731 12931 return FALSE;
461a49ca
DJ		 12932 }
12933
12934 if (template[i].type != prev_type)
12935 {
12936 prev_type = template[i].type;
12937 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
12938 return FALSE;
12939 }
12940
4e31c731 12941 switch (template[i].type)
461a49ca
DJ		 12942 {
12943 case ARM_TYPE:
48229727 12944 case THUMB32_TYPE:
461a49ca
DJ		 12945 size += 4;
12946 break;
12947
12948 case THUMB16_TYPE:
12949 size += 2;
12950 break;
12951
12952 case DATA_TYPE:
12953 size += 4;
12954 break;
12955
12956 default:
12957 BFD_FAIL ();
4e31c731 12958 return FALSE;
461a49ca
DJ		 12959 }
12960 }
12961
da5938a2
NC		 12962 return TRUE;
12963}
12964
91a5743d 12965/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 12966
12967static bfd_boolean
12968elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 12969 struct bfd_link_info *info,
12970 void *finfo,
6e0b88f1
AM		 12971 int (*func) (void *, const char *,
12972 Elf_Internal_Sym *,
12973 asection *,
12974 struct elf_link_hash_entry *))
4e617b1e
PB		 12975{
12976 output_arch_syminfo osi;
12977 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 12978 bfd_vma offset;
12979 bfd_size_type size;
4e617b1e
PB		 12980
12981 htab = elf32_arm_hash_table (info);
906e58ca 12982 check_use_blx (htab);
91a5743d 12983
4e617b1e
PB		 12984 osi.finfo = finfo;
12985 osi.info = info;
12986 osi.func = func;
906e58ca 12987
91a5743d
PB		 12988 /* ARM->Thumb glue. */
12989 if (htab->arm_glue_size > 0)
12990 {
12991 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12992 ARM2THUMB_GLUE_SECTION_NAME);
12993
12994 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12995 (output_bfd, osi.sec->output_section);
12996 if (info->shared || htab->root.is_relocatable_executable
12997 || htab->pic_veneer)
12998 size = ARM2THUMB_PIC_GLUE_SIZE;
12999 else if (htab->use_blx)
13000 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13001 else
13002 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13003
91a5743d
PB		 13004 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13005 {
7413f23f
DJ		 13006 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13007 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13008 }
13009 }
13010
13011 /* Thumb->ARM glue. */
13012 if (htab->thumb_glue_size > 0)
13013 {
13014 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13015 THUMB2ARM_GLUE_SECTION_NAME);
13016
13017 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13018 (output_bfd, osi.sec->output_section);
13019 size = THUMB2ARM_GLUE_SIZE;
13020
13021 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13022 {
7413f23f
DJ		 13023 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13024 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13025 }
13026 }
13027
845b51d6
PB		 13028 /* ARMv4 BX veneers. */
13029 if (htab->bx_glue_size > 0)
13030 {
13031 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13032 ARM_BX_GLUE_SECTION_NAME);
13033
13034 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13035 (output_bfd, osi.sec->output_section);
13036
7413f23f 13037 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13038 }
13039
8029a119
NC		 13040 /* Long calls stubs. */
13041 if (htab->stub_bfd && htab->stub_bfd->sections)
13042 {
da5938a2 13043 asection* stub_sec;
8029a119 13044
da5938a2
NC		 13045 for (stub_sec = htab->stub_bfd->sections;
13046 stub_sec != NULL;
8029a119
NC		 13047 stub_sec = stub_sec->next)
13048 {
13049 /* Ignore non-stub sections. */
13050 if (!strstr (stub_sec->name, STUB_SUFFIX))
13051 continue;
da5938a2 13052
8029a119 13053 osi.sec = stub_sec;
da5938a2 13054
8029a119
NC		 13055 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13056 (output_bfd, osi.sec->output_section);
da5938a2 13057
8029a119
NC		 13058 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13059 }
13060 }
da5938a2 13061
91a5743d
PB		 13062 /* Finally, output mapping symbols for the PLT. */
13063 if (!htab->splt || htab->splt->size == 0)
13064 return TRUE;
13065
13066 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13067 htab->splt->output_section);
91a5743d 13068 osi.sec = htab->splt;
4e617b1e
PB		 13069 /* Output mapping symbols for the plt header. SymbianOS does not have a
13070 plt header. */
13071 if (htab->vxworks_p)
13072 {
13073 /* VxWorks shared libraries have no PLT header. */
13074 if (!info->shared)
13075 {
7413f23f 13076 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13077 return FALSE;
7413f23f 13078 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13079 return FALSE;
13080 }
13081 }
13082 else if (!htab->symbian_p)
13083 {
7413f23f 13084 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13085 return FALSE;
13086#ifndef FOUR_WORD_PLT
7413f23f 13087 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13088 return FALSE;
13089#endif
13090 }
13091
13092 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13093 return TRUE;
13094}
13095
e489d0ae
PB		 13096/* Allocate target specific section data. */
13097
13098static bfd_boolean
13099elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13100{
f592407e
AM		 13101 if (!sec->used_by_bfd)
13102 {
13103 _arm_elf_section_data *sdata;
13104 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13105
f592407e
AM		 13106 sdata = bfd_zalloc (abfd, amt);
13107 if (sdata == NULL)
13108 return FALSE;
13109 sec->used_by_bfd = sdata;
13110 }
e489d0ae 13111
957c6e41 13112 record_section_with_arm_elf_section_data (sec);
8e3de13a 13113
e489d0ae
PB		 13114 return _bfd_elf_new_section_hook (abfd, sec);
13115}
13116
13117
13118/* Used to order a list of mapping symbols by address. */
13119
13120static int
13121elf32_arm_compare_mapping (const void * a, const void * b)
13122{
7f6a71ff
JM		 13123 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13124 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13125
13126 if (amap->vma > bmap->vma)
13127 return 1;
13128 else if (amap->vma < bmap->vma)
13129 return -1;
13130 else if (amap->type > bmap->type)
13131 /* Ensure results do not depend on the host qsort for objects with
13132 multiple mapping symbols at the same address by sorting on type
13133 after vma. */
13134 return 1;
13135 else if (amap->type < bmap->type)
13136 return -1;
13137 else
13138 return 0;
e489d0ae
PB		 13139}
13140
2468f9c9
PB		 13141/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13142
13143static unsigned long
13144offset_prel31 (unsigned long addr, bfd_vma offset)
13145{
13146 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13147}
13148
13149/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13150 relocations. */
13151
13152static void
13153copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13154{
13155 unsigned long first_word = bfd_get_32 (output_bfd, from);
13156 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13157
13158 /* High bit of first word is supposed to be zero. */
13159 if ((first_word & 0x80000000ul) == 0)
13160 first_word = offset_prel31 (first_word, offset);
13161
13162 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13163 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13164 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13165 second_word = offset_prel31 (second_word, offset);
13166
13167 bfd_put_32 (output_bfd, first_word, to);
13168 bfd_put_32 (output_bfd, second_word, to + 4);
13169}
e489d0ae 13170
48229727
JB		 13171/* Data for make_branch_to_a8_stub(). */
13172
13173struct a8_branch_to_stub_data {
13174 asection *writing_section;
13175 bfd_byte *contents;
13176};
13177
13178
13179/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13180 places for a particular section. */
13181
13182static bfd_boolean
13183make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13184 void *in_arg)
13185{
13186 struct elf32_arm_stub_hash_entry *stub_entry;
13187 struct a8_branch_to_stub_data *data;
13188 bfd_byte *contents;
13189 unsigned long branch_insn;
13190 bfd_vma veneered_insn_loc, veneer_entry_loc;
13191 bfd_signed_vma branch_offset;
13192 bfd *abfd;
13193 unsigned int index;
13194
13195 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13196 data = (struct a8_branch_to_stub_data *) in_arg;
13197
13198 if (stub_entry->target_section != data->writing_section
13199 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13200 return TRUE;
13201
13202 contents = data->contents;
13203
13204 veneered_insn_loc = stub_entry->target_section->output_section->vma
13205 + stub_entry->target_section->output_offset
13206 + stub_entry->target_value;
13207
13208 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13209 + stub_entry->stub_sec->output_offset
13210 + stub_entry->stub_offset;
13211
13212 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13213 veneered_insn_loc &= ~3u;
13214
13215 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13216
13217 abfd = stub_entry->target_section->owner;
13218 index = stub_entry->target_value;
13219
13220 /* We attempt to avoid this condition by setting stubs_always_after_branch
13221 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13222 This check is just to be on the safe side... */
13223 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13224 {
13225 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13226 "allocated in unsafe location"), abfd);
13227 return FALSE;
13228 }
13229
13230 switch (stub_entry->stub_type)
13231 {
13232 case arm_stub_a8_veneer_b:
13233 case arm_stub_a8_veneer_b_cond:
13234 branch_insn = 0xf0009000;
13235 goto jump24;
13236
13237 case arm_stub_a8_veneer_blx:
13238 branch_insn = 0xf000e800;
13239 goto jump24;
13240
13241 case arm_stub_a8_veneer_bl:
13242 {
13243 unsigned int i1, j1, i2, j2, s;
13244
13245 branch_insn = 0xf000d000;
13246
13247 jump24:
13248 if (branch_offset < -16777216 || branch_offset > 16777214)
13249 {
13250 /* There's not much we can do apart from complain if this
13251 happens. */
13252 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13253 "of range (input file too large)"), abfd);
13254 return FALSE;
13255 }
13256
13257 /* i1 = not(j1 eor s), so:
13258 not i1 = j1 eor s
13259 j1 = (not i1) eor s. */
13260
13261 branch_insn |= (branch_offset >> 1) & 0x7ff;
13262 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13263 i2 = (branch_offset >> 22) & 1;
13264 i1 = (branch_offset >> 23) & 1;
13265 s = (branch_offset >> 24) & 1;
13266 j1 = (!i1) ^ s;
13267 j2 = (!i2) ^ s;
13268 branch_insn |= j2 << 11;
13269 branch_insn |= j1 << 13;
13270 branch_insn |= s << 26;
13271 }
13272 break;
13273
13274 default:
13275 BFD_FAIL ();
13276 return FALSE;
13277 }
13278
13279 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[index]);
13280 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[index + 2]);
13281
13282 return TRUE;
13283}
13284
e489d0ae
PB		 13285/* Do code byteswapping. Return FALSE afterwards so that the section is
13286 written out as normal. */
13287
13288static bfd_boolean
c7b8f16e 13289elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13290 struct bfd_link_info *link_info,
13291 asection *sec,
e489d0ae
PB		 13292 bfd_byte *contents)
13293{
48229727 13294 unsigned int mapcount, errcount;
8e3de13a 13295 _arm_elf_section_data *arm_data;
c7b8f16e 13296 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13297 elf32_arm_section_map *map;
c7b8f16e 13298 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13299 bfd_vma ptr;
13300 bfd_vma end;
c7b8f16e 13301 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13302 bfd_byte tmp;
48229727 13303 unsigned int i;
57e8b36a 13304
8e3de13a
NC		 13305 /* If this section has not been allocated an _arm_elf_section_data
13306 structure then we cannot record anything. */
13307 arm_data = get_arm_elf_section_data (sec);
13308 if (arm_data == NULL)
13309 return FALSE;
13310
13311 mapcount = arm_data->mapcount;
13312 map = arm_data->map;
c7b8f16e
JB		 13313 errcount = arm_data->erratumcount;
13314
13315 if (errcount != 0)
13316 {
13317 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13318
13319 for (errnode = arm_data->erratumlist; errnode != 0;
13320 errnode = errnode->next)
13321 {
13322 bfd_vma index = errnode->vma - offset;
13323
13324 switch (errnode->type)
13325 {
13326 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13327 {
13328 bfd_vma branch_to_veneer;
13329 /* Original condition code of instruction, plus bit mask for
13330 ARM B instruction. */
13331 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13332 | 0x0a000000;
13333
13334 /* The instruction is before the label. */
13335 index -= 4;
13336
13337 /* Above offset included in -4 below. */
13338 branch_to_veneer = errnode->u.b.veneer->vma
13339 - errnode->vma - 4;
13340
13341 if ((signed) branch_to_veneer < -(1 << 25)
13342 || (signed) branch_to_veneer >= (1 << 25))
13343 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13344 "range"), output_bfd);
13345
13346 insn |= (branch_to_veneer >> 2) & 0xffffff;
13347 contents[endianflip ^ index] = insn & 0xff;
13348 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13349 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13350 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13351 }
13352 break;
13353
13354 case VFP11_ERRATUM_ARM_VENEER:
13355 {
13356 bfd_vma branch_from_veneer;
13357 unsigned int insn;
13358
13359 /* Take size of veneer into account. */
13360 branch_from_veneer = errnode->u.v.branch->vma
13361 - errnode->vma - 12;
13362
13363 if ((signed) branch_from_veneer < -(1 << 25)
13364 || (signed) branch_from_veneer >= (1 << 25))
13365 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13366 "range"), output_bfd);
13367
13368 /* Original instruction. */
13369 insn = errnode->u.v.branch->u.b.vfp_insn;
13370 contents[endianflip ^ index] = insn & 0xff;
13371 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13372 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13373 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13374
13375 /* Branch back to insn after original insn. */
13376 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
13377 contents[endianflip ^ (index + 4)] = insn & 0xff;
13378 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
13379 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
13380 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
13381 }
13382 break;
13383
13384 default:
13385 abort ();
13386 }
13387 }
13388 }
e489d0ae 13389
2468f9c9
PB		 13390 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13391 {
13392 arm_unwind_table_edit *edit_node
13393 = arm_data->u.exidx.unwind_edit_list;
13394 /* Now, sec->size is the size of the section we will write. The original
13395 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13396 markers) was sec->rawsize. (This isn't the case if we perform no
13397 edits, then rawsize will be zero and we should use size). */
13398 bfd_byte *edited_contents = bfd_malloc (sec->size);
13399 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13400 unsigned int in_index, out_index;
13401 bfd_vma add_to_offsets = 0;
13402
13403 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13404 {
13405 if (edit_node)
13406 {
13407 unsigned int edit_index = edit_node->index;
13408
13409 if (in_index < edit_index && in_index * 8 < input_size)
13410 {
13411 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13412 contents + in_index * 8, add_to_offsets);
13413 out_index++;
13414 in_index++;
13415 }
13416 else if (in_index == edit_index
13417 || (in_index * 8 >= input_size
13418 && edit_index == UINT_MAX))
13419 {
13420 switch (edit_node->type)
13421 {
13422 case DELETE_EXIDX_ENTRY:
13423 in_index++;
13424 add_to_offsets += 8;
13425 break;
13426
13427 case INSERT_EXIDX_CANTUNWIND_AT_END:
13428 {
13429 asection *text_sec = edit_node->linked_section;
13430 bfd_vma text_offset = text_sec->output_section->vma
13431 + text_sec->output_offset
13432 + text_sec->size;
13433 bfd_vma exidx_offset = offset + out_index * 8;
13434 unsigned long prel31_offset;
13435
13436 /* Note: this is meant to be equivalent to an
13437 R_ARM_PREL31 relocation. These synthetic
13438 EXIDX_CANTUNWIND markers are not relocated by the
13439 usual BFD method. */
13440 prel31_offset = (text_offset - exidx_offset)
13441 & 0x7ffffffful;
13442
13443 /* First address we can't unwind. */
13444 bfd_put_32 (output_bfd, prel31_offset,
13445 &edited_contents[out_index * 8]);
13446
13447 /* Code for EXIDX_CANTUNWIND. */
13448 bfd_put_32 (output_bfd, 0x1,
13449 &edited_contents[out_index * 8 + 4]);
13450
13451 out_index++;
13452 add_to_offsets -= 8;
13453 }
13454 break;
13455 }
13456
13457 edit_node = edit_node->next;
13458 }
13459 }
13460 else
13461 {
13462 /* No more edits, copy remaining entries verbatim. */
13463 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13464 contents + in_index * 8, add_to_offsets);
13465 out_index++;
13466 in_index++;
13467 }
13468 }
13469
13470 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13471 bfd_set_section_contents (output_bfd, sec->output_section,
13472 edited_contents,
13473 (file_ptr) sec->output_offset, sec->size);
13474
13475 return TRUE;
13476 }
13477
48229727
JB		 13478 /* Fix code to point to Cortex-A8 erratum stubs. */
13479 if (globals->fix_cortex_a8)
13480 {
13481 struct a8_branch_to_stub_data data;
13482
13483 data.writing_section = sec;
13484 data.contents = contents;
13485
13486 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13487 &data);
13488 }
13489
e489d0ae
PB		 13490 if (mapcount == 0)
13491 return FALSE;
13492
c7b8f16e 13493 if (globals->byteswap_code)
e489d0ae 13494 {
c7b8f16e 13495 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13496
c7b8f16e
JB		 13497 ptr = map[0].vma;
13498 for (i = 0; i < mapcount; i++)
13499 {
13500 if (i == mapcount - 1)
13501 end = sec->size;
13502 else
13503 end = map[i + 1].vma;
e489d0ae 13504
c7b8f16e 13505 switch (map[i].type)
e489d0ae 13506 {
c7b8f16e
JB		 13507 case 'a':
13508 /* Byte swap code words. */
13509 while (ptr + 3 < end)
13510 {
13511 tmp = contents[ptr];
13512 contents[ptr] = contents[ptr + 3];
13513 contents[ptr + 3] = tmp;
13514 tmp = contents[ptr + 1];
13515 contents[ptr + 1] = contents[ptr + 2];
13516 contents[ptr + 2] = tmp;
13517 ptr += 4;
13518 }
13519 break;
e489d0ae 13520
c7b8f16e
JB		 13521 case 't':
13522 /* Byte swap code halfwords. */
13523 while (ptr + 1 < end)
13524 {
13525 tmp = contents[ptr];
13526 contents[ptr] = contents[ptr + 1];
13527 contents[ptr + 1] = tmp;
13528 ptr += 2;
13529 }
13530 break;
13531
13532 case 'd':
13533 /* Leave data alone. */
13534 break;
13535 }
13536 ptr = end;
13537 }
e489d0ae 13538 }
8e3de13a 13539
93204d3a 13540 free (map);
8e3de13a 13541 arm_data->mapcount = 0;
c7b8f16e 13542 arm_data->mapsize = 0;
8e3de13a
NC		 13543 arm_data->map = NULL;
13544 unrecord_section_with_arm_elf_section_data (sec);
13545
e489d0ae
PB		 13546 return FALSE;
13547}
13548
957c6e41
NC		 13549static void
13550unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
13551 asection * sec,
13552 void * ignore ATTRIBUTE_UNUSED)
13553{
13554 unrecord_section_with_arm_elf_section_data (sec);
13555}
13556
13557static bfd_boolean
13558elf32_arm_close_and_cleanup (bfd * abfd)
13559{
b25e3d87
L		 13560 if (abfd->sections)
13561 bfd_map_over_sections (abfd,
13562 unrecord_section_via_map_over_sections,
13563 NULL);
957c6e41
NC		 13564
13565 return _bfd_elf_close_and_cleanup (abfd);
13566}
13567
b25e3d87
L		 13568static bfd_boolean
13569elf32_arm_bfd_free_cached_info (bfd * abfd)
13570{
13571 if (abfd->sections)
13572 bfd_map_over_sections (abfd,
13573 unrecord_section_via_map_over_sections,
13574 NULL);
13575
13576 return _bfd_free_cached_info (abfd);
13577}
13578
b7693d02
DJ		 13579/* Display STT_ARM_TFUNC symbols as functions. */
13580
13581static void
13582elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13583 asymbol *asym)
13584{
13585 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13586
13587 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13588 elfsym->symbol.flags |= BSF_FUNCTION;
13589}
13590
0beaef2b
PB		 13591
13592/* Mangle thumb function symbols as we read them in. */
13593
8384fb8f 13594static bfd_boolean
0beaef2b
PB		 13595elf32_arm_swap_symbol_in (bfd * abfd,
13596 const void *psrc,
13597 const void *pshn,
13598 Elf_Internal_Sym *dst)
13599{
8384fb8f
AM		 13600 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13601 return FALSE;
0beaef2b
PB		 13602
13603 /* New EABI objects mark thumb function symbols by setting the low bit of
13604 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13605 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13606 && (dst->st_value & 1))
13607 {
13608 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13609 dst->st_value &= ~(bfd_vma) 1;
13610 }
8384fb8f 13611 return TRUE;
0beaef2b
PB		 13612}
13613
13614
13615/* Mangle thumb function symbols as we write them out. */
13616
13617static void
13618elf32_arm_swap_symbol_out (bfd *abfd,
13619 const Elf_Internal_Sym *src,
13620 void *cdst,
13621 void *shndx)
13622{
13623 Elf_Internal_Sym newsym;
13624
13625 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13626 of the address set, as per the new EABI. We do this unconditionally
13627 because objcopy does not set the elf header flags until after
13628 it writes out the symbol table. */
13629 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13630 {
13631 newsym = *src;
13632 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13633 if (newsym.st_shndx != SHN_UNDEF)
13634 {
13635 /* Do this only for defined symbols. At link type, the static
13636 linker will simulate the work of dynamic linker of resolving
13637 symbols and will carry over the thumbness of found symbols to
13638 the output symbol table. It's not clear how it happens, but
b0fead2b 13639 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13640 runtime, and writing '1' for them will be confusing for users
13641 and possibly for dynamic linker itself.
13642 */
13643 newsym.st_value |= 1;
13644 }
906e58ca 13645
0beaef2b
PB		 13646 src = &newsym;
13647 }
13648 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13649}
13650
b294bdf8
MM		 13651/* Add the PT_ARM_EXIDX program header. */
13652
13653static bfd_boolean
906e58ca 13654elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13655 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13656{
13657 struct elf_segment_map *m;
13658 asection *sec;
13659
13660 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13661 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13662 {
13663 /* If there is already a PT_ARM_EXIDX header, then we do not
13664 want to add another one. This situation arises when running
13665 "strip"; the input binary already has the header. */
13666 m = elf_tdata (abfd)->segment_map;
13667 while (m && m->p_type != PT_ARM_EXIDX)
13668 m = m->next;
13669 if (!m)
13670 {
13671 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
13672 if (m == NULL)
13673 return FALSE;
13674 m->p_type = PT_ARM_EXIDX;
13675 m->count = 1;
13676 m->sections[0] = sec;
13677
13678 m->next = elf_tdata (abfd)->segment_map;
13679 elf_tdata (abfd)->segment_map = m;
13680 }
13681 }
13682
13683 return TRUE;
13684}
13685
13686/* We may add a PT_ARM_EXIDX program header. */
13687
13688static int
a6b96beb
AM		 13689elf32_arm_additional_program_headers (bfd *abfd,
13690 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13691{
13692 asection *sec;
13693
13694 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13695 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13696 return 1;
13697 else
13698 return 0;
13699}
13700
fcb93ecf 13701/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13702
fcb93ecf
PB		 13703static bfd_boolean
13704elf32_arm_is_function_type (unsigned int type)
13705{
0f88be7a 13706 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13707}
13708
0beaef2b 13709/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13710const struct elf_size_info elf32_arm_size_info =
13711{
0beaef2b
PB		 13712 sizeof (Elf32_External_Ehdr),
13713 sizeof (Elf32_External_Phdr),
13714 sizeof (Elf32_External_Shdr),
13715 sizeof (Elf32_External_Rel),
13716 sizeof (Elf32_External_Rela),
13717 sizeof (Elf32_External_Sym),
13718 sizeof (Elf32_External_Dyn),
13719 sizeof (Elf_External_Note),
13720 4,
13721 1,
13722 32, 2,
13723 ELFCLASS32, EV_CURRENT,
13724 bfd_elf32_write_out_phdrs,
13725 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13726 bfd_elf32_checksum_contents,
0beaef2b
PB		 13727 bfd_elf32_write_relocs,
13728 elf32_arm_swap_symbol_in,
13729 elf32_arm_swap_symbol_out,
13730 bfd_elf32_slurp_reloc_table,
13731 bfd_elf32_slurp_symbol_table,
13732 bfd_elf32_swap_dyn_in,
13733 bfd_elf32_swap_dyn_out,
13734 bfd_elf32_swap_reloc_in,
13735 bfd_elf32_swap_reloc_out,
13736 bfd_elf32_swap_reloca_in,
13737 bfd_elf32_swap_reloca_out
13738};
13739
252b5132
RH		 13740#define ELF_ARCH bfd_arch_arm
13741#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13742#ifdef __QNXTARGET__
13743#define ELF_MAXPAGESIZE 0x1000
13744#else
f21f3fe0 13745#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13746#endif
b1342370 13747#define ELF_MINPAGESIZE 0x1000
24718e3b 13748#define ELF_COMMONPAGESIZE 0x1000
252b5132 13749
ba93b8ac
DJ		 13750#define bfd_elf32_mkobject elf32_arm_mkobject
13751
99e4ae17
AJ		 13752#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13753#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13754#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13755#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13756#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13757#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13758#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13759#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13760#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13761#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13762#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13763#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 13764#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 13765#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 13766#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13767
13768#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13769#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13770#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13771#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13772#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13773#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13774#define elf_backend_write_section elf32_arm_write_section
252b5132 13775#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13776#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13777#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13778#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13779#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13780#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13781#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13782#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13783#define elf_backend_object_p elf32_arm_object_p
e16bb312 13784#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13785#define elf_backend_fake_sections elf32_arm_fake_sections
13786#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13787#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13788#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13789#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13790#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13791#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13792#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13793#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13794#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13795#define elf_backend_is_function_type elf32_arm_is_function_type
13796
13797#define elf_backend_can_refcount 1
13798#define elf_backend_can_gc_sections 1
13799#define elf_backend_plt_readonly 1
13800#define elf_backend_want_got_plt 1
13801#define elf_backend_want_plt_sym 0
13802#define elf_backend_may_use_rel_p 1
13803#define elf_backend_may_use_rela_p 0
4e7fd91e 13804#define elf_backend_default_use_rela_p 0
252b5132 13805
04f7c78d 13806#define elf_backend_got_header_size 12
04f7c78d 13807
906e58ca
NC		 13808#undef elf_backend_obj_attrs_vendor
13809#define elf_backend_obj_attrs_vendor "aeabi"
13810#undef elf_backend_obj_attrs_section
13811#define elf_backend_obj_attrs_section ".ARM.attributes"
13812#undef elf_backend_obj_attrs_arg_type
13813#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13814#undef elf_backend_obj_attrs_section_type
104d59d1 13815#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13816#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13817
252b5132 13818#include "elf32-target.h"
7f266840 13819
906e58ca 13820/* VxWorks Targets. */
4e7fd91e 13821
906e58ca 13822#undef TARGET_LITTLE_SYM
4e7fd91e 13823#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13824#undef TARGET_LITTLE_NAME
4e7fd91e 13825#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13826#undef TARGET_BIG_SYM
4e7fd91e 13827#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13828#undef TARGET_BIG_NAME
4e7fd91e
PB		 13829#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13830
13831/* Like elf32_arm_link_hash_table_create -- but overrides
13832 appropriately for VxWorks. */
906e58ca 13833
4e7fd91e
PB		 13834static struct bfd_link_hash_table *
13835elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13836{
13837 struct bfd_link_hash_table *ret;
13838
13839 ret = elf32_arm_link_hash_table_create (abfd);
13840 if (ret)
13841 {
13842 struct elf32_arm_link_hash_table *htab
00a97672 13843 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13844 htab->use_rel = 0;
00a97672 13845 htab->vxworks_p = 1;
4e7fd91e
PB		 13846 }
13847 return ret;
906e58ca 13848}
4e7fd91e 13849
00a97672
RS		 13850static void
13851elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13852{
13853 elf32_arm_final_write_processing (abfd, linker);
13854 elf_vxworks_final_write_processing (abfd, linker);
13855}
13856
906e58ca 13857#undef elf32_bed
4e7fd91e
PB		 13858#define elf32_bed elf32_arm_vxworks_bed
13859
906e58ca
NC		 13860#undef bfd_elf32_bfd_link_hash_table_create
13861#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13862#undef elf_backend_add_symbol_hook
13863#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13864#undef elf_backend_final_write_processing
13865#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13866#undef elf_backend_emit_relocs
13867#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13868
906e58ca 13869#undef elf_backend_may_use_rel_p
00a97672 13870#define elf_backend_may_use_rel_p 0
906e58ca 13871#undef elf_backend_may_use_rela_p
00a97672 13872#define elf_backend_may_use_rela_p 1
906e58ca 13873#undef elf_backend_default_use_rela_p
00a97672 13874#define elf_backend_default_use_rela_p 1
906e58ca 13875#undef elf_backend_want_plt_sym
00a97672 13876#define elf_backend_want_plt_sym 1
906e58ca 13877#undef ELF_MAXPAGESIZE
00a97672 13878#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13879
13880#include "elf32-target.h"
13881
13882
906e58ca 13883/* Symbian OS Targets. */
7f266840 13884
906e58ca 13885#undef TARGET_LITTLE_SYM
7f266840 13886#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 13887#undef TARGET_LITTLE_NAME
7f266840 13888#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 13889#undef TARGET_BIG_SYM
7f266840 13890#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 13891#undef TARGET_BIG_NAME
7f266840
DJ		 13892#define TARGET_BIG_NAME "elf32-bigarm-symbian"
13893
13894/* Like elf32_arm_link_hash_table_create -- but overrides
13895 appropriately for Symbian OS. */
906e58ca 13896
7f266840
DJ		 13897static struct bfd_link_hash_table *
13898elf32_arm_symbian_link_hash_table_create (bfd *abfd)
13899{
13900 struct bfd_link_hash_table *ret;
13901
13902 ret = elf32_arm_link_hash_table_create (abfd);
13903 if (ret)
13904 {
13905 struct elf32_arm_link_hash_table *htab
13906 = (struct elf32_arm_link_hash_table *)ret;
13907 /* There is no PLT header for Symbian OS. */
13908 htab->plt_header_size = 0;
95720a86
DJ		 13909 /* The PLT entries are each one instruction and one word. */
13910 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 13911 htab->symbian_p = 1;
33bfe774
JB		 13912 /* Symbian uses armv5t or above, so use_blx is always true. */
13913 htab->use_blx = 1;
67687978 13914 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 13915 }
13916 return ret;
906e58ca 13917}
7f266840 13918
b35d266b 13919static const struct bfd_elf_special_section
551b43fd 13920elf32_arm_symbian_special_sections[] =
7f266840 13921{
5cd3778d
MM		 13922 /* In a BPABI executable, the dynamic linking sections do not go in
13923 the loadable read-only segment. The post-linker may wish to
13924 refer to these sections, but they are not part of the final
13925 program image. */
0112cd26
NC		 13926 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
13927 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
13928 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
13929 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
13930 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 13931 /* These sections do not need to be writable as the SymbianOS
13932 postlinker will arrange things so that no dynamic relocation is
13933 required. */
0112cd26
NC		 13934 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
13935 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
13936 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
13937 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 13938};
13939
c3c76620 13940static void
906e58ca 13941elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 13942 struct bfd_link_info *link_info)
c3c76620
MM		 13943{
13944 /* BPABI objects are never loaded directly by an OS kernel; they are
13945 processed by a postlinker first, into an OS-specific format. If
13946 the D_PAGED bit is set on the file, BFD will align segments on
13947 page boundaries, so that an OS can directly map the file. With
13948 BPABI objects, that just results in wasted space. In addition,
13949 because we clear the D_PAGED bit, map_sections_to_segments will
13950 recognize that the program headers should not be mapped into any
13951 loadable segment. */
13952 abfd->flags &= ~D_PAGED;
906e58ca 13953 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 13954}
7f266840
DJ		 13955
13956static bfd_boolean
906e58ca 13957elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 13958 struct bfd_link_info *info)
7f266840
DJ		 13959{
13960 struct elf_segment_map *m;
13961 asection *dynsec;
13962
7f266840
DJ		 13963 /* BPABI shared libraries and executables should have a PT_DYNAMIC
13964 segment. However, because the .dynamic section is not marked
13965 with SEC_LOAD, the generic ELF code will not create such a
13966 segment. */
13967 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
13968 if (dynsec)
13969 {
8ded5a0f
AM		 13970 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
13971 if (m->p_type == PT_DYNAMIC)
13972 break;
13973
13974 if (m == NULL)
13975 {
13976 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
13977 m->next = elf_tdata (abfd)->segment_map;
13978 elf_tdata (abfd)->segment_map = m;
13979 }
7f266840
DJ		 13980 }
13981
b294bdf8
MM		 13982 /* Also call the generic arm routine. */
13983 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 13984}
13985
95720a86
DJ		 13986/* Return address for Ith PLT stub in section PLT, for relocation REL
13987 or (bfd_vma) -1 if it should not be included. */
13988
13989static bfd_vma
13990elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
13991 const arelent *rel ATTRIBUTE_UNUSED)
13992{
13993 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
13994}
13995
13996
8029a119 13997#undef elf32_bed
7f266840
DJ		 13998#define elf32_bed elf32_arm_symbian_bed
13999
14000/* The dynamic sections are not allocated on SymbianOS; the postlinker
14001 will process them and then discard them. */
906e58ca 14002#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14003#define ELF_DYNAMIC_SEC_FLAGS \
14004 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14005
00a97672 14006#undef elf_backend_add_symbol_hook
00a97672 14007#undef elf_backend_emit_relocs
c3c76620 14008
906e58ca
NC		 14009#undef bfd_elf32_bfd_link_hash_table_create
14010#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14011#undef elf_backend_special_sections
14012#define elf_backend_special_sections elf32_arm_symbian_special_sections
14013#undef elf_backend_begin_write_processing
14014#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14015#undef elf_backend_final_write_processing
14016#define elf_backend_final_write_processing elf32_arm_final_write_processing
14017
14018#undef elf_backend_modify_segment_map
7f266840
DJ		 14019#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14020
14021/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14022#undef elf_backend_got_header_size
7f266840
DJ		 14023#define elf_backend_got_header_size 0
14024
14025/* Similarly, there is no .got.plt section. */
906e58ca 14026#undef elf_backend_want_got_plt
7f266840
DJ		 14027#define elf_backend_want_got_plt 0
14028
906e58ca 14029#undef elf_backend_plt_sym_val
95720a86
DJ		 14030#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14031
906e58ca 14032#undef elf_backend_may_use_rel_p
00a97672 14033#define elf_backend_may_use_rel_p 1
906e58ca 14034#undef elf_backend_may_use_rela_p
00a97672 14035#define elf_backend_may_use_rela_p 0
906e58ca 14036#undef elf_backend_default_use_rela_p
00a97672 14037#define elf_backend_default_use_rela_p 0
906e58ca 14038#undef elf_backend_want_plt_sym
00a97672 14039#define elf_backend_want_plt_sym 0
906e58ca 14040#undef ELF_MAXPAGESIZE
00a97672 14041#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14042
7f266840 14043#include "elf32-target.h"
GDB Binutils - Deliverables
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