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PR gdb/12576:
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
e6a6bb22 3 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840 263
0855e32b 264 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 265 0, /* rightshift */
0855e32b
NS		 266 2, /* size (0 = byte, 1 = short, 2 = long) */
267 32, /* bitsize */
7f266840
DJ		 268 FALSE, /* pc_relative */
269 0, /* bitpos */
0855e32b 270 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 271 bfd_elf_generic_reloc, /* special_function */
0855e32b 272 "R_ARM_TLS_DESC", /* name */
7f266840 273 FALSE, /* partial_inplace */
0855e32b
NS		 274 0xffffffff, /* src_mask */
275 0xffffffff, /* dst_mask */
7f266840
DJ		 276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
0855e32b
NS		 1355 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1356 0, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 32, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_bitfield,/* complain_on_overflow */
1362 NULL, /* special_function */
1363 "R_ARM_TLS_GOTDESC", /* name */
1364 TRUE, /* partial_inplace */
1365 0xffffffff, /* src_mask */
1366 0xffffffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 HOWTO (R_ARM_TLS_CALL, /* type */
1370 0, /* rightshift */
1371 2, /* size (0 = byte, 1 = short, 2 = long) */
1372 24, /* bitsize */
1373 FALSE, /* pc_relative */
1374 0, /* bitpos */
1375 complain_overflow_dont,/* complain_on_overflow */
1376 bfd_elf_generic_reloc, /* special_function */
1377 "R_ARM_TLS_CALL", /* name */
1378 FALSE, /* partial_inplace */
1379 0x00ffffff, /* src_mask */
1380 0x00ffffff, /* dst_mask */
1381 FALSE), /* pcrel_offset */
1382
1383 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1384 0, /* rightshift */
1385 2, /* size (0 = byte, 1 = short, 2 = long) */
1386 0, /* bitsize */
1387 FALSE, /* pc_relative */
1388 0, /* bitpos */
1389 complain_overflow_bitfield,/* complain_on_overflow */
1390 bfd_elf_generic_reloc, /* special_function */
1391 "R_ARM_TLS_DESCSEQ", /* name */
1392 FALSE, /* partial_inplace */
1393 0x00000000, /* src_mask */
1394 0x00000000, /* dst_mask */
1395 FALSE), /* pcrel_offset */
1396
1397 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1398 0, /* rightshift */
1399 2, /* size (0 = byte, 1 = short, 2 = long) */
1400 24, /* bitsize */
1401 FALSE, /* pc_relative */
1402 0, /* bitpos */
1403 complain_overflow_dont,/* complain_on_overflow */
1404 bfd_elf_generic_reloc, /* special_function */
1405 "R_ARM_THM_TLS_CALL", /* name */
1406 FALSE, /* partial_inplace */
1407 0x07ff07ff, /* src_mask */
1408 0x07ff07ff, /* dst_mask */
1409 FALSE), /* pcrel_offset */
c19d1205
ZW		 1410
1411 HOWTO (R_ARM_PLT32_ABS, /* type */
1412 0, /* rightshift */
1413 2, /* size (0 = byte, 1 = short, 2 = long) */
1414 32, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 bfd_elf_generic_reloc, /* special_function */
1419 "R_ARM_PLT32_ABS", /* name */
1420 FALSE, /* partial_inplace */
1421 0xffffffff, /* src_mask */
1422 0xffffffff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424
1425 HOWTO (R_ARM_GOT_ABS, /* type */
1426 0, /* rightshift */
1427 2, /* size (0 = byte, 1 = short, 2 = long) */
1428 32, /* bitsize */
1429 FALSE, /* pc_relative */
1430 0, /* bitpos */
1431 complain_overflow_dont,/* complain_on_overflow */
1432 bfd_elf_generic_reloc, /* special_function */
1433 "R_ARM_GOT_ABS", /* name */
1434 FALSE, /* partial_inplace */
1435 0xffffffff, /* src_mask */
1436 0xffffffff, /* dst_mask */
1437 FALSE), /* pcrel_offset */
1438
1439 HOWTO (R_ARM_GOT_PREL, /* type */
1440 0, /* rightshift */
1441 2, /* size (0 = byte, 1 = short, 2 = long) */
1442 32, /* bitsize */
1443 TRUE, /* pc_relative */
1444 0, /* bitpos */
1445 complain_overflow_dont, /* complain_on_overflow */
1446 bfd_elf_generic_reloc, /* special_function */
1447 "R_ARM_GOT_PREL", /* name */
1448 FALSE, /* partial_inplace */
1449 0xffffffff, /* src_mask */
1450 0xffffffff, /* dst_mask */
1451 TRUE), /* pcrel_offset */
1452
1453 HOWTO (R_ARM_GOT_BREL12, /* type */
1454 0, /* rightshift */
1455 2, /* size (0 = byte, 1 = short, 2 = long) */
1456 12, /* bitsize */
1457 FALSE, /* pc_relative */
1458 0, /* bitpos */
1459 complain_overflow_bitfield,/* complain_on_overflow */
1460 bfd_elf_generic_reloc, /* special_function */
1461 "R_ARM_GOT_BREL12", /* name */
1462 FALSE, /* partial_inplace */
1463 0x00000fff, /* src_mask */
1464 0x00000fff, /* dst_mask */
1465 FALSE), /* pcrel_offset */
1466
1467 HOWTO (R_ARM_GOTOFF12, /* type */
1468 0, /* rightshift */
1469 2, /* size (0 = byte, 1 = short, 2 = long) */
1470 12, /* bitsize */
1471 FALSE, /* pc_relative */
1472 0, /* bitpos */
1473 complain_overflow_bitfield,/* complain_on_overflow */
1474 bfd_elf_generic_reloc, /* special_function */
1475 "R_ARM_GOTOFF12", /* name */
1476 FALSE, /* partial_inplace */
1477 0x00000fff, /* src_mask */
1478 0x00000fff, /* dst_mask */
1479 FALSE), /* pcrel_offset */
1480
1481 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1482
1483 /* GNU extension to record C++ vtable member usage */
1484 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1485 0, /* rightshift */
1486 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1487 0, /* bitsize */
ba93b8ac
DJ		 1488 FALSE, /* pc_relative */
1489 0, /* bitpos */
c19d1205
ZW		 1490 complain_overflow_dont, /* complain_on_overflow */
1491 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1492 "R_ARM_GNU_VTENTRY", /* name */
1493 FALSE, /* partial_inplace */
1494 0, /* src_mask */
1495 0, /* dst_mask */
1496 FALSE), /* pcrel_offset */
1497
1498 /* GNU extension to record C++ vtable hierarchy */
1499 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1500 0, /* rightshift */
1501 2, /* size (0 = byte, 1 = short, 2 = long) */
1502 0, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont, /* complain_on_overflow */
1506 NULL, /* special_function */
1507 "R_ARM_GNU_VTINHERIT", /* name */
1508 FALSE, /* partial_inplace */
1509 0, /* src_mask */
1510 0, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512
1513 HOWTO (R_ARM_THM_JUMP11, /* type */
1514 1, /* rightshift */
1515 1, /* size (0 = byte, 1 = short, 2 = long) */
1516 11, /* bitsize */
1517 TRUE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_signed, /* complain_on_overflow */
1520 bfd_elf_generic_reloc, /* special_function */
1521 "R_ARM_THM_JUMP11", /* name */
1522 FALSE, /* partial_inplace */
1523 0x000007ff, /* src_mask */
1524 0x000007ff, /* dst_mask */
1525 TRUE), /* pcrel_offset */
1526
1527 HOWTO (R_ARM_THM_JUMP8, /* type */
1528 1, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 8, /* bitsize */
1531 TRUE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_signed, /* complain_on_overflow */
1534 bfd_elf_generic_reloc, /* special_function */
1535 "R_ARM_THM_JUMP8", /* name */
1536 FALSE, /* partial_inplace */
1537 0x000000ff, /* src_mask */
1538 0x000000ff, /* dst_mask */
1539 TRUE), /* pcrel_offset */
ba93b8ac 1540
c19d1205
ZW		 1541 /* TLS relocations */
1542 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1543 0, /* rightshift */
1544 2, /* size (0 = byte, 1 = short, 2 = long) */
1545 32, /* bitsize */
1546 FALSE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1549 NULL, /* special_function */
1550 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1551 TRUE, /* partial_inplace */
1552 0xffffffff, /* src_mask */
1553 0xffffffff, /* dst_mask */
c19d1205 1554 FALSE), /* pcrel_offset */
ba93b8ac 1555
ba93b8ac
DJ		 1556 HOWTO (R_ARM_TLS_LDM32, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 32, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_bitfield,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_ARM_TLS_LDM32", /* name */
1565 TRUE, /* partial_inplace */
1566 0xffffffff, /* src_mask */
1567 0xffffffff, /* dst_mask */
c19d1205 1568 FALSE), /* pcrel_offset */
ba93b8ac 1569
c19d1205 1570 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 32, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_bitfield,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
c19d1205 1578 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1579 TRUE, /* partial_inplace */
1580 0xffffffff, /* src_mask */
1581 0xffffffff, /* dst_mask */
c19d1205 1582 FALSE), /* pcrel_offset */
ba93b8ac 1583
ba93b8ac
DJ		 1584 HOWTO (R_ARM_TLS_IE32, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 32, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_bitfield,/* complain_on_overflow */
1591 NULL, /* special_function */
1592 "R_ARM_TLS_IE32", /* name */
1593 TRUE, /* partial_inplace */
1594 0xffffffff, /* src_mask */
1595 0xffffffff, /* dst_mask */
c19d1205 1596 FALSE), /* pcrel_offset */
7f266840 1597
c19d1205 1598 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1599 0, /* rightshift */
1600 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1601 32, /* bitsize */
7f266840
DJ		 1602 FALSE, /* pc_relative */
1603 0, /* bitpos */
c19d1205
ZW		 1604 complain_overflow_bitfield,/* complain_on_overflow */
1605 bfd_elf_generic_reloc, /* special_function */
1606 "R_ARM_TLS_LE32", /* name */
1607 TRUE, /* partial_inplace */
1608 0xffffffff, /* src_mask */
1609 0xffffffff, /* dst_mask */
1610 FALSE), /* pcrel_offset */
7f266840 1611
c19d1205
ZW		 1612 HOWTO (R_ARM_TLS_LDO12, /* type */
1613 0, /* rightshift */
1614 2, /* size (0 = byte, 1 = short, 2 = long) */
1615 12, /* bitsize */
1616 FALSE, /* pc_relative */
7f266840 1617 0, /* bitpos */
c19d1205 1618 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1619 bfd_elf_generic_reloc, /* special_function */
c19d1205 1620 "R_ARM_TLS_LDO12", /* name */
7f266840 1621 FALSE, /* partial_inplace */
c19d1205
ZW		 1622 0x00000fff, /* src_mask */
1623 0x00000fff, /* dst_mask */
1624 FALSE), /* pcrel_offset */
7f266840 1625
c19d1205
ZW		 1626 HOWTO (R_ARM_TLS_LE12, /* type */
1627 0, /* rightshift */
1628 2, /* size (0 = byte, 1 = short, 2 = long) */
1629 12, /* bitsize */
1630 FALSE, /* pc_relative */
7f266840 1631 0, /* bitpos */
c19d1205 1632 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1633 bfd_elf_generic_reloc, /* special_function */
c19d1205 1634 "R_ARM_TLS_LE12", /* name */
7f266840 1635 FALSE, /* partial_inplace */
c19d1205
ZW		 1636 0x00000fff, /* src_mask */
1637 0x00000fff, /* dst_mask */
1638 FALSE), /* pcrel_offset */
7f266840 1639
c19d1205 1640 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1641 0, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1643 12, /* bitsize */
1644 FALSE, /* pc_relative */
7f266840 1645 0, /* bitpos */
c19d1205 1646 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1647 bfd_elf_generic_reloc, /* special_function */
c19d1205 1648 "R_ARM_TLS_IE12GP", /* name */
7f266840 1649 FALSE, /* partial_inplace */
c19d1205
ZW		 1650 0x00000fff, /* src_mask */
1651 0x00000fff, /* dst_mask */
1652 FALSE), /* pcrel_offset */
0855e32b
NS		 1653
1654 EMPTY_HOWTO (112),
1655 EMPTY_HOWTO (113),
1656 EMPTY_HOWTO (114),
1657 EMPTY_HOWTO (115),
1658 EMPTY_HOWTO (116),
1659 EMPTY_HOWTO (117),
1660 EMPTY_HOWTO (118),
1661 EMPTY_HOWTO (119),
1662 EMPTY_HOWTO (120),
1663 EMPTY_HOWTO (121),
1664 EMPTY_HOWTO (122),
1665 EMPTY_HOWTO (123),
1666 EMPTY_HOWTO (124),
1667 EMPTY_HOWTO (125),
1668 EMPTY_HOWTO (126),
1669 EMPTY_HOWTO (127),
1670 EMPTY_HOWTO (128),
1671
1672 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1673 0, /* rightshift */
1674 1, /* size (0 = byte, 1 = short, 2 = long) */
1675 0, /* bitsize */
1676 FALSE, /* pc_relative */
1677 0, /* bitpos */
1678 complain_overflow_bitfield,/* complain_on_overflow */
1679 bfd_elf_generic_reloc, /* special_function */
1680 "R_ARM_THM_TLS_DESCSEQ",/* name */
1681 FALSE, /* partial_inplace */
1682 0x00000000, /* src_mask */
1683 0x00000000, /* dst_mask */
1684 FALSE), /* pcrel_offset */
c19d1205
ZW		 1685};
1686
1687/* 112-127 private relocations
1688 128 R_ARM_ME_TOO, obsolete
1689 129-255 unallocated in AAELF.
7f266840 1690
c19d1205
ZW		 1691 249-255 extended, currently unused, relocations: */
1692
4962c51a 1693static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1694{
1695 HOWTO (R_ARM_RREL32, /* type */
1696 0, /* rightshift */
1697 0, /* size (0 = byte, 1 = short, 2 = long) */
1698 0, /* bitsize */
1699 FALSE, /* pc_relative */
1700 0, /* bitpos */
1701 complain_overflow_dont,/* complain_on_overflow */
1702 bfd_elf_generic_reloc, /* special_function */
1703 "R_ARM_RREL32", /* name */
1704 FALSE, /* partial_inplace */
1705 0, /* src_mask */
1706 0, /* dst_mask */
1707 FALSE), /* pcrel_offset */
1708
1709 HOWTO (R_ARM_RABS32, /* type */
1710 0, /* rightshift */
1711 0, /* size (0 = byte, 1 = short, 2 = long) */
1712 0, /* bitsize */
1713 FALSE, /* pc_relative */
1714 0, /* bitpos */
1715 complain_overflow_dont,/* complain_on_overflow */
1716 bfd_elf_generic_reloc, /* special_function */
1717 "R_ARM_RABS32", /* name */
1718 FALSE, /* partial_inplace */
1719 0, /* src_mask */
1720 0, /* dst_mask */
1721 FALSE), /* pcrel_offset */
1722
1723 HOWTO (R_ARM_RPC24, /* type */
1724 0, /* rightshift */
1725 0, /* size (0 = byte, 1 = short, 2 = long) */
1726 0, /* bitsize */
1727 FALSE, /* pc_relative */
1728 0, /* bitpos */
1729 complain_overflow_dont,/* complain_on_overflow */
1730 bfd_elf_generic_reloc, /* special_function */
1731 "R_ARM_RPC24", /* name */
1732 FALSE, /* partial_inplace */
1733 0, /* src_mask */
1734 0, /* dst_mask */
1735 FALSE), /* pcrel_offset */
1736
1737 HOWTO (R_ARM_RBASE, /* type */
1738 0, /* rightshift */
1739 0, /* size (0 = byte, 1 = short, 2 = long) */
1740 0, /* bitsize */
1741 FALSE, /* pc_relative */
1742 0, /* bitpos */
1743 complain_overflow_dont,/* complain_on_overflow */
1744 bfd_elf_generic_reloc, /* special_function */
1745 "R_ARM_RBASE", /* name */
1746 FALSE, /* partial_inplace */
1747 0, /* src_mask */
1748 0, /* dst_mask */
1749 FALSE) /* pcrel_offset */
1750};
1751
1752static reloc_howto_type *
1753elf32_arm_howto_from_type (unsigned int r_type)
1754{
906e58ca 1755 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1756 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1757
c19d1205 1758 if (r_type >= R_ARM_RREL32
906e58ca 1759 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1760 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1761
c19d1205 1762 return NULL;
7f266840
DJ		 1763}
1764
1765static void
1766elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1767 Elf_Internal_Rela * elf_reloc)
1768{
1769 unsigned int r_type;
1770
1771 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1772 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1773}
1774
1775struct elf32_arm_reloc_map
1776 {
1777 bfd_reloc_code_real_type bfd_reloc_val;
1778 unsigned char elf_reloc_val;
1779 };
1780
1781/* All entries in this list must also be present in elf32_arm_howto_table. */
1782static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1783 {
1784 {BFD_RELOC_NONE, R_ARM_NONE},
1785 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1786 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1787 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1788 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1789 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1790 {BFD_RELOC_32, R_ARM_ABS32},
1791 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1792 {BFD_RELOC_8, R_ARM_ABS8},
1793 {BFD_RELOC_16, R_ARM_ABS16},
1794 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1795 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1796 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1797 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1798 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1799 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1800 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1801 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1802 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1803 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1804 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1805 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1806 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1807 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1808 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1809 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1810 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1811 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1812 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1813 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1814 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1815 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1816 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1817 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1818 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1819 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1820 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1821 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1822 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1823 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1824 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1825 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1826 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1827 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1828 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1829 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1830 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1831 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1832 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1833 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1834 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1835 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1836 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1837 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1838 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1839 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1840 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1841 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1842 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1843 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1844 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1845 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1846 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1847 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1848 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1849 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1850 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1851 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1852 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1853 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1854 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1855 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1856 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1857 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1858 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1859 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1860 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1861 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1862 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1863 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1864 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1865 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1866 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1867 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1868 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1869 };
1870
1871static reloc_howto_type *
f1c71a59
ZW		 1872elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1873 bfd_reloc_code_real_type code)
7f266840
DJ		 1874{
1875 unsigned int i;
8029a119 1876
906e58ca 1877 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1878 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1879 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1880
c19d1205 1881 return NULL;
7f266840
DJ		 1882}
1883
157090f7
AM		 1884static reloc_howto_type *
1885elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1886 const char *r_name)
1887{
1888 unsigned int i;
1889
906e58ca 1890 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1891 if (elf32_arm_howto_table_1[i].name != NULL
1892 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1893 return &elf32_arm_howto_table_1[i];
1894
906e58ca 1895 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1896 if (elf32_arm_howto_table_2[i].name != NULL
1897 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1898 return &elf32_arm_howto_table_2[i];
1899
1900 return NULL;
1901}
1902
906e58ca
NC		 1903/* Support for core dump NOTE sections. */
1904
7f266840 1905static bfd_boolean
f1c71a59 1906elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1907{
1908 int offset;
1909 size_t size;
1910
1911 switch (note->descsz)
1912 {
1913 default:
1914 return FALSE;
1915
8029a119 1916 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1917 /* pr_cursig */
1918 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1919
1920 /* pr_pid */
261b8d08 1921 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1922
1923 /* pr_reg */
1924 offset = 72;
1925 size = 72;
1926
1927 break;
1928 }
1929
1930 /* Make a ".reg/999" section. */
1931 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1932 size, note->descpos + offset);
1933}
1934
1935static bfd_boolean
f1c71a59 1936elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1937{
1938 switch (note->descsz)
1939 {
1940 default:
1941 return FALSE;
1942
8029a119 1943 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1944 elf_tdata (abfd)->core_program
1945 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1946 elf_tdata (abfd)->core_command
1947 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1948 }
1949
1950 /* Note that for some reason, a spurious space is tacked
1951 onto the end of the args in some (at least one anyway)
1952 implementations, so strip it off if it exists. */
7f266840
DJ		 1953 {
1954 char *command = elf_tdata (abfd)->core_command;
1955 int n = strlen (command);
1956
1957 if (0 < n && command[n - 1] == ' ')
1958 command[n - 1] = '\0';
1959 }
1960
1961 return TRUE;
1962}
1963
1964#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1965#define TARGET_LITTLE_NAME "elf32-littlearm"
1966#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1967#define TARGET_BIG_NAME "elf32-bigarm"
1968
1969#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1970#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1971
252b5132
RH		 1972typedef unsigned long int insn32;
1973typedef unsigned short int insn16;
1974
3a4a14e9
PB		 1975/* In lieu of proper flags, assume all EABIv4 or later objects are
1976 interworkable. */
57e8b36a 1977#define INTERWORK_FLAG(abfd) \
3a4a14e9 1978 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1979 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1980 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1981
252b5132
RH		 1982/* The linker script knows the section names for placement.
1983 The entry_names are used to do simple name mangling on the stubs.
1984 Given a function name, and its type, the stub can be found. The
9b485d32 1985 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1986#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1987#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1988
1989#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1990#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1991
c7b8f16e
JB		 1992#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1993#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1994
845b51d6
PB		 1995#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1996#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1997
7413f23f
DJ		 1998#define STUB_ENTRY_NAME "__%s_veneer"
1999
252b5132
RH		 2000/* The name of the dynamic interpreter. This is put in the .interp
2001 section. */
2002#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2003
0855e32b
NS		 2004static const unsigned long tls_trampoline [] =
2005 {
2006 0xe08e0000, /* add r0, lr, r0 */
2007 0xe5901004, /* ldr r1, [r0,#4] */
2008 0xe12fff11, /* bx r1 */
2009 };
2010
2011static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2012 {
2013 0xe52d2004, /* push {r2} */
2014 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2015 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2016 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2017 0xe081100f, /* 2: add r1, pc */
2018 0xe12fff12, /* bx r2 */
2019 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2020 + dl_tlsdesc_lazy_resolver(GOT) */
2021 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2022 };
2023
5e681ec4
PB		 2024#ifdef FOUR_WORD_PLT
2025
252b5132
RH		 2026/* The first entry in a procedure linkage table looks like
2027 this. It is set up so that any shared library function that is
59f2c4e7 2028 called before the relocation has been set up calls the dynamic
9b485d32 2029 linker first. */
e5a52504 2030static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 2031 {
2032 0xe52de004, /* str lr, [sp, #-4]! */
2033 0xe59fe010, /* ldr lr, [pc, #16] */
2034 0xe08fe00e, /* add lr, pc, lr */
2035 0xe5bef008, /* ldr pc, [lr, #8]! */
2036 };
2037
2038/* Subsequent entries in a procedure linkage table look like
2039 this. */
e5a52504 2040static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 2041 {
2042 0xe28fc600, /* add ip, pc, #NN */
2043 0xe28cca00, /* add ip, ip, #NN */
2044 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2045 0x00000000, /* unused */
2046 };
2047
2048#else
2049
5e681ec4
PB		 2050/* The first entry in a procedure linkage table looks like
2051 this. It is set up so that any shared library function that is
2052 called before the relocation has been set up calls the dynamic
2053 linker first. */
e5a52504 2054static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 2055 {
5e681ec4
PB		 2056 0xe52de004, /* str lr, [sp, #-4]! */
2057 0xe59fe004, /* ldr lr, [pc, #4] */
2058 0xe08fe00e, /* add lr, pc, lr */
2059 0xe5bef008, /* ldr pc, [lr, #8]! */
2060 0x00000000, /* &GOT[0] - . */
917583ad 2061 };
252b5132
RH		 2062
2063/* Subsequent entries in a procedure linkage table look like
2064 this. */
e5a52504 2065static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 2066 {
2067 0xe28fc600, /* add ip, pc, #0xNN00000 */
2068 0xe28cca00, /* add ip, ip, #0xNN000 */
2069 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2070 };
2071
2072#endif
252b5132 2073
00a97672
RS		 2074/* The format of the first entry in the procedure linkage table
2075 for a VxWorks executable. */
2076static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2077 {
2078 0xe52dc008, /* str ip,[sp,#-8]! */
2079 0xe59fc000, /* ldr ip,[pc] */
2080 0xe59cf008, /* ldr pc,[ip,#8] */
2081 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2082 };
2083
2084/* The format of subsequent entries in a VxWorks executable. */
2085static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2086 {
2087 0xe59fc000, /* ldr ip,[pc] */
2088 0xe59cf000, /* ldr pc,[ip] */
2089 0x00000000, /* .long @got */
2090 0xe59fc000, /* ldr ip,[pc] */
2091 0xea000000, /* b _PLT */
2092 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2093 };
2094
2095/* The format of entries in a VxWorks shared library. */
2096static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2097 {
2098 0xe59fc000, /* ldr ip,[pc] */
2099 0xe79cf009, /* ldr pc,[ip,r9] */
2100 0x00000000, /* .long @got */
2101 0xe59fc000, /* ldr ip,[pc] */
2102 0xe599f008, /* ldr pc,[r9,#8] */
2103 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2104 };
2105
b7693d02
DJ		 2106/* An initial stub used if the PLT entry is referenced from Thumb code. */
2107#define PLT_THUMB_STUB_SIZE 4
2108static const bfd_vma elf32_arm_plt_thumb_stub [] =
2109 {
2110 0x4778, /* bx pc */
2111 0x46c0 /* nop */
2112 };
2113
e5a52504
MM		 2114/* The entries in a PLT when using a DLL-based target with multiple
2115 address spaces. */
906e58ca 2116static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2117 {
83a358aa 2118 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2119 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2120 };
2121
906e58ca
NC		 2122#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2123#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2124#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2125#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2126#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2127#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2128
461a49ca
DJ		 2129enum stub_insn_type
2130 {
2131 THUMB16_TYPE = 1,
2132 THUMB32_TYPE,
2133 ARM_TYPE,
2134 DATA_TYPE
2135 };
2136
48229727
JB		 2137#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2138/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2139 is inserted in arm_build_one_stub(). */
2140#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2141#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2142#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2143#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2144#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2145#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2146
2147typedef struct
2148{
2149 bfd_vma data;
2150 enum stub_insn_type type;
ebe24dd4 2151 unsigned int r_type;
461a49ca
DJ		 2152 int reloc_addend;
2153} insn_sequence;
2154
fea2b4d6
CL		 2155/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2156 to reach the stub if necessary. */
461a49ca 2157static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2158 {
461a49ca
DJ		 2159 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2160 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2161 };
2162
fea2b4d6
CL		 2163/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2164 available. */
461a49ca 2165static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2166 {
461a49ca
DJ		 2167 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2168 ARM_INSN(0xe12fff1c), /* bx ip */
2169 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2170 };
2171
d3626fb0 2172/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2173static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2174 {
461a49ca
DJ		 2175 THUMB16_INSN(0xb401), /* push {r0} */
2176 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2177 THUMB16_INSN(0x4684), /* mov ip, r0 */
2178 THUMB16_INSN(0xbc01), /* pop {r0} */
2179 THUMB16_INSN(0x4760), /* bx ip */
2180 THUMB16_INSN(0xbf00), /* nop */
2181 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2182 };
2183
d3626fb0
CL		 2184/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2185 allowed. */
2186static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2187 {
2188 THUMB16_INSN(0x4778), /* bx pc */
2189 THUMB16_INSN(0x46c0), /* nop */
2190 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2191 ARM_INSN(0xe12fff1c), /* bx ip */
2192 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2193 };
2194
fea2b4d6
CL		 2195/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2196 available. */
461a49ca 2197static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2198 {
461a49ca
DJ		 2199 THUMB16_INSN(0x4778), /* bx pc */
2200 THUMB16_INSN(0x46c0), /* nop */
2201 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2202 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2203 };
2204
fea2b4d6
CL		 2205/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2206 one, when the destination is close enough. */
461a49ca 2207static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2208 {
461a49ca
DJ		 2209 THUMB16_INSN(0x4778), /* bx pc */
2210 THUMB16_INSN(0x46c0), /* nop */
2211 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2212 };
2213
cf3eccff 2214/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2215 blx to reach the stub if necessary. */
cf3eccff 2216static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2217 {
9ae92b05 2218 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
461a49ca
DJ		 2219 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2220 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2221 };
2222
cf3eccff
DJ		 2223/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2224 blx to reach the stub if necessary. We can not add into pc;
2225 it is not guaranteed to mode switch (different in ARMv6 and
2226 ARMv7). */
2227static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2228 {
9ae92b05 2229 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
cf3eccff
DJ		 2230 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2231 ARM_INSN(0xe12fff1c), /* bx ip */
2232 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2233 };
2234
ebe24dd4
CL		 2235/* V4T ARM -> ARM long branch stub, PIC. */
2236static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2237 {
2238 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2239 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2240 ARM_INSN(0xe12fff1c), /* bx ip */
2241 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2242 };
2243
2244/* V4T Thumb -> ARM long branch stub, PIC. */
2245static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2246 {
2247 THUMB16_INSN(0x4778), /* bx pc */
2248 THUMB16_INSN(0x46c0), /* nop */
2249 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2250 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2251 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2252 };
2253
d3626fb0
CL		 2254/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2255 architectures. */
ebe24dd4
CL		 2256static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2257 {
2258 THUMB16_INSN(0xb401), /* push {r0} */
2259 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2260 THUMB16_INSN(0x46fc), /* mov ip, pc */
2261 THUMB16_INSN(0x4484), /* add ip, r0 */
2262 THUMB16_INSN(0xbc01), /* pop {r0} */
2263 THUMB16_INSN(0x4760), /* bx ip */
2264 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2265 };
2266
d3626fb0
CL		 2267/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2268 allowed. */
2269static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2270 {
2271 THUMB16_INSN(0x4778), /* bx pc */
2272 THUMB16_INSN(0x46c0), /* nop */
2273 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2274 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2275 ARM_INSN(0xe12fff1c), /* bx ip */
2276 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2277 };
2278
0855e32b
NS		 2279/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2280 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2281static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2282{
2283 ARM_INSN(0xe59f1000), /* ldr r1, [pc] */
2284 ARM_INSN(0xe08ff001), /* add pc, pc, r1 */
2285 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2286};
2287
2288/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2289 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2290static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2291{
2292 THUMB16_INSN(0x4778), /* bx pc */
2293 THUMB16_INSN(0x46c0), /* nop */
2294 ARM_INSN(0xe59f1000), /* ldr r1, [pc, #0] */
2295 ARM_INSN(0xe081f00f), /* add pc, r1, pc */
2296 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2297};
2298
48229727
JB		 2299/* Cortex-A8 erratum-workaround stubs. */
2300
2301/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2302 can't use a conditional branch to reach this stub). */
2303
2304static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2305 {
2306 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2307 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2308 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2309 };
2310
2311/* Stub used for b.w and bl.w instructions. */
2312
2313static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2314 {
2315 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2316 };
2317
2318static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2319 {
2320 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2321 };
2322
2323/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2324 instruction (which switches to ARM mode) to point to this stub. Jump to the
2325 real destination using an ARM-mode branch. */
2326
2327static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2328 {
2329 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2330 };
2331
906e58ca
NC		 2332/* Section name for stubs is the associated section name plus this
2333 string. */
2334#define STUB_SUFFIX ".stub"
2335
738a79f6
CL		 2336/* One entry per long/short branch stub defined above. */
2337#define DEF_STUBS \
2338 DEF_STUB(long_branch_any_any) \
2339 DEF_STUB(long_branch_v4t_arm_thumb) \
2340 DEF_STUB(long_branch_thumb_only) \
2341 DEF_STUB(long_branch_v4t_thumb_thumb) \
2342 DEF_STUB(long_branch_v4t_thumb_arm) \
2343 DEF_STUB(short_branch_v4t_thumb_arm) \
2344 DEF_STUB(long_branch_any_arm_pic) \
2345 DEF_STUB(long_branch_any_thumb_pic) \
2346 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2347 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2348 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2349 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2350 DEF_STUB(long_branch_any_tls_pic) \
2351 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
48229727
JB		 2352 DEF_STUB(a8_veneer_b_cond) \
2353 DEF_STUB(a8_veneer_b) \
2354 DEF_STUB(a8_veneer_bl) \
2355 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2356
2357#define DEF_STUB(x) arm_stub_##x,
2358enum elf32_arm_stub_type {
906e58ca 2359 arm_stub_none,
738a79f6 2360 DEF_STUBS
eb7c4339
NS		 2361 /* Note the first a8_veneer type */
2362 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2363};
2364#undef DEF_STUB
2365
2366typedef struct
2367{
d3ce72d0 2368 const insn_sequence* template_sequence;
738a79f6
CL		 2369 int template_size;
2370} stub_def;
2371
2372#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2373static const stub_def stub_definitions[] = {
2374 {NULL, 0},
2375 DEF_STUBS
906e58ca
NC		 2376};
2377
2378struct elf32_arm_stub_hash_entry
2379{
2380 /* Base hash table entry structure. */
2381 struct bfd_hash_entry root;
2382
2383 /* The stub section. */
2384 asection *stub_sec;
2385
2386 /* Offset within stub_sec of the beginning of this stub. */
2387 bfd_vma stub_offset;
2388
2389 /* Given the symbol's value and its section we can determine its final
2390 value when building the stubs (so the stub knows where to jump). */
2391 bfd_vma target_value;
2392 asection *target_section;
2393
48229727
JB		 2394 /* Offset to apply to relocation referencing target_value. */
2395 bfd_vma target_addend;
2396
2397 /* The instruction which caused this stub to be generated (only valid for
2398 Cortex-A8 erratum workaround stubs at present). */
2399 unsigned long orig_insn;
2400
461a49ca 2401 /* The stub type. */
906e58ca 2402 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2403 /* Its encoding size in bytes. */
2404 int stub_size;
2405 /* Its template. */
2406 const insn_sequence *stub_template;
2407 /* The size of the template (number of entries). */
2408 int stub_template_size;
906e58ca
NC		 2409
2410 /* The symbol table entry, if any, that this was derived from. */
2411 struct elf32_arm_link_hash_entry *h;
2412
35fc36a8
RS		 2413 /* Type of branch. */
2414 enum arm_st_branch_type branch_type;
906e58ca
NC		 2415
2416 /* Where this stub is being called from, or, in the case of combined
2417 stub sections, the first input section in the group. */
2418 asection *id_sec;
7413f23f
DJ		 2419
2420 /* The name for the local symbol at the start of this stub. The
2421 stub name in the hash table has to be unique; this does not, so
2422 it can be friendlier. */
2423 char *output_name;
906e58ca
NC		 2424};
2425
e489d0ae
PB		 2426/* Used to build a map of a section. This is required for mixed-endian
2427 code/data. */
2428
2429typedef struct elf32_elf_section_map
2430{
2431 bfd_vma vma;
2432 char type;
2433}
2434elf32_arm_section_map;
2435
c7b8f16e
JB		 2436/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2437
2438typedef enum
2439{
2440 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2441 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2442 VFP11_ERRATUM_ARM_VENEER,
2443 VFP11_ERRATUM_THUMB_VENEER
2444}
2445elf32_vfp11_erratum_type;
2446
2447typedef struct elf32_vfp11_erratum_list
2448{
2449 struct elf32_vfp11_erratum_list *next;
2450 bfd_vma vma;
2451 union
2452 {
2453 struct
2454 {
2455 struct elf32_vfp11_erratum_list *veneer;
2456 unsigned int vfp_insn;
2457 } b;
2458 struct
2459 {
2460 struct elf32_vfp11_erratum_list *branch;
2461 unsigned int id;
2462 } v;
2463 } u;
2464 elf32_vfp11_erratum_type type;
2465}
2466elf32_vfp11_erratum_list;
2467
2468f9c9
PB		 2468typedef enum
2469{
2470 DELETE_EXIDX_ENTRY,
2471 INSERT_EXIDX_CANTUNWIND_AT_END
2472}
2473arm_unwind_edit_type;
2474
2475/* A (sorted) list of edits to apply to an unwind table. */
2476typedef struct arm_unwind_table_edit
2477{
2478 arm_unwind_edit_type type;
2479 /* Note: we sometimes want to insert an unwind entry corresponding to a
2480 section different from the one we're currently writing out, so record the
2481 (text) section this edit relates to here. */
2482 asection *linked_section;
2483 unsigned int index;
2484 struct arm_unwind_table_edit *next;
2485}
2486arm_unwind_table_edit;
2487
8e3de13a 2488typedef struct _arm_elf_section_data
e489d0ae 2489{
2468f9c9 2490 /* Information about mapping symbols. */
e489d0ae 2491 struct bfd_elf_section_data elf;
8e3de13a 2492 unsigned int mapcount;
c7b8f16e 2493 unsigned int mapsize;
e489d0ae 2494 elf32_arm_section_map *map;
2468f9c9 2495 /* Information about CPU errata. */
c7b8f16e
JB		 2496 unsigned int erratumcount;
2497 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2498 /* Information about unwind tables. */
2499 union
2500 {
2501 /* Unwind info attached to a text section. */
2502 struct
2503 {
2504 asection *arm_exidx_sec;
2505 } text;
2506
2507 /* Unwind info attached to an .ARM.exidx section. */
2508 struct
2509 {
2510 arm_unwind_table_edit *unwind_edit_list;
2511 arm_unwind_table_edit *unwind_edit_tail;
2512 } exidx;
2513 } u;
8e3de13a
NC		 2514}
2515_arm_elf_section_data;
e489d0ae
PB		 2516
2517#define elf32_arm_section_data(sec) \
8e3de13a 2518 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2519
48229727
JB		 2520/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2521 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2522 so may be created multiple times: we use an array of these entries whilst
2523 relaxing which we can refresh easily, then create stubs for each potentially
2524 erratum-triggering instruction once we've settled on a solution. */
2525
2526struct a8_erratum_fix {
2527 bfd *input_bfd;
2528 asection *section;
2529 bfd_vma offset;
2530 bfd_vma addend;
2531 unsigned long orig_insn;
2532 char *stub_name;
2533 enum elf32_arm_stub_type stub_type;
35fc36a8 2534 enum arm_st_branch_type branch_type;
48229727
JB		 2535};
2536
2537/* A table of relocs applied to branches which might trigger Cortex-A8
2538 erratum. */
2539
2540struct a8_erratum_reloc {
2541 bfd_vma from;
2542 bfd_vma destination;
92750f34
DJ		 2543 struct elf32_arm_link_hash_entry *hash;
2544 const char *sym_name;
48229727 2545 unsigned int r_type;
35fc36a8 2546 enum arm_st_branch_type branch_type;
48229727
JB		 2547 bfd_boolean non_a8_stub;
2548};
2549
ba93b8ac
DJ		 2550/* The size of the thread control block. */
2551#define TCB_SIZE 8
2552
0ffa91dd 2553struct elf_arm_obj_tdata
ba93b8ac
DJ		 2554{
2555 struct elf_obj_tdata root;
2556
2557 /* tls_type for each local got entry. */
2558 char *local_got_tls_type;
ee065d83 2559
0855e32b
NS		 2560 /* GOTPLT entries for TLS descriptors. */
2561 bfd_vma *local_tlsdesc_gotent;
2562
bf21ed78
MS		 2563 /* Zero to warn when linking objects with incompatible enum sizes. */
2564 int no_enum_size_warning;
a9dc9481
JM		 2565
2566 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2567 int no_wchar_size_warning;
ba93b8ac
DJ		 2568};
2569
0ffa91dd
NC		 2570#define elf_arm_tdata(bfd) \
2571 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2572
0ffa91dd
NC		 2573#define elf32_arm_local_got_tls_type(bfd) \
2574 (elf_arm_tdata (bfd)->local_got_tls_type)
2575
0855e32b
NS		 2576#define elf32_arm_local_tlsdesc_gotent(bfd) \
2577 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2578
0ffa91dd
NC		 2579#define is_arm_elf(bfd) \
2580 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2581 && elf_tdata (bfd) != NULL \
4dfe6ac6 2582 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2583
2584static bfd_boolean
2585elf32_arm_mkobject (bfd *abfd)
2586{
0ffa91dd 2587 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2588 ARM_ELF_DATA);
ba93b8ac
DJ		 2589}
2590
ba93b8ac
DJ		 2591#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2592
ba96a88f 2593/* Arm ELF linker hash entry. */
252b5132 2594struct elf32_arm_link_hash_entry
917583ad
NC		 2595 {
2596 struct elf_link_hash_entry root;
252b5132 2597
0bdcacaf
RS		 2598 /* Track dynamic relocs copied for this symbol. */
2599 struct elf_dyn_relocs *dyn_relocs;
b7693d02
DJ		 2600
2601 /* We reference count Thumb references to a PLT entry separately,
2602 so that we can emit the Thumb trampoline only if needed. */
2603 bfd_signed_vma plt_thumb_refcount;
2604
bd97cb95
DJ		 2605 /* Some references from Thumb code may be eliminated by BL->BLX
2606 conversion, so record them separately. */
2607 bfd_signed_vma plt_maybe_thumb_refcount;
2608
b7693d02
DJ		 2609 /* Since PLT entries have variable size if the Thumb prologue is
2610 used, we need to record the index into .got.plt instead of
2611 recomputing it from the PLT offset. */
2612 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2613
2614#define GOT_UNKNOWN 0
2615#define GOT_NORMAL 1
2616#define GOT_TLS_GD 2
2617#define GOT_TLS_IE 4
0855e32b
NS		 2618#define GOT_TLS_GDESC 8
2619#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
ba93b8ac 2620 unsigned char tls_type;
a4fd1a8e 2621
0855e32b
NS		 2622 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2623 starting at the end of the jump table. */
2624 bfd_vma tlsdesc_got;
2625
a4fd1a8e
PB		 2626 /* The symbol marking the real symbol location for exported thumb
2627 symbols with Arm stubs. */
2628 struct elf_link_hash_entry *export_glue;
906e58ca 2629
da5938a2 2630 /* A pointer to the most recently used stub hash entry against this
8029a119 2631 symbol. */
da5938a2 2632 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2633 };
252b5132 2634
252b5132 2635/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2636#define elf32_arm_link_hash_traverse(table, func, info) \
2637 (elf_link_hash_traverse \
2638 (&(table)->root, \
b7693d02 2639 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2640 (info)))
2641
2642/* Get the ARM elf linker hash table from a link_info structure. */
2643#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2644 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2645 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2646
906e58ca
NC		 2647#define arm_stub_hash_lookup(table, string, create, copy) \
2648 ((struct elf32_arm_stub_hash_entry *) \
2649 bfd_hash_lookup ((table), (string), (create), (copy)))
2650
21d799b5
NC		 2651/* Array to keep track of which stub sections have been created, and
2652 information on stub grouping. */
2653struct map_stub
2654{
2655 /* This is the section to which stubs in the group will be
2656 attached. */
2657 asection *link_sec;
2658 /* The stub section. */
2659 asection *stub_sec;
2660};
2661
0855e32b
NS		 2662#define elf32_arm_compute_jump_table_size(htab) \
2663 ((htab)->next_tls_desc_index * 4)
2664
9b485d32 2665/* ARM ELF linker hash table. */
252b5132 2666struct elf32_arm_link_hash_table
906e58ca
NC		 2667{
2668 /* The main hash table. */
2669 struct elf_link_hash_table root;
252b5132 2670
906e58ca
NC		 2671 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2672 bfd_size_type thumb_glue_size;
252b5132 2673
906e58ca
NC		 2674 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2675 bfd_size_type arm_glue_size;
252b5132 2676
906e58ca
NC		 2677 /* The size in bytes of section containing the ARMv4 BX veneers. */
2678 bfd_size_type bx_glue_size;
845b51d6 2679
906e58ca
NC		 2680 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2681 veneer has been populated. */
2682 bfd_vma bx_glue_offset[15];
845b51d6 2683
906e58ca
NC		 2684 /* The size in bytes of the section containing glue for VFP11 erratum
2685 veneers. */
2686 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2687
48229727
JB		 2688 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2689 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2690 elf32_arm_write_section(). */
2691 struct a8_erratum_fix *a8_erratum_fixes;
2692 unsigned int num_a8_erratum_fixes;
2693
906e58ca
NC		 2694 /* An arbitrary input BFD chosen to hold the glue sections. */
2695 bfd * bfd_of_glue_owner;
ba96a88f 2696
906e58ca
NC		 2697 /* Nonzero to output a BE8 image. */
2698 int byteswap_code;
e489d0ae 2699
906e58ca
NC		 2700 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2701 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2702 int target1_is_rel;
9c504268 2703
906e58ca
NC		 2704 /* The relocation to use for R_ARM_TARGET2 relocations. */
2705 int target2_reloc;
eb043451 2706
906e58ca
NC		 2707 /* 0 = Ignore R_ARM_V4BX.
2708 1 = Convert BX to MOV PC.
2709 2 = Generate v4 interworing stubs. */
2710 int fix_v4bx;
319850b4 2711
48229727
JB		 2712 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2713 int fix_cortex_a8;
2714
906e58ca
NC		 2715 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2716 int use_blx;
33bfe774 2717
906e58ca
NC		 2718 /* What sort of code sequences we should look for which may trigger the
2719 VFP11 denorm erratum. */
2720 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2721
906e58ca
NC		 2722 /* Global counter for the number of fixes we have emitted. */
2723 int num_vfp11_fixes;
c7b8f16e 2724
906e58ca
NC		 2725 /* Nonzero to force PIC branch veneers. */
2726 int pic_veneer;
27e55c4d 2727
906e58ca
NC		 2728 /* The number of bytes in the initial entry in the PLT. */
2729 bfd_size_type plt_header_size;
e5a52504 2730
906e58ca
NC		 2731 /* The number of bytes in the subsequent PLT etries. */
2732 bfd_size_type plt_entry_size;
e5a52504 2733
906e58ca
NC		 2734 /* True if the target system is VxWorks. */
2735 int vxworks_p;
00a97672 2736
906e58ca
NC		 2737 /* True if the target system is Symbian OS. */
2738 int symbian_p;
e5a52504 2739
906e58ca
NC		 2740 /* True if the target uses REL relocations. */
2741 int use_rel;
4e7fd91e 2742
0855e32b
NS		 2743 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2744 bfd_vma next_tls_desc_index;
2745
2746 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2747 bfd_vma num_tls_desc;
2748
906e58ca 2749 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2750 asection *sdynbss;
2751 asection *srelbss;
5e681ec4 2752
906e58ca
NC		 2753 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2754 asection *srelplt2;
00a97672 2755
0855e32b
NS		 2756 /* The offset into splt of the PLT entry for the TLS descriptor
2757 resolver. Special values are 0, if not necessary (or not found
2758 to be necessary yet), and -1 if needed but not determined
2759 yet. */
2760 bfd_vma dt_tlsdesc_plt;
2761
2762 /* The offset into sgot of the GOT entry used by the PLT entry
2763 above. */
2764 bfd_vma dt_tlsdesc_got;
2765
2766 /* Offset in .plt section of tls_arm_trampoline. */
2767 bfd_vma tls_trampoline;
2768
906e58ca
NC		 2769 /* Data for R_ARM_TLS_LDM32 relocations. */
2770 union
2771 {
2772 bfd_signed_vma refcount;
2773 bfd_vma offset;
2774 } tls_ldm_got;
b7693d02 2775
87d72d41
AM		 2776 /* Small local sym cache. */
2777 struct sym_cache sym_cache;
906e58ca
NC		 2778
2779 /* For convenience in allocate_dynrelocs. */
2780 bfd * obfd;
2781
0855e32b
NS		 2782 /* The amount of space used by the reserved portion of the sgotplt
2783 section, plus whatever space is used by the jump slots. */
2784 bfd_vma sgotplt_jump_table_size;
2785
906e58ca
NC		 2786 /* The stub hash table. */
2787 struct bfd_hash_table stub_hash_table;
2788
2789 /* Linker stub bfd. */
2790 bfd *stub_bfd;
2791
2792 /* Linker call-backs. */
2793 asection * (*add_stub_section) (const char *, asection *);
2794 void (*layout_sections_again) (void);
2795
2796 /* Array to keep track of which stub sections have been created, and
2797 information on stub grouping. */
21d799b5 2798 struct map_stub *stub_group;
906e58ca 2799
fe33d2fa
CL		 2800 /* Number of elements in stub_group. */
2801 int top_id;
2802
906e58ca
NC		 2803 /* Assorted information used by elf32_arm_size_stubs. */
2804 unsigned int bfd_count;
2805 int top_index;
2806 asection **input_list;
2807};
252b5132 2808
780a67af
NC		 2809/* Create an entry in an ARM ELF linker hash table. */
2810
2811static struct bfd_hash_entry *
57e8b36a
NC		 2812elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2813 struct bfd_hash_table * table,
2814 const char * string)
780a67af
NC		 2815{
2816 struct elf32_arm_link_hash_entry * ret =
2817 (struct elf32_arm_link_hash_entry *) entry;
2818
2819 /* Allocate the structure if it has not already been allocated by a
2820 subclass. */
906e58ca 2821 if (ret == NULL)
21d799b5
NC		 2822 ret = (struct elf32_arm_link_hash_entry *)
2823 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2824 if (ret == NULL)
780a67af
NC		 2825 return (struct bfd_hash_entry *) ret;
2826
2827 /* Call the allocation method of the superclass. */
2828 ret = ((struct elf32_arm_link_hash_entry *)
2829 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2830 table, string));
57e8b36a 2831 if (ret != NULL)
b7693d02 2832 {
0bdcacaf 2833 ret->dyn_relocs = NULL;
ba93b8ac 2834 ret->tls_type = GOT_UNKNOWN;
0855e32b 2835 ret->tlsdesc_got = (bfd_vma) -1;
b7693d02 2836 ret->plt_thumb_refcount = 0;
bd97cb95 2837 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2838 ret->plt_got_offset = -1;
a4fd1a8e 2839 ret->export_glue = NULL;
906e58ca
NC		 2840
2841 ret->stub_cache = NULL;
b7693d02 2842 }
780a67af
NC		 2843
2844 return (struct bfd_hash_entry *) ret;
2845}
2846
906e58ca
NC		 2847/* Initialize an entry in the stub hash table. */
2848
2849static struct bfd_hash_entry *
2850stub_hash_newfunc (struct bfd_hash_entry *entry,
2851 struct bfd_hash_table *table,
2852 const char *string)
2853{
2854 /* Allocate the structure if it has not already been allocated by a
2855 subclass. */
2856 if (entry == NULL)
2857 {
21d799b5
NC		 2858 entry = (struct bfd_hash_entry *)
2859 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 2860 if (entry == NULL)
2861 return entry;
2862 }
2863
2864 /* Call the allocation method of the superclass. */
2865 entry = bfd_hash_newfunc (entry, table, string);
2866 if (entry != NULL)
2867 {
2868 struct elf32_arm_stub_hash_entry *eh;
2869
2870 /* Initialize the local fields. */
2871 eh = (struct elf32_arm_stub_hash_entry *) entry;
2872 eh->stub_sec = NULL;
2873 eh->stub_offset = 0;
2874 eh->target_value = 0;
2875 eh->target_section = NULL;
cedfb179
DK		 2876 eh->target_addend = 0;
2877 eh->orig_insn = 0;
906e58ca 2878 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2879 eh->stub_size = 0;
2880 eh->stub_template = NULL;
2881 eh->stub_template_size = 0;
906e58ca
NC		 2882 eh->h = NULL;
2883 eh->id_sec = NULL;
d8d2f433 2884 eh->output_name = NULL;
906e58ca
NC		 2885 }
2886
2887 return entry;
2888}
2889
00a97672 2890/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2891 shortcuts to them in our hash table. */
2892
2893static bfd_boolean
57e8b36a 2894create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2895{
2896 struct elf32_arm_link_hash_table *htab;
2897
e5a52504 2898 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2899 if (htab == NULL)
2900 return FALSE;
2901
e5a52504
MM		 2902 /* BPABI objects never have a GOT, or associated sections. */
2903 if (htab->symbian_p)
2904 return TRUE;
2905
5e681ec4
PB		 2906 if (! _bfd_elf_create_got_section (dynobj, info))
2907 return FALSE;
2908
5e681ec4
PB		 2909 return TRUE;
2910}
2911
00a97672
RS		 2912/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2913 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2914 hash table. */
2915
2916static bfd_boolean
57e8b36a 2917elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2918{
2919 struct elf32_arm_link_hash_table *htab;
2920
2921 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2922 if (htab == NULL)
2923 return FALSE;
2924
362d30a1 2925 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 2926 return FALSE;
2927
2928 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2929 return FALSE;
2930
5e681ec4
PB		 2931 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2932 if (!info->shared)
00a97672
RS		 2933 htab->srelbss = bfd_get_section_by_name (dynobj,
2934 RELOC_SECTION (htab, ".bss"));
2935
2936 if (htab->vxworks_p)
2937 {
2938 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2939 return FALSE;
2940
2941 if (info->shared)
2942 {
2943 htab->plt_header_size = 0;
2944 htab->plt_entry_size
2945 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2946 }
2947 else
2948 {
2949 htab->plt_header_size
2950 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2951 htab->plt_entry_size
2952 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2953 }
2954 }
5e681ec4 2955
362d30a1
RS		 2956 if (!htab->root.splt
2957 || !htab->root.srelplt
e5a52504 2958 || !htab->sdynbss
5e681ec4
PB		 2959 || (!info->shared && !htab->srelbss))
2960 abort ();
2961
2962 return TRUE;
2963}
2964
906e58ca
NC		 2965/* Copy the extra info we tack onto an elf_link_hash_entry. */
2966
2967static void
2968elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2969 struct elf_link_hash_entry *dir,
2970 struct elf_link_hash_entry *ind)
2971{
2972 struct elf32_arm_link_hash_entry *edir, *eind;
2973
2974 edir = (struct elf32_arm_link_hash_entry *) dir;
2975 eind = (struct elf32_arm_link_hash_entry *) ind;
2976
0bdcacaf 2977 if (eind->dyn_relocs != NULL)
906e58ca 2978 {
0bdcacaf 2979 if (edir->dyn_relocs != NULL)
906e58ca 2980 {
0bdcacaf
RS		 2981 struct elf_dyn_relocs **pp;
2982 struct elf_dyn_relocs *p;
906e58ca
NC		 2983
2984 /* Add reloc counts against the indirect sym to the direct sym
2985 list. Merge any entries against the same section. */
0bdcacaf 2986 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 2987 {
0bdcacaf 2988 struct elf_dyn_relocs *q;
906e58ca 2989
0bdcacaf
RS		 2990 for (q = edir->dyn_relocs; q != NULL; q = q->next)
2991 if (q->sec == p->sec)
906e58ca
NC		 2992 {
2993 q->pc_count += p->pc_count;
2994 q->count += p->count;
2995 *pp = p->next;
2996 break;
2997 }
2998 if (q == NULL)
2999 pp = &p->next;
3000 }
0bdcacaf 3001 *pp = edir->dyn_relocs;
906e58ca
NC		 3002 }
3003
0bdcacaf
RS		 3004 edir->dyn_relocs = eind->dyn_relocs;
3005 eind->dyn_relocs = NULL;
906e58ca
NC		 3006 }
3007
3008 if (ind->root.type == bfd_link_hash_indirect)
3009 {
3010 /* Copy over PLT info. */
3011 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
3012 eind->plt_thumb_refcount = 0;
3013 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
3014 eind->plt_maybe_thumb_refcount = 0;
3015
3016 if (dir->got.refcount <= 0)
3017 {
3018 edir->tls_type = eind->tls_type;
3019 eind->tls_type = GOT_UNKNOWN;
3020 }
3021 }
3022
3023 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3024}
3025
3026/* Create an ARM elf linker hash table. */
3027
3028static struct bfd_link_hash_table *
3029elf32_arm_link_hash_table_create (bfd *abfd)
3030{
3031 struct elf32_arm_link_hash_table *ret;
3032 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3033
21d799b5 3034 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 3035 if (ret == NULL)
3036 return NULL;
3037
3038 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3039 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3040 sizeof (struct elf32_arm_link_hash_entry),
3041 ARM_ELF_DATA))
906e58ca
NC		 3042 {
3043 free (ret);
3044 return NULL;
3045 }
3046
906e58ca
NC		 3047 ret->sdynbss = NULL;
3048 ret->srelbss = NULL;
3049 ret->srelplt2 = NULL;
0855e32b
NS		 3050 ret->dt_tlsdesc_plt = 0;
3051 ret->dt_tlsdesc_got = 0;
3052 ret->tls_trampoline = 0;
3053 ret->next_tls_desc_index = 0;
3054 ret->num_tls_desc = 0;
906e58ca
NC		 3055 ret->thumb_glue_size = 0;
3056 ret->arm_glue_size = 0;
3057 ret->bx_glue_size = 0;
3058 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3059 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3060 ret->vfp11_erratum_glue_size = 0;
3061 ret->num_vfp11_fixes = 0;
48229727 3062 ret->fix_cortex_a8 = 0;
906e58ca
NC		 3063 ret->bfd_of_glue_owner = NULL;
3064 ret->byteswap_code = 0;
3065 ret->target1_is_rel = 0;
3066 ret->target2_reloc = R_ARM_NONE;
3067#ifdef FOUR_WORD_PLT
3068 ret->plt_header_size = 16;
3069 ret->plt_entry_size = 16;
3070#else
3071 ret->plt_header_size = 20;
3072 ret->plt_entry_size = 12;
3073#endif
3074 ret->fix_v4bx = 0;
3075 ret->use_blx = 0;
3076 ret->vxworks_p = 0;
3077 ret->symbian_p = 0;
3078 ret->use_rel = 1;
87d72d41 3079 ret->sym_cache.abfd = NULL;
906e58ca
NC		 3080 ret->obfd = abfd;
3081 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 3082 ret->stub_bfd = NULL;
3083 ret->add_stub_section = NULL;
3084 ret->layout_sections_again = NULL;
3085 ret->stub_group = NULL;
fe33d2fa 3086 ret->top_id = 0;
6cee0a6f
L		 3087 ret->bfd_count = 0;
3088 ret->top_index = 0;
3089 ret->input_list = NULL;
906e58ca
NC		 3090
3091 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3092 sizeof (struct elf32_arm_stub_hash_entry)))
3093 {
3094 free (ret);
3095 return NULL;
3096 }
3097
3098 return &ret->root.root;
3099}
3100
3101/* Free the derived linker hash table. */
3102
3103static void
3104elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3105{
3106 struct elf32_arm_link_hash_table *ret
3107 = (struct elf32_arm_link_hash_table *) hash;
3108
3109 bfd_hash_table_free (&ret->stub_hash_table);
3110 _bfd_generic_link_hash_table_free (hash);
3111}
3112
3113/* Determine if we're dealing with a Thumb only architecture. */
3114
3115static bfd_boolean
3116using_thumb_only (struct elf32_arm_link_hash_table *globals)
3117{
3118 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3119 Tag_CPU_arch);
3120 int profile;
3121
41ed1ee7
DJ		 3122 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3123 return TRUE;
3124
9e3c6df6 3125 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3126 return FALSE;
3127
3128 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3129 Tag_CPU_arch_profile);
3130
3131 return profile == 'M';
3132}
3133
3134/* Determine if we're dealing with a Thumb-2 object. */
3135
3136static bfd_boolean
3137using_thumb2 (struct elf32_arm_link_hash_table *globals)
3138{
3139 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3140 Tag_CPU_arch);
3141 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3142}
3143
cd1dac3d
DG		 3144/* Determine what kind of NOPs are available. */
3145
3146static bfd_boolean
3147arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3148{
3149 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3150 Tag_CPU_arch);
3151 return arch == TAG_CPU_ARCH_V6T2
3152 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3153 || arch == TAG_CPU_ARCH_V7
3154 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3155}
3156
3157static bfd_boolean
3158arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3159{
3160 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3161 Tag_CPU_arch);
9e3c6df6
PB		 3162 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3163 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3164}
3165
f4ac8484
DJ		 3166static bfd_boolean
3167arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3168{
3169 switch (stub_type)
3170 {
fea2b4d6
CL		 3171 case arm_stub_long_branch_thumb_only:
3172 case arm_stub_long_branch_v4t_thumb_arm:
3173 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 3174 case arm_stub_long_branch_v4t_thumb_arm_pic:
3175 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3176 return TRUE;
3177 case arm_stub_none:
3178 BFD_FAIL ();
3179 return FALSE;
3180 break;
3181 default:
3182 return FALSE;
3183 }
3184}
3185
906e58ca
NC		 3186/* Determine the type of stub needed, if any, for a call. */
3187
3188static enum elf32_arm_stub_type
3189arm_type_of_stub (struct bfd_link_info *info,
3190 asection *input_sec,
3191 const Elf_Internal_Rela *rel,
35fc36a8 3192 enum arm_st_branch_type *actual_branch_type,
906e58ca 3193 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3194 bfd_vma destination,
3195 asection *sym_sec,
3196 bfd *input_bfd,
3197 const char *name)
906e58ca
NC		 3198{
3199 bfd_vma location;
3200 bfd_signed_vma branch_offset;
3201 unsigned int r_type;
3202 struct elf32_arm_link_hash_table * globals;
3203 int thumb2;
3204 int thumb_only;
3205 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3206 int use_plt = 0;
35fc36a8 3207 enum arm_st_branch_type branch_type = *actual_branch_type;
906e58ca 3208
35fc36a8 3209 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3210 return stub_type;
3211
906e58ca 3212 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3213 if (globals == NULL)
3214 return stub_type;
906e58ca
NC		 3215
3216 thumb_only = using_thumb_only (globals);
3217
3218 thumb2 = using_thumb2 (globals);
3219
3220 /* Determine where the call point is. */
3221 location = (input_sec->output_offset
3222 + input_sec->output_section->vma
3223 + rel->r_offset);
3224
906e58ca
NC		 3225 r_type = ELF32_R_TYPE (rel->r_info);
3226
5fa9e92f 3227 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 3228 if (globals->root.splt != NULL
fe33d2fa
CL		 3229 && hash != NULL
3230 && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3231 {
3232 use_plt = 1;
fe33d2fa 3233
5fa9e92f
CL		 3234 /* Note when dealing with PLT entries: the main PLT stub is in
3235 ARM mode, so if the branch is in Thumb mode, another
3236 Thumb->ARM stub will be inserted later just before the ARM
3237 PLT stub. We don't take this extra distance into account
3238 here, because if a long branch stub is needed, we'll add a
3239 Thumb->Arm one and branch directly to the ARM PLT entry
3240 because it avoids spreading offset corrections in several
3241 places. */
fe33d2fa 3242
362d30a1
RS		 3243 destination = (globals->root.splt->output_section->vma
3244 + globals->root.splt->output_offset
fe33d2fa 3245 + hash->root.plt.offset);
35fc36a8 3246 branch_type = ST_BRANCH_TO_ARM;
5fa9e92f 3247 }
906e58ca 3248
fe33d2fa
CL		 3249 branch_offset = (bfd_signed_vma)(destination - location);
3250
0855e32b
NS		 3251 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3252 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3253 {
5fa9e92f
CL		 3254 /* Handle cases where:
3255 - this call goes too far (different Thumb/Thumb2 max
3256 distance)
155d87d7
CL		 3257 - it's a Thumb->Arm call and blx is not available, or it's a
3258 Thumb->Arm branch (not bl). A stub is needed in this case,
3259 but only if this call is not through a PLT entry. Indeed,
3260 PLT stubs handle mode switching already.
5fa9e92f 3261 */
906e58ca
NC		 3262 if ((!thumb2
3263 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3264 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3265 || (thumb2
3266 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3267 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3268 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3269 && (((r_type == R_ARM_THM_CALL
3270 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3271 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3272 && !use_plt))
906e58ca 3273 {
35fc36a8 3274 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3275 {
3276 /* Thumb to thumb. */
3277 if (!thumb_only)
3278 {
3279 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3280 /* PIC stubs. */
155d87d7
CL		 3281 ? ((globals->use_blx
3282 && (r_type ==R_ARM_THM_CALL))
3283 /* V5T and above. Stub starts with ARM code, so
3284 we must be able to switch mode before
3285 reaching it, which is only possible for 'bl'
3286 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3287 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3288 /* On V4T, use Thumb code only. */
d3626fb0 3289 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3290
3291 /* non-PIC stubs. */
155d87d7
CL		 3292 : ((globals->use_blx
3293 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3294 /* V5T and above. */
3295 ? arm_stub_long_branch_any_any
3296 /* V4T. */
d3626fb0 3297 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3298 }
3299 else
3300 {
3301 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3302 /* PIC stub. */
3303 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3304 /* non-PIC stub. */
3305 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3306 }
3307 }
3308 else
3309 {
3310 /* Thumb to arm. */
c820be07
NC		 3311 if (sym_sec != NULL
3312 && sym_sec->owner != NULL
3313 && !INTERWORK_FLAG (sym_sec->owner))
3314 {
3315 (*_bfd_error_handler)
3316 (_("%B(%s): warning: interworking not enabled.\n"
3317 " first occurrence: %B: Thumb call to ARM"),
3318 sym_sec->owner, input_bfd, name);
3319 }
3320
0855e32b
NS		 3321 stub_type =
3322 (info->shared | globals->pic_veneer)
c2b4a39d 3323 /* PIC stubs. */
0855e32b
NS		 3324 ? (r_type == R_ARM_THM_TLS_CALL
3325 /* TLS PIC stubs */
3326 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3327 : arm_stub_long_branch_v4t_thumb_tls_pic)
3328 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3329 /* V5T PIC and above. */
3330 ? arm_stub_long_branch_any_arm_pic
3331 /* V4T PIC stub. */
3332 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3333
3334 /* non-PIC stubs. */
0855e32b 3335 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3336 /* V5T and above. */
3337 ? arm_stub_long_branch_any_any
3338 /* V4T. */
3339 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3340
3341 /* Handle v4t short branches. */
fea2b4d6 3342 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3343 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3344 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3345 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3346 }
3347 }
3348 }
fe33d2fa
CL		 3349 else if (r_type == R_ARM_CALL
3350 || r_type == R_ARM_JUMP24
0855e32b
NS		 3351 || r_type == R_ARM_PLT32
3352 || r_type == R_ARM_TLS_CALL)
906e58ca 3353 {
35fc36a8 3354 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3355 {
3356 /* Arm to thumb. */
c820be07
NC		 3357
3358 if (sym_sec != NULL
3359 && sym_sec->owner != NULL
3360 && !INTERWORK_FLAG (sym_sec->owner))
3361 {
3362 (*_bfd_error_handler)
3363 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3364 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3365 sym_sec->owner, input_bfd, name);
3366 }
3367
3368 /* We have an extra 2-bytes reach because of
3369 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3370 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3371 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3372 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3373 || (r_type == R_ARM_JUMP24)
3374 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3375 {
3376 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3377 /* PIC stubs. */
ebe24dd4
CL		 3378 ? ((globals->use_blx)
3379 /* V5T and above. */
3380 ? arm_stub_long_branch_any_thumb_pic
3381 /* V4T stub. */
3382 : arm_stub_long_branch_v4t_arm_thumb_pic)
3383
c2b4a39d
CL		 3384 /* non-PIC stubs. */
3385 : ((globals->use_blx)
3386 /* V5T and above. */
3387 ? arm_stub_long_branch_any_any
3388 /* V4T. */
3389 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3390 }
3391 }
3392 else
3393 {
3394 /* Arm to arm. */
3395 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3396 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3397 {
0855e32b
NS		 3398 stub_type =
3399 (info->shared | globals->pic_veneer)
c2b4a39d 3400 /* PIC stubs. */
0855e32b
NS		 3401 ? (r_type == R_ARM_TLS_CALL
3402 /* TLS PIC Stub */
3403 ? arm_stub_long_branch_any_tls_pic
3404 : arm_stub_long_branch_any_arm_pic)
c2b4a39d 3405 /* non-PIC stubs. */
fea2b4d6 3406 : arm_stub_long_branch_any_any;
906e58ca
NC		 3407 }
3408 }
3409 }
3410
fe33d2fa
CL		 3411 /* If a stub is needed, record the actual destination type. */
3412 if (stub_type != arm_stub_none)
35fc36a8 3413 *actual_branch_type = branch_type;
fe33d2fa 3414
906e58ca
NC		 3415 return stub_type;
3416}
3417
3418/* Build a name for an entry in the stub hash table. */
3419
3420static char *
3421elf32_arm_stub_name (const asection *input_section,
3422 const asection *sym_sec,
3423 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3424 const Elf_Internal_Rela *rel,
3425 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3426{
3427 char *stub_name;
3428 bfd_size_type len;
3429
3430 if (hash)
3431 {
fe33d2fa 3432 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3433 stub_name = (char *) bfd_malloc (len);
906e58ca 3434 if (stub_name != NULL)
fe33d2fa 3435 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3436 input_section->id & 0xffffffff,
3437 hash->root.root.root.string,
fe33d2fa
CL		 3438 (int) rel->r_addend & 0xffffffff,
3439 (int) stub_type);
906e58ca
NC		 3440 }
3441 else
3442 {
fe33d2fa 3443 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3444 stub_name = (char *) bfd_malloc (len);
906e58ca 3445 if (stub_name != NULL)
fe33d2fa 3446 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3447 input_section->id & 0xffffffff,
3448 sym_sec->id & 0xffffffff,
0855e32b
NS		 3449 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3450 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3451 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3452 (int) rel->r_addend & 0xffffffff,
3453 (int) stub_type);
906e58ca
NC		 3454 }
3455
3456 return stub_name;
3457}
3458
3459/* Look up an entry in the stub hash. Stub entries are cached because
3460 creating the stub name takes a bit of time. */
3461
3462static struct elf32_arm_stub_hash_entry *
3463elf32_arm_get_stub_entry (const asection *input_section,
3464 const asection *sym_sec,
3465 struct elf_link_hash_entry *hash,
3466 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3467 struct elf32_arm_link_hash_table *htab,
3468 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3469{
3470 struct elf32_arm_stub_hash_entry *stub_entry;
3471 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3472 const asection *id_sec;
3473
3474 if ((input_section->flags & SEC_CODE) == 0)
3475 return NULL;
3476
3477 /* If this input section is part of a group of sections sharing one
3478 stub section, then use the id of the first section in the group.
3479 Stub names need to include a section id, as there may well be
3480 more than one stub used to reach say, printf, and we need to
3481 distinguish between them. */
3482 id_sec = htab->stub_group[input_section->id].link_sec;
3483
3484 if (h != NULL && h->stub_cache != NULL
3485 && h->stub_cache->h == h
fe33d2fa
CL		 3486 && h->stub_cache->id_sec == id_sec
3487 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3488 {
3489 stub_entry = h->stub_cache;
3490 }
3491 else
3492 {
3493 char *stub_name;
3494
fe33d2fa 3495 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3496 if (stub_name == NULL)
3497 return NULL;
3498
3499 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3500 stub_name, FALSE, FALSE);
3501 if (h != NULL)
3502 h->stub_cache = stub_entry;
3503
3504 free (stub_name);
3505 }
3506
3507 return stub_entry;
3508}
3509
48229727
JB		 3510/* Find or create a stub section. Returns a pointer to the stub section, and
3511 the section to which the stub section will be attached (in *LINK_SEC_P).
3512 LINK_SEC_P may be NULL. */
906e58ca 3513
48229727
JB		 3514static asection *
3515elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3516 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3517{
3518 asection *link_sec;
3519 asection *stub_sec;
906e58ca
NC		 3520
3521 link_sec = htab->stub_group[section->id].link_sec;
3522 stub_sec = htab->stub_group[section->id].stub_sec;
3523 if (stub_sec == NULL)
3524 {
3525 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3526 if (stub_sec == NULL)
3527 {
3528 size_t namelen;
3529 bfd_size_type len;
3530 char *s_name;
3531
3532 namelen = strlen (link_sec->name);
3533 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3534 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3535 if (s_name == NULL)
3536 return NULL;
3537
3538 memcpy (s_name, link_sec->name, namelen);
3539 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3540 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3541 if (stub_sec == NULL)
3542 return NULL;
3543 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3544 }
3545 htab->stub_group[section->id].stub_sec = stub_sec;
3546 }
48229727
JB		 3547
3548 if (link_sec_p)
3549 *link_sec_p = link_sec;
3550
3551 return stub_sec;
3552}
3553
3554/* Add a new stub entry to the stub hash. Not all fields of the new
3555 stub entry are initialised. */
3556
3557static struct elf32_arm_stub_hash_entry *
3558elf32_arm_add_stub (const char *stub_name,
3559 asection *section,
3560 struct elf32_arm_link_hash_table *htab)
3561{
3562 asection *link_sec;
3563 asection *stub_sec;
3564 struct elf32_arm_stub_hash_entry *stub_entry;
3565
3566 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3567 if (stub_sec == NULL)
3568 return NULL;
906e58ca
NC		 3569
3570 /* Enter this entry into the linker stub hash table. */
3571 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3572 TRUE, FALSE);
3573 if (stub_entry == NULL)
3574 {
3575 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3576 section->owner,
3577 stub_name);
3578 return NULL;
3579 }
3580
3581 stub_entry->stub_sec = stub_sec;
3582 stub_entry->stub_offset = 0;
3583 stub_entry->id_sec = link_sec;
3584
906e58ca
NC		 3585 return stub_entry;
3586}
3587
3588/* Store an Arm insn into an output section not processed by
3589 elf32_arm_write_section. */
3590
3591static void
8029a119
NC		 3592put_arm_insn (struct elf32_arm_link_hash_table * htab,
3593 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3594{
3595 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3596 bfd_putl32 (val, ptr);
3597 else
3598 bfd_putb32 (val, ptr);
3599}
3600
3601/* Store a 16-bit Thumb insn into an output section not processed by
3602 elf32_arm_write_section. */
3603
3604static void
8029a119
NC		 3605put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3606 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3607{
3608 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3609 bfd_putl16 (val, ptr);
3610 else
3611 bfd_putb16 (val, ptr);
3612}
3613
0855e32b
NS		 3614/* If it's possible to change R_TYPE to a more efficient access
3615 model, return the new reloc type. */
3616
3617static unsigned
3618elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
3619 struct elf_link_hash_entry *h)
3620{
3621 int is_local = (h == NULL);
3622
3623 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
3624 return r_type;
3625
3626 /* We do not support relaxations for Old TLS models. */
3627 switch (r_type)
3628 {
3629 case R_ARM_TLS_GOTDESC:
3630 case R_ARM_TLS_CALL:
3631 case R_ARM_THM_TLS_CALL:
3632 case R_ARM_TLS_DESCSEQ:
3633 case R_ARM_THM_TLS_DESCSEQ:
3634 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
3635 }
3636
3637 return r_type;
3638}
3639
48229727
JB		 3640static bfd_reloc_status_type elf32_arm_final_link_relocate
3641 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3642 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
35fc36a8
RS		 3643 const char *, enum arm_st_branch_type, struct elf_link_hash_entry *,
3644 bfd_boolean *, char **);
48229727 3645
4563a860
JB		 3646static unsigned int
3647arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
3648{
3649 switch (stub_type)
3650 {
3651 case arm_stub_a8_veneer_b_cond:
3652 case arm_stub_a8_veneer_b:
3653 case arm_stub_a8_veneer_bl:
3654 return 2;
3655
3656 case arm_stub_long_branch_any_any:
3657 case arm_stub_long_branch_v4t_arm_thumb:
3658 case arm_stub_long_branch_thumb_only:
3659 case arm_stub_long_branch_v4t_thumb_thumb:
3660 case arm_stub_long_branch_v4t_thumb_arm:
3661 case arm_stub_short_branch_v4t_thumb_arm:
3662 case arm_stub_long_branch_any_arm_pic:
3663 case arm_stub_long_branch_any_thumb_pic:
3664 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3665 case arm_stub_long_branch_v4t_arm_thumb_pic:
3666 case arm_stub_long_branch_v4t_thumb_arm_pic:
3667 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 3668 case arm_stub_long_branch_any_tls_pic:
3669 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 3670 case arm_stub_a8_veneer_blx:
3671 return 4;
3672
3673 default:
3674 abort (); /* Should be unreachable. */
3675 }
3676}
3677
906e58ca
NC		 3678static bfd_boolean
3679arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3680 void * in_arg)
3681{
48229727 3682#define MAXRELOCS 2
906e58ca 3683 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3684 struct elf32_arm_link_hash_table *globals;
906e58ca 3685 struct bfd_link_info *info;
906e58ca
NC		 3686 asection *stub_sec;
3687 bfd *stub_bfd;
906e58ca
NC		 3688 bfd_byte *loc;
3689 bfd_vma sym_value;
3690 int template_size;
3691 int size;
d3ce72d0 3692 const insn_sequence *template_sequence;
906e58ca 3693 int i;
48229727
JB		 3694 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3695 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3696 int nrelocs = 0;
906e58ca
NC		 3697
3698 /* Massage our args to the form they really have. */
3699 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3700 info = (struct bfd_link_info *) in_arg;
3701
3702 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3703 if (globals == NULL)
3704 return FALSE;
906e58ca 3705
906e58ca
NC		 3706 stub_sec = stub_entry->stub_sec;
3707
4dfe6ac6 3708 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 3709 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
3710 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 3711 return TRUE;
fe33d2fa 3712
906e58ca
NC		 3713 /* Make a note of the offset within the stubs for this entry. */
3714 stub_entry->stub_offset = stub_sec->size;
3715 loc = stub_sec->contents + stub_entry->stub_offset;
3716
3717 stub_bfd = stub_sec->owner;
3718
906e58ca
NC		 3719 /* This is the address of the stub destination. */
3720 sym_value = (stub_entry->target_value
3721 + stub_entry->target_section->output_offset
3722 + stub_entry->target_section->output_section->vma);
3723
d3ce72d0 3724 template_sequence = stub_entry->stub_template;
461a49ca 3725 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3726
3727 size = 0;
461a49ca 3728 for (i = 0; i < template_size; i++)
906e58ca 3729 {
d3ce72d0 3730 switch (template_sequence[i].type)
461a49ca
DJ		 3731 {
3732 case THUMB16_TYPE:
48229727 3733 {
d3ce72d0
NC		 3734 bfd_vma data = (bfd_vma) template_sequence[i].data;
3735 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 3736 {
3737 /* We've borrowed the reloc_addend field to mean we should
3738 insert a condition code into this (Thumb-1 branch)
3739 instruction. See THUMB16_BCOND_INSN. */
3740 BFD_ASSERT ((data & 0xff00) == 0xd000);
3741 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3742 }
fe33d2fa 3743 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 3744 size += 2;
3745 }
461a49ca 3746 break;
906e58ca 3747
48229727 3748 case THUMB32_TYPE:
fe33d2fa
CL		 3749 bfd_put_16 (stub_bfd,
3750 (template_sequence[i].data >> 16) & 0xffff,
3751 loc + size);
3752 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
3753 loc + size + 2);
d3ce72d0 3754 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 3755 {
3756 stub_reloc_idx[nrelocs] = i;
3757 stub_reloc_offset[nrelocs++] = size;
3758 }
3759 size += 4;
3760 break;
3761
461a49ca 3762 case ARM_TYPE:
fe33d2fa
CL		 3763 bfd_put_32 (stub_bfd, template_sequence[i].data,
3764 loc + size);
461a49ca
DJ		 3765 /* Handle cases where the target is encoded within the
3766 instruction. */
d3ce72d0 3767 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 3768 {
48229727
JB		 3769 stub_reloc_idx[nrelocs] = i;
3770 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3771 }
3772 size += 4;
3773 break;
3774
3775 case DATA_TYPE:
d3ce72d0 3776 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 3777 stub_reloc_idx[nrelocs] = i;
3778 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3779 size += 4;
3780 break;
3781
3782 default:
3783 BFD_FAIL ();
3784 return FALSE;
3785 }
906e58ca 3786 }
461a49ca 3787
906e58ca
NC		 3788 stub_sec->size += size;
3789
461a49ca
DJ		 3790 /* Stub size has already been computed in arm_size_one_stub. Check
3791 consistency. */
3792 BFD_ASSERT (size == stub_entry->stub_size);
3793
906e58ca 3794 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 3795 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3796 sym_value |= 1;
3797
48229727
JB		 3798 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3799 in each stub. */
3800 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3801
48229727 3802 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 3803 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3804 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3805 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3806 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 3807 {
3808 Elf_Internal_Rela rel;
3809 bfd_boolean unresolved_reloc;
3810 char *error_message;
35fc36a8
RS		 3811 enum arm_st_branch_type branch_type
3812 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
3813 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 3814 bfd_vma points_to = sym_value + stub_entry->target_addend;
3815
3816 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 3817 rel.r_info = ELF32_R_INFO (0,
3818 template_sequence[stub_reloc_idx[i]].r_type);
3819 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 3820
3821 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3822 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3823 template should refer back to the instruction after the original
3824 branch. */
3825 points_to = sym_value;
3826
33c6a8fc
JB		 3827 /* There may be unintended consequences if this is not true. */
3828 BFD_ASSERT (stub_entry->h == NULL);
3829
48229727
JB		 3830 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3831 properly. We should probably use this function unconditionally,
3832 rather than only for certain relocations listed in the enclosing
3833 conditional, for the sake of consistency. */
3834 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3835 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 3836 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
35fc36a8 3837 points_to, info, stub_entry->target_section, "", branch_type,
33c6a8fc 3838 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3839 &error_message);
3840 }
3841 else
3842 {
fe33d2fa
CL		 3843 Elf_Internal_Rela rel;
3844 bfd_boolean unresolved_reloc;
3845 char *error_message;
3846 bfd_vma points_to = sym_value + stub_entry->target_addend
3847 + template_sequence[stub_reloc_idx[i]].reloc_addend;
3848
3849 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3850 rel.r_info = ELF32_R_INFO (0,
3851 template_sequence[stub_reloc_idx[i]].r_type);
3852 rel.r_addend = 0;
3853
3854 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3855 (template_sequence[stub_reloc_idx[i]].r_type),
3856 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
35fc36a8
RS		 3857 points_to, info, stub_entry->target_section, "",
3858 stub_entry->branch_type,
fe33d2fa
CL		 3859 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3860 &error_message);
48229727 3861 }
906e58ca
NC		 3862
3863 return TRUE;
48229727 3864#undef MAXRELOCS
906e58ca
NC		 3865}
3866
48229727
JB		 3867/* Calculate the template, template size and instruction size for a stub.
3868 Return value is the instruction size. */
906e58ca 3869
48229727
JB		 3870static unsigned int
3871find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3872 const insn_sequence **stub_template,
3873 int *stub_template_size)
906e58ca 3874{
d3ce72d0 3875 const insn_sequence *template_sequence = NULL;
48229727
JB		 3876 int template_size = 0, i;
3877 unsigned int size;
906e58ca 3878
d3ce72d0 3879 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 3880 if (stub_template)
3881 *stub_template = template_sequence;
3882
48229727 3883 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 3884 if (stub_template_size)
3885 *stub_template_size = template_size;
906e58ca
NC		 3886
3887 size = 0;
461a49ca
DJ		 3888 for (i = 0; i < template_size; i++)
3889 {
d3ce72d0 3890 switch (template_sequence[i].type)
461a49ca
DJ		 3891 {
3892 case THUMB16_TYPE:
3893 size += 2;
3894 break;
3895
3896 case ARM_TYPE:
48229727 3897 case THUMB32_TYPE:
461a49ca
DJ		 3898 case DATA_TYPE:
3899 size += 4;
3900 break;
3901
3902 default:
3903 BFD_FAIL ();
2a229407 3904 return 0;
461a49ca
DJ		 3905 }
3906 }
3907
48229727
JB		 3908 return size;
3909}
3910
3911/* As above, but don't actually build the stub. Just bump offset so
3912 we know stub section sizes. */
3913
3914static bfd_boolean
3915arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 3916 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 3917{
3918 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 3919 const insn_sequence *template_sequence;
48229727
JB		 3920 int template_size, size;
3921
3922 /* Massage our args to the form they really have. */
3923 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 3924
3925 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3926 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3927
d3ce72d0 3928 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 3929 &template_size);
3930
461a49ca 3931 stub_entry->stub_size = size;
d3ce72d0 3932 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 3933 stub_entry->stub_template_size = template_size;
3934
906e58ca
NC		 3935 size = (size + 7) & ~7;
3936 stub_entry->stub_sec->size += size;
461a49ca 3937
906e58ca
NC		 3938 return TRUE;
3939}
3940
3941/* External entry points for sizing and building linker stubs. */
3942
3943/* Set up various things so that we can make a list of input sections
3944 for each output section included in the link. Returns -1 on error,
3945 0 when no stubs will be needed, and 1 on success. */
3946
3947int
3948elf32_arm_setup_section_lists (bfd *output_bfd,
3949 struct bfd_link_info *info)
3950{
3951 bfd *input_bfd;
3952 unsigned int bfd_count;
3953 int top_id, top_index;
3954 asection *section;
3955 asection **input_list, **list;
3956 bfd_size_type amt;
3957 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3958
4dfe6ac6
NC		 3959 if (htab == NULL)
3960 return 0;
906e58ca
NC		 3961 if (! is_elf_hash_table (htab))
3962 return 0;
3963
3964 /* Count the number of input BFDs and find the top input section id. */
3965 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3966 input_bfd != NULL;
3967 input_bfd = input_bfd->link_next)
3968 {
3969 bfd_count += 1;
3970 for (section = input_bfd->sections;
3971 section != NULL;
3972 section = section->next)
3973 {
3974 if (top_id < section->id)
3975 top_id = section->id;
3976 }
3977 }
3978 htab->bfd_count = bfd_count;
3979
3980 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 3981 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 3982 if (htab->stub_group == NULL)
3983 return -1;
fe33d2fa 3984 htab->top_id = top_id;
906e58ca
NC		 3985
3986 /* We can't use output_bfd->section_count here to find the top output
3987 section index as some sections may have been removed, and
3988 _bfd_strip_section_from_output doesn't renumber the indices. */
3989 for (section = output_bfd->sections, top_index = 0;
3990 section != NULL;
3991 section = section->next)
3992 {
3993 if (top_index < section->index)
3994 top_index = section->index;
3995 }
3996
3997 htab->top_index = top_index;
3998 amt = sizeof (asection *) * (top_index + 1);
21d799b5 3999 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4000 htab->input_list = input_list;
4001 if (input_list == NULL)
4002 return -1;
4003
4004 /* For sections we aren't interested in, mark their entries with a
4005 value we can check later. */
4006 list = input_list + top_index;
4007 do
4008 *list = bfd_abs_section_ptr;
4009 while (list-- != input_list);
4010
4011 for (section = output_bfd->sections;
4012 section != NULL;
4013 section = section->next)
4014 {
4015 if ((section->flags & SEC_CODE) != 0)
4016 input_list[section->index] = NULL;
4017 }
4018
4019 return 1;
4020}
4021
4022/* The linker repeatedly calls this function for each input section,
4023 in the order that input sections are linked into output sections.
4024 Build lists of input sections to determine groupings between which
4025 we may insert linker stubs. */
4026
4027void
4028elf32_arm_next_input_section (struct bfd_link_info *info,
4029 asection *isec)
4030{
4031 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4032
4dfe6ac6
NC		 4033 if (htab == NULL)
4034 return;
4035
906e58ca
NC		 4036 if (isec->output_section->index <= htab->top_index)
4037 {
4038 asection **list = htab->input_list + isec->output_section->index;
4039
a7470592 4040 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4041 {
4042 /* Steal the link_sec pointer for our list. */
4043#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4044 /* This happens to make the list in reverse order,
07d72278 4045 which we reverse later. */
906e58ca
NC		 4046 PREV_SEC (isec) = *list;
4047 *list = isec;
4048 }
4049 }
4050}
4051
4052/* See whether we can group stub sections together. Grouping stub
4053 sections may result in fewer stubs. More importantly, we need to
07d72278 4054 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4055 .fini output sections respectively, because glibc splits the
4056 _init and _fini functions into multiple parts. Putting a stub in
4057 the middle of a function is not a good idea. */
4058
4059static void
4060group_sections (struct elf32_arm_link_hash_table *htab,
4061 bfd_size_type stub_group_size,
07d72278 4062 bfd_boolean stubs_always_after_branch)
906e58ca 4063{
07d72278 4064 asection **list = htab->input_list;
906e58ca
NC		 4065
4066 do
4067 {
4068 asection *tail = *list;
07d72278 4069 asection *head;
906e58ca
NC		 4070
4071 if (tail == bfd_abs_section_ptr)
4072 continue;
4073
07d72278
DJ		 4074 /* Reverse the list: we must avoid placing stubs at the
4075 beginning of the section because the beginning of the text
4076 section may be required for an interrupt vector in bare metal
4077 code. */
4078#define NEXT_SEC PREV_SEC
e780aef2
CL		 4079 head = NULL;
4080 while (tail != NULL)
4081 {
4082 /* Pop from tail. */
4083 asection *item = tail;
4084 tail = PREV_SEC (item);
4085
4086 /* Push on head. */
4087 NEXT_SEC (item) = head;
4088 head = item;
4089 }
07d72278
DJ		 4090
4091 while (head != NULL)
906e58ca
NC		 4092 {
4093 asection *curr;
07d72278 4094 asection *next;
e780aef2
CL		 4095 bfd_vma stub_group_start = head->output_offset;
4096 bfd_vma end_of_next;
906e58ca 4097
07d72278 4098 curr = head;
e780aef2 4099 while (NEXT_SEC (curr) != NULL)
8cd931b7 4100 {
e780aef2
CL		 4101 next = NEXT_SEC (curr);
4102 end_of_next = next->output_offset + next->size;
4103 if (end_of_next - stub_group_start >= stub_group_size)
4104 /* End of NEXT is too far from start, so stop. */
8cd931b7 4105 break;
e780aef2
CL		 4106 /* Add NEXT to the group. */
4107 curr = next;
8cd931b7 4108 }
906e58ca 4109
07d72278 4110 /* OK, the size from the start to the start of CURR is less
906e58ca 4111 than stub_group_size and thus can be handled by one stub
07d72278 4112 section. (Or the head section is itself larger than
906e58ca
NC		 4113 stub_group_size, in which case we may be toast.)
4114 We should really be keeping track of the total size of
4115 stubs added here, as stubs contribute to the final output
7fb9f789 4116 section size. */
906e58ca
NC		 4117 do
4118 {
07d72278 4119 next = NEXT_SEC (head);
906e58ca 4120 /* Set up this stub group. */
07d72278 4121 htab->stub_group[head->id].link_sec = curr;
906e58ca 4122 }
07d72278 4123 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4124
4125 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4126 bytes after the stub section can be handled by it too. */
4127 if (!stubs_always_after_branch)
906e58ca 4128 {
e780aef2
CL		 4129 stub_group_start = curr->output_offset + curr->size;
4130
8cd931b7 4131 while (next != NULL)
906e58ca 4132 {
e780aef2
CL		 4133 end_of_next = next->output_offset + next->size;
4134 if (end_of_next - stub_group_start >= stub_group_size)
4135 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4136 break;
e780aef2 4137 /* Add NEXT to the stub group. */
07d72278
DJ		 4138 head = next;
4139 next = NEXT_SEC (head);
4140 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4141 }
4142 }
07d72278 4143 head = next;
906e58ca
NC		 4144 }
4145 }
07d72278 4146 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4147
4148 free (htab->input_list);
4149#undef PREV_SEC
07d72278 4150#undef NEXT_SEC
906e58ca
NC		 4151}
4152
48229727
JB		 4153/* Comparison function for sorting/searching relocations relating to Cortex-A8
4154 erratum fix. */
4155
4156static int
4157a8_reloc_compare (const void *a, const void *b)
4158{
21d799b5
NC		 4159 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4160 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4161
4162 if (ra->from < rb->from)
4163 return -1;
4164 else if (ra->from > rb->from)
4165 return 1;
4166 else
4167 return 0;
4168}
4169
4170static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4171 const char *, char **);
4172
4173/* Helper function to scan code for sequences which might trigger the Cortex-A8
4174 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4175 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4176 otherwise. */
4177
81694485
NC		 4178static bfd_boolean
4179cortex_a8_erratum_scan (bfd *input_bfd,
4180 struct bfd_link_info *info,
48229727
JB		 4181 struct a8_erratum_fix **a8_fixes_p,
4182 unsigned int *num_a8_fixes_p,
4183 unsigned int *a8_fix_table_size_p,
4184 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4185 unsigned int num_a8_relocs,
4186 unsigned prev_num_a8_fixes,
4187 bfd_boolean *stub_changed_p)
48229727
JB		 4188{
4189 asection *section;
4190 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4191 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4192 unsigned int num_a8_fixes = *num_a8_fixes_p;
4193 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4194
4dfe6ac6
NC		 4195 if (htab == NULL)
4196 return FALSE;
4197
48229727
JB		 4198 for (section = input_bfd->sections;
4199 section != NULL;
4200 section = section->next)
4201 {
4202 bfd_byte *contents = NULL;
4203 struct _arm_elf_section_data *sec_data;
4204 unsigned int span;
4205 bfd_vma base_vma;
4206
4207 if (elf_section_type (section) != SHT_PROGBITS
4208 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4209 || (section->flags & SEC_EXCLUDE) != 0
4210 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4211 || (section->output_section == bfd_abs_section_ptr))
4212 continue;
4213
4214 base_vma = section->output_section->vma + section->output_offset;
4215
4216 if (elf_section_data (section)->this_hdr.contents != NULL)
4217 contents = elf_section_data (section)->this_hdr.contents;
4218 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4219 return TRUE;
48229727
JB		 4220
4221 sec_data = elf32_arm_section_data (section);
4222
4223 for (span = 0; span < sec_data->mapcount; span++)
4224 {
4225 unsigned int span_start = sec_data->map[span].vma;
4226 unsigned int span_end = (span == sec_data->mapcount - 1)
4227 ? section->size : sec_data->map[span + 1].vma;
4228 unsigned int i;
4229 char span_type = sec_data->map[span].type;
4230 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4231
4232 if (span_type != 't')
4233 continue;
4234
4235 /* Span is entirely within a single 4KB region: skip scanning. */
4236 if (((base_vma + span_start) & ~0xfff)
4237 == ((base_vma + span_end) & ~0xfff))
4238 continue;
4239
4240 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4241
4242 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4243 * The branch target is in the same 4KB region as the
4244 first half of the branch.
4245 * The instruction before the branch is a 32-bit
81694485 4246 length non-branch instruction. */
48229727
JB		 4247 for (i = span_start; i < span_end;)
4248 {
4249 unsigned int insn = bfd_getl16 (&contents[i]);
4250 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4251 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4252
4253 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4254 insn_32bit = TRUE;
4255
4256 if (insn_32bit)
4257 {
4258 /* Load the rest of the insn (in manual-friendly order). */
4259 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4260
4261 /* Encoding T4: B<c>.W. */
4262 is_b = (insn & 0xf800d000) == 0xf0009000;
4263 /* Encoding T1: BL<c>.W. */
4264 is_bl = (insn & 0xf800d000) == 0xf000d000;
4265 /* Encoding T2: BLX<c>.W. */
4266 is_blx = (insn & 0xf800d000) == 0xf000c000;
4267 /* Encoding T3: B<c>.W (not permitted in IT block). */
4268 is_bcc = (insn & 0xf800d000) == 0xf0008000
4269 && (insn & 0x07f00000) != 0x03800000;
4270 }
4271
4272 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4273
81694485
NC		 4274 if (((base_vma + i) & 0xfff) == 0xffe
4275 && insn_32bit
4276 && is_32bit_branch
4277 && last_was_32bit
4278 && ! last_was_branch)
48229727 4279 {
8f73510c 4280 bfd_signed_vma offset = 0;
48229727
JB		 4281 bfd_boolean force_target_arm = FALSE;
4282 bfd_boolean force_target_thumb = FALSE;
4283 bfd_vma target;
4284 enum elf32_arm_stub_type stub_type = arm_stub_none;
4285 struct a8_erratum_reloc key, *found;
4286
4287 key.from = base_vma + i;
21d799b5
NC		 4288 found = (struct a8_erratum_reloc *)
4289 bsearch (&key, a8_relocs, num_a8_relocs,
4290 sizeof (struct a8_erratum_reloc),
4291 &a8_reloc_compare);
48229727
JB		 4292
4293 if (found)
4294 {
4295 char *error_message = NULL;
4296 struct elf_link_hash_entry *entry;
92750f34 4297 bfd_boolean use_plt = FALSE;
48229727
JB		 4298
4299 /* We don't care about the error returned from this
4300 function, only if there is glue or not. */
4301 entry = find_thumb_glue (info, found->sym_name,
4302 &error_message);
4303
4304 if (entry)
4305 found->non_a8_stub = TRUE;
4306
92750f34 4307 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4308 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4309 && found->hash->root.plt.offset != (bfd_vma) -1)
4310 use_plt = TRUE;
4311
4312 if (found->r_type == R_ARM_THM_CALL)
4313 {
35fc36a8
RS		 4314 if (found->branch_type == ST_BRANCH_TO_ARM
4315 || use_plt)
92750f34
DJ		 4316 force_target_arm = TRUE;
4317 else
4318 force_target_thumb = TRUE;
4319 }
48229727
JB		 4320 }
4321
4322 /* Check if we have an offending branch instruction. */
4323
4324 if (found && found->non_a8_stub)
4325 /* We've already made a stub for this instruction, e.g.
4326 it's a long branch or a Thumb->ARM stub. Assume that
4327 stub will suffice to work around the A8 erratum (see
4328 setting of always_after_branch above). */
4329 ;
4330 else if (is_bcc)
4331 {
4332 offset = (insn & 0x7ff) << 1;
4333 offset |= (insn & 0x3f0000) >> 4;
4334 offset |= (insn & 0x2000) ? 0x40000 : 0;
4335 offset |= (insn & 0x800) ? 0x80000 : 0;
4336 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4337 if (offset & 0x100000)
81694485 4338 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4339 stub_type = arm_stub_a8_veneer_b_cond;
4340 }
4341 else if (is_b || is_bl || is_blx)
4342 {
4343 int s = (insn & 0x4000000) != 0;
4344 int j1 = (insn & 0x2000) != 0;
4345 int j2 = (insn & 0x800) != 0;
4346 int i1 = !(j1 ^ s);
4347 int i2 = !(j2 ^ s);
4348
4349 offset = (insn & 0x7ff) << 1;
4350 offset |= (insn & 0x3ff0000) >> 4;
4351 offset |= i2 << 22;
4352 offset |= i1 << 23;
4353 offset |= s << 24;
4354 if (offset & 0x1000000)
81694485 4355 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4356
4357 if (is_blx)
81694485 4358 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4359
4360 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4361 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4362 }
4363
4364 if (stub_type != arm_stub_none)
4365 {
4366 bfd_vma pc_for_insn = base_vma + i + 4;
4367
4368 /* The original instruction is a BL, but the target is
4369 an ARM instruction. If we were not making a stub,
4370 the BL would have been converted to a BLX. Use the
4371 BLX stub instead in that case. */
4372 if (htab->use_blx && force_target_arm
4373 && stub_type == arm_stub_a8_veneer_bl)
4374 {
4375 stub_type = arm_stub_a8_veneer_blx;
4376 is_blx = TRUE;
4377 is_bl = FALSE;
4378 }
4379 /* Conversely, if the original instruction was
4380 BLX but the target is Thumb mode, use the BL
4381 stub. */
4382 else if (force_target_thumb
4383 && stub_type == arm_stub_a8_veneer_blx)
4384 {
4385 stub_type = arm_stub_a8_veneer_bl;
4386 is_blx = FALSE;
4387 is_bl = TRUE;
4388 }
4389
4390 if (is_blx)
81694485 4391 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4392
4393 /* If we found a relocation, use the proper destination,
4394 not the offset in the (unrelocated) instruction.
4395 Note this is always done if we switched the stub type
4396 above. */
4397 if (found)
81694485
NC		 4398 offset =
4399 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4400
4401 target = pc_for_insn + offset;
4402
4403 /* The BLX stub is ARM-mode code. Adjust the offset to
4404 take the different PC value (+8 instead of +4) into
4405 account. */
4406 if (stub_type == arm_stub_a8_veneer_blx)
4407 offset += 4;
4408
4409 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4410 {
eb7c4339 4411 char *stub_name = NULL;
48229727
JB		 4412
4413 if (num_a8_fixes == a8_fix_table_size)
4414 {
4415 a8_fix_table_size *= 2;
21d799b5
NC		 4416 a8_fixes = (struct a8_erratum_fix *)
4417 bfd_realloc (a8_fixes,
4418 sizeof (struct a8_erratum_fix)
4419 * a8_fix_table_size);
48229727
JB		 4420 }
4421
eb7c4339
NS		 4422 if (num_a8_fixes < prev_num_a8_fixes)
4423 {
4424 /* If we're doing a subsequent scan,
4425 check if we've found the same fix as
4426 before, and try and reuse the stub
4427 name. */
4428 stub_name = a8_fixes[num_a8_fixes].stub_name;
4429 if ((a8_fixes[num_a8_fixes].section != section)
4430 || (a8_fixes[num_a8_fixes].offset != i))
4431 {
4432 free (stub_name);
4433 stub_name = NULL;
4434 *stub_changed_p = TRUE;
4435 }
4436 }
4437
4438 if (!stub_name)
4439 {
21d799b5 4440 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4441 if (stub_name != NULL)
4442 sprintf (stub_name, "%x:%x", section->id, i);
4443 }
48229727
JB		 4444
4445 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4446 a8_fixes[num_a8_fixes].section = section;
4447 a8_fixes[num_a8_fixes].offset = i;
4448 a8_fixes[num_a8_fixes].addend = offset;
4449 a8_fixes[num_a8_fixes].orig_insn = insn;
4450 a8_fixes[num_a8_fixes].stub_name = stub_name;
4451 a8_fixes[num_a8_fixes].stub_type = stub_type;
35fc36a8
RS		 4452 a8_fixes[num_a8_fixes].branch_type =
4453 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727
JB		 4454
4455 num_a8_fixes++;
4456 }
4457 }
4458 }
4459
4460 i += insn_32bit ? 4 : 2;
4461 last_was_32bit = insn_32bit;
4462 last_was_branch = is_32bit_branch;
4463 }
4464 }
4465
4466 if (elf_section_data (section)->this_hdr.contents == NULL)
4467 free (contents);
4468 }
fe33d2fa 4469
48229727
JB		 4470 *a8_fixes_p = a8_fixes;
4471 *num_a8_fixes_p = num_a8_fixes;
4472 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4473
81694485 4474 return FALSE;
48229727
JB		 4475}
4476
906e58ca
NC		 4477/* Determine and set the size of the stub section for a final link.
4478
4479 The basic idea here is to examine all the relocations looking for
4480 PC-relative calls to a target that is unreachable with a "bl"
4481 instruction. */
4482
4483bfd_boolean
4484elf32_arm_size_stubs (bfd *output_bfd,
4485 bfd *stub_bfd,
4486 struct bfd_link_info *info,
4487 bfd_signed_vma group_size,
4488 asection * (*add_stub_section) (const char *, asection *),
4489 void (*layout_sections_again) (void))
4490{
4491 bfd_size_type stub_group_size;
07d72278 4492 bfd_boolean stubs_always_after_branch;
906e58ca 4493 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4494 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4495 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4496 struct a8_erratum_reloc *a8_relocs = NULL;
4497 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4498
4dfe6ac6
NC		 4499 if (htab == NULL)
4500 return FALSE;
4501
48229727
JB		 4502 if (htab->fix_cortex_a8)
4503 {
21d799b5
NC		 4504 a8_fixes = (struct a8_erratum_fix *)
4505 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4506 a8_relocs = (struct a8_erratum_reloc *)
4507 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4508 }
906e58ca
NC		 4509
4510 /* Propagate mach to stub bfd, because it may not have been
4511 finalized when we created stub_bfd. */
4512 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4513 bfd_get_mach (output_bfd));
4514
4515 /* Stash our params away. */
4516 htab->stub_bfd = stub_bfd;
4517 htab->add_stub_section = add_stub_section;
4518 htab->layout_sections_again = layout_sections_again;
07d72278 4519 stubs_always_after_branch = group_size < 0;
48229727
JB		 4520
4521 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4522 as the first half of a 32-bit branch straddling two 4K pages. This is a
4523 crude way of enforcing that. */
4524 if (htab->fix_cortex_a8)
4525 stubs_always_after_branch = 1;
4526
906e58ca
NC		 4527 if (group_size < 0)
4528 stub_group_size = -group_size;
4529 else
4530 stub_group_size = group_size;
4531
4532 if (stub_group_size == 1)
4533 {
4534 /* Default values. */
4535 /* Thumb branch range is +-4MB has to be used as the default
4536 maximum size (a given section can contain both ARM and Thumb
4537 code, so the worst case has to be taken into account).
4538
4539 This value is 24K less than that, which allows for 2025
4540 12-byte stubs. If we exceed that, then we will fail to link.
4541 The user will have to relink with an explicit group size
4542 option. */
4543 stub_group_size = 4170000;
4544 }
4545
07d72278 4546 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4547
3ae046cc
NS		 4548 /* If we're applying the cortex A8 fix, we need to determine the
4549 program header size now, because we cannot change it later --
4550 that could alter section placements. Notice the A8 erratum fix
4551 ends up requiring the section addresses to remain unchanged
4552 modulo the page size. That's something we cannot represent
4553 inside BFD, and we don't want to force the section alignment to
4554 be the page size. */
4555 if (htab->fix_cortex_a8)
4556 (*htab->layout_sections_again) ();
4557
906e58ca
NC		 4558 while (1)
4559 {
4560 bfd *input_bfd;
4561 unsigned int bfd_indx;
4562 asection *stub_sec;
eb7c4339
NS		 4563 bfd_boolean stub_changed = FALSE;
4564 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4565
48229727 4566 num_a8_fixes = 0;
906e58ca
NC		 4567 for (input_bfd = info->input_bfds, bfd_indx = 0;
4568 input_bfd != NULL;
4569 input_bfd = input_bfd->link_next, bfd_indx++)
4570 {
4571 Elf_Internal_Shdr *symtab_hdr;
4572 asection *section;
4573 Elf_Internal_Sym *local_syms = NULL;
4574
48229727
JB		 4575 num_a8_relocs = 0;
4576
906e58ca
NC		 4577 /* We'll need the symbol table in a second. */
4578 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4579 if (symtab_hdr->sh_info == 0)
4580 continue;
4581
4582 /* Walk over each section attached to the input bfd. */
4583 for (section = input_bfd->sections;
4584 section != NULL;
4585 section = section->next)
4586 {
4587 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4588
4589 /* If there aren't any relocs, then there's nothing more
4590 to do. */
4591 if ((section->flags & SEC_RELOC) == 0
4592 || section->reloc_count == 0
4593 || (section->flags & SEC_CODE) == 0)
4594 continue;
4595
4596 /* If this section is a link-once section that will be
4597 discarded, then don't create any stubs. */
4598 if (section->output_section == NULL
4599 || section->output_section->owner != output_bfd)
4600 continue;
4601
4602 /* Get the relocs. */
4603 internal_relocs
4604 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4605 NULL, info->keep_memory);
4606 if (internal_relocs == NULL)
4607 goto error_ret_free_local;
4608
4609 /* Now examine each relocation. */
4610 irela = internal_relocs;
4611 irelaend = irela + section->reloc_count;
4612 for (; irela < irelaend; irela++)
4613 {
4614 unsigned int r_type, r_indx;
4615 enum elf32_arm_stub_type stub_type;
4616 struct elf32_arm_stub_hash_entry *stub_entry;
4617 asection *sym_sec;
4618 bfd_vma sym_value;
4619 bfd_vma destination;
4620 struct elf32_arm_link_hash_entry *hash;
7413f23f 4621 const char *sym_name;
906e58ca
NC		 4622 char *stub_name;
4623 const asection *id_sec;
35fc36a8 4624 enum arm_st_branch_type branch_type;
48229727 4625 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4626
4627 r_type = ELF32_R_TYPE (irela->r_info);
4628 r_indx = ELF32_R_SYM (irela->r_info);
4629
4630 if (r_type >= (unsigned int) R_ARM_max)
4631 {
4632 bfd_set_error (bfd_error_bad_value);
4633 error_ret_free_internal:
4634 if (elf_section_data (section)->relocs == NULL)
4635 free (internal_relocs);
4636 goto error_ret_free_local;
4637 }
0855e32b
NS		 4638
4639 hash = NULL;
4640 if (r_indx >= symtab_hdr->sh_info)
4641 hash = elf32_arm_hash_entry
4642 (elf_sym_hashes (input_bfd)
4643 [r_indx - symtab_hdr->sh_info]);
4644
4645 /* Only look for stubs on branch instructions, or
4646 non-relaxed TLSCALL */
906e58ca 4647 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4648 && (r_type != (unsigned int) R_ARM_THM_CALL)
4649 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4650 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4651 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 4652 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 4653 && (r_type != (unsigned int) R_ARM_PLT32)
4654 && !((r_type == (unsigned int) R_ARM_TLS_CALL
4655 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4656 && r_type == elf32_arm_tls_transition
4657 (info, r_type, &hash->root)
4658 && ((hash ? hash->tls_type
4659 : (elf32_arm_local_got_tls_type
4660 (input_bfd)[r_indx]))
4661 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 4662 continue;
4663
4664 /* Now determine the call target, its name, value,
4665 section. */
4666 sym_sec = NULL;
4667 sym_value = 0;
4668 destination = 0;
7413f23f 4669 sym_name = NULL;
0855e32b
NS		 4670
4671 if (r_type == (unsigned int) R_ARM_TLS_CALL
4672 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4673 {
4674 /* A non-relaxed TLS call. The target is the
4675 plt-resident trampoline and nothing to do
4676 with the symbol. */
4677 BFD_ASSERT (htab->tls_trampoline > 0);
4678 sym_sec = htab->root.splt;
4679 sym_value = htab->tls_trampoline;
4680 hash = 0;
35fc36a8 4681 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 4682 }
4683 else if (!hash)
906e58ca
NC		 4684 {
4685 /* It's a local symbol. */
4686 Elf_Internal_Sym *sym;
906e58ca
NC		 4687
4688 if (local_syms == NULL)
4689 {
4690 local_syms
4691 = (Elf_Internal_Sym *) symtab_hdr->contents;
4692 if (local_syms == NULL)
4693 local_syms
4694 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4695 symtab_hdr->sh_info, 0,
4696 NULL, NULL, NULL);
4697 if (local_syms == NULL)
4698 goto error_ret_free_internal;
4699 }
4700
4701 sym = local_syms + r_indx;
f6d250ce
TS		 4702 if (sym->st_shndx == SHN_UNDEF)
4703 sym_sec = bfd_und_section_ptr;
4704 else if (sym->st_shndx == SHN_ABS)
4705 sym_sec = bfd_abs_section_ptr;
4706 else if (sym->st_shndx == SHN_COMMON)
4707 sym_sec = bfd_com_section_ptr;
4708 else
4709 sym_sec =
4710 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
4711
ffcb4889
NS		 4712 if (!sym_sec)
4713 /* This is an undefined symbol. It can never
4714 be resolved. */
4715 continue;
fe33d2fa 4716
906e58ca
NC		 4717 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4718 sym_value = sym->st_value;
4719 destination = (sym_value + irela->r_addend
4720 + sym_sec->output_offset
4721 + sym_sec->output_section->vma);
35fc36a8 4722 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 4723 sym_name
4724 = bfd_elf_string_from_elf_section (input_bfd,
4725 symtab_hdr->sh_link,
4726 sym->st_name);
906e58ca
NC		 4727 }
4728 else
4729 {
4730 /* It's an external symbol. */
906e58ca
NC		 4731 while (hash->root.root.type == bfd_link_hash_indirect
4732 || hash->root.root.type == bfd_link_hash_warning)
4733 hash = ((struct elf32_arm_link_hash_entry *)
4734 hash->root.root.u.i.link);
4735
4736 if (hash->root.root.type == bfd_link_hash_defined
4737 || hash->root.root.type == bfd_link_hash_defweak)
4738 {
4739 sym_sec = hash->root.root.u.def.section;
4740 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4741
4742 struct elf32_arm_link_hash_table *globals =
4743 elf32_arm_hash_table (info);
4744
4745 /* For a destination in a shared library,
4746 use the PLT stub as target address to
4747 decide whether a branch stub is
4748 needed. */
4dfe6ac6 4749 if (globals != NULL
362d30a1 4750 && globals->root.splt != NULL
4dfe6ac6 4751 && hash != NULL
022f8312
CL		 4752 && hash->root.plt.offset != (bfd_vma) -1)
4753 {
362d30a1 4754 sym_sec = globals->root.splt;
022f8312
CL		 4755 sym_value = hash->root.plt.offset;
4756 if (sym_sec->output_section != NULL)
4757 destination = (sym_value
4758 + sym_sec->output_offset
4759 + sym_sec->output_section->vma);
4760 }
4761 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4762 destination = (sym_value + irela->r_addend
4763 + sym_sec->output_offset
4764 + sym_sec->output_section->vma);
4765 }
69c5861e
CL		 4766 else if ((hash->root.root.type == bfd_link_hash_undefined)
4767 || (hash->root.root.type == bfd_link_hash_undefweak))
4768 {
4769 /* For a shared library, use the PLT stub as
4770 target address to decide whether a long
4771 branch stub is needed.
4772 For absolute code, they cannot be handled. */
4773 struct elf32_arm_link_hash_table *globals =
4774 elf32_arm_hash_table (info);
4775
4dfe6ac6 4776 if (globals != NULL
362d30a1 4777 && globals->root.splt != NULL
4dfe6ac6 4778 && hash != NULL
69c5861e
CL		 4779 && hash->root.plt.offset != (bfd_vma) -1)
4780 {
362d30a1 4781 sym_sec = globals->root.splt;
69c5861e
CL		 4782 sym_value = hash->root.plt.offset;
4783 if (sym_sec->output_section != NULL)
4784 destination = (sym_value
4785 + sym_sec->output_offset
4786 + sym_sec->output_section->vma);
4787 }
4788 else
4789 continue;
4790 }
906e58ca
NC		 4791 else
4792 {
4793 bfd_set_error (bfd_error_bad_value);
4794 goto error_ret_free_internal;
4795 }
35fc36a8 4796 branch_type = hash->root.target_internal;
7413f23f 4797 sym_name = hash->root.root.root.string;
906e58ca
NC		 4798 }
4799
48229727 4800 do
7413f23f 4801 {
48229727
JB		 4802 /* Determine what (if any) linker stub is needed. */
4803 stub_type = arm_type_of_stub (info, section, irela,
35fc36a8 4804 &branch_type, hash,
48229727
JB		 4805 destination, sym_sec,
4806 input_bfd, sym_name);
4807 if (stub_type == arm_stub_none)
4808 break;
4809
4810 /* Support for grouping stub sections. */
4811 id_sec = htab->stub_group[section->id].link_sec;
4812
4813 /* Get the name of this stub. */
4814 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 4815 irela, stub_type);
48229727
JB		 4816 if (!stub_name)
4817 goto error_ret_free_internal;
4818
4819 /* We've either created a stub for this reloc already,
4820 or we are about to. */
4821 created_stub = TRUE;
4822
4823 stub_entry = arm_stub_hash_lookup
4824 (&htab->stub_hash_table, stub_name,
4825 FALSE, FALSE);
4826 if (stub_entry != NULL)
4827 {
4828 /* The proper stub has already been created. */
4829 free (stub_name);
eb7c4339 4830 stub_entry->target_value = sym_value;
48229727
JB		 4831 break;
4832 }
7413f23f 4833
48229727
JB		 4834 stub_entry = elf32_arm_add_stub (stub_name, section,
4835 htab);
4836 if (stub_entry == NULL)
4837 {
4838 free (stub_name);
4839 goto error_ret_free_internal;
4840 }
7413f23f 4841
48229727
JB		 4842 stub_entry->target_value = sym_value;
4843 stub_entry->target_section = sym_sec;
4844 stub_entry->stub_type = stub_type;
4845 stub_entry->h = hash;
35fc36a8 4846 stub_entry->branch_type = branch_type;
48229727
JB		 4847
4848 if (sym_name == NULL)
4849 sym_name = "unnamed";
21d799b5
NC		 4850 stub_entry->output_name = (char *)
4851 bfd_alloc (htab->stub_bfd,
48229727
JB		 4852 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4853 + strlen (sym_name));
4854 if (stub_entry->output_name == NULL)
4855 {
4856 free (stub_name);
4857 goto error_ret_free_internal;
4858 }
4859
4860 /* For historical reasons, use the existing names for
4861 ARM-to-Thumb and Thumb-to-ARM stubs. */
35fc36a8
RS		 4862 if ((r_type == (unsigned int) R_ARM_THM_CALL
4863 || r_type == (unsigned int) R_ARM_THM_JUMP24)
4864 && branch_type == ST_BRANCH_TO_ARM)
48229727
JB		 4865 sprintf (stub_entry->output_name,
4866 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
35fc36a8
RS		 4867 else if ((r_type == (unsigned int) R_ARM_CALL
4868 || r_type == (unsigned int) R_ARM_JUMP24)
4869 && branch_type == ST_BRANCH_TO_THUMB)
48229727
JB		 4870 sprintf (stub_entry->output_name,
4871 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4872 else
4873 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4874 sym_name);
4875
4876 stub_changed = TRUE;
4877 }
4878 while (0);
4879
4880 /* Look for relocations which might trigger Cortex-A8
4881 erratum. */
4882 if (htab->fix_cortex_a8
4883 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4884 || r_type == (unsigned int) R_ARM_THM_JUMP19
4885 || r_type == (unsigned int) R_ARM_THM_CALL
4886 || r_type == (unsigned int) R_ARM_THM_XPC22))
4887 {
4888 bfd_vma from = section->output_section->vma
4889 + section->output_offset
4890 + irela->r_offset;
4891
4892 if ((from & 0xfff) == 0xffe)
4893 {
4894 /* Found a candidate. Note we haven't checked the
4895 destination is within 4K here: if we do so (and
4896 don't create an entry in a8_relocs) we can't tell
4897 that a branch should have been relocated when
4898 scanning later. */
4899 if (num_a8_relocs == a8_reloc_table_size)
4900 {
4901 a8_reloc_table_size *= 2;
21d799b5
NC		 4902 a8_relocs = (struct a8_erratum_reloc *)
4903 bfd_realloc (a8_relocs,
4904 sizeof (struct a8_erratum_reloc)
4905 * a8_reloc_table_size);
48229727
JB		 4906 }
4907
4908 a8_relocs[num_a8_relocs].from = from;
4909 a8_relocs[num_a8_relocs].destination = destination;
4910 a8_relocs[num_a8_relocs].r_type = r_type;
35fc36a8 4911 a8_relocs[num_a8_relocs].branch_type = branch_type;
48229727
JB		 4912 a8_relocs[num_a8_relocs].sym_name = sym_name;
4913 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 4914 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 4915
4916 num_a8_relocs++;
4917 }
4918 }
906e58ca
NC		 4919 }
4920
48229727
JB		 4921 /* We're done with the internal relocs, free them. */
4922 if (elf_section_data (section)->relocs == NULL)
4923 free (internal_relocs);
4924 }
4925
4926 if (htab->fix_cortex_a8)
4927 {
4928 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4929 qsort (a8_relocs, num_a8_relocs,
4930 sizeof (struct a8_erratum_reloc),
48229727
JB		 4931 &a8_reloc_compare);
4932
4933 /* Scan for branches which might trigger Cortex-A8 erratum. */
4934 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4935 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4936 a8_relocs, num_a8_relocs,
4937 prev_num_a8_fixes, &stub_changed)
4938 != 0)
48229727 4939 goto error_ret_free_local;
5e681ec4 4940 }
5e681ec4
PB		 4941 }
4942
eb7c4339 4943 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4944 stub_changed = TRUE;
4945
906e58ca
NC		 4946 if (!stub_changed)
4947 break;
5e681ec4 4948
906e58ca
NC		 4949 /* OK, we've added some stubs. Find out the new size of the
4950 stub sections. */
4951 for (stub_sec = htab->stub_bfd->sections;
4952 stub_sec != NULL;
4953 stub_sec = stub_sec->next)
3e6b1042
DJ		 4954 {
4955 /* Ignore non-stub sections. */
4956 if (!strstr (stub_sec->name, STUB_SUFFIX))
4957 continue;
4958
4959 stub_sec->size = 0;
4960 }
b34b2d70 4961
906e58ca
NC		 4962 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4963
48229727
JB		 4964 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4965 if (htab->fix_cortex_a8)
4966 for (i = 0; i < num_a8_fixes; i++)
4967 {
4968 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4969 a8_fixes[i].section, htab);
4970
4971 if (stub_sec == NULL)
4972 goto error_ret_free_local;
4973
4974 stub_sec->size
4975 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4976 NULL);
4977 }
4978
4979
906e58ca
NC		 4980 /* Ask the linker to do its stuff. */
4981 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4982 }
4983
48229727
JB		 4984 /* Add stubs for Cortex-A8 erratum fixes now. */
4985 if (htab->fix_cortex_a8)
4986 {
4987 for (i = 0; i < num_a8_fixes; i++)
4988 {
4989 struct elf32_arm_stub_hash_entry *stub_entry;
4990 char *stub_name = a8_fixes[i].stub_name;
4991 asection *section = a8_fixes[i].section;
4992 unsigned int section_id = a8_fixes[i].section->id;
4993 asection *link_sec = htab->stub_group[section_id].link_sec;
4994 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 4995 const insn_sequence *template_sequence;
48229727
JB		 4996 int template_size, size = 0;
4997
4998 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4999 TRUE, FALSE);
5000 if (stub_entry == NULL)
5001 {
5002 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5003 section->owner,
5004 stub_name);
5005 return FALSE;
5006 }
5007
5008 stub_entry->stub_sec = stub_sec;
5009 stub_entry->stub_offset = 0;
5010 stub_entry->id_sec = link_sec;
5011 stub_entry->stub_type = a8_fixes[i].stub_type;
5012 stub_entry->target_section = a8_fixes[i].section;
5013 stub_entry->target_value = a8_fixes[i].offset;
5014 stub_entry->target_addend = a8_fixes[i].addend;
5015 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5016 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5017
d3ce72d0
NC		 5018 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5019 &template_sequence,
48229727
JB		 5020 &template_size);
5021
5022 stub_entry->stub_size = size;
d3ce72d0 5023 stub_entry->stub_template = template_sequence;
48229727
JB		 5024 stub_entry->stub_template_size = template_size;
5025 }
5026
5027 /* Stash the Cortex-A8 erratum fix array for use later in
5028 elf32_arm_write_section(). */
5029 htab->a8_erratum_fixes = a8_fixes;
5030 htab->num_a8_erratum_fixes = num_a8_fixes;
5031 }
5032 else
5033 {
5034 htab->a8_erratum_fixes = NULL;
5035 htab->num_a8_erratum_fixes = 0;
5036 }
906e58ca
NC		 5037 return TRUE;
5038
5039 error_ret_free_local:
5040 return FALSE;
5e681ec4
PB		 5041}
5042
906e58ca
NC		 5043/* Build all the stubs associated with the current output file. The
5044 stubs are kept in a hash table attached to the main linker hash
5045 table. We also set up the .plt entries for statically linked PIC
5046 functions here. This function is called via arm_elf_finish in the
5047 linker. */
252b5132 5048
906e58ca
NC		 5049bfd_boolean
5050elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5051{
906e58ca
NC		 5052 asection *stub_sec;
5053 struct bfd_hash_table *table;
5054 struct elf32_arm_link_hash_table *htab;
252b5132 5055
906e58ca 5056 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5057 if (htab == NULL)
5058 return FALSE;
252b5132 5059
906e58ca
NC		 5060 for (stub_sec = htab->stub_bfd->sections;
5061 stub_sec != NULL;
5062 stub_sec = stub_sec->next)
252b5132 5063 {
906e58ca
NC		 5064 bfd_size_type size;
5065
8029a119 5066 /* Ignore non-stub sections. */
906e58ca
NC		 5067 if (!strstr (stub_sec->name, STUB_SUFFIX))
5068 continue;
5069
5070 /* Allocate memory to hold the linker stubs. */
5071 size = stub_sec->size;
21d799b5 5072 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5073 if (stub_sec->contents == NULL && size != 0)
5074 return FALSE;
5075 stub_sec->size = 0;
252b5132
RH		 5076 }
5077
906e58ca
NC		 5078 /* Build the stubs as directed by the stub hash table. */
5079 table = &htab->stub_hash_table;
5080 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5081 if (htab->fix_cortex_a8)
5082 {
5083 /* Place the cortex a8 stubs last. */
5084 htab->fix_cortex_a8 = -1;
5085 bfd_hash_traverse (table, arm_build_one_stub, info);
5086 }
252b5132 5087
906e58ca 5088 return TRUE;
252b5132
RH		 5089}
5090
9b485d32
NC		 5091/* Locate the Thumb encoded calling stub for NAME. */
5092
252b5132 5093static struct elf_link_hash_entry *
57e8b36a
NC		 5094find_thumb_glue (struct bfd_link_info *link_info,
5095 const char *name,
f2a9dd69 5096 char **error_message)
252b5132
RH		 5097{
5098 char *tmp_name;
5099 struct elf_link_hash_entry *hash;
5100 struct elf32_arm_link_hash_table *hash_table;
5101
5102 /* We need a pointer to the armelf specific hash table. */
5103 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5104 if (hash_table == NULL)
5105 return NULL;
252b5132 5106
21d799b5
NC		 5107 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5108 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5109
5110 BFD_ASSERT (tmp_name);
5111
5112 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5113
5114 hash = elf_link_hash_lookup
b34976b6 5115 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5116
b1657152
AM		 5117 if (hash == NULL
5118 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5119 tmp_name, name) == -1)
5120 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5121
5122 free (tmp_name);
5123
5124 return hash;
5125}
5126
9b485d32
NC		 5127/* Locate the ARM encoded calling stub for NAME. */
5128
252b5132 5129static struct elf_link_hash_entry *
57e8b36a
NC		 5130find_arm_glue (struct bfd_link_info *link_info,
5131 const char *name,
f2a9dd69 5132 char **error_message)
252b5132
RH		 5133{
5134 char *tmp_name;
5135 struct elf_link_hash_entry *myh;
5136 struct elf32_arm_link_hash_table *hash_table;
5137
5138 /* We need a pointer to the elfarm specific hash table. */
5139 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5140 if (hash_table == NULL)
5141 return NULL;
252b5132 5142
21d799b5
NC		 5143 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5144 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5145
5146 BFD_ASSERT (tmp_name);
5147
5148 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5149
5150 myh = elf_link_hash_lookup
b34976b6 5151 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5152
b1657152
AM		 5153 if (myh == NULL
5154 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5155 tmp_name, name) == -1)
5156 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5157
5158 free (tmp_name);
5159
5160 return myh;
5161}
5162
8f6277f5 5163/* ARM->Thumb glue (static images):
252b5132
RH		 5164
5165 .arm
5166 __func_from_arm:
5167 ldr r12, __func_addr
5168 bx r12
5169 __func_addr:
906e58ca 5170 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5171
26079076
PB		 5172 (v5t static images)
5173 .arm
5174 __func_from_arm:
5175 ldr pc, __func_addr
5176 __func_addr:
906e58ca 5177 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5178
8f6277f5
PB		 5179 (relocatable images)
5180 .arm
5181 __func_from_arm:
5182 ldr r12, __func_offset
5183 add r12, r12, pc
5184 bx r12
5185 __func_offset:
8029a119 5186 .word func - . */
8f6277f5
PB		 5187
5188#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5189static const insn32 a2t1_ldr_insn = 0xe59fc000;
5190static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5191static const insn32 a2t3_func_addr_insn = 0x00000001;
5192
26079076
PB		 5193#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5194static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5195static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5196
8f6277f5
PB		 5197#define ARM2THUMB_PIC_GLUE_SIZE 16
5198static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5199static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5200static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5201
9b485d32 5202/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5203
8029a119
NC		 5204 .thumb .thumb
5205 .align 2 .align 2
5206 __func_from_thumb: __func_from_thumb:
5207 bx pc push {r6, lr}
5208 nop ldr r6, __func_addr
5209 .arm mov lr, pc
5210 b func bx r6
fcef9eb7
NC		 5211 .arm
5212 ;; back_to_thumb
5213 ldmia r13! {r6, lr}
5214 bx lr
8029a119
NC		 5215 __func_addr:
5216 .word func */
252b5132
RH		 5217
5218#define THUMB2ARM_GLUE_SIZE 8
5219static const insn16 t2a1_bx_pc_insn = 0x4778;
5220static const insn16 t2a2_noop_insn = 0x46c0;
5221static const insn32 t2a3_b_insn = 0xea000000;
5222
c7b8f16e
JB		 5223#define VFP11_ERRATUM_VENEER_SIZE 8
5224
845b51d6
PB		 5225#define ARM_BX_VENEER_SIZE 12
5226static const insn32 armbx1_tst_insn = 0xe3100001;
5227static const insn32 armbx2_moveq_insn = 0x01a0f000;
5228static const insn32 armbx3_bx_insn = 0xe12fff10;
5229
7e392df6 5230#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5231static void
5232arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5233{
5234 asection * s;
8029a119 5235 bfd_byte * contents;
252b5132 5236
8029a119 5237 if (size == 0)
3e6b1042
DJ		 5238 {
5239 /* Do not include empty glue sections in the output. */
5240 if (abfd != NULL)
5241 {
5242 s = bfd_get_section_by_name (abfd, name);
5243 if (s != NULL)
5244 s->flags |= SEC_EXCLUDE;
5245 }
5246 return;
5247 }
252b5132 5248
8029a119 5249 BFD_ASSERT (abfd != NULL);
252b5132 5250
8029a119
NC		 5251 s = bfd_get_section_by_name (abfd, name);
5252 BFD_ASSERT (s != NULL);
252b5132 5253
21d799b5 5254 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5255
8029a119
NC		 5256 BFD_ASSERT (s->size == size);
5257 s->contents = contents;
5258}
906e58ca 5259
8029a119
NC		 5260bfd_boolean
5261bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5262{
5263 struct elf32_arm_link_hash_table * globals;
906e58ca 5264
8029a119
NC		 5265 globals = elf32_arm_hash_table (info);
5266 BFD_ASSERT (globals != NULL);
906e58ca 5267
8029a119
NC		 5268 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5269 globals->arm_glue_size,
5270 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5271
8029a119
NC		 5272 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5273 globals->thumb_glue_size,
5274 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5275
8029a119
NC		 5276 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5277 globals->vfp11_erratum_glue_size,
5278 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5279
8029a119
NC		 5280 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5281 globals->bx_glue_size,
845b51d6
PB		 5282 ARM_BX_GLUE_SECTION_NAME);
5283
b34976b6 5284 return TRUE;
252b5132
RH		 5285}
5286
a4fd1a8e 5287/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5288 returns the symbol identifying the stub. */
5289
a4fd1a8e 5290static struct elf_link_hash_entry *
57e8b36a
NC		 5291record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5292 struct elf_link_hash_entry * h)
252b5132
RH		 5293{
5294 const char * name = h->root.root.string;
63b0f745 5295 asection * s;
252b5132
RH		 5296 char * tmp_name;
5297 struct elf_link_hash_entry * myh;
14a793b2 5298 struct bfd_link_hash_entry * bh;
252b5132 5299 struct elf32_arm_link_hash_table * globals;
dc810e39 5300 bfd_vma val;
2f475487 5301 bfd_size_type size;
252b5132
RH		 5302
5303 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5304 BFD_ASSERT (globals != NULL);
5305 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5306
5307 s = bfd_get_section_by_name
5308 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5309
252b5132
RH		 5310 BFD_ASSERT (s != NULL);
5311
21d799b5
NC		 5312 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5313 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5314
5315 BFD_ASSERT (tmp_name);
5316
5317 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5318
5319 myh = elf_link_hash_lookup
b34976b6 5320 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5321
5322 if (myh != NULL)
5323 {
9b485d32 5324 /* We've already seen this guy. */
252b5132 5325 free (tmp_name);
a4fd1a8e 5326 return myh;
252b5132
RH		 5327 }
5328
57e8b36a
NC		 5329 /* The only trick here is using hash_table->arm_glue_size as the value.
5330 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5331 putting it. The +1 on the value marks that the stub has not been
5332 output yet - not that it is a Thumb function. */
14a793b2 5333 bh = NULL;
dc810e39
AM		 5334 val = globals->arm_glue_size + 1;
5335 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5336 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5337 NULL, TRUE, FALSE, &bh);
252b5132 5338
b7693d02
DJ		 5339 myh = (struct elf_link_hash_entry *) bh;
5340 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5341 myh->forced_local = 1;
5342
252b5132
RH		 5343 free (tmp_name);
5344
27e55c4d
PB		 5345 if (link_info->shared || globals->root.is_relocatable_executable
5346 || globals->pic_veneer)
2f475487 5347 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5348 else if (globals->use_blx)
5349 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5350 else
2f475487
AM		 5351 size = ARM2THUMB_STATIC_GLUE_SIZE;
5352
5353 s->size += size;
5354 globals->arm_glue_size += size;
252b5132 5355
a4fd1a8e 5356 return myh;
252b5132
RH		 5357}
5358
845b51d6
PB		 5359/* Allocate space for ARMv4 BX veneers. */
5360
5361static void
5362record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5363{
5364 asection * s;
5365 struct elf32_arm_link_hash_table *globals;
5366 char *tmp_name;
5367 struct elf_link_hash_entry *myh;
5368 struct bfd_link_hash_entry *bh;
5369 bfd_vma val;
5370
5371 /* BX PC does not need a veneer. */
5372 if (reg == 15)
5373 return;
5374
5375 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5376 BFD_ASSERT (globals != NULL);
5377 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5378
5379 /* Check if this veneer has already been allocated. */
5380 if (globals->bx_glue_offset[reg])
5381 return;
5382
5383 s = bfd_get_section_by_name
5384 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5385
5386 BFD_ASSERT (s != NULL);
5387
5388 /* Add symbol for veneer. */
21d799b5
NC		 5389 tmp_name = (char *)
5390 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5391
845b51d6 5392 BFD_ASSERT (tmp_name);
906e58ca 5393
845b51d6 5394 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5395
845b51d6
PB		 5396 myh = elf_link_hash_lookup
5397 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5398
845b51d6 5399 BFD_ASSERT (myh == NULL);
906e58ca 5400
845b51d6
PB		 5401 bh = NULL;
5402 val = globals->bx_glue_size;
5403 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5404 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5405 NULL, TRUE, FALSE, &bh);
5406
5407 myh = (struct elf_link_hash_entry *) bh;
5408 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5409 myh->forced_local = 1;
5410
5411 s->size += ARM_BX_VENEER_SIZE;
5412 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5413 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5414}
5415
5416
c7b8f16e
JB		 5417/* Add an entry to the code/data map for section SEC. */
5418
5419static void
5420elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5421{
5422 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5423 unsigned int newidx;
906e58ca 5424
c7b8f16e
JB		 5425 if (sec_data->map == NULL)
5426 {
21d799b5
NC		 5427 sec_data->map = (elf32_arm_section_map *)
5428 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5429 sec_data->mapcount = 0;
5430 sec_data->mapsize = 1;
5431 }
906e58ca 5432
c7b8f16e 5433 newidx = sec_data->mapcount++;
906e58ca 5434
c7b8f16e
JB		 5435 if (sec_data->mapcount > sec_data->mapsize)
5436 {
5437 sec_data->mapsize *= 2;
21d799b5
NC		 5438 sec_data->map = (elf32_arm_section_map *)
5439 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5440 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5441 }
5442
5443 if (sec_data->map)
5444 {
5445 sec_data->map[newidx].vma = vma;
5446 sec_data->map[newidx].type = type;
c7b8f16e 5447 }
c7b8f16e
JB		 5448}
5449
5450
5451/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5452 veneers are handled for now. */
5453
5454static bfd_vma
5455record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5456 elf32_vfp11_erratum_list *branch,
5457 bfd *branch_bfd,
5458 asection *branch_sec,
5459 unsigned int offset)
5460{
5461 asection *s;
5462 struct elf32_arm_link_hash_table *hash_table;
5463 char *tmp_name;
5464 struct elf_link_hash_entry *myh;
5465 struct bfd_link_hash_entry *bh;
5466 bfd_vma val;
5467 struct _arm_elf_section_data *sec_data;
c7b8f16e 5468 elf32_vfp11_erratum_list *newerr;
906e58ca 5469
c7b8f16e 5470 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5471 BFD_ASSERT (hash_table != NULL);
5472 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5473
c7b8f16e
JB		 5474 s = bfd_get_section_by_name
5475 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5476
c7b8f16e 5477 sec_data = elf32_arm_section_data (s);
906e58ca 5478
c7b8f16e 5479 BFD_ASSERT (s != NULL);
906e58ca 5480
21d799b5
NC		 5481 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5482 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5483
c7b8f16e 5484 BFD_ASSERT (tmp_name);
906e58ca 5485
c7b8f16e
JB		 5486 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5487 hash_table->num_vfp11_fixes);
906e58ca 5488
c7b8f16e
JB		 5489 myh = elf_link_hash_lookup
5490 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5491
c7b8f16e 5492 BFD_ASSERT (myh == NULL);
906e58ca 5493
c7b8f16e
JB		 5494 bh = NULL;
5495 val = hash_table->vfp11_erratum_glue_size;
5496 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5497 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5498 NULL, TRUE, FALSE, &bh);
5499
5500 myh = (struct elf_link_hash_entry *) bh;
5501 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5502 myh->forced_local = 1;
5503
5504 /* Link veneer back to calling location. */
c7e2358a 5505 sec_data->erratumcount += 1;
21d799b5
NC		 5506 newerr = (elf32_vfp11_erratum_list *)
5507 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5508
c7b8f16e
JB		 5509 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5510 newerr->vma = -1;
5511 newerr->u.v.branch = branch;
5512 newerr->u.v.id = hash_table->num_vfp11_fixes;
5513 branch->u.b.veneer = newerr;
5514
5515 newerr->next = sec_data->erratumlist;
5516 sec_data->erratumlist = newerr;
5517
5518 /* A symbol for the return from the veneer. */
5519 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5520 hash_table->num_vfp11_fixes);
5521
5522 myh = elf_link_hash_lookup
5523 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5524
c7b8f16e
JB		 5525 if (myh != NULL)
5526 abort ();
5527
5528 bh = NULL;
5529 val = offset + 4;
5530 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5531 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5532
c7b8f16e
JB		 5533 myh = (struct elf_link_hash_entry *) bh;
5534 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5535 myh->forced_local = 1;
5536
5537 free (tmp_name);
906e58ca 5538
c7b8f16e
JB		 5539 /* Generate a mapping symbol for the veneer section, and explicitly add an
5540 entry for that symbol to the code/data map for the section. */
5541 if (hash_table->vfp11_erratum_glue_size == 0)
5542 {
5543 bh = NULL;
5544 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5545 ever requires this erratum fix. */
5546 _bfd_generic_link_add_one_symbol (link_info,
5547 hash_table->bfd_of_glue_owner, "$a",
5548 BSF_LOCAL, s, 0, NULL,
5549 TRUE, FALSE, &bh);
5550
5551 myh = (struct elf_link_hash_entry *) bh;
5552 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5553 myh->forced_local = 1;
906e58ca 5554
c7b8f16e
JB		 5555 /* The elf32_arm_init_maps function only cares about symbols from input
5556 BFDs. We must make a note of this generated mapping symbol
5557 ourselves so that code byteswapping works properly in
5558 elf32_arm_write_section. */
5559 elf32_arm_section_map_add (s, 'a', 0);
5560 }
906e58ca 5561
c7b8f16e
JB		 5562 s->size += VFP11_ERRATUM_VENEER_SIZE;
5563 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5564 hash_table->num_vfp11_fixes++;
906e58ca 5565
c7b8f16e
JB		 5566 /* The offset of the veneer. */
5567 return val;
5568}
5569
8029a119 5570#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5571 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5572 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5573
5574/* Create a fake section for use by the ARM backend of the linker. */
5575
5576static bfd_boolean
5577arm_make_glue_section (bfd * abfd, const char * name)
5578{
5579 asection * sec;
5580
5581 sec = bfd_get_section_by_name (abfd, name);
5582 if (sec != NULL)
5583 /* Already made. */
5584 return TRUE;
5585
5586 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5587
5588 if (sec == NULL
5589 || !bfd_set_section_alignment (abfd, sec, 2))
5590 return FALSE;
5591
5592 /* Set the gc mark to prevent the section from being removed by garbage
5593 collection, despite the fact that no relocs refer to this section. */
5594 sec->gc_mark = 1;
5595
5596 return TRUE;
5597}
5598
8afb0e02
NC		 5599/* Add the glue sections to ABFD. This function is called from the
5600 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5601
b34976b6 5602bfd_boolean
57e8b36a
NC		 5603bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5604 struct bfd_link_info *info)
252b5132 5605{
8afb0e02
NC		 5606 /* If we are only performing a partial
5607 link do not bother adding the glue. */
1049f94e 5608 if (info->relocatable)
b34976b6 5609 return TRUE;
252b5132 5610
8029a119
NC		 5611 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5612 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5613 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5614 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5615}
5616
5617/* Select a BFD to be used to hold the sections used by the glue code.
5618 This function is called from the linker scripts in ld/emultempl/
8029a119 5619 {armelf/pe}.em. */
8afb0e02 5620
b34976b6 5621bfd_boolean
57e8b36a 5622bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5623{
5624 struct elf32_arm_link_hash_table *globals;
5625
5626 /* If we are only performing a partial link
5627 do not bother getting a bfd to hold the glue. */
1049f94e 5628 if (info->relocatable)
b34976b6 5629 return TRUE;
8afb0e02 5630
b7693d02
DJ		 5631 /* Make sure we don't attach the glue sections to a dynamic object. */
5632 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5633
8afb0e02 5634 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5635 BFD_ASSERT (globals != NULL);
5636
5637 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5638 return TRUE;
8afb0e02 5639
252b5132
RH		 5640 /* Save the bfd for later use. */
5641 globals->bfd_of_glue_owner = abfd;
cedb70c5 5642
b34976b6 5643 return TRUE;
252b5132
RH		 5644}
5645
906e58ca
NC		 5646static void
5647check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5648{
104d59d1
JM		 5649 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5650 Tag_CPU_arch) > 2)
39b41c9c
PB		 5651 globals->use_blx = 1;
5652}
5653
b34976b6 5654bfd_boolean
57e8b36a 5655bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5656 struct bfd_link_info *link_info)
252b5132
RH		 5657{
5658 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5659 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5660 Elf_Internal_Rela *irel, *irelend;
5661 bfd_byte *contents = NULL;
252b5132
RH		 5662
5663 asection *sec;
5664 struct elf32_arm_link_hash_table *globals;
5665
5666 /* If we are only performing a partial link do not bother
5667 to construct any glue. */
1049f94e 5668 if (link_info->relocatable)
b34976b6 5669 return TRUE;
252b5132 5670
39ce1a6a
NC		 5671 /* Here we have a bfd that is to be included on the link. We have a
5672 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5673 globals = elf32_arm_hash_table (link_info);
252b5132 5674 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5675
5676 check_use_blx (globals);
252b5132 5677
d504ffc8 5678 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5679 {
d003868e
AM		 5680 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5681 abfd);
e489d0ae
PB		 5682 return FALSE;
5683 }
f21f3fe0 5684
39ce1a6a
NC		 5685 /* PR 5398: If we have not decided to include any loadable sections in
5686 the output then we will not have a glue owner bfd. This is OK, it
5687 just means that there is nothing else for us to do here. */
5688 if (globals->bfd_of_glue_owner == NULL)
5689 return TRUE;
5690
252b5132
RH		 5691 /* Rummage around all the relocs and map the glue vectors. */
5692 sec = abfd->sections;
5693
5694 if (sec == NULL)
b34976b6 5695 return TRUE;
252b5132
RH		 5696
5697 for (; sec != NULL; sec = sec->next)
5698 {
5699 if (sec->reloc_count == 0)
5700 continue;
5701
2f475487
AM		 5702 if ((sec->flags & SEC_EXCLUDE) != 0)
5703 continue;
5704
0ffa91dd 5705 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5706
9b485d32 5707 /* Load the relocs. */
6cdc0ccc 5708 internal_relocs
906e58ca 5709 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5710
6cdc0ccc
AM		 5711 if (internal_relocs == NULL)
5712 goto error_return;
252b5132 5713
6cdc0ccc
AM		 5714 irelend = internal_relocs + sec->reloc_count;
5715 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5716 {
5717 long r_type;
5718 unsigned long r_index;
252b5132
RH		 5719
5720 struct elf_link_hash_entry *h;
5721
5722 r_type = ELF32_R_TYPE (irel->r_info);
5723 r_index = ELF32_R_SYM (irel->r_info);
5724
9b485d32 5725 /* These are the only relocation types we care about. */
ba96a88f 5726 if ( r_type != R_ARM_PC24
845b51d6 5727 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5728 continue;
5729
5730 /* Get the section contents if we haven't done so already. */
5731 if (contents == NULL)
5732 {
5733 /* Get cached copy if it exists. */
5734 if (elf_section_data (sec)->this_hdr.contents != NULL)
5735 contents = elf_section_data (sec)->this_hdr.contents;
5736 else
5737 {
5738 /* Go get them off disk. */
57e8b36a 5739 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5740 goto error_return;
5741 }
5742 }
5743
845b51d6
PB		 5744 if (r_type == R_ARM_V4BX)
5745 {
5746 int reg;
5747
5748 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5749 record_arm_bx_glue (link_info, reg);
5750 continue;
5751 }
5752
a7c10850 5753 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5754 h = NULL;
5755
9b485d32 5756 /* We don't care about local symbols. */
252b5132
RH		 5757 if (r_index < symtab_hdr->sh_info)
5758 continue;
5759
9b485d32 5760 /* This is an external symbol. */
252b5132
RH		 5761 r_index -= symtab_hdr->sh_info;
5762 h = (struct elf_link_hash_entry *)
5763 elf_sym_hashes (abfd)[r_index];
5764
5765 /* If the relocation is against a static symbol it must be within
5766 the current section and so cannot be a cross ARM/Thumb relocation. */
5767 if (h == NULL)
5768 continue;
5769
d504ffc8
DJ		 5770 /* If the call will go through a PLT entry then we do not need
5771 glue. */
362d30a1 5772 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5773 continue;
5774
252b5132
RH		 5775 switch (r_type)
5776 {
5777 case R_ARM_PC24:
5778 /* This one is a call from arm code. We need to look up
2f0ca46a 5779 the target of the call. If it is a thumb target, we
252b5132 5780 insert glue. */
35fc36a8 5781 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 5782 record_arm_to_thumb_glue (link_info, h);
5783 break;
5784
252b5132 5785 default:
c6596c5e 5786 abort ();
252b5132
RH		 5787 }
5788 }
6cdc0ccc
AM		 5789
5790 if (contents != NULL
5791 && elf_section_data (sec)->this_hdr.contents != contents)
5792 free (contents);
5793 contents = NULL;
5794
5795 if (internal_relocs != NULL
5796 && elf_section_data (sec)->relocs != internal_relocs)
5797 free (internal_relocs);
5798 internal_relocs = NULL;
252b5132
RH		 5799 }
5800
b34976b6 5801 return TRUE;
9a5aca8c 5802
252b5132 5803error_return:
6cdc0ccc
AM		 5804 if (contents != NULL
5805 && elf_section_data (sec)->this_hdr.contents != contents)
5806 free (contents);
5807 if (internal_relocs != NULL
5808 && elf_section_data (sec)->relocs != internal_relocs)
5809 free (internal_relocs);
9a5aca8c 5810
b34976b6 5811 return FALSE;
252b5132 5812}
7e392df6 5813#endif
252b5132 5814
eb043451 5815
c7b8f16e
JB		 5816/* Initialise maps of ARM/Thumb/data for input BFDs. */
5817
5818void
5819bfd_elf32_arm_init_maps (bfd *abfd)
5820{
5821 Elf_Internal_Sym *isymbuf;
5822 Elf_Internal_Shdr *hdr;
5823 unsigned int i, localsyms;
5824
af1f4419
NC		 5825 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5826 if (! is_arm_elf (abfd))
5827 return;
5828
c7b8f16e
JB		 5829 if ((abfd->flags & DYNAMIC) != 0)
5830 return;
5831
0ffa91dd 5832 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5833 localsyms = hdr->sh_info;
5834
5835 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5836 should contain the number of local symbols, which should come before any
5837 global symbols. Mapping symbols are always local. */
5838 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5839 NULL);
5840
5841 /* No internal symbols read? Skip this BFD. */
5842 if (isymbuf == NULL)
5843 return;
5844
5845 for (i = 0; i < localsyms; i++)
5846 {
5847 Elf_Internal_Sym *isym = &isymbuf[i];
5848 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5849 const char *name;
906e58ca 5850
c7b8f16e
JB		 5851 if (sec != NULL
5852 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5853 {
5854 name = bfd_elf_string_from_elf_section (abfd,
5855 hdr->sh_link, isym->st_name);
906e58ca 5856
c7b8f16e
JB		 5857 if (bfd_is_arm_special_symbol_name (name,
5858 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5859 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5860 }
5861 }
5862}
5863
5864
48229727
JB		 5865/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5866 say what they wanted. */
5867
5868void
5869bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5870{
5871 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5872 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5873
4dfe6ac6
NC		 5874 if (globals == NULL)
5875 return;
5876
48229727
JB		 5877 if (globals->fix_cortex_a8 == -1)
5878 {
5879 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5880 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5881 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5882 || out_attr[Tag_CPU_arch_profile].i == 0))
5883 globals->fix_cortex_a8 = 1;
5884 else
5885 globals->fix_cortex_a8 = 0;
5886 }
5887}
5888
5889
c7b8f16e
JB		 5890void
5891bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5892{
5893 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5894 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5895
4dfe6ac6
NC		 5896 if (globals == NULL)
5897 return;
c7b8f16e
JB		 5898 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5899 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5900 {
5901 switch (globals->vfp11_fix)
5902 {
5903 case BFD_ARM_VFP11_FIX_DEFAULT:
5904 case BFD_ARM_VFP11_FIX_NONE:
5905 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5906 break;
906e58ca 5907
c7b8f16e
JB		 5908 default:
5909 /* Give a warning, but do as the user requests anyway. */
5910 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5911 "workaround is not necessary for target architecture"), obfd);
5912 }
5913 }
5914 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5915 /* For earlier architectures, we might need the workaround, but do not
5916 enable it by default. If users is running with broken hardware, they
5917 must enable the erratum fix explicitly. */
5918 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5919}
5920
5921
906e58ca
NC		 5922enum bfd_arm_vfp11_pipe
5923{
c7b8f16e
JB		 5924 VFP11_FMAC,
5925 VFP11_LS,
5926 VFP11_DS,
5927 VFP11_BAD
5928};
5929
5930/* Return a VFP register number. This is encoded as RX:X for single-precision
5931 registers, or X:RX for double-precision registers, where RX is the group of
5932 four bits in the instruction encoding and X is the single extension bit.
5933 RX and X fields are specified using their lowest (starting) bit. The return
5934 value is:
5935
5936 0...31: single-precision registers s0...s31
5937 32...63: double-precision registers d0...d31.
906e58ca 5938
c7b8f16e
JB		 5939 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5940 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5941
c7b8f16e
JB		 5942static unsigned int
5943bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5944 unsigned int x)
5945{
5946 if (is_double)
5947 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5948 else
5949 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5950}
5951
5952/* Set bits in *WMASK according to a register number REG as encoded by
5953 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5954
5955static void
5956bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5957{
5958 if (reg < 32)
5959 *wmask |= 1 << reg;
5960 else if (reg < 48)
5961 *wmask |= 3 << ((reg - 32) * 2);
5962}
5963
5964/* Return TRUE if WMASK overwrites anything in REGS. */
5965
5966static bfd_boolean
5967bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5968{
5969 int i;
906e58ca 5970
c7b8f16e
JB		 5971 for (i = 0; i < numregs; i++)
5972 {
5973 unsigned int reg = regs[i];
5974
5975 if (reg < 32 && (wmask & (1 << reg)) != 0)
5976 return TRUE;
906e58ca 5977
c7b8f16e
JB		 5978 reg -= 32;
5979
5980 if (reg >= 16)
5981 continue;
906e58ca 5982
c7b8f16e
JB		 5983 if ((wmask & (3 << (reg * 2))) != 0)
5984 return TRUE;
5985 }
906e58ca 5986
c7b8f16e
JB		 5987 return FALSE;
5988}
5989
5990/* In this function, we're interested in two things: finding input registers
5991 for VFP data-processing instructions, and finding the set of registers which
5992 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5993 hold the written set, so FLDM etc. are easy to deal with (we're only
5994 interested in 32 SP registers or 16 dp registers, due to the VFP version
5995 implemented by the chip in question). DP registers are marked by setting
5996 both SP registers in the write mask). */
5997
5998static enum bfd_arm_vfp11_pipe
5999bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6000 int *numregs)
6001{
91d6fa6a 6002 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6003 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6004
6005 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6006 {
6007 unsigned int pqrs;
6008 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6009 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6010
6011 pqrs = ((insn & 0x00800000) >> 20)
6012 | ((insn & 0x00300000) >> 19)
6013 | ((insn & 0x00000040) >> 6);
6014
6015 switch (pqrs)
6016 {
6017 case 0: /* fmac[sd]. */
6018 case 1: /* fnmac[sd]. */
6019 case 2: /* fmsc[sd]. */
6020 case 3: /* fnmsc[sd]. */
91d6fa6a 6021 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6022 bfd_arm_vfp11_write_mask (destmask, fd);
6023 regs[0] = fd;
6024 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6025 regs[2] = fm;
6026 *numregs = 3;
6027 break;
6028
6029 case 4: /* fmul[sd]. */
6030 case 5: /* fnmul[sd]. */
6031 case 6: /* fadd[sd]. */
6032 case 7: /* fsub[sd]. */
91d6fa6a 6033 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6034 goto vfp_binop;
6035
6036 case 8: /* fdiv[sd]. */
91d6fa6a 6037 vpipe = VFP11_DS;
c7b8f16e
JB		 6038 vfp_binop:
6039 bfd_arm_vfp11_write_mask (destmask, fd);
6040 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6041 regs[1] = fm;
6042 *numregs = 2;
6043 break;
6044
6045 case 15: /* extended opcode. */
6046 {
6047 unsigned int extn = ((insn >> 15) & 0x1e)
6048 | ((insn >> 7) & 1);
6049
6050 switch (extn)
6051 {
6052 case 0: /* fcpy[sd]. */
6053 case 1: /* fabs[sd]. */
6054 case 2: /* fneg[sd]. */
6055 case 8: /* fcmp[sd]. */
6056 case 9: /* fcmpe[sd]. */
6057 case 10: /* fcmpz[sd]. */
6058 case 11: /* fcmpez[sd]. */
6059 case 16: /* fuito[sd]. */
6060 case 17: /* fsito[sd]. */
6061 case 24: /* ftoui[sd]. */
6062 case 25: /* ftouiz[sd]. */
6063 case 26: /* ftosi[sd]. */
6064 case 27: /* ftosiz[sd]. */
6065 /* These instructions will not bounce due to underflow. */
6066 *numregs = 0;
91d6fa6a 6067 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6068 break;
6069
6070 case 3: /* fsqrt[sd]. */
6071 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6072 registers to cause the erratum in previous instructions. */
6073 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 6074 vpipe = VFP11_DS;
c7b8f16e
JB		 6075 break;
6076
6077 case 15: /* fcvt{ds,sd}. */
6078 {
6079 int rnum = 0;
6080
6081 bfd_arm_vfp11_write_mask (destmask, fd);
6082
6083 /* Only FCVTSD can underflow. */
6084 if ((insn & 0x100) != 0)
6085 regs[rnum++] = fm;
6086
6087 *numregs = rnum;
6088
91d6fa6a 6089 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6090 }
6091 break;
6092
6093 default:
6094 return VFP11_BAD;
6095 }
6096 }
6097 break;
6098
6099 default:
6100 return VFP11_BAD;
6101 }
6102 }
6103 /* Two-register transfer. */
6104 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6105 {
6106 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6107
c7b8f16e
JB		 6108 if ((insn & 0x100000) == 0)
6109 {
6110 if (is_double)
6111 bfd_arm_vfp11_write_mask (destmask, fm);
6112 else
6113 {
6114 bfd_arm_vfp11_write_mask (destmask, fm);
6115 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6116 }
6117 }
6118
91d6fa6a 6119 vpipe = VFP11_LS;
c7b8f16e
JB		 6120 }
6121 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6122 {
6123 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6124 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6125
c7b8f16e
JB		 6126 switch (puw)
6127 {
6128 case 0: /* Two-reg transfer. We should catch these above. */
6129 abort ();
906e58ca 6130
c7b8f16e
JB		 6131 case 2: /* fldm[sdx]. */
6132 case 3:
6133 case 5:
6134 {
6135 unsigned int i, offset = insn & 0xff;
6136
6137 if (is_double)
6138 offset >>= 1;
6139
6140 for (i = fd; i < fd + offset; i++)
6141 bfd_arm_vfp11_write_mask (destmask, i);
6142 }
6143 break;
906e58ca 6144
c7b8f16e
JB		 6145 case 4: /* fld[sd]. */
6146 case 6:
6147 bfd_arm_vfp11_write_mask (destmask, fd);
6148 break;
906e58ca 6149
c7b8f16e
JB		 6150 default:
6151 return VFP11_BAD;
6152 }
6153
91d6fa6a 6154 vpipe = VFP11_LS;
c7b8f16e
JB		 6155 }
6156 /* Single-register transfer. Note L==0. */
6157 else if ((insn & 0x0f100e10) == 0x0e000a10)
6158 {
6159 unsigned int opcode = (insn >> 21) & 7;
6160 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6161
6162 switch (opcode)
6163 {
6164 case 0: /* fmsr/fmdlr. */
6165 case 1: /* fmdhr. */
6166 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6167 destination register. I don't know if this is exactly right,
6168 but it is the conservative choice. */
6169 bfd_arm_vfp11_write_mask (destmask, fn);
6170 break;
6171
6172 case 7: /* fmxr. */
6173 break;
6174 }
6175
91d6fa6a 6176 vpipe = VFP11_LS;
c7b8f16e
JB		 6177 }
6178
91d6fa6a 6179 return vpipe;
c7b8f16e
JB		 6180}
6181
6182
6183static int elf32_arm_compare_mapping (const void * a, const void * b);
6184
6185
6186/* Look for potentially-troublesome code sequences which might trigger the
6187 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6188 (available from ARM) for details of the erratum. A short version is
6189 described in ld.texinfo. */
6190
6191bfd_boolean
6192bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6193{
6194 asection *sec;
6195 bfd_byte *contents = NULL;
6196 int state = 0;
6197 int regs[3], numregs = 0;
6198 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6199 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6200
4dfe6ac6
NC		 6201 if (globals == NULL)
6202 return FALSE;
6203
c7b8f16e
JB		 6204 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6205 The states transition as follows:
906e58ca 6206
c7b8f16e
JB		 6207 0 -> 1 (vector) or 0 -> 2 (scalar)
6208 A VFP FMAC-pipeline instruction has been seen. Fill
6209 regs[0]..regs[numregs-1] with its input operands. Remember this
6210 instruction in 'first_fmac'.
6211
6212 1 -> 2
6213 Any instruction, except for a VFP instruction which overwrites
6214 regs[*].
906e58ca 6215
c7b8f16e
JB		 6216 1 -> 3 [ -> 0 ] or
6217 2 -> 3 [ -> 0 ]
6218 A VFP instruction has been seen which overwrites any of regs[*].
6219 We must make a veneer! Reset state to 0 before examining next
6220 instruction.
906e58ca 6221
c7b8f16e
JB		 6222 2 -> 0
6223 If we fail to match anything in state 2, reset to state 0 and reset
6224 the instruction pointer to the instruction after 'first_fmac'.
6225
6226 If the VFP11 vector mode is in use, there must be at least two unrelated
6227 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6228 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6229
6230 /* If we are only performing a partial link do not bother
6231 to construct any glue. */
6232 if (link_info->relocatable)
6233 return TRUE;
6234
0ffa91dd
NC		 6235 /* Skip if this bfd does not correspond to an ELF image. */
6236 if (! is_arm_elf (abfd))
6237 return TRUE;
906e58ca 6238
c7b8f16e
JB		 6239 /* We should have chosen a fix type by the time we get here. */
6240 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6241
6242 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6243 return TRUE;
2e6030b9 6244
33a7ffc2
JM		 6245 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6246 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6247 return TRUE;
6248
c7b8f16e
JB		 6249 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6250 {
6251 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6252 struct _arm_elf_section_data *sec_data;
6253
6254 /* If we don't have executable progbits, we're not interested in this
6255 section. Also skip if section is to be excluded. */
6256 if (elf_section_type (sec) != SHT_PROGBITS
6257 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6258 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6259 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6260 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6261 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6262 continue;
6263
6264 sec_data = elf32_arm_section_data (sec);
906e58ca 6265
c7b8f16e
JB		 6266 if (sec_data->mapcount == 0)
6267 continue;
906e58ca 6268
c7b8f16e
JB		 6269 if (elf_section_data (sec)->this_hdr.contents != NULL)
6270 contents = elf_section_data (sec)->this_hdr.contents;
6271 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6272 goto error_return;
6273
6274 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6275 elf32_arm_compare_mapping);
6276
6277 for (span = 0; span < sec_data->mapcount; span++)
6278 {
6279 unsigned int span_start = sec_data->map[span].vma;
6280 unsigned int span_end = (span == sec_data->mapcount - 1)
6281 ? sec->size : sec_data->map[span + 1].vma;
6282 char span_type = sec_data->map[span].type;
906e58ca 6283
c7b8f16e
JB		 6284 /* FIXME: Only ARM mode is supported at present. We may need to
6285 support Thumb-2 mode also at some point. */
6286 if (span_type != 'a')
6287 continue;
6288
6289 for (i = span_start; i < span_end;)
6290 {
6291 unsigned int next_i = i + 4;
6292 unsigned int insn = bfd_big_endian (abfd)
6293 ? (contents[i] << 24)
6294 | (contents[i + 1] << 16)
6295 | (contents[i + 2] << 8)
6296 | contents[i + 3]
6297 : (contents[i + 3] << 24)
6298 | (contents[i + 2] << 16)
6299 | (contents[i + 1] << 8)
6300 | contents[i];
6301 unsigned int writemask = 0;
91d6fa6a 6302 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6303
6304 switch (state)
6305 {
6306 case 0:
91d6fa6a 6307 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6308 &numregs);
6309 /* I'm assuming the VFP11 erratum can trigger with denorm
6310 operands on either the FMAC or the DS pipeline. This might
6311 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6312 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6313 {
6314 state = use_vector ? 1 : 2;
6315 first_fmac = i;
6316 veneer_of_insn = insn;
6317 }
6318 break;
6319
6320 case 1:
6321 {
6322 int other_regs[3], other_numregs;
91d6fa6a 6323 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6324 other_regs,
6325 &other_numregs);
91d6fa6a 6326 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6327 && bfd_arm_vfp11_antidependency (writemask, regs,
6328 numregs))
6329 state = 3;
6330 else
6331 state = 2;
6332 }
6333 break;
6334
6335 case 2:
6336 {
6337 int other_regs[3], other_numregs;
91d6fa6a 6338 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6339 other_regs,
6340 &other_numregs);
91d6fa6a 6341 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6342 && bfd_arm_vfp11_antidependency (writemask, regs,
6343 numregs))
6344 state = 3;
6345 else
6346 {
6347 state = 0;
6348 next_i = first_fmac + 4;
6349 }
6350 }
6351 break;
6352
6353 case 3:
6354 abort (); /* Should be unreachable. */
6355 }
6356
6357 if (state == 3)
6358 {
21d799b5
NC		 6359 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6360 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6361
c7e2358a 6362 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6363
6364 newerr->u.b.vfp_insn = veneer_of_insn;
6365
6366 switch (span_type)
6367 {
6368 case 'a':
6369 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6370 break;
906e58ca 6371
c7b8f16e
JB		 6372 default:
6373 abort ();
6374 }
6375
6376 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6377 first_fmac);
6378
6379 newerr->vma = -1;
6380
6381 newerr->next = sec_data->erratumlist;
6382 sec_data->erratumlist = newerr;
6383
6384 state = 0;
6385 }
6386
6387 i = next_i;
6388 }
6389 }
906e58ca 6390
c7b8f16e
JB		 6391 if (contents != NULL
6392 && elf_section_data (sec)->this_hdr.contents != contents)
6393 free (contents);
6394 contents = NULL;
6395 }
6396
6397 return TRUE;
6398
6399error_return:
6400 if (contents != NULL
6401 && elf_section_data (sec)->this_hdr.contents != contents)
6402 free (contents);
906e58ca 6403
c7b8f16e
JB		 6404 return FALSE;
6405}
6406
6407/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6408 after sections have been laid out, using specially-named symbols. */
6409
6410void
6411bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6412 struct bfd_link_info *link_info)
6413{
6414 asection *sec;
6415 struct elf32_arm_link_hash_table *globals;
6416 char *tmp_name;
906e58ca 6417
c7b8f16e
JB		 6418 if (link_info->relocatable)
6419 return;
2e6030b9
MS		 6420
6421 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6422 if (! is_arm_elf (abfd))
2e6030b9
MS		 6423 return;
6424
c7b8f16e 6425 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6426 if (globals == NULL)
6427 return;
906e58ca 6428
21d799b5
NC		 6429 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6430 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6431
6432 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6433 {
6434 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6435 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6436
c7b8f16e
JB		 6437 for (; errnode != NULL; errnode = errnode->next)
6438 {
6439 struct elf_link_hash_entry *myh;
6440 bfd_vma vma;
6441
6442 switch (errnode->type)
6443 {
6444 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6445 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6446 /* Find veneer symbol. */
6447 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6448 errnode->u.b.veneer->u.v.id);
6449
6450 myh = elf_link_hash_lookup
6451 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6452
6453 if (myh == NULL)
6454 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6455 "`%s'"), abfd, tmp_name);
6456
6457 vma = myh->root.u.def.section->output_section->vma
6458 + myh->root.u.def.section->output_offset
6459 + myh->root.u.def.value;
6460
6461 errnode->u.b.veneer->vma = vma;
6462 break;
6463
6464 case VFP11_ERRATUM_ARM_VENEER:
6465 case VFP11_ERRATUM_THUMB_VENEER:
6466 /* Find return location. */
6467 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6468 errnode->u.v.id);
6469
6470 myh = elf_link_hash_lookup
6471 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6472
6473 if (myh == NULL)
6474 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6475 "`%s'"), abfd, tmp_name);
6476
6477 vma = myh->root.u.def.section->output_section->vma
6478 + myh->root.u.def.section->output_offset
6479 + myh->root.u.def.value;
6480
6481 errnode->u.v.branch->vma = vma;
6482 break;
906e58ca 6483
c7b8f16e
JB		 6484 default:
6485 abort ();
6486 }
6487 }
6488 }
906e58ca 6489
c7b8f16e
JB		 6490 free (tmp_name);
6491}
6492
6493
eb043451
PB		 6494/* Set target relocation values needed during linking. */
6495
6496void
bf21ed78
MS		 6497bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6498 struct bfd_link_info *link_info,
eb043451 6499 int target1_is_rel,
319850b4 6500 char * target2_type,
33bfe774 6501 int fix_v4bx,
c7b8f16e 6502 int use_blx,
bf21ed78 6503 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6504 int no_enum_warn, int no_wchar_warn,
48229727 6505 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6506{
6507 struct elf32_arm_link_hash_table *globals;
6508
6509 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6510 if (globals == NULL)
6511 return;
eb043451
PB		 6512
6513 globals->target1_is_rel = target1_is_rel;
6514 if (strcmp (target2_type, "rel") == 0)
6515 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6516 else if (strcmp (target2_type, "abs") == 0)
6517 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6518 else if (strcmp (target2_type, "got-rel") == 0)
6519 globals->target2_reloc = R_ARM_GOT_PREL;
6520 else
6521 {
6522 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6523 target2_type);
6524 }
319850b4 6525 globals->fix_v4bx = fix_v4bx;
33bfe774 6526 globals->use_blx |= use_blx;
c7b8f16e 6527 globals->vfp11_fix = vfp11_fix;
27e55c4d 6528 globals->pic_veneer = pic_veneer;
48229727 6529 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6530
0ffa91dd
NC		 6531 BFD_ASSERT (is_arm_elf (output_bfd));
6532 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6533 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6534}
eb043451 6535
12a0a0fd 6536/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6537
12a0a0fd
PB		 6538static void
6539insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6540{
6541 bfd_vma upper;
6542 bfd_vma lower;
6543 int reloc_sign;
6544
6545 BFD_ASSERT ((offset & 1) == 0);
6546
6547 upper = bfd_get_16 (abfd, insn);
6548 lower = bfd_get_16 (abfd, insn + 2);
6549 reloc_sign = (offset < 0) ? 1 : 0;
6550 upper = (upper & ~(bfd_vma) 0x7ff)
6551 | ((offset >> 12) & 0x3ff)
6552 | (reloc_sign << 10);
906e58ca 6553 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6554 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6555 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6556 | ((offset >> 1) & 0x7ff);
6557 bfd_put_16 (abfd, upper, insn);
6558 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6559}
6560
9b485d32
NC		 6561/* Thumb code calling an ARM function. */
6562
252b5132 6563static int
57e8b36a
NC		 6564elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6565 const char * name,
6566 bfd * input_bfd,
6567 bfd * output_bfd,
6568 asection * input_section,
6569 bfd_byte * hit_data,
6570 asection * sym_sec,
6571 bfd_vma offset,
6572 bfd_signed_vma addend,
f2a9dd69
DJ		 6573 bfd_vma val,
6574 char **error_message)
252b5132 6575{
bcbdc74c 6576 asection * s = 0;
dc810e39 6577 bfd_vma my_offset;
252b5132 6578 long int ret_offset;
bcbdc74c
NC		 6579 struct elf_link_hash_entry * myh;
6580 struct elf32_arm_link_hash_table * globals;
252b5132 6581
f2a9dd69 6582 myh = find_thumb_glue (info, name, error_message);
252b5132 6583 if (myh == NULL)
b34976b6 6584 return FALSE;
252b5132
RH		 6585
6586 globals = elf32_arm_hash_table (info);
252b5132
RH		 6587 BFD_ASSERT (globals != NULL);
6588 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6589
6590 my_offset = myh->root.u.def.value;
6591
6592 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6593 THUMB2ARM_GLUE_SECTION_NAME);
6594
6595 BFD_ASSERT (s != NULL);
6596 BFD_ASSERT (s->contents != NULL);
6597 BFD_ASSERT (s->output_section != NULL);
6598
6599 if ((my_offset & 0x01) == 0x01)
6600 {
6601 if (sym_sec != NULL
6602 && sym_sec->owner != NULL
6603 && !INTERWORK_FLAG (sym_sec->owner))
6604 {
8f615d07 6605 (*_bfd_error_handler)
d003868e
AM		 6606 (_("%B(%s): warning: interworking not enabled.\n"
6607 " first occurrence: %B: thumb call to arm"),
6608 sym_sec->owner, input_bfd, name);
252b5132 6609
b34976b6 6610 return FALSE;
252b5132
RH		 6611 }
6612
6613 --my_offset;
6614 myh->root.u.def.value = my_offset;
6615
52ab56c2
PB		 6616 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6617 s->contents + my_offset);
252b5132 6618
52ab56c2
PB		 6619 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6620 s->contents + my_offset + 2);
252b5132
RH		 6621
6622 ret_offset =
9b485d32
NC		 6623 /* Address of destination of the stub. */
6624 ((bfd_signed_vma) val)
252b5132 6625 - ((bfd_signed_vma)
57e8b36a
NC		 6626 /* Offset from the start of the current section
6627 to the start of the stubs. */
9b485d32
NC		 6628 (s->output_offset
6629 /* Offset of the start of this stub from the start of the stubs. */
6630 + my_offset
6631 /* Address of the start of the current section. */
6632 + s->output_section->vma)
6633 /* The branch instruction is 4 bytes into the stub. */
6634 + 4
6635 /* ARM branches work from the pc of the instruction + 8. */
6636 + 8);
252b5132 6637
52ab56c2
PB		 6638 put_arm_insn (globals, output_bfd,
6639 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6640 s->contents + my_offset + 4);
252b5132
RH		 6641 }
6642
6643 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6644
427bfd90
NC		 6645 /* Now go back and fix up the original BL insn to point to here. */
6646 ret_offset =
6647 /* Address of where the stub is located. */
6648 (s->output_section->vma + s->output_offset + my_offset)
6649 /* Address of where the BL is located. */
57e8b36a
NC		 6650 - (input_section->output_section->vma + input_section->output_offset
6651 + offset)
427bfd90
NC		 6652 /* Addend in the relocation. */
6653 - addend
6654 /* Biassing for PC-relative addressing. */
6655 - 8;
252b5132 6656
12a0a0fd 6657 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6658
b34976b6 6659 return TRUE;
252b5132
RH		 6660}
6661
a4fd1a8e 6662/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6663
a4fd1a8e
PB		 6664static struct elf_link_hash_entry *
6665elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6666 const char * name,
6667 bfd * input_bfd,
6668 bfd * output_bfd,
6669 asection * sym_sec,
6670 bfd_vma val,
8029a119
NC		 6671 asection * s,
6672 char ** error_message)
252b5132 6673{
dc810e39 6674 bfd_vma my_offset;
252b5132 6675 long int ret_offset;
bcbdc74c
NC		 6676 struct elf_link_hash_entry * myh;
6677 struct elf32_arm_link_hash_table * globals;
252b5132 6678
f2a9dd69 6679 myh = find_arm_glue (info, name, error_message);
252b5132 6680 if (myh == NULL)
a4fd1a8e 6681 return NULL;
252b5132
RH		 6682
6683 globals = elf32_arm_hash_table (info);
252b5132
RH		 6684 BFD_ASSERT (globals != NULL);
6685 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6686
6687 my_offset = myh->root.u.def.value;
252b5132
RH		 6688
6689 if ((my_offset & 0x01) == 0x01)
6690 {
6691 if (sym_sec != NULL
6692 && sym_sec->owner != NULL
6693 && !INTERWORK_FLAG (sym_sec->owner))
6694 {
8f615d07 6695 (*_bfd_error_handler)
d003868e
AM		 6696 (_("%B(%s): warning: interworking not enabled.\n"
6697 " first occurrence: %B: arm call to thumb"),
6698 sym_sec->owner, input_bfd, name);
252b5132 6699 }
9b485d32 6700
252b5132
RH		 6701 --my_offset;
6702 myh->root.u.def.value = my_offset;
6703
27e55c4d
PB		 6704 if (info->shared || globals->root.is_relocatable_executable
6705 || globals->pic_veneer)
8f6277f5
PB		 6706 {
6707 /* For relocatable objects we can't use absolute addresses,
6708 so construct the address from a relative offset. */
6709 /* TODO: If the offset is small it's probably worth
6710 constructing the address with adds. */
52ab56c2
PB		 6711 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6712 s->contents + my_offset);
6713 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6714 s->contents + my_offset + 4);
6715 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6716 s->contents + my_offset + 8);
8f6277f5
PB		 6717 /* Adjust the offset by 4 for the position of the add,
6718 and 8 for the pipeline offset. */
6719 ret_offset = (val - (s->output_offset
6720 + s->output_section->vma
6721 + my_offset + 12))
6722 | 1;
6723 bfd_put_32 (output_bfd, ret_offset,
6724 s->contents + my_offset + 12);
6725 }
26079076
PB		 6726 else if (globals->use_blx)
6727 {
6728 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6729 s->contents + my_offset);
6730
6731 /* It's a thumb address. Add the low order bit. */
6732 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6733 s->contents + my_offset + 4);
6734 }
8f6277f5
PB		 6735 else
6736 {
52ab56c2
PB		 6737 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6738 s->contents + my_offset);
252b5132 6739
52ab56c2
PB		 6740 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6741 s->contents + my_offset + 4);
252b5132 6742
8f6277f5
PB		 6743 /* It's a thumb address. Add the low order bit. */
6744 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6745 s->contents + my_offset + 8);
8029a119
NC		 6746
6747 my_offset += 12;
8f6277f5 6748 }
252b5132
RH		 6749 }
6750
6751 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6752
a4fd1a8e
PB		 6753 return myh;
6754}
6755
6756/* Arm code calling a Thumb function. */
6757
6758static int
6759elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6760 const char * name,
6761 bfd * input_bfd,
6762 bfd * output_bfd,
6763 asection * input_section,
6764 bfd_byte * hit_data,
6765 asection * sym_sec,
6766 bfd_vma offset,
6767 bfd_signed_vma addend,
f2a9dd69
DJ		 6768 bfd_vma val,
6769 char **error_message)
a4fd1a8e
PB		 6770{
6771 unsigned long int tmp;
6772 bfd_vma my_offset;
6773 asection * s;
6774 long int ret_offset;
6775 struct elf_link_hash_entry * myh;
6776 struct elf32_arm_link_hash_table * globals;
6777
6778 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6779 BFD_ASSERT (globals != NULL);
6780 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6781
6782 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6783 ARM2THUMB_GLUE_SECTION_NAME);
6784 BFD_ASSERT (s != NULL);
6785 BFD_ASSERT (s->contents != NULL);
6786 BFD_ASSERT (s->output_section != NULL);
6787
6788 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6789 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6790 if (!myh)
6791 return FALSE;
6792
6793 my_offset = myh->root.u.def.value;
252b5132
RH		 6794 tmp = bfd_get_32 (input_bfd, hit_data);
6795 tmp = tmp & 0xFF000000;
6796
9b485d32 6797 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6798 ret_offset = (s->output_offset
6799 + my_offset
6800 + s->output_section->vma
6801 - (input_section->output_offset
6802 + input_section->output_section->vma
6803 + offset + addend)
6804 - 8);
9a5aca8c 6805
252b5132
RH		 6806 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6807
dc810e39 6808 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6809
b34976b6 6810 return TRUE;
252b5132
RH		 6811}
6812
a4fd1a8e
PB		 6813/* Populate Arm stub for an exported Thumb function. */
6814
6815static bfd_boolean
6816elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6817{
6818 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6819 asection * s;
6820 struct elf_link_hash_entry * myh;
6821 struct elf32_arm_link_hash_entry *eh;
6822 struct elf32_arm_link_hash_table * globals;
6823 asection *sec;
6824 bfd_vma val;
f2a9dd69 6825 char *error_message;
a4fd1a8e 6826
906e58ca 6827 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6828 /* Allocate stubs for exported Thumb functions on v4t. */
6829 if (eh->export_glue == NULL)
6830 return TRUE;
6831
6832 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6833 BFD_ASSERT (globals != NULL);
6834 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6835
6836 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6837 ARM2THUMB_GLUE_SECTION_NAME);
6838 BFD_ASSERT (s != NULL);
6839 BFD_ASSERT (s->contents != NULL);
6840 BFD_ASSERT (s->output_section != NULL);
6841
6842 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6843
6844 BFD_ASSERT (sec->output_section != NULL);
6845
a4fd1a8e
PB		 6846 val = eh->export_glue->root.u.def.value + sec->output_offset
6847 + sec->output_section->vma;
8029a119 6848
a4fd1a8e
PB		 6849 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6850 h->root.u.def.section->owner,
f2a9dd69
DJ		 6851 globals->obfd, sec, val, s,
6852 &error_message);
a4fd1a8e
PB		 6853 BFD_ASSERT (myh);
6854 return TRUE;
6855}
6856
845b51d6
PB		 6857/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6858
6859static bfd_vma
6860elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6861{
6862 bfd_byte *p;
6863 bfd_vma glue_addr;
6864 asection *s;
6865 struct elf32_arm_link_hash_table *globals;
6866
6867 globals = elf32_arm_hash_table (info);
845b51d6
PB		 6868 BFD_ASSERT (globals != NULL);
6869 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6870
6871 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6872 ARM_BX_GLUE_SECTION_NAME);
6873 BFD_ASSERT (s != NULL);
6874 BFD_ASSERT (s->contents != NULL);
6875 BFD_ASSERT (s->output_section != NULL);
6876
6877 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6878
6879 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6880
6881 if ((globals->bx_glue_offset[reg] & 1) == 0)
6882 {
6883 p = s->contents + glue_addr;
6884 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6885 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6886 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6887 globals->bx_glue_offset[reg] |= 1;
6888 }
6889
6890 return glue_addr + s->output_section->vma + s->output_offset;
6891}
6892
a4fd1a8e
PB		 6893/* Generate Arm stubs for exported Thumb symbols. */
6894static void
906e58ca 6895elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6896 struct bfd_link_info *link_info)
6897{
6898 struct elf32_arm_link_hash_table * globals;
6899
8029a119
NC		 6900 if (link_info == NULL)
6901 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6902 return;
6903
6904 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6905 if (globals == NULL)
6906 return;
6907
84c08195
PB		 6908 /* If blx is available then exported Thumb symbols are OK and there is
6909 nothing to do. */
a4fd1a8e
PB		 6910 if (globals->use_blx)
6911 return;
6912
6913 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6914 link_info);
6915}
6916
47beaa6a
RS		 6917/* Reserve space for COUNT dynamic relocations in relocation selection
6918 SRELOC. */
6919
6920static void
6921elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
6922 bfd_size_type count)
6923{
6924 struct elf32_arm_link_hash_table *htab;
6925
6926 htab = elf32_arm_hash_table (info);
6927 BFD_ASSERT (htab->root.dynamic_sections_created);
6928 if (sreloc == NULL)
6929 abort ();
6930 sreloc->size += RELOC_SIZE (htab) * count;
6931}
6932
6933/* Add relocation REL to the end of relocation section SRELOC. */
6934
6935static void
6936elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
6937 asection *sreloc, Elf_Internal_Rela *rel)
6938{
6939 bfd_byte *loc;
6940 struct elf32_arm_link_hash_table *htab;
6941
6942 htab = elf32_arm_hash_table (info);
6943 if (sreloc == NULL)
6944 abort ();
6945 loc = sreloc->contents;
6946 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
6947 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
6948 abort ();
6949 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
6950}
6951
eb043451
PB		 6952/* Some relocations map to different relocations depending on the
6953 target. Return the real relocation. */
8029a119 6954
eb043451
PB		 6955static int
6956arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6957 int r_type)
6958{
6959 switch (r_type)
6960 {
6961 case R_ARM_TARGET1:
6962 if (globals->target1_is_rel)
6963 return R_ARM_REL32;
6964 else
6965 return R_ARM_ABS32;
6966
6967 case R_ARM_TARGET2:
6968 return globals->target2_reloc;
6969
6970 default:
6971 return r_type;
6972 }
6973}
eb043451 6974
ba93b8ac
DJ		 6975/* Return the base VMA address which should be subtracted from real addresses
6976 when resolving @dtpoff relocation.
6977 This is PT_TLS segment p_vaddr. */
6978
6979static bfd_vma
6980dtpoff_base (struct bfd_link_info *info)
6981{
6982 /* If tls_sec is NULL, we should have signalled an error already. */
6983 if (elf_hash_table (info)->tls_sec == NULL)
6984 return 0;
6985 return elf_hash_table (info)->tls_sec->vma;
6986}
6987
6988/* Return the relocation value for @tpoff relocation
6989 if STT_TLS virtual address is ADDRESS. */
6990
6991static bfd_vma
6992tpoff (struct bfd_link_info *info, bfd_vma address)
6993{
6994 struct elf_link_hash_table *htab = elf_hash_table (info);
6995 bfd_vma base;
6996
6997 /* If tls_sec is NULL, we should have signalled an error already. */
6998 if (htab->tls_sec == NULL)
6999 return 0;
7000 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7001 return address - htab->tls_sec->vma + base;
7002}
7003
00a97672
RS		 7004/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7005 VALUE is the relocation value. */
7006
7007static bfd_reloc_status_type
7008elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7009{
7010 if (value > 0xfff)
7011 return bfd_reloc_overflow;
7012
7013 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7014 bfd_put_32 (abfd, value, data);
7015 return bfd_reloc_ok;
7016}
7017
0855e32b
NS		 7018/* Handle TLS relaxations. Relaxing is possible for symbols that use
7019 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7020 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7021
7022 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7023 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7024 case of error.
7025
7026 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7027 the pre-relaxed code. It would be nice if the relocs were updated
7028 to match the optimization. */
0855e32b
NS		 7029
7030static bfd_reloc_status_type
7031elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7032 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7033 Elf_Internal_Rela *rel, unsigned long is_local)
7034{
7035 unsigned long insn;
7036
7037 switch (ELF32_R_TYPE (rel->r_info))
7038 {
7039 default:
7040 return bfd_reloc_notsupported;
7041
7042 case R_ARM_TLS_GOTDESC:
7043 if (is_local)
7044 insn = 0;
7045 else
7046 {
7047 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7048 if (insn & 1)
7049 insn -= 5; /* THUMB */
7050 else
7051 insn -= 8; /* ARM */
7052 }
7053 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7054 return bfd_reloc_continue;
7055
7056 case R_ARM_THM_TLS_DESCSEQ:
7057 /* Thumb insn. */
7058 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7059 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7060 {
7061 if (is_local)
7062 /* nop */
7063 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7064 }
7065 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7066 {
7067 if (is_local)
7068 /* nop */
7069 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7070 else
7071 /* ldr rx,[ry] */
7072 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7073 }
7074 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7075 {
7076 if (is_local)
7077 /* nop */
7078 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7079 else
7080 /* mov r0, rx */
7081 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7082 contents + rel->r_offset);
7083 }
7084 else
7085 {
7086 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7087 /* It's a 32 bit instruction, fetch the rest of it for
7088 error generation. */
7089 insn = (insn << 16)
7090 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7091 (*_bfd_error_handler)
7092 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7093 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7094 return bfd_reloc_notsupported;
7095 }
7096 break;
7097
7098 case R_ARM_TLS_DESCSEQ:
7099 /* arm insn. */
7100 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7101 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7102 {
7103 if (is_local)
7104 /* mov rx, ry */
7105 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7106 contents + rel->r_offset);
7107 }
7108 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7109 {
7110 if (is_local)
7111 /* nop */
7112 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7113 else
7114 /* ldr rx,[ry] */
7115 bfd_put_32 (input_bfd, insn & 0xfffff000,
7116 contents + rel->r_offset);
7117 }
7118 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7119 {
7120 if (is_local)
7121 /* nop */
7122 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7123 else
7124 /* mov r0, rx */
7125 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7126 contents + rel->r_offset);
7127 }
7128 else
7129 {
7130 (*_bfd_error_handler)
7131 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7132 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7133 return bfd_reloc_notsupported;
7134 }
7135 break;
7136
7137 case R_ARM_TLS_CALL:
7138 /* GD->IE relaxation, turn the instruction into 'nop' or
7139 'ldr r0, [pc,r0]' */
7140 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7141 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7142 break;
7143
7144 case R_ARM_THM_TLS_CALL:
7145 /* GD->IE relaxation */
7146 if (!is_local)
7147 /* add r0,pc; ldr r0, [r0] */
7148 insn = 0x44786800;
7149 else if (arch_has_thumb2_nop (globals))
7150 /* nop.w */
7151 insn = 0xf3af8000;
7152 else
7153 /* nop; nop */
7154 insn = 0xbf00bf00;
7155
7156 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7157 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7158 break;
7159 }
7160 return bfd_reloc_ok;
7161}
7162
4962c51a
MS		 7163/* For a given value of n, calculate the value of G_n as required to
7164 deal with group relocations. We return it in the form of an
7165 encoded constant-and-rotation, together with the final residual. If n is
7166 specified as less than zero, then final_residual is filled with the
7167 input value and no further action is performed. */
7168
7169static bfd_vma
7170calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7171{
7172 int current_n;
7173 bfd_vma g_n;
7174 bfd_vma encoded_g_n = 0;
7175 bfd_vma residual = value; /* Also known as Y_n. */
7176
7177 for (current_n = 0; current_n <= n; current_n++)
7178 {
7179 int shift;
7180
7181 /* Calculate which part of the value to mask. */
7182 if (residual == 0)
7183 shift = 0;
7184 else
7185 {
7186 int msb;
7187
7188 /* Determine the most significant bit in the residual and
7189 align the resulting value to a 2-bit boundary. */
7190 for (msb = 30; msb >= 0; msb -= 2)
7191 if (residual & (3 << msb))
7192 break;
7193
7194 /* The desired shift is now (msb - 6), or zero, whichever
7195 is the greater. */
7196 shift = msb - 6;
7197 if (shift < 0)
7198 shift = 0;
7199 }
7200
7201 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7202 g_n = residual & (0xff << shift);
7203 encoded_g_n = (g_n >> shift)
7204 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7205
7206 /* Calculate the residual for the next time around. */
7207 residual &= ~g_n;
7208 }
7209
7210 *final_residual = residual;
7211
7212 return encoded_g_n;
7213}
7214
7215/* Given an ARM instruction, determine whether it is an ADD or a SUB.
7216 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 7217
4962c51a 7218static int
906e58ca 7219identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 7220{
7221 int opcode = insn & 0x1e00000;
7222
7223 if (opcode == 1 << 23) /* ADD */
7224 return 1;
7225
7226 if (opcode == 1 << 22) /* SUB */
7227 return -1;
7228
7229 return 0;
7230}
7231
252b5132 7232/* Perform a relocation as part of a final link. */
9b485d32 7233
252b5132 7234static bfd_reloc_status_type
57e8b36a
NC		 7235elf32_arm_final_link_relocate (reloc_howto_type * howto,
7236 bfd * input_bfd,
7237 bfd * output_bfd,
7238 asection * input_section,
7239 bfd_byte * contents,
7240 Elf_Internal_Rela * rel,
7241 bfd_vma value,
7242 struct bfd_link_info * info,
7243 asection * sym_sec,
7244 const char * sym_name,
35fc36a8 7245 enum arm_st_branch_type branch_type,
0945cdfd 7246 struct elf_link_hash_entry * h,
f2a9dd69 7247 bfd_boolean * unresolved_reloc_p,
8029a119 7248 char ** error_message)
252b5132
RH		 7249{
7250 unsigned long r_type = howto->type;
7251 unsigned long r_symndx;
7252 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 7253 bfd_vma * local_got_offsets;
0855e32b 7254 bfd_vma * local_tlsdesc_gotents;
252b5132
RH		 7255 asection * sgot = NULL;
7256 asection * splt = NULL;
7257 asection * sreloc = NULL;
362d30a1 7258 asection * srelgot;
252b5132 7259 bfd_vma addend;
ba96a88f
NC		 7260 bfd_signed_vma signed_addend;
7261 struct elf32_arm_link_hash_table * globals;
f21f3fe0 7262
9c504268 7263 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 7264 if (globals == NULL)
7265 return bfd_reloc_notsupported;
9c504268 7266
0ffa91dd
NC		 7267 BFD_ASSERT (is_arm_elf (input_bfd));
7268
7269 /* Some relocation types map to different relocations depending on the
9c504268 7270 target. We pick the right one here. */
eb043451 7271 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 7272
7273 /* It is possible to have linker relaxations on some TLS access
7274 models. Update our information here. */
7275 r_type = elf32_arm_tls_transition (info, r_type, h);
7276
eb043451
PB		 7277 if (r_type != howto->type)
7278 howto = elf32_arm_howto_from_type (r_type);
9c504268 7279
cac15327
NC		 7280 /* If the start address has been set, then set the EF_ARM_HASENTRY
7281 flag. Setting this more than once is redundant, but the cost is
7282 not too high, and it keeps the code simple.
99e4ae17 7283
cac15327
NC		 7284 The test is done here, rather than somewhere else, because the
7285 start address is only set just before the final link commences.
7286
7287 Note - if the user deliberately sets a start address of 0, the
7288 flag will not be set. */
7289 if (bfd_get_start_address (output_bfd) != 0)
7290 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 7291
362d30a1
RS		 7292 sgot = globals->root.sgot;
7293 splt = globals->root.splt;
7294 srelgot = globals->root.srelgot;
252b5132 7295 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 7296 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
7297
252b5132
RH		 7298 r_symndx = ELF32_R_SYM (rel->r_info);
7299
4e7fd91e 7300 if (globals->use_rel)
ba96a88f 7301 {
4e7fd91e
PB		 7302 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
7303
7304 if (addend & ((howto->src_mask + 1) >> 1))
7305 {
7306 signed_addend = -1;
7307 signed_addend &= ~ howto->src_mask;
7308 signed_addend |= addend;
7309 }
7310 else
7311 signed_addend = addend;
ba96a88f
NC		 7312 }
7313 else
4e7fd91e 7314 addend = signed_addend = rel->r_addend;
f21f3fe0 7315
252b5132
RH		 7316 switch (r_type)
7317 {
7318 case R_ARM_NONE:
28a094c2
DJ		 7319 /* We don't need to find a value for this symbol. It's just a
7320 marker. */
7321 *unresolved_reloc_p = FALSE;
252b5132
RH		 7322 return bfd_reloc_ok;
7323
00a97672
RS		 7324 case R_ARM_ABS12:
7325 if (!globals->vxworks_p)
7326 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7327
252b5132
RH		 7328 case R_ARM_PC24:
7329 case R_ARM_ABS32:
bb224fc3 7330 case R_ARM_ABS32_NOI:
252b5132 7331 case R_ARM_REL32:
bb224fc3 7332 case R_ARM_REL32_NOI:
5b5bb741
PB		 7333 case R_ARM_CALL:
7334 case R_ARM_JUMP24:
dfc5f959 7335 case R_ARM_XPC25:
eb043451 7336 case R_ARM_PREL31:
7359ea65 7337 case R_ARM_PLT32:
7359ea65
DJ		 7338 /* Handle relocations which should use the PLT entry. ABS32/REL32
7339 will use the symbol's value, which may point to a PLT entry, but we
7340 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 7341 branches in this object should go to it, except if the PLT is too
7342 far away, in which case a long branch stub should be inserted. */
bb224fc3 7343 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 7344 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 7345 && r_type != R_ARM_CALL
7346 && r_type != R_ARM_JUMP24
7347 && r_type != R_ARM_PLT32)
7359ea65 7348 && h != NULL
c84cd8ee 7349 && splt != NULL
7359ea65
DJ		 7350 && h->plt.offset != (bfd_vma) -1)
7351 {
c84cd8ee
DJ		 7352 /* If we've created a .plt section, and assigned a PLT entry to
7353 this function, it should not be known to bind locally. If
7354 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 7355 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
7356
7357 value = (splt->output_section->vma
7358 + splt->output_offset
7359 + h->plt.offset);
0945cdfd 7360 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 7361 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7362 contents, rel->r_offset, value,
00a97672 7363 rel->r_addend);
7359ea65
DJ		 7364 }
7365
67687978
PB		 7366 /* When generating a shared object or relocatable executable, these
7367 relocations are copied into the output file to be resolved at
7368 run time. */
7369 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 7370 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 7371 && !(globals->vxworks_p
3348747a
NS		 7372 && strcmp (input_section->output_section->name,
7373 ".tls_vars") == 0)
bb224fc3 7374 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 7375 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 7376 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 7377 && (h == NULL
7378 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7379 || h->root.type != bfd_link_hash_undefweak)
7380 && r_type != R_ARM_PC24
5b5bb741
PB		 7381 && r_type != R_ARM_CALL
7382 && r_type != R_ARM_JUMP24
ee06dc07 7383 && r_type != R_ARM_PREL31
7359ea65 7384 && r_type != R_ARM_PLT32)
252b5132 7385 {
947216bf 7386 Elf_Internal_Rela outrel;
b34976b6 7387 bfd_boolean skip, relocate;
f21f3fe0 7388
0945cdfd
DJ		 7389 *unresolved_reloc_p = FALSE;
7390
252b5132
RH		 7391 if (sreloc == NULL)
7392 {
83bac4b0
NC		 7393 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
7394 ! globals->use_rel);
f21f3fe0 7395
83bac4b0 7396 if (sreloc == NULL)
252b5132 7397 return bfd_reloc_notsupported;
252b5132 7398 }
f21f3fe0 7399
b34976b6
AM		 7400 skip = FALSE;
7401 relocate = FALSE;
f21f3fe0 7402
00a97672 7403 outrel.r_addend = addend;
c629eae0
JJ		 7404 outrel.r_offset =
7405 _bfd_elf_section_offset (output_bfd, info, input_section,
7406 rel->r_offset);
7407 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 7408 skip = TRUE;
0bb2d96a 7409 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 7410 skip = TRUE, relocate = TRUE;
252b5132
RH		 7411 outrel.r_offset += (input_section->output_section->vma
7412 + input_section->output_offset);
f21f3fe0 7413
252b5132 7414 if (skip)
0bb2d96a 7415 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 7416 else if (h != NULL
7417 && h->dynindx != -1
7359ea65 7418 && (!info->shared
5e681ec4 7419 || !info->symbolic
f5385ebf 7420 || !h->def_regular))
5e681ec4 7421 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 7422 else
7423 {
a16385dc
MM		 7424 int symbol;
7425
5e681ec4 7426 /* This symbol is local, or marked to become local. */
35fc36a8 7427 if (branch_type == ST_BRANCH_TO_THUMB)
b7693d02 7428 value |= 1;
a16385dc 7429 if (globals->symbian_p)
6366ff1e 7430 {
74541ad4
AM		 7431 asection *osec;
7432
6366ff1e
MM		 7433 /* On Symbian OS, the data segment and text segement
7434 can be relocated independently. Therefore, we
7435 must indicate the segment to which this
7436 relocation is relative. The BPABI allows us to
7437 use any symbol in the right segment; we just use
7438 the section symbol as it is convenient. (We
7439 cannot use the symbol given by "h" directly as it
74541ad4
AM		 7440 will not appear in the dynamic symbol table.)
7441
7442 Note that the dynamic linker ignores the section
7443 symbol value, so we don't subtract osec->vma
7444 from the emitted reloc addend. */
10dbd1f3 7445 if (sym_sec)
74541ad4 7446 osec = sym_sec->output_section;
10dbd1f3 7447 else
74541ad4
AM		 7448 osec = input_section->output_section;
7449 symbol = elf_section_data (osec)->dynindx;
7450 if (symbol == 0)
7451 {
7452 struct elf_link_hash_table *htab = elf_hash_table (info);
7453
7454 if ((osec->flags & SEC_READONLY) == 0
7455 && htab->data_index_section != NULL)
7456 osec = htab->data_index_section;
7457 else
7458 osec = htab->text_index_section;
7459 symbol = elf_section_data (osec)->dynindx;
7460 }
6366ff1e
MM		 7461 BFD_ASSERT (symbol != 0);
7462 }
a16385dc
MM		 7463 else
7464 /* On SVR4-ish systems, the dynamic loader cannot
7465 relocate the text and data segments independently,
7466 so the symbol does not matter. */
7467 symbol = 0;
7468 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 7469 if (globals->use_rel)
7470 relocate = TRUE;
7471 else
7472 outrel.r_addend += value;
252b5132 7473 }
f21f3fe0 7474
47beaa6a 7475 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 7476
f21f3fe0 7477 /* If this reloc is against an external symbol, we do not want to
252b5132 7478 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 7479 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 7480 if (! relocate)
7481 return bfd_reloc_ok;
9a5aca8c 7482
f21f3fe0 7483 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 7484 contents, rel->r_offset, value,
7485 (bfd_vma) 0);
7486 }
7487 else switch (r_type)
7488 {
00a97672
RS		 7489 case R_ARM_ABS12:
7490 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7491
dfc5f959 7492 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 7493 case R_ARM_CALL:
7494 case R_ARM_JUMP24:
8029a119 7495 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 7496 case R_ARM_PLT32:
906e58ca 7497 {
906e58ca
NC		 7498 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7499
dfc5f959 7500 if (r_type == R_ARM_XPC25)
252b5132 7501 {
dfc5f959
NC		 7502 /* Check for Arm calling Arm function. */
7503 /* FIXME: Should we translate the instruction into a BL
7504 instruction instead ? */
35fc36a8 7505 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 7506 (*_bfd_error_handler)
7507 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7508 input_bfd,
7509 h ? h->root.root.string : "(local)");
dfc5f959 7510 }
155d87d7 7511 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7512 {
7513 /* Check for Arm calling Thumb function. */
35fc36a8 7514 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 7515 {
f2a9dd69
DJ		 7516 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7517 output_bfd, input_section,
7518 hit_data, sym_sec, rel->r_offset,
7519 signed_addend, value,
7520 error_message))
7521 return bfd_reloc_ok;
7522 else
7523 return bfd_reloc_dangerous;
dfc5f959 7524 }
252b5132 7525 }
ba96a88f 7526
906e58ca 7527 /* Check if a stub has to be inserted because the
8029a119 7528 destination is too far or we are changing mode. */
155d87d7
CL		 7529 if ( r_type == R_ARM_CALL
7530 || r_type == R_ARM_JUMP24
7531 || r_type == R_ARM_PLT32)
906e58ca 7532 {
fe33d2fa
CL		 7533 enum elf32_arm_stub_type stub_type = arm_stub_none;
7534 struct elf32_arm_link_hash_entry *hash;
7535
7536 hash = (struct elf32_arm_link_hash_entry *) h;
7537 stub_type = arm_type_of_stub (info, input_section, rel,
35fc36a8 7538 &branch_type, hash,
fe33d2fa
CL		 7539 value, sym_sec,
7540 input_bfd, sym_name);
5fa9e92f 7541
fe33d2fa 7542 if (stub_type != arm_stub_none)
906e58ca
NC		 7543 {
7544 /* The target is out of reach, so redirect the
7545 branch to the local stub for this function. */
7546
7547 stub_entry = elf32_arm_get_stub_entry (input_section,
7548 sym_sec, h,
fe33d2fa
CL		 7549 rel, globals,
7550 stub_type);
906e58ca
NC		 7551 if (stub_entry != NULL)
7552 value = (stub_entry->stub_offset
7553 + stub_entry->stub_sec->output_offset
7554 + stub_entry->stub_sec->output_section->vma);
7555 }
fe33d2fa
CL		 7556 else
7557 {
7558 /* If the call goes through a PLT entry, make sure to
7559 check distance to the right destination address. */
7560 if (h != NULL
7561 && splt != NULL
7562 && h->plt.offset != (bfd_vma) -1)
7563 {
7564 value = (splt->output_section->vma
7565 + splt->output_offset
7566 + h->plt.offset);
7567 *unresolved_reloc_p = FALSE;
7568 /* The PLT entry is in ARM mode, regardless of the
7569 target function. */
35fc36a8 7570 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 7571 }
7572 }
906e58ca
NC		 7573 }
7574
dea514f5
PB		 7575 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7576 where:
7577 S is the address of the symbol in the relocation.
7578 P is address of the instruction being relocated.
7579 A is the addend (extracted from the instruction) in bytes.
7580
7581 S is held in 'value'.
7582 P is the base address of the section containing the
7583 instruction plus the offset of the reloc into that
7584 section, ie:
7585 (input_section->output_section->vma +
7586 input_section->output_offset +
7587 rel->r_offset).
7588 A is the addend, converted into bytes, ie:
7589 (signed_addend * 4)
7590
7591 Note: None of these operations have knowledge of the pipeline
7592 size of the processor, thus it is up to the assembler to
7593 encode this information into the addend. */
7594 value -= (input_section->output_section->vma
7595 + input_section->output_offset);
7596 value -= rel->r_offset;
4e7fd91e
PB		 7597 if (globals->use_rel)
7598 value += (signed_addend << howto->size);
7599 else
7600 /* RELA addends do not have to be adjusted by howto->size. */
7601 value += signed_addend;
23080146 7602
dcb5e6e6
NC		 7603 signed_addend = value;
7604 signed_addend >>= howto->rightshift;
9a5aca8c 7605
5ab79981 7606 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7607 the next instruction unless a PLT entry will be created.
77b4f08f 7608 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 7609 The jump to the next instruction is optimized as a NOP depending
7610 on the architecture. */
ffcb4889
NS		 7611 if (h ? (h->root.type == bfd_link_hash_undefweak
7612 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
77b4f08f 7613 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 7614 {
cd1dac3d
DG		 7615 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7616
7617 if (arch_has_arm_nop (globals))
7618 value |= 0x0320f000;
7619 else
7620 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7621 }
7622 else
59f2c4e7 7623 {
9b485d32 7624 /* Perform a signed range check. */
dcb5e6e6 7625 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7626 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7627 return bfd_reloc_overflow;
9a5aca8c 7628
5ab79981 7629 addend = (value & 2);
39b41c9c 7630
5ab79981
PB		 7631 value = (signed_addend & howto->dst_mask)
7632 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7633
5ab79981
PB		 7634 if (r_type == R_ARM_CALL)
7635 {
155d87d7 7636 /* Set the H bit in the BLX instruction. */
35fc36a8 7637 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 7638 {
7639 if (addend)
7640 value |= (1 << 24);
7641 else
7642 value &= ~(bfd_vma)(1 << 24);
7643 }
7644
5ab79981 7645 /* Select the correct instruction (BL or BLX). */
906e58ca 7646 /* Only if we are not handling a BL to a stub. In this
8029a119 7647 case, mode switching is performed by the stub. */
35fc36a8 7648 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981
PB		 7649 value |= (1 << 28);
7650 else
7651 {
7652 value &= ~(bfd_vma)(1 << 28);
7653 value |= (1 << 24);
7654 }
39b41c9c
PB		 7655 }
7656 }
906e58ca 7657 }
252b5132 7658 break;
f21f3fe0 7659
252b5132
RH		 7660 case R_ARM_ABS32:
7661 value += addend;
35fc36a8 7662 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 7663 value |= 1;
7664 break;
f21f3fe0 7665
bb224fc3
MS		 7666 case R_ARM_ABS32_NOI:
7667 value += addend;
7668 break;
7669
252b5132 7670 case R_ARM_REL32:
a8bc6c78 7671 value += addend;
35fc36a8 7672 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 7673 value |= 1;
252b5132 7674 value -= (input_section->output_section->vma
62efb346 7675 + input_section->output_offset + rel->r_offset);
252b5132 7676 break;
eb043451 7677
bb224fc3
MS		 7678 case R_ARM_REL32_NOI:
7679 value += addend;
7680 value -= (input_section->output_section->vma
7681 + input_section->output_offset + rel->r_offset);
7682 break;
7683
eb043451
PB		 7684 case R_ARM_PREL31:
7685 value -= (input_section->output_section->vma
7686 + input_section->output_offset + rel->r_offset);
7687 value += signed_addend;
7688 if (! h || h->root.type != bfd_link_hash_undefweak)
7689 {
8029a119 7690 /* Check for overflow. */
eb043451
PB		 7691 if ((value ^ (value >> 1)) & (1 << 30))
7692 return bfd_reloc_overflow;
7693 }
7694 value &= 0x7fffffff;
7695 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 7696 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 7697 value |= 1;
7698 break;
252b5132 7699 }
f21f3fe0 7700
252b5132
RH		 7701 bfd_put_32 (input_bfd, value, hit_data);
7702 return bfd_reloc_ok;
7703
7704 case R_ARM_ABS8:
7705 value += addend;
4e67d4ca
DG		 7706
7707 /* There is no way to tell whether the user intended to use a signed or
7708 unsigned addend. When checking for overflow we accept either,
7709 as specified by the AAELF. */
7710 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 7711 return bfd_reloc_overflow;
7712
7713 bfd_put_8 (input_bfd, value, hit_data);
7714 return bfd_reloc_ok;
7715
7716 case R_ARM_ABS16:
7717 value += addend;
7718
4e67d4ca
DG		 7719 /* See comment for R_ARM_ABS8. */
7720 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 7721 return bfd_reloc_overflow;
7722
7723 bfd_put_16 (input_bfd, value, hit_data);
7724 return bfd_reloc_ok;
7725
252b5132 7726 case R_ARM_THM_ABS5:
9b485d32 7727 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7728 if (globals->use_rel)
7729 {
7730 /* Need to refetch addend. */
7731 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7732 /* ??? Need to determine shift amount from operand size. */
7733 addend >>= howto->rightshift;
7734 }
252b5132
RH		 7735 value += addend;
7736
7737 /* ??? Isn't value unsigned? */
7738 if ((long) value > 0x1f || (long) value < -0x10)
7739 return bfd_reloc_overflow;
7740
7741 /* ??? Value needs to be properly shifted into place first. */
7742 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7743 bfd_put_16 (input_bfd, value, hit_data);
7744 return bfd_reloc_ok;
7745
2cab6cc3
MS		 7746 case R_ARM_THM_ALU_PREL_11_0:
7747 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7748 {
7749 bfd_vma insn;
7750 bfd_signed_vma relocation;
7751
7752 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7753 | bfd_get_16 (input_bfd, hit_data + 2);
7754
7755 if (globals->use_rel)
7756 {
7757 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7758 | ((insn & (1 << 26)) >> 15);
7759 if (insn & 0xf00000)
7760 signed_addend = -signed_addend;
7761 }
7762
7763 relocation = value + signed_addend;
7764 relocation -= (input_section->output_section->vma
7765 + input_section->output_offset
7766 + rel->r_offset);
7767
7768 value = abs (relocation);
7769
7770 if (value >= 0x1000)
7771 return bfd_reloc_overflow;
7772
7773 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7774 | ((value & 0x700) << 4)
7775 | ((value & 0x800) << 15);
7776 if (relocation < 0)
7777 insn |= 0xa00000;
7778
7779 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7780 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7781
7782 return bfd_reloc_ok;
7783 }
7784
e1ec24c6
NC		 7785 case R_ARM_THM_PC8:
7786 /* PR 10073: This reloc is not generated by the GNU toolchain,
7787 but it is supported for compatibility with third party libraries
7788 generated by other compilers, specifically the ARM/IAR. */
7789 {
7790 bfd_vma insn;
7791 bfd_signed_vma relocation;
7792
7793 insn = bfd_get_16 (input_bfd, hit_data);
7794
7795 if (globals->use_rel)
7796 addend = (insn & 0x00ff) << 2;
7797
7798 relocation = value + addend;
7799 relocation -= (input_section->output_section->vma
7800 + input_section->output_offset
7801 + rel->r_offset);
7802
7803 value = abs (relocation);
7804
7805 /* We do not check for overflow of this reloc. Although strictly
7806 speaking this is incorrect, it appears to be necessary in order
7807 to work with IAR generated relocs. Since GCC and GAS do not
7808 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7809 a problem for them. */
7810 value &= 0x3fc;
7811
7812 insn = (insn & 0xff00) | (value >> 2);
7813
7814 bfd_put_16 (input_bfd, insn, hit_data);
7815
7816 return bfd_reloc_ok;
7817 }
7818
2cab6cc3
MS		 7819 case R_ARM_THM_PC12:
7820 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7821 {
7822 bfd_vma insn;
7823 bfd_signed_vma relocation;
7824
7825 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7826 | bfd_get_16 (input_bfd, hit_data + 2);
7827
7828 if (globals->use_rel)
7829 {
7830 signed_addend = insn & 0xfff;
7831 if (!(insn & (1 << 23)))
7832 signed_addend = -signed_addend;
7833 }
7834
7835 relocation = value + signed_addend;
7836 relocation -= (input_section->output_section->vma
7837 + input_section->output_offset
7838 + rel->r_offset);
7839
7840 value = abs (relocation);
7841
7842 if (value >= 0x1000)
7843 return bfd_reloc_overflow;
7844
7845 insn = (insn & 0xff7ff000) | value;
7846 if (relocation >= 0)
7847 insn |= (1 << 23);
7848
7849 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7850 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7851
7852 return bfd_reloc_ok;
7853 }
7854
dfc5f959 7855 case R_ARM_THM_XPC22:
c19d1205 7856 case R_ARM_THM_CALL:
bd97cb95 7857 case R_ARM_THM_JUMP24:
dfc5f959 7858 /* Thumb BL (branch long instruction). */
252b5132 7859 {
b34976b6 7860 bfd_vma relocation;
e95de063 7861 bfd_vma reloc_sign;
b34976b6
AM		 7862 bfd_boolean overflow = FALSE;
7863 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7864 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7865 bfd_signed_vma reloc_signed_max;
7866 bfd_signed_vma reloc_signed_min;
b34976b6 7867 bfd_vma check;
252b5132 7868 bfd_signed_vma signed_check;
e95de063 7869 int bitsize;
cd1dac3d 7870 const int thumb2 = using_thumb2 (globals);
252b5132 7871
5ab79981 7872 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7873 the next instruction unless a PLT entry will be created.
7874 The jump to the next instruction is optimized as a NOP.W for
7875 Thumb-2 enabled architectures. */
19540007
JM		 7876 if (h && h->root.type == bfd_link_hash_undefweak
7877 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7878 {
cd1dac3d
DG		 7879 if (arch_has_thumb2_nop (globals))
7880 {
7881 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7882 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7883 }
7884 else
7885 {
7886 bfd_put_16 (input_bfd, 0xe000, hit_data);
7887 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7888 }
5ab79981
PB		 7889 return bfd_reloc_ok;
7890 }
7891
e95de063
MS		 7892 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7893 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7894 if (globals->use_rel)
7895 {
e95de063
MS		 7896 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7897 bfd_vma upper = upper_insn & 0x3ff;
7898 bfd_vma lower = lower_insn & 0x7ff;
7899 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7900 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7901 bfd_vma i1 = j1 ^ s ? 0 : 1;
7902 bfd_vma i2 = j2 ^ s ? 0 : 1;
7903
7904 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7905 /* Sign extend. */
7906 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7907
4e7fd91e
PB		 7908 signed_addend = addend;
7909 }
cb1afa5c 7910
dfc5f959
NC		 7911 if (r_type == R_ARM_THM_XPC22)
7912 {
7913 /* Check for Thumb to Thumb call. */
7914 /* FIXME: Should we translate the instruction into a BL
7915 instruction instead ? */
35fc36a8 7916 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 7917 (*_bfd_error_handler)
7918 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7919 input_bfd,
7920 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7921 }
7922 else
252b5132 7923 {
dfc5f959
NC		 7924 /* If it is not a call to Thumb, assume call to Arm.
7925 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7926 function call at all, but rather a long jump. Calls through
7927 the PLT do not require stubs. */
35fc36a8 7928 if (branch_type == ST_BRANCH_TO_ARM
b7693d02
DJ		 7929 && (h == NULL || splt == NULL
7930 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7931 {
bd97cb95 7932 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7933 {
7934 /* Convert BL to BLX. */
7935 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7936 }
155d87d7
CL		 7937 else if (( r_type != R_ARM_THM_CALL)
7938 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7939 {
7940 if (elf32_thumb_to_arm_stub
7941 (info, sym_name, input_bfd, output_bfd, input_section,
7942 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7943 error_message))
7944 return bfd_reloc_ok;
7945 else
7946 return bfd_reloc_dangerous;
7947 }
da5938a2 7948 }
35fc36a8
RS		 7949 else if (branch_type == ST_BRANCH_TO_THUMB
7950 && globals->use_blx
bd97cb95 7951 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7952 {
7953 /* Make sure this is a BL. */
7954 lower_insn |= 0x1800;
7955 }
252b5132 7956 }
f21f3fe0 7957
fe33d2fa 7958 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 7959 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7960 {
7961 /* Check if a stub has to be inserted because the destination
8029a119 7962 is too far. */
fe33d2fa
CL		 7963 struct elf32_arm_stub_hash_entry *stub_entry;
7964 struct elf32_arm_link_hash_entry *hash;
7965
7966 hash = (struct elf32_arm_link_hash_entry *) h;
7967
7968 stub_type = arm_type_of_stub (info, input_section, rel,
35fc36a8 7969 &branch_type, hash, value, sym_sec,
fe33d2fa
CL		 7970 input_bfd, sym_name);
7971
7972 if (stub_type != arm_stub_none)
906e58ca
NC		 7973 {
7974 /* The target is out of reach or we are changing modes, so
7975 redirect the branch to the local stub for this
7976 function. */
7977 stub_entry = elf32_arm_get_stub_entry (input_section,
7978 sym_sec, h,
fe33d2fa
CL		 7979 rel, globals,
7980 stub_type);
906e58ca
NC		 7981 if (stub_entry != NULL)
7982 value = (stub_entry->stub_offset
7983 + stub_entry->stub_sec->output_offset
7984 + stub_entry->stub_sec->output_section->vma);
7985
f4ac8484 7986 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7987 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7988 {
7989 if ((stub_entry
7990 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 7991 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 7992 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7993 }
906e58ca
NC		 7994 }
7995 }
7996
fe33d2fa
CL		 7997 /* Handle calls via the PLT. */
7998 if (stub_type == arm_stub_none
7999 && h != NULL
8000 && splt != NULL
8001 && h->plt.offset != (bfd_vma) -1)
8002 {
8003 value = (splt->output_section->vma
8004 + splt->output_offset
8005 + h->plt.offset);
8006
8007 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8008 {
8009 /* If the Thumb BLX instruction is available, convert
8010 the BL to a BLX instruction to call the ARM-mode
8011 PLT entry. */
8012 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8013 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8014 }
8015 else
8016 {
8017 /* Target the Thumb stub before the ARM PLT entry. */
8018 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8019 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8020 }
8021 *unresolved_reloc_p = FALSE;
8022 }
8023
ba96a88f 8024 relocation = value + signed_addend;
f21f3fe0 8025
252b5132 8026 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8027 + input_section->output_offset
8028 + rel->r_offset);
9a5aca8c 8029
252b5132
RH		 8030 check = relocation >> howto->rightshift;
8031
8032 /* If this is a signed value, the rightshift just dropped
8033 leading 1 bits (assuming twos complement). */
8034 if ((bfd_signed_vma) relocation >= 0)
8035 signed_check = check;
8036 else
8037 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8038
e95de063
MS		 8039 /* Calculate the permissable maximum and minimum values for
8040 this relocation according to whether we're relocating for
8041 Thumb-2 or not. */
8042 bitsize = howto->bitsize;
8043 if (!thumb2)
8044 bitsize -= 2;
f6ebfac0 8045 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8046 reloc_signed_min = ~reloc_signed_max;
8047
252b5132 8048 /* Assumes two's complement. */
ba96a88f 8049 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8050 overflow = TRUE;
252b5132 8051
bd97cb95 8052 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8053 /* For a BLX instruction, make sure that the relocation is rounded up
8054 to a word boundary. This follows the semantics of the instruction
8055 which specifies that bit 1 of the target address will come from bit
8056 1 of the base address. */
8057 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8058
e95de063
MS		 8059 /* Put RELOCATION back into the insn. Assumes two's complement.
8060 We use the Thumb-2 encoding, which is safe even if dealing with
8061 a Thumb-1 instruction by virtue of our overflow check above. */
8062 reloc_sign = (signed_check < 0) ? 1 : 0;
8063 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8064 | ((relocation >> 12) & 0x3ff)
8065 | (reloc_sign << 10);
906e58ca 8066 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 8067 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8068 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8069 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8070
252b5132
RH		 8071 /* Put the relocated value back in the object file: */
8072 bfd_put_16 (input_bfd, upper_insn, hit_data);
8073 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8074
8075 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8076 }
8077 break;
8078
c19d1205
ZW		 8079 case R_ARM_THM_JUMP19:
8080 /* Thumb32 conditional branch instruction. */
8081 {
8082 bfd_vma relocation;
8083 bfd_boolean overflow = FALSE;
8084 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8085 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8086 bfd_signed_vma reloc_signed_max = 0xffffe;
8087 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8088 bfd_signed_vma signed_check;
8089
8090 /* Need to refetch the addend, reconstruct the top three bits,
8091 and squish the two 11 bit pieces together. */
8092 if (globals->use_rel)
8093 {
8094 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 8095 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 8096 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8097 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8098 bfd_vma lower = (lower_insn & 0x07ff);
8099
a00a1f35
MS		 8100 upper |= J1 << 6;
8101 upper |= J2 << 7;
8102 upper |= (!S) << 8;
c19d1205
ZW		 8103 upper -= 0x0100; /* Sign extend. */
8104
8105 addend = (upper << 12) | (lower << 1);
8106 signed_addend = addend;
8107 }
8108
bd97cb95
DJ		 8109 /* Handle calls via the PLT. */
8110 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
8111 {
8112 value = (splt->output_section->vma
8113 + splt->output_offset
8114 + h->plt.offset);
8115 /* Target the Thumb stub before the ARM PLT entry. */
8116 value -= PLT_THUMB_STUB_SIZE;
8117 *unresolved_reloc_p = FALSE;
8118 }
8119
c19d1205
ZW		 8120 /* ??? Should handle interworking? GCC might someday try to
8121 use this for tail calls. */
8122
8123 relocation = value + signed_addend;
8124 relocation -= (input_section->output_section->vma
8125 + input_section->output_offset
8126 + rel->r_offset);
a00a1f35 8127 signed_check = (bfd_signed_vma) relocation;
c19d1205 8128
c19d1205
ZW		 8129 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8130 overflow = TRUE;
8131
8132 /* Put RELOCATION back into the insn. */
8133 {
8134 bfd_vma S = (relocation & 0x00100000) >> 20;
8135 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8136 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8137 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8138 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8139
a00a1f35 8140 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 8141 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8142 }
8143
8144 /* Put the relocated value back in the object file: */
8145 bfd_put_16 (input_bfd, upper_insn, hit_data);
8146 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8147
8148 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8149 }
8150
8151 case R_ARM_THM_JUMP11:
8152 case R_ARM_THM_JUMP8:
8153 case R_ARM_THM_JUMP6:
51c5503b
NC		 8154 /* Thumb B (branch) instruction). */
8155 {
6cf9e9fe 8156 bfd_signed_vma relocation;
51c5503b
NC		 8157 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
8158 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 8159 bfd_signed_vma signed_check;
8160
c19d1205
ZW		 8161 /* CZB cannot jump backward. */
8162 if (r_type == R_ARM_THM_JUMP6)
8163 reloc_signed_min = 0;
8164
4e7fd91e 8165 if (globals->use_rel)
6cf9e9fe 8166 {
4e7fd91e
PB		 8167 /* Need to refetch addend. */
8168 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8169 if (addend & ((howto->src_mask + 1) >> 1))
8170 {
8171 signed_addend = -1;
8172 signed_addend &= ~ howto->src_mask;
8173 signed_addend |= addend;
8174 }
8175 else
8176 signed_addend = addend;
8177 /* The value in the insn has been right shifted. We need to
8178 undo this, so that we can perform the address calculation
8179 in terms of bytes. */
8180 signed_addend <<= howto->rightshift;
6cf9e9fe 8181 }
6cf9e9fe 8182 relocation = value + signed_addend;
51c5503b
NC		 8183
8184 relocation -= (input_section->output_section->vma
8185 + input_section->output_offset
8186 + rel->r_offset);
8187
6cf9e9fe
NC		 8188 relocation >>= howto->rightshift;
8189 signed_check = relocation;
c19d1205
ZW		 8190
8191 if (r_type == R_ARM_THM_JUMP6)
8192 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
8193 else
8194 relocation &= howto->dst_mask;
51c5503b 8195 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 8196
51c5503b
NC		 8197 bfd_put_16 (input_bfd, relocation, hit_data);
8198
8199 /* Assumes two's complement. */
8200 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8201 return bfd_reloc_overflow;
8202
8203 return bfd_reloc_ok;
8204 }
cedb70c5 8205
8375c36b
PB		 8206 case R_ARM_ALU_PCREL7_0:
8207 case R_ARM_ALU_PCREL15_8:
8208 case R_ARM_ALU_PCREL23_15:
8209 {
8210 bfd_vma insn;
8211 bfd_vma relocation;
8212
8213 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 8214 if (globals->use_rel)
8215 {
8216 /* Extract the addend. */
8217 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
8218 signed_addend = addend;
8219 }
8375c36b
PB		 8220 relocation = value + signed_addend;
8221
8222 relocation -= (input_section->output_section->vma
8223 + input_section->output_offset
8224 + rel->r_offset);
8225 insn = (insn & ~0xfff)
8226 | ((howto->bitpos << 7) & 0xf00)
8227 | ((relocation >> howto->bitpos) & 0xff);
8228 bfd_put_32 (input_bfd, value, hit_data);
8229 }
8230 return bfd_reloc_ok;
8231
252b5132
RH		 8232 case R_ARM_GNU_VTINHERIT:
8233 case R_ARM_GNU_VTENTRY:
8234 return bfd_reloc_ok;
8235
c19d1205 8236 case R_ARM_GOTOFF32:
252b5132
RH		 8237 /* Relocation is relative to the start of the
8238 global offset table. */
8239
8240 BFD_ASSERT (sgot != NULL);
8241 if (sgot == NULL)
8242 return bfd_reloc_notsupported;
9a5aca8c 8243
cedb70c5 8244 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 8245 address by one, so that attempts to call the function pointer will
8246 correctly interpret it as Thumb code. */
35fc36a8 8247 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 8248 value += 1;
8249
252b5132
RH		 8250 /* Note that sgot->output_offset is not involved in this
8251 calculation. We always want the start of .got. If we
8252 define _GLOBAL_OFFSET_TABLE in a different way, as is
8253 permitted by the ABI, we might have to change this
9b485d32 8254 calculation. */
252b5132 8255 value -= sgot->output_section->vma;
f21f3fe0 8256 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8257 contents, rel->r_offset, value,
00a97672 8258 rel->r_addend);
252b5132
RH		 8259
8260 case R_ARM_GOTPC:
a7c10850 8261 /* Use global offset table as symbol value. */
252b5132 8262 BFD_ASSERT (sgot != NULL);
f21f3fe0 8263
252b5132
RH		 8264 if (sgot == NULL)
8265 return bfd_reloc_notsupported;
8266
0945cdfd 8267 *unresolved_reloc_p = FALSE;
252b5132 8268 value = sgot->output_section->vma;
f21f3fe0 8269 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8270 contents, rel->r_offset, value,
00a97672 8271 rel->r_addend);
f21f3fe0 8272
252b5132 8273 case R_ARM_GOT32:
eb043451 8274 case R_ARM_GOT_PREL:
252b5132 8275 /* Relocation is to the entry for this symbol in the
9b485d32 8276 global offset table. */
252b5132
RH		 8277 if (sgot == NULL)
8278 return bfd_reloc_notsupported;
f21f3fe0 8279
252b5132
RH		 8280 if (h != NULL)
8281 {
8282 bfd_vma off;
f21f3fe0 8283
252b5132
RH		 8284 off = h->got.offset;
8285 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 8286 if ((off & 1) != 0)
252b5132 8287 {
b436d854
RS		 8288 /* We have already processsed one GOT relocation against
8289 this symbol. */
8290 off &= ~1;
8291 if (globals->root.dynamic_sections_created
8292 && !SYMBOL_REFERENCES_LOCAL (info, h))
8293 *unresolved_reloc_p = FALSE;
8294 }
8295 else
8296 {
8297 Elf_Internal_Rela outrel;
8298
8299 if (!SYMBOL_REFERENCES_LOCAL (info, h))
8300 {
8301 /* If the symbol doesn't resolve locally in a static
8302 object, we have an undefined reference. If the
8303 symbol doesn't resolve locally in a dynamic object,
8304 it should be resolved by the dynamic linker. */
8305 if (globals->root.dynamic_sections_created)
8306 {
8307 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
8308 *unresolved_reloc_p = FALSE;
8309 }
8310 else
8311 outrel.r_info = 0;
8312 outrel.r_addend = 0;
8313 }
252b5132
RH		 8314 else
8315 {
b436d854
RS		 8316 if (info->shared)
8317 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
8318 else
8319 outrel.r_info = 0;
8320 outrel.r_addend = value;
35fc36a8 8321 if (branch_type == ST_BRANCH_TO_THUMB)
b436d854
RS		 8322 outrel.r_addend |= 1;
8323 }
ee29b9fb 8324
b436d854
RS		 8325 /* The GOT entry is initialized to zero by default.
8326 See if we should install a different value. */
8327 if (outrel.r_addend != 0
8328 && (outrel.r_info == 0 || globals->use_rel))
8329 {
8330 bfd_put_32 (output_bfd, outrel.r_addend,
8331 sgot->contents + off);
8332 outrel.r_addend = 0;
252b5132 8333 }
f21f3fe0 8334
b436d854
RS		 8335 if (outrel.r_info != 0)
8336 {
8337 outrel.r_offset = (sgot->output_section->vma
8338 + sgot->output_offset
8339 + off);
8340 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
8341 }
8342 h->got.offset |= 1;
8343 }
252b5132
RH		 8344 value = sgot->output_offset + off;
8345 }
8346 else
8347 {
8348 bfd_vma off;
f21f3fe0 8349
252b5132
RH		 8350 BFD_ASSERT (local_got_offsets != NULL &&
8351 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 8352
252b5132 8353 off = local_got_offsets[r_symndx];
f21f3fe0 8354
252b5132
RH		 8355 /* The offset must always be a multiple of 4. We use the
8356 least significant bit to record whether we have already
9b485d32 8357 generated the necessary reloc. */
252b5132
RH		 8358 if ((off & 1) != 0)
8359 off &= ~1;
8360 else
8361 {
b7693d02
DJ		 8362 /* If we are addressing a Thumb function, we need to
8363 adjust the address by one, so that attempts to
8364 call the function pointer will correctly
8365 interpret it as Thumb code. */
35fc36a8 8366 if (branch_type == ST_BRANCH_TO_THUMB)
b7693d02
DJ		 8367 value |= 1;
8368
00a97672
RS		 8369 if (globals->use_rel)
8370 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 8371
252b5132
RH		 8372 if (info->shared)
8373 {
947216bf 8374 Elf_Internal_Rela outrel;
f21f3fe0 8375
252b5132 8376 BFD_ASSERT (srelgot != NULL);
f21f3fe0 8377
00a97672 8378 outrel.r_addend = addend + value;
252b5132 8379 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 8380 + sgot->output_offset
252b5132
RH		 8381 + off);
8382 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 8383 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 8384 }
f21f3fe0 8385
252b5132
RH		 8386 local_got_offsets[r_symndx] |= 1;
8387 }
f21f3fe0 8388
252b5132
RH		 8389 value = sgot->output_offset + off;
8390 }
eb043451
PB		 8391 if (r_type != R_ARM_GOT32)
8392 value += sgot->output_section->vma;
9a5aca8c 8393
f21f3fe0 8394 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8395 contents, rel->r_offset, value,
00a97672 8396 rel->r_addend);
f21f3fe0 8397
ba93b8ac
DJ		 8398 case R_ARM_TLS_LDO32:
8399 value = value - dtpoff_base (info);
8400
8401 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8402 contents, rel->r_offset, value,
8403 rel->r_addend);
ba93b8ac
DJ		 8404
8405 case R_ARM_TLS_LDM32:
8406 {
8407 bfd_vma off;
8408
362d30a1 8409 if (sgot == NULL)
ba93b8ac
DJ		 8410 abort ();
8411
8412 off = globals->tls_ldm_got.offset;
8413
8414 if ((off & 1) != 0)
8415 off &= ~1;
8416 else
8417 {
8418 /* If we don't know the module number, create a relocation
8419 for it. */
8420 if (info->shared)
8421 {
8422 Elf_Internal_Rela outrel;
ba93b8ac 8423
362d30a1 8424 if (srelgot == NULL)
ba93b8ac
DJ		 8425 abort ();
8426
00a97672 8427 outrel.r_addend = 0;
362d30a1
RS		 8428 outrel.r_offset = (sgot->output_section->vma
8429 + sgot->output_offset + off);
ba93b8ac
DJ		 8430 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
8431
00a97672
RS		 8432 if (globals->use_rel)
8433 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8434 sgot->contents + off);
ba93b8ac 8435
47beaa6a 8436 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 8437 }
8438 else
362d30a1 8439 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 8440
8441 globals->tls_ldm_got.offset |= 1;
8442 }
8443
362d30a1 8444 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 8445 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8446
8447 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8448 contents, rel->r_offset, value,
00a97672 8449 rel->r_addend);
ba93b8ac
DJ		 8450 }
8451
0855e32b
NS		 8452 case R_ARM_TLS_CALL:
8453 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 8454 case R_ARM_TLS_GD32:
8455 case R_ARM_TLS_IE32:
0855e32b
NS		 8456 case R_ARM_TLS_GOTDESC:
8457 case R_ARM_TLS_DESCSEQ:
8458 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 8459 {
0855e32b
NS		 8460 bfd_vma off, offplt;
8461 int indx = 0;
ba93b8ac
DJ		 8462 char tls_type;
8463
0855e32b 8464 BFD_ASSERT (sgot != NULL);
ba93b8ac 8465
ba93b8ac
DJ		 8466 if (h != NULL)
8467 {
8468 bfd_boolean dyn;
8469 dyn = globals->root.dynamic_sections_created;
8470 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8471 && (!info->shared
8472 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8473 {
8474 *unresolved_reloc_p = FALSE;
8475 indx = h->dynindx;
8476 }
8477 off = h->got.offset;
0855e32b 8478 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 8479 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
8480 }
8481 else
8482 {
0855e32b 8483 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 8484 off = local_got_offsets[r_symndx];
0855e32b 8485 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 8486 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
8487 }
8488
0855e32b
NS		 8489 /* Linker relaxations happens from one of the
8490 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
8491 if (ELF32_R_TYPE(rel->r_info) != r_type)
8492 tls_type = GOT_TLS_IE;
8493
8494 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 8495
8496 if ((off & 1) != 0)
8497 off &= ~1;
8498 else
8499 {
8500 bfd_boolean need_relocs = FALSE;
8501 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 8502 int cur_off = off;
8503
8504 /* The GOT entries have not been initialized yet. Do it
8505 now, and emit any relocations. If both an IE GOT and a
8506 GD GOT are necessary, we emit the GD first. */
8507
8508 if ((info->shared || indx != 0)
8509 && (h == NULL
8510 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8511 || h->root.type != bfd_link_hash_undefweak))
8512 {
8513 need_relocs = TRUE;
0855e32b 8514 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 8515 }
8516
0855e32b
NS		 8517 if (tls_type & GOT_TLS_GDESC)
8518 {
47beaa6a
RS		 8519 bfd_byte *loc;
8520
0855e32b
NS		 8521 /* We should have relaxed, unless this is an undefined
8522 weak symbol. */
8523 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
8524 || info->shared);
8525 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
8526 <= globals->root.sgotplt->size);
8527
8528 outrel.r_addend = 0;
8529 outrel.r_offset = (globals->root.sgotplt->output_section->vma
8530 + globals->root.sgotplt->output_offset
8531 + offplt
8532 + globals->sgotplt_jump_table_size);
8533
8534 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
8535 sreloc = globals->root.srelplt;
8536 loc = sreloc->contents;
8537 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
8538 BFD_ASSERT (loc + RELOC_SIZE (globals)
8539 <= sreloc->contents + sreloc->size);
8540
8541 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
8542
8543 /* For globals, the first word in the relocation gets
8544 the relocation index and the top bit set, or zero,
8545 if we're binding now. For locals, it gets the
8546 symbol's offset in the tls section. */
8547 bfd_put_32 (output_bfd,
8548 !h ? value - elf_hash_table (info)->tls_sec->vma
8549 : info->flags & DF_BIND_NOW ? 0
8550 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
8551 globals->root.sgotplt->contents + offplt +
8552 globals->sgotplt_jump_table_size);
8553
8554 /* Second word in the relocation is always zero. */
8555 bfd_put_32 (output_bfd, 0,
8556 globals->root.sgotplt->contents + offplt +
8557 globals->sgotplt_jump_table_size + 4);
8558 }
ba93b8ac
DJ		 8559 if (tls_type & GOT_TLS_GD)
8560 {
8561 if (need_relocs)
8562 {
00a97672 8563 outrel.r_addend = 0;
362d30a1
RS		 8564 outrel.r_offset = (sgot->output_section->vma
8565 + sgot->output_offset
00a97672 8566 + cur_off);
ba93b8ac 8567 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 8568
00a97672
RS		 8569 if (globals->use_rel)
8570 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8571 sgot->contents + cur_off);
00a97672 8572
47beaa6a 8573 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 8574
8575 if (indx == 0)
8576 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 8577 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 8578 else
8579 {
00a97672 8580 outrel.r_addend = 0;
ba93b8ac
DJ		 8581 outrel.r_info = ELF32_R_INFO (indx,
8582 R_ARM_TLS_DTPOFF32);
8583 outrel.r_offset += 4;
00a97672
RS		 8584
8585 if (globals->use_rel)
8586 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8587 sgot->contents + cur_off + 4);
00a97672 8588
47beaa6a
RS		 8589 elf32_arm_add_dynreloc (output_bfd, info,
8590 srelgot, &outrel);
ba93b8ac
DJ		 8591 }
8592 }
8593 else
8594 {
8595 /* If we are not emitting relocations for a
8596 general dynamic reference, then we must be in a
8597 static link or an executable link with the
8598 symbol binding locally. Mark it as belonging
8599 to module 1, the executable. */
8600 bfd_put_32 (output_bfd, 1,
362d30a1 8601 sgot->contents + cur_off);
ba93b8ac 8602 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 8603 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 8604 }
8605
8606 cur_off += 8;
8607 }
8608
8609 if (tls_type & GOT_TLS_IE)
8610 {
8611 if (need_relocs)
8612 {
00a97672
RS		 8613 if (indx == 0)
8614 outrel.r_addend = value - dtpoff_base (info);
8615 else
8616 outrel.r_addend = 0;
362d30a1
RS		 8617 outrel.r_offset = (sgot->output_section->vma
8618 + sgot->output_offset
ba93b8ac
DJ		 8619 + cur_off);
8620 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8621
00a97672
RS		 8622 if (globals->use_rel)
8623 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8624 sgot->contents + cur_off);
ba93b8ac 8625
47beaa6a 8626 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 8627 }
8628 else
8629 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 8630 sgot->contents + cur_off);
ba93b8ac
DJ		 8631 cur_off += 4;
8632 }
8633
8634 if (h != NULL)
8635 h->got.offset |= 1;
8636 else
8637 local_got_offsets[r_symndx] |= 1;
8638 }
8639
8640 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8641 off += 8;
0855e32b
NS		 8642 else if (tls_type & GOT_TLS_GDESC)
8643 off = offplt;
8644
8645 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
8646 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
8647 {
8648 bfd_signed_vma offset;
8649 enum elf32_arm_stub_type stub_type
35fc36a8 8650 = arm_type_of_stub (info, input_section, rel, &branch_type,
0855e32b
NS		 8651 (struct elf32_arm_link_hash_entry *)h,
8652 globals->tls_trampoline, globals->root.splt,
8653 input_bfd, sym_name);
8654
8655 if (stub_type != arm_stub_none)
8656 {
8657 struct elf32_arm_stub_hash_entry *stub_entry
8658 = elf32_arm_get_stub_entry
8659 (input_section, globals->root.splt, 0, rel,
8660 globals, stub_type);
8661 offset = (stub_entry->stub_offset
8662 + stub_entry->stub_sec->output_offset
8663 + stub_entry->stub_sec->output_section->vma);
8664 }
8665 else
8666 offset = (globals->root.splt->output_section->vma
8667 + globals->root.splt->output_offset
8668 + globals->tls_trampoline);
8669
8670 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
8671 {
8672 unsigned long inst;
8673
8674 offset -= (input_section->output_section->vma +
8675 input_section->output_offset + rel->r_offset + 8);
8676
8677 inst = offset >> 2;
8678 inst &= 0x00ffffff;
8679 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
8680 }
8681 else
8682 {
8683 /* Thumb blx encodes the offset in a complicated
8684 fashion. */
8685 unsigned upper_insn, lower_insn;
8686 unsigned neg;
8687
8688 offset -= (input_section->output_section->vma +
8689 input_section->output_offset
8690 + rel->r_offset + 4);
8691
8692 /* Round up the offset to a word boundary */
8693 offset = (offset + 2) & ~2;
8694 neg = offset < 0;
8695 upper_insn = (0xf000
8696 | ((offset >> 12) & 0x3ff)
8697 | (neg << 10));
8698 lower_insn = (0xc000
8699 | (((!((offset >> 23) & 1)) ^ neg) << 13)
8700 | (((!((offset >> 22) & 1)) ^ neg) << 11)
8701 | ((offset >> 1) & 0x7ff));
8702 bfd_put_16 (input_bfd, upper_insn, hit_data);
8703 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8704 return bfd_reloc_ok;
8705 }
8706 }
8707 /* These relocations needs special care, as besides the fact
8708 they point somewhere in .gotplt, the addend must be
8709 adjusted accordingly depending on the type of instruction
8710 we refer to */
8711 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
8712 {
8713 unsigned long data, insn;
8714 unsigned thumb;
8715
8716 data = bfd_get_32 (input_bfd, hit_data);
8717 thumb = data & 1;
8718 data &= ~1u;
8719
8720 if (thumb)
8721 {
8722 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
8723 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8724 insn = (insn << 16)
8725 | bfd_get_16 (input_bfd,
8726 contents + rel->r_offset - data + 2);
8727 if ((insn & 0xf800c000) == 0xf000c000)
8728 /* bl/blx */
8729 value = -6;
8730 else if ((insn & 0xffffff00) == 0x4400)
8731 /* add */
8732 value = -5;
8733 else
8734 {
8735 (*_bfd_error_handler)
8736 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
8737 input_bfd, input_section,
8738 (unsigned long)rel->r_offset, insn);
8739 return bfd_reloc_notsupported;
8740 }
8741 }
8742 else
8743 {
8744 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
8745
8746 switch (insn >> 24)
8747 {
8748 case 0xeb: /* bl */
8749 case 0xfa: /* blx */
8750 value = -4;
8751 break;
8752
8753 case 0xe0: /* add */
8754 value = -8;
8755 break;
8756
8757 default:
8758 (*_bfd_error_handler)
8759 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
8760 input_bfd, input_section,
8761 (unsigned long)rel->r_offset, insn);
8762 return bfd_reloc_notsupported;
8763 }
8764 }
8765
8766 value += ((globals->root.sgotplt->output_section->vma
8767 + globals->root.sgotplt->output_offset + off)
8768 - (input_section->output_section->vma
8769 + input_section->output_offset
8770 + rel->r_offset)
8771 + globals->sgotplt_jump_table_size);
8772 }
8773 else
8774 value = ((globals->root.sgot->output_section->vma
8775 + globals->root.sgot->output_offset + off)
8776 - (input_section->output_section->vma
8777 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 8778
8779 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8780 contents, rel->r_offset, value,
00a97672 8781 rel->r_addend);
ba93b8ac
DJ		 8782 }
8783
8784 case R_ARM_TLS_LE32:
8785 if (info->shared)
8786 {
8787 (*_bfd_error_handler)
8788 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8789 input_bfd, input_section,
8790 (long) rel->r_offset, howto->name);
21d799b5 8791 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 8792 }
8793 else
8794 value = tpoff (info, value);
906e58ca 8795
ba93b8ac 8796 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8797 contents, rel->r_offset, value,
8798 rel->r_addend);
ba93b8ac 8799
319850b4
JB		 8800 case R_ARM_V4BX:
8801 if (globals->fix_v4bx)
845b51d6
PB		 8802 {
8803 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8804
845b51d6
PB		 8805 /* Ensure that we have a BX instruction. */
8806 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8807
845b51d6
PB		 8808 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8809 {
8810 /* Branch to veneer. */
8811 bfd_vma glue_addr;
8812 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8813 glue_addr -= input_section->output_section->vma
8814 + input_section->output_offset
8815 + rel->r_offset + 8;
8816 insn = (insn & 0xf0000000) | 0x0a000000
8817 | ((glue_addr >> 2) & 0x00ffffff);
8818 }
8819 else
8820 {
8821 /* Preserve Rm (lowest four bits) and the condition code
8822 (highest four bits). Other bits encode MOV PC,Rm. */
8823 insn = (insn & 0xf000000f) | 0x01a0f000;
8824 }
319850b4 8825
845b51d6
PB		 8826 bfd_put_32 (input_bfd, insn, hit_data);
8827 }
319850b4
JB		 8828 return bfd_reloc_ok;
8829
b6895b4f
PB		 8830 case R_ARM_MOVW_ABS_NC:
8831 case R_ARM_MOVT_ABS:
8832 case R_ARM_MOVW_PREL_NC:
8833 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8834 /* Until we properly support segment-base-relative addressing then
8835 we assume the segment base to be zero, as for the group relocations.
8836 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8837 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8838 case R_ARM_MOVW_BREL_NC:
8839 case R_ARM_MOVW_BREL:
8840 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8841 {
8842 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8843
8844 if (globals->use_rel)
8845 {
8846 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8847 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8848 }
92f5d02b 8849
b6895b4f 8850 value += signed_addend;
b6895b4f
PB		 8851
8852 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8853 value -= (input_section->output_section->vma
8854 + input_section->output_offset + rel->r_offset);
8855
92f5d02b
MS		 8856 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8857 return bfd_reloc_overflow;
8858
35fc36a8 8859 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 8860 value |= 1;
8861
8862 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8863 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8864 value >>= 16;
8865
8866 insn &= 0xfff0f000;
8867 insn |= value & 0xfff;
8868 insn |= (value & 0xf000) << 4;
8869 bfd_put_32 (input_bfd, insn, hit_data);
8870 }
8871 return bfd_reloc_ok;
8872
8873 case R_ARM_THM_MOVW_ABS_NC:
8874 case R_ARM_THM_MOVT_ABS:
8875 case R_ARM_THM_MOVW_PREL_NC:
8876 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8877 /* Until we properly support segment-base-relative addressing then
8878 we assume the segment base to be zero, as for the above relocations.
8879 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8880 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8881 as R_ARM_THM_MOVT_ABS. */
8882 case R_ARM_THM_MOVW_BREL_NC:
8883 case R_ARM_THM_MOVW_BREL:
8884 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8885 {
8886 bfd_vma insn;
906e58ca 8887
b6895b4f
PB		 8888 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8889 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8890
8891 if (globals->use_rel)
8892 {
8893 addend = ((insn >> 4) & 0xf000)
8894 | ((insn >> 15) & 0x0800)
8895 | ((insn >> 4) & 0x0700)
8896 | (insn & 0x00ff);
39623e12 8897 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8898 }
92f5d02b 8899
b6895b4f 8900 value += signed_addend;
b6895b4f
PB		 8901
8902 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8903 value -= (input_section->output_section->vma
8904 + input_section->output_offset + rel->r_offset);
8905
92f5d02b
MS		 8906 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8907 return bfd_reloc_overflow;
8908
35fc36a8 8909 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 8910 value |= 1;
8911
8912 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8913 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8914 value >>= 16;
8915
8916 insn &= 0xfbf08f00;
8917 insn |= (value & 0xf000) << 4;
8918 insn |= (value & 0x0800) << 15;
8919 insn |= (value & 0x0700) << 4;
8920 insn |= (value & 0x00ff);
8921
8922 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8923 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8924 }
8925 return bfd_reloc_ok;
8926
4962c51a
MS		 8927 case R_ARM_ALU_PC_G0_NC:
8928 case R_ARM_ALU_PC_G1_NC:
8929 case R_ARM_ALU_PC_G0:
8930 case R_ARM_ALU_PC_G1:
8931 case R_ARM_ALU_PC_G2:
8932 case R_ARM_ALU_SB_G0_NC:
8933 case R_ARM_ALU_SB_G1_NC:
8934 case R_ARM_ALU_SB_G0:
8935 case R_ARM_ALU_SB_G1:
8936 case R_ARM_ALU_SB_G2:
8937 {
8938 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8939 bfd_vma pc = input_section->output_section->vma
8940 + input_section->output_offset + rel->r_offset;
8941 /* sb should be the origin of the *segment* containing the symbol.
8942 It is not clear how to obtain this OS-dependent value, so we
8943 make an arbitrary choice of zero. */
8944 bfd_vma sb = 0;
8945 bfd_vma residual;
8946 bfd_vma g_n;
8947 bfd_signed_vma signed_value;
8948 int group = 0;
8949
8950 /* Determine which group of bits to select. */
8951 switch (r_type)
8952 {
8953 case R_ARM_ALU_PC_G0_NC:
8954 case R_ARM_ALU_PC_G0:
8955 case R_ARM_ALU_SB_G0_NC:
8956 case R_ARM_ALU_SB_G0:
8957 group = 0;
8958 break;
8959
8960 case R_ARM_ALU_PC_G1_NC:
8961 case R_ARM_ALU_PC_G1:
8962 case R_ARM_ALU_SB_G1_NC:
8963 case R_ARM_ALU_SB_G1:
8964 group = 1;
8965 break;
8966
8967 case R_ARM_ALU_PC_G2:
8968 case R_ARM_ALU_SB_G2:
8969 group = 2;
8970 break;
8971
8972 default:
906e58ca 8973 abort ();
4962c51a
MS		 8974 }
8975
8976 /* If REL, extract the addend from the insn. If RELA, it will
8977 have already been fetched for us. */
8978 if (globals->use_rel)
8979 {
8980 int negative;
8981 bfd_vma constant = insn & 0xff;
8982 bfd_vma rotation = (insn & 0xf00) >> 8;
8983
8984 if (rotation == 0)
8985 signed_addend = constant;
8986 else
8987 {
8988 /* Compensate for the fact that in the instruction, the
8989 rotation is stored in multiples of 2 bits. */
8990 rotation *= 2;
8991
8992 /* Rotate "constant" right by "rotation" bits. */
8993 signed_addend = (constant >> rotation) |
8994 (constant << (8 * sizeof (bfd_vma) - rotation));
8995 }
8996
8997 /* Determine if the instruction is an ADD or a SUB.
8998 (For REL, this determines the sign of the addend.) */
8999 negative = identify_add_or_sub (insn);
9000 if (negative == 0)
9001 {
9002 (*_bfd_error_handler)
9003 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9004 input_bfd, input_section,
9005 (long) rel->r_offset, howto->name);
906e58ca 9006 return bfd_reloc_overflow;
4962c51a
MS		 9007 }
9008
9009 signed_addend *= negative;
9010 }
9011
9012 /* Compute the value (X) to go in the place. */
9013 if (r_type == R_ARM_ALU_PC_G0_NC
9014 || r_type == R_ARM_ALU_PC_G1_NC
9015 || r_type == R_ARM_ALU_PC_G0
9016 || r_type == R_ARM_ALU_PC_G1
9017 || r_type == R_ARM_ALU_PC_G2)
9018 /* PC relative. */
9019 signed_value = value - pc + signed_addend;
9020 else
9021 /* Section base relative. */
9022 signed_value = value - sb + signed_addend;
9023
9024 /* If the target symbol is a Thumb function, then set the
9025 Thumb bit in the address. */
35fc36a8 9026 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 9027 signed_value |= 1;
9028
9029 /* Calculate the value of the relevant G_n, in encoded
9030 constant-with-rotation format. */
9031 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9032 &residual);
9033
9034 /* Check for overflow if required. */
9035 if ((r_type == R_ARM_ALU_PC_G0
9036 || r_type == R_ARM_ALU_PC_G1
9037 || r_type == R_ARM_ALU_PC_G2
9038 || r_type == R_ARM_ALU_SB_G0
9039 || r_type == R_ARM_ALU_SB_G1
9040 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9041 {
9042 (*_bfd_error_handler)
9043 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9044 input_bfd, input_section,
9045 (long) rel->r_offset, abs (signed_value), howto->name);
9046 return bfd_reloc_overflow;
9047 }
9048
9049 /* Mask out the value and the ADD/SUB part of the opcode; take care
9050 not to destroy the S bit. */
9051 insn &= 0xff1ff000;
9052
9053 /* Set the opcode according to whether the value to go in the
9054 place is negative. */
9055 if (signed_value < 0)
9056 insn |= 1 << 22;
9057 else
9058 insn |= 1 << 23;
9059
9060 /* Encode the offset. */
9061 insn |= g_n;
9062
9063 bfd_put_32 (input_bfd, insn, hit_data);
9064 }
9065 return bfd_reloc_ok;
9066
9067 case R_ARM_LDR_PC_G0:
9068 case R_ARM_LDR_PC_G1:
9069 case R_ARM_LDR_PC_G2:
9070 case R_ARM_LDR_SB_G0:
9071 case R_ARM_LDR_SB_G1:
9072 case R_ARM_LDR_SB_G2:
9073 {
9074 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9075 bfd_vma pc = input_section->output_section->vma
9076 + input_section->output_offset + rel->r_offset;
9077 bfd_vma sb = 0; /* See note above. */
9078 bfd_vma residual;
9079 bfd_signed_vma signed_value;
9080 int group = 0;
9081
9082 /* Determine which groups of bits to calculate. */
9083 switch (r_type)
9084 {
9085 case R_ARM_LDR_PC_G0:
9086 case R_ARM_LDR_SB_G0:
9087 group = 0;
9088 break;
9089
9090 case R_ARM_LDR_PC_G1:
9091 case R_ARM_LDR_SB_G1:
9092 group = 1;
9093 break;
9094
9095 case R_ARM_LDR_PC_G2:
9096 case R_ARM_LDR_SB_G2:
9097 group = 2;
9098 break;
9099
9100 default:
906e58ca 9101 abort ();
4962c51a
MS		 9102 }
9103
9104 /* If REL, extract the addend from the insn. If RELA, it will
9105 have already been fetched for us. */
9106 if (globals->use_rel)
9107 {
9108 int negative = (insn & (1 << 23)) ? 1 : -1;
9109 signed_addend = negative * (insn & 0xfff);
9110 }
9111
9112 /* Compute the value (X) to go in the place. */
9113 if (r_type == R_ARM_LDR_PC_G0
9114 || r_type == R_ARM_LDR_PC_G1
9115 || r_type == R_ARM_LDR_PC_G2)
9116 /* PC relative. */
9117 signed_value = value - pc + signed_addend;
9118 else
9119 /* Section base relative. */
9120 signed_value = value - sb + signed_addend;
9121
9122 /* Calculate the value of the relevant G_{n-1} to obtain
9123 the residual at that stage. */
9124 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9125
9126 /* Check for overflow. */
9127 if (residual >= 0x1000)
9128 {
9129 (*_bfd_error_handler)
9130 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9131 input_bfd, input_section,
9132 (long) rel->r_offset, abs (signed_value), howto->name);
9133 return bfd_reloc_overflow;
9134 }
9135
9136 /* Mask out the value and U bit. */
9137 insn &= 0xff7ff000;
9138
9139 /* Set the U bit if the value to go in the place is non-negative. */
9140 if (signed_value >= 0)
9141 insn |= 1 << 23;
9142
9143 /* Encode the offset. */
9144 insn |= residual;
9145
9146 bfd_put_32 (input_bfd, insn, hit_data);
9147 }
9148 return bfd_reloc_ok;
9149
9150 case R_ARM_LDRS_PC_G0:
9151 case R_ARM_LDRS_PC_G1:
9152 case R_ARM_LDRS_PC_G2:
9153 case R_ARM_LDRS_SB_G0:
9154 case R_ARM_LDRS_SB_G1:
9155 case R_ARM_LDRS_SB_G2:
9156 {
9157 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9158 bfd_vma pc = input_section->output_section->vma
9159 + input_section->output_offset + rel->r_offset;
9160 bfd_vma sb = 0; /* See note above. */
9161 bfd_vma residual;
9162 bfd_signed_vma signed_value;
9163 int group = 0;
9164
9165 /* Determine which groups of bits to calculate. */
9166 switch (r_type)
9167 {
9168 case R_ARM_LDRS_PC_G0:
9169 case R_ARM_LDRS_SB_G0:
9170 group = 0;
9171 break;
9172
9173 case R_ARM_LDRS_PC_G1:
9174 case R_ARM_LDRS_SB_G1:
9175 group = 1;
9176 break;
9177
9178 case R_ARM_LDRS_PC_G2:
9179 case R_ARM_LDRS_SB_G2:
9180 group = 2;
9181 break;
9182
9183 default:
906e58ca 9184 abort ();
4962c51a
MS		 9185 }
9186
9187 /* If REL, extract the addend from the insn. If RELA, it will
9188 have already been fetched for us. */
9189 if (globals->use_rel)
9190 {
9191 int negative = (insn & (1 << 23)) ? 1 : -1;
9192 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
9193 }
9194
9195 /* Compute the value (X) to go in the place. */
9196 if (r_type == R_ARM_LDRS_PC_G0
9197 || r_type == R_ARM_LDRS_PC_G1
9198 || r_type == R_ARM_LDRS_PC_G2)
9199 /* PC relative. */
9200 signed_value = value - pc + signed_addend;
9201 else
9202 /* Section base relative. */
9203 signed_value = value - sb + signed_addend;
9204
9205 /* Calculate the value of the relevant G_{n-1} to obtain
9206 the residual at that stage. */
9207 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9208
9209 /* Check for overflow. */
9210 if (residual >= 0x100)
9211 {
9212 (*_bfd_error_handler)
9213 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9214 input_bfd, input_section,
9215 (long) rel->r_offset, abs (signed_value), howto->name);
9216 return bfd_reloc_overflow;
9217 }
9218
9219 /* Mask out the value and U bit. */
9220 insn &= 0xff7ff0f0;
9221
9222 /* Set the U bit if the value to go in the place is non-negative. */
9223 if (signed_value >= 0)
9224 insn |= 1 << 23;
9225
9226 /* Encode the offset. */
9227 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
9228
9229 bfd_put_32 (input_bfd, insn, hit_data);
9230 }
9231 return bfd_reloc_ok;
9232
9233 case R_ARM_LDC_PC_G0:
9234 case R_ARM_LDC_PC_G1:
9235 case R_ARM_LDC_PC_G2:
9236 case R_ARM_LDC_SB_G0:
9237 case R_ARM_LDC_SB_G1:
9238 case R_ARM_LDC_SB_G2:
9239 {
9240 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9241 bfd_vma pc = input_section->output_section->vma
9242 + input_section->output_offset + rel->r_offset;
9243 bfd_vma sb = 0; /* See note above. */
9244 bfd_vma residual;
9245 bfd_signed_vma signed_value;
9246 int group = 0;
9247
9248 /* Determine which groups of bits to calculate. */
9249 switch (r_type)
9250 {
9251 case R_ARM_LDC_PC_G0:
9252 case R_ARM_LDC_SB_G0:
9253 group = 0;
9254 break;
9255
9256 case R_ARM_LDC_PC_G1:
9257 case R_ARM_LDC_SB_G1:
9258 group = 1;
9259 break;
9260
9261 case R_ARM_LDC_PC_G2:
9262 case R_ARM_LDC_SB_G2:
9263 group = 2;
9264 break;
9265
9266 default:
906e58ca 9267 abort ();
4962c51a
MS		 9268 }
9269
9270 /* If REL, extract the addend from the insn. If RELA, it will
9271 have already been fetched for us. */
9272 if (globals->use_rel)
9273 {
9274 int negative = (insn & (1 << 23)) ? 1 : -1;
9275 signed_addend = negative * ((insn & 0xff) << 2);
9276 }
9277
9278 /* Compute the value (X) to go in the place. */
9279 if (r_type == R_ARM_LDC_PC_G0
9280 || r_type == R_ARM_LDC_PC_G1
9281 || r_type == R_ARM_LDC_PC_G2)
9282 /* PC relative. */
9283 signed_value = value - pc + signed_addend;
9284 else
9285 /* Section base relative. */
9286 signed_value = value - sb + signed_addend;
9287
9288 /* Calculate the value of the relevant G_{n-1} to obtain
9289 the residual at that stage. */
9290 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9291
9292 /* Check for overflow. (The absolute value to go in the place must be
9293 divisible by four and, after having been divided by four, must
9294 fit in eight bits.) */
9295 if ((residual & 0x3) != 0 || residual >= 0x400)
9296 {
9297 (*_bfd_error_handler)
9298 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9299 input_bfd, input_section,
9300 (long) rel->r_offset, abs (signed_value), howto->name);
9301 return bfd_reloc_overflow;
9302 }
9303
9304 /* Mask out the value and U bit. */
9305 insn &= 0xff7fff00;
9306
9307 /* Set the U bit if the value to go in the place is non-negative. */
9308 if (signed_value >= 0)
9309 insn |= 1 << 23;
9310
9311 /* Encode the offset. */
9312 insn |= residual >> 2;
9313
9314 bfd_put_32 (input_bfd, insn, hit_data);
9315 }
9316 return bfd_reloc_ok;
9317
252b5132
RH		 9318 default:
9319 return bfd_reloc_notsupported;
9320 }
9321}
9322
98c1d4aa
NC		 9323/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
9324static void
57e8b36a
NC		 9325arm_add_to_rel (bfd * abfd,
9326 bfd_byte * address,
9327 reloc_howto_type * howto,
9328 bfd_signed_vma increment)
98c1d4aa 9329{
98c1d4aa
NC		 9330 bfd_signed_vma addend;
9331
bd97cb95
DJ		 9332 if (howto->type == R_ARM_THM_CALL
9333 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 9334 {
9a5aca8c
AM		 9335 int upper_insn, lower_insn;
9336 int upper, lower;
98c1d4aa 9337
9a5aca8c
AM		 9338 upper_insn = bfd_get_16 (abfd, address);
9339 lower_insn = bfd_get_16 (abfd, address + 2);
9340 upper = upper_insn & 0x7ff;
9341 lower = lower_insn & 0x7ff;
9342
9343 addend = (upper << 12) | (lower << 1);
ddda4409 9344 addend += increment;
9a5aca8c 9345 addend >>= 1;
98c1d4aa 9346
9a5aca8c
AM		 9347 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
9348 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
9349
dc810e39
AM		 9350 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
9351 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 9352 }
9353 else
9354 {
9355 bfd_vma contents;
9356
9357 contents = bfd_get_32 (abfd, address);
9358
9359 /* Get the (signed) value from the instruction. */
9360 addend = contents & howto->src_mask;
9361 if (addend & ((howto->src_mask + 1) >> 1))
9362 {
9363 bfd_signed_vma mask;
9364
9365 mask = -1;
9366 mask &= ~ howto->src_mask;
9367 addend |= mask;
9368 }
9369
9370 /* Add in the increment, (which is a byte value). */
9371 switch (howto->type)
9372 {
9373 default:
9374 addend += increment;
9375 break;
9376
9377 case R_ARM_PC24:
c6596c5e 9378 case R_ARM_PLT32:
5b5bb741
PB		 9379 case R_ARM_CALL:
9380 case R_ARM_JUMP24:
9a5aca8c 9381 addend <<= howto->size;
dc810e39 9382 addend += increment;
9a5aca8c
AM		 9383
9384 /* Should we check for overflow here ? */
9385
9386 /* Drop any undesired bits. */
9387 addend >>= howto->rightshift;
9388 break;
9389 }
9390
9391 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
9392
9393 bfd_put_32 (abfd, contents, address);
ddda4409 9394 }
98c1d4aa 9395}
252b5132 9396
ba93b8ac
DJ		 9397#define IS_ARM_TLS_RELOC(R_TYPE) \
9398 ((R_TYPE) == R_ARM_TLS_GD32 \
9399 || (R_TYPE) == R_ARM_TLS_LDO32 \
9400 || (R_TYPE) == R_ARM_TLS_LDM32 \
9401 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
9402 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
9403 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
9404 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 9405 || (R_TYPE) == R_ARM_TLS_IE32 \
9406 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
9407
9408/* Specific set of relocations for the gnu tls dialect. */
9409#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
9410 ((R_TYPE) == R_ARM_TLS_GOTDESC \
9411 || (R_TYPE) == R_ARM_TLS_CALL \
9412 || (R_TYPE) == R_ARM_THM_TLS_CALL \
9413 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
9414 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 9415
252b5132 9416/* Relocate an ARM ELF section. */
906e58ca 9417
b34976b6 9418static bfd_boolean
57e8b36a
NC		 9419elf32_arm_relocate_section (bfd * output_bfd,
9420 struct bfd_link_info * info,
9421 bfd * input_bfd,
9422 asection * input_section,
9423 bfd_byte * contents,
9424 Elf_Internal_Rela * relocs,
9425 Elf_Internal_Sym * local_syms,
9426 asection ** local_sections)
252b5132 9427{
b34976b6
AM		 9428 Elf_Internal_Shdr *symtab_hdr;
9429 struct elf_link_hash_entry **sym_hashes;
9430 Elf_Internal_Rela *rel;
9431 Elf_Internal_Rela *relend;
9432 const char *name;
b32d3aa2 9433 struct elf32_arm_link_hash_table * globals;
252b5132 9434
4e7fd91e 9435 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 9436 if (globals == NULL)
9437 return FALSE;
b491616a 9438
0ffa91dd 9439 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 9440 sym_hashes = elf_sym_hashes (input_bfd);
9441
9442 rel = relocs;
9443 relend = relocs + input_section->reloc_count;
9444 for (; rel < relend; rel++)
9445 {
ba96a88f
NC		 9446 int r_type;
9447 reloc_howto_type * howto;
9448 unsigned long r_symndx;
9449 Elf_Internal_Sym * sym;
9450 asection * sec;
252b5132 9451 struct elf_link_hash_entry * h;
ba96a88f
NC		 9452 bfd_vma relocation;
9453 bfd_reloc_status_type r;
9454 arelent bfd_reloc;
ba93b8ac 9455 char sym_type;
0945cdfd 9456 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 9457 char *error_message = NULL;
f21f3fe0 9458
252b5132 9459 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 9460 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 9461 r_type = arm_real_reloc_type (globals, r_type);
252b5132 9462
ba96a88f
NC		 9463 if ( r_type == R_ARM_GNU_VTENTRY
9464 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 9465 continue;
9466
b32d3aa2 9467 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 9468 howto = bfd_reloc.howto;
252b5132 9469
252b5132
RH		 9470 h = NULL;
9471 sym = NULL;
9472 sec = NULL;
9b485d32 9473
252b5132
RH		 9474 if (r_symndx < symtab_hdr->sh_info)
9475 {
9476 sym = local_syms + r_symndx;
ba93b8ac 9477 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 9478 sec = local_sections[r_symndx];
ffcb4889
NS		 9479
9480 /* An object file might have a reference to a local
9481 undefined symbol. This is a daft object file, but we
9482 should at least do something about it. V4BX & NONE
9483 relocations do not use the symbol and are explicitly
77b4f08f
TS		 9484 allowed to use the undefined symbol, so allow those.
9485 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 9486 if (r_type != R_ARM_V4BX
9487 && r_type != R_ARM_NONE
77b4f08f 9488 && r_symndx != STN_UNDEF
ffcb4889
NS		 9489 && bfd_is_und_section (sec)
9490 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
9491 {
9492 if (!info->callbacks->undefined_symbol
9493 (info, bfd_elf_string_from_elf_section
9494 (input_bfd, symtab_hdr->sh_link, sym->st_name),
9495 input_bfd, input_section,
9496 rel->r_offset, TRUE))
9497 return FALSE;
9498 }
9499
4e7fd91e 9500 if (globals->use_rel)
f8df10f4 9501 {
4e7fd91e
PB		 9502 relocation = (sec->output_section->vma
9503 + sec->output_offset
9504 + sym->st_value);
ab96bf03
AM		 9505 if (!info->relocatable
9506 && (sec->flags & SEC_MERGE)
9507 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 9508 {
4e7fd91e
PB		 9509 asection *msec;
9510 bfd_vma addend, value;
9511
39623e12 9512 switch (r_type)
4e7fd91e 9513 {
39623e12
PB		 9514 case R_ARM_MOVW_ABS_NC:
9515 case R_ARM_MOVT_ABS:
9516 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
9517 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
9518 addend = (addend ^ 0x8000) - 0x8000;
9519 break;
f8df10f4 9520
39623e12
PB		 9521 case R_ARM_THM_MOVW_ABS_NC:
9522 case R_ARM_THM_MOVT_ABS:
9523 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
9524 << 16;
9525 value |= bfd_get_16 (input_bfd,
9526 contents + rel->r_offset + 2);
9527 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
9528 | ((value & 0x04000000) >> 15);
9529 addend = (addend ^ 0x8000) - 0x8000;
9530 break;
f8df10f4 9531
39623e12
PB		 9532 default:
9533 if (howto->rightshift
9534 || (howto->src_mask & (howto->src_mask + 1)))
9535 {
9536 (*_bfd_error_handler)
9537 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
9538 input_bfd, input_section,
9539 (long) rel->r_offset, howto->name);
9540 return FALSE;
9541 }
9542
9543 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
9544
9545 /* Get the (signed) value from the instruction. */
9546 addend = value & howto->src_mask;
9547 if (addend & ((howto->src_mask + 1) >> 1))
9548 {
9549 bfd_signed_vma mask;
9550
9551 mask = -1;
9552 mask &= ~ howto->src_mask;
9553 addend |= mask;
9554 }
9555 break;
4e7fd91e 9556 }
39623e12 9557
4e7fd91e
PB		 9558 msec = sec;
9559 addend =
9560 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
9561 - relocation;
9562 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 9563
9564 /* Cases here must match those in the preceeding
9565 switch statement. */
9566 switch (r_type)
9567 {
9568 case R_ARM_MOVW_ABS_NC:
9569 case R_ARM_MOVT_ABS:
9570 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
9571 | (addend & 0xfff);
9572 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
9573 break;
9574
9575 case R_ARM_THM_MOVW_ABS_NC:
9576 case R_ARM_THM_MOVT_ABS:
9577 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
9578 | (addend & 0xff) | ((addend & 0x0800) << 15);
9579 bfd_put_16 (input_bfd, value >> 16,
9580 contents + rel->r_offset);
9581 bfd_put_16 (input_bfd, value,
9582 contents + rel->r_offset + 2);
9583 break;
9584
9585 default:
9586 value = (value & ~ howto->dst_mask)
9587 | (addend & howto->dst_mask);
9588 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
9589 break;
9590 }
f8df10f4 9591 }
f8df10f4 9592 }
4e7fd91e
PB		 9593 else
9594 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 9595 }
9596 else
9597 {
560e09e9 9598 bfd_boolean warned;
560e09e9 9599
b2a8e766
AM		 9600 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
9601 r_symndx, symtab_hdr, sym_hashes,
9602 h, sec, relocation,
9603 unresolved_reloc, warned);
ba93b8ac
DJ		 9604
9605 sym_type = h->type;
252b5132
RH		 9606 }
9607
ab96bf03 9608 if (sec != NULL && elf_discarded_section (sec))
e4067dbb
DJ		 9609 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
9610 rel, relend, howto, contents);
ab96bf03
AM		 9611
9612 if (info->relocatable)
9613 {
9614 /* This is a relocatable link. We don't have to change
9615 anything, unless the reloc is against a section symbol,
9616 in which case we have to adjust according to where the
9617 section symbol winds up in the output section. */
9618 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
9619 {
9620 if (globals->use_rel)
9621 arm_add_to_rel (input_bfd, contents + rel->r_offset,
9622 howto, (bfd_signed_vma) sec->output_offset);
9623 else
9624 rel->r_addend += sec->output_offset;
9625 }
9626 continue;
9627 }
9628
252b5132
RH		 9629 if (h != NULL)
9630 name = h->root.root.string;
9631 else
9632 {
9633 name = (bfd_elf_string_from_elf_section
9634 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9635 if (name == NULL || *name == '\0')
9636 name = bfd_section_name (input_bfd, sec);
9637 }
f21f3fe0 9638
cf35638d 9639 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 9640 && r_type != R_ARM_NONE
9641 && (h == NULL
9642 || h->root.type == bfd_link_hash_defined
9643 || h->root.type == bfd_link_hash_defweak)
9644 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
9645 {
9646 (*_bfd_error_handler)
9647 ((sym_type == STT_TLS
9648 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
9649 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
9650 input_bfd,
9651 input_section,
9652 (long) rel->r_offset,
9653 howto->name,
9654 name);
9655 }
9656
0855e32b
NS		 9657 /* We call elf32_arm_final_link_relocate unless we're completely
9658 done, i.e., the relaxation produced the final output we want,
9659 and we won't let anybody mess with it. Also, we have to do
9660 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
9661 both in relaxed and non-relaxed cases */
9662 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
9663 || (IS_ARM_TLS_GNU_RELOC (r_type)
9664 && !((h ? elf32_arm_hash_entry (h)->tls_type :
9665 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
9666 & GOT_TLS_GDESC)))
9667 {
9668 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
9669 contents, rel, h == NULL);
9670 /* This may have been marked unresolved because it came from
9671 a shared library. But we've just dealt with that. */
9672 unresolved_reloc = 0;
9673 }
9674 else
9675 r = bfd_reloc_continue;
9676
9677 if (r == bfd_reloc_continue)
9678 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
9679 input_section, contents, rel,
9680 relocation, info, sec, name,
35fc36a8
RS		 9681 (h ? h->target_internal
9682 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 9683 &unresolved_reloc, &error_message);
0945cdfd
DJ		 9684
9685 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
9686 because such sections are not SEC_ALLOC and thus ld.so will
9687 not process them. */
9688 if (unresolved_reloc
9689 && !((input_section->flags & SEC_DEBUGGING) != 0
9690 && h->def_dynamic))
9691 {
9692 (*_bfd_error_handler)
843fe662
L		 9693 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
9694 input_bfd,
9695 input_section,
9696 (long) rel->r_offset,
9697 howto->name,
9698 h->root.root.string);
0945cdfd
DJ		 9699 return FALSE;
9700 }
252b5132
RH		 9701
9702 if (r != bfd_reloc_ok)
9703 {
252b5132
RH		 9704 switch (r)
9705 {
9706 case bfd_reloc_overflow:
cf919dfd
PB		 9707 /* If the overflowing reloc was to an undefined symbol,
9708 we have already printed one error message and there
9709 is no point complaining again. */
9710 if ((! h ||
9711 h->root.type != bfd_link_hash_undefined)
9712 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 9713 (info, (h ? &h->root : NULL), name, howto->name,
9714 (bfd_vma) 0, input_bfd, input_section,
9715 rel->r_offset))))
b34976b6 9716 return FALSE;
252b5132
RH		 9717 break;
9718
9719 case bfd_reloc_undefined:
9720 if (!((*info->callbacks->undefined_symbol)
9721 (info, name, input_bfd, input_section,
b34976b6
AM		 9722 rel->r_offset, TRUE)))
9723 return FALSE;
252b5132
RH		 9724 break;
9725
9726 case bfd_reloc_outofrange:
f2a9dd69 9727 error_message = _("out of range");
252b5132
RH		 9728 goto common_error;
9729
9730 case bfd_reloc_notsupported:
f2a9dd69 9731 error_message = _("unsupported relocation");
252b5132
RH		 9732 goto common_error;
9733
9734 case bfd_reloc_dangerous:
f2a9dd69 9735 /* error_message should already be set. */
252b5132
RH		 9736 goto common_error;
9737
9738 default:
f2a9dd69 9739 error_message = _("unknown error");
8029a119 9740 /* Fall through. */
252b5132
RH		 9741
9742 common_error:
f2a9dd69
DJ		 9743 BFD_ASSERT (error_message != NULL);
9744 if (!((*info->callbacks->reloc_dangerous)
9745 (info, error_message, input_bfd, input_section,
252b5132 9746 rel->r_offset)))
b34976b6 9747 return FALSE;
252b5132
RH		 9748 break;
9749 }
9750 }
9751 }
9752
b34976b6 9753 return TRUE;
252b5132
RH		 9754}
9755
91d6fa6a 9756/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 9757 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 9758 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 9759 maintaining that condition). */
9760
9761static void
9762add_unwind_table_edit (arm_unwind_table_edit **head,
9763 arm_unwind_table_edit **tail,
9764 arm_unwind_edit_type type,
9765 asection *linked_section,
91d6fa6a 9766 unsigned int tindex)
2468f9c9 9767{
21d799b5
NC		 9768 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9769 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 9770
9771 new_edit->type = type;
9772 new_edit->linked_section = linked_section;
91d6fa6a 9773 new_edit->index = tindex;
2468f9c9 9774
91d6fa6a 9775 if (tindex > 0)
2468f9c9
PB		 9776 {
9777 new_edit->next = NULL;
9778
9779 if (*tail)
9780 (*tail)->next = new_edit;
9781
9782 (*tail) = new_edit;
9783
9784 if (!*head)
9785 (*head) = new_edit;
9786 }
9787 else
9788 {
9789 new_edit->next = *head;
9790
9791 if (!*tail)
9792 *tail = new_edit;
9793
9794 *head = new_edit;
9795 }
9796}
9797
9798static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9799
9800/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9801static void
9802adjust_exidx_size(asection *exidx_sec, int adjust)
9803{
9804 asection *out_sec;
9805
9806 if (!exidx_sec->rawsize)
9807 exidx_sec->rawsize = exidx_sec->size;
9808
9809 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9810 out_sec = exidx_sec->output_section;
9811 /* Adjust size of output section. */
9812 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9813}
9814
9815/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9816static void
9817insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9818{
9819 struct _arm_elf_section_data *exidx_arm_data;
9820
9821 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9822 add_unwind_table_edit (
9823 &exidx_arm_data->u.exidx.unwind_edit_list,
9824 &exidx_arm_data->u.exidx.unwind_edit_tail,
9825 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9826
9827 adjust_exidx_size(exidx_sec, 8);
9828}
9829
9830/* Scan .ARM.exidx tables, and create a list describing edits which should be
9831 made to those tables, such that:
9832
9833 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9834 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9835 codes which have been inlined into the index).
9836
85fdf906
AH		 9837 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
9838
2468f9c9
PB		 9839 The edits are applied when the tables are written
9840 (in elf32_arm_write_section).
9841*/
9842
9843bfd_boolean
9844elf32_arm_fix_exidx_coverage (asection **text_section_order,
9845 unsigned int num_text_sections,
85fdf906
AH		 9846 struct bfd_link_info *info,
9847 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 9848{
9849 bfd *inp;
9850 unsigned int last_second_word = 0, i;
9851 asection *last_exidx_sec = NULL;
9852 asection *last_text_sec = NULL;
9853 int last_unwind_type = -1;
9854
9855 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9856 text sections. */
9857 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9858 {
9859 asection *sec;
9860
9861 for (sec = inp->sections; sec != NULL; sec = sec->next)
9862 {
9863 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9864 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9865
dec9d5df 9866 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9867 continue;
9868
9869 if (elf_sec->linked_to)
9870 {
9871 Elf_Internal_Shdr *linked_hdr
9872 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9873 struct _arm_elf_section_data *linked_sec_arm_data
9874 = get_arm_elf_section_data (linked_hdr->bfd_section);
9875
9876 if (linked_sec_arm_data == NULL)
9877 continue;
9878
9879 /* Link this .ARM.exidx section back from the text section it
9880 describes. */
9881 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9882 }
9883 }
9884 }
9885
9886 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9887 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 9888 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 9889
9890 for (i = 0; i < num_text_sections; i++)
9891 {
9892 asection *sec = text_section_order[i];
9893 asection *exidx_sec;
9894 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9895 struct _arm_elf_section_data *exidx_arm_data;
9896 bfd_byte *contents = NULL;
9897 int deleted_exidx_bytes = 0;
9898 bfd_vma j;
9899 arm_unwind_table_edit *unwind_edit_head = NULL;
9900 arm_unwind_table_edit *unwind_edit_tail = NULL;
9901 Elf_Internal_Shdr *hdr;
9902 bfd *ibfd;
9903
9904 if (arm_data == NULL)
9905 continue;
9906
9907 exidx_sec = arm_data->u.text.arm_exidx_sec;
9908 if (exidx_sec == NULL)
9909 {
9910 /* Section has no unwind data. */
9911 if (last_unwind_type == 0 || !last_exidx_sec)
9912 continue;
9913
9914 /* Ignore zero sized sections. */
9915 if (sec->size == 0)
9916 continue;
9917
9918 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9919 last_unwind_type = 0;
9920 continue;
9921 }
9922
22a8f80e
PB		 9923 /* Skip /DISCARD/ sections. */
9924 if (bfd_is_abs_section (exidx_sec->output_section))
9925 continue;
9926
2468f9c9
PB		 9927 hdr = &elf_section_data (exidx_sec)->this_hdr;
9928 if (hdr->sh_type != SHT_ARM_EXIDX)
9929 continue;
9930
9931 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9932 if (exidx_arm_data == NULL)
9933 continue;
9934
9935 ibfd = exidx_sec->owner;
9936
9937 if (hdr->contents != NULL)
9938 contents = hdr->contents;
9939 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9940 /* An error? */
9941 continue;
9942
9943 for (j = 0; j < hdr->sh_size; j += 8)
9944 {
9945 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9946 int unwind_type;
9947 int elide = 0;
9948
9949 /* An EXIDX_CANTUNWIND entry. */
9950 if (second_word == 1)
9951 {
9952 if (last_unwind_type == 0)
9953 elide = 1;
9954 unwind_type = 0;
9955 }
9956 /* Inlined unwinding data. Merge if equal to previous. */
9957 else if ((second_word & 0x80000000) != 0)
9958 {
85fdf906
AH		 9959 if (merge_exidx_entries
9960 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 9961 elide = 1;
9962 unwind_type = 1;
9963 last_second_word = second_word;
9964 }
9965 /* Normal table entry. In theory we could merge these too,
9966 but duplicate entries are likely to be much less common. */
9967 else
9968 unwind_type = 2;
9969
9970 if (elide)
9971 {
9972 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9973 DELETE_EXIDX_ENTRY, NULL, j / 8);
9974
9975 deleted_exidx_bytes += 8;
9976 }
9977
9978 last_unwind_type = unwind_type;
9979 }
9980
9981 /* Free contents if we allocated it ourselves. */
9982 if (contents != hdr->contents)
9983 free (contents);
9984
9985 /* Record edits to be applied later (in elf32_arm_write_section). */
9986 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9987 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9988
9989 if (deleted_exidx_bytes > 0)
9990 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9991
9992 last_exidx_sec = exidx_sec;
9993 last_text_sec = sec;
9994 }
9995
9996 /* Add terminating CANTUNWIND entry. */
9997 if (last_exidx_sec && last_unwind_type != 0)
9998 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9999
10000 return TRUE;
10001}
10002
3e6b1042
DJ		 10003static bfd_boolean
10004elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10005 bfd *ibfd, const char *name)
10006{
10007 asection *sec, *osec;
10008
10009 sec = bfd_get_section_by_name (ibfd, name);
10010 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10011 return TRUE;
10012
10013 osec = sec->output_section;
10014 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10015 return TRUE;
10016
10017 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10018 sec->output_offset, sec->size))
10019 return FALSE;
10020
10021 return TRUE;
10022}
10023
10024static bfd_boolean
10025elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10026{
10027 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 10028 asection *sec, *osec;
3e6b1042 10029
4dfe6ac6
NC		 10030 if (globals == NULL)
10031 return FALSE;
10032
3e6b1042
DJ		 10033 /* Invoke the regular ELF backend linker to do all the work. */
10034 if (!bfd_elf_final_link (abfd, info))
10035 return FALSE;
10036
fe33d2fa
CL		 10037 /* Process stub sections (eg BE8 encoding, ...). */
10038 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10039 int i;
cdb21a0a
NS		 10040 for (i=0; i<htab->top_id; i++)
10041 {
10042 sec = htab->stub_group[i].stub_sec;
10043 /* Only process it once, in its link_sec slot. */
10044 if (sec && i == htab->stub_group[i].link_sec->id)
10045 {
10046 osec = sec->output_section;
10047 elf32_arm_write_section (abfd, info, sec, sec->contents);
10048 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10049 sec->output_offset, sec->size))
10050 return FALSE;
10051 }
fe33d2fa 10052 }
fe33d2fa 10053
3e6b1042
DJ		 10054 /* Write out any glue sections now that we have created all the
10055 stubs. */
10056 if (globals->bfd_of_glue_owner != NULL)
10057 {
10058 if (! elf32_arm_output_glue_section (info, abfd,
10059 globals->bfd_of_glue_owner,
10060 ARM2THUMB_GLUE_SECTION_NAME))
10061 return FALSE;
10062
10063 if (! elf32_arm_output_glue_section (info, abfd,
10064 globals->bfd_of_glue_owner,
10065 THUMB2ARM_GLUE_SECTION_NAME))
10066 return FALSE;
10067
10068 if (! elf32_arm_output_glue_section (info, abfd,
10069 globals->bfd_of_glue_owner,
10070 VFP11_ERRATUM_VENEER_SECTION_NAME))
10071 return FALSE;
10072
10073 if (! elf32_arm_output_glue_section (info, abfd,
10074 globals->bfd_of_glue_owner,
10075 ARM_BX_GLUE_SECTION_NAME))
10076 return FALSE;
10077 }
10078
10079 return TRUE;
10080}
10081
c178919b
NC		 10082/* Set the right machine number. */
10083
10084static bfd_boolean
57e8b36a 10085elf32_arm_object_p (bfd *abfd)
c178919b 10086{
5a6c6817 10087 unsigned int mach;
57e8b36a 10088
5a6c6817 10089 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 10090
5a6c6817
NC		 10091 if (mach != bfd_mach_arm_unknown)
10092 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10093
10094 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
10095 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 10096
e16bb312 10097 else
5a6c6817 10098 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 10099
10100 return TRUE;
10101}
10102
fc830a83 10103/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 10104
b34976b6 10105static bfd_boolean
57e8b36a 10106elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 10107{
10108 if (elf_flags_init (abfd)
10109 && elf_elfheader (abfd)->e_flags != flags)
10110 {
fc830a83
NC		 10111 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
10112 {
fd2ec330 10113 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 10114 (*_bfd_error_handler)
10115 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
10116 abfd);
fc830a83 10117 else
d003868e
AM		 10118 _bfd_error_handler
10119 (_("Warning: Clearing the interworking flag of %B due to outside request"),
10120 abfd);
fc830a83 10121 }
252b5132
RH		 10122 }
10123 else
10124 {
10125 elf_elfheader (abfd)->e_flags = flags;
b34976b6 10126 elf_flags_init (abfd) = TRUE;
252b5132
RH		 10127 }
10128
b34976b6 10129 return TRUE;
252b5132
RH		 10130}
10131
fc830a83 10132/* Copy backend specific data from one object module to another. */
9b485d32 10133
b34976b6 10134static bfd_boolean
57e8b36a 10135elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 10136{
10137 flagword in_flags;
10138 flagword out_flags;
10139
0ffa91dd 10140 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10141 return TRUE;
252b5132 10142
fc830a83 10143 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 10144 out_flags = elf_elfheader (obfd)->e_flags;
10145
fc830a83
NC		 10146 if (elf_flags_init (obfd)
10147 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
10148 && in_flags != out_flags)
252b5132 10149 {
252b5132 10150 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 10151 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 10152 return FALSE;
252b5132
RH		 10153
10154 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 10155 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 10156 return FALSE;
252b5132
RH		 10157
10158 /* If the src and dest have different interworking flags
10159 then turn off the interworking bit. */
fd2ec330 10160 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 10161 {
fd2ec330 10162 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 10163 _bfd_error_handler
10164 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
10165 obfd, ibfd);
252b5132 10166
fd2ec330 10167 in_flags &= ~EF_ARM_INTERWORK;
252b5132 10168 }
1006ba19
PB		 10169
10170 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 10171 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
10172 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 10173 }
10174
10175 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 10176 elf_flags_init (obfd) = TRUE;
252b5132 10177
94a3258f
PB		 10178 /* Also copy the EI_OSABI field. */
10179 elf_elfheader (obfd)->e_ident[EI_OSABI] =
10180 elf_elfheader (ibfd)->e_ident[EI_OSABI];
10181
104d59d1
JM		 10182 /* Copy object attributes. */
10183 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 10184
10185 return TRUE;
10186}
10187
10188/* Values for Tag_ABI_PCS_R9_use. */
10189enum
10190{
10191 AEABI_R9_V6,
10192 AEABI_R9_SB,
10193 AEABI_R9_TLS,
10194 AEABI_R9_unused
10195};
10196
10197/* Values for Tag_ABI_PCS_RW_data. */
10198enum
10199{
10200 AEABI_PCS_RW_data_absolute,
10201 AEABI_PCS_RW_data_PCrel,
10202 AEABI_PCS_RW_data_SBrel,
10203 AEABI_PCS_RW_data_unused
10204};
10205
10206/* Values for Tag_ABI_enum_size. */
10207enum
10208{
10209 AEABI_enum_unused,
10210 AEABI_enum_short,
10211 AEABI_enum_wide,
10212 AEABI_enum_forced_wide
10213};
10214
104d59d1
JM		 10215/* Determine whether an object attribute tag takes an integer, a
10216 string or both. */
906e58ca 10217
104d59d1
JM		 10218static int
10219elf32_arm_obj_attrs_arg_type (int tag)
10220{
10221 if (tag == Tag_compatibility)
3483fe2e 10222 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 10223 else if (tag == Tag_nodefaults)
3483fe2e
AS		 10224 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
10225 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
10226 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 10227 else if (tag < 32)
3483fe2e 10228 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 10229 else
3483fe2e 10230 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 10231}
10232
5aa6ff7c
AS		 10233/* The ABI defines that Tag_conformance should be emitted first, and that
10234 Tag_nodefaults should be second (if either is defined). This sets those
10235 two positions, and bumps up the position of all the remaining tags to
10236 compensate. */
10237static int
10238elf32_arm_obj_attrs_order (int num)
10239{
3de4a297 10240 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 10241 return Tag_conformance;
3de4a297 10242 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 10243 return Tag_nodefaults;
10244 if ((num - 2) < Tag_nodefaults)
10245 return num - 2;
10246 if ((num - 1) < Tag_conformance)
10247 return num - 1;
10248 return num;
10249}
10250
e8b36cd1
JM		 10251/* Attribute numbers >=64 (mod 128) can be safely ignored. */
10252static bfd_boolean
10253elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
10254{
10255 if ((tag & 127) < 64)
10256 {
10257 _bfd_error_handler
10258 (_("%B: Unknown mandatory EABI object attribute %d"),
10259 abfd, tag);
10260 bfd_set_error (bfd_error_bad_value);
10261 return FALSE;
10262 }
10263 else
10264 {
10265 _bfd_error_handler
10266 (_("Warning: %B: Unknown EABI object attribute %d"),
10267 abfd, tag);
10268 return TRUE;
10269 }
10270}
10271
91e22acd
AS		 10272/* Read the architecture from the Tag_also_compatible_with attribute, if any.
10273 Returns -1 if no architecture could be read. */
10274
10275static int
10276get_secondary_compatible_arch (bfd *abfd)
10277{
10278 obj_attribute *attr =
10279 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
10280
10281 /* Note: the tag and its argument below are uleb128 values, though
10282 currently-defined values fit in one byte for each. */
10283 if (attr->s
10284 && attr->s[0] == Tag_CPU_arch
10285 && (attr->s[1] & 128) != 128
10286 && attr->s[2] == 0)
10287 return attr->s[1];
10288
10289 /* This tag is "safely ignorable", so don't complain if it looks funny. */
10290 return -1;
10291}
10292
10293/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10294 The tag is removed if ARCH is -1. */
10295
8e79c3df 10296static void
91e22acd 10297set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 10298{
91e22acd
AS		 10299 obj_attribute *attr =
10300 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 10301
91e22acd
AS		 10302 if (arch == -1)
10303 {
10304 attr->s = NULL;
10305 return;
8e79c3df 10306 }
91e22acd
AS		 10307
10308 /* Note: the tag and its argument below are uleb128 values, though
10309 currently-defined values fit in one byte for each. */
10310 if (!attr->s)
21d799b5 10311 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 10312 attr->s[0] = Tag_CPU_arch;
10313 attr->s[1] = arch;
10314 attr->s[2] = '\0';
8e79c3df
CM		 10315}
10316
91e22acd
AS		 10317/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10318 into account. */
10319
10320static int
10321tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
10322 int newtag, int secondary_compat)
8e79c3df 10323{
91e22acd
AS		 10324#define T(X) TAG_CPU_ARCH_##X
10325 int tagl, tagh, result;
10326 const int v6t2[] =
10327 {
10328 T(V6T2), /* PRE_V4. */
10329 T(V6T2), /* V4. */
10330 T(V6T2), /* V4T. */
10331 T(V6T2), /* V5T. */
10332 T(V6T2), /* V5TE. */
10333 T(V6T2), /* V5TEJ. */
10334 T(V6T2), /* V6. */
10335 T(V7), /* V6KZ. */
10336 T(V6T2) /* V6T2. */
10337 };
10338 const int v6k[] =
10339 {
10340 T(V6K), /* PRE_V4. */
10341 T(V6K), /* V4. */
10342 T(V6K), /* V4T. */
10343 T(V6K), /* V5T. */
10344 T(V6K), /* V5TE. */
10345 T(V6K), /* V5TEJ. */
10346 T(V6K), /* V6. */
10347 T(V6KZ), /* V6KZ. */
10348 T(V7), /* V6T2. */
10349 T(V6K) /* V6K. */
10350 };
10351 const int v7[] =
10352 {
10353 T(V7), /* PRE_V4. */
10354 T(V7), /* V4. */
10355 T(V7), /* V4T. */
10356 T(V7), /* V5T. */
10357 T(V7), /* V5TE. */
10358 T(V7), /* V5TEJ. */
10359 T(V7), /* V6. */
10360 T(V7), /* V6KZ. */
10361 T(V7), /* V6T2. */
10362 T(V7), /* V6K. */
10363 T(V7) /* V7. */
10364 };
10365 const int v6_m[] =
10366 {
10367 -1, /* PRE_V4. */
10368 -1, /* V4. */
10369 T(V6K), /* V4T. */
10370 T(V6K), /* V5T. */
10371 T(V6K), /* V5TE. */
10372 T(V6K), /* V5TEJ. */
10373 T(V6K), /* V6. */
10374 T(V6KZ), /* V6KZ. */
10375 T(V7), /* V6T2. */
10376 T(V6K), /* V6K. */
10377 T(V7), /* V7. */
10378 T(V6_M) /* V6_M. */
10379 };
10380 const int v6s_m[] =
10381 {
10382 -1, /* PRE_V4. */
10383 -1, /* V4. */
10384 T(V6K), /* V4T. */
10385 T(V6K), /* V5T. */
10386 T(V6K), /* V5TE. */
10387 T(V6K), /* V5TEJ. */
10388 T(V6K), /* V6. */
10389 T(V6KZ), /* V6KZ. */
10390 T(V7), /* V6T2. */
10391 T(V6K), /* V6K. */
10392 T(V7), /* V7. */
10393 T(V6S_M), /* V6_M. */
10394 T(V6S_M) /* V6S_M. */
10395 };
9e3c6df6
PB		 10396 const int v7e_m[] =
10397 {
10398 -1, /* PRE_V4. */
10399 -1, /* V4. */
10400 T(V7E_M), /* V4T. */
10401 T(V7E_M), /* V5T. */
10402 T(V7E_M), /* V5TE. */
10403 T(V7E_M), /* V5TEJ. */
10404 T(V7E_M), /* V6. */
10405 T(V7E_M), /* V6KZ. */
10406 T(V7E_M), /* V6T2. */
10407 T(V7E_M), /* V6K. */
10408 T(V7E_M), /* V7. */
10409 T(V7E_M), /* V6_M. */
10410 T(V7E_M), /* V6S_M. */
10411 T(V7E_M) /* V7E_M. */
10412 };
91e22acd
AS		 10413 const int v4t_plus_v6_m[] =
10414 {
10415 -1, /* PRE_V4. */
10416 -1, /* V4. */
10417 T(V4T), /* V4T. */
10418 T(V5T), /* V5T. */
10419 T(V5TE), /* V5TE. */
10420 T(V5TEJ), /* V5TEJ. */
10421 T(V6), /* V6. */
10422 T(V6KZ), /* V6KZ. */
10423 T(V6T2), /* V6T2. */
10424 T(V6K), /* V6K. */
10425 T(V7), /* V7. */
10426 T(V6_M), /* V6_M. */
10427 T(V6S_M), /* V6S_M. */
9e3c6df6 10428 T(V7E_M), /* V7E_M. */
91e22acd
AS		 10429 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
10430 };
10431 const int *comb[] =
10432 {
10433 v6t2,
10434 v6k,
10435 v7,
10436 v6_m,
10437 v6s_m,
9e3c6df6 10438 v7e_m,
91e22acd
AS		 10439 /* Pseudo-architecture. */
10440 v4t_plus_v6_m
10441 };
10442
10443 /* Check we've not got a higher architecture than we know about. */
10444
9e3c6df6 10445 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 10446 {
3895f852 10447 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 10448 return -1;
10449 }
10450
10451 /* Override old tag if we have a Tag_also_compatible_with on the output. */
10452
10453 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10454 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10455 oldtag = T(V4T_PLUS_V6_M);
10456
10457 /* And override the new tag if we have a Tag_also_compatible_with on the
10458 input. */
10459
10460 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10461 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
10462 newtag = T(V4T_PLUS_V6_M);
10463
10464 tagl = (oldtag < newtag) ? oldtag : newtag;
10465 result = tagh = (oldtag > newtag) ? oldtag : newtag;
10466
10467 /* Architectures before V6KZ add features monotonically. */
10468 if (tagh <= TAG_CPU_ARCH_V6KZ)
10469 return result;
10470
10471 result = comb[tagh - T(V6T2)][tagl];
10472
10473 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10474 as the canonical version. */
10475 if (result == T(V4T_PLUS_V6_M))
10476 {
10477 result = T(V4T);
10478 *secondary_compat_out = T(V6_M);
10479 }
10480 else
10481 *secondary_compat_out = -1;
10482
10483 if (result == -1)
10484 {
3895f852 10485 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 10486 ibfd, oldtag, newtag);
10487 return -1;
10488 }
10489
10490 return result;
10491#undef T
8e79c3df
CM		 10492}
10493
ee065d83
PB		 10494/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
10495 are conflicting attributes. */
906e58ca 10496
ee065d83
PB		 10497static bfd_boolean
10498elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
10499{
104d59d1
JM		 10500 obj_attribute *in_attr;
10501 obj_attribute *out_attr;
ee065d83
PB		 10502 /* Some tags have 0 = don't care, 1 = strong requirement,
10503 2 = weak requirement. */
91e22acd 10504 static const int order_021[3] = {0, 2, 1};
ee065d83 10505 int i;
91e22acd 10506 bfd_boolean result = TRUE;
ee065d83 10507
3e6b1042
DJ		 10508 /* Skip the linker stubs file. This preserves previous behavior
10509 of accepting unknown attributes in the first input file - but
10510 is that a bug? */
10511 if (ibfd->flags & BFD_LINKER_CREATED)
10512 return TRUE;
10513
104d59d1 10514 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 10515 {
10516 /* This is the first object. Copy the attributes. */
104d59d1 10517 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 10518
cd21e546
MGD		 10519 out_attr = elf_known_obj_attributes_proc (obfd);
10520
004ae526
PB		 10521 /* Use the Tag_null value to indicate the attributes have been
10522 initialized. */
cd21e546 10523 out_attr[0].i = 1;
004ae526 10524
cd21e546
MGD		 10525 /* We do not output objects with Tag_MPextension_use_legacy - we move
10526 the attribute's value to Tag_MPextension_use. */
10527 if (out_attr[Tag_MPextension_use_legacy].i != 0)
10528 {
10529 if (out_attr[Tag_MPextension_use].i != 0
10530 && out_attr[Tag_MPextension_use_legacy].i
10531 != out_attr[Tag_MPextension_use].i)
10532 {
10533 _bfd_error_handler
10534 (_("Error: %B has both the current and legacy "
10535 "Tag_MPextension_use attributes"), ibfd);
10536 result = FALSE;
10537 }
10538
10539 out_attr[Tag_MPextension_use] =
10540 out_attr[Tag_MPextension_use_legacy];
10541 out_attr[Tag_MPextension_use_legacy].type = 0;
10542 out_attr[Tag_MPextension_use_legacy].i = 0;
10543 }
10544
10545 return result;
ee065d83
PB		 10546 }
10547
104d59d1
JM		 10548 in_attr = elf_known_obj_attributes_proc (ibfd);
10549 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 10550 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
10551 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
10552 {
8e79c3df 10553 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 10554 if (out_attr[Tag_ABI_FP_number_model].i == 0)
10555 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
10556 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
10557 {
10558 _bfd_error_handler
3895f852 10559 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 10560 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
10561 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 10562 result = FALSE;
ee065d83
PB		 10563 }
10564 }
10565
3de4a297 10566 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 10567 {
10568 /* Merge this attribute with existing attributes. */
10569 switch (i)
10570 {
10571 case Tag_CPU_raw_name:
10572 case Tag_CPU_name:
91e22acd 10573 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 10574 break;
10575
10576 case Tag_ABI_optimization_goals:
10577 case Tag_ABI_FP_optimization_goals:
10578 /* Use the first value seen. */
10579 break;
10580
10581 case Tag_CPU_arch:
91e22acd
AS		 10582 {
10583 int secondary_compat = -1, secondary_compat_out = -1;
10584 unsigned int saved_out_attr = out_attr[i].i;
10585 static const char *name_table[] = {
10586 /* These aren't real CPU names, but we can't guess
10587 that from the architecture version alone. */
10588 "Pre v4",
10589 "ARM v4",
10590 "ARM v4T",
10591 "ARM v5T",
10592 "ARM v5TE",
10593 "ARM v5TEJ",
10594 "ARM v6",
10595 "ARM v6KZ",
10596 "ARM v6T2",
10597 "ARM v6K",
10598 "ARM v7",
10599 "ARM v6-M",
10600 "ARM v6S-M"
10601 };
10602
10603 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
10604 secondary_compat = get_secondary_compatible_arch (ibfd);
10605 secondary_compat_out = get_secondary_compatible_arch (obfd);
10606 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
10607 &secondary_compat_out,
10608 in_attr[i].i,
10609 secondary_compat);
10610 set_secondary_compatible_arch (obfd, secondary_compat_out);
10611
10612 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
10613 if (out_attr[i].i == saved_out_attr)
10614 ; /* Leave the names alone. */
10615 else if (out_attr[i].i == in_attr[i].i)
10616 {
10617 /* The output architecture has been changed to match the
10618 input architecture. Use the input names. */
10619 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
10620 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
10621 : NULL;
10622 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
10623 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
10624 : NULL;
10625 }
10626 else
10627 {
10628 out_attr[Tag_CPU_name].s = NULL;
10629 out_attr[Tag_CPU_raw_name].s = NULL;
10630 }
10631
10632 /* If we still don't have a value for Tag_CPU_name,
10633 make one up now. Tag_CPU_raw_name remains blank. */
10634 if (out_attr[Tag_CPU_name].s == NULL
10635 && out_attr[i].i < ARRAY_SIZE (name_table))
10636 out_attr[Tag_CPU_name].s =
10637 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
10638 }
10639 break;
10640
ee065d83
PB		 10641 case Tag_ARM_ISA_use:
10642 case Tag_THUMB_ISA_use:
ee065d83 10643 case Tag_WMMX_arch:
91e22acd
AS		 10644 case Tag_Advanced_SIMD_arch:
10645 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 10646 case Tag_ABI_FP_rounding:
ee065d83
PB		 10647 case Tag_ABI_FP_exceptions:
10648 case Tag_ABI_FP_user_exceptions:
10649 case Tag_ABI_FP_number_model:
75375b3e 10650 case Tag_FP_HP_extension:
91e22acd
AS		 10651 case Tag_CPU_unaligned_access:
10652 case Tag_T2EE_use:
91e22acd 10653 case Tag_MPextension_use:
ee065d83
PB		 10654 /* Use the largest value specified. */
10655 if (in_attr[i].i > out_attr[i].i)
10656 out_attr[i].i = in_attr[i].i;
10657 break;
10658
75375b3e 10659 case Tag_ABI_align_preserved:
91e22acd
AS		 10660 case Tag_ABI_PCS_RO_data:
10661 /* Use the smallest value specified. */
10662 if (in_attr[i].i < out_attr[i].i)
10663 out_attr[i].i = in_attr[i].i;
10664 break;
10665
75375b3e 10666 case Tag_ABI_align_needed:
91e22acd 10667 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 10668 && (in_attr[Tag_ABI_align_preserved].i == 0
10669 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 10670 {
91e22acd
AS		 10671 /* This error message should be enabled once all non-conformant
10672 binaries in the toolchain have had the attributes set
10673 properly.
ee065d83 10674 _bfd_error_handler
3895f852 10675 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 10676 obfd, ibfd);
10677 result = FALSE; */
ee065d83 10678 }
91e22acd
AS		 10679 /* Fall through. */
10680 case Tag_ABI_FP_denormal:
10681 case Tag_ABI_PCS_GOT_use:
10682 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
10683 value if greater than 2 (for future-proofing). */
10684 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
10685 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
10686 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 10687 out_attr[i].i = in_attr[i].i;
10688 break;
91e22acd 10689
75375b3e
MGD		 10690 case Tag_Virtualization_use:
10691 /* The virtualization tag effectively stores two bits of
10692 information: the intended use of TrustZone (in bit 0), and the
10693 intended use of Virtualization (in bit 1). */
10694 if (out_attr[i].i == 0)
10695 out_attr[i].i = in_attr[i].i;
10696 else if (in_attr[i].i != 0
10697 && in_attr[i].i != out_attr[i].i)
10698 {
10699 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
10700 out_attr[i].i = 3;
10701 else
10702 {
10703 _bfd_error_handler
10704 (_("error: %B: unable to merge virtualization attributes "
10705 "with %B"),
10706 obfd, ibfd);
10707 result = FALSE;
10708 }
10709 }
10710 break;
91e22acd
AS		 10711
10712 case Tag_CPU_arch_profile:
10713 if (out_attr[i].i != in_attr[i].i)
10714 {
10715 /* 0 will merge with anything.
10716 'A' and 'S' merge to 'A'.
10717 'R' and 'S' merge to 'R'.
10718 'M' and 'A|R|S' is an error. */
10719 if (out_attr[i].i == 0
10720 || (out_attr[i].i == 'S'
10721 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
10722 out_attr[i].i = in_attr[i].i;
10723 else if (in_attr[i].i == 0
10724 || (in_attr[i].i == 'S'
10725 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
10726 ; /* Do nothing. */
10727 else
10728 {
10729 _bfd_error_handler
3895f852 10730 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 10731 ibfd,
10732 in_attr[i].i ? in_attr[i].i : '0',
10733 out_attr[i].i ? out_attr[i].i : '0');
10734 result = FALSE;
10735 }
10736 }
10737 break;
75375b3e 10738 case Tag_FP_arch:
62f3b8c8 10739 {
4547cb56
NC		 10740 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
10741 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
10742 when it's 0. It might mean absence of FP hardware if
10743 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
10744
62f3b8c8
PB		 10745 static const struct
10746 {
10747 int ver;
10748 int regs;
10749 } vfp_versions[7] =
10750 {
10751 {0, 0},
10752 {1, 16},
10753 {2, 16},
10754 {3, 32},
10755 {3, 16},
10756 {4, 32},
10757 {4, 16}
10758 };
10759 int ver;
10760 int regs;
10761 int newval;
10762
4547cb56
NC		 10763 /* If the output has no requirement about FP hardware,
10764 follow the requirement of the input. */
10765 if (out_attr[i].i == 0)
10766 {
10767 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
10768 out_attr[i].i = in_attr[i].i;
10769 out_attr[Tag_ABI_HardFP_use].i
10770 = in_attr[Tag_ABI_HardFP_use].i;
10771 break;
10772 }
10773 /* If the input has no requirement about FP hardware, do
10774 nothing. */
10775 else if (in_attr[i].i == 0)
10776 {
10777 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
10778 break;
10779 }
10780
10781 /* Both the input and the output have nonzero Tag_FP_arch.
10782 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
10783
10784 /* If both the input and the output have zero Tag_ABI_HardFP_use,
10785 do nothing. */
10786 if (in_attr[Tag_ABI_HardFP_use].i == 0
10787 && out_attr[Tag_ABI_HardFP_use].i == 0)
10788 ;
10789 /* If the input and the output have different Tag_ABI_HardFP_use,
10790 the combination of them is 3 (SP & DP). */
10791 else if (in_attr[Tag_ABI_HardFP_use].i
10792 != out_attr[Tag_ABI_HardFP_use].i)
10793 out_attr[Tag_ABI_HardFP_use].i = 3;
10794
10795 /* Now we can handle Tag_FP_arch. */
10796
62f3b8c8
PB		 10797 /* Values greater than 6 aren't defined, so just pick the
10798 biggest */
10799 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
10800 {
10801 out_attr[i] = in_attr[i];
10802 break;
10803 }
10804 /* The output uses the superset of input features
10805 (ISA version) and registers. */
10806 ver = vfp_versions[in_attr[i].i].ver;
10807 if (ver < vfp_versions[out_attr[i].i].ver)
10808 ver = vfp_versions[out_attr[i].i].ver;
10809 regs = vfp_versions[in_attr[i].i].regs;
10810 if (regs < vfp_versions[out_attr[i].i].regs)
10811 regs = vfp_versions[out_attr[i].i].regs;
10812 /* This assumes all possible supersets are also a valid
10813 options. */
10814 for (newval = 6; newval > 0; newval--)
10815 {
10816 if (regs == vfp_versions[newval].regs
10817 && ver == vfp_versions[newval].ver)
10818 break;
10819 }
10820 out_attr[i].i = newval;
10821 }
b1cc4aeb 10822 break;
ee065d83
PB		 10823 case Tag_PCS_config:
10824 if (out_attr[i].i == 0)
10825 out_attr[i].i = in_attr[i].i;
10826 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
10827 {
10828 /* It's sometimes ok to mix different configs, so this is only
10829 a warning. */
10830 _bfd_error_handler
10831 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10832 }
10833 break;
10834 case Tag_ABI_PCS_R9_use:
004ae526
PB		 10835 if (in_attr[i].i != out_attr[i].i
10836 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 10837 && in_attr[i].i != AEABI_R9_unused)
10838 {
10839 _bfd_error_handler
3895f852 10840 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 10841 result = FALSE;
ee065d83
PB		 10842 }
10843 if (out_attr[i].i == AEABI_R9_unused)
10844 out_attr[i].i = in_attr[i].i;
10845 break;
10846 case Tag_ABI_PCS_RW_data:
10847 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10848 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10849 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10850 {
10851 _bfd_error_handler
3895f852 10852 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 10853 ibfd);
91e22acd 10854 result = FALSE;
ee065d83
PB		 10855 }
10856 /* Use the smallest value specified. */
10857 if (in_attr[i].i < out_attr[i].i)
10858 out_attr[i].i = in_attr[i].i;
10859 break;
ee065d83 10860 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 10861 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10862 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 10863 {
10864 _bfd_error_handler
a9dc9481
JM		 10865 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10866 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 10867 }
a9dc9481 10868 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 10869 out_attr[i].i = in_attr[i].i;
10870 break;
ee065d83
PB		 10871 case Tag_ABI_enum_size:
10872 if (in_attr[i].i != AEABI_enum_unused)
10873 {
10874 if (out_attr[i].i == AEABI_enum_unused
10875 || out_attr[i].i == AEABI_enum_forced_wide)
10876 {
10877 /* The existing object is compatible with anything.
10878 Use whatever requirements the new object has. */
10879 out_attr[i].i = in_attr[i].i;
10880 }
10881 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 10882 && out_attr[i].i != in_attr[i].i
0ffa91dd 10883 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 10884 {
91e22acd 10885 static const char *aeabi_enum_names[] =
bf21ed78 10886 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 10887 const char *in_name =
10888 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10889 ? aeabi_enum_names[in_attr[i].i]
10890 : "<unknown>";
10891 const char *out_name =
10892 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10893 ? aeabi_enum_names[out_attr[i].i]
10894 : "<unknown>";
ee065d83 10895 _bfd_error_handler
bf21ed78 10896 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 10897 ibfd, in_name, out_name);
ee065d83
PB		 10898 }
10899 }
10900 break;
10901 case Tag_ABI_VFP_args:
10902 /* Aready done. */
10903 break;
10904 case Tag_ABI_WMMX_args:
10905 if (in_attr[i].i != out_attr[i].i)
10906 {
10907 _bfd_error_handler
3895f852 10908 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 10909 ibfd, obfd);
91e22acd 10910 result = FALSE;
ee065d83
PB		 10911 }
10912 break;
7b86a9fa
AS		 10913 case Tag_compatibility:
10914 /* Merged in target-independent code. */
10915 break;
91e22acd 10916 case Tag_ABI_HardFP_use:
4547cb56 10917 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 10918 break;
10919 case Tag_ABI_FP_16bit_format:
10920 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10921 {
10922 if (in_attr[i].i != out_attr[i].i)
10923 {
10924 _bfd_error_handler
3895f852 10925 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10926 ibfd, obfd);
10927 result = FALSE;
10928 }
10929 }
10930 if (in_attr[i].i != 0)
10931 out_attr[i].i = in_attr[i].i;
10932 break;
7b86a9fa 10933
cd21e546
MGD		 10934 case Tag_DIV_use:
10935 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
10936 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10937 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10938 CPU. We will merge as follows: If the input attribute's value
10939 is one then the output attribute's value remains unchanged. If
10940 the input attribute's value is zero or two then if the output
10941 attribute's value is one the output value is set to the input
10942 value, otherwise the output value must be the same as the
10943 inputs. */
10944 if (in_attr[i].i != 1 && out_attr[i].i != 1)
10945 {
10946 if (in_attr[i].i != out_attr[i].i)
10947 {
10948 _bfd_error_handler
10949 (_("DIV usage mismatch between %B and %B"),
10950 ibfd, obfd);
10951 result = FALSE;
10952 }
10953 }
10954
10955 if (in_attr[i].i != 1)
10956 out_attr[i].i = in_attr[i].i;
10957
10958 break;
10959
10960 case Tag_MPextension_use_legacy:
10961 /* We don't output objects with Tag_MPextension_use_legacy - we
10962 move the value to Tag_MPextension_use. */
10963 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
10964 {
10965 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
10966 {
10967 _bfd_error_handler
10968 (_("%B has has both the current and legacy "
10969 "Tag_MPextension_use attributes"),
10970 ibfd);
10971 result = FALSE;
10972 }
10973 }
10974
10975 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
10976 out_attr[Tag_MPextension_use] = in_attr[i];
10977
10978 break;
10979
91e22acd 10980 case Tag_nodefaults:
2d0bb761
AS		 10981 /* This tag is set if it exists, but the value is unused (and is
10982 typically zero). We don't actually need to do anything here -
10983 the merge happens automatically when the type flags are merged
10984 below. */
91e22acd
AS		 10985 break;
10986 case Tag_also_compatible_with:
10987 /* Already done in Tag_CPU_arch. */
10988 break;
10989 case Tag_conformance:
10990 /* Keep the attribute if it matches. Throw it away otherwise.
10991 No attribute means no claim to conform. */
10992 if (!in_attr[i].s || !out_attr[i].s
10993 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10994 out_attr[i].s = NULL;
10995 break;
3cfad14c 10996
91e22acd 10997 default:
e8b36cd1
JM		 10998 result
10999 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 11000 }
11001
11002 /* If out_attr was copied from in_attr then it won't have a type yet. */
11003 if (in_attr[i].type && !out_attr[i].type)
11004 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 11005 }
11006
104d59d1 11007 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 11008 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11009 return FALSE;
ee065d83 11010
104d59d1 11011 /* Check for any attributes not known on ARM. */
e8b36cd1 11012 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 11013
91e22acd 11014 return result;
252b5132
RH		 11015}
11016
3a4a14e9
PB		 11017
11018/* Return TRUE if the two EABI versions are incompatible. */
11019
11020static bfd_boolean
11021elf32_arm_versions_compatible (unsigned iver, unsigned over)
11022{
11023 /* v4 and v5 are the same spec before and after it was released,
11024 so allow mixing them. */
11025 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11026 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11027 return TRUE;
11028
11029 return (iver == over);
11030}
11031
252b5132
RH		 11032/* Merge backend specific data from an object file to the output
11033 object file when linking. */
9b485d32 11034
b34976b6 11035static bfd_boolean
21d799b5 11036elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 11037
9b485d32
NC		 11038/* Display the flags field. */
11039
b34976b6 11040static bfd_boolean
57e8b36a 11041elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 11042{
fc830a83
NC		 11043 FILE * file = (FILE *) ptr;
11044 unsigned long flags;
252b5132
RH		 11045
11046 BFD_ASSERT (abfd != NULL && ptr != NULL);
11047
11048 /* Print normal ELF private data. */
11049 _bfd_elf_print_private_bfd_data (abfd, ptr);
11050
fc830a83 11051 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 11052 /* Ignore init flag - it may not be set, despite the flags field
11053 containing valid data. */
252b5132
RH		 11054
11055 /* xgettext:c-format */
9b485d32 11056 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 11057
fc830a83
NC		 11058 switch (EF_ARM_EABI_VERSION (flags))
11059 {
11060 case EF_ARM_EABI_UNKNOWN:
4cc11e76 11061 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 11062 official ARM ELF extended ABI. Hence they are only decoded if
11063 the EABI version is not set. */
fd2ec330 11064 if (flags & EF_ARM_INTERWORK)
9b485d32 11065 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 11066
fd2ec330 11067 if (flags & EF_ARM_APCS_26)
6c571f00 11068 fprintf (file, " [APCS-26]");
fc830a83 11069 else
6c571f00 11070 fprintf (file, " [APCS-32]");
9a5aca8c 11071
96a846ea
RE		 11072 if (flags & EF_ARM_VFP_FLOAT)
11073 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 11074 else if (flags & EF_ARM_MAVERICK_FLOAT)
11075 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 11076 else
11077 fprintf (file, _(" [FPA float format]"));
11078
fd2ec330 11079 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 11080 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 11081
fd2ec330 11082 if (flags & EF_ARM_PIC)
9b485d32 11083 fprintf (file, _(" [position independent]"));
fc830a83 11084
fd2ec330 11085 if (flags & EF_ARM_NEW_ABI)
9b485d32 11086 fprintf (file, _(" [new ABI]"));
9a5aca8c 11087
fd2ec330 11088 if (flags & EF_ARM_OLD_ABI)
9b485d32 11089 fprintf (file, _(" [old ABI]"));
9a5aca8c 11090
fd2ec330 11091 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 11092 fprintf (file, _(" [software FP]"));
9a5aca8c 11093
96a846ea
RE		 11094 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
11095 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 11096 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
11097 | EF_ARM_MAVERICK_FLOAT);
fc830a83 11098 break;
9a5aca8c 11099
fc830a83 11100 case EF_ARM_EABI_VER1:
9b485d32 11101 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 11102
fc830a83 11103 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 11104 fprintf (file, _(" [sorted symbol table]"));
fc830a83 11105 else
9b485d32 11106 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 11107
fc830a83
NC		 11108 flags &= ~ EF_ARM_SYMSARESORTED;
11109 break;
9a5aca8c 11110
fd2ec330
PB		 11111 case EF_ARM_EABI_VER2:
11112 fprintf (file, _(" [Version2 EABI]"));
11113
11114 if (flags & EF_ARM_SYMSARESORTED)
11115 fprintf (file, _(" [sorted symbol table]"));
11116 else
11117 fprintf (file, _(" [unsorted symbol table]"));
11118
11119 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
11120 fprintf (file, _(" [dynamic symbols use segment index]"));
11121
11122 if (flags & EF_ARM_MAPSYMSFIRST)
11123 fprintf (file, _(" [mapping symbols precede others]"));
11124
99e4ae17 11125 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 11126 | EF_ARM_MAPSYMSFIRST);
11127 break;
11128
d507cf36
PB		 11129 case EF_ARM_EABI_VER3:
11130 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 11131 break;
11132
11133 case EF_ARM_EABI_VER4:
11134 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 11135 goto eabi;
d507cf36 11136
3a4a14e9
PB		 11137 case EF_ARM_EABI_VER5:
11138 fprintf (file, _(" [Version5 EABI]"));
11139 eabi:
d507cf36
PB		 11140 if (flags & EF_ARM_BE8)
11141 fprintf (file, _(" [BE8]"));
11142
11143 if (flags & EF_ARM_LE8)
11144 fprintf (file, _(" [LE8]"));
11145
11146 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
11147 break;
11148
fc830a83 11149 default:
9b485d32 11150 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 11151 break;
11152 }
252b5132 11153
fc830a83 11154 flags &= ~ EF_ARM_EABIMASK;
252b5132 11155
fc830a83 11156 if (flags & EF_ARM_RELEXEC)
9b485d32 11157 fprintf (file, _(" [relocatable executable]"));
252b5132 11158
fc830a83 11159 if (flags & EF_ARM_HASENTRY)
9b485d32 11160 fprintf (file, _(" [has entry point]"));
252b5132 11161
fc830a83
NC		 11162 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
11163
11164 if (flags)
9b485d32 11165 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 11166
252b5132
RH		 11167 fputc ('\n', file);
11168
b34976b6 11169 return TRUE;
252b5132
RH		 11170}
11171
11172static int
57e8b36a 11173elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 11174{
2f0ca46a
NC		 11175 switch (ELF_ST_TYPE (elf_sym->st_info))
11176 {
11177 case STT_ARM_TFUNC:
11178 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 11179
2f0ca46a
NC		 11180 case STT_ARM_16BIT:
11181 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
11182 This allows us to distinguish between data used by Thumb instructions
11183 and non-data (which is probably code) inside Thumb regions of an
11184 executable. */
1a0eb693 11185 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 11186 return ELF_ST_TYPE (elf_sym->st_info);
11187 break;
9a5aca8c 11188
ce855c42
NC		 11189 default:
11190 break;
2f0ca46a
NC		 11191 }
11192
11193 return type;
252b5132 11194}
f21f3fe0 11195
252b5132 11196static asection *
07adf181
AM		 11197elf32_arm_gc_mark_hook (asection *sec,
11198 struct bfd_link_info *info,
11199 Elf_Internal_Rela *rel,
11200 struct elf_link_hash_entry *h,
11201 Elf_Internal_Sym *sym)
252b5132
RH		 11202{
11203 if (h != NULL)
07adf181 11204 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 11205 {
11206 case R_ARM_GNU_VTINHERIT:
11207 case R_ARM_GNU_VTENTRY:
07adf181
AM		 11208 return NULL;
11209 }
9ad5cbcf 11210
07adf181 11211 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 11212}
11213
780a67af
NC		 11214/* Update the got entry reference counts for the section being removed. */
11215
b34976b6 11216static bfd_boolean
ba93b8ac
DJ		 11217elf32_arm_gc_sweep_hook (bfd * abfd,
11218 struct bfd_link_info * info,
11219 asection * sec,
11220 const Elf_Internal_Rela * relocs)
252b5132 11221{
5e681ec4
PB		 11222 Elf_Internal_Shdr *symtab_hdr;
11223 struct elf_link_hash_entry **sym_hashes;
11224 bfd_signed_vma *local_got_refcounts;
11225 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 11226 struct elf32_arm_link_hash_table * globals;
11227
7dda2462
TG		 11228 if (info->relocatable)
11229 return TRUE;
11230
eb043451 11231 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11232 if (globals == NULL)
11233 return FALSE;
5e681ec4
PB		 11234
11235 elf_section_data (sec)->local_dynrel = NULL;
11236
0ffa91dd 11237 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 11238 sym_hashes = elf_sym_hashes (abfd);
11239 local_got_refcounts = elf_local_got_refcounts (abfd);
11240
906e58ca 11241 check_use_blx (globals);
bd97cb95 11242
5e681ec4
PB		 11243 relend = relocs + sec->reloc_count;
11244 for (rel = relocs; rel < relend; rel++)
eb043451 11245 {
3eb128b2
AM		 11246 unsigned long r_symndx;
11247 struct elf_link_hash_entry *h = NULL;
f6e32f6d 11248 struct elf32_arm_link_hash_entry *eh;
eb043451 11249 int r_type;
f6e32f6d
RS		 11250 bfd_boolean may_become_dynamic_p;
11251 bfd_boolean may_need_local_target_p;
5e681ec4 11252
3eb128b2
AM		 11253 r_symndx = ELF32_R_SYM (rel->r_info);
11254 if (r_symndx >= symtab_hdr->sh_info)
11255 {
11256 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11257 while (h->root.type == bfd_link_hash_indirect
11258 || h->root.type == bfd_link_hash_warning)
11259 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11260 }
f6e32f6d
RS		 11261 eh = (struct elf32_arm_link_hash_entry *) h;
11262
11263 may_become_dynamic_p = FALSE;
11264 may_need_local_target_p = FALSE;
3eb128b2 11265
eb043451 11266 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 11267 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 11268 switch (r_type)
11269 {
11270 case R_ARM_GOT32:
eb043451 11271 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 11272 case R_ARM_TLS_GD32:
11273 case R_ARM_TLS_IE32:
3eb128b2 11274 if (h != NULL)
eb043451 11275 {
eb043451
PB		 11276 if (h->got.refcount > 0)
11277 h->got.refcount -= 1;
11278 }
11279 else if (local_got_refcounts != NULL)
11280 {
11281 if (local_got_refcounts[r_symndx] > 0)
11282 local_got_refcounts[r_symndx] -= 1;
11283 }
11284 break;
11285
ba93b8ac 11286 case R_ARM_TLS_LDM32:
4dfe6ac6 11287 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 11288 break;
11289
eb043451
PB		 11290 case R_ARM_PC24:
11291 case R_ARM_PLT32:
5b5bb741
PB		 11292 case R_ARM_CALL:
11293 case R_ARM_JUMP24:
eb043451 11294 case R_ARM_PREL31:
c19d1205 11295 case R_ARM_THM_CALL:
bd97cb95
DJ		 11296 case R_ARM_THM_JUMP24:
11297 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 11298 may_need_local_target_p = TRUE;
11299 break;
11300
11301 case R_ARM_ABS12:
11302 if (!globals->vxworks_p)
11303 {
11304 may_need_local_target_p = TRUE;
11305 break;
11306 }
11307 /* Fall through. */
11308 case R_ARM_ABS32:
11309 case R_ARM_ABS32_NOI:
11310 case R_ARM_REL32:
11311 case R_ARM_REL32_NOI:
b6895b4f
PB		 11312 case R_ARM_MOVW_ABS_NC:
11313 case R_ARM_MOVT_ABS:
11314 case R_ARM_MOVW_PREL_NC:
11315 case R_ARM_MOVT_PREL:
11316 case R_ARM_THM_MOVW_ABS_NC:
11317 case R_ARM_THM_MOVT_ABS:
11318 case R_ARM_THM_MOVW_PREL_NC:
11319 case R_ARM_THM_MOVT_PREL:
b7693d02 11320 /* Should the interworking branches be here also? */
f6e32f6d
RS		 11321 if ((info->shared || globals->root.is_relocatable_executable)
11322 && (sec->flags & SEC_ALLOC) != 0
11323 && (h != NULL
11324 || (r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)))
11325 may_become_dynamic_p = TRUE;
11326 else
11327 may_need_local_target_p = TRUE;
11328 break;
b7693d02 11329
f6e32f6d
RS		 11330 default:
11331 break;
11332 }
5e681ec4 11333
f6e32f6d
RS		 11334 if (may_need_local_target_p && h != NULL)
11335 {
11336 BFD_ASSERT (h->plt.refcount > 0);
11337 h->plt.refcount -= 1;
5e681ec4 11338
f6e32f6d
RS		 11339 if (r_type == R_ARM_THM_CALL)
11340 eh->plt_maybe_thumb_refcount--;
bd97cb95 11341
f6e32f6d
RS		 11342 if (r_type == R_ARM_THM_JUMP24
11343 || r_type == R_ARM_THM_JUMP19)
11344 eh->plt_thumb_refcount--;
11345 }
5e681ec4 11346
f6e32f6d
RS		 11347 if (may_become_dynamic_p && h != NULL)
11348 {
11349 struct elf_dyn_relocs **pp;
11350 struct elf_dyn_relocs *p;
5e681ec4 11351
f6e32f6d
RS		 11352 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
11353 if (p->sec == sec)
11354 {
11355 /* Everything must go for SEC. */
11356 *pp = p->next;
11357 break;
11358 }
eb043451
PB		 11359 }
11360 }
5e681ec4 11361
b34976b6 11362 return TRUE;
252b5132
RH		 11363}
11364
780a67af
NC		 11365/* Look through the relocs for a section during the first phase. */
11366
b34976b6 11367static bfd_boolean
57e8b36a
NC		 11368elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
11369 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 11370{
b34976b6
AM		 11371 Elf_Internal_Shdr *symtab_hdr;
11372 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 11373 const Elf_Internal_Rela *rel;
11374 const Elf_Internal_Rela *rel_end;
11375 bfd *dynobj;
5e681ec4 11376 asection *sreloc;
5e681ec4 11377 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 11378 bfd_boolean call_reloc_p;
11379 bfd_boolean may_become_dynamic_p;
11380 bfd_boolean may_need_local_target_p;
ce98a316 11381 unsigned long nsyms;
9a5aca8c 11382
1049f94e 11383 if (info->relocatable)
b34976b6 11384 return TRUE;
9a5aca8c 11385
0ffa91dd
NC		 11386 BFD_ASSERT (is_arm_elf (abfd));
11387
5e681ec4 11388 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11389 if (htab == NULL)
11390 return FALSE;
11391
5e681ec4 11392 sreloc = NULL;
9a5aca8c 11393
67687978
PB		 11394 /* Create dynamic sections for relocatable executables so that we can
11395 copy relocations. */
11396 if (htab->root.is_relocatable_executable
11397 && ! htab->root.dynamic_sections_created)
11398 {
11399 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
11400 return FALSE;
11401 }
11402
cbc704f3
RS		 11403 if (htab->root.dynobj == NULL)
11404 htab->root.dynobj = abfd;
11405
11406 dynobj = htab->root.dynobj;
11407
0ffa91dd 11408 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 11409 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 11410 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
11411
252b5132
RH		 11412 rel_end = relocs + sec->reloc_count;
11413 for (rel = relocs; rel < rel_end; rel++)
11414 {
11415 struct elf_link_hash_entry *h;
b7693d02 11416 struct elf32_arm_link_hash_entry *eh;
252b5132 11417 unsigned long r_symndx;
eb043451 11418 int r_type;
9a5aca8c 11419
252b5132 11420 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 11421 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 11422 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 11423
ce98a316
NC		 11424 if (r_symndx >= nsyms
11425 /* PR 9934: It is possible to have relocations that do not
11426 refer to symbols, thus it is also possible to have an
11427 object file containing relocations but no symbol table. */
cf35638d 11428 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 11429 {
11430 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 11431 r_symndx);
ba93b8ac
DJ		 11432 return FALSE;
11433 }
11434
ce98a316 11435 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 11436 h = NULL;
11437 else
973a3492
L		 11438 {
11439 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11440 while (h->root.type == bfd_link_hash_indirect
11441 || h->root.type == bfd_link_hash_warning)
11442 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11443 }
9a5aca8c 11444
b7693d02
DJ		 11445 eh = (struct elf32_arm_link_hash_entry *) h;
11446
f6e32f6d
RS		 11447 call_reloc_p = FALSE;
11448 may_become_dynamic_p = FALSE;
11449 may_need_local_target_p = FALSE;
11450
0855e32b
NS		 11451 /* Could be done earlier, if h were already available. */
11452 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 11453 switch (r_type)
252b5132 11454 {
5e681ec4 11455 case R_ARM_GOT32:
eb043451 11456 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 11457 case R_ARM_TLS_GD32:
11458 case R_ARM_TLS_IE32:
0855e32b
NS		 11459 case R_ARM_TLS_GOTDESC:
11460 case R_ARM_TLS_DESCSEQ:
11461 case R_ARM_THM_TLS_DESCSEQ:
11462 case R_ARM_TLS_CALL:
11463 case R_ARM_THM_TLS_CALL:
5e681ec4 11464 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 11465 {
11466 int tls_type, old_tls_type;
5e681ec4 11467
ba93b8ac
DJ		 11468 switch (r_type)
11469 {
11470 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
0855e32b 11471
ba93b8ac 11472 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
0855e32b
NS		 11473
11474 case R_ARM_TLS_GOTDESC:
11475 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
11476 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
11477 tls_type = GOT_TLS_GDESC; break;
11478
ba93b8ac
DJ		 11479 default: tls_type = GOT_NORMAL; break;
11480 }
252b5132 11481
ba93b8ac
DJ		 11482 if (h != NULL)
11483 {
11484 h->got.refcount++;
11485 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
11486 }
11487 else
11488 {
11489 bfd_signed_vma *local_got_refcounts;
11490
11491 /* This is a global offset table entry for a local symbol. */
11492 local_got_refcounts = elf_local_got_refcounts (abfd);
11493 if (local_got_refcounts == NULL)
11494 {
11495 bfd_size_type size;
906e58ca 11496
ba93b8ac 11497 size = symtab_hdr->sh_info;
0855e32b
NS		 11498 size *= (sizeof (bfd_signed_vma)
11499 + sizeof (bfd_vma) + sizeof (char));
21d799b5
NC		 11500 local_got_refcounts = (bfd_signed_vma *)
11501 bfd_zalloc (abfd, size);
ba93b8ac
DJ		 11502 if (local_got_refcounts == NULL)
11503 return FALSE;
11504 elf_local_got_refcounts (abfd) = local_got_refcounts;
0855e32b
NS		 11505 elf32_arm_local_tlsdesc_gotent (abfd)
11506 = (bfd_vma *) (local_got_refcounts
11507 + symtab_hdr->sh_info);
ba93b8ac 11508 elf32_arm_local_got_tls_type (abfd)
0855e32b
NS		 11509 = (char *) (elf32_arm_local_tlsdesc_gotent (abfd)
11510 + symtab_hdr->sh_info);
ba93b8ac
DJ		 11511 }
11512 local_got_refcounts[r_symndx] += 1;
11513 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
11514 }
11515
0855e32b
NS		 11516 /* If a variable is accessed with both tls methods, two
11517 slots may be created. */
11518 if (GOT_TLS_GD_ANY_P (old_tls_type)
11519 && GOT_TLS_GD_ANY_P (tls_type))
11520 tls_type |= old_tls_type;
11521
11522 /* We will already have issued an error message if there
11523 is a TLS/non-TLS mismatch, based on the symbol
11524 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 11525 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
11526 && tls_type != GOT_NORMAL)
11527 tls_type |= old_tls_type;
11528
0855e32b
NS		 11529 /* If the symbol is accessed in both IE and GDESC
11530 method, we're able to relax. Turn off the GDESC flag,
11531 without messing up with any other kind of tls types
11532 that may be involved */
11533 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
11534 tls_type &= ~GOT_TLS_GDESC;
11535
ba93b8ac
DJ		 11536 if (old_tls_type != tls_type)
11537 {
11538 if (h != NULL)
11539 elf32_arm_hash_entry (h)->tls_type = tls_type;
11540 else
11541 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
11542 }
11543 }
8029a119 11544 /* Fall through. */
ba93b8ac
DJ		 11545
11546 case R_ARM_TLS_LDM32:
11547 if (r_type == R_ARM_TLS_LDM32)
11548 htab->tls_ldm_got.refcount++;
8029a119 11549 /* Fall through. */
252b5132 11550
c19d1205 11551 case R_ARM_GOTOFF32:
5e681ec4 11552 case R_ARM_GOTPC:
cbc704f3
RS		 11553 if (htab->root.sgot == NULL
11554 && !create_got_section (htab->root.dynobj, info))
11555 return FALSE;
252b5132
RH		 11556 break;
11557
252b5132 11558 case R_ARM_PC24:
7359ea65 11559 case R_ARM_PLT32:
5b5bb741
PB		 11560 case R_ARM_CALL:
11561 case R_ARM_JUMP24:
eb043451 11562 case R_ARM_PREL31:
c19d1205 11563 case R_ARM_THM_CALL:
bd97cb95
DJ		 11564 case R_ARM_THM_JUMP24:
11565 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 11566 call_reloc_p = TRUE;
11567 may_need_local_target_p = TRUE;
11568 break;
11569
11570 case R_ARM_ABS12:
11571 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
11572 ldr __GOTT_INDEX__ offsets. */
11573 if (!htab->vxworks_p)
11574 {
11575 may_need_local_target_p = TRUE;
11576 break;
11577 }
11578 /* Fall through. */
39623e12 11579
96c23d59
JM		 11580 case R_ARM_MOVW_ABS_NC:
11581 case R_ARM_MOVT_ABS:
11582 case R_ARM_THM_MOVW_ABS_NC:
11583 case R_ARM_THM_MOVT_ABS:
11584 if (info->shared)
11585 {
11586 (*_bfd_error_handler)
11587 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
11588 abfd, elf32_arm_howto_table_1[r_type].name,
11589 (h) ? h->root.root.string : "a local symbol");
11590 bfd_set_error (bfd_error_bad_value);
11591 return FALSE;
11592 }
11593
11594 /* Fall through. */
39623e12
PB		 11595 case R_ARM_ABS32:
11596 case R_ARM_ABS32_NOI:
11597 case R_ARM_REL32:
11598 case R_ARM_REL32_NOI:
b6895b4f
PB		 11599 case R_ARM_MOVW_PREL_NC:
11600 case R_ARM_MOVT_PREL:
b6895b4f
PB		 11601 case R_ARM_THM_MOVW_PREL_NC:
11602 case R_ARM_THM_MOVT_PREL:
39623e12 11603
b7693d02 11604 /* Should the interworking branches be listed here? */
f6e32f6d
RS		 11605 /* If we are creating a shared library or relocatable
11606 executable, and this is a reloc against a global symbol,
11607 or a non-PC-relative reloc against a local symbol,
11608 then we may need to copy the reloc into the output. */
67687978 11609 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 11610 && (sec->flags & SEC_ALLOC) != 0
f6e32f6d
RS		 11611 && (h != NULL
11612 || (r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)))
11613 may_become_dynamic_p = TRUE;
11614 else
11615 may_need_local_target_p = TRUE;
252b5132
RH		 11616 break;
11617
11618 /* This relocation describes the C++ object vtable hierarchy.
11619 Reconstruct it for later use during GC. */
11620 case R_ARM_GNU_VTINHERIT:
c152c796 11621 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 11622 return FALSE;
252b5132 11623 break;
9a5aca8c 11624
252b5132
RH		 11625 /* This relocation describes which C++ vtable entries are actually
11626 used. Record for later use during GC. */
11627 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 11628 BFD_ASSERT (h != NULL);
11629 if (h != NULL
11630 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 11631 return FALSE;
252b5132
RH		 11632 break;
11633 }
f6e32f6d
RS		 11634
11635 if (h != NULL)
11636 {
11637 if (call_reloc_p)
11638 /* We may need a .plt entry if the function this reloc
11639 refers to is in a different object, regardless of the
11640 symbol's type. We can't tell for sure yet, because
11641 something later might force the symbol local. */
11642 h->needs_plt = 1;
11643 else if (may_need_local_target_p)
11644 /* If this reloc is in a read-only section, we might
11645 need a copy reloc. We can't check reliably at this
11646 stage whether the section is read-only, as input
11647 sections have not yet been mapped to output sections.
11648 Tentatively set the flag for now, and correct in
11649 adjust_dynamic_symbol. */
11650 h->non_got_ref = 1;
11651 }
11652
11653 if (may_need_local_target_p && h != NULL)
11654 {
11655 /* If the symbol is a function that doesn't bind locally,
11656 this relocation will need a PLT entry. */
11657 h->plt.refcount += 1;
11658
11659 /* It's too early to use htab->use_blx here, so we have to
11660 record possible blx references separately from
11661 relocs that definitely need a thumb stub. */
11662
11663 if (r_type == R_ARM_THM_CALL)
11664 eh->plt_maybe_thumb_refcount += 1;
11665
11666 if (r_type == R_ARM_THM_JUMP24
11667 || r_type == R_ARM_THM_JUMP19)
11668 eh->plt_thumb_refcount += 1;
11669 }
11670
11671 if (may_become_dynamic_p)
11672 {
11673 struct elf_dyn_relocs *p, **head;
11674
11675 /* Create a reloc section in dynobj. */
11676 if (sreloc == NULL)
11677 {
11678 sreloc = _bfd_elf_make_dynamic_reloc_section
11679 (sec, dynobj, 2, abfd, ! htab->use_rel);
11680
11681 if (sreloc == NULL)
11682 return FALSE;
11683
11684 /* BPABI objects never have dynamic relocations mapped. */
11685 if (htab->symbian_p)
11686 {
11687 flagword flags;
11688
11689 flags = bfd_get_section_flags (dynobj, sreloc);
11690 flags &= ~(SEC_LOAD | SEC_ALLOC);
11691 bfd_set_section_flags (dynobj, sreloc, flags);
11692 }
11693 }
11694
11695 /* If this is a global symbol, count the number of
11696 relocations we need for this symbol. */
11697 if (h != NULL)
11698 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
11699 else
11700 {
11701 /* Track dynamic relocs needed for local syms too.
11702 We really need local syms available to do this
11703 easily. Oh well. */
11704 asection *s;
11705 void *vpp;
11706 Elf_Internal_Sym *isym;
11707
11708 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11709 abfd, r_symndx);
11710 if (isym == NULL)
11711 return FALSE;
11712
11713 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11714 if (s == NULL)
11715 s = sec;
11716
11717 vpp = &elf_section_data (s)->local_dynrel;
11718 head = (struct elf_dyn_relocs **) vpp;
11719 }
11720
11721 p = *head;
11722 if (p == NULL || p->sec != sec)
11723 {
11724 bfd_size_type amt = sizeof *p;
11725
11726 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
11727 if (p == NULL)
11728 return FALSE;
11729 p->next = *head;
11730 *head = p;
11731 p->sec = sec;
11732 p->count = 0;
11733 p->pc_count = 0;
11734 }
11735
11736 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
11737 p->pc_count += 1;
11738 p->count += 1;
11739 }
252b5132 11740 }
f21f3fe0 11741
b34976b6 11742 return TRUE;
252b5132
RH		 11743}
11744
6a5bb875
PB		 11745/* Unwinding tables are not referenced directly. This pass marks them as
11746 required if the corresponding code section is marked. */
11747
11748static bfd_boolean
906e58ca
NC		 11749elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11750 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11751{
11752 bfd *sub;
11753 Elf_Internal_Shdr **elf_shdrp;
11754 bfd_boolean again;
11755
11756 /* Marking EH data may cause additional code sections to be marked,
11757 requiring multiple passes. */
11758 again = TRUE;
11759 while (again)
11760 {
11761 again = FALSE;
11762 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11763 {
11764 asection *o;
11765
0ffa91dd 11766 if (! is_arm_elf (sub))
6a5bb875
PB		 11767 continue;
11768
11769 elf_shdrp = elf_elfsections (sub);
11770 for (o = sub->sections; o != NULL; o = o->next)
11771 {
11772 Elf_Internal_Shdr *hdr;
0ffa91dd 11773
6a5bb875 11774 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11775 if (hdr->sh_type == SHT_ARM_EXIDX
11776 && hdr->sh_link
11777 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11778 && !o->gc_mark
11779 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11780 {
11781 again = TRUE;
11782 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11783 return FALSE;
11784 }
11785 }
11786 }
11787 }
11788
11789 return TRUE;
11790}
11791
3c9458e9
NC		 11792/* Treat mapping symbols as special target symbols. */
11793
11794static bfd_boolean
11795elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11796{
b0796911
PB		 11797 return bfd_is_arm_special_symbol_name (sym->name,
11798 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11799}
11800
0367ecfb
NC		 11801/* This is a copy of elf_find_function() from elf.c except that
11802 ARM mapping symbols are ignored when looking for function names
11803 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11804
0367ecfb
NC		 11805static bfd_boolean
11806arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11807 asection * section,
11808 asymbol ** symbols,
11809 bfd_vma offset,
11810 const char ** filename_ptr,
11811 const char ** functionname_ptr)
11812{
11813 const char * filename = NULL;
11814 asymbol * func = NULL;
11815 bfd_vma low_func = 0;
11816 asymbol ** p;
252b5132
RH		 11817
11818 for (p = symbols; *p != NULL; p++)
11819 {
11820 elf_symbol_type *q;
11821
11822 q = (elf_symbol_type *) *p;
11823
252b5132
RH		 11824 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11825 {
11826 default:
11827 break;
11828 case STT_FILE:
11829 filename = bfd_asymbol_name (&q->symbol);
11830 break;
252b5132
RH		 11831 case STT_FUNC:
11832 case STT_ARM_TFUNC:
9d2da7ca 11833 case STT_NOTYPE:
b0796911 11834 /* Skip mapping symbols. */
0367ecfb 11835 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11836 && bfd_is_arm_special_symbol_name (q->symbol.name,
11837 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11838 continue;
11839 /* Fall through. */
6b40fcba 11840 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11841 && q->symbol.value >= low_func
11842 && q->symbol.value <= offset)
11843 {
11844 func = (asymbol *) q;
11845 low_func = q->symbol.value;
11846 }
11847 break;
11848 }
11849 }
11850
11851 if (func == NULL)
b34976b6 11852 return FALSE;
252b5132 11853
0367ecfb
NC		 11854 if (filename_ptr)
11855 *filename_ptr = filename;
11856 if (functionname_ptr)
11857 *functionname_ptr = bfd_asymbol_name (func);
11858
11859 return TRUE;
906e58ca 11860}
0367ecfb
NC		 11861
11862
11863/* Find the nearest line to a particular section and offset, for error
11864 reporting. This code is a duplicate of the code in elf.c, except
11865 that it uses arm_elf_find_function. */
11866
11867static bfd_boolean
11868elf32_arm_find_nearest_line (bfd * abfd,
11869 asection * section,
11870 asymbol ** symbols,
11871 bfd_vma offset,
11872 const char ** filename_ptr,
11873 const char ** functionname_ptr,
11874 unsigned int * line_ptr)
11875{
11876 bfd_boolean found = FALSE;
11877
11878 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11879
11880 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11881 filename_ptr, functionname_ptr,
11882 line_ptr, 0,
11883 & elf_tdata (abfd)->dwarf2_find_line_info))
11884 {
11885 if (!*functionname_ptr)
11886 arm_elf_find_function (abfd, section, symbols, offset,
11887 *filename_ptr ? NULL : filename_ptr,
11888 functionname_ptr);
f21f3fe0 11889
0367ecfb
NC		 11890 return TRUE;
11891 }
11892
11893 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11894 & found, filename_ptr,
11895 functionname_ptr, line_ptr,
11896 & elf_tdata (abfd)->line_info))
11897 return FALSE;
11898
11899 if (found && (*functionname_ptr || *line_ptr))
11900 return TRUE;
11901
11902 if (symbols == NULL)
11903 return FALSE;
11904
11905 if (! arm_elf_find_function (abfd, section, symbols, offset,
11906 filename_ptr, functionname_ptr))
11907 return FALSE;
11908
11909 *line_ptr = 0;
b34976b6 11910 return TRUE;
252b5132
RH		 11911}
11912
4ab527b0
FF		 11913static bfd_boolean
11914elf32_arm_find_inliner_info (bfd * abfd,
11915 const char ** filename_ptr,
11916 const char ** functionname_ptr,
11917 unsigned int * line_ptr)
11918{
11919 bfd_boolean found;
11920 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11921 functionname_ptr, line_ptr,
11922 & elf_tdata (abfd)->dwarf2_find_line_info);
11923 return found;
11924}
11925
252b5132
RH		 11926/* Adjust a symbol defined by a dynamic object and referenced by a
11927 regular object. The current definition is in some section of the
11928 dynamic object, but we're not including those sections. We have to
11929 change the definition to something the rest of the link can
11930 understand. */
11931
b34976b6 11932static bfd_boolean
57e8b36a
NC		 11933elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11934 struct elf_link_hash_entry * h)
252b5132
RH		 11935{
11936 bfd * dynobj;
11937 asection * s;
b7693d02 11938 struct elf32_arm_link_hash_entry * eh;
67687978 11939 struct elf32_arm_link_hash_table *globals;
252b5132 11940
67687978 11941 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11942 if (globals == NULL)
11943 return FALSE;
11944
252b5132
RH		 11945 dynobj = elf_hash_table (info)->dynobj;
11946
11947 /* Make sure we know what is going on here. */
11948 BFD_ASSERT (dynobj != NULL
f5385ebf 11949 && (h->needs_plt
f6e332e6 11950 || h->u.weakdef != NULL
f5385ebf
AM		 11951 || (h->def_dynamic
11952 && h->ref_regular
11953 && !h->def_regular)));
252b5132 11954
b7693d02
DJ		 11955 eh = (struct elf32_arm_link_hash_entry *) h;
11956
252b5132
RH		 11957 /* If this is a function, put it in the procedure linkage table. We
11958 will fill in the contents of the procedure linkage table later,
11959 when we know the address of the .got section. */
35fc36a8 11960 if (h->type == STT_FUNC || h->needs_plt)
252b5132 11961 {
5e681ec4
PB		 11962 if (h->plt.refcount <= 0
11963 || SYMBOL_CALLS_LOCAL (info, h)
11964 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11965 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11966 {
11967 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11968 file, but the symbol was never referred to by a dynamic
11969 object, or if all references were garbage collected. In
11970 such a case, we don't actually need to build a procedure
11971 linkage table, and we can just do a PC24 reloc instead. */
11972 h->plt.offset = (bfd_vma) -1;
b7693d02 11973 eh->plt_thumb_refcount = 0;
bd97cb95 11974 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11975 h->needs_plt = 0;
252b5132
RH		 11976 }
11977
b34976b6 11978 return TRUE;
252b5132 11979 }
5e681ec4 11980 else
b7693d02
DJ		 11981 {
11982 /* It's possible that we incorrectly decided a .plt reloc was
11983 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11984 in check_relocs. We can't decide accurately between function
11985 and non-function syms in check-relocs; Objects loaded later in
11986 the link may change h->type. So fix it now. */
11987 h->plt.offset = (bfd_vma) -1;
11988 eh->plt_thumb_refcount = 0;
bd97cb95 11989 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11990 }
252b5132
RH		 11991
11992 /* If this is a weak symbol, and there is a real definition, the
11993 processor independent code will have arranged for us to see the
11994 real definition first, and we can just use the same value. */
f6e332e6 11995 if (h->u.weakdef != NULL)
252b5132 11996 {
f6e332e6
AM		 11997 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11998 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11999 h->root.u.def.section = h->u.weakdef->root.u.def.section;
12000 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 12001 return TRUE;
252b5132
RH		 12002 }
12003
ba93b8ac
DJ		 12004 /* If there are no non-GOT references, we do not need a copy
12005 relocation. */
12006 if (!h->non_got_ref)
12007 return TRUE;
12008
252b5132
RH		 12009 /* This is a reference to a symbol defined by a dynamic object which
12010 is not a function. */
12011
12012 /* If we are creating a shared library, we must presume that the
12013 only references to the symbol are via the global offset table.
12014 For such cases we need not do anything here; the relocations will
67687978
PB		 12015 be handled correctly by relocate_section. Relocatable executables
12016 can reference data in shared objects directly, so we don't need to
12017 do anything here. */
12018 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 12019 return TRUE;
252b5132 12020
909272ee
AM		 12021 if (h->size == 0)
12022 {
12023 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
12024 h->root.root.string);
12025 return TRUE;
12026 }
12027
252b5132
RH		 12028 /* We must allocate the symbol in our .dynbss section, which will
12029 become part of the .bss section of the executable. There will be
12030 an entry for this symbol in the .dynsym section. The dynamic
12031 object will contain position independent code, so all references
12032 from the dynamic object to this symbol will go through the global
12033 offset table. The dynamic linker will use the .dynsym entry to
12034 determine the address it must put in the global offset table, so
12035 both the dynamic object and the regular object will refer to the
12036 same memory location for the variable. */
252b5132
RH		 12037 s = bfd_get_section_by_name (dynobj, ".dynbss");
12038 BFD_ASSERT (s != NULL);
12039
12040 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
12041 copy the initial value out of the dynamic object and into the
12042 runtime process image. We need to remember the offset into the
00a97672 12043 .rel(a).bss section we are going to use. */
252b5132
RH		 12044 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
12045 {
12046 asection *srel;
12047
00a97672 12048 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 12049 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 12050 h->needs_copy = 1;
252b5132
RH		 12051 }
12052
027297b7 12053 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 12054}
12055
5e681ec4
PB		 12056/* Allocate space in .plt, .got and associated reloc sections for
12057 dynamic relocs. */
12058
12059static bfd_boolean
47beaa6a 12060allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 12061{
12062 struct bfd_link_info *info;
12063 struct elf32_arm_link_hash_table *htab;
12064 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 12065 struct elf_dyn_relocs *p;
bd97cb95 12066 bfd_signed_vma thumb_refs;
5e681ec4
PB		 12067
12068 if (h->root.type == bfd_link_hash_indirect)
12069 return TRUE;
12070
12071 if (h->root.type == bfd_link_hash_warning)
12072 /* When warning symbols are created, they **replace** the "real"
12073 entry in the hash table, thus we never get to see the real
12074 symbol in a hash traversal. So look at it now. */
12075 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12076
e6a6bb22
AM		 12077 eh = (struct elf32_arm_link_hash_entry *) h;
12078
5e681ec4
PB		 12079 info = (struct bfd_link_info *) inf;
12080 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12081 if (htab == NULL)
12082 return FALSE;
5e681ec4
PB		 12083
12084 if (htab->root.dynamic_sections_created
12085 && h->plt.refcount > 0)
12086 {
12087 /* Make sure this symbol is output as a dynamic symbol.
12088 Undefined weak syms won't yet be marked as dynamic. */
12089 if (h->dynindx == -1
f5385ebf 12090 && !h->forced_local)
5e681ec4 12091 {
c152c796 12092 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12093 return FALSE;
12094 }
12095
12096 if (info->shared
7359ea65 12097 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 12098 {
362d30a1 12099 asection *s = htab->root.splt;
5e681ec4
PB		 12100
12101 /* If this is the first .plt entry, make room for the special
12102 first entry. */
eea6121a 12103 if (s->size == 0)
e5a52504 12104 s->size += htab->plt_header_size;
5e681ec4 12105
eea6121a 12106 h->plt.offset = s->size;
5e681ec4 12107
b7693d02
DJ		 12108 /* If we will insert a Thumb trampoline before this PLT, leave room
12109 for it. */
bd97cb95
DJ		 12110 thumb_refs = eh->plt_thumb_refcount;
12111 if (!htab->use_blx)
12112 thumb_refs += eh->plt_maybe_thumb_refcount;
12113
12114 if (thumb_refs > 0)
b7693d02
DJ		 12115 {
12116 h->plt.offset += PLT_THUMB_STUB_SIZE;
12117 s->size += PLT_THUMB_STUB_SIZE;
12118 }
12119
5e681ec4
PB		 12120 /* If this symbol is not defined in a regular file, and we are
12121 not generating a shared library, then set the symbol to this
12122 location in the .plt. This is required to make function
12123 pointers compare as equal between the normal executable and
12124 the shared library. */
12125 if (! info->shared
f5385ebf 12126 && !h->def_regular)
5e681ec4
PB		 12127 {
12128 h->root.u.def.section = s;
12129 h->root.u.def.value = h->plt.offset;
5e681ec4 12130
67d74e43
DJ		 12131 /* Make sure the function is not marked as Thumb, in case
12132 it is the target of an ABS32 relocation, which will
12133 point to the PLT entry. */
35fc36a8 12134 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 12135 }
022f8312 12136
5e681ec4 12137 /* Make room for this entry. */
e5a52504 12138 s->size += htab->plt_entry_size;
5e681ec4 12139
e5a52504 12140 if (!htab->symbian_p)
b7693d02
DJ		 12141 {
12142 /* We also need to make an entry in the .got.plt section, which
12143 will be placed in the .got section by the linker script. */
0855e32b
NS		 12144 eh->plt_got_offset = (htab->root.sgotplt->size
12145 - 8 * htab->num_tls_desc);
362d30a1 12146 htab->root.sgotplt->size += 4;
b7693d02 12147 }
5e681ec4 12148
00a97672 12149 /* We also need to make an entry in the .rel(a).plt section. */
47beaa6a 12150 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b 12151 htab->next_tls_desc_index++;
00a97672
RS		 12152
12153 /* VxWorks executables have a second set of relocations for
12154 each PLT entry. They go in a separate relocation section,
12155 which is processed by the kernel loader. */
12156 if (htab->vxworks_p && !info->shared)
12157 {
12158 /* There is a relocation for the initial PLT entry:
12159 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
12160 if (h->plt.offset == htab->plt_header_size)
47beaa6a 12161 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 12162
12163 /* There are two extra relocations for each subsequent
12164 PLT entry: an R_ARM_32 relocation for the GOT entry,
12165 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 12166 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 12167 }
5e681ec4
PB		 12168 }
12169 else
12170 {
12171 h->plt.offset = (bfd_vma) -1;
f5385ebf 12172 h->needs_plt = 0;
5e681ec4
PB		 12173 }
12174 }
12175 else
12176 {
12177 h->plt.offset = (bfd_vma) -1;
f5385ebf 12178 h->needs_plt = 0;
5e681ec4
PB		 12179 }
12180
0855e32b
NS		 12181 eh = (struct elf32_arm_link_hash_entry *) h;
12182 eh->tlsdesc_got = (bfd_vma) -1;
12183
5e681ec4
PB		 12184 if (h->got.refcount > 0)
12185 {
12186 asection *s;
12187 bfd_boolean dyn;
ba93b8ac
DJ		 12188 int tls_type = elf32_arm_hash_entry (h)->tls_type;
12189 int indx;
5e681ec4
PB		 12190
12191 /* Make sure this symbol is output as a dynamic symbol.
12192 Undefined weak syms won't yet be marked as dynamic. */
12193 if (h->dynindx == -1
f5385ebf 12194 && !h->forced_local)
5e681ec4 12195 {
c152c796 12196 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12197 return FALSE;
12198 }
12199
e5a52504
MM		 12200 if (!htab->symbian_p)
12201 {
362d30a1 12202 s = htab->root.sgot;
e5a52504 12203 h->got.offset = s->size;
ba93b8ac
DJ		 12204
12205 if (tls_type == GOT_UNKNOWN)
12206 abort ();
12207
12208 if (tls_type == GOT_NORMAL)
12209 /* Non-TLS symbols need one GOT slot. */
12210 s->size += 4;
12211 else
12212 {
0855e32b
NS		 12213 if (tls_type & GOT_TLS_GDESC)
12214 {
12215 /* R_ARM_TLS_DESC needs 2 GOT slots. */
12216 eh->tlsdesc_got
12217 = (htab->root.sgotplt->size
12218 - elf32_arm_compute_jump_table_size (htab));
12219 htab->root.sgotplt->size += 8;
12220 h->got.offset = (bfd_vma) -2;
12221 /* plt_got_offset needs to know there's a TLS_DESC
12222 reloc in the middle of .got.plt. */
12223 htab->num_tls_desc++;
12224 }
12225
ba93b8ac 12226 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 12227 {
12228 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
12229 the symbol is both GD and GDESC, got.offset may
12230 have been overwritten. */
12231 h->got.offset = s->size;
12232 s->size += 8;
12233 }
12234
ba93b8ac
DJ		 12235 if (tls_type & GOT_TLS_IE)
12236 /* R_ARM_TLS_IE32 needs one GOT slot. */
12237 s->size += 4;
12238 }
12239
e5a52504 12240 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 12241
12242 indx = 0;
12243 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
12244 && (!info->shared
12245 || !SYMBOL_REFERENCES_LOCAL (info, h)))
12246 indx = h->dynindx;
12247
12248 if (tls_type != GOT_NORMAL
12249 && (info->shared || indx != 0)
12250 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
12251 || h->root.type != bfd_link_hash_undefweak))
12252 {
12253 if (tls_type & GOT_TLS_IE)
47beaa6a 12254 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 12255
12256 if (tls_type & GOT_TLS_GD)
47beaa6a 12257 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 12258
0855e32b
NS		 12259 if (tls_type & GOT_TLS_GDESC)
12260 {
47beaa6a 12261 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 12262 /* GDESC needs a trampoline to jump to. */
12263 htab->tls_trampoline = -1;
12264 }
12265
12266 /* Only GD needs it. GDESC just emits one relocation per
12267 2 entries. */
12268 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 12269 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 12270 }
b436d854
RS		 12271 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
12272 {
12273 if (htab->root.dynamic_sections_created)
12274 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
12275 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
12276 }
12277 else if (info->shared)
12278 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 12279 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 12280 }
5e681ec4
PB		 12281 }
12282 else
12283 h->got.offset = (bfd_vma) -1;
12284
a4fd1a8e
PB		 12285 /* Allocate stubs for exported Thumb functions on v4t. */
12286 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 12287 && h->def_regular
35fc36a8 12288 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 12289 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
12290 {
12291 struct elf_link_hash_entry * th;
12292 struct bfd_link_hash_entry * bh;
12293 struct elf_link_hash_entry * myh;
12294 char name[1024];
12295 asection *s;
12296 bh = NULL;
12297 /* Create a new symbol to regist the real location of the function. */
12298 s = h->root.u.def.section;
906e58ca 12299 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 12300 _bfd_generic_link_add_one_symbol (info, s->owner,
12301 name, BSF_GLOBAL, s,
12302 h->root.u.def.value,
12303 NULL, TRUE, FALSE, &bh);
12304
12305 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 12306 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 12307 myh->forced_local = 1;
35fc36a8 12308 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 12309 eh->export_glue = myh;
12310 th = record_arm_to_thumb_glue (info, h);
12311 /* Point the symbol at the stub. */
12312 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 12313 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 12314 h->root.u.def.section = th->root.u.def.section;
12315 h->root.u.def.value = th->root.u.def.value & ~1;
12316 }
12317
0bdcacaf 12318 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 12319 return TRUE;
12320
12321 /* In the shared -Bsymbolic case, discard space allocated for
12322 dynamic pc-relative relocs against symbols which turn out to be
12323 defined in regular objects. For the normal shared case, discard
12324 space for pc-relative relocs that have become local due to symbol
12325 visibility changes. */
12326
67687978 12327 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 12328 {
7bdca076 12329 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 12330 R_ARM_REL32_NOI, which will appear on something like
12331 ".long foo - .". We want calls to protected symbols to resolve
12332 directly to the function rather than going via the plt. If people
12333 want function pointer comparisons to work as expected then they
12334 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 12335 if (SYMBOL_CALLS_LOCAL (info, h))
12336 {
0bdcacaf 12337 struct elf_dyn_relocs **pp;
ba93b8ac 12338
0bdcacaf 12339 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 12340 {
12341 p->count -= p->pc_count;
12342 p->pc_count = 0;
12343 if (p->count == 0)
12344 *pp = p->next;
12345 else
12346 pp = &p->next;
12347 }
12348 }
12349
4dfe6ac6 12350 if (htab->vxworks_p)
3348747a 12351 {
0bdcacaf 12352 struct elf_dyn_relocs **pp;
3348747a 12353
0bdcacaf 12354 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 12355 {
0bdcacaf 12356 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 12357 *pp = p->next;
12358 else
12359 pp = &p->next;
12360 }
12361 }
12362
ba93b8ac 12363 /* Also discard relocs on undefined weak syms with non-default
7359ea65 12364 visibility. */
0bdcacaf 12365 if (eh->dyn_relocs != NULL
5e681ec4 12366 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 12367 {
12368 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 12369 eh->dyn_relocs = NULL;
22d606e9
AM		 12370
12371 /* Make sure undefined weak symbols are output as a dynamic
12372 symbol in PIEs. */
12373 else if (h->dynindx == -1
12374 && !h->forced_local)
12375 {
12376 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12377 return FALSE;
12378 }
12379 }
12380
67687978
PB		 12381 else if (htab->root.is_relocatable_executable && h->dynindx == -1
12382 && h->root.type == bfd_link_hash_new)
12383 {
12384 /* Output absolute symbols so that we can create relocations
12385 against them. For normal symbols we output a relocation
12386 against the section that contains them. */
12387 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12388 return FALSE;
12389 }
12390
5e681ec4
PB		 12391 }
12392 else
12393 {
12394 /* For the non-shared case, discard space for relocs against
12395 symbols which turn out to need copy relocs or are not
12396 dynamic. */
12397
f5385ebf
AM		 12398 if (!h->non_got_ref
12399 && ((h->def_dynamic
12400 && !h->def_regular)
5e681ec4
PB		 12401 || (htab->root.dynamic_sections_created
12402 && (h->root.type == bfd_link_hash_undefweak
12403 || h->root.type == bfd_link_hash_undefined))))
12404 {
12405 /* Make sure this symbol is output as a dynamic symbol.
12406 Undefined weak syms won't yet be marked as dynamic. */
12407 if (h->dynindx == -1
f5385ebf 12408 && !h->forced_local)
5e681ec4 12409 {
c152c796 12410 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12411 return FALSE;
12412 }
12413
12414 /* If that succeeded, we know we'll be keeping all the
12415 relocs. */
12416 if (h->dynindx != -1)
12417 goto keep;
12418 }
12419
0bdcacaf 12420 eh->dyn_relocs = NULL;
5e681ec4
PB		 12421
12422 keep: ;
12423 }
12424
12425 /* Finally, allocate space. */
0bdcacaf 12426 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 12427 {
0bdcacaf 12428 asection *sreloc = elf_section_data (p->sec)->sreloc;
47beaa6a 12429 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 12430 }
12431
12432 return TRUE;
12433}
12434
08d1f311
DJ		 12435/* Find any dynamic relocs that apply to read-only sections. */
12436
12437static bfd_boolean
8029a119 12438elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 12439{
8029a119 12440 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 12441 struct elf_dyn_relocs * p;
08d1f311
DJ		 12442
12443 if (h->root.type == bfd_link_hash_warning)
12444 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12445
12446 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 12447 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 12448 {
0bdcacaf 12449 asection *s = p->sec;
08d1f311
DJ		 12450
12451 if (s != NULL && (s->flags & SEC_READONLY) != 0)
12452 {
12453 struct bfd_link_info *info = (struct bfd_link_info *) inf;
12454
12455 info->flags |= DF_TEXTREL;
12456
12457 /* Not an error, just cut short the traversal. */
12458 return FALSE;
12459 }
12460 }
12461 return TRUE;
12462}
12463
d504ffc8
DJ		 12464void
12465bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
12466 int byteswap_code)
12467{
12468 struct elf32_arm_link_hash_table *globals;
12469
12470 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12471 if (globals == NULL)
12472 return;
12473
d504ffc8
DJ		 12474 globals->byteswap_code = byteswap_code;
12475}
12476
252b5132
RH		 12477/* Set the sizes of the dynamic sections. */
12478
b34976b6 12479static bfd_boolean
57e8b36a
NC		 12480elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
12481 struct bfd_link_info * info)
252b5132
RH		 12482{
12483 bfd * dynobj;
12484 asection * s;
b34976b6
AM		 12485 bfd_boolean plt;
12486 bfd_boolean relocs;
5e681ec4
PB		 12487 bfd *ibfd;
12488 struct elf32_arm_link_hash_table *htab;
252b5132 12489
5e681ec4 12490 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12491 if (htab == NULL)
12492 return FALSE;
12493
252b5132
RH		 12494 dynobj = elf_hash_table (info)->dynobj;
12495 BFD_ASSERT (dynobj != NULL);
39b41c9c 12496 check_use_blx (htab);
252b5132
RH		 12497
12498 if (elf_hash_table (info)->dynamic_sections_created)
12499 {
12500 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 12501 if (info->executable)
252b5132
RH		 12502 {
12503 s = bfd_get_section_by_name (dynobj, ".interp");
12504 BFD_ASSERT (s != NULL);
eea6121a 12505 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 12506 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
12507 }
12508 }
5e681ec4
PB		 12509
12510 /* Set up .got offsets for local syms, and space for local dynamic
12511 relocs. */
12512 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 12513 {
5e681ec4
PB		 12514 bfd_signed_vma *local_got;
12515 bfd_signed_vma *end_local_got;
12516 char *local_tls_type;
0855e32b 12517 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 12518 bfd_size_type locsymcount;
12519 Elf_Internal_Shdr *symtab_hdr;
12520 asection *srel;
4dfe6ac6 12521 bfd_boolean is_vxworks = htab->vxworks_p;
5e681ec4 12522
0ffa91dd 12523 if (! is_arm_elf (ibfd))
5e681ec4
PB		 12524 continue;
12525
12526 for (s = ibfd->sections; s != NULL; s = s->next)
12527 {
0bdcacaf 12528 struct elf_dyn_relocs *p;
5e681ec4 12529
0bdcacaf 12530 for (p = (struct elf_dyn_relocs *)
21d799b5 12531 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 12532 {
0bdcacaf
RS		 12533 if (!bfd_is_abs_section (p->sec)
12534 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 12535 {
12536 /* Input section has been discarded, either because
12537 it is a copy of a linkonce section or due to
12538 linker script /DISCARD/, so we'll be discarding
12539 the relocs too. */
12540 }
3348747a 12541 else if (is_vxworks
0bdcacaf 12542 && strcmp (p->sec->output_section->name,
3348747a
NS		 12543 ".tls_vars") == 0)
12544 {
12545 /* Relocations in vxworks .tls_vars sections are
12546 handled specially by the loader. */
12547 }
5e681ec4
PB		 12548 else if (p->count != 0)
12549 {
0bdcacaf 12550 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 12551 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 12552 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 12553 info->flags |= DF_TEXTREL;
12554 }
12555 }
12556 }
12557
12558 local_got = elf_local_got_refcounts (ibfd);
12559 if (!local_got)
12560 continue;
12561
0ffa91dd 12562 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 12563 locsymcount = symtab_hdr->sh_info;
12564 end_local_got = local_got + locsymcount;
ba93b8ac 12565 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 12566 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
362d30a1
RS		 12567 s = htab->root.sgot;
12568 srel = htab->root.srelgot;
0855e32b
NS		 12569 for (; local_got < end_local_got;
12570 ++local_got, ++local_tls_type, ++local_tlsdesc_gotent)
5e681ec4 12571 {
0855e32b 12572 *local_tlsdesc_gotent = (bfd_vma) -1;
5e681ec4
PB		 12573 if (*local_got > 0)
12574 {
eea6121a 12575 *local_got = s->size;
ba93b8ac
DJ		 12576 if (*local_tls_type & GOT_TLS_GD)
12577 /* TLS_GD relocs need an 8-byte structure in the GOT. */
12578 s->size += 8;
0855e32b
NS		 12579 if (*local_tls_type & GOT_TLS_GDESC)
12580 {
12581 *local_tlsdesc_gotent = htab->root.sgotplt->size
12582 - elf32_arm_compute_jump_table_size (htab);
12583 htab->root.sgotplt->size += 8;
12584 *local_got = (bfd_vma) -2;
12585 /* plt_got_offset needs to know there's a TLS_DESC
12586 reloc in the middle of .got.plt. */
12587 htab->num_tls_desc++;
12588 }
ba93b8ac
DJ		 12589 if (*local_tls_type & GOT_TLS_IE)
12590 s->size += 4;
ba93b8ac 12591
0855e32b
NS		 12592 if (*local_tls_type & GOT_NORMAL)
12593 {
12594 /* If the symbol is both GD and GDESC, *local_got
12595 may have been overwritten. */
12596 *local_got = s->size;
12597 s->size += 4;
12598 }
12599
12600 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
12601 || *local_tls_type & GOT_TLS_GD)
47beaa6a 12602 elf32_arm_allocate_dynrelocs (info, srel, 1);
0855e32b
NS		 12603
12604 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
12605 {
47beaa6a 12606 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 12607 htab->tls_trampoline = -1;
12608 }
5e681ec4
PB		 12609 }
12610 else
12611 *local_got = (bfd_vma) -1;
12612 }
252b5132
RH		 12613 }
12614
ba93b8ac
DJ		 12615 if (htab->tls_ldm_got.refcount > 0)
12616 {
12617 /* Allocate two GOT entries and one dynamic relocation (if necessary)
12618 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 12619 htab->tls_ldm_got.offset = htab->root.sgot->size;
12620 htab->root.sgot->size += 8;
ba93b8ac 12621 if (info->shared)
47beaa6a 12622 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 12623 }
12624 else
12625 htab->tls_ldm_got.offset = -1;
12626
5e681ec4
PB		 12627 /* Allocate global sym .plt and .got entries, and space for global
12628 sym dynamic relocs. */
47beaa6a 12629 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 12630
d504ffc8
DJ		 12631 /* Here we rummage through the found bfds to collect glue information. */
12632 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 12633 {
0ffa91dd 12634 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 12635 continue;
12636
c7b8f16e
JB		 12637 /* Initialise mapping tables for code/data. */
12638 bfd_elf32_arm_init_maps (ibfd);
906e58ca 12639
c7b8f16e
JB		 12640 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
12641 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
12642 /* xgettext:c-format */
12643 _bfd_error_handler (_("Errors encountered processing file %s"),
12644 ibfd->filename);
12645 }
d504ffc8 12646
3e6b1042
DJ		 12647 /* Allocate space for the glue sections now that we've sized them. */
12648 bfd_elf32_arm_allocate_interworking_sections (info);
12649
0855e32b
NS		 12650 /* For every jump slot reserved in the sgotplt, reloc_count is
12651 incremented. However, when we reserve space for TLS descriptors,
12652 it's not incremented, so in order to compute the space reserved
12653 for them, it suffices to multiply the reloc count by the jump
12654 slot size. */
12655 if (htab->root.srelplt)
12656 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
12657
12658 if (htab->tls_trampoline)
12659 {
12660 if (htab->root.splt->size == 0)
12661 htab->root.splt->size += htab->plt_header_size;
12662
12663 htab->tls_trampoline = htab->root.splt->size;
12664 htab->root.splt->size += htab->plt_entry_size;
12665
12666 /* If we're not using lazy TLS relocations, don't generate the
12667 PLT and GOT entries they require. */
12668 if (!(info->flags & DF_BIND_NOW))
12669 {
12670 htab->dt_tlsdesc_got = htab->root.sgot->size;
12671 htab->root.sgot->size += 4;
12672
12673 htab->dt_tlsdesc_plt = htab->root.splt->size;
12674 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
12675 }
12676 }
12677
252b5132
RH		 12678 /* The check_relocs and adjust_dynamic_symbol entry points have
12679 determined the sizes of the various dynamic sections. Allocate
12680 memory for them. */
b34976b6
AM		 12681 plt = FALSE;
12682 relocs = FALSE;
252b5132
RH		 12683 for (s = dynobj->sections; s != NULL; s = s->next)
12684 {
12685 const char * name;
252b5132
RH		 12686
12687 if ((s->flags & SEC_LINKER_CREATED) == 0)
12688 continue;
12689
12690 /* It's OK to base decisions on the section name, because none
12691 of the dynobj section names depend upon the input files. */
12692 name = bfd_get_section_name (dynobj, s);
12693
24a1ba0f 12694 if (strcmp (name, ".plt") == 0)
252b5132 12695 {
c456f082
AM		 12696 /* Remember whether there is a PLT. */
12697 plt = s->size != 0;
252b5132 12698 }
0112cd26 12699 else if (CONST_STRNEQ (name, ".rel"))
252b5132 12700 {
c456f082 12701 if (s->size != 0)
252b5132 12702 {
252b5132 12703 /* Remember whether there are any reloc sections other
00a97672 12704 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 12705 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 12706 relocs = TRUE;
252b5132
RH		 12707
12708 /* We use the reloc_count field as a counter if we need
12709 to copy relocs into the output file. */
12710 s->reloc_count = 0;
12711 }
12712 }
0112cd26 12713 else if (! CONST_STRNEQ (name, ".got")
c456f082 12714 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 12715 {
12716 /* It's not one of our sections, so don't allocate space. */
12717 continue;
12718 }
12719
c456f082 12720 if (s->size == 0)
252b5132 12721 {
c456f082 12722 /* If we don't need this section, strip it from the
00a97672
RS		 12723 output file. This is mostly to handle .rel(a).bss and
12724 .rel(a).plt. We must create both sections in
c456f082
AM		 12725 create_dynamic_sections, because they must be created
12726 before the linker maps input sections to output
12727 sections. The linker does that before
12728 adjust_dynamic_symbol is called, and it is that
12729 function which decides whether anything needs to go
12730 into these sections. */
8423293d 12731 s->flags |= SEC_EXCLUDE;
252b5132
RH		 12732 continue;
12733 }
12734
c456f082
AM		 12735 if ((s->flags & SEC_HAS_CONTENTS) == 0)
12736 continue;
12737
252b5132 12738 /* Allocate memory for the section contents. */
21d799b5 12739 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 12740 if (s->contents == NULL)
b34976b6 12741 return FALSE;
252b5132
RH		 12742 }
12743
12744 if (elf_hash_table (info)->dynamic_sections_created)
12745 {
12746 /* Add some entries to the .dynamic section. We fill in the
12747 values later, in elf32_arm_finish_dynamic_sections, but we
12748 must add the entries now so that we get the correct size for
12749 the .dynamic section. The DT_DEBUG entry is filled in by the
12750 dynamic linker and used by the debugger. */
dc810e39 12751#define add_dynamic_entry(TAG, VAL) \
5a580b3a 12752 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 12753
8532796c 12754 if (info->executable)
252b5132 12755 {
dc810e39 12756 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 12757 return FALSE;
252b5132
RH		 12758 }
12759
12760 if (plt)
12761 {
dc810e39
AM		 12762 if ( !add_dynamic_entry (DT_PLTGOT, 0)
12763 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 12764 || !add_dynamic_entry (DT_PLTREL,
12765 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 12766 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 12767 return FALSE;
0855e32b
NS		 12768
12769 if (htab->dt_tlsdesc_plt &&
12770 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
12771 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
12772 return FALSE;
252b5132
RH		 12773 }
12774
12775 if (relocs)
12776 {
00a97672
RS		 12777 if (htab->use_rel)
12778 {
12779 if (!add_dynamic_entry (DT_REL, 0)
12780 || !add_dynamic_entry (DT_RELSZ, 0)
12781 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
12782 return FALSE;
12783 }
12784 else
12785 {
12786 if (!add_dynamic_entry (DT_RELA, 0)
12787 || !add_dynamic_entry (DT_RELASZ, 0)
12788 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12789 return FALSE;
12790 }
252b5132
RH		 12791 }
12792
08d1f311
DJ		 12793 /* If any dynamic relocs apply to a read-only section,
12794 then we need a DT_TEXTREL entry. */
12795 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 12796 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12797 info);
08d1f311 12798
99e4ae17 12799 if ((info->flags & DF_TEXTREL) != 0)
252b5132 12800 {
dc810e39 12801 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 12802 return FALSE;
252b5132 12803 }
7a2b07ff
NS		 12804 if (htab->vxworks_p
12805 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12806 return FALSE;
252b5132 12807 }
8532796c 12808#undef add_dynamic_entry
252b5132 12809
b34976b6 12810 return TRUE;
252b5132
RH		 12811}
12812
0855e32b
NS		 12813/* Size sections even though they're not dynamic. We use it to setup
12814 _TLS_MODULE_BASE_, if needed. */
12815
12816static bfd_boolean
12817elf32_arm_always_size_sections (bfd *output_bfd,
12818 struct bfd_link_info *info)
12819{
12820 asection *tls_sec;
12821
12822 if (info->relocatable)
12823 return TRUE;
12824
12825 tls_sec = elf_hash_table (info)->tls_sec;
12826
12827 if (tls_sec)
12828 {
12829 struct elf_link_hash_entry *tlsbase;
12830
12831 tlsbase = elf_link_hash_lookup
12832 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
12833
12834 if (tlsbase)
12835 {
12836 struct bfd_link_hash_entry *bh = NULL;
12837 const struct elf_backend_data *bed
12838 = get_elf_backend_data (output_bfd);
12839
12840 if (!(_bfd_generic_link_add_one_symbol
12841 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
12842 tls_sec, 0, NULL, FALSE,
12843 bed->collect, &bh)))
12844 return FALSE;
12845
12846 tlsbase->type = STT_TLS;
12847 tlsbase = (struct elf_link_hash_entry *)bh;
12848 tlsbase->def_regular = 1;
12849 tlsbase->other = STV_HIDDEN;
12850 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
12851 }
12852 }
12853 return TRUE;
12854}
12855
252b5132
RH		 12856/* Finish up dynamic symbol handling. We set the contents of various
12857 dynamic sections here. */
12858
b34976b6 12859static bfd_boolean
906e58ca
NC		 12860elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12861 struct bfd_link_info * info,
12862 struct elf_link_hash_entry * h,
12863 Elf_Internal_Sym * sym)
252b5132 12864{
e5a52504 12865 struct elf32_arm_link_hash_table *htab;
b7693d02 12866 struct elf32_arm_link_hash_entry *eh;
252b5132 12867
e5a52504 12868 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12869 if (htab == NULL)
12870 return FALSE;
12871
b7693d02 12872 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 12873
12874 if (h->plt.offset != (bfd_vma) -1)
12875 {
12876 asection * splt;
252b5132 12877 asection * srel;
e5a52504 12878 bfd_byte *loc;
24a1ba0f 12879 bfd_vma plt_index;
947216bf 12880 Elf_Internal_Rela rel;
252b5132
RH		 12881
12882 /* This symbol has an entry in the procedure linkage table. Set
12883 it up. */
12884
12885 BFD_ASSERT (h->dynindx != -1);
12886
362d30a1
RS		 12887 splt = htab->root.splt;
12888 srel = htab->root.srelplt;
e5a52504 12889 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 12890
e5a52504
MM		 12891 /* Fill in the entry in the procedure linkage table. */
12892 if (htab->symbian_p)
12893 {
906e58ca 12894 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12895 elf32_arm_symbian_plt_entry[0],
12896 splt->contents + h->plt.offset);
906e58ca 12897 bfd_put_32 (output_bfd,
52ab56c2
PB		 12898 elf32_arm_symbian_plt_entry[1],
12899 splt->contents + h->plt.offset + 4);
906e58ca 12900
e5a52504 12901 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12902 rel.r_offset = (splt->output_section->vma
12903 + splt->output_offset
52ab56c2 12904 + h->plt.offset + 4);
e5a52504 12905 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12906
12907 /* Get the index in the procedure linkage table which
12908 corresponds to this symbol. This is the index of this symbol
12909 in all the symbols for which we are making plt entries. The
12910 first entry in the procedure linkage table is reserved. */
906e58ca 12911 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12912 / htab->plt_entry_size);
e5a52504
MM		 12913 }
12914 else
12915 {
00a97672 12916 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12917 bfd_vma got_displacement;
12918 asection * sgot;
52ab56c2 12919 bfd_byte * ptr;
906e58ca 12920
362d30a1 12921 sgot = htab->root.sgotplt;
e5a52504
MM		 12922 BFD_ASSERT (sgot != NULL);
12923
b7693d02
DJ		 12924 /* Get the offset into the .got.plt table of the entry that
12925 corresponds to this function. */
12926 got_offset = eh->plt_got_offset;
12927
12928 /* Get the index in the procedure linkage table which
12929 corresponds to this symbol. This is the index of this symbol
12930 in all the symbols for which we are making plt entries. The
12931 first three entries in .got.plt are reserved; after that
12932 symbols appear in the same order as in .plt. */
12933 plt_index = (got_offset - 12) / 4;
e5a52504 12934
00a97672
RS		 12935 /* Calculate the address of the GOT entry. */
12936 got_address = (sgot->output_section->vma
12937 + sgot->output_offset
12938 + got_offset);
5e681ec4 12939
00a97672
RS		 12940 /* ...and the address of the PLT entry. */
12941 plt_address = (splt->output_section->vma
12942 + splt->output_offset
12943 + h->plt.offset);
5e681ec4 12944
362d30a1 12945 ptr = splt->contents + h->plt.offset;
00a97672
RS		 12946 if (htab->vxworks_p && info->shared)
12947 {
12948 unsigned int i;
12949 bfd_vma val;
12950
52ab56c2 12951 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12952 {
12953 val = elf32_arm_vxworks_shared_plt_entry[i];
12954 if (i == 2)
12955 val |= got_address - sgot->output_section->vma;
12956 if (i == 5)
12957 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12958 if (i == 2 || i == 5)
12959 bfd_put_32 (output_bfd, val, ptr);
12960 else
12961 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12962 }
12963 }
12964 else if (htab->vxworks_p)
b7693d02 12965 {
00a97672
RS		 12966 unsigned int i;
12967 bfd_vma val;
12968
d3753b85 12969 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12970 {
12971 val = elf32_arm_vxworks_exec_plt_entry[i];
12972 if (i == 2)
12973 val |= got_address;
12974 if (i == 4)
12975 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12976 if (i == 5)
12977 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12978 if (i == 2 || i == 5)
12979 bfd_put_32 (output_bfd, val, ptr);
12980 else
12981 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12982 }
12983
12984 loc = (htab->srelplt2->contents
12985 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12986
12987 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12988 referencing the GOT for this PLT entry. */
12989 rel.r_offset = plt_address + 8;
12990 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12991 rel.r_addend = got_offset;
12992 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12993 loc += RELOC_SIZE (htab);
12994
12995 /* Create the R_ARM_ABS32 relocation referencing the
12996 beginning of the PLT for this GOT entry. */
12997 rel.r_offset = got_address;
12998 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12999 rel.r_addend = 0;
13000 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 13001 }
00a97672
RS		 13002 else
13003 {
bd97cb95 13004 bfd_signed_vma thumb_refs;
00a97672
RS		 13005 /* Calculate the displacement between the PLT slot and the
13006 entry in the GOT. The eight-byte offset accounts for the
13007 value produced by adding to pc in the first instruction
13008 of the PLT stub. */
13009 got_displacement = got_address - (plt_address + 8);
b7693d02 13010
00a97672
RS		 13011 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
13012
bd97cb95
DJ		 13013 thumb_refs = eh->plt_thumb_refcount;
13014 if (!htab->use_blx)
13015 thumb_refs += eh->plt_maybe_thumb_refcount;
13016
13017 if (thumb_refs > 0)
00a97672 13018 {
52ab56c2
PB		 13019 put_thumb_insn (htab, output_bfd,
13020 elf32_arm_plt_thumb_stub[0], ptr - 4);
13021 put_thumb_insn (htab, output_bfd,
13022 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 13023 }
13024
52ab56c2
PB		 13025 put_arm_insn (htab, output_bfd,
13026 elf32_arm_plt_entry[0]
13027 | ((got_displacement & 0x0ff00000) >> 20),
13028 ptr + 0);
13029 put_arm_insn (htab, output_bfd,
13030 elf32_arm_plt_entry[1]
13031 | ((got_displacement & 0x000ff000) >> 12),
13032 ptr+ 4);
13033 put_arm_insn (htab, output_bfd,
13034 elf32_arm_plt_entry[2]
13035 | (got_displacement & 0x00000fff),
13036 ptr + 8);
5e681ec4 13037#ifdef FOUR_WORD_PLT
52ab56c2 13038 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 13039#endif
00a97672 13040 }
252b5132 13041
e5a52504
MM		 13042 /* Fill in the entry in the global offset table. */
13043 bfd_put_32 (output_bfd,
13044 (splt->output_section->vma
13045 + splt->output_offset),
13046 sgot->contents + got_offset);
906e58ca 13047
00a97672
RS		 13048 /* Fill in the entry in the .rel(a).plt section. */
13049 rel.r_addend = 0;
13050 rel.r_offset = got_address;
e5a52504
MM		 13051 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
13052 }
57e8b36a 13053
00a97672
RS		 13054 loc = srel->contents + plt_index * RELOC_SIZE (htab);
13055 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 13056
f5385ebf 13057 if (!h->def_regular)
252b5132
RH		 13058 {
13059 /* Mark the symbol as undefined, rather than as defined in
13060 the .plt section. Leave the value alone. */
13061 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 13062 /* If the symbol is weak, we do need to clear the value.
13063 Otherwise, the PLT entry would provide a definition for
13064 the symbol even if the symbol wasn't defined anywhere,
13065 and so the symbol would never be NULL. */
f5385ebf 13066 if (!h->ref_regular_nonweak)
d982ba73 13067 sym->st_value = 0;
252b5132
RH		 13068 }
13069 }
13070
f5385ebf 13071 if (h->needs_copy)
252b5132
RH		 13072 {
13073 asection * s;
947216bf 13074 Elf_Internal_Rela rel;
252b5132
RH		 13075
13076 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 13077 BFD_ASSERT (h->dynindx != -1
13078 && (h->root.type == bfd_link_hash_defined
13079 || h->root.type == bfd_link_hash_defweak));
13080
362d30a1 13081 s = htab->srelbss;
252b5132
RH		 13082 BFD_ASSERT (s != NULL);
13083
00a97672 13084 rel.r_addend = 0;
252b5132
RH		 13085 rel.r_offset = (h->root.u.def.value
13086 + h->root.u.def.section->output_section->vma
13087 + h->root.u.def.section->output_offset);
13088 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 13089 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 13090 }
13091
00a97672
RS		 13092 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13093 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13094 to the ".got" section. */
252b5132 13095 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 13096 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 13097 sym->st_shndx = SHN_ABS;
13098
b34976b6 13099 return TRUE;
252b5132
RH		 13100}
13101
0855e32b
NS		 13102static void
13103arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13104 void *contents,
13105 const unsigned long *template, unsigned count)
13106{
13107 unsigned ix;
13108
13109 for (ix = 0; ix != count; ix++)
13110 {
13111 unsigned long insn = template[ix];
13112
13113 /* Emit mov pc,rx if bx is not permitted. */
13114 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
13115 insn = (insn & 0xf000000f) | 0x01a0f000;
13116 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
13117 }
13118}
13119
252b5132
RH		 13120/* Finish up the dynamic sections. */
13121
b34976b6 13122static bfd_boolean
57e8b36a 13123elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 13124{
13125 bfd * dynobj;
13126 asection * sgot;
13127 asection * sdyn;
4dfe6ac6
NC		 13128 struct elf32_arm_link_hash_table *htab;
13129
13130 htab = elf32_arm_hash_table (info);
13131 if (htab == NULL)
13132 return FALSE;
252b5132
RH		 13133
13134 dynobj = elf_hash_table (info)->dynobj;
13135
362d30a1 13136 sgot = htab->root.sgotplt;
252b5132
RH		 13137 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
13138
13139 if (elf_hash_table (info)->dynamic_sections_created)
13140 {
13141 asection *splt;
13142 Elf32_External_Dyn *dyncon, *dynconend;
13143
362d30a1 13144 splt = htab->root.splt;
24a1ba0f 13145 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 13146 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 13147
13148 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 13149 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 13150
252b5132
RH		 13151 for (; dyncon < dynconend; dyncon++)
13152 {
13153 Elf_Internal_Dyn dyn;
13154 const char * name;
13155 asection * s;
13156
13157 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
13158
13159 switch (dyn.d_tag)
13160 {
229fcec5
MM		 13161 unsigned int type;
13162
252b5132 13163 default:
7a2b07ff
NS		 13164 if (htab->vxworks_p
13165 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
13166 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 13167 break;
13168
229fcec5
MM		 13169 case DT_HASH:
13170 name = ".hash";
13171 goto get_vma_if_bpabi;
13172 case DT_STRTAB:
13173 name = ".dynstr";
13174 goto get_vma_if_bpabi;
13175 case DT_SYMTAB:
13176 name = ".dynsym";
13177 goto get_vma_if_bpabi;
c0042f5d
MM		 13178 case DT_VERSYM:
13179 name = ".gnu.version";
13180 goto get_vma_if_bpabi;
13181 case DT_VERDEF:
13182 name = ".gnu.version_d";
13183 goto get_vma_if_bpabi;
13184 case DT_VERNEED:
13185 name = ".gnu.version_r";
13186 goto get_vma_if_bpabi;
13187
252b5132
RH		 13188 case DT_PLTGOT:
13189 name = ".got";
13190 goto get_vma;
13191 case DT_JMPREL:
00a97672 13192 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 13193 get_vma:
13194 s = bfd_get_section_by_name (output_bfd, name);
13195 BFD_ASSERT (s != NULL);
229fcec5
MM		 13196 if (!htab->symbian_p)
13197 dyn.d_un.d_ptr = s->vma;
13198 else
13199 /* In the BPABI, tags in the PT_DYNAMIC section point
13200 at the file offset, not the memory address, for the
13201 convenience of the post linker. */
13202 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 13203 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13204 break;
13205
229fcec5
MM		 13206 get_vma_if_bpabi:
13207 if (htab->symbian_p)
13208 goto get_vma;
13209 break;
13210
252b5132 13211 case DT_PLTRELSZ:
362d30a1 13212 s = htab->root.srelplt;
252b5132 13213 BFD_ASSERT (s != NULL);
eea6121a 13214 dyn.d_un.d_val = s->size;
252b5132
RH		 13215 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13216 break;
906e58ca 13217
252b5132 13218 case DT_RELSZ:
00a97672 13219 case DT_RELASZ:
229fcec5
MM		 13220 if (!htab->symbian_p)
13221 {
13222 /* My reading of the SVR4 ABI indicates that the
13223 procedure linkage table relocs (DT_JMPREL) should be
13224 included in the overall relocs (DT_REL). This is
13225 what Solaris does. However, UnixWare can not handle
13226 that case. Therefore, we override the DT_RELSZ entry
13227 here to make it not include the JMPREL relocs. Since
00a97672 13228 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 13229 other relocation sections, we don't have to worry
13230 about changing the DT_REL entry. */
362d30a1 13231 s = htab->root.srelplt;
229fcec5
MM		 13232 if (s != NULL)
13233 dyn.d_un.d_val -= s->size;
13234 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13235 break;
13236 }
8029a119 13237 /* Fall through. */
229fcec5
MM		 13238
13239 case DT_REL:
13240 case DT_RELA:
229fcec5
MM		 13241 /* In the BPABI, the DT_REL tag must point at the file
13242 offset, not the VMA, of the first relocation
13243 section. So, we use code similar to that in
13244 elflink.c, but do not check for SHF_ALLOC on the
13245 relcoation section, since relocations sections are
13246 never allocated under the BPABI. The comments above
13247 about Unixware notwithstanding, we include all of the
13248 relocations here. */
13249 if (htab->symbian_p)
13250 {
13251 unsigned int i;
13252 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
13253 ? SHT_REL : SHT_RELA);
13254 dyn.d_un.d_val = 0;
13255 for (i = 1; i < elf_numsections (output_bfd); i++)
13256 {
906e58ca 13257 Elf_Internal_Shdr *hdr
229fcec5
MM		 13258 = elf_elfsections (output_bfd)[i];
13259 if (hdr->sh_type == type)
13260 {
906e58ca 13261 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 13262 || dyn.d_tag == DT_RELASZ)
13263 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 13264 else if ((ufile_ptr) hdr->sh_offset
13265 <= dyn.d_un.d_val - 1)
229fcec5
MM		 13266 dyn.d_un.d_val = hdr->sh_offset;
13267 }
13268 }
13269 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13270 }
252b5132 13271 break;
88f7bcd5 13272
0855e32b
NS		 13273 case DT_TLSDESC_PLT:
13274 s = htab->root.splt;
13275 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13276 + htab->dt_tlsdesc_plt);
13277 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13278 break;
13279
13280 case DT_TLSDESC_GOT:
13281 s = htab->root.sgot;
13282 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13283 + htab->dt_tlsdesc_got);
13284 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13285 break;
13286
88f7bcd5
NC		 13287 /* Set the bottom bit of DT_INIT/FINI if the
13288 corresponding function is Thumb. */
13289 case DT_INIT:
13290 name = info->init_function;
13291 goto get_sym;
13292 case DT_FINI:
13293 name = info->fini_function;
13294 get_sym:
13295 /* If it wasn't set by elf_bfd_final_link
4cc11e76 13296 then there is nothing to adjust. */
88f7bcd5
NC		 13297 if (dyn.d_un.d_val != 0)
13298 {
13299 struct elf_link_hash_entry * eh;
13300
13301 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 13302 FALSE, FALSE, TRUE);
35fc36a8 13303 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 13304 {
13305 dyn.d_un.d_val |= 1;
b34976b6 13306 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 13307 }
13308 }
13309 break;
252b5132
RH		 13310 }
13311 }
13312
24a1ba0f 13313 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 13314 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 13315 {
00a97672
RS		 13316 const bfd_vma *plt0_entry;
13317 bfd_vma got_address, plt_address, got_displacement;
13318
13319 /* Calculate the addresses of the GOT and PLT. */
13320 got_address = sgot->output_section->vma + sgot->output_offset;
13321 plt_address = splt->output_section->vma + splt->output_offset;
13322
13323 if (htab->vxworks_p)
13324 {
13325 /* The VxWorks GOT is relocated by the dynamic linker.
13326 Therefore, we must emit relocations rather than simply
13327 computing the values now. */
13328 Elf_Internal_Rela rel;
13329
13330 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 13331 put_arm_insn (htab, output_bfd, plt0_entry[0],
13332 splt->contents + 0);
13333 put_arm_insn (htab, output_bfd, plt0_entry[1],
13334 splt->contents + 4);
13335 put_arm_insn (htab, output_bfd, plt0_entry[2],
13336 splt->contents + 8);
00a97672
RS		 13337 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
13338
8029a119 13339 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 13340 rel.r_offset = plt_address + 12;
13341 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
13342 rel.r_addend = 0;
13343 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
13344 htab->srelplt2->contents);
13345 }
13346 else
13347 {
13348 got_displacement = got_address - (plt_address + 16);
13349
13350 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 13351 put_arm_insn (htab, output_bfd, plt0_entry[0],
13352 splt->contents + 0);
13353 put_arm_insn (htab, output_bfd, plt0_entry[1],
13354 splt->contents + 4);
13355 put_arm_insn (htab, output_bfd, plt0_entry[2],
13356 splt->contents + 8);
13357 put_arm_insn (htab, output_bfd, plt0_entry[3],
13358 splt->contents + 12);
5e681ec4 13359
5e681ec4 13360#ifdef FOUR_WORD_PLT
00a97672
RS		 13361 /* The displacement value goes in the otherwise-unused
13362 last word of the second entry. */
13363 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 13364#else
00a97672 13365 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 13366#endif
00a97672 13367 }
f7a74f8c 13368 }
252b5132
RH		 13369
13370 /* UnixWare sets the entsize of .plt to 4, although that doesn't
13371 really seem like the right value. */
74541ad4
AM		 13372 if (splt->output_section->owner == output_bfd)
13373 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 13374
0855e32b
NS		 13375 if (htab->dt_tlsdesc_plt)
13376 {
13377 bfd_vma got_address
13378 = sgot->output_section->vma + sgot->output_offset;
13379 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
13380 + htab->root.sgot->output_offset);
13381 bfd_vma plt_address
13382 = splt->output_section->vma + splt->output_offset;
13383
13384 arm_put_trampoline (htab, output_bfd,
13385 splt->contents + htab->dt_tlsdesc_plt,
13386 dl_tlsdesc_lazy_trampoline, 6);
13387
13388 bfd_put_32 (output_bfd,
13389 gotplt_address + htab->dt_tlsdesc_got
13390 - (plt_address + htab->dt_tlsdesc_plt)
13391 - dl_tlsdesc_lazy_trampoline[6],
13392 splt->contents + htab->dt_tlsdesc_plt + 24);
13393 bfd_put_32 (output_bfd,
13394 got_address - (plt_address + htab->dt_tlsdesc_plt)
13395 - dl_tlsdesc_lazy_trampoline[7],
13396 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
13397 }
13398
13399 if (htab->tls_trampoline)
13400 {
13401 arm_put_trampoline (htab, output_bfd,
13402 splt->contents + htab->tls_trampoline,
13403 tls_trampoline, 3);
13404#ifdef FOUR_WORD_PLT
13405 bfd_put_32 (output_bfd, 0x00000000,
13406 splt->contents + htab->tls_trampoline + 12);
13407#endif
13408 }
13409
362d30a1 13410 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 13411 {
13412 /* Correct the .rel(a).plt.unloaded relocations. They will have
13413 incorrect symbol indexes. */
13414 int num_plts;
eed62c48 13415 unsigned char *p;
00a97672 13416
362d30a1 13417 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 13418 / htab->plt_entry_size);
13419 p = htab->srelplt2->contents + RELOC_SIZE (htab);
13420
13421 for (; num_plts; num_plts--)
13422 {
13423 Elf_Internal_Rela rel;
13424
13425 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
13426 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
13427 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
13428 p += RELOC_SIZE (htab);
13429
13430 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
13431 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
13432 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
13433 p += RELOC_SIZE (htab);
13434 }
13435 }
252b5132
RH		 13436 }
13437
13438 /* Fill in the first three entries in the global offset table. */
229fcec5 13439 if (sgot)
252b5132 13440 {
229fcec5
MM		 13441 if (sgot->size > 0)
13442 {
13443 if (sdyn == NULL)
13444 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
13445 else
13446 bfd_put_32 (output_bfd,
13447 sdyn->output_section->vma + sdyn->output_offset,
13448 sgot->contents);
13449 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
13450 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
13451 }
252b5132 13452
229fcec5
MM		 13453 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
13454 }
252b5132 13455
b34976b6 13456 return TRUE;
252b5132
RH		 13457}
13458
ba96a88f 13459static void
57e8b36a 13460elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 13461{
9b485d32 13462 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 13463 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 13464
13465 i_ehdrp = elf_elfheader (abfd);
13466
94a3258f
PB		 13467 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
13468 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
13469 else
13470 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 13471 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 13472
93204d3a
PB		 13473 if (link_info)
13474 {
13475 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 13476 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 13477 i_ehdrp->e_flags |= EF_ARM_BE8;
13478 }
ba96a88f
NC		 13479}
13480
99e4ae17 13481static enum elf_reloc_type_class
57e8b36a 13482elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 13483{
f51e552e 13484 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 13485 {
13486 case R_ARM_RELATIVE:
13487 return reloc_class_relative;
13488 case R_ARM_JUMP_SLOT:
13489 return reloc_class_plt;
13490 case R_ARM_COPY:
13491 return reloc_class_copy;
13492 default:
13493 return reloc_class_normal;
13494 }
13495}
13496
e16bb312
NC		 13497/* Set the right machine number for an Arm ELF file. */
13498
13499static bfd_boolean
57e8b36a 13500elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 13501{
13502 if (hdr->sh_type == SHT_NOTE)
13503 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
13504
13505 return TRUE;
13506}
13507
e489d0ae 13508static void
57e8b36a 13509elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 13510{
5a6c6817 13511 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 13512}
13513
40a18ebd
NC		 13514/* Return TRUE if this is an unwinding table entry. */
13515
13516static bfd_boolean
13517is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
13518{
0112cd26
NC		 13519 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
13520 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 13521}
13522
13523
13524/* Set the type and flags for an ARM section. We do this by
13525 the section name, which is a hack, but ought to work. */
13526
13527static bfd_boolean
13528elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
13529{
13530 const char * name;
13531
13532 name = bfd_get_section_name (abfd, sec);
13533
13534 if (is_arm_elf_unwind_section_name (abfd, name))
13535 {
13536 hdr->sh_type = SHT_ARM_EXIDX;
13537 hdr->sh_flags |= SHF_LINK_ORDER;
13538 }
13539 return TRUE;
13540}
13541
6dc132d9
L		 13542/* Handle an ARM specific section when reading an object file. This is
13543 called when bfd_section_from_shdr finds a section with an unknown
13544 type. */
40a18ebd
NC		 13545
13546static bfd_boolean
13547elf32_arm_section_from_shdr (bfd *abfd,
13548 Elf_Internal_Shdr * hdr,
6dc132d9
L		 13549 const char *name,
13550 int shindex)
40a18ebd
NC		 13551{
13552 /* There ought to be a place to keep ELF backend specific flags, but
13553 at the moment there isn't one. We just keep track of the
13554 sections by their name, instead. Fortunately, the ABI gives
13555 names for all the ARM specific sections, so we will probably get
13556 away with this. */
13557 switch (hdr->sh_type)
13558 {
13559 case SHT_ARM_EXIDX:
0951f019
RE		 13560 case SHT_ARM_PREEMPTMAP:
13561 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 13562 break;
13563
13564 default:
13565 return FALSE;
13566 }
13567
6dc132d9 13568 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 13569 return FALSE;
13570
13571 return TRUE;
13572}
e489d0ae 13573
44444f50
NC		 13574static _arm_elf_section_data *
13575get_arm_elf_section_data (asection * sec)
13576{
47b2e99c
JZ		 13577 if (sec && sec->owner && is_arm_elf (sec->owner))
13578 return elf32_arm_section_data (sec);
44444f50
NC		 13579 else
13580 return NULL;
8e3de13a
NC		 13581}
13582
4e617b1e
PB		 13583typedef struct
13584{
13585 void *finfo;
13586 struct bfd_link_info *info;
91a5743d
PB		 13587 asection *sec;
13588 int sec_shndx;
6e0b88f1
AM		 13589 int (*func) (void *, const char *, Elf_Internal_Sym *,
13590 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 13591} output_arch_syminfo;
13592
13593enum map_symbol_type
13594{
13595 ARM_MAP_ARM,
13596 ARM_MAP_THUMB,
13597 ARM_MAP_DATA
13598};
13599
13600
7413f23f 13601/* Output a single mapping symbol. */
4e617b1e
PB		 13602
13603static bfd_boolean
7413f23f
DJ		 13604elf32_arm_output_map_sym (output_arch_syminfo *osi,
13605 enum map_symbol_type type,
13606 bfd_vma offset)
4e617b1e
PB		 13607{
13608 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 13609 Elf_Internal_Sym sym;
13610
91a5743d
PB		 13611 sym.st_value = osi->sec->output_section->vma
13612 + osi->sec->output_offset
13613 + offset;
4e617b1e
PB		 13614 sym.st_size = 0;
13615 sym.st_other = 0;
13616 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 13617 sym.st_shndx = osi->sec_shndx;
35fc36a8 13618 sym.st_target_internal = 0;
fe33d2fa 13619 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 13620 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 13621}
13622
13623
13624/* Output mapping symbols for PLT entries associated with H. */
13625
13626static bfd_boolean
13627elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
13628{
13629 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
13630 struct elf32_arm_link_hash_table *htab;
13631 struct elf32_arm_link_hash_entry *eh;
13632 bfd_vma addr;
13633
4e617b1e
PB		 13634 if (h->root.type == bfd_link_hash_indirect)
13635 return TRUE;
13636
13637 if (h->root.type == bfd_link_hash_warning)
13638 /* When warning symbols are created, they **replace** the "real"
13639 entry in the hash table, thus we never get to see the real
13640 symbol in a hash traversal. So look at it now. */
13641 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13642
13643 if (h->plt.offset == (bfd_vma) -1)
13644 return TRUE;
13645
4dfe6ac6
NC		 13646 htab = elf32_arm_hash_table (osi->info);
13647 if (htab == NULL)
13648 return FALSE;
13649
4e617b1e
PB		 13650 eh = (struct elf32_arm_link_hash_entry *) h;
13651 addr = h->plt.offset;
13652 if (htab->symbian_p)
13653 {
7413f23f 13654 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 13655 return FALSE;
7413f23f 13656 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 13657 return FALSE;
13658 }
13659 else if (htab->vxworks_p)
13660 {
7413f23f 13661 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 13662 return FALSE;
7413f23f 13663 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 13664 return FALSE;
7413f23f 13665 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 13666 return FALSE;
7413f23f 13667 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 13668 return FALSE;
13669 }
13670 else
13671 {
bd97cb95
DJ		 13672 bfd_signed_vma thumb_refs;
13673
13674 thumb_refs = eh->plt_thumb_refcount;
13675 if (!htab->use_blx)
13676 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 13677
bd97cb95 13678 if (thumb_refs > 0)
4e617b1e 13679 {
7413f23f 13680 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 13681 return FALSE;
13682 }
13683#ifdef FOUR_WORD_PLT
7413f23f 13684 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 13685 return FALSE;
7413f23f 13686 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 13687 return FALSE;
13688#else
906e58ca 13689 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 13690 so only need to output a mapping symbol for the first PLT entry and
13691 entries with thumb thunks. */
bd97cb95 13692 if (thumb_refs > 0 || addr == 20)
4e617b1e 13693 {
7413f23f 13694 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 13695 return FALSE;
13696 }
13697#endif
13698 }
13699
13700 return TRUE;
13701}
13702
7413f23f
DJ		 13703/* Output a single local symbol for a generated stub. */
13704
13705static bfd_boolean
13706elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
13707 bfd_vma offset, bfd_vma size)
13708{
7413f23f
DJ		 13709 Elf_Internal_Sym sym;
13710
7413f23f
DJ		 13711 sym.st_value = osi->sec->output_section->vma
13712 + osi->sec->output_offset
13713 + offset;
13714 sym.st_size = size;
13715 sym.st_other = 0;
13716 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13717 sym.st_shndx = osi->sec_shndx;
35fc36a8 13718 sym.st_target_internal = 0;
6e0b88f1 13719 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 13720}
4e617b1e 13721
da5938a2 13722static bfd_boolean
8029a119
NC		 13723arm_map_one_stub (struct bfd_hash_entry * gen_entry,
13724 void * in_arg)
da5938a2
NC		 13725{
13726 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 13727 asection *stub_sec;
13728 bfd_vma addr;
7413f23f 13729 char *stub_name;
9a008db3 13730 output_arch_syminfo *osi;
d3ce72d0 13731 const insn_sequence *template_sequence;
461a49ca
DJ		 13732 enum stub_insn_type prev_type;
13733 int size;
13734 int i;
13735 enum map_symbol_type sym_type;
da5938a2
NC		 13736
13737 /* Massage our args to the form they really have. */
13738 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 13739 osi = (output_arch_syminfo *) in_arg;
da5938a2 13740
da5938a2
NC		 13741 stub_sec = stub_entry->stub_sec;
13742
13743 /* Ensure this stub is attached to the current section being
7413f23f 13744 processed. */
da5938a2
NC		 13745 if (stub_sec != osi->sec)
13746 return TRUE;
13747
7413f23f
DJ		 13748 addr = (bfd_vma) stub_entry->stub_offset;
13749 stub_name = stub_entry->output_name;
da5938a2 13750
d3ce72d0
NC		 13751 template_sequence = stub_entry->stub_template;
13752 switch (template_sequence[0].type)
7413f23f 13753 {
461a49ca
DJ		 13754 case ARM_TYPE:
13755 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 13756 return FALSE;
13757 break;
461a49ca 13758 case THUMB16_TYPE:
48229727 13759 case THUMB32_TYPE:
461a49ca
DJ		 13760 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
13761 stub_entry->stub_size))
da5938a2
NC		 13762 return FALSE;
13763 break;
13764 default:
13765 BFD_FAIL ();
48229727 13766 return 0;
7413f23f 13767 }
da5938a2 13768
461a49ca
DJ		 13769 prev_type = DATA_TYPE;
13770 size = 0;
13771 for (i = 0; i < stub_entry->stub_template_size; i++)
13772 {
d3ce72d0 13773 switch (template_sequence[i].type)
461a49ca
DJ		 13774 {
13775 case ARM_TYPE:
13776 sym_type = ARM_MAP_ARM;
13777 break;
13778
13779 case THUMB16_TYPE:
48229727 13780 case THUMB32_TYPE:
461a49ca
DJ		 13781 sym_type = ARM_MAP_THUMB;
13782 break;
13783
13784 case DATA_TYPE:
13785 sym_type = ARM_MAP_DATA;
13786 break;
13787
13788 default:
13789 BFD_FAIL ();
4e31c731 13790 return FALSE;
461a49ca
DJ		 13791 }
13792
d3ce72d0 13793 if (template_sequence[i].type != prev_type)
461a49ca 13794 {
d3ce72d0 13795 prev_type = template_sequence[i].type;
461a49ca
DJ		 13796 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
13797 return FALSE;
13798 }
13799
d3ce72d0 13800 switch (template_sequence[i].type)
461a49ca
DJ		 13801 {
13802 case ARM_TYPE:
48229727 13803 case THUMB32_TYPE:
461a49ca
DJ		 13804 size += 4;
13805 break;
13806
13807 case THUMB16_TYPE:
13808 size += 2;
13809 break;
13810
13811 case DATA_TYPE:
13812 size += 4;
13813 break;
13814
13815 default:
13816 BFD_FAIL ();
4e31c731 13817 return FALSE;
461a49ca
DJ		 13818 }
13819 }
13820
da5938a2
NC		 13821 return TRUE;
13822}
13823
33811162
DG		 13824/* Output mapping symbols for linker generated sections,
13825 and for those data-only sections that do not have a
13826 $d. */
4e617b1e
PB		 13827
13828static bfd_boolean
13829elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 13830 struct bfd_link_info *info,
13831 void *finfo,
6e0b88f1
AM		 13832 int (*func) (void *, const char *,
13833 Elf_Internal_Sym *,
13834 asection *,
13835 struct elf_link_hash_entry *))
4e617b1e
PB		 13836{
13837 output_arch_syminfo osi;
13838 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 13839 bfd_vma offset;
13840 bfd_size_type size;
33811162 13841 bfd *input_bfd;
4e617b1e
PB		 13842
13843 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13844 if (htab == NULL)
13845 return FALSE;
13846
906e58ca 13847 check_use_blx (htab);
91a5743d 13848
4e617b1e
PB		 13849 osi.finfo = finfo;
13850 osi.info = info;
13851 osi.func = func;
906e58ca 13852
33811162
DG		 13853 /* Add a $d mapping symbol to data-only sections that
13854 don't have any mapping symbol. This may result in (harmless) redundant
13855 mapping symbols. */
13856 for (input_bfd = info->input_bfds;
13857 input_bfd != NULL;
13858 input_bfd = input_bfd->link_next)
13859 {
13860 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
13861 for (osi.sec = input_bfd->sections;
13862 osi.sec != NULL;
13863 osi.sec = osi.sec->next)
13864 {
13865 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 13866 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
13867 != 0)
33811162
DG		 13868 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
13869 == SEC_HAS_CONTENTS
13870 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0
DJ		 13871 && get_arm_elf_section_data (osi.sec)->mapcount == 0
13872 && osi.sec->size > 0)
33811162
DG		 13873 {
13874 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13875 (output_bfd, osi.sec->output_section);
13876 if (osi.sec_shndx != (int)SHN_BAD)
13877 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
13878 }
13879 }
13880 }
13881
91a5743d
PB		 13882 /* ARM->Thumb glue. */
13883 if (htab->arm_glue_size > 0)
13884 {
13885 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13886 ARM2THUMB_GLUE_SECTION_NAME);
13887
13888 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13889 (output_bfd, osi.sec->output_section);
13890 if (info->shared || htab->root.is_relocatable_executable
13891 || htab->pic_veneer)
13892 size = ARM2THUMB_PIC_GLUE_SIZE;
13893 else if (htab->use_blx)
13894 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13895 else
13896 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13897
91a5743d
PB		 13898 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13899 {
7413f23f
DJ		 13900 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13901 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13902 }
13903 }
13904
13905 /* Thumb->ARM glue. */
13906 if (htab->thumb_glue_size > 0)
13907 {
13908 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13909 THUMB2ARM_GLUE_SECTION_NAME);
13910
13911 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13912 (output_bfd, osi.sec->output_section);
13913 size = THUMB2ARM_GLUE_SIZE;
13914
13915 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13916 {
7413f23f
DJ		 13917 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13918 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13919 }
13920 }
13921
845b51d6
PB		 13922 /* ARMv4 BX veneers. */
13923 if (htab->bx_glue_size > 0)
13924 {
13925 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13926 ARM_BX_GLUE_SECTION_NAME);
13927
13928 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13929 (output_bfd, osi.sec->output_section);
13930
7413f23f 13931 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13932 }
13933
8029a119
NC		 13934 /* Long calls stubs. */
13935 if (htab->stub_bfd && htab->stub_bfd->sections)
13936 {
da5938a2 13937 asection* stub_sec;
8029a119 13938
da5938a2
NC		 13939 for (stub_sec = htab->stub_bfd->sections;
13940 stub_sec != NULL;
8029a119
NC		 13941 stub_sec = stub_sec->next)
13942 {
13943 /* Ignore non-stub sections. */
13944 if (!strstr (stub_sec->name, STUB_SUFFIX))
13945 continue;
da5938a2 13946
8029a119 13947 osi.sec = stub_sec;
da5938a2 13948
8029a119
NC		 13949 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13950 (output_bfd, osi.sec->output_section);
da5938a2 13951
8029a119
NC		 13952 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13953 }
13954 }
da5938a2 13955
91a5743d 13956 /* Finally, output mapping symbols for the PLT. */
362d30a1 13957 if (!htab->root.splt || htab->root.splt->size == 0)
91a5743d
PB		 13958 return TRUE;
13959
362d30a1 13960 osi.sec = htab->root.splt;
91a5743d 13961 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
362d30a1 13962 osi.sec->output_section);
4e617b1e
PB		 13963 /* Output mapping symbols for the plt header. SymbianOS does not have a
13964 plt header. */
13965 if (htab->vxworks_p)
13966 {
13967 /* VxWorks shared libraries have no PLT header. */
13968 if (!info->shared)
13969 {
7413f23f 13970 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13971 return FALSE;
7413f23f 13972 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13973 return FALSE;
13974 }
13975 }
13976 else if (!htab->symbian_p)
13977 {
7413f23f 13978 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13979 return FALSE;
13980#ifndef FOUR_WORD_PLT
7413f23f 13981 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13982 return FALSE;
13983#endif
13984 }
13985
0855e32b
NS		 13986 if (htab->dt_tlsdesc_plt != 0)
13987 {
13988 /* Mapping symbols for the lazy tls trampoline. */
13989 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
13990 return FALSE;
13991
13992 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
13993 htab->dt_tlsdesc_plt + 24))
13994 return FALSE;
13995 }
13996 if (htab->tls_trampoline != 0)
13997 {
13998 /* Mapping symbols for the tls trampoline. */
13999 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14000 return FALSE;
14001#ifdef FOUR_WORD_PLT
14002 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14003 htab->tls_trampoline + 12))
14004 return FALSE;
14005#endif
14006 }
14007
4e617b1e
PB		 14008 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
14009 return TRUE;
14010}
14011
e489d0ae
PB		 14012/* Allocate target specific section data. */
14013
14014static bfd_boolean
14015elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14016{
f592407e
AM		 14017 if (!sec->used_by_bfd)
14018 {
14019 _arm_elf_section_data *sdata;
14020 bfd_size_type amt = sizeof (*sdata);
e489d0ae 14021
21d799b5 14022 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 14023 if (sdata == NULL)
14024 return FALSE;
14025 sec->used_by_bfd = sdata;
14026 }
e489d0ae
PB		 14027
14028 return _bfd_elf_new_section_hook (abfd, sec);
14029}
14030
14031
14032/* Used to order a list of mapping symbols by address. */
14033
14034static int
14035elf32_arm_compare_mapping (const void * a, const void * b)
14036{
7f6a71ff
JM		 14037 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14038 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14039
14040 if (amap->vma > bmap->vma)
14041 return 1;
14042 else if (amap->vma < bmap->vma)
14043 return -1;
14044 else if (amap->type > bmap->type)
14045 /* Ensure results do not depend on the host qsort for objects with
14046 multiple mapping symbols at the same address by sorting on type
14047 after vma. */
14048 return 1;
14049 else if (amap->type < bmap->type)
14050 return -1;
14051 else
14052 return 0;
e489d0ae
PB		 14053}
14054
2468f9c9
PB		 14055/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
14056
14057static unsigned long
14058offset_prel31 (unsigned long addr, bfd_vma offset)
14059{
14060 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
14061}
14062
14063/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
14064 relocations. */
14065
14066static void
14067copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
14068{
14069 unsigned long first_word = bfd_get_32 (output_bfd, from);
14070 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
14071
14072 /* High bit of first word is supposed to be zero. */
14073 if ((first_word & 0x80000000ul) == 0)
14074 first_word = offset_prel31 (first_word, offset);
14075
14076 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
14077 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
14078 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
14079 second_word = offset_prel31 (second_word, offset);
14080
14081 bfd_put_32 (output_bfd, first_word, to);
14082 bfd_put_32 (output_bfd, second_word, to + 4);
14083}
e489d0ae 14084
48229727
JB		 14085/* Data for make_branch_to_a8_stub(). */
14086
14087struct a8_branch_to_stub_data {
14088 asection *writing_section;
14089 bfd_byte *contents;
14090};
14091
14092
14093/* Helper to insert branches to Cortex-A8 erratum stubs in the right
14094 places for a particular section. */
14095
14096static bfd_boolean
14097make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
14098 void *in_arg)
14099{
14100 struct elf32_arm_stub_hash_entry *stub_entry;
14101 struct a8_branch_to_stub_data *data;
14102 bfd_byte *contents;
14103 unsigned long branch_insn;
14104 bfd_vma veneered_insn_loc, veneer_entry_loc;
14105 bfd_signed_vma branch_offset;
14106 bfd *abfd;
91d6fa6a 14107 unsigned int target;
48229727
JB		 14108
14109 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14110 data = (struct a8_branch_to_stub_data *) in_arg;
14111
14112 if (stub_entry->target_section != data->writing_section
4563a860 14113 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 14114 return TRUE;
14115
14116 contents = data->contents;
14117
14118 veneered_insn_loc = stub_entry->target_section->output_section->vma
14119 + stub_entry->target_section->output_offset
14120 + stub_entry->target_value;
14121
14122 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
14123 + stub_entry->stub_sec->output_offset
14124 + stub_entry->stub_offset;
14125
14126 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
14127 veneered_insn_loc &= ~3u;
14128
14129 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
14130
14131 abfd = stub_entry->target_section->owner;
91d6fa6a 14132 target = stub_entry->target_value;
48229727
JB		 14133
14134 /* We attempt to avoid this condition by setting stubs_always_after_branch
14135 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
14136 This check is just to be on the safe side... */
14137 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
14138 {
14139 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
14140 "allocated in unsafe location"), abfd);
14141 return FALSE;
14142 }
14143
14144 switch (stub_entry->stub_type)
14145 {
14146 case arm_stub_a8_veneer_b:
14147 case arm_stub_a8_veneer_b_cond:
14148 branch_insn = 0xf0009000;
14149 goto jump24;
14150
14151 case arm_stub_a8_veneer_blx:
14152 branch_insn = 0xf000e800;
14153 goto jump24;
14154
14155 case arm_stub_a8_veneer_bl:
14156 {
14157 unsigned int i1, j1, i2, j2, s;
14158
14159 branch_insn = 0xf000d000;
14160
14161 jump24:
14162 if (branch_offset < -16777216 || branch_offset > 16777214)
14163 {
14164 /* There's not much we can do apart from complain if this
14165 happens. */
14166 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
14167 "of range (input file too large)"), abfd);
14168 return FALSE;
14169 }
14170
14171 /* i1 = not(j1 eor s), so:
14172 not i1 = j1 eor s
14173 j1 = (not i1) eor s. */
14174
14175 branch_insn |= (branch_offset >> 1) & 0x7ff;
14176 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
14177 i2 = (branch_offset >> 22) & 1;
14178 i1 = (branch_offset >> 23) & 1;
14179 s = (branch_offset >> 24) & 1;
14180 j1 = (!i1) ^ s;
14181 j2 = (!i2) ^ s;
14182 branch_insn |= j2 << 11;
14183 branch_insn |= j1 << 13;
14184 branch_insn |= s << 26;
14185 }
14186 break;
14187
14188 default:
14189 BFD_FAIL ();
14190 return FALSE;
14191 }
14192
91d6fa6a
NC		 14193 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
14194 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 14195
14196 return TRUE;
14197}
14198
e489d0ae
PB		 14199/* Do code byteswapping. Return FALSE afterwards so that the section is
14200 written out as normal. */
14201
14202static bfd_boolean
c7b8f16e 14203elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 14204 struct bfd_link_info *link_info,
14205 asection *sec,
e489d0ae
PB		 14206 bfd_byte *contents)
14207{
48229727 14208 unsigned int mapcount, errcount;
8e3de13a 14209 _arm_elf_section_data *arm_data;
c7b8f16e 14210 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 14211 elf32_arm_section_map *map;
c7b8f16e 14212 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 14213 bfd_vma ptr;
14214 bfd_vma end;
c7b8f16e 14215 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 14216 bfd_byte tmp;
48229727 14217 unsigned int i;
57e8b36a 14218
4dfe6ac6
NC		 14219 if (globals == NULL)
14220 return FALSE;
14221
8e3de13a
NC		 14222 /* If this section has not been allocated an _arm_elf_section_data
14223 structure then we cannot record anything. */
14224 arm_data = get_arm_elf_section_data (sec);
14225 if (arm_data == NULL)
14226 return FALSE;
14227
14228 mapcount = arm_data->mapcount;
14229 map = arm_data->map;
c7b8f16e
JB		 14230 errcount = arm_data->erratumcount;
14231
14232 if (errcount != 0)
14233 {
14234 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
14235
14236 for (errnode = arm_data->erratumlist; errnode != 0;
14237 errnode = errnode->next)
14238 {
91d6fa6a 14239 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 14240
14241 switch (errnode->type)
14242 {
14243 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
14244 {
14245 bfd_vma branch_to_veneer;
14246 /* Original condition code of instruction, plus bit mask for
14247 ARM B instruction. */
14248 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
14249 | 0x0a000000;
14250
14251 /* The instruction is before the label. */
91d6fa6a 14252 target -= 4;
c7b8f16e
JB		 14253
14254 /* Above offset included in -4 below. */
14255 branch_to_veneer = errnode->u.b.veneer->vma
14256 - errnode->vma - 4;
14257
14258 if ((signed) branch_to_veneer < -(1 << 25)
14259 || (signed) branch_to_veneer >= (1 << 25))
14260 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14261 "range"), output_bfd);
14262
14263 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 14264 contents[endianflip ^ target] = insn & 0xff;
14265 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14266 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14267 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14268 }
14269 break;
14270
14271 case VFP11_ERRATUM_ARM_VENEER:
14272 {
14273 bfd_vma branch_from_veneer;
14274 unsigned int insn;
14275
14276 /* Take size of veneer into account. */
14277 branch_from_veneer = errnode->u.v.branch->vma
14278 - errnode->vma - 12;
14279
14280 if ((signed) branch_from_veneer < -(1 << 25)
14281 || (signed) branch_from_veneer >= (1 << 25))
14282 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14283 "range"), output_bfd);
14284
14285 /* Original instruction. */
14286 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 14287 contents[endianflip ^ target] = insn & 0xff;
14288 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14289 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14290 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14291
14292 /* Branch back to insn after original insn. */
14293 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 14294 contents[endianflip ^ (target + 4)] = insn & 0xff;
14295 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
14296 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
14297 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14298 }
14299 break;
14300
14301 default:
14302 abort ();
14303 }
14304 }
14305 }
e489d0ae 14306
2468f9c9
PB		 14307 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
14308 {
14309 arm_unwind_table_edit *edit_node
14310 = arm_data->u.exidx.unwind_edit_list;
14311 /* Now, sec->size is the size of the section we will write. The original
14312 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
14313 markers) was sec->rawsize. (This isn't the case if we perform no
14314 edits, then rawsize will be zero and we should use size). */
21d799b5 14315 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 14316 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
14317 unsigned int in_index, out_index;
14318 bfd_vma add_to_offsets = 0;
14319
14320 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
14321 {
14322 if (edit_node)
14323 {
14324 unsigned int edit_index = edit_node->index;
14325
14326 if (in_index < edit_index && in_index * 8 < input_size)
14327 {
14328 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
14329 contents + in_index * 8, add_to_offsets);
14330 out_index++;
14331 in_index++;
14332 }
14333 else if (in_index == edit_index
14334 || (in_index * 8 >= input_size
14335 && edit_index == UINT_MAX))
14336 {
14337 switch (edit_node->type)
14338 {
14339 case DELETE_EXIDX_ENTRY:
14340 in_index++;
14341 add_to_offsets += 8;
14342 break;
14343
14344 case INSERT_EXIDX_CANTUNWIND_AT_END:
14345 {
14346 asection *text_sec = edit_node->linked_section;
14347 bfd_vma text_offset = text_sec->output_section->vma
14348 + text_sec->output_offset
14349 + text_sec->size;
14350 bfd_vma exidx_offset = offset + out_index * 8;
14351 unsigned long prel31_offset;
14352
14353 /* Note: this is meant to be equivalent to an
14354 R_ARM_PREL31 relocation. These synthetic
14355 EXIDX_CANTUNWIND markers are not relocated by the
14356 usual BFD method. */
14357 prel31_offset = (text_offset - exidx_offset)
14358 & 0x7ffffffful;
14359
14360 /* First address we can't unwind. */
14361 bfd_put_32 (output_bfd, prel31_offset,
14362 &edited_contents[out_index * 8]);
14363
14364 /* Code for EXIDX_CANTUNWIND. */
14365 bfd_put_32 (output_bfd, 0x1,
14366 &edited_contents[out_index * 8 + 4]);
14367
14368 out_index++;
14369 add_to_offsets -= 8;
14370 }
14371 break;
14372 }
14373
14374 edit_node = edit_node->next;
14375 }
14376 }
14377 else
14378 {
14379 /* No more edits, copy remaining entries verbatim. */
14380 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
14381 contents + in_index * 8, add_to_offsets);
14382 out_index++;
14383 in_index++;
14384 }
14385 }
14386
14387 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
14388 bfd_set_section_contents (output_bfd, sec->output_section,
14389 edited_contents,
14390 (file_ptr) sec->output_offset, sec->size);
14391
14392 return TRUE;
14393 }
14394
48229727
JB		 14395 /* Fix code to point to Cortex-A8 erratum stubs. */
14396 if (globals->fix_cortex_a8)
14397 {
14398 struct a8_branch_to_stub_data data;
14399
14400 data.writing_section = sec;
14401 data.contents = contents;
14402
14403 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
14404 &data);
14405 }
14406
e489d0ae
PB		 14407 if (mapcount == 0)
14408 return FALSE;
14409
c7b8f16e 14410 if (globals->byteswap_code)
e489d0ae 14411 {
c7b8f16e 14412 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 14413
c7b8f16e
JB		 14414 ptr = map[0].vma;
14415 for (i = 0; i < mapcount; i++)
14416 {
14417 if (i == mapcount - 1)
14418 end = sec->size;
14419 else
14420 end = map[i + 1].vma;
e489d0ae 14421
c7b8f16e 14422 switch (map[i].type)
e489d0ae 14423 {
c7b8f16e
JB		 14424 case 'a':
14425 /* Byte swap code words. */
14426 while (ptr + 3 < end)
14427 {
14428 tmp = contents[ptr];
14429 contents[ptr] = contents[ptr + 3];
14430 contents[ptr + 3] = tmp;
14431 tmp = contents[ptr + 1];
14432 contents[ptr + 1] = contents[ptr + 2];
14433 contents[ptr + 2] = tmp;
14434 ptr += 4;
14435 }
14436 break;
e489d0ae 14437
c7b8f16e
JB		 14438 case 't':
14439 /* Byte swap code halfwords. */
14440 while (ptr + 1 < end)
14441 {
14442 tmp = contents[ptr];
14443 contents[ptr] = contents[ptr + 1];
14444 contents[ptr + 1] = tmp;
14445 ptr += 2;
14446 }
14447 break;
14448
14449 case 'd':
14450 /* Leave data alone. */
14451 break;
14452 }
14453 ptr = end;
14454 }
e489d0ae 14455 }
8e3de13a 14456
93204d3a 14457 free (map);
47b2e99c 14458 arm_data->mapcount = -1;
c7b8f16e 14459 arm_data->mapsize = 0;
8e3de13a 14460 arm_data->map = NULL;
8e3de13a 14461
e489d0ae
PB		 14462 return FALSE;
14463}
14464
0beaef2b
PB		 14465/* Mangle thumb function symbols as we read them in. */
14466
8384fb8f 14467static bfd_boolean
0beaef2b
PB		 14468elf32_arm_swap_symbol_in (bfd * abfd,
14469 const void *psrc,
14470 const void *pshn,
14471 Elf_Internal_Sym *dst)
14472{
8384fb8f
AM		 14473 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
14474 return FALSE;
0beaef2b
PB		 14475
14476 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 14477 the address. */
0f88be7a 14478 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 14479 && (dst->st_value & 1))
14480 {
0beaef2b 14481 dst->st_value &= ~(bfd_vma) 1;
35fc36a8
RS		 14482 dst->st_target_internal = ST_BRANCH_TO_THUMB;
14483 }
14484 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
14485 {
14486 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
14487 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 14488 }
35fc36a8
RS		 14489 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
14490 dst->st_target_internal = ST_BRANCH_LONG;
14491 else
14492 dst->st_target_internal = ST_BRANCH_TO_ARM;
14493
8384fb8f 14494 return TRUE;
0beaef2b
PB		 14495}
14496
14497
14498/* Mangle thumb function symbols as we write them out. */
14499
14500static void
14501elf32_arm_swap_symbol_out (bfd *abfd,
14502 const Elf_Internal_Sym *src,
14503 void *cdst,
14504 void *shndx)
14505{
14506 Elf_Internal_Sym newsym;
14507
14508 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
14509 of the address set, as per the new EABI. We do this unconditionally
14510 because objcopy does not set the elf header flags until after
14511 it writes out the symbol table. */
35fc36a8 14512 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 14513 {
14514 newsym = *src;
14515 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 14516 if (newsym.st_shndx != SHN_UNDEF)
14517 {
14518 /* Do this only for defined symbols. At link type, the static
14519 linker will simulate the work of dynamic linker of resolving
14520 symbols and will carry over the thumbness of found symbols to
14521 the output symbol table. It's not clear how it happens, but
b0fead2b 14522 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 14523 runtime, and writing '1' for them will be confusing for users
14524 and possibly for dynamic linker itself.
14525 */
14526 newsym.st_value |= 1;
14527 }
906e58ca 14528
0beaef2b
PB		 14529 src = &newsym;
14530 }
14531 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
14532}
14533
b294bdf8
MM		 14534/* Add the PT_ARM_EXIDX program header. */
14535
14536static bfd_boolean
906e58ca 14537elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 14538 struct bfd_link_info *info ATTRIBUTE_UNUSED)
14539{
14540 struct elf_segment_map *m;
14541 asection *sec;
14542
14543 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
14544 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
14545 {
14546 /* If there is already a PT_ARM_EXIDX header, then we do not
14547 want to add another one. This situation arises when running
14548 "strip"; the input binary already has the header. */
14549 m = elf_tdata (abfd)->segment_map;
14550 while (m && m->p_type != PT_ARM_EXIDX)
14551 m = m->next;
14552 if (!m)
14553 {
21d799b5
NC		 14554 m = (struct elf_segment_map *)
14555 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 14556 if (m == NULL)
14557 return FALSE;
14558 m->p_type = PT_ARM_EXIDX;
14559 m->count = 1;
14560 m->sections[0] = sec;
14561
14562 m->next = elf_tdata (abfd)->segment_map;
14563 elf_tdata (abfd)->segment_map = m;
14564 }
14565 }
14566
14567 return TRUE;
14568}
14569
14570/* We may add a PT_ARM_EXIDX program header. */
14571
14572static int
a6b96beb
AM		 14573elf32_arm_additional_program_headers (bfd *abfd,
14574 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 14575{
14576 asection *sec;
14577
14578 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
14579 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
14580 return 1;
14581 else
14582 return 0;
14583}
14584
0beaef2b 14585/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 14586const struct elf_size_info elf32_arm_size_info =
14587{
0beaef2b
PB		 14588 sizeof (Elf32_External_Ehdr),
14589 sizeof (Elf32_External_Phdr),
14590 sizeof (Elf32_External_Shdr),
14591 sizeof (Elf32_External_Rel),
14592 sizeof (Elf32_External_Rela),
14593 sizeof (Elf32_External_Sym),
14594 sizeof (Elf32_External_Dyn),
14595 sizeof (Elf_External_Note),
14596 4,
14597 1,
14598 32, 2,
14599 ELFCLASS32, EV_CURRENT,
14600 bfd_elf32_write_out_phdrs,
14601 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 14602 bfd_elf32_checksum_contents,
0beaef2b
PB		 14603 bfd_elf32_write_relocs,
14604 elf32_arm_swap_symbol_in,
14605 elf32_arm_swap_symbol_out,
14606 bfd_elf32_slurp_reloc_table,
14607 bfd_elf32_slurp_symbol_table,
14608 bfd_elf32_swap_dyn_in,
14609 bfd_elf32_swap_dyn_out,
14610 bfd_elf32_swap_reloc_in,
14611 bfd_elf32_swap_reloc_out,
14612 bfd_elf32_swap_reloca_in,
14613 bfd_elf32_swap_reloca_out
14614};
14615
252b5132 14616#define ELF_ARCH bfd_arch_arm
ae95ffa6 14617#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 14618#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 14619#ifdef __QNXTARGET__
14620#define ELF_MAXPAGESIZE 0x1000
14621#else
f21f3fe0 14622#define ELF_MAXPAGESIZE 0x8000
d0facd1b 14623#endif
b1342370 14624#define ELF_MINPAGESIZE 0x1000
24718e3b 14625#define ELF_COMMONPAGESIZE 0x1000
252b5132 14626
ba93b8ac
DJ		 14627#define bfd_elf32_mkobject elf32_arm_mkobject
14628
99e4ae17
AJ		 14629#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
14630#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 14631#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
14632#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
14633#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 14634#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 14635#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 14636#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 14637#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 14638#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 14639#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 14640#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 14641#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 14642
14643#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
14644#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 14645#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 14646#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
14647#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 14648#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 14649#define elf_backend_write_section elf32_arm_write_section
252b5132 14650#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 14651#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 14652#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
14653#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
14654#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 14655#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 14656#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 14657#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 14658#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 14659#define elf_backend_object_p elf32_arm_object_p
e16bb312 14660#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 14661#define elf_backend_fake_sections elf32_arm_fake_sections
14662#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 14663#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 14664#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 14665#define elf_backend_size_info elf32_arm_size_info
b294bdf8 14666#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 14667#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
14668#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
14669#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
906e58ca
NC		 14670
14671#define elf_backend_can_refcount 1
14672#define elf_backend_can_gc_sections 1
14673#define elf_backend_plt_readonly 1
14674#define elf_backend_want_got_plt 1
14675#define elf_backend_want_plt_sym 0
14676#define elf_backend_may_use_rel_p 1
14677#define elf_backend_may_use_rela_p 0
4e7fd91e 14678#define elf_backend_default_use_rela_p 0
252b5132 14679
04f7c78d 14680#define elf_backend_got_header_size 12
04f7c78d 14681
906e58ca
NC		 14682#undef elf_backend_obj_attrs_vendor
14683#define elf_backend_obj_attrs_vendor "aeabi"
14684#undef elf_backend_obj_attrs_section
14685#define elf_backend_obj_attrs_section ".ARM.attributes"
14686#undef elf_backend_obj_attrs_arg_type
14687#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
14688#undef elf_backend_obj_attrs_section_type
104d59d1 14689#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 14690#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
e8b36cd1 14691#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 14692
252b5132 14693#include "elf32-target.h"
7f266840 14694
906e58ca 14695/* VxWorks Targets. */
4e7fd91e 14696
906e58ca 14697#undef TARGET_LITTLE_SYM
4e7fd91e 14698#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 14699#undef TARGET_LITTLE_NAME
4e7fd91e 14700#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 14701#undef TARGET_BIG_SYM
4e7fd91e 14702#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 14703#undef TARGET_BIG_NAME
4e7fd91e
PB		 14704#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
14705
14706/* Like elf32_arm_link_hash_table_create -- but overrides
14707 appropriately for VxWorks. */
906e58ca 14708
4e7fd91e
PB		 14709static struct bfd_link_hash_table *
14710elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
14711{
14712 struct bfd_link_hash_table *ret;
14713
14714 ret = elf32_arm_link_hash_table_create (abfd);
14715 if (ret)
14716 {
14717 struct elf32_arm_link_hash_table *htab
00a97672 14718 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 14719 htab->use_rel = 0;
00a97672 14720 htab->vxworks_p = 1;
4e7fd91e
PB		 14721 }
14722 return ret;
906e58ca 14723}
4e7fd91e 14724
00a97672
RS		 14725static void
14726elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
14727{
14728 elf32_arm_final_write_processing (abfd, linker);
14729 elf_vxworks_final_write_processing (abfd, linker);
14730}
14731
906e58ca 14732#undef elf32_bed
4e7fd91e
PB		 14733#define elf32_bed elf32_arm_vxworks_bed
14734
906e58ca
NC		 14735#undef bfd_elf32_bfd_link_hash_table_create
14736#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
14737#undef elf_backend_add_symbol_hook
14738#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
14739#undef elf_backend_final_write_processing
14740#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
14741#undef elf_backend_emit_relocs
14742#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 14743
906e58ca 14744#undef elf_backend_may_use_rel_p
00a97672 14745#define elf_backend_may_use_rel_p 0
906e58ca 14746#undef elf_backend_may_use_rela_p
00a97672 14747#define elf_backend_may_use_rela_p 1
906e58ca 14748#undef elf_backend_default_use_rela_p
00a97672 14749#define elf_backend_default_use_rela_p 1
906e58ca 14750#undef elf_backend_want_plt_sym
00a97672 14751#define elf_backend_want_plt_sym 1
906e58ca 14752#undef ELF_MAXPAGESIZE
00a97672 14753#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 14754
14755#include "elf32-target.h"
14756
14757
21d799b5
NC		 14758/* Merge backend specific data from an object file to the output
14759 object file when linking. */
14760
14761static bfd_boolean
14762elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
14763{
14764 flagword out_flags;
14765 flagword in_flags;
14766 bfd_boolean flags_compatible = TRUE;
14767 asection *sec;
14768
14769 /* Check if we have the same endianess. */
14770 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
14771 return FALSE;
14772
14773 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
14774 return TRUE;
14775
14776 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
14777 return FALSE;
14778
14779 /* The input BFD must have had its flags initialised. */
14780 /* The following seems bogus to me -- The flags are initialized in
14781 the assembler but I don't think an elf_flags_init field is
14782 written into the object. */
14783 /* BFD_ASSERT (elf_flags_init (ibfd)); */
14784
14785 in_flags = elf_elfheader (ibfd)->e_flags;
14786 out_flags = elf_elfheader (obfd)->e_flags;
14787
14788 /* In theory there is no reason why we couldn't handle this. However
14789 in practice it isn't even close to working and there is no real
14790 reason to want it. */
14791 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
14792 && !(ibfd->flags & DYNAMIC)
14793 && (in_flags & EF_ARM_BE8))
14794 {
14795 _bfd_error_handler (_("error: %B is already in final BE8 format"),
14796 ibfd);
14797 return FALSE;
14798 }
14799
14800 if (!elf_flags_init (obfd))
14801 {
14802 /* If the input is the default architecture and had the default
14803 flags then do not bother setting the flags for the output
14804 architecture, instead allow future merges to do this. If no
14805 future merges ever set these flags then they will retain their
14806 uninitialised values, which surprise surprise, correspond
14807 to the default values. */
14808 if (bfd_get_arch_info (ibfd)->the_default
14809 && elf_elfheader (ibfd)->e_flags == 0)
14810 return TRUE;
14811
14812 elf_flags_init (obfd) = TRUE;
14813 elf_elfheader (obfd)->e_flags = in_flags;
14814
14815 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
14816 && bfd_get_arch_info (obfd)->the_default)
14817 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
14818
14819 return TRUE;
14820 }
14821
14822 /* Determine what should happen if the input ARM architecture
14823 does not match the output ARM architecture. */
14824 if (! bfd_arm_merge_machines (ibfd, obfd))
14825 return FALSE;
14826
14827 /* Identical flags must be compatible. */
14828 if (in_flags == out_flags)
14829 return TRUE;
14830
14831 /* Check to see if the input BFD actually contains any sections. If
14832 not, its flags may not have been initialised either, but it
14833 cannot actually cause any incompatiblity. Do not short-circuit
14834 dynamic objects; their section list may be emptied by
14835 elf_link_add_object_symbols.
14836
14837 Also check to see if there are no code sections in the input.
14838 In this case there is no need to check for code specific flags.
14839 XXX - do we need to worry about floating-point format compatability
14840 in data sections ? */
14841 if (!(ibfd->flags & DYNAMIC))
14842 {
14843 bfd_boolean null_input_bfd = TRUE;
14844 bfd_boolean only_data_sections = TRUE;
14845
14846 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
14847 {
14848 /* Ignore synthetic glue sections. */
14849 if (strcmp (sec->name, ".glue_7")
14850 && strcmp (sec->name, ".glue_7t"))
14851 {
14852 if ((bfd_get_section_flags (ibfd, sec)
14853 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14854 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14855 only_data_sections = FALSE;
14856
14857 null_input_bfd = FALSE;
14858 break;
14859 }
14860 }
14861
14862 if (null_input_bfd || only_data_sections)
14863 return TRUE;
14864 }
14865
14866 /* Complain about various flag mismatches. */
14867 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
14868 EF_ARM_EABI_VERSION (out_flags)))
14869 {
14870 _bfd_error_handler
14871 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
14872 ibfd, obfd,
14873 (in_flags & EF_ARM_EABIMASK) >> 24,
14874 (out_flags & EF_ARM_EABIMASK) >> 24);
14875 return FALSE;
14876 }
14877
14878 /* Not sure what needs to be checked for EABI versions >= 1. */
14879 /* VxWorks libraries do not use these flags. */
14880 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
14881 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
14882 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
14883 {
14884 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14885 {
14886 _bfd_error_handler
14887 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
14888 ibfd, obfd,
14889 in_flags & EF_ARM_APCS_26 ? 26 : 32,
14890 out_flags & EF_ARM_APCS_26 ? 26 : 32);
14891 flags_compatible = FALSE;
14892 }
14893
14894 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14895 {
14896 if (in_flags & EF_ARM_APCS_FLOAT)
14897 _bfd_error_handler
14898 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14899 ibfd, obfd);
14900 else
14901 _bfd_error_handler
14902 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14903 ibfd, obfd);
14904
14905 flags_compatible = FALSE;
14906 }
14907
14908 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14909 {
14910 if (in_flags & EF_ARM_VFP_FLOAT)
14911 _bfd_error_handler
14912 (_("error: %B uses VFP instructions, whereas %B does not"),
14913 ibfd, obfd);
14914 else
14915 _bfd_error_handler
14916 (_("error: %B uses FPA instructions, whereas %B does not"),
14917 ibfd, obfd);
14918
14919 flags_compatible = FALSE;
14920 }
14921
14922 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14923 {
14924 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14925 _bfd_error_handler
14926 (_("error: %B uses Maverick instructions, whereas %B does not"),
14927 ibfd, obfd);
14928 else
14929 _bfd_error_handler
14930 (_("error: %B does not use Maverick instructions, whereas %B does"),
14931 ibfd, obfd);
14932
14933 flags_compatible = FALSE;
14934 }
14935
14936#ifdef EF_ARM_SOFT_FLOAT
14937 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14938 {
14939 /* We can allow interworking between code that is VFP format
14940 layout, and uses either soft float or integer regs for
14941 passing floating point arguments and results. We already
14942 know that the APCS_FLOAT flags match; similarly for VFP
14943 flags. */
14944 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14945 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14946 {
14947 if (in_flags & EF_ARM_SOFT_FLOAT)
14948 _bfd_error_handler
14949 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14950 ibfd, obfd);
14951 else
14952 _bfd_error_handler
14953 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14954 ibfd, obfd);
14955
14956 flags_compatible = FALSE;
14957 }
14958 }
14959#endif
14960
14961 /* Interworking mismatch is only a warning. */
14962 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14963 {
14964 if (in_flags & EF_ARM_INTERWORK)
14965 {
14966 _bfd_error_handler
14967 (_("Warning: %B supports interworking, whereas %B does not"),
14968 ibfd, obfd);
14969 }
14970 else
14971 {
14972 _bfd_error_handler
14973 (_("Warning: %B does not support interworking, whereas %B does"),
14974 ibfd, obfd);
14975 }
14976 }
14977 }
14978
14979 return flags_compatible;
14980}
14981
14982
906e58ca 14983/* Symbian OS Targets. */
7f266840 14984
906e58ca 14985#undef TARGET_LITTLE_SYM
7f266840 14986#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 14987#undef TARGET_LITTLE_NAME
7f266840 14988#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 14989#undef TARGET_BIG_SYM
7f266840 14990#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14991#undef TARGET_BIG_NAME
7f266840
DJ		 14992#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14993
14994/* Like elf32_arm_link_hash_table_create -- but overrides
14995 appropriately for Symbian OS. */
906e58ca 14996
7f266840
DJ		 14997static struct bfd_link_hash_table *
14998elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14999{
15000 struct bfd_link_hash_table *ret;
15001
15002 ret = elf32_arm_link_hash_table_create (abfd);
15003 if (ret)
15004 {
15005 struct elf32_arm_link_hash_table *htab
15006 = (struct elf32_arm_link_hash_table *)ret;
15007 /* There is no PLT header for Symbian OS. */
15008 htab->plt_header_size = 0;
95720a86
DJ		 15009 /* The PLT entries are each one instruction and one word. */
15010 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 15011 htab->symbian_p = 1;
33bfe774
JB		 15012 /* Symbian uses armv5t or above, so use_blx is always true. */
15013 htab->use_blx = 1;
67687978 15014 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 15015 }
15016 return ret;
906e58ca 15017}
7f266840 15018
b35d266b 15019static const struct bfd_elf_special_section
551b43fd 15020elf32_arm_symbian_special_sections[] =
7f266840 15021{
5cd3778d
MM		 15022 /* In a BPABI executable, the dynamic linking sections do not go in
15023 the loadable read-only segment. The post-linker may wish to
15024 refer to these sections, but they are not part of the final
15025 program image. */
0112cd26
NC		 15026 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
15027 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
15028 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
15029 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
15030 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 15031 /* These sections do not need to be writable as the SymbianOS
15032 postlinker will arrange things so that no dynamic relocation is
15033 required. */
0112cd26
NC		 15034 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
15035 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
15036 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
15037 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 15038};
15039
c3c76620 15040static void
906e58ca 15041elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 15042 struct bfd_link_info *link_info)
c3c76620
MM		 15043{
15044 /* BPABI objects are never loaded directly by an OS kernel; they are
15045 processed by a postlinker first, into an OS-specific format. If
15046 the D_PAGED bit is set on the file, BFD will align segments on
15047 page boundaries, so that an OS can directly map the file. With
15048 BPABI objects, that just results in wasted space. In addition,
15049 because we clear the D_PAGED bit, map_sections_to_segments will
15050 recognize that the program headers should not be mapped into any
15051 loadable segment. */
15052 abfd->flags &= ~D_PAGED;
906e58ca 15053 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 15054}
7f266840
DJ		 15055
15056static bfd_boolean
906e58ca 15057elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 15058 struct bfd_link_info *info)
7f266840
DJ		 15059{
15060 struct elf_segment_map *m;
15061 asection *dynsec;
15062
7f266840
DJ		 15063 /* BPABI shared libraries and executables should have a PT_DYNAMIC
15064 segment. However, because the .dynamic section is not marked
15065 with SEC_LOAD, the generic ELF code will not create such a
15066 segment. */
15067 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
15068 if (dynsec)
15069 {
8ded5a0f
AM		 15070 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
15071 if (m->p_type == PT_DYNAMIC)
15072 break;
15073
15074 if (m == NULL)
15075 {
15076 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
15077 m->next = elf_tdata (abfd)->segment_map;
15078 elf_tdata (abfd)->segment_map = m;
15079 }
7f266840
DJ		 15080 }
15081
b294bdf8
MM		 15082 /* Also call the generic arm routine. */
15083 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 15084}
15085
95720a86
DJ		 15086/* Return address for Ith PLT stub in section PLT, for relocation REL
15087 or (bfd_vma) -1 if it should not be included. */
15088
15089static bfd_vma
15090elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
15091 const arelent *rel ATTRIBUTE_UNUSED)
15092{
15093 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
15094}
15095
15096
8029a119 15097#undef elf32_bed
7f266840
DJ		 15098#define elf32_bed elf32_arm_symbian_bed
15099
15100/* The dynamic sections are not allocated on SymbianOS; the postlinker
15101 will process them and then discard them. */
906e58ca 15102#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 15103#define ELF_DYNAMIC_SEC_FLAGS \
15104 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
15105
00a97672 15106#undef elf_backend_add_symbol_hook
00a97672 15107#undef elf_backend_emit_relocs
c3c76620 15108
906e58ca
NC		 15109#undef bfd_elf32_bfd_link_hash_table_create
15110#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
15111#undef elf_backend_special_sections
15112#define elf_backend_special_sections elf32_arm_symbian_special_sections
15113#undef elf_backend_begin_write_processing
15114#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
15115#undef elf_backend_final_write_processing
15116#define elf_backend_final_write_processing elf32_arm_final_write_processing
15117
15118#undef elf_backend_modify_segment_map
7f266840
DJ		 15119#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
15120
15121/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 15122#undef elf_backend_got_header_size
7f266840
DJ		 15123#define elf_backend_got_header_size 0
15124
15125/* Similarly, there is no .got.plt section. */
906e58ca 15126#undef elf_backend_want_got_plt
7f266840
DJ		 15127#define elf_backend_want_got_plt 0
15128
906e58ca 15129#undef elf_backend_plt_sym_val
95720a86
DJ		 15130#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
15131
906e58ca 15132#undef elf_backend_may_use_rel_p
00a97672 15133#define elf_backend_may_use_rel_p 1
906e58ca 15134#undef elf_backend_may_use_rela_p
00a97672 15135#define elf_backend_may_use_rela_p 0
906e58ca 15136#undef elf_backend_default_use_rela_p
00a97672 15137#define elf_backend_default_use_rela_p 0
906e58ca 15138#undef elf_backend_want_plt_sym
00a97672 15139#define elf_backend_want_plt_sym 0
906e58ca 15140#undef ELF_MAXPAGESIZE
00a97672 15141#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 15142
7f266840 15143#include "elf32-target.h"
GDB Binutils - Deliverables
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