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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
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252b5132 1/* 32-bit ELF support for ARM
e44a2c9c
AM		 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
7f266840 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
00a97672 24#include "libiberty.h"
7f266840
DJ		 25#include "libbfd.h"
26#include "elf-bfd.h"
00a97672 27#include "elf-vxworks.h"
ee065d83 28#include "elf/arm.h"
7f266840
DJ		 29
30#ifndef NUM_ELEM
31#define NUM_ELEM(a) (sizeof (a) / (sizeof (a)[0]))
32#endif
33
00a97672
RS		 34/* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36#define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39/* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41#define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46/* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48#define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53/* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55#define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
7f266840
DJ		 60#define elf_info_to_howto 0
61#define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63#define ARM_ELF_ABI_VERSION 0
64#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
24718e3b 66static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 67
7f266840
DJ		 68/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
69 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
70 in that slot. */
71
c19d1205 72static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840
DJ		 73{
74 /* No relocation */
75 HOWTO (R_ARM_NONE, /* type */
76 0, /* rightshift */
77 0, /* size (0 = byte, 1 = short, 2 = long) */
78 0, /* bitsize */
79 FALSE, /* pc_relative */
80 0, /* bitpos */
81 complain_overflow_dont,/* complain_on_overflow */
82 bfd_elf_generic_reloc, /* special_function */
83 "R_ARM_NONE", /* name */
84 FALSE, /* partial_inplace */
85 0, /* src_mask */
86 0, /* dst_mask */
87 FALSE), /* pcrel_offset */
88
89 HOWTO (R_ARM_PC24, /* type */
90 2, /* rightshift */
91 2, /* size (0 = byte, 1 = short, 2 = long) */
92 24, /* bitsize */
93 TRUE, /* pc_relative */
94 0, /* bitpos */
95 complain_overflow_signed,/* complain_on_overflow */
96 bfd_elf_generic_reloc, /* special_function */
97 "R_ARM_PC24", /* name */
98 FALSE, /* partial_inplace */
99 0x00ffffff, /* src_mask */
100 0x00ffffff, /* dst_mask */
101 TRUE), /* pcrel_offset */
102
103 /* 32 bit absolute */
104 HOWTO (R_ARM_ABS32, /* type */
105 0, /* rightshift */
106 2, /* size (0 = byte, 1 = short, 2 = long) */
107 32, /* bitsize */
108 FALSE, /* pc_relative */
109 0, /* bitpos */
110 complain_overflow_bitfield,/* complain_on_overflow */
111 bfd_elf_generic_reloc, /* special_function */
112 "R_ARM_ABS32", /* name */
113 FALSE, /* partial_inplace */
114 0xffffffff, /* src_mask */
115 0xffffffff, /* dst_mask */
116 FALSE), /* pcrel_offset */
117
118 /* standard 32bit pc-relative reloc */
119 HOWTO (R_ARM_REL32, /* type */
120 0, /* rightshift */
121 2, /* size (0 = byte, 1 = short, 2 = long) */
122 32, /* bitsize */
123 TRUE, /* pc_relative */
124 0, /* bitpos */
125 complain_overflow_bitfield,/* complain_on_overflow */
126 bfd_elf_generic_reloc, /* special_function */
127 "R_ARM_REL32", /* name */
128 FALSE, /* partial_inplace */
129 0xffffffff, /* src_mask */
130 0xffffffff, /* dst_mask */
131 TRUE), /* pcrel_offset */
132
c19d1205 133 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 134 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 135 0, /* rightshift */
136 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 137 32, /* bitsize */
138 TRUE, /* pc_relative */
7f266840 139 0, /* bitpos */
4962c51a 140 complain_overflow_dont,/* complain_on_overflow */
7f266840 141 bfd_elf_generic_reloc, /* special_function */
4962c51a 142 "R_ARM_LDR_PC_G0", /* name */
7f266840 143 FALSE, /* partial_inplace */
4962c51a
MS		 144 0xffffffff, /* src_mask */
145 0xffffffff, /* dst_mask */
146 TRUE), /* pcrel_offset */
7f266840
DJ		 147
148 /* 16 bit absolute */
149 HOWTO (R_ARM_ABS16, /* type */
150 0, /* rightshift */
151 1, /* size (0 = byte, 1 = short, 2 = long) */
152 16, /* bitsize */
153 FALSE, /* pc_relative */
154 0, /* bitpos */
155 complain_overflow_bitfield,/* complain_on_overflow */
156 bfd_elf_generic_reloc, /* special_function */
157 "R_ARM_ABS16", /* name */
158 FALSE, /* partial_inplace */
159 0x0000ffff, /* src_mask */
160 0x0000ffff, /* dst_mask */
161 FALSE), /* pcrel_offset */
162
163 /* 12 bit absolute */
164 HOWTO (R_ARM_ABS12, /* type */
165 0, /* rightshift */
166 2, /* size (0 = byte, 1 = short, 2 = long) */
167 12, /* bitsize */
168 FALSE, /* pc_relative */
169 0, /* bitpos */
170 complain_overflow_bitfield,/* complain_on_overflow */
171 bfd_elf_generic_reloc, /* special_function */
172 "R_ARM_ABS12", /* name */
173 FALSE, /* partial_inplace */
00a97672
RS		 174 0x00000fff, /* src_mask */
175 0x00000fff, /* dst_mask */
7f266840
DJ		 176 FALSE), /* pcrel_offset */
177
178 HOWTO (R_ARM_THM_ABS5, /* type */
179 6, /* rightshift */
180 1, /* size (0 = byte, 1 = short, 2 = long) */
181 5, /* bitsize */
182 FALSE, /* pc_relative */
183 0, /* bitpos */
184 complain_overflow_bitfield,/* complain_on_overflow */
185 bfd_elf_generic_reloc, /* special_function */
186 "R_ARM_THM_ABS5", /* name */
187 FALSE, /* partial_inplace */
188 0x000007e0, /* src_mask */
189 0x000007e0, /* dst_mask */
190 FALSE), /* pcrel_offset */
191
192 /* 8 bit absolute */
193 HOWTO (R_ARM_ABS8, /* type */
194 0, /* rightshift */
195 0, /* size (0 = byte, 1 = short, 2 = long) */
196 8, /* bitsize */
197 FALSE, /* pc_relative */
198 0, /* bitpos */
199 complain_overflow_bitfield,/* complain_on_overflow */
200 bfd_elf_generic_reloc, /* special_function */
201 "R_ARM_ABS8", /* name */
202 FALSE, /* partial_inplace */
203 0x000000ff, /* src_mask */
204 0x000000ff, /* dst_mask */
205 FALSE), /* pcrel_offset */
206
207 HOWTO (R_ARM_SBREL32, /* type */
208 0, /* rightshift */
209 2, /* size (0 = byte, 1 = short, 2 = long) */
210 32, /* bitsize */
211 FALSE, /* pc_relative */
212 0, /* bitpos */
213 complain_overflow_dont,/* complain_on_overflow */
214 bfd_elf_generic_reloc, /* special_function */
215 "R_ARM_SBREL32", /* name */
216 FALSE, /* partial_inplace */
217 0xffffffff, /* src_mask */
218 0xffffffff, /* dst_mask */
219 FALSE), /* pcrel_offset */
220
c19d1205 221 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 222 1, /* rightshift */
223 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 224 25, /* bitsize */
7f266840
DJ		 225 TRUE, /* pc_relative */
226 0, /* bitpos */
227 complain_overflow_signed,/* complain_on_overflow */
228 bfd_elf_generic_reloc, /* special_function */
c19d1205 229 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 230 FALSE, /* partial_inplace */
231 0x07ff07ff, /* src_mask */
232 0x07ff07ff, /* dst_mask */
233 TRUE), /* pcrel_offset */
234
235 HOWTO (R_ARM_THM_PC8, /* type */
236 1, /* rightshift */
237 1, /* size (0 = byte, 1 = short, 2 = long) */
238 8, /* bitsize */
239 TRUE, /* pc_relative */
240 0, /* bitpos */
241 complain_overflow_signed,/* complain_on_overflow */
242 bfd_elf_generic_reloc, /* special_function */
243 "R_ARM_THM_PC8", /* name */
244 FALSE, /* partial_inplace */
245 0x000000ff, /* src_mask */
246 0x000000ff, /* dst_mask */
247 TRUE), /* pcrel_offset */
248
c19d1205 249 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 250 1, /* rightshift */
251 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 252 32, /* bitsize */
253 FALSE, /* pc_relative */
7f266840
DJ		 254 0, /* bitpos */
255 complain_overflow_signed,/* complain_on_overflow */
256 bfd_elf_generic_reloc, /* special_function */
c19d1205 257 "R_ARM_BREL_ADJ", /* name */
7f266840 258 FALSE, /* partial_inplace */
c19d1205
ZW		 259 0xffffffff, /* src_mask */
260 0xffffffff, /* dst_mask */
261 FALSE), /* pcrel_offset */
7f266840
DJ		 262
263 HOWTO (R_ARM_SWI24, /* type */
264 0, /* rightshift */
265 0, /* size (0 = byte, 1 = short, 2 = long) */
266 0, /* bitsize */
267 FALSE, /* pc_relative */
268 0, /* bitpos */
269 complain_overflow_signed,/* complain_on_overflow */
270 bfd_elf_generic_reloc, /* special_function */
271 "R_ARM_SWI24", /* name */
272 FALSE, /* partial_inplace */
273 0x00000000, /* src_mask */
274 0x00000000, /* dst_mask */
275 FALSE), /* pcrel_offset */
276
277 HOWTO (R_ARM_THM_SWI8, /* type */
278 0, /* rightshift */
279 0, /* size (0 = byte, 1 = short, 2 = long) */
280 0, /* bitsize */
281 FALSE, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_signed,/* complain_on_overflow */
284 bfd_elf_generic_reloc, /* special_function */
285 "R_ARM_SWI8", /* name */
286 FALSE, /* partial_inplace */
287 0x00000000, /* src_mask */
288 0x00000000, /* dst_mask */
289 FALSE), /* pcrel_offset */
290
291 /* BLX instruction for the ARM. */
292 HOWTO (R_ARM_XPC25, /* type */
293 2, /* rightshift */
294 2, /* size (0 = byte, 1 = short, 2 = long) */
295 25, /* bitsize */
296 TRUE, /* pc_relative */
297 0, /* bitpos */
298 complain_overflow_signed,/* complain_on_overflow */
299 bfd_elf_generic_reloc, /* special_function */
300 "R_ARM_XPC25", /* name */
301 FALSE, /* partial_inplace */
302 0x00ffffff, /* src_mask */
303 0x00ffffff, /* dst_mask */
304 TRUE), /* pcrel_offset */
305
306 /* BLX instruction for the Thumb. */
307 HOWTO (R_ARM_THM_XPC22, /* type */
308 2, /* rightshift */
309 2, /* size (0 = byte, 1 = short, 2 = long) */
310 22, /* bitsize */
311 TRUE, /* pc_relative */
312 0, /* bitpos */
313 complain_overflow_signed,/* complain_on_overflow */
314 bfd_elf_generic_reloc, /* special_function */
315 "R_ARM_THM_XPC22", /* name */
316 FALSE, /* partial_inplace */
317 0x07ff07ff, /* src_mask */
318 0x07ff07ff, /* dst_mask */
319 TRUE), /* pcrel_offset */
320
ba93b8ac 321 /* Dynamic TLS relocations. */
7f266840 322
ba93b8ac
DJ		 323 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
324 0, /* rightshift */
325 2, /* size (0 = byte, 1 = short, 2 = long) */
326 32, /* bitsize */
327 FALSE, /* pc_relative */
328 0, /* bitpos */
329 complain_overflow_bitfield,/* complain_on_overflow */
330 bfd_elf_generic_reloc, /* special_function */
331 "R_ARM_TLS_DTPMOD32", /* name */
332 TRUE, /* partial_inplace */
333 0xffffffff, /* src_mask */
334 0xffffffff, /* dst_mask */
335 FALSE), /* pcrel_offset */
7f266840 336
ba93b8ac
DJ		 337 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
338 0, /* rightshift */
339 2, /* size (0 = byte, 1 = short, 2 = long) */
340 32, /* bitsize */
341 FALSE, /* pc_relative */
342 0, /* bitpos */
343 complain_overflow_bitfield,/* complain_on_overflow */
344 bfd_elf_generic_reloc, /* special_function */
345 "R_ARM_TLS_DTPOFF32", /* name */
346 TRUE, /* partial_inplace */
347 0xffffffff, /* src_mask */
348 0xffffffff, /* dst_mask */
349 FALSE), /* pcrel_offset */
7f266840 350
ba93b8ac
DJ		 351 HOWTO (R_ARM_TLS_TPOFF32, /* type */
352 0, /* rightshift */
353 2, /* size (0 = byte, 1 = short, 2 = long) */
354 32, /* bitsize */
355 FALSE, /* pc_relative */
356 0, /* bitpos */
357 complain_overflow_bitfield,/* complain_on_overflow */
358 bfd_elf_generic_reloc, /* special_function */
359 "R_ARM_TLS_TPOFF32", /* name */
360 TRUE, /* partial_inplace */
361 0xffffffff, /* src_mask */
362 0xffffffff, /* dst_mask */
363 FALSE), /* pcrel_offset */
7f266840
DJ		 364
365 /* Relocs used in ARM Linux */
366
367 HOWTO (R_ARM_COPY, /* type */
368 0, /* rightshift */
369 2, /* size (0 = byte, 1 = short, 2 = long) */
370 32, /* bitsize */
371 FALSE, /* pc_relative */
372 0, /* bitpos */
373 complain_overflow_bitfield,/* complain_on_overflow */
374 bfd_elf_generic_reloc, /* special_function */
375 "R_ARM_COPY", /* name */
376 TRUE, /* partial_inplace */
377 0xffffffff, /* src_mask */
378 0xffffffff, /* dst_mask */
379 FALSE), /* pcrel_offset */
380
381 HOWTO (R_ARM_GLOB_DAT, /* type */
382 0, /* rightshift */
383 2, /* size (0 = byte, 1 = short, 2 = long) */
384 32, /* bitsize */
385 FALSE, /* pc_relative */
386 0, /* bitpos */
387 complain_overflow_bitfield,/* complain_on_overflow */
388 bfd_elf_generic_reloc, /* special_function */
389 "R_ARM_GLOB_DAT", /* name */
390 TRUE, /* partial_inplace */
391 0xffffffff, /* src_mask */
392 0xffffffff, /* dst_mask */
393 FALSE), /* pcrel_offset */
394
395 HOWTO (R_ARM_JUMP_SLOT, /* type */
396 0, /* rightshift */
397 2, /* size (0 = byte, 1 = short, 2 = long) */
398 32, /* bitsize */
399 FALSE, /* pc_relative */
400 0, /* bitpos */
401 complain_overflow_bitfield,/* complain_on_overflow */
402 bfd_elf_generic_reloc, /* special_function */
403 "R_ARM_JUMP_SLOT", /* name */
404 TRUE, /* partial_inplace */
405 0xffffffff, /* src_mask */
406 0xffffffff, /* dst_mask */
407 FALSE), /* pcrel_offset */
408
409 HOWTO (R_ARM_RELATIVE, /* type */
410 0, /* rightshift */
411 2, /* size (0 = byte, 1 = short, 2 = long) */
412 32, /* bitsize */
413 FALSE, /* pc_relative */
414 0, /* bitpos */
415 complain_overflow_bitfield,/* complain_on_overflow */
416 bfd_elf_generic_reloc, /* special_function */
417 "R_ARM_RELATIVE", /* name */
418 TRUE, /* partial_inplace */
419 0xffffffff, /* src_mask */
420 0xffffffff, /* dst_mask */
421 FALSE), /* pcrel_offset */
422
c19d1205 423 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 424 0, /* rightshift */
425 2, /* size (0 = byte, 1 = short, 2 = long) */
426 32, /* bitsize */
427 FALSE, /* pc_relative */
428 0, /* bitpos */
429 complain_overflow_bitfield,/* complain_on_overflow */
430 bfd_elf_generic_reloc, /* special_function */
c19d1205 431 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 432 TRUE, /* partial_inplace */
433 0xffffffff, /* src_mask */
434 0xffffffff, /* dst_mask */
435 FALSE), /* pcrel_offset */
436
437 HOWTO (R_ARM_GOTPC, /* type */
438 0, /* rightshift */
439 2, /* size (0 = byte, 1 = short, 2 = long) */
440 32, /* bitsize */
441 TRUE, /* pc_relative */
442 0, /* bitpos */
443 complain_overflow_bitfield,/* complain_on_overflow */
444 bfd_elf_generic_reloc, /* special_function */
445 "R_ARM_GOTPC", /* name */
446 TRUE, /* partial_inplace */
447 0xffffffff, /* src_mask */
448 0xffffffff, /* dst_mask */
449 TRUE), /* pcrel_offset */
450
451 HOWTO (R_ARM_GOT32, /* type */
452 0, /* rightshift */
453 2, /* size (0 = byte, 1 = short, 2 = long) */
454 32, /* bitsize */
455 FALSE, /* pc_relative */
456 0, /* bitpos */
457 complain_overflow_bitfield,/* complain_on_overflow */
458 bfd_elf_generic_reloc, /* special_function */
459 "R_ARM_GOT32", /* name */
460 TRUE, /* partial_inplace */
461 0xffffffff, /* src_mask */
462 0xffffffff, /* dst_mask */
463 FALSE), /* pcrel_offset */
464
465 HOWTO (R_ARM_PLT32, /* type */
466 2, /* rightshift */
467 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 468 24, /* bitsize */
7f266840
DJ		 469 TRUE, /* pc_relative */
470 0, /* bitpos */
471 complain_overflow_bitfield,/* complain_on_overflow */
472 bfd_elf_generic_reloc, /* special_function */
473 "R_ARM_PLT32", /* name */
ce490eda 474 FALSE, /* partial_inplace */
7f266840
DJ		 475 0x00ffffff, /* src_mask */
476 0x00ffffff, /* dst_mask */
477 TRUE), /* pcrel_offset */
478
479 HOWTO (R_ARM_CALL, /* type */
480 2, /* rightshift */
481 2, /* size (0 = byte, 1 = short, 2 = long) */
482 24, /* bitsize */
483 TRUE, /* pc_relative */
484 0, /* bitpos */
485 complain_overflow_signed,/* complain_on_overflow */
486 bfd_elf_generic_reloc, /* special_function */
487 "R_ARM_CALL", /* name */
488 FALSE, /* partial_inplace */
489 0x00ffffff, /* src_mask */
490 0x00ffffff, /* dst_mask */
491 TRUE), /* pcrel_offset */
492
493 HOWTO (R_ARM_JUMP24, /* type */
494 2, /* rightshift */
495 2, /* size (0 = byte, 1 = short, 2 = long) */
496 24, /* bitsize */
497 TRUE, /* pc_relative */
498 0, /* bitpos */
499 complain_overflow_signed,/* complain_on_overflow */
500 bfd_elf_generic_reloc, /* special_function */
501 "R_ARM_JUMP24", /* name */
502 FALSE, /* partial_inplace */
503 0x00ffffff, /* src_mask */
504 0x00ffffff, /* dst_mask */
505 TRUE), /* pcrel_offset */
506
c19d1205
ZW		 507 HOWTO (R_ARM_THM_JUMP24, /* type */
508 1, /* rightshift */
509 2, /* size (0 = byte, 1 = short, 2 = long) */
510 24, /* bitsize */
511 TRUE, /* pc_relative */
7f266840 512 0, /* bitpos */
c19d1205 513 complain_overflow_signed,/* complain_on_overflow */
7f266840 514 bfd_elf_generic_reloc, /* special_function */
c19d1205 515 "R_ARM_THM_JUMP24", /* name */
7f266840 516 FALSE, /* partial_inplace */
c19d1205
ZW		 517 0x07ff2fff, /* src_mask */
518 0x07ff2fff, /* dst_mask */
519 TRUE), /* pcrel_offset */
7f266840 520
c19d1205 521 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 522 0, /* rightshift */
c19d1205
ZW		 523 2, /* size (0 = byte, 1 = short, 2 = long) */
524 32, /* bitsize */
7f266840
DJ		 525 FALSE, /* pc_relative */
526 0, /* bitpos */
527 complain_overflow_dont,/* complain_on_overflow */
528 bfd_elf_generic_reloc, /* special_function */
c19d1205 529 "R_ARM_BASE_ABS", /* name */
7f266840 530 FALSE, /* partial_inplace */
c19d1205
ZW		 531 0xffffffff, /* src_mask */
532 0xffffffff, /* dst_mask */
7f266840
DJ		 533 FALSE), /* pcrel_offset */
534
535 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
536 0, /* rightshift */
537 2, /* size (0 = byte, 1 = short, 2 = long) */
538 12, /* bitsize */
539 TRUE, /* pc_relative */
540 0, /* bitpos */
541 complain_overflow_dont,/* complain_on_overflow */
542 bfd_elf_generic_reloc, /* special_function */
543 "R_ARM_ALU_PCREL_7_0", /* name */
544 FALSE, /* partial_inplace */
545 0x00000fff, /* src_mask */
546 0x00000fff, /* dst_mask */
547 TRUE), /* pcrel_offset */
548
549 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
550 0, /* rightshift */
551 2, /* size (0 = byte, 1 = short, 2 = long) */
552 12, /* bitsize */
553 TRUE, /* pc_relative */
554 8, /* bitpos */
555 complain_overflow_dont,/* complain_on_overflow */
556 bfd_elf_generic_reloc, /* special_function */
557 "R_ARM_ALU_PCREL_15_8",/* name */
558 FALSE, /* partial_inplace */
559 0x00000fff, /* src_mask */
560 0x00000fff, /* dst_mask */
561 TRUE), /* pcrel_offset */
562
563 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
564 0, /* rightshift */
565 2, /* size (0 = byte, 1 = short, 2 = long) */
566 12, /* bitsize */
567 TRUE, /* pc_relative */
568 16, /* bitpos */
569 complain_overflow_dont,/* complain_on_overflow */
570 bfd_elf_generic_reloc, /* special_function */
571 "R_ARM_ALU_PCREL_23_15",/* name */
572 FALSE, /* partial_inplace */
573 0x00000fff, /* src_mask */
574 0x00000fff, /* dst_mask */
575 TRUE), /* pcrel_offset */
576
577 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
578 0, /* rightshift */
579 2, /* size (0 = byte, 1 = short, 2 = long) */
580 12, /* bitsize */
581 FALSE, /* pc_relative */
582 0, /* bitpos */
583 complain_overflow_dont,/* complain_on_overflow */
584 bfd_elf_generic_reloc, /* special_function */
585 "R_ARM_LDR_SBREL_11_0",/* name */
586 FALSE, /* partial_inplace */
587 0x00000fff, /* src_mask */
588 0x00000fff, /* dst_mask */
589 FALSE), /* pcrel_offset */
590
591 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
592 0, /* rightshift */
593 2, /* size (0 = byte, 1 = short, 2 = long) */
594 8, /* bitsize */
595 FALSE, /* pc_relative */
596 12, /* bitpos */
597 complain_overflow_dont,/* complain_on_overflow */
598 bfd_elf_generic_reloc, /* special_function */
599 "R_ARM_ALU_SBREL_19_12",/* name */
600 FALSE, /* partial_inplace */
601 0x000ff000, /* src_mask */
602 0x000ff000, /* dst_mask */
603 FALSE), /* pcrel_offset */
604
605 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
606 0, /* rightshift */
607 2, /* size (0 = byte, 1 = short, 2 = long) */
608 8, /* bitsize */
609 FALSE, /* pc_relative */
610 20, /* bitpos */
611 complain_overflow_dont,/* complain_on_overflow */
612 bfd_elf_generic_reloc, /* special_function */
613 "R_ARM_ALU_SBREL_27_20",/* name */
614 FALSE, /* partial_inplace */
615 0x0ff00000, /* src_mask */
616 0x0ff00000, /* dst_mask */
617 FALSE), /* pcrel_offset */
618
619 HOWTO (R_ARM_TARGET1, /* type */
620 0, /* rightshift */
621 2, /* size (0 = byte, 1 = short, 2 = long) */
622 32, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_dont,/* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_ARM_TARGET1", /* name */
628 FALSE, /* partial_inplace */
629 0xffffffff, /* src_mask */
630 0xffffffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 HOWTO (R_ARM_ROSEGREL32, /* type */
634 0, /* rightshift */
635 2, /* size (0 = byte, 1 = short, 2 = long) */
636 32, /* bitsize */
637 FALSE, /* pc_relative */
638 0, /* bitpos */
639 complain_overflow_dont,/* complain_on_overflow */
640 bfd_elf_generic_reloc, /* special_function */
641 "R_ARM_ROSEGREL32", /* name */
642 FALSE, /* partial_inplace */
643 0xffffffff, /* src_mask */
644 0xffffffff, /* dst_mask */
645 FALSE), /* pcrel_offset */
646
647 HOWTO (R_ARM_V4BX, /* type */
648 0, /* rightshift */
649 2, /* size (0 = byte, 1 = short, 2 = long) */
650 32, /* bitsize */
651 FALSE, /* pc_relative */
652 0, /* bitpos */
653 complain_overflow_dont,/* complain_on_overflow */
654 bfd_elf_generic_reloc, /* special_function */
655 "R_ARM_V4BX", /* name */
656 FALSE, /* partial_inplace */
657 0xffffffff, /* src_mask */
658 0xffffffff, /* dst_mask */
659 FALSE), /* pcrel_offset */
660
661 HOWTO (R_ARM_TARGET2, /* type */
662 0, /* rightshift */
663 2, /* size (0 = byte, 1 = short, 2 = long) */
664 32, /* bitsize */
665 FALSE, /* pc_relative */
666 0, /* bitpos */
667 complain_overflow_signed,/* complain_on_overflow */
668 bfd_elf_generic_reloc, /* special_function */
669 "R_ARM_TARGET2", /* name */
670 FALSE, /* partial_inplace */
671 0xffffffff, /* src_mask */
672 0xffffffff, /* dst_mask */
673 TRUE), /* pcrel_offset */
674
675 HOWTO (R_ARM_PREL31, /* type */
676 0, /* rightshift */
677 2, /* size (0 = byte, 1 = short, 2 = long) */
678 31, /* bitsize */
679 TRUE, /* pc_relative */
680 0, /* bitpos */
681 complain_overflow_signed,/* complain_on_overflow */
682 bfd_elf_generic_reloc, /* special_function */
683 "R_ARM_PREL31", /* name */
684 FALSE, /* partial_inplace */
685 0x7fffffff, /* src_mask */
686 0x7fffffff, /* dst_mask */
687 TRUE), /* pcrel_offset */
c19d1205
ZW		 688
689 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
690 0, /* rightshift */
691 2, /* size (0 = byte, 1 = short, 2 = long) */
692 16, /* bitsize */
693 FALSE, /* pc_relative */
694 0, /* bitpos */
695 complain_overflow_dont,/* complain_on_overflow */
696 bfd_elf_generic_reloc, /* special_function */
697 "R_ARM_MOVW_ABS_NC", /* name */
698 FALSE, /* partial_inplace */
699 0x0000ffff, /* src_mask */
700 0x0000ffff, /* dst_mask */
701 FALSE), /* pcrel_offset */
702
703 HOWTO (R_ARM_MOVT_ABS, /* type */
704 0, /* rightshift */
705 2, /* size (0 = byte, 1 = short, 2 = long) */
706 16, /* bitsize */
707 FALSE, /* pc_relative */
708 0, /* bitpos */
709 complain_overflow_bitfield,/* complain_on_overflow */
710 bfd_elf_generic_reloc, /* special_function */
711 "R_ARM_MOVT_ABS", /* name */
712 FALSE, /* partial_inplace */
713 0x0000ffff, /* src_mask */
714 0x0000ffff, /* dst_mask */
715 FALSE), /* pcrel_offset */
716
717 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
718 0, /* rightshift */
719 2, /* size (0 = byte, 1 = short, 2 = long) */
720 16, /* bitsize */
721 TRUE, /* pc_relative */
722 0, /* bitpos */
723 complain_overflow_dont,/* complain_on_overflow */
724 bfd_elf_generic_reloc, /* special_function */
725 "R_ARM_MOVW_PREL_NC", /* name */
726 FALSE, /* partial_inplace */
727 0x0000ffff, /* src_mask */
728 0x0000ffff, /* dst_mask */
729 TRUE), /* pcrel_offset */
730
731 HOWTO (R_ARM_MOVT_PREL, /* type */
732 0, /* rightshift */
733 2, /* size (0 = byte, 1 = short, 2 = long) */
734 16, /* bitsize */
735 TRUE, /* pc_relative */
736 0, /* bitpos */
737 complain_overflow_bitfield,/* complain_on_overflow */
738 bfd_elf_generic_reloc, /* special_function */
739 "R_ARM_MOVT_PREL", /* name */
740 FALSE, /* partial_inplace */
741 0x0000ffff, /* src_mask */
742 0x0000ffff, /* dst_mask */
743 TRUE), /* pcrel_offset */
744
745 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
746 0, /* rightshift */
747 2, /* size (0 = byte, 1 = short, 2 = long) */
748 16, /* bitsize */
749 FALSE, /* pc_relative */
750 0, /* bitpos */
751 complain_overflow_dont,/* complain_on_overflow */
752 bfd_elf_generic_reloc, /* special_function */
753 "R_ARM_THM_MOVW_ABS_NC",/* name */
754 FALSE, /* partial_inplace */
755 0x040f70ff, /* src_mask */
756 0x040f70ff, /* dst_mask */
757 FALSE), /* pcrel_offset */
758
759 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
760 0, /* rightshift */
761 2, /* size (0 = byte, 1 = short, 2 = long) */
762 16, /* bitsize */
763 FALSE, /* pc_relative */
764 0, /* bitpos */
765 complain_overflow_bitfield,/* complain_on_overflow */
766 bfd_elf_generic_reloc, /* special_function */
767 "R_ARM_THM_MOVT_ABS", /* name */
768 FALSE, /* partial_inplace */
769 0x040f70ff, /* src_mask */
770 0x040f70ff, /* dst_mask */
771 FALSE), /* pcrel_offset */
772
773 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
774 0, /* rightshift */
775 2, /* size (0 = byte, 1 = short, 2 = long) */
776 16, /* bitsize */
777 TRUE, /* pc_relative */
778 0, /* bitpos */
779 complain_overflow_dont,/* complain_on_overflow */
780 bfd_elf_generic_reloc, /* special_function */
781 "R_ARM_THM_MOVW_PREL_NC",/* name */
782 FALSE, /* partial_inplace */
783 0x040f70ff, /* src_mask */
784 0x040f70ff, /* dst_mask */
785 TRUE), /* pcrel_offset */
786
787 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
788 0, /* rightshift */
789 2, /* size (0 = byte, 1 = short, 2 = long) */
790 16, /* bitsize */
791 TRUE, /* pc_relative */
792 0, /* bitpos */
793 complain_overflow_bitfield,/* complain_on_overflow */
794 bfd_elf_generic_reloc, /* special_function */
795 "R_ARM_THM_MOVT_PREL", /* name */
796 FALSE, /* partial_inplace */
797 0x040f70ff, /* src_mask */
798 0x040f70ff, /* dst_mask */
799 TRUE), /* pcrel_offset */
800
801 HOWTO (R_ARM_THM_JUMP19, /* type */
802 1, /* rightshift */
803 2, /* size (0 = byte, 1 = short, 2 = long) */
804 19, /* bitsize */
805 TRUE, /* pc_relative */
806 0, /* bitpos */
807 complain_overflow_signed,/* complain_on_overflow */
808 bfd_elf_generic_reloc, /* special_function */
809 "R_ARM_THM_JUMP19", /* name */
810 FALSE, /* partial_inplace */
811 0x043f2fff, /* src_mask */
812 0x043f2fff, /* dst_mask */
813 TRUE), /* pcrel_offset */
814
815 HOWTO (R_ARM_THM_JUMP6, /* type */
816 1, /* rightshift */
817 1, /* size (0 = byte, 1 = short, 2 = long) */
818 6, /* bitsize */
819 TRUE, /* pc_relative */
820 0, /* bitpos */
821 complain_overflow_unsigned,/* complain_on_overflow */
822 bfd_elf_generic_reloc, /* special_function */
823 "R_ARM_THM_JUMP6", /* name */
824 FALSE, /* partial_inplace */
825 0x02f8, /* src_mask */
826 0x02f8, /* dst_mask */
827 TRUE), /* pcrel_offset */
828
829 /* These are declared as 13-bit signed relocations because we can
830 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
831 versa. */
832 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
833 0, /* rightshift */
834 2, /* size (0 = byte, 1 = short, 2 = long) */
835 13, /* bitsize */
836 TRUE, /* pc_relative */
837 0, /* bitpos */
2cab6cc3 838 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 839 bfd_elf_generic_reloc, /* special_function */
840 "R_ARM_THM_ALU_PREL_11_0",/* name */
841 FALSE, /* partial_inplace */
2cab6cc3
MS		 842 0xffffffff, /* src_mask */
843 0xffffffff, /* dst_mask */
c19d1205
ZW		 844 TRUE), /* pcrel_offset */
845
846 HOWTO (R_ARM_THM_PC12, /* type */
847 0, /* rightshift */
848 2, /* size (0 = byte, 1 = short, 2 = long) */
849 13, /* bitsize */
850 TRUE, /* pc_relative */
851 0, /* bitpos */
2cab6cc3 852 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 853 bfd_elf_generic_reloc, /* special_function */
854 "R_ARM_THM_PC12", /* name */
855 FALSE, /* partial_inplace */
2cab6cc3
MS		 856 0xffffffff, /* src_mask */
857 0xffffffff, /* dst_mask */
c19d1205
ZW		 858 TRUE), /* pcrel_offset */
859
860 HOWTO (R_ARM_ABS32_NOI, /* type */
861 0, /* rightshift */
862 2, /* size (0 = byte, 1 = short, 2 = long) */
863 32, /* bitsize */
864 FALSE, /* pc_relative */
865 0, /* bitpos */
866 complain_overflow_dont,/* complain_on_overflow */
867 bfd_elf_generic_reloc, /* special_function */
868 "R_ARM_ABS32_NOI", /* name */
869 FALSE, /* partial_inplace */
870 0xffffffff, /* src_mask */
871 0xffffffff, /* dst_mask */
872 FALSE), /* pcrel_offset */
873
874 HOWTO (R_ARM_REL32_NOI, /* type */
875 0, /* rightshift */
876 2, /* size (0 = byte, 1 = short, 2 = long) */
877 32, /* bitsize */
878 TRUE, /* pc_relative */
879 0, /* bitpos */
880 complain_overflow_dont,/* complain_on_overflow */
881 bfd_elf_generic_reloc, /* special_function */
882 "R_ARM_REL32_NOI", /* name */
883 FALSE, /* partial_inplace */
884 0xffffffff, /* src_mask */
885 0xffffffff, /* dst_mask */
886 FALSE), /* pcrel_offset */
7f266840 887
4962c51a
MS		 888 /* Group relocations. */
889
890 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
891 0, /* rightshift */
892 2, /* size (0 = byte, 1 = short, 2 = long) */
893 32, /* bitsize */
894 TRUE, /* pc_relative */
895 0, /* bitpos */
896 complain_overflow_dont,/* complain_on_overflow */
897 bfd_elf_generic_reloc, /* special_function */
898 "R_ARM_ALU_PC_G0_NC", /* name */
899 FALSE, /* partial_inplace */
900 0xffffffff, /* src_mask */
901 0xffffffff, /* dst_mask */
902 TRUE), /* pcrel_offset */
903
904 HOWTO (R_ARM_ALU_PC_G0, /* type */
905 0, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 32, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_dont,/* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_ARM_ALU_PC_G0", /* name */
913 FALSE, /* partial_inplace */
914 0xffffffff, /* src_mask */
915 0xffffffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
919 0, /* rightshift */
920 2, /* size (0 = byte, 1 = short, 2 = long) */
921 32, /* bitsize */
922 TRUE, /* pc_relative */
923 0, /* bitpos */
924 complain_overflow_dont,/* complain_on_overflow */
925 bfd_elf_generic_reloc, /* special_function */
926 "R_ARM_ALU_PC_G1_NC", /* name */
927 FALSE, /* partial_inplace */
928 0xffffffff, /* src_mask */
929 0xffffffff, /* dst_mask */
930 TRUE), /* pcrel_offset */
931
932 HOWTO (R_ARM_ALU_PC_G1, /* type */
933 0, /* rightshift */
934 2, /* size (0 = byte, 1 = short, 2 = long) */
935 32, /* bitsize */
936 TRUE, /* pc_relative */
937 0, /* bitpos */
938 complain_overflow_dont,/* complain_on_overflow */
939 bfd_elf_generic_reloc, /* special_function */
940 "R_ARM_ALU_PC_G1", /* name */
941 FALSE, /* partial_inplace */
942 0xffffffff, /* src_mask */
943 0xffffffff, /* dst_mask */
944 TRUE), /* pcrel_offset */
945
946 HOWTO (R_ARM_ALU_PC_G2, /* type */
947 0, /* rightshift */
948 2, /* size (0 = byte, 1 = short, 2 = long) */
949 32, /* bitsize */
950 TRUE, /* pc_relative */
951 0, /* bitpos */
952 complain_overflow_dont,/* complain_on_overflow */
953 bfd_elf_generic_reloc, /* special_function */
954 "R_ARM_ALU_PC_G2", /* name */
955 FALSE, /* partial_inplace */
956 0xffffffff, /* src_mask */
957 0xffffffff, /* dst_mask */
958 TRUE), /* pcrel_offset */
959
960 HOWTO (R_ARM_LDR_PC_G1, /* type */
961 0, /* rightshift */
962 2, /* size (0 = byte, 1 = short, 2 = long) */
963 32, /* bitsize */
964 TRUE, /* pc_relative */
965 0, /* bitpos */
966 complain_overflow_dont,/* complain_on_overflow */
967 bfd_elf_generic_reloc, /* special_function */
968 "R_ARM_LDR_PC_G1", /* name */
969 FALSE, /* partial_inplace */
970 0xffffffff, /* src_mask */
971 0xffffffff, /* dst_mask */
972 TRUE), /* pcrel_offset */
973
974 HOWTO (R_ARM_LDR_PC_G2, /* type */
975 0, /* rightshift */
976 2, /* size (0 = byte, 1 = short, 2 = long) */
977 32, /* bitsize */
978 TRUE, /* pc_relative */
979 0, /* bitpos */
980 complain_overflow_dont,/* complain_on_overflow */
981 bfd_elf_generic_reloc, /* special_function */
982 "R_ARM_LDR_PC_G2", /* name */
983 FALSE, /* partial_inplace */
984 0xffffffff, /* src_mask */
985 0xffffffff, /* dst_mask */
986 TRUE), /* pcrel_offset */
987
988 HOWTO (R_ARM_LDRS_PC_G0, /* type */
989 0, /* rightshift */
990 2, /* size (0 = byte, 1 = short, 2 = long) */
991 32, /* bitsize */
992 TRUE, /* pc_relative */
993 0, /* bitpos */
994 complain_overflow_dont,/* complain_on_overflow */
995 bfd_elf_generic_reloc, /* special_function */
996 "R_ARM_LDRS_PC_G0", /* name */
997 FALSE, /* partial_inplace */
998 0xffffffff, /* src_mask */
999 0xffffffff, /* dst_mask */
1000 TRUE), /* pcrel_offset */
1001
1002 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1003 0, /* rightshift */
1004 2, /* size (0 = byte, 1 = short, 2 = long) */
1005 32, /* bitsize */
1006 TRUE, /* pc_relative */
1007 0, /* bitpos */
1008 complain_overflow_dont,/* complain_on_overflow */
1009 bfd_elf_generic_reloc, /* special_function */
1010 "R_ARM_LDRS_PC_G1", /* name */
1011 FALSE, /* partial_inplace */
1012 0xffffffff, /* src_mask */
1013 0xffffffff, /* dst_mask */
1014 TRUE), /* pcrel_offset */
1015
1016 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1017 0, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 32, /* bitsize */
1020 TRUE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_ARM_LDRS_PC_G2", /* name */
1025 FALSE, /* partial_inplace */
1026 0xffffffff, /* src_mask */
1027 0xffffffff, /* dst_mask */
1028 TRUE), /* pcrel_offset */
1029
1030 HOWTO (R_ARM_LDC_PC_G0, /* type */
1031 0, /* rightshift */
1032 2, /* size (0 = byte, 1 = short, 2 = long) */
1033 32, /* bitsize */
1034 TRUE, /* pc_relative */
1035 0, /* bitpos */
1036 complain_overflow_dont,/* complain_on_overflow */
1037 bfd_elf_generic_reloc, /* special_function */
1038 "R_ARM_LDC_PC_G0", /* name */
1039 FALSE, /* partial_inplace */
1040 0xffffffff, /* src_mask */
1041 0xffffffff, /* dst_mask */
1042 TRUE), /* pcrel_offset */
1043
1044 HOWTO (R_ARM_LDC_PC_G1, /* type */
1045 0, /* rightshift */
1046 2, /* size (0 = byte, 1 = short, 2 = long) */
1047 32, /* bitsize */
1048 TRUE, /* pc_relative */
1049 0, /* bitpos */
1050 complain_overflow_dont,/* complain_on_overflow */
1051 bfd_elf_generic_reloc, /* special_function */
1052 "R_ARM_LDC_PC_G1", /* name */
1053 FALSE, /* partial_inplace */
1054 0xffffffff, /* src_mask */
1055 0xffffffff, /* dst_mask */
1056 TRUE), /* pcrel_offset */
1057
1058 HOWTO (R_ARM_LDC_PC_G2, /* type */
1059 0, /* rightshift */
1060 2, /* size (0 = byte, 1 = short, 2 = long) */
1061 32, /* bitsize */
1062 TRUE, /* pc_relative */
1063 0, /* bitpos */
1064 complain_overflow_dont,/* complain_on_overflow */
1065 bfd_elf_generic_reloc, /* special_function */
1066 "R_ARM_LDC_PC_G2", /* name */
1067 FALSE, /* partial_inplace */
1068 0xffffffff, /* src_mask */
1069 0xffffffff, /* dst_mask */
1070 TRUE), /* pcrel_offset */
1071
1072 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1073 0, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 32, /* bitsize */
1076 TRUE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 bfd_elf_generic_reloc, /* special_function */
1080 "R_ARM_ALU_SB_G0_NC", /* name */
1081 FALSE, /* partial_inplace */
1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
1084 TRUE), /* pcrel_offset */
1085
1086 HOWTO (R_ARM_ALU_SB_G0, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 32, /* bitsize */
1090 TRUE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_ARM_ALU_SB_G0", /* name */
1095 FALSE, /* partial_inplace */
1096 0xffffffff, /* src_mask */
1097 0xffffffff, /* dst_mask */
1098 TRUE), /* pcrel_offset */
1099
1100 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1101 0, /* rightshift */
1102 2, /* size (0 = byte, 1 = short, 2 = long) */
1103 32, /* bitsize */
1104 TRUE, /* pc_relative */
1105 0, /* bitpos */
1106 complain_overflow_dont,/* complain_on_overflow */
1107 bfd_elf_generic_reloc, /* special_function */
1108 "R_ARM_ALU_SB_G1_NC", /* name */
1109 FALSE, /* partial_inplace */
1110 0xffffffff, /* src_mask */
1111 0xffffffff, /* dst_mask */
1112 TRUE), /* pcrel_offset */
1113
1114 HOWTO (R_ARM_ALU_SB_G1, /* type */
1115 0, /* rightshift */
1116 2, /* size (0 = byte, 1 = short, 2 = long) */
1117 32, /* bitsize */
1118 TRUE, /* pc_relative */
1119 0, /* bitpos */
1120 complain_overflow_dont,/* complain_on_overflow */
1121 bfd_elf_generic_reloc, /* special_function */
1122 "R_ARM_ALU_SB_G1", /* name */
1123 FALSE, /* partial_inplace */
1124 0xffffffff, /* src_mask */
1125 0xffffffff, /* dst_mask */
1126 TRUE), /* pcrel_offset */
1127
1128 HOWTO (R_ARM_ALU_SB_G2, /* type */
1129 0, /* rightshift */
1130 2, /* size (0 = byte, 1 = short, 2 = long) */
1131 32, /* bitsize */
1132 TRUE, /* pc_relative */
1133 0, /* bitpos */
1134 complain_overflow_dont,/* complain_on_overflow */
1135 bfd_elf_generic_reloc, /* special_function */
1136 "R_ARM_ALU_SB_G2", /* name */
1137 FALSE, /* partial_inplace */
1138 0xffffffff, /* src_mask */
1139 0xffffffff, /* dst_mask */
1140 TRUE), /* pcrel_offset */
1141
1142 HOWTO (R_ARM_LDR_SB_G0, /* type */
1143 0, /* rightshift */
1144 2, /* size (0 = byte, 1 = short, 2 = long) */
1145 32, /* bitsize */
1146 TRUE, /* pc_relative */
1147 0, /* bitpos */
1148 complain_overflow_dont,/* complain_on_overflow */
1149 bfd_elf_generic_reloc, /* special_function */
1150 "R_ARM_LDR_SB_G0", /* name */
1151 FALSE, /* partial_inplace */
1152 0xffffffff, /* src_mask */
1153 0xffffffff, /* dst_mask */
1154 TRUE), /* pcrel_offset */
1155
1156 HOWTO (R_ARM_LDR_SB_G1, /* type */
1157 0, /* rightshift */
1158 2, /* size (0 = byte, 1 = short, 2 = long) */
1159 32, /* bitsize */
1160 TRUE, /* pc_relative */
1161 0, /* bitpos */
1162 complain_overflow_dont,/* complain_on_overflow */
1163 bfd_elf_generic_reloc, /* special_function */
1164 "R_ARM_LDR_SB_G1", /* name */
1165 FALSE, /* partial_inplace */
1166 0xffffffff, /* src_mask */
1167 0xffffffff, /* dst_mask */
1168 TRUE), /* pcrel_offset */
1169
1170 HOWTO (R_ARM_LDR_SB_G2, /* type */
1171 0, /* rightshift */
1172 2, /* size (0 = byte, 1 = short, 2 = long) */
1173 32, /* bitsize */
1174 TRUE, /* pc_relative */
1175 0, /* bitpos */
1176 complain_overflow_dont,/* complain_on_overflow */
1177 bfd_elf_generic_reloc, /* special_function */
1178 "R_ARM_LDR_SB_G2", /* name */
1179 FALSE, /* partial_inplace */
1180 0xffffffff, /* src_mask */
1181 0xffffffff, /* dst_mask */
1182 TRUE), /* pcrel_offset */
1183
1184 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1185 0, /* rightshift */
1186 2, /* size (0 = byte, 1 = short, 2 = long) */
1187 32, /* bitsize */
1188 TRUE, /* pc_relative */
1189 0, /* bitpos */
1190 complain_overflow_dont,/* complain_on_overflow */
1191 bfd_elf_generic_reloc, /* special_function */
1192 "R_ARM_LDRS_SB_G0", /* name */
1193 FALSE, /* partial_inplace */
1194 0xffffffff, /* src_mask */
1195 0xffffffff, /* dst_mask */
1196 TRUE), /* pcrel_offset */
1197
1198 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1199 0, /* rightshift */
1200 2, /* size (0 = byte, 1 = short, 2 = long) */
1201 32, /* bitsize */
1202 TRUE, /* pc_relative */
1203 0, /* bitpos */
1204 complain_overflow_dont,/* complain_on_overflow */
1205 bfd_elf_generic_reloc, /* special_function */
1206 "R_ARM_LDRS_SB_G1", /* name */
1207 FALSE, /* partial_inplace */
1208 0xffffffff, /* src_mask */
1209 0xffffffff, /* dst_mask */
1210 TRUE), /* pcrel_offset */
1211
1212 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1213 0, /* rightshift */
1214 2, /* size (0 = byte, 1 = short, 2 = long) */
1215 32, /* bitsize */
1216 TRUE, /* pc_relative */
1217 0, /* bitpos */
1218 complain_overflow_dont,/* complain_on_overflow */
1219 bfd_elf_generic_reloc, /* special_function */
1220 "R_ARM_LDRS_SB_G2", /* name */
1221 FALSE, /* partial_inplace */
1222 0xffffffff, /* src_mask */
1223 0xffffffff, /* dst_mask */
1224 TRUE), /* pcrel_offset */
1225
1226 HOWTO (R_ARM_LDC_SB_G0, /* type */
1227 0, /* rightshift */
1228 2, /* size (0 = byte, 1 = short, 2 = long) */
1229 32, /* bitsize */
1230 TRUE, /* pc_relative */
1231 0, /* bitpos */
1232 complain_overflow_dont,/* complain_on_overflow */
1233 bfd_elf_generic_reloc, /* special_function */
1234 "R_ARM_LDC_SB_G0", /* name */
1235 FALSE, /* partial_inplace */
1236 0xffffffff, /* src_mask */
1237 0xffffffff, /* dst_mask */
1238 TRUE), /* pcrel_offset */
1239
1240 HOWTO (R_ARM_LDC_SB_G1, /* type */
1241 0, /* rightshift */
1242 2, /* size (0 = byte, 1 = short, 2 = long) */
1243 32, /* bitsize */
1244 TRUE, /* pc_relative */
1245 0, /* bitpos */
1246 complain_overflow_dont,/* complain_on_overflow */
1247 bfd_elf_generic_reloc, /* special_function */
1248 "R_ARM_LDC_SB_G1", /* name */
1249 FALSE, /* partial_inplace */
1250 0xffffffff, /* src_mask */
1251 0xffffffff, /* dst_mask */
1252 TRUE), /* pcrel_offset */
1253
1254 HOWTO (R_ARM_LDC_SB_G2, /* type */
1255 0, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 32, /* bitsize */
1258 TRUE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont,/* complain_on_overflow */
1261 bfd_elf_generic_reloc, /* special_function */
1262 "R_ARM_LDC_SB_G2", /* name */
1263 FALSE, /* partial_inplace */
1264 0xffffffff, /* src_mask */
1265 0xffffffff, /* dst_mask */
1266 TRUE), /* pcrel_offset */
1267
1268 /* End of group relocations. */
c19d1205 1269
c19d1205
ZW		 1270 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1271 0, /* rightshift */
1272 2, /* size (0 = byte, 1 = short, 2 = long) */
1273 16, /* bitsize */
1274 FALSE, /* pc_relative */
1275 0, /* bitpos */
1276 complain_overflow_dont,/* complain_on_overflow */
1277 bfd_elf_generic_reloc, /* special_function */
1278 "R_ARM_MOVW_BREL_NC", /* name */
1279 FALSE, /* partial_inplace */
1280 0x0000ffff, /* src_mask */
1281 0x0000ffff, /* dst_mask */
1282 FALSE), /* pcrel_offset */
1283
1284 HOWTO (R_ARM_MOVT_BREL, /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 16, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_bitfield,/* complain_on_overflow */
1291 bfd_elf_generic_reloc, /* special_function */
1292 "R_ARM_MOVT_BREL", /* name */
1293 FALSE, /* partial_inplace */
1294 0x0000ffff, /* src_mask */
1295 0x0000ffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
1298 HOWTO (R_ARM_MOVW_BREL, /* type */
1299 0, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 16, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_ARM_MOVW_BREL", /* name */
1307 FALSE, /* partial_inplace */
1308 0x0000ffff, /* src_mask */
1309 0x0000ffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1313 0, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 16, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_ARM_THM_MOVW_BREL_NC",/* name */
1321 FALSE, /* partial_inplace */
1322 0x040f70ff, /* src_mask */
1323 0x040f70ff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1327 0, /* rightshift */
1328 2, /* size (0 = byte, 1 = short, 2 = long) */
1329 16, /* bitsize */
1330 FALSE, /* pc_relative */
1331 0, /* bitpos */
1332 complain_overflow_bitfield,/* complain_on_overflow */
1333 bfd_elf_generic_reloc, /* special_function */
1334 "R_ARM_THM_MOVT_BREL", /* name */
1335 FALSE, /* partial_inplace */
1336 0x040f70ff, /* src_mask */
1337 0x040f70ff, /* dst_mask */
1338 FALSE), /* pcrel_offset */
1339
1340 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1341 0, /* rightshift */
1342 2, /* size (0 = byte, 1 = short, 2 = long) */
1343 16, /* bitsize */
1344 FALSE, /* pc_relative */
1345 0, /* bitpos */
1346 complain_overflow_dont,/* complain_on_overflow */
1347 bfd_elf_generic_reloc, /* special_function */
1348 "R_ARM_THM_MOVW_BREL", /* name */
1349 FALSE, /* partial_inplace */
1350 0x040f70ff, /* src_mask */
1351 0x040f70ff, /* dst_mask */
1352 FALSE), /* pcrel_offset */
1353
1354 EMPTY_HOWTO (90), /* unallocated */
1355 EMPTY_HOWTO (91),
1356 EMPTY_HOWTO (92),
1357 EMPTY_HOWTO (93),
1358
1359 HOWTO (R_ARM_PLT32_ABS, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_dont,/* complain_on_overflow */
1366 bfd_elf_generic_reloc, /* special_function */
1367 "R_ARM_PLT32_ABS", /* name */
1368 FALSE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_GOT_ABS, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 32, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_GOT_ABS", /* name */
1382 FALSE, /* partial_inplace */
1383 0xffffffff, /* src_mask */
1384 0xffffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_GOT_PREL, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 32, /* bitsize */
1391 TRUE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_dont, /* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_GOT_PREL", /* name */
1396 FALSE, /* partial_inplace */
1397 0xffffffff, /* src_mask */
1398 0xffffffff, /* dst_mask */
1399 TRUE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_GOT_BREL12, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 12, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_bitfield,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_GOT_BREL12", /* name */
1410 FALSE, /* partial_inplace */
1411 0x00000fff, /* src_mask */
1412 0x00000fff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_GOTOFF12, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 12, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_bitfield,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_GOTOFF12", /* name */
1424 FALSE, /* partial_inplace */
1425 0x00000fff, /* src_mask */
1426 0x00000fff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1430
1431 /* GNU extension to record C++ vtable member usage */
1432 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1433 0, /* rightshift */
1434 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1435 0, /* bitsize */
ba93b8ac
DJ		 1436 FALSE, /* pc_relative */
1437 0, /* bitpos */
c19d1205
ZW		 1438 complain_overflow_dont, /* complain_on_overflow */
1439 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1440 "R_ARM_GNU_VTENTRY", /* name */
1441 FALSE, /* partial_inplace */
1442 0, /* src_mask */
1443 0, /* dst_mask */
1444 FALSE), /* pcrel_offset */
1445
1446 /* GNU extension to record C++ vtable hierarchy */
1447 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1448 0, /* rightshift */
1449 2, /* size (0 = byte, 1 = short, 2 = long) */
1450 0, /* bitsize */
1451 FALSE, /* pc_relative */
1452 0, /* bitpos */
1453 complain_overflow_dont, /* complain_on_overflow */
1454 NULL, /* special_function */
1455 "R_ARM_GNU_VTINHERIT", /* name */
1456 FALSE, /* partial_inplace */
1457 0, /* src_mask */
1458 0, /* dst_mask */
1459 FALSE), /* pcrel_offset */
1460
1461 HOWTO (R_ARM_THM_JUMP11, /* type */
1462 1, /* rightshift */
1463 1, /* size (0 = byte, 1 = short, 2 = long) */
1464 11, /* bitsize */
1465 TRUE, /* pc_relative */
1466 0, /* bitpos */
1467 complain_overflow_signed, /* complain_on_overflow */
1468 bfd_elf_generic_reloc, /* special_function */
1469 "R_ARM_THM_JUMP11", /* name */
1470 FALSE, /* partial_inplace */
1471 0x000007ff, /* src_mask */
1472 0x000007ff, /* dst_mask */
1473 TRUE), /* pcrel_offset */
1474
1475 HOWTO (R_ARM_THM_JUMP8, /* type */
1476 1, /* rightshift */
1477 1, /* size (0 = byte, 1 = short, 2 = long) */
1478 8, /* bitsize */
1479 TRUE, /* pc_relative */
1480 0, /* bitpos */
1481 complain_overflow_signed, /* complain_on_overflow */
1482 bfd_elf_generic_reloc, /* special_function */
1483 "R_ARM_THM_JUMP8", /* name */
1484 FALSE, /* partial_inplace */
1485 0x000000ff, /* src_mask */
1486 0x000000ff, /* dst_mask */
1487 TRUE), /* pcrel_offset */
ba93b8ac 1488
c19d1205
ZW		 1489 /* TLS relocations */
1490 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1491 0, /* rightshift */
1492 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 32, /* bitsize */
1494 FALSE, /* pc_relative */
1495 0, /* bitpos */
1496 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1497 NULL, /* special_function */
1498 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1499 TRUE, /* partial_inplace */
1500 0xffffffff, /* src_mask */
1501 0xffffffff, /* dst_mask */
c19d1205 1502 FALSE), /* pcrel_offset */
ba93b8ac 1503
ba93b8ac
DJ		 1504 HOWTO (R_ARM_TLS_LDM32, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 32, /* bitsize */
1508 FALSE, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_bitfield,/* complain_on_overflow */
1511 bfd_elf_generic_reloc, /* special_function */
1512 "R_ARM_TLS_LDM32", /* name */
1513 TRUE, /* partial_inplace */
1514 0xffffffff, /* src_mask */
1515 0xffffffff, /* dst_mask */
c19d1205 1516 FALSE), /* pcrel_offset */
ba93b8ac 1517
c19d1205 1518 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1519 0, /* rightshift */
1520 2, /* size (0 = byte, 1 = short, 2 = long) */
1521 32, /* bitsize */
1522 FALSE, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_bitfield,/* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
c19d1205 1526 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1527 TRUE, /* partial_inplace */
1528 0xffffffff, /* src_mask */
1529 0xffffffff, /* dst_mask */
c19d1205 1530 FALSE), /* pcrel_offset */
ba93b8ac 1531
ba93b8ac
DJ		 1532 HOWTO (R_ARM_TLS_IE32, /* type */
1533 0, /* rightshift */
1534 2, /* size (0 = byte, 1 = short, 2 = long) */
1535 32, /* bitsize */
1536 FALSE, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_bitfield,/* complain_on_overflow */
1539 NULL, /* special_function */
1540 "R_ARM_TLS_IE32", /* name */
1541 TRUE, /* partial_inplace */
1542 0xffffffff, /* src_mask */
1543 0xffffffff, /* dst_mask */
c19d1205 1544 FALSE), /* pcrel_offset */
7f266840 1545
c19d1205 1546 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1549 32, /* bitsize */
7f266840
DJ		 1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
c19d1205
ZW		 1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_ARM_TLS_LE32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
7f266840 1559
c19d1205
ZW		 1560 HOWTO (R_ARM_TLS_LDO12, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 12, /* bitsize */
1564 FALSE, /* pc_relative */
7f266840 1565 0, /* bitpos */
c19d1205 1566 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1567 bfd_elf_generic_reloc, /* special_function */
c19d1205 1568 "R_ARM_TLS_LDO12", /* name */
7f266840 1569 FALSE, /* partial_inplace */
c19d1205
ZW		 1570 0x00000fff, /* src_mask */
1571 0x00000fff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
7f266840 1573
c19d1205
ZW		 1574 HOWTO (R_ARM_TLS_LE12, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 12, /* bitsize */
1578 FALSE, /* pc_relative */
7f266840 1579 0, /* bitpos */
c19d1205 1580 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1581 bfd_elf_generic_reloc, /* special_function */
c19d1205 1582 "R_ARM_TLS_LE12", /* name */
7f266840 1583 FALSE, /* partial_inplace */
c19d1205
ZW		 1584 0x00000fff, /* src_mask */
1585 0x00000fff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
7f266840 1587
c19d1205 1588 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1591 12, /* bitsize */
1592 FALSE, /* pc_relative */
7f266840 1593 0, /* bitpos */
c19d1205 1594 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1595 bfd_elf_generic_reloc, /* special_function */
c19d1205 1596 "R_ARM_TLS_IE12GP", /* name */
7f266840 1597 FALSE, /* partial_inplace */
c19d1205
ZW		 1598 0x00000fff, /* src_mask */
1599 0x00000fff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601};
1602
1603/* 112-127 private relocations
1604 128 R_ARM_ME_TOO, obsolete
1605 129-255 unallocated in AAELF.
7f266840 1606
c19d1205
ZW		 1607 249-255 extended, currently unused, relocations: */
1608
4962c51a 1609static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1610{
1611 HOWTO (R_ARM_RREL32, /* type */
1612 0, /* rightshift */
1613 0, /* size (0 = byte, 1 = short, 2 = long) */
1614 0, /* bitsize */
1615 FALSE, /* pc_relative */
1616 0, /* bitpos */
1617 complain_overflow_dont,/* complain_on_overflow */
1618 bfd_elf_generic_reloc, /* special_function */
1619 "R_ARM_RREL32", /* name */
1620 FALSE, /* partial_inplace */
1621 0, /* src_mask */
1622 0, /* dst_mask */
1623 FALSE), /* pcrel_offset */
1624
1625 HOWTO (R_ARM_RABS32, /* type */
1626 0, /* rightshift */
1627 0, /* size (0 = byte, 1 = short, 2 = long) */
1628 0, /* bitsize */
1629 FALSE, /* pc_relative */
1630 0, /* bitpos */
1631 complain_overflow_dont,/* complain_on_overflow */
1632 bfd_elf_generic_reloc, /* special_function */
1633 "R_ARM_RABS32", /* name */
1634 FALSE, /* partial_inplace */
1635 0, /* src_mask */
1636 0, /* dst_mask */
1637 FALSE), /* pcrel_offset */
1638
1639 HOWTO (R_ARM_RPC24, /* type */
1640 0, /* rightshift */
1641 0, /* size (0 = byte, 1 = short, 2 = long) */
1642 0, /* bitsize */
1643 FALSE, /* pc_relative */
1644 0, /* bitpos */
1645 complain_overflow_dont,/* complain_on_overflow */
1646 bfd_elf_generic_reloc, /* special_function */
1647 "R_ARM_RPC24", /* name */
1648 FALSE, /* partial_inplace */
1649 0, /* src_mask */
1650 0, /* dst_mask */
1651 FALSE), /* pcrel_offset */
1652
1653 HOWTO (R_ARM_RBASE, /* type */
1654 0, /* rightshift */
1655 0, /* size (0 = byte, 1 = short, 2 = long) */
1656 0, /* bitsize */
1657 FALSE, /* pc_relative */
1658 0, /* bitpos */
1659 complain_overflow_dont,/* complain_on_overflow */
1660 bfd_elf_generic_reloc, /* special_function */
1661 "R_ARM_RBASE", /* name */
1662 FALSE, /* partial_inplace */
1663 0, /* src_mask */
1664 0, /* dst_mask */
1665 FALSE) /* pcrel_offset */
1666};
1667
1668static reloc_howto_type *
1669elf32_arm_howto_from_type (unsigned int r_type)
1670{
c19d1205
ZW		 1671 if (r_type < NUM_ELEM (elf32_arm_howto_table_1))
1672 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1673
c19d1205
ZW		 1674 if (r_type >= R_ARM_RREL32
1675 && r_type < R_ARM_RREL32 + NUM_ELEM (elf32_arm_howto_table_2))
4962c51a 1676 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1677
c19d1205 1678 return NULL;
7f266840
DJ		 1679}
1680
1681static void
1682elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1683 Elf_Internal_Rela * elf_reloc)
1684{
1685 unsigned int r_type;
1686
1687 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1688 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1689}
1690
1691struct elf32_arm_reloc_map
1692 {
1693 bfd_reloc_code_real_type bfd_reloc_val;
1694 unsigned char elf_reloc_val;
1695 };
1696
1697/* All entries in this list must also be present in elf32_arm_howto_table. */
1698static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1699 {
1700 {BFD_RELOC_NONE, R_ARM_NONE},
1701 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1702 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1703 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1704 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1705 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1706 {BFD_RELOC_32, R_ARM_ABS32},
1707 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1708 {BFD_RELOC_8, R_ARM_ABS8},
1709 {BFD_RELOC_16, R_ARM_ABS16},
1710 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1711 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1712 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1713 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1718 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1719 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1720 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1721 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1722 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1723 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1724 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1725 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1726 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1727 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1728 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1729 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1730 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1731 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1732 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1733 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1734 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1735 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1736 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1737 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1738 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1739 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1740 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1741 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1742 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1743 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1744 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1745 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1746 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1747 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1749 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1750 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1751 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1753 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1754 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1755 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1756 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1757 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1758 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1759 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1760 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1761 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1762 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1763 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1764 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1765 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1767 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1768 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1769 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1770 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1771 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1772 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1773 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1774 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1775 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1776 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1777 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1778 };
1779
1780static reloc_howto_type *
f1c71a59
ZW		 1781elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1782 bfd_reloc_code_real_type code)
7f266840
DJ		 1783{
1784 unsigned int i;
c19d1205
ZW		 1785 for (i = 0; i < NUM_ELEM (elf32_arm_reloc_map); i ++)
1786 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1787 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1788
c19d1205 1789 return NULL;
7f266840
DJ		 1790}
1791
157090f7
AM		 1792static reloc_howto_type *
1793elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1794 const char *r_name)
1795{
1796 unsigned int i;
1797
1798 for (i = 0;
1799 i < (sizeof (elf32_arm_howto_table_1)
1800 / sizeof (elf32_arm_howto_table_1[0]));
1801 i++)
1802 if (elf32_arm_howto_table_1[i].name != NULL
1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1804 return &elf32_arm_howto_table_1[i];
1805
1806 for (i = 0;
1807 i < (sizeof (elf32_arm_howto_table_2)
1808 / sizeof (elf32_arm_howto_table_2[0]));
1809 i++)
1810 if (elf32_arm_howto_table_2[i].name != NULL
1811 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1812 return &elf32_arm_howto_table_2[i];
1813
1814 return NULL;
1815}
1816
7f266840
DJ		 1817/* Support for core dump NOTE sections */
1818static bfd_boolean
f1c71a59 1819elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1820{
1821 int offset;
1822 size_t size;
1823
1824 switch (note->descsz)
1825 {
1826 default:
1827 return FALSE;
1828
1829 case 148: /* Linux/ARM 32-bit*/
1830 /* pr_cursig */
1831 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1832
1833 /* pr_pid */
1834 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1835
1836 /* pr_reg */
1837 offset = 72;
1838 size = 72;
1839
1840 break;
1841 }
1842
1843 /* Make a ".reg/999" section. */
1844 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1845 size, note->descpos + offset);
1846}
1847
1848static bfd_boolean
f1c71a59 1849elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1850{
1851 switch (note->descsz)
1852 {
1853 default:
1854 return FALSE;
1855
1856 case 124: /* Linux/ARM elf_prpsinfo */
1857 elf_tdata (abfd)->core_program
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1859 elf_tdata (abfd)->core_command
1860 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1861 }
1862
1863 /* Note that for some reason, a spurious space is tacked
1864 onto the end of the args in some (at least one anyway)
1865 implementations, so strip it off if it exists. */
1866
1867 {
1868 char *command = elf_tdata (abfd)->core_command;
1869 int n = strlen (command);
1870
1871 if (0 < n && command[n - 1] == ' ')
1872 command[n - 1] = '\0';
1873 }
1874
1875 return TRUE;
1876}
1877
1878#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1879#define TARGET_LITTLE_NAME "elf32-littlearm"
1880#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1881#define TARGET_BIG_NAME "elf32-bigarm"
1882
1883#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1884#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1885
252b5132
RH		 1886typedef unsigned long int insn32;
1887typedef unsigned short int insn16;
1888
3a4a14e9
PB		 1889/* In lieu of proper flags, assume all EABIv4 or later objects are
1890 interworkable. */
57e8b36a 1891#define INTERWORK_FLAG(abfd) \
3a4a14e9 1892 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
85a84e7a 1893 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
9b485d32 1894
252b5132
RH		 1895/* The linker script knows the section names for placement.
1896 The entry_names are used to do simple name mangling on the stubs.
1897 Given a function name, and its type, the stub can be found. The
9b485d32 1898 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1899#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1900#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1901
1902#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1903#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1904
c7b8f16e
JB		 1905#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1906#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1907
845b51d6
PB		 1908#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1909#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1910
252b5132
RH		 1911/* The name of the dynamic interpreter. This is put in the .interp
1912 section. */
1913#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1914
5e681ec4
PB		 1915#ifdef FOUR_WORD_PLT
1916
252b5132
RH		 1917/* The first entry in a procedure linkage table looks like
1918 this. It is set up so that any shared library function that is
59f2c4e7 1919 called before the relocation has been set up calls the dynamic
9b485d32 1920 linker first. */
e5a52504 1921static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1922 {
1923 0xe52de004, /* str lr, [sp, #-4]! */
1924 0xe59fe010, /* ldr lr, [pc, #16] */
1925 0xe08fe00e, /* add lr, pc, lr */
1926 0xe5bef008, /* ldr pc, [lr, #8]! */
1927 };
1928
1929/* Subsequent entries in a procedure linkage table look like
1930 this. */
e5a52504 1931static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1932 {
1933 0xe28fc600, /* add ip, pc, #NN */
1934 0xe28cca00, /* add ip, ip, #NN */
1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1936 0x00000000, /* unused */
1937 };
1938
1939#else
1940
5e681ec4
PB		 1941/* The first entry in a procedure linkage table looks like
1942 this. It is set up so that any shared library function that is
1943 called before the relocation has been set up calls the dynamic
1944 linker first. */
e5a52504 1945static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1946 {
5e681ec4
PB		 1947 0xe52de004, /* str lr, [sp, #-4]! */
1948 0xe59fe004, /* ldr lr, [pc, #4] */
1949 0xe08fe00e, /* add lr, pc, lr */
1950 0xe5bef008, /* ldr pc, [lr, #8]! */
1951 0x00000000, /* &GOT[0] - . */
917583ad 1952 };
252b5132
RH		 1953
1954/* Subsequent entries in a procedure linkage table look like
1955 this. */
e5a52504 1956static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1957 {
1958 0xe28fc600, /* add ip, pc, #0xNN00000 */
1959 0xe28cca00, /* add ip, ip, #0xNN000 */
1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1961 };
1962
1963#endif
252b5132 1964
00a97672
RS		 1965/* The format of the first entry in the procedure linkage table
1966 for a VxWorks executable. */
1967static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1968 {
1969 0xe52dc008, /* str ip,[sp,#-8]! */
1970 0xe59fc000, /* ldr ip,[pc] */
1971 0xe59cf008, /* ldr pc,[ip,#8] */
1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1973 };
1974
1975/* The format of subsequent entries in a VxWorks executable. */
1976static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1977 {
1978 0xe59fc000, /* ldr ip,[pc] */
1979 0xe59cf000, /* ldr pc,[ip] */
1980 0x00000000, /* .long @got */
1981 0xe59fc000, /* ldr ip,[pc] */
1982 0xea000000, /* b _PLT */
1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1984 };
1985
1986/* The format of entries in a VxWorks shared library. */
1987static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1988 {
1989 0xe59fc000, /* ldr ip,[pc] */
1990 0xe79cf009, /* ldr pc,[ip,r9] */
1991 0x00000000, /* .long @got */
1992 0xe59fc000, /* ldr ip,[pc] */
1993 0xe599f008, /* ldr pc,[r9,#8] */
1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1995 };
1996
b7693d02
DJ		 1997/* An initial stub used if the PLT entry is referenced from Thumb code. */
1998#define PLT_THUMB_STUB_SIZE 4
1999static const bfd_vma elf32_arm_plt_thumb_stub [] =
2000 {
2001 0x4778, /* bx pc */
2002 0x46c0 /* nop */
2003 };
2004
e5a52504
MM		 2005/* The entries in a PLT when using a DLL-based target with multiple
2006 address spaces. */
2007static const bfd_vma elf32_arm_symbian_plt_entry [] =
2008 {
83a358aa 2009 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2011 };
2012
e489d0ae
PB		 2013/* Used to build a map of a section. This is required for mixed-endian
2014 code/data. */
2015
2016typedef struct elf32_elf_section_map
2017{
2018 bfd_vma vma;
2019 char type;
2020}
2021elf32_arm_section_map;
2022
c7b8f16e
JB		 2023/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2024
2025typedef enum
2026{
2027 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2028 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2029 VFP11_ERRATUM_ARM_VENEER,
2030 VFP11_ERRATUM_THUMB_VENEER
2031}
2032elf32_vfp11_erratum_type;
2033
2034typedef struct elf32_vfp11_erratum_list
2035{
2036 struct elf32_vfp11_erratum_list *next;
2037 bfd_vma vma;
2038 union
2039 {
2040 struct
2041 {
2042 struct elf32_vfp11_erratum_list *veneer;
2043 unsigned int vfp_insn;
2044 } b;
2045 struct
2046 {
2047 struct elf32_vfp11_erratum_list *branch;
2048 unsigned int id;
2049 } v;
2050 } u;
2051 elf32_vfp11_erratum_type type;
2052}
2053elf32_vfp11_erratum_list;
2054
8e3de13a 2055typedef struct _arm_elf_section_data
e489d0ae
PB		 2056{
2057 struct bfd_elf_section_data elf;
8e3de13a 2058 unsigned int mapcount;
c7b8f16e 2059 unsigned int mapsize;
e489d0ae 2060 elf32_arm_section_map *map;
c7b8f16e
JB		 2061 unsigned int erratumcount;
2062 elf32_vfp11_erratum_list *erratumlist;
8e3de13a
NC		 2063}
2064_arm_elf_section_data;
e489d0ae
PB		 2065
2066#define elf32_arm_section_data(sec) \
8e3de13a 2067 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2068
ba93b8ac
DJ		 2069/* The size of the thread control block. */
2070#define TCB_SIZE 8
2071
0ffa91dd 2072struct elf_arm_obj_tdata
ba93b8ac
DJ		 2073{
2074 struct elf_obj_tdata root;
2075
2076 /* tls_type for each local got entry. */
2077 char *local_got_tls_type;
ee065d83 2078
bf21ed78
MS		 2079 /* Zero to warn when linking objects with incompatible enum sizes. */
2080 int no_enum_size_warning;
ba93b8ac
DJ		 2081};
2082
0ffa91dd
NC		 2083#define elf_arm_tdata(bfd) \
2084 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2085
0ffa91dd
NC		 2086#define elf32_arm_local_got_tls_type(bfd) \
2087 (elf_arm_tdata (bfd)->local_got_tls_type)
2088
2089#define is_arm_elf(bfd) \
2090 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2091 && elf_tdata (bfd) != NULL \
2092 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2093
2094static bfd_boolean
2095elf32_arm_mkobject (bfd *abfd)
2096{
0ffa91dd
NC		 2097 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2098 ARM_ELF_TDATA);
ba93b8ac
DJ		 2099}
2100
252b5132
RH		 2101/* The ARM linker needs to keep track of the number of relocs that it
2102 decides to copy in check_relocs for each symbol. This is so that
2103 it can discard PC relative relocs if it doesn't need them when
2104 linking with -Bsymbolic. We store the information in a field
2105 extending the regular ELF linker hash table. */
2106
ba93b8ac
DJ		 2107/* This structure keeps track of the number of relocs we have copied
2108 for a given symbol. */
5e681ec4 2109struct elf32_arm_relocs_copied
917583ad
NC		 2110 {
2111 /* Next section. */
5e681ec4 2112 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2113 /* A section in dynobj. */
2114 asection * section;
2115 /* Number of relocs copied in this section. */
2116 bfd_size_type count;
ba93b8ac
DJ		 2117 /* Number of PC-relative relocs copied in this section. */
2118 bfd_size_type pc_count;
917583ad 2119 };
252b5132 2120
ba93b8ac
DJ		 2121#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2122
ba96a88f 2123/* Arm ELF linker hash entry. */
252b5132 2124struct elf32_arm_link_hash_entry
917583ad
NC		 2125 {
2126 struct elf_link_hash_entry root;
252b5132 2127
917583ad 2128 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2129 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2130
2131 /* We reference count Thumb references to a PLT entry separately,
2132 so that we can emit the Thumb trampoline only if needed. */
2133 bfd_signed_vma plt_thumb_refcount;
2134
bd97cb95
DJ		 2135 /* Some references from Thumb code may be eliminated by BL->BLX
2136 conversion, so record them separately. */
2137 bfd_signed_vma plt_maybe_thumb_refcount;
2138
b7693d02
DJ		 2139 /* Since PLT entries have variable size if the Thumb prologue is
2140 used, we need to record the index into .got.plt instead of
2141 recomputing it from the PLT offset. */
2142 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2143
2144#define GOT_UNKNOWN 0
2145#define GOT_NORMAL 1
2146#define GOT_TLS_GD 2
2147#define GOT_TLS_IE 4
2148 unsigned char tls_type;
a4fd1a8e
PB		 2149
2150 /* The symbol marking the real symbol location for exported thumb
2151 symbols with Arm stubs. */
2152 struct elf_link_hash_entry *export_glue;
917583ad 2153 };
252b5132 2154
252b5132 2155/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2156#define elf32_arm_link_hash_traverse(table, func, info) \
2157 (elf_link_hash_traverse \
2158 (&(table)->root, \
b7693d02 2159 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2160 (info)))
2161
2162/* Get the ARM elf linker hash table from a link_info structure. */
2163#define elf32_arm_hash_table(info) \
2164 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2165
9b485d32 2166/* ARM ELF linker hash table. */
252b5132 2167struct elf32_arm_link_hash_table
917583ad
NC		 2168 {
2169 /* The main hash table. */
2170 struct elf_link_hash_table root;
252b5132 2171
4cc11e76 2172 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
dc810e39 2173 bfd_size_type thumb_glue_size;
252b5132 2174
4cc11e76 2175 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
dc810e39 2176 bfd_size_type arm_glue_size;
252b5132 2177
845b51d6
PB		 2178 /* The size in bytes of section containing the ARMv4 BX veneers. */
2179 bfd_size_type bx_glue_size;
2180
2181 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2182 veneer has been populated. */
2183 bfd_vma bx_glue_offset[15];
2184
c7b8f16e
JB		 2185 /* The size in bytes of the section containing glue for VFP11 erratum
2186 veneers. */
2187 bfd_size_type vfp11_erratum_glue_size;
2188
4cc11e76 2189 /* An arbitrary input BFD chosen to hold the glue sections. */
917583ad 2190 bfd * bfd_of_glue_owner;
ba96a88f 2191
e489d0ae
PB		 2192 /* Nonzero to output a BE8 image. */
2193 int byteswap_code;
2194
9c504268 2195 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
87bc043a 2196 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
9c504268
PB		 2197 int target1_is_rel;
2198
eb043451
PB		 2199 /* The relocation to use for R_ARM_TARGET2 relocations. */
2200 int target2_reloc;
2201
845b51d6
PB		 2202 /* 0 = Ignore R_ARM_V4BX.
2203 1 = Convert BX to MOV PC.
2204 2 = Generate v4 interworing stubs. */
319850b4
JB		 2205 int fix_v4bx;
2206
33bfe774
JB		 2207 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2208 int use_blx;
2209
c7b8f16e
JB		 2210 /* What sort of code sequences we should look for which may trigger the
2211 VFP11 denorm erratum. */
2212 bfd_arm_vfp11_fix vfp11_fix;
2213
2214 /* Global counter for the number of fixes we have emitted. */
2215 int num_vfp11_fixes;
2216
27e55c4d
PB		 2217 /* Nonzero to force PIC branch veneers. */
2218 int pic_veneer;
2219
e5a52504
MM		 2220 /* The number of bytes in the initial entry in the PLT. */
2221 bfd_size_type plt_header_size;
2222
2223 /* The number of bytes in the subsequent PLT etries. */
2224 bfd_size_type plt_entry_size;
2225
00a97672
RS		 2226 /* True if the target system is VxWorks. */
2227 int vxworks_p;
2228
e5a52504
MM		 2229 /* True if the target system is Symbian OS. */
2230 int symbian_p;
2231
4e7fd91e
PB		 2232 /* True if the target uses REL relocations. */
2233 int use_rel;
2234
5e681ec4
PB		 2235 /* Short-cuts to get to dynamic linker sections. */
2236 asection *sgot;
2237 asection *sgotplt;
2238 asection *srelgot;
2239 asection *splt;
2240 asection *srelplt;
2241 asection *sdynbss;
2242 asection *srelbss;
2243
00a97672
RS		 2244 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2245 asection *srelplt2;
2246
ba93b8ac
DJ		 2247 /* Data for R_ARM_TLS_LDM32 relocations. */
2248 union {
2249 bfd_signed_vma refcount;
2250 bfd_vma offset;
2251 } tls_ldm_got;
2252
5e681ec4
PB		 2253 /* Small local sym to section mapping cache. */
2254 struct sym_sec_cache sym_sec;
b7693d02
DJ		 2255
2256 /* For convenience in allocate_dynrelocs. */
2257 bfd * obfd;
917583ad 2258 };
252b5132 2259
780a67af
NC		 2260/* Create an entry in an ARM ELF linker hash table. */
2261
2262static struct bfd_hash_entry *
57e8b36a
NC		 2263elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2264 struct bfd_hash_table * table,
2265 const char * string)
780a67af
NC		 2266{
2267 struct elf32_arm_link_hash_entry * ret =
2268 (struct elf32_arm_link_hash_entry *) entry;
2269
2270 /* Allocate the structure if it has not already been allocated by a
2271 subclass. */
2272 if (ret == (struct elf32_arm_link_hash_entry *) NULL)
57e8b36a
NC		 2273 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2274 if (ret == NULL)
780a67af
NC		 2275 return (struct bfd_hash_entry *) ret;
2276
2277 /* Call the allocation method of the superclass. */
2278 ret = ((struct elf32_arm_link_hash_entry *)
2279 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2280 table, string));
57e8b36a 2281 if (ret != NULL)
b7693d02
DJ		 2282 {
2283 ret->relocs_copied = NULL;
ba93b8ac 2284 ret->tls_type = GOT_UNKNOWN;
b7693d02 2285 ret->plt_thumb_refcount = 0;
bd97cb95 2286 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2287 ret->plt_got_offset = -1;
a4fd1a8e 2288 ret->export_glue = NULL;
b7693d02 2289 }
780a67af
NC		 2290
2291 return (struct bfd_hash_entry *) ret;
2292}
2293
00a97672
RS		 2294/* Return true if NAME is the name of the relocation section associated
2295 with S. */
2296
2297static bfd_boolean
2298reloc_section_p (struct elf32_arm_link_hash_table *htab,
2299 const char *name, asection *s)
2300{
2301 if (htab->use_rel)
0112cd26 2302 return CONST_STRNEQ (name, ".rel") && strcmp (s->name, name + 4) == 0;
00a97672 2303 else
0112cd26 2304 return CONST_STRNEQ (name, ".rela") && strcmp (s->name, name + 5) == 0;
00a97672
RS		 2305}
2306
2307/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2308 shortcuts to them in our hash table. */
2309
2310static bfd_boolean
57e8b36a 2311create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2312{
2313 struct elf32_arm_link_hash_table *htab;
2314
e5a52504
MM		 2315 htab = elf32_arm_hash_table (info);
2316 /* BPABI objects never have a GOT, or associated sections. */
2317 if (htab->symbian_p)
2318 return TRUE;
2319
5e681ec4
PB		 2320 if (! _bfd_elf_create_got_section (dynobj, info))
2321 return FALSE;
2322
5e681ec4
PB		 2323 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2324 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2325 if (!htab->sgot || !htab->sgotplt)
2326 abort ();
2327
00a97672
RS		 2328 htab->srelgot = bfd_make_section_with_flags (dynobj,
2329 RELOC_SECTION (htab, ".got"),
3496cb2a
L		 2330 (SEC_ALLOC | SEC_LOAD
2331 | SEC_HAS_CONTENTS
2332 | SEC_IN_MEMORY
2333 | SEC_LINKER_CREATED
2334 | SEC_READONLY));
5e681ec4 2335 if (htab->srelgot == NULL
5e681ec4
PB		 2336 || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
2337 return FALSE;
2338 return TRUE;
2339}
2340
00a97672
RS		 2341/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2342 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2343 hash table. */
2344
2345static bfd_boolean
57e8b36a 2346elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2347{
2348 struct elf32_arm_link_hash_table *htab;
2349
2350 htab = elf32_arm_hash_table (info);
2351 if (!htab->sgot && !create_got_section (dynobj, info))
2352 return FALSE;
2353
2354 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2355 return FALSE;
2356
2357 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2358 htab->srelplt = bfd_get_section_by_name (dynobj,
2359 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2360 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2361 if (!info->shared)
00a97672
RS		 2362 htab->srelbss = bfd_get_section_by_name (dynobj,
2363 RELOC_SECTION (htab, ".bss"));
2364
2365 if (htab->vxworks_p)
2366 {
2367 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2368 return FALSE;
2369
2370 if (info->shared)
2371 {
2372 htab->plt_header_size = 0;
2373 htab->plt_entry_size
2374 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2375 }
2376 else
2377 {
2378 htab->plt_header_size
2379 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2380 htab->plt_entry_size
2381 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2382 }
2383 }
5e681ec4 2384
e5a52504
MM		 2385 if (!htab->splt
2386 || !htab->srelplt
2387 || !htab->sdynbss
5e681ec4
PB		 2388 || (!info->shared && !htab->srelbss))
2389 abort ();
2390
2391 return TRUE;
2392}
2393
2394/* Copy the extra info we tack onto an elf_link_hash_entry. */
2395
2396static void
fcfa13d2 2397elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
5e681ec4
PB		 2398 struct elf_link_hash_entry *dir,
2399 struct elf_link_hash_entry *ind)
2400{
2401 struct elf32_arm_link_hash_entry *edir, *eind;
2402
2403 edir = (struct elf32_arm_link_hash_entry *) dir;
2404 eind = (struct elf32_arm_link_hash_entry *) ind;
2405
2406 if (eind->relocs_copied != NULL)
2407 {
2408 if (edir->relocs_copied != NULL)
2409 {
2410 struct elf32_arm_relocs_copied **pp;
2411 struct elf32_arm_relocs_copied *p;
2412
fcfa13d2 2413 /* Add reloc counts against the indirect sym to the direct sym
5e681ec4
PB		 2414 list. Merge any entries against the same section. */
2415 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2416 {
2417 struct elf32_arm_relocs_copied *q;
2418
2419 for (q = edir->relocs_copied; q != NULL; q = q->next)
2420 if (q->section == p->section)
2421 {
ba93b8ac 2422 q->pc_count += p->pc_count;
5e681ec4
PB		 2423 q->count += p->count;
2424 *pp = p->next;
2425 break;
2426 }
2427 if (q == NULL)
2428 pp = &p->next;
2429 }
2430 *pp = edir->relocs_copied;
2431 }
2432
2433 edir->relocs_copied = eind->relocs_copied;
2434 eind->relocs_copied = NULL;
2435 }
2436
b34b2d70 2437 if (ind->root.type == bfd_link_hash_indirect)
ba93b8ac 2438 {
b34b2d70
DJ		 2439 /* Copy over PLT info. */
2440 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2441 eind->plt_thumb_refcount = 0;
bd97cb95
DJ		 2442 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2443 eind->plt_maybe_thumb_refcount = 0;
b34b2d70
DJ		 2444
2445 if (dir->got.refcount <= 0)
2446 {
2447 edir->tls_type = eind->tls_type;
2448 eind->tls_type = GOT_UNKNOWN;
2449 }
ba93b8ac
DJ		 2450 }
2451
fcfa13d2 2452 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
5e681ec4
PB		 2453}
2454
9b485d32 2455/* Create an ARM elf linker hash table. */
252b5132
RH		 2456
2457static struct bfd_link_hash_table *
57e8b36a 2458elf32_arm_link_hash_table_create (bfd *abfd)
252b5132
RH		 2459{
2460 struct elf32_arm_link_hash_table *ret;
dc810e39 2461 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
252b5132 2462
57e8b36a
NC		 2463 ret = bfd_malloc (amt);
2464 if (ret == NULL)
252b5132
RH		 2465 return NULL;
2466
57e8b36a 2467 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
66eb6687
AM		 2468 elf32_arm_link_hash_newfunc,
2469 sizeof (struct elf32_arm_link_hash_entry)))
252b5132 2470 {
e2d34d7d 2471 free (ret);
252b5132
RH		 2472 return NULL;
2473 }
2474
5e681ec4
PB		 2475 ret->sgot = NULL;
2476 ret->sgotplt = NULL;
2477 ret->srelgot = NULL;
2478 ret->splt = NULL;
2479 ret->srelplt = NULL;
2480 ret->sdynbss = NULL;
2481 ret->srelbss = NULL;
00a97672 2482 ret->srelplt2 = NULL;
252b5132
RH		 2483 ret->thumb_glue_size = 0;
2484 ret->arm_glue_size = 0;
845b51d6
PB		 2485 ret->bx_glue_size = 0;
2486 memset (ret->bx_glue_offset, 0, sizeof(ret->bx_glue_offset));
c7b8f16e
JB		 2487 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2488 ret->vfp11_erratum_glue_size = 0;
2489 ret->num_vfp11_fixes = 0;
252b5132 2490 ret->bfd_of_glue_owner = NULL;
e489d0ae 2491 ret->byteswap_code = 0;
9c504268 2492 ret->target1_is_rel = 0;
eb043451 2493 ret->target2_reloc = R_ARM_NONE;
e5a52504
MM		 2494#ifdef FOUR_WORD_PLT
2495 ret->plt_header_size = 16;
2496 ret->plt_entry_size = 16;
2497#else
2498 ret->plt_header_size = 20;
2499 ret->plt_entry_size = 12;
2500#endif
33bfe774
JB		 2501 ret->fix_v4bx = 0;
2502 ret->use_blx = 0;
00a97672 2503 ret->vxworks_p = 0;
e5a52504 2504 ret->symbian_p = 0;
4e7fd91e 2505 ret->use_rel = 1;
5e681ec4 2506 ret->sym_sec.abfd = NULL;
b7693d02 2507 ret->obfd = abfd;
ba93b8ac 2508 ret->tls_ldm_got.refcount = 0;
252b5132
RH		 2509
2510 return &ret->root.root;
2511}
2512
9b485d32
NC		 2513/* Locate the Thumb encoded calling stub for NAME. */
2514
252b5132 2515static struct elf_link_hash_entry *
57e8b36a
NC		 2516find_thumb_glue (struct bfd_link_info *link_info,
2517 const char *name,
f2a9dd69 2518 char **error_message)
252b5132
RH		 2519{
2520 char *tmp_name;
2521 struct elf_link_hash_entry *hash;
2522 struct elf32_arm_link_hash_table *hash_table;
2523
2524 /* We need a pointer to the armelf specific hash table. */
2525 hash_table = elf32_arm_hash_table (link_info);
2526
57e8b36a
NC		 2527 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2528 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2529
2530 BFD_ASSERT (tmp_name);
2531
2532 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2533
2534 hash = elf_link_hash_lookup
b34976b6 2535 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 2536
b1657152
AM		 2537 if (hash == NULL
2538 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
2539 tmp_name, name) == -1)
2540 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 2541
2542 free (tmp_name);
2543
2544 return hash;
2545}
2546
9b485d32
NC		 2547/* Locate the ARM encoded calling stub for NAME. */
2548
252b5132 2549static struct elf_link_hash_entry *
57e8b36a
NC		 2550find_arm_glue (struct bfd_link_info *link_info,
2551 const char *name,
f2a9dd69 2552 char **error_message)
252b5132
RH		 2553{
2554 char *tmp_name;
2555 struct elf_link_hash_entry *myh;
2556 struct elf32_arm_link_hash_table *hash_table;
2557
2558 /* We need a pointer to the elfarm specific hash table. */
2559 hash_table = elf32_arm_hash_table (link_info);
2560
57e8b36a
NC		 2561 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2562 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2563
2564 BFD_ASSERT (tmp_name);
2565
2566 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2567
2568 myh = elf_link_hash_lookup
b34976b6 2569 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 2570
b1657152
AM		 2571 if (myh == NULL
2572 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
2573 tmp_name, name) == -1)
2574 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 2575
2576 free (tmp_name);
2577
2578 return myh;
2579}
2580
8f6277f5 2581/* ARM->Thumb glue (static images):
252b5132
RH		 2582
2583 .arm
2584 __func_from_arm:
2585 ldr r12, __func_addr
2586 bx r12
2587 __func_addr:
8f6277f5 2588 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 2589
26079076
PB		 2590 (v5t static images)
2591 .arm
2592 __func_from_arm:
2593 ldr pc, __func_addr
2594 __func_addr:
2595 .word func @ behave as if you saw a ARM_32 reloc.
2596
8f6277f5
PB		 2597 (relocatable images)
2598 .arm
2599 __func_from_arm:
2600 ldr r12, __func_offset
2601 add r12, r12, pc
2602 bx r12
2603 __func_offset:
2604 .word func - .
2605 */
2606
2607#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 2608static const insn32 a2t1_ldr_insn = 0xe59fc000;
2609static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
2610static const insn32 a2t3_func_addr_insn = 0x00000001;
2611
26079076
PB		 2612#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
2613static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
2614static const insn32 a2t2v5_func_addr_insn = 0x00000001;
2615
8f6277f5
PB		 2616#define ARM2THUMB_PIC_GLUE_SIZE 16
2617static const insn32 a2t1p_ldr_insn = 0xe59fc004;
2618static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
2619static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
2620
9b485d32 2621/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132
RH		 2622
2623 .thumb .thumb
2624 .align 2 .align 2
2625 __func_from_thumb: __func_from_thumb:
2626 bx pc push {r6, lr}
2627 nop ldr r6, __func_addr
2628 .arm mov lr, pc
2629 __func_change_to_arm: bx r6
2630 b func .arm
2631 __func_back_to_thumb:
2632 ldmia r13! {r6, lr}
2633 bx lr
2634 __func_addr:
9b485d32 2635 .word func */
252b5132
RH		 2636
2637#define THUMB2ARM_GLUE_SIZE 8
2638static const insn16 t2a1_bx_pc_insn = 0x4778;
2639static const insn16 t2a2_noop_insn = 0x46c0;
2640static const insn32 t2a3_b_insn = 0xea000000;
2641
c7b8f16e
JB		 2642#define VFP11_ERRATUM_VENEER_SIZE 8
2643
845b51d6
PB		 2644#define ARM_BX_VENEER_SIZE 12
2645static const insn32 armbx1_tst_insn = 0xe3100001;
2646static const insn32 armbx2_moveq_insn = 0x01a0f000;
2647static const insn32 armbx3_bx_insn = 0xe12fff10;
2648
7e392df6 2649#ifndef ELFARM_NABI_C_INCLUDED
b34976b6 2650bfd_boolean
57e8b36a 2651bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
252b5132
RH		 2652{
2653 asection * s;
2654 bfd_byte * foo;
2655 struct elf32_arm_link_hash_table * globals;
2656
2657 globals = elf32_arm_hash_table (info);
2658
2659 BFD_ASSERT (globals != NULL);
2660
2661 if (globals->arm_glue_size != 0)
2662 {
2663 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2664
dc810e39
AM		 2665 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
2666 ARM2THUMB_GLUE_SECTION_NAME);
252b5132
RH		 2667
2668 BFD_ASSERT (s != NULL);
2669
57e8b36a 2670 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
252b5132 2671
2f475487 2672 BFD_ASSERT (s->size == globals->arm_glue_size);
252b5132
RH		 2673 s->contents = foo;
2674 }
2675
2676 if (globals->thumb_glue_size != 0)
2677 {
2678 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2679
2680 s = bfd_get_section_by_name
2681 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2682
2683 BFD_ASSERT (s != NULL);
2684
57e8b36a 2685 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
252b5132 2686
2f475487 2687 BFD_ASSERT (s->size == globals->thumb_glue_size);
252b5132
RH		 2688 s->contents = foo;
2689 }
c7b8f16e
JB		 2690
2691 if (globals->vfp11_erratum_glue_size != 0)
2692 {
2693 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2694
2695 s = bfd_get_section_by_name
2696 (globals->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2697
2698 BFD_ASSERT (s != NULL);
2699
2700 foo = bfd_alloc (globals->bfd_of_glue_owner,
2701 globals->vfp11_erratum_glue_size);
2702
2703 BFD_ASSERT (s->size == globals->vfp11_erratum_glue_size);
2704 s->contents = foo;
2705 }
252b5132 2706
845b51d6
PB		 2707 if (globals->bx_glue_size != 0)
2708 {
2709 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2710
2711 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
2712 ARM_BX_GLUE_SECTION_NAME);
2713
2714 BFD_ASSERT (s != NULL);
2715
2716 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->bx_glue_size);
2717
2718 BFD_ASSERT (s->size == globals->bx_glue_size);
2719 s->contents = foo;
2720 }
2721
b34976b6 2722 return TRUE;
252b5132
RH		 2723}
2724
a4fd1a8e
PB		 2725/* Allocate space and symbols for calling a Thumb function from Arm mode.
2726 returns the symbol identifying teh stub. */
2727static struct elf_link_hash_entry *
57e8b36a
NC		 2728record_arm_to_thumb_glue (struct bfd_link_info * link_info,
2729 struct elf_link_hash_entry * h)
252b5132
RH		 2730{
2731 const char * name = h->root.root.string;
63b0f745 2732 asection * s;
252b5132
RH		 2733 char * tmp_name;
2734 struct elf_link_hash_entry * myh;
14a793b2 2735 struct bfd_link_hash_entry * bh;
252b5132 2736 struct elf32_arm_link_hash_table * globals;
dc810e39 2737 bfd_vma val;
2f475487 2738 bfd_size_type size;
252b5132
RH		 2739
2740 globals = elf32_arm_hash_table (link_info);
2741
2742 BFD_ASSERT (globals != NULL);
2743 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2744
2745 s = bfd_get_section_by_name
2746 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
2747
252b5132
RH		 2748 BFD_ASSERT (s != NULL);
2749
57e8b36a 2750 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2751
2752 BFD_ASSERT (tmp_name);
2753
2754 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2755
2756 myh = elf_link_hash_lookup
b34976b6 2757 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 2758
2759 if (myh != NULL)
2760 {
9b485d32 2761 /* We've already seen this guy. */
252b5132 2762 free (tmp_name);
a4fd1a8e 2763 return myh;
252b5132
RH		 2764 }
2765
57e8b36a
NC		 2766 /* The only trick here is using hash_table->arm_glue_size as the value.
2767 Even though the section isn't allocated yet, this is where we will be
2768 putting it. */
14a793b2 2769 bh = NULL;
dc810e39
AM		 2770 val = globals->arm_glue_size + 1;
2771 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
2772 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2773 NULL, TRUE, FALSE, &bh);
252b5132 2774
b7693d02
DJ		 2775 myh = (struct elf_link_hash_entry *) bh;
2776 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2777 myh->forced_local = 1;
2778
252b5132
RH		 2779 free (tmp_name);
2780
27e55c4d
PB		 2781 if (link_info->shared || globals->root.is_relocatable_executable
2782 || globals->pic_veneer)
2f475487 2783 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 2784 else if (globals->use_blx)
2785 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 2786 else
2f475487
AM		 2787 size = ARM2THUMB_STATIC_GLUE_SIZE;
2788
2789 s->size += size;
2790 globals->arm_glue_size += size;
252b5132 2791
a4fd1a8e 2792 return myh;
252b5132
RH		 2793}
2794
2795static void
57e8b36a
NC		 2796record_thumb_to_arm_glue (struct bfd_link_info *link_info,
2797 struct elf_link_hash_entry *h)
252b5132
RH		 2798{
2799 const char *name = h->root.root.string;
63b0f745 2800 asection *s;
252b5132
RH		 2801 char *tmp_name;
2802 struct elf_link_hash_entry *myh;
14a793b2 2803 struct bfd_link_hash_entry *bh;
252b5132 2804 struct elf32_arm_link_hash_table *hash_table;
dc810e39 2805 bfd_vma val;
252b5132
RH		 2806
2807 hash_table = elf32_arm_hash_table (link_info);
2808
2809 BFD_ASSERT (hash_table != NULL);
2810 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2811
2812 s = bfd_get_section_by_name
2813 (hash_table->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2814
2815 BFD_ASSERT (s != NULL);
2816
57e8b36a
NC		 2817 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2818 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2819
2820 BFD_ASSERT (tmp_name);
2821
2822 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2823
2824 myh = elf_link_hash_lookup
b34976b6 2825 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 2826
2827 if (myh != NULL)
2828 {
9b485d32 2829 /* We've already seen this guy. */
252b5132 2830 free (tmp_name);
9b485d32 2831 return;
252b5132
RH		 2832 }
2833
14a793b2 2834 bh = NULL;
dc810e39
AM		 2835 val = hash_table->thumb_glue_size + 1;
2836 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2837 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2838 NULL, TRUE, FALSE, &bh);
252b5132 2839
9b485d32 2840 /* If we mark it 'Thumb', the disassembler will do a better job. */
14a793b2 2841 myh = (struct elf_link_hash_entry *) bh;
b7693d02
DJ		 2842 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
2843 myh->forced_local = 1;
252b5132
RH		 2844
2845 free (tmp_name);
2846
252b5132
RH		 2847#define CHANGE_TO_ARM "__%s_change_to_arm"
2848#define BACK_FROM_ARM "__%s_back_from_arm"
2849
9b485d32 2850 /* Allocate another symbol to mark where we switch to Arm mode. */
57e8b36a
NC		 2851 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2852 + strlen (CHANGE_TO_ARM) + 1);
252b5132
RH		 2853
2854 BFD_ASSERT (tmp_name);
2855
2856 sprintf (tmp_name, CHANGE_TO_ARM, name);
2857
14a793b2 2858 bh = NULL;
dc810e39
AM		 2859 val = hash_table->thumb_glue_size + 4,
2860 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2861 tmp_name, BSF_LOCAL, s, val,
b34976b6 2862 NULL, TRUE, FALSE, &bh);
252b5132
RH		 2863
2864 free (tmp_name);
2865
2f475487 2866 s->size += THUMB2ARM_GLUE_SIZE;
252b5132
RH		 2867 hash_table->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
2868
2869 return;
2870}
2871
c7b8f16e 2872
845b51d6
PB		 2873/* Allocate space for ARMv4 BX veneers. */
2874
2875static void
2876record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
2877{
2878 asection * s;
2879 struct elf32_arm_link_hash_table *globals;
2880 char *tmp_name;
2881 struct elf_link_hash_entry *myh;
2882 struct bfd_link_hash_entry *bh;
2883 bfd_vma val;
2884
2885 /* BX PC does not need a veneer. */
2886 if (reg == 15)
2887 return;
2888
2889 globals = elf32_arm_hash_table (link_info);
2890
2891 BFD_ASSERT (globals != NULL);
2892 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2893
2894 /* Check if this veneer has already been allocated. */
2895 if (globals->bx_glue_offset[reg])
2896 return;
2897
2898 s = bfd_get_section_by_name
2899 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
2900
2901 BFD_ASSERT (s != NULL);
2902
2903 /* Add symbol for veneer. */
2904 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
2905
2906 BFD_ASSERT (tmp_name);
2907
2908 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
2909
2910 myh = elf_link_hash_lookup
2911 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
2912
2913 BFD_ASSERT (myh == NULL);
2914
2915 bh = NULL;
2916 val = globals->bx_glue_size;
2917 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
2918 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
2919 NULL, TRUE, FALSE, &bh);
2920
2921 myh = (struct elf_link_hash_entry *) bh;
2922 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2923 myh->forced_local = 1;
2924
2925 s->size += ARM_BX_VENEER_SIZE;
2926 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
2927 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
2928}
2929
2930
c7b8f16e
JB		 2931/* Add an entry to the code/data map for section SEC. */
2932
2933static void
2934elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
2935{
2936 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
2937 unsigned int newidx;
2938
2939 if (sec_data->map == NULL)
2940 {
2941 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
2942 sec_data->mapcount = 0;
2943 sec_data->mapsize = 1;
2944 }
2945
2946 newidx = sec_data->mapcount++;
2947
2948 if (sec_data->mapcount > sec_data->mapsize)
2949 {
2950 sec_data->mapsize *= 2;
2951 sec_data->map = bfd_realloc (sec_data->map, sec_data->mapsize
2952 * sizeof (elf32_arm_section_map));
2953 }
2954
2955 sec_data->map[newidx].vma = vma;
2956 sec_data->map[newidx].type = type;
2957}
2958
2959
2960/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
2961 veneers are handled for now. */
2962
2963static bfd_vma
2964record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
2965 elf32_vfp11_erratum_list *branch,
2966 bfd *branch_bfd,
2967 asection *branch_sec,
2968 unsigned int offset)
2969{
2970 asection *s;
2971 struct elf32_arm_link_hash_table *hash_table;
2972 char *tmp_name;
2973 struct elf_link_hash_entry *myh;
2974 struct bfd_link_hash_entry *bh;
2975 bfd_vma val;
2976 struct _arm_elf_section_data *sec_data;
2977 int errcount;
2978 elf32_vfp11_erratum_list *newerr;
2979
2980 hash_table = elf32_arm_hash_table (link_info);
2981
2982 BFD_ASSERT (hash_table != NULL);
2983 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2984
2985 s = bfd_get_section_by_name
2986 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2987
2988 sec_data = elf32_arm_section_data (s);
2989
2990 BFD_ASSERT (s != NULL);
2991
2992 tmp_name = bfd_malloc ((bfd_size_type) strlen
2993 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
2994
2995 BFD_ASSERT (tmp_name);
2996
2997 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
2998 hash_table->num_vfp11_fixes);
2999
3000 myh = elf_link_hash_lookup
3001 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
3002
3003 BFD_ASSERT (myh == NULL);
3004
3005 bh = NULL;
3006 val = hash_table->vfp11_erratum_glue_size;
3007 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
3008 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
3009 NULL, TRUE, FALSE, &bh);
3010
3011 myh = (struct elf_link_hash_entry *) bh;
3012 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
3013 myh->forced_local = 1;
3014
3015 /* Link veneer back to calling location. */
3016 errcount = ++(sec_data->erratumcount);
3017 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
3018
3019 newerr->type = VFP11_ERRATUM_ARM_VENEER;
3020 newerr->vma = -1;
3021 newerr->u.v.branch = branch;
3022 newerr->u.v.id = hash_table->num_vfp11_fixes;
3023 branch->u.b.veneer = newerr;
3024
3025 newerr->next = sec_data->erratumlist;
3026 sec_data->erratumlist = newerr;
3027
3028 /* A symbol for the return from the veneer. */
3029 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
3030 hash_table->num_vfp11_fixes);
3031
3032 myh = elf_link_hash_lookup
3033 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
3034
3035 if (myh != NULL)
3036 abort ();
3037
3038 bh = NULL;
3039 val = offset + 4;
3040 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
3041 branch_sec, val, NULL, TRUE, FALSE, &bh);
3042
3043 myh = (struct elf_link_hash_entry *) bh;
3044 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
3045 myh->forced_local = 1;
3046
3047 free (tmp_name);
3048
3049 /* Generate a mapping symbol for the veneer section, and explicitly add an
3050 entry for that symbol to the code/data map for the section. */
3051 if (hash_table->vfp11_erratum_glue_size == 0)
3052 {
3053 bh = NULL;
3054 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
3055 ever requires this erratum fix. */
3056 _bfd_generic_link_add_one_symbol (link_info,
3057 hash_table->bfd_of_glue_owner, "$a",
3058 BSF_LOCAL, s, 0, NULL,
3059 TRUE, FALSE, &bh);
3060
3061 myh = (struct elf_link_hash_entry *) bh;
3062 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
3063 myh->forced_local = 1;
3064
3065 /* The elf32_arm_init_maps function only cares about symbols from input
3066 BFDs. We must make a note of this generated mapping symbol
3067 ourselves so that code byteswapping works properly in
3068 elf32_arm_write_section. */
3069 elf32_arm_section_map_add (s, 'a', 0);
3070 }
3071
3072 s->size += VFP11_ERRATUM_VENEER_SIZE;
3073 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
3074 hash_table->num_vfp11_fixes++;
3075
3076 /* The offset of the veneer. */
3077 return val;
3078}
3079
8afb0e02
NC		 3080/* Add the glue sections to ABFD. This function is called from the
3081 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 3082
b34976b6 3083bfd_boolean
57e8b36a
NC		 3084bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
3085 struct bfd_link_info *info)
252b5132 3086{
252b5132
RH		 3087 flagword flags;
3088 asection *sec;
3089
8afb0e02
NC		 3090 /* If we are only performing a partial
3091 link do not bother adding the glue. */
1049f94e 3092 if (info->relocatable)
b34976b6 3093 return TRUE;
252b5132 3094
252b5132
RH		 3095 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
3096
3097 if (sec == NULL)
3098 {
57db232e
NC		 3099 /* Note: we do not include the flag SEC_LINKER_CREATED, as this
3100 will prevent elf_link_input_bfd() from processing the contents
3101 of this section. */
2f475487
AM		 3102 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3103 | SEC_CODE | SEC_READONLY);
252b5132 3104
3496cb2a
L		 3105 sec = bfd_make_section_with_flags (abfd,
3106 ARM2THUMB_GLUE_SECTION_NAME,
3107 flags);
252b5132
RH		 3108
3109 if (sec == NULL
252b5132 3110 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3111 return FALSE;
9a5aca8c 3112
57db232e
NC		 3113 /* Set the gc mark to prevent the section from being removed by garbage
3114 collection, despite the fact that no relocs refer to this section. */
3115 sec->gc_mark = 1;
252b5132
RH		 3116 }
3117
3118 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
3119
3120 if (sec == NULL)
3121 {
2f475487
AM		 3122 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3123 | SEC_CODE | SEC_READONLY);
252b5132 3124
3496cb2a
L		 3125 sec = bfd_make_section_with_flags (abfd,
3126 THUMB2ARM_GLUE_SECTION_NAME,
3127 flags);
252b5132
RH		 3128
3129 if (sec == NULL
252b5132 3130 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3131 return FALSE;
9a5aca8c 3132
57db232e 3133 sec->gc_mark = 1;
252b5132
RH		 3134 }
3135
c7b8f16e
JB		 3136 sec = bfd_get_section_by_name (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME);
3137
3138 if (sec == NULL)
3139 {
3140 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3141 | SEC_CODE | SEC_READONLY);
3142
3143 sec = bfd_make_section_with_flags (abfd,
3144 VFP11_ERRATUM_VENEER_SECTION_NAME,
3145 flags);
3146
3147 if (sec == NULL
3148 || !bfd_set_section_alignment (abfd, sec, 2))
3149 return FALSE;
3150
3151 sec->gc_mark = 1;
3152 }
3153
845b51d6
PB		 3154 sec = bfd_get_section_by_name (abfd, ARM_BX_GLUE_SECTION_NAME);
3155
3156 if (sec == NULL)
3157 {
3158 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3159 | SEC_CODE | SEC_READONLY);
3160
3161 sec = bfd_make_section_with_flags (abfd,
3162 ARM_BX_GLUE_SECTION_NAME,
3163 flags);
3164
3165 if (sec == NULL
3166 || !bfd_set_section_alignment (abfd, sec, 2))
3167 return FALSE;
3168
3169 sec->gc_mark = 1;
3170 }
3171
b34976b6 3172 return TRUE;
8afb0e02
NC		 3173}
3174
3175/* Select a BFD to be used to hold the sections used by the glue code.
3176 This function is called from the linker scripts in ld/emultempl/
3177 {armelf/pe}.em */
3178
b34976b6 3179bfd_boolean
57e8b36a 3180bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 3181{
3182 struct elf32_arm_link_hash_table *globals;
3183
3184 /* If we are only performing a partial link
3185 do not bother getting a bfd to hold the glue. */
1049f94e 3186 if (info->relocatable)
b34976b6 3187 return TRUE;
8afb0e02 3188
b7693d02
DJ		 3189 /* Make sure we don't attach the glue sections to a dynamic object. */
3190 BFD_ASSERT (!(abfd->flags & DYNAMIC));
3191
8afb0e02
NC		 3192 globals = elf32_arm_hash_table (info);
3193
3194 BFD_ASSERT (globals != NULL);
3195
3196 if (globals->bfd_of_glue_owner != NULL)
b34976b6 3197 return TRUE;
8afb0e02 3198
252b5132
RH		 3199 /* Save the bfd for later use. */
3200 globals->bfd_of_glue_owner = abfd;
cedb70c5 3201
b34976b6 3202 return TRUE;
252b5132
RH		 3203}
3204
39b41c9c
PB		 3205static void check_use_blx(struct elf32_arm_link_hash_table *globals)
3206{
104d59d1
JM		 3207 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3208 Tag_CPU_arch) > 2)
39b41c9c
PB		 3209 globals->use_blx = 1;
3210}
3211
b34976b6 3212bfd_boolean
57e8b36a 3213bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 3214 struct bfd_link_info *link_info)
252b5132
RH		 3215{
3216 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 3217 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 3218 Elf_Internal_Rela *irel, *irelend;
3219 bfd_byte *contents = NULL;
252b5132
RH		 3220
3221 asection *sec;
3222 struct elf32_arm_link_hash_table *globals;
3223
3224 /* If we are only performing a partial link do not bother
3225 to construct any glue. */
1049f94e 3226 if (link_info->relocatable)
b34976b6 3227 return TRUE;
252b5132 3228
39ce1a6a
NC		 3229 /* Here we have a bfd that is to be included on the link. We have a
3230 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 3231 globals = elf32_arm_hash_table (link_info);
3232
3233 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 3234
3235 check_use_blx (globals);
252b5132 3236
d504ffc8 3237 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 3238 {
d003868e
AM		 3239 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
3240 abfd);
e489d0ae
PB		 3241 return FALSE;
3242 }
f21f3fe0 3243
39ce1a6a
NC		 3244 /* PR 5398: If we have not decided to include any loadable sections in
3245 the output then we will not have a glue owner bfd. This is OK, it
3246 just means that there is nothing else for us to do here. */
3247 if (globals->bfd_of_glue_owner == NULL)
3248 return TRUE;
3249
252b5132
RH		 3250 /* Rummage around all the relocs and map the glue vectors. */
3251 sec = abfd->sections;
3252
3253 if (sec == NULL)
b34976b6 3254 return TRUE;
252b5132
RH		 3255
3256 for (; sec != NULL; sec = sec->next)
3257 {
3258 if (sec->reloc_count == 0)
3259 continue;
3260
2f475487
AM		 3261 if ((sec->flags & SEC_EXCLUDE) != 0)
3262 continue;
3263
0ffa91dd 3264 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 3265
9b485d32 3266 /* Load the relocs. */
6cdc0ccc 3267 internal_relocs
57e8b36a 3268 = _bfd_elf_link_read_relocs (abfd, sec, (void *) NULL,
45d6a902 3269 (Elf_Internal_Rela *) NULL, FALSE);
252b5132 3270
6cdc0ccc
AM		 3271 if (internal_relocs == NULL)
3272 goto error_return;
252b5132 3273
6cdc0ccc
AM		 3274 irelend = internal_relocs + sec->reloc_count;
3275 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 3276 {
3277 long r_type;
3278 unsigned long r_index;
252b5132
RH		 3279
3280 struct elf_link_hash_entry *h;
3281
3282 r_type = ELF32_R_TYPE (irel->r_info);
3283 r_index = ELF32_R_SYM (irel->r_info);
3284
9b485d32 3285 /* These are the only relocation types we care about. */
ba96a88f 3286 if ( r_type != R_ARM_PC24
b7693d02 3287 && r_type != R_ARM_PLT32
5b5bb741
PB		 3288 && r_type != R_ARM_CALL
3289 && r_type != R_ARM_JUMP24
bd97cb95 3290 && r_type != R_ARM_THM_CALL
845b51d6
PB		 3291 && r_type != R_ARM_THM_JUMP24
3292 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 3293 continue;
3294
3295 /* Get the section contents if we haven't done so already. */
3296 if (contents == NULL)
3297 {
3298 /* Get cached copy if it exists. */
3299 if (elf_section_data (sec)->this_hdr.contents != NULL)
3300 contents = elf_section_data (sec)->this_hdr.contents;
3301 else
3302 {
3303 /* Go get them off disk. */
57e8b36a 3304 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 3305 goto error_return;
3306 }
3307 }
3308
845b51d6
PB		 3309 if (r_type == R_ARM_V4BX)
3310 {
3311 int reg;
3312
3313 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
3314 record_arm_bx_glue (link_info, reg);
3315 continue;
3316 }
3317
a7c10850 3318 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 3319 h = NULL;
3320
9b485d32 3321 /* We don't care about local symbols. */
252b5132
RH		 3322 if (r_index < symtab_hdr->sh_info)
3323 continue;
3324
9b485d32 3325 /* This is an external symbol. */
252b5132
RH		 3326 r_index -= symtab_hdr->sh_info;
3327 h = (struct elf_link_hash_entry *)
3328 elf_sym_hashes (abfd)[r_index];
3329
3330 /* If the relocation is against a static symbol it must be within
3331 the current section and so cannot be a cross ARM/Thumb relocation. */
3332 if (h == NULL)
3333 continue;
3334
d504ffc8
DJ		 3335 /* If the call will go through a PLT entry then we do not need
3336 glue. */
3337 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 3338 continue;
3339
252b5132
RH		 3340 switch (r_type)
3341 {
3342 case R_ARM_PC24:
c6596c5e 3343 case R_ARM_PLT32:
5b5bb741
PB		 3344 case R_ARM_CALL:
3345 case R_ARM_JUMP24:
252b5132 3346 /* This one is a call from arm code. We need to look up
2f0ca46a 3347 the target of the call. If it is a thumb target, we
252b5132 3348 insert glue. */
39b41c9c
PB		 3349 if (ELF_ST_TYPE(h->type) == STT_ARM_TFUNC
3350 && !(r_type == R_ARM_CALL && globals->use_blx))
252b5132
RH		 3351 record_arm_to_thumb_glue (link_info, h);
3352 break;
3353
c19d1205 3354 case R_ARM_THM_CALL:
bd97cb95 3355 case R_ARM_THM_JUMP24:
f21f3fe0 3356 /* This one is a call from thumb code. We look
2f0ca46a 3357 up the target of the call. If it is not a thumb
bcbdc74c 3358 target, we insert glue. */
bd97cb95
DJ		 3359 if (ELF_ST_TYPE (h->type) != STT_ARM_TFUNC
3360 && !(globals->use_blx && r_type == R_ARM_THM_CALL)
5ab79981 3361 && h->root.type != bfd_link_hash_undefweak)
252b5132
RH		 3362 record_thumb_to_arm_glue (link_info, h);
3363 break;
3364
3365 default:
c6596c5e 3366 abort ();
252b5132
RH		 3367 }
3368 }
6cdc0ccc
AM		 3369
3370 if (contents != NULL
3371 && elf_section_data (sec)->this_hdr.contents != contents)
3372 free (contents);
3373 contents = NULL;
3374
3375 if (internal_relocs != NULL
3376 && elf_section_data (sec)->relocs != internal_relocs)
3377 free (internal_relocs);
3378 internal_relocs = NULL;
252b5132
RH		 3379 }
3380
b34976b6 3381 return TRUE;
9a5aca8c 3382
252b5132 3383error_return:
6cdc0ccc
AM		 3384 if (contents != NULL
3385 && elf_section_data (sec)->this_hdr.contents != contents)
3386 free (contents);
3387 if (internal_relocs != NULL
3388 && elf_section_data (sec)->relocs != internal_relocs)
3389 free (internal_relocs);
9a5aca8c 3390
b34976b6 3391 return FALSE;
252b5132 3392}
7e392df6 3393#endif
252b5132 3394
eb043451 3395
c7b8f16e
JB		 3396/* Initialise maps of ARM/Thumb/data for input BFDs. */
3397
3398void
3399bfd_elf32_arm_init_maps (bfd *abfd)
3400{
3401 Elf_Internal_Sym *isymbuf;
3402 Elf_Internal_Shdr *hdr;
3403 unsigned int i, localsyms;
3404
3405 if ((abfd->flags & DYNAMIC) != 0)
3406 return;
3407
0ffa91dd 3408 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 3409 localsyms = hdr->sh_info;
3410
3411 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
3412 should contain the number of local symbols, which should come before any
3413 global symbols. Mapping symbols are always local. */
3414 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
3415 NULL);
3416
3417 /* No internal symbols read? Skip this BFD. */
3418 if (isymbuf == NULL)
3419 return;
3420
3421 for (i = 0; i < localsyms; i++)
3422 {
3423 Elf_Internal_Sym *isym = &isymbuf[i];
3424 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3425 const char *name;
3426
3427 if (sec != NULL
3428 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
3429 {
3430 name = bfd_elf_string_from_elf_section (abfd,
3431 hdr->sh_link, isym->st_name);
3432
3433 if (bfd_is_arm_special_symbol_name (name,
3434 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
3435 elf32_arm_section_map_add (sec, name[1], isym->st_value);
3436 }
3437 }
3438}
3439
3440
3441void
3442bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
3443{
3444 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 3445 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
c7b8f16e
JB		 3446
3447 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
3448 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
3449 {
3450 switch (globals->vfp11_fix)
3451 {
3452 case BFD_ARM_VFP11_FIX_DEFAULT:
3453 case BFD_ARM_VFP11_FIX_NONE:
3454 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3455 break;
3456
3457 default:
3458 /* Give a warning, but do as the user requests anyway. */
3459 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
3460 "workaround is not necessary for target architecture"), obfd);
3461 }
3462 }
3463 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
3464 /* For earlier architectures, we might need the workaround, but do not
3465 enable it by default. If users is running with broken hardware, they
3466 must enable the erratum fix explicitly. */
3467 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3468}
3469
3470
3471enum bfd_arm_vfp11_pipe {
3472 VFP11_FMAC,
3473 VFP11_LS,
3474 VFP11_DS,
3475 VFP11_BAD
3476};
3477
3478/* Return a VFP register number. This is encoded as RX:X for single-precision
3479 registers, or X:RX for double-precision registers, where RX is the group of
3480 four bits in the instruction encoding and X is the single extension bit.
3481 RX and X fields are specified using their lowest (starting) bit. The return
3482 value is:
3483
3484 0...31: single-precision registers s0...s31
3485 32...63: double-precision registers d0...d31.
3486
3487 Although X should be zero for VFP11 (encoding d0...d15 only), we might
3488 encounter VFP3 instructions, so we allow the full range for DP registers. */
3489
3490static unsigned int
3491bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
3492 unsigned int x)
3493{
3494 if (is_double)
3495 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
3496 else
3497 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
3498}
3499
3500/* Set bits in *WMASK according to a register number REG as encoded by
3501 bfd_arm_vfp11_regno(). Ignore d16-d31. */
3502
3503static void
3504bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
3505{
3506 if (reg < 32)
3507 *wmask |= 1 << reg;
3508 else if (reg < 48)
3509 *wmask |= 3 << ((reg - 32) * 2);
3510}
3511
3512/* Return TRUE if WMASK overwrites anything in REGS. */
3513
3514static bfd_boolean
3515bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
3516{
3517 int i;
3518
3519 for (i = 0; i < numregs; i++)
3520 {
3521 unsigned int reg = regs[i];
3522
3523 if (reg < 32 && (wmask & (1 << reg)) != 0)
3524 return TRUE;
3525
3526 reg -= 32;
3527
3528 if (reg >= 16)
3529 continue;
3530
3531 if ((wmask & (3 << (reg * 2))) != 0)
3532 return TRUE;
3533 }
3534
3535 return FALSE;
3536}
3537
3538/* In this function, we're interested in two things: finding input registers
3539 for VFP data-processing instructions, and finding the set of registers which
3540 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
3541 hold the written set, so FLDM etc. are easy to deal with (we're only
3542 interested in 32 SP registers or 16 dp registers, due to the VFP version
3543 implemented by the chip in question). DP registers are marked by setting
3544 both SP registers in the write mask). */
3545
3546static enum bfd_arm_vfp11_pipe
3547bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
3548 int *numregs)
3549{
3550 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
3551 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
3552
3553 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
3554 {
3555 unsigned int pqrs;
3556 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3557 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3558
3559 pqrs = ((insn & 0x00800000) >> 20)
3560 | ((insn & 0x00300000) >> 19)
3561 | ((insn & 0x00000040) >> 6);
3562
3563 switch (pqrs)
3564 {
3565 case 0: /* fmac[sd]. */
3566 case 1: /* fnmac[sd]. */
3567 case 2: /* fmsc[sd]. */
3568 case 3: /* fnmsc[sd]. */
3569 pipe = VFP11_FMAC;
3570 bfd_arm_vfp11_write_mask (destmask, fd);
3571 regs[0] = fd;
3572 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3573 regs[2] = fm;
3574 *numregs = 3;
3575 break;
3576
3577 case 4: /* fmul[sd]. */
3578 case 5: /* fnmul[sd]. */
3579 case 6: /* fadd[sd]. */
3580 case 7: /* fsub[sd]. */
3581 pipe = VFP11_FMAC;
3582 goto vfp_binop;
3583
3584 case 8: /* fdiv[sd]. */
3585 pipe = VFP11_DS;
3586 vfp_binop:
3587 bfd_arm_vfp11_write_mask (destmask, fd);
3588 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3589 regs[1] = fm;
3590 *numregs = 2;
3591 break;
3592
3593 case 15: /* extended opcode. */
3594 {
3595 unsigned int extn = ((insn >> 15) & 0x1e)
3596 | ((insn >> 7) & 1);
3597
3598 switch (extn)
3599 {
3600 case 0: /* fcpy[sd]. */
3601 case 1: /* fabs[sd]. */
3602 case 2: /* fneg[sd]. */
3603 case 8: /* fcmp[sd]. */
3604 case 9: /* fcmpe[sd]. */
3605 case 10: /* fcmpz[sd]. */
3606 case 11: /* fcmpez[sd]. */
3607 case 16: /* fuito[sd]. */
3608 case 17: /* fsito[sd]. */
3609 case 24: /* ftoui[sd]. */
3610 case 25: /* ftouiz[sd]. */
3611 case 26: /* ftosi[sd]. */
3612 case 27: /* ftosiz[sd]. */
3613 /* These instructions will not bounce due to underflow. */
3614 *numregs = 0;
3615 pipe = VFP11_FMAC;
3616 break;
3617
3618 case 3: /* fsqrt[sd]. */
3619 /* fsqrt cannot underflow, but it can (perhaps) overwrite
3620 registers to cause the erratum in previous instructions. */
3621 bfd_arm_vfp11_write_mask (destmask, fd);
3622 pipe = VFP11_DS;
3623 break;
3624
3625 case 15: /* fcvt{ds,sd}. */
3626 {
3627 int rnum = 0;
3628
3629 bfd_arm_vfp11_write_mask (destmask, fd);
3630
3631 /* Only FCVTSD can underflow. */
3632 if ((insn & 0x100) != 0)
3633 regs[rnum++] = fm;
3634
3635 *numregs = rnum;
3636
3637 pipe = VFP11_FMAC;
3638 }
3639 break;
3640
3641 default:
3642 return VFP11_BAD;
3643 }
3644 }
3645 break;
3646
3647 default:
3648 return VFP11_BAD;
3649 }
3650 }
3651 /* Two-register transfer. */
3652 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
3653 {
3654 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3655
3656 if ((insn & 0x100000) == 0)
3657 {
3658 if (is_double)
3659 bfd_arm_vfp11_write_mask (destmask, fm);
3660 else
3661 {
3662 bfd_arm_vfp11_write_mask (destmask, fm);
3663 bfd_arm_vfp11_write_mask (destmask, fm + 1);
3664 }
3665 }
3666
3667 pipe = VFP11_LS;
3668 }
3669 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
3670 {
3671 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3672 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
3673
3674 switch (puw)
3675 {
3676 case 0: /* Two-reg transfer. We should catch these above. */
3677 abort ();
3678
3679 case 2: /* fldm[sdx]. */
3680 case 3:
3681 case 5:
3682 {
3683 unsigned int i, offset = insn & 0xff;
3684
3685 if (is_double)
3686 offset >>= 1;
3687
3688 for (i = fd; i < fd + offset; i++)
3689 bfd_arm_vfp11_write_mask (destmask, i);
3690 }
3691 break;
3692
3693 case 4: /* fld[sd]. */
3694 case 6:
3695 bfd_arm_vfp11_write_mask (destmask, fd);
3696 break;
3697
3698 default:
3699 return VFP11_BAD;
3700 }
3701
3702 pipe = VFP11_LS;
3703 }
3704 /* Single-register transfer. Note L==0. */
3705 else if ((insn & 0x0f100e10) == 0x0e000a10)
3706 {
3707 unsigned int opcode = (insn >> 21) & 7;
3708 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
3709
3710 switch (opcode)
3711 {
3712 case 0: /* fmsr/fmdlr. */
3713 case 1: /* fmdhr. */
3714 /* Mark fmdhr and fmdlr as writing to the whole of the DP
3715 destination register. I don't know if this is exactly right,
3716 but it is the conservative choice. */
3717 bfd_arm_vfp11_write_mask (destmask, fn);
3718 break;
3719
3720 case 7: /* fmxr. */
3721 break;
3722 }
3723
3724 pipe = VFP11_LS;
3725 }
3726
3727 return pipe;
3728}
3729
3730
3731static int elf32_arm_compare_mapping (const void * a, const void * b);
3732
3733
3734/* Look for potentially-troublesome code sequences which might trigger the
3735 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
3736 (available from ARM) for details of the erratum. A short version is
3737 described in ld.texinfo. */
3738
3739bfd_boolean
3740bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
3741{
3742 asection *sec;
3743 bfd_byte *contents = NULL;
3744 int state = 0;
3745 int regs[3], numregs = 0;
3746 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
3747 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
3748
3749 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
3750 The states transition as follows:
3751
3752 0 -> 1 (vector) or 0 -> 2 (scalar)
3753 A VFP FMAC-pipeline instruction has been seen. Fill
3754 regs[0]..regs[numregs-1] with its input operands. Remember this
3755 instruction in 'first_fmac'.
3756
3757 1 -> 2
3758 Any instruction, except for a VFP instruction which overwrites
3759 regs[*].
3760
3761 1 -> 3 [ -> 0 ] or
3762 2 -> 3 [ -> 0 ]
3763 A VFP instruction has been seen which overwrites any of regs[*].
3764 We must make a veneer! Reset state to 0 before examining next
3765 instruction.
3766
3767 2 -> 0
3768 If we fail to match anything in state 2, reset to state 0 and reset
3769 the instruction pointer to the instruction after 'first_fmac'.
3770
3771 If the VFP11 vector mode is in use, there must be at least two unrelated
3772 instructions between anti-dependent VFP11 instructions to properly avoid
3773 triggering the erratum, hence the use of the extra state 1.
3774 */
3775
3776 /* If we are only performing a partial link do not bother
3777 to construct any glue. */
3778 if (link_info->relocatable)
3779 return TRUE;
3780
0ffa91dd
NC		 3781 /* Skip if this bfd does not correspond to an ELF image. */
3782 if (! is_arm_elf (abfd))
3783 return TRUE;
3784
c7b8f16e
JB		 3785 /* We should have chosen a fix type by the time we get here. */
3786 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
3787
3788 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
3789 return TRUE;
2e6030b9 3790
c7b8f16e
JB		 3791 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3792 {
3793 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
3794 struct _arm_elf_section_data *sec_data;
3795
3796 /* If we don't have executable progbits, we're not interested in this
3797 section. Also skip if section is to be excluded. */
3798 if (elf_section_type (sec) != SHT_PROGBITS
3799 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
3800 || (sec->flags & SEC_EXCLUDE) != 0
3801 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
3802 continue;
3803
3804 sec_data = elf32_arm_section_data (sec);
3805
3806 if (sec_data->mapcount == 0)
3807 continue;
3808
3809 if (elf_section_data (sec)->this_hdr.contents != NULL)
3810 contents = elf_section_data (sec)->this_hdr.contents;
3811 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
3812 goto error_return;
3813
3814 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
3815 elf32_arm_compare_mapping);
3816
3817 for (span = 0; span < sec_data->mapcount; span++)
3818 {
3819 unsigned int span_start = sec_data->map[span].vma;
3820 unsigned int span_end = (span == sec_data->mapcount - 1)
3821 ? sec->size : sec_data->map[span + 1].vma;
3822 char span_type = sec_data->map[span].type;
3823
3824 /* FIXME: Only ARM mode is supported at present. We may need to
3825 support Thumb-2 mode also at some point. */
3826 if (span_type != 'a')
3827 continue;
3828
3829 for (i = span_start; i < span_end;)
3830 {
3831 unsigned int next_i = i + 4;
3832 unsigned int insn = bfd_big_endian (abfd)
3833 ? (contents[i] << 24)
3834 | (contents[i + 1] << 16)
3835 | (contents[i + 2] << 8)
3836 | contents[i + 3]
3837 : (contents[i + 3] << 24)
3838 | (contents[i + 2] << 16)
3839 | (contents[i + 1] << 8)
3840 | contents[i];
3841 unsigned int writemask = 0;
3842 enum bfd_arm_vfp11_pipe pipe;
3843
3844 switch (state)
3845 {
3846 case 0:
3847 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
3848 &numregs);
3849 /* I'm assuming the VFP11 erratum can trigger with denorm
3850 operands on either the FMAC or the DS pipeline. This might
3851 lead to slightly overenthusiastic veneer insertion. */
3852 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
3853 {
3854 state = use_vector ? 1 : 2;
3855 first_fmac = i;
3856 veneer_of_insn = insn;
3857 }
3858 break;
3859
3860 case 1:
3861 {
3862 int other_regs[3], other_numregs;
3863 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3864 other_regs,
3865 &other_numregs);
3866 if (pipe != VFP11_BAD
3867 && bfd_arm_vfp11_antidependency (writemask, regs,
3868 numregs))
3869 state = 3;
3870 else
3871 state = 2;
3872 }
3873 break;
3874
3875 case 2:
3876 {
3877 int other_regs[3], other_numregs;
3878 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3879 other_regs,
3880 &other_numregs);
3881 if (pipe != VFP11_BAD
3882 && bfd_arm_vfp11_antidependency (writemask, regs,
3883 numregs))
3884 state = 3;
3885 else
3886 {
3887 state = 0;
3888 next_i = first_fmac + 4;
3889 }
3890 }
3891 break;
3892
3893 case 3:
3894 abort (); /* Should be unreachable. */
3895 }
3896
3897 if (state == 3)
3898 {
3899 elf32_vfp11_erratum_list *newerr
3900 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
3901 int errcount;
3902
3903 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
3904
3905 newerr->u.b.vfp_insn = veneer_of_insn;
3906
3907 switch (span_type)
3908 {
3909 case 'a':
3910 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
3911 break;
3912
3913 default:
3914 abort ();
3915 }
3916
3917 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
3918 first_fmac);
3919
3920 newerr->vma = -1;
3921
3922 newerr->next = sec_data->erratumlist;
3923 sec_data->erratumlist = newerr;
3924
3925 state = 0;
3926 }
3927
3928 i = next_i;
3929 }
3930 }
3931
3932 if (contents != NULL
3933 && elf_section_data (sec)->this_hdr.contents != contents)
3934 free (contents);
3935 contents = NULL;
3936 }
3937
3938 return TRUE;
3939
3940error_return:
3941 if (contents != NULL
3942 && elf_section_data (sec)->this_hdr.contents != contents)
3943 free (contents);
3944
3945 return FALSE;
3946}
3947
3948/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
3949 after sections have been laid out, using specially-named symbols. */
3950
3951void
3952bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
3953 struct bfd_link_info *link_info)
3954{
3955 asection *sec;
3956 struct elf32_arm_link_hash_table *globals;
3957 char *tmp_name;
3958
3959 if (link_info->relocatable)
3960 return;
2e6030b9
MS		 3961
3962 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 3963 if (! is_arm_elf (abfd))
2e6030b9
MS		 3964 return;
3965
c7b8f16e
JB		 3966 globals = elf32_arm_hash_table (link_info);
3967
3968 tmp_name = bfd_malloc ((bfd_size_type) strlen
3969 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
3970
3971 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3972 {
3973 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
3974 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
3975
3976 for (; errnode != NULL; errnode = errnode->next)
3977 {
3978 struct elf_link_hash_entry *myh;
3979 bfd_vma vma;
3980
3981 switch (errnode->type)
3982 {
3983 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
3984 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
3985 /* Find veneer symbol. */
3986 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
3987 errnode->u.b.veneer->u.v.id);
3988
3989 myh = elf_link_hash_lookup
3990 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
3991
3992 if (myh == NULL)
3993 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
3994 "`%s'"), abfd, tmp_name);
3995
3996 vma = myh->root.u.def.section->output_section->vma
3997 + myh->root.u.def.section->output_offset
3998 + myh->root.u.def.value;
3999
4000 errnode->u.b.veneer->vma = vma;
4001 break;
4002
4003 case VFP11_ERRATUM_ARM_VENEER:
4004 case VFP11_ERRATUM_THUMB_VENEER:
4005 /* Find return location. */
4006 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
4007 errnode->u.v.id);
4008
4009 myh = elf_link_hash_lookup
4010 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
4011
4012 if (myh == NULL)
4013 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
4014 "`%s'"), abfd, tmp_name);
4015
4016 vma = myh->root.u.def.section->output_section->vma
4017 + myh->root.u.def.section->output_offset
4018 + myh->root.u.def.value;
4019
4020 errnode->u.v.branch->vma = vma;
4021 break;
4022
4023 default:
4024 abort ();
4025 }
4026 }
4027 }
4028
4029 free (tmp_name);
4030}
4031
4032
eb043451
PB		 4033/* Set target relocation values needed during linking. */
4034
4035void
bf21ed78
MS		 4036bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
4037 struct bfd_link_info *link_info,
eb043451 4038 int target1_is_rel,
319850b4 4039 char * target2_type,
33bfe774 4040 int fix_v4bx,
c7b8f16e 4041 int use_blx,
bf21ed78 4042 bfd_arm_vfp11_fix vfp11_fix,
27e55c4d 4043 int no_enum_warn, int pic_veneer)
eb043451
PB		 4044{
4045 struct elf32_arm_link_hash_table *globals;
4046
4047 globals = elf32_arm_hash_table (link_info);
4048
4049 globals->target1_is_rel = target1_is_rel;
4050 if (strcmp (target2_type, "rel") == 0)
4051 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 4052 else if (strcmp (target2_type, "abs") == 0)
4053 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 4054 else if (strcmp (target2_type, "got-rel") == 0)
4055 globals->target2_reloc = R_ARM_GOT_PREL;
4056 else
4057 {
4058 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
4059 target2_type);
4060 }
319850b4 4061 globals->fix_v4bx = fix_v4bx;
33bfe774 4062 globals->use_blx |= use_blx;
c7b8f16e 4063 globals->vfp11_fix = vfp11_fix;
27e55c4d 4064 globals->pic_veneer = pic_veneer;
bf21ed78 4065
0ffa91dd
NC		 4066 BFD_ASSERT (is_arm_elf (output_bfd));
4067 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
eb043451 4068}
eb043451 4069
252b5132
RH		 4070/* The thumb form of a long branch is a bit finicky, because the offset
4071 encoding is split over two fields, each in it's own instruction. They
f21f3fe0 4072 can occur in any order. So given a thumb form of long branch, and an
252b5132 4073 offset, insert the offset into the thumb branch and return finished
f21f3fe0 4074 instruction.
252b5132 4075
f21f3fe0 4076 It takes two thumb instructions to encode the target address. Each has
4cc11e76 4077 11 bits to invest. The upper 11 bits are stored in one (identified by
f21f3fe0
UD		 4078 H-0.. see below), the lower 11 bits are stored in the other (identified
4079 by H-1).
252b5132 4080
f21f3fe0 4081 Combine together and shifted left by 1 (it's a half word address) and
252b5132
RH		 4082 there you have it.
4083
4084 Op: 1111 = F,
4085 H-0, upper address-0 = 000
4086 Op: 1111 = F,
4087 H-1, lower address-0 = 800
4088
f21f3fe0 4089 They can be ordered either way, but the arm tools I've seen always put
252b5132
RH		 4090 the lower one first. It probably doesn't matter. krk@cygnus.com
4091
4092 XXX: Actually the order does matter. The second instruction (H-1)
4093 moves the computed address into the PC, so it must be the second one
4094 in the sequence. The problem, however is that whilst little endian code
4095 stores the instructions in HI then LOW order, big endian code does the
dfc5f959 4096 reverse. nickc@cygnus.com. */
252b5132 4097
dfc5f959
NC		 4098#define LOW_HI_ORDER 0xF800F000
4099#define HI_LOW_ORDER 0xF000F800
252b5132
RH		 4100
4101static insn32
57e8b36a 4102insert_thumb_branch (insn32 br_insn, int rel_off)
252b5132
RH		 4103{
4104 unsigned int low_bits;
4105 unsigned int high_bits;
4106
252b5132
RH		 4107 BFD_ASSERT ((rel_off & 1) != 1);
4108
dfc5f959
NC		 4109 rel_off >>= 1; /* Half word aligned address. */
4110 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
4111 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
252b5132
RH		 4112
4113 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
4114 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
4115 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
4116 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
4117 else
9b485d32 4118 /* FIXME: abort is probably not the right call. krk@cygnus.com */
57e8b36a 4119 abort (); /* Error - not a valid branch instruction form. */
252b5132 4120
252b5132
RH		 4121 return br_insn;
4122}
4123
52ab56c2
PB		 4124
4125/* Store an Arm insn into an output section not processed by
4126 elf32_arm_write_section. */
4127
4128static void
4129put_arm_insn (struct elf32_arm_link_hash_table *htab,
4130 bfd * output_bfd, bfd_vma val, void * ptr)
4131{
4132 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4133 bfd_putl32 (val, ptr);
4134 else
4135 bfd_putb32 (val, ptr);
4136}
4137
4138
4139/* Store a 16-bit Thumb insn into an output section not processed by
4140 elf32_arm_write_section. */
4141
4142static void
4143put_thumb_insn (struct elf32_arm_link_hash_table *htab,
4144 bfd * output_bfd, bfd_vma val, void * ptr)
4145{
4146 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4147 bfd_putl16 (val, ptr);
4148 else
4149 bfd_putb16 (val, ptr);
4150}
4151
4152
9b485d32
NC		 4153/* Thumb code calling an ARM function. */
4154
252b5132 4155static int
57e8b36a
NC		 4156elf32_thumb_to_arm_stub (struct bfd_link_info * info,
4157 const char * name,
4158 bfd * input_bfd,
4159 bfd * output_bfd,
4160 asection * input_section,
4161 bfd_byte * hit_data,
4162 asection * sym_sec,
4163 bfd_vma offset,
4164 bfd_signed_vma addend,
f2a9dd69
DJ		 4165 bfd_vma val,
4166 char **error_message)
252b5132 4167{
bcbdc74c 4168 asection * s = 0;
dc810e39 4169 bfd_vma my_offset;
252b5132
RH		 4170 unsigned long int tmp;
4171 long int ret_offset;
bcbdc74c
NC		 4172 struct elf_link_hash_entry * myh;
4173 struct elf32_arm_link_hash_table * globals;
252b5132 4174
f2a9dd69 4175 myh = find_thumb_glue (info, name, error_message);
252b5132 4176 if (myh == NULL)
b34976b6 4177 return FALSE;
252b5132
RH		 4178
4179 globals = elf32_arm_hash_table (info);
4180
4181 BFD_ASSERT (globals != NULL);
4182 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4183
4184 my_offset = myh->root.u.def.value;
4185
4186 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4187 THUMB2ARM_GLUE_SECTION_NAME);
4188
4189 BFD_ASSERT (s != NULL);
4190 BFD_ASSERT (s->contents != NULL);
4191 BFD_ASSERT (s->output_section != NULL);
4192
4193 if ((my_offset & 0x01) == 0x01)
4194 {
4195 if (sym_sec != NULL
4196 && sym_sec->owner != NULL
4197 && !INTERWORK_FLAG (sym_sec->owner))
4198 {
8f615d07 4199 (*_bfd_error_handler)
d003868e
AM		 4200 (_("%B(%s): warning: interworking not enabled.\n"
4201 " first occurrence: %B: thumb call to arm"),
4202 sym_sec->owner, input_bfd, name);
252b5132 4203
b34976b6 4204 return FALSE;
252b5132
RH		 4205 }
4206
4207 --my_offset;
4208 myh->root.u.def.value = my_offset;
4209
52ab56c2
PB		 4210 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
4211 s->contents + my_offset);
252b5132 4212
52ab56c2
PB		 4213 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
4214 s->contents + my_offset + 2);
252b5132
RH		 4215
4216 ret_offset =
9b485d32
NC		 4217 /* Address of destination of the stub. */
4218 ((bfd_signed_vma) val)
252b5132 4219 - ((bfd_signed_vma)
57e8b36a
NC		 4220 /* Offset from the start of the current section
4221 to the start of the stubs. */
9b485d32
NC		 4222 (s->output_offset
4223 /* Offset of the start of this stub from the start of the stubs. */
4224 + my_offset
4225 /* Address of the start of the current section. */
4226 + s->output_section->vma)
4227 /* The branch instruction is 4 bytes into the stub. */
4228 + 4
4229 /* ARM branches work from the pc of the instruction + 8. */
4230 + 8);
252b5132 4231
52ab56c2
PB		 4232 put_arm_insn (globals, output_bfd,
4233 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
4234 s->contents + my_offset + 4);
252b5132
RH		 4235 }
4236
4237 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
4238
427bfd90
NC		 4239 /* Now go back and fix up the original BL insn to point to here. */
4240 ret_offset =
4241 /* Address of where the stub is located. */
4242 (s->output_section->vma + s->output_offset + my_offset)
4243 /* Address of where the BL is located. */
57e8b36a
NC		 4244 - (input_section->output_section->vma + input_section->output_offset
4245 + offset)
427bfd90
NC		 4246 /* Addend in the relocation. */
4247 - addend
4248 /* Biassing for PC-relative addressing. */
4249 - 8;
252b5132
RH		 4250
4251 tmp = bfd_get_32 (input_bfd, hit_data
4252 - input_section->vma);
4253
4254 bfd_put_32 (output_bfd,
dc810e39 4255 (bfd_vma) insert_thumb_branch (tmp, ret_offset),
252b5132
RH		 4256 hit_data - input_section->vma);
4257
b34976b6 4258 return TRUE;
252b5132
RH		 4259}
4260
a4fd1a8e 4261/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 4262
a4fd1a8e
PB		 4263static struct elf_link_hash_entry *
4264elf32_arm_create_thumb_stub (struct bfd_link_info * info,
4265 const char * name,
4266 bfd * input_bfd,
4267 bfd * output_bfd,
4268 asection * sym_sec,
4269 bfd_vma val,
f2a9dd69
DJ		 4270 asection *s,
4271 char **error_message)
252b5132 4272{
dc810e39 4273 bfd_vma my_offset;
252b5132 4274 long int ret_offset;
bcbdc74c
NC		 4275 struct elf_link_hash_entry * myh;
4276 struct elf32_arm_link_hash_table * globals;
252b5132 4277
f2a9dd69 4278 myh = find_arm_glue (info, name, error_message);
252b5132 4279 if (myh == NULL)
a4fd1a8e 4280 return NULL;
252b5132
RH		 4281
4282 globals = elf32_arm_hash_table (info);
4283
4284 BFD_ASSERT (globals != NULL);
4285 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4286
4287 my_offset = myh->root.u.def.value;
252b5132
RH		 4288
4289 if ((my_offset & 0x01) == 0x01)
4290 {
4291 if (sym_sec != NULL
4292 && sym_sec->owner != NULL
4293 && !INTERWORK_FLAG (sym_sec->owner))
4294 {
8f615d07 4295 (*_bfd_error_handler)
d003868e
AM		 4296 (_("%B(%s): warning: interworking not enabled.\n"
4297 " first occurrence: %B: arm call to thumb"),
4298 sym_sec->owner, input_bfd, name);
252b5132 4299 }
9b485d32 4300
252b5132
RH		 4301 --my_offset;
4302 myh->root.u.def.value = my_offset;
4303
27e55c4d
PB		 4304 if (info->shared || globals->root.is_relocatable_executable
4305 || globals->pic_veneer)
8f6277f5
PB		 4306 {
4307 /* For relocatable objects we can't use absolute addresses,
4308 so construct the address from a relative offset. */
4309 /* TODO: If the offset is small it's probably worth
4310 constructing the address with adds. */
52ab56c2
PB		 4311 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
4312 s->contents + my_offset);
4313 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
4314 s->contents + my_offset + 4);
4315 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
4316 s->contents + my_offset + 8);
8f6277f5
PB		 4317 /* Adjust the offset by 4 for the position of the add,
4318 and 8 for the pipeline offset. */
4319 ret_offset = (val - (s->output_offset
4320 + s->output_section->vma
4321 + my_offset + 12))
4322 | 1;
4323 bfd_put_32 (output_bfd, ret_offset,
4324 s->contents + my_offset + 12);
4325 }
26079076
PB		 4326 else if (globals->use_blx)
4327 {
4328 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
4329 s->contents + my_offset);
4330
4331 /* It's a thumb address. Add the low order bit. */
4332 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
4333 s->contents + my_offset + 4);
4334 }
8f6277f5
PB		 4335 else
4336 {
52ab56c2
PB		 4337 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
4338 s->contents + my_offset);
252b5132 4339
52ab56c2
PB		 4340 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
4341 s->contents + my_offset + 4);
252b5132 4342
8f6277f5
PB		 4343 /* It's a thumb address. Add the low order bit. */
4344 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
4345 s->contents + my_offset + 8);
4346 }
252b5132
RH		 4347 }
4348
4349 BFD_ASSERT (my_offset <= globals->arm_glue_size);
4350
a4fd1a8e
PB		 4351 return myh;
4352}
4353
4354/* Arm code calling a Thumb function. */
4355
4356static int
4357elf32_arm_to_thumb_stub (struct bfd_link_info * info,
4358 const char * name,
4359 bfd * input_bfd,
4360 bfd * output_bfd,
4361 asection * input_section,
4362 bfd_byte * hit_data,
4363 asection * sym_sec,
4364 bfd_vma offset,
4365 bfd_signed_vma addend,
f2a9dd69
DJ		 4366 bfd_vma val,
4367 char **error_message)
a4fd1a8e
PB		 4368{
4369 unsigned long int tmp;
4370 bfd_vma my_offset;
4371 asection * s;
4372 long int ret_offset;
4373 struct elf_link_hash_entry * myh;
4374 struct elf32_arm_link_hash_table * globals;
4375
4376 globals = elf32_arm_hash_table (info);
4377
4378 BFD_ASSERT (globals != NULL);
4379 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4380
4381 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4382 ARM2THUMB_GLUE_SECTION_NAME);
4383 BFD_ASSERT (s != NULL);
4384 BFD_ASSERT (s->contents != NULL);
4385 BFD_ASSERT (s->output_section != NULL);
4386
4387 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 4388 sym_sec, val, s, error_message);
a4fd1a8e
PB		 4389 if (!myh)
4390 return FALSE;
4391
4392 my_offset = myh->root.u.def.value;
252b5132
RH		 4393 tmp = bfd_get_32 (input_bfd, hit_data);
4394 tmp = tmp & 0xFF000000;
4395
9b485d32 4396 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 4397 ret_offset = (s->output_offset
4398 + my_offset
4399 + s->output_section->vma
4400 - (input_section->output_offset
4401 + input_section->output_section->vma
4402 + offset + addend)
4403 - 8);
9a5aca8c 4404
252b5132
RH		 4405 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
4406
dc810e39 4407 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 4408
b34976b6 4409 return TRUE;
252b5132
RH		 4410}
4411
a4fd1a8e
PB		 4412/* Populate Arm stub for an exported Thumb function. */
4413
4414static bfd_boolean
4415elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
4416{
4417 struct bfd_link_info * info = (struct bfd_link_info *) inf;
4418 asection * s;
4419 struct elf_link_hash_entry * myh;
4420 struct elf32_arm_link_hash_entry *eh;
4421 struct elf32_arm_link_hash_table * globals;
4422 asection *sec;
4423 bfd_vma val;
f2a9dd69 4424 char *error_message;
a4fd1a8e
PB		 4425
4426 eh = elf32_arm_hash_entry(h);
4427 /* Allocate stubs for exported Thumb functions on v4t. */
4428 if (eh->export_glue == NULL)
4429 return TRUE;
4430
4431 globals = elf32_arm_hash_table (info);
4432
4433 BFD_ASSERT (globals != NULL);
4434 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4435
4436 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4437 ARM2THUMB_GLUE_SECTION_NAME);
4438 BFD_ASSERT (s != NULL);
4439 BFD_ASSERT (s->contents != NULL);
4440 BFD_ASSERT (s->output_section != NULL);
4441
4442 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 4443
4444 BFD_ASSERT (sec->output_section != NULL);
4445
a4fd1a8e
PB		 4446 val = eh->export_glue->root.u.def.value + sec->output_offset
4447 + sec->output_section->vma;
4448 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
4449 h->root.u.def.section->owner,
f2a9dd69
DJ		 4450 globals->obfd, sec, val, s,
4451 &error_message);
a4fd1a8e
PB		 4452 BFD_ASSERT (myh);
4453 return TRUE;
4454}
4455
845b51d6
PB		 4456/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
4457
4458static bfd_vma
4459elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
4460{
4461 bfd_byte *p;
4462 bfd_vma glue_addr;
4463 asection *s;
4464 struct elf32_arm_link_hash_table *globals;
4465
4466 globals = elf32_arm_hash_table (info);
4467
4468 BFD_ASSERT (globals != NULL);
4469 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4470
4471 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4472 ARM_BX_GLUE_SECTION_NAME);
4473 BFD_ASSERT (s != NULL);
4474 BFD_ASSERT (s->contents != NULL);
4475 BFD_ASSERT (s->output_section != NULL);
4476
4477 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
4478
4479 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
4480
4481 if ((globals->bx_glue_offset[reg] & 1) == 0)
4482 {
4483 p = s->contents + glue_addr;
4484 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
4485 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
4486 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
4487 globals->bx_glue_offset[reg] |= 1;
4488 }
4489
4490 return glue_addr + s->output_section->vma + s->output_offset;
4491}
4492
a4fd1a8e
PB		 4493/* Generate Arm stubs for exported Thumb symbols. */
4494static void
4495elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
4496 struct bfd_link_info *link_info)
4497{
4498 struct elf32_arm_link_hash_table * globals;
4499
4500 if (!link_info)
4501 return;
4502
4503 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 4504 /* If blx is available then exported Thumb symbols are OK and there is
4505 nothing to do. */
a4fd1a8e
PB		 4506 if (globals->use_blx)
4507 return;
4508
4509 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
4510 link_info);
4511}
4512
eb043451
PB		 4513/* Some relocations map to different relocations depending on the
4514 target. Return the real relocation. */
4515static int
4516arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
4517 int r_type)
4518{
4519 switch (r_type)
4520 {
4521 case R_ARM_TARGET1:
4522 if (globals->target1_is_rel)
4523 return R_ARM_REL32;
4524 else
4525 return R_ARM_ABS32;
4526
4527 case R_ARM_TARGET2:
4528 return globals->target2_reloc;
4529
4530 default:
4531 return r_type;
4532 }
4533}
eb043451 4534
ba93b8ac
DJ		 4535/* Return the base VMA address which should be subtracted from real addresses
4536 when resolving @dtpoff relocation.
4537 This is PT_TLS segment p_vaddr. */
4538
4539static bfd_vma
4540dtpoff_base (struct bfd_link_info *info)
4541{
4542 /* If tls_sec is NULL, we should have signalled an error already. */
4543 if (elf_hash_table (info)->tls_sec == NULL)
4544 return 0;
4545 return elf_hash_table (info)->tls_sec->vma;
4546}
4547
4548/* Return the relocation value for @tpoff relocation
4549 if STT_TLS virtual address is ADDRESS. */
4550
4551static bfd_vma
4552tpoff (struct bfd_link_info *info, bfd_vma address)
4553{
4554 struct elf_link_hash_table *htab = elf_hash_table (info);
4555 bfd_vma base;
4556
4557 /* If tls_sec is NULL, we should have signalled an error already. */
4558 if (htab->tls_sec == NULL)
4559 return 0;
4560 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
4561 return address - htab->tls_sec->vma + base;
4562}
4563
00a97672
RS		 4564/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
4565 VALUE is the relocation value. */
4566
4567static bfd_reloc_status_type
4568elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
4569{
4570 if (value > 0xfff)
4571 return bfd_reloc_overflow;
4572
4573 value |= bfd_get_32 (abfd, data) & 0xfffff000;
4574 bfd_put_32 (abfd, value, data);
4575 return bfd_reloc_ok;
4576}
4577
4962c51a
MS		 4578/* For a given value of n, calculate the value of G_n as required to
4579 deal with group relocations. We return it in the form of an
4580 encoded constant-and-rotation, together with the final residual. If n is
4581 specified as less than zero, then final_residual is filled with the
4582 input value and no further action is performed. */
4583
4584static bfd_vma
4585calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
4586{
4587 int current_n;
4588 bfd_vma g_n;
4589 bfd_vma encoded_g_n = 0;
4590 bfd_vma residual = value; /* Also known as Y_n. */
4591
4592 for (current_n = 0; current_n <= n; current_n++)
4593 {
4594 int shift;
4595
4596 /* Calculate which part of the value to mask. */
4597 if (residual == 0)
4598 shift = 0;
4599 else
4600 {
4601 int msb;
4602
4603 /* Determine the most significant bit in the residual and
4604 align the resulting value to a 2-bit boundary. */
4605 for (msb = 30; msb >= 0; msb -= 2)
4606 if (residual & (3 << msb))
4607 break;
4608
4609 /* The desired shift is now (msb - 6), or zero, whichever
4610 is the greater. */
4611 shift = msb - 6;
4612 if (shift < 0)
4613 shift = 0;
4614 }
4615
4616 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
4617 g_n = residual & (0xff << shift);
4618 encoded_g_n = (g_n >> shift)
4619 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4620
4621 /* Calculate the residual for the next time around. */
4622 residual &= ~g_n;
4623 }
4624
4625 *final_residual = residual;
4626
4627 return encoded_g_n;
4628}
4629
4630/* Given an ARM instruction, determine whether it is an ADD or a SUB.
4631 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
4632static int
4633identify_add_or_sub(bfd_vma insn)
4634{
4635 int opcode = insn & 0x1e00000;
4636
4637 if (opcode == 1 << 23) /* ADD */
4638 return 1;
4639
4640 if (opcode == 1 << 22) /* SUB */
4641 return -1;
4642
4643 return 0;
4644}
4645
e95de063
MS		 4646/* Determine if we're dealing with a Thumb-2 object. */
4647
4648static int using_thumb2 (struct elf32_arm_link_hash_table *globals)
4649{
104d59d1
JM		 4650 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4651 Tag_CPU_arch);
e95de063
MS		 4652 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
4653}
4654
252b5132 4655/* Perform a relocation as part of a final link. */
9b485d32 4656
252b5132 4657static bfd_reloc_status_type
57e8b36a
NC		 4658elf32_arm_final_link_relocate (reloc_howto_type * howto,
4659 bfd * input_bfd,
4660 bfd * output_bfd,
4661 asection * input_section,
4662 bfd_byte * contents,
4663 Elf_Internal_Rela * rel,
4664 bfd_vma value,
4665 struct bfd_link_info * info,
4666 asection * sym_sec,
4667 const char * sym_name,
4668 int sym_flags,
0945cdfd 4669 struct elf_link_hash_entry * h,
f2a9dd69
DJ		 4670 bfd_boolean * unresolved_reloc_p,
4671 char **error_message)
252b5132
RH		 4672{
4673 unsigned long r_type = howto->type;
4674 unsigned long r_symndx;
4675 bfd_byte * hit_data = contents + rel->r_offset;
4676 bfd * dynobj = NULL;
4677 Elf_Internal_Shdr * symtab_hdr;
4678 struct elf_link_hash_entry ** sym_hashes;
4679 bfd_vma * local_got_offsets;
4680 asection * sgot = NULL;
4681 asection * splt = NULL;
4682 asection * sreloc = NULL;
252b5132 4683 bfd_vma addend;
ba96a88f
NC		 4684 bfd_signed_vma signed_addend;
4685 struct elf32_arm_link_hash_table * globals;
f21f3fe0 4686
9c504268
PB		 4687 globals = elf32_arm_hash_table (info);
4688
0ffa91dd
NC		 4689 BFD_ASSERT (is_arm_elf (input_bfd));
4690
4691 /* Some relocation types map to different relocations depending on the
9c504268 4692 target. We pick the right one here. */
eb043451
PB		 4693 r_type = arm_real_reloc_type (globals, r_type);
4694 if (r_type != howto->type)
4695 howto = elf32_arm_howto_from_type (r_type);
9c504268 4696
cac15327
NC		 4697 /* If the start address has been set, then set the EF_ARM_HASENTRY
4698 flag. Setting this more than once is redundant, but the cost is
4699 not too high, and it keeps the code simple.
99e4ae17 4700
cac15327
NC		 4701 The test is done here, rather than somewhere else, because the
4702 start address is only set just before the final link commences.
4703
4704 Note - if the user deliberately sets a start address of 0, the
4705 flag will not be set. */
4706 if (bfd_get_start_address (output_bfd) != 0)
4707 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 4708
252b5132
RH		 4709 dynobj = elf_hash_table (info)->dynobj;
4710 if (dynobj)
4711 {
4712 sgot = bfd_get_section_by_name (dynobj, ".got");
4713 splt = bfd_get_section_by_name (dynobj, ".plt");
4714 }
0ffa91dd 4715 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 4716 sym_hashes = elf_sym_hashes (input_bfd);
4717 local_got_offsets = elf_local_got_offsets (input_bfd);
4718 r_symndx = ELF32_R_SYM (rel->r_info);
4719
4e7fd91e 4720 if (globals->use_rel)
ba96a88f 4721 {
4e7fd91e
PB		 4722 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
4723
4724 if (addend & ((howto->src_mask + 1) >> 1))
4725 {
4726 signed_addend = -1;
4727 signed_addend &= ~ howto->src_mask;
4728 signed_addend |= addend;
4729 }
4730 else
4731 signed_addend = addend;
ba96a88f
NC		 4732 }
4733 else
4e7fd91e 4734 addend = signed_addend = rel->r_addend;
f21f3fe0 4735
252b5132
RH		 4736 switch (r_type)
4737 {
4738 case R_ARM_NONE:
28a094c2
DJ		 4739 /* We don't need to find a value for this symbol. It's just a
4740 marker. */
4741 *unresolved_reloc_p = FALSE;
252b5132
RH		 4742 return bfd_reloc_ok;
4743
00a97672
RS		 4744 case R_ARM_ABS12:
4745 if (!globals->vxworks_p)
4746 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4747
252b5132
RH		 4748 case R_ARM_PC24:
4749 case R_ARM_ABS32:
bb224fc3 4750 case R_ARM_ABS32_NOI:
252b5132 4751 case R_ARM_REL32:
bb224fc3 4752 case R_ARM_REL32_NOI:
5b5bb741
PB		 4753 case R_ARM_CALL:
4754 case R_ARM_JUMP24:
dfc5f959 4755 case R_ARM_XPC25:
eb043451 4756 case R_ARM_PREL31:
7359ea65 4757 case R_ARM_PLT32:
7359ea65
DJ		 4758 /* Handle relocations which should use the PLT entry. ABS32/REL32
4759 will use the symbol's value, which may point to a PLT entry, but we
4760 don't need to handle that here. If we created a PLT entry, all
4761 branches in this object should go to it. */
bb224fc3
MS		 4762 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
4763 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI)
7359ea65 4764 && h != NULL
c84cd8ee 4765 && splt != NULL
7359ea65
DJ		 4766 && h->plt.offset != (bfd_vma) -1)
4767 {
c84cd8ee
DJ		 4768 /* If we've created a .plt section, and assigned a PLT entry to
4769 this function, it should not be known to bind locally. If
4770 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 4771 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
4772
4773 value = (splt->output_section->vma
4774 + splt->output_offset
4775 + h->plt.offset);
0945cdfd 4776 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 4777 return _bfd_final_link_relocate (howto, input_bfd, input_section,
4778 contents, rel->r_offset, value,
00a97672 4779 rel->r_addend);
7359ea65
DJ		 4780 }
4781
67687978
PB		 4782 /* When generating a shared object or relocatable executable, these
4783 relocations are copied into the output file to be resolved at
4784 run time. */
4785 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 4786 && (input_section->flags & SEC_ALLOC)
bb224fc3 4787 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 4788 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 4789 && (h == NULL
4790 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
4791 || h->root.type != bfd_link_hash_undefweak)
4792 && r_type != R_ARM_PC24
5b5bb741
PB		 4793 && r_type != R_ARM_CALL
4794 && r_type != R_ARM_JUMP24
ee06dc07 4795 && r_type != R_ARM_PREL31
7359ea65 4796 && r_type != R_ARM_PLT32)
252b5132 4797 {
947216bf
AM		 4798 Elf_Internal_Rela outrel;
4799 bfd_byte *loc;
b34976b6 4800 bfd_boolean skip, relocate;
f21f3fe0 4801
0945cdfd
DJ		 4802 *unresolved_reloc_p = FALSE;
4803
252b5132
RH		 4804 if (sreloc == NULL)
4805 {
4806 const char * name;
f21f3fe0 4807
252b5132
RH		 4808 name = (bfd_elf_string_from_elf_section
4809 (input_bfd,
4810 elf_elfheader (input_bfd)->e_shstrndx,
4811 elf_section_data (input_section)->rel_hdr.sh_name));
4812 if (name == NULL)
4813 return bfd_reloc_notsupported;
f21f3fe0 4814
00a97672 4815 BFD_ASSERT (reloc_section_p (globals, name, input_section));
f21f3fe0 4816
252b5132
RH		 4817 sreloc = bfd_get_section_by_name (dynobj, name);
4818 BFD_ASSERT (sreloc != NULL);
4819 }
f21f3fe0 4820
b34976b6
AM		 4821 skip = FALSE;
4822 relocate = FALSE;
f21f3fe0 4823
00a97672 4824 outrel.r_addend = addend;
c629eae0
JJ		 4825 outrel.r_offset =
4826 _bfd_elf_section_offset (output_bfd, info, input_section,
4827 rel->r_offset);
4828 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 4829 skip = TRUE;
0bb2d96a 4830 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 4831 skip = TRUE, relocate = TRUE;
252b5132
RH		 4832 outrel.r_offset += (input_section->output_section->vma
4833 + input_section->output_offset);
f21f3fe0 4834
252b5132 4835 if (skip)
0bb2d96a 4836 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 4837 else if (h != NULL
4838 && h->dynindx != -1
7359ea65 4839 && (!info->shared
5e681ec4 4840 || !info->symbolic
f5385ebf 4841 || !h->def_regular))
5e681ec4 4842 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 4843 else
4844 {
a16385dc
MM		 4845 int symbol;
4846
5e681ec4 4847 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 4848 if (sym_flags == STT_ARM_TFUNC)
4849 value |= 1;
a16385dc 4850 if (globals->symbian_p)
6366ff1e 4851 {
74541ad4
AM		 4852 asection *osec;
4853
6366ff1e
MM		 4854 /* On Symbian OS, the data segment and text segement
4855 can be relocated independently. Therefore, we
4856 must indicate the segment to which this
4857 relocation is relative. The BPABI allows us to
4858 use any symbol in the right segment; we just use
4859 the section symbol as it is convenient. (We
4860 cannot use the symbol given by "h" directly as it
74541ad4
AM		 4861 will not appear in the dynamic symbol table.)
4862
4863 Note that the dynamic linker ignores the section
4864 symbol value, so we don't subtract osec->vma
4865 from the emitted reloc addend. */
10dbd1f3 4866 if (sym_sec)
74541ad4 4867 osec = sym_sec->output_section;
10dbd1f3 4868 else
74541ad4
AM		 4869 osec = input_section->output_section;
4870 symbol = elf_section_data (osec)->dynindx;
4871 if (symbol == 0)
4872 {
4873 struct elf_link_hash_table *htab = elf_hash_table (info);
4874
4875 if ((osec->flags & SEC_READONLY) == 0
4876 && htab->data_index_section != NULL)
4877 osec = htab->data_index_section;
4878 else
4879 osec = htab->text_index_section;
4880 symbol = elf_section_data (osec)->dynindx;
4881 }
6366ff1e
MM		 4882 BFD_ASSERT (symbol != 0);
4883 }
a16385dc
MM		 4884 else
4885 /* On SVR4-ish systems, the dynamic loader cannot
4886 relocate the text and data segments independently,
4887 so the symbol does not matter. */
4888 symbol = 0;
4889 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 4890 if (globals->use_rel)
4891 relocate = TRUE;
4892 else
4893 outrel.r_addend += value;
252b5132 4894 }
f21f3fe0 4895
947216bf 4896 loc = sreloc->contents;
00a97672
RS		 4897 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
4898 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 4899
f21f3fe0 4900 /* If this reloc is against an external symbol, we do not want to
252b5132 4901 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 4902 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 4903 if (! relocate)
4904 return bfd_reloc_ok;
9a5aca8c 4905
f21f3fe0 4906 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 4907 contents, rel->r_offset, value,
4908 (bfd_vma) 0);
4909 }
4910 else switch (r_type)
4911 {
00a97672
RS		 4912 case R_ARM_ABS12:
4913 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4914
dfc5f959 4915 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 4916 case R_ARM_CALL:
4917 case R_ARM_JUMP24:
dfc5f959 4918 case R_ARM_PC24: /* Arm B/BL instruction */
7359ea65 4919 case R_ARM_PLT32:
dfc5f959 4920 if (r_type == R_ARM_XPC25)
252b5132 4921 {
dfc5f959
NC		 4922 /* Check for Arm calling Arm function. */
4923 /* FIXME: Should we translate the instruction into a BL
4924 instruction instead ? */
4925 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 4926 (*_bfd_error_handler)
4927 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
4928 input_bfd,
4929 h ? h->root.root.string : "(local)");
dfc5f959 4930 }
39b41c9c 4931 else if (r_type != R_ARM_CALL || !globals->use_blx)
dfc5f959
NC		 4932 {
4933 /* Check for Arm calling Thumb function. */
4934 if (sym_flags == STT_ARM_TFUNC)
4935 {
f2a9dd69
DJ		 4936 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
4937 output_bfd, input_section,
4938 hit_data, sym_sec, rel->r_offset,
4939 signed_addend, value,
4940 error_message))
4941 return bfd_reloc_ok;
4942 else
4943 return bfd_reloc_dangerous;
dfc5f959 4944 }
252b5132 4945 }
ba96a88f 4946
dea514f5
PB		 4947 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
4948 where:
4949 S is the address of the symbol in the relocation.
4950 P is address of the instruction being relocated.
4951 A is the addend (extracted from the instruction) in bytes.
4952
4953 S is held in 'value'.
4954 P is the base address of the section containing the
4955 instruction plus the offset of the reloc into that
4956 section, ie:
4957 (input_section->output_section->vma +
4958 input_section->output_offset +
4959 rel->r_offset).
4960 A is the addend, converted into bytes, ie:
4961 (signed_addend * 4)
4962
4963 Note: None of these operations have knowledge of the pipeline
4964 size of the processor, thus it is up to the assembler to
4965 encode this information into the addend. */
4966 value -= (input_section->output_section->vma
4967 + input_section->output_offset);
4968 value -= rel->r_offset;
4e7fd91e
PB		 4969 if (globals->use_rel)
4970 value += (signed_addend << howto->size);
4971 else
4972 /* RELA addends do not have to be adjusted by howto->size. */
4973 value += signed_addend;
23080146 4974
dcb5e6e6
NC		 4975 signed_addend = value;
4976 signed_addend >>= howto->rightshift;
9a5aca8c 4977
5ab79981
PB		 4978 /* A branch to an undefined weak symbol is turned into a jump to
4979 the next instruction. */
4980 if (h && h->root.type == bfd_link_hash_undefweak)
4981 {
4982 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
4983 | 0x0affffff;
4984 }
4985 else
59f2c4e7 4986 {
9b485d32 4987 /* Perform a signed range check. */
dcb5e6e6 4988 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 4989 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
4990 return bfd_reloc_overflow;
9a5aca8c 4991
5ab79981 4992 addend = (value & 2);
39b41c9c 4993
5ab79981
PB		 4994 value = (signed_addend & howto->dst_mask)
4995 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 4996
5ab79981 4997 /* Set the H bit in the BLX instruction. */
39b41c9c 4998 if (sym_flags == STT_ARM_TFUNC)
39b41c9c 4999 {
5ab79981
PB		 5000 if (addend)
5001 value |= (1 << 24);
5002 else
5003 value &= ~(bfd_vma)(1 << 24);
5004 }
5005 if (r_type == R_ARM_CALL)
5006 {
5007 /* Select the correct instruction (BL or BLX). */
5008 if (sym_flags == STT_ARM_TFUNC)
5009 value |= (1 << 28);
5010 else
5011 {
5012 value &= ~(bfd_vma)(1 << 28);
5013 value |= (1 << 24);
5014 }
39b41c9c
PB		 5015 }
5016 }
252b5132 5017 break;
f21f3fe0 5018
252b5132
RH		 5019 case R_ARM_ABS32:
5020 value += addend;
5021 if (sym_flags == STT_ARM_TFUNC)
5022 value |= 1;
5023 break;
f21f3fe0 5024
bb224fc3
MS		 5025 case R_ARM_ABS32_NOI:
5026 value += addend;
5027 break;
5028
252b5132 5029 case R_ARM_REL32:
a8bc6c78
PB		 5030 value += addend;
5031 if (sym_flags == STT_ARM_TFUNC)
5032 value |= 1;
252b5132 5033 value -= (input_section->output_section->vma
62efb346 5034 + input_section->output_offset + rel->r_offset);
252b5132 5035 break;
eb043451 5036
bb224fc3
MS		 5037 case R_ARM_REL32_NOI:
5038 value += addend;
5039 value -= (input_section->output_section->vma
5040 + input_section->output_offset + rel->r_offset);
5041 break;
5042
eb043451
PB		 5043 case R_ARM_PREL31:
5044 value -= (input_section->output_section->vma
5045 + input_section->output_offset + rel->r_offset);
5046 value += signed_addend;
5047 if (! h || h->root.type != bfd_link_hash_undefweak)
5048 {
5049 /* Check for overflow */
5050 if ((value ^ (value >> 1)) & (1 << 30))
5051 return bfd_reloc_overflow;
5052 }
5053 value &= 0x7fffffff;
5054 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
5055 if (sym_flags == STT_ARM_TFUNC)
5056 value |= 1;
5057 break;
252b5132 5058 }
f21f3fe0 5059
252b5132
RH		 5060 bfd_put_32 (input_bfd, value, hit_data);
5061 return bfd_reloc_ok;
5062
5063 case R_ARM_ABS8:
5064 value += addend;
5065 if ((long) value > 0x7f || (long) value < -0x80)
5066 return bfd_reloc_overflow;
5067
5068 bfd_put_8 (input_bfd, value, hit_data);
5069 return bfd_reloc_ok;
5070
5071 case R_ARM_ABS16:
5072 value += addend;
5073
5074 if ((long) value > 0x7fff || (long) value < -0x8000)
5075 return bfd_reloc_overflow;
5076
5077 bfd_put_16 (input_bfd, value, hit_data);
5078 return bfd_reloc_ok;
5079
252b5132 5080 case R_ARM_THM_ABS5:
9b485d32 5081 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 5082 if (globals->use_rel)
5083 {
5084 /* Need to refetch addend. */
5085 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
5086 /* ??? Need to determine shift amount from operand size. */
5087 addend >>= howto->rightshift;
5088 }
252b5132
RH		 5089 value += addend;
5090
5091 /* ??? Isn't value unsigned? */
5092 if ((long) value > 0x1f || (long) value < -0x10)
5093 return bfd_reloc_overflow;
5094
5095 /* ??? Value needs to be properly shifted into place first. */
5096 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
5097 bfd_put_16 (input_bfd, value, hit_data);
5098 return bfd_reloc_ok;
5099
2cab6cc3
MS		 5100 case R_ARM_THM_ALU_PREL_11_0:
5101 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
5102 {
5103 bfd_vma insn;
5104 bfd_signed_vma relocation;
5105
5106 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
5107 | bfd_get_16 (input_bfd, hit_data + 2);
5108
5109 if (globals->use_rel)
5110 {
5111 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
5112 | ((insn & (1 << 26)) >> 15);
5113 if (insn & 0xf00000)
5114 signed_addend = -signed_addend;
5115 }
5116
5117 relocation = value + signed_addend;
5118 relocation -= (input_section->output_section->vma
5119 + input_section->output_offset
5120 + rel->r_offset);
5121
5122 value = abs (relocation);
5123
5124 if (value >= 0x1000)
5125 return bfd_reloc_overflow;
5126
5127 insn = (insn & 0xfb0f8f00) | (value & 0xff)
5128 | ((value & 0x700) << 4)
5129 | ((value & 0x800) << 15);
5130 if (relocation < 0)
5131 insn |= 0xa00000;
5132
5133 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5134 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5135
5136 return bfd_reloc_ok;
5137 }
5138
5139 case R_ARM_THM_PC12:
5140 /* Corresponds to: ldr.w reg, [pc, #offset]. */
5141 {
5142 bfd_vma insn;
5143 bfd_signed_vma relocation;
5144
5145 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
5146 | bfd_get_16 (input_bfd, hit_data + 2);
5147
5148 if (globals->use_rel)
5149 {
5150 signed_addend = insn & 0xfff;
5151 if (!(insn & (1 << 23)))
5152 signed_addend = -signed_addend;
5153 }
5154
5155 relocation = value + signed_addend;
5156 relocation -= (input_section->output_section->vma
5157 + input_section->output_offset
5158 + rel->r_offset);
5159
5160 value = abs (relocation);
5161
5162 if (value >= 0x1000)
5163 return bfd_reloc_overflow;
5164
5165 insn = (insn & 0xff7ff000) | value;
5166 if (relocation >= 0)
5167 insn |= (1 << 23);
5168
5169 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5170 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5171
5172 return bfd_reloc_ok;
5173 }
5174
dfc5f959 5175 case R_ARM_THM_XPC22:
c19d1205 5176 case R_ARM_THM_CALL:
bd97cb95 5177 case R_ARM_THM_JUMP24:
dfc5f959 5178 /* Thumb BL (branch long instruction). */
252b5132 5179 {
b34976b6 5180 bfd_vma relocation;
e95de063 5181 bfd_vma reloc_sign;
b34976b6
AM		 5182 bfd_boolean overflow = FALSE;
5183 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5184 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 5185 bfd_signed_vma reloc_signed_max;
5186 bfd_signed_vma reloc_signed_min;
b34976b6 5187 bfd_vma check;
252b5132 5188 bfd_signed_vma signed_check;
e95de063
MS		 5189 int bitsize;
5190 int thumb2 = using_thumb2 (globals);
252b5132 5191
5ab79981
PB		 5192 /* A branch to an undefined weak symbol is turned into a jump to
5193 the next instruction. */
5194 if (h && h->root.type == bfd_link_hash_undefweak)
5195 {
5196 bfd_put_16 (input_bfd, 0xe000, hit_data);
5197 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
5198 return bfd_reloc_ok;
5199 }
5200
e95de063
MS		 5201 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
5202 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 5203 if (globals->use_rel)
5204 {
e95de063
MS		 5205 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
5206 bfd_vma upper = upper_insn & 0x3ff;
5207 bfd_vma lower = lower_insn & 0x7ff;
5208 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
5209 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
5210 bfd_vma i1 = j1 ^ s ? 0 : 1;
5211 bfd_vma i2 = j2 ^ s ? 0 : 1;
5212
5213 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
5214 /* Sign extend. */
5215 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
5216
4e7fd91e
PB		 5217 signed_addend = addend;
5218 }
cb1afa5c 5219
dfc5f959
NC		 5220 if (r_type == R_ARM_THM_XPC22)
5221 {
5222 /* Check for Thumb to Thumb call. */
5223 /* FIXME: Should we translate the instruction into a BL
5224 instruction instead ? */
5225 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 5226 (*_bfd_error_handler)
5227 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
5228 input_bfd,
5229 h ? h->root.root.string : "(local)");
dfc5f959
NC		 5230 }
5231 else
252b5132 5232 {
dfc5f959
NC		 5233 /* If it is not a call to Thumb, assume call to Arm.
5234 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 5235 function call at all, but rather a long jump. Calls through
5236 the PLT do not require stubs. */
5237 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
5238 && (h == NULL || splt == NULL
5239 || h->plt.offset == (bfd_vma) -1))
dfc5f959 5240 {
bd97cb95 5241 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 5242 {
5243 /* Convert BL to BLX. */
5244 lower_insn = (lower_insn & ~0x1000) | 0x0800;
5245 }
5246 else if (elf32_thumb_to_arm_stub
dfc5f959 5247 (info, sym_name, input_bfd, output_bfd, input_section,
f2a9dd69
DJ		 5248 hit_data, sym_sec, rel->r_offset, signed_addend, value,
5249 error_message))
dfc5f959
NC		 5250 return bfd_reloc_ok;
5251 else
5252 return bfd_reloc_dangerous;
5253 }
bd97cb95
DJ		 5254 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
5255 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 5256 {
5257 /* Make sure this is a BL. */
5258 lower_insn |= 0x1800;
5259 }
252b5132 5260 }
f21f3fe0 5261
b7693d02
DJ		 5262 /* Handle calls via the PLT. */
5263 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
5264 {
5265 value = (splt->output_section->vma
5266 + splt->output_offset
5267 + h->plt.offset);
bd97cb95 5268 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 5269 {
5270 /* If the Thumb BLX instruction is available, convert the
5271 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 5272 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 5273 }
5274 else
5275 /* Target the Thumb stub before the ARM PLT entry. */
5276 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 5277 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 5278 }
5279
ba96a88f 5280 relocation = value + signed_addend;
f21f3fe0 5281
252b5132 5282 relocation -= (input_section->output_section->vma
ba96a88f
NC		 5283 + input_section->output_offset
5284 + rel->r_offset);
9a5aca8c 5285
252b5132
RH		 5286 check = relocation >> howto->rightshift;
5287
5288 /* If this is a signed value, the rightshift just dropped
5289 leading 1 bits (assuming twos complement). */
5290 if ((bfd_signed_vma) relocation >= 0)
5291 signed_check = check;
5292 else
5293 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
5294
e95de063
MS		 5295 /* Calculate the permissable maximum and minimum values for
5296 this relocation according to whether we're relocating for
5297 Thumb-2 or not. */
5298 bitsize = howto->bitsize;
5299 if (!thumb2)
5300 bitsize -= 2;
5301 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
5302 reloc_signed_min = ~reloc_signed_max;
5303
252b5132 5304 /* Assumes two's complement. */
ba96a88f 5305 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 5306 overflow = TRUE;
252b5132 5307
bd97cb95 5308 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 5309 /* For a BLX instruction, make sure that the relocation is rounded up
5310 to a word boundary. This follows the semantics of the instruction
5311 which specifies that bit 1 of the target address will come from bit
5312 1 of the base address. */
5313 relocation = (relocation + 2) & ~ 3;
cb1afa5c 5314
e95de063
MS		 5315 /* Put RELOCATION back into the insn. Assumes two's complement.
5316 We use the Thumb-2 encoding, which is safe even if dealing with
5317 a Thumb-1 instruction by virtue of our overflow check above. */
5318 reloc_sign = (signed_check < 0) ? 1 : 0;
5319 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
5320 | ((relocation >> 12) & 0x3ff)
5321 | (reloc_sign << 10);
5322 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
5323 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
5324 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
5325 | ((relocation >> 1) & 0x7ff);
c62e1cc3 5326
252b5132
RH		 5327 /* Put the relocated value back in the object file: */
5328 bfd_put_16 (input_bfd, upper_insn, hit_data);
5329 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5330
5331 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5332 }
5333 break;
5334
c19d1205
ZW		 5335 case R_ARM_THM_JUMP19:
5336 /* Thumb32 conditional branch instruction. */
5337 {
5338 bfd_vma relocation;
5339 bfd_boolean overflow = FALSE;
5340 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5341 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 5342 bfd_signed_vma reloc_signed_max = 0xffffe;
5343 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 5344 bfd_signed_vma signed_check;
5345
5346 /* Need to refetch the addend, reconstruct the top three bits,
5347 and squish the two 11 bit pieces together. */
5348 if (globals->use_rel)
5349 {
5350 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 5351 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 5352 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
5353 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
5354 bfd_vma lower = (lower_insn & 0x07ff);
5355
a00a1f35
MS		 5356 upper |= J1 << 6;
5357 upper |= J2 << 7;
5358 upper |= (!S) << 8;
c19d1205
ZW		 5359 upper -= 0x0100; /* Sign extend. */
5360
5361 addend = (upper << 12) | (lower << 1);
5362 signed_addend = addend;
5363 }
5364
bd97cb95
DJ		 5365 /* Handle calls via the PLT. */
5366 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
5367 {
5368 value = (splt->output_section->vma
5369 + splt->output_offset
5370 + h->plt.offset);
5371 /* Target the Thumb stub before the ARM PLT entry. */
5372 value -= PLT_THUMB_STUB_SIZE;
5373 *unresolved_reloc_p = FALSE;
5374 }
5375
c19d1205
ZW		 5376 /* ??? Should handle interworking? GCC might someday try to
5377 use this for tail calls. */
5378
5379 relocation = value + signed_addend;
5380 relocation -= (input_section->output_section->vma
5381 + input_section->output_offset
5382 + rel->r_offset);
a00a1f35 5383 signed_check = (bfd_signed_vma) relocation;
c19d1205 5384
c19d1205
ZW		 5385 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5386 overflow = TRUE;
5387
5388 /* Put RELOCATION back into the insn. */
5389 {
5390 bfd_vma S = (relocation & 0x00100000) >> 20;
5391 bfd_vma J2 = (relocation & 0x00080000) >> 19;
5392 bfd_vma J1 = (relocation & 0x00040000) >> 18;
5393 bfd_vma hi = (relocation & 0x0003f000) >> 12;
5394 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
5395
a00a1f35 5396 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 5397 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
5398 }
5399
5400 /* Put the relocated value back in the object file: */
5401 bfd_put_16 (input_bfd, upper_insn, hit_data);
5402 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5403
5404 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5405 }
5406
5407 case R_ARM_THM_JUMP11:
5408 case R_ARM_THM_JUMP8:
5409 case R_ARM_THM_JUMP6:
51c5503b
NC		 5410 /* Thumb B (branch) instruction). */
5411 {
6cf9e9fe 5412 bfd_signed_vma relocation;
51c5503b
NC		 5413 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
5414 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 5415 bfd_signed_vma signed_check;
5416
c19d1205
ZW		 5417 /* CZB cannot jump backward. */
5418 if (r_type == R_ARM_THM_JUMP6)
5419 reloc_signed_min = 0;
5420
4e7fd91e 5421 if (globals->use_rel)
6cf9e9fe 5422 {
4e7fd91e
PB		 5423 /* Need to refetch addend. */
5424 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
5425 if (addend & ((howto->src_mask + 1) >> 1))
5426 {
5427 signed_addend = -1;
5428 signed_addend &= ~ howto->src_mask;
5429 signed_addend |= addend;
5430 }
5431 else
5432 signed_addend = addend;
5433 /* The value in the insn has been right shifted. We need to
5434 undo this, so that we can perform the address calculation
5435 in terms of bytes. */
5436 signed_addend <<= howto->rightshift;
6cf9e9fe 5437 }
6cf9e9fe 5438 relocation = value + signed_addend;
51c5503b
NC		 5439
5440 relocation -= (input_section->output_section->vma
5441 + input_section->output_offset
5442 + rel->r_offset);
5443
6cf9e9fe
NC		 5444 relocation >>= howto->rightshift;
5445 signed_check = relocation;
c19d1205
ZW		 5446
5447 if (r_type == R_ARM_THM_JUMP6)
5448 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
5449 else
5450 relocation &= howto->dst_mask;
51c5503b 5451 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 5452
51c5503b
NC		 5453 bfd_put_16 (input_bfd, relocation, hit_data);
5454
5455 /* Assumes two's complement. */
5456 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5457 return bfd_reloc_overflow;
5458
5459 return bfd_reloc_ok;
5460 }
cedb70c5 5461
8375c36b
PB		 5462 case R_ARM_ALU_PCREL7_0:
5463 case R_ARM_ALU_PCREL15_8:
5464 case R_ARM_ALU_PCREL23_15:
5465 {
5466 bfd_vma insn;
5467 bfd_vma relocation;
5468
5469 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 5470 if (globals->use_rel)
5471 {
5472 /* Extract the addend. */
5473 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
5474 signed_addend = addend;
5475 }
8375c36b
PB		 5476 relocation = value + signed_addend;
5477
5478 relocation -= (input_section->output_section->vma
5479 + input_section->output_offset
5480 + rel->r_offset);
5481 insn = (insn & ~0xfff)
5482 | ((howto->bitpos << 7) & 0xf00)
5483 | ((relocation >> howto->bitpos) & 0xff);
5484 bfd_put_32 (input_bfd, value, hit_data);
5485 }
5486 return bfd_reloc_ok;
5487
252b5132
RH		 5488 case R_ARM_GNU_VTINHERIT:
5489 case R_ARM_GNU_VTENTRY:
5490 return bfd_reloc_ok;
5491
c19d1205 5492 case R_ARM_GOTOFF32:
252b5132
RH		 5493 /* Relocation is relative to the start of the
5494 global offset table. */
5495
5496 BFD_ASSERT (sgot != NULL);
5497 if (sgot == NULL)
5498 return bfd_reloc_notsupported;
9a5aca8c 5499
cedb70c5 5500 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 5501 address by one, so that attempts to call the function pointer will
5502 correctly interpret it as Thumb code. */
5503 if (sym_flags == STT_ARM_TFUNC)
5504 value += 1;
5505
252b5132
RH		 5506 /* Note that sgot->output_offset is not involved in this
5507 calculation. We always want the start of .got. If we
5508 define _GLOBAL_OFFSET_TABLE in a different way, as is
5509 permitted by the ABI, we might have to change this
9b485d32 5510 calculation. */
252b5132 5511 value -= sgot->output_section->vma;
f21f3fe0 5512 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5513 contents, rel->r_offset, value,
00a97672 5514 rel->r_addend);
252b5132
RH		 5515
5516 case R_ARM_GOTPC:
a7c10850 5517 /* Use global offset table as symbol value. */
252b5132 5518 BFD_ASSERT (sgot != NULL);
f21f3fe0 5519
252b5132
RH		 5520 if (sgot == NULL)
5521 return bfd_reloc_notsupported;
5522
0945cdfd 5523 *unresolved_reloc_p = FALSE;
252b5132 5524 value = sgot->output_section->vma;
f21f3fe0 5525 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5526 contents, rel->r_offset, value,
00a97672 5527 rel->r_addend);
f21f3fe0 5528
252b5132 5529 case R_ARM_GOT32:
eb043451 5530 case R_ARM_GOT_PREL:
252b5132 5531 /* Relocation is to the entry for this symbol in the
9b485d32 5532 global offset table. */
252b5132
RH		 5533 if (sgot == NULL)
5534 return bfd_reloc_notsupported;
f21f3fe0 5535
252b5132
RH		 5536 if (h != NULL)
5537 {
5538 bfd_vma off;
5e681ec4 5539 bfd_boolean dyn;
f21f3fe0 5540
252b5132
RH		 5541 off = h->got.offset;
5542 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 5543 dyn = globals->root.dynamic_sections_created;
f21f3fe0 5544
5e681ec4 5545 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 5546 || (info->shared
5e681ec4
PB		 5547 && SYMBOL_REFERENCES_LOCAL (info, h))
5548 || (ELF_ST_VISIBILITY (h->other)
5549 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 5550 {
5551 /* This is actually a static link, or it is a -Bsymbolic link
5552 and the symbol is defined locally. We must initialize this
5553 entry in the global offset table. Since the offset must
5554 always be a multiple of 4, we use the least significant bit
5555 to record whether we have initialized it already.
f21f3fe0 5556
00a97672 5557 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 5558 entry to initialize the value. This is done in the
9b485d32 5559 finish_dynamic_symbol routine. */
252b5132
RH		 5560 if ((off & 1) != 0)
5561 off &= ~1;
5562 else
5563 {
ee29b9fb
RE		 5564 /* If we are addressing a Thumb function, we need to
5565 adjust the address by one, so that attempts to
5566 call the function pointer will correctly
5567 interpret it as Thumb code. */
5568 if (sym_flags == STT_ARM_TFUNC)
5569 value |= 1;
5570
252b5132
RH		 5571 bfd_put_32 (output_bfd, value, sgot->contents + off);
5572 h->got.offset |= 1;
5573 }
5574 }
0945cdfd
DJ		 5575 else
5576 *unresolved_reloc_p = FALSE;
f21f3fe0 5577
252b5132
RH		 5578 value = sgot->output_offset + off;
5579 }
5580 else
5581 {
5582 bfd_vma off;
f21f3fe0 5583
252b5132
RH		 5584 BFD_ASSERT (local_got_offsets != NULL &&
5585 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 5586
252b5132 5587 off = local_got_offsets[r_symndx];
f21f3fe0 5588
252b5132
RH		 5589 /* The offset must always be a multiple of 4. We use the
5590 least significant bit to record whether we have already
9b485d32 5591 generated the necessary reloc. */
252b5132
RH		 5592 if ((off & 1) != 0)
5593 off &= ~1;
5594 else
5595 {
b7693d02
DJ		 5596 /* If we are addressing a Thumb function, we need to
5597 adjust the address by one, so that attempts to
5598 call the function pointer will correctly
5599 interpret it as Thumb code. */
5600 if (sym_flags == STT_ARM_TFUNC)
5601 value |= 1;
5602
00a97672
RS		 5603 if (globals->use_rel)
5604 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 5605
252b5132
RH		 5606 if (info->shared)
5607 {
5608 asection * srelgot;
947216bf
AM		 5609 Elf_Internal_Rela outrel;
5610 bfd_byte *loc;
f21f3fe0 5611
00a97672
RS		 5612 srelgot = (bfd_get_section_by_name
5613 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 5614 BFD_ASSERT (srelgot != NULL);
f21f3fe0 5615
00a97672 5616 outrel.r_addend = addend + value;
252b5132 5617 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 5618 + sgot->output_offset
252b5132
RH		 5619 + off);
5620 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 5621 loc = srelgot->contents;
00a97672
RS		 5622 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
5623 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 5624 }
f21f3fe0 5625
252b5132
RH		 5626 local_got_offsets[r_symndx] |= 1;
5627 }
f21f3fe0 5628
252b5132
RH		 5629 value = sgot->output_offset + off;
5630 }
eb043451
PB		 5631 if (r_type != R_ARM_GOT32)
5632 value += sgot->output_section->vma;
9a5aca8c 5633
f21f3fe0 5634 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5635 contents, rel->r_offset, value,
00a97672 5636 rel->r_addend);
f21f3fe0 5637
ba93b8ac
DJ		 5638 case R_ARM_TLS_LDO32:
5639 value = value - dtpoff_base (info);
5640
5641 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 5642 contents, rel->r_offset, value,
5643 rel->r_addend);
ba93b8ac
DJ		 5644
5645 case R_ARM_TLS_LDM32:
5646 {
5647 bfd_vma off;
5648
5649 if (globals->sgot == NULL)
5650 abort ();
5651
5652 off = globals->tls_ldm_got.offset;
5653
5654 if ((off & 1) != 0)
5655 off &= ~1;
5656 else
5657 {
5658 /* If we don't know the module number, create a relocation
5659 for it. */
5660 if (info->shared)
5661 {
5662 Elf_Internal_Rela outrel;
5663 bfd_byte *loc;
5664
5665 if (globals->srelgot == NULL)
5666 abort ();
5667
00a97672 5668 outrel.r_addend = 0;
ba93b8ac
DJ		 5669 outrel.r_offset = (globals->sgot->output_section->vma
5670 + globals->sgot->output_offset + off);
5671 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
5672
00a97672
RS		 5673 if (globals->use_rel)
5674 bfd_put_32 (output_bfd, outrel.r_addend,
5675 globals->sgot->contents + off);
ba93b8ac
DJ		 5676
5677 loc = globals->srelgot->contents;
00a97672
RS		 5678 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
5679 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 5680 }
5681 else
5682 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
5683
5684 globals->tls_ldm_got.offset |= 1;
5685 }
5686
5687 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5688 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5689
5690 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5691 contents, rel->r_offset, value,
00a97672 5692 rel->r_addend);
ba93b8ac
DJ		 5693 }
5694
5695 case R_ARM_TLS_GD32:
5696 case R_ARM_TLS_IE32:
5697 {
5698 bfd_vma off;
5699 int indx;
5700 char tls_type;
5701
5702 if (globals->sgot == NULL)
5703 abort ();
5704
5705 indx = 0;
5706 if (h != NULL)
5707 {
5708 bfd_boolean dyn;
5709 dyn = globals->root.dynamic_sections_created;
5710 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
5711 && (!info->shared
5712 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5713 {
5714 *unresolved_reloc_p = FALSE;
5715 indx = h->dynindx;
5716 }
5717 off = h->got.offset;
5718 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
5719 }
5720 else
5721 {
5722 if (local_got_offsets == NULL)
5723 abort ();
5724 off = local_got_offsets[r_symndx];
5725 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
5726 }
5727
5728 if (tls_type == GOT_UNKNOWN)
5729 abort ();
5730
5731 if ((off & 1) != 0)
5732 off &= ~1;
5733 else
5734 {
5735 bfd_boolean need_relocs = FALSE;
5736 Elf_Internal_Rela outrel;
5737 bfd_byte *loc = NULL;
5738 int cur_off = off;
5739
5740 /* The GOT entries have not been initialized yet. Do it
5741 now, and emit any relocations. If both an IE GOT and a
5742 GD GOT are necessary, we emit the GD first. */
5743
5744 if ((info->shared || indx != 0)
5745 && (h == NULL
5746 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5747 || h->root.type != bfd_link_hash_undefweak))
5748 {
5749 need_relocs = TRUE;
5750 if (globals->srelgot == NULL)
5751 abort ();
5752 loc = globals->srelgot->contents;
00a97672 5753 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 5754 }
5755
5756 if (tls_type & GOT_TLS_GD)
5757 {
5758 if (need_relocs)
5759 {
00a97672 5760 outrel.r_addend = 0;
ba93b8ac 5761 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 5762 + globals->sgot->output_offset
5763 + cur_off);
ba93b8ac 5764 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 5765
00a97672
RS		 5766 if (globals->use_rel)
5767 bfd_put_32 (output_bfd, outrel.r_addend,
5768 globals->sgot->contents + cur_off);
5769
5770 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5771 globals->srelgot->reloc_count++;
00a97672 5772 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5773
5774 if (indx == 0)
5775 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5776 globals->sgot->contents + cur_off + 4);
5777 else
5778 {
00a97672 5779 outrel.r_addend = 0;
ba93b8ac
DJ		 5780 outrel.r_info = ELF32_R_INFO (indx,
5781 R_ARM_TLS_DTPOFF32);
5782 outrel.r_offset += 4;
00a97672
RS		 5783
5784 if (globals->use_rel)
5785 bfd_put_32 (output_bfd, outrel.r_addend,
5786 globals->sgot->contents + cur_off + 4);
5787
5788
5789 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5790 globals->srelgot->reloc_count++;
00a97672 5791 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5792 }
5793 }
5794 else
5795 {
5796 /* If we are not emitting relocations for a
5797 general dynamic reference, then we must be in a
5798 static link or an executable link with the
5799 symbol binding locally. Mark it as belonging
5800 to module 1, the executable. */
5801 bfd_put_32 (output_bfd, 1,
5802 globals->sgot->contents + cur_off);
5803 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5804 globals->sgot->contents + cur_off + 4);
5805 }
5806
5807 cur_off += 8;
5808 }
5809
5810 if (tls_type & GOT_TLS_IE)
5811 {
5812 if (need_relocs)
5813 {
00a97672
RS		 5814 if (indx == 0)
5815 outrel.r_addend = value - dtpoff_base (info);
5816 else
5817 outrel.r_addend = 0;
ba93b8ac
DJ		 5818 outrel.r_offset = (globals->sgot->output_section->vma
5819 + globals->sgot->output_offset
5820 + cur_off);
5821 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
5822
00a97672
RS		 5823 if (globals->use_rel)
5824 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 5825 globals->sgot->contents + cur_off);
5826
00a97672 5827 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5828 globals->srelgot->reloc_count++;
00a97672 5829 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5830 }
5831 else
5832 bfd_put_32 (output_bfd, tpoff (info, value),
5833 globals->sgot->contents + cur_off);
5834 cur_off += 4;
5835 }
5836
5837 if (h != NULL)
5838 h->got.offset |= 1;
5839 else
5840 local_got_offsets[r_symndx] |= 1;
5841 }
5842
5843 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
5844 off += 8;
5845 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5846 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5847
5848 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5849 contents, rel->r_offset, value,
00a97672 5850 rel->r_addend);
ba93b8ac
DJ		 5851 }
5852
5853 case R_ARM_TLS_LE32:
5854 if (info->shared)
5855 {
5856 (*_bfd_error_handler)
5857 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
5858 input_bfd, input_section,
5859 (long) rel->r_offset, howto->name);
5860 return FALSE;
5861 }
5862 else
5863 value = tpoff (info, value);
5864
5865 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 5866 contents, rel->r_offset, value,
5867 rel->r_addend);
ba93b8ac 5868
319850b4
JB		 5869 case R_ARM_V4BX:
5870 if (globals->fix_v4bx)
845b51d6
PB		 5871 {
5872 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 5873
845b51d6
PB		 5874 /* Ensure that we have a BX instruction. */
5875 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 5876
845b51d6
PB		 5877 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
5878 {
5879 /* Branch to veneer. */
5880 bfd_vma glue_addr;
5881 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
5882 glue_addr -= input_section->output_section->vma
5883 + input_section->output_offset
5884 + rel->r_offset + 8;
5885 insn = (insn & 0xf0000000) | 0x0a000000
5886 | ((glue_addr >> 2) & 0x00ffffff);
5887 }
5888 else
5889 {
5890 /* Preserve Rm (lowest four bits) and the condition code
5891 (highest four bits). Other bits encode MOV PC,Rm. */
5892 insn = (insn & 0xf000000f) | 0x01a0f000;
5893 }
319850b4 5894
845b51d6
PB		 5895 bfd_put_32 (input_bfd, insn, hit_data);
5896 }
319850b4
JB		 5897 return bfd_reloc_ok;
5898
b6895b4f
PB		 5899 case R_ARM_MOVW_ABS_NC:
5900 case R_ARM_MOVT_ABS:
5901 case R_ARM_MOVW_PREL_NC:
5902 case R_ARM_MOVT_PREL:
92f5d02b
MS		 5903 /* Until we properly support segment-base-relative addressing then
5904 we assume the segment base to be zero, as for the group relocations.
5905 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
5906 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
5907 case R_ARM_MOVW_BREL_NC:
5908 case R_ARM_MOVW_BREL:
5909 case R_ARM_MOVT_BREL:
b6895b4f
PB		 5910 {
5911 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5912
5913 if (globals->use_rel)
5914 {
5915 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
5916 signed_addend = (addend ^ 0x10000) - 0x10000;
5917 }
92f5d02b 5918
b6895b4f 5919 value += signed_addend;
b6895b4f
PB		 5920
5921 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
5922 value -= (input_section->output_section->vma
5923 + input_section->output_offset + rel->r_offset);
5924
92f5d02b
MS		 5925 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
5926 return bfd_reloc_overflow;
5927
5928 if (sym_flags == STT_ARM_TFUNC)
5929 value |= 1;
5930
5931 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
5932 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 5933 value >>= 16;
5934
5935 insn &= 0xfff0f000;
5936 insn |= value & 0xfff;
5937 insn |= (value & 0xf000) << 4;
5938 bfd_put_32 (input_bfd, insn, hit_data);
5939 }
5940 return bfd_reloc_ok;
5941
5942 case R_ARM_THM_MOVW_ABS_NC:
5943 case R_ARM_THM_MOVT_ABS:
5944 case R_ARM_THM_MOVW_PREL_NC:
5945 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 5946 /* Until we properly support segment-base-relative addressing then
5947 we assume the segment base to be zero, as for the above relocations.
5948 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
5949 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
5950 as R_ARM_THM_MOVT_ABS. */
5951 case R_ARM_THM_MOVW_BREL_NC:
5952 case R_ARM_THM_MOVW_BREL:
5953 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 5954 {
5955 bfd_vma insn;
5956
5957 insn = bfd_get_16 (input_bfd, hit_data) << 16;
5958 insn |= bfd_get_16 (input_bfd, hit_data + 2);
5959
5960 if (globals->use_rel)
5961 {
5962 addend = ((insn >> 4) & 0xf000)
5963 | ((insn >> 15) & 0x0800)
5964 | ((insn >> 4) & 0x0700)
5965 | (insn & 0x00ff);
5966 signed_addend = (addend ^ 0x10000) - 0x10000;
5967 }
92f5d02b 5968
b6895b4f 5969 value += signed_addend;
b6895b4f
PB		 5970
5971 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
5972 value -= (input_section->output_section->vma
5973 + input_section->output_offset + rel->r_offset);
5974
92f5d02b
MS		 5975 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
5976 return bfd_reloc_overflow;
5977
5978 if (sym_flags == STT_ARM_TFUNC)
5979 value |= 1;
5980
5981 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
5982 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 5983 value >>= 16;
5984
5985 insn &= 0xfbf08f00;
5986 insn |= (value & 0xf000) << 4;
5987 insn |= (value & 0x0800) << 15;
5988 insn |= (value & 0x0700) << 4;
5989 insn |= (value & 0x00ff);
5990
5991 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5992 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5993 }
5994 return bfd_reloc_ok;
5995
4962c51a
MS		 5996 case R_ARM_ALU_PC_G0_NC:
5997 case R_ARM_ALU_PC_G1_NC:
5998 case R_ARM_ALU_PC_G0:
5999 case R_ARM_ALU_PC_G1:
6000 case R_ARM_ALU_PC_G2:
6001 case R_ARM_ALU_SB_G0_NC:
6002 case R_ARM_ALU_SB_G1_NC:
6003 case R_ARM_ALU_SB_G0:
6004 case R_ARM_ALU_SB_G1:
6005 case R_ARM_ALU_SB_G2:
6006 {
6007 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6008 bfd_vma pc = input_section->output_section->vma
6009 + input_section->output_offset + rel->r_offset;
6010 /* sb should be the origin of the *segment* containing the symbol.
6011 It is not clear how to obtain this OS-dependent value, so we
6012 make an arbitrary choice of zero. */
6013 bfd_vma sb = 0;
6014 bfd_vma residual;
6015 bfd_vma g_n;
6016 bfd_signed_vma signed_value;
6017 int group = 0;
6018
6019 /* Determine which group of bits to select. */
6020 switch (r_type)
6021 {
6022 case R_ARM_ALU_PC_G0_NC:
6023 case R_ARM_ALU_PC_G0:
6024 case R_ARM_ALU_SB_G0_NC:
6025 case R_ARM_ALU_SB_G0:
6026 group = 0;
6027 break;
6028
6029 case R_ARM_ALU_PC_G1_NC:
6030 case R_ARM_ALU_PC_G1:
6031 case R_ARM_ALU_SB_G1_NC:
6032 case R_ARM_ALU_SB_G1:
6033 group = 1;
6034 break;
6035
6036 case R_ARM_ALU_PC_G2:
6037 case R_ARM_ALU_SB_G2:
6038 group = 2;
6039 break;
6040
6041 default:
6042 abort();
6043 }
6044
6045 /* If REL, extract the addend from the insn. If RELA, it will
6046 have already been fetched for us. */
6047 if (globals->use_rel)
6048 {
6049 int negative;
6050 bfd_vma constant = insn & 0xff;
6051 bfd_vma rotation = (insn & 0xf00) >> 8;
6052
6053 if (rotation == 0)
6054 signed_addend = constant;
6055 else
6056 {
6057 /* Compensate for the fact that in the instruction, the
6058 rotation is stored in multiples of 2 bits. */
6059 rotation *= 2;
6060
6061 /* Rotate "constant" right by "rotation" bits. */
6062 signed_addend = (constant >> rotation) |
6063 (constant << (8 * sizeof (bfd_vma) - rotation));
6064 }
6065
6066 /* Determine if the instruction is an ADD or a SUB.
6067 (For REL, this determines the sign of the addend.) */
6068 negative = identify_add_or_sub (insn);
6069 if (negative == 0)
6070 {
6071 (*_bfd_error_handler)
6072 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
6073 input_bfd, input_section,
6074 (long) rel->r_offset, howto->name);
6075 return bfd_reloc_overflow;
6076 }
6077
6078 signed_addend *= negative;
6079 }
6080
6081 /* Compute the value (X) to go in the place. */
6082 if (r_type == R_ARM_ALU_PC_G0_NC
6083 || r_type == R_ARM_ALU_PC_G1_NC
6084 || r_type == R_ARM_ALU_PC_G0
6085 || r_type == R_ARM_ALU_PC_G1
6086 || r_type == R_ARM_ALU_PC_G2)
6087 /* PC relative. */
6088 signed_value = value - pc + signed_addend;
6089 else
6090 /* Section base relative. */
6091 signed_value = value - sb + signed_addend;
6092
6093 /* If the target symbol is a Thumb function, then set the
6094 Thumb bit in the address. */
6095 if (sym_flags == STT_ARM_TFUNC)
6096 signed_value |= 1;
6097
6098 /* Calculate the value of the relevant G_n, in encoded
6099 constant-with-rotation format. */
6100 g_n = calculate_group_reloc_mask (abs (signed_value), group,
6101 &residual);
6102
6103 /* Check for overflow if required. */
6104 if ((r_type == R_ARM_ALU_PC_G0
6105 || r_type == R_ARM_ALU_PC_G1
6106 || r_type == R_ARM_ALU_PC_G2
6107 || r_type == R_ARM_ALU_SB_G0
6108 || r_type == R_ARM_ALU_SB_G1
6109 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
6110 {
6111 (*_bfd_error_handler)
6112 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6113 input_bfd, input_section,
6114 (long) rel->r_offset, abs (signed_value), howto->name);
6115 return bfd_reloc_overflow;
6116 }
6117
6118 /* Mask out the value and the ADD/SUB part of the opcode; take care
6119 not to destroy the S bit. */
6120 insn &= 0xff1ff000;
6121
6122 /* Set the opcode according to whether the value to go in the
6123 place is negative. */
6124 if (signed_value < 0)
6125 insn |= 1 << 22;
6126 else
6127 insn |= 1 << 23;
6128
6129 /* Encode the offset. */
6130 insn |= g_n;
6131
6132 bfd_put_32 (input_bfd, insn, hit_data);
6133 }
6134 return bfd_reloc_ok;
6135
6136 case R_ARM_LDR_PC_G0:
6137 case R_ARM_LDR_PC_G1:
6138 case R_ARM_LDR_PC_G2:
6139 case R_ARM_LDR_SB_G0:
6140 case R_ARM_LDR_SB_G1:
6141 case R_ARM_LDR_SB_G2:
6142 {
6143 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6144 bfd_vma pc = input_section->output_section->vma
6145 + input_section->output_offset + rel->r_offset;
6146 bfd_vma sb = 0; /* See note above. */
6147 bfd_vma residual;
6148 bfd_signed_vma signed_value;
6149 int group = 0;
6150
6151 /* Determine which groups of bits to calculate. */
6152 switch (r_type)
6153 {
6154 case R_ARM_LDR_PC_G0:
6155 case R_ARM_LDR_SB_G0:
6156 group = 0;
6157 break;
6158
6159 case R_ARM_LDR_PC_G1:
6160 case R_ARM_LDR_SB_G1:
6161 group = 1;
6162 break;
6163
6164 case R_ARM_LDR_PC_G2:
6165 case R_ARM_LDR_SB_G2:
6166 group = 2;
6167 break;
6168
6169 default:
6170 abort();
6171 }
6172
6173 /* If REL, extract the addend from the insn. If RELA, it will
6174 have already been fetched for us. */
6175 if (globals->use_rel)
6176 {
6177 int negative = (insn & (1 << 23)) ? 1 : -1;
6178 signed_addend = negative * (insn & 0xfff);
6179 }
6180
6181 /* Compute the value (X) to go in the place. */
6182 if (r_type == R_ARM_LDR_PC_G0
6183 || r_type == R_ARM_LDR_PC_G1
6184 || r_type == R_ARM_LDR_PC_G2)
6185 /* PC relative. */
6186 signed_value = value - pc + signed_addend;
6187 else
6188 /* Section base relative. */
6189 signed_value = value - sb + signed_addend;
6190
6191 /* Calculate the value of the relevant G_{n-1} to obtain
6192 the residual at that stage. */
6193 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6194
6195 /* Check for overflow. */
6196 if (residual >= 0x1000)
6197 {
6198 (*_bfd_error_handler)
6199 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6200 input_bfd, input_section,
6201 (long) rel->r_offset, abs (signed_value), howto->name);
6202 return bfd_reloc_overflow;
6203 }
6204
6205 /* Mask out the value and U bit. */
6206 insn &= 0xff7ff000;
6207
6208 /* Set the U bit if the value to go in the place is non-negative. */
6209 if (signed_value >= 0)
6210 insn |= 1 << 23;
6211
6212 /* Encode the offset. */
6213 insn |= residual;
6214
6215 bfd_put_32 (input_bfd, insn, hit_data);
6216 }
6217 return bfd_reloc_ok;
6218
6219 case R_ARM_LDRS_PC_G0:
6220 case R_ARM_LDRS_PC_G1:
6221 case R_ARM_LDRS_PC_G2:
6222 case R_ARM_LDRS_SB_G0:
6223 case R_ARM_LDRS_SB_G1:
6224 case R_ARM_LDRS_SB_G2:
6225 {
6226 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6227 bfd_vma pc = input_section->output_section->vma
6228 + input_section->output_offset + rel->r_offset;
6229 bfd_vma sb = 0; /* See note above. */
6230 bfd_vma residual;
6231 bfd_signed_vma signed_value;
6232 int group = 0;
6233
6234 /* Determine which groups of bits to calculate. */
6235 switch (r_type)
6236 {
6237 case R_ARM_LDRS_PC_G0:
6238 case R_ARM_LDRS_SB_G0:
6239 group = 0;
6240 break;
6241
6242 case R_ARM_LDRS_PC_G1:
6243 case R_ARM_LDRS_SB_G1:
6244 group = 1;
6245 break;
6246
6247 case R_ARM_LDRS_PC_G2:
6248 case R_ARM_LDRS_SB_G2:
6249 group = 2;
6250 break;
6251
6252 default:
6253 abort();
6254 }
6255
6256 /* If REL, extract the addend from the insn. If RELA, it will
6257 have already been fetched for us. */
6258 if (globals->use_rel)
6259 {
6260 int negative = (insn & (1 << 23)) ? 1 : -1;
6261 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
6262 }
6263
6264 /* Compute the value (X) to go in the place. */
6265 if (r_type == R_ARM_LDRS_PC_G0
6266 || r_type == R_ARM_LDRS_PC_G1
6267 || r_type == R_ARM_LDRS_PC_G2)
6268 /* PC relative. */
6269 signed_value = value - pc + signed_addend;
6270 else
6271 /* Section base relative. */
6272 signed_value = value - sb + signed_addend;
6273
6274 /* Calculate the value of the relevant G_{n-1} to obtain
6275 the residual at that stage. */
6276 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6277
6278 /* Check for overflow. */
6279 if (residual >= 0x100)
6280 {
6281 (*_bfd_error_handler)
6282 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6283 input_bfd, input_section,
6284 (long) rel->r_offset, abs (signed_value), howto->name);
6285 return bfd_reloc_overflow;
6286 }
6287
6288 /* Mask out the value and U bit. */
6289 insn &= 0xff7ff0f0;
6290
6291 /* Set the U bit if the value to go in the place is non-negative. */
6292 if (signed_value >= 0)
6293 insn |= 1 << 23;
6294
6295 /* Encode the offset. */
6296 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
6297
6298 bfd_put_32 (input_bfd, insn, hit_data);
6299 }
6300 return bfd_reloc_ok;
6301
6302 case R_ARM_LDC_PC_G0:
6303 case R_ARM_LDC_PC_G1:
6304 case R_ARM_LDC_PC_G2:
6305 case R_ARM_LDC_SB_G0:
6306 case R_ARM_LDC_SB_G1:
6307 case R_ARM_LDC_SB_G2:
6308 {
6309 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6310 bfd_vma pc = input_section->output_section->vma
6311 + input_section->output_offset + rel->r_offset;
6312 bfd_vma sb = 0; /* See note above. */
6313 bfd_vma residual;
6314 bfd_signed_vma signed_value;
6315 int group = 0;
6316
6317 /* Determine which groups of bits to calculate. */
6318 switch (r_type)
6319 {
6320 case R_ARM_LDC_PC_G0:
6321 case R_ARM_LDC_SB_G0:
6322 group = 0;
6323 break;
6324
6325 case R_ARM_LDC_PC_G1:
6326 case R_ARM_LDC_SB_G1:
6327 group = 1;
6328 break;
6329
6330 case R_ARM_LDC_PC_G2:
6331 case R_ARM_LDC_SB_G2:
6332 group = 2;
6333 break;
6334
6335 default:
6336 abort();
6337 }
6338
6339 /* If REL, extract the addend from the insn. If RELA, it will
6340 have already been fetched for us. */
6341 if (globals->use_rel)
6342 {
6343 int negative = (insn & (1 << 23)) ? 1 : -1;
6344 signed_addend = negative * ((insn & 0xff) << 2);
6345 }
6346
6347 /* Compute the value (X) to go in the place. */
6348 if (r_type == R_ARM_LDC_PC_G0
6349 || r_type == R_ARM_LDC_PC_G1
6350 || r_type == R_ARM_LDC_PC_G2)
6351 /* PC relative. */
6352 signed_value = value - pc + signed_addend;
6353 else
6354 /* Section base relative. */
6355 signed_value = value - sb + signed_addend;
6356
6357 /* Calculate the value of the relevant G_{n-1} to obtain
6358 the residual at that stage. */
6359 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6360
6361 /* Check for overflow. (The absolute value to go in the place must be
6362 divisible by four and, after having been divided by four, must
6363 fit in eight bits.) */
6364 if ((residual & 0x3) != 0 || residual >= 0x400)
6365 {
6366 (*_bfd_error_handler)
6367 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6368 input_bfd, input_section,
6369 (long) rel->r_offset, abs (signed_value), howto->name);
6370 return bfd_reloc_overflow;
6371 }
6372
6373 /* Mask out the value and U bit. */
6374 insn &= 0xff7fff00;
6375
6376 /* Set the U bit if the value to go in the place is non-negative. */
6377 if (signed_value >= 0)
6378 insn |= 1 << 23;
6379
6380 /* Encode the offset. */
6381 insn |= residual >> 2;
6382
6383 bfd_put_32 (input_bfd, insn, hit_data);
6384 }
6385 return bfd_reloc_ok;
6386
252b5132
RH		 6387 default:
6388 return bfd_reloc_notsupported;
6389 }
6390}
6391
98c1d4aa
NC		 6392/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
6393static void
57e8b36a
NC		 6394arm_add_to_rel (bfd * abfd,
6395 bfd_byte * address,
6396 reloc_howto_type * howto,
6397 bfd_signed_vma increment)
98c1d4aa 6398{
98c1d4aa
NC		 6399 bfd_signed_vma addend;
6400
bd97cb95
DJ		 6401 if (howto->type == R_ARM_THM_CALL
6402 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 6403 {
9a5aca8c
AM		 6404 int upper_insn, lower_insn;
6405 int upper, lower;
98c1d4aa 6406
9a5aca8c
AM		 6407 upper_insn = bfd_get_16 (abfd, address);
6408 lower_insn = bfd_get_16 (abfd, address + 2);
6409 upper = upper_insn & 0x7ff;
6410 lower = lower_insn & 0x7ff;
6411
6412 addend = (upper << 12) | (lower << 1);
ddda4409 6413 addend += increment;
9a5aca8c 6414 addend >>= 1;
98c1d4aa 6415
9a5aca8c
AM		 6416 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
6417 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
6418
dc810e39
AM		 6419 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
6420 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 6421 }
6422 else
6423 {
6424 bfd_vma contents;
6425
6426 contents = bfd_get_32 (abfd, address);
6427
6428 /* Get the (signed) value from the instruction. */
6429 addend = contents & howto->src_mask;
6430 if (addend & ((howto->src_mask + 1) >> 1))
6431 {
6432 bfd_signed_vma mask;
6433
6434 mask = -1;
6435 mask &= ~ howto->src_mask;
6436 addend |= mask;
6437 }
6438
6439 /* Add in the increment, (which is a byte value). */
6440 switch (howto->type)
6441 {
6442 default:
6443 addend += increment;
6444 break;
6445
6446 case R_ARM_PC24:
c6596c5e 6447 case R_ARM_PLT32:
5b5bb741
PB		 6448 case R_ARM_CALL:
6449 case R_ARM_JUMP24:
9a5aca8c 6450 addend <<= howto->size;
dc810e39 6451 addend += increment;
9a5aca8c
AM		 6452
6453 /* Should we check for overflow here ? */
6454
6455 /* Drop any undesired bits. */
6456 addend >>= howto->rightshift;
6457 break;
6458 }
6459
6460 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
6461
6462 bfd_put_32 (abfd, contents, address);
ddda4409 6463 }
98c1d4aa 6464}
252b5132 6465
ba93b8ac
DJ		 6466#define IS_ARM_TLS_RELOC(R_TYPE) \
6467 ((R_TYPE) == R_ARM_TLS_GD32 \
6468 || (R_TYPE) == R_ARM_TLS_LDO32 \
6469 || (R_TYPE) == R_ARM_TLS_LDM32 \
6470 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
6471 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
6472 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
6473 || (R_TYPE) == R_ARM_TLS_LE32 \
6474 || (R_TYPE) == R_ARM_TLS_IE32)
6475
252b5132 6476/* Relocate an ARM ELF section. */
b34976b6 6477static bfd_boolean
57e8b36a
NC		 6478elf32_arm_relocate_section (bfd * output_bfd,
6479 struct bfd_link_info * info,
6480 bfd * input_bfd,
6481 asection * input_section,
6482 bfd_byte * contents,
6483 Elf_Internal_Rela * relocs,
6484 Elf_Internal_Sym * local_syms,
6485 asection ** local_sections)
252b5132 6486{
b34976b6
AM		 6487 Elf_Internal_Shdr *symtab_hdr;
6488 struct elf_link_hash_entry **sym_hashes;
6489 Elf_Internal_Rela *rel;
6490 Elf_Internal_Rela *relend;
6491 const char *name;
b32d3aa2 6492 struct elf32_arm_link_hash_table * globals;
252b5132 6493
4e7fd91e 6494 globals = elf32_arm_hash_table (info);
b491616a 6495
0ffa91dd 6496 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6497 sym_hashes = elf_sym_hashes (input_bfd);
6498
6499 rel = relocs;
6500 relend = relocs + input_section->reloc_count;
6501 for (; rel < relend; rel++)
6502 {
ba96a88f
NC		 6503 int r_type;
6504 reloc_howto_type * howto;
6505 unsigned long r_symndx;
6506 Elf_Internal_Sym * sym;
6507 asection * sec;
252b5132 6508 struct elf_link_hash_entry * h;
ba96a88f
NC		 6509 bfd_vma relocation;
6510 bfd_reloc_status_type r;
6511 arelent bfd_reloc;
ba93b8ac 6512 char sym_type;
0945cdfd 6513 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 6514 char *error_message = NULL;
f21f3fe0 6515
252b5132 6516 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 6517 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 6518 r_type = arm_real_reloc_type (globals, r_type);
252b5132 6519
ba96a88f
NC		 6520 if ( r_type == R_ARM_GNU_VTENTRY
6521 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 6522 continue;
6523
b32d3aa2 6524 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 6525 howto = bfd_reloc.howto;
252b5132 6526
252b5132
RH		 6527 h = NULL;
6528 sym = NULL;
6529 sec = NULL;
9b485d32 6530
252b5132
RH		 6531 if (r_symndx < symtab_hdr->sh_info)
6532 {
6533 sym = local_syms + r_symndx;
ba93b8ac 6534 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 6535 sec = local_sections[r_symndx];
4e7fd91e 6536 if (globals->use_rel)
f8df10f4 6537 {
4e7fd91e
PB		 6538 relocation = (sec->output_section->vma
6539 + sec->output_offset
6540 + sym->st_value);
ab96bf03
AM		 6541 if (!info->relocatable
6542 && (sec->flags & SEC_MERGE)
6543 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 6544 {
4e7fd91e
PB		 6545 asection *msec;
6546 bfd_vma addend, value;
6547
6548 if (howto->rightshift)
6549 {
6550 (*_bfd_error_handler)
6551 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
6552 input_bfd, input_section,
6553 (long) rel->r_offset, howto->name);
6554 return FALSE;
6555 }
f8df10f4 6556
4e7fd91e 6557 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
f8df10f4 6558
4e7fd91e
PB		 6559 /* Get the (signed) value from the instruction. */
6560 addend = value & howto->src_mask;
6561 if (addend & ((howto->src_mask + 1) >> 1))
6562 {
6563 bfd_signed_vma mask;
f8df10f4 6564
4e7fd91e
PB		 6565 mask = -1;
6566 mask &= ~ howto->src_mask;
6567 addend |= mask;
6568 }
6569 msec = sec;
6570 addend =
6571 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
6572 - relocation;
6573 addend += msec->output_section->vma + msec->output_offset;
6574 value = (value & ~ howto->dst_mask) | (addend & howto->dst_mask);
6575 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
f8df10f4 6576 }
f8df10f4 6577 }
4e7fd91e
PB		 6578 else
6579 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 6580 }
6581 else
6582 {
560e09e9 6583 bfd_boolean warned;
560e09e9 6584
b2a8e766
AM		 6585 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
6586 r_symndx, symtab_hdr, sym_hashes,
6587 h, sec, relocation,
6588 unresolved_reloc, warned);
ba93b8ac
DJ		 6589
6590 sym_type = h->type;
252b5132
RH		 6591 }
6592
ab96bf03
AM		 6593 if (sec != NULL && elf_discarded_section (sec))
6594 {
6595 /* For relocs against symbols from removed linkonce sections,
6596 or sections discarded by a linker script, we just want the
6597 section contents zeroed. Avoid any special processing. */
6598 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
6599 rel->r_info = 0;
6600 rel->r_addend = 0;
6601 continue;
6602 }
6603
6604 if (info->relocatable)
6605 {
6606 /* This is a relocatable link. We don't have to change
6607 anything, unless the reloc is against a section symbol,
6608 in which case we have to adjust according to where the
6609 section symbol winds up in the output section. */
6610 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
6611 {
6612 if (globals->use_rel)
6613 arm_add_to_rel (input_bfd, contents + rel->r_offset,
6614 howto, (bfd_signed_vma) sec->output_offset);
6615 else
6616 rel->r_addend += sec->output_offset;
6617 }
6618 continue;
6619 }
6620
252b5132
RH		 6621 if (h != NULL)
6622 name = h->root.root.string;
6623 else
6624 {
6625 name = (bfd_elf_string_from_elf_section
6626 (input_bfd, symtab_hdr->sh_link, sym->st_name));
6627 if (name == NULL || *name == '\0')
6628 name = bfd_section_name (input_bfd, sec);
6629 }
f21f3fe0 6630
ba93b8ac
DJ		 6631 if (r_symndx != 0
6632 && r_type != R_ARM_NONE
6633 && (h == NULL
6634 || h->root.type == bfd_link_hash_defined
6635 || h->root.type == bfd_link_hash_defweak)
6636 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
6637 {
6638 (*_bfd_error_handler)
6639 ((sym_type == STT_TLS
6640 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
6641 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
6642 input_bfd,
6643 input_section,
6644 (long) rel->r_offset,
6645 howto->name,
6646 name);
6647 }
6648
252b5132
RH		 6649 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
6650 input_section, contents, rel,
6651 relocation, info, sec, name,
6652 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 6653 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 6654 &unresolved_reloc, &error_message);
0945cdfd
DJ		 6655
6656 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
6657 because such sections are not SEC_ALLOC and thus ld.so will
6658 not process them. */
6659 if (unresolved_reloc
6660 && !((input_section->flags & SEC_DEBUGGING) != 0
6661 && h->def_dynamic))
6662 {
6663 (*_bfd_error_handler)
843fe662
L		 6664 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
6665 input_bfd,
6666 input_section,
6667 (long) rel->r_offset,
6668 howto->name,
6669 h->root.root.string);
0945cdfd
DJ		 6670 return FALSE;
6671 }
252b5132
RH		 6672
6673 if (r != bfd_reloc_ok)
6674 {
252b5132
RH		 6675 switch (r)
6676 {
6677 case bfd_reloc_overflow:
cf919dfd
PB		 6678 /* If the overflowing reloc was to an undefined symbol,
6679 we have already printed one error message and there
6680 is no point complaining again. */
6681 if ((! h ||
6682 h->root.type != bfd_link_hash_undefined)
6683 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 6684 (info, (h ? &h->root : NULL), name, howto->name,
6685 (bfd_vma) 0, input_bfd, input_section,
6686 rel->r_offset))))
b34976b6 6687 return FALSE;
252b5132
RH		 6688 break;
6689
6690 case bfd_reloc_undefined:
6691 if (!((*info->callbacks->undefined_symbol)
6692 (info, name, input_bfd, input_section,
b34976b6
AM		 6693 rel->r_offset, TRUE)))
6694 return FALSE;
252b5132
RH		 6695 break;
6696
6697 case bfd_reloc_outofrange:
f2a9dd69 6698 error_message = _("out of range");
252b5132
RH		 6699 goto common_error;
6700
6701 case bfd_reloc_notsupported:
f2a9dd69 6702 error_message = _("unsupported relocation");
252b5132
RH		 6703 goto common_error;
6704
6705 case bfd_reloc_dangerous:
f2a9dd69 6706 /* error_message should already be set. */
252b5132
RH		 6707 goto common_error;
6708
6709 default:
f2a9dd69 6710 error_message = _("unknown error");
252b5132
RH		 6711 /* fall through */
6712
6713 common_error:
f2a9dd69
DJ		 6714 BFD_ASSERT (error_message != NULL);
6715 if (!((*info->callbacks->reloc_dangerous)
6716 (info, error_message, input_bfd, input_section,
252b5132 6717 rel->r_offset)))
b34976b6 6718 return FALSE;
252b5132
RH		 6719 break;
6720 }
6721 }
6722 }
6723
b34976b6 6724 return TRUE;
252b5132
RH		 6725}
6726
c178919b
NC		 6727/* Set the right machine number. */
6728
6729static bfd_boolean
57e8b36a 6730elf32_arm_object_p (bfd *abfd)
c178919b 6731{
5a6c6817 6732 unsigned int mach;
57e8b36a 6733
5a6c6817 6734 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 6735
5a6c6817
NC		 6736 if (mach != bfd_mach_arm_unknown)
6737 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
6738
6739 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
6740 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 6741
e16bb312 6742 else
5a6c6817 6743 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 6744
6745 return TRUE;
6746}
6747
fc830a83 6748/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 6749
b34976b6 6750static bfd_boolean
57e8b36a 6751elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 6752{
6753 if (elf_flags_init (abfd)
6754 && elf_elfheader (abfd)->e_flags != flags)
6755 {
fc830a83
NC		 6756 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
6757 {
fd2ec330 6758 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 6759 (*_bfd_error_handler)
6760 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
6761 abfd);
fc830a83 6762 else
d003868e
AM		 6763 _bfd_error_handler
6764 (_("Warning: Clearing the interworking flag of %B due to outside request"),
6765 abfd);
fc830a83 6766 }
252b5132
RH		 6767 }
6768 else
6769 {
6770 elf_elfheader (abfd)->e_flags = flags;
b34976b6 6771 elf_flags_init (abfd) = TRUE;
252b5132
RH		 6772 }
6773
b34976b6 6774 return TRUE;
252b5132
RH		 6775}
6776
fc830a83 6777/* Copy backend specific data from one object module to another. */
9b485d32 6778
b34976b6 6779static bfd_boolean
57e8b36a 6780elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 6781{
6782 flagword in_flags;
6783 flagword out_flags;
6784
0ffa91dd 6785 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 6786 return TRUE;
252b5132 6787
fc830a83 6788 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 6789 out_flags = elf_elfheader (obfd)->e_flags;
6790
fc830a83
NC		 6791 if (elf_flags_init (obfd)
6792 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
6793 && in_flags != out_flags)
252b5132 6794 {
252b5132 6795 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 6796 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 6797 return FALSE;
252b5132
RH		 6798
6799 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 6800 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 6801 return FALSE;
252b5132
RH		 6802
6803 /* If the src and dest have different interworking flags
6804 then turn off the interworking bit. */
fd2ec330 6805 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 6806 {
fd2ec330 6807 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 6808 _bfd_error_handler
6809 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
6810 obfd, ibfd);
252b5132 6811
fd2ec330 6812 in_flags &= ~EF_ARM_INTERWORK;
252b5132 6813 }
1006ba19
PB		 6814
6815 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 6816 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
6817 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 6818 }
6819
6820 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 6821 elf_flags_init (obfd) = TRUE;
252b5132 6822
94a3258f
PB		 6823 /* Also copy the EI_OSABI field. */
6824 elf_elfheader (obfd)->e_ident[EI_OSABI] =
6825 elf_elfheader (ibfd)->e_ident[EI_OSABI];
6826
104d59d1
JM		 6827 /* Copy object attributes. */
6828 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 6829
6830 return TRUE;
6831}
6832
6833/* Values for Tag_ABI_PCS_R9_use. */
6834enum
6835{
6836 AEABI_R9_V6,
6837 AEABI_R9_SB,
6838 AEABI_R9_TLS,
6839 AEABI_R9_unused
6840};
6841
6842/* Values for Tag_ABI_PCS_RW_data. */
6843enum
6844{
6845 AEABI_PCS_RW_data_absolute,
6846 AEABI_PCS_RW_data_PCrel,
6847 AEABI_PCS_RW_data_SBrel,
6848 AEABI_PCS_RW_data_unused
6849};
6850
6851/* Values for Tag_ABI_enum_size. */
6852enum
6853{
6854 AEABI_enum_unused,
6855 AEABI_enum_short,
6856 AEABI_enum_wide,
6857 AEABI_enum_forced_wide
6858};
6859
104d59d1
JM		 6860/* Determine whether an object attribute tag takes an integer, a
6861 string or both. */
6862static int
6863elf32_arm_obj_attrs_arg_type (int tag)
6864{
6865 if (tag == Tag_compatibility)
6866 return 3;
6867 else if (tag == 4 || tag == 5)
6868 return 2;
6869 else if (tag < 32)
6870 return 1;
6871 else
6872 return (tag & 1) != 0 ? 2 : 1;
6873}
6874
ee065d83
PB		 6875/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
6876 are conflicting attributes. */
6877static bfd_boolean
6878elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
6879{
104d59d1
JM		 6880 obj_attribute *in_attr;
6881 obj_attribute *out_attr;
6882 obj_attribute_list *in_list;
ee065d83
PB		 6883 /* Some tags have 0 = don't care, 1 = strong requirement,
6884 2 = weak requirement. */
6885 static const int order_312[3] = {3, 1, 2};
6886 int i;
6887
104d59d1 6888 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 6889 {
6890 /* This is the first object. Copy the attributes. */
104d59d1 6891 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 6892
6893 /* Use the Tag_null value to indicate the attributes have been
6894 initialized. */
104d59d1 6895 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 6896
ee065d83
PB		 6897 return TRUE;
6898 }
6899
104d59d1
JM		 6900 in_attr = elf_known_obj_attributes_proc (ibfd);
6901 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 6902 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
6903 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
6904 {
6905 /* Ignore mismatches if teh object doesn't use floating point. */
6906 if (out_attr[Tag_ABI_FP_number_model].i == 0)
6907 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
6908 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
6909 {
6910 _bfd_error_handler
6911 (_("ERROR: %B uses VFP register arguments, %B does not"),
6912 ibfd, obfd);
6913 return FALSE;
6914 }
6915 }
6916
104d59d1 6917 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 6918 {
6919 /* Merge this attribute with existing attributes. */
6920 switch (i)
6921 {
6922 case Tag_CPU_raw_name:
6923 case Tag_CPU_name:
004ae526
PB		 6924 /* Use whichever has the greatest architecture requirements. We
6925 won't necessarily have both the above tags, so make sure input
6926 name is non-NULL. */
6927 if (in_attr[Tag_CPU_arch].i > out_attr[Tag_CPU_arch].i
6928 && in_attr[i].s)
104d59d1 6929 out_attr[i].s = _bfd_elf_attr_strdup (obfd, in_attr[i].s);
ee065d83
PB		 6930 break;
6931
6932 case Tag_ABI_optimization_goals:
6933 case Tag_ABI_FP_optimization_goals:
6934 /* Use the first value seen. */
6935 break;
6936
6937 case Tag_CPU_arch:
6938 case Tag_ARM_ISA_use:
6939 case Tag_THUMB_ISA_use:
6940 case Tag_VFP_arch:
6941 case Tag_WMMX_arch:
6942 case Tag_NEON_arch:
6943 /* ??? Do NEON and WMMX conflict? */
6944 case Tag_ABI_FP_rounding:
6945 case Tag_ABI_FP_denormal:
6946 case Tag_ABI_FP_exceptions:
6947 case Tag_ABI_FP_user_exceptions:
6948 case Tag_ABI_FP_number_model:
6949 case Tag_ABI_align8_preserved:
6950 case Tag_ABI_HardFP_use:
6951 /* Use the largest value specified. */
6952 if (in_attr[i].i > out_attr[i].i)
6953 out_attr[i].i = in_attr[i].i;
6954 break;
6955
6956 case Tag_CPU_arch_profile:
6957 /* Warn if conflicting architecture profiles used. */
6958 if (out_attr[i].i && in_attr[i].i && in_attr[i].i != out_attr[i].i)
6959 {
6960 _bfd_error_handler
6961 (_("ERROR: %B: Conflicting architecture profiles %c/%c"),
6962 ibfd, in_attr[i].i, out_attr[i].i);
6963 return FALSE;
6964 }
6965 if (in_attr[i].i)
6966 out_attr[i].i = in_attr[i].i;
6967 break;
6968 case Tag_PCS_config:
6969 if (out_attr[i].i == 0)
6970 out_attr[i].i = in_attr[i].i;
6971 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
6972 {
6973 /* It's sometimes ok to mix different configs, so this is only
6974 a warning. */
6975 _bfd_error_handler
6976 (_("Warning: %B: Conflicting platform configuration"), ibfd);
6977 }
6978 break;
6979 case Tag_ABI_PCS_R9_use:
004ae526
PB		 6980 if (in_attr[i].i != out_attr[i].i
6981 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 6982 && in_attr[i].i != AEABI_R9_unused)
6983 {
6984 _bfd_error_handler
6985 (_("ERROR: %B: Conflicting use of R9"), ibfd);
6986 return FALSE;
6987 }
6988 if (out_attr[i].i == AEABI_R9_unused)
6989 out_attr[i].i = in_attr[i].i;
6990 break;
6991 case Tag_ABI_PCS_RW_data:
6992 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
6993 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
6994 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
6995 {
6996 _bfd_error_handler
6997 (_("ERROR: %B: SB relative addressing conflicts with use of R9"),
6998 ibfd);
6999 return FALSE;
7000 }
7001 /* Use the smallest value specified. */
7002 if (in_attr[i].i < out_attr[i].i)
7003 out_attr[i].i = in_attr[i].i;
7004 break;
7005 case Tag_ABI_PCS_RO_data:
7006 /* Use the smallest value specified. */
7007 if (in_attr[i].i < out_attr[i].i)
7008 out_attr[i].i = in_attr[i].i;
7009 break;
7010 case Tag_ABI_PCS_GOT_use:
7011 if (in_attr[i].i > 2 || out_attr[i].i > 2
7012 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
7013 out_attr[i].i = in_attr[i].i;
7014 break;
7015 case Tag_ABI_PCS_wchar_t:
7016 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i)
7017 {
7018 _bfd_error_handler
7019 (_("ERROR: %B: Conflicting definitions of wchar_t"), ibfd);
7020 return FALSE;
7021 }
7022 if (in_attr[i].i)
7023 out_attr[i].i = in_attr[i].i;
7024 break;
7025 case Tag_ABI_align8_needed:
7026 /* ??? Check against Tag_ABI_align8_preserved. */
7027 if (in_attr[i].i > 2 || out_attr[i].i > 2
7028 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
7029 out_attr[i].i = in_attr[i].i;
7030 break;
7031 case Tag_ABI_enum_size:
7032 if (in_attr[i].i != AEABI_enum_unused)
7033 {
7034 if (out_attr[i].i == AEABI_enum_unused
7035 || out_attr[i].i == AEABI_enum_forced_wide)
7036 {
7037 /* The existing object is compatible with anything.
7038 Use whatever requirements the new object has. */
7039 out_attr[i].i = in_attr[i].i;
7040 }
7041 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 7042 && out_attr[i].i != in_attr[i].i
0ffa91dd 7043 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 7044 {
bf21ed78
MS		 7045 const char *aeabi_enum_names[] =
7046 { "", "variable-size", "32-bit", "" };
ee065d83 7047 _bfd_error_handler
bf21ed78
MS		 7048 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
7049 ibfd, aeabi_enum_names[in_attr[i].i],
7050 aeabi_enum_names[out_attr[i].i]);
ee065d83
PB		 7051 }
7052 }
7053 break;
7054 case Tag_ABI_VFP_args:
7055 /* Aready done. */
7056 break;
7057 case Tag_ABI_WMMX_args:
7058 if (in_attr[i].i != out_attr[i].i)
7059 {
7060 _bfd_error_handler
7061 (_("ERROR: %B uses iWMMXt register arguments, %B does not"),
7062 ibfd, obfd);
7063 return FALSE;
7064 }
7065 break;
7066 default: /* All known attributes should be explicitly covered. */
7067 abort ();
7068 }
3cfad14c
JM		 7069
7070 if (in_attr[i].type && !out_attr[i].type)
7071 switch (in_attr[i].type)
7072 {
7073 case 1:
7074 if (out_attr[i].i)
7075 out_attr[i].type = 1;
7076 break;
7077
7078 case 2:
7079 if (out_attr[i].s)
7080 out_attr[i].type = 2;
7081 break;
7082
7083 default:
7084 abort ();
7085 }
ee065d83
PB		 7086 }
7087
104d59d1
JM		 7088 /* Merge Tag_compatibility attributes and any common GNU ones. */
7089 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 7090
104d59d1
JM		 7091 /* Check for any attributes not known on ARM. */
7092 in_list = elf_other_obj_attributes_proc (ibfd);
7093 while (in_list && in_list->tag == Tag_compatibility)
7094 in_list = in_list->next;
ee065d83
PB		 7095
7096 for (; in_list; in_list = in_list->next)
7097 {
7098 if ((in_list->tag & 128) < 64)
eb111b1f
BE		 7099 {
7100 _bfd_error_handler
7101 (_("Warning: %B: Unknown EABI object attribute %d"),
7102 ibfd, in_list->tag);
7103 break;
7104 }
ee065d83 7105 }
b34976b6 7106 return TRUE;
252b5132
RH		 7107}
7108
3a4a14e9
PB		 7109
7110/* Return TRUE if the two EABI versions are incompatible. */
7111
7112static bfd_boolean
7113elf32_arm_versions_compatible (unsigned iver, unsigned over)
7114{
7115 /* v4 and v5 are the same spec before and after it was released,
7116 so allow mixing them. */
7117 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
7118 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
7119 return TRUE;
7120
7121 return (iver == over);
7122}
7123
252b5132
RH		 7124/* Merge backend specific data from an object file to the output
7125 object file when linking. */
9b485d32 7126
b34976b6 7127static bfd_boolean
57e8b36a 7128elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 7129{
7130 flagword out_flags;
7131 flagword in_flags;
b34976b6 7132 bfd_boolean flags_compatible = TRUE;
cf919dfd 7133 asection *sec;
252b5132 7134
9b485d32 7135 /* Check if we have the same endianess. */
82e51918 7136 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 7137 return FALSE;
1fe494a5 7138
0ffa91dd 7139 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 7140 return TRUE;
252b5132 7141
ee065d83
PB		 7142 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
7143 return FALSE;
7144
252b5132
RH		 7145 /* The input BFD must have had its flags initialised. */
7146 /* The following seems bogus to me -- The flags are initialized in
7147 the assembler but I don't think an elf_flags_init field is
9b485d32 7148 written into the object. */
252b5132
RH		 7149 /* BFD_ASSERT (elf_flags_init (ibfd)); */
7150
7151 in_flags = elf_elfheader (ibfd)->e_flags;
7152 out_flags = elf_elfheader (obfd)->e_flags;
7153
7154 if (!elf_flags_init (obfd))
7155 {
fe077fa6
NC		 7156 /* If the input is the default architecture and had the default
7157 flags then do not bother setting the flags for the output
7158 architecture, instead allow future merges to do this. If no
7159 future merges ever set these flags then they will retain their
7160 uninitialised values, which surprise surprise, correspond
252b5132 7161 to the default values. */
fe077fa6
NC		 7162 if (bfd_get_arch_info (ibfd)->the_default
7163 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 7164 return TRUE;
252b5132 7165
b34976b6 7166 elf_flags_init (obfd) = TRUE;
252b5132
RH		 7167 elf_elfheader (obfd)->e_flags = in_flags;
7168
7169 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
7170 && bfd_get_arch_info (obfd)->the_default)
7171 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
7172
b34976b6 7173 return TRUE;
252b5132
RH		 7174 }
7175
5a6c6817
NC		 7176 /* Determine what should happen if the input ARM architecture
7177 does not match the output ARM architecture. */
7178 if (! bfd_arm_merge_machines (ibfd, obfd))
7179 return FALSE;
e16bb312 7180
1006ba19 7181 /* Identical flags must be compatible. */
252b5132 7182 if (in_flags == out_flags)
b34976b6 7183 return TRUE;
252b5132 7184
35a0f415
DJ		 7185 /* Check to see if the input BFD actually contains any sections. If
7186 not, its flags may not have been initialised either, but it
8e3de13a 7187 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 7188 dynamic objects; their section list may be emptied by
d1f161ea 7189 elf_link_add_object_symbols.
35a0f415 7190
d1f161ea
NC		 7191 Also check to see if there are no code sections in the input.
7192 In this case there is no need to check for code specific flags.
7193 XXX - do we need to worry about floating-point format compatability
7194 in data sections ? */
35a0f415 7195 if (!(ibfd->flags & DYNAMIC))
cf919dfd 7196 {
35a0f415 7197 bfd_boolean null_input_bfd = TRUE;
d1f161ea 7198 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 7199
7200 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 7201 {
35a0f415
DJ		 7202 /* Ignore synthetic glue sections. */
7203 if (strcmp (sec->name, ".glue_7")
7204 && strcmp (sec->name, ".glue_7t"))
7205 {
d1f161ea
NC		 7206 if ((bfd_get_section_flags (ibfd, sec)
7207 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7208 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7209 only_data_sections = FALSE;
7210
35a0f415
DJ		 7211 null_input_bfd = FALSE;
7212 break;
7213 }
cf919dfd 7214 }
d1f161ea
NC		 7215
7216 if (null_input_bfd || only_data_sections)
35a0f415 7217 return TRUE;
cf919dfd 7218 }
cf919dfd 7219
252b5132 7220 /* Complain about various flag mismatches. */
3a4a14e9
PB		 7221 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
7222 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 7223 {
d003868e 7224 _bfd_error_handler
3656d5e3 7225 (_("ERROR: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 7226 ibfd, obfd,
7227 (in_flags & EF_ARM_EABIMASK) >> 24,
7228 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 7229 return FALSE;
fc830a83 7230 }
252b5132 7231
1006ba19 7232 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 7233 /* VxWorks libraries do not use these flags. */
7234 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
7235 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
7236 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 7237 {
fd2ec330 7238 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 7239 {
d003868e
AM		 7240 _bfd_error_handler
7241 (_("ERROR: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
7242 ibfd, obfd,
7243 in_flags & EF_ARM_APCS_26 ? 26 : 32,
7244 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 7245 flags_compatible = FALSE;
1006ba19 7246 }
252b5132 7247
fd2ec330 7248 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 7249 {
5eefb65f 7250 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e
AM		 7251 _bfd_error_handler
7252 (_("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers"),
7253 ibfd, obfd);
5eefb65f 7254 else
d003868e
AM		 7255 _bfd_error_handler
7256 (_("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers"),
7257 ibfd, obfd);
63b0f745 7258
b34976b6 7259 flags_compatible = FALSE;
1006ba19 7260 }
252b5132 7261
96a846ea 7262 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 7263 {
96a846ea 7264 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e
AM		 7265 _bfd_error_handler
7266 (_("ERROR: %B uses VFP instructions, whereas %B does not"),
7267 ibfd, obfd);
5eefb65f 7268 else
d003868e
AM		 7269 _bfd_error_handler
7270 (_("ERROR: %B uses FPA instructions, whereas %B does not"),
7271 ibfd, obfd);
fde78edd
NC		 7272
7273 flags_compatible = FALSE;
7274 }
7275
7276 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
7277 {
7278 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e
AM		 7279 _bfd_error_handler
7280 (_("ERROR: %B uses Maverick instructions, whereas %B does not"),
7281 ibfd, obfd);
fde78edd 7282 else
d003868e
AM		 7283 _bfd_error_handler
7284 (_("ERROR: %B does not use Maverick instructions, whereas %B does"),
7285 ibfd, obfd);
63b0f745 7286
b34976b6 7287 flags_compatible = FALSE;
1006ba19 7288 }
96a846ea
RE		 7289
7290#ifdef EF_ARM_SOFT_FLOAT
7291 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
7292 {
7293 /* We can allow interworking between code that is VFP format
7294 layout, and uses either soft float or integer regs for
7295 passing floating point arguments and results. We already
7296 know that the APCS_FLOAT flags match; similarly for VFP
7297 flags. */
7298 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
7299 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
7300 {
7301 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e
AM		 7302 _bfd_error_handler
7303 (_("ERROR: %B uses software FP, whereas %B uses hardware FP"),
7304 ibfd, obfd);
96a846ea 7305 else
d003868e
AM		 7306 _bfd_error_handler
7307 (_("ERROR: %B uses hardware FP, whereas %B uses software FP"),
7308 ibfd, obfd);
96a846ea 7309
b34976b6 7310 flags_compatible = FALSE;
96a846ea
RE		 7311 }
7312 }
ee43f35e 7313#endif
252b5132 7314
1006ba19 7315 /* Interworking mismatch is only a warning. */
fd2ec330 7316 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 7317 {
e3c8793a
NC		 7318 if (in_flags & EF_ARM_INTERWORK)
7319 {
d003868e
AM		 7320 _bfd_error_handler
7321 (_("Warning: %B supports interworking, whereas %B does not"),
7322 ibfd, obfd);
e3c8793a
NC		 7323 }
7324 else
7325 {
d003868e
AM		 7326 _bfd_error_handler
7327 (_("Warning: %B does not support interworking, whereas %B does"),
7328 ibfd, obfd);
e3c8793a 7329 }
8f615d07 7330 }
252b5132 7331 }
63b0f745 7332
1006ba19 7333 return flags_compatible;
252b5132
RH		 7334}
7335
9b485d32
NC		 7336/* Display the flags field. */
7337
b34976b6 7338static bfd_boolean
57e8b36a 7339elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 7340{
fc830a83
NC		 7341 FILE * file = (FILE *) ptr;
7342 unsigned long flags;
252b5132
RH		 7343
7344 BFD_ASSERT (abfd != NULL && ptr != NULL);
7345
7346 /* Print normal ELF private data. */
7347 _bfd_elf_print_private_bfd_data (abfd, ptr);
7348
fc830a83 7349 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 7350 /* Ignore init flag - it may not be set, despite the flags field
7351 containing valid data. */
252b5132
RH		 7352
7353 /* xgettext:c-format */
9b485d32 7354 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 7355
fc830a83
NC		 7356 switch (EF_ARM_EABI_VERSION (flags))
7357 {
7358 case EF_ARM_EABI_UNKNOWN:
4cc11e76 7359 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 7360 official ARM ELF extended ABI. Hence they are only decoded if
7361 the EABI version is not set. */
fd2ec330 7362 if (flags & EF_ARM_INTERWORK)
9b485d32 7363 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 7364
fd2ec330 7365 if (flags & EF_ARM_APCS_26)
6c571f00 7366 fprintf (file, " [APCS-26]");
fc830a83 7367 else
6c571f00 7368 fprintf (file, " [APCS-32]");
9a5aca8c 7369
96a846ea
RE		 7370 if (flags & EF_ARM_VFP_FLOAT)
7371 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 7372 else if (flags & EF_ARM_MAVERICK_FLOAT)
7373 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 7374 else
7375 fprintf (file, _(" [FPA float format]"));
7376
fd2ec330 7377 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 7378 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 7379
fd2ec330 7380 if (flags & EF_ARM_PIC)
9b485d32 7381 fprintf (file, _(" [position independent]"));
fc830a83 7382
fd2ec330 7383 if (flags & EF_ARM_NEW_ABI)
9b485d32 7384 fprintf (file, _(" [new ABI]"));
9a5aca8c 7385
fd2ec330 7386 if (flags & EF_ARM_OLD_ABI)
9b485d32 7387 fprintf (file, _(" [old ABI]"));
9a5aca8c 7388
fd2ec330 7389 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 7390 fprintf (file, _(" [software FP]"));
9a5aca8c 7391
96a846ea
RE		 7392 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
7393 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 7394 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
7395 | EF_ARM_MAVERICK_FLOAT);
fc830a83 7396 break;
9a5aca8c 7397
fc830a83 7398 case EF_ARM_EABI_VER1:
9b485d32 7399 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 7400
fc830a83 7401 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 7402 fprintf (file, _(" [sorted symbol table]"));
fc830a83 7403 else
9b485d32 7404 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 7405
fc830a83
NC		 7406 flags &= ~ EF_ARM_SYMSARESORTED;
7407 break;
9a5aca8c 7408
fd2ec330
PB		 7409 case EF_ARM_EABI_VER2:
7410 fprintf (file, _(" [Version2 EABI]"));
7411
7412 if (flags & EF_ARM_SYMSARESORTED)
7413 fprintf (file, _(" [sorted symbol table]"));
7414 else
7415 fprintf (file, _(" [unsorted symbol table]"));
7416
7417 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
7418 fprintf (file, _(" [dynamic symbols use segment index]"));
7419
7420 if (flags & EF_ARM_MAPSYMSFIRST)
7421 fprintf (file, _(" [mapping symbols precede others]"));
7422
99e4ae17 7423 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 7424 | EF_ARM_MAPSYMSFIRST);
7425 break;
7426
d507cf36
PB		 7427 case EF_ARM_EABI_VER3:
7428 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 7429 break;
7430
7431 case EF_ARM_EABI_VER4:
7432 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 7433 goto eabi;
d507cf36 7434
3a4a14e9
PB		 7435 case EF_ARM_EABI_VER5:
7436 fprintf (file, _(" [Version5 EABI]"));
7437 eabi:
d507cf36
PB		 7438 if (flags & EF_ARM_BE8)
7439 fprintf (file, _(" [BE8]"));
7440
7441 if (flags & EF_ARM_LE8)
7442 fprintf (file, _(" [LE8]"));
7443
7444 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
7445 break;
7446
fc830a83 7447 default:
9b485d32 7448 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 7449 break;
7450 }
252b5132 7451
fc830a83 7452 flags &= ~ EF_ARM_EABIMASK;
252b5132 7453
fc830a83 7454 if (flags & EF_ARM_RELEXEC)
9b485d32 7455 fprintf (file, _(" [relocatable executable]"));
252b5132 7456
fc830a83 7457 if (flags & EF_ARM_HASENTRY)
9b485d32 7458 fprintf (file, _(" [has entry point]"));
252b5132 7459
fc830a83
NC		 7460 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
7461
7462 if (flags)
9b485d32 7463 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 7464
252b5132
RH		 7465 fputc ('\n', file);
7466
b34976b6 7467 return TRUE;
252b5132
RH		 7468}
7469
7470static int
57e8b36a 7471elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 7472{
2f0ca46a
NC		 7473 switch (ELF_ST_TYPE (elf_sym->st_info))
7474 {
7475 case STT_ARM_TFUNC:
7476 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 7477
2f0ca46a
NC		 7478 case STT_ARM_16BIT:
7479 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
7480 This allows us to distinguish between data used by Thumb instructions
7481 and non-data (which is probably code) inside Thumb regions of an
7482 executable. */
1a0eb693 7483 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 7484 return ELF_ST_TYPE (elf_sym->st_info);
7485 break;
9a5aca8c 7486
ce855c42
NC		 7487 default:
7488 break;
2f0ca46a
NC		 7489 }
7490
7491 return type;
252b5132 7492}
f21f3fe0 7493
252b5132 7494static asection *
07adf181
AM		 7495elf32_arm_gc_mark_hook (asection *sec,
7496 struct bfd_link_info *info,
7497 Elf_Internal_Rela *rel,
7498 struct elf_link_hash_entry *h,
7499 Elf_Internal_Sym *sym)
252b5132
RH		 7500{
7501 if (h != NULL)
07adf181 7502 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 7503 {
7504 case R_ARM_GNU_VTINHERIT:
7505 case R_ARM_GNU_VTENTRY:
07adf181
AM		 7506 return NULL;
7507 }
9ad5cbcf 7508
07adf181 7509 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 7510}
7511
780a67af
NC		 7512/* Update the got entry reference counts for the section being removed. */
7513
b34976b6 7514static bfd_boolean
ba93b8ac
DJ		 7515elf32_arm_gc_sweep_hook (bfd * abfd,
7516 struct bfd_link_info * info,
7517 asection * sec,
7518 const Elf_Internal_Rela * relocs)
252b5132 7519{
5e681ec4
PB		 7520 Elf_Internal_Shdr *symtab_hdr;
7521 struct elf_link_hash_entry **sym_hashes;
7522 bfd_signed_vma *local_got_refcounts;
7523 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 7524 struct elf32_arm_link_hash_table * globals;
7525
7dda2462
TG		 7526 if (info->relocatable)
7527 return TRUE;
7528
eb043451 7529 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 7530
7531 elf_section_data (sec)->local_dynrel = NULL;
7532
0ffa91dd 7533 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 7534 sym_hashes = elf_sym_hashes (abfd);
7535 local_got_refcounts = elf_local_got_refcounts (abfd);
7536
bd97cb95
DJ		 7537 check_use_blx(globals);
7538
5e681ec4
PB		 7539 relend = relocs + sec->reloc_count;
7540 for (rel = relocs; rel < relend; rel++)
eb043451 7541 {
3eb128b2
AM		 7542 unsigned long r_symndx;
7543 struct elf_link_hash_entry *h = NULL;
eb043451 7544 int r_type;
5e681ec4 7545
3eb128b2
AM		 7546 r_symndx = ELF32_R_SYM (rel->r_info);
7547 if (r_symndx >= symtab_hdr->sh_info)
7548 {
7549 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7550 while (h->root.type == bfd_link_hash_indirect
7551 || h->root.type == bfd_link_hash_warning)
7552 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7553 }
7554
eb043451 7555 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7556 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 7557 switch (r_type)
7558 {
7559 case R_ARM_GOT32:
eb043451 7560 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 7561 case R_ARM_TLS_GD32:
7562 case R_ARM_TLS_IE32:
3eb128b2 7563 if (h != NULL)
eb043451 7564 {
eb043451
PB		 7565 if (h->got.refcount > 0)
7566 h->got.refcount -= 1;
7567 }
7568 else if (local_got_refcounts != NULL)
7569 {
7570 if (local_got_refcounts[r_symndx] > 0)
7571 local_got_refcounts[r_symndx] -= 1;
7572 }
7573 break;
7574
ba93b8ac
DJ		 7575 case R_ARM_TLS_LDM32:
7576 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
7577 break;
7578
eb043451 7579 case R_ARM_ABS32:
bb224fc3 7580 case R_ARM_ABS32_NOI:
eb043451 7581 case R_ARM_REL32:
bb224fc3 7582 case R_ARM_REL32_NOI:
eb043451
PB		 7583 case R_ARM_PC24:
7584 case R_ARM_PLT32:
5b5bb741
PB		 7585 case R_ARM_CALL:
7586 case R_ARM_JUMP24:
eb043451 7587 case R_ARM_PREL31:
c19d1205 7588 case R_ARM_THM_CALL:
bd97cb95
DJ		 7589 case R_ARM_THM_JUMP24:
7590 case R_ARM_THM_JUMP19:
b6895b4f
PB		 7591 case R_ARM_MOVW_ABS_NC:
7592 case R_ARM_MOVT_ABS:
7593 case R_ARM_MOVW_PREL_NC:
7594 case R_ARM_MOVT_PREL:
7595 case R_ARM_THM_MOVW_ABS_NC:
7596 case R_ARM_THM_MOVT_ABS:
7597 case R_ARM_THM_MOVW_PREL_NC:
7598 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 7599 /* Should the interworking branches be here also? */
7600
3eb128b2 7601 if (h != NULL)
eb043451
PB		 7602 {
7603 struct elf32_arm_link_hash_entry *eh;
7604 struct elf32_arm_relocs_copied **pp;
7605 struct elf32_arm_relocs_copied *p;
5e681ec4 7606
b7693d02 7607 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 7608
eb043451 7609 if (h->plt.refcount > 0)
b7693d02
DJ		 7610 {
7611 h->plt.refcount -= 1;
bd97cb95
DJ		 7612 if (r_type == R_ARM_THM_CALL)
7613 eh->plt_maybe_thumb_refcount--;
7614
7615 if (r_type == R_ARM_THM_JUMP24
7616 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 7617 eh->plt_thumb_refcount--;
7618 }
5e681ec4 7619
eb043451 7620 if (r_type == R_ARM_ABS32
bb224fc3
MS		 7621 || r_type == R_ARM_REL32
7622 || r_type == R_ARM_ABS32_NOI
7623 || r_type == R_ARM_REL32_NOI)
eb043451 7624 {
eb043451
PB		 7625 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
7626 pp = &p->next)
7627 if (p->section == sec)
7628 {
7629 p->count -= 1;
bb224fc3
MS		 7630 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
7631 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 7632 p->pc_count -= 1;
eb043451
PB		 7633 if (p->count == 0)
7634 *pp = p->next;
7635 break;
7636 }
7637 }
7638 }
7639 break;
5e681ec4 7640
eb043451
PB		 7641 default:
7642 break;
7643 }
7644 }
5e681ec4 7645
b34976b6 7646 return TRUE;
252b5132
RH		 7647}
7648
780a67af
NC		 7649/* Look through the relocs for a section during the first phase. */
7650
b34976b6 7651static bfd_boolean
57e8b36a
NC		 7652elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
7653 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 7654{
b34976b6
AM		 7655 Elf_Internal_Shdr *symtab_hdr;
7656 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 7657 const Elf_Internal_Rela *rel;
7658 const Elf_Internal_Rela *rel_end;
7659 bfd *dynobj;
5e681ec4 7660 asection *sreloc;
b34976b6 7661 bfd_vma *local_got_offsets;
5e681ec4 7662 struct elf32_arm_link_hash_table *htab;
9a5aca8c 7663
1049f94e 7664 if (info->relocatable)
b34976b6 7665 return TRUE;
9a5aca8c 7666
0ffa91dd
NC		 7667 BFD_ASSERT (is_arm_elf (abfd));
7668
5e681ec4
PB		 7669 htab = elf32_arm_hash_table (info);
7670 sreloc = NULL;
9a5aca8c 7671
67687978
PB		 7672 /* Create dynamic sections for relocatable executables so that we can
7673 copy relocations. */
7674 if (htab->root.is_relocatable_executable
7675 && ! htab->root.dynamic_sections_created)
7676 {
7677 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
7678 return FALSE;
7679 }
7680
252b5132
RH		 7681 dynobj = elf_hash_table (info)->dynobj;
7682 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 7683
0ffa91dd 7684 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 7685 sym_hashes = elf_sym_hashes (abfd);
9b485d32 7686
252b5132
RH		 7687 rel_end = relocs + sec->reloc_count;
7688 for (rel = relocs; rel < rel_end; rel++)
7689 {
7690 struct elf_link_hash_entry *h;
b7693d02 7691 struct elf32_arm_link_hash_entry *eh;
252b5132 7692 unsigned long r_symndx;
eb043451 7693 int r_type;
9a5aca8c 7694
252b5132 7695 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 7696 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7697 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac
DJ		 7698
7699 if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
7700 {
7701 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
7702 r_symndx);
7703 return FALSE;
7704 }
7705
252b5132
RH		 7706 if (r_symndx < symtab_hdr->sh_info)
7707 h = NULL;
7708 else
973a3492
L		 7709 {
7710 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7711 while (h->root.type == bfd_link_hash_indirect
7712 || h->root.type == bfd_link_hash_warning)
7713 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7714 }
9a5aca8c 7715
b7693d02
DJ		 7716 eh = (struct elf32_arm_link_hash_entry *) h;
7717
eb043451 7718 switch (r_type)
252b5132 7719 {
5e681ec4 7720 case R_ARM_GOT32:
eb043451 7721 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 7722 case R_ARM_TLS_GD32:
7723 case R_ARM_TLS_IE32:
5e681ec4 7724 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 7725 {
7726 int tls_type, old_tls_type;
5e681ec4 7727
ba93b8ac
DJ		 7728 switch (r_type)
7729 {
7730 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
7731 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
7732 default: tls_type = GOT_NORMAL; break;
7733 }
252b5132 7734
ba93b8ac
DJ		 7735 if (h != NULL)
7736 {
7737 h->got.refcount++;
7738 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
7739 }
7740 else
7741 {
7742 bfd_signed_vma *local_got_refcounts;
7743
7744 /* This is a global offset table entry for a local symbol. */
7745 local_got_refcounts = elf_local_got_refcounts (abfd);
7746 if (local_got_refcounts == NULL)
7747 {
7748 bfd_size_type size;
7749
7750 size = symtab_hdr->sh_info;
7751 size *= (sizeof (bfd_signed_vma) + sizeof(char));
7752 local_got_refcounts = bfd_zalloc (abfd, size);
7753 if (local_got_refcounts == NULL)
7754 return FALSE;
7755 elf_local_got_refcounts (abfd) = local_got_refcounts;
7756 elf32_arm_local_got_tls_type (abfd)
7757 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
7758 }
7759 local_got_refcounts[r_symndx] += 1;
7760 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
7761 }
7762
7763 /* We will already have issued an error message if there is a
7764 TLS / non-TLS mismatch, based on the symbol type. We don't
7765 support any linker relaxations. So just combine any TLS
7766 types needed. */
7767 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
7768 && tls_type != GOT_NORMAL)
7769 tls_type |= old_tls_type;
7770
7771 if (old_tls_type != tls_type)
7772 {
7773 if (h != NULL)
7774 elf32_arm_hash_entry (h)->tls_type = tls_type;
7775 else
7776 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
7777 }
7778 }
7779 /* Fall through */
7780
7781 case R_ARM_TLS_LDM32:
7782 if (r_type == R_ARM_TLS_LDM32)
7783 htab->tls_ldm_got.refcount++;
7784 /* Fall through */
252b5132 7785
c19d1205 7786 case R_ARM_GOTOFF32:
5e681ec4
PB		 7787 case R_ARM_GOTPC:
7788 if (htab->sgot == NULL)
7789 {
7790 if (htab->root.dynobj == NULL)
7791 htab->root.dynobj = abfd;
7792 if (!create_got_section (htab->root.dynobj, info))
7793 return FALSE;
7794 }
252b5132
RH		 7795 break;
7796
00a97672
RS		 7797 case R_ARM_ABS12:
7798 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
7799 ldr __GOTT_INDEX__ offsets. */
7800 if (!htab->vxworks_p)
7801 break;
7802 /* Fall through */
7803
252b5132 7804 case R_ARM_ABS32:
bb224fc3 7805 case R_ARM_ABS32_NOI:
252b5132 7806 case R_ARM_REL32:
bb224fc3 7807 case R_ARM_REL32_NOI:
252b5132 7808 case R_ARM_PC24:
7359ea65 7809 case R_ARM_PLT32:
5b5bb741
PB		 7810 case R_ARM_CALL:
7811 case R_ARM_JUMP24:
eb043451 7812 case R_ARM_PREL31:
c19d1205 7813 case R_ARM_THM_CALL:
bd97cb95
DJ		 7814 case R_ARM_THM_JUMP24:
7815 case R_ARM_THM_JUMP19:
b6895b4f
PB		 7816 case R_ARM_MOVW_ABS_NC:
7817 case R_ARM_MOVT_ABS:
7818 case R_ARM_MOVW_PREL_NC:
7819 case R_ARM_MOVT_PREL:
7820 case R_ARM_THM_MOVW_ABS_NC:
7821 case R_ARM_THM_MOVT_ABS:
7822 case R_ARM_THM_MOVW_PREL_NC:
7823 case R_ARM_THM_MOVT_PREL:
b7693d02 7824 /* Should the interworking branches be listed here? */
7359ea65 7825 if (h != NULL)
5e681ec4
PB		 7826 {
7827 /* If this reloc is in a read-only section, we might
7828 need a copy reloc. We can't check reliably at this
7829 stage whether the section is read-only, as input
7830 sections have not yet been mapped to output sections.
7831 Tentatively set the flag for now, and correct in
7832 adjust_dynamic_symbol. */
7359ea65 7833 if (!info->shared)
f5385ebf 7834 h->non_got_ref = 1;
7359ea65 7835
5e681ec4 7836 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 7837 refers to is in a different object. We can't tell for
7838 sure yet, because something later might force the
7839 symbol local. */
bb224fc3
MS		 7840 if (r_type != R_ARM_ABS32
7841 && r_type != R_ARM_REL32
7842 && r_type != R_ARM_ABS32_NOI
d3753b85
RS		 7843 && r_type != R_ARM_REL32_NOI
7844 && r_type != R_ARM_ABS12)
f5385ebf 7845 h->needs_plt = 1;
4f199be3
DJ		 7846
7847 /* If we create a PLT entry, this relocation will reference
7848 it, even if it's an ABS32 relocation. */
7849 h->plt.refcount += 1;
b7693d02 7850
bd97cb95
DJ		 7851 /* It's too early to use htab->use_blx here, so we have to
7852 record possible blx references separately from
7853 relocs that definitely need a thumb stub. */
7854
c19d1205 7855 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 7856 eh->plt_maybe_thumb_refcount += 1;
7857
7858 if (r_type == R_ARM_THM_JUMP24
7859 || r_type == R_ARM_THM_JUMP19)
b7693d02 7860 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 7861 }
7862
67687978
PB		 7863 /* If we are creating a shared library or relocatable executable,
7864 and this is a reloc against a global symbol, or a non PC
7865 relative reloc against a local symbol, then we need to copy
7866 the reloc into the shared library. However, if we are linking
7867 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 7868 global symbol which is defined in an object we are
7869 including in the link (i.e., DEF_REGULAR is set). At
7870 this point we have not seen all the input files, so it is
7871 possible that DEF_REGULAR is not set now but will be set
7872 later (it is never cleared). We account for that
7873 possibility below by storing information in the
5e681ec4 7874 relocs_copied field of the hash table entry. */
67687978 7875 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 7876 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 7877 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 7878 || (h != NULL && ! h->needs_plt
7879 && (! info->symbolic || ! h->def_regular))))
252b5132 7880 {
5e681ec4
PB		 7881 struct elf32_arm_relocs_copied *p, **head;
7882
252b5132
RH		 7883 /* When creating a shared object, we must copy these
7884 reloc types into the output file. We create a reloc
7885 section in dynobj and make room for this reloc. */
7886 if (sreloc == NULL)
7887 {
7888 const char * name;
7889
7890 name = (bfd_elf_string_from_elf_section
7891 (abfd,
7892 elf_elfheader (abfd)->e_shstrndx,
7893 elf_section_data (sec)->rel_hdr.sh_name));
7894 if (name == NULL)
b34976b6 7895 return FALSE;
252b5132 7896
00a97672 7897 BFD_ASSERT (reloc_section_p (htab, name, sec));
252b5132
RH		 7898
7899 sreloc = bfd_get_section_by_name (dynobj, name);
7900 if (sreloc == NULL)
7901 {
7902 flagword flags;
7903
252b5132
RH		 7904 flags = (SEC_HAS_CONTENTS | SEC_READONLY
7905 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
e5a52504
MM		 7906 if ((sec->flags & SEC_ALLOC) != 0
7907 /* BPABI objects never have dynamic
7908 relocations mapped. */
7909 && !htab->symbian_p)
252b5132 7910 flags |= SEC_ALLOC | SEC_LOAD;
3496cb2a
L		 7911 sreloc = bfd_make_section_with_flags (dynobj,
7912 name,
7913 flags);
252b5132 7914 if (sreloc == NULL
252b5132 7915 || ! bfd_set_section_alignment (dynobj, sreloc, 2))
b34976b6 7916 return FALSE;
252b5132 7917 }
5e681ec4
PB		 7918
7919 elf_section_data (sec)->sreloc = sreloc;
252b5132
RH		 7920 }
7921
5e681ec4
PB		 7922 /* If this is a global symbol, we count the number of
7923 relocations we need for this symbol. */
7924 if (h != NULL)
252b5132 7925 {
5e681ec4
PB		 7926 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
7927 }
7928 else
7929 {
7930 /* Track dynamic relocs needed for local syms too.
7931 We really need local syms available to do this
7932 easily. Oh well. */
57e8b36a 7933
5e681ec4 7934 asection *s;
6edfbbad
DJ		 7935 void *vpp;
7936
5e681ec4
PB		 7937 s = bfd_section_from_r_symndx (abfd, &htab->sym_sec,
7938 sec, r_symndx);
7939 if (s == NULL)
7940 return FALSE;
57e8b36a 7941
6edfbbad
DJ		 7942 vpp = &elf_section_data (s)->local_dynrel;
7943 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 7944 }
57e8b36a 7945
5e681ec4
PB		 7946 p = *head;
7947 if (p == NULL || p->section != sec)
7948 {
7949 bfd_size_type amt = sizeof *p;
57e8b36a 7950
5e681ec4 7951 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 7952 if (p == NULL)
5e681ec4
PB		 7953 return FALSE;
7954 p->next = *head;
7955 *head = p;
7956 p->section = sec;
7957 p->count = 0;
ba93b8ac 7958 p->pc_count = 0;
252b5132 7959 }
57e8b36a 7960
bb224fc3 7961 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 7962 p->pc_count += 1;
71a976dd 7963 p->count += 1;
252b5132
RH		 7964 }
7965 break;
7966
7967 /* This relocation describes the C++ object vtable hierarchy.
7968 Reconstruct it for later use during GC. */
7969 case R_ARM_GNU_VTINHERIT:
c152c796 7970 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 7971 return FALSE;
252b5132 7972 break;
9a5aca8c 7973
252b5132
RH		 7974 /* This relocation describes which C++ vtable entries are actually
7975 used. Record for later use during GC. */
7976 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 7977 BFD_ASSERT (h != NULL);
7978 if (h != NULL
7979 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 7980 return FALSE;
252b5132
RH		 7981 break;
7982 }
7983 }
f21f3fe0 7984
b34976b6 7985 return TRUE;
252b5132
RH		 7986}
7987
6a5bb875
PB		 7988/* Unwinding tables are not referenced directly. This pass marks them as
7989 required if the corresponding code section is marked. */
7990
7991static bfd_boolean
7992elf32_arm_gc_mark_extra_sections(struct bfd_link_info *info,
7993 elf_gc_mark_hook_fn gc_mark_hook)
7994{
7995 bfd *sub;
7996 Elf_Internal_Shdr **elf_shdrp;
7997 bfd_boolean again;
7998
7999 /* Marking EH data may cause additional code sections to be marked,
8000 requiring multiple passes. */
8001 again = TRUE;
8002 while (again)
8003 {
8004 again = FALSE;
8005 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
8006 {
8007 asection *o;
8008
0ffa91dd 8009 if (! is_arm_elf (sub))
6a5bb875
PB		 8010 continue;
8011
8012 elf_shdrp = elf_elfsections (sub);
8013 for (o = sub->sections; o != NULL; o = o->next)
8014 {
8015 Elf_Internal_Shdr *hdr;
0ffa91dd 8016
6a5bb875
PB		 8017 hdr = &elf_section_data (o)->this_hdr;
8018 if (hdr->sh_type == SHT_ARM_EXIDX && hdr->sh_link
8019 && !o->gc_mark
8020 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
8021 {
8022 again = TRUE;
8023 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
8024 return FALSE;
8025 }
8026 }
8027 }
8028 }
8029
8030 return TRUE;
8031}
8032
3c9458e9
NC		 8033/* Treat mapping symbols as special target symbols. */
8034
8035static bfd_boolean
8036elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
8037{
b0796911
PB		 8038 return bfd_is_arm_special_symbol_name (sym->name,
8039 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 8040}
8041
0367ecfb
NC		 8042/* This is a copy of elf_find_function() from elf.c except that
8043 ARM mapping symbols are ignored when looking for function names
8044 and STT_ARM_TFUNC is considered to a function type. */
252b5132 8045
0367ecfb
NC		 8046static bfd_boolean
8047arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
8048 asection * section,
8049 asymbol ** symbols,
8050 bfd_vma offset,
8051 const char ** filename_ptr,
8052 const char ** functionname_ptr)
8053{
8054 const char * filename = NULL;
8055 asymbol * func = NULL;
8056 bfd_vma low_func = 0;
8057 asymbol ** p;
252b5132
RH		 8058
8059 for (p = symbols; *p != NULL; p++)
8060 {
8061 elf_symbol_type *q;
8062
8063 q = (elf_symbol_type *) *p;
8064
252b5132
RH		 8065 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
8066 {
8067 default:
8068 break;
8069 case STT_FILE:
8070 filename = bfd_asymbol_name (&q->symbol);
8071 break;
252b5132
RH		 8072 case STT_FUNC:
8073 case STT_ARM_TFUNC:
9d2da7ca 8074 case STT_NOTYPE:
b0796911 8075 /* Skip mapping symbols. */
0367ecfb 8076 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 8077 && bfd_is_arm_special_symbol_name (q->symbol.name,
8078 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 8079 continue;
8080 /* Fall through. */
6b40fcba 8081 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 8082 && q->symbol.value >= low_func
8083 && q->symbol.value <= offset)
8084 {
8085 func = (asymbol *) q;
8086 low_func = q->symbol.value;
8087 }
8088 break;
8089 }
8090 }
8091
8092 if (func == NULL)
b34976b6 8093 return FALSE;
252b5132 8094
0367ecfb
NC		 8095 if (filename_ptr)
8096 *filename_ptr = filename;
8097 if (functionname_ptr)
8098 *functionname_ptr = bfd_asymbol_name (func);
8099
8100 return TRUE;
8101}
8102
8103
8104/* Find the nearest line to a particular section and offset, for error
8105 reporting. This code is a duplicate of the code in elf.c, except
8106 that it uses arm_elf_find_function. */
8107
8108static bfd_boolean
8109elf32_arm_find_nearest_line (bfd * abfd,
8110 asection * section,
8111 asymbol ** symbols,
8112 bfd_vma offset,
8113 const char ** filename_ptr,
8114 const char ** functionname_ptr,
8115 unsigned int * line_ptr)
8116{
8117 bfd_boolean found = FALSE;
8118
8119 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
8120
8121 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
8122 filename_ptr, functionname_ptr,
8123 line_ptr, 0,
8124 & elf_tdata (abfd)->dwarf2_find_line_info))
8125 {
8126 if (!*functionname_ptr)
8127 arm_elf_find_function (abfd, section, symbols, offset,
8128 *filename_ptr ? NULL : filename_ptr,
8129 functionname_ptr);
f21f3fe0 8130
0367ecfb
NC		 8131 return TRUE;
8132 }
8133
8134 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
8135 & found, filename_ptr,
8136 functionname_ptr, line_ptr,
8137 & elf_tdata (abfd)->line_info))
8138 return FALSE;
8139
8140 if (found && (*functionname_ptr || *line_ptr))
8141 return TRUE;
8142
8143 if (symbols == NULL)
8144 return FALSE;
8145
8146 if (! arm_elf_find_function (abfd, section, symbols, offset,
8147 filename_ptr, functionname_ptr))
8148 return FALSE;
8149
8150 *line_ptr = 0;
b34976b6 8151 return TRUE;
252b5132
RH		 8152}
8153
4ab527b0
FF		 8154static bfd_boolean
8155elf32_arm_find_inliner_info (bfd * abfd,
8156 const char ** filename_ptr,
8157 const char ** functionname_ptr,
8158 unsigned int * line_ptr)
8159{
8160 bfd_boolean found;
8161 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
8162 functionname_ptr, line_ptr,
8163 & elf_tdata (abfd)->dwarf2_find_line_info);
8164 return found;
8165}
8166
252b5132
RH		 8167/* Adjust a symbol defined by a dynamic object and referenced by a
8168 regular object. The current definition is in some section of the
8169 dynamic object, but we're not including those sections. We have to
8170 change the definition to something the rest of the link can
8171 understand. */
8172
b34976b6 8173static bfd_boolean
57e8b36a
NC		 8174elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
8175 struct elf_link_hash_entry * h)
252b5132
RH		 8176{
8177 bfd * dynobj;
8178 asection * s;
b7693d02 8179 struct elf32_arm_link_hash_entry * eh;
67687978 8180 struct elf32_arm_link_hash_table *globals;
252b5132 8181
67687978 8182 globals = elf32_arm_hash_table (info);
252b5132
RH		 8183 dynobj = elf_hash_table (info)->dynobj;
8184
8185 /* Make sure we know what is going on here. */
8186 BFD_ASSERT (dynobj != NULL
f5385ebf 8187 && (h->needs_plt
f6e332e6 8188 || h->u.weakdef != NULL
f5385ebf
AM		 8189 || (h->def_dynamic
8190 && h->ref_regular
8191 && !h->def_regular)));
252b5132 8192
b7693d02
DJ		 8193 eh = (struct elf32_arm_link_hash_entry *) h;
8194
252b5132
RH		 8195 /* If this is a function, put it in the procedure linkage table. We
8196 will fill in the contents of the procedure linkage table later,
8197 when we know the address of the .got section. */
b7693d02 8198 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 8199 || h->needs_plt)
252b5132 8200 {
5e681ec4
PB		 8201 if (h->plt.refcount <= 0
8202 || SYMBOL_CALLS_LOCAL (info, h)
8203 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
8204 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 8205 {
8206 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 8207 file, but the symbol was never referred to by a dynamic
8208 object, or if all references were garbage collected. In
8209 such a case, we don't actually need to build a procedure
8210 linkage table, and we can just do a PC24 reloc instead. */
8211 h->plt.offset = (bfd_vma) -1;
b7693d02 8212 eh->plt_thumb_refcount = 0;
bd97cb95 8213 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 8214 h->needs_plt = 0;
252b5132
RH		 8215 }
8216
b34976b6 8217 return TRUE;
252b5132 8218 }
5e681ec4 8219 else
b7693d02
DJ		 8220 {
8221 /* It's possible that we incorrectly decided a .plt reloc was
8222 needed for an R_ARM_PC24 or similar reloc to a non-function sym
8223 in check_relocs. We can't decide accurately between function
8224 and non-function syms in check-relocs; Objects loaded later in
8225 the link may change h->type. So fix it now. */
8226 h->plt.offset = (bfd_vma) -1;
8227 eh->plt_thumb_refcount = 0;
bd97cb95 8228 eh->plt_maybe_thumb_refcount = 0;
b7693d02 8229 }
252b5132
RH		 8230
8231 /* If this is a weak symbol, and there is a real definition, the
8232 processor independent code will have arranged for us to see the
8233 real definition first, and we can just use the same value. */
f6e332e6 8234 if (h->u.weakdef != NULL)
252b5132 8235 {
f6e332e6
AM		 8236 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
8237 || h->u.weakdef->root.type == bfd_link_hash_defweak);
8238 h->root.u.def.section = h->u.weakdef->root.u.def.section;
8239 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 8240 return TRUE;
252b5132
RH		 8241 }
8242
ba93b8ac
DJ		 8243 /* If there are no non-GOT references, we do not need a copy
8244 relocation. */
8245 if (!h->non_got_ref)
8246 return TRUE;
8247
252b5132
RH		 8248 /* This is a reference to a symbol defined by a dynamic object which
8249 is not a function. */
8250
8251 /* If we are creating a shared library, we must presume that the
8252 only references to the symbol are via the global offset table.
8253 For such cases we need not do anything here; the relocations will
67687978
PB		 8254 be handled correctly by relocate_section. Relocatable executables
8255 can reference data in shared objects directly, so we don't need to
8256 do anything here. */
8257 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 8258 return TRUE;
252b5132 8259
909272ee
AM		 8260 if (h->size == 0)
8261 {
8262 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
8263 h->root.root.string);
8264 return TRUE;
8265 }
8266
252b5132
RH		 8267 /* We must allocate the symbol in our .dynbss section, which will
8268 become part of the .bss section of the executable. There will be
8269 an entry for this symbol in the .dynsym section. The dynamic
8270 object will contain position independent code, so all references
8271 from the dynamic object to this symbol will go through the global
8272 offset table. The dynamic linker will use the .dynsym entry to
8273 determine the address it must put in the global offset table, so
8274 both the dynamic object and the regular object will refer to the
8275 same memory location for the variable. */
252b5132
RH		 8276 s = bfd_get_section_by_name (dynobj, ".dynbss");
8277 BFD_ASSERT (s != NULL);
8278
8279 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
8280 copy the initial value out of the dynamic object and into the
8281 runtime process image. We need to remember the offset into the
00a97672 8282 .rel(a).bss section we are going to use. */
252b5132
RH		 8283 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
8284 {
8285 asection *srel;
8286
00a97672 8287 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 8288 BFD_ASSERT (srel != NULL);
00a97672 8289 srel->size += RELOC_SIZE (globals);
f5385ebf 8290 h->needs_copy = 1;
252b5132
RH		 8291 }
8292
027297b7 8293 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 8294}
8295
5e681ec4
PB		 8296/* Allocate space in .plt, .got and associated reloc sections for
8297 dynamic relocs. */
8298
8299static bfd_boolean
57e8b36a 8300allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 8301{
8302 struct bfd_link_info *info;
8303 struct elf32_arm_link_hash_table *htab;
8304 struct elf32_arm_link_hash_entry *eh;
8305 struct elf32_arm_relocs_copied *p;
bd97cb95 8306 bfd_signed_vma thumb_refs;
5e681ec4 8307
b7693d02
DJ		 8308 eh = (struct elf32_arm_link_hash_entry *) h;
8309
5e681ec4
PB		 8310 if (h->root.type == bfd_link_hash_indirect)
8311 return TRUE;
8312
8313 if (h->root.type == bfd_link_hash_warning)
8314 /* When warning symbols are created, they **replace** the "real"
8315 entry in the hash table, thus we never get to see the real
8316 symbol in a hash traversal. So look at it now. */
8317 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8318
8319 info = (struct bfd_link_info *) inf;
8320 htab = elf32_arm_hash_table (info);
8321
8322 if (htab->root.dynamic_sections_created
8323 && h->plt.refcount > 0)
8324 {
8325 /* Make sure this symbol is output as a dynamic symbol.
8326 Undefined weak syms won't yet be marked as dynamic. */
8327 if (h->dynindx == -1
f5385ebf 8328 && !h->forced_local)
5e681ec4 8329 {
c152c796 8330 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8331 return FALSE;
8332 }
8333
8334 if (info->shared
7359ea65 8335 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 8336 {
8337 asection *s = htab->splt;
8338
8339 /* If this is the first .plt entry, make room for the special
8340 first entry. */
eea6121a 8341 if (s->size == 0)
e5a52504 8342 s->size += htab->plt_header_size;
5e681ec4 8343
eea6121a 8344 h->plt.offset = s->size;
5e681ec4 8345
b7693d02
DJ		 8346 /* If we will insert a Thumb trampoline before this PLT, leave room
8347 for it. */
bd97cb95
DJ		 8348 thumb_refs = eh->plt_thumb_refcount;
8349 if (!htab->use_blx)
8350 thumb_refs += eh->plt_maybe_thumb_refcount;
8351
8352 if (thumb_refs > 0)
b7693d02
DJ		 8353 {
8354 h->plt.offset += PLT_THUMB_STUB_SIZE;
8355 s->size += PLT_THUMB_STUB_SIZE;
8356 }
8357
5e681ec4
PB		 8358 /* If this symbol is not defined in a regular file, and we are
8359 not generating a shared library, then set the symbol to this
8360 location in the .plt. This is required to make function
8361 pointers compare as equal between the normal executable and
8362 the shared library. */
8363 if (! info->shared
f5385ebf 8364 && !h->def_regular)
5e681ec4
PB		 8365 {
8366 h->root.u.def.section = s;
8367 h->root.u.def.value = h->plt.offset;
b7693d02
DJ		 8368
8369 /* Make sure the function is not marked as Thumb, in case
8370 it is the target of an ABS32 relocation, which will
8371 point to the PLT entry. */
8372 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
8373 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
5e681ec4
PB		 8374 }
8375
8376 /* Make room for this entry. */
e5a52504 8377 s->size += htab->plt_entry_size;
5e681ec4 8378
e5a52504 8379 if (!htab->symbian_p)
b7693d02
DJ		 8380 {
8381 /* We also need to make an entry in the .got.plt section, which
8382 will be placed in the .got section by the linker script. */
8383 eh->plt_got_offset = htab->sgotplt->size;
8384 htab->sgotplt->size += 4;
8385 }
5e681ec4 8386
00a97672
RS		 8387 /* We also need to make an entry in the .rel(a).plt section. */
8388 htab->srelplt->size += RELOC_SIZE (htab);
8389
8390 /* VxWorks executables have a second set of relocations for
8391 each PLT entry. They go in a separate relocation section,
8392 which is processed by the kernel loader. */
8393 if (htab->vxworks_p && !info->shared)
8394 {
8395 /* There is a relocation for the initial PLT entry:
8396 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
8397 if (h->plt.offset == htab->plt_header_size)
8398 htab->srelplt2->size += RELOC_SIZE (htab);
8399
8400 /* There are two extra relocations for each subsequent
8401 PLT entry: an R_ARM_32 relocation for the GOT entry,
8402 and an R_ARM_32 relocation for the PLT entry. */
8403 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
8404 }
5e681ec4
PB		 8405 }
8406 else
8407 {
8408 h->plt.offset = (bfd_vma) -1;
f5385ebf 8409 h->needs_plt = 0;
5e681ec4
PB		 8410 }
8411 }
8412 else
8413 {
8414 h->plt.offset = (bfd_vma) -1;
f5385ebf 8415 h->needs_plt = 0;
5e681ec4
PB		 8416 }
8417
8418 if (h->got.refcount > 0)
8419 {
8420 asection *s;
8421 bfd_boolean dyn;
ba93b8ac
DJ		 8422 int tls_type = elf32_arm_hash_entry (h)->tls_type;
8423 int indx;
5e681ec4
PB		 8424
8425 /* Make sure this symbol is output as a dynamic symbol.
8426 Undefined weak syms won't yet be marked as dynamic. */
8427 if (h->dynindx == -1
f5385ebf 8428 && !h->forced_local)
5e681ec4 8429 {
c152c796 8430 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8431 return FALSE;
8432 }
8433
e5a52504
MM		 8434 if (!htab->symbian_p)
8435 {
8436 s = htab->sgot;
8437 h->got.offset = s->size;
ba93b8ac
DJ		 8438
8439 if (tls_type == GOT_UNKNOWN)
8440 abort ();
8441
8442 if (tls_type == GOT_NORMAL)
8443 /* Non-TLS symbols need one GOT slot. */
8444 s->size += 4;
8445 else
8446 {
8447 if (tls_type & GOT_TLS_GD)
8448 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
8449 s->size += 8;
8450 if (tls_type & GOT_TLS_IE)
8451 /* R_ARM_TLS_IE32 needs one GOT slot. */
8452 s->size += 4;
8453 }
8454
e5a52504 8455 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 8456
8457 indx = 0;
8458 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8459 && (!info->shared
8460 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8461 indx = h->dynindx;
8462
8463 if (tls_type != GOT_NORMAL
8464 && (info->shared || indx != 0)
8465 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8466 || h->root.type != bfd_link_hash_undefweak))
8467 {
8468 if (tls_type & GOT_TLS_IE)
00a97672 8469 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8470
8471 if (tls_type & GOT_TLS_GD)
00a97672 8472 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8473
8474 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 8475 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8476 }
8477 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8478 || h->root.type != bfd_link_hash_undefweak)
8479 && (info->shared
8480 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 8481 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 8482 }
5e681ec4
PB		 8483 }
8484 else
8485 h->got.offset = (bfd_vma) -1;
8486
a4fd1a8e
PB		 8487 /* Allocate stubs for exported Thumb functions on v4t. */
8488 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 8489 && h->def_regular
a4fd1a8e
PB		 8490 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
8491 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
8492 {
8493 struct elf_link_hash_entry * th;
8494 struct bfd_link_hash_entry * bh;
8495 struct elf_link_hash_entry * myh;
8496 char name[1024];
8497 asection *s;
8498 bh = NULL;
8499 /* Create a new symbol to regist the real location of the function. */
8500 s = h->root.u.def.section;
8501 sprintf(name, "__real_%s", h->root.root.string);
8502 _bfd_generic_link_add_one_symbol (info, s->owner,
8503 name, BSF_GLOBAL, s,
8504 h->root.u.def.value,
8505 NULL, TRUE, FALSE, &bh);
8506
8507 myh = (struct elf_link_hash_entry *) bh;
8508 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
8509 myh->forced_local = 1;
8510 eh->export_glue = myh;
8511 th = record_arm_to_thumb_glue (info, h);
8512 /* Point the symbol at the stub. */
8513 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
8514 h->root.u.def.section = th->root.u.def.section;
8515 h->root.u.def.value = th->root.u.def.value & ~1;
8516 }
8517
5e681ec4
PB		 8518 if (eh->relocs_copied == NULL)
8519 return TRUE;
8520
8521 /* In the shared -Bsymbolic case, discard space allocated for
8522 dynamic pc-relative relocs against symbols which turn out to be
8523 defined in regular objects. For the normal shared case, discard
8524 space for pc-relative relocs that have become local due to symbol
8525 visibility changes. */
8526
67687978 8527 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 8528 {
7bdca076 8529 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 8530 R_ARM_REL32_NOI, which will appear on something like
8531 ".long foo - .". We want calls to protected symbols to resolve
8532 directly to the function rather than going via the plt. If people
8533 want function pointer comparisons to work as expected then they
8534 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 8535 if (SYMBOL_CALLS_LOCAL (info, h))
8536 {
8537 struct elf32_arm_relocs_copied **pp;
8538
8539 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
8540 {
8541 p->count -= p->pc_count;
8542 p->pc_count = 0;
8543 if (p->count == 0)
8544 *pp = p->next;
8545 else
8546 pp = &p->next;
8547 }
8548 }
8549
8550 /* Also discard relocs on undefined weak syms with non-default
7359ea65 8551 visibility. */
22d606e9 8552 if (eh->relocs_copied != NULL
5e681ec4 8553 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 8554 {
8555 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
8556 eh->relocs_copied = NULL;
8557
8558 /* Make sure undefined weak symbols are output as a dynamic
8559 symbol in PIEs. */
8560 else if (h->dynindx == -1
8561 && !h->forced_local)
8562 {
8563 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8564 return FALSE;
8565 }
8566 }
8567
67687978
PB		 8568 else if (htab->root.is_relocatable_executable && h->dynindx == -1
8569 && h->root.type == bfd_link_hash_new)
8570 {
8571 /* Output absolute symbols so that we can create relocations
8572 against them. For normal symbols we output a relocation
8573 against the section that contains them. */
8574 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8575 return FALSE;
8576 }
8577
5e681ec4
PB		 8578 }
8579 else
8580 {
8581 /* For the non-shared case, discard space for relocs against
8582 symbols which turn out to need copy relocs or are not
8583 dynamic. */
8584
f5385ebf
AM		 8585 if (!h->non_got_ref
8586 && ((h->def_dynamic
8587 && !h->def_regular)
5e681ec4
PB		 8588 || (htab->root.dynamic_sections_created
8589 && (h->root.type == bfd_link_hash_undefweak
8590 || h->root.type == bfd_link_hash_undefined))))
8591 {
8592 /* Make sure this symbol is output as a dynamic symbol.
8593 Undefined weak syms won't yet be marked as dynamic. */
8594 if (h->dynindx == -1
f5385ebf 8595 && !h->forced_local)
5e681ec4 8596 {
c152c796 8597 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8598 return FALSE;
8599 }
8600
8601 /* If that succeeded, we know we'll be keeping all the
8602 relocs. */
8603 if (h->dynindx != -1)
8604 goto keep;
8605 }
8606
8607 eh->relocs_copied = NULL;
8608
8609 keep: ;
8610 }
8611
8612 /* Finally, allocate space. */
8613 for (p = eh->relocs_copied; p != NULL; p = p->next)
8614 {
8615 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 8616 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 8617 }
8618
8619 return TRUE;
8620}
8621
08d1f311
DJ		 8622/* Find any dynamic relocs that apply to read-only sections. */
8623
8624static bfd_boolean
8625elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry *h, PTR inf)
8626{
8627 struct elf32_arm_link_hash_entry *eh;
8628 struct elf32_arm_relocs_copied *p;
8629
8630 if (h->root.type == bfd_link_hash_warning)
8631 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8632
8633 eh = (struct elf32_arm_link_hash_entry *) h;
8634 for (p = eh->relocs_copied; p != NULL; p = p->next)
8635 {
8636 asection *s = p->section;
8637
8638 if (s != NULL && (s->flags & SEC_READONLY) != 0)
8639 {
8640 struct bfd_link_info *info = (struct bfd_link_info *) inf;
8641
8642 info->flags |= DF_TEXTREL;
8643
8644 /* Not an error, just cut short the traversal. */
8645 return FALSE;
8646 }
8647 }
8648 return TRUE;
8649}
8650
d504ffc8
DJ		 8651void
8652bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
8653 int byteswap_code)
8654{
8655 struct elf32_arm_link_hash_table *globals;
8656
8657 globals = elf32_arm_hash_table (info);
8658 globals->byteswap_code = byteswap_code;
8659}
8660
252b5132
RH		 8661/* Set the sizes of the dynamic sections. */
8662
b34976b6 8663static bfd_boolean
57e8b36a
NC		 8664elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
8665 struct bfd_link_info * info)
252b5132
RH		 8666{
8667 bfd * dynobj;
8668 asection * s;
b34976b6
AM		 8669 bfd_boolean plt;
8670 bfd_boolean relocs;
5e681ec4
PB		 8671 bfd *ibfd;
8672 struct elf32_arm_link_hash_table *htab;
252b5132 8673
5e681ec4 8674 htab = elf32_arm_hash_table (info);
252b5132
RH		 8675 dynobj = elf_hash_table (info)->dynobj;
8676 BFD_ASSERT (dynobj != NULL);
39b41c9c 8677 check_use_blx (htab);
252b5132
RH		 8678
8679 if (elf_hash_table (info)->dynamic_sections_created)
8680 {
8681 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 8682 if (info->executable)
252b5132
RH		 8683 {
8684 s = bfd_get_section_by_name (dynobj, ".interp");
8685 BFD_ASSERT (s != NULL);
eea6121a 8686 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 8687 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
8688 }
8689 }
5e681ec4
PB		 8690
8691 /* Set up .got offsets for local syms, and space for local dynamic
8692 relocs. */
8693 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 8694 {
5e681ec4
PB		 8695 bfd_signed_vma *local_got;
8696 bfd_signed_vma *end_local_got;
8697 char *local_tls_type;
8698 bfd_size_type locsymcount;
8699 Elf_Internal_Shdr *symtab_hdr;
8700 asection *srel;
8701
0ffa91dd 8702 if (! is_arm_elf (ibfd))
5e681ec4
PB		 8703 continue;
8704
8705 for (s = ibfd->sections; s != NULL; s = s->next)
8706 {
8707 struct elf32_arm_relocs_copied *p;
8708
6edfbbad 8709 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 8710 {
8711 if (!bfd_is_abs_section (p->section)
8712 && bfd_is_abs_section (p->section->output_section))
8713 {
8714 /* Input section has been discarded, either because
8715 it is a copy of a linkonce section or due to
8716 linker script /DISCARD/, so we'll be discarding
8717 the relocs too. */
8718 }
8719 else if (p->count != 0)
8720 {
8721 srel = elf_section_data (p->section)->sreloc;
00a97672 8722 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 8723 if ((p->section->output_section->flags & SEC_READONLY) != 0)
8724 info->flags |= DF_TEXTREL;
8725 }
8726 }
8727 }
8728
8729 local_got = elf_local_got_refcounts (ibfd);
8730 if (!local_got)
8731 continue;
8732
0ffa91dd 8733 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 8734 locsymcount = symtab_hdr->sh_info;
8735 end_local_got = local_got + locsymcount;
ba93b8ac 8736 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 8737 s = htab->sgot;
8738 srel = htab->srelgot;
8739 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
8740 {
8741 if (*local_got > 0)
8742 {
eea6121a 8743 *local_got = s->size;
ba93b8ac
DJ		 8744 if (*local_tls_type & GOT_TLS_GD)
8745 /* TLS_GD relocs need an 8-byte structure in the GOT. */
8746 s->size += 8;
8747 if (*local_tls_type & GOT_TLS_IE)
8748 s->size += 4;
8749 if (*local_tls_type == GOT_NORMAL)
8750 s->size += 4;
8751
8752 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 8753 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 8754 }
8755 else
8756 *local_got = (bfd_vma) -1;
8757 }
252b5132
RH		 8758 }
8759
ba93b8ac
DJ		 8760 if (htab->tls_ldm_got.refcount > 0)
8761 {
8762 /* Allocate two GOT entries and one dynamic relocation (if necessary)
8763 for R_ARM_TLS_LDM32 relocations. */
8764 htab->tls_ldm_got.offset = htab->sgot->size;
8765 htab->sgot->size += 8;
8766 if (info->shared)
00a97672 8767 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8768 }
8769 else
8770 htab->tls_ldm_got.offset = -1;
8771
5e681ec4
PB		 8772 /* Allocate global sym .plt and .got entries, and space for global
8773 sym dynamic relocs. */
57e8b36a 8774 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 8775
d504ffc8
DJ		 8776 /* Here we rummage through the found bfds to collect glue information. */
8777 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 8778 {
0ffa91dd 8779 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 8780 continue;
8781
c7b8f16e
JB		 8782 /* Initialise mapping tables for code/data. */
8783 bfd_elf32_arm_init_maps (ibfd);
8784
8785 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
8786 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
8787 /* xgettext:c-format */
8788 _bfd_error_handler (_("Errors encountered processing file %s"),
8789 ibfd->filename);
8790 }
d504ffc8 8791
252b5132
RH		 8792 /* The check_relocs and adjust_dynamic_symbol entry points have
8793 determined the sizes of the various dynamic sections. Allocate
8794 memory for them. */
b34976b6
AM		 8795 plt = FALSE;
8796 relocs = FALSE;
252b5132
RH		 8797 for (s = dynobj->sections; s != NULL; s = s->next)
8798 {
8799 const char * name;
252b5132
RH		 8800
8801 if ((s->flags & SEC_LINKER_CREATED) == 0)
8802 continue;
8803
8804 /* It's OK to base decisions on the section name, because none
8805 of the dynobj section names depend upon the input files. */
8806 name = bfd_get_section_name (dynobj, s);
8807
24a1ba0f 8808 if (strcmp (name, ".plt") == 0)
252b5132 8809 {
c456f082
AM		 8810 /* Remember whether there is a PLT. */
8811 plt = s->size != 0;
252b5132 8812 }
0112cd26 8813 else if (CONST_STRNEQ (name, ".rel"))
252b5132 8814 {
c456f082 8815 if (s->size != 0)
252b5132 8816 {
252b5132 8817 /* Remember whether there are any reloc sections other
00a97672
RS		 8818 than .rel(a).plt and .rela.plt.unloaded. */
8819 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 8820 relocs = TRUE;
252b5132
RH		 8821
8822 /* We use the reloc_count field as a counter if we need
8823 to copy relocs into the output file. */
8824 s->reloc_count = 0;
8825 }
8826 }
0112cd26 8827 else if (! CONST_STRNEQ (name, ".got")
c456f082 8828 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 8829 {
8830 /* It's not one of our sections, so don't allocate space. */
8831 continue;
8832 }
8833
c456f082 8834 if (s->size == 0)
252b5132 8835 {
c456f082 8836 /* If we don't need this section, strip it from the
00a97672
RS		 8837 output file. This is mostly to handle .rel(a).bss and
8838 .rel(a).plt. We must create both sections in
c456f082
AM		 8839 create_dynamic_sections, because they must be created
8840 before the linker maps input sections to output
8841 sections. The linker does that before
8842 adjust_dynamic_symbol is called, and it is that
8843 function which decides whether anything needs to go
8844 into these sections. */
8423293d 8845 s->flags |= SEC_EXCLUDE;
252b5132
RH		 8846 continue;
8847 }
8848
c456f082
AM		 8849 if ((s->flags & SEC_HAS_CONTENTS) == 0)
8850 continue;
8851
252b5132 8852 /* Allocate memory for the section contents. */
eea6121a 8853 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
c456f082 8854 if (s->contents == NULL)
b34976b6 8855 return FALSE;
252b5132
RH		 8856 }
8857
8858 if (elf_hash_table (info)->dynamic_sections_created)
8859 {
8860 /* Add some entries to the .dynamic section. We fill in the
8861 values later, in elf32_arm_finish_dynamic_sections, but we
8862 must add the entries now so that we get the correct size for
8863 the .dynamic section. The DT_DEBUG entry is filled in by the
8864 dynamic linker and used by the debugger. */
dc810e39 8865#define add_dynamic_entry(TAG, VAL) \
5a580b3a 8866 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 8867
8532796c 8868 if (info->executable)
252b5132 8869 {
dc810e39 8870 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 8871 return FALSE;
252b5132
RH		 8872 }
8873
8874 if (plt)
8875 {
dc810e39
AM		 8876 if ( !add_dynamic_entry (DT_PLTGOT, 0)
8877 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 8878 || !add_dynamic_entry (DT_PLTREL,
8879 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 8880 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 8881 return FALSE;
252b5132
RH		 8882 }
8883
8884 if (relocs)
8885 {
00a97672
RS		 8886 if (htab->use_rel)
8887 {
8888 if (!add_dynamic_entry (DT_REL, 0)
8889 || !add_dynamic_entry (DT_RELSZ, 0)
8890 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
8891 return FALSE;
8892 }
8893 else
8894 {
8895 if (!add_dynamic_entry (DT_RELA, 0)
8896 || !add_dynamic_entry (DT_RELASZ, 0)
8897 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
8898 return FALSE;
8899 }
252b5132
RH		 8900 }
8901
08d1f311
DJ		 8902 /* If any dynamic relocs apply to a read-only section,
8903 then we need a DT_TEXTREL entry. */
8904 if ((info->flags & DF_TEXTREL) == 0)
8905 elf_link_hash_traverse (&htab->root, elf32_arm_readonly_dynrelocs,
8906 (PTR) info);
8907
99e4ae17 8908 if ((info->flags & DF_TEXTREL) != 0)
252b5132 8909 {
dc810e39 8910 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 8911 return FALSE;
252b5132 8912 }
7a2b07ff
NS		 8913 if (htab->vxworks_p
8914 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
8915 return FALSE;
252b5132 8916 }
8532796c 8917#undef add_dynamic_entry
252b5132 8918
b34976b6 8919 return TRUE;
252b5132
RH		 8920}
8921
252b5132
RH		 8922/* Finish up dynamic symbol handling. We set the contents of various
8923 dynamic sections here. */
8924
b34976b6 8925static bfd_boolean
57e8b36a
NC		 8926elf32_arm_finish_dynamic_symbol (bfd * output_bfd, struct bfd_link_info * info,
8927 struct elf_link_hash_entry * h, Elf_Internal_Sym * sym)
252b5132
RH		 8928{
8929 bfd * dynobj;
e5a52504 8930 struct elf32_arm_link_hash_table *htab;
b7693d02 8931 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 8932
8933 dynobj = elf_hash_table (info)->dynobj;
e5a52504 8934 htab = elf32_arm_hash_table (info);
b7693d02 8935 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 8936
8937 if (h->plt.offset != (bfd_vma) -1)
8938 {
8939 asection * splt;
252b5132 8940 asection * srel;
e5a52504 8941 bfd_byte *loc;
24a1ba0f 8942 bfd_vma plt_index;
947216bf 8943 Elf_Internal_Rela rel;
252b5132
RH		 8944
8945 /* This symbol has an entry in the procedure linkage table. Set
8946 it up. */
8947
8948 BFD_ASSERT (h->dynindx != -1);
8949
8950 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 8951 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 8952 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 8953
e5a52504
MM		 8954 /* Fill in the entry in the procedure linkage table. */
8955 if (htab->symbian_p)
8956 {
52ab56c2
PB		 8957 put_arm_insn (htab, output_bfd,
8958 elf32_arm_symbian_plt_entry[0],
8959 splt->contents + h->plt.offset);
8960 bfd_put_32 (output_bfd,
8961 elf32_arm_symbian_plt_entry[1],
8962 splt->contents + h->plt.offset + 4);
e5a52504
MM		 8963
8964 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 8965 rel.r_offset = (splt->output_section->vma
8966 + splt->output_offset
52ab56c2 8967 + h->plt.offset + 4);
e5a52504 8968 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 8969
8970 /* Get the index in the procedure linkage table which
8971 corresponds to this symbol. This is the index of this symbol
8972 in all the symbols for which we are making plt entries. The
8973 first entry in the procedure linkage table is reserved. */
8974 plt_index = ((h->plt.offset - htab->plt_header_size)
8975 / htab->plt_entry_size);
e5a52504
MM		 8976 }
8977 else
8978 {
00a97672 8979 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 8980 bfd_vma got_displacement;
8981 asection * sgot;
52ab56c2 8982 bfd_byte * ptr;
e5a52504
MM		 8983
8984 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
8985 BFD_ASSERT (sgot != NULL);
8986
b7693d02
DJ		 8987 /* Get the offset into the .got.plt table of the entry that
8988 corresponds to this function. */
8989 got_offset = eh->plt_got_offset;
8990
8991 /* Get the index in the procedure linkage table which
8992 corresponds to this symbol. This is the index of this symbol
8993 in all the symbols for which we are making plt entries. The
8994 first three entries in .got.plt are reserved; after that
8995 symbols appear in the same order as in .plt. */
8996 plt_index = (got_offset - 12) / 4;
e5a52504 8997
00a97672
RS		 8998 /* Calculate the address of the GOT entry. */
8999 got_address = (sgot->output_section->vma
9000 + sgot->output_offset
9001 + got_offset);
5e681ec4 9002
00a97672
RS		 9003 /* ...and the address of the PLT entry. */
9004 plt_address = (splt->output_section->vma
9005 + splt->output_offset
9006 + h->plt.offset);
5e681ec4 9007
52ab56c2 9008 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 9009 if (htab->vxworks_p && info->shared)
9010 {
9011 unsigned int i;
9012 bfd_vma val;
9013
52ab56c2 9014 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 9015 {
9016 val = elf32_arm_vxworks_shared_plt_entry[i];
9017 if (i == 2)
9018 val |= got_address - sgot->output_section->vma;
9019 if (i == 5)
9020 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 9021 if (i == 2 || i == 5)
9022 bfd_put_32 (output_bfd, val, ptr);
9023 else
9024 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 9025 }
9026 }
9027 else if (htab->vxworks_p)
b7693d02 9028 {
00a97672
RS		 9029 unsigned int i;
9030 bfd_vma val;
9031
d3753b85 9032 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 9033 {
9034 val = elf32_arm_vxworks_exec_plt_entry[i];
9035 if (i == 2)
9036 val |= got_address;
9037 if (i == 4)
9038 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
9039 if (i == 5)
9040 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 9041 if (i == 2 || i == 5)
9042 bfd_put_32 (output_bfd, val, ptr);
9043 else
9044 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 9045 }
9046
9047 loc = (htab->srelplt2->contents
9048 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9049
9050 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9051 referencing the GOT for this PLT entry. */
9052 rel.r_offset = plt_address + 8;
9053 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9054 rel.r_addend = got_offset;
9055 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9056 loc += RELOC_SIZE (htab);
9057
9058 /* Create the R_ARM_ABS32 relocation referencing the
9059 beginning of the PLT for this GOT entry. */
9060 rel.r_offset = got_address;
9061 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9062 rel.r_addend = 0;
9063 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 9064 }
00a97672
RS		 9065 else
9066 {
bd97cb95 9067 bfd_signed_vma thumb_refs;
00a97672
RS		 9068 /* Calculate the displacement between the PLT slot and the
9069 entry in the GOT. The eight-byte offset accounts for the
9070 value produced by adding to pc in the first instruction
9071 of the PLT stub. */
9072 got_displacement = got_address - (plt_address + 8);
b7693d02 9073
00a97672
RS		 9074 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9075
bd97cb95
DJ		 9076 thumb_refs = eh->plt_thumb_refcount;
9077 if (!htab->use_blx)
9078 thumb_refs += eh->plt_maybe_thumb_refcount;
9079
9080 if (thumb_refs > 0)
00a97672 9081 {
52ab56c2
PB		 9082 put_thumb_insn (htab, output_bfd,
9083 elf32_arm_plt_thumb_stub[0], ptr - 4);
9084 put_thumb_insn (htab, output_bfd,
9085 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 9086 }
9087
52ab56c2
PB		 9088 put_arm_insn (htab, output_bfd,
9089 elf32_arm_plt_entry[0]
9090 | ((got_displacement & 0x0ff00000) >> 20),
9091 ptr + 0);
9092 put_arm_insn (htab, output_bfd,
9093 elf32_arm_plt_entry[1]
9094 | ((got_displacement & 0x000ff000) >> 12),
9095 ptr+ 4);
9096 put_arm_insn (htab, output_bfd,
9097 elf32_arm_plt_entry[2]
9098 | (got_displacement & 0x00000fff),
9099 ptr + 8);
5e681ec4 9100#ifdef FOUR_WORD_PLT
52ab56c2 9101 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 9102#endif
00a97672 9103 }
252b5132 9104
e5a52504
MM		 9105 /* Fill in the entry in the global offset table. */
9106 bfd_put_32 (output_bfd,
9107 (splt->output_section->vma
9108 + splt->output_offset),
9109 sgot->contents + got_offset);
9110
00a97672
RS		 9111 /* Fill in the entry in the .rel(a).plt section. */
9112 rel.r_addend = 0;
9113 rel.r_offset = got_address;
e5a52504
MM		 9114 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
9115 }
57e8b36a 9116
00a97672
RS		 9117 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9118 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 9119
f5385ebf 9120 if (!h->def_regular)
252b5132
RH		 9121 {
9122 /* Mark the symbol as undefined, rather than as defined in
9123 the .plt section. Leave the value alone. */
9124 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 9125 /* If the symbol is weak, we do need to clear the value.
9126 Otherwise, the PLT entry would provide a definition for
9127 the symbol even if the symbol wasn't defined anywhere,
9128 and so the symbol would never be NULL. */
f5385ebf 9129 if (!h->ref_regular_nonweak)
d982ba73 9130 sym->st_value = 0;
252b5132
RH		 9131 }
9132 }
9133
ba93b8ac
DJ		 9134 if (h->got.offset != (bfd_vma) -1
9135 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
9136 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 9137 {
9138 asection * sgot;
9139 asection * srel;
947216bf
AM		 9140 Elf_Internal_Rela rel;
9141 bfd_byte *loc;
00a97672 9142 bfd_vma offset;
252b5132
RH		 9143
9144 /* This symbol has an entry in the global offset table. Set it
9145 up. */
252b5132 9146 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 9147 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 9148 BFD_ASSERT (sgot != NULL && srel != NULL);
9149
00a97672
RS		 9150 offset = (h->got.offset & ~(bfd_vma) 1);
9151 rel.r_addend = 0;
252b5132
RH		 9152 rel.r_offset = (sgot->output_section->vma
9153 + sgot->output_offset
00a97672 9154 + offset);
252b5132 9155
5e681ec4
PB		 9156 /* If this is a static link, or it is a -Bsymbolic link and the
9157 symbol is defined locally or was forced to be local because
9158 of a version file, we just want to emit a RELATIVE reloc.
9159 The entry in the global offset table will already have been
9160 initialized in the relocate_section function. */
252b5132 9161 if (info->shared
5e681ec4
PB		 9162 && SYMBOL_REFERENCES_LOCAL (info, h))
9163 {
9164 BFD_ASSERT((h->got.offset & 1) != 0);
9165 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 9166 if (!htab->use_rel)
9167 {
9168 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
9169 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
9170 }
5e681ec4 9171 }
252b5132
RH		 9172 else
9173 {
5e681ec4 9174 BFD_ASSERT((h->got.offset & 1) == 0);
00a97672 9175 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 9176 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9177 }
9178
00a97672
RS		 9179 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
9180 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 9181 }
9182
f5385ebf 9183 if (h->needs_copy)
252b5132
RH		 9184 {
9185 asection * s;
947216bf
AM		 9186 Elf_Internal_Rela rel;
9187 bfd_byte *loc;
252b5132
RH		 9188
9189 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 9190 BFD_ASSERT (h->dynindx != -1
9191 && (h->root.type == bfd_link_hash_defined
9192 || h->root.type == bfd_link_hash_defweak));
9193
9194 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 9195 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 9196 BFD_ASSERT (s != NULL);
9197
00a97672 9198 rel.r_addend = 0;
252b5132
RH		 9199 rel.r_offset = (h->root.u.def.value
9200 + h->root.u.def.section->output_section->vma
9201 + h->root.u.def.section->output_offset);
9202 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 9203 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
9204 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 9205 }
9206
00a97672
RS		 9207 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
9208 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
9209 to the ".got" section. */
252b5132 9210 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 9211 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 9212 sym->st_shndx = SHN_ABS;
9213
b34976b6 9214 return TRUE;
252b5132
RH		 9215}
9216
9217/* Finish up the dynamic sections. */
9218
b34976b6 9219static bfd_boolean
57e8b36a 9220elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 9221{
9222 bfd * dynobj;
9223 asection * sgot;
9224 asection * sdyn;
9225
9226 dynobj = elf_hash_table (info)->dynobj;
9227
9228 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 9229 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 9230 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
9231
9232 if (elf_hash_table (info)->dynamic_sections_created)
9233 {
9234 asection *splt;
9235 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 9236 struct elf32_arm_link_hash_table *htab;
252b5132 9237
229fcec5 9238 htab = elf32_arm_hash_table (info);
252b5132 9239 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 9240 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 9241
9242 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 9243 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 9244
252b5132
RH		 9245 for (; dyncon < dynconend; dyncon++)
9246 {
9247 Elf_Internal_Dyn dyn;
9248 const char * name;
9249 asection * s;
9250
9251 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
9252
9253 switch (dyn.d_tag)
9254 {
229fcec5
MM		 9255 unsigned int type;
9256
252b5132 9257 default:
7a2b07ff
NS		 9258 if (htab->vxworks_p
9259 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
9260 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 9261 break;
9262
229fcec5
MM		 9263 case DT_HASH:
9264 name = ".hash";
9265 goto get_vma_if_bpabi;
9266 case DT_STRTAB:
9267 name = ".dynstr";
9268 goto get_vma_if_bpabi;
9269 case DT_SYMTAB:
9270 name = ".dynsym";
9271 goto get_vma_if_bpabi;
c0042f5d
MM		 9272 case DT_VERSYM:
9273 name = ".gnu.version";
9274 goto get_vma_if_bpabi;
9275 case DT_VERDEF:
9276 name = ".gnu.version_d";
9277 goto get_vma_if_bpabi;
9278 case DT_VERNEED:
9279 name = ".gnu.version_r";
9280 goto get_vma_if_bpabi;
9281
252b5132
RH		 9282 case DT_PLTGOT:
9283 name = ".got";
9284 goto get_vma;
9285 case DT_JMPREL:
00a97672 9286 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 9287 get_vma:
9288 s = bfd_get_section_by_name (output_bfd, name);
9289 BFD_ASSERT (s != NULL);
229fcec5
MM		 9290 if (!htab->symbian_p)
9291 dyn.d_un.d_ptr = s->vma;
9292 else
9293 /* In the BPABI, tags in the PT_DYNAMIC section point
9294 at the file offset, not the memory address, for the
9295 convenience of the post linker. */
9296 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 9297 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9298 break;
9299
229fcec5
MM		 9300 get_vma_if_bpabi:
9301 if (htab->symbian_p)
9302 goto get_vma;
9303 break;
9304
252b5132 9305 case DT_PLTRELSZ:
00a97672
RS		 9306 s = bfd_get_section_by_name (output_bfd,
9307 RELOC_SECTION (htab, ".plt"));
252b5132 9308 BFD_ASSERT (s != NULL);
eea6121a 9309 dyn.d_un.d_val = s->size;
252b5132
RH		 9310 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9311 break;
229fcec5 9312
252b5132 9313 case DT_RELSZ:
00a97672 9314 case DT_RELASZ:
229fcec5
MM		 9315 if (!htab->symbian_p)
9316 {
9317 /* My reading of the SVR4 ABI indicates that the
9318 procedure linkage table relocs (DT_JMPREL) should be
9319 included in the overall relocs (DT_REL). This is
9320 what Solaris does. However, UnixWare can not handle
9321 that case. Therefore, we override the DT_RELSZ entry
9322 here to make it not include the JMPREL relocs. Since
00a97672 9323 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 9324 other relocation sections, we don't have to worry
9325 about changing the DT_REL entry. */
00a97672
RS		 9326 s = bfd_get_section_by_name (output_bfd,
9327 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 9328 if (s != NULL)
9329 dyn.d_un.d_val -= s->size;
9330 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9331 break;
9332 }
9333 /* Fall through */
9334
9335 case DT_REL:
9336 case DT_RELA:
229fcec5
MM		 9337 /* In the BPABI, the DT_REL tag must point at the file
9338 offset, not the VMA, of the first relocation
9339 section. So, we use code similar to that in
9340 elflink.c, but do not check for SHF_ALLOC on the
9341 relcoation section, since relocations sections are
9342 never allocated under the BPABI. The comments above
9343 about Unixware notwithstanding, we include all of the
9344 relocations here. */
9345 if (htab->symbian_p)
9346 {
9347 unsigned int i;
9348 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
9349 ? SHT_REL : SHT_RELA);
9350 dyn.d_un.d_val = 0;
9351 for (i = 1; i < elf_numsections (output_bfd); i++)
9352 {
9353 Elf_Internal_Shdr *hdr
9354 = elf_elfsections (output_bfd)[i];
9355 if (hdr->sh_type == type)
9356 {
9357 if (dyn.d_tag == DT_RELSZ
9358 || dyn.d_tag == DT_RELASZ)
9359 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 9360 else if ((ufile_ptr) hdr->sh_offset
9361 <= dyn.d_un.d_val - 1)
229fcec5
MM		 9362 dyn.d_un.d_val = hdr->sh_offset;
9363 }
9364 }
9365 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9366 }
252b5132 9367 break;
88f7bcd5
NC		 9368
9369 /* Set the bottom bit of DT_INIT/FINI if the
9370 corresponding function is Thumb. */
9371 case DT_INIT:
9372 name = info->init_function;
9373 goto get_sym;
9374 case DT_FINI:
9375 name = info->fini_function;
9376 get_sym:
9377 /* If it wasn't set by elf_bfd_final_link
4cc11e76 9378 then there is nothing to adjust. */
88f7bcd5
NC		 9379 if (dyn.d_un.d_val != 0)
9380 {
9381 struct elf_link_hash_entry * eh;
9382
9383 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 9384 FALSE, FALSE, TRUE);
88f7bcd5
NC		 9385 if (eh != (struct elf_link_hash_entry *) NULL
9386 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
9387 {
9388 dyn.d_un.d_val |= 1;
b34976b6 9389 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 9390 }
9391 }
9392 break;
252b5132
RH		 9393 }
9394 }
9395
24a1ba0f 9396 /* Fill in the first entry in the procedure linkage table. */
e5a52504 9397 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 9398 {
00a97672
RS		 9399 const bfd_vma *plt0_entry;
9400 bfd_vma got_address, plt_address, got_displacement;
9401
9402 /* Calculate the addresses of the GOT and PLT. */
9403 got_address = sgot->output_section->vma + sgot->output_offset;
9404 plt_address = splt->output_section->vma + splt->output_offset;
9405
9406 if (htab->vxworks_p)
9407 {
9408 /* The VxWorks GOT is relocated by the dynamic linker.
9409 Therefore, we must emit relocations rather than simply
9410 computing the values now. */
9411 Elf_Internal_Rela rel;
9412
9413 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 9414 put_arm_insn (htab, output_bfd, plt0_entry[0],
9415 splt->contents + 0);
9416 put_arm_insn (htab, output_bfd, plt0_entry[1],
9417 splt->contents + 4);
9418 put_arm_insn (htab, output_bfd, plt0_entry[2],
9419 splt->contents + 8);
00a97672
RS		 9420 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
9421
9422 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
9423 rel.r_offset = plt_address + 12;
9424 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9425 rel.r_addend = 0;
9426 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
9427 htab->srelplt2->contents);
9428 }
9429 else
9430 {
9431 got_displacement = got_address - (plt_address + 16);
9432
9433 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 9434 put_arm_insn (htab, output_bfd, plt0_entry[0],
9435 splt->contents + 0);
9436 put_arm_insn (htab, output_bfd, plt0_entry[1],
9437 splt->contents + 4);
9438 put_arm_insn (htab, output_bfd, plt0_entry[2],
9439 splt->contents + 8);
9440 put_arm_insn (htab, output_bfd, plt0_entry[3],
9441 splt->contents + 12);
5e681ec4 9442
5e681ec4 9443#ifdef FOUR_WORD_PLT
00a97672
RS		 9444 /* The displacement value goes in the otherwise-unused
9445 last word of the second entry. */
9446 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 9447#else
00a97672 9448 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 9449#endif
00a97672 9450 }
f7a74f8c 9451 }
252b5132
RH		 9452
9453 /* UnixWare sets the entsize of .plt to 4, although that doesn't
9454 really seem like the right value. */
74541ad4
AM		 9455 if (splt->output_section->owner == output_bfd)
9456 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 9457
9458 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
9459 {
9460 /* Correct the .rel(a).plt.unloaded relocations. They will have
9461 incorrect symbol indexes. */
9462 int num_plts;
eed62c48 9463 unsigned char *p;
00a97672
RS		 9464
9465 num_plts = ((htab->splt->size - htab->plt_header_size)
9466 / htab->plt_entry_size);
9467 p = htab->srelplt2->contents + RELOC_SIZE (htab);
9468
9469 for (; num_plts; num_plts--)
9470 {
9471 Elf_Internal_Rela rel;
9472
9473 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9474 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9475 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9476 p += RELOC_SIZE (htab);
9477
9478 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9479 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9480 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9481 p += RELOC_SIZE (htab);
9482 }
9483 }
252b5132
RH		 9484 }
9485
9486 /* Fill in the first three entries in the global offset table. */
229fcec5 9487 if (sgot)
252b5132 9488 {
229fcec5
MM		 9489 if (sgot->size > 0)
9490 {
9491 if (sdyn == NULL)
9492 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
9493 else
9494 bfd_put_32 (output_bfd,
9495 sdyn->output_section->vma + sdyn->output_offset,
9496 sgot->contents);
9497 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
9498 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
9499 }
252b5132 9500
229fcec5
MM		 9501 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
9502 }
252b5132 9503
b34976b6 9504 return TRUE;
252b5132
RH		 9505}
9506
ba96a88f 9507static void
57e8b36a 9508elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 9509{
9b485d32 9510 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 9511 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 9512
9513 i_ehdrp = elf_elfheader (abfd);
9514
94a3258f
PB		 9515 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
9516 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
9517 else
9518 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 9519 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 9520
93204d3a
PB		 9521 if (link_info)
9522 {
9523 globals = elf32_arm_hash_table (link_info);
9524 if (globals->byteswap_code)
9525 i_ehdrp->e_flags |= EF_ARM_BE8;
9526 }
ba96a88f
NC		 9527}
9528
99e4ae17 9529static enum elf_reloc_type_class
57e8b36a 9530elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 9531{
f51e552e 9532 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 9533 {
9534 case R_ARM_RELATIVE:
9535 return reloc_class_relative;
9536 case R_ARM_JUMP_SLOT:
9537 return reloc_class_plt;
9538 case R_ARM_COPY:
9539 return reloc_class_copy;
9540 default:
9541 return reloc_class_normal;
9542 }
9543}
9544
e16bb312
NC		 9545/* Set the right machine number for an Arm ELF file. */
9546
9547static bfd_boolean
57e8b36a 9548elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 9549{
9550 if (hdr->sh_type == SHT_NOTE)
9551 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
9552
9553 return TRUE;
9554}
9555
e489d0ae 9556static void
57e8b36a 9557elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 9558{
5a6c6817 9559 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 9560}
9561
40a18ebd
NC		 9562/* Return TRUE if this is an unwinding table entry. */
9563
9564static bfd_boolean
9565is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
9566{
0112cd26
NC		 9567 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
9568 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 9569}
9570
9571
9572/* Set the type and flags for an ARM section. We do this by
9573 the section name, which is a hack, but ought to work. */
9574
9575static bfd_boolean
9576elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
9577{
9578 const char * name;
9579
9580 name = bfd_get_section_name (abfd, sec);
9581
9582 if (is_arm_elf_unwind_section_name (abfd, name))
9583 {
9584 hdr->sh_type = SHT_ARM_EXIDX;
9585 hdr->sh_flags |= SHF_LINK_ORDER;
9586 }
9587 return TRUE;
9588}
9589
6dc132d9
L		 9590/* Handle an ARM specific section when reading an object file. This is
9591 called when bfd_section_from_shdr finds a section with an unknown
9592 type. */
40a18ebd
NC		 9593
9594static bfd_boolean
9595elf32_arm_section_from_shdr (bfd *abfd,
9596 Elf_Internal_Shdr * hdr,
6dc132d9
L		 9597 const char *name,
9598 int shindex)
40a18ebd
NC		 9599{
9600 /* There ought to be a place to keep ELF backend specific flags, but
9601 at the moment there isn't one. We just keep track of the
9602 sections by their name, instead. Fortunately, the ABI gives
9603 names for all the ARM specific sections, so we will probably get
9604 away with this. */
9605 switch (hdr->sh_type)
9606 {
9607 case SHT_ARM_EXIDX:
0951f019
RE		 9608 case SHT_ARM_PREEMPTMAP:
9609 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 9610 break;
9611
9612 default:
9613 return FALSE;
9614 }
9615
6dc132d9 9616 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 9617 return FALSE;
9618
9619 return TRUE;
9620}
e489d0ae 9621
8e3de13a
NC		 9622/* A structure used to record a list of sections, independently
9623 of the next and prev fields in the asection structure. */
9624typedef struct section_list
9625{
9626 asection * sec;
9627 struct section_list * next;
9628 struct section_list * prev;
9629}
9630section_list;
9631
9632/* Unfortunately we need to keep a list of sections for which
9633 an _arm_elf_section_data structure has been allocated. This
9634 is because it is possible for functions like elf32_arm_write_section
9635 to be called on a section which has had an elf_data_structure
9636 allocated for it (and so the used_by_bfd field is valid) but
9637 for which the ARM extended version of this structure - the
9638 _arm_elf_section_data structure - has not been allocated. */
9639static section_list * sections_with_arm_elf_section_data = NULL;
9640
9641static void
957c6e41 9642record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 9643{
9644 struct section_list * entry;
9645
957c6e41 9646 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 9647 if (entry == NULL)
9648 return;
9649 entry->sec = sec;
9650 entry->next = sections_with_arm_elf_section_data;
9651 entry->prev = NULL;
9652 if (entry->next != NULL)
9653 entry->next->prev = entry;
9654 sections_with_arm_elf_section_data = entry;
9655}
9656
44444f50
NC		 9657static struct section_list *
9658find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 9659{
9660 struct section_list * entry;
bd4aae00 9661 static struct section_list * last_entry = NULL;
8e3de13a 9662
bd4aae00
NC		 9663 /* This is a short cut for the typical case where the sections are added
9664 to the sections_with_arm_elf_section_data list in forward order and
9665 then looked up here in backwards order. This makes a real difference
9666 to the ld-srec/sec64k.exp linker test. */
44444f50 9667 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 9668 if (last_entry != NULL)
9669 {
9670 if (last_entry->sec == sec)
44444f50
NC		 9671 entry = last_entry;
9672 else if (last_entry->next != NULL
9673 && last_entry->next->sec == sec)
9674 entry = last_entry->next;
bd4aae00 9675 }
44444f50
NC		 9676
9677 for (; entry; entry = entry->next)
8e3de13a 9678 if (entry->sec == sec)
44444f50 9679 break;
bd4aae00 9680
44444f50
NC		 9681 if (entry)
9682 /* Record the entry prior to this one - it is the entry we are most
9683 likely to want to locate next time. Also this way if we have been
9684 called from unrecord_section_with_arm_elf_section_data() we will not
9685 be caching a pointer that is about to be freed. */
9686 last_entry = entry->prev;
9687
9688 return entry;
9689}
9690
9691static _arm_elf_section_data *
9692get_arm_elf_section_data (asection * sec)
9693{
9694 struct section_list * entry;
9695
9696 entry = find_arm_elf_section_entry (sec);
9697
9698 if (entry)
9699 return elf32_arm_section_data (entry->sec);
9700 else
9701 return NULL;
8e3de13a
NC		 9702}
9703
9704static void
9705unrecord_section_with_arm_elf_section_data (asection * sec)
9706{
9707 struct section_list * entry;
9708
44444f50
NC		 9709 entry = find_arm_elf_section_entry (sec);
9710
9711 if (entry)
9712 {
9713 if (entry->prev != NULL)
9714 entry->prev->next = entry->next;
9715 if (entry->next != NULL)
9716 entry->next->prev = entry->prev;
9717 if (entry == sections_with_arm_elf_section_data)
9718 sections_with_arm_elf_section_data = entry->next;
9719 free (entry);
9720 }
8e3de13a
NC		 9721}
9722
e489d0ae 9723
4e617b1e
PB		 9724typedef struct
9725{
9726 void *finfo;
9727 struct bfd_link_info *info;
91a5743d
PB		 9728 asection *sec;
9729 int sec_shndx;
4e617b1e
PB		 9730 bfd_boolean (*func) (void *, const char *, Elf_Internal_Sym *,
9731 asection *, struct elf_link_hash_entry *);
9732} output_arch_syminfo;
9733
9734enum map_symbol_type
9735{
9736 ARM_MAP_ARM,
9737 ARM_MAP_THUMB,
9738 ARM_MAP_DATA
9739};
9740
9741
9742/* Output a single PLT mapping symbol. */
9743
9744static bfd_boolean
9745elf32_arm_ouput_plt_map_sym (output_arch_syminfo *osi,
9746 enum map_symbol_type type,
9747 bfd_vma offset)
9748{
9749 static const char *names[3] = {"$a", "$t", "$d"};
9750 struct elf32_arm_link_hash_table *htab;
9751 Elf_Internal_Sym sym;
9752
9753 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 9754 sym.st_value = osi->sec->output_section->vma
9755 + osi->sec->output_offset
9756 + offset;
4e617b1e
PB		 9757 sym.st_size = 0;
9758 sym.st_other = 0;
9759 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d
PB		 9760 sym.st_shndx = osi->sec_shndx;
9761 if (!osi->func (osi->finfo, names[type], &sym, osi->sec, NULL))
4e617b1e
PB		 9762 return FALSE;
9763 return TRUE;
9764}
9765
9766
9767/* Output mapping symbols for PLT entries associated with H. */
9768
9769static bfd_boolean
9770elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
9771{
9772 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
9773 struct elf32_arm_link_hash_table *htab;
9774 struct elf32_arm_link_hash_entry *eh;
9775 bfd_vma addr;
9776
9777 htab = elf32_arm_hash_table (osi->info);
9778
9779 if (h->root.type == bfd_link_hash_indirect)
9780 return TRUE;
9781
9782 if (h->root.type == bfd_link_hash_warning)
9783 /* When warning symbols are created, they **replace** the "real"
9784 entry in the hash table, thus we never get to see the real
9785 symbol in a hash traversal. So look at it now. */
9786 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9787
9788 if (h->plt.offset == (bfd_vma) -1)
9789 return TRUE;
9790
9791 eh = (struct elf32_arm_link_hash_entry *) h;
9792 addr = h->plt.offset;
9793 if (htab->symbian_p)
9794 {
9795 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9796 return FALSE;
9797 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 4))
9798 return FALSE;
9799 }
9800 else if (htab->vxworks_p)
9801 {
9802 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9803 return FALSE;
9804 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 8))
9805 return FALSE;
9806 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr + 12))
9807 return FALSE;
9808 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 20))
9809 return FALSE;
9810 }
9811 else
9812 {
bd97cb95
DJ		 9813 bfd_signed_vma thumb_refs;
9814
9815 thumb_refs = eh->plt_thumb_refcount;
9816 if (!htab->use_blx)
9817 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 9818
bd97cb95 9819 if (thumb_refs > 0)
4e617b1e
PB		 9820 {
9821 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_THUMB, addr - 4))
9822 return FALSE;
9823 }
9824#ifdef FOUR_WORD_PLT
9825 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9826 return FALSE;
9827 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 12))
9828 return FALSE;
9829#else
9830 /* A three-word PLT with no Thumb thunk contains only Arm code,
9831 so only need to output a mapping symbol for the first PLT entry and
9832 entries with thumb thunks. */
bd97cb95 9833 if (thumb_refs > 0 || addr == 20)
4e617b1e
PB		 9834 {
9835 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9836 return FALSE;
9837 }
9838#endif
9839 }
9840
9841 return TRUE;
9842}
9843
9844
91a5743d 9845/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 9846
9847static bfd_boolean
9848elf32_arm_output_arch_local_syms (bfd *output_bfd,
9849 struct bfd_link_info *info,
9850 void *finfo, bfd_boolean (*func) (void *, const char *,
9851 Elf_Internal_Sym *,
9852 asection *,
9853 struct elf_link_hash_entry *))
9854{
9855 output_arch_syminfo osi;
9856 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 9857 bfd_vma offset;
9858 bfd_size_type size;
4e617b1e
PB		 9859
9860 htab = elf32_arm_hash_table (info);
4e617b1e 9861 check_use_blx(htab);
91a5743d 9862
4e617b1e
PB		 9863 osi.finfo = finfo;
9864 osi.info = info;
9865 osi.func = func;
91a5743d
PB		 9866
9867 /* ARM->Thumb glue. */
9868 if (htab->arm_glue_size > 0)
9869 {
9870 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9871 ARM2THUMB_GLUE_SECTION_NAME);
9872
9873 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9874 (output_bfd, osi.sec->output_section);
9875 if (info->shared || htab->root.is_relocatable_executable
9876 || htab->pic_veneer)
9877 size = ARM2THUMB_PIC_GLUE_SIZE;
9878 else if (htab->use_blx)
9879 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
9880 else
9881 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 9882
91a5743d
PB		 9883 for (offset = 0; offset < htab->arm_glue_size; offset += size)
9884 {
9885 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset);
9886 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
9887 }
9888 }
9889
9890 /* Thumb->ARM glue. */
9891 if (htab->thumb_glue_size > 0)
9892 {
9893 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9894 THUMB2ARM_GLUE_SECTION_NAME);
9895
9896 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9897 (output_bfd, osi.sec->output_section);
9898 size = THUMB2ARM_GLUE_SIZE;
9899
9900 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
9901 {
9902 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_THUMB, offset);
9903 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset + 4);
9904 }
9905 }
9906
845b51d6
PB		 9907 /* ARMv4 BX veneers. */
9908 if (htab->bx_glue_size > 0)
9909 {
9910 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9911 ARM_BX_GLUE_SECTION_NAME);
9912
9913 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9914 (output_bfd, osi.sec->output_section);
9915
9916 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0);
9917 }
9918
91a5743d
PB		 9919 /* Finally, output mapping symbols for the PLT. */
9920 if (!htab->splt || htab->splt->size == 0)
9921 return TRUE;
9922
9923 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
9924 htab->splt->output_section);
9925 osi.sec = htab->splt;
4e617b1e
PB		 9926 /* Output mapping symbols for the plt header. SymbianOS does not have a
9927 plt header. */
9928 if (htab->vxworks_p)
9929 {
9930 /* VxWorks shared libraries have no PLT header. */
9931 if (!info->shared)
9932 {
9933 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9934 return FALSE;
9935 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 12))
9936 return FALSE;
9937 }
9938 }
9939 else if (!htab->symbian_p)
9940 {
9941 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9942 return FALSE;
9943#ifndef FOUR_WORD_PLT
9944 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 16))
9945 return FALSE;
9946#endif
9947 }
9948
9949 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
9950 return TRUE;
9951}
9952
e489d0ae
PB		 9953/* Allocate target specific section data. */
9954
9955static bfd_boolean
9956elf32_arm_new_section_hook (bfd *abfd, asection *sec)
9957{
f592407e
AM		 9958 if (!sec->used_by_bfd)
9959 {
9960 _arm_elf_section_data *sdata;
9961 bfd_size_type amt = sizeof (*sdata);
e489d0ae 9962
f592407e
AM		 9963 sdata = bfd_zalloc (abfd, amt);
9964 if (sdata == NULL)
9965 return FALSE;
9966 sec->used_by_bfd = sdata;
9967 }
e489d0ae 9968
957c6e41 9969 record_section_with_arm_elf_section_data (sec);
8e3de13a 9970
e489d0ae
PB		 9971 return _bfd_elf_new_section_hook (abfd, sec);
9972}
9973
9974
9975/* Used to order a list of mapping symbols by address. */
9976
9977static int
9978elf32_arm_compare_mapping (const void * a, const void * b)
9979{
7f6a71ff
JM		 9980 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
9981 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
9982
9983 if (amap->vma > bmap->vma)
9984 return 1;
9985 else if (amap->vma < bmap->vma)
9986 return -1;
9987 else if (amap->type > bmap->type)
9988 /* Ensure results do not depend on the host qsort for objects with
9989 multiple mapping symbols at the same address by sorting on type
9990 after vma. */
9991 return 1;
9992 else if (amap->type < bmap->type)
9993 return -1;
9994 else
9995 return 0;
e489d0ae
PB		 9996}
9997
9998
9999/* Do code byteswapping. Return FALSE afterwards so that the section is
10000 written out as normal. */
10001
10002static bfd_boolean
c7b8f16e
JB		 10003elf32_arm_write_section (bfd *output_bfd,
10004 struct bfd_link_info *link_info, asection *sec,
e489d0ae
PB		 10005 bfd_byte *contents)
10006{
c7b8f16e 10007 int mapcount, errcount;
8e3de13a 10008 _arm_elf_section_data *arm_data;
c7b8f16e 10009 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 10010 elf32_arm_section_map *map;
c7b8f16e 10011 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 10012 bfd_vma ptr;
10013 bfd_vma end;
c7b8f16e 10014 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae
PB		 10015 bfd_byte tmp;
10016 int i;
57e8b36a 10017
8e3de13a
NC		 10018 /* If this section has not been allocated an _arm_elf_section_data
10019 structure then we cannot record anything. */
10020 arm_data = get_arm_elf_section_data (sec);
10021 if (arm_data == NULL)
10022 return FALSE;
10023
10024 mapcount = arm_data->mapcount;
10025 map = arm_data->map;
c7b8f16e
JB		 10026 errcount = arm_data->erratumcount;
10027
10028 if (errcount != 0)
10029 {
10030 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
10031
10032 for (errnode = arm_data->erratumlist; errnode != 0;
10033 errnode = errnode->next)
10034 {
10035 bfd_vma index = errnode->vma - offset;
10036
10037 switch (errnode->type)
10038 {
10039 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
10040 {
10041 bfd_vma branch_to_veneer;
10042 /* Original condition code of instruction, plus bit mask for
10043 ARM B instruction. */
10044 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
10045 | 0x0a000000;
10046
10047 /* The instruction is before the label. */
10048 index -= 4;
10049
10050 /* Above offset included in -4 below. */
10051 branch_to_veneer = errnode->u.b.veneer->vma
10052 - errnode->vma - 4;
10053
10054 if ((signed) branch_to_veneer < -(1 << 25)
10055 || (signed) branch_to_veneer >= (1 << 25))
10056 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
10057 "range"), output_bfd);
10058
10059 insn |= (branch_to_veneer >> 2) & 0xffffff;
10060 contents[endianflip ^ index] = insn & 0xff;
10061 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
10062 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
10063 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
10064 }
10065 break;
10066
10067 case VFP11_ERRATUM_ARM_VENEER:
10068 {
10069 bfd_vma branch_from_veneer;
10070 unsigned int insn;
10071
10072 /* Take size of veneer into account. */
10073 branch_from_veneer = errnode->u.v.branch->vma
10074 - errnode->vma - 12;
10075
10076 if ((signed) branch_from_veneer < -(1 << 25)
10077 || (signed) branch_from_veneer >= (1 << 25))
10078 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
10079 "range"), output_bfd);
10080
10081 /* Original instruction. */
10082 insn = errnode->u.v.branch->u.b.vfp_insn;
10083 contents[endianflip ^ index] = insn & 0xff;
10084 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
10085 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
10086 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
10087
10088 /* Branch back to insn after original insn. */
10089 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
10090 contents[endianflip ^ (index + 4)] = insn & 0xff;
10091 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
10092 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
10093 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
10094 }
10095 break;
10096
10097 default:
10098 abort ();
10099 }
10100 }
10101 }
e489d0ae
PB		 10102
10103 if (mapcount == 0)
10104 return FALSE;
10105
c7b8f16e 10106 if (globals->byteswap_code)
e489d0ae 10107 {
c7b8f16e 10108 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 10109
c7b8f16e
JB		 10110 ptr = map[0].vma;
10111 for (i = 0; i < mapcount; i++)
10112 {
10113 if (i == mapcount - 1)
10114 end = sec->size;
10115 else
10116 end = map[i + 1].vma;
e489d0ae 10117
c7b8f16e 10118 switch (map[i].type)
e489d0ae 10119 {
c7b8f16e
JB		 10120 case 'a':
10121 /* Byte swap code words. */
10122 while (ptr + 3 < end)
10123 {
10124 tmp = contents[ptr];
10125 contents[ptr] = contents[ptr + 3];
10126 contents[ptr + 3] = tmp;
10127 tmp = contents[ptr + 1];
10128 contents[ptr + 1] = contents[ptr + 2];
10129 contents[ptr + 2] = tmp;
10130 ptr += 4;
10131 }
10132 break;
e489d0ae 10133
c7b8f16e
JB		 10134 case 't':
10135 /* Byte swap code halfwords. */
10136 while (ptr + 1 < end)
10137 {
10138 tmp = contents[ptr];
10139 contents[ptr] = contents[ptr + 1];
10140 contents[ptr + 1] = tmp;
10141 ptr += 2;
10142 }
10143 break;
10144
10145 case 'd':
10146 /* Leave data alone. */
10147 break;
10148 }
10149 ptr = end;
10150 }
e489d0ae 10151 }
8e3de13a 10152
93204d3a 10153 free (map);
8e3de13a 10154 arm_data->mapcount = 0;
c7b8f16e 10155 arm_data->mapsize = 0;
8e3de13a
NC		 10156 arm_data->map = NULL;
10157 unrecord_section_with_arm_elf_section_data (sec);
10158
e489d0ae
PB		 10159 return FALSE;
10160}
10161
957c6e41
NC		 10162static void
10163unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
10164 asection * sec,
10165 void * ignore ATTRIBUTE_UNUSED)
10166{
10167 unrecord_section_with_arm_elf_section_data (sec);
10168}
10169
10170static bfd_boolean
10171elf32_arm_close_and_cleanup (bfd * abfd)
10172{
b25e3d87
L		 10173 if (abfd->sections)
10174 bfd_map_over_sections (abfd,
10175 unrecord_section_via_map_over_sections,
10176 NULL);
957c6e41
NC		 10177
10178 return _bfd_elf_close_and_cleanup (abfd);
10179}
10180
b25e3d87
L		 10181static bfd_boolean
10182elf32_arm_bfd_free_cached_info (bfd * abfd)
10183{
10184 if (abfd->sections)
10185 bfd_map_over_sections (abfd,
10186 unrecord_section_via_map_over_sections,
10187 NULL);
10188
10189 return _bfd_free_cached_info (abfd);
10190}
10191
b7693d02
DJ		 10192/* Display STT_ARM_TFUNC symbols as functions. */
10193
10194static void
10195elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
10196 asymbol *asym)
10197{
10198 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
10199
10200 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
10201 elfsym->symbol.flags |= BSF_FUNCTION;
10202}
10203
0beaef2b
PB		 10204
10205/* Mangle thumb function symbols as we read them in. */
10206
8384fb8f 10207static bfd_boolean
0beaef2b
PB		 10208elf32_arm_swap_symbol_in (bfd * abfd,
10209 const void *psrc,
10210 const void *pshn,
10211 Elf_Internal_Sym *dst)
10212{
8384fb8f
AM		 10213 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
10214 return FALSE;
0beaef2b
PB		 10215
10216 /* New EABI objects mark thumb function symbols by setting the low bit of
10217 the address. Turn these into STT_ARM_TFUNC. */
10218 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
10219 && (dst->st_value & 1))
10220 {
10221 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
10222 dst->st_value &= ~(bfd_vma) 1;
10223 }
8384fb8f 10224 return TRUE;
0beaef2b
PB		 10225}
10226
10227
10228/* Mangle thumb function symbols as we write them out. */
10229
10230static void
10231elf32_arm_swap_symbol_out (bfd *abfd,
10232 const Elf_Internal_Sym *src,
10233 void *cdst,
10234 void *shndx)
10235{
10236 Elf_Internal_Sym newsym;
10237
10238 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
10239 of the address set, as per the new EABI. We do this unconditionally
10240 because objcopy does not set the elf header flags until after
10241 it writes out the symbol table. */
10242 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
10243 {
10244 newsym = *src;
10245 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 10246 if (newsym.st_shndx != SHN_UNDEF)
10247 {
10248 /* Do this only for defined symbols. At link type, the static
10249 linker will simulate the work of dynamic linker of resolving
10250 symbols and will carry over the thumbness of found symbols to
10251 the output symbol table. It's not clear how it happens, but
b0fead2b 10252 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 10253 runtime, and writing '1' for them will be confusing for users
10254 and possibly for dynamic linker itself.
10255 */
10256 newsym.st_value |= 1;
10257 }
0beaef2b
PB		 10258
10259 src = &newsym;
10260 }
10261 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
10262}
10263
b294bdf8
MM		 10264/* Add the PT_ARM_EXIDX program header. */
10265
10266static bfd_boolean
10267elf32_arm_modify_segment_map (bfd *abfd,
10268 struct bfd_link_info *info ATTRIBUTE_UNUSED)
10269{
10270 struct elf_segment_map *m;
10271 asection *sec;
10272
10273 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10274 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10275 {
10276 /* If there is already a PT_ARM_EXIDX header, then we do not
10277 want to add another one. This situation arises when running
10278 "strip"; the input binary already has the header. */
10279 m = elf_tdata (abfd)->segment_map;
10280 while (m && m->p_type != PT_ARM_EXIDX)
10281 m = m->next;
10282 if (!m)
10283 {
10284 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
10285 if (m == NULL)
10286 return FALSE;
10287 m->p_type = PT_ARM_EXIDX;
10288 m->count = 1;
10289 m->sections[0] = sec;
10290
10291 m->next = elf_tdata (abfd)->segment_map;
10292 elf_tdata (abfd)->segment_map = m;
10293 }
10294 }
10295
10296 return TRUE;
10297}
10298
10299/* We may add a PT_ARM_EXIDX program header. */
10300
10301static int
a6b96beb
AM		 10302elf32_arm_additional_program_headers (bfd *abfd,
10303 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 10304{
10305 asection *sec;
10306
10307 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10308 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10309 return 1;
10310 else
10311 return 0;
10312}
10313
fcb93ecf
PB		 10314/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
10315static bfd_boolean
10316elf32_arm_is_function_type (unsigned int type)
10317{
10318 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
10319}
10320
0beaef2b
PB		 10321/* We use this to override swap_symbol_in and swap_symbol_out. */
10322const struct elf_size_info elf32_arm_size_info = {
10323 sizeof (Elf32_External_Ehdr),
10324 sizeof (Elf32_External_Phdr),
10325 sizeof (Elf32_External_Shdr),
10326 sizeof (Elf32_External_Rel),
10327 sizeof (Elf32_External_Rela),
10328 sizeof (Elf32_External_Sym),
10329 sizeof (Elf32_External_Dyn),
10330 sizeof (Elf_External_Note),
10331 4,
10332 1,
10333 32, 2,
10334 ELFCLASS32, EV_CURRENT,
10335 bfd_elf32_write_out_phdrs,
10336 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 10337 bfd_elf32_checksum_contents,
0beaef2b
PB		 10338 bfd_elf32_write_relocs,
10339 elf32_arm_swap_symbol_in,
10340 elf32_arm_swap_symbol_out,
10341 bfd_elf32_slurp_reloc_table,
10342 bfd_elf32_slurp_symbol_table,
10343 bfd_elf32_swap_dyn_in,
10344 bfd_elf32_swap_dyn_out,
10345 bfd_elf32_swap_reloc_in,
10346 bfd_elf32_swap_reloc_out,
10347 bfd_elf32_swap_reloca_in,
10348 bfd_elf32_swap_reloca_out
10349};
10350
252b5132
RH		 10351#define ELF_ARCH bfd_arch_arm
10352#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 10353#ifdef __QNXTARGET__
10354#define ELF_MAXPAGESIZE 0x1000
10355#else
f21f3fe0 10356#define ELF_MAXPAGESIZE 0x8000
d0facd1b 10357#endif
b1342370 10358#define ELF_MINPAGESIZE 0x1000
24718e3b 10359#define ELF_COMMONPAGESIZE 0x1000
252b5132 10360
ba93b8ac
DJ		 10361#define bfd_elf32_mkobject elf32_arm_mkobject
10362
99e4ae17
AJ		 10363#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
10364#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 10365#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
10366#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
10367#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
dc810e39 10368#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 10369#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 10370#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 10371#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 10372#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 10373#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 10374#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 10375#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
252b5132
RH		 10376
10377#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
10378#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 10379#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 10380#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
10381#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 10382#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 10383#define elf_backend_write_section elf32_arm_write_section
252b5132 10384#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 10385#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 10386#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
10387#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
10388#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 10389#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 10390#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 10391#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 10392#define elf_backend_object_p elf32_arm_object_p
e16bb312 10393#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 10394#define elf_backend_fake_sections elf32_arm_fake_sections
10395#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 10396#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 10397#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 10398#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 10399#define elf_backend_size_info elf32_arm_size_info
b294bdf8
MM		 10400#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
10401#define elf_backend_additional_program_headers \
10402 elf32_arm_additional_program_headers
4e617b1e
PB		 10403#define elf_backend_output_arch_local_syms \
10404 elf32_arm_output_arch_local_syms
a4fd1a8e
PB		 10405#define elf_backend_begin_write_processing \
10406 elf32_arm_begin_write_processing
fcb93ecf 10407#define elf_backend_is_function_type elf32_arm_is_function_type
252b5132 10408
5e681ec4 10409#define elf_backend_can_refcount 1
252b5132
RH		 10410#define elf_backend_can_gc_sections 1
10411#define elf_backend_plt_readonly 1
10412#define elf_backend_want_got_plt 1
10413#define elf_backend_want_plt_sym 0
4e7fd91e
PB		 10414#define elf_backend_may_use_rel_p 1
10415#define elf_backend_may_use_rela_p 0
10416#define elf_backend_default_use_rela_p 0
252b5132 10417
04f7c78d 10418#define elf_backend_got_header_size 12
04f7c78d 10419
104d59d1
JM		 10420#undef elf_backend_obj_attrs_vendor
10421#define elf_backend_obj_attrs_vendor "aeabi"
10422#undef elf_backend_obj_attrs_section
10423#define elf_backend_obj_attrs_section ".ARM.attributes"
10424#undef elf_backend_obj_attrs_arg_type
10425#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
10426#undef elf_backend_obj_attrs_section_type
10427#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
10428
252b5132 10429#include "elf32-target.h"
7f266840 10430
4e7fd91e
PB		 10431/* VxWorks Targets */
10432
10433#undef TARGET_LITTLE_SYM
10434#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
10435#undef TARGET_LITTLE_NAME
10436#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
10437#undef TARGET_BIG_SYM
10438#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
10439#undef TARGET_BIG_NAME
10440#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
10441
10442/* Like elf32_arm_link_hash_table_create -- but overrides
10443 appropriately for VxWorks. */
10444static struct bfd_link_hash_table *
10445elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
10446{
10447 struct bfd_link_hash_table *ret;
10448
10449 ret = elf32_arm_link_hash_table_create (abfd);
10450 if (ret)
10451 {
10452 struct elf32_arm_link_hash_table *htab
00a97672 10453 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 10454 htab->use_rel = 0;
00a97672 10455 htab->vxworks_p = 1;
4e7fd91e
PB		 10456 }
10457 return ret;
10458}
10459
00a97672
RS		 10460static void
10461elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
10462{
10463 elf32_arm_final_write_processing (abfd, linker);
10464 elf_vxworks_final_write_processing (abfd, linker);
10465}
10466
4e7fd91e
PB		 10467#undef elf32_bed
10468#define elf32_bed elf32_arm_vxworks_bed
10469
10470#undef bfd_elf32_bfd_link_hash_table_create
10471#define bfd_elf32_bfd_link_hash_table_create \
10472 elf32_arm_vxworks_link_hash_table_create
00a97672
RS		 10473#undef elf_backend_add_symbol_hook
10474#define elf_backend_add_symbol_hook \
10475 elf_vxworks_add_symbol_hook
10476#undef elf_backend_final_write_processing
10477#define elf_backend_final_write_processing \
10478 elf32_arm_vxworks_final_write_processing
10479#undef elf_backend_emit_relocs
10480#define elf_backend_emit_relocs \
10481 elf_vxworks_emit_relocs
4e7fd91e
PB		 10482
10483#undef elf_backend_may_use_rel_p
00a97672 10484#define elf_backend_may_use_rel_p 0
4e7fd91e 10485#undef elf_backend_may_use_rela_p
00a97672 10486#define elf_backend_may_use_rela_p 1
4e7fd91e 10487#undef elf_backend_default_use_rela_p
00a97672 10488#define elf_backend_default_use_rela_p 1
00a97672
RS		 10489#undef elf_backend_want_plt_sym
10490#define elf_backend_want_plt_sym 1
10491#undef ELF_MAXPAGESIZE
10492#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 10493
10494#include "elf32-target.h"
10495
10496
7f266840
DJ		 10497/* Symbian OS Targets */
10498
10499#undef TARGET_LITTLE_SYM
10500#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
10501#undef TARGET_LITTLE_NAME
10502#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
10503#undef TARGET_BIG_SYM
10504#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
10505#undef TARGET_BIG_NAME
10506#define TARGET_BIG_NAME "elf32-bigarm-symbian"
10507
10508/* Like elf32_arm_link_hash_table_create -- but overrides
10509 appropriately for Symbian OS. */
10510static struct bfd_link_hash_table *
10511elf32_arm_symbian_link_hash_table_create (bfd *abfd)
10512{
10513 struct bfd_link_hash_table *ret;
10514
10515 ret = elf32_arm_link_hash_table_create (abfd);
10516 if (ret)
10517 {
10518 struct elf32_arm_link_hash_table *htab
10519 = (struct elf32_arm_link_hash_table *)ret;
10520 /* There is no PLT header for Symbian OS. */
10521 htab->plt_header_size = 0;
10522 /* The PLT entries are each three instructions. */
10523 htab->plt_entry_size = 4 * NUM_ELEM (elf32_arm_symbian_plt_entry);
10524 htab->symbian_p = 1;
33bfe774
JB		 10525 /* Symbian uses armv5t or above, so use_blx is always true. */
10526 htab->use_blx = 1;
67687978 10527 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 10528 }
10529 return ret;
10530}
10531
b35d266b 10532static const struct bfd_elf_special_section
551b43fd 10533elf32_arm_symbian_special_sections[] =
7f266840 10534{
5cd3778d
MM		 10535 /* In a BPABI executable, the dynamic linking sections do not go in
10536 the loadable read-only segment. The post-linker may wish to
10537 refer to these sections, but they are not part of the final
10538 program image. */
0112cd26
NC		 10539 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
10540 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
10541 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
10542 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
10543 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 10544 /* These sections do not need to be writable as the SymbianOS
10545 postlinker will arrange things so that no dynamic relocation is
10546 required. */
0112cd26
NC		 10547 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
10548 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
10549 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
10550 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 10551};
10552
c3c76620 10553static void
b34af79c 10554elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 10555 struct bfd_link_info *link_info)
c3c76620
MM		 10556{
10557 /* BPABI objects are never loaded directly by an OS kernel; they are
10558 processed by a postlinker first, into an OS-specific format. If
10559 the D_PAGED bit is set on the file, BFD will align segments on
10560 page boundaries, so that an OS can directly map the file. With
10561 BPABI objects, that just results in wasted space. In addition,
10562 because we clear the D_PAGED bit, map_sections_to_segments will
10563 recognize that the program headers should not be mapped into any
10564 loadable segment. */
10565 abfd->flags &= ~D_PAGED;
a4fd1a8e 10566 elf32_arm_begin_write_processing(abfd, link_info);
c3c76620 10567}
7f266840
DJ		 10568
10569static bfd_boolean
b34af79c 10570elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 10571 struct bfd_link_info *info)
7f266840
DJ		 10572{
10573 struct elf_segment_map *m;
10574 asection *dynsec;
10575
7f266840
DJ		 10576 /* BPABI shared libraries and executables should have a PT_DYNAMIC
10577 segment. However, because the .dynamic section is not marked
10578 with SEC_LOAD, the generic ELF code will not create such a
10579 segment. */
10580 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
10581 if (dynsec)
10582 {
8ded5a0f
AM		 10583 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
10584 if (m->p_type == PT_DYNAMIC)
10585 break;
10586
10587 if (m == NULL)
10588 {
10589 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
10590 m->next = elf_tdata (abfd)->segment_map;
10591 elf_tdata (abfd)->segment_map = m;
10592 }
7f266840
DJ		 10593 }
10594
b294bdf8
MM		 10595 /* Also call the generic arm routine. */
10596 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 10597}
10598
10599#undef elf32_bed
10600#define elf32_bed elf32_arm_symbian_bed
10601
10602/* The dynamic sections are not allocated on SymbianOS; the postlinker
10603 will process them and then discard them. */
10604#undef ELF_DYNAMIC_SEC_FLAGS
10605#define ELF_DYNAMIC_SEC_FLAGS \
10606 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
10607
10608#undef bfd_elf32_bfd_link_hash_table_create
10609#define bfd_elf32_bfd_link_hash_table_create \
10610 elf32_arm_symbian_link_hash_table_create
00a97672 10611#undef elf_backend_add_symbol_hook
7f266840 10612
29ef7005
L		 10613#undef elf_backend_special_sections
10614#define elf_backend_special_sections elf32_arm_symbian_special_sections
7f266840 10615
c3c76620
MM		 10616#undef elf_backend_begin_write_processing
10617#define elf_backend_begin_write_processing \
10618 elf32_arm_symbian_begin_write_processing
00a97672
RS		 10619#undef elf_backend_final_write_processing
10620#define elf_backend_final_write_processing \
10621 elf32_arm_final_write_processing
10622#undef elf_backend_emit_relocs
c3c76620 10623
7f266840
DJ		 10624#undef elf_backend_modify_segment_map
10625#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
10626
10627/* There is no .got section for BPABI objects, and hence no header. */
10628#undef elf_backend_got_header_size
10629#define elf_backend_got_header_size 0
10630
10631/* Similarly, there is no .got.plt section. */
10632#undef elf_backend_want_got_plt
10633#define elf_backend_want_got_plt 0
10634
4e7fd91e 10635#undef elf_backend_may_use_rel_p
00a97672 10636#define elf_backend_may_use_rel_p 1
4e7fd91e 10637#undef elf_backend_may_use_rela_p
00a97672 10638#define elf_backend_may_use_rela_p 0
4e7fd91e 10639#undef elf_backend_default_use_rela_p
00a97672 10640#define elf_backend_default_use_rela_p 0
00a97672
RS		 10641#undef elf_backend_want_plt_sym
10642#define elf_backend_want_plt_sym 0
10643#undef ELF_MAXPAGESIZE
10644#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 10645
7f266840 10646#include "elf32-target.h"
GDB Binutils - Deliverables
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