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* config.bfd: Add bfd_elf32_rx_be_ns_vec.
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
e6a6bb22 3 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840 263
0855e32b 264 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 265 0, /* rightshift */
0855e32b
NS		 266 2, /* size (0 = byte, 1 = short, 2 = long) */
267 32, /* bitsize */
7f266840
DJ		 268 FALSE, /* pc_relative */
269 0, /* bitpos */
0855e32b 270 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 271 bfd_elf_generic_reloc, /* special_function */
0855e32b 272 "R_ARM_TLS_DESC", /* name */
7f266840 273 FALSE, /* partial_inplace */
0855e32b
NS		 274 0xffffffff, /* src_mask */
275 0xffffffff, /* dst_mask */
7f266840
DJ		 276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
0855e32b
NS		 1355 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1356 0, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 32, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_bitfield,/* complain_on_overflow */
1362 NULL, /* special_function */
1363 "R_ARM_TLS_GOTDESC", /* name */
1364 TRUE, /* partial_inplace */
1365 0xffffffff, /* src_mask */
1366 0xffffffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 HOWTO (R_ARM_TLS_CALL, /* type */
1370 0, /* rightshift */
1371 2, /* size (0 = byte, 1 = short, 2 = long) */
1372 24, /* bitsize */
1373 FALSE, /* pc_relative */
1374 0, /* bitpos */
1375 complain_overflow_dont,/* complain_on_overflow */
1376 bfd_elf_generic_reloc, /* special_function */
1377 "R_ARM_TLS_CALL", /* name */
1378 FALSE, /* partial_inplace */
1379 0x00ffffff, /* src_mask */
1380 0x00ffffff, /* dst_mask */
1381 FALSE), /* pcrel_offset */
1382
1383 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1384 0, /* rightshift */
1385 2, /* size (0 = byte, 1 = short, 2 = long) */
1386 0, /* bitsize */
1387 FALSE, /* pc_relative */
1388 0, /* bitpos */
1389 complain_overflow_bitfield,/* complain_on_overflow */
1390 bfd_elf_generic_reloc, /* special_function */
1391 "R_ARM_TLS_DESCSEQ", /* name */
1392 FALSE, /* partial_inplace */
1393 0x00000000, /* src_mask */
1394 0x00000000, /* dst_mask */
1395 FALSE), /* pcrel_offset */
1396
1397 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1398 0, /* rightshift */
1399 2, /* size (0 = byte, 1 = short, 2 = long) */
1400 24, /* bitsize */
1401 FALSE, /* pc_relative */
1402 0, /* bitpos */
1403 complain_overflow_dont,/* complain_on_overflow */
1404 bfd_elf_generic_reloc, /* special_function */
1405 "R_ARM_THM_TLS_CALL", /* name */
1406 FALSE, /* partial_inplace */
1407 0x07ff07ff, /* src_mask */
1408 0x07ff07ff, /* dst_mask */
1409 FALSE), /* pcrel_offset */
c19d1205
ZW		 1410
1411 HOWTO (R_ARM_PLT32_ABS, /* type */
1412 0, /* rightshift */
1413 2, /* size (0 = byte, 1 = short, 2 = long) */
1414 32, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 bfd_elf_generic_reloc, /* special_function */
1419 "R_ARM_PLT32_ABS", /* name */
1420 FALSE, /* partial_inplace */
1421 0xffffffff, /* src_mask */
1422 0xffffffff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424
1425 HOWTO (R_ARM_GOT_ABS, /* type */
1426 0, /* rightshift */
1427 2, /* size (0 = byte, 1 = short, 2 = long) */
1428 32, /* bitsize */
1429 FALSE, /* pc_relative */
1430 0, /* bitpos */
1431 complain_overflow_dont,/* complain_on_overflow */
1432 bfd_elf_generic_reloc, /* special_function */
1433 "R_ARM_GOT_ABS", /* name */
1434 FALSE, /* partial_inplace */
1435 0xffffffff, /* src_mask */
1436 0xffffffff, /* dst_mask */
1437 FALSE), /* pcrel_offset */
1438
1439 HOWTO (R_ARM_GOT_PREL, /* type */
1440 0, /* rightshift */
1441 2, /* size (0 = byte, 1 = short, 2 = long) */
1442 32, /* bitsize */
1443 TRUE, /* pc_relative */
1444 0, /* bitpos */
1445 complain_overflow_dont, /* complain_on_overflow */
1446 bfd_elf_generic_reloc, /* special_function */
1447 "R_ARM_GOT_PREL", /* name */
1448 FALSE, /* partial_inplace */
1449 0xffffffff, /* src_mask */
1450 0xffffffff, /* dst_mask */
1451 TRUE), /* pcrel_offset */
1452
1453 HOWTO (R_ARM_GOT_BREL12, /* type */
1454 0, /* rightshift */
1455 2, /* size (0 = byte, 1 = short, 2 = long) */
1456 12, /* bitsize */
1457 FALSE, /* pc_relative */
1458 0, /* bitpos */
1459 complain_overflow_bitfield,/* complain_on_overflow */
1460 bfd_elf_generic_reloc, /* special_function */
1461 "R_ARM_GOT_BREL12", /* name */
1462 FALSE, /* partial_inplace */
1463 0x00000fff, /* src_mask */
1464 0x00000fff, /* dst_mask */
1465 FALSE), /* pcrel_offset */
1466
1467 HOWTO (R_ARM_GOTOFF12, /* type */
1468 0, /* rightshift */
1469 2, /* size (0 = byte, 1 = short, 2 = long) */
1470 12, /* bitsize */
1471 FALSE, /* pc_relative */
1472 0, /* bitpos */
1473 complain_overflow_bitfield,/* complain_on_overflow */
1474 bfd_elf_generic_reloc, /* special_function */
1475 "R_ARM_GOTOFF12", /* name */
1476 FALSE, /* partial_inplace */
1477 0x00000fff, /* src_mask */
1478 0x00000fff, /* dst_mask */
1479 FALSE), /* pcrel_offset */
1480
1481 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1482
1483 /* GNU extension to record C++ vtable member usage */
1484 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1485 0, /* rightshift */
1486 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1487 0, /* bitsize */
ba93b8ac
DJ		 1488 FALSE, /* pc_relative */
1489 0, /* bitpos */
c19d1205
ZW		 1490 complain_overflow_dont, /* complain_on_overflow */
1491 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1492 "R_ARM_GNU_VTENTRY", /* name */
1493 FALSE, /* partial_inplace */
1494 0, /* src_mask */
1495 0, /* dst_mask */
1496 FALSE), /* pcrel_offset */
1497
1498 /* GNU extension to record C++ vtable hierarchy */
1499 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1500 0, /* rightshift */
1501 2, /* size (0 = byte, 1 = short, 2 = long) */
1502 0, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont, /* complain_on_overflow */
1506 NULL, /* special_function */
1507 "R_ARM_GNU_VTINHERIT", /* name */
1508 FALSE, /* partial_inplace */
1509 0, /* src_mask */
1510 0, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512
1513 HOWTO (R_ARM_THM_JUMP11, /* type */
1514 1, /* rightshift */
1515 1, /* size (0 = byte, 1 = short, 2 = long) */
1516 11, /* bitsize */
1517 TRUE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_signed, /* complain_on_overflow */
1520 bfd_elf_generic_reloc, /* special_function */
1521 "R_ARM_THM_JUMP11", /* name */
1522 FALSE, /* partial_inplace */
1523 0x000007ff, /* src_mask */
1524 0x000007ff, /* dst_mask */
1525 TRUE), /* pcrel_offset */
1526
1527 HOWTO (R_ARM_THM_JUMP8, /* type */
1528 1, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 8, /* bitsize */
1531 TRUE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_signed, /* complain_on_overflow */
1534 bfd_elf_generic_reloc, /* special_function */
1535 "R_ARM_THM_JUMP8", /* name */
1536 FALSE, /* partial_inplace */
1537 0x000000ff, /* src_mask */
1538 0x000000ff, /* dst_mask */
1539 TRUE), /* pcrel_offset */
ba93b8ac 1540
c19d1205
ZW		 1541 /* TLS relocations */
1542 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1543 0, /* rightshift */
1544 2, /* size (0 = byte, 1 = short, 2 = long) */
1545 32, /* bitsize */
1546 FALSE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1549 NULL, /* special_function */
1550 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1551 TRUE, /* partial_inplace */
1552 0xffffffff, /* src_mask */
1553 0xffffffff, /* dst_mask */
c19d1205 1554 FALSE), /* pcrel_offset */
ba93b8ac 1555
ba93b8ac
DJ		 1556 HOWTO (R_ARM_TLS_LDM32, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 32, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_bitfield,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_ARM_TLS_LDM32", /* name */
1565 TRUE, /* partial_inplace */
1566 0xffffffff, /* src_mask */
1567 0xffffffff, /* dst_mask */
c19d1205 1568 FALSE), /* pcrel_offset */
ba93b8ac 1569
c19d1205 1570 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 32, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_bitfield,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
c19d1205 1578 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1579 TRUE, /* partial_inplace */
1580 0xffffffff, /* src_mask */
1581 0xffffffff, /* dst_mask */
c19d1205 1582 FALSE), /* pcrel_offset */
ba93b8ac 1583
ba93b8ac
DJ		 1584 HOWTO (R_ARM_TLS_IE32, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 32, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_bitfield,/* complain_on_overflow */
1591 NULL, /* special_function */
1592 "R_ARM_TLS_IE32", /* name */
1593 TRUE, /* partial_inplace */
1594 0xffffffff, /* src_mask */
1595 0xffffffff, /* dst_mask */
c19d1205 1596 FALSE), /* pcrel_offset */
7f266840 1597
c19d1205 1598 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1599 0, /* rightshift */
1600 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1601 32, /* bitsize */
7f266840
DJ		 1602 FALSE, /* pc_relative */
1603 0, /* bitpos */
c19d1205
ZW		 1604 complain_overflow_bitfield,/* complain_on_overflow */
1605 bfd_elf_generic_reloc, /* special_function */
1606 "R_ARM_TLS_LE32", /* name */
1607 TRUE, /* partial_inplace */
1608 0xffffffff, /* src_mask */
1609 0xffffffff, /* dst_mask */
1610 FALSE), /* pcrel_offset */
7f266840 1611
c19d1205
ZW		 1612 HOWTO (R_ARM_TLS_LDO12, /* type */
1613 0, /* rightshift */
1614 2, /* size (0 = byte, 1 = short, 2 = long) */
1615 12, /* bitsize */
1616 FALSE, /* pc_relative */
7f266840 1617 0, /* bitpos */
c19d1205 1618 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1619 bfd_elf_generic_reloc, /* special_function */
c19d1205 1620 "R_ARM_TLS_LDO12", /* name */
7f266840 1621 FALSE, /* partial_inplace */
c19d1205
ZW		 1622 0x00000fff, /* src_mask */
1623 0x00000fff, /* dst_mask */
1624 FALSE), /* pcrel_offset */
7f266840 1625
c19d1205
ZW		 1626 HOWTO (R_ARM_TLS_LE12, /* type */
1627 0, /* rightshift */
1628 2, /* size (0 = byte, 1 = short, 2 = long) */
1629 12, /* bitsize */
1630 FALSE, /* pc_relative */
7f266840 1631 0, /* bitpos */
c19d1205 1632 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1633 bfd_elf_generic_reloc, /* special_function */
c19d1205 1634 "R_ARM_TLS_LE12", /* name */
7f266840 1635 FALSE, /* partial_inplace */
c19d1205
ZW		 1636 0x00000fff, /* src_mask */
1637 0x00000fff, /* dst_mask */
1638 FALSE), /* pcrel_offset */
7f266840 1639
c19d1205 1640 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1641 0, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1643 12, /* bitsize */
1644 FALSE, /* pc_relative */
7f266840 1645 0, /* bitpos */
c19d1205 1646 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1647 bfd_elf_generic_reloc, /* special_function */
c19d1205 1648 "R_ARM_TLS_IE12GP", /* name */
7f266840 1649 FALSE, /* partial_inplace */
c19d1205
ZW		 1650 0x00000fff, /* src_mask */
1651 0x00000fff, /* dst_mask */
1652 FALSE), /* pcrel_offset */
0855e32b 1653
34e77a92 1654 /* 112-127 private relocations. */
0855e32b
NS		 1655 EMPTY_HOWTO (112),
1656 EMPTY_HOWTO (113),
1657 EMPTY_HOWTO (114),
1658 EMPTY_HOWTO (115),
1659 EMPTY_HOWTO (116),
1660 EMPTY_HOWTO (117),
1661 EMPTY_HOWTO (118),
1662 EMPTY_HOWTO (119),
1663 EMPTY_HOWTO (120),
1664 EMPTY_HOWTO (121),
1665 EMPTY_HOWTO (122),
1666 EMPTY_HOWTO (123),
1667 EMPTY_HOWTO (124),
1668 EMPTY_HOWTO (125),
1669 EMPTY_HOWTO (126),
1670 EMPTY_HOWTO (127),
34e77a92
RS		 1671
1672 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1673 EMPTY_HOWTO (128),
1674
1675 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1676 0, /* rightshift */
1677 1, /* size (0 = byte, 1 = short, 2 = long) */
1678 0, /* bitsize */
1679 FALSE, /* pc_relative */
1680 0, /* bitpos */
1681 complain_overflow_bitfield,/* complain_on_overflow */
1682 bfd_elf_generic_reloc, /* special_function */
1683 "R_ARM_THM_TLS_DESCSEQ",/* name */
1684 FALSE, /* partial_inplace */
1685 0x00000000, /* src_mask */
1686 0x00000000, /* dst_mask */
1687 FALSE), /* pcrel_offset */
c19d1205
ZW		 1688};
1689
34e77a92
RS		 1690/* 160 onwards: */
1691static reloc_howto_type elf32_arm_howto_table_2[1] =
1692{
1693 HOWTO (R_ARM_IRELATIVE, /* type */
1694 0, /* rightshift */
1695 2, /* size (0 = byte, 1 = short, 2 = long) */
1696 32, /* bitsize */
1697 FALSE, /* pc_relative */
1698 0, /* bitpos */
1699 complain_overflow_bitfield,/* complain_on_overflow */
1700 bfd_elf_generic_reloc, /* special_function */
1701 "R_ARM_IRELATIVE", /* name */
1702 TRUE, /* partial_inplace */
1703 0xffffffff, /* src_mask */
1704 0xffffffff, /* dst_mask */
1705 FALSE) /* pcrel_offset */
1706};
c19d1205 1707
34e77a92
RS		 1708/* 249-255 extended, currently unused, relocations: */
1709static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1710{
1711 HOWTO (R_ARM_RREL32, /* type */
1712 0, /* rightshift */
1713 0, /* size (0 = byte, 1 = short, 2 = long) */
1714 0, /* bitsize */
1715 FALSE, /* pc_relative */
1716 0, /* bitpos */
1717 complain_overflow_dont,/* complain_on_overflow */
1718 bfd_elf_generic_reloc, /* special_function */
1719 "R_ARM_RREL32", /* name */
1720 FALSE, /* partial_inplace */
1721 0, /* src_mask */
1722 0, /* dst_mask */
1723 FALSE), /* pcrel_offset */
1724
1725 HOWTO (R_ARM_RABS32, /* type */
1726 0, /* rightshift */
1727 0, /* size (0 = byte, 1 = short, 2 = long) */
1728 0, /* bitsize */
1729 FALSE, /* pc_relative */
1730 0, /* bitpos */
1731 complain_overflow_dont,/* complain_on_overflow */
1732 bfd_elf_generic_reloc, /* special_function */
1733 "R_ARM_RABS32", /* name */
1734 FALSE, /* partial_inplace */
1735 0, /* src_mask */
1736 0, /* dst_mask */
1737 FALSE), /* pcrel_offset */
1738
1739 HOWTO (R_ARM_RPC24, /* type */
1740 0, /* rightshift */
1741 0, /* size (0 = byte, 1 = short, 2 = long) */
1742 0, /* bitsize */
1743 FALSE, /* pc_relative */
1744 0, /* bitpos */
1745 complain_overflow_dont,/* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_ARM_RPC24", /* name */
1748 FALSE, /* partial_inplace */
1749 0, /* src_mask */
1750 0, /* dst_mask */
1751 FALSE), /* pcrel_offset */
1752
1753 HOWTO (R_ARM_RBASE, /* type */
1754 0, /* rightshift */
1755 0, /* size (0 = byte, 1 = short, 2 = long) */
1756 0, /* bitsize */
1757 FALSE, /* pc_relative */
1758 0, /* bitpos */
1759 complain_overflow_dont,/* complain_on_overflow */
1760 bfd_elf_generic_reloc, /* special_function */
1761 "R_ARM_RBASE", /* name */
1762 FALSE, /* partial_inplace */
1763 0, /* src_mask */
1764 0, /* dst_mask */
1765 FALSE) /* pcrel_offset */
1766};
1767
1768static reloc_howto_type *
1769elf32_arm_howto_from_type (unsigned int r_type)
1770{
906e58ca 1771 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1772 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1773
34e77a92
RS		 1774 if (r_type == R_ARM_IRELATIVE)
1775 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1776
c19d1205 1777 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1778 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1779 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1780
c19d1205 1781 return NULL;
7f266840
DJ		 1782}
1783
1784static void
1785elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1786 Elf_Internal_Rela * elf_reloc)
1787{
1788 unsigned int r_type;
1789
1790 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1791 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1792}
1793
1794struct elf32_arm_reloc_map
1795 {
1796 bfd_reloc_code_real_type bfd_reloc_val;
1797 unsigned char elf_reloc_val;
1798 };
1799
1800/* All entries in this list must also be present in elf32_arm_howto_table. */
1801static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1802 {
1803 {BFD_RELOC_NONE, R_ARM_NONE},
1804 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1805 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1806 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1807 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1808 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1809 {BFD_RELOC_32, R_ARM_ABS32},
1810 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1811 {BFD_RELOC_8, R_ARM_ABS8},
1812 {BFD_RELOC_16, R_ARM_ABS16},
1813 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1814 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1815 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1816 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1817 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1818 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1821 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1822 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1823 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1824 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1825 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1826 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1827 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1828 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1829 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1830 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1831 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1832 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1833 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1834 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1835 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1836 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1837 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1838 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1839 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1840 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1841 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1842 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1843 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1844 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1845 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1846 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1847 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1848 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1849 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1850 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1851 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1852 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1853 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1854 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1855 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1856 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1858 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1860 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1861 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1862 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1863 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1864 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1865 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1866 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1867 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1868 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1869 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1870 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1871 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1872 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1873 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1874 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1875 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1876 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1877 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1878 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1879 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1880 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1881 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1882 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1883 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1884 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1885 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1886 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1887 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1888 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1889 };
1890
1891static reloc_howto_type *
f1c71a59
ZW		 1892elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1893 bfd_reloc_code_real_type code)
7f266840
DJ		 1894{
1895 unsigned int i;
8029a119 1896
906e58ca 1897 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1898 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1899 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1900
c19d1205 1901 return NULL;
7f266840
DJ		 1902}
1903
157090f7
AM		 1904static reloc_howto_type *
1905elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1906 const char *r_name)
1907{
1908 unsigned int i;
1909
906e58ca 1910 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1911 if (elf32_arm_howto_table_1[i].name != NULL
1912 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1913 return &elf32_arm_howto_table_1[i];
1914
906e58ca 1915 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1916 if (elf32_arm_howto_table_2[i].name != NULL
1917 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1918 return &elf32_arm_howto_table_2[i];
1919
34e77a92
RS		 1920 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1921 if (elf32_arm_howto_table_3[i].name != NULL
1922 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1923 return &elf32_arm_howto_table_3[i];
1924
157090f7
AM		 1925 return NULL;
1926}
1927
906e58ca
NC		 1928/* Support for core dump NOTE sections. */
1929
7f266840 1930static bfd_boolean
f1c71a59 1931elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1932{
1933 int offset;
1934 size_t size;
1935
1936 switch (note->descsz)
1937 {
1938 default:
1939 return FALSE;
1940
8029a119 1941 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1942 /* pr_cursig */
1943 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1944
1945 /* pr_pid */
261b8d08 1946 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1947
1948 /* pr_reg */
1949 offset = 72;
1950 size = 72;
1951
1952 break;
1953 }
1954
1955 /* Make a ".reg/999" section. */
1956 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1957 size, note->descpos + offset);
1958}
1959
1960static bfd_boolean
f1c71a59 1961elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1962{
1963 switch (note->descsz)
1964 {
1965 default:
1966 return FALSE;
1967
8029a119 1968 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1969 elf_tdata (abfd)->core_program
1970 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1971 elf_tdata (abfd)->core_command
1972 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1973 }
1974
1975 /* Note that for some reason, a spurious space is tacked
1976 onto the end of the args in some (at least one anyway)
1977 implementations, so strip it off if it exists. */
7f266840
DJ		 1978 {
1979 char *command = elf_tdata (abfd)->core_command;
1980 int n = strlen (command);
1981
1982 if (0 < n && command[n - 1] == ' ')
1983 command[n - 1] = '\0';
1984 }
1985
1986 return TRUE;
1987}
1988
1989#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1990#define TARGET_LITTLE_NAME "elf32-littlearm"
1991#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1992#define TARGET_BIG_NAME "elf32-bigarm"
1993
1994#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1995#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1996
252b5132
RH		 1997typedef unsigned long int insn32;
1998typedef unsigned short int insn16;
1999
3a4a14e9
PB		 2000/* In lieu of proper flags, assume all EABIv4 or later objects are
2001 interworkable. */
57e8b36a 2002#define INTERWORK_FLAG(abfd) \
3a4a14e9 2003 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2004 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2005 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2006
252b5132
RH		 2007/* The linker script knows the section names for placement.
2008 The entry_names are used to do simple name mangling on the stubs.
2009 Given a function name, and its type, the stub can be found. The
9b485d32 2010 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2011#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2012#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2013
2014#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2015#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2016
c7b8f16e
JB		 2017#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2018#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2019
845b51d6
PB		 2020#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2021#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2022
7413f23f
DJ		 2023#define STUB_ENTRY_NAME "__%s_veneer"
2024
252b5132
RH		 2025/* The name of the dynamic interpreter. This is put in the .interp
2026 section. */
2027#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2028
0855e32b
NS		 2029static const unsigned long tls_trampoline [] =
2030 {
2031 0xe08e0000, /* add r0, lr, r0 */
2032 0xe5901004, /* ldr r1, [r0,#4] */
2033 0xe12fff11, /* bx r1 */
2034 };
2035
2036static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2037 {
2038 0xe52d2004, /* push {r2} */
2039 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2040 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2041 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2042 0xe081100f, /* 2: add r1, pc */
2043 0xe12fff12, /* bx r2 */
2044 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2045 + dl_tlsdesc_lazy_resolver(GOT) */
2046 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2047 };
2048
5e681ec4
PB		 2049#ifdef FOUR_WORD_PLT
2050
252b5132
RH		 2051/* The first entry in a procedure linkage table looks like
2052 this. It is set up so that any shared library function that is
59f2c4e7 2053 called before the relocation has been set up calls the dynamic
9b485d32 2054 linker first. */
e5a52504 2055static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 2056 {
2057 0xe52de004, /* str lr, [sp, #-4]! */
2058 0xe59fe010, /* ldr lr, [pc, #16] */
2059 0xe08fe00e, /* add lr, pc, lr */
2060 0xe5bef008, /* ldr pc, [lr, #8]! */
2061 };
2062
2063/* Subsequent entries in a procedure linkage table look like
2064 this. */
e5a52504 2065static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 2066 {
2067 0xe28fc600, /* add ip, pc, #NN */
2068 0xe28cca00, /* add ip, ip, #NN */
2069 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2070 0x00000000, /* unused */
2071 };
2072
2073#else
2074
5e681ec4
PB		 2075/* The first entry in a procedure linkage table looks like
2076 this. It is set up so that any shared library function that is
2077 called before the relocation has been set up calls the dynamic
2078 linker first. */
e5a52504 2079static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 2080 {
5e681ec4
PB		 2081 0xe52de004, /* str lr, [sp, #-4]! */
2082 0xe59fe004, /* ldr lr, [pc, #4] */
2083 0xe08fe00e, /* add lr, pc, lr */
2084 0xe5bef008, /* ldr pc, [lr, #8]! */
2085 0x00000000, /* &GOT[0] - . */
917583ad 2086 };
252b5132
RH		 2087
2088/* Subsequent entries in a procedure linkage table look like
2089 this. */
e5a52504 2090static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 2091 {
2092 0xe28fc600, /* add ip, pc, #0xNN00000 */
2093 0xe28cca00, /* add ip, ip, #0xNN000 */
2094 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2095 };
2096
2097#endif
252b5132 2098
00a97672
RS		 2099/* The format of the first entry in the procedure linkage table
2100 for a VxWorks executable. */
2101static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2102 {
2103 0xe52dc008, /* str ip,[sp,#-8]! */
2104 0xe59fc000, /* ldr ip,[pc] */
2105 0xe59cf008, /* ldr pc,[ip,#8] */
2106 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2107 };
2108
2109/* The format of subsequent entries in a VxWorks executable. */
2110static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2111 {
2112 0xe59fc000, /* ldr ip,[pc] */
2113 0xe59cf000, /* ldr pc,[ip] */
2114 0x00000000, /* .long @got */
2115 0xe59fc000, /* ldr ip,[pc] */
2116 0xea000000, /* b _PLT */
2117 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2118 };
2119
2120/* The format of entries in a VxWorks shared library. */
2121static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2122 {
2123 0xe59fc000, /* ldr ip,[pc] */
2124 0xe79cf009, /* ldr pc,[ip,r9] */
2125 0x00000000, /* .long @got */
2126 0xe59fc000, /* ldr ip,[pc] */
2127 0xe599f008, /* ldr pc,[r9,#8] */
2128 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2129 };
2130
b7693d02
DJ		 2131/* An initial stub used if the PLT entry is referenced from Thumb code. */
2132#define PLT_THUMB_STUB_SIZE 4
2133static const bfd_vma elf32_arm_plt_thumb_stub [] =
2134 {
2135 0x4778, /* bx pc */
2136 0x46c0 /* nop */
2137 };
2138
e5a52504
MM		 2139/* The entries in a PLT when using a DLL-based target with multiple
2140 address spaces. */
906e58ca 2141static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2142 {
83a358aa 2143 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2144 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2145 };
2146
906e58ca
NC		 2147#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2148#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2149#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2150#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2151#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2152#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2153
461a49ca
DJ		 2154enum stub_insn_type
2155 {
2156 THUMB16_TYPE = 1,
2157 THUMB32_TYPE,
2158 ARM_TYPE,
2159 DATA_TYPE
2160 };
2161
48229727
JB		 2162#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2163/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2164 is inserted in arm_build_one_stub(). */
2165#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2166#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2167#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2168#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2169#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2170#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2171
2172typedef struct
2173{
2174 bfd_vma data;
2175 enum stub_insn_type type;
ebe24dd4 2176 unsigned int r_type;
461a49ca
DJ		 2177 int reloc_addend;
2178} insn_sequence;
2179
fea2b4d6
CL		 2180/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2181 to reach the stub if necessary. */
461a49ca 2182static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2183 {
461a49ca
DJ		 2184 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2185 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2186 };
2187
fea2b4d6
CL		 2188/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2189 available. */
461a49ca 2190static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2191 {
461a49ca
DJ		 2192 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2193 ARM_INSN(0xe12fff1c), /* bx ip */
2194 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2195 };
2196
d3626fb0 2197/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2198static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2199 {
461a49ca
DJ		 2200 THUMB16_INSN(0xb401), /* push {r0} */
2201 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2202 THUMB16_INSN(0x4684), /* mov ip, r0 */
2203 THUMB16_INSN(0xbc01), /* pop {r0} */
2204 THUMB16_INSN(0x4760), /* bx ip */
2205 THUMB16_INSN(0xbf00), /* nop */
2206 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2207 };
2208
d3626fb0
CL		 2209/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2210 allowed. */
2211static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2212 {
2213 THUMB16_INSN(0x4778), /* bx pc */
2214 THUMB16_INSN(0x46c0), /* nop */
2215 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2216 ARM_INSN(0xe12fff1c), /* bx ip */
2217 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2218 };
2219
fea2b4d6
CL		 2220/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2221 available. */
461a49ca 2222static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2223 {
461a49ca
DJ		 2224 THUMB16_INSN(0x4778), /* bx pc */
2225 THUMB16_INSN(0x46c0), /* nop */
2226 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2227 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2228 };
2229
fea2b4d6
CL		 2230/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2231 one, when the destination is close enough. */
461a49ca 2232static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2233 {
461a49ca
DJ		 2234 THUMB16_INSN(0x4778), /* bx pc */
2235 THUMB16_INSN(0x46c0), /* nop */
2236 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2237 };
2238
cf3eccff 2239/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2240 blx to reach the stub if necessary. */
cf3eccff 2241static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2242 {
9ae92b05 2243 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
461a49ca
DJ		 2244 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2245 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2246 };
2247
cf3eccff
DJ		 2248/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2249 blx to reach the stub if necessary. We can not add into pc;
2250 it is not guaranteed to mode switch (different in ARMv6 and
2251 ARMv7). */
2252static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2253 {
9ae92b05 2254 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
cf3eccff
DJ		 2255 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2256 ARM_INSN(0xe12fff1c), /* bx ip */
2257 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2258 };
2259
ebe24dd4
CL		 2260/* V4T ARM -> ARM long branch stub, PIC. */
2261static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2262 {
2263 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2264 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2265 ARM_INSN(0xe12fff1c), /* bx ip */
2266 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2267 };
2268
2269/* V4T Thumb -> ARM long branch stub, PIC. */
2270static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2271 {
2272 THUMB16_INSN(0x4778), /* bx pc */
2273 THUMB16_INSN(0x46c0), /* nop */
2274 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2275 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2276 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2277 };
2278
d3626fb0
CL		 2279/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2280 architectures. */
ebe24dd4
CL		 2281static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2282 {
2283 THUMB16_INSN(0xb401), /* push {r0} */
2284 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2285 THUMB16_INSN(0x46fc), /* mov ip, pc */
2286 THUMB16_INSN(0x4484), /* add ip, r0 */
2287 THUMB16_INSN(0xbc01), /* pop {r0} */
2288 THUMB16_INSN(0x4760), /* bx ip */
2289 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2290 };
2291
d3626fb0
CL		 2292/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2293 allowed. */
2294static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2295 {
2296 THUMB16_INSN(0x4778), /* bx pc */
2297 THUMB16_INSN(0x46c0), /* nop */
2298 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2299 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2300 ARM_INSN(0xe12fff1c), /* bx ip */
2301 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2302 };
2303
0855e32b
NS		 2304/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2305 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2306static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2307{
2308 ARM_INSN(0xe59f1000), /* ldr r1, [pc] */
2309 ARM_INSN(0xe08ff001), /* add pc, pc, r1 */
2310 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2311};
2312
2313/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2314 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2315static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2316{
2317 THUMB16_INSN(0x4778), /* bx pc */
2318 THUMB16_INSN(0x46c0), /* nop */
2319 ARM_INSN(0xe59f1000), /* ldr r1, [pc, #0] */
2320 ARM_INSN(0xe081f00f), /* add pc, r1, pc */
2321 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2322};
2323
48229727
JB		 2324/* Cortex-A8 erratum-workaround stubs. */
2325
2326/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2327 can't use a conditional branch to reach this stub). */
2328
2329static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2330 {
2331 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2332 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2333 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2334 };
2335
2336/* Stub used for b.w and bl.w instructions. */
2337
2338static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2339 {
2340 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2341 };
2342
2343static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2344 {
2345 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2346 };
2347
2348/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2349 instruction (which switches to ARM mode) to point to this stub. Jump to the
2350 real destination using an ARM-mode branch. */
2351
2352static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2353 {
2354 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2355 };
2356
906e58ca
NC		 2357/* Section name for stubs is the associated section name plus this
2358 string. */
2359#define STUB_SUFFIX ".stub"
2360
738a79f6
CL		 2361/* One entry per long/short branch stub defined above. */
2362#define DEF_STUBS \
2363 DEF_STUB(long_branch_any_any) \
2364 DEF_STUB(long_branch_v4t_arm_thumb) \
2365 DEF_STUB(long_branch_thumb_only) \
2366 DEF_STUB(long_branch_v4t_thumb_thumb) \
2367 DEF_STUB(long_branch_v4t_thumb_arm) \
2368 DEF_STUB(short_branch_v4t_thumb_arm) \
2369 DEF_STUB(long_branch_any_arm_pic) \
2370 DEF_STUB(long_branch_any_thumb_pic) \
2371 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2372 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2373 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2374 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2375 DEF_STUB(long_branch_any_tls_pic) \
2376 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
48229727
JB		 2377 DEF_STUB(a8_veneer_b_cond) \
2378 DEF_STUB(a8_veneer_b) \
2379 DEF_STUB(a8_veneer_bl) \
2380 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2381
2382#define DEF_STUB(x) arm_stub_##x,
2383enum elf32_arm_stub_type {
906e58ca 2384 arm_stub_none,
738a79f6 2385 DEF_STUBS
eb7c4339
NS		 2386 /* Note the first a8_veneer type */
2387 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2388};
2389#undef DEF_STUB
2390
2391typedef struct
2392{
d3ce72d0 2393 const insn_sequence* template_sequence;
738a79f6
CL		 2394 int template_size;
2395} stub_def;
2396
2397#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2398static const stub_def stub_definitions[] = {
2399 {NULL, 0},
2400 DEF_STUBS
906e58ca
NC		 2401};
2402
2403struct elf32_arm_stub_hash_entry
2404{
2405 /* Base hash table entry structure. */
2406 struct bfd_hash_entry root;
2407
2408 /* The stub section. */
2409 asection *stub_sec;
2410
2411 /* Offset within stub_sec of the beginning of this stub. */
2412 bfd_vma stub_offset;
2413
2414 /* Given the symbol's value and its section we can determine its final
2415 value when building the stubs (so the stub knows where to jump). */
2416 bfd_vma target_value;
2417 asection *target_section;
2418
48229727
JB		 2419 /* Offset to apply to relocation referencing target_value. */
2420 bfd_vma target_addend;
2421
2422 /* The instruction which caused this stub to be generated (only valid for
2423 Cortex-A8 erratum workaround stubs at present). */
2424 unsigned long orig_insn;
2425
461a49ca 2426 /* The stub type. */
906e58ca 2427 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2428 /* Its encoding size in bytes. */
2429 int stub_size;
2430 /* Its template. */
2431 const insn_sequence *stub_template;
2432 /* The size of the template (number of entries). */
2433 int stub_template_size;
906e58ca
NC		 2434
2435 /* The symbol table entry, if any, that this was derived from. */
2436 struct elf32_arm_link_hash_entry *h;
2437
35fc36a8
RS		 2438 /* Type of branch. */
2439 enum arm_st_branch_type branch_type;
906e58ca
NC		 2440
2441 /* Where this stub is being called from, or, in the case of combined
2442 stub sections, the first input section in the group. */
2443 asection *id_sec;
7413f23f
DJ		 2444
2445 /* The name for the local symbol at the start of this stub. The
2446 stub name in the hash table has to be unique; this does not, so
2447 it can be friendlier. */
2448 char *output_name;
906e58ca
NC		 2449};
2450
e489d0ae
PB		 2451/* Used to build a map of a section. This is required for mixed-endian
2452 code/data. */
2453
2454typedef struct elf32_elf_section_map
2455{
2456 bfd_vma vma;
2457 char type;
2458}
2459elf32_arm_section_map;
2460
c7b8f16e
JB		 2461/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2462
2463typedef enum
2464{
2465 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2466 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2467 VFP11_ERRATUM_ARM_VENEER,
2468 VFP11_ERRATUM_THUMB_VENEER
2469}
2470elf32_vfp11_erratum_type;
2471
2472typedef struct elf32_vfp11_erratum_list
2473{
2474 struct elf32_vfp11_erratum_list *next;
2475 bfd_vma vma;
2476 union
2477 {
2478 struct
2479 {
2480 struct elf32_vfp11_erratum_list *veneer;
2481 unsigned int vfp_insn;
2482 } b;
2483 struct
2484 {
2485 struct elf32_vfp11_erratum_list *branch;
2486 unsigned int id;
2487 } v;
2488 } u;
2489 elf32_vfp11_erratum_type type;
2490}
2491elf32_vfp11_erratum_list;
2492
2468f9c9
PB		 2493typedef enum
2494{
2495 DELETE_EXIDX_ENTRY,
2496 INSERT_EXIDX_CANTUNWIND_AT_END
2497}
2498arm_unwind_edit_type;
2499
2500/* A (sorted) list of edits to apply to an unwind table. */
2501typedef struct arm_unwind_table_edit
2502{
2503 arm_unwind_edit_type type;
2504 /* Note: we sometimes want to insert an unwind entry corresponding to a
2505 section different from the one we're currently writing out, so record the
2506 (text) section this edit relates to here. */
2507 asection *linked_section;
2508 unsigned int index;
2509 struct arm_unwind_table_edit *next;
2510}
2511arm_unwind_table_edit;
2512
8e3de13a 2513typedef struct _arm_elf_section_data
e489d0ae 2514{
2468f9c9 2515 /* Information about mapping symbols. */
e489d0ae 2516 struct bfd_elf_section_data elf;
8e3de13a 2517 unsigned int mapcount;
c7b8f16e 2518 unsigned int mapsize;
e489d0ae 2519 elf32_arm_section_map *map;
2468f9c9 2520 /* Information about CPU errata. */
c7b8f16e
JB		 2521 unsigned int erratumcount;
2522 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2523 /* Information about unwind tables. */
2524 union
2525 {
2526 /* Unwind info attached to a text section. */
2527 struct
2528 {
2529 asection *arm_exidx_sec;
2530 } text;
2531
2532 /* Unwind info attached to an .ARM.exidx section. */
2533 struct
2534 {
2535 arm_unwind_table_edit *unwind_edit_list;
2536 arm_unwind_table_edit *unwind_edit_tail;
2537 } exidx;
2538 } u;
8e3de13a
NC		 2539}
2540_arm_elf_section_data;
e489d0ae
PB		 2541
2542#define elf32_arm_section_data(sec) \
8e3de13a 2543 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2544
48229727
JB		 2545/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2546 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2547 so may be created multiple times: we use an array of these entries whilst
2548 relaxing which we can refresh easily, then create stubs for each potentially
2549 erratum-triggering instruction once we've settled on a solution. */
2550
2551struct a8_erratum_fix {
2552 bfd *input_bfd;
2553 asection *section;
2554 bfd_vma offset;
2555 bfd_vma addend;
2556 unsigned long orig_insn;
2557 char *stub_name;
2558 enum elf32_arm_stub_type stub_type;
35fc36a8 2559 enum arm_st_branch_type branch_type;
48229727
JB		 2560};
2561
2562/* A table of relocs applied to branches which might trigger Cortex-A8
2563 erratum. */
2564
2565struct a8_erratum_reloc {
2566 bfd_vma from;
2567 bfd_vma destination;
92750f34
DJ		 2568 struct elf32_arm_link_hash_entry *hash;
2569 const char *sym_name;
48229727 2570 unsigned int r_type;
35fc36a8 2571 enum arm_st_branch_type branch_type;
48229727
JB		 2572 bfd_boolean non_a8_stub;
2573};
2574
ba93b8ac
DJ		 2575/* The size of the thread control block. */
2576#define TCB_SIZE 8
2577
34e77a92
RS		 2578/* ARM-specific information about a PLT entry, over and above the usual
2579 gotplt_union. */
2580struct arm_plt_info {
2581 /* We reference count Thumb references to a PLT entry separately,
2582 so that we can emit the Thumb trampoline only if needed. */
2583 bfd_signed_vma thumb_refcount;
2584
2585 /* Some references from Thumb code may be eliminated by BL->BLX
2586 conversion, so record them separately. */
2587 bfd_signed_vma maybe_thumb_refcount;
2588
2589 /* How many of the recorded PLT accesses were from non-call relocations.
2590 This information is useful when deciding whether anything takes the
2591 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2592 non-call references to the function should resolve directly to the
2593 real runtime target. */
2594 unsigned int noncall_refcount;
2595
2596 /* Since PLT entries have variable size if the Thumb prologue is
2597 used, we need to record the index into .got.plt instead of
2598 recomputing it from the PLT offset. */
2599 bfd_signed_vma got_offset;
2600};
2601
2602/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2603struct arm_local_iplt_info {
2604 /* The information that is usually found in the generic ELF part of
2605 the hash table entry. */
2606 union gotplt_union root;
2607
2608 /* The information that is usually found in the ARM-specific part of
2609 the hash table entry. */
2610 struct arm_plt_info arm;
2611
2612 /* A list of all potential dynamic relocations against this symbol. */
2613 struct elf_dyn_relocs *dyn_relocs;
2614};
2615
0ffa91dd 2616struct elf_arm_obj_tdata
ba93b8ac
DJ		 2617{
2618 struct elf_obj_tdata root;
2619
2620 /* tls_type for each local got entry. */
2621 char *local_got_tls_type;
ee065d83 2622
0855e32b
NS		 2623 /* GOTPLT entries for TLS descriptors. */
2624 bfd_vma *local_tlsdesc_gotent;
2625
34e77a92
RS		 2626 /* Information for local symbols that need entries in .iplt. */
2627 struct arm_local_iplt_info **local_iplt;
2628
bf21ed78
MS		 2629 /* Zero to warn when linking objects with incompatible enum sizes. */
2630 int no_enum_size_warning;
a9dc9481
JM		 2631
2632 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2633 int no_wchar_size_warning;
ba93b8ac
DJ		 2634};
2635
0ffa91dd
NC		 2636#define elf_arm_tdata(bfd) \
2637 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2638
0ffa91dd
NC		 2639#define elf32_arm_local_got_tls_type(bfd) \
2640 (elf_arm_tdata (bfd)->local_got_tls_type)
2641
0855e32b
NS		 2642#define elf32_arm_local_tlsdesc_gotent(bfd) \
2643 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2644
34e77a92
RS		 2645#define elf32_arm_local_iplt(bfd) \
2646 (elf_arm_tdata (bfd)->local_iplt)
2647
0ffa91dd
NC		 2648#define is_arm_elf(bfd) \
2649 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2650 && elf_tdata (bfd) != NULL \
4dfe6ac6 2651 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2652
2653static bfd_boolean
2654elf32_arm_mkobject (bfd *abfd)
2655{
0ffa91dd 2656 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2657 ARM_ELF_DATA);
ba93b8ac
DJ		 2658}
2659
ba93b8ac
DJ		 2660#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2661
ba96a88f 2662/* Arm ELF linker hash entry. */
252b5132 2663struct elf32_arm_link_hash_entry
917583ad
NC		 2664 {
2665 struct elf_link_hash_entry root;
252b5132 2666
0bdcacaf
RS		 2667 /* Track dynamic relocs copied for this symbol. */
2668 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2669
34e77a92
RS		 2670 /* ARM-specific PLT information. */
2671 struct arm_plt_info plt;
ba93b8ac
DJ		 2672
2673#define GOT_UNKNOWN 0
2674#define GOT_NORMAL 1
2675#define GOT_TLS_GD 2
2676#define GOT_TLS_IE 4
0855e32b
NS		 2677#define GOT_TLS_GDESC 8
2678#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
34e77a92
RS		 2679 unsigned int tls_type : 8;
2680
2681 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2682 unsigned int is_iplt : 1;
2683
2684 unsigned int unused : 23;
a4fd1a8e 2685
0855e32b
NS		 2686 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2687 starting at the end of the jump table. */
2688 bfd_vma tlsdesc_got;
2689
a4fd1a8e
PB		 2690 /* The symbol marking the real symbol location for exported thumb
2691 symbols with Arm stubs. */
2692 struct elf_link_hash_entry *export_glue;
906e58ca 2693
da5938a2 2694 /* A pointer to the most recently used stub hash entry against this
8029a119 2695 symbol. */
da5938a2 2696 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2697 };
252b5132 2698
252b5132 2699/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2700#define elf32_arm_link_hash_traverse(table, func, info) \
2701 (elf_link_hash_traverse \
2702 (&(table)->root, \
b7693d02 2703 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2704 (info)))
2705
2706/* Get the ARM elf linker hash table from a link_info structure. */
2707#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2708 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2709 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2710
906e58ca
NC		 2711#define arm_stub_hash_lookup(table, string, create, copy) \
2712 ((struct elf32_arm_stub_hash_entry *) \
2713 bfd_hash_lookup ((table), (string), (create), (copy)))
2714
21d799b5
NC		 2715/* Array to keep track of which stub sections have been created, and
2716 information on stub grouping. */
2717struct map_stub
2718{
2719 /* This is the section to which stubs in the group will be
2720 attached. */
2721 asection *link_sec;
2722 /* The stub section. */
2723 asection *stub_sec;
2724};
2725
0855e32b
NS		 2726#define elf32_arm_compute_jump_table_size(htab) \
2727 ((htab)->next_tls_desc_index * 4)
2728
9b485d32 2729/* ARM ELF linker hash table. */
252b5132 2730struct elf32_arm_link_hash_table
906e58ca
NC		 2731{
2732 /* The main hash table. */
2733 struct elf_link_hash_table root;
252b5132 2734
906e58ca
NC		 2735 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2736 bfd_size_type thumb_glue_size;
252b5132 2737
906e58ca
NC		 2738 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2739 bfd_size_type arm_glue_size;
252b5132 2740
906e58ca
NC		 2741 /* The size in bytes of section containing the ARMv4 BX veneers. */
2742 bfd_size_type bx_glue_size;
845b51d6 2743
906e58ca
NC		 2744 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2745 veneer has been populated. */
2746 bfd_vma bx_glue_offset[15];
845b51d6 2747
906e58ca
NC		 2748 /* The size in bytes of the section containing glue for VFP11 erratum
2749 veneers. */
2750 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2751
48229727
JB		 2752 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2753 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2754 elf32_arm_write_section(). */
2755 struct a8_erratum_fix *a8_erratum_fixes;
2756 unsigned int num_a8_erratum_fixes;
2757
906e58ca
NC		 2758 /* An arbitrary input BFD chosen to hold the glue sections. */
2759 bfd * bfd_of_glue_owner;
ba96a88f 2760
906e58ca
NC		 2761 /* Nonzero to output a BE8 image. */
2762 int byteswap_code;
e489d0ae 2763
906e58ca
NC		 2764 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2765 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2766 int target1_is_rel;
9c504268 2767
906e58ca
NC		 2768 /* The relocation to use for R_ARM_TARGET2 relocations. */
2769 int target2_reloc;
eb043451 2770
906e58ca
NC		 2771 /* 0 = Ignore R_ARM_V4BX.
2772 1 = Convert BX to MOV PC.
2773 2 = Generate v4 interworing stubs. */
2774 int fix_v4bx;
319850b4 2775
48229727
JB		 2776 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2777 int fix_cortex_a8;
2778
906e58ca
NC		 2779 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2780 int use_blx;
33bfe774 2781
906e58ca
NC		 2782 /* What sort of code sequences we should look for which may trigger the
2783 VFP11 denorm erratum. */
2784 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2785
906e58ca
NC		 2786 /* Global counter for the number of fixes we have emitted. */
2787 int num_vfp11_fixes;
c7b8f16e 2788
906e58ca
NC		 2789 /* Nonzero to force PIC branch veneers. */
2790 int pic_veneer;
27e55c4d 2791
906e58ca
NC		 2792 /* The number of bytes in the initial entry in the PLT. */
2793 bfd_size_type plt_header_size;
e5a52504 2794
906e58ca
NC		 2795 /* The number of bytes in the subsequent PLT etries. */
2796 bfd_size_type plt_entry_size;
e5a52504 2797
906e58ca
NC		 2798 /* True if the target system is VxWorks. */
2799 int vxworks_p;
00a97672 2800
906e58ca
NC		 2801 /* True if the target system is Symbian OS. */
2802 int symbian_p;
e5a52504 2803
906e58ca
NC		 2804 /* True if the target uses REL relocations. */
2805 int use_rel;
4e7fd91e 2806
0855e32b
NS		 2807 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2808 bfd_vma next_tls_desc_index;
2809
2810 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2811 bfd_vma num_tls_desc;
2812
906e58ca 2813 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2814 asection *sdynbss;
2815 asection *srelbss;
5e681ec4 2816
906e58ca
NC		 2817 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2818 asection *srelplt2;
00a97672 2819
0855e32b
NS		 2820 /* The offset into splt of the PLT entry for the TLS descriptor
2821 resolver. Special values are 0, if not necessary (or not found
2822 to be necessary yet), and -1 if needed but not determined
2823 yet. */
2824 bfd_vma dt_tlsdesc_plt;
2825
2826 /* The offset into sgot of the GOT entry used by the PLT entry
2827 above. */
2828 bfd_vma dt_tlsdesc_got;
2829
2830 /* Offset in .plt section of tls_arm_trampoline. */
2831 bfd_vma tls_trampoline;
2832
906e58ca
NC		 2833 /* Data for R_ARM_TLS_LDM32 relocations. */
2834 union
2835 {
2836 bfd_signed_vma refcount;
2837 bfd_vma offset;
2838 } tls_ldm_got;
b7693d02 2839
87d72d41
AM		 2840 /* Small local sym cache. */
2841 struct sym_cache sym_cache;
906e58ca
NC		 2842
2843 /* For convenience in allocate_dynrelocs. */
2844 bfd * obfd;
2845
0855e32b
NS		 2846 /* The amount of space used by the reserved portion of the sgotplt
2847 section, plus whatever space is used by the jump slots. */
2848 bfd_vma sgotplt_jump_table_size;
2849
906e58ca
NC		 2850 /* The stub hash table. */
2851 struct bfd_hash_table stub_hash_table;
2852
2853 /* Linker stub bfd. */
2854 bfd *stub_bfd;
2855
2856 /* Linker call-backs. */
2857 asection * (*add_stub_section) (const char *, asection *);
2858 void (*layout_sections_again) (void);
2859
2860 /* Array to keep track of which stub sections have been created, and
2861 information on stub grouping. */
21d799b5 2862 struct map_stub *stub_group;
906e58ca 2863
fe33d2fa
CL		 2864 /* Number of elements in stub_group. */
2865 int top_id;
2866
906e58ca
NC		 2867 /* Assorted information used by elf32_arm_size_stubs. */
2868 unsigned int bfd_count;
2869 int top_index;
2870 asection **input_list;
2871};
252b5132 2872
780a67af
NC		 2873/* Create an entry in an ARM ELF linker hash table. */
2874
2875static struct bfd_hash_entry *
57e8b36a
NC		 2876elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2877 struct bfd_hash_table * table,
2878 const char * string)
780a67af
NC		 2879{
2880 struct elf32_arm_link_hash_entry * ret =
2881 (struct elf32_arm_link_hash_entry *) entry;
2882
2883 /* Allocate the structure if it has not already been allocated by a
2884 subclass. */
906e58ca 2885 if (ret == NULL)
21d799b5
NC		 2886 ret = (struct elf32_arm_link_hash_entry *)
2887 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2888 if (ret == NULL)
780a67af
NC		 2889 return (struct bfd_hash_entry *) ret;
2890
2891 /* Call the allocation method of the superclass. */
2892 ret = ((struct elf32_arm_link_hash_entry *)
2893 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2894 table, string));
57e8b36a 2895 if (ret != NULL)
b7693d02 2896 {
0bdcacaf 2897 ret->dyn_relocs = NULL;
ba93b8ac 2898 ret->tls_type = GOT_UNKNOWN;
0855e32b 2899 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 2900 ret->plt.thumb_refcount = 0;
2901 ret->plt.maybe_thumb_refcount = 0;
2902 ret->plt.noncall_refcount = 0;
2903 ret->plt.got_offset = -1;
2904 ret->is_iplt = FALSE;
a4fd1a8e 2905 ret->export_glue = NULL;
906e58ca
NC		 2906
2907 ret->stub_cache = NULL;
b7693d02 2908 }
780a67af
NC		 2909
2910 return (struct bfd_hash_entry *) ret;
2911}
2912
34e77a92
RS		 2913/* Ensure that we have allocated bookkeeping structures for ABFD's local
2914 symbols. */
2915
2916static bfd_boolean
2917elf32_arm_allocate_local_sym_info (bfd *abfd)
2918{
2919 if (elf_local_got_refcounts (abfd) == NULL)
2920 {
2921 bfd_size_type num_syms;
2922 bfd_size_type size;
2923 char *data;
2924
2925 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
2926 size = num_syms * (sizeof (bfd_signed_vma)
2927 + sizeof (struct arm_local_iplt_info *)
2928 + sizeof (bfd_vma)
2929 + sizeof (char));
2930 data = bfd_zalloc (abfd, size);
2931 if (data == NULL)
2932 return FALSE;
2933
2934 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
2935 data += num_syms * sizeof (bfd_signed_vma);
2936
2937 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
2938 data += num_syms * sizeof (struct arm_local_iplt_info *);
2939
2940 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
2941 data += num_syms * sizeof (bfd_vma);
2942
2943 elf32_arm_local_got_tls_type (abfd) = data;
2944 }
2945 return TRUE;
2946}
2947
2948/* Return the .iplt information for local symbol R_SYMNDX, which belongs
2949 to input bfd ABFD. Create the information if it doesn't already exist.
2950 Return null if an allocation fails. */
2951
2952static struct arm_local_iplt_info *
2953elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
2954{
2955 struct arm_local_iplt_info **ptr;
2956
2957 if (!elf32_arm_allocate_local_sym_info (abfd))
2958 return NULL;
2959
2960 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
2961 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
2962 if (*ptr == NULL)
2963 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
2964 return *ptr;
2965}
2966
2967/* Try to obtain PLT information for the symbol with index R_SYMNDX
2968 in ABFD's symbol table. If the symbol is global, H points to its
2969 hash table entry, otherwise H is null.
2970
2971 Return true if the symbol does have PLT information. When returning
2972 true, point *ROOT_PLT at the target-independent reference count/offset
2973 union and *ARM_PLT at the ARM-specific information. */
2974
2975static bfd_boolean
2976elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
2977 unsigned long r_symndx, union gotplt_union **root_plt,
2978 struct arm_plt_info **arm_plt)
2979{
2980 struct arm_local_iplt_info *local_iplt;
2981
2982 if (h != NULL)
2983 {
2984 *root_plt = &h->root.plt;
2985 *arm_plt = &h->plt;
2986 return TRUE;
2987 }
2988
2989 if (elf32_arm_local_iplt (abfd) == NULL)
2990 return FALSE;
2991
2992 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
2993 if (local_iplt == NULL)
2994 return FALSE;
2995
2996 *root_plt = &local_iplt->root;
2997 *arm_plt = &local_iplt->arm;
2998 return TRUE;
2999}
3000
3001/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3002 before it. */
3003
3004static bfd_boolean
3005elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3006 struct arm_plt_info *arm_plt)
3007{
3008 struct elf32_arm_link_hash_table *htab;
3009
3010 htab = elf32_arm_hash_table (info);
3011 return (arm_plt->thumb_refcount != 0
3012 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3013}
3014
3015/* Return a pointer to the head of the dynamic reloc list that should
3016 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3017 ABFD's symbol table. Return null if an error occurs. */
3018
3019static struct elf_dyn_relocs **
3020elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3021 Elf_Internal_Sym *isym)
3022{
3023 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3024 {
3025 struct arm_local_iplt_info *local_iplt;
3026
3027 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3028 if (local_iplt == NULL)
3029 return NULL;
3030 return &local_iplt->dyn_relocs;
3031 }
3032 else
3033 {
3034 /* Track dynamic relocs needed for local syms too.
3035 We really need local syms available to do this
3036 easily. Oh well. */
3037 asection *s;
3038 void *vpp;
3039
3040 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3041 if (s == NULL)
3042 abort ();
3043
3044 vpp = &elf_section_data (s)->local_dynrel;
3045 return (struct elf_dyn_relocs **) vpp;
3046 }
3047}
3048
906e58ca
NC		 3049/* Initialize an entry in the stub hash table. */
3050
3051static struct bfd_hash_entry *
3052stub_hash_newfunc (struct bfd_hash_entry *entry,
3053 struct bfd_hash_table *table,
3054 const char *string)
3055{
3056 /* Allocate the structure if it has not already been allocated by a
3057 subclass. */
3058 if (entry == NULL)
3059 {
21d799b5
NC		 3060 entry = (struct bfd_hash_entry *)
3061 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3062 if (entry == NULL)
3063 return entry;
3064 }
3065
3066 /* Call the allocation method of the superclass. */
3067 entry = bfd_hash_newfunc (entry, table, string);
3068 if (entry != NULL)
3069 {
3070 struct elf32_arm_stub_hash_entry *eh;
3071
3072 /* Initialize the local fields. */
3073 eh = (struct elf32_arm_stub_hash_entry *) entry;
3074 eh->stub_sec = NULL;
3075 eh->stub_offset = 0;
3076 eh->target_value = 0;
3077 eh->target_section = NULL;
cedfb179
DK		 3078 eh->target_addend = 0;
3079 eh->orig_insn = 0;
906e58ca 3080 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3081 eh->stub_size = 0;
3082 eh->stub_template = NULL;
3083 eh->stub_template_size = 0;
906e58ca
NC		 3084 eh->h = NULL;
3085 eh->id_sec = NULL;
d8d2f433 3086 eh->output_name = NULL;
906e58ca
NC		 3087 }
3088
3089 return entry;
3090}
3091
00a97672 3092/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3093 shortcuts to them in our hash table. */
3094
3095static bfd_boolean
57e8b36a 3096create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3097{
3098 struct elf32_arm_link_hash_table *htab;
3099
e5a52504 3100 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3101 if (htab == NULL)
3102 return FALSE;
3103
e5a52504
MM		 3104 /* BPABI objects never have a GOT, or associated sections. */
3105 if (htab->symbian_p)
3106 return TRUE;
3107
5e681ec4
PB		 3108 if (! _bfd_elf_create_got_section (dynobj, info))
3109 return FALSE;
3110
5e681ec4
PB		 3111 return TRUE;
3112}
3113
34e77a92
RS		 3114/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3115
3116static bfd_boolean
3117create_ifunc_sections (struct bfd_link_info *info)
3118{
3119 struct elf32_arm_link_hash_table *htab;
3120 const struct elf_backend_data *bed;
3121 bfd *dynobj;
3122 asection *s;
3123 flagword flags;
3124
3125 htab = elf32_arm_hash_table (info);
3126 dynobj = htab->root.dynobj;
3127 bed = get_elf_backend_data (dynobj);
3128 flags = bed->dynamic_sec_flags;
3129
3130 if (htab->root.iplt == NULL)
3131 {
3132 s = bfd_make_section_with_flags (dynobj, ".iplt",
3133 flags | SEC_READONLY | SEC_CODE);
3134 if (s == NULL
3135 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3136 return FALSE;
3137 htab->root.iplt = s;
3138 }
3139
3140 if (htab->root.irelplt == NULL)
3141 {
3142 s = bfd_make_section_with_flags (dynobj, RELOC_SECTION (htab, ".iplt"),
3143 flags | SEC_READONLY);
3144 if (s == NULL
3145 || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
3146 return FALSE;
3147 htab->root.irelplt = s;
3148 }
3149
3150 if (htab->root.igotplt == NULL)
3151 {
3152 s = bfd_make_section_with_flags (dynobj, ".igot.plt", flags);
3153 if (s == NULL
3154 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3155 return FALSE;
3156 htab->root.igotplt = s;
3157 }
3158 return TRUE;
3159}
3160
00a97672
RS		 3161/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3162 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3163 hash table. */
3164
3165static bfd_boolean
57e8b36a 3166elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3167{
3168 struct elf32_arm_link_hash_table *htab;
3169
3170 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3171 if (htab == NULL)
3172 return FALSE;
3173
362d30a1 3174 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3175 return FALSE;
3176
3177 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3178 return FALSE;
3179
5e681ec4
PB		 3180 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
3181 if (!info->shared)
00a97672
RS		 3182 htab->srelbss = bfd_get_section_by_name (dynobj,
3183 RELOC_SECTION (htab, ".bss"));
3184
3185 if (htab->vxworks_p)
3186 {
3187 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3188 return FALSE;
3189
3190 if (info->shared)
3191 {
3192 htab->plt_header_size = 0;
3193 htab->plt_entry_size
3194 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3195 }
3196 else
3197 {
3198 htab->plt_header_size
3199 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3200 htab->plt_entry_size
3201 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3202 }
3203 }
5e681ec4 3204
362d30a1
RS		 3205 if (!htab->root.splt
3206 || !htab->root.srelplt
e5a52504 3207 || !htab->sdynbss
5e681ec4
PB		 3208 || (!info->shared && !htab->srelbss))
3209 abort ();
3210
3211 return TRUE;
3212}
3213
906e58ca
NC		 3214/* Copy the extra info we tack onto an elf_link_hash_entry. */
3215
3216static void
3217elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3218 struct elf_link_hash_entry *dir,
3219 struct elf_link_hash_entry *ind)
3220{
3221 struct elf32_arm_link_hash_entry *edir, *eind;
3222
3223 edir = (struct elf32_arm_link_hash_entry *) dir;
3224 eind = (struct elf32_arm_link_hash_entry *) ind;
3225
0bdcacaf 3226 if (eind->dyn_relocs != NULL)
906e58ca 3227 {
0bdcacaf 3228 if (edir->dyn_relocs != NULL)
906e58ca 3229 {
0bdcacaf
RS		 3230 struct elf_dyn_relocs **pp;
3231 struct elf_dyn_relocs *p;
906e58ca
NC		 3232
3233 /* Add reloc counts against the indirect sym to the direct sym
3234 list. Merge any entries against the same section. */
0bdcacaf 3235 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3236 {
0bdcacaf 3237 struct elf_dyn_relocs *q;
906e58ca 3238
0bdcacaf
RS		 3239 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3240 if (q->sec == p->sec)
906e58ca
NC		 3241 {
3242 q->pc_count += p->pc_count;
3243 q->count += p->count;
3244 *pp = p->next;
3245 break;
3246 }
3247 if (q == NULL)
3248 pp = &p->next;
3249 }
0bdcacaf 3250 *pp = edir->dyn_relocs;
906e58ca
NC		 3251 }
3252
0bdcacaf
RS		 3253 edir->dyn_relocs = eind->dyn_relocs;
3254 eind->dyn_relocs = NULL;
906e58ca
NC		 3255 }
3256
3257 if (ind->root.type == bfd_link_hash_indirect)
3258 {
3259 /* Copy over PLT info. */
34e77a92
RS		 3260 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3261 eind->plt.thumb_refcount = 0;
3262 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3263 eind->plt.maybe_thumb_refcount = 0;
3264 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3265 eind->plt.noncall_refcount = 0;
3266
3267 /* We should only allocate a function to .iplt once the final
3268 symbol information is known. */
3269 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3270
3271 if (dir->got.refcount <= 0)
3272 {
3273 edir->tls_type = eind->tls_type;
3274 eind->tls_type = GOT_UNKNOWN;
3275 }
3276 }
3277
3278 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3279}
3280
3281/* Create an ARM elf linker hash table. */
3282
3283static struct bfd_link_hash_table *
3284elf32_arm_link_hash_table_create (bfd *abfd)
3285{
3286 struct elf32_arm_link_hash_table *ret;
3287 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3288
21d799b5 3289 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 3290 if (ret == NULL)
3291 return NULL;
3292
3293 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3294 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3295 sizeof (struct elf32_arm_link_hash_entry),
3296 ARM_ELF_DATA))
906e58ca
NC		 3297 {
3298 free (ret);
3299 return NULL;
3300 }
3301
906e58ca
NC		 3302 ret->sdynbss = NULL;
3303 ret->srelbss = NULL;
3304 ret->srelplt2 = NULL;
0855e32b
NS		 3305 ret->dt_tlsdesc_plt = 0;
3306 ret->dt_tlsdesc_got = 0;
3307 ret->tls_trampoline = 0;
3308 ret->next_tls_desc_index = 0;
3309 ret->num_tls_desc = 0;
906e58ca
NC		 3310 ret->thumb_glue_size = 0;
3311 ret->arm_glue_size = 0;
3312 ret->bx_glue_size = 0;
3313 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3314 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3315 ret->vfp11_erratum_glue_size = 0;
3316 ret->num_vfp11_fixes = 0;
48229727 3317 ret->fix_cortex_a8 = 0;
906e58ca
NC		 3318 ret->bfd_of_glue_owner = NULL;
3319 ret->byteswap_code = 0;
3320 ret->target1_is_rel = 0;
3321 ret->target2_reloc = R_ARM_NONE;
3322#ifdef FOUR_WORD_PLT
3323 ret->plt_header_size = 16;
3324 ret->plt_entry_size = 16;
3325#else
3326 ret->plt_header_size = 20;
3327 ret->plt_entry_size = 12;
3328#endif
3329 ret->fix_v4bx = 0;
3330 ret->use_blx = 0;
3331 ret->vxworks_p = 0;
3332 ret->symbian_p = 0;
3333 ret->use_rel = 1;
87d72d41 3334 ret->sym_cache.abfd = NULL;
906e58ca
NC		 3335 ret->obfd = abfd;
3336 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 3337 ret->stub_bfd = NULL;
3338 ret->add_stub_section = NULL;
3339 ret->layout_sections_again = NULL;
3340 ret->stub_group = NULL;
fe33d2fa 3341 ret->top_id = 0;
6cee0a6f
L		 3342 ret->bfd_count = 0;
3343 ret->top_index = 0;
3344 ret->input_list = NULL;
906e58ca
NC		 3345
3346 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3347 sizeof (struct elf32_arm_stub_hash_entry)))
3348 {
3349 free (ret);
3350 return NULL;
3351 }
3352
3353 return &ret->root.root;
3354}
3355
3356/* Free the derived linker hash table. */
3357
3358static void
3359elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3360{
3361 struct elf32_arm_link_hash_table *ret
3362 = (struct elf32_arm_link_hash_table *) hash;
3363
3364 bfd_hash_table_free (&ret->stub_hash_table);
3365 _bfd_generic_link_hash_table_free (hash);
3366}
3367
3368/* Determine if we're dealing with a Thumb only architecture. */
3369
3370static bfd_boolean
3371using_thumb_only (struct elf32_arm_link_hash_table *globals)
3372{
3373 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3374 Tag_CPU_arch);
3375 int profile;
3376
41ed1ee7
DJ		 3377 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3378 return TRUE;
3379
9e3c6df6 3380 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3381 return FALSE;
3382
3383 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3384 Tag_CPU_arch_profile);
3385
3386 return profile == 'M';
3387}
3388
3389/* Determine if we're dealing with a Thumb-2 object. */
3390
3391static bfd_boolean
3392using_thumb2 (struct elf32_arm_link_hash_table *globals)
3393{
3394 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3395 Tag_CPU_arch);
3396 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3397}
3398
cd1dac3d
DG		 3399/* Determine what kind of NOPs are available. */
3400
3401static bfd_boolean
3402arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3403{
3404 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3405 Tag_CPU_arch);
3406 return arch == TAG_CPU_ARCH_V6T2
3407 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3408 || arch == TAG_CPU_ARCH_V7
3409 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3410}
3411
3412static bfd_boolean
3413arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3414{
3415 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3416 Tag_CPU_arch);
9e3c6df6
PB		 3417 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3418 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3419}
3420
f4ac8484
DJ		 3421static bfd_boolean
3422arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3423{
3424 switch (stub_type)
3425 {
fea2b4d6
CL		 3426 case arm_stub_long_branch_thumb_only:
3427 case arm_stub_long_branch_v4t_thumb_arm:
3428 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3429 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3430 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3431 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3432 return TRUE;
3433 case arm_stub_none:
3434 BFD_FAIL ();
3435 return FALSE;
3436 break;
3437 default:
3438 return FALSE;
3439 }
3440}
3441
906e58ca
NC		 3442/* Determine the type of stub needed, if any, for a call. */
3443
3444static enum elf32_arm_stub_type
3445arm_type_of_stub (struct bfd_link_info *info,
3446 asection *input_sec,
3447 const Elf_Internal_Rela *rel,
34e77a92 3448 unsigned char st_type,
35fc36a8 3449 enum arm_st_branch_type *actual_branch_type,
906e58ca 3450 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3451 bfd_vma destination,
3452 asection *sym_sec,
3453 bfd *input_bfd,
3454 const char *name)
906e58ca
NC		 3455{
3456 bfd_vma location;
3457 bfd_signed_vma branch_offset;
3458 unsigned int r_type;
3459 struct elf32_arm_link_hash_table * globals;
3460 int thumb2;
3461 int thumb_only;
3462 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3463 int use_plt = 0;
35fc36a8 3464 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3465 union gotplt_union *root_plt;
3466 struct arm_plt_info *arm_plt;
906e58ca 3467
35fc36a8 3468 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3469 return stub_type;
3470
906e58ca 3471 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3472 if (globals == NULL)
3473 return stub_type;
906e58ca
NC		 3474
3475 thumb_only = using_thumb_only (globals);
3476
3477 thumb2 = using_thumb2 (globals);
3478
3479 /* Determine where the call point is. */
3480 location = (input_sec->output_offset
3481 + input_sec->output_section->vma
3482 + rel->r_offset);
3483
906e58ca
NC		 3484 r_type = ELF32_R_TYPE (rel->r_info);
3485
34e77a92
RS		 3486 /* For TLS call relocs, it is the caller's responsibility to provide
3487 the address of the appropriate trampoline. */
3488 if (r_type != R_ARM_TLS_CALL
3489 && r_type != R_ARM_THM_TLS_CALL
3490 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3491 &root_plt, &arm_plt)
3492 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3493 {
34e77a92 3494 asection *splt;
fe33d2fa 3495
34e77a92
RS		 3496 if (hash == NULL || hash->is_iplt)
3497 splt = globals->root.iplt;
3498 else
3499 splt = globals->root.splt;
3500 if (splt != NULL)
3501 {
3502 use_plt = 1;
3503
3504 /* Note when dealing with PLT entries: the main PLT stub is in
3505 ARM mode, so if the branch is in Thumb mode, another
3506 Thumb->ARM stub will be inserted later just before the ARM
3507 PLT stub. We don't take this extra distance into account
3508 here, because if a long branch stub is needed, we'll add a
3509 Thumb->Arm one and branch directly to the ARM PLT entry
3510 because it avoids spreading offset corrections in several
3511 places. */
3512
3513 destination = (splt->output_section->vma
3514 + splt->output_offset
3515 + root_plt->offset);
3516 st_type = STT_FUNC;
3517 branch_type = ST_BRANCH_TO_ARM;
3518 }
5fa9e92f 3519 }
34e77a92
RS		 3520 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3521 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3522
fe33d2fa
CL		 3523 branch_offset = (bfd_signed_vma)(destination - location);
3524
0855e32b
NS		 3525 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3526 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3527 {
5fa9e92f
CL		 3528 /* Handle cases where:
3529 - this call goes too far (different Thumb/Thumb2 max
3530 distance)
155d87d7
CL		 3531 - it's a Thumb->Arm call and blx is not available, or it's a
3532 Thumb->Arm branch (not bl). A stub is needed in this case,
3533 but only if this call is not through a PLT entry. Indeed,
3534 PLT stubs handle mode switching already.
5fa9e92f 3535 */
906e58ca
NC		 3536 if ((!thumb2
3537 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3538 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3539 || (thumb2
3540 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3541 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3542 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3543 && (((r_type == R_ARM_THM_CALL
3544 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3545 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3546 && !use_plt))
906e58ca 3547 {
35fc36a8 3548 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3549 {
3550 /* Thumb to thumb. */
3551 if (!thumb_only)
3552 {
3553 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3554 /* PIC stubs. */
155d87d7
CL		 3555 ? ((globals->use_blx
3556 && (r_type ==R_ARM_THM_CALL))
3557 /* V5T and above. Stub starts with ARM code, so
3558 we must be able to switch mode before
3559 reaching it, which is only possible for 'bl'
3560 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3561 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3562 /* On V4T, use Thumb code only. */
d3626fb0 3563 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3564
3565 /* non-PIC stubs. */
155d87d7
CL		 3566 : ((globals->use_blx
3567 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3568 /* V5T and above. */
3569 ? arm_stub_long_branch_any_any
3570 /* V4T. */
d3626fb0 3571 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3572 }
3573 else
3574 {
3575 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3576 /* PIC stub. */
3577 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3578 /* non-PIC stub. */
3579 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3580 }
3581 }
3582 else
3583 {
3584 /* Thumb to arm. */
c820be07
NC		 3585 if (sym_sec != NULL
3586 && sym_sec->owner != NULL
3587 && !INTERWORK_FLAG (sym_sec->owner))
3588 {
3589 (*_bfd_error_handler)
3590 (_("%B(%s): warning: interworking not enabled.\n"
3591 " first occurrence: %B: Thumb call to ARM"),
3592 sym_sec->owner, input_bfd, name);
3593 }
3594
0855e32b
NS		 3595 stub_type =
3596 (info->shared | globals->pic_veneer)
c2b4a39d 3597 /* PIC stubs. */
0855e32b
NS		 3598 ? (r_type == R_ARM_THM_TLS_CALL
3599 /* TLS PIC stubs */
3600 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3601 : arm_stub_long_branch_v4t_thumb_tls_pic)
3602 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3603 /* V5T PIC and above. */
3604 ? arm_stub_long_branch_any_arm_pic
3605 /* V4T PIC stub. */
3606 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3607
3608 /* non-PIC stubs. */
0855e32b 3609 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3610 /* V5T and above. */
3611 ? arm_stub_long_branch_any_any
3612 /* V4T. */
3613 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3614
3615 /* Handle v4t short branches. */
fea2b4d6 3616 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3617 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3618 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3619 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3620 }
3621 }
3622 }
fe33d2fa
CL		 3623 else if (r_type == R_ARM_CALL
3624 || r_type == R_ARM_JUMP24
0855e32b
NS		 3625 || r_type == R_ARM_PLT32
3626 || r_type == R_ARM_TLS_CALL)
906e58ca 3627 {
35fc36a8 3628 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3629 {
3630 /* Arm to thumb. */
c820be07
NC		 3631
3632 if (sym_sec != NULL
3633 && sym_sec->owner != NULL
3634 && !INTERWORK_FLAG (sym_sec->owner))
3635 {
3636 (*_bfd_error_handler)
3637 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3638 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3639 sym_sec->owner, input_bfd, name);
3640 }
3641
3642 /* We have an extra 2-bytes reach because of
3643 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3644 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3645 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3646 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3647 || (r_type == R_ARM_JUMP24)
3648 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3649 {
3650 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3651 /* PIC stubs. */
ebe24dd4
CL		 3652 ? ((globals->use_blx)
3653 /* V5T and above. */
3654 ? arm_stub_long_branch_any_thumb_pic
3655 /* V4T stub. */
3656 : arm_stub_long_branch_v4t_arm_thumb_pic)
3657
c2b4a39d
CL		 3658 /* non-PIC stubs. */
3659 : ((globals->use_blx)
3660 /* V5T and above. */
3661 ? arm_stub_long_branch_any_any
3662 /* V4T. */
3663 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3664 }
3665 }
3666 else
3667 {
3668 /* Arm to arm. */
3669 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3670 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3671 {
0855e32b
NS		 3672 stub_type =
3673 (info->shared | globals->pic_veneer)
c2b4a39d 3674 /* PIC stubs. */
0855e32b
NS		 3675 ? (r_type == R_ARM_TLS_CALL
3676 /* TLS PIC Stub */
3677 ? arm_stub_long_branch_any_tls_pic
3678 : arm_stub_long_branch_any_arm_pic)
c2b4a39d 3679 /* non-PIC stubs. */
fea2b4d6 3680 : arm_stub_long_branch_any_any;
906e58ca
NC		 3681 }
3682 }
3683 }
3684
fe33d2fa
CL		 3685 /* If a stub is needed, record the actual destination type. */
3686 if (stub_type != arm_stub_none)
35fc36a8 3687 *actual_branch_type = branch_type;
fe33d2fa 3688
906e58ca
NC		 3689 return stub_type;
3690}
3691
3692/* Build a name for an entry in the stub hash table. */
3693
3694static char *
3695elf32_arm_stub_name (const asection *input_section,
3696 const asection *sym_sec,
3697 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3698 const Elf_Internal_Rela *rel,
3699 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3700{
3701 char *stub_name;
3702 bfd_size_type len;
3703
3704 if (hash)
3705 {
fe33d2fa 3706 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3707 stub_name = (char *) bfd_malloc (len);
906e58ca 3708 if (stub_name != NULL)
fe33d2fa 3709 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3710 input_section->id & 0xffffffff,
3711 hash->root.root.root.string,
fe33d2fa
CL		 3712 (int) rel->r_addend & 0xffffffff,
3713 (int) stub_type);
906e58ca
NC		 3714 }
3715 else
3716 {
fe33d2fa 3717 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3718 stub_name = (char *) bfd_malloc (len);
906e58ca 3719 if (stub_name != NULL)
fe33d2fa 3720 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3721 input_section->id & 0xffffffff,
3722 sym_sec->id & 0xffffffff,
0855e32b
NS		 3723 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3724 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3725 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3726 (int) rel->r_addend & 0xffffffff,
3727 (int) stub_type);
906e58ca
NC		 3728 }
3729
3730 return stub_name;
3731}
3732
3733/* Look up an entry in the stub hash. Stub entries are cached because
3734 creating the stub name takes a bit of time. */
3735
3736static struct elf32_arm_stub_hash_entry *
3737elf32_arm_get_stub_entry (const asection *input_section,
3738 const asection *sym_sec,
3739 struct elf_link_hash_entry *hash,
3740 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3741 struct elf32_arm_link_hash_table *htab,
3742 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3743{
3744 struct elf32_arm_stub_hash_entry *stub_entry;
3745 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3746 const asection *id_sec;
3747
3748 if ((input_section->flags & SEC_CODE) == 0)
3749 return NULL;
3750
3751 /* If this input section is part of a group of sections sharing one
3752 stub section, then use the id of the first section in the group.
3753 Stub names need to include a section id, as there may well be
3754 more than one stub used to reach say, printf, and we need to
3755 distinguish between them. */
3756 id_sec = htab->stub_group[input_section->id].link_sec;
3757
3758 if (h != NULL && h->stub_cache != NULL
3759 && h->stub_cache->h == h
fe33d2fa
CL		 3760 && h->stub_cache->id_sec == id_sec
3761 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3762 {
3763 stub_entry = h->stub_cache;
3764 }
3765 else
3766 {
3767 char *stub_name;
3768
fe33d2fa 3769 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3770 if (stub_name == NULL)
3771 return NULL;
3772
3773 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3774 stub_name, FALSE, FALSE);
3775 if (h != NULL)
3776 h->stub_cache = stub_entry;
3777
3778 free (stub_name);
3779 }
3780
3781 return stub_entry;
3782}
3783
48229727
JB		 3784/* Find or create a stub section. Returns a pointer to the stub section, and
3785 the section to which the stub section will be attached (in *LINK_SEC_P).
3786 LINK_SEC_P may be NULL. */
906e58ca 3787
48229727
JB		 3788static asection *
3789elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3790 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3791{
3792 asection *link_sec;
3793 asection *stub_sec;
906e58ca
NC		 3794
3795 link_sec = htab->stub_group[section->id].link_sec;
3796 stub_sec = htab->stub_group[section->id].stub_sec;
3797 if (stub_sec == NULL)
3798 {
3799 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3800 if (stub_sec == NULL)
3801 {
3802 size_t namelen;
3803 bfd_size_type len;
3804 char *s_name;
3805
3806 namelen = strlen (link_sec->name);
3807 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3808 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3809 if (s_name == NULL)
3810 return NULL;
3811
3812 memcpy (s_name, link_sec->name, namelen);
3813 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3814 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3815 if (stub_sec == NULL)
3816 return NULL;
3817 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3818 }
3819 htab->stub_group[section->id].stub_sec = stub_sec;
3820 }
48229727
JB		 3821
3822 if (link_sec_p)
3823 *link_sec_p = link_sec;
3824
3825 return stub_sec;
3826}
3827
3828/* Add a new stub entry to the stub hash. Not all fields of the new
3829 stub entry are initialised. */
3830
3831static struct elf32_arm_stub_hash_entry *
3832elf32_arm_add_stub (const char *stub_name,
3833 asection *section,
3834 struct elf32_arm_link_hash_table *htab)
3835{
3836 asection *link_sec;
3837 asection *stub_sec;
3838 struct elf32_arm_stub_hash_entry *stub_entry;
3839
3840 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3841 if (stub_sec == NULL)
3842 return NULL;
906e58ca
NC		 3843
3844 /* Enter this entry into the linker stub hash table. */
3845 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3846 TRUE, FALSE);
3847 if (stub_entry == NULL)
3848 {
3849 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3850 section->owner,
3851 stub_name);
3852 return NULL;
3853 }
3854
3855 stub_entry->stub_sec = stub_sec;
3856 stub_entry->stub_offset = 0;
3857 stub_entry->id_sec = link_sec;
3858
906e58ca
NC		 3859 return stub_entry;
3860}
3861
3862/* Store an Arm insn into an output section not processed by
3863 elf32_arm_write_section. */
3864
3865static void
8029a119
NC		 3866put_arm_insn (struct elf32_arm_link_hash_table * htab,
3867 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3868{
3869 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3870 bfd_putl32 (val, ptr);
3871 else
3872 bfd_putb32 (val, ptr);
3873}
3874
3875/* Store a 16-bit Thumb insn into an output section not processed by
3876 elf32_arm_write_section. */
3877
3878static void
8029a119
NC		 3879put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3880 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3881{
3882 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3883 bfd_putl16 (val, ptr);
3884 else
3885 bfd_putb16 (val, ptr);
3886}
3887
0855e32b
NS		 3888/* If it's possible to change R_TYPE to a more efficient access
3889 model, return the new reloc type. */
3890
3891static unsigned
3892elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
3893 struct elf_link_hash_entry *h)
3894{
3895 int is_local = (h == NULL);
3896
3897 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
3898 return r_type;
3899
3900 /* We do not support relaxations for Old TLS models. */
3901 switch (r_type)
3902 {
3903 case R_ARM_TLS_GOTDESC:
3904 case R_ARM_TLS_CALL:
3905 case R_ARM_THM_TLS_CALL:
3906 case R_ARM_TLS_DESCSEQ:
3907 case R_ARM_THM_TLS_DESCSEQ:
3908 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
3909 }
3910
3911 return r_type;
3912}
3913
48229727
JB		 3914static bfd_reloc_status_type elf32_arm_final_link_relocate
3915 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3916 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 3917 const char *, unsigned char, enum arm_st_branch_type,
3918 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 3919
4563a860
JB		 3920static unsigned int
3921arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
3922{
3923 switch (stub_type)
3924 {
3925 case arm_stub_a8_veneer_b_cond:
3926 case arm_stub_a8_veneer_b:
3927 case arm_stub_a8_veneer_bl:
3928 return 2;
3929
3930 case arm_stub_long_branch_any_any:
3931 case arm_stub_long_branch_v4t_arm_thumb:
3932 case arm_stub_long_branch_thumb_only:
3933 case arm_stub_long_branch_v4t_thumb_thumb:
3934 case arm_stub_long_branch_v4t_thumb_arm:
3935 case arm_stub_short_branch_v4t_thumb_arm:
3936 case arm_stub_long_branch_any_arm_pic:
3937 case arm_stub_long_branch_any_thumb_pic:
3938 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3939 case arm_stub_long_branch_v4t_arm_thumb_pic:
3940 case arm_stub_long_branch_v4t_thumb_arm_pic:
3941 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 3942 case arm_stub_long_branch_any_tls_pic:
3943 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 3944 case arm_stub_a8_veneer_blx:
3945 return 4;
3946
3947 default:
3948 abort (); /* Should be unreachable. */
3949 }
3950}
3951
906e58ca
NC		 3952static bfd_boolean
3953arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3954 void * in_arg)
3955{
48229727 3956#define MAXRELOCS 2
906e58ca 3957 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3958 struct elf32_arm_link_hash_table *globals;
906e58ca 3959 struct bfd_link_info *info;
906e58ca
NC		 3960 asection *stub_sec;
3961 bfd *stub_bfd;
906e58ca
NC		 3962 bfd_byte *loc;
3963 bfd_vma sym_value;
3964 int template_size;
3965 int size;
d3ce72d0 3966 const insn_sequence *template_sequence;
906e58ca 3967 int i;
48229727
JB		 3968 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3969 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3970 int nrelocs = 0;
906e58ca
NC		 3971
3972 /* Massage our args to the form they really have. */
3973 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3974 info = (struct bfd_link_info *) in_arg;
3975
3976 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3977 if (globals == NULL)
3978 return FALSE;
906e58ca 3979
906e58ca
NC		 3980 stub_sec = stub_entry->stub_sec;
3981
4dfe6ac6 3982 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 3983 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
3984 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 3985 return TRUE;
fe33d2fa 3986
906e58ca
NC		 3987 /* Make a note of the offset within the stubs for this entry. */
3988 stub_entry->stub_offset = stub_sec->size;
3989 loc = stub_sec->contents + stub_entry->stub_offset;
3990
3991 stub_bfd = stub_sec->owner;
3992
906e58ca
NC		 3993 /* This is the address of the stub destination. */
3994 sym_value = (stub_entry->target_value
3995 + stub_entry->target_section->output_offset
3996 + stub_entry->target_section->output_section->vma);
3997
d3ce72d0 3998 template_sequence = stub_entry->stub_template;
461a49ca 3999 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4000
4001 size = 0;
461a49ca 4002 for (i = 0; i < template_size; i++)
906e58ca 4003 {
d3ce72d0 4004 switch (template_sequence[i].type)
461a49ca
DJ		 4005 {
4006 case THUMB16_TYPE:
48229727 4007 {
d3ce72d0
NC		 4008 bfd_vma data = (bfd_vma) template_sequence[i].data;
4009 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 4010 {
4011 /* We've borrowed the reloc_addend field to mean we should
4012 insert a condition code into this (Thumb-1 branch)
4013 instruction. See THUMB16_BCOND_INSN. */
4014 BFD_ASSERT ((data & 0xff00) == 0xd000);
4015 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4016 }
fe33d2fa 4017 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4018 size += 2;
4019 }
461a49ca 4020 break;
906e58ca 4021
48229727 4022 case THUMB32_TYPE:
fe33d2fa
CL		 4023 bfd_put_16 (stub_bfd,
4024 (template_sequence[i].data >> 16) & 0xffff,
4025 loc + size);
4026 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4027 loc + size + 2);
d3ce72d0 4028 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 4029 {
4030 stub_reloc_idx[nrelocs] = i;
4031 stub_reloc_offset[nrelocs++] = size;
4032 }
4033 size += 4;
4034 break;
4035
461a49ca 4036 case ARM_TYPE:
fe33d2fa
CL		 4037 bfd_put_32 (stub_bfd, template_sequence[i].data,
4038 loc + size);
461a49ca
DJ		 4039 /* Handle cases where the target is encoded within the
4040 instruction. */
d3ce72d0 4041 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4042 {
48229727
JB		 4043 stub_reloc_idx[nrelocs] = i;
4044 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4045 }
4046 size += 4;
4047 break;
4048
4049 case DATA_TYPE:
d3ce72d0 4050 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4051 stub_reloc_idx[nrelocs] = i;
4052 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4053 size += 4;
4054 break;
4055
4056 default:
4057 BFD_FAIL ();
4058 return FALSE;
4059 }
906e58ca 4060 }
461a49ca 4061
906e58ca
NC		 4062 stub_sec->size += size;
4063
461a49ca
DJ		 4064 /* Stub size has already been computed in arm_size_one_stub. Check
4065 consistency. */
4066 BFD_ASSERT (size == stub_entry->stub_size);
4067
906e58ca 4068 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4069 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4070 sym_value |= 1;
4071
48229727
JB		 4072 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4073 in each stub. */
4074 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4075
48229727 4076 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4077 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4078 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4079 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4080 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4081 {
4082 Elf_Internal_Rela rel;
4083 bfd_boolean unresolved_reloc;
4084 char *error_message;
35fc36a8
RS		 4085 enum arm_st_branch_type branch_type
4086 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4087 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4088 bfd_vma points_to = sym_value + stub_entry->target_addend;
4089
4090 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 4091 rel.r_info = ELF32_R_INFO (0,
4092 template_sequence[stub_reloc_idx[i]].r_type);
4093 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4094
4095 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4096 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4097 template should refer back to the instruction after the original
4098 branch. */
4099 points_to = sym_value;
4100
33c6a8fc
JB		 4101 /* There may be unintended consequences if this is not true. */
4102 BFD_ASSERT (stub_entry->h == NULL);
4103
48229727
JB		 4104 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4105 properly. We should probably use this function unconditionally,
4106 rather than only for certain relocations listed in the enclosing
4107 conditional, for the sake of consistency. */
4108 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4109 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4110 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4111 points_to, info, stub_entry->target_section, "", STT_FUNC,
4112 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4113 &unresolved_reloc, &error_message);
48229727
JB		 4114 }
4115 else
4116 {
fe33d2fa
CL		 4117 Elf_Internal_Rela rel;
4118 bfd_boolean unresolved_reloc;
4119 char *error_message;
4120 bfd_vma points_to = sym_value + stub_entry->target_addend
4121 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4122
4123 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4124 rel.r_info = ELF32_R_INFO (0,
4125 template_sequence[stub_reloc_idx[i]].r_type);
4126 rel.r_addend = 0;
4127
4128 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4129 (template_sequence[stub_reloc_idx[i]].r_type),
4130 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4131 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4132 stub_entry->branch_type,
fe33d2fa
CL		 4133 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4134 &error_message);
48229727 4135 }
906e58ca
NC		 4136
4137 return TRUE;
48229727 4138#undef MAXRELOCS
906e58ca
NC		 4139}
4140
48229727
JB		 4141/* Calculate the template, template size and instruction size for a stub.
4142 Return value is the instruction size. */
906e58ca 4143
48229727
JB		 4144static unsigned int
4145find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4146 const insn_sequence **stub_template,
4147 int *stub_template_size)
906e58ca 4148{
d3ce72d0 4149 const insn_sequence *template_sequence = NULL;
48229727
JB		 4150 int template_size = 0, i;
4151 unsigned int size;
906e58ca 4152
d3ce72d0 4153 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4154 if (stub_template)
4155 *stub_template = template_sequence;
4156
48229727 4157 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4158 if (stub_template_size)
4159 *stub_template_size = template_size;
906e58ca
NC		 4160
4161 size = 0;
461a49ca
DJ		 4162 for (i = 0; i < template_size; i++)
4163 {
d3ce72d0 4164 switch (template_sequence[i].type)
461a49ca
DJ		 4165 {
4166 case THUMB16_TYPE:
4167 size += 2;
4168 break;
4169
4170 case ARM_TYPE:
48229727 4171 case THUMB32_TYPE:
461a49ca
DJ		 4172 case DATA_TYPE:
4173 size += 4;
4174 break;
4175
4176 default:
4177 BFD_FAIL ();
2a229407 4178 return 0;
461a49ca
DJ		 4179 }
4180 }
4181
48229727
JB		 4182 return size;
4183}
4184
4185/* As above, but don't actually build the stub. Just bump offset so
4186 we know stub section sizes. */
4187
4188static bfd_boolean
4189arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4190 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4191{
4192 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4193 const insn_sequence *template_sequence;
48229727
JB		 4194 int template_size, size;
4195
4196 /* Massage our args to the form they really have. */
4197 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4198
4199 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4200 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4201
d3ce72d0 4202 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4203 &template_size);
4204
461a49ca 4205 stub_entry->stub_size = size;
d3ce72d0 4206 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4207 stub_entry->stub_template_size = template_size;
4208
906e58ca
NC		 4209 size = (size + 7) & ~7;
4210 stub_entry->stub_sec->size += size;
461a49ca 4211
906e58ca
NC		 4212 return TRUE;
4213}
4214
4215/* External entry points for sizing and building linker stubs. */
4216
4217/* Set up various things so that we can make a list of input sections
4218 for each output section included in the link. Returns -1 on error,
4219 0 when no stubs will be needed, and 1 on success. */
4220
4221int
4222elf32_arm_setup_section_lists (bfd *output_bfd,
4223 struct bfd_link_info *info)
4224{
4225 bfd *input_bfd;
4226 unsigned int bfd_count;
4227 int top_id, top_index;
4228 asection *section;
4229 asection **input_list, **list;
4230 bfd_size_type amt;
4231 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4232
4dfe6ac6
NC		 4233 if (htab == NULL)
4234 return 0;
906e58ca
NC		 4235 if (! is_elf_hash_table (htab))
4236 return 0;
4237
4238 /* Count the number of input BFDs and find the top input section id. */
4239 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4240 input_bfd != NULL;
4241 input_bfd = input_bfd->link_next)
4242 {
4243 bfd_count += 1;
4244 for (section = input_bfd->sections;
4245 section != NULL;
4246 section = section->next)
4247 {
4248 if (top_id < section->id)
4249 top_id = section->id;
4250 }
4251 }
4252 htab->bfd_count = bfd_count;
4253
4254 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4255 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4256 if (htab->stub_group == NULL)
4257 return -1;
fe33d2fa 4258 htab->top_id = top_id;
906e58ca
NC		 4259
4260 /* We can't use output_bfd->section_count here to find the top output
4261 section index as some sections may have been removed, and
4262 _bfd_strip_section_from_output doesn't renumber the indices. */
4263 for (section = output_bfd->sections, top_index = 0;
4264 section != NULL;
4265 section = section->next)
4266 {
4267 if (top_index < section->index)
4268 top_index = section->index;
4269 }
4270
4271 htab->top_index = top_index;
4272 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4273 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4274 htab->input_list = input_list;
4275 if (input_list == NULL)
4276 return -1;
4277
4278 /* For sections we aren't interested in, mark their entries with a
4279 value we can check later. */
4280 list = input_list + top_index;
4281 do
4282 *list = bfd_abs_section_ptr;
4283 while (list-- != input_list);
4284
4285 for (section = output_bfd->sections;
4286 section != NULL;
4287 section = section->next)
4288 {
4289 if ((section->flags & SEC_CODE) != 0)
4290 input_list[section->index] = NULL;
4291 }
4292
4293 return 1;
4294}
4295
4296/* The linker repeatedly calls this function for each input section,
4297 in the order that input sections are linked into output sections.
4298 Build lists of input sections to determine groupings between which
4299 we may insert linker stubs. */
4300
4301void
4302elf32_arm_next_input_section (struct bfd_link_info *info,
4303 asection *isec)
4304{
4305 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4306
4dfe6ac6
NC		 4307 if (htab == NULL)
4308 return;
4309
906e58ca
NC		 4310 if (isec->output_section->index <= htab->top_index)
4311 {
4312 asection **list = htab->input_list + isec->output_section->index;
4313
a7470592 4314 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4315 {
4316 /* Steal the link_sec pointer for our list. */
4317#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4318 /* This happens to make the list in reverse order,
07d72278 4319 which we reverse later. */
906e58ca
NC		 4320 PREV_SEC (isec) = *list;
4321 *list = isec;
4322 }
4323 }
4324}
4325
4326/* See whether we can group stub sections together. Grouping stub
4327 sections may result in fewer stubs. More importantly, we need to
07d72278 4328 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4329 .fini output sections respectively, because glibc splits the
4330 _init and _fini functions into multiple parts. Putting a stub in
4331 the middle of a function is not a good idea. */
4332
4333static void
4334group_sections (struct elf32_arm_link_hash_table *htab,
4335 bfd_size_type stub_group_size,
07d72278 4336 bfd_boolean stubs_always_after_branch)
906e58ca 4337{
07d72278 4338 asection **list = htab->input_list;
906e58ca
NC		 4339
4340 do
4341 {
4342 asection *tail = *list;
07d72278 4343 asection *head;
906e58ca
NC		 4344
4345 if (tail == bfd_abs_section_ptr)
4346 continue;
4347
07d72278
DJ		 4348 /* Reverse the list: we must avoid placing stubs at the
4349 beginning of the section because the beginning of the text
4350 section may be required for an interrupt vector in bare metal
4351 code. */
4352#define NEXT_SEC PREV_SEC
e780aef2
CL		 4353 head = NULL;
4354 while (tail != NULL)
4355 {
4356 /* Pop from tail. */
4357 asection *item = tail;
4358 tail = PREV_SEC (item);
4359
4360 /* Push on head. */
4361 NEXT_SEC (item) = head;
4362 head = item;
4363 }
07d72278
DJ		 4364
4365 while (head != NULL)
906e58ca
NC		 4366 {
4367 asection *curr;
07d72278 4368 asection *next;
e780aef2
CL		 4369 bfd_vma stub_group_start = head->output_offset;
4370 bfd_vma end_of_next;
906e58ca 4371
07d72278 4372 curr = head;
e780aef2 4373 while (NEXT_SEC (curr) != NULL)
8cd931b7 4374 {
e780aef2
CL		 4375 next = NEXT_SEC (curr);
4376 end_of_next = next->output_offset + next->size;
4377 if (end_of_next - stub_group_start >= stub_group_size)
4378 /* End of NEXT is too far from start, so stop. */
8cd931b7 4379 break;
e780aef2
CL		 4380 /* Add NEXT to the group. */
4381 curr = next;
8cd931b7 4382 }
906e58ca 4383
07d72278 4384 /* OK, the size from the start to the start of CURR is less
906e58ca 4385 than stub_group_size and thus can be handled by one stub
07d72278 4386 section. (Or the head section is itself larger than
906e58ca
NC		 4387 stub_group_size, in which case we may be toast.)
4388 We should really be keeping track of the total size of
4389 stubs added here, as stubs contribute to the final output
7fb9f789 4390 section size. */
906e58ca
NC		 4391 do
4392 {
07d72278 4393 next = NEXT_SEC (head);
906e58ca 4394 /* Set up this stub group. */
07d72278 4395 htab->stub_group[head->id].link_sec = curr;
906e58ca 4396 }
07d72278 4397 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4398
4399 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4400 bytes after the stub section can be handled by it too. */
4401 if (!stubs_always_after_branch)
906e58ca 4402 {
e780aef2
CL		 4403 stub_group_start = curr->output_offset + curr->size;
4404
8cd931b7 4405 while (next != NULL)
906e58ca 4406 {
e780aef2
CL		 4407 end_of_next = next->output_offset + next->size;
4408 if (end_of_next - stub_group_start >= stub_group_size)
4409 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4410 break;
e780aef2 4411 /* Add NEXT to the stub group. */
07d72278
DJ		 4412 head = next;
4413 next = NEXT_SEC (head);
4414 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4415 }
4416 }
07d72278 4417 head = next;
906e58ca
NC		 4418 }
4419 }
07d72278 4420 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4421
4422 free (htab->input_list);
4423#undef PREV_SEC
07d72278 4424#undef NEXT_SEC
906e58ca
NC		 4425}
4426
48229727
JB		 4427/* Comparison function for sorting/searching relocations relating to Cortex-A8
4428 erratum fix. */
4429
4430static int
4431a8_reloc_compare (const void *a, const void *b)
4432{
21d799b5
NC		 4433 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4434 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4435
4436 if (ra->from < rb->from)
4437 return -1;
4438 else if (ra->from > rb->from)
4439 return 1;
4440 else
4441 return 0;
4442}
4443
4444static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4445 const char *, char **);
4446
4447/* Helper function to scan code for sequences which might trigger the Cortex-A8
4448 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4449 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4450 otherwise. */
4451
81694485
NC		 4452static bfd_boolean
4453cortex_a8_erratum_scan (bfd *input_bfd,
4454 struct bfd_link_info *info,
48229727
JB		 4455 struct a8_erratum_fix **a8_fixes_p,
4456 unsigned int *num_a8_fixes_p,
4457 unsigned int *a8_fix_table_size_p,
4458 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4459 unsigned int num_a8_relocs,
4460 unsigned prev_num_a8_fixes,
4461 bfd_boolean *stub_changed_p)
48229727
JB		 4462{
4463 asection *section;
4464 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4465 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4466 unsigned int num_a8_fixes = *num_a8_fixes_p;
4467 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4468
4dfe6ac6
NC		 4469 if (htab == NULL)
4470 return FALSE;
4471
48229727
JB		 4472 for (section = input_bfd->sections;
4473 section != NULL;
4474 section = section->next)
4475 {
4476 bfd_byte *contents = NULL;
4477 struct _arm_elf_section_data *sec_data;
4478 unsigned int span;
4479 bfd_vma base_vma;
4480
4481 if (elf_section_type (section) != SHT_PROGBITS
4482 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4483 || (section->flags & SEC_EXCLUDE) != 0
4484 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4485 || (section->output_section == bfd_abs_section_ptr))
4486 continue;
4487
4488 base_vma = section->output_section->vma + section->output_offset;
4489
4490 if (elf_section_data (section)->this_hdr.contents != NULL)
4491 contents = elf_section_data (section)->this_hdr.contents;
4492 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4493 return TRUE;
48229727
JB		 4494
4495 sec_data = elf32_arm_section_data (section);
4496
4497 for (span = 0; span < sec_data->mapcount; span++)
4498 {
4499 unsigned int span_start = sec_data->map[span].vma;
4500 unsigned int span_end = (span == sec_data->mapcount - 1)
4501 ? section->size : sec_data->map[span + 1].vma;
4502 unsigned int i;
4503 char span_type = sec_data->map[span].type;
4504 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4505
4506 if (span_type != 't')
4507 continue;
4508
4509 /* Span is entirely within a single 4KB region: skip scanning. */
4510 if (((base_vma + span_start) & ~0xfff)
4511 == ((base_vma + span_end) & ~0xfff))
4512 continue;
4513
4514 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4515
4516 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4517 * The branch target is in the same 4KB region as the
4518 first half of the branch.
4519 * The instruction before the branch is a 32-bit
81694485 4520 length non-branch instruction. */
48229727
JB		 4521 for (i = span_start; i < span_end;)
4522 {
4523 unsigned int insn = bfd_getl16 (&contents[i]);
4524 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4525 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4526
4527 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4528 insn_32bit = TRUE;
4529
4530 if (insn_32bit)
4531 {
4532 /* Load the rest of the insn (in manual-friendly order). */
4533 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4534
4535 /* Encoding T4: B<c>.W. */
4536 is_b = (insn & 0xf800d000) == 0xf0009000;
4537 /* Encoding T1: BL<c>.W. */
4538 is_bl = (insn & 0xf800d000) == 0xf000d000;
4539 /* Encoding T2: BLX<c>.W. */
4540 is_blx = (insn & 0xf800d000) == 0xf000c000;
4541 /* Encoding T3: B<c>.W (not permitted in IT block). */
4542 is_bcc = (insn & 0xf800d000) == 0xf0008000
4543 && (insn & 0x07f00000) != 0x03800000;
4544 }
4545
4546 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4547
81694485
NC		 4548 if (((base_vma + i) & 0xfff) == 0xffe
4549 && insn_32bit
4550 && is_32bit_branch
4551 && last_was_32bit
4552 && ! last_was_branch)
48229727 4553 {
8f73510c 4554 bfd_signed_vma offset = 0;
48229727
JB		 4555 bfd_boolean force_target_arm = FALSE;
4556 bfd_boolean force_target_thumb = FALSE;
4557 bfd_vma target;
4558 enum elf32_arm_stub_type stub_type = arm_stub_none;
4559 struct a8_erratum_reloc key, *found;
7d24e6a6 4560 bfd_boolean use_plt = FALSE;
48229727
JB		 4561
4562 key.from = base_vma + i;
21d799b5
NC		 4563 found = (struct a8_erratum_reloc *)
4564 bsearch (&key, a8_relocs, num_a8_relocs,
4565 sizeof (struct a8_erratum_reloc),
4566 &a8_reloc_compare);
48229727
JB		 4567
4568 if (found)
4569 {
4570 char *error_message = NULL;
4571 struct elf_link_hash_entry *entry;
4572
4573 /* We don't care about the error returned from this
4574 function, only if there is glue or not. */
4575 entry = find_thumb_glue (info, found->sym_name,
4576 &error_message);
4577
4578 if (entry)
4579 found->non_a8_stub = TRUE;
4580
92750f34 4581 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4582 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4583 && found->hash->root.plt.offset != (bfd_vma) -1)
4584 use_plt = TRUE;
4585
4586 if (found->r_type == R_ARM_THM_CALL)
4587 {
35fc36a8
RS		 4588 if (found->branch_type == ST_BRANCH_TO_ARM
4589 || use_plt)
92750f34
DJ		 4590 force_target_arm = TRUE;
4591 else
4592 force_target_thumb = TRUE;
4593 }
48229727
JB		 4594 }
4595
4596 /* Check if we have an offending branch instruction. */
4597
4598 if (found && found->non_a8_stub)
4599 /* We've already made a stub for this instruction, e.g.
4600 it's a long branch or a Thumb->ARM stub. Assume that
4601 stub will suffice to work around the A8 erratum (see
4602 setting of always_after_branch above). */
4603 ;
4604 else if (is_bcc)
4605 {
4606 offset = (insn & 0x7ff) << 1;
4607 offset |= (insn & 0x3f0000) >> 4;
4608 offset |= (insn & 0x2000) ? 0x40000 : 0;
4609 offset |= (insn & 0x800) ? 0x80000 : 0;
4610 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4611 if (offset & 0x100000)
81694485 4612 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4613 stub_type = arm_stub_a8_veneer_b_cond;
4614 }
4615 else if (is_b || is_bl || is_blx)
4616 {
4617 int s = (insn & 0x4000000) != 0;
4618 int j1 = (insn & 0x2000) != 0;
4619 int j2 = (insn & 0x800) != 0;
4620 int i1 = !(j1 ^ s);
4621 int i2 = !(j2 ^ s);
4622
4623 offset = (insn & 0x7ff) << 1;
4624 offset |= (insn & 0x3ff0000) >> 4;
4625 offset |= i2 << 22;
4626 offset |= i1 << 23;
4627 offset |= s << 24;
4628 if (offset & 0x1000000)
81694485 4629 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4630
4631 if (is_blx)
81694485 4632 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4633
4634 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4635 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4636 }
4637
4638 if (stub_type != arm_stub_none)
4639 {
4640 bfd_vma pc_for_insn = base_vma + i + 4;
4641
4642 /* The original instruction is a BL, but the target is
4643 an ARM instruction. If we were not making a stub,
4644 the BL would have been converted to a BLX. Use the
4645 BLX stub instead in that case. */
4646 if (htab->use_blx && force_target_arm
4647 && stub_type == arm_stub_a8_veneer_bl)
4648 {
4649 stub_type = arm_stub_a8_veneer_blx;
4650 is_blx = TRUE;
4651 is_bl = FALSE;
4652 }
4653 /* Conversely, if the original instruction was
4654 BLX but the target is Thumb mode, use the BL
4655 stub. */
4656 else if (force_target_thumb
4657 && stub_type == arm_stub_a8_veneer_blx)
4658 {
4659 stub_type = arm_stub_a8_veneer_bl;
4660 is_blx = FALSE;
4661 is_bl = TRUE;
4662 }
4663
4664 if (is_blx)
81694485 4665 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4666
4667 /* If we found a relocation, use the proper destination,
4668 not the offset in the (unrelocated) instruction.
4669 Note this is always done if we switched the stub type
4670 above. */
4671 if (found)
81694485
NC		 4672 offset =
4673 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4674
7d24e6a6
RS		 4675 /* If the stub will use a Thumb-mode branch to a
4676 PLT target, redirect it to the preceding Thumb
4677 entry point. */
4678 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4679 offset -= PLT_THUMB_STUB_SIZE;
4680
48229727
JB		 4681 target = pc_for_insn + offset;
4682
4683 /* The BLX stub is ARM-mode code. Adjust the offset to
4684 take the different PC value (+8 instead of +4) into
4685 account. */
4686 if (stub_type == arm_stub_a8_veneer_blx)
4687 offset += 4;
4688
4689 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4690 {
eb7c4339 4691 char *stub_name = NULL;
48229727
JB		 4692
4693 if (num_a8_fixes == a8_fix_table_size)
4694 {
4695 a8_fix_table_size *= 2;
21d799b5
NC		 4696 a8_fixes = (struct a8_erratum_fix *)
4697 bfd_realloc (a8_fixes,
4698 sizeof (struct a8_erratum_fix)
4699 * a8_fix_table_size);
48229727
JB		 4700 }
4701
eb7c4339
NS		 4702 if (num_a8_fixes < prev_num_a8_fixes)
4703 {
4704 /* If we're doing a subsequent scan,
4705 check if we've found the same fix as
4706 before, and try and reuse the stub
4707 name. */
4708 stub_name = a8_fixes[num_a8_fixes].stub_name;
4709 if ((a8_fixes[num_a8_fixes].section != section)
4710 || (a8_fixes[num_a8_fixes].offset != i))
4711 {
4712 free (stub_name);
4713 stub_name = NULL;
4714 *stub_changed_p = TRUE;
4715 }
4716 }
4717
4718 if (!stub_name)
4719 {
21d799b5 4720 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4721 if (stub_name != NULL)
4722 sprintf (stub_name, "%x:%x", section->id, i);
4723 }
48229727
JB		 4724
4725 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4726 a8_fixes[num_a8_fixes].section = section;
4727 a8_fixes[num_a8_fixes].offset = i;
4728 a8_fixes[num_a8_fixes].addend = offset;
4729 a8_fixes[num_a8_fixes].orig_insn = insn;
4730 a8_fixes[num_a8_fixes].stub_name = stub_name;
4731 a8_fixes[num_a8_fixes].stub_type = stub_type;
35fc36a8
RS		 4732 a8_fixes[num_a8_fixes].branch_type =
4733 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727
JB		 4734
4735 num_a8_fixes++;
4736 }
4737 }
4738 }
4739
4740 i += insn_32bit ? 4 : 2;
4741 last_was_32bit = insn_32bit;
4742 last_was_branch = is_32bit_branch;
4743 }
4744 }
4745
4746 if (elf_section_data (section)->this_hdr.contents == NULL)
4747 free (contents);
4748 }
fe33d2fa 4749
48229727
JB		 4750 *a8_fixes_p = a8_fixes;
4751 *num_a8_fixes_p = num_a8_fixes;
4752 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4753
81694485 4754 return FALSE;
48229727
JB		 4755}
4756
906e58ca
NC		 4757/* Determine and set the size of the stub section for a final link.
4758
4759 The basic idea here is to examine all the relocations looking for
4760 PC-relative calls to a target that is unreachable with a "bl"
4761 instruction. */
4762
4763bfd_boolean
4764elf32_arm_size_stubs (bfd *output_bfd,
4765 bfd *stub_bfd,
4766 struct bfd_link_info *info,
4767 bfd_signed_vma group_size,
4768 asection * (*add_stub_section) (const char *, asection *),
4769 void (*layout_sections_again) (void))
4770{
4771 bfd_size_type stub_group_size;
07d72278 4772 bfd_boolean stubs_always_after_branch;
906e58ca 4773 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4774 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4775 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4776 struct a8_erratum_reloc *a8_relocs = NULL;
4777 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4778
4dfe6ac6
NC		 4779 if (htab == NULL)
4780 return FALSE;
4781
48229727
JB		 4782 if (htab->fix_cortex_a8)
4783 {
21d799b5
NC		 4784 a8_fixes = (struct a8_erratum_fix *)
4785 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4786 a8_relocs = (struct a8_erratum_reloc *)
4787 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4788 }
906e58ca
NC		 4789
4790 /* Propagate mach to stub bfd, because it may not have been
4791 finalized when we created stub_bfd. */
4792 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4793 bfd_get_mach (output_bfd));
4794
4795 /* Stash our params away. */
4796 htab->stub_bfd = stub_bfd;
4797 htab->add_stub_section = add_stub_section;
4798 htab->layout_sections_again = layout_sections_again;
07d72278 4799 stubs_always_after_branch = group_size < 0;
48229727
JB		 4800
4801 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4802 as the first half of a 32-bit branch straddling two 4K pages. This is a
4803 crude way of enforcing that. */
4804 if (htab->fix_cortex_a8)
4805 stubs_always_after_branch = 1;
4806
906e58ca
NC		 4807 if (group_size < 0)
4808 stub_group_size = -group_size;
4809 else
4810 stub_group_size = group_size;
4811
4812 if (stub_group_size == 1)
4813 {
4814 /* Default values. */
4815 /* Thumb branch range is +-4MB has to be used as the default
4816 maximum size (a given section can contain both ARM and Thumb
4817 code, so the worst case has to be taken into account).
4818
4819 This value is 24K less than that, which allows for 2025
4820 12-byte stubs. If we exceed that, then we will fail to link.
4821 The user will have to relink with an explicit group size
4822 option. */
4823 stub_group_size = 4170000;
4824 }
4825
07d72278 4826 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4827
3ae046cc
NS		 4828 /* If we're applying the cortex A8 fix, we need to determine the
4829 program header size now, because we cannot change it later --
4830 that could alter section placements. Notice the A8 erratum fix
4831 ends up requiring the section addresses to remain unchanged
4832 modulo the page size. That's something we cannot represent
4833 inside BFD, and we don't want to force the section alignment to
4834 be the page size. */
4835 if (htab->fix_cortex_a8)
4836 (*htab->layout_sections_again) ();
4837
906e58ca
NC		 4838 while (1)
4839 {
4840 bfd *input_bfd;
4841 unsigned int bfd_indx;
4842 asection *stub_sec;
eb7c4339
NS		 4843 bfd_boolean stub_changed = FALSE;
4844 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4845
48229727 4846 num_a8_fixes = 0;
906e58ca
NC		 4847 for (input_bfd = info->input_bfds, bfd_indx = 0;
4848 input_bfd != NULL;
4849 input_bfd = input_bfd->link_next, bfd_indx++)
4850 {
4851 Elf_Internal_Shdr *symtab_hdr;
4852 asection *section;
4853 Elf_Internal_Sym *local_syms = NULL;
4854
48229727
JB		 4855 num_a8_relocs = 0;
4856
906e58ca
NC		 4857 /* We'll need the symbol table in a second. */
4858 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4859 if (symtab_hdr->sh_info == 0)
4860 continue;
4861
4862 /* Walk over each section attached to the input bfd. */
4863 for (section = input_bfd->sections;
4864 section != NULL;
4865 section = section->next)
4866 {
4867 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4868
4869 /* If there aren't any relocs, then there's nothing more
4870 to do. */
4871 if ((section->flags & SEC_RELOC) == 0
4872 || section->reloc_count == 0
4873 || (section->flags & SEC_CODE) == 0)
4874 continue;
4875
4876 /* If this section is a link-once section that will be
4877 discarded, then don't create any stubs. */
4878 if (section->output_section == NULL
4879 || section->output_section->owner != output_bfd)
4880 continue;
4881
4882 /* Get the relocs. */
4883 internal_relocs
4884 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4885 NULL, info->keep_memory);
4886 if (internal_relocs == NULL)
4887 goto error_ret_free_local;
4888
4889 /* Now examine each relocation. */
4890 irela = internal_relocs;
4891 irelaend = irela + section->reloc_count;
4892 for (; irela < irelaend; irela++)
4893 {
4894 unsigned int r_type, r_indx;
4895 enum elf32_arm_stub_type stub_type;
4896 struct elf32_arm_stub_hash_entry *stub_entry;
4897 asection *sym_sec;
4898 bfd_vma sym_value;
4899 bfd_vma destination;
4900 struct elf32_arm_link_hash_entry *hash;
7413f23f 4901 const char *sym_name;
906e58ca
NC		 4902 char *stub_name;
4903 const asection *id_sec;
34e77a92 4904 unsigned char st_type;
35fc36a8 4905 enum arm_st_branch_type branch_type;
48229727 4906 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4907
4908 r_type = ELF32_R_TYPE (irela->r_info);
4909 r_indx = ELF32_R_SYM (irela->r_info);
4910
4911 if (r_type >= (unsigned int) R_ARM_max)
4912 {
4913 bfd_set_error (bfd_error_bad_value);
4914 error_ret_free_internal:
4915 if (elf_section_data (section)->relocs == NULL)
4916 free (internal_relocs);
4917 goto error_ret_free_local;
4918 }
0855e32b
NS		 4919
4920 hash = NULL;
4921 if (r_indx >= symtab_hdr->sh_info)
4922 hash = elf32_arm_hash_entry
4923 (elf_sym_hashes (input_bfd)
4924 [r_indx - symtab_hdr->sh_info]);
4925
4926 /* Only look for stubs on branch instructions, or
4927 non-relaxed TLSCALL */
906e58ca 4928 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4929 && (r_type != (unsigned int) R_ARM_THM_CALL)
4930 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4931 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4932 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 4933 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 4934 && (r_type != (unsigned int) R_ARM_PLT32)
4935 && !((r_type == (unsigned int) R_ARM_TLS_CALL
4936 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4937 && r_type == elf32_arm_tls_transition
4938 (info, r_type, &hash->root)
4939 && ((hash ? hash->tls_type
4940 : (elf32_arm_local_got_tls_type
4941 (input_bfd)[r_indx]))
4942 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 4943 continue;
4944
4945 /* Now determine the call target, its name, value,
4946 section. */
4947 sym_sec = NULL;
4948 sym_value = 0;
4949 destination = 0;
7413f23f 4950 sym_name = NULL;
0855e32b
NS		 4951
4952 if (r_type == (unsigned int) R_ARM_TLS_CALL
4953 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4954 {
4955 /* A non-relaxed TLS call. The target is the
4956 plt-resident trampoline and nothing to do
4957 with the symbol. */
4958 BFD_ASSERT (htab->tls_trampoline > 0);
4959 sym_sec = htab->root.splt;
4960 sym_value = htab->tls_trampoline;
4961 hash = 0;
34e77a92 4962 st_type = STT_FUNC;
35fc36a8 4963 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 4964 }
4965 else if (!hash)
906e58ca
NC		 4966 {
4967 /* It's a local symbol. */
4968 Elf_Internal_Sym *sym;
906e58ca
NC		 4969
4970 if (local_syms == NULL)
4971 {
4972 local_syms
4973 = (Elf_Internal_Sym *) symtab_hdr->contents;
4974 if (local_syms == NULL)
4975 local_syms
4976 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4977 symtab_hdr->sh_info, 0,
4978 NULL, NULL, NULL);
4979 if (local_syms == NULL)
4980 goto error_ret_free_internal;
4981 }
4982
4983 sym = local_syms + r_indx;
f6d250ce
TS		 4984 if (sym->st_shndx == SHN_UNDEF)
4985 sym_sec = bfd_und_section_ptr;
4986 else if (sym->st_shndx == SHN_ABS)
4987 sym_sec = bfd_abs_section_ptr;
4988 else if (sym->st_shndx == SHN_COMMON)
4989 sym_sec = bfd_com_section_ptr;
4990 else
4991 sym_sec =
4992 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
4993
ffcb4889
NS		 4994 if (!sym_sec)
4995 /* This is an undefined symbol. It can never
4996 be resolved. */
4997 continue;
fe33d2fa 4998
906e58ca
NC		 4999 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5000 sym_value = sym->st_value;
5001 destination = (sym_value + irela->r_addend
5002 + sym_sec->output_offset
5003 + sym_sec->output_section->vma);
34e77a92 5004 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5005 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5006 sym_name
5007 = bfd_elf_string_from_elf_section (input_bfd,
5008 symtab_hdr->sh_link,
5009 sym->st_name);
906e58ca
NC		 5010 }
5011 else
5012 {
5013 /* It's an external symbol. */
906e58ca
NC		 5014 while (hash->root.root.type == bfd_link_hash_indirect
5015 || hash->root.root.type == bfd_link_hash_warning)
5016 hash = ((struct elf32_arm_link_hash_entry *)
5017 hash->root.root.u.i.link);
5018
5019 if (hash->root.root.type == bfd_link_hash_defined
5020 || hash->root.root.type == bfd_link_hash_defweak)
5021 {
5022 sym_sec = hash->root.root.u.def.section;
5023 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5024
5025 struct elf32_arm_link_hash_table *globals =
5026 elf32_arm_hash_table (info);
5027
5028 /* For a destination in a shared library,
5029 use the PLT stub as target address to
5030 decide whether a branch stub is
5031 needed. */
4dfe6ac6 5032 if (globals != NULL
362d30a1 5033 && globals->root.splt != NULL
4dfe6ac6 5034 && hash != NULL
022f8312
CL		 5035 && hash->root.plt.offset != (bfd_vma) -1)
5036 {
362d30a1 5037 sym_sec = globals->root.splt;
022f8312
CL		 5038 sym_value = hash->root.plt.offset;
5039 if (sym_sec->output_section != NULL)
5040 destination = (sym_value
5041 + sym_sec->output_offset
5042 + sym_sec->output_section->vma);
5043 }
5044 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5045 destination = (sym_value + irela->r_addend
5046 + sym_sec->output_offset
5047 + sym_sec->output_section->vma);
5048 }
69c5861e
CL		 5049 else if ((hash->root.root.type == bfd_link_hash_undefined)
5050 || (hash->root.root.type == bfd_link_hash_undefweak))
5051 {
5052 /* For a shared library, use the PLT stub as
5053 target address to decide whether a long
5054 branch stub is needed.
5055 For absolute code, they cannot be handled. */
5056 struct elf32_arm_link_hash_table *globals =
5057 elf32_arm_hash_table (info);
5058
4dfe6ac6 5059 if (globals != NULL
362d30a1 5060 && globals->root.splt != NULL
4dfe6ac6 5061 && hash != NULL
69c5861e
CL		 5062 && hash->root.plt.offset != (bfd_vma) -1)
5063 {
362d30a1 5064 sym_sec = globals->root.splt;
69c5861e
CL		 5065 sym_value = hash->root.plt.offset;
5066 if (sym_sec->output_section != NULL)
5067 destination = (sym_value
5068 + sym_sec->output_offset
5069 + sym_sec->output_section->vma);
5070 }
5071 else
5072 continue;
5073 }
906e58ca
NC		 5074 else
5075 {
5076 bfd_set_error (bfd_error_bad_value);
5077 goto error_ret_free_internal;
5078 }
34e77a92 5079 st_type = hash->root.type;
35fc36a8 5080 branch_type = hash->root.target_internal;
7413f23f 5081 sym_name = hash->root.root.root.string;
906e58ca
NC		 5082 }
5083
48229727 5084 do
7413f23f 5085 {
48229727
JB		 5086 /* Determine what (if any) linker stub is needed. */
5087 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5088 st_type, &branch_type,
5089 hash, destination, sym_sec,
48229727
JB		 5090 input_bfd, sym_name);
5091 if (stub_type == arm_stub_none)
5092 break;
5093
5094 /* Support for grouping stub sections. */
5095 id_sec = htab->stub_group[section->id].link_sec;
5096
5097 /* Get the name of this stub. */
5098 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5099 irela, stub_type);
48229727
JB		 5100 if (!stub_name)
5101 goto error_ret_free_internal;
5102
5103 /* We've either created a stub for this reloc already,
5104 or we are about to. */
5105 created_stub = TRUE;
5106
5107 stub_entry = arm_stub_hash_lookup
5108 (&htab->stub_hash_table, stub_name,
5109 FALSE, FALSE);
5110 if (stub_entry != NULL)
5111 {
5112 /* The proper stub has already been created. */
5113 free (stub_name);
eb7c4339 5114 stub_entry->target_value = sym_value;
48229727
JB		 5115 break;
5116 }
7413f23f 5117
48229727
JB		 5118 stub_entry = elf32_arm_add_stub (stub_name, section,
5119 htab);
5120 if (stub_entry == NULL)
5121 {
5122 free (stub_name);
5123 goto error_ret_free_internal;
5124 }
7413f23f 5125
48229727
JB		 5126 stub_entry->target_value = sym_value;
5127 stub_entry->target_section = sym_sec;
5128 stub_entry->stub_type = stub_type;
5129 stub_entry->h = hash;
35fc36a8 5130 stub_entry->branch_type = branch_type;
48229727
JB		 5131
5132 if (sym_name == NULL)
5133 sym_name = "unnamed";
21d799b5
NC		 5134 stub_entry->output_name = (char *)
5135 bfd_alloc (htab->stub_bfd,
48229727
JB		 5136 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5137 + strlen (sym_name));
5138 if (stub_entry->output_name == NULL)
5139 {
5140 free (stub_name);
5141 goto error_ret_free_internal;
5142 }
5143
5144 /* For historical reasons, use the existing names for
5145 ARM-to-Thumb and Thumb-to-ARM stubs. */
35fc36a8
RS		 5146 if ((r_type == (unsigned int) R_ARM_THM_CALL
5147 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5148 && branch_type == ST_BRANCH_TO_ARM)
48229727
JB		 5149 sprintf (stub_entry->output_name,
5150 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
35fc36a8
RS		 5151 else if ((r_type == (unsigned int) R_ARM_CALL
5152 || r_type == (unsigned int) R_ARM_JUMP24)
5153 && branch_type == ST_BRANCH_TO_THUMB)
48229727
JB		 5154 sprintf (stub_entry->output_name,
5155 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5156 else
5157 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5158 sym_name);
5159
5160 stub_changed = TRUE;
5161 }
5162 while (0);
5163
5164 /* Look for relocations which might trigger Cortex-A8
5165 erratum. */
5166 if (htab->fix_cortex_a8
5167 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5168 || r_type == (unsigned int) R_ARM_THM_JUMP19
5169 || r_type == (unsigned int) R_ARM_THM_CALL
5170 || r_type == (unsigned int) R_ARM_THM_XPC22))
5171 {
5172 bfd_vma from = section->output_section->vma
5173 + section->output_offset
5174 + irela->r_offset;
5175
5176 if ((from & 0xfff) == 0xffe)
5177 {
5178 /* Found a candidate. Note we haven't checked the
5179 destination is within 4K here: if we do so (and
5180 don't create an entry in a8_relocs) we can't tell
5181 that a branch should have been relocated when
5182 scanning later. */
5183 if (num_a8_relocs == a8_reloc_table_size)
5184 {
5185 a8_reloc_table_size *= 2;
21d799b5
NC		 5186 a8_relocs = (struct a8_erratum_reloc *)
5187 bfd_realloc (a8_relocs,
5188 sizeof (struct a8_erratum_reloc)
5189 * a8_reloc_table_size);
48229727
JB		 5190 }
5191
5192 a8_relocs[num_a8_relocs].from = from;
5193 a8_relocs[num_a8_relocs].destination = destination;
5194 a8_relocs[num_a8_relocs].r_type = r_type;
35fc36a8 5195 a8_relocs[num_a8_relocs].branch_type = branch_type;
48229727
JB		 5196 a8_relocs[num_a8_relocs].sym_name = sym_name;
5197 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 5198 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 5199
5200 num_a8_relocs++;
5201 }
5202 }
906e58ca
NC		 5203 }
5204
48229727
JB		 5205 /* We're done with the internal relocs, free them. */
5206 if (elf_section_data (section)->relocs == NULL)
5207 free (internal_relocs);
5208 }
5209
5210 if (htab->fix_cortex_a8)
5211 {
5212 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 5213 qsort (a8_relocs, num_a8_relocs,
5214 sizeof (struct a8_erratum_reloc),
48229727
JB		 5215 &a8_reloc_compare);
5216
5217 /* Scan for branches which might trigger Cortex-A8 erratum. */
5218 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5219 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5220 a8_relocs, num_a8_relocs,
5221 prev_num_a8_fixes, &stub_changed)
5222 != 0)
48229727 5223 goto error_ret_free_local;
5e681ec4 5224 }
5e681ec4
PB		 5225 }
5226
eb7c4339 5227 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 5228 stub_changed = TRUE;
5229
906e58ca
NC		 5230 if (!stub_changed)
5231 break;
5e681ec4 5232
906e58ca
NC		 5233 /* OK, we've added some stubs. Find out the new size of the
5234 stub sections. */
5235 for (stub_sec = htab->stub_bfd->sections;
5236 stub_sec != NULL;
5237 stub_sec = stub_sec->next)
3e6b1042
DJ		 5238 {
5239 /* Ignore non-stub sections. */
5240 if (!strstr (stub_sec->name, STUB_SUFFIX))
5241 continue;
5242
5243 stub_sec->size = 0;
5244 }
b34b2d70 5245
906e58ca
NC		 5246 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5247
48229727
JB		 5248 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5249 if (htab->fix_cortex_a8)
5250 for (i = 0; i < num_a8_fixes; i++)
5251 {
5252 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5253 a8_fixes[i].section, htab);
5254
5255 if (stub_sec == NULL)
5256 goto error_ret_free_local;
5257
5258 stub_sec->size
5259 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5260 NULL);
5261 }
5262
5263
906e58ca
NC		 5264 /* Ask the linker to do its stuff. */
5265 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5266 }
5267
48229727
JB		 5268 /* Add stubs for Cortex-A8 erratum fixes now. */
5269 if (htab->fix_cortex_a8)
5270 {
5271 for (i = 0; i < num_a8_fixes; i++)
5272 {
5273 struct elf32_arm_stub_hash_entry *stub_entry;
5274 char *stub_name = a8_fixes[i].stub_name;
5275 asection *section = a8_fixes[i].section;
5276 unsigned int section_id = a8_fixes[i].section->id;
5277 asection *link_sec = htab->stub_group[section_id].link_sec;
5278 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 5279 const insn_sequence *template_sequence;
48229727
JB		 5280 int template_size, size = 0;
5281
5282 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5283 TRUE, FALSE);
5284 if (stub_entry == NULL)
5285 {
5286 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5287 section->owner,
5288 stub_name);
5289 return FALSE;
5290 }
5291
5292 stub_entry->stub_sec = stub_sec;
5293 stub_entry->stub_offset = 0;
5294 stub_entry->id_sec = link_sec;
5295 stub_entry->stub_type = a8_fixes[i].stub_type;
5296 stub_entry->target_section = a8_fixes[i].section;
5297 stub_entry->target_value = a8_fixes[i].offset;
5298 stub_entry->target_addend = a8_fixes[i].addend;
5299 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5300 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5301
d3ce72d0
NC		 5302 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5303 &template_sequence,
48229727
JB		 5304 &template_size);
5305
5306 stub_entry->stub_size = size;
d3ce72d0 5307 stub_entry->stub_template = template_sequence;
48229727
JB		 5308 stub_entry->stub_template_size = template_size;
5309 }
5310
5311 /* Stash the Cortex-A8 erratum fix array for use later in
5312 elf32_arm_write_section(). */
5313 htab->a8_erratum_fixes = a8_fixes;
5314 htab->num_a8_erratum_fixes = num_a8_fixes;
5315 }
5316 else
5317 {
5318 htab->a8_erratum_fixes = NULL;
5319 htab->num_a8_erratum_fixes = 0;
5320 }
906e58ca
NC		 5321 return TRUE;
5322
5323 error_ret_free_local:
5324 return FALSE;
5e681ec4
PB		 5325}
5326
906e58ca
NC		 5327/* Build all the stubs associated with the current output file. The
5328 stubs are kept in a hash table attached to the main linker hash
5329 table. We also set up the .plt entries for statically linked PIC
5330 functions here. This function is called via arm_elf_finish in the
5331 linker. */
252b5132 5332
906e58ca
NC		 5333bfd_boolean
5334elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5335{
906e58ca
NC		 5336 asection *stub_sec;
5337 struct bfd_hash_table *table;
5338 struct elf32_arm_link_hash_table *htab;
252b5132 5339
906e58ca 5340 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5341 if (htab == NULL)
5342 return FALSE;
252b5132 5343
906e58ca
NC		 5344 for (stub_sec = htab->stub_bfd->sections;
5345 stub_sec != NULL;
5346 stub_sec = stub_sec->next)
252b5132 5347 {
906e58ca
NC		 5348 bfd_size_type size;
5349
8029a119 5350 /* Ignore non-stub sections. */
906e58ca
NC		 5351 if (!strstr (stub_sec->name, STUB_SUFFIX))
5352 continue;
5353
5354 /* Allocate memory to hold the linker stubs. */
5355 size = stub_sec->size;
21d799b5 5356 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5357 if (stub_sec->contents == NULL && size != 0)
5358 return FALSE;
5359 stub_sec->size = 0;
252b5132
RH		 5360 }
5361
906e58ca
NC		 5362 /* Build the stubs as directed by the stub hash table. */
5363 table = &htab->stub_hash_table;
5364 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5365 if (htab->fix_cortex_a8)
5366 {
5367 /* Place the cortex a8 stubs last. */
5368 htab->fix_cortex_a8 = -1;
5369 bfd_hash_traverse (table, arm_build_one_stub, info);
5370 }
252b5132 5371
906e58ca 5372 return TRUE;
252b5132
RH		 5373}
5374
9b485d32
NC		 5375/* Locate the Thumb encoded calling stub for NAME. */
5376
252b5132 5377static struct elf_link_hash_entry *
57e8b36a
NC		 5378find_thumb_glue (struct bfd_link_info *link_info,
5379 const char *name,
f2a9dd69 5380 char **error_message)
252b5132
RH		 5381{
5382 char *tmp_name;
5383 struct elf_link_hash_entry *hash;
5384 struct elf32_arm_link_hash_table *hash_table;
5385
5386 /* We need a pointer to the armelf specific hash table. */
5387 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5388 if (hash_table == NULL)
5389 return NULL;
252b5132 5390
21d799b5
NC		 5391 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5392 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5393
5394 BFD_ASSERT (tmp_name);
5395
5396 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5397
5398 hash = elf_link_hash_lookup
b34976b6 5399 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5400
b1657152
AM		 5401 if (hash == NULL
5402 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5403 tmp_name, name) == -1)
5404 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5405
5406 free (tmp_name);
5407
5408 return hash;
5409}
5410
9b485d32
NC		 5411/* Locate the ARM encoded calling stub for NAME. */
5412
252b5132 5413static struct elf_link_hash_entry *
57e8b36a
NC		 5414find_arm_glue (struct bfd_link_info *link_info,
5415 const char *name,
f2a9dd69 5416 char **error_message)
252b5132
RH		 5417{
5418 char *tmp_name;
5419 struct elf_link_hash_entry *myh;
5420 struct elf32_arm_link_hash_table *hash_table;
5421
5422 /* We need a pointer to the elfarm specific hash table. */
5423 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5424 if (hash_table == NULL)
5425 return NULL;
252b5132 5426
21d799b5
NC		 5427 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5428 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5429
5430 BFD_ASSERT (tmp_name);
5431
5432 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5433
5434 myh = elf_link_hash_lookup
b34976b6 5435 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5436
b1657152
AM		 5437 if (myh == NULL
5438 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5439 tmp_name, name) == -1)
5440 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5441
5442 free (tmp_name);
5443
5444 return myh;
5445}
5446
8f6277f5 5447/* ARM->Thumb glue (static images):
252b5132
RH		 5448
5449 .arm
5450 __func_from_arm:
5451 ldr r12, __func_addr
5452 bx r12
5453 __func_addr:
906e58ca 5454 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5455
26079076
PB		 5456 (v5t static images)
5457 .arm
5458 __func_from_arm:
5459 ldr pc, __func_addr
5460 __func_addr:
906e58ca 5461 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5462
8f6277f5
PB		 5463 (relocatable images)
5464 .arm
5465 __func_from_arm:
5466 ldr r12, __func_offset
5467 add r12, r12, pc
5468 bx r12
5469 __func_offset:
8029a119 5470 .word func - . */
8f6277f5
PB		 5471
5472#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5473static const insn32 a2t1_ldr_insn = 0xe59fc000;
5474static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5475static const insn32 a2t3_func_addr_insn = 0x00000001;
5476
26079076
PB		 5477#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5478static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5479static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5480
8f6277f5
PB		 5481#define ARM2THUMB_PIC_GLUE_SIZE 16
5482static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5483static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5484static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5485
9b485d32 5486/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5487
8029a119
NC		 5488 .thumb .thumb
5489 .align 2 .align 2
5490 __func_from_thumb: __func_from_thumb:
5491 bx pc push {r6, lr}
5492 nop ldr r6, __func_addr
5493 .arm mov lr, pc
5494 b func bx r6
fcef9eb7
NC		 5495 .arm
5496 ;; back_to_thumb
5497 ldmia r13! {r6, lr}
5498 bx lr
8029a119
NC		 5499 __func_addr:
5500 .word func */
252b5132
RH		 5501
5502#define THUMB2ARM_GLUE_SIZE 8
5503static const insn16 t2a1_bx_pc_insn = 0x4778;
5504static const insn16 t2a2_noop_insn = 0x46c0;
5505static const insn32 t2a3_b_insn = 0xea000000;
5506
c7b8f16e
JB		 5507#define VFP11_ERRATUM_VENEER_SIZE 8
5508
845b51d6
PB		 5509#define ARM_BX_VENEER_SIZE 12
5510static const insn32 armbx1_tst_insn = 0xe3100001;
5511static const insn32 armbx2_moveq_insn = 0x01a0f000;
5512static const insn32 armbx3_bx_insn = 0xe12fff10;
5513
7e392df6 5514#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5515static void
5516arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5517{
5518 asection * s;
8029a119 5519 bfd_byte * contents;
252b5132 5520
8029a119 5521 if (size == 0)
3e6b1042
DJ		 5522 {
5523 /* Do not include empty glue sections in the output. */
5524 if (abfd != NULL)
5525 {
5526 s = bfd_get_section_by_name (abfd, name);
5527 if (s != NULL)
5528 s->flags |= SEC_EXCLUDE;
5529 }
5530 return;
5531 }
252b5132 5532
8029a119 5533 BFD_ASSERT (abfd != NULL);
252b5132 5534
8029a119
NC		 5535 s = bfd_get_section_by_name (abfd, name);
5536 BFD_ASSERT (s != NULL);
252b5132 5537
21d799b5 5538 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5539
8029a119
NC		 5540 BFD_ASSERT (s->size == size);
5541 s->contents = contents;
5542}
906e58ca 5543
8029a119
NC		 5544bfd_boolean
5545bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5546{
5547 struct elf32_arm_link_hash_table * globals;
906e58ca 5548
8029a119
NC		 5549 globals = elf32_arm_hash_table (info);
5550 BFD_ASSERT (globals != NULL);
906e58ca 5551
8029a119
NC		 5552 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5553 globals->arm_glue_size,
5554 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5555
8029a119
NC		 5556 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5557 globals->thumb_glue_size,
5558 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5559
8029a119
NC		 5560 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5561 globals->vfp11_erratum_glue_size,
5562 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5563
8029a119
NC		 5564 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5565 globals->bx_glue_size,
845b51d6
PB		 5566 ARM_BX_GLUE_SECTION_NAME);
5567
b34976b6 5568 return TRUE;
252b5132
RH		 5569}
5570
a4fd1a8e 5571/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5572 returns the symbol identifying the stub. */
5573
a4fd1a8e 5574static struct elf_link_hash_entry *
57e8b36a
NC		 5575record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5576 struct elf_link_hash_entry * h)
252b5132
RH		 5577{
5578 const char * name = h->root.root.string;
63b0f745 5579 asection * s;
252b5132
RH		 5580 char * tmp_name;
5581 struct elf_link_hash_entry * myh;
14a793b2 5582 struct bfd_link_hash_entry * bh;
252b5132 5583 struct elf32_arm_link_hash_table * globals;
dc810e39 5584 bfd_vma val;
2f475487 5585 bfd_size_type size;
252b5132
RH		 5586
5587 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5588 BFD_ASSERT (globals != NULL);
5589 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5590
5591 s = bfd_get_section_by_name
5592 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5593
252b5132
RH		 5594 BFD_ASSERT (s != NULL);
5595
21d799b5
NC		 5596 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5597 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5598
5599 BFD_ASSERT (tmp_name);
5600
5601 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5602
5603 myh = elf_link_hash_lookup
b34976b6 5604 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5605
5606 if (myh != NULL)
5607 {
9b485d32 5608 /* We've already seen this guy. */
252b5132 5609 free (tmp_name);
a4fd1a8e 5610 return myh;
252b5132
RH		 5611 }
5612
57e8b36a
NC		 5613 /* The only trick here is using hash_table->arm_glue_size as the value.
5614 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5615 putting it. The +1 on the value marks that the stub has not been
5616 output yet - not that it is a Thumb function. */
14a793b2 5617 bh = NULL;
dc810e39
AM		 5618 val = globals->arm_glue_size + 1;
5619 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5620 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5621 NULL, TRUE, FALSE, &bh);
252b5132 5622
b7693d02
DJ		 5623 myh = (struct elf_link_hash_entry *) bh;
5624 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5625 myh->forced_local = 1;
5626
252b5132
RH		 5627 free (tmp_name);
5628
27e55c4d
PB		 5629 if (link_info->shared || globals->root.is_relocatable_executable
5630 || globals->pic_veneer)
2f475487 5631 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5632 else if (globals->use_blx)
5633 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5634 else
2f475487
AM		 5635 size = ARM2THUMB_STATIC_GLUE_SIZE;
5636
5637 s->size += size;
5638 globals->arm_glue_size += size;
252b5132 5639
a4fd1a8e 5640 return myh;
252b5132
RH		 5641}
5642
845b51d6
PB		 5643/* Allocate space for ARMv4 BX veneers. */
5644
5645static void
5646record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5647{
5648 asection * s;
5649 struct elf32_arm_link_hash_table *globals;
5650 char *tmp_name;
5651 struct elf_link_hash_entry *myh;
5652 struct bfd_link_hash_entry *bh;
5653 bfd_vma val;
5654
5655 /* BX PC does not need a veneer. */
5656 if (reg == 15)
5657 return;
5658
5659 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5660 BFD_ASSERT (globals != NULL);
5661 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5662
5663 /* Check if this veneer has already been allocated. */
5664 if (globals->bx_glue_offset[reg])
5665 return;
5666
5667 s = bfd_get_section_by_name
5668 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5669
5670 BFD_ASSERT (s != NULL);
5671
5672 /* Add symbol for veneer. */
21d799b5
NC		 5673 tmp_name = (char *)
5674 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5675
845b51d6 5676 BFD_ASSERT (tmp_name);
906e58ca 5677
845b51d6 5678 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5679
845b51d6
PB		 5680 myh = elf_link_hash_lookup
5681 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5682
845b51d6 5683 BFD_ASSERT (myh == NULL);
906e58ca 5684
845b51d6
PB		 5685 bh = NULL;
5686 val = globals->bx_glue_size;
5687 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5688 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5689 NULL, TRUE, FALSE, &bh);
5690
5691 myh = (struct elf_link_hash_entry *) bh;
5692 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5693 myh->forced_local = 1;
5694
5695 s->size += ARM_BX_VENEER_SIZE;
5696 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5697 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5698}
5699
5700
c7b8f16e
JB		 5701/* Add an entry to the code/data map for section SEC. */
5702
5703static void
5704elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5705{
5706 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5707 unsigned int newidx;
906e58ca 5708
c7b8f16e
JB		 5709 if (sec_data->map == NULL)
5710 {
21d799b5
NC		 5711 sec_data->map = (elf32_arm_section_map *)
5712 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5713 sec_data->mapcount = 0;
5714 sec_data->mapsize = 1;
5715 }
906e58ca 5716
c7b8f16e 5717 newidx = sec_data->mapcount++;
906e58ca 5718
c7b8f16e
JB		 5719 if (sec_data->mapcount > sec_data->mapsize)
5720 {
5721 sec_data->mapsize *= 2;
21d799b5
NC		 5722 sec_data->map = (elf32_arm_section_map *)
5723 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5724 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5725 }
5726
5727 if (sec_data->map)
5728 {
5729 sec_data->map[newidx].vma = vma;
5730 sec_data->map[newidx].type = type;
c7b8f16e 5731 }
c7b8f16e
JB		 5732}
5733
5734
5735/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5736 veneers are handled for now. */
5737
5738static bfd_vma
5739record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5740 elf32_vfp11_erratum_list *branch,
5741 bfd *branch_bfd,
5742 asection *branch_sec,
5743 unsigned int offset)
5744{
5745 asection *s;
5746 struct elf32_arm_link_hash_table *hash_table;
5747 char *tmp_name;
5748 struct elf_link_hash_entry *myh;
5749 struct bfd_link_hash_entry *bh;
5750 bfd_vma val;
5751 struct _arm_elf_section_data *sec_data;
c7b8f16e 5752 elf32_vfp11_erratum_list *newerr;
906e58ca 5753
c7b8f16e 5754 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5755 BFD_ASSERT (hash_table != NULL);
5756 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5757
c7b8f16e
JB		 5758 s = bfd_get_section_by_name
5759 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5760
c7b8f16e 5761 sec_data = elf32_arm_section_data (s);
906e58ca 5762
c7b8f16e 5763 BFD_ASSERT (s != NULL);
906e58ca 5764
21d799b5
NC		 5765 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5766 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5767
c7b8f16e 5768 BFD_ASSERT (tmp_name);
906e58ca 5769
c7b8f16e
JB		 5770 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5771 hash_table->num_vfp11_fixes);
906e58ca 5772
c7b8f16e
JB		 5773 myh = elf_link_hash_lookup
5774 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5775
c7b8f16e 5776 BFD_ASSERT (myh == NULL);
906e58ca 5777
c7b8f16e
JB		 5778 bh = NULL;
5779 val = hash_table->vfp11_erratum_glue_size;
5780 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5781 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5782 NULL, TRUE, FALSE, &bh);
5783
5784 myh = (struct elf_link_hash_entry *) bh;
5785 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5786 myh->forced_local = 1;
5787
5788 /* Link veneer back to calling location. */
c7e2358a 5789 sec_data->erratumcount += 1;
21d799b5
NC		 5790 newerr = (elf32_vfp11_erratum_list *)
5791 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5792
c7b8f16e
JB		 5793 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5794 newerr->vma = -1;
5795 newerr->u.v.branch = branch;
5796 newerr->u.v.id = hash_table->num_vfp11_fixes;
5797 branch->u.b.veneer = newerr;
5798
5799 newerr->next = sec_data->erratumlist;
5800 sec_data->erratumlist = newerr;
5801
5802 /* A symbol for the return from the veneer. */
5803 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5804 hash_table->num_vfp11_fixes);
5805
5806 myh = elf_link_hash_lookup
5807 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5808
c7b8f16e
JB		 5809 if (myh != NULL)
5810 abort ();
5811
5812 bh = NULL;
5813 val = offset + 4;
5814 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5815 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5816
c7b8f16e
JB		 5817 myh = (struct elf_link_hash_entry *) bh;
5818 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5819 myh->forced_local = 1;
5820
5821 free (tmp_name);
906e58ca 5822
c7b8f16e
JB		 5823 /* Generate a mapping symbol for the veneer section, and explicitly add an
5824 entry for that symbol to the code/data map for the section. */
5825 if (hash_table->vfp11_erratum_glue_size == 0)
5826 {
5827 bh = NULL;
5828 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5829 ever requires this erratum fix. */
5830 _bfd_generic_link_add_one_symbol (link_info,
5831 hash_table->bfd_of_glue_owner, "$a",
5832 BSF_LOCAL, s, 0, NULL,
5833 TRUE, FALSE, &bh);
5834
5835 myh = (struct elf_link_hash_entry *) bh;
5836 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5837 myh->forced_local = 1;
906e58ca 5838
c7b8f16e
JB		 5839 /* The elf32_arm_init_maps function only cares about symbols from input
5840 BFDs. We must make a note of this generated mapping symbol
5841 ourselves so that code byteswapping works properly in
5842 elf32_arm_write_section. */
5843 elf32_arm_section_map_add (s, 'a', 0);
5844 }
906e58ca 5845
c7b8f16e
JB		 5846 s->size += VFP11_ERRATUM_VENEER_SIZE;
5847 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5848 hash_table->num_vfp11_fixes++;
906e58ca 5849
c7b8f16e
JB		 5850 /* The offset of the veneer. */
5851 return val;
5852}
5853
8029a119 5854#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5855 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5856 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5857
5858/* Create a fake section for use by the ARM backend of the linker. */
5859
5860static bfd_boolean
5861arm_make_glue_section (bfd * abfd, const char * name)
5862{
5863 asection * sec;
5864
5865 sec = bfd_get_section_by_name (abfd, name);
5866 if (sec != NULL)
5867 /* Already made. */
5868 return TRUE;
5869
5870 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5871
5872 if (sec == NULL
5873 || !bfd_set_section_alignment (abfd, sec, 2))
5874 return FALSE;
5875
5876 /* Set the gc mark to prevent the section from being removed by garbage
5877 collection, despite the fact that no relocs refer to this section. */
5878 sec->gc_mark = 1;
5879
5880 return TRUE;
5881}
5882
8afb0e02
NC		 5883/* Add the glue sections to ABFD. This function is called from the
5884 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5885
b34976b6 5886bfd_boolean
57e8b36a
NC		 5887bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5888 struct bfd_link_info *info)
252b5132 5889{
8afb0e02
NC		 5890 /* If we are only performing a partial
5891 link do not bother adding the glue. */
1049f94e 5892 if (info->relocatable)
b34976b6 5893 return TRUE;
252b5132 5894
8029a119
NC		 5895 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5896 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5897 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5898 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5899}
5900
5901/* Select a BFD to be used to hold the sections used by the glue code.
5902 This function is called from the linker scripts in ld/emultempl/
8029a119 5903 {armelf/pe}.em. */
8afb0e02 5904
b34976b6 5905bfd_boolean
57e8b36a 5906bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5907{
5908 struct elf32_arm_link_hash_table *globals;
5909
5910 /* If we are only performing a partial link
5911 do not bother getting a bfd to hold the glue. */
1049f94e 5912 if (info->relocatable)
b34976b6 5913 return TRUE;
8afb0e02 5914
b7693d02
DJ		 5915 /* Make sure we don't attach the glue sections to a dynamic object. */
5916 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5917
8afb0e02 5918 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5919 BFD_ASSERT (globals != NULL);
5920
5921 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5922 return TRUE;
8afb0e02 5923
252b5132
RH		 5924 /* Save the bfd for later use. */
5925 globals->bfd_of_glue_owner = abfd;
cedb70c5 5926
b34976b6 5927 return TRUE;
252b5132
RH		 5928}
5929
906e58ca
NC		 5930static void
5931check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5932{
104d59d1
JM		 5933 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5934 Tag_CPU_arch) > 2)
39b41c9c
PB		 5935 globals->use_blx = 1;
5936}
5937
b34976b6 5938bfd_boolean
57e8b36a 5939bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5940 struct bfd_link_info *link_info)
252b5132
RH		 5941{
5942 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5943 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5944 Elf_Internal_Rela *irel, *irelend;
5945 bfd_byte *contents = NULL;
252b5132
RH		 5946
5947 asection *sec;
5948 struct elf32_arm_link_hash_table *globals;
5949
5950 /* If we are only performing a partial link do not bother
5951 to construct any glue. */
1049f94e 5952 if (link_info->relocatable)
b34976b6 5953 return TRUE;
252b5132 5954
39ce1a6a
NC		 5955 /* Here we have a bfd that is to be included on the link. We have a
5956 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5957 globals = elf32_arm_hash_table (link_info);
252b5132 5958 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5959
5960 check_use_blx (globals);
252b5132 5961
d504ffc8 5962 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5963 {
d003868e
AM		 5964 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5965 abfd);
e489d0ae
PB		 5966 return FALSE;
5967 }
f21f3fe0 5968
39ce1a6a
NC		 5969 /* PR 5398: If we have not decided to include any loadable sections in
5970 the output then we will not have a glue owner bfd. This is OK, it
5971 just means that there is nothing else for us to do here. */
5972 if (globals->bfd_of_glue_owner == NULL)
5973 return TRUE;
5974
252b5132
RH		 5975 /* Rummage around all the relocs and map the glue vectors. */
5976 sec = abfd->sections;
5977
5978 if (sec == NULL)
b34976b6 5979 return TRUE;
252b5132
RH		 5980
5981 for (; sec != NULL; sec = sec->next)
5982 {
5983 if (sec->reloc_count == 0)
5984 continue;
5985
2f475487
AM		 5986 if ((sec->flags & SEC_EXCLUDE) != 0)
5987 continue;
5988
0ffa91dd 5989 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5990
9b485d32 5991 /* Load the relocs. */
6cdc0ccc 5992 internal_relocs
906e58ca 5993 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5994
6cdc0ccc
AM		 5995 if (internal_relocs == NULL)
5996 goto error_return;
252b5132 5997
6cdc0ccc
AM		 5998 irelend = internal_relocs + sec->reloc_count;
5999 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6000 {
6001 long r_type;
6002 unsigned long r_index;
252b5132
RH		 6003
6004 struct elf_link_hash_entry *h;
6005
6006 r_type = ELF32_R_TYPE (irel->r_info);
6007 r_index = ELF32_R_SYM (irel->r_info);
6008
9b485d32 6009 /* These are the only relocation types we care about. */
ba96a88f 6010 if ( r_type != R_ARM_PC24
845b51d6 6011 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6012 continue;
6013
6014 /* Get the section contents if we haven't done so already. */
6015 if (contents == NULL)
6016 {
6017 /* Get cached copy if it exists. */
6018 if (elf_section_data (sec)->this_hdr.contents != NULL)
6019 contents = elf_section_data (sec)->this_hdr.contents;
6020 else
6021 {
6022 /* Go get them off disk. */
57e8b36a 6023 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6024 goto error_return;
6025 }
6026 }
6027
845b51d6
PB		 6028 if (r_type == R_ARM_V4BX)
6029 {
6030 int reg;
6031
6032 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6033 record_arm_bx_glue (link_info, reg);
6034 continue;
6035 }
6036
a7c10850 6037 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6038 h = NULL;
6039
9b485d32 6040 /* We don't care about local symbols. */
252b5132
RH		 6041 if (r_index < symtab_hdr->sh_info)
6042 continue;
6043
9b485d32 6044 /* This is an external symbol. */
252b5132
RH		 6045 r_index -= symtab_hdr->sh_info;
6046 h = (struct elf_link_hash_entry *)
6047 elf_sym_hashes (abfd)[r_index];
6048
6049 /* If the relocation is against a static symbol it must be within
6050 the current section and so cannot be a cross ARM/Thumb relocation. */
6051 if (h == NULL)
6052 continue;
6053
d504ffc8
DJ		 6054 /* If the call will go through a PLT entry then we do not need
6055 glue. */
362d30a1 6056 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6057 continue;
6058
252b5132
RH		 6059 switch (r_type)
6060 {
6061 case R_ARM_PC24:
6062 /* This one is a call from arm code. We need to look up
2f0ca46a 6063 the target of the call. If it is a thumb target, we
252b5132 6064 insert glue. */
35fc36a8 6065 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6066 record_arm_to_thumb_glue (link_info, h);
6067 break;
6068
252b5132 6069 default:
c6596c5e 6070 abort ();
252b5132
RH		 6071 }
6072 }
6cdc0ccc
AM		 6073
6074 if (contents != NULL
6075 && elf_section_data (sec)->this_hdr.contents != contents)
6076 free (contents);
6077 contents = NULL;
6078
6079 if (internal_relocs != NULL
6080 && elf_section_data (sec)->relocs != internal_relocs)
6081 free (internal_relocs);
6082 internal_relocs = NULL;
252b5132
RH		 6083 }
6084
b34976b6 6085 return TRUE;
9a5aca8c 6086
252b5132 6087error_return:
6cdc0ccc
AM		 6088 if (contents != NULL
6089 && elf_section_data (sec)->this_hdr.contents != contents)
6090 free (contents);
6091 if (internal_relocs != NULL
6092 && elf_section_data (sec)->relocs != internal_relocs)
6093 free (internal_relocs);
9a5aca8c 6094
b34976b6 6095 return FALSE;
252b5132 6096}
7e392df6 6097#endif
252b5132 6098
eb043451 6099
c7b8f16e
JB		 6100/* Initialise maps of ARM/Thumb/data for input BFDs. */
6101
6102void
6103bfd_elf32_arm_init_maps (bfd *abfd)
6104{
6105 Elf_Internal_Sym *isymbuf;
6106 Elf_Internal_Shdr *hdr;
6107 unsigned int i, localsyms;
6108
af1f4419
NC		 6109 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6110 if (! is_arm_elf (abfd))
6111 return;
6112
c7b8f16e
JB		 6113 if ((abfd->flags & DYNAMIC) != 0)
6114 return;
6115
0ffa91dd 6116 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6117 localsyms = hdr->sh_info;
6118
6119 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6120 should contain the number of local symbols, which should come before any
6121 global symbols. Mapping symbols are always local. */
6122 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6123 NULL);
6124
6125 /* No internal symbols read? Skip this BFD. */
6126 if (isymbuf == NULL)
6127 return;
6128
6129 for (i = 0; i < localsyms; i++)
6130 {
6131 Elf_Internal_Sym *isym = &isymbuf[i];
6132 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6133 const char *name;
906e58ca 6134
c7b8f16e
JB		 6135 if (sec != NULL
6136 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6137 {
6138 name = bfd_elf_string_from_elf_section (abfd,
6139 hdr->sh_link, isym->st_name);
906e58ca 6140
c7b8f16e
JB		 6141 if (bfd_is_arm_special_symbol_name (name,
6142 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6143 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6144 }
6145 }
6146}
6147
6148
48229727
JB		 6149/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6150 say what they wanted. */
6151
6152void
6153bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6154{
6155 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6156 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6157
4dfe6ac6
NC		 6158 if (globals == NULL)
6159 return;
6160
48229727
JB		 6161 if (globals->fix_cortex_a8 == -1)
6162 {
6163 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6164 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6165 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6166 || out_attr[Tag_CPU_arch_profile].i == 0))
6167 globals->fix_cortex_a8 = 1;
6168 else
6169 globals->fix_cortex_a8 = 0;
6170 }
6171}
6172
6173
c7b8f16e
JB		 6174void
6175bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6176{
6177 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6178 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6179
4dfe6ac6
NC		 6180 if (globals == NULL)
6181 return;
c7b8f16e
JB		 6182 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6183 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6184 {
6185 switch (globals->vfp11_fix)
6186 {
6187 case BFD_ARM_VFP11_FIX_DEFAULT:
6188 case BFD_ARM_VFP11_FIX_NONE:
6189 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6190 break;
906e58ca 6191
c7b8f16e
JB		 6192 default:
6193 /* Give a warning, but do as the user requests anyway. */
6194 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6195 "workaround is not necessary for target architecture"), obfd);
6196 }
6197 }
6198 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6199 /* For earlier architectures, we might need the workaround, but do not
6200 enable it by default. If users is running with broken hardware, they
6201 must enable the erratum fix explicitly. */
6202 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6203}
6204
6205
906e58ca
NC		 6206enum bfd_arm_vfp11_pipe
6207{
c7b8f16e
JB		 6208 VFP11_FMAC,
6209 VFP11_LS,
6210 VFP11_DS,
6211 VFP11_BAD
6212};
6213
6214/* Return a VFP register number. This is encoded as RX:X for single-precision
6215 registers, or X:RX for double-precision registers, where RX is the group of
6216 four bits in the instruction encoding and X is the single extension bit.
6217 RX and X fields are specified using their lowest (starting) bit. The return
6218 value is:
6219
6220 0...31: single-precision registers s0...s31
6221 32...63: double-precision registers d0...d31.
906e58ca 6222
c7b8f16e
JB		 6223 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6224 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6225
c7b8f16e
JB		 6226static unsigned int
6227bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6228 unsigned int x)
6229{
6230 if (is_double)
6231 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6232 else
6233 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6234}
6235
6236/* Set bits in *WMASK according to a register number REG as encoded by
6237 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6238
6239static void
6240bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6241{
6242 if (reg < 32)
6243 *wmask |= 1 << reg;
6244 else if (reg < 48)
6245 *wmask |= 3 << ((reg - 32) * 2);
6246}
6247
6248/* Return TRUE if WMASK overwrites anything in REGS. */
6249
6250static bfd_boolean
6251bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6252{
6253 int i;
906e58ca 6254
c7b8f16e
JB		 6255 for (i = 0; i < numregs; i++)
6256 {
6257 unsigned int reg = regs[i];
6258
6259 if (reg < 32 && (wmask & (1 << reg)) != 0)
6260 return TRUE;
906e58ca 6261
c7b8f16e
JB		 6262 reg -= 32;
6263
6264 if (reg >= 16)
6265 continue;
906e58ca 6266
c7b8f16e
JB		 6267 if ((wmask & (3 << (reg * 2))) != 0)
6268 return TRUE;
6269 }
906e58ca 6270
c7b8f16e
JB		 6271 return FALSE;
6272}
6273
6274/* In this function, we're interested in two things: finding input registers
6275 for VFP data-processing instructions, and finding the set of registers which
6276 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6277 hold the written set, so FLDM etc. are easy to deal with (we're only
6278 interested in 32 SP registers or 16 dp registers, due to the VFP version
6279 implemented by the chip in question). DP registers are marked by setting
6280 both SP registers in the write mask). */
6281
6282static enum bfd_arm_vfp11_pipe
6283bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6284 int *numregs)
6285{
91d6fa6a 6286 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6287 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6288
6289 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6290 {
6291 unsigned int pqrs;
6292 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6293 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6294
6295 pqrs = ((insn & 0x00800000) >> 20)
6296 | ((insn & 0x00300000) >> 19)
6297 | ((insn & 0x00000040) >> 6);
6298
6299 switch (pqrs)
6300 {
6301 case 0: /* fmac[sd]. */
6302 case 1: /* fnmac[sd]. */
6303 case 2: /* fmsc[sd]. */
6304 case 3: /* fnmsc[sd]. */
91d6fa6a 6305 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6306 bfd_arm_vfp11_write_mask (destmask, fd);
6307 regs[0] = fd;
6308 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6309 regs[2] = fm;
6310 *numregs = 3;
6311 break;
6312
6313 case 4: /* fmul[sd]. */
6314 case 5: /* fnmul[sd]. */
6315 case 6: /* fadd[sd]. */
6316 case 7: /* fsub[sd]. */
91d6fa6a 6317 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6318 goto vfp_binop;
6319
6320 case 8: /* fdiv[sd]. */
91d6fa6a 6321 vpipe = VFP11_DS;
c7b8f16e
JB		 6322 vfp_binop:
6323 bfd_arm_vfp11_write_mask (destmask, fd);
6324 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6325 regs[1] = fm;
6326 *numregs = 2;
6327 break;
6328
6329 case 15: /* extended opcode. */
6330 {
6331 unsigned int extn = ((insn >> 15) & 0x1e)
6332 | ((insn >> 7) & 1);
6333
6334 switch (extn)
6335 {
6336 case 0: /* fcpy[sd]. */
6337 case 1: /* fabs[sd]. */
6338 case 2: /* fneg[sd]. */
6339 case 8: /* fcmp[sd]. */
6340 case 9: /* fcmpe[sd]. */
6341 case 10: /* fcmpz[sd]. */
6342 case 11: /* fcmpez[sd]. */
6343 case 16: /* fuito[sd]. */
6344 case 17: /* fsito[sd]. */
6345 case 24: /* ftoui[sd]. */
6346 case 25: /* ftouiz[sd]. */
6347 case 26: /* ftosi[sd]. */
6348 case 27: /* ftosiz[sd]. */
6349 /* These instructions will not bounce due to underflow. */
6350 *numregs = 0;
91d6fa6a 6351 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6352 break;
6353
6354 case 3: /* fsqrt[sd]. */
6355 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6356 registers to cause the erratum in previous instructions. */
6357 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 6358 vpipe = VFP11_DS;
c7b8f16e
JB		 6359 break;
6360
6361 case 15: /* fcvt{ds,sd}. */
6362 {
6363 int rnum = 0;
6364
6365 bfd_arm_vfp11_write_mask (destmask, fd);
6366
6367 /* Only FCVTSD can underflow. */
6368 if ((insn & 0x100) != 0)
6369 regs[rnum++] = fm;
6370
6371 *numregs = rnum;
6372
91d6fa6a 6373 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6374 }
6375 break;
6376
6377 default:
6378 return VFP11_BAD;
6379 }
6380 }
6381 break;
6382
6383 default:
6384 return VFP11_BAD;
6385 }
6386 }
6387 /* Two-register transfer. */
6388 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6389 {
6390 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6391
c7b8f16e
JB		 6392 if ((insn & 0x100000) == 0)
6393 {
6394 if (is_double)
6395 bfd_arm_vfp11_write_mask (destmask, fm);
6396 else
6397 {
6398 bfd_arm_vfp11_write_mask (destmask, fm);
6399 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6400 }
6401 }
6402
91d6fa6a 6403 vpipe = VFP11_LS;
c7b8f16e
JB		 6404 }
6405 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6406 {
6407 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6408 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6409
c7b8f16e
JB		 6410 switch (puw)
6411 {
6412 case 0: /* Two-reg transfer. We should catch these above. */
6413 abort ();
906e58ca 6414
c7b8f16e
JB		 6415 case 2: /* fldm[sdx]. */
6416 case 3:
6417 case 5:
6418 {
6419 unsigned int i, offset = insn & 0xff;
6420
6421 if (is_double)
6422 offset >>= 1;
6423
6424 for (i = fd; i < fd + offset; i++)
6425 bfd_arm_vfp11_write_mask (destmask, i);
6426 }
6427 break;
906e58ca 6428
c7b8f16e
JB		 6429 case 4: /* fld[sd]. */
6430 case 6:
6431 bfd_arm_vfp11_write_mask (destmask, fd);
6432 break;
906e58ca 6433
c7b8f16e
JB		 6434 default:
6435 return VFP11_BAD;
6436 }
6437
91d6fa6a 6438 vpipe = VFP11_LS;
c7b8f16e
JB		 6439 }
6440 /* Single-register transfer. Note L==0. */
6441 else if ((insn & 0x0f100e10) == 0x0e000a10)
6442 {
6443 unsigned int opcode = (insn >> 21) & 7;
6444 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6445
6446 switch (opcode)
6447 {
6448 case 0: /* fmsr/fmdlr. */
6449 case 1: /* fmdhr. */
6450 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6451 destination register. I don't know if this is exactly right,
6452 but it is the conservative choice. */
6453 bfd_arm_vfp11_write_mask (destmask, fn);
6454 break;
6455
6456 case 7: /* fmxr. */
6457 break;
6458 }
6459
91d6fa6a 6460 vpipe = VFP11_LS;
c7b8f16e
JB		 6461 }
6462
91d6fa6a 6463 return vpipe;
c7b8f16e
JB		 6464}
6465
6466
6467static int elf32_arm_compare_mapping (const void * a, const void * b);
6468
6469
6470/* Look for potentially-troublesome code sequences which might trigger the
6471 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6472 (available from ARM) for details of the erratum. A short version is
6473 described in ld.texinfo. */
6474
6475bfd_boolean
6476bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6477{
6478 asection *sec;
6479 bfd_byte *contents = NULL;
6480 int state = 0;
6481 int regs[3], numregs = 0;
6482 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6483 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6484
4dfe6ac6
NC		 6485 if (globals == NULL)
6486 return FALSE;
6487
c7b8f16e
JB		 6488 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6489 The states transition as follows:
906e58ca 6490
c7b8f16e
JB		 6491 0 -> 1 (vector) or 0 -> 2 (scalar)
6492 A VFP FMAC-pipeline instruction has been seen. Fill
6493 regs[0]..regs[numregs-1] with its input operands. Remember this
6494 instruction in 'first_fmac'.
6495
6496 1 -> 2
6497 Any instruction, except for a VFP instruction which overwrites
6498 regs[*].
906e58ca 6499
c7b8f16e
JB		 6500 1 -> 3 [ -> 0 ] or
6501 2 -> 3 [ -> 0 ]
6502 A VFP instruction has been seen which overwrites any of regs[*].
6503 We must make a veneer! Reset state to 0 before examining next
6504 instruction.
906e58ca 6505
c7b8f16e
JB		 6506 2 -> 0
6507 If we fail to match anything in state 2, reset to state 0 and reset
6508 the instruction pointer to the instruction after 'first_fmac'.
6509
6510 If the VFP11 vector mode is in use, there must be at least two unrelated
6511 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6512 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6513
6514 /* If we are only performing a partial link do not bother
6515 to construct any glue. */
6516 if (link_info->relocatable)
6517 return TRUE;
6518
0ffa91dd
NC		 6519 /* Skip if this bfd does not correspond to an ELF image. */
6520 if (! is_arm_elf (abfd))
6521 return TRUE;
906e58ca 6522
c7b8f16e
JB		 6523 /* We should have chosen a fix type by the time we get here. */
6524 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6525
6526 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6527 return TRUE;
2e6030b9 6528
33a7ffc2
JM		 6529 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6530 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6531 return TRUE;
6532
c7b8f16e
JB		 6533 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6534 {
6535 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6536 struct _arm_elf_section_data *sec_data;
6537
6538 /* If we don't have executable progbits, we're not interested in this
6539 section. Also skip if section is to be excluded. */
6540 if (elf_section_type (sec) != SHT_PROGBITS
6541 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6542 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6543 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6544 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6545 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6546 continue;
6547
6548 sec_data = elf32_arm_section_data (sec);
906e58ca 6549
c7b8f16e
JB		 6550 if (sec_data->mapcount == 0)
6551 continue;
906e58ca 6552
c7b8f16e
JB		 6553 if (elf_section_data (sec)->this_hdr.contents != NULL)
6554 contents = elf_section_data (sec)->this_hdr.contents;
6555 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6556 goto error_return;
6557
6558 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6559 elf32_arm_compare_mapping);
6560
6561 for (span = 0; span < sec_data->mapcount; span++)
6562 {
6563 unsigned int span_start = sec_data->map[span].vma;
6564 unsigned int span_end = (span == sec_data->mapcount - 1)
6565 ? sec->size : sec_data->map[span + 1].vma;
6566 char span_type = sec_data->map[span].type;
906e58ca 6567
c7b8f16e
JB		 6568 /* FIXME: Only ARM mode is supported at present. We may need to
6569 support Thumb-2 mode also at some point. */
6570 if (span_type != 'a')
6571 continue;
6572
6573 for (i = span_start; i < span_end;)
6574 {
6575 unsigned int next_i = i + 4;
6576 unsigned int insn = bfd_big_endian (abfd)
6577 ? (contents[i] << 24)
6578 | (contents[i + 1] << 16)
6579 | (contents[i + 2] << 8)
6580 | contents[i + 3]
6581 : (contents[i + 3] << 24)
6582 | (contents[i + 2] << 16)
6583 | (contents[i + 1] << 8)
6584 | contents[i];
6585 unsigned int writemask = 0;
91d6fa6a 6586 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6587
6588 switch (state)
6589 {
6590 case 0:
91d6fa6a 6591 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6592 &numregs);
6593 /* I'm assuming the VFP11 erratum can trigger with denorm
6594 operands on either the FMAC or the DS pipeline. This might
6595 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6596 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6597 {
6598 state = use_vector ? 1 : 2;
6599 first_fmac = i;
6600 veneer_of_insn = insn;
6601 }
6602 break;
6603
6604 case 1:
6605 {
6606 int other_regs[3], other_numregs;
91d6fa6a 6607 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6608 other_regs,
6609 &other_numregs);
91d6fa6a 6610 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6611 && bfd_arm_vfp11_antidependency (writemask, regs,
6612 numregs))
6613 state = 3;
6614 else
6615 state = 2;
6616 }
6617 break;
6618
6619 case 2:
6620 {
6621 int other_regs[3], other_numregs;
91d6fa6a 6622 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6623 other_regs,
6624 &other_numregs);
91d6fa6a 6625 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6626 && bfd_arm_vfp11_antidependency (writemask, regs,
6627 numregs))
6628 state = 3;
6629 else
6630 {
6631 state = 0;
6632 next_i = first_fmac + 4;
6633 }
6634 }
6635 break;
6636
6637 case 3:
6638 abort (); /* Should be unreachable. */
6639 }
6640
6641 if (state == 3)
6642 {
21d799b5
NC		 6643 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6644 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6645
c7e2358a 6646 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6647
6648 newerr->u.b.vfp_insn = veneer_of_insn;
6649
6650 switch (span_type)
6651 {
6652 case 'a':
6653 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6654 break;
906e58ca 6655
c7b8f16e
JB		 6656 default:
6657 abort ();
6658 }
6659
6660 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6661 first_fmac);
6662
6663 newerr->vma = -1;
6664
6665 newerr->next = sec_data->erratumlist;
6666 sec_data->erratumlist = newerr;
6667
6668 state = 0;
6669 }
6670
6671 i = next_i;
6672 }
6673 }
906e58ca 6674
c7b8f16e
JB		 6675 if (contents != NULL
6676 && elf_section_data (sec)->this_hdr.contents != contents)
6677 free (contents);
6678 contents = NULL;
6679 }
6680
6681 return TRUE;
6682
6683error_return:
6684 if (contents != NULL
6685 && elf_section_data (sec)->this_hdr.contents != contents)
6686 free (contents);
906e58ca 6687
c7b8f16e
JB		 6688 return FALSE;
6689}
6690
6691/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6692 after sections have been laid out, using specially-named symbols. */
6693
6694void
6695bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6696 struct bfd_link_info *link_info)
6697{
6698 asection *sec;
6699 struct elf32_arm_link_hash_table *globals;
6700 char *tmp_name;
906e58ca 6701
c7b8f16e
JB		 6702 if (link_info->relocatable)
6703 return;
2e6030b9
MS		 6704
6705 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6706 if (! is_arm_elf (abfd))
2e6030b9
MS		 6707 return;
6708
c7b8f16e 6709 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6710 if (globals == NULL)
6711 return;
906e58ca 6712
21d799b5
NC		 6713 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6714 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6715
6716 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6717 {
6718 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6719 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6720
c7b8f16e
JB		 6721 for (; errnode != NULL; errnode = errnode->next)
6722 {
6723 struct elf_link_hash_entry *myh;
6724 bfd_vma vma;
6725
6726 switch (errnode->type)
6727 {
6728 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6729 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6730 /* Find veneer symbol. */
6731 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6732 errnode->u.b.veneer->u.v.id);
6733
6734 myh = elf_link_hash_lookup
6735 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6736
6737 if (myh == NULL)
6738 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6739 "`%s'"), abfd, tmp_name);
6740
6741 vma = myh->root.u.def.section->output_section->vma
6742 + myh->root.u.def.section->output_offset
6743 + myh->root.u.def.value;
6744
6745 errnode->u.b.veneer->vma = vma;
6746 break;
6747
6748 case VFP11_ERRATUM_ARM_VENEER:
6749 case VFP11_ERRATUM_THUMB_VENEER:
6750 /* Find return location. */
6751 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6752 errnode->u.v.id);
6753
6754 myh = elf_link_hash_lookup
6755 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6756
6757 if (myh == NULL)
6758 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6759 "`%s'"), abfd, tmp_name);
6760
6761 vma = myh->root.u.def.section->output_section->vma
6762 + myh->root.u.def.section->output_offset
6763 + myh->root.u.def.value;
6764
6765 errnode->u.v.branch->vma = vma;
6766 break;
906e58ca 6767
c7b8f16e
JB		 6768 default:
6769 abort ();
6770 }
6771 }
6772 }
906e58ca 6773
c7b8f16e
JB		 6774 free (tmp_name);
6775}
6776
6777
eb043451
PB		 6778/* Set target relocation values needed during linking. */
6779
6780void
bf21ed78
MS		 6781bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6782 struct bfd_link_info *link_info,
eb043451 6783 int target1_is_rel,
319850b4 6784 char * target2_type,
33bfe774 6785 int fix_v4bx,
c7b8f16e 6786 int use_blx,
bf21ed78 6787 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6788 int no_enum_warn, int no_wchar_warn,
48229727 6789 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6790{
6791 struct elf32_arm_link_hash_table *globals;
6792
6793 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6794 if (globals == NULL)
6795 return;
eb043451
PB		 6796
6797 globals->target1_is_rel = target1_is_rel;
6798 if (strcmp (target2_type, "rel") == 0)
6799 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6800 else if (strcmp (target2_type, "abs") == 0)
6801 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6802 else if (strcmp (target2_type, "got-rel") == 0)
6803 globals->target2_reloc = R_ARM_GOT_PREL;
6804 else
6805 {
6806 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6807 target2_type);
6808 }
319850b4 6809 globals->fix_v4bx = fix_v4bx;
33bfe774 6810 globals->use_blx |= use_blx;
c7b8f16e 6811 globals->vfp11_fix = vfp11_fix;
27e55c4d 6812 globals->pic_veneer = pic_veneer;
48229727 6813 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6814
0ffa91dd
NC		 6815 BFD_ASSERT (is_arm_elf (output_bfd));
6816 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6817 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6818}
eb043451 6819
12a0a0fd 6820/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6821
12a0a0fd
PB		 6822static void
6823insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6824{
6825 bfd_vma upper;
6826 bfd_vma lower;
6827 int reloc_sign;
6828
6829 BFD_ASSERT ((offset & 1) == 0);
6830
6831 upper = bfd_get_16 (abfd, insn);
6832 lower = bfd_get_16 (abfd, insn + 2);
6833 reloc_sign = (offset < 0) ? 1 : 0;
6834 upper = (upper & ~(bfd_vma) 0x7ff)
6835 | ((offset >> 12) & 0x3ff)
6836 | (reloc_sign << 10);
906e58ca 6837 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6838 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6839 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6840 | ((offset >> 1) & 0x7ff);
6841 bfd_put_16 (abfd, upper, insn);
6842 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6843}
6844
9b485d32
NC		 6845/* Thumb code calling an ARM function. */
6846
252b5132 6847static int
57e8b36a
NC		 6848elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6849 const char * name,
6850 bfd * input_bfd,
6851 bfd * output_bfd,
6852 asection * input_section,
6853 bfd_byte * hit_data,
6854 asection * sym_sec,
6855 bfd_vma offset,
6856 bfd_signed_vma addend,
f2a9dd69
DJ		 6857 bfd_vma val,
6858 char **error_message)
252b5132 6859{
bcbdc74c 6860 asection * s = 0;
dc810e39 6861 bfd_vma my_offset;
252b5132 6862 long int ret_offset;
bcbdc74c
NC		 6863 struct elf_link_hash_entry * myh;
6864 struct elf32_arm_link_hash_table * globals;
252b5132 6865
f2a9dd69 6866 myh = find_thumb_glue (info, name, error_message);
252b5132 6867 if (myh == NULL)
b34976b6 6868 return FALSE;
252b5132
RH		 6869
6870 globals = elf32_arm_hash_table (info);
252b5132
RH		 6871 BFD_ASSERT (globals != NULL);
6872 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6873
6874 my_offset = myh->root.u.def.value;
6875
6876 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6877 THUMB2ARM_GLUE_SECTION_NAME);
6878
6879 BFD_ASSERT (s != NULL);
6880 BFD_ASSERT (s->contents != NULL);
6881 BFD_ASSERT (s->output_section != NULL);
6882
6883 if ((my_offset & 0x01) == 0x01)
6884 {
6885 if (sym_sec != NULL
6886 && sym_sec->owner != NULL
6887 && !INTERWORK_FLAG (sym_sec->owner))
6888 {
8f615d07 6889 (*_bfd_error_handler)
d003868e
AM		 6890 (_("%B(%s): warning: interworking not enabled.\n"
6891 " first occurrence: %B: thumb call to arm"),
6892 sym_sec->owner, input_bfd, name);
252b5132 6893
b34976b6 6894 return FALSE;
252b5132
RH		 6895 }
6896
6897 --my_offset;
6898 myh->root.u.def.value = my_offset;
6899
52ab56c2
PB		 6900 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6901 s->contents + my_offset);
252b5132 6902
52ab56c2
PB		 6903 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6904 s->contents + my_offset + 2);
252b5132
RH		 6905
6906 ret_offset =
9b485d32
NC		 6907 /* Address of destination of the stub. */
6908 ((bfd_signed_vma) val)
252b5132 6909 - ((bfd_signed_vma)
57e8b36a
NC		 6910 /* Offset from the start of the current section
6911 to the start of the stubs. */
9b485d32
NC		 6912 (s->output_offset
6913 /* Offset of the start of this stub from the start of the stubs. */
6914 + my_offset
6915 /* Address of the start of the current section. */
6916 + s->output_section->vma)
6917 /* The branch instruction is 4 bytes into the stub. */
6918 + 4
6919 /* ARM branches work from the pc of the instruction + 8. */
6920 + 8);
252b5132 6921
52ab56c2
PB		 6922 put_arm_insn (globals, output_bfd,
6923 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6924 s->contents + my_offset + 4);
252b5132
RH		 6925 }
6926
6927 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6928
427bfd90
NC		 6929 /* Now go back and fix up the original BL insn to point to here. */
6930 ret_offset =
6931 /* Address of where the stub is located. */
6932 (s->output_section->vma + s->output_offset + my_offset)
6933 /* Address of where the BL is located. */
57e8b36a
NC		 6934 - (input_section->output_section->vma + input_section->output_offset
6935 + offset)
427bfd90
NC		 6936 /* Addend in the relocation. */
6937 - addend
6938 /* Biassing for PC-relative addressing. */
6939 - 8;
252b5132 6940
12a0a0fd 6941 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6942
b34976b6 6943 return TRUE;
252b5132
RH		 6944}
6945
a4fd1a8e 6946/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6947
a4fd1a8e
PB		 6948static struct elf_link_hash_entry *
6949elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6950 const char * name,
6951 bfd * input_bfd,
6952 bfd * output_bfd,
6953 asection * sym_sec,
6954 bfd_vma val,
8029a119
NC		 6955 asection * s,
6956 char ** error_message)
252b5132 6957{
dc810e39 6958 bfd_vma my_offset;
252b5132 6959 long int ret_offset;
bcbdc74c
NC		 6960 struct elf_link_hash_entry * myh;
6961 struct elf32_arm_link_hash_table * globals;
252b5132 6962
f2a9dd69 6963 myh = find_arm_glue (info, name, error_message);
252b5132 6964 if (myh == NULL)
a4fd1a8e 6965 return NULL;
252b5132
RH		 6966
6967 globals = elf32_arm_hash_table (info);
252b5132
RH		 6968 BFD_ASSERT (globals != NULL);
6969 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6970
6971 my_offset = myh->root.u.def.value;
252b5132
RH		 6972
6973 if ((my_offset & 0x01) == 0x01)
6974 {
6975 if (sym_sec != NULL
6976 && sym_sec->owner != NULL
6977 && !INTERWORK_FLAG (sym_sec->owner))
6978 {
8f615d07 6979 (*_bfd_error_handler)
d003868e
AM		 6980 (_("%B(%s): warning: interworking not enabled.\n"
6981 " first occurrence: %B: arm call to thumb"),
6982 sym_sec->owner, input_bfd, name);
252b5132 6983 }
9b485d32 6984
252b5132
RH		 6985 --my_offset;
6986 myh->root.u.def.value = my_offset;
6987
27e55c4d
PB		 6988 if (info->shared || globals->root.is_relocatable_executable
6989 || globals->pic_veneer)
8f6277f5
PB		 6990 {
6991 /* For relocatable objects we can't use absolute addresses,
6992 so construct the address from a relative offset. */
6993 /* TODO: If the offset is small it's probably worth
6994 constructing the address with adds. */
52ab56c2
PB		 6995 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6996 s->contents + my_offset);
6997 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6998 s->contents + my_offset + 4);
6999 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7000 s->contents + my_offset + 8);
8f6277f5
PB		 7001 /* Adjust the offset by 4 for the position of the add,
7002 and 8 for the pipeline offset. */
7003 ret_offset = (val - (s->output_offset
7004 + s->output_section->vma
7005 + my_offset + 12))
7006 | 1;
7007 bfd_put_32 (output_bfd, ret_offset,
7008 s->contents + my_offset + 12);
7009 }
26079076
PB		 7010 else if (globals->use_blx)
7011 {
7012 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7013 s->contents + my_offset);
7014
7015 /* It's a thumb address. Add the low order bit. */
7016 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7017 s->contents + my_offset + 4);
7018 }
8f6277f5
PB		 7019 else
7020 {
52ab56c2
PB		 7021 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7022 s->contents + my_offset);
252b5132 7023
52ab56c2
PB		 7024 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7025 s->contents + my_offset + 4);
252b5132 7026
8f6277f5
PB		 7027 /* It's a thumb address. Add the low order bit. */
7028 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7029 s->contents + my_offset + 8);
8029a119
NC		 7030
7031 my_offset += 12;
8f6277f5 7032 }
252b5132
RH		 7033 }
7034
7035 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7036
a4fd1a8e
PB		 7037 return myh;
7038}
7039
7040/* Arm code calling a Thumb function. */
7041
7042static int
7043elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7044 const char * name,
7045 bfd * input_bfd,
7046 bfd * output_bfd,
7047 asection * input_section,
7048 bfd_byte * hit_data,
7049 asection * sym_sec,
7050 bfd_vma offset,
7051 bfd_signed_vma addend,
f2a9dd69
DJ		 7052 bfd_vma val,
7053 char **error_message)
a4fd1a8e
PB		 7054{
7055 unsigned long int tmp;
7056 bfd_vma my_offset;
7057 asection * s;
7058 long int ret_offset;
7059 struct elf_link_hash_entry * myh;
7060 struct elf32_arm_link_hash_table * globals;
7061
7062 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7063 BFD_ASSERT (globals != NULL);
7064 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7065
7066 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7067 ARM2THUMB_GLUE_SECTION_NAME);
7068 BFD_ASSERT (s != NULL);
7069 BFD_ASSERT (s->contents != NULL);
7070 BFD_ASSERT (s->output_section != NULL);
7071
7072 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7073 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7074 if (!myh)
7075 return FALSE;
7076
7077 my_offset = myh->root.u.def.value;
252b5132
RH		 7078 tmp = bfd_get_32 (input_bfd, hit_data);
7079 tmp = tmp & 0xFF000000;
7080
9b485d32 7081 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7082 ret_offset = (s->output_offset
7083 + my_offset
7084 + s->output_section->vma
7085 - (input_section->output_offset
7086 + input_section->output_section->vma
7087 + offset + addend)
7088 - 8);
9a5aca8c 7089
252b5132
RH		 7090 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7091
dc810e39 7092 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7093
b34976b6 7094 return TRUE;
252b5132
RH		 7095}
7096
a4fd1a8e
PB		 7097/* Populate Arm stub for an exported Thumb function. */
7098
7099static bfd_boolean
7100elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7101{
7102 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7103 asection * s;
7104 struct elf_link_hash_entry * myh;
7105 struct elf32_arm_link_hash_entry *eh;
7106 struct elf32_arm_link_hash_table * globals;
7107 asection *sec;
7108 bfd_vma val;
f2a9dd69 7109 char *error_message;
a4fd1a8e 7110
906e58ca 7111 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7112 /* Allocate stubs for exported Thumb functions on v4t. */
7113 if (eh->export_glue == NULL)
7114 return TRUE;
7115
7116 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7117 BFD_ASSERT (globals != NULL);
7118 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7119
7120 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7121 ARM2THUMB_GLUE_SECTION_NAME);
7122 BFD_ASSERT (s != NULL);
7123 BFD_ASSERT (s->contents != NULL);
7124 BFD_ASSERT (s->output_section != NULL);
7125
7126 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7127
7128 BFD_ASSERT (sec->output_section != NULL);
7129
a4fd1a8e
PB		 7130 val = eh->export_glue->root.u.def.value + sec->output_offset
7131 + sec->output_section->vma;
8029a119 7132
a4fd1a8e
PB		 7133 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7134 h->root.u.def.section->owner,
f2a9dd69
DJ		 7135 globals->obfd, sec, val, s,
7136 &error_message);
a4fd1a8e
PB		 7137 BFD_ASSERT (myh);
7138 return TRUE;
7139}
7140
845b51d6
PB		 7141/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7142
7143static bfd_vma
7144elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7145{
7146 bfd_byte *p;
7147 bfd_vma glue_addr;
7148 asection *s;
7149 struct elf32_arm_link_hash_table *globals;
7150
7151 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7152 BFD_ASSERT (globals != NULL);
7153 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7154
7155 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7156 ARM_BX_GLUE_SECTION_NAME);
7157 BFD_ASSERT (s != NULL);
7158 BFD_ASSERT (s->contents != NULL);
7159 BFD_ASSERT (s->output_section != NULL);
7160
7161 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7162
7163 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7164
7165 if ((globals->bx_glue_offset[reg] & 1) == 0)
7166 {
7167 p = s->contents + glue_addr;
7168 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7169 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7170 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7171 globals->bx_glue_offset[reg] |= 1;
7172 }
7173
7174 return glue_addr + s->output_section->vma + s->output_offset;
7175}
7176
a4fd1a8e
PB		 7177/* Generate Arm stubs for exported Thumb symbols. */
7178static void
906e58ca 7179elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7180 struct bfd_link_info *link_info)
7181{
7182 struct elf32_arm_link_hash_table * globals;
7183
8029a119
NC		 7184 if (link_info == NULL)
7185 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7186 return;
7187
7188 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7189 if (globals == NULL)
7190 return;
7191
84c08195
PB		 7192 /* If blx is available then exported Thumb symbols are OK and there is
7193 nothing to do. */
a4fd1a8e
PB		 7194 if (globals->use_blx)
7195 return;
7196
7197 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7198 link_info);
7199}
7200
47beaa6a
RS		 7201/* Reserve space for COUNT dynamic relocations in relocation selection
7202 SRELOC. */
7203
7204static void
7205elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7206 bfd_size_type count)
7207{
7208 struct elf32_arm_link_hash_table *htab;
7209
7210 htab = elf32_arm_hash_table (info);
7211 BFD_ASSERT (htab->root.dynamic_sections_created);
7212 if (sreloc == NULL)
7213 abort ();
7214 sreloc->size += RELOC_SIZE (htab) * count;
7215}
7216
34e77a92
RS		 7217/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7218 dynamic, the relocations should go in SRELOC, otherwise they should
7219 go in the special .rel.iplt section. */
7220
7221static void
7222elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7223 bfd_size_type count)
7224{
7225 struct elf32_arm_link_hash_table *htab;
7226
7227 htab = elf32_arm_hash_table (info);
7228 if (!htab->root.dynamic_sections_created)
7229 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7230 else
7231 {
7232 BFD_ASSERT (sreloc != NULL);
7233 sreloc->size += RELOC_SIZE (htab) * count;
7234 }
7235}
7236
47beaa6a
RS		 7237/* Add relocation REL to the end of relocation section SRELOC. */
7238
7239static void
7240elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7241 asection *sreloc, Elf_Internal_Rela *rel)
7242{
7243 bfd_byte *loc;
7244 struct elf32_arm_link_hash_table *htab;
7245
7246 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7247 if (!htab->root.dynamic_sections_created
7248 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7249 sreloc = htab->root.irelplt;
47beaa6a
RS		 7250 if (sreloc == NULL)
7251 abort ();
7252 loc = sreloc->contents;
7253 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7254 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7255 abort ();
7256 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7257}
7258
34e77a92
RS		 7259/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7260 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7261 to .plt. */
7262
7263static void
7264elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7265 bfd_boolean is_iplt_entry,
7266 union gotplt_union *root_plt,
7267 struct arm_plt_info *arm_plt)
7268{
7269 struct elf32_arm_link_hash_table *htab;
7270 asection *splt;
7271 asection *sgotplt;
7272
7273 htab = elf32_arm_hash_table (info);
7274
7275 if (is_iplt_entry)
7276 {
7277 splt = htab->root.iplt;
7278 sgotplt = htab->root.igotplt;
7279
7280 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7281 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7282 }
7283 else
7284 {
7285 splt = htab->root.splt;
7286 sgotplt = htab->root.sgotplt;
7287
7288 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7289 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7290
7291 /* If this is the first .plt entry, make room for the special
7292 first entry. */
7293 if (splt->size == 0)
7294 splt->size += htab->plt_header_size;
7295 }
7296
7297 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7298 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7299 splt->size += PLT_THUMB_STUB_SIZE;
7300 root_plt->offset = splt->size;
7301 splt->size += htab->plt_entry_size;
7302
7303 if (!htab->symbian_p)
7304 {
7305 /* We also need to make an entry in the .got.plt section, which
7306 will be placed in the .got section by the linker script. */
7307 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7308 sgotplt->size += 4;
7309 }
7310}
7311
7312/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7313 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7314 Otherwise, DYNINDX is the index of the symbol in the dynamic
7315 symbol table and SYM_VALUE is undefined.
7316
7317 ROOT_PLT points to the offset of the PLT entry from the start of its
7318 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7319 bookkeeping information. */
7320
7321static void
7322elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7323 union gotplt_union *root_plt,
7324 struct arm_plt_info *arm_plt,
7325 int dynindx, bfd_vma sym_value)
7326{
7327 struct elf32_arm_link_hash_table *htab;
7328 asection *sgot;
7329 asection *splt;
7330 asection *srel;
7331 bfd_byte *loc;
7332 bfd_vma plt_index;
7333 Elf_Internal_Rela rel;
7334 bfd_vma plt_header_size;
7335 bfd_vma got_header_size;
7336
7337 htab = elf32_arm_hash_table (info);
7338
7339 /* Pick the appropriate sections and sizes. */
7340 if (dynindx == -1)
7341 {
7342 splt = htab->root.iplt;
7343 sgot = htab->root.igotplt;
7344 srel = htab->root.irelplt;
7345
7346 /* There are no reserved entries in .igot.plt, and no special
7347 first entry in .iplt. */
7348 got_header_size = 0;
7349 plt_header_size = 0;
7350 }
7351 else
7352 {
7353 splt = htab->root.splt;
7354 sgot = htab->root.sgotplt;
7355 srel = htab->root.srelplt;
7356
7357 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7358 plt_header_size = htab->plt_header_size;
7359 }
7360 BFD_ASSERT (splt != NULL && srel != NULL);
7361
7362 /* Fill in the entry in the procedure linkage table. */
7363 if (htab->symbian_p)
7364 {
7365 BFD_ASSERT (dynindx >= 0);
7366 put_arm_insn (htab, output_bfd,
7367 elf32_arm_symbian_plt_entry[0],
7368 splt->contents + root_plt->offset);
7369 bfd_put_32 (output_bfd,
7370 elf32_arm_symbian_plt_entry[1],
7371 splt->contents + root_plt->offset + 4);
7372
7373 /* Fill in the entry in the .rel.plt section. */
7374 rel.r_offset = (splt->output_section->vma
7375 + splt->output_offset
7376 + root_plt->offset + 4);
7377 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7378
7379 /* Get the index in the procedure linkage table which
7380 corresponds to this symbol. This is the index of this symbol
7381 in all the symbols for which we are making plt entries. The
7382 first entry in the procedure linkage table is reserved. */
7383 plt_index = ((root_plt->offset - plt_header_size)
7384 / htab->plt_entry_size);
7385 }
7386 else
7387 {
7388 bfd_vma got_offset, got_address, plt_address;
7389 bfd_vma got_displacement, initial_got_entry;
7390 bfd_byte * ptr;
7391
7392 BFD_ASSERT (sgot != NULL);
7393
7394 /* Get the offset into the .(i)got.plt table of the entry that
7395 corresponds to this function. */
7396 got_offset = (arm_plt->got_offset & -2);
7397
7398 /* Get the index in the procedure linkage table which
7399 corresponds to this symbol. This is the index of this symbol
7400 in all the symbols for which we are making plt entries.
7401 After the reserved .got.plt entries, all symbols appear in
7402 the same order as in .plt. */
7403 plt_index = (got_offset - got_header_size) / 4;
7404
7405 /* Calculate the address of the GOT entry. */
7406 got_address = (sgot->output_section->vma
7407 + sgot->output_offset
7408 + got_offset);
7409
7410 /* ...and the address of the PLT entry. */
7411 plt_address = (splt->output_section->vma
7412 + splt->output_offset
7413 + root_plt->offset);
7414
7415 ptr = splt->contents + root_plt->offset;
7416 if (htab->vxworks_p && info->shared)
7417 {
7418 unsigned int i;
7419 bfd_vma val;
7420
7421 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7422 {
7423 val = elf32_arm_vxworks_shared_plt_entry[i];
7424 if (i == 2)
7425 val |= got_address - sgot->output_section->vma;
7426 if (i == 5)
7427 val |= plt_index * RELOC_SIZE (htab);
7428 if (i == 2 || i == 5)
7429 bfd_put_32 (output_bfd, val, ptr);
7430 else
7431 put_arm_insn (htab, output_bfd, val, ptr);
7432 }
7433 }
7434 else if (htab->vxworks_p)
7435 {
7436 unsigned int i;
7437 bfd_vma val;
7438
7439 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7440 {
7441 val = elf32_arm_vxworks_exec_plt_entry[i];
7442 if (i == 2)
7443 val |= got_address;
7444 if (i == 4)
7445 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7446 if (i == 5)
7447 val |= plt_index * RELOC_SIZE (htab);
7448 if (i == 2 || i == 5)
7449 bfd_put_32 (output_bfd, val, ptr);
7450 else
7451 put_arm_insn (htab, output_bfd, val, ptr);
7452 }
7453
7454 loc = (htab->srelplt2->contents
7455 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7456
7457 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7458 referencing the GOT for this PLT entry. */
7459 rel.r_offset = plt_address + 8;
7460 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7461 rel.r_addend = got_offset;
7462 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7463 loc += RELOC_SIZE (htab);
7464
7465 /* Create the R_ARM_ABS32 relocation referencing the
7466 beginning of the PLT for this GOT entry. */
7467 rel.r_offset = got_address;
7468 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7469 rel.r_addend = 0;
7470 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7471 }
7472 else
7473 {
7474 /* Calculate the displacement between the PLT slot and the
7475 entry in the GOT. The eight-byte offset accounts for the
7476 value produced by adding to pc in the first instruction
7477 of the PLT stub. */
7478 got_displacement = got_address - (plt_address + 8);
7479
7480 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7481
7482 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7483 {
7484 put_thumb_insn (htab, output_bfd,
7485 elf32_arm_plt_thumb_stub[0], ptr - 4);
7486 put_thumb_insn (htab, output_bfd,
7487 elf32_arm_plt_thumb_stub[1], ptr - 2);
7488 }
7489
7490 put_arm_insn (htab, output_bfd,
7491 elf32_arm_plt_entry[0]
7492 | ((got_displacement & 0x0ff00000) >> 20),
7493 ptr + 0);
7494 put_arm_insn (htab, output_bfd,
7495 elf32_arm_plt_entry[1]
7496 | ((got_displacement & 0x000ff000) >> 12),
7497 ptr+ 4);
7498 put_arm_insn (htab, output_bfd,
7499 elf32_arm_plt_entry[2]
7500 | (got_displacement & 0x00000fff),
7501 ptr + 8);
7502#ifdef FOUR_WORD_PLT
7503 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7504#endif
7505 }
7506
7507 /* Fill in the entry in the .rel(a).(i)plt section. */
7508 rel.r_offset = got_address;
7509 rel.r_addend = 0;
7510 if (dynindx == -1)
7511 {
7512 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7513 The dynamic linker or static executable then calls SYM_VALUE
7514 to determine the correct run-time value of the .igot.plt entry. */
7515 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7516 initial_got_entry = sym_value;
7517 }
7518 else
7519 {
7520 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7521 initial_got_entry = (splt->output_section->vma
7522 + splt->output_offset);
7523 }
7524
7525 /* Fill in the entry in the global offset table. */
7526 bfd_put_32 (output_bfd, initial_got_entry,
7527 sgot->contents + got_offset);
7528 }
7529
7530 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7531 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7532}
7533
eb043451
PB		 7534/* Some relocations map to different relocations depending on the
7535 target. Return the real relocation. */
8029a119 7536
eb043451
PB		 7537static int
7538arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7539 int r_type)
7540{
7541 switch (r_type)
7542 {
7543 case R_ARM_TARGET1:
7544 if (globals->target1_is_rel)
7545 return R_ARM_REL32;
7546 else
7547 return R_ARM_ABS32;
7548
7549 case R_ARM_TARGET2:
7550 return globals->target2_reloc;
7551
7552 default:
7553 return r_type;
7554 }
7555}
eb043451 7556
ba93b8ac
DJ		 7557/* Return the base VMA address which should be subtracted from real addresses
7558 when resolving @dtpoff relocation.
7559 This is PT_TLS segment p_vaddr. */
7560
7561static bfd_vma
7562dtpoff_base (struct bfd_link_info *info)
7563{
7564 /* If tls_sec is NULL, we should have signalled an error already. */
7565 if (elf_hash_table (info)->tls_sec == NULL)
7566 return 0;
7567 return elf_hash_table (info)->tls_sec->vma;
7568}
7569
7570/* Return the relocation value for @tpoff relocation
7571 if STT_TLS virtual address is ADDRESS. */
7572
7573static bfd_vma
7574tpoff (struct bfd_link_info *info, bfd_vma address)
7575{
7576 struct elf_link_hash_table *htab = elf_hash_table (info);
7577 bfd_vma base;
7578
7579 /* If tls_sec is NULL, we should have signalled an error already. */
7580 if (htab->tls_sec == NULL)
7581 return 0;
7582 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7583 return address - htab->tls_sec->vma + base;
7584}
7585
00a97672
RS		 7586/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7587 VALUE is the relocation value. */
7588
7589static bfd_reloc_status_type
7590elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7591{
7592 if (value > 0xfff)
7593 return bfd_reloc_overflow;
7594
7595 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7596 bfd_put_32 (abfd, value, data);
7597 return bfd_reloc_ok;
7598}
7599
0855e32b
NS		 7600/* Handle TLS relaxations. Relaxing is possible for symbols that use
7601 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7602 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7603
7604 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7605 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7606 case of error.
7607
7608 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7609 the pre-relaxed code. It would be nice if the relocs were updated
7610 to match the optimization. */
0855e32b
NS		 7611
7612static bfd_reloc_status_type
7613elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7614 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7615 Elf_Internal_Rela *rel, unsigned long is_local)
7616{
7617 unsigned long insn;
7618
7619 switch (ELF32_R_TYPE (rel->r_info))
7620 {
7621 default:
7622 return bfd_reloc_notsupported;
7623
7624 case R_ARM_TLS_GOTDESC:
7625 if (is_local)
7626 insn = 0;
7627 else
7628 {
7629 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7630 if (insn & 1)
7631 insn -= 5; /* THUMB */
7632 else
7633 insn -= 8; /* ARM */
7634 }
7635 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7636 return bfd_reloc_continue;
7637
7638 case R_ARM_THM_TLS_DESCSEQ:
7639 /* Thumb insn. */
7640 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7641 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7642 {
7643 if (is_local)
7644 /* nop */
7645 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7646 }
7647 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7648 {
7649 if (is_local)
7650 /* nop */
7651 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7652 else
7653 /* ldr rx,[ry] */
7654 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7655 }
7656 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7657 {
7658 if (is_local)
7659 /* nop */
7660 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7661 else
7662 /* mov r0, rx */
7663 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7664 contents + rel->r_offset);
7665 }
7666 else
7667 {
7668 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7669 /* It's a 32 bit instruction, fetch the rest of it for
7670 error generation. */
7671 insn = (insn << 16)
7672 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7673 (*_bfd_error_handler)
7674 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7675 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7676 return bfd_reloc_notsupported;
7677 }
7678 break;
7679
7680 case R_ARM_TLS_DESCSEQ:
7681 /* arm insn. */
7682 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7683 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7684 {
7685 if (is_local)
7686 /* mov rx, ry */
7687 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7688 contents + rel->r_offset);
7689 }
7690 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7691 {
7692 if (is_local)
7693 /* nop */
7694 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7695 else
7696 /* ldr rx,[ry] */
7697 bfd_put_32 (input_bfd, insn & 0xfffff000,
7698 contents + rel->r_offset);
7699 }
7700 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7701 {
7702 if (is_local)
7703 /* nop */
7704 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7705 else
7706 /* mov r0, rx */
7707 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7708 contents + rel->r_offset);
7709 }
7710 else
7711 {
7712 (*_bfd_error_handler)
7713 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7714 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7715 return bfd_reloc_notsupported;
7716 }
7717 break;
7718
7719 case R_ARM_TLS_CALL:
7720 /* GD->IE relaxation, turn the instruction into 'nop' or
7721 'ldr r0, [pc,r0]' */
7722 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7723 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7724 break;
7725
7726 case R_ARM_THM_TLS_CALL:
7727 /* GD->IE relaxation */
7728 if (!is_local)
7729 /* add r0,pc; ldr r0, [r0] */
7730 insn = 0x44786800;
7731 else if (arch_has_thumb2_nop (globals))
7732 /* nop.w */
7733 insn = 0xf3af8000;
7734 else
7735 /* nop; nop */
7736 insn = 0xbf00bf00;
7737
7738 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7739 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7740 break;
7741 }
7742 return bfd_reloc_ok;
7743}
7744
4962c51a
MS		 7745/* For a given value of n, calculate the value of G_n as required to
7746 deal with group relocations. We return it in the form of an
7747 encoded constant-and-rotation, together with the final residual. If n is
7748 specified as less than zero, then final_residual is filled with the
7749 input value and no further action is performed. */
7750
7751static bfd_vma
7752calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7753{
7754 int current_n;
7755 bfd_vma g_n;
7756 bfd_vma encoded_g_n = 0;
7757 bfd_vma residual = value; /* Also known as Y_n. */
7758
7759 for (current_n = 0; current_n <= n; current_n++)
7760 {
7761 int shift;
7762
7763 /* Calculate which part of the value to mask. */
7764 if (residual == 0)
7765 shift = 0;
7766 else
7767 {
7768 int msb;
7769
7770 /* Determine the most significant bit in the residual and
7771 align the resulting value to a 2-bit boundary. */
7772 for (msb = 30; msb >= 0; msb -= 2)
7773 if (residual & (3 << msb))
7774 break;
7775
7776 /* The desired shift is now (msb - 6), or zero, whichever
7777 is the greater. */
7778 shift = msb - 6;
7779 if (shift < 0)
7780 shift = 0;
7781 }
7782
7783 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7784 g_n = residual & (0xff << shift);
7785 encoded_g_n = (g_n >> shift)
7786 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7787
7788 /* Calculate the residual for the next time around. */
7789 residual &= ~g_n;
7790 }
7791
7792 *final_residual = residual;
7793
7794 return encoded_g_n;
7795}
7796
7797/* Given an ARM instruction, determine whether it is an ADD or a SUB.
7798 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 7799
4962c51a 7800static int
906e58ca 7801identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 7802{
7803 int opcode = insn & 0x1e00000;
7804
7805 if (opcode == 1 << 23) /* ADD */
7806 return 1;
7807
7808 if (opcode == 1 << 22) /* SUB */
7809 return -1;
7810
7811 return 0;
7812}
7813
252b5132 7814/* Perform a relocation as part of a final link. */
9b485d32 7815
252b5132 7816static bfd_reloc_status_type
57e8b36a
NC		 7817elf32_arm_final_link_relocate (reloc_howto_type * howto,
7818 bfd * input_bfd,
7819 bfd * output_bfd,
7820 asection * input_section,
7821 bfd_byte * contents,
7822 Elf_Internal_Rela * rel,
7823 bfd_vma value,
7824 struct bfd_link_info * info,
7825 asection * sym_sec,
7826 const char * sym_name,
34e77a92
RS		 7827 unsigned char st_type,
7828 enum arm_st_branch_type branch_type,
0945cdfd 7829 struct elf_link_hash_entry * h,
f2a9dd69 7830 bfd_boolean * unresolved_reloc_p,
8029a119 7831 char ** error_message)
252b5132
RH		 7832{
7833 unsigned long r_type = howto->type;
7834 unsigned long r_symndx;
7835 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 7836 bfd_vma * local_got_offsets;
0855e32b 7837 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 7838 asection * sgot;
7839 asection * splt;
252b5132 7840 asection * sreloc = NULL;
362d30a1 7841 asection * srelgot;
252b5132 7842 bfd_vma addend;
ba96a88f 7843 bfd_signed_vma signed_addend;
34e77a92
RS		 7844 unsigned char dynreloc_st_type;
7845 bfd_vma dynreloc_value;
ba96a88f 7846 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 7847 struct elf32_arm_link_hash_entry *eh;
7848 union gotplt_union *root_plt;
7849 struct arm_plt_info *arm_plt;
7850 bfd_vma plt_offset;
7851 bfd_vma gotplt_offset;
7852 bfd_boolean has_iplt_entry;
f21f3fe0 7853
9c504268 7854 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 7855 if (globals == NULL)
7856 return bfd_reloc_notsupported;
9c504268 7857
0ffa91dd
NC		 7858 BFD_ASSERT (is_arm_elf (input_bfd));
7859
7860 /* Some relocation types map to different relocations depending on the
9c504268 7861 target. We pick the right one here. */
eb043451 7862 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 7863
7864 /* It is possible to have linker relaxations on some TLS access
7865 models. Update our information here. */
7866 r_type = elf32_arm_tls_transition (info, r_type, h);
7867
eb043451
PB		 7868 if (r_type != howto->type)
7869 howto = elf32_arm_howto_from_type (r_type);
9c504268 7870
cac15327
NC		 7871 /* If the start address has been set, then set the EF_ARM_HASENTRY
7872 flag. Setting this more than once is redundant, but the cost is
7873 not too high, and it keeps the code simple.
99e4ae17 7874
cac15327
NC		 7875 The test is done here, rather than somewhere else, because the
7876 start address is only set just before the final link commences.
7877
7878 Note - if the user deliberately sets a start address of 0, the
7879 flag will not be set. */
7880 if (bfd_get_start_address (output_bfd) != 0)
7881 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 7882
34e77a92 7883 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 7884 sgot = globals->root.sgot;
252b5132 7885 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 7886 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
7887
34e77a92
RS		 7888 if (globals->root.dynamic_sections_created)
7889 srelgot = globals->root.srelgot;
7890 else
7891 srelgot = NULL;
7892
252b5132
RH		 7893 r_symndx = ELF32_R_SYM (rel->r_info);
7894
4e7fd91e 7895 if (globals->use_rel)
ba96a88f 7896 {
4e7fd91e
PB		 7897 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
7898
7899 if (addend & ((howto->src_mask + 1) >> 1))
7900 {
7901 signed_addend = -1;
7902 signed_addend &= ~ howto->src_mask;
7903 signed_addend |= addend;
7904 }
7905 else
7906 signed_addend = addend;
ba96a88f
NC		 7907 }
7908 else
4e7fd91e 7909 addend = signed_addend = rel->r_addend;
f21f3fe0 7910
34e77a92
RS		 7911 /* Record the symbol information that should be used in dynamic
7912 relocations. */
7913 dynreloc_st_type = st_type;
7914 dynreloc_value = value;
7915 if (branch_type == ST_BRANCH_TO_THUMB)
7916 dynreloc_value |= 1;
7917
7918 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
7919 VALUE appropriately for relocations that we resolve at link time. */
7920 has_iplt_entry = FALSE;
7921 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
7922 && root_plt->offset != (bfd_vma) -1)
7923 {
7924 plt_offset = root_plt->offset;
7925 gotplt_offset = arm_plt->got_offset;
7926
7927 if (h == NULL || eh->is_iplt)
7928 {
7929 has_iplt_entry = TRUE;
7930 splt = globals->root.iplt;
7931
7932 /* Populate .iplt entries here, because not all of them will
7933 be seen by finish_dynamic_symbol. The lower bit is set if
7934 we have already populated the entry. */
7935 if (plt_offset & 1)
7936 plt_offset--;
7937 else
7938 {
7939 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
7940 -1, dynreloc_value);
7941 root_plt->offset |= 1;
7942 }
7943
7944 /* Static relocations always resolve to the .iplt entry. */
7945 st_type = STT_FUNC;
7946 value = (splt->output_section->vma
7947 + splt->output_offset
7948 + plt_offset);
7949 branch_type = ST_BRANCH_TO_ARM;
7950
7951 /* If there are non-call relocations that resolve to the .iplt
7952 entry, then all dynamic ones must too. */
7953 if (arm_plt->noncall_refcount != 0)
7954 {
7955 dynreloc_st_type = st_type;
7956 dynreloc_value = value;
7957 }
7958 }
7959 else
7960 /* We populate the .plt entry in finish_dynamic_symbol. */
7961 splt = globals->root.splt;
7962 }
7963 else
7964 {
7965 splt = NULL;
7966 plt_offset = (bfd_vma) -1;
7967 gotplt_offset = (bfd_vma) -1;
7968 }
7969
252b5132
RH		 7970 switch (r_type)
7971 {
7972 case R_ARM_NONE:
28a094c2
DJ		 7973 /* We don't need to find a value for this symbol. It's just a
7974 marker. */
7975 *unresolved_reloc_p = FALSE;
252b5132
RH		 7976 return bfd_reloc_ok;
7977
00a97672
RS		 7978 case R_ARM_ABS12:
7979 if (!globals->vxworks_p)
7980 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7981
252b5132
RH		 7982 case R_ARM_PC24:
7983 case R_ARM_ABS32:
bb224fc3 7984 case R_ARM_ABS32_NOI:
252b5132 7985 case R_ARM_REL32:
bb224fc3 7986 case R_ARM_REL32_NOI:
5b5bb741
PB		 7987 case R_ARM_CALL:
7988 case R_ARM_JUMP24:
dfc5f959 7989 case R_ARM_XPC25:
eb043451 7990 case R_ARM_PREL31:
7359ea65 7991 case R_ARM_PLT32:
7359ea65
DJ		 7992 /* Handle relocations which should use the PLT entry. ABS32/REL32
7993 will use the symbol's value, which may point to a PLT entry, but we
7994 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 7995 branches in this object should go to it, except if the PLT is too
7996 far away, in which case a long branch stub should be inserted. */
bb224fc3 7997 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 7998 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 7999 && r_type != R_ARM_CALL
8000 && r_type != R_ARM_JUMP24
8001 && r_type != R_ARM_PLT32)
34e77a92 8002 && plt_offset != (bfd_vma) -1)
7359ea65 8003 {
34e77a92
RS		 8004 /* If we've created a .plt section, and assigned a PLT entry
8005 to this function, it must either be a STT_GNU_IFUNC reference
8006 or not be known to bind locally. In other cases, we should
8007 have cleared the PLT entry by now. */
8008 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8009
8010 value = (splt->output_section->vma
8011 + splt->output_offset
34e77a92 8012 + plt_offset);
0945cdfd 8013 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8014 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8015 contents, rel->r_offset, value,
00a97672 8016 rel->r_addend);
7359ea65
DJ		 8017 }
8018
67687978
PB		 8019 /* When generating a shared object or relocatable executable, these
8020 relocations are copied into the output file to be resolved at
8021 run time. */
8022 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8023 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8024 && !(globals->vxworks_p
3348747a
NS		 8025 && strcmp (input_section->output_section->name,
8026 ".tls_vars") == 0)
bb224fc3 8027 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8028 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 8029 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8030 && (h == NULL
8031 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8032 || h->root.type != bfd_link_hash_undefweak)
8033 && r_type != R_ARM_PC24
5b5bb741
PB		 8034 && r_type != R_ARM_CALL
8035 && r_type != R_ARM_JUMP24
ee06dc07 8036 && r_type != R_ARM_PREL31
7359ea65 8037 && r_type != R_ARM_PLT32)
252b5132 8038 {
947216bf 8039 Elf_Internal_Rela outrel;
b34976b6 8040 bfd_boolean skip, relocate;
f21f3fe0 8041
0945cdfd
DJ		 8042 *unresolved_reloc_p = FALSE;
8043
34e77a92 8044 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8045 {
83bac4b0
NC		 8046 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8047 ! globals->use_rel);
f21f3fe0 8048
83bac4b0 8049 if (sreloc == NULL)
252b5132 8050 return bfd_reloc_notsupported;
252b5132 8051 }
f21f3fe0 8052
b34976b6
AM		 8053 skip = FALSE;
8054 relocate = FALSE;
f21f3fe0 8055
00a97672 8056 outrel.r_addend = addend;
c629eae0
JJ		 8057 outrel.r_offset =
8058 _bfd_elf_section_offset (output_bfd, info, input_section,
8059 rel->r_offset);
8060 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8061 skip = TRUE;
0bb2d96a 8062 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8063 skip = TRUE, relocate = TRUE;
252b5132
RH		 8064 outrel.r_offset += (input_section->output_section->vma
8065 + input_section->output_offset);
f21f3fe0 8066
252b5132 8067 if (skip)
0bb2d96a 8068 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8069 else if (h != NULL
8070 && h->dynindx != -1
7359ea65 8071 && (!info->shared
5e681ec4 8072 || !info->symbolic
f5385ebf 8073 || !h->def_regular))
5e681ec4 8074 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8075 else
8076 {
a16385dc
MM		 8077 int symbol;
8078
5e681ec4 8079 /* This symbol is local, or marked to become local. */
34e77a92 8080 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8081 if (globals->symbian_p)
6366ff1e 8082 {
74541ad4
AM		 8083 asection *osec;
8084
6366ff1e
MM		 8085 /* On Symbian OS, the data segment and text segement
8086 can be relocated independently. Therefore, we
8087 must indicate the segment to which this
8088 relocation is relative. The BPABI allows us to
8089 use any symbol in the right segment; we just use
8090 the section symbol as it is convenient. (We
8091 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8092 will not appear in the dynamic symbol table.)
8093
8094 Note that the dynamic linker ignores the section
8095 symbol value, so we don't subtract osec->vma
8096 from the emitted reloc addend. */
10dbd1f3 8097 if (sym_sec)
74541ad4 8098 osec = sym_sec->output_section;
10dbd1f3 8099 else
74541ad4
AM		 8100 osec = input_section->output_section;
8101 symbol = elf_section_data (osec)->dynindx;
8102 if (symbol == 0)
8103 {
8104 struct elf_link_hash_table *htab = elf_hash_table (info);
8105
8106 if ((osec->flags & SEC_READONLY) == 0
8107 && htab->data_index_section != NULL)
8108 osec = htab->data_index_section;
8109 else
8110 osec = htab->text_index_section;
8111 symbol = elf_section_data (osec)->dynindx;
8112 }
6366ff1e
MM		 8113 BFD_ASSERT (symbol != 0);
8114 }
a16385dc
MM		 8115 else
8116 /* On SVR4-ish systems, the dynamic loader cannot
8117 relocate the text and data segments independently,
8118 so the symbol does not matter. */
8119 symbol = 0;
34e77a92
RS		 8120 if (dynreloc_st_type == STT_GNU_IFUNC)
8121 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8122 to the .iplt entry. Instead, every non-call reference
8123 must use an R_ARM_IRELATIVE relocation to obtain the
8124 correct run-time address. */
8125 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8126 else
8127 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8128 if (globals->use_rel)
8129 relocate = TRUE;
8130 else
34e77a92 8131 outrel.r_addend += dynreloc_value;
252b5132 8132 }
f21f3fe0 8133
47beaa6a 8134 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8135
f21f3fe0 8136 /* If this reloc is against an external symbol, we do not want to
252b5132 8137 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8138 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8139 if (! relocate)
8140 return bfd_reloc_ok;
9a5aca8c 8141
f21f3fe0 8142 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8143 contents, rel->r_offset,
8144 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8145 }
8146 else switch (r_type)
8147 {
00a97672
RS		 8148 case R_ARM_ABS12:
8149 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8150
dfc5f959 8151 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8152 case R_ARM_CALL:
8153 case R_ARM_JUMP24:
8029a119 8154 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8155 case R_ARM_PLT32:
906e58ca 8156 {
906e58ca
NC		 8157 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8158
dfc5f959 8159 if (r_type == R_ARM_XPC25)
252b5132 8160 {
dfc5f959
NC		 8161 /* Check for Arm calling Arm function. */
8162 /* FIXME: Should we translate the instruction into a BL
8163 instruction instead ? */
35fc36a8 8164 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8165 (*_bfd_error_handler)
8166 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8167 input_bfd,
8168 h ? h->root.root.string : "(local)");
dfc5f959 8169 }
155d87d7 8170 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8171 {
8172 /* Check for Arm calling Thumb function. */
35fc36a8 8173 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8174 {
f2a9dd69
DJ		 8175 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8176 output_bfd, input_section,
8177 hit_data, sym_sec, rel->r_offset,
8178 signed_addend, value,
8179 error_message))
8180 return bfd_reloc_ok;
8181 else
8182 return bfd_reloc_dangerous;
dfc5f959 8183 }
252b5132 8184 }
ba96a88f 8185
906e58ca 8186 /* Check if a stub has to be inserted because the
8029a119 8187 destination is too far or we are changing mode. */
155d87d7
CL		 8188 if ( r_type == R_ARM_CALL
8189 || r_type == R_ARM_JUMP24
8190 || r_type == R_ARM_PLT32)
906e58ca 8191 {
fe33d2fa
CL		 8192 enum elf32_arm_stub_type stub_type = arm_stub_none;
8193 struct elf32_arm_link_hash_entry *hash;
8194
8195 hash = (struct elf32_arm_link_hash_entry *) h;
8196 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8197 st_type, &branch_type,
8198 hash, value, sym_sec,
fe33d2fa 8199 input_bfd, sym_name);
5fa9e92f 8200
fe33d2fa 8201 if (stub_type != arm_stub_none)
906e58ca
NC		 8202 {
8203 /* The target is out of reach, so redirect the
8204 branch to the local stub for this function. */
8205
8206 stub_entry = elf32_arm_get_stub_entry (input_section,
8207 sym_sec, h,
fe33d2fa
CL		 8208 rel, globals,
8209 stub_type);
906e58ca
NC		 8210 if (stub_entry != NULL)
8211 value = (stub_entry->stub_offset
8212 + stub_entry->stub_sec->output_offset
8213 + stub_entry->stub_sec->output_section->vma);
8214 }
fe33d2fa
CL		 8215 else
8216 {
8217 /* If the call goes through a PLT entry, make sure to
8218 check distance to the right destination address. */
34e77a92 8219 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8220 {
8221 value = (splt->output_section->vma
8222 + splt->output_offset
34e77a92 8223 + plt_offset);
fe33d2fa
CL		 8224 *unresolved_reloc_p = FALSE;
8225 /* The PLT entry is in ARM mode, regardless of the
8226 target function. */
35fc36a8 8227 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8228 }
8229 }
906e58ca
NC		 8230 }
8231
dea514f5
PB		 8232 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8233 where:
8234 S is the address of the symbol in the relocation.
8235 P is address of the instruction being relocated.
8236 A is the addend (extracted from the instruction) in bytes.
8237
8238 S is held in 'value'.
8239 P is the base address of the section containing the
8240 instruction plus the offset of the reloc into that
8241 section, ie:
8242 (input_section->output_section->vma +
8243 input_section->output_offset +
8244 rel->r_offset).
8245 A is the addend, converted into bytes, ie:
8246 (signed_addend * 4)
8247
8248 Note: None of these operations have knowledge of the pipeline
8249 size of the processor, thus it is up to the assembler to
8250 encode this information into the addend. */
8251 value -= (input_section->output_section->vma
8252 + input_section->output_offset);
8253 value -= rel->r_offset;
4e7fd91e
PB		 8254 if (globals->use_rel)
8255 value += (signed_addend << howto->size);
8256 else
8257 /* RELA addends do not have to be adjusted by howto->size. */
8258 value += signed_addend;
23080146 8259
dcb5e6e6
NC		 8260 signed_addend = value;
8261 signed_addend >>= howto->rightshift;
9a5aca8c 8262
5ab79981 8263 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8264 the next instruction unless a PLT entry will be created.
77b4f08f 8265 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8266 The jump to the next instruction is optimized as a NOP depending
8267 on the architecture. */
ffcb4889 8268 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8269 && plt_offset == (bfd_vma) -1)
77b4f08f 8270 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8271 {
cd1dac3d
DG		 8272 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8273
8274 if (arch_has_arm_nop (globals))
8275 value |= 0x0320f000;
8276 else
8277 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8278 }
8279 else
59f2c4e7 8280 {
9b485d32 8281 /* Perform a signed range check. */
dcb5e6e6 8282 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8283 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8284 return bfd_reloc_overflow;
9a5aca8c 8285
5ab79981 8286 addend = (value & 2);
39b41c9c 8287
5ab79981
PB		 8288 value = (signed_addend & howto->dst_mask)
8289 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8290
5ab79981
PB		 8291 if (r_type == R_ARM_CALL)
8292 {
155d87d7 8293 /* Set the H bit in the BLX instruction. */
35fc36a8 8294 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8295 {
8296 if (addend)
8297 value |= (1 << 24);
8298 else
8299 value &= ~(bfd_vma)(1 << 24);
8300 }
8301
5ab79981 8302 /* Select the correct instruction (BL or BLX). */
906e58ca 8303 /* Only if we are not handling a BL to a stub. In this
8029a119 8304 case, mode switching is performed by the stub. */
35fc36a8 8305 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8306 value |= (1 << 28);
63e1a0fc 8307 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8308 {
8309 value &= ~(bfd_vma)(1 << 28);
8310 value |= (1 << 24);
8311 }
39b41c9c
PB		 8312 }
8313 }
906e58ca 8314 }
252b5132 8315 break;
f21f3fe0 8316
252b5132
RH		 8317 case R_ARM_ABS32:
8318 value += addend;
35fc36a8 8319 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8320 value |= 1;
8321 break;
f21f3fe0 8322
bb224fc3
MS		 8323 case R_ARM_ABS32_NOI:
8324 value += addend;
8325 break;
8326
252b5132 8327 case R_ARM_REL32:
a8bc6c78 8328 value += addend;
35fc36a8 8329 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8330 value |= 1;
252b5132 8331 value -= (input_section->output_section->vma
62efb346 8332 + input_section->output_offset + rel->r_offset);
252b5132 8333 break;
eb043451 8334
bb224fc3
MS		 8335 case R_ARM_REL32_NOI:
8336 value += addend;
8337 value -= (input_section->output_section->vma
8338 + input_section->output_offset + rel->r_offset);
8339 break;
8340
eb043451
PB		 8341 case R_ARM_PREL31:
8342 value -= (input_section->output_section->vma
8343 + input_section->output_offset + rel->r_offset);
8344 value += signed_addend;
8345 if (! h || h->root.type != bfd_link_hash_undefweak)
8346 {
8029a119 8347 /* Check for overflow. */
eb043451
PB		 8348 if ((value ^ (value >> 1)) & (1 << 30))
8349 return bfd_reloc_overflow;
8350 }
8351 value &= 0x7fffffff;
8352 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8353 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8354 value |= 1;
8355 break;
252b5132 8356 }
f21f3fe0 8357
252b5132
RH		 8358 bfd_put_32 (input_bfd, value, hit_data);
8359 return bfd_reloc_ok;
8360
8361 case R_ARM_ABS8:
8362 value += addend;
4e67d4ca
DG		 8363
8364 /* There is no way to tell whether the user intended to use a signed or
8365 unsigned addend. When checking for overflow we accept either,
8366 as specified by the AAELF. */
8367 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8368 return bfd_reloc_overflow;
8369
8370 bfd_put_8 (input_bfd, value, hit_data);
8371 return bfd_reloc_ok;
8372
8373 case R_ARM_ABS16:
8374 value += addend;
8375
4e67d4ca
DG		 8376 /* See comment for R_ARM_ABS8. */
8377 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8378 return bfd_reloc_overflow;
8379
8380 bfd_put_16 (input_bfd, value, hit_data);
8381 return bfd_reloc_ok;
8382
252b5132 8383 case R_ARM_THM_ABS5:
9b485d32 8384 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8385 if (globals->use_rel)
8386 {
8387 /* Need to refetch addend. */
8388 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8389 /* ??? Need to determine shift amount from operand size. */
8390 addend >>= howto->rightshift;
8391 }
252b5132
RH		 8392 value += addend;
8393
8394 /* ??? Isn't value unsigned? */
8395 if ((long) value > 0x1f || (long) value < -0x10)
8396 return bfd_reloc_overflow;
8397
8398 /* ??? Value needs to be properly shifted into place first. */
8399 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8400 bfd_put_16 (input_bfd, value, hit_data);
8401 return bfd_reloc_ok;
8402
2cab6cc3
MS		 8403 case R_ARM_THM_ALU_PREL_11_0:
8404 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8405 {
8406 bfd_vma insn;
8407 bfd_signed_vma relocation;
8408
8409 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8410 | bfd_get_16 (input_bfd, hit_data + 2);
8411
8412 if (globals->use_rel)
8413 {
8414 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8415 | ((insn & (1 << 26)) >> 15);
8416 if (insn & 0xf00000)
8417 signed_addend = -signed_addend;
8418 }
8419
8420 relocation = value + signed_addend;
8421 relocation -= (input_section->output_section->vma
8422 + input_section->output_offset
8423 + rel->r_offset);
8424
8425 value = abs (relocation);
8426
8427 if (value >= 0x1000)
8428 return bfd_reloc_overflow;
8429
8430 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8431 | ((value & 0x700) << 4)
8432 | ((value & 0x800) << 15);
8433 if (relocation < 0)
8434 insn |= 0xa00000;
8435
8436 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8437 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8438
8439 return bfd_reloc_ok;
8440 }
8441
e1ec24c6
NC		 8442 case R_ARM_THM_PC8:
8443 /* PR 10073: This reloc is not generated by the GNU toolchain,
8444 but it is supported for compatibility with third party libraries
8445 generated by other compilers, specifically the ARM/IAR. */
8446 {
8447 bfd_vma insn;
8448 bfd_signed_vma relocation;
8449
8450 insn = bfd_get_16 (input_bfd, hit_data);
8451
8452 if (globals->use_rel)
8453 addend = (insn & 0x00ff) << 2;
8454
8455 relocation = value + addend;
8456 relocation -= (input_section->output_section->vma
8457 + input_section->output_offset
8458 + rel->r_offset);
8459
8460 value = abs (relocation);
8461
8462 /* We do not check for overflow of this reloc. Although strictly
8463 speaking this is incorrect, it appears to be necessary in order
8464 to work with IAR generated relocs. Since GCC and GAS do not
8465 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8466 a problem for them. */
8467 value &= 0x3fc;
8468
8469 insn = (insn & 0xff00) | (value >> 2);
8470
8471 bfd_put_16 (input_bfd, insn, hit_data);
8472
8473 return bfd_reloc_ok;
8474 }
8475
2cab6cc3
MS		 8476 case R_ARM_THM_PC12:
8477 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8478 {
8479 bfd_vma insn;
8480 bfd_signed_vma relocation;
8481
8482 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8483 | bfd_get_16 (input_bfd, hit_data + 2);
8484
8485 if (globals->use_rel)
8486 {
8487 signed_addend = insn & 0xfff;
8488 if (!(insn & (1 << 23)))
8489 signed_addend = -signed_addend;
8490 }
8491
8492 relocation = value + signed_addend;
8493 relocation -= (input_section->output_section->vma
8494 + input_section->output_offset
8495 + rel->r_offset);
8496
8497 value = abs (relocation);
8498
8499 if (value >= 0x1000)
8500 return bfd_reloc_overflow;
8501
8502 insn = (insn & 0xff7ff000) | value;
8503 if (relocation >= 0)
8504 insn |= (1 << 23);
8505
8506 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8507 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8508
8509 return bfd_reloc_ok;
8510 }
8511
dfc5f959 8512 case R_ARM_THM_XPC22:
c19d1205 8513 case R_ARM_THM_CALL:
bd97cb95 8514 case R_ARM_THM_JUMP24:
dfc5f959 8515 /* Thumb BL (branch long instruction). */
252b5132 8516 {
b34976b6 8517 bfd_vma relocation;
e95de063 8518 bfd_vma reloc_sign;
b34976b6
AM		 8519 bfd_boolean overflow = FALSE;
8520 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8521 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8522 bfd_signed_vma reloc_signed_max;
8523 bfd_signed_vma reloc_signed_min;
b34976b6 8524 bfd_vma check;
252b5132 8525 bfd_signed_vma signed_check;
e95de063 8526 int bitsize;
cd1dac3d 8527 const int thumb2 = using_thumb2 (globals);
252b5132 8528
5ab79981 8529 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8530 the next instruction unless a PLT entry will be created.
8531 The jump to the next instruction is optimized as a NOP.W for
8532 Thumb-2 enabled architectures. */
19540007 8533 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8534 && plt_offset == (bfd_vma) -1)
5ab79981 8535 {
cd1dac3d
DG		 8536 if (arch_has_thumb2_nop (globals))
8537 {
8538 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8539 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8540 }
8541 else
8542 {
8543 bfd_put_16 (input_bfd, 0xe000, hit_data);
8544 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8545 }
5ab79981
PB		 8546 return bfd_reloc_ok;
8547 }
8548
e95de063
MS		 8549 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8550 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8551 if (globals->use_rel)
8552 {
e95de063
MS		 8553 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8554 bfd_vma upper = upper_insn & 0x3ff;
8555 bfd_vma lower = lower_insn & 0x7ff;
8556 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8557 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8558 bfd_vma i1 = j1 ^ s ? 0 : 1;
8559 bfd_vma i2 = j2 ^ s ? 0 : 1;
8560
8561 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8562 /* Sign extend. */
8563 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8564
4e7fd91e
PB		 8565 signed_addend = addend;
8566 }
cb1afa5c 8567
dfc5f959
NC		 8568 if (r_type == R_ARM_THM_XPC22)
8569 {
8570 /* Check for Thumb to Thumb call. */
8571 /* FIXME: Should we translate the instruction into a BL
8572 instruction instead ? */
35fc36a8 8573 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8574 (*_bfd_error_handler)
8575 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8576 input_bfd,
8577 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8578 }
8579 else
252b5132 8580 {
dfc5f959
NC		 8581 /* If it is not a call to Thumb, assume call to Arm.
8582 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8583 function call at all, but rather a long jump. Calls through
8584 the PLT do not require stubs. */
34e77a92 8585 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8586 {
bd97cb95 8587 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8588 {
8589 /* Convert BL to BLX. */
8590 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8591 }
155d87d7
CL		 8592 else if (( r_type != R_ARM_THM_CALL)
8593 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8594 {
8595 if (elf32_thumb_to_arm_stub
8596 (info, sym_name, input_bfd, output_bfd, input_section,
8597 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8598 error_message))
8599 return bfd_reloc_ok;
8600 else
8601 return bfd_reloc_dangerous;
8602 }
da5938a2 8603 }
35fc36a8
RS		 8604 else if (branch_type == ST_BRANCH_TO_THUMB
8605 && globals->use_blx
bd97cb95 8606 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8607 {
8608 /* Make sure this is a BL. */
8609 lower_insn |= 0x1800;
8610 }
252b5132 8611 }
f21f3fe0 8612
fe33d2fa 8613 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8614 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8615 {
8616 /* Check if a stub has to be inserted because the destination
8029a119 8617 is too far. */
fe33d2fa
CL		 8618 struct elf32_arm_stub_hash_entry *stub_entry;
8619 struct elf32_arm_link_hash_entry *hash;
8620
8621 hash = (struct elf32_arm_link_hash_entry *) h;
8622
8623 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8624 st_type, &branch_type,
8625 hash, value, sym_sec,
fe33d2fa
CL		 8626 input_bfd, sym_name);
8627
8628 if (stub_type != arm_stub_none)
906e58ca
NC		 8629 {
8630 /* The target is out of reach or we are changing modes, so
8631 redirect the branch to the local stub for this
8632 function. */
8633 stub_entry = elf32_arm_get_stub_entry (input_section,
8634 sym_sec, h,
fe33d2fa
CL		 8635 rel, globals,
8636 stub_type);
906e58ca
NC		 8637 if (stub_entry != NULL)
8638 value = (stub_entry->stub_offset
8639 + stub_entry->stub_sec->output_offset
8640 + stub_entry->stub_sec->output_section->vma);
8641
f4ac8484 8642 /* If this call becomes a call to Arm, force BLX. */
155d87d7 8643 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 8644 {
8645 if ((stub_entry
8646 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 8647 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 8648 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8649 }
906e58ca
NC		 8650 }
8651 }
8652
fe33d2fa 8653 /* Handle calls via the PLT. */
34e77a92 8654 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8655 {
8656 value = (splt->output_section->vma
8657 + splt->output_offset
34e77a92 8658 + plt_offset);
fe33d2fa
CL		 8659
8660 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8661 {
8662 /* If the Thumb BLX instruction is available, convert
8663 the BL to a BLX instruction to call the ARM-mode
8664 PLT entry. */
8665 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8666 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8667 }
8668 else
8669 {
8670 /* Target the Thumb stub before the ARM PLT entry. */
8671 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8672 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8673 }
8674 *unresolved_reloc_p = FALSE;
8675 }
8676
ba96a88f 8677 relocation = value + signed_addend;
f21f3fe0 8678
252b5132 8679 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8680 + input_section->output_offset
8681 + rel->r_offset);
9a5aca8c 8682
252b5132
RH		 8683 check = relocation >> howto->rightshift;
8684
8685 /* If this is a signed value, the rightshift just dropped
8686 leading 1 bits (assuming twos complement). */
8687 if ((bfd_signed_vma) relocation >= 0)
8688 signed_check = check;
8689 else
8690 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8691
e95de063
MS		 8692 /* Calculate the permissable maximum and minimum values for
8693 this relocation according to whether we're relocating for
8694 Thumb-2 or not. */
8695 bitsize = howto->bitsize;
8696 if (!thumb2)
8697 bitsize -= 2;
f6ebfac0 8698 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8699 reloc_signed_min = ~reloc_signed_max;
8700
252b5132 8701 /* Assumes two's complement. */
ba96a88f 8702 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8703 overflow = TRUE;
252b5132 8704
bd97cb95 8705 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8706 /* For a BLX instruction, make sure that the relocation is rounded up
8707 to a word boundary. This follows the semantics of the instruction
8708 which specifies that bit 1 of the target address will come from bit
8709 1 of the base address. */
8710 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8711
e95de063
MS		 8712 /* Put RELOCATION back into the insn. Assumes two's complement.
8713 We use the Thumb-2 encoding, which is safe even if dealing with
8714 a Thumb-1 instruction by virtue of our overflow check above. */
8715 reloc_sign = (signed_check < 0) ? 1 : 0;
8716 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8717 | ((relocation >> 12) & 0x3ff)
8718 | (reloc_sign << 10);
906e58ca 8719 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 8720 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8721 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8722 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8723
252b5132
RH		 8724 /* Put the relocated value back in the object file: */
8725 bfd_put_16 (input_bfd, upper_insn, hit_data);
8726 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8727
8728 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8729 }
8730 break;
8731
c19d1205
ZW		 8732 case R_ARM_THM_JUMP19:
8733 /* Thumb32 conditional branch instruction. */
8734 {
8735 bfd_vma relocation;
8736 bfd_boolean overflow = FALSE;
8737 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8738 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8739 bfd_signed_vma reloc_signed_max = 0xffffe;
8740 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8741 bfd_signed_vma signed_check;
8742
8743 /* Need to refetch the addend, reconstruct the top three bits,
8744 and squish the two 11 bit pieces together. */
8745 if (globals->use_rel)
8746 {
8747 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 8748 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 8749 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8750 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8751 bfd_vma lower = (lower_insn & 0x07ff);
8752
a00a1f35
MS		 8753 upper |= J1 << 6;
8754 upper |= J2 << 7;
8755 upper |= (!S) << 8;
c19d1205
ZW		 8756 upper -= 0x0100; /* Sign extend. */
8757
8758 addend = (upper << 12) | (lower << 1);
8759 signed_addend = addend;
8760 }
8761
bd97cb95 8762 /* Handle calls via the PLT. */
34e77a92 8763 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 8764 {
8765 value = (splt->output_section->vma
8766 + splt->output_offset
34e77a92 8767 + plt_offset);
bd97cb95
DJ		 8768 /* Target the Thumb stub before the ARM PLT entry. */
8769 value -= PLT_THUMB_STUB_SIZE;
8770 *unresolved_reloc_p = FALSE;
8771 }
8772
c19d1205
ZW		 8773 /* ??? Should handle interworking? GCC might someday try to
8774 use this for tail calls. */
8775
8776 relocation = value + signed_addend;
8777 relocation -= (input_section->output_section->vma
8778 + input_section->output_offset
8779 + rel->r_offset);
a00a1f35 8780 signed_check = (bfd_signed_vma) relocation;
c19d1205 8781
c19d1205
ZW		 8782 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8783 overflow = TRUE;
8784
8785 /* Put RELOCATION back into the insn. */
8786 {
8787 bfd_vma S = (relocation & 0x00100000) >> 20;
8788 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8789 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8790 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8791 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8792
a00a1f35 8793 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 8794 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8795 }
8796
8797 /* Put the relocated value back in the object file: */
8798 bfd_put_16 (input_bfd, upper_insn, hit_data);
8799 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8800
8801 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8802 }
8803
8804 case R_ARM_THM_JUMP11:
8805 case R_ARM_THM_JUMP8:
8806 case R_ARM_THM_JUMP6:
51c5503b
NC		 8807 /* Thumb B (branch) instruction). */
8808 {
6cf9e9fe 8809 bfd_signed_vma relocation;
51c5503b
NC		 8810 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
8811 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 8812 bfd_signed_vma signed_check;
8813
c19d1205
ZW		 8814 /* CZB cannot jump backward. */
8815 if (r_type == R_ARM_THM_JUMP6)
8816 reloc_signed_min = 0;
8817
4e7fd91e 8818 if (globals->use_rel)
6cf9e9fe 8819 {
4e7fd91e
PB		 8820 /* Need to refetch addend. */
8821 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8822 if (addend & ((howto->src_mask + 1) >> 1))
8823 {
8824 signed_addend = -1;
8825 signed_addend &= ~ howto->src_mask;
8826 signed_addend |= addend;
8827 }
8828 else
8829 signed_addend = addend;
8830 /* The value in the insn has been right shifted. We need to
8831 undo this, so that we can perform the address calculation
8832 in terms of bytes. */
8833 signed_addend <<= howto->rightshift;
6cf9e9fe 8834 }
6cf9e9fe 8835 relocation = value + signed_addend;
51c5503b
NC		 8836
8837 relocation -= (input_section->output_section->vma
8838 + input_section->output_offset
8839 + rel->r_offset);
8840
6cf9e9fe
NC		 8841 relocation >>= howto->rightshift;
8842 signed_check = relocation;
c19d1205
ZW		 8843
8844 if (r_type == R_ARM_THM_JUMP6)
8845 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
8846 else
8847 relocation &= howto->dst_mask;
51c5503b 8848 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 8849
51c5503b
NC		 8850 bfd_put_16 (input_bfd, relocation, hit_data);
8851
8852 /* Assumes two's complement. */
8853 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8854 return bfd_reloc_overflow;
8855
8856 return bfd_reloc_ok;
8857 }
cedb70c5 8858
8375c36b
PB		 8859 case R_ARM_ALU_PCREL7_0:
8860 case R_ARM_ALU_PCREL15_8:
8861 case R_ARM_ALU_PCREL23_15:
8862 {
8863 bfd_vma insn;
8864 bfd_vma relocation;
8865
8866 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 8867 if (globals->use_rel)
8868 {
8869 /* Extract the addend. */
8870 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
8871 signed_addend = addend;
8872 }
8375c36b
PB		 8873 relocation = value + signed_addend;
8874
8875 relocation -= (input_section->output_section->vma
8876 + input_section->output_offset
8877 + rel->r_offset);
8878 insn = (insn & ~0xfff)
8879 | ((howto->bitpos << 7) & 0xf00)
8880 | ((relocation >> howto->bitpos) & 0xff);
8881 bfd_put_32 (input_bfd, value, hit_data);
8882 }
8883 return bfd_reloc_ok;
8884
252b5132
RH		 8885 case R_ARM_GNU_VTINHERIT:
8886 case R_ARM_GNU_VTENTRY:
8887 return bfd_reloc_ok;
8888
c19d1205 8889 case R_ARM_GOTOFF32:
252b5132
RH		 8890 /* Relocation is relative to the start of the
8891 global offset table. */
8892
8893 BFD_ASSERT (sgot != NULL);
8894 if (sgot == NULL)
8895 return bfd_reloc_notsupported;
9a5aca8c 8896
cedb70c5 8897 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 8898 address by one, so that attempts to call the function pointer will
8899 correctly interpret it as Thumb code. */
35fc36a8 8900 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 8901 value += 1;
8902
252b5132
RH		 8903 /* Note that sgot->output_offset is not involved in this
8904 calculation. We always want the start of .got. If we
8905 define _GLOBAL_OFFSET_TABLE in a different way, as is
8906 permitted by the ABI, we might have to change this
9b485d32 8907 calculation. */
252b5132 8908 value -= sgot->output_section->vma;
f21f3fe0 8909 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8910 contents, rel->r_offset, value,
00a97672 8911 rel->r_addend);
252b5132
RH		 8912
8913 case R_ARM_GOTPC:
a7c10850 8914 /* Use global offset table as symbol value. */
252b5132 8915 BFD_ASSERT (sgot != NULL);
f21f3fe0 8916
252b5132
RH		 8917 if (sgot == NULL)
8918 return bfd_reloc_notsupported;
8919
0945cdfd 8920 *unresolved_reloc_p = FALSE;
252b5132 8921 value = sgot->output_section->vma;
f21f3fe0 8922 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8923 contents, rel->r_offset, value,
00a97672 8924 rel->r_addend);
f21f3fe0 8925
252b5132 8926 case R_ARM_GOT32:
eb043451 8927 case R_ARM_GOT_PREL:
252b5132 8928 /* Relocation is to the entry for this symbol in the
9b485d32 8929 global offset table. */
252b5132
RH		 8930 if (sgot == NULL)
8931 return bfd_reloc_notsupported;
f21f3fe0 8932
34e77a92
RS		 8933 if (dynreloc_st_type == STT_GNU_IFUNC
8934 && plt_offset != (bfd_vma) -1
8935 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
8936 {
8937 /* We have a relocation against a locally-binding STT_GNU_IFUNC
8938 symbol, and the relocation resolves directly to the runtime
8939 target rather than to the .iplt entry. This means that any
8940 .got entry would be the same value as the .igot.plt entry,
8941 so there's no point creating both. */
8942 sgot = globals->root.igotplt;
8943 value = sgot->output_offset + gotplt_offset;
8944 }
8945 else if (h != NULL)
252b5132
RH		 8946 {
8947 bfd_vma off;
f21f3fe0 8948
252b5132
RH		 8949 off = h->got.offset;
8950 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 8951 if ((off & 1) != 0)
252b5132 8952 {
b436d854
RS		 8953 /* We have already processsed one GOT relocation against
8954 this symbol. */
8955 off &= ~1;
8956 if (globals->root.dynamic_sections_created
8957 && !SYMBOL_REFERENCES_LOCAL (info, h))
8958 *unresolved_reloc_p = FALSE;
8959 }
8960 else
8961 {
8962 Elf_Internal_Rela outrel;
8963
8964 if (!SYMBOL_REFERENCES_LOCAL (info, h))
8965 {
8966 /* If the symbol doesn't resolve locally in a static
8967 object, we have an undefined reference. If the
8968 symbol doesn't resolve locally in a dynamic object,
8969 it should be resolved by the dynamic linker. */
8970 if (globals->root.dynamic_sections_created)
8971 {
8972 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
8973 *unresolved_reloc_p = FALSE;
8974 }
8975 else
8976 outrel.r_info = 0;
8977 outrel.r_addend = 0;
8978 }
252b5132
RH		 8979 else
8980 {
34e77a92
RS		 8981 if (dynreloc_st_type == STT_GNU_IFUNC)
8982 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
8983 else if (info->shared)
8984 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
8985 else
8986 outrel.r_info = 0;
8987 outrel.r_addend = dynreloc_value;
b436d854 8988 }
ee29b9fb 8989
b436d854
RS		 8990 /* The GOT entry is initialized to zero by default.
8991 See if we should install a different value. */
8992 if (outrel.r_addend != 0
8993 && (outrel.r_info == 0 || globals->use_rel))
8994 {
8995 bfd_put_32 (output_bfd, outrel.r_addend,
8996 sgot->contents + off);
8997 outrel.r_addend = 0;
252b5132 8998 }
f21f3fe0 8999
b436d854
RS		 9000 if (outrel.r_info != 0)
9001 {
9002 outrel.r_offset = (sgot->output_section->vma
9003 + sgot->output_offset
9004 + off);
9005 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9006 }
9007 h->got.offset |= 1;
9008 }
252b5132
RH		 9009 value = sgot->output_offset + off;
9010 }
9011 else
9012 {
9013 bfd_vma off;
f21f3fe0 9014
252b5132
RH		 9015 BFD_ASSERT (local_got_offsets != NULL &&
9016 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9017
252b5132 9018 off = local_got_offsets[r_symndx];
f21f3fe0 9019
252b5132
RH		 9020 /* The offset must always be a multiple of 4. We use the
9021 least significant bit to record whether we have already
9b485d32 9022 generated the necessary reloc. */
252b5132
RH		 9023 if ((off & 1) != 0)
9024 off &= ~1;
9025 else
9026 {
00a97672 9027 if (globals->use_rel)
34e77a92 9028 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9029
34e77a92 9030 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9031 {
947216bf 9032 Elf_Internal_Rela outrel;
f21f3fe0 9033
34e77a92 9034 outrel.r_addend = addend + dynreloc_value;
252b5132 9035 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9036 + sgot->output_offset
252b5132 9037 + off);
34e77a92
RS		 9038 if (dynreloc_st_type == STT_GNU_IFUNC)
9039 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9040 else
9041 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9042 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9043 }
f21f3fe0 9044
252b5132
RH		 9045 local_got_offsets[r_symndx] |= 1;
9046 }
f21f3fe0 9047
252b5132
RH		 9048 value = sgot->output_offset + off;
9049 }
eb043451
PB		 9050 if (r_type != R_ARM_GOT32)
9051 value += sgot->output_section->vma;
9a5aca8c 9052
f21f3fe0 9053 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9054 contents, rel->r_offset, value,
00a97672 9055 rel->r_addend);
f21f3fe0 9056
ba93b8ac
DJ		 9057 case R_ARM_TLS_LDO32:
9058 value = value - dtpoff_base (info);
9059
9060 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9061 contents, rel->r_offset, value,
9062 rel->r_addend);
ba93b8ac
DJ		 9063
9064 case R_ARM_TLS_LDM32:
9065 {
9066 bfd_vma off;
9067
362d30a1 9068 if (sgot == NULL)
ba93b8ac
DJ		 9069 abort ();
9070
9071 off = globals->tls_ldm_got.offset;
9072
9073 if ((off & 1) != 0)
9074 off &= ~1;
9075 else
9076 {
9077 /* If we don't know the module number, create a relocation
9078 for it. */
9079 if (info->shared)
9080 {
9081 Elf_Internal_Rela outrel;
ba93b8ac 9082
362d30a1 9083 if (srelgot == NULL)
ba93b8ac
DJ		 9084 abort ();
9085
00a97672 9086 outrel.r_addend = 0;
362d30a1
RS		 9087 outrel.r_offset = (sgot->output_section->vma
9088 + sgot->output_offset + off);
ba93b8ac
DJ		 9089 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9090
00a97672
RS		 9091 if (globals->use_rel)
9092 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9093 sgot->contents + off);
ba93b8ac 9094
47beaa6a 9095 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9096 }
9097 else
362d30a1 9098 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9099
9100 globals->tls_ldm_got.offset |= 1;
9101 }
9102
362d30a1 9103 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9104 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9105
9106 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9107 contents, rel->r_offset, value,
00a97672 9108 rel->r_addend);
ba93b8ac
DJ		 9109 }
9110
0855e32b
NS		 9111 case R_ARM_TLS_CALL:
9112 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9113 case R_ARM_TLS_GD32:
9114 case R_ARM_TLS_IE32:
0855e32b
NS		 9115 case R_ARM_TLS_GOTDESC:
9116 case R_ARM_TLS_DESCSEQ:
9117 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9118 {
0855e32b
NS		 9119 bfd_vma off, offplt;
9120 int indx = 0;
ba93b8ac
DJ		 9121 char tls_type;
9122
0855e32b 9123 BFD_ASSERT (sgot != NULL);
ba93b8ac 9124
ba93b8ac
DJ		 9125 if (h != NULL)
9126 {
9127 bfd_boolean dyn;
9128 dyn = globals->root.dynamic_sections_created;
9129 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9130 && (!info->shared
9131 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9132 {
9133 *unresolved_reloc_p = FALSE;
9134 indx = h->dynindx;
9135 }
9136 off = h->got.offset;
0855e32b 9137 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9138 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9139 }
9140 else
9141 {
0855e32b 9142 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9143 off = local_got_offsets[r_symndx];
0855e32b 9144 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9145 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9146 }
9147
0855e32b
NS		 9148 /* Linker relaxations happens from one of the
9149 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9150 if (ELF32_R_TYPE(rel->r_info) != r_type)
9151 tls_type = GOT_TLS_IE;
9152
9153 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9154
9155 if ((off & 1) != 0)
9156 off &= ~1;
9157 else
9158 {
9159 bfd_boolean need_relocs = FALSE;
9160 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9161 int cur_off = off;
9162
9163 /* The GOT entries have not been initialized yet. Do it
9164 now, and emit any relocations. If both an IE GOT and a
9165 GD GOT are necessary, we emit the GD first. */
9166
9167 if ((info->shared || indx != 0)
9168 && (h == NULL
9169 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9170 || h->root.type != bfd_link_hash_undefweak))
9171 {
9172 need_relocs = TRUE;
0855e32b 9173 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9174 }
9175
0855e32b
NS		 9176 if (tls_type & GOT_TLS_GDESC)
9177 {
47beaa6a
RS		 9178 bfd_byte *loc;
9179
0855e32b
NS		 9180 /* We should have relaxed, unless this is an undefined
9181 weak symbol. */
9182 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9183 || info->shared);
9184 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9185 <= globals->root.sgotplt->size);
9186
9187 outrel.r_addend = 0;
9188 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9189 + globals->root.sgotplt->output_offset
9190 + offplt
9191 + globals->sgotplt_jump_table_size);
9192
9193 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9194 sreloc = globals->root.srelplt;
9195 loc = sreloc->contents;
9196 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9197 BFD_ASSERT (loc + RELOC_SIZE (globals)
9198 <= sreloc->contents + sreloc->size);
9199
9200 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9201
9202 /* For globals, the first word in the relocation gets
9203 the relocation index and the top bit set, or zero,
9204 if we're binding now. For locals, it gets the
9205 symbol's offset in the tls section. */
9206 bfd_put_32 (output_bfd,
9207 !h ? value - elf_hash_table (info)->tls_sec->vma
9208 : info->flags & DF_BIND_NOW ? 0
9209 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9210 globals->root.sgotplt->contents + offplt +
9211 globals->sgotplt_jump_table_size);
9212
9213 /* Second word in the relocation is always zero. */
9214 bfd_put_32 (output_bfd, 0,
9215 globals->root.sgotplt->contents + offplt +
9216 globals->sgotplt_jump_table_size + 4);
9217 }
ba93b8ac
DJ		 9218 if (tls_type & GOT_TLS_GD)
9219 {
9220 if (need_relocs)
9221 {
00a97672 9222 outrel.r_addend = 0;
362d30a1
RS		 9223 outrel.r_offset = (sgot->output_section->vma
9224 + sgot->output_offset
00a97672 9225 + cur_off);
ba93b8ac 9226 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9227
00a97672
RS		 9228 if (globals->use_rel)
9229 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9230 sgot->contents + cur_off);
00a97672 9231
47beaa6a 9232 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9233
9234 if (indx == 0)
9235 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9236 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9237 else
9238 {
00a97672 9239 outrel.r_addend = 0;
ba93b8ac
DJ		 9240 outrel.r_info = ELF32_R_INFO (indx,
9241 R_ARM_TLS_DTPOFF32);
9242 outrel.r_offset += 4;
00a97672
RS		 9243
9244 if (globals->use_rel)
9245 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9246 sgot->contents + cur_off + 4);
00a97672 9247
47beaa6a
RS		 9248 elf32_arm_add_dynreloc (output_bfd, info,
9249 srelgot, &outrel);
ba93b8ac
DJ		 9250 }
9251 }
9252 else
9253 {
9254 /* If we are not emitting relocations for a
9255 general dynamic reference, then we must be in a
9256 static link or an executable link with the
9257 symbol binding locally. Mark it as belonging
9258 to module 1, the executable. */
9259 bfd_put_32 (output_bfd, 1,
362d30a1 9260 sgot->contents + cur_off);
ba93b8ac 9261 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9262 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9263 }
9264
9265 cur_off += 8;
9266 }
9267
9268 if (tls_type & GOT_TLS_IE)
9269 {
9270 if (need_relocs)
9271 {
00a97672
RS		 9272 if (indx == 0)
9273 outrel.r_addend = value - dtpoff_base (info);
9274 else
9275 outrel.r_addend = 0;
362d30a1
RS		 9276 outrel.r_offset = (sgot->output_section->vma
9277 + sgot->output_offset
ba93b8ac
DJ		 9278 + cur_off);
9279 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9280
00a97672
RS		 9281 if (globals->use_rel)
9282 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9283 sgot->contents + cur_off);
ba93b8ac 9284
47beaa6a 9285 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9286 }
9287 else
9288 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9289 sgot->contents + cur_off);
ba93b8ac
DJ		 9290 cur_off += 4;
9291 }
9292
9293 if (h != NULL)
9294 h->got.offset |= 1;
9295 else
9296 local_got_offsets[r_symndx] |= 1;
9297 }
9298
9299 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9300 off += 8;
0855e32b
NS		 9301 else if (tls_type & GOT_TLS_GDESC)
9302 off = offplt;
9303
9304 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9305 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9306 {
9307 bfd_signed_vma offset;
12352d3f
PB		 9308 /* TLS stubs are arm mode. The original symbol is a
9309 data object, so branch_type is bogus. */
9310 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9311 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9312 = arm_type_of_stub (info, input_section, rel,
9313 st_type, &branch_type,
0855e32b
NS		 9314 (struct elf32_arm_link_hash_entry *)h,
9315 globals->tls_trampoline, globals->root.splt,
9316 input_bfd, sym_name);
9317
9318 if (stub_type != arm_stub_none)
9319 {
9320 struct elf32_arm_stub_hash_entry *stub_entry
9321 = elf32_arm_get_stub_entry
9322 (input_section, globals->root.splt, 0, rel,
9323 globals, stub_type);
9324 offset = (stub_entry->stub_offset
9325 + stub_entry->stub_sec->output_offset
9326 + stub_entry->stub_sec->output_section->vma);
9327 }
9328 else
9329 offset = (globals->root.splt->output_section->vma
9330 + globals->root.splt->output_offset
9331 + globals->tls_trampoline);
9332
9333 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9334 {
9335 unsigned long inst;
9336
9337 offset -= (input_section->output_section->vma +
9338 input_section->output_offset + rel->r_offset + 8);
9339
9340 inst = offset >> 2;
9341 inst &= 0x00ffffff;
9342 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9343 }
9344 else
9345 {
9346 /* Thumb blx encodes the offset in a complicated
9347 fashion. */
9348 unsigned upper_insn, lower_insn;
9349 unsigned neg;
9350
9351 offset -= (input_section->output_section->vma +
9352 input_section->output_offset
9353 + rel->r_offset + 4);
9354
12352d3f
PB		 9355 if (stub_type != arm_stub_none
9356 && arm_stub_is_thumb (stub_type))
9357 {
9358 lower_insn = 0xd000;
9359 }
9360 else
9361 {
9362 lower_insn = 0xc000;
9363 /* Round up the offset to a word boundary */
9364 offset = (offset + 2) & ~2;
9365 }
9366
0855e32b
NS		 9367 neg = offset < 0;
9368 upper_insn = (0xf000
9369 | ((offset >> 12) & 0x3ff)
9370 | (neg << 10));
12352d3f 9371 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9372 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9373 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9374 bfd_put_16 (input_bfd, upper_insn, hit_data);
9375 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9376 return bfd_reloc_ok;
9377 }
9378 }
9379 /* These relocations needs special care, as besides the fact
9380 they point somewhere in .gotplt, the addend must be
9381 adjusted accordingly depending on the type of instruction
9382 we refer to */
9383 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9384 {
9385 unsigned long data, insn;
9386 unsigned thumb;
9387
9388 data = bfd_get_32 (input_bfd, hit_data);
9389 thumb = data & 1;
9390 data &= ~1u;
9391
9392 if (thumb)
9393 {
9394 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9395 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9396 insn = (insn << 16)
9397 | bfd_get_16 (input_bfd,
9398 contents + rel->r_offset - data + 2);
9399 if ((insn & 0xf800c000) == 0xf000c000)
9400 /* bl/blx */
9401 value = -6;
9402 else if ((insn & 0xffffff00) == 0x4400)
9403 /* add */
9404 value = -5;
9405 else
9406 {
9407 (*_bfd_error_handler)
9408 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9409 input_bfd, input_section,
9410 (unsigned long)rel->r_offset, insn);
9411 return bfd_reloc_notsupported;
9412 }
9413 }
9414 else
9415 {
9416 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9417
9418 switch (insn >> 24)
9419 {
9420 case 0xeb: /* bl */
9421 case 0xfa: /* blx */
9422 value = -4;
9423 break;
9424
9425 case 0xe0: /* add */
9426 value = -8;
9427 break;
9428
9429 default:
9430 (*_bfd_error_handler)
9431 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9432 input_bfd, input_section,
9433 (unsigned long)rel->r_offset, insn);
9434 return bfd_reloc_notsupported;
9435 }
9436 }
9437
9438 value += ((globals->root.sgotplt->output_section->vma
9439 + globals->root.sgotplt->output_offset + off)
9440 - (input_section->output_section->vma
9441 + input_section->output_offset
9442 + rel->r_offset)
9443 + globals->sgotplt_jump_table_size);
9444 }
9445 else
9446 value = ((globals->root.sgot->output_section->vma
9447 + globals->root.sgot->output_offset + off)
9448 - (input_section->output_section->vma
9449 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9450
9451 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9452 contents, rel->r_offset, value,
00a97672 9453 rel->r_addend);
ba93b8ac
DJ		 9454 }
9455
9456 case R_ARM_TLS_LE32:
9457 if (info->shared)
9458 {
9459 (*_bfd_error_handler)
9460 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9461 input_bfd, input_section,
9462 (long) rel->r_offset, howto->name);
21d799b5 9463 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 9464 }
9465 else
9466 value = tpoff (info, value);
906e58ca 9467
ba93b8ac 9468 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9469 contents, rel->r_offset, value,
9470 rel->r_addend);
ba93b8ac 9471
319850b4
JB		 9472 case R_ARM_V4BX:
9473 if (globals->fix_v4bx)
845b51d6
PB		 9474 {
9475 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9476
845b51d6
PB		 9477 /* Ensure that we have a BX instruction. */
9478 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9479
845b51d6
PB		 9480 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9481 {
9482 /* Branch to veneer. */
9483 bfd_vma glue_addr;
9484 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9485 glue_addr -= input_section->output_section->vma
9486 + input_section->output_offset
9487 + rel->r_offset + 8;
9488 insn = (insn & 0xf0000000) | 0x0a000000
9489 | ((glue_addr >> 2) & 0x00ffffff);
9490 }
9491 else
9492 {
9493 /* Preserve Rm (lowest four bits) and the condition code
9494 (highest four bits). Other bits encode MOV PC,Rm. */
9495 insn = (insn & 0xf000000f) | 0x01a0f000;
9496 }
319850b4 9497
845b51d6
PB		 9498 bfd_put_32 (input_bfd, insn, hit_data);
9499 }
319850b4
JB		 9500 return bfd_reloc_ok;
9501
b6895b4f
PB		 9502 case R_ARM_MOVW_ABS_NC:
9503 case R_ARM_MOVT_ABS:
9504 case R_ARM_MOVW_PREL_NC:
9505 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9506 /* Until we properly support segment-base-relative addressing then
9507 we assume the segment base to be zero, as for the group relocations.
9508 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9509 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9510 case R_ARM_MOVW_BREL_NC:
9511 case R_ARM_MOVW_BREL:
9512 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9513 {
9514 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9515
9516 if (globals->use_rel)
9517 {
9518 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9519 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9520 }
92f5d02b 9521
b6895b4f 9522 value += signed_addend;
b6895b4f
PB		 9523
9524 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9525 value -= (input_section->output_section->vma
9526 + input_section->output_offset + rel->r_offset);
9527
92f5d02b
MS		 9528 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9529 return bfd_reloc_overflow;
9530
35fc36a8 9531 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9532 value |= 1;
9533
9534 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9535 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9536 value >>= 16;
9537
9538 insn &= 0xfff0f000;
9539 insn |= value & 0xfff;
9540 insn |= (value & 0xf000) << 4;
9541 bfd_put_32 (input_bfd, insn, hit_data);
9542 }
9543 return bfd_reloc_ok;
9544
9545 case R_ARM_THM_MOVW_ABS_NC:
9546 case R_ARM_THM_MOVT_ABS:
9547 case R_ARM_THM_MOVW_PREL_NC:
9548 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9549 /* Until we properly support segment-base-relative addressing then
9550 we assume the segment base to be zero, as for the above relocations.
9551 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9552 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9553 as R_ARM_THM_MOVT_ABS. */
9554 case R_ARM_THM_MOVW_BREL_NC:
9555 case R_ARM_THM_MOVW_BREL:
9556 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9557 {
9558 bfd_vma insn;
906e58ca 9559
b6895b4f
PB		 9560 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9561 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9562
9563 if (globals->use_rel)
9564 {
9565 addend = ((insn >> 4) & 0xf000)
9566 | ((insn >> 15) & 0x0800)
9567 | ((insn >> 4) & 0x0700)
9568 | (insn & 0x00ff);
39623e12 9569 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9570 }
92f5d02b 9571
b6895b4f 9572 value += signed_addend;
b6895b4f
PB		 9573
9574 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9575 value -= (input_section->output_section->vma
9576 + input_section->output_offset + rel->r_offset);
9577
92f5d02b
MS		 9578 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9579 return bfd_reloc_overflow;
9580
35fc36a8 9581 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9582 value |= 1;
9583
9584 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9585 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9586 value >>= 16;
9587
9588 insn &= 0xfbf08f00;
9589 insn |= (value & 0xf000) << 4;
9590 insn |= (value & 0x0800) << 15;
9591 insn |= (value & 0x0700) << 4;
9592 insn |= (value & 0x00ff);
9593
9594 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9595 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9596 }
9597 return bfd_reloc_ok;
9598
4962c51a
MS		 9599 case R_ARM_ALU_PC_G0_NC:
9600 case R_ARM_ALU_PC_G1_NC:
9601 case R_ARM_ALU_PC_G0:
9602 case R_ARM_ALU_PC_G1:
9603 case R_ARM_ALU_PC_G2:
9604 case R_ARM_ALU_SB_G0_NC:
9605 case R_ARM_ALU_SB_G1_NC:
9606 case R_ARM_ALU_SB_G0:
9607 case R_ARM_ALU_SB_G1:
9608 case R_ARM_ALU_SB_G2:
9609 {
9610 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9611 bfd_vma pc = input_section->output_section->vma
9612 + input_section->output_offset + rel->r_offset;
9613 /* sb should be the origin of the *segment* containing the symbol.
9614 It is not clear how to obtain this OS-dependent value, so we
9615 make an arbitrary choice of zero. */
9616 bfd_vma sb = 0;
9617 bfd_vma residual;
9618 bfd_vma g_n;
9619 bfd_signed_vma signed_value;
9620 int group = 0;
9621
9622 /* Determine which group of bits to select. */
9623 switch (r_type)
9624 {
9625 case R_ARM_ALU_PC_G0_NC:
9626 case R_ARM_ALU_PC_G0:
9627 case R_ARM_ALU_SB_G0_NC:
9628 case R_ARM_ALU_SB_G0:
9629 group = 0;
9630 break;
9631
9632 case R_ARM_ALU_PC_G1_NC:
9633 case R_ARM_ALU_PC_G1:
9634 case R_ARM_ALU_SB_G1_NC:
9635 case R_ARM_ALU_SB_G1:
9636 group = 1;
9637 break;
9638
9639 case R_ARM_ALU_PC_G2:
9640 case R_ARM_ALU_SB_G2:
9641 group = 2;
9642 break;
9643
9644 default:
906e58ca 9645 abort ();
4962c51a
MS		 9646 }
9647
9648 /* If REL, extract the addend from the insn. If RELA, it will
9649 have already been fetched for us. */
9650 if (globals->use_rel)
9651 {
9652 int negative;
9653 bfd_vma constant = insn & 0xff;
9654 bfd_vma rotation = (insn & 0xf00) >> 8;
9655
9656 if (rotation == 0)
9657 signed_addend = constant;
9658 else
9659 {
9660 /* Compensate for the fact that in the instruction, the
9661 rotation is stored in multiples of 2 bits. */
9662 rotation *= 2;
9663
9664 /* Rotate "constant" right by "rotation" bits. */
9665 signed_addend = (constant >> rotation) |
9666 (constant << (8 * sizeof (bfd_vma) - rotation));
9667 }
9668
9669 /* Determine if the instruction is an ADD or a SUB.
9670 (For REL, this determines the sign of the addend.) */
9671 negative = identify_add_or_sub (insn);
9672 if (negative == 0)
9673 {
9674 (*_bfd_error_handler)
9675 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9676 input_bfd, input_section,
9677 (long) rel->r_offset, howto->name);
906e58ca 9678 return bfd_reloc_overflow;
4962c51a
MS		 9679 }
9680
9681 signed_addend *= negative;
9682 }
9683
9684 /* Compute the value (X) to go in the place. */
9685 if (r_type == R_ARM_ALU_PC_G0_NC
9686 || r_type == R_ARM_ALU_PC_G1_NC
9687 || r_type == R_ARM_ALU_PC_G0
9688 || r_type == R_ARM_ALU_PC_G1
9689 || r_type == R_ARM_ALU_PC_G2)
9690 /* PC relative. */
9691 signed_value = value - pc + signed_addend;
9692 else
9693 /* Section base relative. */
9694 signed_value = value - sb + signed_addend;
9695
9696 /* If the target symbol is a Thumb function, then set the
9697 Thumb bit in the address. */
35fc36a8 9698 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 9699 signed_value |= 1;
9700
9701 /* Calculate the value of the relevant G_n, in encoded
9702 constant-with-rotation format. */
9703 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9704 &residual);
9705
9706 /* Check for overflow if required. */
9707 if ((r_type == R_ARM_ALU_PC_G0
9708 || r_type == R_ARM_ALU_PC_G1
9709 || r_type == R_ARM_ALU_PC_G2
9710 || r_type == R_ARM_ALU_SB_G0
9711 || r_type == R_ARM_ALU_SB_G1
9712 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9713 {
9714 (*_bfd_error_handler)
9715 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9716 input_bfd, input_section,
9717 (long) rel->r_offset, abs (signed_value), howto->name);
9718 return bfd_reloc_overflow;
9719 }
9720
9721 /* Mask out the value and the ADD/SUB part of the opcode; take care
9722 not to destroy the S bit. */
9723 insn &= 0xff1ff000;
9724
9725 /* Set the opcode according to whether the value to go in the
9726 place is negative. */
9727 if (signed_value < 0)
9728 insn |= 1 << 22;
9729 else
9730 insn |= 1 << 23;
9731
9732 /* Encode the offset. */
9733 insn |= g_n;
9734
9735 bfd_put_32 (input_bfd, insn, hit_data);
9736 }
9737 return bfd_reloc_ok;
9738
9739 case R_ARM_LDR_PC_G0:
9740 case R_ARM_LDR_PC_G1:
9741 case R_ARM_LDR_PC_G2:
9742 case R_ARM_LDR_SB_G0:
9743 case R_ARM_LDR_SB_G1:
9744 case R_ARM_LDR_SB_G2:
9745 {
9746 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9747 bfd_vma pc = input_section->output_section->vma
9748 + input_section->output_offset + rel->r_offset;
9749 bfd_vma sb = 0; /* See note above. */
9750 bfd_vma residual;
9751 bfd_signed_vma signed_value;
9752 int group = 0;
9753
9754 /* Determine which groups of bits to calculate. */
9755 switch (r_type)
9756 {
9757 case R_ARM_LDR_PC_G0:
9758 case R_ARM_LDR_SB_G0:
9759 group = 0;
9760 break;
9761
9762 case R_ARM_LDR_PC_G1:
9763 case R_ARM_LDR_SB_G1:
9764 group = 1;
9765 break;
9766
9767 case R_ARM_LDR_PC_G2:
9768 case R_ARM_LDR_SB_G2:
9769 group = 2;
9770 break;
9771
9772 default:
906e58ca 9773 abort ();
4962c51a
MS		 9774 }
9775
9776 /* If REL, extract the addend from the insn. If RELA, it will
9777 have already been fetched for us. */
9778 if (globals->use_rel)
9779 {
9780 int negative = (insn & (1 << 23)) ? 1 : -1;
9781 signed_addend = negative * (insn & 0xfff);
9782 }
9783
9784 /* Compute the value (X) to go in the place. */
9785 if (r_type == R_ARM_LDR_PC_G0
9786 || r_type == R_ARM_LDR_PC_G1
9787 || r_type == R_ARM_LDR_PC_G2)
9788 /* PC relative. */
9789 signed_value = value - pc + signed_addend;
9790 else
9791 /* Section base relative. */
9792 signed_value = value - sb + signed_addend;
9793
9794 /* Calculate the value of the relevant G_{n-1} to obtain
9795 the residual at that stage. */
9796 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9797
9798 /* Check for overflow. */
9799 if (residual >= 0x1000)
9800 {
9801 (*_bfd_error_handler)
9802 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9803 input_bfd, input_section,
9804 (long) rel->r_offset, abs (signed_value), howto->name);
9805 return bfd_reloc_overflow;
9806 }
9807
9808 /* Mask out the value and U bit. */
9809 insn &= 0xff7ff000;
9810
9811 /* Set the U bit if the value to go in the place is non-negative. */
9812 if (signed_value >= 0)
9813 insn |= 1 << 23;
9814
9815 /* Encode the offset. */
9816 insn |= residual;
9817
9818 bfd_put_32 (input_bfd, insn, hit_data);
9819 }
9820 return bfd_reloc_ok;
9821
9822 case R_ARM_LDRS_PC_G0:
9823 case R_ARM_LDRS_PC_G1:
9824 case R_ARM_LDRS_PC_G2:
9825 case R_ARM_LDRS_SB_G0:
9826 case R_ARM_LDRS_SB_G1:
9827 case R_ARM_LDRS_SB_G2:
9828 {
9829 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9830 bfd_vma pc = input_section->output_section->vma
9831 + input_section->output_offset + rel->r_offset;
9832 bfd_vma sb = 0; /* See note above. */
9833 bfd_vma residual;
9834 bfd_signed_vma signed_value;
9835 int group = 0;
9836
9837 /* Determine which groups of bits to calculate. */
9838 switch (r_type)
9839 {
9840 case R_ARM_LDRS_PC_G0:
9841 case R_ARM_LDRS_SB_G0:
9842 group = 0;
9843 break;
9844
9845 case R_ARM_LDRS_PC_G1:
9846 case R_ARM_LDRS_SB_G1:
9847 group = 1;
9848 break;
9849
9850 case R_ARM_LDRS_PC_G2:
9851 case R_ARM_LDRS_SB_G2:
9852 group = 2;
9853 break;
9854
9855 default:
906e58ca 9856 abort ();
4962c51a
MS		 9857 }
9858
9859 /* If REL, extract the addend from the insn. If RELA, it will
9860 have already been fetched for us. */
9861 if (globals->use_rel)
9862 {
9863 int negative = (insn & (1 << 23)) ? 1 : -1;
9864 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
9865 }
9866
9867 /* Compute the value (X) to go in the place. */
9868 if (r_type == R_ARM_LDRS_PC_G0
9869 || r_type == R_ARM_LDRS_PC_G1
9870 || r_type == R_ARM_LDRS_PC_G2)
9871 /* PC relative. */
9872 signed_value = value - pc + signed_addend;
9873 else
9874 /* Section base relative. */
9875 signed_value = value - sb + signed_addend;
9876
9877 /* Calculate the value of the relevant G_{n-1} to obtain
9878 the residual at that stage. */
9879 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9880
9881 /* Check for overflow. */
9882 if (residual >= 0x100)
9883 {
9884 (*_bfd_error_handler)
9885 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9886 input_bfd, input_section,
9887 (long) rel->r_offset, abs (signed_value), howto->name);
9888 return bfd_reloc_overflow;
9889 }
9890
9891 /* Mask out the value and U bit. */
9892 insn &= 0xff7ff0f0;
9893
9894 /* Set the U bit if the value to go in the place is non-negative. */
9895 if (signed_value >= 0)
9896 insn |= 1 << 23;
9897
9898 /* Encode the offset. */
9899 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
9900
9901 bfd_put_32 (input_bfd, insn, hit_data);
9902 }
9903 return bfd_reloc_ok;
9904
9905 case R_ARM_LDC_PC_G0:
9906 case R_ARM_LDC_PC_G1:
9907 case R_ARM_LDC_PC_G2:
9908 case R_ARM_LDC_SB_G0:
9909 case R_ARM_LDC_SB_G1:
9910 case R_ARM_LDC_SB_G2:
9911 {
9912 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9913 bfd_vma pc = input_section->output_section->vma
9914 + input_section->output_offset + rel->r_offset;
9915 bfd_vma sb = 0; /* See note above. */
9916 bfd_vma residual;
9917 bfd_signed_vma signed_value;
9918 int group = 0;
9919
9920 /* Determine which groups of bits to calculate. */
9921 switch (r_type)
9922 {
9923 case R_ARM_LDC_PC_G0:
9924 case R_ARM_LDC_SB_G0:
9925 group = 0;
9926 break;
9927
9928 case R_ARM_LDC_PC_G1:
9929 case R_ARM_LDC_SB_G1:
9930 group = 1;
9931 break;
9932
9933 case R_ARM_LDC_PC_G2:
9934 case R_ARM_LDC_SB_G2:
9935 group = 2;
9936 break;
9937
9938 default:
906e58ca 9939 abort ();
4962c51a
MS		 9940 }
9941
9942 /* If REL, extract the addend from the insn. If RELA, it will
9943 have already been fetched for us. */
9944 if (globals->use_rel)
9945 {
9946 int negative = (insn & (1 << 23)) ? 1 : -1;
9947 signed_addend = negative * ((insn & 0xff) << 2);
9948 }
9949
9950 /* Compute the value (X) to go in the place. */
9951 if (r_type == R_ARM_LDC_PC_G0
9952 || r_type == R_ARM_LDC_PC_G1
9953 || r_type == R_ARM_LDC_PC_G2)
9954 /* PC relative. */
9955 signed_value = value - pc + signed_addend;
9956 else
9957 /* Section base relative. */
9958 signed_value = value - sb + signed_addend;
9959
9960 /* Calculate the value of the relevant G_{n-1} to obtain
9961 the residual at that stage. */
9962 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9963
9964 /* Check for overflow. (The absolute value to go in the place must be
9965 divisible by four and, after having been divided by four, must
9966 fit in eight bits.) */
9967 if ((residual & 0x3) != 0 || residual >= 0x400)
9968 {
9969 (*_bfd_error_handler)
9970 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9971 input_bfd, input_section,
9972 (long) rel->r_offset, abs (signed_value), howto->name);
9973 return bfd_reloc_overflow;
9974 }
9975
9976 /* Mask out the value and U bit. */
9977 insn &= 0xff7fff00;
9978
9979 /* Set the U bit if the value to go in the place is non-negative. */
9980 if (signed_value >= 0)
9981 insn |= 1 << 23;
9982
9983 /* Encode the offset. */
9984 insn |= residual >> 2;
9985
9986 bfd_put_32 (input_bfd, insn, hit_data);
9987 }
9988 return bfd_reloc_ok;
9989
252b5132
RH		 9990 default:
9991 return bfd_reloc_notsupported;
9992 }
9993}
9994
98c1d4aa
NC		 9995/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
9996static void
57e8b36a
NC		 9997arm_add_to_rel (bfd * abfd,
9998 bfd_byte * address,
9999 reloc_howto_type * howto,
10000 bfd_signed_vma increment)
98c1d4aa 10001{
98c1d4aa
NC		 10002 bfd_signed_vma addend;
10003
bd97cb95
DJ		 10004 if (howto->type == R_ARM_THM_CALL
10005 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10006 {
9a5aca8c
AM		 10007 int upper_insn, lower_insn;
10008 int upper, lower;
98c1d4aa 10009
9a5aca8c
AM		 10010 upper_insn = bfd_get_16 (abfd, address);
10011 lower_insn = bfd_get_16 (abfd, address + 2);
10012 upper = upper_insn & 0x7ff;
10013 lower = lower_insn & 0x7ff;
10014
10015 addend = (upper << 12) | (lower << 1);
ddda4409 10016 addend += increment;
9a5aca8c 10017 addend >>= 1;
98c1d4aa 10018
9a5aca8c
AM		 10019 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10020 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10021
dc810e39
AM		 10022 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10023 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10024 }
10025 else
10026 {
10027 bfd_vma contents;
10028
10029 contents = bfd_get_32 (abfd, address);
10030
10031 /* Get the (signed) value from the instruction. */
10032 addend = contents & howto->src_mask;
10033 if (addend & ((howto->src_mask + 1) >> 1))
10034 {
10035 bfd_signed_vma mask;
10036
10037 mask = -1;
10038 mask &= ~ howto->src_mask;
10039 addend |= mask;
10040 }
10041
10042 /* Add in the increment, (which is a byte value). */
10043 switch (howto->type)
10044 {
10045 default:
10046 addend += increment;
10047 break;
10048
10049 case R_ARM_PC24:
c6596c5e 10050 case R_ARM_PLT32:
5b5bb741
PB		 10051 case R_ARM_CALL:
10052 case R_ARM_JUMP24:
9a5aca8c 10053 addend <<= howto->size;
dc810e39 10054 addend += increment;
9a5aca8c
AM		 10055
10056 /* Should we check for overflow here ? */
10057
10058 /* Drop any undesired bits. */
10059 addend >>= howto->rightshift;
10060 break;
10061 }
10062
10063 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10064
10065 bfd_put_32 (abfd, contents, address);
ddda4409 10066 }
98c1d4aa 10067}
252b5132 10068
ba93b8ac
DJ		 10069#define IS_ARM_TLS_RELOC(R_TYPE) \
10070 ((R_TYPE) == R_ARM_TLS_GD32 \
10071 || (R_TYPE) == R_ARM_TLS_LDO32 \
10072 || (R_TYPE) == R_ARM_TLS_LDM32 \
10073 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10074 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10075 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10076 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10077 || (R_TYPE) == R_ARM_TLS_IE32 \
10078 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10079
10080/* Specific set of relocations for the gnu tls dialect. */
10081#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10082 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10083 || (R_TYPE) == R_ARM_TLS_CALL \
10084 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10085 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10086 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10087
252b5132 10088/* Relocate an ARM ELF section. */
906e58ca 10089
b34976b6 10090static bfd_boolean
57e8b36a
NC		 10091elf32_arm_relocate_section (bfd * output_bfd,
10092 struct bfd_link_info * info,
10093 bfd * input_bfd,
10094 asection * input_section,
10095 bfd_byte * contents,
10096 Elf_Internal_Rela * relocs,
10097 Elf_Internal_Sym * local_syms,
10098 asection ** local_sections)
252b5132 10099{
b34976b6
AM		 10100 Elf_Internal_Shdr *symtab_hdr;
10101 struct elf_link_hash_entry **sym_hashes;
10102 Elf_Internal_Rela *rel;
10103 Elf_Internal_Rela *relend;
10104 const char *name;
b32d3aa2 10105 struct elf32_arm_link_hash_table * globals;
252b5132 10106
4e7fd91e 10107 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10108 if (globals == NULL)
10109 return FALSE;
b491616a 10110
0ffa91dd 10111 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10112 sym_hashes = elf_sym_hashes (input_bfd);
10113
10114 rel = relocs;
10115 relend = relocs + input_section->reloc_count;
10116 for (; rel < relend; rel++)
10117 {
ba96a88f
NC		 10118 int r_type;
10119 reloc_howto_type * howto;
10120 unsigned long r_symndx;
10121 Elf_Internal_Sym * sym;
10122 asection * sec;
252b5132 10123 struct elf_link_hash_entry * h;
ba96a88f
NC		 10124 bfd_vma relocation;
10125 bfd_reloc_status_type r;
10126 arelent bfd_reloc;
ba93b8ac 10127 char sym_type;
0945cdfd 10128 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10129 char *error_message = NULL;
f21f3fe0 10130
252b5132 10131 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10132 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10133 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10134
ba96a88f
NC		 10135 if ( r_type == R_ARM_GNU_VTENTRY
10136 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 10137 continue;
10138
b32d3aa2 10139 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10140 howto = bfd_reloc.howto;
252b5132 10141
252b5132
RH		 10142 h = NULL;
10143 sym = NULL;
10144 sec = NULL;
9b485d32 10145
252b5132
RH		 10146 if (r_symndx < symtab_hdr->sh_info)
10147 {
10148 sym = local_syms + r_symndx;
ba93b8ac 10149 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10150 sec = local_sections[r_symndx];
ffcb4889
NS		 10151
10152 /* An object file might have a reference to a local
10153 undefined symbol. This is a daft object file, but we
10154 should at least do something about it. V4BX & NONE
10155 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10156 allowed to use the undefined symbol, so allow those.
10157 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10158 if (r_type != R_ARM_V4BX
10159 && r_type != R_ARM_NONE
77b4f08f 10160 && r_symndx != STN_UNDEF
ffcb4889
NS		 10161 && bfd_is_und_section (sec)
10162 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10163 {
10164 if (!info->callbacks->undefined_symbol
10165 (info, bfd_elf_string_from_elf_section
10166 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10167 input_bfd, input_section,
10168 rel->r_offset, TRUE))
10169 return FALSE;
10170 }
10171
4e7fd91e 10172 if (globals->use_rel)
f8df10f4 10173 {
4e7fd91e
PB		 10174 relocation = (sec->output_section->vma
10175 + sec->output_offset
10176 + sym->st_value);
ab96bf03
AM		 10177 if (!info->relocatable
10178 && (sec->flags & SEC_MERGE)
10179 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10180 {
4e7fd91e
PB		 10181 asection *msec;
10182 bfd_vma addend, value;
10183
39623e12 10184 switch (r_type)
4e7fd91e 10185 {
39623e12
PB		 10186 case R_ARM_MOVW_ABS_NC:
10187 case R_ARM_MOVT_ABS:
10188 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10189 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10190 addend = (addend ^ 0x8000) - 0x8000;
10191 break;
f8df10f4 10192
39623e12
PB		 10193 case R_ARM_THM_MOVW_ABS_NC:
10194 case R_ARM_THM_MOVT_ABS:
10195 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10196 << 16;
10197 value |= bfd_get_16 (input_bfd,
10198 contents + rel->r_offset + 2);
10199 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10200 | ((value & 0x04000000) >> 15);
10201 addend = (addend ^ 0x8000) - 0x8000;
10202 break;
f8df10f4 10203
39623e12
PB		 10204 default:
10205 if (howto->rightshift
10206 || (howto->src_mask & (howto->src_mask + 1)))
10207 {
10208 (*_bfd_error_handler)
10209 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10210 input_bfd, input_section,
10211 (long) rel->r_offset, howto->name);
10212 return FALSE;
10213 }
10214
10215 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10216
10217 /* Get the (signed) value from the instruction. */
10218 addend = value & howto->src_mask;
10219 if (addend & ((howto->src_mask + 1) >> 1))
10220 {
10221 bfd_signed_vma mask;
10222
10223 mask = -1;
10224 mask &= ~ howto->src_mask;
10225 addend |= mask;
10226 }
10227 break;
4e7fd91e 10228 }
39623e12 10229
4e7fd91e
PB		 10230 msec = sec;
10231 addend =
10232 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10233 - relocation;
10234 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 10235
10236 /* Cases here must match those in the preceeding
10237 switch statement. */
10238 switch (r_type)
10239 {
10240 case R_ARM_MOVW_ABS_NC:
10241 case R_ARM_MOVT_ABS:
10242 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10243 | (addend & 0xfff);
10244 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10245 break;
10246
10247 case R_ARM_THM_MOVW_ABS_NC:
10248 case R_ARM_THM_MOVT_ABS:
10249 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10250 | (addend & 0xff) | ((addend & 0x0800) << 15);
10251 bfd_put_16 (input_bfd, value >> 16,
10252 contents + rel->r_offset);
10253 bfd_put_16 (input_bfd, value,
10254 contents + rel->r_offset + 2);
10255 break;
10256
10257 default:
10258 value = (value & ~ howto->dst_mask)
10259 | (addend & howto->dst_mask);
10260 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10261 break;
10262 }
f8df10f4 10263 }
f8df10f4 10264 }
4e7fd91e
PB		 10265 else
10266 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10267 }
10268 else
10269 {
560e09e9 10270 bfd_boolean warned;
560e09e9 10271
b2a8e766
AM		 10272 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10273 r_symndx, symtab_hdr, sym_hashes,
10274 h, sec, relocation,
10275 unresolved_reloc, warned);
ba93b8ac
DJ		 10276
10277 sym_type = h->type;
252b5132
RH		 10278 }
10279
ab96bf03 10280 if (sec != NULL && elf_discarded_section (sec))
e4067dbb
DJ		 10281 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10282 rel, relend, howto, contents);
ab96bf03
AM		 10283
10284 if (info->relocatable)
10285 {
10286 /* This is a relocatable link. We don't have to change
10287 anything, unless the reloc is against a section symbol,
10288 in which case we have to adjust according to where the
10289 section symbol winds up in the output section. */
10290 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10291 {
10292 if (globals->use_rel)
10293 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10294 howto, (bfd_signed_vma) sec->output_offset);
10295 else
10296 rel->r_addend += sec->output_offset;
10297 }
10298 continue;
10299 }
10300
252b5132
RH		 10301 if (h != NULL)
10302 name = h->root.root.string;
10303 else
10304 {
10305 name = (bfd_elf_string_from_elf_section
10306 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10307 if (name == NULL || *name == '\0')
10308 name = bfd_section_name (input_bfd, sec);
10309 }
f21f3fe0 10310
cf35638d 10311 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10312 && r_type != R_ARM_NONE
10313 && (h == NULL
10314 || h->root.type == bfd_link_hash_defined
10315 || h->root.type == bfd_link_hash_defweak)
10316 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10317 {
10318 (*_bfd_error_handler)
10319 ((sym_type == STT_TLS
10320 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10321 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10322 input_bfd,
10323 input_section,
10324 (long) rel->r_offset,
10325 howto->name,
10326 name);
10327 }
10328
0855e32b
NS		 10329 /* We call elf32_arm_final_link_relocate unless we're completely
10330 done, i.e., the relaxation produced the final output we want,
10331 and we won't let anybody mess with it. Also, we have to do
10332 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10333 both in relaxed and non-relaxed cases */
10334 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10335 || (IS_ARM_TLS_GNU_RELOC (r_type)
10336 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10337 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10338 & GOT_TLS_GDESC)))
10339 {
10340 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10341 contents, rel, h == NULL);
10342 /* This may have been marked unresolved because it came from
10343 a shared library. But we've just dealt with that. */
10344 unresolved_reloc = 0;
10345 }
10346 else
10347 r = bfd_reloc_continue;
10348
10349 if (r == bfd_reloc_continue)
10350 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10351 input_section, contents, rel,
34e77a92 10352 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10353 (h ? h->target_internal
10354 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10355 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10356
10357 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10358 because such sections are not SEC_ALLOC and thus ld.so will
10359 not process them. */
10360 if (unresolved_reloc
10361 && !((input_section->flags & SEC_DEBUGGING) != 0
10362 && h->def_dynamic))
10363 {
10364 (*_bfd_error_handler)
843fe662
L		 10365 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10366 input_bfd,
10367 input_section,
10368 (long) rel->r_offset,
10369 howto->name,
10370 h->root.root.string);
0945cdfd
DJ		 10371 return FALSE;
10372 }
252b5132
RH		 10373
10374 if (r != bfd_reloc_ok)
10375 {
252b5132
RH		 10376 switch (r)
10377 {
10378 case bfd_reloc_overflow:
cf919dfd
PB		 10379 /* If the overflowing reloc was to an undefined symbol,
10380 we have already printed one error message and there
10381 is no point complaining again. */
10382 if ((! h ||
10383 h->root.type != bfd_link_hash_undefined)
10384 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10385 (info, (h ? &h->root : NULL), name, howto->name,
10386 (bfd_vma) 0, input_bfd, input_section,
10387 rel->r_offset))))
b34976b6 10388 return FALSE;
252b5132
RH		 10389 break;
10390
10391 case bfd_reloc_undefined:
10392 if (!((*info->callbacks->undefined_symbol)
10393 (info, name, input_bfd, input_section,
b34976b6
AM		 10394 rel->r_offset, TRUE)))
10395 return FALSE;
252b5132
RH		 10396 break;
10397
10398 case bfd_reloc_outofrange:
f2a9dd69 10399 error_message = _("out of range");
252b5132
RH		 10400 goto common_error;
10401
10402 case bfd_reloc_notsupported:
f2a9dd69 10403 error_message = _("unsupported relocation");
252b5132
RH		 10404 goto common_error;
10405
10406 case bfd_reloc_dangerous:
f2a9dd69 10407 /* error_message should already be set. */
252b5132
RH		 10408 goto common_error;
10409
10410 default:
f2a9dd69 10411 error_message = _("unknown error");
8029a119 10412 /* Fall through. */
252b5132
RH		 10413
10414 common_error:
f2a9dd69
DJ		 10415 BFD_ASSERT (error_message != NULL);
10416 if (!((*info->callbacks->reloc_dangerous)
10417 (info, error_message, input_bfd, input_section,
252b5132 10418 rel->r_offset)))
b34976b6 10419 return FALSE;
252b5132
RH		 10420 break;
10421 }
10422 }
10423 }
10424
b34976b6 10425 return TRUE;
252b5132
RH		 10426}
10427
91d6fa6a 10428/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10429 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10430 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10431 maintaining that condition). */
10432
10433static void
10434add_unwind_table_edit (arm_unwind_table_edit **head,
10435 arm_unwind_table_edit **tail,
10436 arm_unwind_edit_type type,
10437 asection *linked_section,
91d6fa6a 10438 unsigned int tindex)
2468f9c9 10439{
21d799b5
NC		 10440 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10441 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 10442
10443 new_edit->type = type;
10444 new_edit->linked_section = linked_section;
91d6fa6a 10445 new_edit->index = tindex;
2468f9c9 10446
91d6fa6a 10447 if (tindex > 0)
2468f9c9
PB		 10448 {
10449 new_edit->next = NULL;
10450
10451 if (*tail)
10452 (*tail)->next = new_edit;
10453
10454 (*tail) = new_edit;
10455
10456 if (!*head)
10457 (*head) = new_edit;
10458 }
10459 else
10460 {
10461 new_edit->next = *head;
10462
10463 if (!*tail)
10464 *tail = new_edit;
10465
10466 *head = new_edit;
10467 }
10468}
10469
10470static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10471
10472/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10473static void
10474adjust_exidx_size(asection *exidx_sec, int adjust)
10475{
10476 asection *out_sec;
10477
10478 if (!exidx_sec->rawsize)
10479 exidx_sec->rawsize = exidx_sec->size;
10480
10481 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10482 out_sec = exidx_sec->output_section;
10483 /* Adjust size of output section. */
10484 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10485}
10486
10487/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10488static void
10489insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10490{
10491 struct _arm_elf_section_data *exidx_arm_data;
10492
10493 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10494 add_unwind_table_edit (
10495 &exidx_arm_data->u.exidx.unwind_edit_list,
10496 &exidx_arm_data->u.exidx.unwind_edit_tail,
10497 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10498
10499 adjust_exidx_size(exidx_sec, 8);
10500}
10501
10502/* Scan .ARM.exidx tables, and create a list describing edits which should be
10503 made to those tables, such that:
10504
10505 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10506 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10507 codes which have been inlined into the index).
10508
85fdf906
AH		 10509 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10510
2468f9c9
PB		 10511 The edits are applied when the tables are written
10512 (in elf32_arm_write_section).
10513*/
10514
10515bfd_boolean
10516elf32_arm_fix_exidx_coverage (asection **text_section_order,
10517 unsigned int num_text_sections,
85fdf906
AH		 10518 struct bfd_link_info *info,
10519 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10520{
10521 bfd *inp;
10522 unsigned int last_second_word = 0, i;
10523 asection *last_exidx_sec = NULL;
10524 asection *last_text_sec = NULL;
10525 int last_unwind_type = -1;
10526
10527 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10528 text sections. */
10529 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10530 {
10531 asection *sec;
10532
10533 for (sec = inp->sections; sec != NULL; sec = sec->next)
10534 {
10535 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10536 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10537
dec9d5df 10538 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 10539 continue;
10540
10541 if (elf_sec->linked_to)
10542 {
10543 Elf_Internal_Shdr *linked_hdr
10544 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10545 struct _arm_elf_section_data *linked_sec_arm_data
10546 = get_arm_elf_section_data (linked_hdr->bfd_section);
10547
10548 if (linked_sec_arm_data == NULL)
10549 continue;
10550
10551 /* Link this .ARM.exidx section back from the text section it
10552 describes. */
10553 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10554 }
10555 }
10556 }
10557
10558 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10559 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10560 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10561
10562 for (i = 0; i < num_text_sections; i++)
10563 {
10564 asection *sec = text_section_order[i];
10565 asection *exidx_sec;
10566 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10567 struct _arm_elf_section_data *exidx_arm_data;
10568 bfd_byte *contents = NULL;
10569 int deleted_exidx_bytes = 0;
10570 bfd_vma j;
10571 arm_unwind_table_edit *unwind_edit_head = NULL;
10572 arm_unwind_table_edit *unwind_edit_tail = NULL;
10573 Elf_Internal_Shdr *hdr;
10574 bfd *ibfd;
10575
10576 if (arm_data == NULL)
10577 continue;
10578
10579 exidx_sec = arm_data->u.text.arm_exidx_sec;
10580 if (exidx_sec == NULL)
10581 {
10582 /* Section has no unwind data. */
10583 if (last_unwind_type == 0 || !last_exidx_sec)
10584 continue;
10585
10586 /* Ignore zero sized sections. */
10587 if (sec->size == 0)
10588 continue;
10589
10590 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10591 last_unwind_type = 0;
10592 continue;
10593 }
10594
22a8f80e
PB		 10595 /* Skip /DISCARD/ sections. */
10596 if (bfd_is_abs_section (exidx_sec->output_section))
10597 continue;
10598
2468f9c9
PB		 10599 hdr = &elf_section_data (exidx_sec)->this_hdr;
10600 if (hdr->sh_type != SHT_ARM_EXIDX)
10601 continue;
10602
10603 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10604 if (exidx_arm_data == NULL)
10605 continue;
10606
10607 ibfd = exidx_sec->owner;
10608
10609 if (hdr->contents != NULL)
10610 contents = hdr->contents;
10611 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10612 /* An error? */
10613 continue;
10614
10615 for (j = 0; j < hdr->sh_size; j += 8)
10616 {
10617 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10618 int unwind_type;
10619 int elide = 0;
10620
10621 /* An EXIDX_CANTUNWIND entry. */
10622 if (second_word == 1)
10623 {
10624 if (last_unwind_type == 0)
10625 elide = 1;
10626 unwind_type = 0;
10627 }
10628 /* Inlined unwinding data. Merge if equal to previous. */
10629 else if ((second_word & 0x80000000) != 0)
10630 {
85fdf906
AH		 10631 if (merge_exidx_entries
10632 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 10633 elide = 1;
10634 unwind_type = 1;
10635 last_second_word = second_word;
10636 }
10637 /* Normal table entry. In theory we could merge these too,
10638 but duplicate entries are likely to be much less common. */
10639 else
10640 unwind_type = 2;
10641
10642 if (elide)
10643 {
10644 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10645 DELETE_EXIDX_ENTRY, NULL, j / 8);
10646
10647 deleted_exidx_bytes += 8;
10648 }
10649
10650 last_unwind_type = unwind_type;
10651 }
10652
10653 /* Free contents if we allocated it ourselves. */
10654 if (contents != hdr->contents)
10655 free (contents);
10656
10657 /* Record edits to be applied later (in elf32_arm_write_section). */
10658 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10659 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10660
10661 if (deleted_exidx_bytes > 0)
10662 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10663
10664 last_exidx_sec = exidx_sec;
10665 last_text_sec = sec;
10666 }
10667
10668 /* Add terminating CANTUNWIND entry. */
10669 if (last_exidx_sec && last_unwind_type != 0)
10670 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10671
10672 return TRUE;
10673}
10674
3e6b1042
DJ		 10675static bfd_boolean
10676elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10677 bfd *ibfd, const char *name)
10678{
10679 asection *sec, *osec;
10680
10681 sec = bfd_get_section_by_name (ibfd, name);
10682 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10683 return TRUE;
10684
10685 osec = sec->output_section;
10686 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10687 return TRUE;
10688
10689 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10690 sec->output_offset, sec->size))
10691 return FALSE;
10692
10693 return TRUE;
10694}
10695
10696static bfd_boolean
10697elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10698{
10699 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 10700 asection *sec, *osec;
3e6b1042 10701
4dfe6ac6
NC		 10702 if (globals == NULL)
10703 return FALSE;
10704
3e6b1042
DJ		 10705 /* Invoke the regular ELF backend linker to do all the work. */
10706 if (!bfd_elf_final_link (abfd, info))
10707 return FALSE;
10708
fe33d2fa
CL		 10709 /* Process stub sections (eg BE8 encoding, ...). */
10710 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10711 int i;
cdb21a0a
NS		 10712 for (i=0; i<htab->top_id; i++)
10713 {
10714 sec = htab->stub_group[i].stub_sec;
10715 /* Only process it once, in its link_sec slot. */
10716 if (sec && i == htab->stub_group[i].link_sec->id)
10717 {
10718 osec = sec->output_section;
10719 elf32_arm_write_section (abfd, info, sec, sec->contents);
10720 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10721 sec->output_offset, sec->size))
10722 return FALSE;
10723 }
fe33d2fa 10724 }
fe33d2fa 10725
3e6b1042
DJ		 10726 /* Write out any glue sections now that we have created all the
10727 stubs. */
10728 if (globals->bfd_of_glue_owner != NULL)
10729 {
10730 if (! elf32_arm_output_glue_section (info, abfd,
10731 globals->bfd_of_glue_owner,
10732 ARM2THUMB_GLUE_SECTION_NAME))
10733 return FALSE;
10734
10735 if (! elf32_arm_output_glue_section (info, abfd,
10736 globals->bfd_of_glue_owner,
10737 THUMB2ARM_GLUE_SECTION_NAME))
10738 return FALSE;
10739
10740 if (! elf32_arm_output_glue_section (info, abfd,
10741 globals->bfd_of_glue_owner,
10742 VFP11_ERRATUM_VENEER_SECTION_NAME))
10743 return FALSE;
10744
10745 if (! elf32_arm_output_glue_section (info, abfd,
10746 globals->bfd_of_glue_owner,
10747 ARM_BX_GLUE_SECTION_NAME))
10748 return FALSE;
10749 }
10750
10751 return TRUE;
10752}
10753
c178919b
NC		 10754/* Set the right machine number. */
10755
10756static bfd_boolean
57e8b36a 10757elf32_arm_object_p (bfd *abfd)
c178919b 10758{
5a6c6817 10759 unsigned int mach;
57e8b36a 10760
5a6c6817 10761 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 10762
5a6c6817
NC		 10763 if (mach != bfd_mach_arm_unknown)
10764 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10765
10766 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
10767 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 10768
e16bb312 10769 else
5a6c6817 10770 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 10771
10772 return TRUE;
10773}
10774
fc830a83 10775/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 10776
b34976b6 10777static bfd_boolean
57e8b36a 10778elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 10779{
10780 if (elf_flags_init (abfd)
10781 && elf_elfheader (abfd)->e_flags != flags)
10782 {
fc830a83
NC		 10783 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
10784 {
fd2ec330 10785 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 10786 (*_bfd_error_handler)
10787 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
10788 abfd);
fc830a83 10789 else
d003868e
AM		 10790 _bfd_error_handler
10791 (_("Warning: Clearing the interworking flag of %B due to outside request"),
10792 abfd);
fc830a83 10793 }
252b5132
RH		 10794 }
10795 else
10796 {
10797 elf_elfheader (abfd)->e_flags = flags;
b34976b6 10798 elf_flags_init (abfd) = TRUE;
252b5132
RH		 10799 }
10800
b34976b6 10801 return TRUE;
252b5132
RH		 10802}
10803
fc830a83 10804/* Copy backend specific data from one object module to another. */
9b485d32 10805
b34976b6 10806static bfd_boolean
57e8b36a 10807elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 10808{
10809 flagword in_flags;
10810 flagword out_flags;
10811
0ffa91dd 10812 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10813 return TRUE;
252b5132 10814
fc830a83 10815 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 10816 out_flags = elf_elfheader (obfd)->e_flags;
10817
fc830a83
NC		 10818 if (elf_flags_init (obfd)
10819 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
10820 && in_flags != out_flags)
252b5132 10821 {
252b5132 10822 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 10823 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 10824 return FALSE;
252b5132
RH		 10825
10826 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 10827 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 10828 return FALSE;
252b5132
RH		 10829
10830 /* If the src and dest have different interworking flags
10831 then turn off the interworking bit. */
fd2ec330 10832 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 10833 {
fd2ec330 10834 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 10835 _bfd_error_handler
10836 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
10837 obfd, ibfd);
252b5132 10838
fd2ec330 10839 in_flags &= ~EF_ARM_INTERWORK;
252b5132 10840 }
1006ba19
PB		 10841
10842 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 10843 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
10844 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 10845 }
10846
10847 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 10848 elf_flags_init (obfd) = TRUE;
252b5132 10849
94a3258f
PB		 10850 /* Also copy the EI_OSABI field. */
10851 elf_elfheader (obfd)->e_ident[EI_OSABI] =
10852 elf_elfheader (ibfd)->e_ident[EI_OSABI];
10853
104d59d1
JM		 10854 /* Copy object attributes. */
10855 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 10856
10857 return TRUE;
10858}
10859
10860/* Values for Tag_ABI_PCS_R9_use. */
10861enum
10862{
10863 AEABI_R9_V6,
10864 AEABI_R9_SB,
10865 AEABI_R9_TLS,
10866 AEABI_R9_unused
10867};
10868
10869/* Values for Tag_ABI_PCS_RW_data. */
10870enum
10871{
10872 AEABI_PCS_RW_data_absolute,
10873 AEABI_PCS_RW_data_PCrel,
10874 AEABI_PCS_RW_data_SBrel,
10875 AEABI_PCS_RW_data_unused
10876};
10877
10878/* Values for Tag_ABI_enum_size. */
10879enum
10880{
10881 AEABI_enum_unused,
10882 AEABI_enum_short,
10883 AEABI_enum_wide,
10884 AEABI_enum_forced_wide
10885};
10886
104d59d1
JM		 10887/* Determine whether an object attribute tag takes an integer, a
10888 string or both. */
906e58ca 10889
104d59d1
JM		 10890static int
10891elf32_arm_obj_attrs_arg_type (int tag)
10892{
10893 if (tag == Tag_compatibility)
3483fe2e 10894 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 10895 else if (tag == Tag_nodefaults)
3483fe2e
AS		 10896 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
10897 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
10898 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 10899 else if (tag < 32)
3483fe2e 10900 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 10901 else
3483fe2e 10902 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 10903}
10904
5aa6ff7c
AS		 10905/* The ABI defines that Tag_conformance should be emitted first, and that
10906 Tag_nodefaults should be second (if either is defined). This sets those
10907 two positions, and bumps up the position of all the remaining tags to
10908 compensate. */
10909static int
10910elf32_arm_obj_attrs_order (int num)
10911{
3de4a297 10912 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 10913 return Tag_conformance;
3de4a297 10914 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 10915 return Tag_nodefaults;
10916 if ((num - 2) < Tag_nodefaults)
10917 return num - 2;
10918 if ((num - 1) < Tag_conformance)
10919 return num - 1;
10920 return num;
10921}
10922
e8b36cd1
JM		 10923/* Attribute numbers >=64 (mod 128) can be safely ignored. */
10924static bfd_boolean
10925elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
10926{
10927 if ((tag & 127) < 64)
10928 {
10929 _bfd_error_handler
10930 (_("%B: Unknown mandatory EABI object attribute %d"),
10931 abfd, tag);
10932 bfd_set_error (bfd_error_bad_value);
10933 return FALSE;
10934 }
10935 else
10936 {
10937 _bfd_error_handler
10938 (_("Warning: %B: Unknown EABI object attribute %d"),
10939 abfd, tag);
10940 return TRUE;
10941 }
10942}
10943
91e22acd
AS		 10944/* Read the architecture from the Tag_also_compatible_with attribute, if any.
10945 Returns -1 if no architecture could be read. */
10946
10947static int
10948get_secondary_compatible_arch (bfd *abfd)
10949{
10950 obj_attribute *attr =
10951 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
10952
10953 /* Note: the tag and its argument below are uleb128 values, though
10954 currently-defined values fit in one byte for each. */
10955 if (attr->s
10956 && attr->s[0] == Tag_CPU_arch
10957 && (attr->s[1] & 128) != 128
10958 && attr->s[2] == 0)
10959 return attr->s[1];
10960
10961 /* This tag is "safely ignorable", so don't complain if it looks funny. */
10962 return -1;
10963}
10964
10965/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10966 The tag is removed if ARCH is -1. */
10967
8e79c3df 10968static void
91e22acd 10969set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 10970{
91e22acd
AS		 10971 obj_attribute *attr =
10972 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 10973
91e22acd
AS		 10974 if (arch == -1)
10975 {
10976 attr->s = NULL;
10977 return;
8e79c3df 10978 }
91e22acd
AS		 10979
10980 /* Note: the tag and its argument below are uleb128 values, though
10981 currently-defined values fit in one byte for each. */
10982 if (!attr->s)
21d799b5 10983 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 10984 attr->s[0] = Tag_CPU_arch;
10985 attr->s[1] = arch;
10986 attr->s[2] = '\0';
8e79c3df
CM		 10987}
10988
91e22acd
AS		 10989/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10990 into account. */
10991
10992static int
10993tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
10994 int newtag, int secondary_compat)
8e79c3df 10995{
91e22acd
AS		 10996#define T(X) TAG_CPU_ARCH_##X
10997 int tagl, tagh, result;
10998 const int v6t2[] =
10999 {
11000 T(V6T2), /* PRE_V4. */
11001 T(V6T2), /* V4. */
11002 T(V6T2), /* V4T. */
11003 T(V6T2), /* V5T. */
11004 T(V6T2), /* V5TE. */
11005 T(V6T2), /* V5TEJ. */
11006 T(V6T2), /* V6. */
11007 T(V7), /* V6KZ. */
11008 T(V6T2) /* V6T2. */
11009 };
11010 const int v6k[] =
11011 {
11012 T(V6K), /* PRE_V4. */
11013 T(V6K), /* V4. */
11014 T(V6K), /* V4T. */
11015 T(V6K), /* V5T. */
11016 T(V6K), /* V5TE. */
11017 T(V6K), /* V5TEJ. */
11018 T(V6K), /* V6. */
11019 T(V6KZ), /* V6KZ. */
11020 T(V7), /* V6T2. */
11021 T(V6K) /* V6K. */
11022 };
11023 const int v7[] =
11024 {
11025 T(V7), /* PRE_V4. */
11026 T(V7), /* V4. */
11027 T(V7), /* V4T. */
11028 T(V7), /* V5T. */
11029 T(V7), /* V5TE. */
11030 T(V7), /* V5TEJ. */
11031 T(V7), /* V6. */
11032 T(V7), /* V6KZ. */
11033 T(V7), /* V6T2. */
11034 T(V7), /* V6K. */
11035 T(V7) /* V7. */
11036 };
11037 const int v6_m[] =
11038 {
11039 -1, /* PRE_V4. */
11040 -1, /* V4. */
11041 T(V6K), /* V4T. */
11042 T(V6K), /* V5T. */
11043 T(V6K), /* V5TE. */
11044 T(V6K), /* V5TEJ. */
11045 T(V6K), /* V6. */
11046 T(V6KZ), /* V6KZ. */
11047 T(V7), /* V6T2. */
11048 T(V6K), /* V6K. */
11049 T(V7), /* V7. */
11050 T(V6_M) /* V6_M. */
11051 };
11052 const int v6s_m[] =
11053 {
11054 -1, /* PRE_V4. */
11055 -1, /* V4. */
11056 T(V6K), /* V4T. */
11057 T(V6K), /* V5T. */
11058 T(V6K), /* V5TE. */
11059 T(V6K), /* V5TEJ. */
11060 T(V6K), /* V6. */
11061 T(V6KZ), /* V6KZ. */
11062 T(V7), /* V6T2. */
11063 T(V6K), /* V6K. */
11064 T(V7), /* V7. */
11065 T(V6S_M), /* V6_M. */
11066 T(V6S_M) /* V6S_M. */
11067 };
9e3c6df6
PB		 11068 const int v7e_m[] =
11069 {
11070 -1, /* PRE_V4. */
11071 -1, /* V4. */
11072 T(V7E_M), /* V4T. */
11073 T(V7E_M), /* V5T. */
11074 T(V7E_M), /* V5TE. */
11075 T(V7E_M), /* V5TEJ. */
11076 T(V7E_M), /* V6. */
11077 T(V7E_M), /* V6KZ. */
11078 T(V7E_M), /* V6T2. */
11079 T(V7E_M), /* V6K. */
11080 T(V7E_M), /* V7. */
11081 T(V7E_M), /* V6_M. */
11082 T(V7E_M), /* V6S_M. */
11083 T(V7E_M) /* V7E_M. */
11084 };
91e22acd
AS		 11085 const int v4t_plus_v6_m[] =
11086 {
11087 -1, /* PRE_V4. */
11088 -1, /* V4. */
11089 T(V4T), /* V4T. */
11090 T(V5T), /* V5T. */
11091 T(V5TE), /* V5TE. */
11092 T(V5TEJ), /* V5TEJ. */
11093 T(V6), /* V6. */
11094 T(V6KZ), /* V6KZ. */
11095 T(V6T2), /* V6T2. */
11096 T(V6K), /* V6K. */
11097 T(V7), /* V7. */
11098 T(V6_M), /* V6_M. */
11099 T(V6S_M), /* V6S_M. */
9e3c6df6 11100 T(V7E_M), /* V7E_M. */
91e22acd
AS		 11101 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11102 };
11103 const int *comb[] =
11104 {
11105 v6t2,
11106 v6k,
11107 v7,
11108 v6_m,
11109 v6s_m,
9e3c6df6 11110 v7e_m,
91e22acd
AS		 11111 /* Pseudo-architecture. */
11112 v4t_plus_v6_m
11113 };
11114
11115 /* Check we've not got a higher architecture than we know about. */
11116
9e3c6df6 11117 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11118 {
3895f852 11119 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11120 return -1;
11121 }
11122
11123 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11124
11125 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11126 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11127 oldtag = T(V4T_PLUS_V6_M);
11128
11129 /* And override the new tag if we have a Tag_also_compatible_with on the
11130 input. */
11131
11132 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11133 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11134 newtag = T(V4T_PLUS_V6_M);
11135
11136 tagl = (oldtag < newtag) ? oldtag : newtag;
11137 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11138
11139 /* Architectures before V6KZ add features monotonically. */
11140 if (tagh <= TAG_CPU_ARCH_V6KZ)
11141 return result;
11142
11143 result = comb[tagh - T(V6T2)][tagl];
11144
11145 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11146 as the canonical version. */
11147 if (result == T(V4T_PLUS_V6_M))
11148 {
11149 result = T(V4T);
11150 *secondary_compat_out = T(V6_M);
11151 }
11152 else
11153 *secondary_compat_out = -1;
11154
11155 if (result == -1)
11156 {
3895f852 11157 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11158 ibfd, oldtag, newtag);
11159 return -1;
11160 }
11161
11162 return result;
11163#undef T
8e79c3df
CM		 11164}
11165
ee065d83
PB		 11166/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11167 are conflicting attributes. */
906e58ca 11168
ee065d83
PB		 11169static bfd_boolean
11170elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11171{
104d59d1
JM		 11172 obj_attribute *in_attr;
11173 obj_attribute *out_attr;
ee065d83
PB		 11174 /* Some tags have 0 = don't care, 1 = strong requirement,
11175 2 = weak requirement. */
91e22acd 11176 static const int order_021[3] = {0, 2, 1};
ee065d83 11177 int i;
91e22acd 11178 bfd_boolean result = TRUE;
ee065d83 11179
3e6b1042
DJ		 11180 /* Skip the linker stubs file. This preserves previous behavior
11181 of accepting unknown attributes in the first input file - but
11182 is that a bug? */
11183 if (ibfd->flags & BFD_LINKER_CREATED)
11184 return TRUE;
11185
104d59d1 11186 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11187 {
11188 /* This is the first object. Copy the attributes. */
104d59d1 11189 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11190
cd21e546
MGD		 11191 out_attr = elf_known_obj_attributes_proc (obfd);
11192
004ae526
PB		 11193 /* Use the Tag_null value to indicate the attributes have been
11194 initialized. */
cd21e546 11195 out_attr[0].i = 1;
004ae526 11196
cd21e546
MGD		 11197 /* We do not output objects with Tag_MPextension_use_legacy - we move
11198 the attribute's value to Tag_MPextension_use. */
11199 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11200 {
11201 if (out_attr[Tag_MPextension_use].i != 0
11202 && out_attr[Tag_MPextension_use_legacy].i
11203 != out_attr[Tag_MPextension_use].i)
11204 {
11205 _bfd_error_handler
11206 (_("Error: %B has both the current and legacy "
11207 "Tag_MPextension_use attributes"), ibfd);
11208 result = FALSE;
11209 }
11210
11211 out_attr[Tag_MPextension_use] =
11212 out_attr[Tag_MPextension_use_legacy];
11213 out_attr[Tag_MPextension_use_legacy].type = 0;
11214 out_attr[Tag_MPextension_use_legacy].i = 0;
11215 }
11216
11217 return result;
ee065d83
PB		 11218 }
11219
104d59d1
JM		 11220 in_attr = elf_known_obj_attributes_proc (ibfd);
11221 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11222 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11223 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11224 {
8e79c3df 11225 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11226 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11227 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11228 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11229 {
11230 _bfd_error_handler
3895f852 11231 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11232 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11233 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11234 result = FALSE;
ee065d83
PB		 11235 }
11236 }
11237
3de4a297 11238 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11239 {
11240 /* Merge this attribute with existing attributes. */
11241 switch (i)
11242 {
11243 case Tag_CPU_raw_name:
11244 case Tag_CPU_name:
91e22acd 11245 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11246 break;
11247
11248 case Tag_ABI_optimization_goals:
11249 case Tag_ABI_FP_optimization_goals:
11250 /* Use the first value seen. */
11251 break;
11252
11253 case Tag_CPU_arch:
91e22acd
AS		 11254 {
11255 int secondary_compat = -1, secondary_compat_out = -1;
11256 unsigned int saved_out_attr = out_attr[i].i;
11257 static const char *name_table[] = {
11258 /* These aren't real CPU names, but we can't guess
11259 that from the architecture version alone. */
11260 "Pre v4",
11261 "ARM v4",
11262 "ARM v4T",
11263 "ARM v5T",
11264 "ARM v5TE",
11265 "ARM v5TEJ",
11266 "ARM v6",
11267 "ARM v6KZ",
11268 "ARM v6T2",
11269 "ARM v6K",
11270 "ARM v7",
11271 "ARM v6-M",
11272 "ARM v6S-M"
11273 };
11274
11275 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11276 secondary_compat = get_secondary_compatible_arch (ibfd);
11277 secondary_compat_out = get_secondary_compatible_arch (obfd);
11278 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11279 &secondary_compat_out,
11280 in_attr[i].i,
11281 secondary_compat);
11282 set_secondary_compatible_arch (obfd, secondary_compat_out);
11283
11284 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11285 if (out_attr[i].i == saved_out_attr)
11286 ; /* Leave the names alone. */
11287 else if (out_attr[i].i == in_attr[i].i)
11288 {
11289 /* The output architecture has been changed to match the
11290 input architecture. Use the input names. */
11291 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11292 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11293 : NULL;
11294 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11295 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11296 : NULL;
11297 }
11298 else
11299 {
11300 out_attr[Tag_CPU_name].s = NULL;
11301 out_attr[Tag_CPU_raw_name].s = NULL;
11302 }
11303
11304 /* If we still don't have a value for Tag_CPU_name,
11305 make one up now. Tag_CPU_raw_name remains blank. */
11306 if (out_attr[Tag_CPU_name].s == NULL
11307 && out_attr[i].i < ARRAY_SIZE (name_table))
11308 out_attr[Tag_CPU_name].s =
11309 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11310 }
11311 break;
11312
ee065d83
PB		 11313 case Tag_ARM_ISA_use:
11314 case Tag_THUMB_ISA_use:
ee065d83 11315 case Tag_WMMX_arch:
91e22acd
AS		 11316 case Tag_Advanced_SIMD_arch:
11317 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11318 case Tag_ABI_FP_rounding:
ee065d83
PB		 11319 case Tag_ABI_FP_exceptions:
11320 case Tag_ABI_FP_user_exceptions:
11321 case Tag_ABI_FP_number_model:
75375b3e 11322 case Tag_FP_HP_extension:
91e22acd
AS		 11323 case Tag_CPU_unaligned_access:
11324 case Tag_T2EE_use:
91e22acd 11325 case Tag_MPextension_use:
ee065d83
PB		 11326 /* Use the largest value specified. */
11327 if (in_attr[i].i > out_attr[i].i)
11328 out_attr[i].i = in_attr[i].i;
11329 break;
11330
75375b3e 11331 case Tag_ABI_align_preserved:
91e22acd
AS		 11332 case Tag_ABI_PCS_RO_data:
11333 /* Use the smallest value specified. */
11334 if (in_attr[i].i < out_attr[i].i)
11335 out_attr[i].i = in_attr[i].i;
11336 break;
11337
75375b3e 11338 case Tag_ABI_align_needed:
91e22acd 11339 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11340 && (in_attr[Tag_ABI_align_preserved].i == 0
11341 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11342 {
91e22acd
AS		 11343 /* This error message should be enabled once all non-conformant
11344 binaries in the toolchain have had the attributes set
11345 properly.
ee065d83 11346 _bfd_error_handler
3895f852 11347 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11348 obfd, ibfd);
11349 result = FALSE; */
ee065d83 11350 }
91e22acd
AS		 11351 /* Fall through. */
11352 case Tag_ABI_FP_denormal:
11353 case Tag_ABI_PCS_GOT_use:
11354 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11355 value if greater than 2 (for future-proofing). */
11356 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11357 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11358 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11359 out_attr[i].i = in_attr[i].i;
11360 break;
91e22acd 11361
75375b3e
MGD		 11362 case Tag_Virtualization_use:
11363 /* The virtualization tag effectively stores two bits of
11364 information: the intended use of TrustZone (in bit 0), and the
11365 intended use of Virtualization (in bit 1). */
11366 if (out_attr[i].i == 0)
11367 out_attr[i].i = in_attr[i].i;
11368 else if (in_attr[i].i != 0
11369 && in_attr[i].i != out_attr[i].i)
11370 {
11371 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11372 out_attr[i].i = 3;
11373 else
11374 {
11375 _bfd_error_handler
11376 (_("error: %B: unable to merge virtualization attributes "
11377 "with %B"),
11378 obfd, ibfd);
11379 result = FALSE;
11380 }
11381 }
11382 break;
91e22acd
AS		 11383
11384 case Tag_CPU_arch_profile:
11385 if (out_attr[i].i != in_attr[i].i)
11386 {
11387 /* 0 will merge with anything.
11388 'A' and 'S' merge to 'A'.
11389 'R' and 'S' merge to 'R'.
11390 'M' and 'A|R|S' is an error. */
11391 if (out_attr[i].i == 0
11392 || (out_attr[i].i == 'S'
11393 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11394 out_attr[i].i = in_attr[i].i;
11395 else if (in_attr[i].i == 0
11396 || (in_attr[i].i == 'S'
11397 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11398 ; /* Do nothing. */
11399 else
11400 {
11401 _bfd_error_handler
3895f852 11402 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11403 ibfd,
11404 in_attr[i].i ? in_attr[i].i : '0',
11405 out_attr[i].i ? out_attr[i].i : '0');
11406 result = FALSE;
11407 }
11408 }
11409 break;
75375b3e 11410 case Tag_FP_arch:
62f3b8c8 11411 {
4547cb56
NC		 11412 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11413 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11414 when it's 0. It might mean absence of FP hardware if
11415 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11416
62f3b8c8
PB		 11417 static const struct
11418 {
11419 int ver;
11420 int regs;
11421 } vfp_versions[7] =
11422 {
11423 {0, 0},
11424 {1, 16},
11425 {2, 16},
11426 {3, 32},
11427 {3, 16},
11428 {4, 32},
11429 {4, 16}
11430 };
11431 int ver;
11432 int regs;
11433 int newval;
11434
4547cb56
NC		 11435 /* If the output has no requirement about FP hardware,
11436 follow the requirement of the input. */
11437 if (out_attr[i].i == 0)
11438 {
11439 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11440 out_attr[i].i = in_attr[i].i;
11441 out_attr[Tag_ABI_HardFP_use].i
11442 = in_attr[Tag_ABI_HardFP_use].i;
11443 break;
11444 }
11445 /* If the input has no requirement about FP hardware, do
11446 nothing. */
11447 else if (in_attr[i].i == 0)
11448 {
11449 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11450 break;
11451 }
11452
11453 /* Both the input and the output have nonzero Tag_FP_arch.
11454 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11455
11456 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11457 do nothing. */
11458 if (in_attr[Tag_ABI_HardFP_use].i == 0
11459 && out_attr[Tag_ABI_HardFP_use].i == 0)
11460 ;
11461 /* If the input and the output have different Tag_ABI_HardFP_use,
11462 the combination of them is 3 (SP & DP). */
11463 else if (in_attr[Tag_ABI_HardFP_use].i
11464 != out_attr[Tag_ABI_HardFP_use].i)
11465 out_attr[Tag_ABI_HardFP_use].i = 3;
11466
11467 /* Now we can handle Tag_FP_arch. */
11468
62f3b8c8
PB		 11469 /* Values greater than 6 aren't defined, so just pick the
11470 biggest */
11471 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
11472 {
11473 out_attr[i] = in_attr[i];
11474 break;
11475 }
11476 /* The output uses the superset of input features
11477 (ISA version) and registers. */
11478 ver = vfp_versions[in_attr[i].i].ver;
11479 if (ver < vfp_versions[out_attr[i].i].ver)
11480 ver = vfp_versions[out_attr[i].i].ver;
11481 regs = vfp_versions[in_attr[i].i].regs;
11482 if (regs < vfp_versions[out_attr[i].i].regs)
11483 regs = vfp_versions[out_attr[i].i].regs;
11484 /* This assumes all possible supersets are also a valid
11485 options. */
11486 for (newval = 6; newval > 0; newval--)
11487 {
11488 if (regs == vfp_versions[newval].regs
11489 && ver == vfp_versions[newval].ver)
11490 break;
11491 }
11492 out_attr[i].i = newval;
11493 }
b1cc4aeb 11494 break;
ee065d83
PB		 11495 case Tag_PCS_config:
11496 if (out_attr[i].i == 0)
11497 out_attr[i].i = in_attr[i].i;
11498 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
11499 {
11500 /* It's sometimes ok to mix different configs, so this is only
11501 a warning. */
11502 _bfd_error_handler
11503 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11504 }
11505 break;
11506 case Tag_ABI_PCS_R9_use:
004ae526
PB		 11507 if (in_attr[i].i != out_attr[i].i
11508 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 11509 && in_attr[i].i != AEABI_R9_unused)
11510 {
11511 _bfd_error_handler
3895f852 11512 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 11513 result = FALSE;
ee065d83
PB		 11514 }
11515 if (out_attr[i].i == AEABI_R9_unused)
11516 out_attr[i].i = in_attr[i].i;
11517 break;
11518 case Tag_ABI_PCS_RW_data:
11519 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11520 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11521 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11522 {
11523 _bfd_error_handler
3895f852 11524 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 11525 ibfd);
91e22acd 11526 result = FALSE;
ee065d83
PB		 11527 }
11528 /* Use the smallest value specified. */
11529 if (in_attr[i].i < out_attr[i].i)
11530 out_attr[i].i = in_attr[i].i;
11531 break;
ee065d83 11532 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 11533 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11534 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 11535 {
11536 _bfd_error_handler
a9dc9481
JM		 11537 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11538 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 11539 }
a9dc9481 11540 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 11541 out_attr[i].i = in_attr[i].i;
11542 break;
ee065d83
PB		 11543 case Tag_ABI_enum_size:
11544 if (in_attr[i].i != AEABI_enum_unused)
11545 {
11546 if (out_attr[i].i == AEABI_enum_unused
11547 || out_attr[i].i == AEABI_enum_forced_wide)
11548 {
11549 /* The existing object is compatible with anything.
11550 Use whatever requirements the new object has. */
11551 out_attr[i].i = in_attr[i].i;
11552 }
11553 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 11554 && out_attr[i].i != in_attr[i].i
0ffa91dd 11555 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 11556 {
91e22acd 11557 static const char *aeabi_enum_names[] =
bf21ed78 11558 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 11559 const char *in_name =
11560 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11561 ? aeabi_enum_names[in_attr[i].i]
11562 : "<unknown>";
11563 const char *out_name =
11564 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11565 ? aeabi_enum_names[out_attr[i].i]
11566 : "<unknown>";
ee065d83 11567 _bfd_error_handler
bf21ed78 11568 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 11569 ibfd, in_name, out_name);
ee065d83
PB		 11570 }
11571 }
11572 break;
11573 case Tag_ABI_VFP_args:
11574 /* Aready done. */
11575 break;
11576 case Tag_ABI_WMMX_args:
11577 if (in_attr[i].i != out_attr[i].i)
11578 {
11579 _bfd_error_handler
3895f852 11580 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 11581 ibfd, obfd);
91e22acd 11582 result = FALSE;
ee065d83
PB		 11583 }
11584 break;
7b86a9fa
AS		 11585 case Tag_compatibility:
11586 /* Merged in target-independent code. */
11587 break;
91e22acd 11588 case Tag_ABI_HardFP_use:
4547cb56 11589 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 11590 break;
11591 case Tag_ABI_FP_16bit_format:
11592 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11593 {
11594 if (in_attr[i].i != out_attr[i].i)
11595 {
11596 _bfd_error_handler
3895f852 11597 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 11598 ibfd, obfd);
11599 result = FALSE;
11600 }
11601 }
11602 if (in_attr[i].i != 0)
11603 out_attr[i].i = in_attr[i].i;
11604 break;
7b86a9fa 11605
cd21e546
MGD		 11606 case Tag_DIV_use:
11607 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
11608 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
11609 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
11610 CPU. We will merge as follows: If the input attribute's value
11611 is one then the output attribute's value remains unchanged. If
11612 the input attribute's value is zero or two then if the output
11613 attribute's value is one the output value is set to the input
11614 value, otherwise the output value must be the same as the
11615 inputs. */
11616 if (in_attr[i].i != 1 && out_attr[i].i != 1)
11617 {
11618 if (in_attr[i].i != out_attr[i].i)
11619 {
11620 _bfd_error_handler
11621 (_("DIV usage mismatch between %B and %B"),
11622 ibfd, obfd);
11623 result = FALSE;
11624 }
11625 }
11626
11627 if (in_attr[i].i != 1)
11628 out_attr[i].i = in_attr[i].i;
11629
11630 break;
11631
11632 case Tag_MPextension_use_legacy:
11633 /* We don't output objects with Tag_MPextension_use_legacy - we
11634 move the value to Tag_MPextension_use. */
11635 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11636 {
11637 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11638 {
11639 _bfd_error_handler
11640 (_("%B has has both the current and legacy "
11641 "Tag_MPextension_use attributes"),
11642 ibfd);
11643 result = FALSE;
11644 }
11645 }
11646
11647 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11648 out_attr[Tag_MPextension_use] = in_attr[i];
11649
11650 break;
11651
91e22acd 11652 case Tag_nodefaults:
2d0bb761
AS		 11653 /* This tag is set if it exists, but the value is unused (and is
11654 typically zero). We don't actually need to do anything here -
11655 the merge happens automatically when the type flags are merged
11656 below. */
91e22acd
AS		 11657 break;
11658 case Tag_also_compatible_with:
11659 /* Already done in Tag_CPU_arch. */
11660 break;
11661 case Tag_conformance:
11662 /* Keep the attribute if it matches. Throw it away otherwise.
11663 No attribute means no claim to conform. */
11664 if (!in_attr[i].s || !out_attr[i].s
11665 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11666 out_attr[i].s = NULL;
11667 break;
3cfad14c 11668
91e22acd 11669 default:
e8b36cd1
JM		 11670 result
11671 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 11672 }
11673
11674 /* If out_attr was copied from in_attr then it won't have a type yet. */
11675 if (in_attr[i].type && !out_attr[i].type)
11676 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 11677 }
11678
104d59d1 11679 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 11680 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11681 return FALSE;
ee065d83 11682
104d59d1 11683 /* Check for any attributes not known on ARM. */
e8b36cd1 11684 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 11685
91e22acd 11686 return result;
252b5132
RH		 11687}
11688
3a4a14e9
PB		 11689
11690/* Return TRUE if the two EABI versions are incompatible. */
11691
11692static bfd_boolean
11693elf32_arm_versions_compatible (unsigned iver, unsigned over)
11694{
11695 /* v4 and v5 are the same spec before and after it was released,
11696 so allow mixing them. */
11697 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11698 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11699 return TRUE;
11700
11701 return (iver == over);
11702}
11703
252b5132
RH		 11704/* Merge backend specific data from an object file to the output
11705 object file when linking. */
9b485d32 11706
b34976b6 11707static bfd_boolean
21d799b5 11708elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 11709
9b485d32
NC		 11710/* Display the flags field. */
11711
b34976b6 11712static bfd_boolean
57e8b36a 11713elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 11714{
fc830a83
NC		 11715 FILE * file = (FILE *) ptr;
11716 unsigned long flags;
252b5132
RH		 11717
11718 BFD_ASSERT (abfd != NULL && ptr != NULL);
11719
11720 /* Print normal ELF private data. */
11721 _bfd_elf_print_private_bfd_data (abfd, ptr);
11722
fc830a83 11723 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 11724 /* Ignore init flag - it may not be set, despite the flags field
11725 containing valid data. */
252b5132
RH		 11726
11727 /* xgettext:c-format */
9b485d32 11728 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 11729
fc830a83
NC		 11730 switch (EF_ARM_EABI_VERSION (flags))
11731 {
11732 case EF_ARM_EABI_UNKNOWN:
4cc11e76 11733 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 11734 official ARM ELF extended ABI. Hence they are only decoded if
11735 the EABI version is not set. */
fd2ec330 11736 if (flags & EF_ARM_INTERWORK)
9b485d32 11737 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 11738
fd2ec330 11739 if (flags & EF_ARM_APCS_26)
6c571f00 11740 fprintf (file, " [APCS-26]");
fc830a83 11741 else
6c571f00 11742 fprintf (file, " [APCS-32]");
9a5aca8c 11743
96a846ea
RE		 11744 if (flags & EF_ARM_VFP_FLOAT)
11745 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 11746 else if (flags & EF_ARM_MAVERICK_FLOAT)
11747 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 11748 else
11749 fprintf (file, _(" [FPA float format]"));
11750
fd2ec330 11751 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 11752 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 11753
fd2ec330 11754 if (flags & EF_ARM_PIC)
9b485d32 11755 fprintf (file, _(" [position independent]"));
fc830a83 11756
fd2ec330 11757 if (flags & EF_ARM_NEW_ABI)
9b485d32 11758 fprintf (file, _(" [new ABI]"));
9a5aca8c 11759
fd2ec330 11760 if (flags & EF_ARM_OLD_ABI)
9b485d32 11761 fprintf (file, _(" [old ABI]"));
9a5aca8c 11762
fd2ec330 11763 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 11764 fprintf (file, _(" [software FP]"));
9a5aca8c 11765
96a846ea
RE		 11766 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
11767 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 11768 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
11769 | EF_ARM_MAVERICK_FLOAT);
fc830a83 11770 break;
9a5aca8c 11771
fc830a83 11772 case EF_ARM_EABI_VER1:
9b485d32 11773 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 11774
fc830a83 11775 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 11776 fprintf (file, _(" [sorted symbol table]"));
fc830a83 11777 else
9b485d32 11778 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 11779
fc830a83
NC		 11780 flags &= ~ EF_ARM_SYMSARESORTED;
11781 break;
9a5aca8c 11782
fd2ec330
PB		 11783 case EF_ARM_EABI_VER2:
11784 fprintf (file, _(" [Version2 EABI]"));
11785
11786 if (flags & EF_ARM_SYMSARESORTED)
11787 fprintf (file, _(" [sorted symbol table]"));
11788 else
11789 fprintf (file, _(" [unsorted symbol table]"));
11790
11791 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
11792 fprintf (file, _(" [dynamic symbols use segment index]"));
11793
11794 if (flags & EF_ARM_MAPSYMSFIRST)
11795 fprintf (file, _(" [mapping symbols precede others]"));
11796
99e4ae17 11797 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 11798 | EF_ARM_MAPSYMSFIRST);
11799 break;
11800
d507cf36
PB		 11801 case EF_ARM_EABI_VER3:
11802 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 11803 break;
11804
11805 case EF_ARM_EABI_VER4:
11806 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 11807 goto eabi;
d507cf36 11808
3a4a14e9
PB		 11809 case EF_ARM_EABI_VER5:
11810 fprintf (file, _(" [Version5 EABI]"));
11811 eabi:
d507cf36
PB		 11812 if (flags & EF_ARM_BE8)
11813 fprintf (file, _(" [BE8]"));
11814
11815 if (flags & EF_ARM_LE8)
11816 fprintf (file, _(" [LE8]"));
11817
11818 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
11819 break;
11820
fc830a83 11821 default:
9b485d32 11822 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 11823 break;
11824 }
252b5132 11825
fc830a83 11826 flags &= ~ EF_ARM_EABIMASK;
252b5132 11827
fc830a83 11828 if (flags & EF_ARM_RELEXEC)
9b485d32 11829 fprintf (file, _(" [relocatable executable]"));
252b5132 11830
fc830a83 11831 if (flags & EF_ARM_HASENTRY)
9b485d32 11832 fprintf (file, _(" [has entry point]"));
252b5132 11833
fc830a83
NC		 11834 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
11835
11836 if (flags)
9b485d32 11837 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 11838
252b5132
RH		 11839 fputc ('\n', file);
11840
b34976b6 11841 return TRUE;
252b5132
RH		 11842}
11843
11844static int
57e8b36a 11845elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 11846{
2f0ca46a
NC		 11847 switch (ELF_ST_TYPE (elf_sym->st_info))
11848 {
11849 case STT_ARM_TFUNC:
11850 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 11851
2f0ca46a
NC		 11852 case STT_ARM_16BIT:
11853 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
11854 This allows us to distinguish between data used by Thumb instructions
11855 and non-data (which is probably code) inside Thumb regions of an
11856 executable. */
1a0eb693 11857 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 11858 return ELF_ST_TYPE (elf_sym->st_info);
11859 break;
9a5aca8c 11860
ce855c42
NC		 11861 default:
11862 break;
2f0ca46a
NC		 11863 }
11864
11865 return type;
252b5132 11866}
f21f3fe0 11867
252b5132 11868static asection *
07adf181
AM		 11869elf32_arm_gc_mark_hook (asection *sec,
11870 struct bfd_link_info *info,
11871 Elf_Internal_Rela *rel,
11872 struct elf_link_hash_entry *h,
11873 Elf_Internal_Sym *sym)
252b5132
RH		 11874{
11875 if (h != NULL)
07adf181 11876 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 11877 {
11878 case R_ARM_GNU_VTINHERIT:
11879 case R_ARM_GNU_VTENTRY:
07adf181
AM		 11880 return NULL;
11881 }
9ad5cbcf 11882
07adf181 11883 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 11884}
11885
780a67af
NC		 11886/* Update the got entry reference counts for the section being removed. */
11887
b34976b6 11888static bfd_boolean
ba93b8ac
DJ		 11889elf32_arm_gc_sweep_hook (bfd * abfd,
11890 struct bfd_link_info * info,
11891 asection * sec,
11892 const Elf_Internal_Rela * relocs)
252b5132 11893{
5e681ec4
PB		 11894 Elf_Internal_Shdr *symtab_hdr;
11895 struct elf_link_hash_entry **sym_hashes;
11896 bfd_signed_vma *local_got_refcounts;
11897 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 11898 struct elf32_arm_link_hash_table * globals;
11899
7dda2462
TG		 11900 if (info->relocatable)
11901 return TRUE;
11902
eb043451 11903 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11904 if (globals == NULL)
11905 return FALSE;
5e681ec4
PB		 11906
11907 elf_section_data (sec)->local_dynrel = NULL;
11908
0ffa91dd 11909 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 11910 sym_hashes = elf_sym_hashes (abfd);
11911 local_got_refcounts = elf_local_got_refcounts (abfd);
11912
906e58ca 11913 check_use_blx (globals);
bd97cb95 11914
5e681ec4
PB		 11915 relend = relocs + sec->reloc_count;
11916 for (rel = relocs; rel < relend; rel++)
eb043451 11917 {
3eb128b2
AM		 11918 unsigned long r_symndx;
11919 struct elf_link_hash_entry *h = NULL;
f6e32f6d 11920 struct elf32_arm_link_hash_entry *eh;
eb043451 11921 int r_type;
34e77a92 11922 bfd_boolean call_reloc_p;
f6e32f6d
RS		 11923 bfd_boolean may_become_dynamic_p;
11924 bfd_boolean may_need_local_target_p;
34e77a92
RS		 11925 union gotplt_union *root_plt;
11926 struct arm_plt_info *arm_plt;
5e681ec4 11927
3eb128b2
AM		 11928 r_symndx = ELF32_R_SYM (rel->r_info);
11929 if (r_symndx >= symtab_hdr->sh_info)
11930 {
11931 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11932 while (h->root.type == bfd_link_hash_indirect
11933 || h->root.type == bfd_link_hash_warning)
11934 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11935 }
f6e32f6d
RS		 11936 eh = (struct elf32_arm_link_hash_entry *) h;
11937
34e77a92 11938 call_reloc_p = FALSE;
f6e32f6d
RS		 11939 may_become_dynamic_p = FALSE;
11940 may_need_local_target_p = FALSE;
3eb128b2 11941
eb043451 11942 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 11943 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 11944 switch (r_type)
11945 {
11946 case R_ARM_GOT32:
eb043451 11947 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 11948 case R_ARM_TLS_GD32:
11949 case R_ARM_TLS_IE32:
3eb128b2 11950 if (h != NULL)
eb043451 11951 {
eb043451
PB		 11952 if (h->got.refcount > 0)
11953 h->got.refcount -= 1;
11954 }
11955 else if (local_got_refcounts != NULL)
11956 {
11957 if (local_got_refcounts[r_symndx] > 0)
11958 local_got_refcounts[r_symndx] -= 1;
11959 }
11960 break;
11961
ba93b8ac 11962 case R_ARM_TLS_LDM32:
4dfe6ac6 11963 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 11964 break;
11965
eb043451
PB		 11966 case R_ARM_PC24:
11967 case R_ARM_PLT32:
5b5bb741
PB		 11968 case R_ARM_CALL:
11969 case R_ARM_JUMP24:
eb043451 11970 case R_ARM_PREL31:
c19d1205 11971 case R_ARM_THM_CALL:
bd97cb95
DJ		 11972 case R_ARM_THM_JUMP24:
11973 case R_ARM_THM_JUMP19:
34e77a92 11974 call_reloc_p = TRUE;
f6e32f6d
RS		 11975 may_need_local_target_p = TRUE;
11976 break;
11977
11978 case R_ARM_ABS12:
11979 if (!globals->vxworks_p)
11980 {
11981 may_need_local_target_p = TRUE;
11982 break;
11983 }
11984 /* Fall through. */
11985 case R_ARM_ABS32:
11986 case R_ARM_ABS32_NOI:
11987 case R_ARM_REL32:
11988 case R_ARM_REL32_NOI:
b6895b4f
PB		 11989 case R_ARM_MOVW_ABS_NC:
11990 case R_ARM_MOVT_ABS:
11991 case R_ARM_MOVW_PREL_NC:
11992 case R_ARM_MOVT_PREL:
11993 case R_ARM_THM_MOVW_ABS_NC:
11994 case R_ARM_THM_MOVT_ABS:
11995 case R_ARM_THM_MOVW_PREL_NC:
11996 case R_ARM_THM_MOVT_PREL:
b7693d02 11997 /* Should the interworking branches be here also? */
f6e32f6d 11998 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 11999 && (sec->flags & SEC_ALLOC) != 0)
12000 {
12001 if (h == NULL
12002 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12003 {
12004 call_reloc_p = TRUE;
12005 may_need_local_target_p = TRUE;
12006 }
12007 else
12008 may_become_dynamic_p = TRUE;
12009 }
f6e32f6d
RS		 12010 else
12011 may_need_local_target_p = TRUE;
12012 break;
b7693d02 12013
f6e32f6d
RS		 12014 default:
12015 break;
12016 }
5e681ec4 12017
34e77a92
RS		 12018 if (may_need_local_target_p
12019 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12020 {
34e77a92
RS		 12021 BFD_ASSERT (root_plt->refcount > 0);
12022 root_plt->refcount -= 1;
12023
12024 if (!call_reloc_p)
12025 arm_plt->noncall_refcount--;
5e681ec4 12026
f6e32f6d 12027 if (r_type == R_ARM_THM_CALL)
34e77a92 12028 arm_plt->maybe_thumb_refcount--;
bd97cb95 12029
f6e32f6d
RS		 12030 if (r_type == R_ARM_THM_JUMP24
12031 || r_type == R_ARM_THM_JUMP19)
34e77a92 12032 arm_plt->thumb_refcount--;
f6e32f6d 12033 }
5e681ec4 12034
34e77a92 12035 if (may_become_dynamic_p)
f6e32f6d
RS		 12036 {
12037 struct elf_dyn_relocs **pp;
12038 struct elf_dyn_relocs *p;
5e681ec4 12039
34e77a92 12040 if (h != NULL)
9c489990 12041 pp = &(eh->dyn_relocs);
34e77a92
RS		 12042 else
12043 {
12044 Elf_Internal_Sym *isym;
12045
12046 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12047 abfd, r_symndx);
12048 if (isym == NULL)
12049 return FALSE;
12050 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12051 if (pp == NULL)
12052 return FALSE;
12053 }
9c489990 12054 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12055 if (p->sec == sec)
12056 {
12057 /* Everything must go for SEC. */
12058 *pp = p->next;
12059 break;
12060 }
eb043451
PB		 12061 }
12062 }
5e681ec4 12063
b34976b6 12064 return TRUE;
252b5132
RH		 12065}
12066
780a67af
NC		 12067/* Look through the relocs for a section during the first phase. */
12068
b34976b6 12069static bfd_boolean
57e8b36a
NC		 12070elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12071 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12072{
b34976b6
AM		 12073 Elf_Internal_Shdr *symtab_hdr;
12074 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12075 const Elf_Internal_Rela *rel;
12076 const Elf_Internal_Rela *rel_end;
12077 bfd *dynobj;
5e681ec4 12078 asection *sreloc;
5e681ec4 12079 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12080 bfd_boolean call_reloc_p;
12081 bfd_boolean may_become_dynamic_p;
12082 bfd_boolean may_need_local_target_p;
ce98a316 12083 unsigned long nsyms;
9a5aca8c 12084
1049f94e 12085 if (info->relocatable)
b34976b6 12086 return TRUE;
9a5aca8c 12087
0ffa91dd
NC		 12088 BFD_ASSERT (is_arm_elf (abfd));
12089
5e681ec4 12090 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12091 if (htab == NULL)
12092 return FALSE;
12093
5e681ec4 12094 sreloc = NULL;
9a5aca8c 12095
67687978
PB		 12096 /* Create dynamic sections for relocatable executables so that we can
12097 copy relocations. */
12098 if (htab->root.is_relocatable_executable
12099 && ! htab->root.dynamic_sections_created)
12100 {
12101 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12102 return FALSE;
12103 }
12104
cbc704f3
RS		 12105 if (htab->root.dynobj == NULL)
12106 htab->root.dynobj = abfd;
34e77a92
RS		 12107 if (!create_ifunc_sections (info))
12108 return FALSE;
cbc704f3
RS		 12109
12110 dynobj = htab->root.dynobj;
12111
0ffa91dd 12112 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12113 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 12114 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12115
252b5132
RH		 12116 rel_end = relocs + sec->reloc_count;
12117 for (rel = relocs; rel < rel_end; rel++)
12118 {
34e77a92 12119 Elf_Internal_Sym *isym;
252b5132 12120 struct elf_link_hash_entry *h;
b7693d02 12121 struct elf32_arm_link_hash_entry *eh;
252b5132 12122 unsigned long r_symndx;
eb043451 12123 int r_type;
9a5aca8c 12124
252b5132 12125 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12126 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12127 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12128
ce98a316
NC		 12129 if (r_symndx >= nsyms
12130 /* PR 9934: It is possible to have relocations that do not
12131 refer to symbols, thus it is also possible to have an
12132 object file containing relocations but no symbol table. */
cf35638d 12133 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12134 {
12135 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12136 r_symndx);
ba93b8ac
DJ		 12137 return FALSE;
12138 }
12139
34e77a92
RS		 12140 h = NULL;
12141 isym = NULL;
12142 if (nsyms > 0)
973a3492 12143 {
34e77a92
RS		 12144 if (r_symndx < symtab_hdr->sh_info)
12145 {
12146 /* A local symbol. */
12147 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12148 abfd, r_symndx);
12149 if (isym == NULL)
12150 return FALSE;
12151 }
12152 else
12153 {
12154 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12155 while (h->root.type == bfd_link_hash_indirect
12156 || h->root.type == bfd_link_hash_warning)
12157 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12158 }
973a3492 12159 }
9a5aca8c 12160
b7693d02
DJ		 12161 eh = (struct elf32_arm_link_hash_entry *) h;
12162
f6e32f6d
RS		 12163 call_reloc_p = FALSE;
12164 may_become_dynamic_p = FALSE;
12165 may_need_local_target_p = FALSE;
12166
0855e32b
NS		 12167 /* Could be done earlier, if h were already available. */
12168 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12169 switch (r_type)
252b5132 12170 {
5e681ec4 12171 case R_ARM_GOT32:
eb043451 12172 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12173 case R_ARM_TLS_GD32:
12174 case R_ARM_TLS_IE32:
0855e32b
NS		 12175 case R_ARM_TLS_GOTDESC:
12176 case R_ARM_TLS_DESCSEQ:
12177 case R_ARM_THM_TLS_DESCSEQ:
12178 case R_ARM_TLS_CALL:
12179 case R_ARM_THM_TLS_CALL:
5e681ec4 12180 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12181 {
12182 int tls_type, old_tls_type;
5e681ec4 12183
ba93b8ac
DJ		 12184 switch (r_type)
12185 {
12186 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
0855e32b 12187
ba93b8ac 12188 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
0855e32b
NS		 12189
12190 case R_ARM_TLS_GOTDESC:
12191 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12192 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12193 tls_type = GOT_TLS_GDESC; break;
12194
ba93b8ac
DJ		 12195 default: tls_type = GOT_NORMAL; break;
12196 }
252b5132 12197
ba93b8ac
DJ		 12198 if (h != NULL)
12199 {
12200 h->got.refcount++;
12201 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12202 }
12203 else
12204 {
ba93b8ac 12205 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12206 if (!elf32_arm_allocate_local_sym_info (abfd))
12207 return FALSE;
12208 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12209 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12210 }
12211
0855e32b
NS		 12212 /* If a variable is accessed with both tls methods, two
12213 slots may be created. */
12214 if (GOT_TLS_GD_ANY_P (old_tls_type)
12215 && GOT_TLS_GD_ANY_P (tls_type))
12216 tls_type |= old_tls_type;
12217
12218 /* We will already have issued an error message if there
12219 is a TLS/non-TLS mismatch, based on the symbol
12220 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12221 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12222 && tls_type != GOT_NORMAL)
12223 tls_type |= old_tls_type;
12224
0855e32b
NS		 12225 /* If the symbol is accessed in both IE and GDESC
12226 method, we're able to relax. Turn off the GDESC flag,
12227 without messing up with any other kind of tls types
12228 that may be involved */
12229 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12230 tls_type &= ~GOT_TLS_GDESC;
12231
ba93b8ac
DJ		 12232 if (old_tls_type != tls_type)
12233 {
12234 if (h != NULL)
12235 elf32_arm_hash_entry (h)->tls_type = tls_type;
12236 else
12237 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12238 }
12239 }
8029a119 12240 /* Fall through. */
ba93b8ac
DJ		 12241
12242 case R_ARM_TLS_LDM32:
12243 if (r_type == R_ARM_TLS_LDM32)
12244 htab->tls_ldm_got.refcount++;
8029a119 12245 /* Fall through. */
252b5132 12246
c19d1205 12247 case R_ARM_GOTOFF32:
5e681ec4 12248 case R_ARM_GOTPC:
cbc704f3
RS		 12249 if (htab->root.sgot == NULL
12250 && !create_got_section (htab->root.dynobj, info))
12251 return FALSE;
252b5132
RH		 12252 break;
12253
252b5132 12254 case R_ARM_PC24:
7359ea65 12255 case R_ARM_PLT32:
5b5bb741
PB		 12256 case R_ARM_CALL:
12257 case R_ARM_JUMP24:
eb043451 12258 case R_ARM_PREL31:
c19d1205 12259 case R_ARM_THM_CALL:
bd97cb95
DJ		 12260 case R_ARM_THM_JUMP24:
12261 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12262 call_reloc_p = TRUE;
12263 may_need_local_target_p = TRUE;
12264 break;
12265
12266 case R_ARM_ABS12:
12267 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12268 ldr __GOTT_INDEX__ offsets. */
12269 if (!htab->vxworks_p)
12270 {
12271 may_need_local_target_p = TRUE;
12272 break;
12273 }
12274 /* Fall through. */
39623e12 12275
96c23d59
JM		 12276 case R_ARM_MOVW_ABS_NC:
12277 case R_ARM_MOVT_ABS:
12278 case R_ARM_THM_MOVW_ABS_NC:
12279 case R_ARM_THM_MOVT_ABS:
12280 if (info->shared)
12281 {
12282 (*_bfd_error_handler)
12283 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12284 abfd, elf32_arm_howto_table_1[r_type].name,
12285 (h) ? h->root.root.string : "a local symbol");
12286 bfd_set_error (bfd_error_bad_value);
12287 return FALSE;
12288 }
12289
12290 /* Fall through. */
39623e12
PB		 12291 case R_ARM_ABS32:
12292 case R_ARM_ABS32_NOI:
12293 case R_ARM_REL32:
12294 case R_ARM_REL32_NOI:
b6895b4f
PB		 12295 case R_ARM_MOVW_PREL_NC:
12296 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12297 case R_ARM_THM_MOVW_PREL_NC:
12298 case R_ARM_THM_MOVT_PREL:
39623e12 12299
b7693d02 12300 /* Should the interworking branches be listed here? */
67687978 12301 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12302 && (sec->flags & SEC_ALLOC) != 0)
12303 {
12304 if (h == NULL
12305 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12306 {
12307 /* In shared libraries and relocatable executables,
12308 we treat local relative references as calls;
12309 see the related SYMBOL_CALLS_LOCAL code in
12310 allocate_dynrelocs. */
12311 call_reloc_p = TRUE;
12312 may_need_local_target_p = TRUE;
12313 }
12314 else
12315 /* We are creating a shared library or relocatable
12316 executable, and this is a reloc against a global symbol,
12317 or a non-PC-relative reloc against a local symbol.
12318 We may need to copy the reloc into the output. */
12319 may_become_dynamic_p = TRUE;
12320 }
f6e32f6d
RS		 12321 else
12322 may_need_local_target_p = TRUE;
252b5132
RH		 12323 break;
12324
12325 /* This relocation describes the C++ object vtable hierarchy.
12326 Reconstruct it for later use during GC. */
12327 case R_ARM_GNU_VTINHERIT:
c152c796 12328 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 12329 return FALSE;
252b5132 12330 break;
9a5aca8c 12331
252b5132
RH		 12332 /* This relocation describes which C++ vtable entries are actually
12333 used. Record for later use during GC. */
12334 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 12335 BFD_ASSERT (h != NULL);
12336 if (h != NULL
12337 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 12338 return FALSE;
252b5132
RH		 12339 break;
12340 }
f6e32f6d
RS		 12341
12342 if (h != NULL)
12343 {
12344 if (call_reloc_p)
12345 /* We may need a .plt entry if the function this reloc
12346 refers to is in a different object, regardless of the
12347 symbol's type. We can't tell for sure yet, because
12348 something later might force the symbol local. */
12349 h->needs_plt = 1;
12350 else if (may_need_local_target_p)
12351 /* If this reloc is in a read-only section, we might
12352 need a copy reloc. We can't check reliably at this
12353 stage whether the section is read-only, as input
12354 sections have not yet been mapped to output sections.
12355 Tentatively set the flag for now, and correct in
12356 adjust_dynamic_symbol. */
12357 h->non_got_ref = 1;
12358 }
12359
34e77a92
RS		 12360 if (may_need_local_target_p
12361 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12362 {
34e77a92
RS		 12363 union gotplt_union *root_plt;
12364 struct arm_plt_info *arm_plt;
12365 struct arm_local_iplt_info *local_iplt;
12366
12367 if (h != NULL)
12368 {
12369 root_plt = &h->plt;
12370 arm_plt = &eh->plt;
12371 }
12372 else
12373 {
12374 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12375 if (local_iplt == NULL)
12376 return FALSE;
12377 root_plt = &local_iplt->root;
12378 arm_plt = &local_iplt->arm;
12379 }
12380
f6e32f6d
RS		 12381 /* If the symbol is a function that doesn't bind locally,
12382 this relocation will need a PLT entry. */
34e77a92
RS		 12383 root_plt->refcount += 1;
12384
12385 if (!call_reloc_p)
12386 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12387
12388 /* It's too early to use htab->use_blx here, so we have to
12389 record possible blx references separately from
12390 relocs that definitely need a thumb stub. */
12391
12392 if (r_type == R_ARM_THM_CALL)
34e77a92 12393 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12394
12395 if (r_type == R_ARM_THM_JUMP24
12396 || r_type == R_ARM_THM_JUMP19)
34e77a92 12397 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12398 }
12399
12400 if (may_become_dynamic_p)
12401 {
12402 struct elf_dyn_relocs *p, **head;
12403
12404 /* Create a reloc section in dynobj. */
12405 if (sreloc == NULL)
12406 {
12407 sreloc = _bfd_elf_make_dynamic_reloc_section
12408 (sec, dynobj, 2, abfd, ! htab->use_rel);
12409
12410 if (sreloc == NULL)
12411 return FALSE;
12412
12413 /* BPABI objects never have dynamic relocations mapped. */
12414 if (htab->symbian_p)
12415 {
12416 flagword flags;
12417
12418 flags = bfd_get_section_flags (dynobj, sreloc);
12419 flags &= ~(SEC_LOAD | SEC_ALLOC);
12420 bfd_set_section_flags (dynobj, sreloc, flags);
12421 }
12422 }
12423
12424 /* If this is a global symbol, count the number of
12425 relocations we need for this symbol. */
12426 if (h != NULL)
12427 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12428 else
12429 {
34e77a92
RS		 12430 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12431 if (head == NULL)
f6e32f6d 12432 return FALSE;
f6e32f6d
RS		 12433 }
12434
12435 p = *head;
12436 if (p == NULL || p->sec != sec)
12437 {
12438 bfd_size_type amt = sizeof *p;
12439
12440 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12441 if (p == NULL)
12442 return FALSE;
12443 p->next = *head;
12444 *head = p;
12445 p->sec = sec;
12446 p->count = 0;
12447 p->pc_count = 0;
12448 }
12449
12450 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12451 p->pc_count += 1;
12452 p->count += 1;
12453 }
252b5132 12454 }
f21f3fe0 12455
b34976b6 12456 return TRUE;
252b5132
RH		 12457}
12458
6a5bb875
PB		 12459/* Unwinding tables are not referenced directly. This pass marks them as
12460 required if the corresponding code section is marked. */
12461
12462static bfd_boolean
906e58ca
NC		 12463elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12464 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12465{
12466 bfd *sub;
12467 Elf_Internal_Shdr **elf_shdrp;
12468 bfd_boolean again;
12469
12470 /* Marking EH data may cause additional code sections to be marked,
12471 requiring multiple passes. */
12472 again = TRUE;
12473 while (again)
12474 {
12475 again = FALSE;
12476 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12477 {
12478 asection *o;
12479
0ffa91dd 12480 if (! is_arm_elf (sub))
6a5bb875
PB		 12481 continue;
12482
12483 elf_shdrp = elf_elfsections (sub);
12484 for (o = sub->sections; o != NULL; o = o->next)
12485 {
12486 Elf_Internal_Shdr *hdr;
0ffa91dd 12487
6a5bb875 12488 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 12489 if (hdr->sh_type == SHT_ARM_EXIDX
12490 && hdr->sh_link
12491 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 12492 && !o->gc_mark
12493 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12494 {
12495 again = TRUE;
12496 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12497 return FALSE;
12498 }
12499 }
12500 }
12501 }
12502
12503 return TRUE;
12504}
12505
3c9458e9
NC		 12506/* Treat mapping symbols as special target symbols. */
12507
12508static bfd_boolean
12509elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12510{
b0796911
PB		 12511 return bfd_is_arm_special_symbol_name (sym->name,
12512 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 12513}
12514
0367ecfb
NC		 12515/* This is a copy of elf_find_function() from elf.c except that
12516 ARM mapping symbols are ignored when looking for function names
12517 and STT_ARM_TFUNC is considered to a function type. */
252b5132 12518
0367ecfb
NC		 12519static bfd_boolean
12520arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12521 asection * section,
12522 asymbol ** symbols,
12523 bfd_vma offset,
12524 const char ** filename_ptr,
12525 const char ** functionname_ptr)
12526{
12527 const char * filename = NULL;
12528 asymbol * func = NULL;
12529 bfd_vma low_func = 0;
12530 asymbol ** p;
252b5132
RH		 12531
12532 for (p = symbols; *p != NULL; p++)
12533 {
12534 elf_symbol_type *q;
12535
12536 q = (elf_symbol_type *) *p;
12537
252b5132
RH		 12538 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12539 {
12540 default:
12541 break;
12542 case STT_FILE:
12543 filename = bfd_asymbol_name (&q->symbol);
12544 break;
252b5132
RH		 12545 case STT_FUNC:
12546 case STT_ARM_TFUNC:
9d2da7ca 12547 case STT_NOTYPE:
b0796911 12548 /* Skip mapping symbols. */
0367ecfb 12549 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 12550 && bfd_is_arm_special_symbol_name (q->symbol.name,
12551 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 12552 continue;
12553 /* Fall through. */
6b40fcba 12554 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 12555 && q->symbol.value >= low_func
12556 && q->symbol.value <= offset)
12557 {
12558 func = (asymbol *) q;
12559 low_func = q->symbol.value;
12560 }
12561 break;
12562 }
12563 }
12564
12565 if (func == NULL)
b34976b6 12566 return FALSE;
252b5132 12567
0367ecfb
NC		 12568 if (filename_ptr)
12569 *filename_ptr = filename;
12570 if (functionname_ptr)
12571 *functionname_ptr = bfd_asymbol_name (func);
12572
12573 return TRUE;
906e58ca 12574}
0367ecfb
NC		 12575
12576
12577/* Find the nearest line to a particular section and offset, for error
12578 reporting. This code is a duplicate of the code in elf.c, except
12579 that it uses arm_elf_find_function. */
12580
12581static bfd_boolean
12582elf32_arm_find_nearest_line (bfd * abfd,
12583 asection * section,
12584 asymbol ** symbols,
12585 bfd_vma offset,
12586 const char ** filename_ptr,
12587 const char ** functionname_ptr,
12588 unsigned int * line_ptr)
12589{
12590 bfd_boolean found = FALSE;
12591
12592 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12593
12594 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
12595 filename_ptr, functionname_ptr,
12596 line_ptr, 0,
12597 & elf_tdata (abfd)->dwarf2_find_line_info))
12598 {
12599 if (!*functionname_ptr)
12600 arm_elf_find_function (abfd, section, symbols, offset,
12601 *filename_ptr ? NULL : filename_ptr,
12602 functionname_ptr);
f21f3fe0 12603
0367ecfb
NC		 12604 return TRUE;
12605 }
12606
12607 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12608 & found, filename_ptr,
12609 functionname_ptr, line_ptr,
12610 & elf_tdata (abfd)->line_info))
12611 return FALSE;
12612
12613 if (found && (*functionname_ptr || *line_ptr))
12614 return TRUE;
12615
12616 if (symbols == NULL)
12617 return FALSE;
12618
12619 if (! arm_elf_find_function (abfd, section, symbols, offset,
12620 filename_ptr, functionname_ptr))
12621 return FALSE;
12622
12623 *line_ptr = 0;
b34976b6 12624 return TRUE;
252b5132
RH		 12625}
12626
4ab527b0
FF		 12627static bfd_boolean
12628elf32_arm_find_inliner_info (bfd * abfd,
12629 const char ** filename_ptr,
12630 const char ** functionname_ptr,
12631 unsigned int * line_ptr)
12632{
12633 bfd_boolean found;
12634 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12635 functionname_ptr, line_ptr,
12636 & elf_tdata (abfd)->dwarf2_find_line_info);
12637 return found;
12638}
12639
252b5132
RH		 12640/* Adjust a symbol defined by a dynamic object and referenced by a
12641 regular object. The current definition is in some section of the
12642 dynamic object, but we're not including those sections. We have to
12643 change the definition to something the rest of the link can
12644 understand. */
12645
b34976b6 12646static bfd_boolean
57e8b36a
NC		 12647elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12648 struct elf_link_hash_entry * h)
252b5132
RH		 12649{
12650 bfd * dynobj;
12651 asection * s;
b7693d02 12652 struct elf32_arm_link_hash_entry * eh;
67687978 12653 struct elf32_arm_link_hash_table *globals;
252b5132 12654
67687978 12655 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12656 if (globals == NULL)
12657 return FALSE;
12658
252b5132
RH		 12659 dynobj = elf_hash_table (info)->dynobj;
12660
12661 /* Make sure we know what is going on here. */
12662 BFD_ASSERT (dynobj != NULL
f5385ebf 12663 && (h->needs_plt
34e77a92 12664 || h->type == STT_GNU_IFUNC
f6e332e6 12665 || h->u.weakdef != NULL
f5385ebf
AM		 12666 || (h->def_dynamic
12667 && h->ref_regular
12668 && !h->def_regular)));
252b5132 12669
b7693d02
DJ		 12670 eh = (struct elf32_arm_link_hash_entry *) h;
12671
252b5132
RH		 12672 /* If this is a function, put it in the procedure linkage table. We
12673 will fill in the contents of the procedure linkage table later,
12674 when we know the address of the .got section. */
34e77a92 12675 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 12676 {
34e77a92
RS		 12677 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12678 symbol binds locally. */
5e681ec4 12679 if (h->plt.refcount <= 0
34e77a92
RS		 12680 || (h->type != STT_GNU_IFUNC
12681 && (SYMBOL_CALLS_LOCAL (info, h)
12682 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12683 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 12684 {
12685 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 12686 file, but the symbol was never referred to by a dynamic
12687 object, or if all references were garbage collected. In
12688 such a case, we don't actually need to build a procedure
12689 linkage table, and we can just do a PC24 reloc instead. */
12690 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 12691 eh->plt.thumb_refcount = 0;
12692 eh->plt.maybe_thumb_refcount = 0;
12693 eh->plt.noncall_refcount = 0;
f5385ebf 12694 h->needs_plt = 0;
252b5132
RH		 12695 }
12696
b34976b6 12697 return TRUE;
252b5132 12698 }
5e681ec4 12699 else
b7693d02
DJ		 12700 {
12701 /* It's possible that we incorrectly decided a .plt reloc was
12702 needed for an R_ARM_PC24 or similar reloc to a non-function sym
12703 in check_relocs. We can't decide accurately between function
12704 and non-function syms in check-relocs; Objects loaded later in
12705 the link may change h->type. So fix it now. */
12706 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 12707 eh->plt.thumb_refcount = 0;
12708 eh->plt.maybe_thumb_refcount = 0;
12709 eh->plt.noncall_refcount = 0;
b7693d02 12710 }
252b5132
RH		 12711
12712 /* If this is a weak symbol, and there is a real definition, the
12713 processor independent code will have arranged for us to see the
12714 real definition first, and we can just use the same value. */
f6e332e6 12715 if (h->u.weakdef != NULL)
252b5132 12716 {
f6e332e6
AM		 12717 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
12718 || h->u.weakdef->root.type == bfd_link_hash_defweak);
12719 h->root.u.def.section = h->u.weakdef->root.u.def.section;
12720 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 12721 return TRUE;
252b5132
RH		 12722 }
12723
ba93b8ac
DJ		 12724 /* If there are no non-GOT references, we do not need a copy
12725 relocation. */
12726 if (!h->non_got_ref)
12727 return TRUE;
12728
252b5132
RH		 12729 /* This is a reference to a symbol defined by a dynamic object which
12730 is not a function. */
12731
12732 /* If we are creating a shared library, we must presume that the
12733 only references to the symbol are via the global offset table.
12734 For such cases we need not do anything here; the relocations will
67687978
PB		 12735 be handled correctly by relocate_section. Relocatable executables
12736 can reference data in shared objects directly, so we don't need to
12737 do anything here. */
12738 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 12739 return TRUE;
252b5132 12740
909272ee
AM		 12741 if (h->size == 0)
12742 {
12743 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
12744 h->root.root.string);
12745 return TRUE;
12746 }
12747
252b5132
RH		 12748 /* We must allocate the symbol in our .dynbss section, which will
12749 become part of the .bss section of the executable. There will be
12750 an entry for this symbol in the .dynsym section. The dynamic
12751 object will contain position independent code, so all references
12752 from the dynamic object to this symbol will go through the global
12753 offset table. The dynamic linker will use the .dynsym entry to
12754 determine the address it must put in the global offset table, so
12755 both the dynamic object and the regular object will refer to the
12756 same memory location for the variable. */
252b5132
RH		 12757 s = bfd_get_section_by_name (dynobj, ".dynbss");
12758 BFD_ASSERT (s != NULL);
12759
12760 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
12761 copy the initial value out of the dynamic object and into the
12762 runtime process image. We need to remember the offset into the
00a97672 12763 .rel(a).bss section we are going to use. */
252b5132
RH		 12764 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
12765 {
12766 asection *srel;
12767
00a97672 12768 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 12769 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 12770 h->needs_copy = 1;
252b5132
RH		 12771 }
12772
027297b7 12773 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 12774}
12775
5e681ec4
PB		 12776/* Allocate space in .plt, .got and associated reloc sections for
12777 dynamic relocs. */
12778
12779static bfd_boolean
47beaa6a 12780allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 12781{
12782 struct bfd_link_info *info;
12783 struct elf32_arm_link_hash_table *htab;
12784 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 12785 struct elf_dyn_relocs *p;
5e681ec4
PB		 12786
12787 if (h->root.type == bfd_link_hash_indirect)
12788 return TRUE;
12789
12790 if (h->root.type == bfd_link_hash_warning)
12791 /* When warning symbols are created, they **replace** the "real"
12792 entry in the hash table, thus we never get to see the real
12793 symbol in a hash traversal. So look at it now. */
12794 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12795
e6a6bb22
AM		 12796 eh = (struct elf32_arm_link_hash_entry *) h;
12797
5e681ec4
PB		 12798 info = (struct bfd_link_info *) inf;
12799 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12800 if (htab == NULL)
12801 return FALSE;
5e681ec4 12802
34e77a92 12803 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 12804 && h->plt.refcount > 0)
12805 {
12806 /* Make sure this symbol is output as a dynamic symbol.
12807 Undefined weak syms won't yet be marked as dynamic. */
12808 if (h->dynindx == -1
f5385ebf 12809 && !h->forced_local)
5e681ec4 12810 {
c152c796 12811 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12812 return FALSE;
12813 }
12814
34e77a92
RS		 12815 /* If the call in the PLT entry binds locally, the associated
12816 GOT entry should use an R_ARM_IRELATIVE relocation instead of
12817 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
12818 than the .plt section. */
12819 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
12820 {
12821 eh->is_iplt = 1;
12822 if (eh->plt.noncall_refcount == 0
12823 && SYMBOL_REFERENCES_LOCAL (info, h))
12824 /* All non-call references can be resolved directly.
12825 This means that they can (and in some cases, must)
12826 resolve directly to the run-time target, rather than
12827 to the PLT. That in turns means that any .got entry
12828 would be equal to the .igot.plt entry, so there's
12829 no point having both. */
12830 h->got.refcount = 0;
12831 }
12832
5e681ec4 12833 if (info->shared
34e77a92 12834 || eh->is_iplt
7359ea65 12835 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 12836 {
34e77a92 12837 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 12838
5e681ec4
PB		 12839 /* If this symbol is not defined in a regular file, and we are
12840 not generating a shared library, then set the symbol to this
12841 location in the .plt. This is required to make function
12842 pointers compare as equal between the normal executable and
12843 the shared library. */
12844 if (! info->shared
f5385ebf 12845 && !h->def_regular)
5e681ec4 12846 {
34e77a92 12847 h->root.u.def.section = htab->root.splt;
5e681ec4 12848 h->root.u.def.value = h->plt.offset;
5e681ec4 12849
67d74e43
DJ		 12850 /* Make sure the function is not marked as Thumb, in case
12851 it is the target of an ABS32 relocation, which will
12852 point to the PLT entry. */
35fc36a8 12853 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 12854 }
022f8312 12855
0855e32b 12856 htab->next_tls_desc_index++;
00a97672
RS		 12857
12858 /* VxWorks executables have a second set of relocations for
12859 each PLT entry. They go in a separate relocation section,
12860 which is processed by the kernel loader. */
12861 if (htab->vxworks_p && !info->shared)
12862 {
12863 /* There is a relocation for the initial PLT entry:
12864 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
12865 if (h->plt.offset == htab->plt_header_size)
47beaa6a 12866 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 12867
12868 /* There are two extra relocations for each subsequent
12869 PLT entry: an R_ARM_32 relocation for the GOT entry,
12870 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 12871 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 12872 }
5e681ec4
PB		 12873 }
12874 else
12875 {
12876 h->plt.offset = (bfd_vma) -1;
f5385ebf 12877 h->needs_plt = 0;
5e681ec4
PB		 12878 }
12879 }
12880 else
12881 {
12882 h->plt.offset = (bfd_vma) -1;
f5385ebf 12883 h->needs_plt = 0;
5e681ec4
PB		 12884 }
12885
0855e32b
NS		 12886 eh = (struct elf32_arm_link_hash_entry *) h;
12887 eh->tlsdesc_got = (bfd_vma) -1;
12888
5e681ec4
PB		 12889 if (h->got.refcount > 0)
12890 {
12891 asection *s;
12892 bfd_boolean dyn;
ba93b8ac
DJ		 12893 int tls_type = elf32_arm_hash_entry (h)->tls_type;
12894 int indx;
5e681ec4
PB		 12895
12896 /* Make sure this symbol is output as a dynamic symbol.
12897 Undefined weak syms won't yet be marked as dynamic. */
12898 if (h->dynindx == -1
f5385ebf 12899 && !h->forced_local)
5e681ec4 12900 {
c152c796 12901 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12902 return FALSE;
12903 }
12904
e5a52504
MM		 12905 if (!htab->symbian_p)
12906 {
362d30a1 12907 s = htab->root.sgot;
e5a52504 12908 h->got.offset = s->size;
ba93b8ac
DJ		 12909
12910 if (tls_type == GOT_UNKNOWN)
12911 abort ();
12912
12913 if (tls_type == GOT_NORMAL)
12914 /* Non-TLS symbols need one GOT slot. */
12915 s->size += 4;
12916 else
12917 {
0855e32b
NS		 12918 if (tls_type & GOT_TLS_GDESC)
12919 {
12920 /* R_ARM_TLS_DESC needs 2 GOT slots. */
12921 eh->tlsdesc_got
12922 = (htab->root.sgotplt->size
12923 - elf32_arm_compute_jump_table_size (htab));
12924 htab->root.sgotplt->size += 8;
12925 h->got.offset = (bfd_vma) -2;
34e77a92 12926 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 12927 reloc in the middle of .got.plt. */
12928 htab->num_tls_desc++;
12929 }
12930
ba93b8ac 12931 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 12932 {
12933 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
12934 the symbol is both GD and GDESC, got.offset may
12935 have been overwritten. */
12936 h->got.offset = s->size;
12937 s->size += 8;
12938 }
12939
ba93b8ac
DJ		 12940 if (tls_type & GOT_TLS_IE)
12941 /* R_ARM_TLS_IE32 needs one GOT slot. */
12942 s->size += 4;
12943 }
12944
e5a52504 12945 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 12946
12947 indx = 0;
12948 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
12949 && (!info->shared
12950 || !SYMBOL_REFERENCES_LOCAL (info, h)))
12951 indx = h->dynindx;
12952
12953 if (tls_type != GOT_NORMAL
12954 && (info->shared || indx != 0)
12955 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
12956 || h->root.type != bfd_link_hash_undefweak))
12957 {
12958 if (tls_type & GOT_TLS_IE)
47beaa6a 12959 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 12960
12961 if (tls_type & GOT_TLS_GD)
47beaa6a 12962 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 12963
0855e32b
NS		 12964 if (tls_type & GOT_TLS_GDESC)
12965 {
47beaa6a 12966 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 12967 /* GDESC needs a trampoline to jump to. */
12968 htab->tls_trampoline = -1;
12969 }
12970
12971 /* Only GD needs it. GDESC just emits one relocation per
12972 2 entries. */
12973 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 12974 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 12975 }
b436d854
RS		 12976 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
12977 {
12978 if (htab->root.dynamic_sections_created)
12979 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
12980 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
12981 }
34e77a92
RS		 12982 else if (h->type == STT_GNU_IFUNC
12983 && eh->plt.noncall_refcount == 0)
12984 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
12985 they all resolve dynamically instead. Reserve room for the
12986 GOT entry's R_ARM_IRELATIVE relocation. */
12987 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
b436d854
RS		 12988 else if (info->shared)
12989 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 12990 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 12991 }
5e681ec4
PB		 12992 }
12993 else
12994 h->got.offset = (bfd_vma) -1;
12995
a4fd1a8e
PB		 12996 /* Allocate stubs for exported Thumb functions on v4t. */
12997 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 12998 && h->def_regular
35fc36a8 12999 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13000 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13001 {
13002 struct elf_link_hash_entry * th;
13003 struct bfd_link_hash_entry * bh;
13004 struct elf_link_hash_entry * myh;
13005 char name[1024];
13006 asection *s;
13007 bh = NULL;
13008 /* Create a new symbol to regist the real location of the function. */
13009 s = h->root.u.def.section;
906e58ca 13010 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13011 _bfd_generic_link_add_one_symbol (info, s->owner,
13012 name, BSF_GLOBAL, s,
13013 h->root.u.def.value,
13014 NULL, TRUE, FALSE, &bh);
13015
13016 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13017 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13018 myh->forced_local = 1;
35fc36a8 13019 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13020 eh->export_glue = myh;
13021 th = record_arm_to_thumb_glue (info, h);
13022 /* Point the symbol at the stub. */
13023 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13024 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13025 h->root.u.def.section = th->root.u.def.section;
13026 h->root.u.def.value = th->root.u.def.value & ~1;
13027 }
13028
0bdcacaf 13029 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13030 return TRUE;
13031
13032 /* In the shared -Bsymbolic case, discard space allocated for
13033 dynamic pc-relative relocs against symbols which turn out to be
13034 defined in regular objects. For the normal shared case, discard
13035 space for pc-relative relocs that have become local due to symbol
13036 visibility changes. */
13037
67687978 13038 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13039 {
7bdca076 13040 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 13041 R_ARM_REL32_NOI, which will appear on something like
13042 ".long foo - .". We want calls to protected symbols to resolve
13043 directly to the function rather than going via the plt. If people
13044 want function pointer comparisons to work as expected then they
13045 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13046 if (SYMBOL_CALLS_LOCAL (info, h))
13047 {
0bdcacaf 13048 struct elf_dyn_relocs **pp;
ba93b8ac 13049
0bdcacaf 13050 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13051 {
13052 p->count -= p->pc_count;
13053 p->pc_count = 0;
13054 if (p->count == 0)
13055 *pp = p->next;
13056 else
13057 pp = &p->next;
13058 }
13059 }
13060
4dfe6ac6 13061 if (htab->vxworks_p)
3348747a 13062 {
0bdcacaf 13063 struct elf_dyn_relocs **pp;
3348747a 13064
0bdcacaf 13065 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13066 {
0bdcacaf 13067 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13068 *pp = p->next;
13069 else
13070 pp = &p->next;
13071 }
13072 }
13073
ba93b8ac 13074 /* Also discard relocs on undefined weak syms with non-default
7359ea65 13075 visibility. */
0bdcacaf 13076 if (eh->dyn_relocs != NULL
5e681ec4 13077 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13078 {
13079 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13080 eh->dyn_relocs = NULL;
22d606e9
AM		 13081
13082 /* Make sure undefined weak symbols are output as a dynamic
13083 symbol in PIEs. */
13084 else if (h->dynindx == -1
13085 && !h->forced_local)
13086 {
13087 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13088 return FALSE;
13089 }
13090 }
13091
67687978
PB		 13092 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13093 && h->root.type == bfd_link_hash_new)
13094 {
13095 /* Output absolute symbols so that we can create relocations
13096 against them. For normal symbols we output a relocation
13097 against the section that contains them. */
13098 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13099 return FALSE;
13100 }
13101
5e681ec4
PB		 13102 }
13103 else
13104 {
13105 /* For the non-shared case, discard space for relocs against
13106 symbols which turn out to need copy relocs or are not
13107 dynamic. */
13108
f5385ebf
AM		 13109 if (!h->non_got_ref
13110 && ((h->def_dynamic
13111 && !h->def_regular)
5e681ec4
PB		 13112 || (htab->root.dynamic_sections_created
13113 && (h->root.type == bfd_link_hash_undefweak
13114 || h->root.type == bfd_link_hash_undefined))))
13115 {
13116 /* Make sure this symbol is output as a dynamic symbol.
13117 Undefined weak syms won't yet be marked as dynamic. */
13118 if (h->dynindx == -1
f5385ebf 13119 && !h->forced_local)
5e681ec4 13120 {
c152c796 13121 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13122 return FALSE;
13123 }
13124
13125 /* If that succeeded, we know we'll be keeping all the
13126 relocs. */
13127 if (h->dynindx != -1)
13128 goto keep;
13129 }
13130
0bdcacaf 13131 eh->dyn_relocs = NULL;
5e681ec4
PB		 13132
13133 keep: ;
13134 }
13135
13136 /* Finally, allocate space. */
0bdcacaf 13137 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13138 {
0bdcacaf 13139 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13140 if (h->type == STT_GNU_IFUNC
13141 && eh->plt.noncall_refcount == 0
13142 && SYMBOL_REFERENCES_LOCAL (info, h))
13143 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13144 else
13145 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13146 }
13147
13148 return TRUE;
13149}
13150
08d1f311
DJ		 13151/* Find any dynamic relocs that apply to read-only sections. */
13152
13153static bfd_boolean
8029a119 13154elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13155{
8029a119 13156 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13157 struct elf_dyn_relocs * p;
08d1f311
DJ		 13158
13159 if (h->root.type == bfd_link_hash_warning)
13160 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13161
13162 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13163 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13164 {
0bdcacaf 13165 asection *s = p->sec;
08d1f311
DJ		 13166
13167 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13168 {
13169 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13170
13171 info->flags |= DF_TEXTREL;
13172
13173 /* Not an error, just cut short the traversal. */
13174 return FALSE;
13175 }
13176 }
13177 return TRUE;
13178}
13179
d504ffc8
DJ		 13180void
13181bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13182 int byteswap_code)
13183{
13184 struct elf32_arm_link_hash_table *globals;
13185
13186 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13187 if (globals == NULL)
13188 return;
13189
d504ffc8
DJ		 13190 globals->byteswap_code = byteswap_code;
13191}
13192
252b5132
RH		 13193/* Set the sizes of the dynamic sections. */
13194
b34976b6 13195static bfd_boolean
57e8b36a
NC		 13196elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13197 struct bfd_link_info * info)
252b5132
RH		 13198{
13199 bfd * dynobj;
13200 asection * s;
b34976b6
AM		 13201 bfd_boolean plt;
13202 bfd_boolean relocs;
5e681ec4
PB		 13203 bfd *ibfd;
13204 struct elf32_arm_link_hash_table *htab;
252b5132 13205
5e681ec4 13206 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13207 if (htab == NULL)
13208 return FALSE;
13209
252b5132
RH		 13210 dynobj = elf_hash_table (info)->dynobj;
13211 BFD_ASSERT (dynobj != NULL);
39b41c9c 13212 check_use_blx (htab);
252b5132
RH		 13213
13214 if (elf_hash_table (info)->dynamic_sections_created)
13215 {
13216 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13217 if (info->executable)
252b5132
RH		 13218 {
13219 s = bfd_get_section_by_name (dynobj, ".interp");
13220 BFD_ASSERT (s != NULL);
eea6121a 13221 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13222 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13223 }
13224 }
5e681ec4
PB		 13225
13226 /* Set up .got offsets for local syms, and space for local dynamic
13227 relocs. */
13228 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 13229 {
5e681ec4
PB		 13230 bfd_signed_vma *local_got;
13231 bfd_signed_vma *end_local_got;
34e77a92 13232 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13233 char *local_tls_type;
0855e32b 13234 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13235 bfd_size_type locsymcount;
13236 Elf_Internal_Shdr *symtab_hdr;
13237 asection *srel;
4dfe6ac6 13238 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13239 unsigned int symndx;
5e681ec4 13240
0ffa91dd 13241 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13242 continue;
13243
13244 for (s = ibfd->sections; s != NULL; s = s->next)
13245 {
0bdcacaf 13246 struct elf_dyn_relocs *p;
5e681ec4 13247
0bdcacaf 13248 for (p = (struct elf_dyn_relocs *)
21d799b5 13249 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13250 {
0bdcacaf
RS		 13251 if (!bfd_is_abs_section (p->sec)
13252 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13253 {
13254 /* Input section has been discarded, either because
13255 it is a copy of a linkonce section or due to
13256 linker script /DISCARD/, so we'll be discarding
13257 the relocs too. */
13258 }
3348747a 13259 else if (is_vxworks
0bdcacaf 13260 && strcmp (p->sec->output_section->name,
3348747a
NS		 13261 ".tls_vars") == 0)
13262 {
13263 /* Relocations in vxworks .tls_vars sections are
13264 handled specially by the loader. */
13265 }
5e681ec4
PB		 13266 else if (p->count != 0)
13267 {
0bdcacaf 13268 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13269 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13270 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13271 info->flags |= DF_TEXTREL;
13272 }
13273 }
13274 }
13275
13276 local_got = elf_local_got_refcounts (ibfd);
13277 if (!local_got)
13278 continue;
13279
0ffa91dd 13280 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13281 locsymcount = symtab_hdr->sh_info;
13282 end_local_got = local_got + locsymcount;
34e77a92 13283 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13284 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13285 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13286 symndx = 0;
362d30a1
RS		 13287 s = htab->root.sgot;
13288 srel = htab->root.srelgot;
0855e32b 13289 for (; local_got < end_local_got;
34e77a92
RS		 13290 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13291 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13292 {
0855e32b 13293 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13294 local_iplt = *local_iplt_ptr;
13295 if (local_iplt != NULL)
13296 {
13297 struct elf_dyn_relocs *p;
13298
13299 if (local_iplt->root.refcount > 0)
13300 {
13301 elf32_arm_allocate_plt_entry (info, TRUE,
13302 &local_iplt->root,
13303 &local_iplt->arm);
13304 if (local_iplt->arm.noncall_refcount == 0)
13305 /* All references to the PLT are calls, so all
13306 non-call references can resolve directly to the
13307 run-time target. This means that the .got entry
13308 would be the same as the .igot.plt entry, so there's
13309 no point creating both. */
13310 *local_got = 0;
13311 }
13312 else
13313 {
13314 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13315 local_iplt->root.offset = (bfd_vma) -1;
13316 }
13317
13318 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13319 {
13320 asection *psrel;
13321
13322 psrel = elf_section_data (p->sec)->sreloc;
13323 if (local_iplt->arm.noncall_refcount == 0)
13324 elf32_arm_allocate_irelocs (info, psrel, p->count);
13325 else
13326 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13327 }
13328 }
5e681ec4
PB		 13329 if (*local_got > 0)
13330 {
34e77a92
RS		 13331 Elf_Internal_Sym *isym;
13332
eea6121a 13333 *local_got = s->size;
ba93b8ac
DJ		 13334 if (*local_tls_type & GOT_TLS_GD)
13335 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13336 s->size += 8;
0855e32b
NS		 13337 if (*local_tls_type & GOT_TLS_GDESC)
13338 {
13339 *local_tlsdesc_gotent = htab->root.sgotplt->size
13340 - elf32_arm_compute_jump_table_size (htab);
13341 htab->root.sgotplt->size += 8;
13342 *local_got = (bfd_vma) -2;
34e77a92 13343 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13344 reloc in the middle of .got.plt. */
13345 htab->num_tls_desc++;
13346 }
ba93b8ac
DJ		 13347 if (*local_tls_type & GOT_TLS_IE)
13348 s->size += 4;
ba93b8ac 13349
0855e32b
NS		 13350 if (*local_tls_type & GOT_NORMAL)
13351 {
13352 /* If the symbol is both GD and GDESC, *local_got
13353 may have been overwritten. */
13354 *local_got = s->size;
13355 s->size += 4;
13356 }
13357
34e77a92
RS		 13358 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13359 if (isym == NULL)
13360 return FALSE;
13361
13362 /* If all references to an STT_GNU_IFUNC PLT are calls,
13363 then all non-call references, including this GOT entry,
13364 resolve directly to the run-time target. */
13365 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13366 && (local_iplt == NULL
13367 || local_iplt->arm.noncall_refcount == 0))
13368 elf32_arm_allocate_irelocs (info, srel, 1);
13369 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13370 || *local_tls_type & GOT_TLS_GD)
47beaa6a 13371 elf32_arm_allocate_dynrelocs (info, srel, 1);
0855e32b
NS		 13372
13373 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13374 {
47beaa6a 13375 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13376 htab->tls_trampoline = -1;
13377 }
5e681ec4
PB		 13378 }
13379 else
13380 *local_got = (bfd_vma) -1;
13381 }
252b5132
RH		 13382 }
13383
ba93b8ac
DJ		 13384 if (htab->tls_ldm_got.refcount > 0)
13385 {
13386 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13387 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13388 htab->tls_ldm_got.offset = htab->root.sgot->size;
13389 htab->root.sgot->size += 8;
ba93b8ac 13390 if (info->shared)
47beaa6a 13391 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13392 }
13393 else
13394 htab->tls_ldm_got.offset = -1;
13395
5e681ec4
PB		 13396 /* Allocate global sym .plt and .got entries, and space for global
13397 sym dynamic relocs. */
47beaa6a 13398 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13399
d504ffc8
DJ		 13400 /* Here we rummage through the found bfds to collect glue information. */
13401 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 13402 {
0ffa91dd 13403 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13404 continue;
13405
c7b8f16e
JB		 13406 /* Initialise mapping tables for code/data. */
13407 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13408
c7b8f16e
JB		 13409 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13410 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13411 /* xgettext:c-format */
13412 _bfd_error_handler (_("Errors encountered processing file %s"),
13413 ibfd->filename);
13414 }
d504ffc8 13415
3e6b1042
DJ		 13416 /* Allocate space for the glue sections now that we've sized them. */
13417 bfd_elf32_arm_allocate_interworking_sections (info);
13418
0855e32b
NS		 13419 /* For every jump slot reserved in the sgotplt, reloc_count is
13420 incremented. However, when we reserve space for TLS descriptors,
13421 it's not incremented, so in order to compute the space reserved
13422 for them, it suffices to multiply the reloc count by the jump
13423 slot size. */
13424 if (htab->root.srelplt)
13425 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13426
13427 if (htab->tls_trampoline)
13428 {
13429 if (htab->root.splt->size == 0)
13430 htab->root.splt->size += htab->plt_header_size;
13431
13432 htab->tls_trampoline = htab->root.splt->size;
13433 htab->root.splt->size += htab->plt_entry_size;
13434
13435 /* If we're not using lazy TLS relocations, don't generate the
13436 PLT and GOT entries they require. */
13437 if (!(info->flags & DF_BIND_NOW))
13438 {
13439 htab->dt_tlsdesc_got = htab->root.sgot->size;
13440 htab->root.sgot->size += 4;
13441
13442 htab->dt_tlsdesc_plt = htab->root.splt->size;
13443 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13444 }
13445 }
13446
252b5132
RH		 13447 /* The check_relocs and adjust_dynamic_symbol entry points have
13448 determined the sizes of the various dynamic sections. Allocate
13449 memory for them. */
b34976b6
AM		 13450 plt = FALSE;
13451 relocs = FALSE;
252b5132
RH		 13452 for (s = dynobj->sections; s != NULL; s = s->next)
13453 {
13454 const char * name;
252b5132
RH		 13455
13456 if ((s->flags & SEC_LINKER_CREATED) == 0)
13457 continue;
13458
13459 /* It's OK to base decisions on the section name, because none
13460 of the dynobj section names depend upon the input files. */
13461 name = bfd_get_section_name (dynobj, s);
13462
34e77a92 13463 if (s == htab->root.splt)
252b5132 13464 {
c456f082
AM		 13465 /* Remember whether there is a PLT. */
13466 plt = s->size != 0;
252b5132 13467 }
0112cd26 13468 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13469 {
c456f082 13470 if (s->size != 0)
252b5132 13471 {
252b5132 13472 /* Remember whether there are any reloc sections other
00a97672 13473 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13474 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13475 relocs = TRUE;
252b5132
RH		 13476
13477 /* We use the reloc_count field as a counter if we need
13478 to copy relocs into the output file. */
13479 s->reloc_count = 0;
13480 }
13481 }
34e77a92
RS		 13482 else if (s != htab->root.sgot
13483 && s != htab->root.sgotplt
13484 && s != htab->root.iplt
13485 && s != htab->root.igotplt
13486 && s != htab->sdynbss)
252b5132
RH		 13487 {
13488 /* It's not one of our sections, so don't allocate space. */
13489 continue;
13490 }
13491
c456f082 13492 if (s->size == 0)
252b5132 13493 {
c456f082 13494 /* If we don't need this section, strip it from the
00a97672
RS		 13495 output file. This is mostly to handle .rel(a).bss and
13496 .rel(a).plt. We must create both sections in
c456f082
AM		 13497 create_dynamic_sections, because they must be created
13498 before the linker maps input sections to output
13499 sections. The linker does that before
13500 adjust_dynamic_symbol is called, and it is that
13501 function which decides whether anything needs to go
13502 into these sections. */
8423293d 13503 s->flags |= SEC_EXCLUDE;
252b5132
RH		 13504 continue;
13505 }
13506
c456f082
AM		 13507 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13508 continue;
13509
252b5132 13510 /* Allocate memory for the section contents. */
21d799b5 13511 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 13512 if (s->contents == NULL)
b34976b6 13513 return FALSE;
252b5132
RH		 13514 }
13515
13516 if (elf_hash_table (info)->dynamic_sections_created)
13517 {
13518 /* Add some entries to the .dynamic section. We fill in the
13519 values later, in elf32_arm_finish_dynamic_sections, but we
13520 must add the entries now so that we get the correct size for
13521 the .dynamic section. The DT_DEBUG entry is filled in by the
13522 dynamic linker and used by the debugger. */
dc810e39 13523#define add_dynamic_entry(TAG, VAL) \
5a580b3a 13524 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 13525
8532796c 13526 if (info->executable)
252b5132 13527 {
dc810e39 13528 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 13529 return FALSE;
252b5132
RH		 13530 }
13531
13532 if (plt)
13533 {
dc810e39
AM		 13534 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13535 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 13536 || !add_dynamic_entry (DT_PLTREL,
13537 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 13538 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 13539 return FALSE;
0855e32b
NS		 13540
13541 if (htab->dt_tlsdesc_plt &&
13542 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13543 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13544 return FALSE;
252b5132
RH		 13545 }
13546
13547 if (relocs)
13548 {
00a97672
RS		 13549 if (htab->use_rel)
13550 {
13551 if (!add_dynamic_entry (DT_REL, 0)
13552 || !add_dynamic_entry (DT_RELSZ, 0)
13553 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13554 return FALSE;
13555 }
13556 else
13557 {
13558 if (!add_dynamic_entry (DT_RELA, 0)
13559 || !add_dynamic_entry (DT_RELASZ, 0)
13560 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13561 return FALSE;
13562 }
252b5132
RH		 13563 }
13564
08d1f311
DJ		 13565 /* If any dynamic relocs apply to a read-only section,
13566 then we need a DT_TEXTREL entry. */
13567 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 13568 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13569 info);
08d1f311 13570
99e4ae17 13571 if ((info->flags & DF_TEXTREL) != 0)
252b5132 13572 {
dc810e39 13573 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 13574 return FALSE;
252b5132 13575 }
7a2b07ff
NS		 13576 if (htab->vxworks_p
13577 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13578 return FALSE;
252b5132 13579 }
8532796c 13580#undef add_dynamic_entry
252b5132 13581
b34976b6 13582 return TRUE;
252b5132
RH		 13583}
13584
0855e32b
NS		 13585/* Size sections even though they're not dynamic. We use it to setup
13586 _TLS_MODULE_BASE_, if needed. */
13587
13588static bfd_boolean
13589elf32_arm_always_size_sections (bfd *output_bfd,
13590 struct bfd_link_info *info)
13591{
13592 asection *tls_sec;
13593
13594 if (info->relocatable)
13595 return TRUE;
13596
13597 tls_sec = elf_hash_table (info)->tls_sec;
13598
13599 if (tls_sec)
13600 {
13601 struct elf_link_hash_entry *tlsbase;
13602
13603 tlsbase = elf_link_hash_lookup
13604 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13605
13606 if (tlsbase)
13607 {
13608 struct bfd_link_hash_entry *bh = NULL;
13609 const struct elf_backend_data *bed
13610 = get_elf_backend_data (output_bfd);
13611
13612 if (!(_bfd_generic_link_add_one_symbol
13613 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13614 tls_sec, 0, NULL, FALSE,
13615 bed->collect, &bh)))
13616 return FALSE;
13617
13618 tlsbase->type = STT_TLS;
13619 tlsbase = (struct elf_link_hash_entry *)bh;
13620 tlsbase->def_regular = 1;
13621 tlsbase->other = STV_HIDDEN;
13622 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13623 }
13624 }
13625 return TRUE;
13626}
13627
252b5132
RH		 13628/* Finish up dynamic symbol handling. We set the contents of various
13629 dynamic sections here. */
13630
b34976b6 13631static bfd_boolean
906e58ca
NC		 13632elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13633 struct bfd_link_info * info,
13634 struct elf_link_hash_entry * h,
13635 Elf_Internal_Sym * sym)
252b5132 13636{
e5a52504 13637 struct elf32_arm_link_hash_table *htab;
b7693d02 13638 struct elf32_arm_link_hash_entry *eh;
252b5132 13639
e5a52504 13640 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13641 if (htab == NULL)
13642 return FALSE;
13643
b7693d02 13644 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 13645
13646 if (h->plt.offset != (bfd_vma) -1)
13647 {
34e77a92 13648 if (!eh->is_iplt)
e5a52504 13649 {
34e77a92
RS		 13650 BFD_ASSERT (h->dynindx != -1);
13651 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13652 h->dynindx, 0);
e5a52504 13653 }
57e8b36a 13654
f5385ebf 13655 if (!h->def_regular)
252b5132
RH		 13656 {
13657 /* Mark the symbol as undefined, rather than as defined in
13658 the .plt section. Leave the value alone. */
13659 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 13660 /* If the symbol is weak, we do need to clear the value.
13661 Otherwise, the PLT entry would provide a definition for
13662 the symbol even if the symbol wasn't defined anywhere,
13663 and so the symbol would never be NULL. */
f5385ebf 13664 if (!h->ref_regular_nonweak)
d982ba73 13665 sym->st_value = 0;
252b5132 13666 }
34e77a92
RS		 13667 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13668 {
13669 /* At least one non-call relocation references this .iplt entry,
13670 so the .iplt entry is the function's canonical address. */
13671 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13672 sym->st_target_internal = ST_BRANCH_TO_ARM;
13673 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13674 (output_bfd, htab->root.iplt->output_section));
13675 sym->st_value = (h->plt.offset
13676 + htab->root.iplt->output_section->vma
13677 + htab->root.iplt->output_offset);
13678 }
252b5132
RH		 13679 }
13680
f5385ebf 13681 if (h->needs_copy)
252b5132
RH		 13682 {
13683 asection * s;
947216bf 13684 Elf_Internal_Rela rel;
252b5132
RH		 13685
13686 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 13687 BFD_ASSERT (h->dynindx != -1
13688 && (h->root.type == bfd_link_hash_defined
13689 || h->root.type == bfd_link_hash_defweak));
13690
362d30a1 13691 s = htab->srelbss;
252b5132
RH		 13692 BFD_ASSERT (s != NULL);
13693
00a97672 13694 rel.r_addend = 0;
252b5132
RH		 13695 rel.r_offset = (h->root.u.def.value
13696 + h->root.u.def.section->output_section->vma
13697 + h->root.u.def.section->output_offset);
13698 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 13699 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 13700 }
13701
00a97672
RS		 13702 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13703 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13704 to the ".got" section. */
252b5132 13705 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 13706 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 13707 sym->st_shndx = SHN_ABS;
13708
b34976b6 13709 return TRUE;
252b5132
RH		 13710}
13711
0855e32b
NS		 13712static void
13713arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13714 void *contents,
13715 const unsigned long *template, unsigned count)
13716{
13717 unsigned ix;
13718
13719 for (ix = 0; ix != count; ix++)
13720 {
13721 unsigned long insn = template[ix];
13722
13723 /* Emit mov pc,rx if bx is not permitted. */
13724 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
13725 insn = (insn & 0xf000000f) | 0x01a0f000;
13726 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
13727 }
13728}
13729
252b5132
RH		 13730/* Finish up the dynamic sections. */
13731
b34976b6 13732static bfd_boolean
57e8b36a 13733elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 13734{
13735 bfd * dynobj;
13736 asection * sgot;
13737 asection * sdyn;
4dfe6ac6
NC		 13738 struct elf32_arm_link_hash_table *htab;
13739
13740 htab = elf32_arm_hash_table (info);
13741 if (htab == NULL)
13742 return FALSE;
252b5132
RH		 13743
13744 dynobj = elf_hash_table (info)->dynobj;
13745
362d30a1 13746 sgot = htab->root.sgotplt;
252b5132
RH		 13747 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
13748
13749 if (elf_hash_table (info)->dynamic_sections_created)
13750 {
13751 asection *splt;
13752 Elf32_External_Dyn *dyncon, *dynconend;
13753
362d30a1 13754 splt = htab->root.splt;
24a1ba0f 13755 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 13756 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 13757
13758 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 13759 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 13760
252b5132
RH		 13761 for (; dyncon < dynconend; dyncon++)
13762 {
13763 Elf_Internal_Dyn dyn;
13764 const char * name;
13765 asection * s;
13766
13767 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
13768
13769 switch (dyn.d_tag)
13770 {
229fcec5
MM		 13771 unsigned int type;
13772
252b5132 13773 default:
7a2b07ff
NS		 13774 if (htab->vxworks_p
13775 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
13776 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 13777 break;
13778
229fcec5
MM		 13779 case DT_HASH:
13780 name = ".hash";
13781 goto get_vma_if_bpabi;
13782 case DT_STRTAB:
13783 name = ".dynstr";
13784 goto get_vma_if_bpabi;
13785 case DT_SYMTAB:
13786 name = ".dynsym";
13787 goto get_vma_if_bpabi;
c0042f5d
MM		 13788 case DT_VERSYM:
13789 name = ".gnu.version";
13790 goto get_vma_if_bpabi;
13791 case DT_VERDEF:
13792 name = ".gnu.version_d";
13793 goto get_vma_if_bpabi;
13794 case DT_VERNEED:
13795 name = ".gnu.version_r";
13796 goto get_vma_if_bpabi;
13797
252b5132
RH		 13798 case DT_PLTGOT:
13799 name = ".got";
13800 goto get_vma;
13801 case DT_JMPREL:
00a97672 13802 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 13803 get_vma:
13804 s = bfd_get_section_by_name (output_bfd, name);
13805 BFD_ASSERT (s != NULL);
229fcec5
MM		 13806 if (!htab->symbian_p)
13807 dyn.d_un.d_ptr = s->vma;
13808 else
13809 /* In the BPABI, tags in the PT_DYNAMIC section point
13810 at the file offset, not the memory address, for the
13811 convenience of the post linker. */
13812 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 13813 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13814 break;
13815
229fcec5
MM		 13816 get_vma_if_bpabi:
13817 if (htab->symbian_p)
13818 goto get_vma;
13819 break;
13820
252b5132 13821 case DT_PLTRELSZ:
362d30a1 13822 s = htab->root.srelplt;
252b5132 13823 BFD_ASSERT (s != NULL);
eea6121a 13824 dyn.d_un.d_val = s->size;
252b5132
RH		 13825 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13826 break;
906e58ca 13827
252b5132 13828 case DT_RELSZ:
00a97672 13829 case DT_RELASZ:
229fcec5
MM		 13830 if (!htab->symbian_p)
13831 {
13832 /* My reading of the SVR4 ABI indicates that the
13833 procedure linkage table relocs (DT_JMPREL) should be
13834 included in the overall relocs (DT_REL). This is
13835 what Solaris does. However, UnixWare can not handle
13836 that case. Therefore, we override the DT_RELSZ entry
13837 here to make it not include the JMPREL relocs. Since
00a97672 13838 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 13839 other relocation sections, we don't have to worry
13840 about changing the DT_REL entry. */
362d30a1 13841 s = htab->root.srelplt;
229fcec5
MM		 13842 if (s != NULL)
13843 dyn.d_un.d_val -= s->size;
13844 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13845 break;
13846 }
8029a119 13847 /* Fall through. */
229fcec5
MM		 13848
13849 case DT_REL:
13850 case DT_RELA:
229fcec5
MM		 13851 /* In the BPABI, the DT_REL tag must point at the file
13852 offset, not the VMA, of the first relocation
13853 section. So, we use code similar to that in
13854 elflink.c, but do not check for SHF_ALLOC on the
13855 relcoation section, since relocations sections are
13856 never allocated under the BPABI. The comments above
13857 about Unixware notwithstanding, we include all of the
13858 relocations here. */
13859 if (htab->symbian_p)
13860 {
13861 unsigned int i;
13862 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
13863 ? SHT_REL : SHT_RELA);
13864 dyn.d_un.d_val = 0;
13865 for (i = 1; i < elf_numsections (output_bfd); i++)
13866 {
906e58ca 13867 Elf_Internal_Shdr *hdr
229fcec5
MM		 13868 = elf_elfsections (output_bfd)[i];
13869 if (hdr->sh_type == type)
13870 {
906e58ca 13871 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 13872 || dyn.d_tag == DT_RELASZ)
13873 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 13874 else if ((ufile_ptr) hdr->sh_offset
13875 <= dyn.d_un.d_val - 1)
229fcec5
MM		 13876 dyn.d_un.d_val = hdr->sh_offset;
13877 }
13878 }
13879 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13880 }
252b5132 13881 break;
88f7bcd5 13882
0855e32b
NS		 13883 case DT_TLSDESC_PLT:
13884 s = htab->root.splt;
13885 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13886 + htab->dt_tlsdesc_plt);
13887 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13888 break;
13889
13890 case DT_TLSDESC_GOT:
13891 s = htab->root.sgot;
13892 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13893 + htab->dt_tlsdesc_got);
13894 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13895 break;
13896
88f7bcd5
NC		 13897 /* Set the bottom bit of DT_INIT/FINI if the
13898 corresponding function is Thumb. */
13899 case DT_INIT:
13900 name = info->init_function;
13901 goto get_sym;
13902 case DT_FINI:
13903 name = info->fini_function;
13904 get_sym:
13905 /* If it wasn't set by elf_bfd_final_link
4cc11e76 13906 then there is nothing to adjust. */
88f7bcd5
NC		 13907 if (dyn.d_un.d_val != 0)
13908 {
13909 struct elf_link_hash_entry * eh;
13910
13911 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 13912 FALSE, FALSE, TRUE);
35fc36a8 13913 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 13914 {
13915 dyn.d_un.d_val |= 1;
b34976b6 13916 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 13917 }
13918 }
13919 break;
252b5132
RH		 13920 }
13921 }
13922
24a1ba0f 13923 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 13924 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 13925 {
00a97672
RS		 13926 const bfd_vma *plt0_entry;
13927 bfd_vma got_address, plt_address, got_displacement;
13928
13929 /* Calculate the addresses of the GOT and PLT. */
13930 got_address = sgot->output_section->vma + sgot->output_offset;
13931 plt_address = splt->output_section->vma + splt->output_offset;
13932
13933 if (htab->vxworks_p)
13934 {
13935 /* The VxWorks GOT is relocated by the dynamic linker.
13936 Therefore, we must emit relocations rather than simply
13937 computing the values now. */
13938 Elf_Internal_Rela rel;
13939
13940 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 13941 put_arm_insn (htab, output_bfd, plt0_entry[0],
13942 splt->contents + 0);
13943 put_arm_insn (htab, output_bfd, plt0_entry[1],
13944 splt->contents + 4);
13945 put_arm_insn (htab, output_bfd, plt0_entry[2],
13946 splt->contents + 8);
00a97672
RS		 13947 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
13948
8029a119 13949 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 13950 rel.r_offset = plt_address + 12;
13951 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
13952 rel.r_addend = 0;
13953 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
13954 htab->srelplt2->contents);
13955 }
13956 else
13957 {
13958 got_displacement = got_address - (plt_address + 16);
13959
13960 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 13961 put_arm_insn (htab, output_bfd, plt0_entry[0],
13962 splt->contents + 0);
13963 put_arm_insn (htab, output_bfd, plt0_entry[1],
13964 splt->contents + 4);
13965 put_arm_insn (htab, output_bfd, plt0_entry[2],
13966 splt->contents + 8);
13967 put_arm_insn (htab, output_bfd, plt0_entry[3],
13968 splt->contents + 12);
5e681ec4 13969
5e681ec4 13970#ifdef FOUR_WORD_PLT
00a97672
RS		 13971 /* The displacement value goes in the otherwise-unused
13972 last word of the second entry. */
13973 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 13974#else
00a97672 13975 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 13976#endif
00a97672 13977 }
f7a74f8c 13978 }
252b5132
RH		 13979
13980 /* UnixWare sets the entsize of .plt to 4, although that doesn't
13981 really seem like the right value. */
74541ad4
AM		 13982 if (splt->output_section->owner == output_bfd)
13983 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 13984
0855e32b
NS		 13985 if (htab->dt_tlsdesc_plt)
13986 {
13987 bfd_vma got_address
13988 = sgot->output_section->vma + sgot->output_offset;
13989 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
13990 + htab->root.sgot->output_offset);
13991 bfd_vma plt_address
13992 = splt->output_section->vma + splt->output_offset;
13993
13994 arm_put_trampoline (htab, output_bfd,
13995 splt->contents + htab->dt_tlsdesc_plt,
13996 dl_tlsdesc_lazy_trampoline, 6);
13997
13998 bfd_put_32 (output_bfd,
13999 gotplt_address + htab->dt_tlsdesc_got
14000 - (plt_address + htab->dt_tlsdesc_plt)
14001 - dl_tlsdesc_lazy_trampoline[6],
14002 splt->contents + htab->dt_tlsdesc_plt + 24);
14003 bfd_put_32 (output_bfd,
14004 got_address - (plt_address + htab->dt_tlsdesc_plt)
14005 - dl_tlsdesc_lazy_trampoline[7],
14006 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14007 }
14008
14009 if (htab->tls_trampoline)
14010 {
14011 arm_put_trampoline (htab, output_bfd,
14012 splt->contents + htab->tls_trampoline,
14013 tls_trampoline, 3);
14014#ifdef FOUR_WORD_PLT
14015 bfd_put_32 (output_bfd, 0x00000000,
14016 splt->contents + htab->tls_trampoline + 12);
14017#endif
14018 }
14019
362d30a1 14020 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14021 {
14022 /* Correct the .rel(a).plt.unloaded relocations. They will have
14023 incorrect symbol indexes. */
14024 int num_plts;
eed62c48 14025 unsigned char *p;
00a97672 14026
362d30a1 14027 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14028 / htab->plt_entry_size);
14029 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14030
14031 for (; num_plts; num_plts--)
14032 {
14033 Elf_Internal_Rela rel;
14034
14035 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14036 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14037 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14038 p += RELOC_SIZE (htab);
14039
14040 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14041 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14042 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14043 p += RELOC_SIZE (htab);
14044 }
14045 }
252b5132
RH		 14046 }
14047
14048 /* Fill in the first three entries in the global offset table. */
229fcec5 14049 if (sgot)
252b5132 14050 {
229fcec5
MM		 14051 if (sgot->size > 0)
14052 {
14053 if (sdyn == NULL)
14054 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14055 else
14056 bfd_put_32 (output_bfd,
14057 sdyn->output_section->vma + sdyn->output_offset,
14058 sgot->contents);
14059 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14060 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14061 }
252b5132 14062
229fcec5
MM		 14063 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14064 }
252b5132 14065
b34976b6 14066 return TRUE;
252b5132
RH		 14067}
14068
ba96a88f 14069static void
57e8b36a 14070elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14071{
9b485d32 14072 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14073 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14074
14075 i_ehdrp = elf_elfheader (abfd);
14076
94a3258f
PB		 14077 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14078 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14079 else
14080 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 14081 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14082
93204d3a
PB		 14083 if (link_info)
14084 {
14085 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14086 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14087 i_ehdrp->e_flags |= EF_ARM_BE8;
14088 }
ba96a88f
NC		 14089}
14090
99e4ae17 14091static enum elf_reloc_type_class
57e8b36a 14092elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 14093{
f51e552e 14094 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14095 {
14096 case R_ARM_RELATIVE:
14097 return reloc_class_relative;
14098 case R_ARM_JUMP_SLOT:
14099 return reloc_class_plt;
14100 case R_ARM_COPY:
14101 return reloc_class_copy;
14102 default:
14103 return reloc_class_normal;
14104 }
14105}
14106
e16bb312
NC		 14107/* Set the right machine number for an Arm ELF file. */
14108
14109static bfd_boolean
57e8b36a 14110elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 14111{
14112 if (hdr->sh_type == SHT_NOTE)
14113 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
14114
14115 return TRUE;
14116}
14117
e489d0ae 14118static void
57e8b36a 14119elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14120{
5a6c6817 14121 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14122}
14123
40a18ebd
NC		 14124/* Return TRUE if this is an unwinding table entry. */
14125
14126static bfd_boolean
14127is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14128{
0112cd26
NC		 14129 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14130 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14131}
14132
14133
14134/* Set the type and flags for an ARM section. We do this by
14135 the section name, which is a hack, but ought to work. */
14136
14137static bfd_boolean
14138elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14139{
14140 const char * name;
14141
14142 name = bfd_get_section_name (abfd, sec);
14143
14144 if (is_arm_elf_unwind_section_name (abfd, name))
14145 {
14146 hdr->sh_type = SHT_ARM_EXIDX;
14147 hdr->sh_flags |= SHF_LINK_ORDER;
14148 }
14149 return TRUE;
14150}
14151
6dc132d9
L		 14152/* Handle an ARM specific section when reading an object file. This is
14153 called when bfd_section_from_shdr finds a section with an unknown
14154 type. */
40a18ebd
NC		 14155
14156static bfd_boolean
14157elf32_arm_section_from_shdr (bfd *abfd,
14158 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14159 const char *name,
14160 int shindex)
40a18ebd
NC		 14161{
14162 /* There ought to be a place to keep ELF backend specific flags, but
14163 at the moment there isn't one. We just keep track of the
14164 sections by their name, instead. Fortunately, the ABI gives
14165 names for all the ARM specific sections, so we will probably get
14166 away with this. */
14167 switch (hdr->sh_type)
14168 {
14169 case SHT_ARM_EXIDX:
0951f019
RE		 14170 case SHT_ARM_PREEMPTMAP:
14171 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14172 break;
14173
14174 default:
14175 return FALSE;
14176 }
14177
6dc132d9 14178 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14179 return FALSE;
14180
14181 return TRUE;
14182}
e489d0ae 14183
44444f50
NC		 14184static _arm_elf_section_data *
14185get_arm_elf_section_data (asection * sec)
14186{
47b2e99c
JZ		 14187 if (sec && sec->owner && is_arm_elf (sec->owner))
14188 return elf32_arm_section_data (sec);
44444f50
NC		 14189 else
14190 return NULL;
8e3de13a
NC		 14191}
14192
4e617b1e
PB		 14193typedef struct
14194{
14195 void *finfo;
14196 struct bfd_link_info *info;
91a5743d
PB		 14197 asection *sec;
14198 int sec_shndx;
6e0b88f1
AM		 14199 int (*func) (void *, const char *, Elf_Internal_Sym *,
14200 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14201} output_arch_syminfo;
14202
14203enum map_symbol_type
14204{
14205 ARM_MAP_ARM,
14206 ARM_MAP_THUMB,
14207 ARM_MAP_DATA
14208};
14209
14210
7413f23f 14211/* Output a single mapping symbol. */
4e617b1e
PB		 14212
14213static bfd_boolean
7413f23f
DJ		 14214elf32_arm_output_map_sym (output_arch_syminfo *osi,
14215 enum map_symbol_type type,
14216 bfd_vma offset)
4e617b1e
PB		 14217{
14218 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14219 Elf_Internal_Sym sym;
14220
91a5743d
PB		 14221 sym.st_value = osi->sec->output_section->vma
14222 + osi->sec->output_offset
14223 + offset;
4e617b1e
PB		 14224 sym.st_size = 0;
14225 sym.st_other = 0;
14226 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14227 sym.st_shndx = osi->sec_shndx;
35fc36a8 14228 sym.st_target_internal = 0;
fe33d2fa 14229 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 14230 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14231}
14232
34e77a92
RS		 14233/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14234 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14235
14236static bfd_boolean
34e77a92
RS		 14237elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14238 bfd_boolean is_iplt_entry_p,
14239 union gotplt_union *root_plt,
14240 struct arm_plt_info *arm_plt)
4e617b1e 14241{
4e617b1e 14242 struct elf32_arm_link_hash_table *htab;
34e77a92 14243 bfd_vma addr, plt_header_size;
4e617b1e 14244
34e77a92 14245 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14246 return TRUE;
14247
4dfe6ac6
NC		 14248 htab = elf32_arm_hash_table (osi->info);
14249 if (htab == NULL)
14250 return FALSE;
14251
34e77a92
RS		 14252 if (is_iplt_entry_p)
14253 {
14254 osi->sec = htab->root.iplt;
14255 plt_header_size = 0;
14256 }
14257 else
14258 {
14259 osi->sec = htab->root.splt;
14260 plt_header_size = htab->plt_header_size;
14261 }
14262 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14263 (osi->info->output_bfd, osi->sec->output_section));
14264
14265 addr = root_plt->offset & -2;
4e617b1e
PB		 14266 if (htab->symbian_p)
14267 {
7413f23f 14268 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14269 return FALSE;
7413f23f 14270 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14271 return FALSE;
14272 }
14273 else if (htab->vxworks_p)
14274 {
7413f23f 14275 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14276 return FALSE;
7413f23f 14277 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14278 return FALSE;
7413f23f 14279 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14280 return FALSE;
7413f23f 14281 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14282 return FALSE;
14283 }
14284 else
14285 {
34e77a92 14286 bfd_boolean thumb_stub_p;
bd97cb95 14287
34e77a92
RS		 14288 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14289 if (thumb_stub_p)
4e617b1e 14290 {
7413f23f 14291 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14292 return FALSE;
14293 }
14294#ifdef FOUR_WORD_PLT
7413f23f 14295 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14296 return FALSE;
7413f23f 14297 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14298 return FALSE;
14299#else
906e58ca 14300 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14301 so only need to output a mapping symbol for the first PLT entry and
14302 entries with thumb thunks. */
34e77a92 14303 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14304 {
7413f23f 14305 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14306 return FALSE;
14307 }
14308#endif
14309 }
14310
14311 return TRUE;
14312}
14313
34e77a92
RS		 14314/* Output mapping symbols for PLT entries associated with H. */
14315
14316static bfd_boolean
14317elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14318{
14319 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14320 struct elf32_arm_link_hash_entry *eh;
14321
14322 if (h->root.type == bfd_link_hash_indirect)
14323 return TRUE;
14324
14325 if (h->root.type == bfd_link_hash_warning)
14326 /* When warning symbols are created, they **replace** the "real"
14327 entry in the hash table, thus we never get to see the real
14328 symbol in a hash traversal. So look at it now. */
14329 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14330
14331 eh = (struct elf32_arm_link_hash_entry *) h;
14332 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14333 &h->plt, &eh->plt);
14334}
14335
7413f23f
DJ		 14336/* Output a single local symbol for a generated stub. */
14337
14338static bfd_boolean
14339elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14340 bfd_vma offset, bfd_vma size)
14341{
7413f23f
DJ		 14342 Elf_Internal_Sym sym;
14343
7413f23f
DJ		 14344 sym.st_value = osi->sec->output_section->vma
14345 + osi->sec->output_offset
14346 + offset;
14347 sym.st_size = size;
14348 sym.st_other = 0;
14349 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14350 sym.st_shndx = osi->sec_shndx;
35fc36a8 14351 sym.st_target_internal = 0;
6e0b88f1 14352 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14353}
4e617b1e 14354
da5938a2 14355static bfd_boolean
8029a119
NC		 14356arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14357 void * in_arg)
da5938a2
NC		 14358{
14359 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14360 asection *stub_sec;
14361 bfd_vma addr;
7413f23f 14362 char *stub_name;
9a008db3 14363 output_arch_syminfo *osi;
d3ce72d0 14364 const insn_sequence *template_sequence;
461a49ca
DJ		 14365 enum stub_insn_type prev_type;
14366 int size;
14367 int i;
14368 enum map_symbol_type sym_type;
da5938a2
NC		 14369
14370 /* Massage our args to the form they really have. */
14371 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14372 osi = (output_arch_syminfo *) in_arg;
da5938a2 14373
da5938a2
NC		 14374 stub_sec = stub_entry->stub_sec;
14375
14376 /* Ensure this stub is attached to the current section being
7413f23f 14377 processed. */
da5938a2
NC		 14378 if (stub_sec != osi->sec)
14379 return TRUE;
14380
7413f23f
DJ		 14381 addr = (bfd_vma) stub_entry->stub_offset;
14382 stub_name = stub_entry->output_name;
da5938a2 14383
d3ce72d0
NC		 14384 template_sequence = stub_entry->stub_template;
14385 switch (template_sequence[0].type)
7413f23f 14386 {
461a49ca
DJ		 14387 case ARM_TYPE:
14388 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14389 return FALSE;
14390 break;
461a49ca 14391 case THUMB16_TYPE:
48229727 14392 case THUMB32_TYPE:
461a49ca
DJ		 14393 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14394 stub_entry->stub_size))
da5938a2
NC		 14395 return FALSE;
14396 break;
14397 default:
14398 BFD_FAIL ();
48229727 14399 return 0;
7413f23f 14400 }
da5938a2 14401
461a49ca
DJ		 14402 prev_type = DATA_TYPE;
14403 size = 0;
14404 for (i = 0; i < stub_entry->stub_template_size; i++)
14405 {
d3ce72d0 14406 switch (template_sequence[i].type)
461a49ca
DJ		 14407 {
14408 case ARM_TYPE:
14409 sym_type = ARM_MAP_ARM;
14410 break;
14411
14412 case THUMB16_TYPE:
48229727 14413 case THUMB32_TYPE:
461a49ca
DJ		 14414 sym_type = ARM_MAP_THUMB;
14415 break;
14416
14417 case DATA_TYPE:
14418 sym_type = ARM_MAP_DATA;
14419 break;
14420
14421 default:
14422 BFD_FAIL ();
4e31c731 14423 return FALSE;
461a49ca
DJ		 14424 }
14425
d3ce72d0 14426 if (template_sequence[i].type != prev_type)
461a49ca 14427 {
d3ce72d0 14428 prev_type = template_sequence[i].type;
461a49ca
DJ		 14429 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14430 return FALSE;
14431 }
14432
d3ce72d0 14433 switch (template_sequence[i].type)
461a49ca
DJ		 14434 {
14435 case ARM_TYPE:
48229727 14436 case THUMB32_TYPE:
461a49ca
DJ		 14437 size += 4;
14438 break;
14439
14440 case THUMB16_TYPE:
14441 size += 2;
14442 break;
14443
14444 case DATA_TYPE:
14445 size += 4;
14446 break;
14447
14448 default:
14449 BFD_FAIL ();
4e31c731 14450 return FALSE;
461a49ca
DJ		 14451 }
14452 }
14453
da5938a2
NC		 14454 return TRUE;
14455}
14456
33811162
DG		 14457/* Output mapping symbols for linker generated sections,
14458 and for those data-only sections that do not have a
14459 $d. */
4e617b1e
PB		 14460
14461static bfd_boolean
14462elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 14463 struct bfd_link_info *info,
14464 void *finfo,
6e0b88f1
AM		 14465 int (*func) (void *, const char *,
14466 Elf_Internal_Sym *,
14467 asection *,
14468 struct elf_link_hash_entry *))
4e617b1e
PB		 14469{
14470 output_arch_syminfo osi;
14471 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 14472 bfd_vma offset;
14473 bfd_size_type size;
33811162 14474 bfd *input_bfd;
4e617b1e
PB		 14475
14476 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14477 if (htab == NULL)
14478 return FALSE;
14479
906e58ca 14480 check_use_blx (htab);
91a5743d 14481
4e617b1e
PB		 14482 osi.finfo = finfo;
14483 osi.info = info;
14484 osi.func = func;
906e58ca 14485
33811162
DG		 14486 /* Add a $d mapping symbol to data-only sections that
14487 don't have any mapping symbol. This may result in (harmless) redundant
14488 mapping symbols. */
14489 for (input_bfd = info->input_bfds;
14490 input_bfd != NULL;
14491 input_bfd = input_bfd->link_next)
14492 {
14493 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14494 for (osi.sec = input_bfd->sections;
14495 osi.sec != NULL;
14496 osi.sec = osi.sec->next)
14497 {
14498 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 14499 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14500 != 0)
33811162
DG		 14501 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14502 == SEC_HAS_CONTENTS
14503 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0
DJ		 14504 && get_arm_elf_section_data (osi.sec)->mapcount == 0
14505 && osi.sec->size > 0)
33811162
DG		 14506 {
14507 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14508 (output_bfd, osi.sec->output_section);
14509 if (osi.sec_shndx != (int)SHN_BAD)
14510 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14511 }
14512 }
14513 }
14514
91a5743d
PB		 14515 /* ARM->Thumb glue. */
14516 if (htab->arm_glue_size > 0)
14517 {
14518 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14519 ARM2THUMB_GLUE_SECTION_NAME);
14520
14521 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14522 (output_bfd, osi.sec->output_section);
14523 if (info->shared || htab->root.is_relocatable_executable
14524 || htab->pic_veneer)
14525 size = ARM2THUMB_PIC_GLUE_SIZE;
14526 else if (htab->use_blx)
14527 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14528 else
14529 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 14530
91a5743d
PB		 14531 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14532 {
7413f23f
DJ		 14533 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14534 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 14535 }
14536 }
14537
14538 /* Thumb->ARM glue. */
14539 if (htab->thumb_glue_size > 0)
14540 {
14541 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14542 THUMB2ARM_GLUE_SECTION_NAME);
14543
14544 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14545 (output_bfd, osi.sec->output_section);
14546 size = THUMB2ARM_GLUE_SIZE;
14547
14548 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14549 {
7413f23f
DJ		 14550 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14551 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 14552 }
14553 }
14554
845b51d6
PB		 14555 /* ARMv4 BX veneers. */
14556 if (htab->bx_glue_size > 0)
14557 {
14558 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14559 ARM_BX_GLUE_SECTION_NAME);
14560
14561 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14562 (output_bfd, osi.sec->output_section);
14563
7413f23f 14564 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 14565 }
14566
8029a119
NC		 14567 /* Long calls stubs. */
14568 if (htab->stub_bfd && htab->stub_bfd->sections)
14569 {
da5938a2 14570 asection* stub_sec;
8029a119 14571
da5938a2
NC		 14572 for (stub_sec = htab->stub_bfd->sections;
14573 stub_sec != NULL;
8029a119
NC		 14574 stub_sec = stub_sec->next)
14575 {
14576 /* Ignore non-stub sections. */
14577 if (!strstr (stub_sec->name, STUB_SUFFIX))
14578 continue;
da5938a2 14579
8029a119 14580 osi.sec = stub_sec;
da5938a2 14581
8029a119
NC		 14582 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14583 (output_bfd, osi.sec->output_section);
da5938a2 14584
8029a119
NC		 14585 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14586 }
14587 }
da5938a2 14588
91a5743d 14589 /* Finally, output mapping symbols for the PLT. */
34e77a92 14590 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 14591 {
34e77a92
RS		 14592 osi.sec = htab->root.splt;
14593 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14594 (output_bfd, osi.sec->output_section));
14595
14596 /* Output mapping symbols for the plt header. SymbianOS does not have a
14597 plt header. */
14598 if (htab->vxworks_p)
14599 {
14600 /* VxWorks shared libraries have no PLT header. */
14601 if (!info->shared)
14602 {
14603 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14604 return FALSE;
14605 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14606 return FALSE;
14607 }
14608 }
14609 else if (!htab->symbian_p)
4e617b1e 14610 {
7413f23f 14611 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 14612 return FALSE;
34e77a92
RS		 14613#ifndef FOUR_WORD_PLT
14614 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 14615 return FALSE;
34e77a92 14616#endif
4e617b1e
PB		 14617 }
14618 }
34e77a92
RS		 14619 if ((htab->root.splt && htab->root.splt->size > 0)
14620 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 14621 {
34e77a92
RS		 14622 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14623 for (input_bfd = info->input_bfds;
14624 input_bfd != NULL;
14625 input_bfd = input_bfd->link_next)
14626 {
14627 struct arm_local_iplt_info **local_iplt;
14628 unsigned int i, num_syms;
4e617b1e 14629
34e77a92
RS		 14630 local_iplt = elf32_arm_local_iplt (input_bfd);
14631 if (local_iplt != NULL)
14632 {
14633 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14634 for (i = 0; i < num_syms; i++)
14635 if (local_iplt[i] != NULL
14636 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14637 &local_iplt[i]->root,
14638 &local_iplt[i]->arm))
14639 return FALSE;
14640 }
14641 }
14642 }
0855e32b
NS		 14643 if (htab->dt_tlsdesc_plt != 0)
14644 {
14645 /* Mapping symbols for the lazy tls trampoline. */
14646 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14647 return FALSE;
14648
14649 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14650 htab->dt_tlsdesc_plt + 24))
14651 return FALSE;
14652 }
14653 if (htab->tls_trampoline != 0)
14654 {
14655 /* Mapping symbols for the tls trampoline. */
14656 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14657 return FALSE;
14658#ifdef FOUR_WORD_PLT
14659 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14660 htab->tls_trampoline + 12))
14661 return FALSE;
14662#endif
14663 }
14664
4e617b1e
PB		 14665 return TRUE;
14666}
14667
e489d0ae
PB		 14668/* Allocate target specific section data. */
14669
14670static bfd_boolean
14671elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14672{
f592407e
AM		 14673 if (!sec->used_by_bfd)
14674 {
14675 _arm_elf_section_data *sdata;
14676 bfd_size_type amt = sizeof (*sdata);
e489d0ae 14677
21d799b5 14678 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 14679 if (sdata == NULL)
14680 return FALSE;
14681 sec->used_by_bfd = sdata;
14682 }
e489d0ae
PB		 14683
14684 return _bfd_elf_new_section_hook (abfd, sec);
14685}
14686
14687
14688/* Used to order a list of mapping symbols by address. */
14689
14690static int
14691elf32_arm_compare_mapping (const void * a, const void * b)
14692{
7f6a71ff
JM		 14693 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14694 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14695
14696 if (amap->vma > bmap->vma)
14697 return 1;
14698 else if (amap->vma < bmap->vma)
14699 return -1;
14700 else if (amap->type > bmap->type)
14701 /* Ensure results do not depend on the host qsort for objects with
14702 multiple mapping symbols at the same address by sorting on type
14703 after vma. */
14704 return 1;
14705 else if (amap->type < bmap->type)
14706 return -1;
14707 else
14708 return 0;
e489d0ae
PB		 14709}
14710
2468f9c9
PB		 14711/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
14712
14713static unsigned long
14714offset_prel31 (unsigned long addr, bfd_vma offset)
14715{
14716 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
14717}
14718
14719/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
14720 relocations. */
14721
14722static void
14723copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
14724{
14725 unsigned long first_word = bfd_get_32 (output_bfd, from);
14726 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
14727
14728 /* High bit of first word is supposed to be zero. */
14729 if ((first_word & 0x80000000ul) == 0)
14730 first_word = offset_prel31 (first_word, offset);
14731
14732 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
14733 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
14734 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
14735 second_word = offset_prel31 (second_word, offset);
14736
14737 bfd_put_32 (output_bfd, first_word, to);
14738 bfd_put_32 (output_bfd, second_word, to + 4);
14739}
e489d0ae 14740
48229727
JB		 14741/* Data for make_branch_to_a8_stub(). */
14742
14743struct a8_branch_to_stub_data {
14744 asection *writing_section;
14745 bfd_byte *contents;
14746};
14747
14748
14749/* Helper to insert branches to Cortex-A8 erratum stubs in the right
14750 places for a particular section. */
14751
14752static bfd_boolean
14753make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
14754 void *in_arg)
14755{
14756 struct elf32_arm_stub_hash_entry *stub_entry;
14757 struct a8_branch_to_stub_data *data;
14758 bfd_byte *contents;
14759 unsigned long branch_insn;
14760 bfd_vma veneered_insn_loc, veneer_entry_loc;
14761 bfd_signed_vma branch_offset;
14762 bfd *abfd;
91d6fa6a 14763 unsigned int target;
48229727
JB		 14764
14765 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14766 data = (struct a8_branch_to_stub_data *) in_arg;
14767
14768 if (stub_entry->target_section != data->writing_section
4563a860 14769 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 14770 return TRUE;
14771
14772 contents = data->contents;
14773
14774 veneered_insn_loc = stub_entry->target_section->output_section->vma
14775 + stub_entry->target_section->output_offset
14776 + stub_entry->target_value;
14777
14778 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
14779 + stub_entry->stub_sec->output_offset
14780 + stub_entry->stub_offset;
14781
14782 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
14783 veneered_insn_loc &= ~3u;
14784
14785 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
14786
14787 abfd = stub_entry->target_section->owner;
91d6fa6a 14788 target = stub_entry->target_value;
48229727
JB		 14789
14790 /* We attempt to avoid this condition by setting stubs_always_after_branch
14791 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
14792 This check is just to be on the safe side... */
14793 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
14794 {
14795 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
14796 "allocated in unsafe location"), abfd);
14797 return FALSE;
14798 }
14799
14800 switch (stub_entry->stub_type)
14801 {
14802 case arm_stub_a8_veneer_b:
14803 case arm_stub_a8_veneer_b_cond:
14804 branch_insn = 0xf0009000;
14805 goto jump24;
14806
14807 case arm_stub_a8_veneer_blx:
14808 branch_insn = 0xf000e800;
14809 goto jump24;
14810
14811 case arm_stub_a8_veneer_bl:
14812 {
14813 unsigned int i1, j1, i2, j2, s;
14814
14815 branch_insn = 0xf000d000;
14816
14817 jump24:
14818 if (branch_offset < -16777216 || branch_offset > 16777214)
14819 {
14820 /* There's not much we can do apart from complain if this
14821 happens. */
14822 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
14823 "of range (input file too large)"), abfd);
14824 return FALSE;
14825 }
14826
14827 /* i1 = not(j1 eor s), so:
14828 not i1 = j1 eor s
14829 j1 = (not i1) eor s. */
14830
14831 branch_insn |= (branch_offset >> 1) & 0x7ff;
14832 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
14833 i2 = (branch_offset >> 22) & 1;
14834 i1 = (branch_offset >> 23) & 1;
14835 s = (branch_offset >> 24) & 1;
14836 j1 = (!i1) ^ s;
14837 j2 = (!i2) ^ s;
14838 branch_insn |= j2 << 11;
14839 branch_insn |= j1 << 13;
14840 branch_insn |= s << 26;
14841 }
14842 break;
14843
14844 default:
14845 BFD_FAIL ();
14846 return FALSE;
14847 }
14848
91d6fa6a
NC		 14849 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
14850 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 14851
14852 return TRUE;
14853}
14854
e489d0ae
PB		 14855/* Do code byteswapping. Return FALSE afterwards so that the section is
14856 written out as normal. */
14857
14858static bfd_boolean
c7b8f16e 14859elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 14860 struct bfd_link_info *link_info,
14861 asection *sec,
e489d0ae
PB		 14862 bfd_byte *contents)
14863{
48229727 14864 unsigned int mapcount, errcount;
8e3de13a 14865 _arm_elf_section_data *arm_data;
c7b8f16e 14866 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 14867 elf32_arm_section_map *map;
c7b8f16e 14868 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 14869 bfd_vma ptr;
14870 bfd_vma end;
c7b8f16e 14871 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 14872 bfd_byte tmp;
48229727 14873 unsigned int i;
57e8b36a 14874
4dfe6ac6
NC		 14875 if (globals == NULL)
14876 return FALSE;
14877
8e3de13a
NC		 14878 /* If this section has not been allocated an _arm_elf_section_data
14879 structure then we cannot record anything. */
14880 arm_data = get_arm_elf_section_data (sec);
14881 if (arm_data == NULL)
14882 return FALSE;
14883
14884 mapcount = arm_data->mapcount;
14885 map = arm_data->map;
c7b8f16e
JB		 14886 errcount = arm_data->erratumcount;
14887
14888 if (errcount != 0)
14889 {
14890 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
14891
14892 for (errnode = arm_data->erratumlist; errnode != 0;
14893 errnode = errnode->next)
14894 {
91d6fa6a 14895 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 14896
14897 switch (errnode->type)
14898 {
14899 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
14900 {
14901 bfd_vma branch_to_veneer;
14902 /* Original condition code of instruction, plus bit mask for
14903 ARM B instruction. */
14904 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
14905 | 0x0a000000;
14906
14907 /* The instruction is before the label. */
91d6fa6a 14908 target -= 4;
c7b8f16e
JB		 14909
14910 /* Above offset included in -4 below. */
14911 branch_to_veneer = errnode->u.b.veneer->vma
14912 - errnode->vma - 4;
14913
14914 if ((signed) branch_to_veneer < -(1 << 25)
14915 || (signed) branch_to_veneer >= (1 << 25))
14916 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14917 "range"), output_bfd);
14918
14919 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 14920 contents[endianflip ^ target] = insn & 0xff;
14921 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14922 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14923 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14924 }
14925 break;
14926
14927 case VFP11_ERRATUM_ARM_VENEER:
14928 {
14929 bfd_vma branch_from_veneer;
14930 unsigned int insn;
14931
14932 /* Take size of veneer into account. */
14933 branch_from_veneer = errnode->u.v.branch->vma
14934 - errnode->vma - 12;
14935
14936 if ((signed) branch_from_veneer < -(1 << 25)
14937 || (signed) branch_from_veneer >= (1 << 25))
14938 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14939 "range"), output_bfd);
14940
14941 /* Original instruction. */
14942 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 14943 contents[endianflip ^ target] = insn & 0xff;
14944 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14945 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14946 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14947
14948 /* Branch back to insn after original insn. */
14949 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 14950 contents[endianflip ^ (target + 4)] = insn & 0xff;
14951 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
14952 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
14953 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14954 }
14955 break;
14956
14957 default:
14958 abort ();
14959 }
14960 }
14961 }
e489d0ae 14962
2468f9c9
PB		 14963 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
14964 {
14965 arm_unwind_table_edit *edit_node
14966 = arm_data->u.exidx.unwind_edit_list;
14967 /* Now, sec->size is the size of the section we will write. The original
14968 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
14969 markers) was sec->rawsize. (This isn't the case if we perform no
14970 edits, then rawsize will be zero and we should use size). */
21d799b5 14971 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 14972 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
14973 unsigned int in_index, out_index;
14974 bfd_vma add_to_offsets = 0;
14975
14976 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
14977 {
14978 if (edit_node)
14979 {
14980 unsigned int edit_index = edit_node->index;
14981
14982 if (in_index < edit_index && in_index * 8 < input_size)
14983 {
14984 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
14985 contents + in_index * 8, add_to_offsets);
14986 out_index++;
14987 in_index++;
14988 }
14989 else if (in_index == edit_index
14990 || (in_index * 8 >= input_size
14991 && edit_index == UINT_MAX))
14992 {
14993 switch (edit_node->type)
14994 {
14995 case DELETE_EXIDX_ENTRY:
14996 in_index++;
14997 add_to_offsets += 8;
14998 break;
14999
15000 case INSERT_EXIDX_CANTUNWIND_AT_END:
15001 {
15002 asection *text_sec = edit_node->linked_section;
15003 bfd_vma text_offset = text_sec->output_section->vma
15004 + text_sec->output_offset
15005 + text_sec->size;
15006 bfd_vma exidx_offset = offset + out_index * 8;
15007 unsigned long prel31_offset;
15008
15009 /* Note: this is meant to be equivalent to an
15010 R_ARM_PREL31 relocation. These synthetic
15011 EXIDX_CANTUNWIND markers are not relocated by the
15012 usual BFD method. */
15013 prel31_offset = (text_offset - exidx_offset)
15014 & 0x7ffffffful;
15015
15016 /* First address we can't unwind. */
15017 bfd_put_32 (output_bfd, prel31_offset,
15018 &edited_contents[out_index * 8]);
15019
15020 /* Code for EXIDX_CANTUNWIND. */
15021 bfd_put_32 (output_bfd, 0x1,
15022 &edited_contents[out_index * 8 + 4]);
15023
15024 out_index++;
15025 add_to_offsets -= 8;
15026 }
15027 break;
15028 }
15029
15030 edit_node = edit_node->next;
15031 }
15032 }
15033 else
15034 {
15035 /* No more edits, copy remaining entries verbatim. */
15036 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15037 contents + in_index * 8, add_to_offsets);
15038 out_index++;
15039 in_index++;
15040 }
15041 }
15042
15043 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15044 bfd_set_section_contents (output_bfd, sec->output_section,
15045 edited_contents,
15046 (file_ptr) sec->output_offset, sec->size);
15047
15048 return TRUE;
15049 }
15050
48229727
JB		 15051 /* Fix code to point to Cortex-A8 erratum stubs. */
15052 if (globals->fix_cortex_a8)
15053 {
15054 struct a8_branch_to_stub_data data;
15055
15056 data.writing_section = sec;
15057 data.contents = contents;
15058
15059 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15060 &data);
15061 }
15062
e489d0ae
PB		 15063 if (mapcount == 0)
15064 return FALSE;
15065
c7b8f16e 15066 if (globals->byteswap_code)
e489d0ae 15067 {
c7b8f16e 15068 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15069
c7b8f16e
JB		 15070 ptr = map[0].vma;
15071 for (i = 0; i < mapcount; i++)
15072 {
15073 if (i == mapcount - 1)
15074 end = sec->size;
15075 else
15076 end = map[i + 1].vma;
e489d0ae 15077
c7b8f16e 15078 switch (map[i].type)
e489d0ae 15079 {
c7b8f16e
JB		 15080 case 'a':
15081 /* Byte swap code words. */
15082 while (ptr + 3 < end)
15083 {
15084 tmp = contents[ptr];
15085 contents[ptr] = contents[ptr + 3];
15086 contents[ptr + 3] = tmp;
15087 tmp = contents[ptr + 1];
15088 contents[ptr + 1] = contents[ptr + 2];
15089 contents[ptr + 2] = tmp;
15090 ptr += 4;
15091 }
15092 break;
e489d0ae 15093
c7b8f16e
JB		 15094 case 't':
15095 /* Byte swap code halfwords. */
15096 while (ptr + 1 < end)
15097 {
15098 tmp = contents[ptr];
15099 contents[ptr] = contents[ptr + 1];
15100 contents[ptr + 1] = tmp;
15101 ptr += 2;
15102 }
15103 break;
15104
15105 case 'd':
15106 /* Leave data alone. */
15107 break;
15108 }
15109 ptr = end;
15110 }
e489d0ae 15111 }
8e3de13a 15112
93204d3a 15113 free (map);
47b2e99c 15114 arm_data->mapcount = -1;
c7b8f16e 15115 arm_data->mapsize = 0;
8e3de13a 15116 arm_data->map = NULL;
8e3de13a 15117
e489d0ae
PB		 15118 return FALSE;
15119}
15120
0beaef2b
PB		 15121/* Mangle thumb function symbols as we read them in. */
15122
8384fb8f 15123static bfd_boolean
0beaef2b
PB		 15124elf32_arm_swap_symbol_in (bfd * abfd,
15125 const void *psrc,
15126 const void *pshn,
15127 Elf_Internal_Sym *dst)
15128{
8384fb8f
AM		 15129 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15130 return FALSE;
0beaef2b
PB		 15131
15132 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15133 the address. */
63e1a0fc
PB		 15134 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15135 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15136 {
63e1a0fc
PB		 15137 if (dst->st_value & 1)
15138 {
15139 dst->st_value &= ~(bfd_vma) 1;
15140 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15141 }
15142 else
15143 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15144 }
15145 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15146 {
15147 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15148 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15149 }
35fc36a8
RS		 15150 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15151 dst->st_target_internal = ST_BRANCH_LONG;
15152 else
63e1a0fc 15153 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15154
8384fb8f 15155 return TRUE;
0beaef2b
PB		 15156}
15157
15158
15159/* Mangle thumb function symbols as we write them out. */
15160
15161static void
15162elf32_arm_swap_symbol_out (bfd *abfd,
15163 const Elf_Internal_Sym *src,
15164 void *cdst,
15165 void *shndx)
15166{
15167 Elf_Internal_Sym newsym;
15168
15169 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15170 of the address set, as per the new EABI. We do this unconditionally
15171 because objcopy does not set the elf header flags until after
15172 it writes out the symbol table. */
35fc36a8 15173 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15174 {
15175 newsym = *src;
34e77a92
RS		 15176 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15177 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 15178 if (newsym.st_shndx != SHN_UNDEF)
15179 {
15180 /* Do this only for defined symbols. At link type, the static
15181 linker will simulate the work of dynamic linker of resolving
15182 symbols and will carry over the thumbness of found symbols to
15183 the output symbol table. It's not clear how it happens, but
b0fead2b 15184 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 15185 runtime, and writing '1' for them will be confusing for users
15186 and possibly for dynamic linker itself.
15187 */
15188 newsym.st_value |= 1;
15189 }
906e58ca 15190
0beaef2b
PB		 15191 src = &newsym;
15192 }
15193 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15194}
15195
b294bdf8
MM		 15196/* Add the PT_ARM_EXIDX program header. */
15197
15198static bfd_boolean
906e58ca 15199elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15200 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15201{
15202 struct elf_segment_map *m;
15203 asection *sec;
15204
15205 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15206 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15207 {
15208 /* If there is already a PT_ARM_EXIDX header, then we do not
15209 want to add another one. This situation arises when running
15210 "strip"; the input binary already has the header. */
15211 m = elf_tdata (abfd)->segment_map;
15212 while (m && m->p_type != PT_ARM_EXIDX)
15213 m = m->next;
15214 if (!m)
15215 {
21d799b5
NC		 15216 m = (struct elf_segment_map *)
15217 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15218 if (m == NULL)
15219 return FALSE;
15220 m->p_type = PT_ARM_EXIDX;
15221 m->count = 1;
15222 m->sections[0] = sec;
15223
15224 m->next = elf_tdata (abfd)->segment_map;
15225 elf_tdata (abfd)->segment_map = m;
15226 }
15227 }
15228
15229 return TRUE;
15230}
15231
15232/* We may add a PT_ARM_EXIDX program header. */
15233
15234static int
a6b96beb
AM		 15235elf32_arm_additional_program_headers (bfd *abfd,
15236 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15237{
15238 asection *sec;
15239
15240 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15241 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15242 return 1;
15243 else
15244 return 0;
15245}
15246
34e77a92
RS		 15247/* Hook called by the linker routine which adds symbols from an object
15248 file. */
15249
15250static bfd_boolean
15251elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15252 Elf_Internal_Sym *sym, const char **namep,
15253 flagword *flagsp, asection **secp, bfd_vma *valp)
15254{
15255 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15256 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15257 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15258 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92
RS		 15259
15260 if (elf32_arm_hash_table (info)->vxworks_p
15261 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15262 flagsp, secp, valp))
15263 return FALSE;
15264
15265 return TRUE;
15266}
15267
0beaef2b 15268/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15269const struct elf_size_info elf32_arm_size_info =
15270{
0beaef2b
PB		 15271 sizeof (Elf32_External_Ehdr),
15272 sizeof (Elf32_External_Phdr),
15273 sizeof (Elf32_External_Shdr),
15274 sizeof (Elf32_External_Rel),
15275 sizeof (Elf32_External_Rela),
15276 sizeof (Elf32_External_Sym),
15277 sizeof (Elf32_External_Dyn),
15278 sizeof (Elf_External_Note),
15279 4,
15280 1,
15281 32, 2,
15282 ELFCLASS32, EV_CURRENT,
15283 bfd_elf32_write_out_phdrs,
15284 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15285 bfd_elf32_checksum_contents,
0beaef2b
PB		 15286 bfd_elf32_write_relocs,
15287 elf32_arm_swap_symbol_in,
15288 elf32_arm_swap_symbol_out,
15289 bfd_elf32_slurp_reloc_table,
15290 bfd_elf32_slurp_symbol_table,
15291 bfd_elf32_swap_dyn_in,
15292 bfd_elf32_swap_dyn_out,
15293 bfd_elf32_swap_reloc_in,
15294 bfd_elf32_swap_reloc_out,
15295 bfd_elf32_swap_reloca_in,
15296 bfd_elf32_swap_reloca_out
15297};
15298
252b5132 15299#define ELF_ARCH bfd_arch_arm
ae95ffa6 15300#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 15301#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 15302#ifdef __QNXTARGET__
15303#define ELF_MAXPAGESIZE 0x1000
15304#else
f21f3fe0 15305#define ELF_MAXPAGESIZE 0x8000
d0facd1b 15306#endif
b1342370 15307#define ELF_MINPAGESIZE 0x1000
24718e3b 15308#define ELF_COMMONPAGESIZE 0x1000
252b5132 15309
ba93b8ac
DJ		 15310#define bfd_elf32_mkobject elf32_arm_mkobject
15311
99e4ae17
AJ		 15312#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15313#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 15314#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15315#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15316#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 15317#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 15318#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 15319#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 15320#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 15321#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 15322#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 15323#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 15324#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 15325
15326#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15327#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 15328#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 15329#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15330#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 15331#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 15332#define elf_backend_write_section elf32_arm_write_section
252b5132 15333#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 15334#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 15335#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15336#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15337#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 15338#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 15339#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 15340#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 15341#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 15342#define elf_backend_object_p elf32_arm_object_p
e16bb312 15343#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 15344#define elf_backend_fake_sections elf32_arm_fake_sections
15345#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 15346#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 15347#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 15348#define elf_backend_size_info elf32_arm_size_info
b294bdf8 15349#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 15350#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15351#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15352#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 15353#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 15354
15355#define elf_backend_can_refcount 1
15356#define elf_backend_can_gc_sections 1
15357#define elf_backend_plt_readonly 1
15358#define elf_backend_want_got_plt 1
15359#define elf_backend_want_plt_sym 0
15360#define elf_backend_may_use_rel_p 1
15361#define elf_backend_may_use_rela_p 0
4e7fd91e 15362#define elf_backend_default_use_rela_p 0
252b5132 15363
04f7c78d 15364#define elf_backend_got_header_size 12
04f7c78d 15365
906e58ca
NC		 15366#undef elf_backend_obj_attrs_vendor
15367#define elf_backend_obj_attrs_vendor "aeabi"
15368#undef elf_backend_obj_attrs_section
15369#define elf_backend_obj_attrs_section ".ARM.attributes"
15370#undef elf_backend_obj_attrs_arg_type
15371#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15372#undef elf_backend_obj_attrs_section_type
104d59d1 15373#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 15374#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
e8b36cd1 15375#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 15376
252b5132 15377#include "elf32-target.h"
7f266840 15378
906e58ca 15379/* VxWorks Targets. */
4e7fd91e 15380
906e58ca 15381#undef TARGET_LITTLE_SYM
4e7fd91e 15382#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 15383#undef TARGET_LITTLE_NAME
4e7fd91e 15384#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 15385#undef TARGET_BIG_SYM
4e7fd91e 15386#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 15387#undef TARGET_BIG_NAME
4e7fd91e
PB		 15388#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15389
15390/* Like elf32_arm_link_hash_table_create -- but overrides
15391 appropriately for VxWorks. */
906e58ca 15392
4e7fd91e
PB		 15393static struct bfd_link_hash_table *
15394elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15395{
15396 struct bfd_link_hash_table *ret;
15397
15398 ret = elf32_arm_link_hash_table_create (abfd);
15399 if (ret)
15400 {
15401 struct elf32_arm_link_hash_table *htab
00a97672 15402 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 15403 htab->use_rel = 0;
00a97672 15404 htab->vxworks_p = 1;
4e7fd91e
PB		 15405 }
15406 return ret;
906e58ca 15407}
4e7fd91e 15408
00a97672
RS		 15409static void
15410elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15411{
15412 elf32_arm_final_write_processing (abfd, linker);
15413 elf_vxworks_final_write_processing (abfd, linker);
15414}
15415
906e58ca 15416#undef elf32_bed
4e7fd91e
PB		 15417#define elf32_bed elf32_arm_vxworks_bed
15418
906e58ca
NC		 15419#undef bfd_elf32_bfd_link_hash_table_create
15420#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 15421#undef elf_backend_final_write_processing
15422#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15423#undef elf_backend_emit_relocs
15424#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 15425
906e58ca 15426#undef elf_backend_may_use_rel_p
00a97672 15427#define elf_backend_may_use_rel_p 0
906e58ca 15428#undef elf_backend_may_use_rela_p
00a97672 15429#define elf_backend_may_use_rela_p 1
906e58ca 15430#undef elf_backend_default_use_rela_p
00a97672 15431#define elf_backend_default_use_rela_p 1
906e58ca 15432#undef elf_backend_want_plt_sym
00a97672 15433#define elf_backend_want_plt_sym 1
906e58ca 15434#undef ELF_MAXPAGESIZE
00a97672 15435#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 15436
15437#include "elf32-target.h"
15438
15439
21d799b5
NC		 15440/* Merge backend specific data from an object file to the output
15441 object file when linking. */
15442
15443static bfd_boolean
15444elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15445{
15446 flagword out_flags;
15447 flagword in_flags;
15448 bfd_boolean flags_compatible = TRUE;
15449 asection *sec;
15450
15451 /* Check if we have the same endianess. */
15452 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15453 return FALSE;
15454
15455 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15456 return TRUE;
15457
15458 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15459 return FALSE;
15460
15461 /* The input BFD must have had its flags initialised. */
15462 /* The following seems bogus to me -- The flags are initialized in
15463 the assembler but I don't think an elf_flags_init field is
15464 written into the object. */
15465 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15466
15467 in_flags = elf_elfheader (ibfd)->e_flags;
15468 out_flags = elf_elfheader (obfd)->e_flags;
15469
15470 /* In theory there is no reason why we couldn't handle this. However
15471 in practice it isn't even close to working and there is no real
15472 reason to want it. */
15473 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15474 && !(ibfd->flags & DYNAMIC)
15475 && (in_flags & EF_ARM_BE8))
15476 {
15477 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15478 ibfd);
15479 return FALSE;
15480 }
15481
15482 if (!elf_flags_init (obfd))
15483 {
15484 /* If the input is the default architecture and had the default
15485 flags then do not bother setting the flags for the output
15486 architecture, instead allow future merges to do this. If no
15487 future merges ever set these flags then they will retain their
15488 uninitialised values, which surprise surprise, correspond
15489 to the default values. */
15490 if (bfd_get_arch_info (ibfd)->the_default
15491 && elf_elfheader (ibfd)->e_flags == 0)
15492 return TRUE;
15493
15494 elf_flags_init (obfd) = TRUE;
15495 elf_elfheader (obfd)->e_flags = in_flags;
15496
15497 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15498 && bfd_get_arch_info (obfd)->the_default)
15499 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15500
15501 return TRUE;
15502 }
15503
15504 /* Determine what should happen if the input ARM architecture
15505 does not match the output ARM architecture. */
15506 if (! bfd_arm_merge_machines (ibfd, obfd))
15507 return FALSE;
15508
15509 /* Identical flags must be compatible. */
15510 if (in_flags == out_flags)
15511 return TRUE;
15512
15513 /* Check to see if the input BFD actually contains any sections. If
15514 not, its flags may not have been initialised either, but it
15515 cannot actually cause any incompatiblity. Do not short-circuit
15516 dynamic objects; their section list may be emptied by
15517 elf_link_add_object_symbols.
15518
15519 Also check to see if there are no code sections in the input.
15520 In this case there is no need to check for code specific flags.
15521 XXX - do we need to worry about floating-point format compatability
15522 in data sections ? */
15523 if (!(ibfd->flags & DYNAMIC))
15524 {
15525 bfd_boolean null_input_bfd = TRUE;
15526 bfd_boolean only_data_sections = TRUE;
15527
15528 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15529 {
15530 /* Ignore synthetic glue sections. */
15531 if (strcmp (sec->name, ".glue_7")
15532 && strcmp (sec->name, ".glue_7t"))
15533 {
15534 if ((bfd_get_section_flags (ibfd, sec)
15535 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15536 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15537 only_data_sections = FALSE;
15538
15539 null_input_bfd = FALSE;
15540 break;
15541 }
15542 }
15543
15544 if (null_input_bfd || only_data_sections)
15545 return TRUE;
15546 }
15547
15548 /* Complain about various flag mismatches. */
15549 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15550 EF_ARM_EABI_VERSION (out_flags)))
15551 {
15552 _bfd_error_handler
15553 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15554 ibfd, obfd,
15555 (in_flags & EF_ARM_EABIMASK) >> 24,
15556 (out_flags & EF_ARM_EABIMASK) >> 24);
15557 return FALSE;
15558 }
15559
15560 /* Not sure what needs to be checked for EABI versions >= 1. */
15561 /* VxWorks libraries do not use these flags. */
15562 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15563 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15564 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15565 {
15566 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15567 {
15568 _bfd_error_handler
15569 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15570 ibfd, obfd,
15571 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15572 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15573 flags_compatible = FALSE;
15574 }
15575
15576 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15577 {
15578 if (in_flags & EF_ARM_APCS_FLOAT)
15579 _bfd_error_handler
15580 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15581 ibfd, obfd);
15582 else
15583 _bfd_error_handler
15584 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15585 ibfd, obfd);
15586
15587 flags_compatible = FALSE;
15588 }
15589
15590 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15591 {
15592 if (in_flags & EF_ARM_VFP_FLOAT)
15593 _bfd_error_handler
15594 (_("error: %B uses VFP instructions, whereas %B does not"),
15595 ibfd, obfd);
15596 else
15597 _bfd_error_handler
15598 (_("error: %B uses FPA instructions, whereas %B does not"),
15599 ibfd, obfd);
15600
15601 flags_compatible = FALSE;
15602 }
15603
15604 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
15605 {
15606 if (in_flags & EF_ARM_MAVERICK_FLOAT)
15607 _bfd_error_handler
15608 (_("error: %B uses Maverick instructions, whereas %B does not"),
15609 ibfd, obfd);
15610 else
15611 _bfd_error_handler
15612 (_("error: %B does not use Maverick instructions, whereas %B does"),
15613 ibfd, obfd);
15614
15615 flags_compatible = FALSE;
15616 }
15617
15618#ifdef EF_ARM_SOFT_FLOAT
15619 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
15620 {
15621 /* We can allow interworking between code that is VFP format
15622 layout, and uses either soft float or integer regs for
15623 passing floating point arguments and results. We already
15624 know that the APCS_FLOAT flags match; similarly for VFP
15625 flags. */
15626 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
15627 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
15628 {
15629 if (in_flags & EF_ARM_SOFT_FLOAT)
15630 _bfd_error_handler
15631 (_("error: %B uses software FP, whereas %B uses hardware FP"),
15632 ibfd, obfd);
15633 else
15634 _bfd_error_handler
15635 (_("error: %B uses hardware FP, whereas %B uses software FP"),
15636 ibfd, obfd);
15637
15638 flags_compatible = FALSE;
15639 }
15640 }
15641#endif
15642
15643 /* Interworking mismatch is only a warning. */
15644 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
15645 {
15646 if (in_flags & EF_ARM_INTERWORK)
15647 {
15648 _bfd_error_handler
15649 (_("Warning: %B supports interworking, whereas %B does not"),
15650 ibfd, obfd);
15651 }
15652 else
15653 {
15654 _bfd_error_handler
15655 (_("Warning: %B does not support interworking, whereas %B does"),
15656 ibfd, obfd);
15657 }
15658 }
15659 }
15660
15661 return flags_compatible;
15662}
15663
15664
906e58ca 15665/* Symbian OS Targets. */
7f266840 15666
906e58ca 15667#undef TARGET_LITTLE_SYM
7f266840 15668#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 15669#undef TARGET_LITTLE_NAME
7f266840 15670#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 15671#undef TARGET_BIG_SYM
7f266840 15672#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 15673#undef TARGET_BIG_NAME
7f266840
DJ		 15674#define TARGET_BIG_NAME "elf32-bigarm-symbian"
15675
15676/* Like elf32_arm_link_hash_table_create -- but overrides
15677 appropriately for Symbian OS. */
906e58ca 15678
7f266840
DJ		 15679static struct bfd_link_hash_table *
15680elf32_arm_symbian_link_hash_table_create (bfd *abfd)
15681{
15682 struct bfd_link_hash_table *ret;
15683
15684 ret = elf32_arm_link_hash_table_create (abfd);
15685 if (ret)
15686 {
15687 struct elf32_arm_link_hash_table *htab
15688 = (struct elf32_arm_link_hash_table *)ret;
15689 /* There is no PLT header for Symbian OS. */
15690 htab->plt_header_size = 0;
95720a86
DJ		 15691 /* The PLT entries are each one instruction and one word. */
15692 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 15693 htab->symbian_p = 1;
33bfe774
JB		 15694 /* Symbian uses armv5t or above, so use_blx is always true. */
15695 htab->use_blx = 1;
67687978 15696 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 15697 }
15698 return ret;
906e58ca 15699}
7f266840 15700
b35d266b 15701static const struct bfd_elf_special_section
551b43fd 15702elf32_arm_symbian_special_sections[] =
7f266840 15703{
5cd3778d
MM		 15704 /* In a BPABI executable, the dynamic linking sections do not go in
15705 the loadable read-only segment. The post-linker may wish to
15706 refer to these sections, but they are not part of the final
15707 program image. */
0112cd26
NC		 15708 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
15709 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
15710 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
15711 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
15712 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 15713 /* These sections do not need to be writable as the SymbianOS
15714 postlinker will arrange things so that no dynamic relocation is
15715 required. */
0112cd26
NC		 15716 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
15717 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
15718 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
15719 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 15720};
15721
c3c76620 15722static void
906e58ca 15723elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 15724 struct bfd_link_info *link_info)
c3c76620
MM		 15725{
15726 /* BPABI objects are never loaded directly by an OS kernel; they are
15727 processed by a postlinker first, into an OS-specific format. If
15728 the D_PAGED bit is set on the file, BFD will align segments on
15729 page boundaries, so that an OS can directly map the file. With
15730 BPABI objects, that just results in wasted space. In addition,
15731 because we clear the D_PAGED bit, map_sections_to_segments will
15732 recognize that the program headers should not be mapped into any
15733 loadable segment. */
15734 abfd->flags &= ~D_PAGED;
906e58ca 15735 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 15736}
7f266840
DJ		 15737
15738static bfd_boolean
906e58ca 15739elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 15740 struct bfd_link_info *info)
7f266840
DJ		 15741{
15742 struct elf_segment_map *m;
15743 asection *dynsec;
15744
7f266840
DJ		 15745 /* BPABI shared libraries and executables should have a PT_DYNAMIC
15746 segment. However, because the .dynamic section is not marked
15747 with SEC_LOAD, the generic ELF code will not create such a
15748 segment. */
15749 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
15750 if (dynsec)
15751 {
8ded5a0f
AM		 15752 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
15753 if (m->p_type == PT_DYNAMIC)
15754 break;
15755
15756 if (m == NULL)
15757 {
15758 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
15759 m->next = elf_tdata (abfd)->segment_map;
15760 elf_tdata (abfd)->segment_map = m;
15761 }
7f266840
DJ		 15762 }
15763
b294bdf8
MM		 15764 /* Also call the generic arm routine. */
15765 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 15766}
15767
95720a86
DJ		 15768/* Return address for Ith PLT stub in section PLT, for relocation REL
15769 or (bfd_vma) -1 if it should not be included. */
15770
15771static bfd_vma
15772elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
15773 const arelent *rel ATTRIBUTE_UNUSED)
15774{
15775 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
15776}
15777
15778
8029a119 15779#undef elf32_bed
7f266840
DJ		 15780#define elf32_bed elf32_arm_symbian_bed
15781
15782/* The dynamic sections are not allocated on SymbianOS; the postlinker
15783 will process them and then discard them. */
906e58ca 15784#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 15785#define ELF_DYNAMIC_SEC_FLAGS \
15786 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
15787
00a97672 15788#undef elf_backend_emit_relocs
c3c76620 15789
906e58ca
NC		 15790#undef bfd_elf32_bfd_link_hash_table_create
15791#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
15792#undef elf_backend_special_sections
15793#define elf_backend_special_sections elf32_arm_symbian_special_sections
15794#undef elf_backend_begin_write_processing
15795#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
15796#undef elf_backend_final_write_processing
15797#define elf_backend_final_write_processing elf32_arm_final_write_processing
15798
15799#undef elf_backend_modify_segment_map
7f266840
DJ		 15800#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
15801
15802/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 15803#undef elf_backend_got_header_size
7f266840
DJ		 15804#define elf_backend_got_header_size 0
15805
15806/* Similarly, there is no .got.plt section. */
906e58ca 15807#undef elf_backend_want_got_plt
7f266840
DJ		 15808#define elf_backend_want_got_plt 0
15809
906e58ca 15810#undef elf_backend_plt_sym_val
95720a86
DJ		 15811#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
15812
906e58ca 15813#undef elf_backend_may_use_rel_p
00a97672 15814#define elf_backend_may_use_rel_p 1
906e58ca 15815#undef elf_backend_may_use_rela_p
00a97672 15816#define elf_backend_may_use_rela_p 0
906e58ca 15817#undef elf_backend_default_use_rela_p
00a97672 15818#define elf_backend_default_use_rela_p 0
906e58ca 15819#undef elf_backend_want_plt_sym
00a97672 15820#define elf_backend_want_plt_sym 0
906e58ca 15821#undef ELF_MAXPAGESIZE
00a97672 15822#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 15823
7f266840 15824#include "elf32-target.h"
GDB Binutils - Deliverables
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