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* elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Don't segfault on
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c
AM		 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
24718e3b 64static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 65
3e6b1042
DJ		 66static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
68 asection *sec,
69 bfd_byte *contents);
70
7f266840
DJ		 71/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
74
c19d1205 75static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 76{
8029a119 77 /* No relocation. */
7f266840
DJ		 78 HOWTO (R_ARM_NONE, /* type */
79 0, /* rightshift */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
81 0, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
88 0, /* src_mask */
89 0, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 HOWTO (R_ARM_PC24, /* type */
93 2, /* rightshift */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
95 24, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
108 0, /* rightshift */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
110 32, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
123 0, /* rightshift */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
125 32, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
c19d1205 136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 137 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 138 0, /* rightshift */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 140 32, /* bitsize */
141 TRUE, /* pc_relative */
7f266840 142 0, /* bitpos */
4962c51a 143 complain_overflow_dont,/* complain_on_overflow */
7f266840 144 bfd_elf_generic_reloc, /* special_function */
4962c51a 145 "R_ARM_LDR_PC_G0", /* name */
7f266840 146 FALSE, /* partial_inplace */
4962c51a
MS		 147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
7f266840
DJ		 150
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
153 0, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 FALSE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
165
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
168 0, /* rightshift */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
170 12, /* bitsize */
171 FALSE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
00a97672
RS		 177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
7f266840
DJ		 179 FALSE), /* pcrel_offset */
180
181 HOWTO (R_ARM_THM_ABS5, /* type */
182 6, /* rightshift */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
184 5, /* bitsize */
185 FALSE, /* pc_relative */
186 0, /* bitpos */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
194
195 /* 8 bit absolute */
196 HOWTO (R_ARM_ABS8, /* type */
197 0, /* rightshift */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
199 8, /* bitsize */
200 FALSE, /* pc_relative */
201 0, /* bitpos */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
209
210 HOWTO (R_ARM_SBREL32, /* type */
211 0, /* rightshift */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
213 32, /* bitsize */
214 FALSE, /* pc_relative */
215 0, /* bitpos */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
223
c19d1205 224 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 225 1, /* rightshift */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 227 25, /* bitsize */
7f266840
DJ		 228 TRUE, /* pc_relative */
229 0, /* bitpos */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
c19d1205 232 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 233 FALSE, /* partial_inplace */
234 0x07ff07ff, /* src_mask */
235 0x07ff07ff, /* dst_mask */
236 TRUE), /* pcrel_offset */
237
238 HOWTO (R_ARM_THM_PC8, /* type */
239 1, /* rightshift */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
241 8, /* bitsize */
242 TRUE, /* pc_relative */
243 0, /* bitpos */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
251
c19d1205 252 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 255 32, /* bitsize */
256 FALSE, /* pc_relative */
7f266840
DJ		 257 0, /* bitpos */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
c19d1205 260 "R_ARM_BREL_ADJ", /* name */
7f266840 261 FALSE, /* partial_inplace */
c19d1205
ZW		 262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
7f266840
DJ		 265
266 HOWTO (R_ARM_SWI24, /* type */
267 0, /* rightshift */
268 0, /* size (0 = byte, 1 = short, 2 = long) */
269 0, /* bitsize */
270 FALSE, /* pc_relative */
271 0, /* bitpos */
272 complain_overflow_signed,/* complain_on_overflow */
273 bfd_elf_generic_reloc, /* special_function */
274 "R_ARM_SWI24", /* name */
275 FALSE, /* partial_inplace */
276 0x00000000, /* src_mask */
277 0x00000000, /* dst_mask */
278 FALSE), /* pcrel_offset */
279
280 HOWTO (R_ARM_THM_SWI8, /* type */
281 0, /* rightshift */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
283 0, /* bitsize */
284 FALSE, /* pc_relative */
285 0, /* bitpos */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
293
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
296 2, /* rightshift */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
298 25, /* bitsize */
299 TRUE, /* pc_relative */
300 0, /* bitpos */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
308
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
311 2, /* rightshift */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
313 22, /* bitsize */
314 TRUE, /* pc_relative */
315 0, /* bitpos */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
320 0x07ff07ff, /* src_mask */
321 0x07ff07ff, /* dst_mask */
322 TRUE), /* pcrel_offset */
323
ba93b8ac 324 /* Dynamic TLS relocations. */
7f266840 325
ba93b8ac
DJ		 326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
327 0, /* rightshift */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
329 32, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
7f266840 339
ba93b8ac
DJ		 340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
341 0, /* rightshift */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
343 32, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
7f266840 353
ba93b8ac
DJ		 354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
7f266840
DJ		 367
368 /* Relocs used in ARM Linux */
369
370 HOWTO (R_ARM_COPY, /* type */
371 0, /* rightshift */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
373 32, /* bitsize */
374 FALSE, /* pc_relative */
375 0, /* bitpos */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
383
384 HOWTO (R_ARM_GLOB_DAT, /* type */
385 0, /* rightshift */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
387 32, /* bitsize */
388 FALSE, /* pc_relative */
389 0, /* bitpos */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
397
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
399 0, /* rightshift */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
401 32, /* bitsize */
402 FALSE, /* pc_relative */
403 0, /* bitpos */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
411
412 HOWTO (R_ARM_RELATIVE, /* type */
413 0, /* rightshift */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
415 32, /* bitsize */
416 FALSE, /* pc_relative */
417 0, /* bitpos */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
425
c19d1205 426 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 427 0, /* rightshift */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
429 32, /* bitsize */
430 FALSE, /* pc_relative */
431 0, /* bitpos */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
c19d1205 434 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
439
440 HOWTO (R_ARM_GOTPC, /* type */
441 0, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 32, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 HOWTO (R_ARM_GOT32, /* type */
455 0, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 32, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 HOWTO (R_ARM_PLT32, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 471 24, /* bitsize */
7f266840
DJ		 472 TRUE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
ce490eda 477 FALSE, /* partial_inplace */
7f266840
DJ		 478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
481
482 HOWTO (R_ARM_CALL, /* type */
483 2, /* rightshift */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
485 24, /* bitsize */
486 TRUE, /* pc_relative */
487 0, /* bitpos */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
495
496 HOWTO (R_ARM_JUMP24, /* type */
497 2, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 24, /* bitsize */
500 TRUE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
509
c19d1205
ZW		 510 HOWTO (R_ARM_THM_JUMP24, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 24, /* bitsize */
514 TRUE, /* pc_relative */
7f266840 515 0, /* bitpos */
c19d1205 516 complain_overflow_signed,/* complain_on_overflow */
7f266840 517 bfd_elf_generic_reloc, /* special_function */
c19d1205 518 "R_ARM_THM_JUMP24", /* name */
7f266840 519 FALSE, /* partial_inplace */
c19d1205
ZW		 520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
7f266840 523
c19d1205 524 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 525 0, /* rightshift */
c19d1205
ZW		 526 2, /* size (0 = byte, 1 = short, 2 = long) */
527 32, /* bitsize */
7f266840
DJ		 528 FALSE, /* pc_relative */
529 0, /* bitpos */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
c19d1205 532 "R_ARM_BASE_ABS", /* name */
7f266840 533 FALSE, /* partial_inplace */
c19d1205
ZW		 534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
7f266840
DJ		 536 FALSE), /* pcrel_offset */
537
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 12, /* bitsize */
542 TRUE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
551
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
553 0, /* rightshift */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
555 12, /* bitsize */
556 TRUE, /* pc_relative */
557 8, /* bitpos */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
565
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
567 0, /* rightshift */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
569 12, /* bitsize */
570 TRUE, /* pc_relative */
571 16, /* bitpos */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
579
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
581 0, /* rightshift */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
583 12, /* bitsize */
584 FALSE, /* pc_relative */
585 0, /* bitpos */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
593
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
595 0, /* rightshift */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
597 8, /* bitsize */
598 FALSE, /* pc_relative */
599 12, /* bitpos */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
607
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
609 0, /* rightshift */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
611 8, /* bitsize */
612 FALSE, /* pc_relative */
613 20, /* bitpos */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
621
622 HOWTO (R_ARM_TARGET1, /* type */
623 0, /* rightshift */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
625 32, /* bitsize */
626 FALSE, /* pc_relative */
627 0, /* bitpos */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
635
636 HOWTO (R_ARM_ROSEGREL32, /* type */
637 0, /* rightshift */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
639 32, /* bitsize */
640 FALSE, /* pc_relative */
641 0, /* bitpos */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
649
650 HOWTO (R_ARM_V4BX, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 32, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_ARM_TARGET2, /* type */
665 0, /* rightshift */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
667 32, /* bitsize */
668 FALSE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 HOWTO (R_ARM_PREL31, /* type */
679 0, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 31, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
c19d1205
ZW		 691
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
693 0, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
39623e12
PB		 702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
c19d1205
ZW		 704 FALSE), /* pcrel_offset */
705
706 HOWTO (R_ARM_MOVT_ABS, /* type */
707 0, /* rightshift */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
709 16, /* bitsize */
710 FALSE, /* pc_relative */
711 0, /* bitpos */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
39623e12
PB		 716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
c19d1205
ZW		 718 FALSE), /* pcrel_offset */
719
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
721 0, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 16, /* bitsize */
724 TRUE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
39623e12
PB		 730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
c19d1205
ZW		 732 TRUE), /* pcrel_offset */
733
734 HOWTO (R_ARM_MOVT_PREL, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 16, /* bitsize */
738 TRUE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
39623e12
PB		 744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
c19d1205
ZW		 746 TRUE), /* pcrel_offset */
747
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 16, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
763 0, /* rightshift */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
765 16, /* bitsize */
766 FALSE, /* pc_relative */
767 0, /* bitpos */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
775
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
777 0, /* rightshift */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
779 16, /* bitsize */
780 TRUE, /* pc_relative */
781 0, /* bitpos */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
789
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
791 0, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
793 16, /* bitsize */
794 TRUE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
803
804 HOWTO (R_ARM_THM_JUMP19, /* type */
805 1, /* rightshift */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
807 19, /* bitsize */
808 TRUE, /* pc_relative */
809 0, /* bitpos */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
817
818 HOWTO (R_ARM_THM_JUMP6, /* type */
819 1, /* rightshift */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
821 6, /* bitsize */
822 TRUE, /* pc_relative */
823 0, /* bitpos */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
831
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
836 0, /* rightshift */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
838 13, /* bitsize */
839 TRUE, /* pc_relative */
840 0, /* bitpos */
2cab6cc3 841 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
2cab6cc3
MS		 845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
c19d1205
ZW		 847 TRUE), /* pcrel_offset */
848
849 HOWTO (R_ARM_THM_PC12, /* type */
850 0, /* rightshift */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
852 13, /* bitsize */
853 TRUE, /* pc_relative */
854 0, /* bitpos */
2cab6cc3 855 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
2cab6cc3
MS		 859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
c19d1205
ZW		 861 TRUE), /* pcrel_offset */
862
863 HOWTO (R_ARM_ABS32_NOI, /* type */
864 0, /* rightshift */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
866 32, /* bitsize */
867 FALSE, /* pc_relative */
868 0, /* bitpos */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
876
877 HOWTO (R_ARM_REL32_NOI, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 TRUE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
7f266840 890
4962c51a
MS		 891 /* Group relocations. */
892
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
894 0, /* rightshift */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
896 32, /* bitsize */
897 TRUE, /* pc_relative */
898 0, /* bitpos */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
906
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 32, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 TRUE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
934
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 32, /* bitsize */
939 TRUE, /* pc_relative */
940 0, /* bitpos */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
948
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
950 0, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 32, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
964 0, /* rightshift */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
966 32, /* bitsize */
967 TRUE, /* pc_relative */
968 0, /* bitpos */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
976
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
978 0, /* rightshift */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
980 32, /* bitsize */
981 TRUE, /* pc_relative */
982 0, /* bitpos */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
990
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
992 0, /* rightshift */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
994 32, /* bitsize */
995 TRUE, /* pc_relative */
996 0, /* bitpos */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1004
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1006 0, /* rightshift */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1008 32, /* bitsize */
1009 TRUE, /* pc_relative */
1010 0, /* bitpos */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1018
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1020 0, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 32, /* bitsize */
1023 TRUE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1032
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1034 0, /* rightshift */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1036 32, /* bitsize */
1037 TRUE, /* pc_relative */
1038 0, /* bitpos */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1046
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1048 0, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 32, /* bitsize */
1051 TRUE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1062 0, /* rightshift */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1064 32, /* bitsize */
1065 TRUE, /* pc_relative */
1066 0, /* bitpos */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1074
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1076 0, /* rightshift */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1078 32, /* bitsize */
1079 TRUE, /* pc_relative */
1080 0, /* bitpos */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1088
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1090 0, /* rightshift */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1092 32, /* bitsize */
1093 TRUE, /* pc_relative */
1094 0, /* bitpos */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1102
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 TRUE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1116
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 TRUE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1130
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1132 0, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 32, /* bitsize */
1135 TRUE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1144
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1146 0, /* rightshift */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1148 32, /* bitsize */
1149 TRUE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1158
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
1163 TRUE, /* pc_relative */
1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1172
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1174 0, /* rightshift */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1176 32, /* bitsize */
1177 TRUE, /* pc_relative */
1178 0, /* bitpos */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1186
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1188 0, /* rightshift */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1190 32, /* bitsize */
1191 TRUE, /* pc_relative */
1192 0, /* bitpos */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1200
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1202 0, /* rightshift */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1204 32, /* bitsize */
1205 TRUE, /* pc_relative */
1206 0, /* bitpos */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1214
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1216 0, /* rightshift */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1218 32, /* bitsize */
1219 TRUE, /* pc_relative */
1220 0, /* bitpos */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1228
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1230 0, /* rightshift */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1232 32, /* bitsize */
1233 TRUE, /* pc_relative */
1234 0, /* bitpos */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1242
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1244 0, /* rightshift */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1246 32, /* bitsize */
1247 TRUE, /* pc_relative */
1248 0, /* bitpos */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1256
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1258 0, /* rightshift */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1260 32, /* bitsize */
1261 TRUE, /* pc_relative */
1262 0, /* bitpos */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1270
1271 /* End of group relocations. */
c19d1205 1272
c19d1205
ZW		 1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1274 0, /* rightshift */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1276 16, /* bitsize */
1277 FALSE, /* pc_relative */
1278 0, /* bitpos */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1286
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1288 0, /* rightshift */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1290 16, /* bitsize */
1291 FALSE, /* pc_relative */
1292 0, /* bitpos */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1300
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1302 0, /* rightshift */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1304 16, /* bitsize */
1305 FALSE, /* pc_relative */
1306 0, /* bitpos */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1314
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1316 0, /* rightshift */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1318 16, /* bitsize */
1319 FALSE, /* pc_relative */
1320 0, /* bitpos */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1328
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1330 0, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 16, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 16, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
8029a119 1357 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1358 EMPTY_HOWTO (91),
1359 EMPTY_HOWTO (92),
1360 EMPTY_HOWTO (93),
1361
1362 HOWTO (R_ARM_PLT32_ABS, /* type */
1363 0, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 32, /* bitsize */
1366 FALSE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont,/* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
1370 "R_ARM_PLT32_ABS", /* name */
1371 FALSE, /* partial_inplace */
1372 0xffffffff, /* src_mask */
1373 0xffffffff, /* dst_mask */
1374 FALSE), /* pcrel_offset */
1375
1376 HOWTO (R_ARM_GOT_ABS, /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 32, /* bitsize */
1380 FALSE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont,/* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 "R_ARM_GOT_ABS", /* name */
1385 FALSE, /* partial_inplace */
1386 0xffffffff, /* src_mask */
1387 0xffffffff, /* dst_mask */
1388 FALSE), /* pcrel_offset */
1389
1390 HOWTO (R_ARM_GOT_PREL, /* type */
1391 0, /* rightshift */
1392 2, /* size (0 = byte, 1 = short, 2 = long) */
1393 32, /* bitsize */
1394 TRUE, /* pc_relative */
1395 0, /* bitpos */
1396 complain_overflow_dont, /* complain_on_overflow */
1397 bfd_elf_generic_reloc, /* special_function */
1398 "R_ARM_GOT_PREL", /* name */
1399 FALSE, /* partial_inplace */
1400 0xffffffff, /* src_mask */
1401 0xffffffff, /* dst_mask */
1402 TRUE), /* pcrel_offset */
1403
1404 HOWTO (R_ARM_GOT_BREL12, /* type */
1405 0, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 12, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_bitfield,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_ARM_GOT_BREL12", /* name */
1413 FALSE, /* partial_inplace */
1414 0x00000fff, /* src_mask */
1415 0x00000fff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417
1418 HOWTO (R_ARM_GOTOFF12, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_bitfield,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_ARM_GOTOFF12", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431
1432 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1433
1434 /* GNU extension to record C++ vtable member usage */
1435 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1436 0, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1438 0, /* bitsize */
ba93b8ac
DJ		 1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
c19d1205
ZW		 1441 complain_overflow_dont, /* complain_on_overflow */
1442 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1443 "R_ARM_GNU_VTENTRY", /* name */
1444 FALSE, /* partial_inplace */
1445 0, /* src_mask */
1446 0, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
1449 /* GNU extension to record C++ vtable hierarchy */
1450 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1451 0, /* rightshift */
1452 2, /* size (0 = byte, 1 = short, 2 = long) */
1453 0, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont, /* complain_on_overflow */
1457 NULL, /* special_function */
1458 "R_ARM_GNU_VTINHERIT", /* name */
1459 FALSE, /* partial_inplace */
1460 0, /* src_mask */
1461 0, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463
1464 HOWTO (R_ARM_THM_JUMP11, /* type */
1465 1, /* rightshift */
1466 1, /* size (0 = byte, 1 = short, 2 = long) */
1467 11, /* bitsize */
1468 TRUE, /* pc_relative */
1469 0, /* bitpos */
1470 complain_overflow_signed, /* complain_on_overflow */
1471 bfd_elf_generic_reloc, /* special_function */
1472 "R_ARM_THM_JUMP11", /* name */
1473 FALSE, /* partial_inplace */
1474 0x000007ff, /* src_mask */
1475 0x000007ff, /* dst_mask */
1476 TRUE), /* pcrel_offset */
1477
1478 HOWTO (R_ARM_THM_JUMP8, /* type */
1479 1, /* rightshift */
1480 1, /* size (0 = byte, 1 = short, 2 = long) */
1481 8, /* bitsize */
1482 TRUE, /* pc_relative */
1483 0, /* bitpos */
1484 complain_overflow_signed, /* complain_on_overflow */
1485 bfd_elf_generic_reloc, /* special_function */
1486 "R_ARM_THM_JUMP8", /* name */
1487 FALSE, /* partial_inplace */
1488 0x000000ff, /* src_mask */
1489 0x000000ff, /* dst_mask */
1490 TRUE), /* pcrel_offset */
ba93b8ac 1491
c19d1205
ZW		 1492 /* TLS relocations */
1493 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 32, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1500 NULL, /* special_function */
1501 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1502 TRUE, /* partial_inplace */
1503 0xffffffff, /* src_mask */
1504 0xffffffff, /* dst_mask */
c19d1205 1505 FALSE), /* pcrel_offset */
ba93b8ac 1506
ba93b8ac
DJ		 1507 HOWTO (R_ARM_TLS_LDM32, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 32, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_bitfield,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_ARM_TLS_LDM32", /* name */
1516 TRUE, /* partial_inplace */
1517 0xffffffff, /* src_mask */
1518 0xffffffff, /* dst_mask */
c19d1205 1519 FALSE), /* pcrel_offset */
ba93b8ac 1520
c19d1205 1521 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1522 0, /* rightshift */
1523 2, /* size (0 = byte, 1 = short, 2 = long) */
1524 32, /* bitsize */
1525 FALSE, /* pc_relative */
1526 0, /* bitpos */
1527 complain_overflow_bitfield,/* complain_on_overflow */
1528 bfd_elf_generic_reloc, /* special_function */
c19d1205 1529 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1530 TRUE, /* partial_inplace */
1531 0xffffffff, /* src_mask */
1532 0xffffffff, /* dst_mask */
c19d1205 1533 FALSE), /* pcrel_offset */
ba93b8ac 1534
ba93b8ac
DJ		 1535 HOWTO (R_ARM_TLS_IE32, /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 32, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_bitfield,/* complain_on_overflow */
1542 NULL, /* special_function */
1543 "R_ARM_TLS_IE32", /* name */
1544 TRUE, /* partial_inplace */
1545 0xffffffff, /* src_mask */
1546 0xffffffff, /* dst_mask */
c19d1205 1547 FALSE), /* pcrel_offset */
7f266840 1548
c19d1205 1549 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1550 0, /* rightshift */
1551 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1552 32, /* bitsize */
7f266840
DJ		 1553 FALSE, /* pc_relative */
1554 0, /* bitpos */
c19d1205
ZW		 1555 complain_overflow_bitfield,/* complain_on_overflow */
1556 bfd_elf_generic_reloc, /* special_function */
1557 "R_ARM_TLS_LE32", /* name */
1558 TRUE, /* partial_inplace */
1559 0xffffffff, /* src_mask */
1560 0xffffffff, /* dst_mask */
1561 FALSE), /* pcrel_offset */
7f266840 1562
c19d1205
ZW		 1563 HOWTO (R_ARM_TLS_LDO12, /* type */
1564 0, /* rightshift */
1565 2, /* size (0 = byte, 1 = short, 2 = long) */
1566 12, /* bitsize */
1567 FALSE, /* pc_relative */
7f266840 1568 0, /* bitpos */
c19d1205 1569 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1570 bfd_elf_generic_reloc, /* special_function */
c19d1205 1571 "R_ARM_TLS_LDO12", /* name */
7f266840 1572 FALSE, /* partial_inplace */
c19d1205
ZW		 1573 0x00000fff, /* src_mask */
1574 0x00000fff, /* dst_mask */
1575 FALSE), /* pcrel_offset */
7f266840 1576
c19d1205
ZW		 1577 HOWTO (R_ARM_TLS_LE12, /* type */
1578 0, /* rightshift */
1579 2, /* size (0 = byte, 1 = short, 2 = long) */
1580 12, /* bitsize */
1581 FALSE, /* pc_relative */
7f266840 1582 0, /* bitpos */
c19d1205 1583 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1584 bfd_elf_generic_reloc, /* special_function */
c19d1205 1585 "R_ARM_TLS_LE12", /* name */
7f266840 1586 FALSE, /* partial_inplace */
c19d1205
ZW		 1587 0x00000fff, /* src_mask */
1588 0x00000fff, /* dst_mask */
1589 FALSE), /* pcrel_offset */
7f266840 1590
c19d1205 1591 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1592 0, /* rightshift */
1593 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1594 12, /* bitsize */
1595 FALSE, /* pc_relative */
7f266840 1596 0, /* bitpos */
c19d1205 1597 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1598 bfd_elf_generic_reloc, /* special_function */
c19d1205 1599 "R_ARM_TLS_IE12GP", /* name */
7f266840 1600 FALSE, /* partial_inplace */
c19d1205
ZW		 1601 0x00000fff, /* src_mask */
1602 0x00000fff, /* dst_mask */
1603 FALSE), /* pcrel_offset */
1604};
1605
1606/* 112-127 private relocations
1607 128 R_ARM_ME_TOO, obsolete
1608 129-255 unallocated in AAELF.
7f266840 1609
c19d1205
ZW		 1610 249-255 extended, currently unused, relocations: */
1611
4962c51a 1612static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1613{
1614 HOWTO (R_ARM_RREL32, /* type */
1615 0, /* rightshift */
1616 0, /* size (0 = byte, 1 = short, 2 = long) */
1617 0, /* bitsize */
1618 FALSE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_dont,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_ARM_RREL32", /* name */
1623 FALSE, /* partial_inplace */
1624 0, /* src_mask */
1625 0, /* dst_mask */
1626 FALSE), /* pcrel_offset */
1627
1628 HOWTO (R_ARM_RABS32, /* type */
1629 0, /* rightshift */
1630 0, /* size (0 = byte, 1 = short, 2 = long) */
1631 0, /* bitsize */
1632 FALSE, /* pc_relative */
1633 0, /* bitpos */
1634 complain_overflow_dont,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_ARM_RABS32", /* name */
1637 FALSE, /* partial_inplace */
1638 0, /* src_mask */
1639 0, /* dst_mask */
1640 FALSE), /* pcrel_offset */
1641
1642 HOWTO (R_ARM_RPC24, /* type */
1643 0, /* rightshift */
1644 0, /* size (0 = byte, 1 = short, 2 = long) */
1645 0, /* bitsize */
1646 FALSE, /* pc_relative */
1647 0, /* bitpos */
1648 complain_overflow_dont,/* complain_on_overflow */
1649 bfd_elf_generic_reloc, /* special_function */
1650 "R_ARM_RPC24", /* name */
1651 FALSE, /* partial_inplace */
1652 0, /* src_mask */
1653 0, /* dst_mask */
1654 FALSE), /* pcrel_offset */
1655
1656 HOWTO (R_ARM_RBASE, /* type */
1657 0, /* rightshift */
1658 0, /* size (0 = byte, 1 = short, 2 = long) */
1659 0, /* bitsize */
1660 FALSE, /* pc_relative */
1661 0, /* bitpos */
1662 complain_overflow_dont,/* complain_on_overflow */
1663 bfd_elf_generic_reloc, /* special_function */
1664 "R_ARM_RBASE", /* name */
1665 FALSE, /* partial_inplace */
1666 0, /* src_mask */
1667 0, /* dst_mask */
1668 FALSE) /* pcrel_offset */
1669};
1670
1671static reloc_howto_type *
1672elf32_arm_howto_from_type (unsigned int r_type)
1673{
906e58ca 1674 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1675 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1676
c19d1205 1677 if (r_type >= R_ARM_RREL32
906e58ca 1678 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1679 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1680
c19d1205 1681 return NULL;
7f266840
DJ		 1682}
1683
1684static void
1685elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1686 Elf_Internal_Rela * elf_reloc)
1687{
1688 unsigned int r_type;
1689
1690 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1691 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1692}
1693
1694struct elf32_arm_reloc_map
1695 {
1696 bfd_reloc_code_real_type bfd_reloc_val;
1697 unsigned char elf_reloc_val;
1698 };
1699
1700/* All entries in this list must also be present in elf32_arm_howto_table. */
1701static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1702 {
1703 {BFD_RELOC_NONE, R_ARM_NONE},
1704 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1705 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1706 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1707 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1708 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1709 {BFD_RELOC_32, R_ARM_ABS32},
1710 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1711 {BFD_RELOC_8, R_ARM_ABS8},
1712 {BFD_RELOC_16, R_ARM_ABS16},
1713 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1714 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1715 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1719 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1720 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1721 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1722 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1723 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1724 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1726 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1727 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1728 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1729 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1730 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1731 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1732 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1733 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1734 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1735 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1736 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1737 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1738 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1739 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1740 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1741 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1742 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1743 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1744 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1745 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1746 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1747 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1748 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1749 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1750 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1751 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1752 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1753 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1754 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1755 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1756 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1757 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1758 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1759 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1760 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1761 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1762 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1763 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1764 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1765 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1766 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1767 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1768 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1769 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1770 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1771 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1772 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1773 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1774 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1775 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1776 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1777 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1778 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1779 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1780 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1781 };
1782
1783static reloc_howto_type *
f1c71a59
ZW		 1784elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1785 bfd_reloc_code_real_type code)
7f266840
DJ		 1786{
1787 unsigned int i;
8029a119 1788
906e58ca 1789 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1790 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1791 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1792
c19d1205 1793 return NULL;
7f266840
DJ		 1794}
1795
157090f7
AM		 1796static reloc_howto_type *
1797elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1798 const char *r_name)
1799{
1800 unsigned int i;
1801
906e58ca 1802 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1803 if (elf32_arm_howto_table_1[i].name != NULL
1804 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1805 return &elf32_arm_howto_table_1[i];
1806
906e58ca 1807 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1808 if (elf32_arm_howto_table_2[i].name != NULL
1809 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1810 return &elf32_arm_howto_table_2[i];
1811
1812 return NULL;
1813}
1814
906e58ca
NC		 1815/* Support for core dump NOTE sections. */
1816
7f266840 1817static bfd_boolean
f1c71a59 1818elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1819{
1820 int offset;
1821 size_t size;
1822
1823 switch (note->descsz)
1824 {
1825 default:
1826 return FALSE;
1827
8029a119 1828 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1829 /* pr_cursig */
1830 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1831
1832 /* pr_pid */
1833 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1834
1835 /* pr_reg */
1836 offset = 72;
1837 size = 72;
1838
1839 break;
1840 }
1841
1842 /* Make a ".reg/999" section. */
1843 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1844 size, note->descpos + offset);
1845}
1846
1847static bfd_boolean
f1c71a59 1848elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1849{
1850 switch (note->descsz)
1851 {
1852 default:
1853 return FALSE;
1854
8029a119 1855 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1856 elf_tdata (abfd)->core_program
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1858 elf_tdata (abfd)->core_command
1859 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1860 }
1861
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
7f266840
DJ		 1865 {
1866 char *command = elf_tdata (abfd)->core_command;
1867 int n = strlen (command);
1868
1869 if (0 < n && command[n - 1] == ' ')
1870 command[n - 1] = '\0';
1871 }
1872
1873 return TRUE;
1874}
1875
1876#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1877#define TARGET_LITTLE_NAME "elf32-littlearm"
1878#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1879#define TARGET_BIG_NAME "elf32-bigarm"
1880
1881#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1882#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1883
252b5132
RH		 1884typedef unsigned long int insn32;
1885typedef unsigned short int insn16;
1886
3a4a14e9
PB		 1887/* In lieu of proper flags, assume all EABIv4 or later objects are
1888 interworkable. */
57e8b36a 1889#define INTERWORK_FLAG(abfd) \
3a4a14e9 1890 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1891 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1892 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1893
252b5132
RH		 1894/* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
9b485d32 1897 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1898#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1899#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1900
1901#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1902#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1903
c7b8f16e
JB		 1904#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1905#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1906
845b51d6
PB		 1907#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1908#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1909
7413f23f
DJ		 1910#define STUB_ENTRY_NAME "__%s_veneer"
1911
252b5132
RH		 1912/* The name of the dynamic interpreter. This is put in the .interp
1913 section. */
1914#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1915
5e681ec4
PB		 1916#ifdef FOUR_WORD_PLT
1917
252b5132
RH		 1918/* The first entry in a procedure linkage table looks like
1919 this. It is set up so that any shared library function that is
59f2c4e7 1920 called before the relocation has been set up calls the dynamic
9b485d32 1921 linker first. */
e5a52504 1922static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1923 {
1924 0xe52de004, /* str lr, [sp, #-4]! */
1925 0xe59fe010, /* ldr lr, [pc, #16] */
1926 0xe08fe00e, /* add lr, pc, lr */
1927 0xe5bef008, /* ldr pc, [lr, #8]! */
1928 };
1929
1930/* Subsequent entries in a procedure linkage table look like
1931 this. */
e5a52504 1932static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1933 {
1934 0xe28fc600, /* add ip, pc, #NN */
1935 0xe28cca00, /* add ip, ip, #NN */
1936 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1937 0x00000000, /* unused */
1938 };
1939
1940#else
1941
5e681ec4
PB		 1942/* The first entry in a procedure linkage table looks like
1943 this. It is set up so that any shared library function that is
1944 called before the relocation has been set up calls the dynamic
1945 linker first. */
e5a52504 1946static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1947 {
5e681ec4
PB		 1948 0xe52de004, /* str lr, [sp, #-4]! */
1949 0xe59fe004, /* ldr lr, [pc, #4] */
1950 0xe08fe00e, /* add lr, pc, lr */
1951 0xe5bef008, /* ldr pc, [lr, #8]! */
1952 0x00000000, /* &GOT[0] - . */
917583ad 1953 };
252b5132
RH		 1954
1955/* Subsequent entries in a procedure linkage table look like
1956 this. */
e5a52504 1957static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1958 {
1959 0xe28fc600, /* add ip, pc, #0xNN00000 */
1960 0xe28cca00, /* add ip, ip, #0xNN000 */
1961 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1962 };
1963
1964#endif
252b5132 1965
00a97672
RS		 1966/* The format of the first entry in the procedure linkage table
1967 for a VxWorks executable. */
1968static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1969 {
1970 0xe52dc008, /* str ip,[sp,#-8]! */
1971 0xe59fc000, /* ldr ip,[pc] */
1972 0xe59cf008, /* ldr pc,[ip,#8] */
1973 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1974 };
1975
1976/* The format of subsequent entries in a VxWorks executable. */
1977static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1978 {
1979 0xe59fc000, /* ldr ip,[pc] */
1980 0xe59cf000, /* ldr pc,[ip] */
1981 0x00000000, /* .long @got */
1982 0xe59fc000, /* ldr ip,[pc] */
1983 0xea000000, /* b _PLT */
1984 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1985 };
1986
1987/* The format of entries in a VxWorks shared library. */
1988static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1989 {
1990 0xe59fc000, /* ldr ip,[pc] */
1991 0xe79cf009, /* ldr pc,[ip,r9] */
1992 0x00000000, /* .long @got */
1993 0xe59fc000, /* ldr ip,[pc] */
1994 0xe599f008, /* ldr pc,[r9,#8] */
1995 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1996 };
1997
b7693d02
DJ		 1998/* An initial stub used if the PLT entry is referenced from Thumb code. */
1999#define PLT_THUMB_STUB_SIZE 4
2000static const bfd_vma elf32_arm_plt_thumb_stub [] =
2001 {
2002 0x4778, /* bx pc */
2003 0x46c0 /* nop */
2004 };
2005
e5a52504
MM		 2006/* The entries in a PLT when using a DLL-based target with multiple
2007 address spaces. */
906e58ca 2008static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2009 {
83a358aa 2010 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2011 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2012 };
2013
906e58ca
NC		 2014#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2015#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2016#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2017#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2018#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2019#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2020
461a49ca
DJ		 2021enum stub_insn_type
2022 {
2023 THUMB16_TYPE = 1,
2024 THUMB32_TYPE,
2025 ARM_TYPE,
2026 DATA_TYPE
2027 };
2028
461a49ca
DJ		 2029#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2030#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2031#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2032#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2033#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2034
2035typedef struct
2036{
2037 bfd_vma data;
2038 enum stub_insn_type type;
ebe24dd4 2039 unsigned int r_type;
461a49ca
DJ		 2040 int reloc_addend;
2041} insn_sequence;
2042
fea2b4d6
CL		 2043/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2044 to reach the stub if necessary. */
461a49ca 2045static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2046 {
461a49ca
DJ		 2047 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2048 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2049 };
2050
fea2b4d6
CL		 2051/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2052 available. */
461a49ca 2053static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2054 {
461a49ca
DJ		 2055 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2056 ARM_INSN(0xe12fff1c), /* bx ip */
2057 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2058 };
2059
d3626fb0 2060/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2061static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2062 {
461a49ca
DJ		 2063 THUMB16_INSN(0xb401), /* push {r0} */
2064 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2065 THUMB16_INSN(0x4684), /* mov ip, r0 */
2066 THUMB16_INSN(0xbc01), /* pop {r0} */
2067 THUMB16_INSN(0x4760), /* bx ip */
2068 THUMB16_INSN(0xbf00), /* nop */
2069 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2070 };
2071
d3626fb0
CL		 2072/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2073 allowed. */
2074static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2075 {
2076 THUMB16_INSN(0x4778), /* bx pc */
2077 THUMB16_INSN(0x46c0), /* nop */
2078 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2079 ARM_INSN(0xe12fff1c), /* bx ip */
2080 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2081 };
2082
fea2b4d6
CL		 2083/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2084 available. */
461a49ca 2085static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2086 {
461a49ca
DJ		 2087 THUMB16_INSN(0x4778), /* bx pc */
2088 THUMB16_INSN(0x46c0), /* nop */
2089 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2090 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2091 };
2092
fea2b4d6
CL		 2093/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2094 one, when the destination is close enough. */
461a49ca 2095static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2096 {
461a49ca
DJ		 2097 THUMB16_INSN(0x4778), /* bx pc */
2098 THUMB16_INSN(0x46c0), /* nop */
2099 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2100 };
2101
cf3eccff 2102/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2103 blx to reach the stub if necessary. */
cf3eccff 2104static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2105 {
461a49ca
DJ		 2106 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2107 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2108 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2109 };
2110
cf3eccff
DJ		 2111/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2112 blx to reach the stub if necessary. We can not add into pc;
2113 it is not guaranteed to mode switch (different in ARMv6 and
2114 ARMv7). */
2115static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2116 {
2117 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2118 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2119 ARM_INSN(0xe12fff1c), /* bx ip */
2120 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2121 };
2122
ebe24dd4
CL		 2123/* V4T ARM -> ARM long branch stub, PIC. */
2124static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2125 {
2126 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2127 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2128 ARM_INSN(0xe12fff1c), /* bx ip */
2129 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2130 };
2131
2132/* V4T Thumb -> ARM long branch stub, PIC. */
2133static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2134 {
2135 THUMB16_INSN(0x4778), /* bx pc */
2136 THUMB16_INSN(0x46c0), /* nop */
2137 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2138 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2139 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2140 };
2141
d3626fb0
CL		 2142/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2143 architectures. */
ebe24dd4
CL		 2144static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2145 {
2146 THUMB16_INSN(0xb401), /* push {r0} */
2147 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2148 THUMB16_INSN(0x46fc), /* mov ip, pc */
2149 THUMB16_INSN(0x4484), /* add ip, r0 */
2150 THUMB16_INSN(0xbc01), /* pop {r0} */
2151 THUMB16_INSN(0x4760), /* bx ip */
2152 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2153 };
2154
d3626fb0
CL		 2155/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2156 allowed. */
2157static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2158 {
2159 THUMB16_INSN(0x4778), /* bx pc */
2160 THUMB16_INSN(0x46c0), /* nop */
2161 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2162 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2163 ARM_INSN(0xe12fff1c), /* bx ip */
2164 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2165 };
2166
906e58ca
NC		 2167/* Section name for stubs is the associated section name plus this
2168 string. */
2169#define STUB_SUFFIX ".stub"
2170
738a79f6
CL		 2171/* One entry per long/short branch stub defined above. */
2172#define DEF_STUBS \
2173 DEF_STUB(long_branch_any_any) \
2174 DEF_STUB(long_branch_v4t_arm_thumb) \
2175 DEF_STUB(long_branch_thumb_only) \
2176 DEF_STUB(long_branch_v4t_thumb_thumb) \
2177 DEF_STUB(long_branch_v4t_thumb_arm) \
2178 DEF_STUB(short_branch_v4t_thumb_arm) \
2179 DEF_STUB(long_branch_any_arm_pic) \
2180 DEF_STUB(long_branch_any_thumb_pic) \
2181 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2182 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2183 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2184 DEF_STUB(long_branch_thumb_only_pic)
2185
2186#define DEF_STUB(x) arm_stub_##x,
2187enum elf32_arm_stub_type {
906e58ca 2188 arm_stub_none,
738a79f6
CL		 2189 DEF_STUBS
2190};
2191#undef DEF_STUB
2192
2193typedef struct
2194{
2195 const insn_sequence* template;
2196 int template_size;
2197} stub_def;
2198
2199#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2200static const stub_def stub_definitions[] = {
2201 {NULL, 0},
2202 DEF_STUBS
906e58ca
NC		 2203};
2204
2205struct elf32_arm_stub_hash_entry
2206{
2207 /* Base hash table entry structure. */
2208 struct bfd_hash_entry root;
2209
2210 /* The stub section. */
2211 asection *stub_sec;
2212
2213 /* Offset within stub_sec of the beginning of this stub. */
2214 bfd_vma stub_offset;
2215
2216 /* Given the symbol's value and its section we can determine its final
2217 value when building the stubs (so the stub knows where to jump). */
2218 bfd_vma target_value;
2219 asection *target_section;
2220
461a49ca 2221 /* The stub type. */
906e58ca 2222 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2223 /* Its encoding size in bytes. */
2224 int stub_size;
2225 /* Its template. */
2226 const insn_sequence *stub_template;
2227 /* The size of the template (number of entries). */
2228 int stub_template_size;
906e58ca
NC		 2229
2230 /* The symbol table entry, if any, that this was derived from. */
2231 struct elf32_arm_link_hash_entry *h;
2232
2233 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2234 unsigned char st_type;
2235
2236 /* Where this stub is being called from, or, in the case of combined
2237 stub sections, the first input section in the group. */
2238 asection *id_sec;
7413f23f
DJ		 2239
2240 /* The name for the local symbol at the start of this stub. The
2241 stub name in the hash table has to be unique; this does not, so
2242 it can be friendlier. */
2243 char *output_name;
906e58ca
NC		 2244};
2245
e489d0ae
PB		 2246/* Used to build a map of a section. This is required for mixed-endian
2247 code/data. */
2248
2249typedef struct elf32_elf_section_map
2250{
2251 bfd_vma vma;
2252 char type;
2253}
2254elf32_arm_section_map;
2255
c7b8f16e
JB		 2256/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2257
2258typedef enum
2259{
2260 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2261 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2262 VFP11_ERRATUM_ARM_VENEER,
2263 VFP11_ERRATUM_THUMB_VENEER
2264}
2265elf32_vfp11_erratum_type;
2266
2267typedef struct elf32_vfp11_erratum_list
2268{
2269 struct elf32_vfp11_erratum_list *next;
2270 bfd_vma vma;
2271 union
2272 {
2273 struct
2274 {
2275 struct elf32_vfp11_erratum_list *veneer;
2276 unsigned int vfp_insn;
2277 } b;
2278 struct
2279 {
2280 struct elf32_vfp11_erratum_list *branch;
2281 unsigned int id;
2282 } v;
2283 } u;
2284 elf32_vfp11_erratum_type type;
2285}
2286elf32_vfp11_erratum_list;
2287
2468f9c9
PB		 2288typedef enum
2289{
2290 DELETE_EXIDX_ENTRY,
2291 INSERT_EXIDX_CANTUNWIND_AT_END
2292}
2293arm_unwind_edit_type;
2294
2295/* A (sorted) list of edits to apply to an unwind table. */
2296typedef struct arm_unwind_table_edit
2297{
2298 arm_unwind_edit_type type;
2299 /* Note: we sometimes want to insert an unwind entry corresponding to a
2300 section different from the one we're currently writing out, so record the
2301 (text) section this edit relates to here. */
2302 asection *linked_section;
2303 unsigned int index;
2304 struct arm_unwind_table_edit *next;
2305}
2306arm_unwind_table_edit;
2307
8e3de13a 2308typedef struct _arm_elf_section_data
e489d0ae 2309{
2468f9c9 2310 /* Information about mapping symbols. */
e489d0ae 2311 struct bfd_elf_section_data elf;
8e3de13a 2312 unsigned int mapcount;
c7b8f16e 2313 unsigned int mapsize;
e489d0ae 2314 elf32_arm_section_map *map;
2468f9c9 2315 /* Information about CPU errata. */
c7b8f16e
JB		 2316 unsigned int erratumcount;
2317 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2318 /* Information about unwind tables. */
2319 union
2320 {
2321 /* Unwind info attached to a text section. */
2322 struct
2323 {
2324 asection *arm_exidx_sec;
2325 } text;
2326
2327 /* Unwind info attached to an .ARM.exidx section. */
2328 struct
2329 {
2330 arm_unwind_table_edit *unwind_edit_list;
2331 arm_unwind_table_edit *unwind_edit_tail;
2332 } exidx;
2333 } u;
8e3de13a
NC		 2334}
2335_arm_elf_section_data;
e489d0ae
PB		 2336
2337#define elf32_arm_section_data(sec) \
8e3de13a 2338 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2339
ba93b8ac
DJ		 2340/* The size of the thread control block. */
2341#define TCB_SIZE 8
2342
0ffa91dd 2343struct elf_arm_obj_tdata
ba93b8ac
DJ		 2344{
2345 struct elf_obj_tdata root;
2346
2347 /* tls_type for each local got entry. */
2348 char *local_got_tls_type;
ee065d83 2349
bf21ed78
MS		 2350 /* Zero to warn when linking objects with incompatible enum sizes. */
2351 int no_enum_size_warning;
a9dc9481
JM		 2352
2353 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2354 int no_wchar_size_warning;
ba93b8ac
DJ		 2355};
2356
0ffa91dd
NC		 2357#define elf_arm_tdata(bfd) \
2358 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2359
0ffa91dd
NC		 2360#define elf32_arm_local_got_tls_type(bfd) \
2361 (elf_arm_tdata (bfd)->local_got_tls_type)
2362
2363#define is_arm_elf(bfd) \
2364 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2365 && elf_tdata (bfd) != NULL \
2366 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2367
2368static bfd_boolean
2369elf32_arm_mkobject (bfd *abfd)
2370{
0ffa91dd
NC		 2371 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2372 ARM_ELF_TDATA);
ba93b8ac
DJ		 2373}
2374
252b5132
RH		 2375/* The ARM linker needs to keep track of the number of relocs that it
2376 decides to copy in check_relocs for each symbol. This is so that
2377 it can discard PC relative relocs if it doesn't need them when
2378 linking with -Bsymbolic. We store the information in a field
2379 extending the regular ELF linker hash table. */
2380
ba93b8ac
DJ		 2381/* This structure keeps track of the number of relocs we have copied
2382 for a given symbol. */
5e681ec4 2383struct elf32_arm_relocs_copied
917583ad
NC		 2384 {
2385 /* Next section. */
5e681ec4 2386 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2387 /* A section in dynobj. */
2388 asection * section;
2389 /* Number of relocs copied in this section. */
2390 bfd_size_type count;
ba93b8ac
DJ		 2391 /* Number of PC-relative relocs copied in this section. */
2392 bfd_size_type pc_count;
917583ad 2393 };
252b5132 2394
ba93b8ac
DJ		 2395#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2396
ba96a88f 2397/* Arm ELF linker hash entry. */
252b5132 2398struct elf32_arm_link_hash_entry
917583ad
NC		 2399 {
2400 struct elf_link_hash_entry root;
252b5132 2401
917583ad 2402 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2403 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2404
2405 /* We reference count Thumb references to a PLT entry separately,
2406 so that we can emit the Thumb trampoline only if needed. */
2407 bfd_signed_vma plt_thumb_refcount;
2408
bd97cb95
DJ		 2409 /* Some references from Thumb code may be eliminated by BL->BLX
2410 conversion, so record them separately. */
2411 bfd_signed_vma plt_maybe_thumb_refcount;
2412
b7693d02
DJ		 2413 /* Since PLT entries have variable size if the Thumb prologue is
2414 used, we need to record the index into .got.plt instead of
2415 recomputing it from the PLT offset. */
2416 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2417
2418#define GOT_UNKNOWN 0
2419#define GOT_NORMAL 1
2420#define GOT_TLS_GD 2
2421#define GOT_TLS_IE 4
2422 unsigned char tls_type;
a4fd1a8e
PB		 2423
2424 /* The symbol marking the real symbol location for exported thumb
2425 symbols with Arm stubs. */
2426 struct elf_link_hash_entry *export_glue;
906e58ca 2427
da5938a2 2428 /* A pointer to the most recently used stub hash entry against this
8029a119 2429 symbol. */
da5938a2 2430 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2431 };
252b5132 2432
252b5132 2433/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2434#define elf32_arm_link_hash_traverse(table, func, info) \
2435 (elf_link_hash_traverse \
2436 (&(table)->root, \
b7693d02 2437 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2438 (info)))
2439
2440/* Get the ARM elf linker hash table from a link_info structure. */
2441#define elf32_arm_hash_table(info) \
2442 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2443
906e58ca
NC		 2444#define arm_stub_hash_lookup(table, string, create, copy) \
2445 ((struct elf32_arm_stub_hash_entry *) \
2446 bfd_hash_lookup ((table), (string), (create), (copy)))
2447
9b485d32 2448/* ARM ELF linker hash table. */
252b5132 2449struct elf32_arm_link_hash_table
906e58ca
NC		 2450{
2451 /* The main hash table. */
2452 struct elf_link_hash_table root;
252b5132 2453
906e58ca
NC		 2454 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2455 bfd_size_type thumb_glue_size;
252b5132 2456
906e58ca
NC		 2457 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2458 bfd_size_type arm_glue_size;
252b5132 2459
906e58ca
NC		 2460 /* The size in bytes of section containing the ARMv4 BX veneers. */
2461 bfd_size_type bx_glue_size;
845b51d6 2462
906e58ca
NC		 2463 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2464 veneer has been populated. */
2465 bfd_vma bx_glue_offset[15];
845b51d6 2466
906e58ca
NC		 2467 /* The size in bytes of the section containing glue for VFP11 erratum
2468 veneers. */
2469 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2470
906e58ca
NC		 2471 /* An arbitrary input BFD chosen to hold the glue sections. */
2472 bfd * bfd_of_glue_owner;
ba96a88f 2473
906e58ca
NC		 2474 /* Nonzero to output a BE8 image. */
2475 int byteswap_code;
e489d0ae 2476
906e58ca
NC		 2477 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2478 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2479 int target1_is_rel;
9c504268 2480
906e58ca
NC		 2481 /* The relocation to use for R_ARM_TARGET2 relocations. */
2482 int target2_reloc;
eb043451 2483
906e58ca
NC		 2484 /* 0 = Ignore R_ARM_V4BX.
2485 1 = Convert BX to MOV PC.
2486 2 = Generate v4 interworing stubs. */
2487 int fix_v4bx;
319850b4 2488
906e58ca
NC		 2489 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2490 int use_blx;
33bfe774 2491
906e58ca
NC		 2492 /* What sort of code sequences we should look for which may trigger the
2493 VFP11 denorm erratum. */
2494 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2495
906e58ca
NC		 2496 /* Global counter for the number of fixes we have emitted. */
2497 int num_vfp11_fixes;
c7b8f16e 2498
906e58ca
NC		 2499 /* Nonzero to force PIC branch veneers. */
2500 int pic_veneer;
27e55c4d 2501
906e58ca
NC		 2502 /* The number of bytes in the initial entry in the PLT. */
2503 bfd_size_type plt_header_size;
e5a52504 2504
906e58ca
NC		 2505 /* The number of bytes in the subsequent PLT etries. */
2506 bfd_size_type plt_entry_size;
e5a52504 2507
906e58ca
NC		 2508 /* True if the target system is VxWorks. */
2509 int vxworks_p;
00a97672 2510
906e58ca
NC		 2511 /* True if the target system is Symbian OS. */
2512 int symbian_p;
e5a52504 2513
906e58ca
NC		 2514 /* True if the target uses REL relocations. */
2515 int use_rel;
4e7fd91e 2516
906e58ca
NC		 2517 /* Short-cuts to get to dynamic linker sections. */
2518 asection *sgot;
2519 asection *sgotplt;
2520 asection *srelgot;
2521 asection *splt;
2522 asection *srelplt;
2523 asection *sdynbss;
2524 asection *srelbss;
5e681ec4 2525
906e58ca
NC		 2526 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2527 asection *srelplt2;
00a97672 2528
906e58ca
NC		 2529 /* Data for R_ARM_TLS_LDM32 relocations. */
2530 union
2531 {
2532 bfd_signed_vma refcount;
2533 bfd_vma offset;
2534 } tls_ldm_got;
b7693d02 2535
906e58ca
NC		 2536 /* Small local sym to section mapping cache. */
2537 struct sym_sec_cache sym_sec;
2538
2539 /* For convenience in allocate_dynrelocs. */
2540 bfd * obfd;
2541
2542 /* The stub hash table. */
2543 struct bfd_hash_table stub_hash_table;
2544
2545 /* Linker stub bfd. */
2546 bfd *stub_bfd;
2547
2548 /* Linker call-backs. */
2549 asection * (*add_stub_section) (const char *, asection *);
2550 void (*layout_sections_again) (void);
2551
2552 /* Array to keep track of which stub sections have been created, and
2553 information on stub grouping. */
2554 struct map_stub
2555 {
2556 /* This is the section to which stubs in the group will be
2557 attached. */
2558 asection *link_sec;
2559 /* The stub section. */
2560 asection *stub_sec;
2561 } *stub_group;
2562
2563 /* Assorted information used by elf32_arm_size_stubs. */
2564 unsigned int bfd_count;
2565 int top_index;
2566 asection **input_list;
2567};
252b5132 2568
780a67af
NC		 2569/* Create an entry in an ARM ELF linker hash table. */
2570
2571static struct bfd_hash_entry *
57e8b36a
NC		 2572elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2573 struct bfd_hash_table * table,
2574 const char * string)
780a67af
NC		 2575{
2576 struct elf32_arm_link_hash_entry * ret =
2577 (struct elf32_arm_link_hash_entry *) entry;
2578
2579 /* Allocate the structure if it has not already been allocated by a
2580 subclass. */
906e58ca 2581 if (ret == NULL)
57e8b36a
NC		 2582 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2583 if (ret == NULL)
780a67af
NC		 2584 return (struct bfd_hash_entry *) ret;
2585
2586 /* Call the allocation method of the superclass. */
2587 ret = ((struct elf32_arm_link_hash_entry *)
2588 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2589 table, string));
57e8b36a 2590 if (ret != NULL)
b7693d02
DJ		 2591 {
2592 ret->relocs_copied = NULL;
ba93b8ac 2593 ret->tls_type = GOT_UNKNOWN;
b7693d02 2594 ret->plt_thumb_refcount = 0;
bd97cb95 2595 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2596 ret->plt_got_offset = -1;
a4fd1a8e 2597 ret->export_glue = NULL;
906e58ca
NC		 2598
2599 ret->stub_cache = NULL;
b7693d02 2600 }
780a67af
NC		 2601
2602 return (struct bfd_hash_entry *) ret;
2603}
2604
906e58ca
NC		 2605/* Initialize an entry in the stub hash table. */
2606
2607static struct bfd_hash_entry *
2608stub_hash_newfunc (struct bfd_hash_entry *entry,
2609 struct bfd_hash_table *table,
2610 const char *string)
2611{
2612 /* Allocate the structure if it has not already been allocated by a
2613 subclass. */
2614 if (entry == NULL)
2615 {
2616 entry = bfd_hash_allocate (table,
2617 sizeof (struct elf32_arm_stub_hash_entry));
2618 if (entry == NULL)
2619 return entry;
2620 }
2621
2622 /* Call the allocation method of the superclass. */
2623 entry = bfd_hash_newfunc (entry, table, string);
2624 if (entry != NULL)
2625 {
2626 struct elf32_arm_stub_hash_entry *eh;
2627
2628 /* Initialize the local fields. */
2629 eh = (struct elf32_arm_stub_hash_entry *) entry;
2630 eh->stub_sec = NULL;
2631 eh->stub_offset = 0;
2632 eh->target_value = 0;
2633 eh->target_section = NULL;
2634 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2635 eh->stub_size = 0;
2636 eh->stub_template = NULL;
2637 eh->stub_template_size = 0;
906e58ca
NC		 2638 eh->h = NULL;
2639 eh->id_sec = NULL;
2640 }
2641
2642 return entry;
2643}
2644
00a97672 2645/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2646 shortcuts to them in our hash table. */
2647
2648static bfd_boolean
57e8b36a 2649create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2650{
2651 struct elf32_arm_link_hash_table *htab;
2652
e5a52504
MM		 2653 htab = elf32_arm_hash_table (info);
2654 /* BPABI objects never have a GOT, or associated sections. */
2655 if (htab->symbian_p)
2656 return TRUE;
2657
5e681ec4
PB		 2658 if (! _bfd_elf_create_got_section (dynobj, info))
2659 return FALSE;
2660
5e681ec4
PB		 2661 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2662 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2663 if (!htab->sgot || !htab->sgotplt)
2664 abort ();
2665
00a97672
RS		 2666 htab->srelgot = bfd_make_section_with_flags (dynobj,
2667 RELOC_SECTION (htab, ".got"),
3496cb2a
L		 2668 (SEC_ALLOC | SEC_LOAD
2669 | SEC_HAS_CONTENTS
2670 | SEC_IN_MEMORY
2671 | SEC_LINKER_CREATED
2672 | SEC_READONLY));
5e681ec4 2673 if (htab->srelgot == NULL
5e681ec4
PB		 2674 || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
2675 return FALSE;
2676 return TRUE;
2677}
2678
00a97672
RS		 2679/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2680 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2681 hash table. */
2682
2683static bfd_boolean
57e8b36a 2684elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2685{
2686 struct elf32_arm_link_hash_table *htab;
2687
2688 htab = elf32_arm_hash_table (info);
2689 if (!htab->sgot && !create_got_section (dynobj, info))
2690 return FALSE;
2691
2692 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2693 return FALSE;
2694
2695 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2696 htab->srelplt = bfd_get_section_by_name (dynobj,
2697 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2698 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2699 if (!info->shared)
00a97672
RS		 2700 htab->srelbss = bfd_get_section_by_name (dynobj,
2701 RELOC_SECTION (htab, ".bss"));
2702
2703 if (htab->vxworks_p)
2704 {
2705 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2706 return FALSE;
2707
2708 if (info->shared)
2709 {
2710 htab->plt_header_size = 0;
2711 htab->plt_entry_size
2712 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2713 }
2714 else
2715 {
2716 htab->plt_header_size
2717 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2718 htab->plt_entry_size
2719 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2720 }
2721 }
5e681ec4 2722
906e58ca 2723 if (!htab->splt
e5a52504
MM		 2724 || !htab->srelplt
2725 || !htab->sdynbss
5e681ec4
PB		 2726 || (!info->shared && !htab->srelbss))
2727 abort ();
2728
2729 return TRUE;
2730}
2731
906e58ca
NC		 2732/* Copy the extra info we tack onto an elf_link_hash_entry. */
2733
2734static void
2735elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2736 struct elf_link_hash_entry *dir,
2737 struct elf_link_hash_entry *ind)
2738{
2739 struct elf32_arm_link_hash_entry *edir, *eind;
2740
2741 edir = (struct elf32_arm_link_hash_entry *) dir;
2742 eind = (struct elf32_arm_link_hash_entry *) ind;
2743
2744 if (eind->relocs_copied != NULL)
2745 {
2746 if (edir->relocs_copied != NULL)
2747 {
2748 struct elf32_arm_relocs_copied **pp;
2749 struct elf32_arm_relocs_copied *p;
2750
2751 /* Add reloc counts against the indirect sym to the direct sym
2752 list. Merge any entries against the same section. */
2753 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2754 {
2755 struct elf32_arm_relocs_copied *q;
2756
2757 for (q = edir->relocs_copied; q != NULL; q = q->next)
2758 if (q->section == p->section)
2759 {
2760 q->pc_count += p->pc_count;
2761 q->count += p->count;
2762 *pp = p->next;
2763 break;
2764 }
2765 if (q == NULL)
2766 pp = &p->next;
2767 }
2768 *pp = edir->relocs_copied;
2769 }
2770
2771 edir->relocs_copied = eind->relocs_copied;
2772 eind->relocs_copied = NULL;
2773 }
2774
2775 if (ind->root.type == bfd_link_hash_indirect)
2776 {
2777 /* Copy over PLT info. */
2778 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2779 eind->plt_thumb_refcount = 0;
2780 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2781 eind->plt_maybe_thumb_refcount = 0;
2782
2783 if (dir->got.refcount <= 0)
2784 {
2785 edir->tls_type = eind->tls_type;
2786 eind->tls_type = GOT_UNKNOWN;
2787 }
2788 }
2789
2790 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2791}
2792
2793/* Create an ARM elf linker hash table. */
2794
2795static struct bfd_link_hash_table *
2796elf32_arm_link_hash_table_create (bfd *abfd)
2797{
2798 struct elf32_arm_link_hash_table *ret;
2799 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2800
2801 ret = bfd_malloc (amt);
2802 if (ret == NULL)
2803 return NULL;
2804
2805 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2806 elf32_arm_link_hash_newfunc,
2807 sizeof (struct elf32_arm_link_hash_entry)))
2808 {
2809 free (ret);
2810 return NULL;
2811 }
2812
2813 ret->sgot = NULL;
2814 ret->sgotplt = NULL;
2815 ret->srelgot = NULL;
2816 ret->splt = NULL;
2817 ret->srelplt = NULL;
2818 ret->sdynbss = NULL;
2819 ret->srelbss = NULL;
2820 ret->srelplt2 = NULL;
2821 ret->thumb_glue_size = 0;
2822 ret->arm_glue_size = 0;
2823 ret->bx_glue_size = 0;
2824 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2825 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2826 ret->vfp11_erratum_glue_size = 0;
2827 ret->num_vfp11_fixes = 0;
2828 ret->bfd_of_glue_owner = NULL;
2829 ret->byteswap_code = 0;
2830 ret->target1_is_rel = 0;
2831 ret->target2_reloc = R_ARM_NONE;
2832#ifdef FOUR_WORD_PLT
2833 ret->plt_header_size = 16;
2834 ret->plt_entry_size = 16;
2835#else
2836 ret->plt_header_size = 20;
2837 ret->plt_entry_size = 12;
2838#endif
2839 ret->fix_v4bx = 0;
2840 ret->use_blx = 0;
2841 ret->vxworks_p = 0;
2842 ret->symbian_p = 0;
2843 ret->use_rel = 1;
2844 ret->sym_sec.abfd = NULL;
2845 ret->obfd = abfd;
2846 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2847 ret->stub_bfd = NULL;
2848 ret->add_stub_section = NULL;
2849 ret->layout_sections_again = NULL;
2850 ret->stub_group = NULL;
2851 ret->bfd_count = 0;
2852 ret->top_index = 0;
2853 ret->input_list = NULL;
906e58ca
NC		 2854
2855 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2856 sizeof (struct elf32_arm_stub_hash_entry)))
2857 {
2858 free (ret);
2859 return NULL;
2860 }
2861
2862 return &ret->root.root;
2863}
2864
2865/* Free the derived linker hash table. */
2866
2867static void
2868elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2869{
2870 struct elf32_arm_link_hash_table *ret
2871 = (struct elf32_arm_link_hash_table *) hash;
2872
2873 bfd_hash_table_free (&ret->stub_hash_table);
2874 _bfd_generic_link_hash_table_free (hash);
2875}
2876
2877/* Determine if we're dealing with a Thumb only architecture. */
2878
2879static bfd_boolean
2880using_thumb_only (struct elf32_arm_link_hash_table *globals)
2881{
2882 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2883 Tag_CPU_arch);
2884 int profile;
2885
2886 if (arch != TAG_CPU_ARCH_V7)
2887 return FALSE;
2888
2889 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2890 Tag_CPU_arch_profile);
2891
2892 return profile == 'M';
2893}
2894
2895/* Determine if we're dealing with a Thumb-2 object. */
2896
2897static bfd_boolean
2898using_thumb2 (struct elf32_arm_link_hash_table *globals)
2899{
2900 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2901 Tag_CPU_arch);
2902 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2903}
2904
f4ac8484
DJ		 2905static bfd_boolean
2906arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
2907{
2908 switch (stub_type)
2909 {
fea2b4d6
CL		 2910 case arm_stub_long_branch_thumb_only:
2911 case arm_stub_long_branch_v4t_thumb_arm:
2912 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 2913 case arm_stub_long_branch_v4t_thumb_arm_pic:
2914 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 2915 return TRUE;
2916 case arm_stub_none:
2917 BFD_FAIL ();
2918 return FALSE;
2919 break;
2920 default:
2921 return FALSE;
2922 }
2923}
2924
906e58ca
NC		 2925/* Determine the type of stub needed, if any, for a call. */
2926
2927static enum elf32_arm_stub_type
2928arm_type_of_stub (struct bfd_link_info *info,
2929 asection *input_sec,
2930 const Elf_Internal_Rela *rel,
2931 unsigned char st_type,
2932 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 2933 bfd_vma destination,
2934 asection *sym_sec,
2935 bfd *input_bfd,
2936 const char *name)
906e58ca
NC		 2937{
2938 bfd_vma location;
2939 bfd_signed_vma branch_offset;
2940 unsigned int r_type;
2941 struct elf32_arm_link_hash_table * globals;
2942 int thumb2;
2943 int thumb_only;
2944 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 2945 int use_plt = 0;
906e58ca 2946
da5938a2 2947 /* We don't know the actual type of destination in case it is of
8029a119 2948 type STT_SECTION: give up. */
da5938a2
NC		 2949 if (st_type == STT_SECTION)
2950 return stub_type;
2951
906e58ca
NC		 2952 globals = elf32_arm_hash_table (info);
2953
2954 thumb_only = using_thumb_only (globals);
2955
2956 thumb2 = using_thumb2 (globals);
2957
2958 /* Determine where the call point is. */
2959 location = (input_sec->output_offset
2960 + input_sec->output_section->vma
2961 + rel->r_offset);
2962
2963 branch_offset = (bfd_signed_vma)(destination - location);
2964
2965 r_type = ELF32_R_TYPE (rel->r_info);
2966
5fa9e92f 2967 /* Keep a simpler condition, for the sake of clarity. */
329dcd78 2968 if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 2969 {
2970 use_plt = 1;
2971 /* Note when dealing with PLT entries: the main PLT stub is in
2972 ARM mode, so if the branch is in Thumb mode, another
2973 Thumb->ARM stub will be inserted later just before the ARM
2974 PLT stub. We don't take this extra distance into account
2975 here, because if a long branch stub is needed, we'll add a
2976 Thumb->Arm one and branch directly to the ARM PLT entry
2977 because it avoids spreading offset corrections in several
2978 places. */
2979 }
906e58ca 2980
155d87d7 2981 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 2982 {
5fa9e92f
CL		 2983 /* Handle cases where:
2984 - this call goes too far (different Thumb/Thumb2 max
2985 distance)
155d87d7
CL		 2986 - it's a Thumb->Arm call and blx is not available, or it's a
2987 Thumb->Arm branch (not bl). A stub is needed in this case,
2988 but only if this call is not through a PLT entry. Indeed,
2989 PLT stubs handle mode switching already.
5fa9e92f 2990 */
906e58ca
NC		 2991 if ((!thumb2
2992 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
2993 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
2994 || (thumb2
2995 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
2996 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 2997 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 2998 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
2999 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3000 && !use_plt))
906e58ca
NC		 3001 {
3002 if (st_type == STT_ARM_TFUNC)
3003 {
3004 /* Thumb to thumb. */
3005 if (!thumb_only)
3006 {
3007 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3008 /* PIC stubs. */
155d87d7
CL		 3009 ? ((globals->use_blx
3010 && (r_type ==R_ARM_THM_CALL))
3011 /* V5T and above. Stub starts with ARM code, so
3012 we must be able to switch mode before
3013 reaching it, which is only possible for 'bl'
3014 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3015 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3016 /* On V4T, use Thumb code only. */
d3626fb0 3017 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3018
3019 /* non-PIC stubs. */
155d87d7
CL		 3020 : ((globals->use_blx
3021 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3022 /* V5T and above. */
3023 ? arm_stub_long_branch_any_any
3024 /* V4T. */
d3626fb0 3025 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3026 }
3027 else
3028 {
3029 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3030 /* PIC stub. */
3031 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3032 /* non-PIC stub. */
3033 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3034 }
3035 }
3036 else
3037 {
3038 /* Thumb to arm. */
c820be07
NC		 3039 if (sym_sec != NULL
3040 && sym_sec->owner != NULL
3041 && !INTERWORK_FLAG (sym_sec->owner))
3042 {
3043 (*_bfd_error_handler)
3044 (_("%B(%s): warning: interworking not enabled.\n"
3045 " first occurrence: %B: Thumb call to ARM"),
3046 sym_sec->owner, input_bfd, name);
3047 }
3048
906e58ca 3049 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3050 /* PIC stubs. */
155d87d7
CL		 3051 ? ((globals->use_blx
3052 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3053 /* V5T and above. */
cf3eccff 3054 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3055 /* V4T PIC stub. */
3056 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3057
3058 /* non-PIC stubs. */
155d87d7
CL		 3059 : ((globals->use_blx
3060 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3061 /* V5T and above. */
3062 ? arm_stub_long_branch_any_any
3063 /* V4T. */
3064 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3065
3066 /* Handle v4t short branches. */
fea2b4d6 3067 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3068 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3069 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3070 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3071 }
3072 }
3073 }
155d87d7 3074 else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
906e58ca
NC		 3075 {
3076 if (st_type == STT_ARM_TFUNC)
3077 {
3078 /* Arm to thumb. */
c820be07
NC		 3079
3080 if (sym_sec != NULL
3081 && sym_sec->owner != NULL
3082 && !INTERWORK_FLAG (sym_sec->owner))
3083 {
3084 (*_bfd_error_handler)
3085 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3086 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3087 sym_sec->owner, input_bfd, name);
3088 }
3089
3090 /* We have an extra 2-bytes reach because of
3091 the mode change (bit 24 (H) of BLX encoding). */
906e58ca
NC		 3092 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3093 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
155d87d7
CL		 3094 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3095 || (r_type == R_ARM_JUMP24)
3096 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3097 {
3098 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3099 /* PIC stubs. */
ebe24dd4
CL		 3100 ? ((globals->use_blx)
3101 /* V5T and above. */
3102 ? arm_stub_long_branch_any_thumb_pic
3103 /* V4T stub. */
3104 : arm_stub_long_branch_v4t_arm_thumb_pic)
3105
c2b4a39d
CL		 3106 /* non-PIC stubs. */
3107 : ((globals->use_blx)
3108 /* V5T and above. */
3109 ? arm_stub_long_branch_any_any
3110 /* V4T. */
3111 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3112 }
3113 }
3114 else
3115 {
3116 /* Arm to arm. */
3117 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3118 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3119 {
3120 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3121 /* PIC stubs. */
cf3eccff 3122 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3123 /* non-PIC stubs. */
fea2b4d6 3124 : arm_stub_long_branch_any_any;
906e58ca
NC		 3125 }
3126 }
3127 }
3128
3129 return stub_type;
3130}
3131
3132/* Build a name for an entry in the stub hash table. */
3133
3134static char *
3135elf32_arm_stub_name (const asection *input_section,
3136 const asection *sym_sec,
3137 const struct elf32_arm_link_hash_entry *hash,
3138 const Elf_Internal_Rela *rel)
3139{
3140 char *stub_name;
3141 bfd_size_type len;
3142
3143 if (hash)
3144 {
3145 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
3146 stub_name = bfd_malloc (len);
3147 if (stub_name != NULL)
3148 sprintf (stub_name, "%08x_%s+%x",
3149 input_section->id & 0xffffffff,
3150 hash->root.root.root.string,
3151 (int) rel->r_addend & 0xffffffff);
3152 }
3153 else
3154 {
3155 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
3156 stub_name = bfd_malloc (len);
3157 if (stub_name != NULL)
3158 sprintf (stub_name, "%08x_%x:%x+%x",
3159 input_section->id & 0xffffffff,
3160 sym_sec->id & 0xffffffff,
3161 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3162 (int) rel->r_addend & 0xffffffff);
3163 }
3164
3165 return stub_name;
3166}
3167
3168/* Look up an entry in the stub hash. Stub entries are cached because
3169 creating the stub name takes a bit of time. */
3170
3171static struct elf32_arm_stub_hash_entry *
3172elf32_arm_get_stub_entry (const asection *input_section,
3173 const asection *sym_sec,
3174 struct elf_link_hash_entry *hash,
3175 const Elf_Internal_Rela *rel,
3176 struct elf32_arm_link_hash_table *htab)
3177{
3178 struct elf32_arm_stub_hash_entry *stub_entry;
3179 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3180 const asection *id_sec;
3181
3182 if ((input_section->flags & SEC_CODE) == 0)
3183 return NULL;
3184
3185 /* If this input section is part of a group of sections sharing one
3186 stub section, then use the id of the first section in the group.
3187 Stub names need to include a section id, as there may well be
3188 more than one stub used to reach say, printf, and we need to
3189 distinguish between them. */
3190 id_sec = htab->stub_group[input_section->id].link_sec;
3191
3192 if (h != NULL && h->stub_cache != NULL
3193 && h->stub_cache->h == h
3194 && h->stub_cache->id_sec == id_sec)
3195 {
3196 stub_entry = h->stub_cache;
3197 }
3198 else
3199 {
3200 char *stub_name;
3201
3202 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
3203 if (stub_name == NULL)
3204 return NULL;
3205
3206 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3207 stub_name, FALSE, FALSE);
3208 if (h != NULL)
3209 h->stub_cache = stub_entry;
3210
3211 free (stub_name);
3212 }
3213
3214 return stub_entry;
3215}
3216
906e58ca
NC		 3217/* Add a new stub entry to the stub hash. Not all fields of the new
3218 stub entry are initialised. */
3219
3220static struct elf32_arm_stub_hash_entry *
3221elf32_arm_add_stub (const char *stub_name,
3222 asection *section,
da5938a2 3223 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3224{
3225 asection *link_sec;
3226 asection *stub_sec;
3227 struct elf32_arm_stub_hash_entry *stub_entry;
3228
3229 link_sec = htab->stub_group[section->id].link_sec;
3230 stub_sec = htab->stub_group[section->id].stub_sec;
3231 if (stub_sec == NULL)
3232 {
3233 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3234 if (stub_sec == NULL)
3235 {
3236 size_t namelen;
3237 bfd_size_type len;
3238 char *s_name;
3239
3240 namelen = strlen (link_sec->name);
3241 len = namelen + sizeof (STUB_SUFFIX);
3242 s_name = bfd_alloc (htab->stub_bfd, len);
3243 if (s_name == NULL)
3244 return NULL;
3245
3246 memcpy (s_name, link_sec->name, namelen);
3247 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3248 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3249 if (stub_sec == NULL)
3250 return NULL;
3251 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3252 }
3253 htab->stub_group[section->id].stub_sec = stub_sec;
3254 }
3255
3256 /* Enter this entry into the linker stub hash table. */
3257 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3258 TRUE, FALSE);
3259 if (stub_entry == NULL)
3260 {
3261 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3262 section->owner,
3263 stub_name);
3264 return NULL;
3265 }
3266
3267 stub_entry->stub_sec = stub_sec;
3268 stub_entry->stub_offset = 0;
3269 stub_entry->id_sec = link_sec;
3270
906e58ca
NC		 3271 return stub_entry;
3272}
3273
3274/* Store an Arm insn into an output section not processed by
3275 elf32_arm_write_section. */
3276
3277static void
8029a119
NC		 3278put_arm_insn (struct elf32_arm_link_hash_table * htab,
3279 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3280{
3281 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3282 bfd_putl32 (val, ptr);
3283 else
3284 bfd_putb32 (val, ptr);
3285}
3286
3287/* Store a 16-bit Thumb insn into an output section not processed by
3288 elf32_arm_write_section. */
3289
3290static void
8029a119
NC		 3291put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3292 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3293{
3294 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3295 bfd_putl16 (val, ptr);
3296 else
3297 bfd_putb16 (val, ptr);
3298}
3299
3300static bfd_boolean
3301arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3302 void * in_arg)
3303{
3304 struct elf32_arm_stub_hash_entry *stub_entry;
3305 struct bfd_link_info *info;
3306 struct elf32_arm_link_hash_table *htab;
3307 asection *stub_sec;
3308 bfd *stub_bfd;
3309 bfd_vma stub_addr;
3310 bfd_byte *loc;
3311 bfd_vma sym_value;
3312 int template_size;
3313 int size;
461a49ca 3314 const insn_sequence *template;
906e58ca
NC		 3315 int i;
3316 struct elf32_arm_link_hash_table * globals;
461a49ca 3317 int stub_reloc_idx = -1;
4e31c731 3318 int stub_reloc_offset = 0;
906e58ca
NC		 3319
3320 /* Massage our args to the form they really have. */
3321 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3322 info = (struct bfd_link_info *) in_arg;
3323
3324 globals = elf32_arm_hash_table (info);
3325
3326 htab = elf32_arm_hash_table (info);
3327 stub_sec = stub_entry->stub_sec;
3328
3329 /* Make a note of the offset within the stubs for this entry. */
3330 stub_entry->stub_offset = stub_sec->size;
3331 loc = stub_sec->contents + stub_entry->stub_offset;
3332
3333 stub_bfd = stub_sec->owner;
3334
3335 /* This is the address of the start of the stub. */
3336 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3337 + stub_entry->stub_offset;
3338
3339 /* This is the address of the stub destination. */
3340 sym_value = (stub_entry->target_value
3341 + stub_entry->target_section->output_offset
3342 + stub_entry->target_section->output_section->vma);
3343
461a49ca
DJ		 3344 template = stub_entry->stub_template;
3345 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3346
3347 size = 0;
461a49ca 3348 for (i = 0; i < template_size; i++)
906e58ca 3349 {
4e31c731 3350 switch (template[i].type)
461a49ca
DJ		 3351 {
3352 case THUMB16_TYPE:
3353 put_thumb_insn (globals, stub_bfd, template[i].data, loc + size);
3354 size += 2;
3355 break;
906e58ca 3356
461a49ca
DJ		 3357 case ARM_TYPE:
3358 put_arm_insn (globals, stub_bfd, template[i].data, loc + size);
3359 /* Handle cases where the target is encoded within the
3360 instruction. */
ebe24dd4 3361 if (template[i].r_type == R_ARM_JUMP24)
461a49ca
DJ		 3362 {
3363 stub_reloc_idx = i;
3364 stub_reloc_offset = size;
3365 }
3366 size += 4;
3367 break;
3368
3369 case DATA_TYPE:
3370 bfd_put_32 (stub_bfd, template[i].data, loc + size);
3371 stub_reloc_idx = i;
3372 stub_reloc_offset = size;
3373 size += 4;
3374 break;
3375
3376 default:
3377 BFD_FAIL ();
3378 return FALSE;
3379 }
906e58ca 3380 }
461a49ca 3381
906e58ca
NC		 3382 stub_sec->size += size;
3383
461a49ca
DJ		 3384 /* Stub size has already been computed in arm_size_one_stub. Check
3385 consistency. */
3386 BFD_ASSERT (size == stub_entry->stub_size);
3387
906e58ca
NC		 3388 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3389 if (stub_entry->st_type == STT_ARM_TFUNC)
3390 sym_value |= 1;
3391
461a49ca
DJ		 3392 /* Assume there is one and only one entry to relocate in each stub. */
3393 BFD_ASSERT (stub_reloc_idx != -1);
c820be07 3394
ebe24dd4 3395 _bfd_final_link_relocate (elf32_arm_howto_from_type (template[stub_reloc_idx].r_type),
461a49ca
DJ		 3396 stub_bfd, stub_sec, stub_sec->contents,
3397 stub_entry->stub_offset + stub_reloc_offset,
3398 sym_value, template[stub_reloc_idx].reloc_addend);
906e58ca
NC		 3399
3400 return TRUE;
3401}
3402
3403/* As above, but don't actually build the stub. Just bump offset so
3404 we know stub section sizes. */
3405
3406static bfd_boolean
3407arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3408 void * in_arg)
3409{
3410 struct elf32_arm_stub_hash_entry *stub_entry;
3411 struct elf32_arm_link_hash_table *htab;
461a49ca 3412 const insn_sequence *template;
906e58ca
NC		 3413 int template_size;
3414 int size;
3415 int i;
3416
3417 /* Massage our args to the form they really have. */
3418 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3419 htab = (struct elf32_arm_link_hash_table *) in_arg;
3420
738a79f6
CL		 3421 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3422 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3423
3424 template = stub_definitions[stub_entry->stub_type].template;
3425 template_size = stub_definitions[stub_entry->stub_type].template_size;
906e58ca
NC		 3426
3427 size = 0;
461a49ca
DJ		 3428 for (i = 0; i < template_size; i++)
3429 {
4e31c731 3430 switch (template[i].type)
461a49ca
DJ		 3431 {
3432 case THUMB16_TYPE:
3433 size += 2;
3434 break;
3435
3436 case ARM_TYPE:
3437 size += 4;
3438 break;
3439
3440 case DATA_TYPE:
3441 size += 4;
3442 break;
3443
3444 default:
3445 BFD_FAIL ();
3446 return FALSE;
3447 }
3448 }
3449
3450 stub_entry->stub_size = size;
3451 stub_entry->stub_template = template;
3452 stub_entry->stub_template_size = template_size;
3453
906e58ca
NC		 3454 size = (size + 7) & ~7;
3455 stub_entry->stub_sec->size += size;
461a49ca 3456
906e58ca
NC		 3457 return TRUE;
3458}
3459
3460/* External entry points for sizing and building linker stubs. */
3461
3462/* Set up various things so that we can make a list of input sections
3463 for each output section included in the link. Returns -1 on error,
3464 0 when no stubs will be needed, and 1 on success. */
3465
3466int
3467elf32_arm_setup_section_lists (bfd *output_bfd,
3468 struct bfd_link_info *info)
3469{
3470 bfd *input_bfd;
3471 unsigned int bfd_count;
3472 int top_id, top_index;
3473 asection *section;
3474 asection **input_list, **list;
3475 bfd_size_type amt;
3476 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3477
3478 if (! is_elf_hash_table (htab))
3479 return 0;
3480
3481 /* Count the number of input BFDs and find the top input section id. */
3482 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3483 input_bfd != NULL;
3484 input_bfd = input_bfd->link_next)
3485 {
3486 bfd_count += 1;
3487 for (section = input_bfd->sections;
3488 section != NULL;
3489 section = section->next)
3490 {
3491 if (top_id < section->id)
3492 top_id = section->id;
3493 }
3494 }
3495 htab->bfd_count = bfd_count;
3496
3497 amt = sizeof (struct map_stub) * (top_id + 1);
3498 htab->stub_group = bfd_zmalloc (amt);
3499 if (htab->stub_group == NULL)
3500 return -1;
3501
3502 /* We can't use output_bfd->section_count here to find the top output
3503 section index as some sections may have been removed, and
3504 _bfd_strip_section_from_output doesn't renumber the indices. */
3505 for (section = output_bfd->sections, top_index = 0;
3506 section != NULL;
3507 section = section->next)
3508 {
3509 if (top_index < section->index)
3510 top_index = section->index;
3511 }
3512
3513 htab->top_index = top_index;
3514 amt = sizeof (asection *) * (top_index + 1);
3515 input_list = bfd_malloc (amt);
3516 htab->input_list = input_list;
3517 if (input_list == NULL)
3518 return -1;
3519
3520 /* For sections we aren't interested in, mark their entries with a
3521 value we can check later. */
3522 list = input_list + top_index;
3523 do
3524 *list = bfd_abs_section_ptr;
3525 while (list-- != input_list);
3526
3527 for (section = output_bfd->sections;
3528 section != NULL;
3529 section = section->next)
3530 {
3531 if ((section->flags & SEC_CODE) != 0)
3532 input_list[section->index] = NULL;
3533 }
3534
3535 return 1;
3536}
3537
3538/* The linker repeatedly calls this function for each input section,
3539 in the order that input sections are linked into output sections.
3540 Build lists of input sections to determine groupings between which
3541 we may insert linker stubs. */
3542
3543void
3544elf32_arm_next_input_section (struct bfd_link_info *info,
3545 asection *isec)
3546{
3547 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3548
3549 if (isec->output_section->index <= htab->top_index)
3550 {
3551 asection **list = htab->input_list + isec->output_section->index;
3552
3553 if (*list != bfd_abs_section_ptr)
3554 {
3555 /* Steal the link_sec pointer for our list. */
3556#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3557 /* This happens to make the list in reverse order,
07d72278 3558 which we reverse later. */
906e58ca
NC		 3559 PREV_SEC (isec) = *list;
3560 *list = isec;
3561 }
3562 }
3563}
3564
3565/* See whether we can group stub sections together. Grouping stub
3566 sections may result in fewer stubs. More importantly, we need to
07d72278 3567 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3568 .fini output sections respectively, because glibc splits the
3569 _init and _fini functions into multiple parts. Putting a stub in
3570 the middle of a function is not a good idea. */
3571
3572static void
3573group_sections (struct elf32_arm_link_hash_table *htab,
3574 bfd_size_type stub_group_size,
07d72278 3575 bfd_boolean stubs_always_after_branch)
906e58ca 3576{
07d72278 3577 asection **list = htab->input_list;
906e58ca
NC		 3578
3579 do
3580 {
3581 asection *tail = *list;
07d72278 3582 asection *head;
906e58ca
NC		 3583
3584 if (tail == bfd_abs_section_ptr)
3585 continue;
3586
07d72278
DJ		 3587 /* Reverse the list: we must avoid placing stubs at the
3588 beginning of the section because the beginning of the text
3589 section may be required for an interrupt vector in bare metal
3590 code. */
3591#define NEXT_SEC PREV_SEC
e780aef2
CL		 3592 head = NULL;
3593 while (tail != NULL)
3594 {
3595 /* Pop from tail. */
3596 asection *item = tail;
3597 tail = PREV_SEC (item);
3598
3599 /* Push on head. */
3600 NEXT_SEC (item) = head;
3601 head = item;
3602 }
07d72278
DJ		 3603
3604 while (head != NULL)
906e58ca
NC		 3605 {
3606 asection *curr;
07d72278 3607 asection *next;
e780aef2
CL		 3608 bfd_vma stub_group_start = head->output_offset;
3609 bfd_vma end_of_next;
906e58ca 3610
07d72278 3611 curr = head;
e780aef2 3612 while (NEXT_SEC (curr) != NULL)
8cd931b7 3613 {
e780aef2
CL		 3614 next = NEXT_SEC (curr);
3615 end_of_next = next->output_offset + next->size;
3616 if (end_of_next - stub_group_start >= stub_group_size)
3617 /* End of NEXT is too far from start, so stop. */
8cd931b7 3618 break;
e780aef2
CL		 3619 /* Add NEXT to the group. */
3620 curr = next;
8cd931b7 3621 }
906e58ca 3622
07d72278 3623 /* OK, the size from the start to the start of CURR is less
906e58ca 3624 than stub_group_size and thus can be handled by one stub
07d72278 3625 section. (Or the head section is itself larger than
906e58ca
NC		 3626 stub_group_size, in which case we may be toast.)
3627 We should really be keeping track of the total size of
3628 stubs added here, as stubs contribute to the final output
7fb9f789 3629 section size. */
906e58ca
NC		 3630 do
3631 {
07d72278 3632 next = NEXT_SEC (head);
906e58ca 3633 /* Set up this stub group. */
07d72278 3634 htab->stub_group[head->id].link_sec = curr;
906e58ca 3635 }
07d72278 3636 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3637
3638 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3639 bytes after the stub section can be handled by it too. */
3640 if (!stubs_always_after_branch)
906e58ca 3641 {
e780aef2
CL		 3642 stub_group_start = curr->output_offset + curr->size;
3643
8cd931b7 3644 while (next != NULL)
906e58ca 3645 {
e780aef2
CL		 3646 end_of_next = next->output_offset + next->size;
3647 if (end_of_next - stub_group_start >= stub_group_size)
3648 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3649 break;
e780aef2 3650 /* Add NEXT to the stub group. */
07d72278
DJ		 3651 head = next;
3652 next = NEXT_SEC (head);
3653 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3654 }
3655 }
07d72278 3656 head = next;
906e58ca
NC		 3657 }
3658 }
07d72278 3659 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3660
3661 free (htab->input_list);
3662#undef PREV_SEC
07d72278 3663#undef NEXT_SEC
906e58ca
NC		 3664}
3665
3666/* Determine and set the size of the stub section for a final link.
3667
3668 The basic idea here is to examine all the relocations looking for
3669 PC-relative calls to a target that is unreachable with a "bl"
3670 instruction. */
3671
3672bfd_boolean
3673elf32_arm_size_stubs (bfd *output_bfd,
3674 bfd *stub_bfd,
3675 struct bfd_link_info *info,
3676 bfd_signed_vma group_size,
3677 asection * (*add_stub_section) (const char *, asection *),
3678 void (*layout_sections_again) (void))
3679{
3680 bfd_size_type stub_group_size;
07d72278 3681 bfd_boolean stubs_always_after_branch;
906e58ca
NC		 3682 bfd_boolean stub_changed = 0;
3683 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3684
3685 /* Propagate mach to stub bfd, because it may not have been
3686 finalized when we created stub_bfd. */
3687 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
3688 bfd_get_mach (output_bfd));
3689
3690 /* Stash our params away. */
3691 htab->stub_bfd = stub_bfd;
3692 htab->add_stub_section = add_stub_section;
3693 htab->layout_sections_again = layout_sections_again;
07d72278 3694 stubs_always_after_branch = group_size < 0;
906e58ca
NC		 3695 if (group_size < 0)
3696 stub_group_size = -group_size;
3697 else
3698 stub_group_size = group_size;
3699
3700 if (stub_group_size == 1)
3701 {
3702 /* Default values. */
3703 /* Thumb branch range is +-4MB has to be used as the default
3704 maximum size (a given section can contain both ARM and Thumb
3705 code, so the worst case has to be taken into account).
3706
3707 This value is 24K less than that, which allows for 2025
3708 12-byte stubs. If we exceed that, then we will fail to link.
3709 The user will have to relink with an explicit group size
3710 option. */
3711 stub_group_size = 4170000;
3712 }
3713
07d72278 3714 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca
NC		 3715
3716 while (1)
3717 {
3718 bfd *input_bfd;
3719 unsigned int bfd_indx;
3720 asection *stub_sec;
3721
3722 for (input_bfd = info->input_bfds, bfd_indx = 0;
3723 input_bfd != NULL;
3724 input_bfd = input_bfd->link_next, bfd_indx++)
3725 {
3726 Elf_Internal_Shdr *symtab_hdr;
3727 asection *section;
3728 Elf_Internal_Sym *local_syms = NULL;
3729
3730 /* We'll need the symbol table in a second. */
3731 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
3732 if (symtab_hdr->sh_info == 0)
3733 continue;
3734
3735 /* Walk over each section attached to the input bfd. */
3736 for (section = input_bfd->sections;
3737 section != NULL;
3738 section = section->next)
3739 {
3740 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
3741
3742 /* If there aren't any relocs, then there's nothing more
3743 to do. */
3744 if ((section->flags & SEC_RELOC) == 0
3745 || section->reloc_count == 0
3746 || (section->flags & SEC_CODE) == 0)
3747 continue;
3748
3749 /* If this section is a link-once section that will be
3750 discarded, then don't create any stubs. */
3751 if (section->output_section == NULL
3752 || section->output_section->owner != output_bfd)
3753 continue;
3754
3755 /* Get the relocs. */
3756 internal_relocs
3757 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
3758 NULL, info->keep_memory);
3759 if (internal_relocs == NULL)
3760 goto error_ret_free_local;
3761
3762 /* Now examine each relocation. */
3763 irela = internal_relocs;
3764 irelaend = irela + section->reloc_count;
3765 for (; irela < irelaend; irela++)
3766 {
3767 unsigned int r_type, r_indx;
3768 enum elf32_arm_stub_type stub_type;
3769 struct elf32_arm_stub_hash_entry *stub_entry;
3770 asection *sym_sec;
3771 bfd_vma sym_value;
3772 bfd_vma destination;
3773 struct elf32_arm_link_hash_entry *hash;
7413f23f 3774 const char *sym_name;
906e58ca
NC		 3775 char *stub_name;
3776 const asection *id_sec;
3777 unsigned char st_type;
3778
3779 r_type = ELF32_R_TYPE (irela->r_info);
3780 r_indx = ELF32_R_SYM (irela->r_info);
3781
3782 if (r_type >= (unsigned int) R_ARM_max)
3783 {
3784 bfd_set_error (bfd_error_bad_value);
3785 error_ret_free_internal:
3786 if (elf_section_data (section)->relocs == NULL)
3787 free (internal_relocs);
3788 goto error_ret_free_local;
3789 }
3790
155d87d7 3791 /* Only look for stubs on branch instructions. */
906e58ca 3792 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 3793 && (r_type != (unsigned int) R_ARM_THM_CALL)
3794 && (r_type != (unsigned int) R_ARM_JUMP24)
3795 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
3796 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 3797 continue;
3798
3799 /* Now determine the call target, its name, value,
3800 section. */
3801 sym_sec = NULL;
3802 sym_value = 0;
3803 destination = 0;
3804 hash = NULL;
7413f23f 3805 sym_name = NULL;
906e58ca
NC		 3806 if (r_indx < symtab_hdr->sh_info)
3807 {
3808 /* It's a local symbol. */
3809 Elf_Internal_Sym *sym;
3810 Elf_Internal_Shdr *hdr;
3811
3812 if (local_syms == NULL)
3813 {
3814 local_syms
3815 = (Elf_Internal_Sym *) symtab_hdr->contents;
3816 if (local_syms == NULL)
3817 local_syms
3818 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
3819 symtab_hdr->sh_info, 0,
3820 NULL, NULL, NULL);
3821 if (local_syms == NULL)
3822 goto error_ret_free_internal;
3823 }
3824
3825 sym = local_syms + r_indx;
3826 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
3827 sym_sec = hdr->bfd_section;
3828 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
3829 sym_value = sym->st_value;
3830 destination = (sym_value + irela->r_addend
3831 + sym_sec->output_offset
3832 + sym_sec->output_section->vma);
3833 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 3834 sym_name
3835 = bfd_elf_string_from_elf_section (input_bfd,
3836 symtab_hdr->sh_link,
3837 sym->st_name);
906e58ca
NC		 3838 }
3839 else
3840 {
3841 /* It's an external symbol. */
3842 int e_indx;
3843
3844 e_indx = r_indx - symtab_hdr->sh_info;
3845 hash = ((struct elf32_arm_link_hash_entry *)
3846 elf_sym_hashes (input_bfd)[e_indx]);
3847
3848 while (hash->root.root.type == bfd_link_hash_indirect
3849 || hash->root.root.type == bfd_link_hash_warning)
3850 hash = ((struct elf32_arm_link_hash_entry *)
3851 hash->root.root.u.i.link);
3852
3853 if (hash->root.root.type == bfd_link_hash_defined
3854 || hash->root.root.type == bfd_link_hash_defweak)
3855 {
3856 sym_sec = hash->root.root.u.def.section;
3857 sym_value = hash->root.root.u.def.value;
3858 if (sym_sec->output_section != NULL)
3859 destination = (sym_value + irela->r_addend
3860 + sym_sec->output_offset
3861 + sym_sec->output_section->vma);
3862 }
69c5861e
CL		 3863 else if ((hash->root.root.type == bfd_link_hash_undefined)
3864 || (hash->root.root.type == bfd_link_hash_undefweak))
3865 {
3866 /* For a shared library, use the PLT stub as
3867 target address to decide whether a long
3868 branch stub is needed.
3869 For absolute code, they cannot be handled. */
3870 struct elf32_arm_link_hash_table *globals =
3871 elf32_arm_hash_table (info);
3872
3873 if (globals->splt != NULL && hash != NULL
3874 && hash->root.plt.offset != (bfd_vma) -1)
3875 {
3876 sym_sec = globals->splt;
3877 sym_value = hash->root.plt.offset;
3878 if (sym_sec->output_section != NULL)
3879 destination = (sym_value
3880 + sym_sec->output_offset
3881 + sym_sec->output_section->vma);
3882 }
3883 else
3884 continue;
3885 }
906e58ca
NC		 3886 else
3887 {
3888 bfd_set_error (bfd_error_bad_value);
3889 goto error_ret_free_internal;
3890 }
3891 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 3892 sym_name = hash->root.root.root.string;
906e58ca
NC		 3893 }
3894
3895 /* Determine what (if any) linker stub is needed. */
3896 stub_type = arm_type_of_stub (info, section, irela, st_type,
c820be07
NC		 3897 hash, destination, sym_sec,
3898 input_bfd, sym_name);
906e58ca
NC		 3899 if (stub_type == arm_stub_none)
3900 continue;
5e681ec4 3901
906e58ca
NC		 3902 /* Support for grouping stub sections. */
3903 id_sec = htab->stub_group[section->id].link_sec;
5e681ec4 3904
906e58ca
NC		 3905 /* Get the name of this stub. */
3906 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela);
3907 if (!stub_name)
3908 goto error_ret_free_internal;
5e681ec4 3909
906e58ca
NC		 3910 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3911 stub_name,
3912 FALSE, FALSE);
3913 if (stub_entry != NULL)
3914 {
3915 /* The proper stub has already been created. */
3916 free (stub_name);
3917 continue;
3918 }
5e681ec4 3919
da5938a2 3920 stub_entry = elf32_arm_add_stub (stub_name, section, htab);
906e58ca
NC		 3921 if (stub_entry == NULL)
3922 {
3923 free (stub_name);
3924 goto error_ret_free_internal;
3925 }
5e681ec4 3926
906e58ca
NC		 3927 stub_entry->target_value = sym_value;
3928 stub_entry->target_section = sym_sec;
3929 stub_entry->stub_type = stub_type;
3930 stub_entry->h = hash;
3931 stub_entry->st_type = st_type;
7413f23f
DJ		 3932
3933 if (sym_name == NULL)
3934 sym_name = "unnamed";
3935 stub_entry->output_name
3936 = bfd_alloc (htab->stub_bfd,
3937 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
3938 + strlen (sym_name));
3939 if (stub_entry->output_name == NULL)
3940 {
3941 free (stub_name);
3942 goto error_ret_free_internal;
3943 }
3944
3945 /* For historical reasons, use the existing names for
3946 ARM-to-Thumb and Thumb-to-ARM stubs. */
155d87d7
CL		 3947 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
3948 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
3949 && st_type != STT_ARM_TFUNC)
7413f23f
DJ		 3950 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME,
3951 sym_name);
155d87d7
CL		 3952 else if ( ((r_type == (unsigned int) R_ARM_CALL)
3953 || (r_type == (unsigned int) R_ARM_JUMP24))
7413f23f
DJ		 3954 && st_type == STT_ARM_TFUNC)
3955 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME,
3956 sym_name);
3957 else
3958 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
3959 sym_name);
3960
906e58ca
NC		 3961 stub_changed = TRUE;
3962 }
3963
3964 /* We're done with the internal relocs, free them. */
3965 if (elf_section_data (section)->relocs == NULL)
3966 free (internal_relocs);
5e681ec4 3967 }
5e681ec4
PB		 3968 }
3969
906e58ca
NC		 3970 if (!stub_changed)
3971 break;
5e681ec4 3972
906e58ca
NC		 3973 /* OK, we've added some stubs. Find out the new size of the
3974 stub sections. */
3975 for (stub_sec = htab->stub_bfd->sections;
3976 stub_sec != NULL;
3977 stub_sec = stub_sec->next)
3e6b1042
DJ		 3978 {
3979 /* Ignore non-stub sections. */
3980 if (!strstr (stub_sec->name, STUB_SUFFIX))
3981 continue;
3982
3983 stub_sec->size = 0;
3984 }
b34b2d70 3985
906e58ca
NC		 3986 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
3987
3988 /* Ask the linker to do its stuff. */
3989 (*htab->layout_sections_again) ();
3990 stub_changed = FALSE;
ba93b8ac
DJ		 3991 }
3992
906e58ca
NC		 3993 return TRUE;
3994
3995 error_ret_free_local:
3996 return FALSE;
5e681ec4
PB		 3997}
3998
906e58ca
NC		 3999/* Build all the stubs associated with the current output file. The
4000 stubs are kept in a hash table attached to the main linker hash
4001 table. We also set up the .plt entries for statically linked PIC
4002 functions here. This function is called via arm_elf_finish in the
4003 linker. */
252b5132 4004
906e58ca
NC		 4005bfd_boolean
4006elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4007{
906e58ca
NC		 4008 asection *stub_sec;
4009 struct bfd_hash_table *table;
4010 struct elf32_arm_link_hash_table *htab;
252b5132 4011
906e58ca 4012 htab = elf32_arm_hash_table (info);
252b5132 4013
906e58ca
NC		 4014 for (stub_sec = htab->stub_bfd->sections;
4015 stub_sec != NULL;
4016 stub_sec = stub_sec->next)
252b5132 4017 {
906e58ca
NC		 4018 bfd_size_type size;
4019
8029a119 4020 /* Ignore non-stub sections. */
906e58ca
NC		 4021 if (!strstr (stub_sec->name, STUB_SUFFIX))
4022 continue;
4023
4024 /* Allocate memory to hold the linker stubs. */
4025 size = stub_sec->size;
4026 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
4027 if (stub_sec->contents == NULL && size != 0)
4028 return FALSE;
4029 stub_sec->size = 0;
252b5132
RH		 4030 }
4031
906e58ca
NC		 4032 /* Build the stubs as directed by the stub hash table. */
4033 table = &htab->stub_hash_table;
4034 bfd_hash_traverse (table, arm_build_one_stub, info);
252b5132 4035
906e58ca 4036 return TRUE;
252b5132
RH		 4037}
4038
9b485d32
NC		 4039/* Locate the Thumb encoded calling stub for NAME. */
4040
252b5132 4041static struct elf_link_hash_entry *
57e8b36a
NC		 4042find_thumb_glue (struct bfd_link_info *link_info,
4043 const char *name,
f2a9dd69 4044 char **error_message)
252b5132
RH		 4045{
4046 char *tmp_name;
4047 struct elf_link_hash_entry *hash;
4048 struct elf32_arm_link_hash_table *hash_table;
4049
4050 /* We need a pointer to the armelf specific hash table. */
4051 hash_table = elf32_arm_hash_table (link_info);
4052
57e8b36a
NC		 4053 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4054 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4055
4056 BFD_ASSERT (tmp_name);
4057
4058 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4059
4060 hash = elf_link_hash_lookup
b34976b6 4061 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4062
b1657152
AM		 4063 if (hash == NULL
4064 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4065 tmp_name, name) == -1)
4066 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4067
4068 free (tmp_name);
4069
4070 return hash;
4071}
4072
9b485d32
NC		 4073/* Locate the ARM encoded calling stub for NAME. */
4074
252b5132 4075static struct elf_link_hash_entry *
57e8b36a
NC		 4076find_arm_glue (struct bfd_link_info *link_info,
4077 const char *name,
f2a9dd69 4078 char **error_message)
252b5132
RH		 4079{
4080 char *tmp_name;
4081 struct elf_link_hash_entry *myh;
4082 struct elf32_arm_link_hash_table *hash_table;
4083
4084 /* We need a pointer to the elfarm specific hash table. */
4085 hash_table = elf32_arm_hash_table (link_info);
4086
57e8b36a
NC		 4087 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4088 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4089
4090 BFD_ASSERT (tmp_name);
4091
4092 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4093
4094 myh = elf_link_hash_lookup
b34976b6 4095 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4096
b1657152
AM		 4097 if (myh == NULL
4098 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4099 tmp_name, name) == -1)
4100 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4101
4102 free (tmp_name);
4103
4104 return myh;
4105}
4106
8f6277f5 4107/* ARM->Thumb glue (static images):
252b5132
RH		 4108
4109 .arm
4110 __func_from_arm:
4111 ldr r12, __func_addr
4112 bx r12
4113 __func_addr:
906e58ca 4114 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4115
26079076
PB		 4116 (v5t static images)
4117 .arm
4118 __func_from_arm:
4119 ldr pc, __func_addr
4120 __func_addr:
906e58ca 4121 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4122
8f6277f5
PB		 4123 (relocatable images)
4124 .arm
4125 __func_from_arm:
4126 ldr r12, __func_offset
4127 add r12, r12, pc
4128 bx r12
4129 __func_offset:
8029a119 4130 .word func - . */
8f6277f5
PB		 4131
4132#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4133static const insn32 a2t1_ldr_insn = 0xe59fc000;
4134static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4135static const insn32 a2t3_func_addr_insn = 0x00000001;
4136
26079076
PB		 4137#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4138static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4139static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4140
8f6277f5
PB		 4141#define ARM2THUMB_PIC_GLUE_SIZE 16
4142static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4143static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4144static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4145
9b485d32 4146/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4147
8029a119
NC		 4148 .thumb .thumb
4149 .align 2 .align 2
4150 __func_from_thumb: __func_from_thumb:
4151 bx pc push {r6, lr}
4152 nop ldr r6, __func_addr
4153 .arm mov lr, pc
4154 b func bx r6
fcef9eb7
NC		 4155 .arm
4156 ;; back_to_thumb
4157 ldmia r13! {r6, lr}
4158 bx lr
8029a119
NC		 4159 __func_addr:
4160 .word func */
252b5132
RH		 4161
4162#define THUMB2ARM_GLUE_SIZE 8
4163static const insn16 t2a1_bx_pc_insn = 0x4778;
4164static const insn16 t2a2_noop_insn = 0x46c0;
4165static const insn32 t2a3_b_insn = 0xea000000;
4166
c7b8f16e
JB		 4167#define VFP11_ERRATUM_VENEER_SIZE 8
4168
845b51d6
PB		 4169#define ARM_BX_VENEER_SIZE 12
4170static const insn32 armbx1_tst_insn = 0xe3100001;
4171static const insn32 armbx2_moveq_insn = 0x01a0f000;
4172static const insn32 armbx3_bx_insn = 0xe12fff10;
4173
7e392df6 4174#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4175static void
4176arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4177{
4178 asection * s;
8029a119 4179 bfd_byte * contents;
252b5132 4180
8029a119 4181 if (size == 0)
3e6b1042
DJ		 4182 {
4183 /* Do not include empty glue sections in the output. */
4184 if (abfd != NULL)
4185 {
4186 s = bfd_get_section_by_name (abfd, name);
4187 if (s != NULL)
4188 s->flags |= SEC_EXCLUDE;
4189 }
4190 return;
4191 }
252b5132 4192
8029a119 4193 BFD_ASSERT (abfd != NULL);
252b5132 4194
8029a119
NC		 4195 s = bfd_get_section_by_name (abfd, name);
4196 BFD_ASSERT (s != NULL);
252b5132 4197
8029a119 4198 contents = bfd_alloc (abfd, size);
252b5132 4199
8029a119
NC		 4200 BFD_ASSERT (s->size == size);
4201 s->contents = contents;
4202}
906e58ca 4203
8029a119
NC		 4204bfd_boolean
4205bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
4206{
4207 struct elf32_arm_link_hash_table * globals;
906e58ca 4208
8029a119
NC		 4209 globals = elf32_arm_hash_table (info);
4210 BFD_ASSERT (globals != NULL);
906e58ca 4211
8029a119
NC		 4212 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4213 globals->arm_glue_size,
4214 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 4215
8029a119
NC		 4216 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4217 globals->thumb_glue_size,
4218 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 4219
8029a119
NC		 4220 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4221 globals->vfp11_erratum_glue_size,
4222 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 4223
8029a119
NC		 4224 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4225 globals->bx_glue_size,
845b51d6
PB		 4226 ARM_BX_GLUE_SECTION_NAME);
4227
b34976b6 4228 return TRUE;
252b5132
RH		 4229}
4230
a4fd1a8e 4231/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 4232 returns the symbol identifying the stub. */
4233
a4fd1a8e 4234static struct elf_link_hash_entry *
57e8b36a
NC		 4235record_arm_to_thumb_glue (struct bfd_link_info * link_info,
4236 struct elf_link_hash_entry * h)
252b5132
RH		 4237{
4238 const char * name = h->root.root.string;
63b0f745 4239 asection * s;
252b5132
RH		 4240 char * tmp_name;
4241 struct elf_link_hash_entry * myh;
14a793b2 4242 struct bfd_link_hash_entry * bh;
252b5132 4243 struct elf32_arm_link_hash_table * globals;
dc810e39 4244 bfd_vma val;
2f475487 4245 bfd_size_type size;
252b5132
RH		 4246
4247 globals = elf32_arm_hash_table (link_info);
4248
4249 BFD_ASSERT (globals != NULL);
4250 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4251
4252 s = bfd_get_section_by_name
4253 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
4254
252b5132
RH		 4255 BFD_ASSERT (s != NULL);
4256
57e8b36a 4257 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4258
4259 BFD_ASSERT (tmp_name);
4260
4261 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4262
4263 myh = elf_link_hash_lookup
b34976b6 4264 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 4265
4266 if (myh != NULL)
4267 {
9b485d32 4268 /* We've already seen this guy. */
252b5132 4269 free (tmp_name);
a4fd1a8e 4270 return myh;
252b5132
RH		 4271 }
4272
57e8b36a
NC		 4273 /* The only trick here is using hash_table->arm_glue_size as the value.
4274 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 4275 putting it. The +1 on the value marks that the stub has not been
4276 output yet - not that it is a Thumb function. */
14a793b2 4277 bh = NULL;
dc810e39
AM		 4278 val = globals->arm_glue_size + 1;
4279 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
4280 tmp_name, BSF_GLOBAL, s, val,
b34976b6 4281 NULL, TRUE, FALSE, &bh);
252b5132 4282
b7693d02
DJ		 4283 myh = (struct elf_link_hash_entry *) bh;
4284 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4285 myh->forced_local = 1;
4286
252b5132
RH		 4287 free (tmp_name);
4288
27e55c4d
PB		 4289 if (link_info->shared || globals->root.is_relocatable_executable
4290 || globals->pic_veneer)
2f475487 4291 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 4292 else if (globals->use_blx)
4293 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 4294 else
2f475487
AM		 4295 size = ARM2THUMB_STATIC_GLUE_SIZE;
4296
4297 s->size += size;
4298 globals->arm_glue_size += size;
252b5132 4299
a4fd1a8e 4300 return myh;
252b5132
RH		 4301}
4302
845b51d6
PB		 4303/* Allocate space for ARMv4 BX veneers. */
4304
4305static void
4306record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
4307{
4308 asection * s;
4309 struct elf32_arm_link_hash_table *globals;
4310 char *tmp_name;
4311 struct elf_link_hash_entry *myh;
4312 struct bfd_link_hash_entry *bh;
4313 bfd_vma val;
4314
4315 /* BX PC does not need a veneer. */
4316 if (reg == 15)
4317 return;
4318
4319 globals = elf32_arm_hash_table (link_info);
4320
4321 BFD_ASSERT (globals != NULL);
4322 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4323
4324 /* Check if this veneer has already been allocated. */
4325 if (globals->bx_glue_offset[reg])
4326 return;
4327
4328 s = bfd_get_section_by_name
4329 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
4330
4331 BFD_ASSERT (s != NULL);
4332
4333 /* Add symbol for veneer. */
4334 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 4335
845b51d6 4336 BFD_ASSERT (tmp_name);
906e58ca 4337
845b51d6 4338 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 4339
845b51d6
PB		 4340 myh = elf_link_hash_lookup
4341 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 4342
845b51d6 4343 BFD_ASSERT (myh == NULL);
906e58ca 4344
845b51d6
PB		 4345 bh = NULL;
4346 val = globals->bx_glue_size;
4347 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
4348 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
4349 NULL, TRUE, FALSE, &bh);
4350
4351 myh = (struct elf_link_hash_entry *) bh;
4352 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4353 myh->forced_local = 1;
4354
4355 s->size += ARM_BX_VENEER_SIZE;
4356 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
4357 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
4358}
4359
4360
c7b8f16e
JB		 4361/* Add an entry to the code/data map for section SEC. */
4362
4363static void
4364elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
4365{
4366 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
4367 unsigned int newidx;
906e58ca 4368
c7b8f16e
JB		 4369 if (sec_data->map == NULL)
4370 {
4371 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
4372 sec_data->mapcount = 0;
4373 sec_data->mapsize = 1;
4374 }
906e58ca 4375
c7b8f16e 4376 newidx = sec_data->mapcount++;
906e58ca 4377
c7b8f16e
JB		 4378 if (sec_data->mapcount > sec_data->mapsize)
4379 {
4380 sec_data->mapsize *= 2;
515ef31d
NC		 4381 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
4382 * sizeof (elf32_arm_section_map));
4383 }
4384
4385 if (sec_data->map)
4386 {
4387 sec_data->map[newidx].vma = vma;
4388 sec_data->map[newidx].type = type;
c7b8f16e 4389 }
c7b8f16e
JB		 4390}
4391
4392
4393/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
4394 veneers are handled for now. */
4395
4396static bfd_vma
4397record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
4398 elf32_vfp11_erratum_list *branch,
4399 bfd *branch_bfd,
4400 asection *branch_sec,
4401 unsigned int offset)
4402{
4403 asection *s;
4404 struct elf32_arm_link_hash_table *hash_table;
4405 char *tmp_name;
4406 struct elf_link_hash_entry *myh;
4407 struct bfd_link_hash_entry *bh;
4408 bfd_vma val;
4409 struct _arm_elf_section_data *sec_data;
4410 int errcount;
4411 elf32_vfp11_erratum_list *newerr;
906e58ca 4412
c7b8f16e 4413 hash_table = elf32_arm_hash_table (link_info);
906e58ca 4414
c7b8f16e
JB		 4415 BFD_ASSERT (hash_table != NULL);
4416 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 4417
c7b8f16e
JB		 4418 s = bfd_get_section_by_name
4419 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 4420
c7b8f16e 4421 sec_data = elf32_arm_section_data (s);
906e58ca 4422
c7b8f16e 4423 BFD_ASSERT (s != NULL);
906e58ca 4424
c7b8f16e
JB		 4425 tmp_name = bfd_malloc ((bfd_size_type) strlen
4426 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 4427
c7b8f16e 4428 BFD_ASSERT (tmp_name);
906e58ca 4429
c7b8f16e
JB		 4430 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
4431 hash_table->num_vfp11_fixes);
906e58ca 4432
c7b8f16e
JB		 4433 myh = elf_link_hash_lookup
4434 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 4435
c7b8f16e 4436 BFD_ASSERT (myh == NULL);
906e58ca 4437
c7b8f16e
JB		 4438 bh = NULL;
4439 val = hash_table->vfp11_erratum_glue_size;
4440 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
4441 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
4442 NULL, TRUE, FALSE, &bh);
4443
4444 myh = (struct elf_link_hash_entry *) bh;
4445 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4446 myh->forced_local = 1;
4447
4448 /* Link veneer back to calling location. */
4449 errcount = ++(sec_data->erratumcount);
4450 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 4451
c7b8f16e
JB		 4452 newerr->type = VFP11_ERRATUM_ARM_VENEER;
4453 newerr->vma = -1;
4454 newerr->u.v.branch = branch;
4455 newerr->u.v.id = hash_table->num_vfp11_fixes;
4456 branch->u.b.veneer = newerr;
4457
4458 newerr->next = sec_data->erratumlist;
4459 sec_data->erratumlist = newerr;
4460
4461 /* A symbol for the return from the veneer. */
4462 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
4463 hash_table->num_vfp11_fixes);
4464
4465 myh = elf_link_hash_lookup
4466 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 4467
c7b8f16e
JB		 4468 if (myh != NULL)
4469 abort ();
4470
4471 bh = NULL;
4472 val = offset + 4;
4473 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
4474 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 4475
c7b8f16e
JB		 4476 myh = (struct elf_link_hash_entry *) bh;
4477 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4478 myh->forced_local = 1;
4479
4480 free (tmp_name);
906e58ca 4481
c7b8f16e
JB		 4482 /* Generate a mapping symbol for the veneer section, and explicitly add an
4483 entry for that symbol to the code/data map for the section. */
4484 if (hash_table->vfp11_erratum_glue_size == 0)
4485 {
4486 bh = NULL;
4487 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
4488 ever requires this erratum fix. */
4489 _bfd_generic_link_add_one_symbol (link_info,
4490 hash_table->bfd_of_glue_owner, "$a",
4491 BSF_LOCAL, s, 0, NULL,
4492 TRUE, FALSE, &bh);
4493
4494 myh = (struct elf_link_hash_entry *) bh;
4495 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
4496 myh->forced_local = 1;
906e58ca 4497
c7b8f16e
JB		 4498 /* The elf32_arm_init_maps function only cares about symbols from input
4499 BFDs. We must make a note of this generated mapping symbol
4500 ourselves so that code byteswapping works properly in
4501 elf32_arm_write_section. */
4502 elf32_arm_section_map_add (s, 'a', 0);
4503 }
906e58ca 4504
c7b8f16e
JB		 4505 s->size += VFP11_ERRATUM_VENEER_SIZE;
4506 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
4507 hash_table->num_vfp11_fixes++;
906e58ca 4508
c7b8f16e
JB		 4509 /* The offset of the veneer. */
4510 return val;
4511}
4512
8029a119 4513#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 4514 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
4515 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 4516
4517/* Create a fake section for use by the ARM backend of the linker. */
4518
4519static bfd_boolean
4520arm_make_glue_section (bfd * abfd, const char * name)
4521{
4522 asection * sec;
4523
4524 sec = bfd_get_section_by_name (abfd, name);
4525 if (sec != NULL)
4526 /* Already made. */
4527 return TRUE;
4528
4529 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
4530
4531 if (sec == NULL
4532 || !bfd_set_section_alignment (abfd, sec, 2))
4533 return FALSE;
4534
4535 /* Set the gc mark to prevent the section from being removed by garbage
4536 collection, despite the fact that no relocs refer to this section. */
4537 sec->gc_mark = 1;
4538
4539 return TRUE;
4540}
4541
8afb0e02
NC		 4542/* Add the glue sections to ABFD. This function is called from the
4543 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 4544
b34976b6 4545bfd_boolean
57e8b36a
NC		 4546bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
4547 struct bfd_link_info *info)
252b5132 4548{
8afb0e02
NC		 4549 /* If we are only performing a partial
4550 link do not bother adding the glue. */
1049f94e 4551 if (info->relocatable)
b34976b6 4552 return TRUE;
252b5132 4553
8029a119
NC		 4554 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
4555 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
4556 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
4557 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 4558}
4559
4560/* Select a BFD to be used to hold the sections used by the glue code.
4561 This function is called from the linker scripts in ld/emultempl/
8029a119 4562 {armelf/pe}.em. */
8afb0e02 4563
b34976b6 4564bfd_boolean
57e8b36a 4565bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 4566{
4567 struct elf32_arm_link_hash_table *globals;
4568
4569 /* If we are only performing a partial link
4570 do not bother getting a bfd to hold the glue. */
1049f94e 4571 if (info->relocatable)
b34976b6 4572 return TRUE;
8afb0e02 4573
b7693d02
DJ		 4574 /* Make sure we don't attach the glue sections to a dynamic object. */
4575 BFD_ASSERT (!(abfd->flags & DYNAMIC));
4576
8afb0e02
NC		 4577 globals = elf32_arm_hash_table (info);
4578
4579 BFD_ASSERT (globals != NULL);
4580
4581 if (globals->bfd_of_glue_owner != NULL)
b34976b6 4582 return TRUE;
8afb0e02 4583
252b5132
RH		 4584 /* Save the bfd for later use. */
4585 globals->bfd_of_glue_owner = abfd;
cedb70c5 4586
b34976b6 4587 return TRUE;
252b5132
RH		 4588}
4589
906e58ca
NC		 4590static void
4591check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 4592{
104d59d1
JM		 4593 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4594 Tag_CPU_arch) > 2)
39b41c9c
PB		 4595 globals->use_blx = 1;
4596}
4597
b34976b6 4598bfd_boolean
57e8b36a 4599bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 4600 struct bfd_link_info *link_info)
252b5132
RH		 4601{
4602 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 4603 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 4604 Elf_Internal_Rela *irel, *irelend;
4605 bfd_byte *contents = NULL;
252b5132
RH		 4606
4607 asection *sec;
4608 struct elf32_arm_link_hash_table *globals;
4609
4610 /* If we are only performing a partial link do not bother
4611 to construct any glue. */
1049f94e 4612 if (link_info->relocatable)
b34976b6 4613 return TRUE;
252b5132 4614
39ce1a6a
NC		 4615 /* Here we have a bfd that is to be included on the link. We have a
4616 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 4617 globals = elf32_arm_hash_table (link_info);
4618
4619 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 4620
4621 check_use_blx (globals);
252b5132 4622
d504ffc8 4623 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 4624 {
d003868e
AM		 4625 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
4626 abfd);
e489d0ae
PB		 4627 return FALSE;
4628 }
f21f3fe0 4629
39ce1a6a
NC		 4630 /* PR 5398: If we have not decided to include any loadable sections in
4631 the output then we will not have a glue owner bfd. This is OK, it
4632 just means that there is nothing else for us to do here. */
4633 if (globals->bfd_of_glue_owner == NULL)
4634 return TRUE;
4635
252b5132
RH		 4636 /* Rummage around all the relocs and map the glue vectors. */
4637 sec = abfd->sections;
4638
4639 if (sec == NULL)
b34976b6 4640 return TRUE;
252b5132
RH		 4641
4642 for (; sec != NULL; sec = sec->next)
4643 {
4644 if (sec->reloc_count == 0)
4645 continue;
4646
2f475487
AM		 4647 if ((sec->flags & SEC_EXCLUDE) != 0)
4648 continue;
4649
0ffa91dd 4650 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 4651
9b485d32 4652 /* Load the relocs. */
6cdc0ccc 4653 internal_relocs
906e58ca 4654 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 4655
6cdc0ccc
AM		 4656 if (internal_relocs == NULL)
4657 goto error_return;
252b5132 4658
6cdc0ccc
AM		 4659 irelend = internal_relocs + sec->reloc_count;
4660 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 4661 {
4662 long r_type;
4663 unsigned long r_index;
252b5132
RH		 4664
4665 struct elf_link_hash_entry *h;
4666
4667 r_type = ELF32_R_TYPE (irel->r_info);
4668 r_index = ELF32_R_SYM (irel->r_info);
4669
9b485d32 4670 /* These are the only relocation types we care about. */
ba96a88f 4671 if ( r_type != R_ARM_PC24
845b51d6 4672 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 4673 continue;
4674
4675 /* Get the section contents if we haven't done so already. */
4676 if (contents == NULL)
4677 {
4678 /* Get cached copy if it exists. */
4679 if (elf_section_data (sec)->this_hdr.contents != NULL)
4680 contents = elf_section_data (sec)->this_hdr.contents;
4681 else
4682 {
4683 /* Go get them off disk. */
57e8b36a 4684 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 4685 goto error_return;
4686 }
4687 }
4688
845b51d6
PB		 4689 if (r_type == R_ARM_V4BX)
4690 {
4691 int reg;
4692
4693 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
4694 record_arm_bx_glue (link_info, reg);
4695 continue;
4696 }
4697
a7c10850 4698 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 4699 h = NULL;
4700
9b485d32 4701 /* We don't care about local symbols. */
252b5132
RH		 4702 if (r_index < symtab_hdr->sh_info)
4703 continue;
4704
9b485d32 4705 /* This is an external symbol. */
252b5132
RH		 4706 r_index -= symtab_hdr->sh_info;
4707 h = (struct elf_link_hash_entry *)
4708 elf_sym_hashes (abfd)[r_index];
4709
4710 /* If the relocation is against a static symbol it must be within
4711 the current section and so cannot be a cross ARM/Thumb relocation. */
4712 if (h == NULL)
4713 continue;
4714
d504ffc8
DJ		 4715 /* If the call will go through a PLT entry then we do not need
4716 glue. */
4717 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 4718 continue;
4719
252b5132
RH		 4720 switch (r_type)
4721 {
4722 case R_ARM_PC24:
4723 /* This one is a call from arm code. We need to look up
2f0ca46a 4724 the target of the call. If it is a thumb target, we
252b5132 4725 insert glue. */
ebe24dd4 4726 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 4727 record_arm_to_thumb_glue (link_info, h);
4728 break;
4729
252b5132 4730 default:
c6596c5e 4731 abort ();
252b5132
RH		 4732 }
4733 }
6cdc0ccc
AM		 4734
4735 if (contents != NULL
4736 && elf_section_data (sec)->this_hdr.contents != contents)
4737 free (contents);
4738 contents = NULL;
4739
4740 if (internal_relocs != NULL
4741 && elf_section_data (sec)->relocs != internal_relocs)
4742 free (internal_relocs);
4743 internal_relocs = NULL;
252b5132
RH		 4744 }
4745
b34976b6 4746 return TRUE;
9a5aca8c 4747
252b5132 4748error_return:
6cdc0ccc
AM		 4749 if (contents != NULL
4750 && elf_section_data (sec)->this_hdr.contents != contents)
4751 free (contents);
4752 if (internal_relocs != NULL
4753 && elf_section_data (sec)->relocs != internal_relocs)
4754 free (internal_relocs);
9a5aca8c 4755
b34976b6 4756 return FALSE;
252b5132 4757}
7e392df6 4758#endif
252b5132 4759
eb043451 4760
c7b8f16e
JB		 4761/* Initialise maps of ARM/Thumb/data for input BFDs. */
4762
4763void
4764bfd_elf32_arm_init_maps (bfd *abfd)
4765{
4766 Elf_Internal_Sym *isymbuf;
4767 Elf_Internal_Shdr *hdr;
4768 unsigned int i, localsyms;
4769
af1f4419
NC		 4770 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
4771 if (! is_arm_elf (abfd))
4772 return;
4773
c7b8f16e
JB		 4774 if ((abfd->flags & DYNAMIC) != 0)
4775 return;
4776
0ffa91dd 4777 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 4778 localsyms = hdr->sh_info;
4779
4780 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
4781 should contain the number of local symbols, which should come before any
4782 global symbols. Mapping symbols are always local. */
4783 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
4784 NULL);
4785
4786 /* No internal symbols read? Skip this BFD. */
4787 if (isymbuf == NULL)
4788 return;
4789
4790 for (i = 0; i < localsyms; i++)
4791 {
4792 Elf_Internal_Sym *isym = &isymbuf[i];
4793 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
4794 const char *name;
906e58ca 4795
c7b8f16e
JB		 4796 if (sec != NULL
4797 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
4798 {
4799 name = bfd_elf_string_from_elf_section (abfd,
4800 hdr->sh_link, isym->st_name);
906e58ca 4801
c7b8f16e
JB		 4802 if (bfd_is_arm_special_symbol_name (name,
4803 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
4804 elf32_arm_section_map_add (sec, name[1], isym->st_value);
4805 }
4806 }
4807}
4808
4809
4810void
4811bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
4812{
4813 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 4814 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 4815
c7b8f16e
JB		 4816 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
4817 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
4818 {
4819 switch (globals->vfp11_fix)
4820 {
4821 case BFD_ARM_VFP11_FIX_DEFAULT:
4822 case BFD_ARM_VFP11_FIX_NONE:
4823 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4824 break;
906e58ca 4825
c7b8f16e
JB		 4826 default:
4827 /* Give a warning, but do as the user requests anyway. */
4828 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
4829 "workaround is not necessary for target architecture"), obfd);
4830 }
4831 }
4832 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
4833 /* For earlier architectures, we might need the workaround, but do not
4834 enable it by default. If users is running with broken hardware, they
4835 must enable the erratum fix explicitly. */
4836 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4837}
4838
4839
906e58ca
NC		 4840enum bfd_arm_vfp11_pipe
4841{
c7b8f16e
JB		 4842 VFP11_FMAC,
4843 VFP11_LS,
4844 VFP11_DS,
4845 VFP11_BAD
4846};
4847
4848/* Return a VFP register number. This is encoded as RX:X for single-precision
4849 registers, or X:RX for double-precision registers, where RX is the group of
4850 four bits in the instruction encoding and X is the single extension bit.
4851 RX and X fields are specified using their lowest (starting) bit. The return
4852 value is:
4853
4854 0...31: single-precision registers s0...s31
4855 32...63: double-precision registers d0...d31.
906e58ca 4856
c7b8f16e
JB		 4857 Although X should be zero for VFP11 (encoding d0...d15 only), we might
4858 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 4859
c7b8f16e
JB		 4860static unsigned int
4861bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
4862 unsigned int x)
4863{
4864 if (is_double)
4865 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
4866 else
4867 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
4868}
4869
4870/* Set bits in *WMASK according to a register number REG as encoded by
4871 bfd_arm_vfp11_regno(). Ignore d16-d31. */
4872
4873static void
4874bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
4875{
4876 if (reg < 32)
4877 *wmask |= 1 << reg;
4878 else if (reg < 48)
4879 *wmask |= 3 << ((reg - 32) * 2);
4880}
4881
4882/* Return TRUE if WMASK overwrites anything in REGS. */
4883
4884static bfd_boolean
4885bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
4886{
4887 int i;
906e58ca 4888
c7b8f16e
JB		 4889 for (i = 0; i < numregs; i++)
4890 {
4891 unsigned int reg = regs[i];
4892
4893 if (reg < 32 && (wmask & (1 << reg)) != 0)
4894 return TRUE;
906e58ca 4895
c7b8f16e
JB		 4896 reg -= 32;
4897
4898 if (reg >= 16)
4899 continue;
906e58ca 4900
c7b8f16e
JB		 4901 if ((wmask & (3 << (reg * 2))) != 0)
4902 return TRUE;
4903 }
906e58ca 4904
c7b8f16e
JB		 4905 return FALSE;
4906}
4907
4908/* In this function, we're interested in two things: finding input registers
4909 for VFP data-processing instructions, and finding the set of registers which
4910 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
4911 hold the written set, so FLDM etc. are easy to deal with (we're only
4912 interested in 32 SP registers or 16 dp registers, due to the VFP version
4913 implemented by the chip in question). DP registers are marked by setting
4914 both SP registers in the write mask). */
4915
4916static enum bfd_arm_vfp11_pipe
4917bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
4918 int *numregs)
4919{
4920 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
4921 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
4922
4923 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
4924 {
4925 unsigned int pqrs;
4926 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
4927 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
4928
4929 pqrs = ((insn & 0x00800000) >> 20)
4930 | ((insn & 0x00300000) >> 19)
4931 | ((insn & 0x00000040) >> 6);
4932
4933 switch (pqrs)
4934 {
4935 case 0: /* fmac[sd]. */
4936 case 1: /* fnmac[sd]. */
4937 case 2: /* fmsc[sd]. */
4938 case 3: /* fnmsc[sd]. */
4939 pipe = VFP11_FMAC;
4940 bfd_arm_vfp11_write_mask (destmask, fd);
4941 regs[0] = fd;
4942 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
4943 regs[2] = fm;
4944 *numregs = 3;
4945 break;
4946
4947 case 4: /* fmul[sd]. */
4948 case 5: /* fnmul[sd]. */
4949 case 6: /* fadd[sd]. */
4950 case 7: /* fsub[sd]. */
4951 pipe = VFP11_FMAC;
4952 goto vfp_binop;
4953
4954 case 8: /* fdiv[sd]. */
4955 pipe = VFP11_DS;
4956 vfp_binop:
4957 bfd_arm_vfp11_write_mask (destmask, fd);
4958 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
4959 regs[1] = fm;
4960 *numregs = 2;
4961 break;
4962
4963 case 15: /* extended opcode. */
4964 {
4965 unsigned int extn = ((insn >> 15) & 0x1e)
4966 | ((insn >> 7) & 1);
4967
4968 switch (extn)
4969 {
4970 case 0: /* fcpy[sd]. */
4971 case 1: /* fabs[sd]. */
4972 case 2: /* fneg[sd]. */
4973 case 8: /* fcmp[sd]. */
4974 case 9: /* fcmpe[sd]. */
4975 case 10: /* fcmpz[sd]. */
4976 case 11: /* fcmpez[sd]. */
4977 case 16: /* fuito[sd]. */
4978 case 17: /* fsito[sd]. */
4979 case 24: /* ftoui[sd]. */
4980 case 25: /* ftouiz[sd]. */
4981 case 26: /* ftosi[sd]. */
4982 case 27: /* ftosiz[sd]. */
4983 /* These instructions will not bounce due to underflow. */
4984 *numregs = 0;
4985 pipe = VFP11_FMAC;
4986 break;
4987
4988 case 3: /* fsqrt[sd]. */
4989 /* fsqrt cannot underflow, but it can (perhaps) overwrite
4990 registers to cause the erratum in previous instructions. */
4991 bfd_arm_vfp11_write_mask (destmask, fd);
4992 pipe = VFP11_DS;
4993 break;
4994
4995 case 15: /* fcvt{ds,sd}. */
4996 {
4997 int rnum = 0;
4998
4999 bfd_arm_vfp11_write_mask (destmask, fd);
5000
5001 /* Only FCVTSD can underflow. */
5002 if ((insn & 0x100) != 0)
5003 regs[rnum++] = fm;
5004
5005 *numregs = rnum;
5006
5007 pipe = VFP11_FMAC;
5008 }
5009 break;
5010
5011 default:
5012 return VFP11_BAD;
5013 }
5014 }
5015 break;
5016
5017 default:
5018 return VFP11_BAD;
5019 }
5020 }
5021 /* Two-register transfer. */
5022 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5023 {
5024 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5025
c7b8f16e
JB		 5026 if ((insn & 0x100000) == 0)
5027 {
5028 if (is_double)
5029 bfd_arm_vfp11_write_mask (destmask, fm);
5030 else
5031 {
5032 bfd_arm_vfp11_write_mask (destmask, fm);
5033 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5034 }
5035 }
5036
5037 pipe = VFP11_LS;
5038 }
5039 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5040 {
5041 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5042 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5043
c7b8f16e
JB		 5044 switch (puw)
5045 {
5046 case 0: /* Two-reg transfer. We should catch these above. */
5047 abort ();
906e58ca 5048
c7b8f16e
JB		 5049 case 2: /* fldm[sdx]. */
5050 case 3:
5051 case 5:
5052 {
5053 unsigned int i, offset = insn & 0xff;
5054
5055 if (is_double)
5056 offset >>= 1;
5057
5058 for (i = fd; i < fd + offset; i++)
5059 bfd_arm_vfp11_write_mask (destmask, i);
5060 }
5061 break;
906e58ca 5062
c7b8f16e
JB		 5063 case 4: /* fld[sd]. */
5064 case 6:
5065 bfd_arm_vfp11_write_mask (destmask, fd);
5066 break;
906e58ca 5067
c7b8f16e
JB		 5068 default:
5069 return VFP11_BAD;
5070 }
5071
5072 pipe = VFP11_LS;
5073 }
5074 /* Single-register transfer. Note L==0. */
5075 else if ((insn & 0x0f100e10) == 0x0e000a10)
5076 {
5077 unsigned int opcode = (insn >> 21) & 7;
5078 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5079
5080 switch (opcode)
5081 {
5082 case 0: /* fmsr/fmdlr. */
5083 case 1: /* fmdhr. */
5084 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5085 destination register. I don't know if this is exactly right,
5086 but it is the conservative choice. */
5087 bfd_arm_vfp11_write_mask (destmask, fn);
5088 break;
5089
5090 case 7: /* fmxr. */
5091 break;
5092 }
5093
5094 pipe = VFP11_LS;
5095 }
5096
5097 return pipe;
5098}
5099
5100
5101static int elf32_arm_compare_mapping (const void * a, const void * b);
5102
5103
5104/* Look for potentially-troublesome code sequences which might trigger the
5105 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5106 (available from ARM) for details of the erratum. A short version is
5107 described in ld.texinfo. */
5108
5109bfd_boolean
5110bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5111{
5112 asection *sec;
5113 bfd_byte *contents = NULL;
5114 int state = 0;
5115 int regs[3], numregs = 0;
5116 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5117 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5118
c7b8f16e
JB		 5119 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5120 The states transition as follows:
906e58ca 5121
c7b8f16e
JB		 5122 0 -> 1 (vector) or 0 -> 2 (scalar)
5123 A VFP FMAC-pipeline instruction has been seen. Fill
5124 regs[0]..regs[numregs-1] with its input operands. Remember this
5125 instruction in 'first_fmac'.
5126
5127 1 -> 2
5128 Any instruction, except for a VFP instruction which overwrites
5129 regs[*].
906e58ca 5130
c7b8f16e
JB		 5131 1 -> 3 [ -> 0 ] or
5132 2 -> 3 [ -> 0 ]
5133 A VFP instruction has been seen which overwrites any of regs[*].
5134 We must make a veneer! Reset state to 0 before examining next
5135 instruction.
906e58ca 5136
c7b8f16e
JB		 5137 2 -> 0
5138 If we fail to match anything in state 2, reset to state 0 and reset
5139 the instruction pointer to the instruction after 'first_fmac'.
5140
5141 If the VFP11 vector mode is in use, there must be at least two unrelated
5142 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5143 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5144
5145 /* If we are only performing a partial link do not bother
5146 to construct any glue. */
5147 if (link_info->relocatable)
5148 return TRUE;
5149
0ffa91dd
NC		 5150 /* Skip if this bfd does not correspond to an ELF image. */
5151 if (! is_arm_elf (abfd))
5152 return TRUE;
906e58ca 5153
c7b8f16e
JB		 5154 /* We should have chosen a fix type by the time we get here. */
5155 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
5156
5157 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
5158 return TRUE;
2e6030b9 5159
33a7ffc2
JM		 5160 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5161 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
5162 return TRUE;
5163
c7b8f16e
JB		 5164 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5165 {
5166 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
5167 struct _arm_elf_section_data *sec_data;
5168
5169 /* If we don't have executable progbits, we're not interested in this
5170 section. Also skip if section is to be excluded. */
5171 if (elf_section_type (sec) != SHT_PROGBITS
5172 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
5173 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 5174 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
5175 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 5176 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
5177 continue;
5178
5179 sec_data = elf32_arm_section_data (sec);
906e58ca 5180
c7b8f16e
JB		 5181 if (sec_data->mapcount == 0)
5182 continue;
906e58ca 5183
c7b8f16e
JB		 5184 if (elf_section_data (sec)->this_hdr.contents != NULL)
5185 contents = elf_section_data (sec)->this_hdr.contents;
5186 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5187 goto error_return;
5188
5189 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
5190 elf32_arm_compare_mapping);
5191
5192 for (span = 0; span < sec_data->mapcount; span++)
5193 {
5194 unsigned int span_start = sec_data->map[span].vma;
5195 unsigned int span_end = (span == sec_data->mapcount - 1)
5196 ? sec->size : sec_data->map[span + 1].vma;
5197 char span_type = sec_data->map[span].type;
906e58ca 5198
c7b8f16e
JB		 5199 /* FIXME: Only ARM mode is supported at present. We may need to
5200 support Thumb-2 mode also at some point. */
5201 if (span_type != 'a')
5202 continue;
5203
5204 for (i = span_start; i < span_end;)
5205 {
5206 unsigned int next_i = i + 4;
5207 unsigned int insn = bfd_big_endian (abfd)
5208 ? (contents[i] << 24)
5209 | (contents[i + 1] << 16)
5210 | (contents[i + 2] << 8)
5211 | contents[i + 3]
5212 : (contents[i + 3] << 24)
5213 | (contents[i + 2] << 16)
5214 | (contents[i + 1] << 8)
5215 | contents[i];
5216 unsigned int writemask = 0;
5217 enum bfd_arm_vfp11_pipe pipe;
5218
5219 switch (state)
5220 {
5221 case 0:
5222 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
5223 &numregs);
5224 /* I'm assuming the VFP11 erratum can trigger with denorm
5225 operands on either the FMAC or the DS pipeline. This might
5226 lead to slightly overenthusiastic veneer insertion. */
5227 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
5228 {
5229 state = use_vector ? 1 : 2;
5230 first_fmac = i;
5231 veneer_of_insn = insn;
5232 }
5233 break;
5234
5235 case 1:
5236 {
5237 int other_regs[3], other_numregs;
5238 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5239 other_regs,
5240 &other_numregs);
5241 if (pipe != VFP11_BAD
5242 && bfd_arm_vfp11_antidependency (writemask, regs,
5243 numregs))
5244 state = 3;
5245 else
5246 state = 2;
5247 }
5248 break;
5249
5250 case 2:
5251 {
5252 int other_regs[3], other_numregs;
5253 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5254 other_regs,
5255 &other_numregs);
5256 if (pipe != VFP11_BAD
5257 && bfd_arm_vfp11_antidependency (writemask, regs,
5258 numregs))
5259 state = 3;
5260 else
5261 {
5262 state = 0;
5263 next_i = first_fmac + 4;
5264 }
5265 }
5266 break;
5267
5268 case 3:
5269 abort (); /* Should be unreachable. */
5270 }
5271
5272 if (state == 3)
5273 {
5274 elf32_vfp11_erratum_list *newerr
5275 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5276 int errcount;
5277
5278 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
5279
5280 newerr->u.b.vfp_insn = veneer_of_insn;
5281
5282 switch (span_type)
5283 {
5284 case 'a':
5285 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
5286 break;
906e58ca 5287
c7b8f16e
JB		 5288 default:
5289 abort ();
5290 }
5291
5292 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
5293 first_fmac);
5294
5295 newerr->vma = -1;
5296
5297 newerr->next = sec_data->erratumlist;
5298 sec_data->erratumlist = newerr;
5299
5300 state = 0;
5301 }
5302
5303 i = next_i;
5304 }
5305 }
906e58ca 5306
c7b8f16e
JB		 5307 if (contents != NULL
5308 && elf_section_data (sec)->this_hdr.contents != contents)
5309 free (contents);
5310 contents = NULL;
5311 }
5312
5313 return TRUE;
5314
5315error_return:
5316 if (contents != NULL
5317 && elf_section_data (sec)->this_hdr.contents != contents)
5318 free (contents);
906e58ca 5319
c7b8f16e
JB		 5320 return FALSE;
5321}
5322
5323/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
5324 after sections have been laid out, using specially-named symbols. */
5325
5326void
5327bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
5328 struct bfd_link_info *link_info)
5329{
5330 asection *sec;
5331 struct elf32_arm_link_hash_table *globals;
5332 char *tmp_name;
906e58ca 5333
c7b8f16e
JB		 5334 if (link_info->relocatable)
5335 return;
2e6030b9
MS		 5336
5337 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 5338 if (! is_arm_elf (abfd))
2e6030b9
MS		 5339 return;
5340
c7b8f16e 5341 globals = elf32_arm_hash_table (link_info);
906e58ca 5342
c7b8f16e
JB		 5343 tmp_name = bfd_malloc ((bfd_size_type) strlen
5344 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5345
5346 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5347 {
5348 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5349 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 5350
c7b8f16e
JB		 5351 for (; errnode != NULL; errnode = errnode->next)
5352 {
5353 struct elf_link_hash_entry *myh;
5354 bfd_vma vma;
5355
5356 switch (errnode->type)
5357 {
5358 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
5359 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
5360 /* Find veneer symbol. */
5361 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5362 errnode->u.b.veneer->u.v.id);
5363
5364 myh = elf_link_hash_lookup
5365 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5366
5367 if (myh == NULL)
5368 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
5369 "`%s'"), abfd, tmp_name);
5370
5371 vma = myh->root.u.def.section->output_section->vma
5372 + myh->root.u.def.section->output_offset
5373 + myh->root.u.def.value;
5374
5375 errnode->u.b.veneer->vma = vma;
5376 break;
5377
5378 case VFP11_ERRATUM_ARM_VENEER:
5379 case VFP11_ERRATUM_THUMB_VENEER:
5380 /* Find return location. */
5381 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5382 errnode->u.v.id);
5383
5384 myh = elf_link_hash_lookup
5385 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5386
5387 if (myh == NULL)
5388 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
5389 "`%s'"), abfd, tmp_name);
5390
5391 vma = myh->root.u.def.section->output_section->vma
5392 + myh->root.u.def.section->output_offset
5393 + myh->root.u.def.value;
5394
5395 errnode->u.v.branch->vma = vma;
5396 break;
906e58ca 5397
c7b8f16e
JB		 5398 default:
5399 abort ();
5400 }
5401 }
5402 }
906e58ca 5403
c7b8f16e
JB		 5404 free (tmp_name);
5405}
5406
5407
eb043451
PB		 5408/* Set target relocation values needed during linking. */
5409
5410void
bf21ed78
MS		 5411bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
5412 struct bfd_link_info *link_info,
eb043451 5413 int target1_is_rel,
319850b4 5414 char * target2_type,
33bfe774 5415 int fix_v4bx,
c7b8f16e 5416 int use_blx,
bf21ed78 5417 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481
JM		 5418 int no_enum_warn, int no_wchar_warn,
5419 int pic_veneer)
eb043451
PB		 5420{
5421 struct elf32_arm_link_hash_table *globals;
5422
5423 globals = elf32_arm_hash_table (link_info);
5424
5425 globals->target1_is_rel = target1_is_rel;
5426 if (strcmp (target2_type, "rel") == 0)
5427 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 5428 else if (strcmp (target2_type, "abs") == 0)
5429 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 5430 else if (strcmp (target2_type, "got-rel") == 0)
5431 globals->target2_reloc = R_ARM_GOT_PREL;
5432 else
5433 {
5434 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
5435 target2_type);
5436 }
319850b4 5437 globals->fix_v4bx = fix_v4bx;
33bfe774 5438 globals->use_blx |= use_blx;
c7b8f16e 5439 globals->vfp11_fix = vfp11_fix;
27e55c4d 5440 globals->pic_veneer = pic_veneer;
bf21ed78 5441
0ffa91dd
NC		 5442 BFD_ASSERT (is_arm_elf (output_bfd));
5443 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 5444 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 5445}
eb043451 5446
12a0a0fd 5447/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 5448
12a0a0fd
PB		 5449static void
5450insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
5451{
5452 bfd_vma upper;
5453 bfd_vma lower;
5454 int reloc_sign;
5455
5456 BFD_ASSERT ((offset & 1) == 0);
5457
5458 upper = bfd_get_16 (abfd, insn);
5459 lower = bfd_get_16 (abfd, insn + 2);
5460 reloc_sign = (offset < 0) ? 1 : 0;
5461 upper = (upper & ~(bfd_vma) 0x7ff)
5462 | ((offset >> 12) & 0x3ff)
5463 | (reloc_sign << 10);
906e58ca 5464 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 5465 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
5466 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
5467 | ((offset >> 1) & 0x7ff);
5468 bfd_put_16 (abfd, upper, insn);
5469 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 5470}
5471
9b485d32
NC		 5472/* Thumb code calling an ARM function. */
5473
252b5132 5474static int
57e8b36a
NC		 5475elf32_thumb_to_arm_stub (struct bfd_link_info * info,
5476 const char * name,
5477 bfd * input_bfd,
5478 bfd * output_bfd,
5479 asection * input_section,
5480 bfd_byte * hit_data,
5481 asection * sym_sec,
5482 bfd_vma offset,
5483 bfd_signed_vma addend,
f2a9dd69
DJ		 5484 bfd_vma val,
5485 char **error_message)
252b5132 5486{
bcbdc74c 5487 asection * s = 0;
dc810e39 5488 bfd_vma my_offset;
252b5132 5489 long int ret_offset;
bcbdc74c
NC		 5490 struct elf_link_hash_entry * myh;
5491 struct elf32_arm_link_hash_table * globals;
252b5132 5492
f2a9dd69 5493 myh = find_thumb_glue (info, name, error_message);
252b5132 5494 if (myh == NULL)
b34976b6 5495 return FALSE;
252b5132
RH		 5496
5497 globals = elf32_arm_hash_table (info);
5498
5499 BFD_ASSERT (globals != NULL);
5500 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5501
5502 my_offset = myh->root.u.def.value;
5503
5504 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
5505 THUMB2ARM_GLUE_SECTION_NAME);
5506
5507 BFD_ASSERT (s != NULL);
5508 BFD_ASSERT (s->contents != NULL);
5509 BFD_ASSERT (s->output_section != NULL);
5510
5511 if ((my_offset & 0x01) == 0x01)
5512 {
5513 if (sym_sec != NULL
5514 && sym_sec->owner != NULL
5515 && !INTERWORK_FLAG (sym_sec->owner))
5516 {
8f615d07 5517 (*_bfd_error_handler)
d003868e
AM		 5518 (_("%B(%s): warning: interworking not enabled.\n"
5519 " first occurrence: %B: thumb call to arm"),
5520 sym_sec->owner, input_bfd, name);
252b5132 5521
b34976b6 5522 return FALSE;
252b5132
RH		 5523 }
5524
5525 --my_offset;
5526 myh->root.u.def.value = my_offset;
5527
52ab56c2
PB		 5528 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
5529 s->contents + my_offset);
252b5132 5530
52ab56c2
PB		 5531 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
5532 s->contents + my_offset + 2);
252b5132
RH		 5533
5534 ret_offset =
9b485d32
NC		 5535 /* Address of destination of the stub. */
5536 ((bfd_signed_vma) val)
252b5132 5537 - ((bfd_signed_vma)
57e8b36a
NC		 5538 /* Offset from the start of the current section
5539 to the start of the stubs. */
9b485d32
NC		 5540 (s->output_offset
5541 /* Offset of the start of this stub from the start of the stubs. */
5542 + my_offset
5543 /* Address of the start of the current section. */
5544 + s->output_section->vma)
5545 /* The branch instruction is 4 bytes into the stub. */
5546 + 4
5547 /* ARM branches work from the pc of the instruction + 8. */
5548 + 8);
252b5132 5549
52ab56c2
PB		 5550 put_arm_insn (globals, output_bfd,
5551 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
5552 s->contents + my_offset + 4);
252b5132
RH		 5553 }
5554
5555 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
5556
427bfd90
NC		 5557 /* Now go back and fix up the original BL insn to point to here. */
5558 ret_offset =
5559 /* Address of where the stub is located. */
5560 (s->output_section->vma + s->output_offset + my_offset)
5561 /* Address of where the BL is located. */
57e8b36a
NC		 5562 - (input_section->output_section->vma + input_section->output_offset
5563 + offset)
427bfd90
NC		 5564 /* Addend in the relocation. */
5565 - addend
5566 /* Biassing for PC-relative addressing. */
5567 - 8;
252b5132 5568
12a0a0fd 5569 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 5570
b34976b6 5571 return TRUE;
252b5132
RH		 5572}
5573
a4fd1a8e 5574/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 5575
a4fd1a8e
PB		 5576static struct elf_link_hash_entry *
5577elf32_arm_create_thumb_stub (struct bfd_link_info * info,
5578 const char * name,
5579 bfd * input_bfd,
5580 bfd * output_bfd,
5581 asection * sym_sec,
5582 bfd_vma val,
8029a119
NC		 5583 asection * s,
5584 char ** error_message)
252b5132 5585{
dc810e39 5586 bfd_vma my_offset;
252b5132 5587 long int ret_offset;
bcbdc74c
NC		 5588 struct elf_link_hash_entry * myh;
5589 struct elf32_arm_link_hash_table * globals;
252b5132 5590
f2a9dd69 5591 myh = find_arm_glue (info, name, error_message);
252b5132 5592 if (myh == NULL)
a4fd1a8e 5593 return NULL;
252b5132
RH		 5594
5595 globals = elf32_arm_hash_table (info);
5596
5597 BFD_ASSERT (globals != NULL);
5598 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5599
5600 my_offset = myh->root.u.def.value;
252b5132
RH		 5601
5602 if ((my_offset & 0x01) == 0x01)
5603 {
5604 if (sym_sec != NULL
5605 && sym_sec->owner != NULL
5606 && !INTERWORK_FLAG (sym_sec->owner))
5607 {
8f615d07 5608 (*_bfd_error_handler)
d003868e
AM		 5609 (_("%B(%s): warning: interworking not enabled.\n"
5610 " first occurrence: %B: arm call to thumb"),
5611 sym_sec->owner, input_bfd, name);
252b5132 5612 }
9b485d32 5613
252b5132
RH		 5614 --my_offset;
5615 myh->root.u.def.value = my_offset;
5616
27e55c4d
PB		 5617 if (info->shared || globals->root.is_relocatable_executable
5618 || globals->pic_veneer)
8f6277f5
PB		 5619 {
5620 /* For relocatable objects we can't use absolute addresses,
5621 so construct the address from a relative offset. */
5622 /* TODO: If the offset is small it's probably worth
5623 constructing the address with adds. */
52ab56c2
PB		 5624 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
5625 s->contents + my_offset);
5626 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
5627 s->contents + my_offset + 4);
5628 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
5629 s->contents + my_offset + 8);
8f6277f5
PB		 5630 /* Adjust the offset by 4 for the position of the add,
5631 and 8 for the pipeline offset. */
5632 ret_offset = (val - (s->output_offset
5633 + s->output_section->vma
5634 + my_offset + 12))
5635 | 1;
5636 bfd_put_32 (output_bfd, ret_offset,
5637 s->contents + my_offset + 12);
5638 }
26079076
PB		 5639 else if (globals->use_blx)
5640 {
5641 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
5642 s->contents + my_offset);
5643
5644 /* It's a thumb address. Add the low order bit. */
5645 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
5646 s->contents + my_offset + 4);
5647 }
8f6277f5
PB		 5648 else
5649 {
52ab56c2
PB		 5650 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
5651 s->contents + my_offset);
252b5132 5652
52ab56c2
PB		 5653 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
5654 s->contents + my_offset + 4);
252b5132 5655
8f6277f5
PB		 5656 /* It's a thumb address. Add the low order bit. */
5657 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
5658 s->contents + my_offset + 8);
8029a119
NC		 5659
5660 my_offset += 12;
8f6277f5 5661 }
252b5132
RH		 5662 }
5663
5664 BFD_ASSERT (my_offset <= globals->arm_glue_size);
5665
a4fd1a8e
PB		 5666 return myh;
5667}
5668
5669/* Arm code calling a Thumb function. */
5670
5671static int
5672elf32_arm_to_thumb_stub (struct bfd_link_info * info,
5673 const char * name,
5674 bfd * input_bfd,
5675 bfd * output_bfd,
5676 asection * input_section,
5677 bfd_byte * hit_data,
5678 asection * sym_sec,
5679 bfd_vma offset,
5680 bfd_signed_vma addend,
f2a9dd69
DJ		 5681 bfd_vma val,
5682 char **error_message)
a4fd1a8e
PB		 5683{
5684 unsigned long int tmp;
5685 bfd_vma my_offset;
5686 asection * s;
5687 long int ret_offset;
5688 struct elf_link_hash_entry * myh;
5689 struct elf32_arm_link_hash_table * globals;
5690
5691 globals = elf32_arm_hash_table (info);
5692
5693 BFD_ASSERT (globals != NULL);
5694 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5695
5696 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
5697 ARM2THUMB_GLUE_SECTION_NAME);
5698 BFD_ASSERT (s != NULL);
5699 BFD_ASSERT (s->contents != NULL);
5700 BFD_ASSERT (s->output_section != NULL);
5701
5702 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 5703 sym_sec, val, s, error_message);
a4fd1a8e
PB		 5704 if (!myh)
5705 return FALSE;
5706
5707 my_offset = myh->root.u.def.value;
252b5132
RH		 5708 tmp = bfd_get_32 (input_bfd, hit_data);
5709 tmp = tmp & 0xFF000000;
5710
9b485d32 5711 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 5712 ret_offset = (s->output_offset
5713 + my_offset
5714 + s->output_section->vma
5715 - (input_section->output_offset
5716 + input_section->output_section->vma
5717 + offset + addend)
5718 - 8);
9a5aca8c 5719
252b5132
RH		 5720 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
5721
dc810e39 5722 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 5723
b34976b6 5724 return TRUE;
252b5132
RH		 5725}
5726
a4fd1a8e
PB		 5727/* Populate Arm stub for an exported Thumb function. */
5728
5729static bfd_boolean
5730elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
5731{
5732 struct bfd_link_info * info = (struct bfd_link_info *) inf;
5733 asection * s;
5734 struct elf_link_hash_entry * myh;
5735 struct elf32_arm_link_hash_entry *eh;
5736 struct elf32_arm_link_hash_table * globals;
5737 asection *sec;
5738 bfd_vma val;
f2a9dd69 5739 char *error_message;
a4fd1a8e 5740
906e58ca 5741 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 5742 /* Allocate stubs for exported Thumb functions on v4t. */
5743 if (eh->export_glue == NULL)
5744 return TRUE;
5745
5746 globals = elf32_arm_hash_table (info);
5747
5748 BFD_ASSERT (globals != NULL);
5749 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5750
5751 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
5752 ARM2THUMB_GLUE_SECTION_NAME);
5753 BFD_ASSERT (s != NULL);
5754 BFD_ASSERT (s->contents != NULL);
5755 BFD_ASSERT (s->output_section != NULL);
5756
5757 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 5758
5759 BFD_ASSERT (sec->output_section != NULL);
5760
a4fd1a8e
PB		 5761 val = eh->export_glue->root.u.def.value + sec->output_offset
5762 + sec->output_section->vma;
8029a119 5763
a4fd1a8e
PB		 5764 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
5765 h->root.u.def.section->owner,
f2a9dd69
DJ		 5766 globals->obfd, sec, val, s,
5767 &error_message);
a4fd1a8e
PB		 5768 BFD_ASSERT (myh);
5769 return TRUE;
5770}
5771
845b51d6
PB		 5772/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
5773
5774static bfd_vma
5775elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
5776{
5777 bfd_byte *p;
5778 bfd_vma glue_addr;
5779 asection *s;
5780 struct elf32_arm_link_hash_table *globals;
5781
5782 globals = elf32_arm_hash_table (info);
5783
5784 BFD_ASSERT (globals != NULL);
5785 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5786
5787 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
5788 ARM_BX_GLUE_SECTION_NAME);
5789 BFD_ASSERT (s != NULL);
5790 BFD_ASSERT (s->contents != NULL);
5791 BFD_ASSERT (s->output_section != NULL);
5792
5793 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
5794
5795 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
5796
5797 if ((globals->bx_glue_offset[reg] & 1) == 0)
5798 {
5799 p = s->contents + glue_addr;
5800 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
5801 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
5802 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
5803 globals->bx_glue_offset[reg] |= 1;
5804 }
5805
5806 return glue_addr + s->output_section->vma + s->output_offset;
5807}
5808
a4fd1a8e
PB		 5809/* Generate Arm stubs for exported Thumb symbols. */
5810static void
906e58ca 5811elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 5812 struct bfd_link_info *link_info)
5813{
5814 struct elf32_arm_link_hash_table * globals;
5815
8029a119
NC		 5816 if (link_info == NULL)
5817 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 5818 return;
5819
5820 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 5821 /* If blx is available then exported Thumb symbols are OK and there is
5822 nothing to do. */
a4fd1a8e
PB		 5823 if (globals->use_blx)
5824 return;
5825
5826 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
5827 link_info);
5828}
5829
eb043451
PB		 5830/* Some relocations map to different relocations depending on the
5831 target. Return the real relocation. */
8029a119 5832
eb043451
PB		 5833static int
5834arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
5835 int r_type)
5836{
5837 switch (r_type)
5838 {
5839 case R_ARM_TARGET1:
5840 if (globals->target1_is_rel)
5841 return R_ARM_REL32;
5842 else
5843 return R_ARM_ABS32;
5844
5845 case R_ARM_TARGET2:
5846 return globals->target2_reloc;
5847
5848 default:
5849 return r_type;
5850 }
5851}
eb043451 5852
ba93b8ac
DJ		 5853/* Return the base VMA address which should be subtracted from real addresses
5854 when resolving @dtpoff relocation.
5855 This is PT_TLS segment p_vaddr. */
5856
5857static bfd_vma
5858dtpoff_base (struct bfd_link_info *info)
5859{
5860 /* If tls_sec is NULL, we should have signalled an error already. */
5861 if (elf_hash_table (info)->tls_sec == NULL)
5862 return 0;
5863 return elf_hash_table (info)->tls_sec->vma;
5864}
5865
5866/* Return the relocation value for @tpoff relocation
5867 if STT_TLS virtual address is ADDRESS. */
5868
5869static bfd_vma
5870tpoff (struct bfd_link_info *info, bfd_vma address)
5871{
5872 struct elf_link_hash_table *htab = elf_hash_table (info);
5873 bfd_vma base;
5874
5875 /* If tls_sec is NULL, we should have signalled an error already. */
5876 if (htab->tls_sec == NULL)
5877 return 0;
5878 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
5879 return address - htab->tls_sec->vma + base;
5880}
5881
00a97672
RS		 5882/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
5883 VALUE is the relocation value. */
5884
5885static bfd_reloc_status_type
5886elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
5887{
5888 if (value > 0xfff)
5889 return bfd_reloc_overflow;
5890
5891 value |= bfd_get_32 (abfd, data) & 0xfffff000;
5892 bfd_put_32 (abfd, value, data);
5893 return bfd_reloc_ok;
5894}
5895
4962c51a
MS		 5896/* For a given value of n, calculate the value of G_n as required to
5897 deal with group relocations. We return it in the form of an
5898 encoded constant-and-rotation, together with the final residual. If n is
5899 specified as less than zero, then final_residual is filled with the
5900 input value and no further action is performed. */
5901
5902static bfd_vma
5903calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
5904{
5905 int current_n;
5906 bfd_vma g_n;
5907 bfd_vma encoded_g_n = 0;
5908 bfd_vma residual = value; /* Also known as Y_n. */
5909
5910 for (current_n = 0; current_n <= n; current_n++)
5911 {
5912 int shift;
5913
5914 /* Calculate which part of the value to mask. */
5915 if (residual == 0)
5916 shift = 0;
5917 else
5918 {
5919 int msb;
5920
5921 /* Determine the most significant bit in the residual and
5922 align the resulting value to a 2-bit boundary. */
5923 for (msb = 30; msb >= 0; msb -= 2)
5924 if (residual & (3 << msb))
5925 break;
5926
5927 /* The desired shift is now (msb - 6), or zero, whichever
5928 is the greater. */
5929 shift = msb - 6;
5930 if (shift < 0)
5931 shift = 0;
5932 }
5933
5934 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
5935 g_n = residual & (0xff << shift);
5936 encoded_g_n = (g_n >> shift)
5937 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
5938
5939 /* Calculate the residual for the next time around. */
5940 residual &= ~g_n;
5941 }
5942
5943 *final_residual = residual;
5944
5945 return encoded_g_n;
5946}
5947
5948/* Given an ARM instruction, determine whether it is an ADD or a SUB.
5949 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 5950
4962c51a 5951static int
906e58ca 5952identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 5953{
5954 int opcode = insn & 0x1e00000;
5955
5956 if (opcode == 1 << 23) /* ADD */
5957 return 1;
5958
5959 if (opcode == 1 << 22) /* SUB */
5960 return -1;
5961
5962 return 0;
5963}
5964
252b5132 5965/* Perform a relocation as part of a final link. */
9b485d32 5966
252b5132 5967static bfd_reloc_status_type
57e8b36a
NC		 5968elf32_arm_final_link_relocate (reloc_howto_type * howto,
5969 bfd * input_bfd,
5970 bfd * output_bfd,
5971 asection * input_section,
5972 bfd_byte * contents,
5973 Elf_Internal_Rela * rel,
5974 bfd_vma value,
5975 struct bfd_link_info * info,
5976 asection * sym_sec,
5977 const char * sym_name,
5978 int sym_flags,
0945cdfd 5979 struct elf_link_hash_entry * h,
f2a9dd69 5980 bfd_boolean * unresolved_reloc_p,
8029a119 5981 char ** error_message)
252b5132
RH		 5982{
5983 unsigned long r_type = howto->type;
5984 unsigned long r_symndx;
5985 bfd_byte * hit_data = contents + rel->r_offset;
5986 bfd * dynobj = NULL;
5987 Elf_Internal_Shdr * symtab_hdr;
5988 struct elf_link_hash_entry ** sym_hashes;
5989 bfd_vma * local_got_offsets;
5990 asection * sgot = NULL;
5991 asection * splt = NULL;
5992 asection * sreloc = NULL;
252b5132 5993 bfd_vma addend;
ba96a88f
NC		 5994 bfd_signed_vma signed_addend;
5995 struct elf32_arm_link_hash_table * globals;
f21f3fe0 5996
9c504268
PB		 5997 globals = elf32_arm_hash_table (info);
5998
0ffa91dd
NC		 5999 BFD_ASSERT (is_arm_elf (input_bfd));
6000
6001 /* Some relocation types map to different relocations depending on the
9c504268 6002 target. We pick the right one here. */
eb043451
PB		 6003 r_type = arm_real_reloc_type (globals, r_type);
6004 if (r_type != howto->type)
6005 howto = elf32_arm_howto_from_type (r_type);
9c504268 6006
cac15327
NC		 6007 /* If the start address has been set, then set the EF_ARM_HASENTRY
6008 flag. Setting this more than once is redundant, but the cost is
6009 not too high, and it keeps the code simple.
99e4ae17 6010
cac15327
NC		 6011 The test is done here, rather than somewhere else, because the
6012 start address is only set just before the final link commences.
6013
6014 Note - if the user deliberately sets a start address of 0, the
6015 flag will not be set. */
6016 if (bfd_get_start_address (output_bfd) != 0)
6017 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6018
252b5132
RH		 6019 dynobj = elf_hash_table (info)->dynobj;
6020 if (dynobj)
6021 {
6022 sgot = bfd_get_section_by_name (dynobj, ".got");
6023 splt = bfd_get_section_by_name (dynobj, ".plt");
6024 }
0ffa91dd 6025 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6026 sym_hashes = elf_sym_hashes (input_bfd);
6027 local_got_offsets = elf_local_got_offsets (input_bfd);
6028 r_symndx = ELF32_R_SYM (rel->r_info);
6029
4e7fd91e 6030 if (globals->use_rel)
ba96a88f 6031 {
4e7fd91e
PB		 6032 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6033
6034 if (addend & ((howto->src_mask + 1) >> 1))
6035 {
6036 signed_addend = -1;
6037 signed_addend &= ~ howto->src_mask;
6038 signed_addend |= addend;
6039 }
6040 else
6041 signed_addend = addend;
ba96a88f
NC		 6042 }
6043 else
4e7fd91e 6044 addend = signed_addend = rel->r_addend;
f21f3fe0 6045
252b5132
RH		 6046 switch (r_type)
6047 {
6048 case R_ARM_NONE:
28a094c2
DJ		 6049 /* We don't need to find a value for this symbol. It's just a
6050 marker. */
6051 *unresolved_reloc_p = FALSE;
252b5132
RH		 6052 return bfd_reloc_ok;
6053
00a97672
RS		 6054 case R_ARM_ABS12:
6055 if (!globals->vxworks_p)
6056 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6057
252b5132
RH		 6058 case R_ARM_PC24:
6059 case R_ARM_ABS32:
bb224fc3 6060 case R_ARM_ABS32_NOI:
252b5132 6061 case R_ARM_REL32:
bb224fc3 6062 case R_ARM_REL32_NOI:
5b5bb741
PB		 6063 case R_ARM_CALL:
6064 case R_ARM_JUMP24:
dfc5f959 6065 case R_ARM_XPC25:
eb043451 6066 case R_ARM_PREL31:
7359ea65 6067 case R_ARM_PLT32:
7359ea65
DJ		 6068 /* Handle relocations which should use the PLT entry. ABS32/REL32
6069 will use the symbol's value, which may point to a PLT entry, but we
6070 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6071 branches in this object should go to it, except if the PLT is too
6072 far away, in which case a long branch stub should be inserted. */
bb224fc3 6073 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6074 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6075 && r_type != R_ARM_CALL
6076 && r_type != R_ARM_JUMP24
6077 && r_type != R_ARM_PLT32)
7359ea65 6078 && h != NULL
c84cd8ee 6079 && splt != NULL
7359ea65
DJ		 6080 && h->plt.offset != (bfd_vma) -1)
6081 {
c84cd8ee
DJ		 6082 /* If we've created a .plt section, and assigned a PLT entry to
6083 this function, it should not be known to bind locally. If
6084 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6085 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6086
6087 value = (splt->output_section->vma
6088 + splt->output_offset
6089 + h->plt.offset);
0945cdfd 6090 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6091 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6092 contents, rel->r_offset, value,
00a97672 6093 rel->r_addend);
7359ea65
DJ		 6094 }
6095
67687978
PB		 6096 /* When generating a shared object or relocatable executable, these
6097 relocations are copied into the output file to be resolved at
6098 run time. */
6099 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6100 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 6101 && !(elf32_arm_hash_table (info)->vxworks_p
6102 && strcmp (input_section->output_section->name,
6103 ".tls_vars") == 0)
bb224fc3 6104 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6105 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 6106 && (h == NULL
6107 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6108 || h->root.type != bfd_link_hash_undefweak)
6109 && r_type != R_ARM_PC24
5b5bb741
PB		 6110 && r_type != R_ARM_CALL
6111 && r_type != R_ARM_JUMP24
ee06dc07 6112 && r_type != R_ARM_PREL31
7359ea65 6113 && r_type != R_ARM_PLT32)
252b5132 6114 {
947216bf
AM		 6115 Elf_Internal_Rela outrel;
6116 bfd_byte *loc;
b34976b6 6117 bfd_boolean skip, relocate;
f21f3fe0 6118
0945cdfd
DJ		 6119 *unresolved_reloc_p = FALSE;
6120
252b5132
RH		 6121 if (sreloc == NULL)
6122 {
83bac4b0
NC		 6123 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6124 ! globals->use_rel);
f21f3fe0 6125
83bac4b0 6126 if (sreloc == NULL)
252b5132 6127 return bfd_reloc_notsupported;
252b5132 6128 }
f21f3fe0 6129
b34976b6
AM		 6130 skip = FALSE;
6131 relocate = FALSE;
f21f3fe0 6132
00a97672 6133 outrel.r_addend = addend;
c629eae0
JJ		 6134 outrel.r_offset =
6135 _bfd_elf_section_offset (output_bfd, info, input_section,
6136 rel->r_offset);
6137 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6138 skip = TRUE;
0bb2d96a 6139 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6140 skip = TRUE, relocate = TRUE;
252b5132
RH		 6141 outrel.r_offset += (input_section->output_section->vma
6142 + input_section->output_offset);
f21f3fe0 6143
252b5132 6144 if (skip)
0bb2d96a 6145 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6146 else if (h != NULL
6147 && h->dynindx != -1
7359ea65 6148 && (!info->shared
5e681ec4 6149 || !info->symbolic
f5385ebf 6150 || !h->def_regular))
5e681ec4 6151 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6152 else
6153 {
a16385dc
MM		 6154 int symbol;
6155
5e681ec4 6156 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 6157 if (sym_flags == STT_ARM_TFUNC)
6158 value |= 1;
a16385dc 6159 if (globals->symbian_p)
6366ff1e 6160 {
74541ad4
AM		 6161 asection *osec;
6162
6366ff1e
MM		 6163 /* On Symbian OS, the data segment and text segement
6164 can be relocated independently. Therefore, we
6165 must indicate the segment to which this
6166 relocation is relative. The BPABI allows us to
6167 use any symbol in the right segment; we just use
6168 the section symbol as it is convenient. (We
6169 cannot use the symbol given by "h" directly as it
74541ad4
AM		 6170 will not appear in the dynamic symbol table.)
6171
6172 Note that the dynamic linker ignores the section
6173 symbol value, so we don't subtract osec->vma
6174 from the emitted reloc addend. */
10dbd1f3 6175 if (sym_sec)
74541ad4 6176 osec = sym_sec->output_section;
10dbd1f3 6177 else
74541ad4
AM		 6178 osec = input_section->output_section;
6179 symbol = elf_section_data (osec)->dynindx;
6180 if (symbol == 0)
6181 {
6182 struct elf_link_hash_table *htab = elf_hash_table (info);
6183
6184 if ((osec->flags & SEC_READONLY) == 0
6185 && htab->data_index_section != NULL)
6186 osec = htab->data_index_section;
6187 else
6188 osec = htab->text_index_section;
6189 symbol = elf_section_data (osec)->dynindx;
6190 }
6366ff1e
MM		 6191 BFD_ASSERT (symbol != 0);
6192 }
a16385dc
MM		 6193 else
6194 /* On SVR4-ish systems, the dynamic loader cannot
6195 relocate the text and data segments independently,
6196 so the symbol does not matter. */
6197 symbol = 0;
6198 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 6199 if (globals->use_rel)
6200 relocate = TRUE;
6201 else
6202 outrel.r_addend += value;
252b5132 6203 }
f21f3fe0 6204
947216bf 6205 loc = sreloc->contents;
00a97672
RS		 6206 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
6207 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 6208
f21f3fe0 6209 /* If this reloc is against an external symbol, we do not want to
252b5132 6210 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 6211 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 6212 if (! relocate)
6213 return bfd_reloc_ok;
9a5aca8c 6214
f21f3fe0 6215 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 6216 contents, rel->r_offset, value,
6217 (bfd_vma) 0);
6218 }
6219 else switch (r_type)
6220 {
00a97672
RS		 6221 case R_ARM_ABS12:
6222 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6223
dfc5f959 6224 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 6225 case R_ARM_CALL:
6226 case R_ARM_JUMP24:
8029a119 6227 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 6228 case R_ARM_PLT32:
906e58ca
NC		 6229 {
6230 bfd_vma from;
6231 bfd_signed_vma branch_offset;
6232 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6233
dfc5f959 6234 if (r_type == R_ARM_XPC25)
252b5132 6235 {
dfc5f959
NC		 6236 /* Check for Arm calling Arm function. */
6237 /* FIXME: Should we translate the instruction into a BL
6238 instruction instead ? */
6239 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 6240 (*_bfd_error_handler)
6241 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
6242 input_bfd,
6243 h ? h->root.root.string : "(local)");
dfc5f959 6244 }
155d87d7 6245 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 6246 {
6247 /* Check for Arm calling Thumb function. */
6248 if (sym_flags == STT_ARM_TFUNC)
6249 {
f2a9dd69
DJ		 6250 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
6251 output_bfd, input_section,
6252 hit_data, sym_sec, rel->r_offset,
6253 signed_addend, value,
6254 error_message))
6255 return bfd_reloc_ok;
6256 else
6257 return bfd_reloc_dangerous;
dfc5f959 6258 }
252b5132 6259 }
ba96a88f 6260
906e58ca 6261 /* Check if a stub has to be inserted because the
8029a119 6262 destination is too far or we are changing mode. */
155d87d7
CL		 6263 if ( r_type == R_ARM_CALL
6264 || r_type == R_ARM_JUMP24
6265 || r_type == R_ARM_PLT32)
906e58ca 6266 {
5fa9e92f
CL		 6267 /* If the call goes through a PLT entry, make sure to
6268 check distance to the right destination address. */
6269 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
6270 {
6271 value = (splt->output_section->vma
6272 + splt->output_offset
6273 + h->plt.offset);
6274 *unresolved_reloc_p = FALSE;
6275 }
6276
6277 from = (input_section->output_section->vma
6278 + input_section->output_offset
6279 + rel->r_offset);
6280 branch_offset = (bfd_signed_vma)(value - from);
6281
906e58ca
NC		 6282 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
6283 || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
155d87d7
CL		 6284 || ((sym_flags == STT_ARM_TFUNC)
6285 && (((r_type == R_ARM_CALL) && !globals->use_blx)
6286 || (r_type == R_ARM_JUMP24)
6287 || (r_type == R_ARM_PLT32) ))
6288 )
906e58ca
NC		 6289 {
6290 /* The target is out of reach, so redirect the
6291 branch to the local stub for this function. */
6292
6293 stub_entry = elf32_arm_get_stub_entry (input_section,
6294 sym_sec, h,
6295 rel, globals);
6296 if (stub_entry != NULL)
6297 value = (stub_entry->stub_offset
6298 + stub_entry->stub_sec->output_offset
6299 + stub_entry->stub_sec->output_section->vma);
6300 }
6301 }
6302
dea514f5
PB		 6303 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
6304 where:
6305 S is the address of the symbol in the relocation.
6306 P is address of the instruction being relocated.
6307 A is the addend (extracted from the instruction) in bytes.
6308
6309 S is held in 'value'.
6310 P is the base address of the section containing the
6311 instruction plus the offset of the reloc into that
6312 section, ie:
6313 (input_section->output_section->vma +
6314 input_section->output_offset +
6315 rel->r_offset).
6316 A is the addend, converted into bytes, ie:
6317 (signed_addend * 4)
6318
6319 Note: None of these operations have knowledge of the pipeline
6320 size of the processor, thus it is up to the assembler to
6321 encode this information into the addend. */
6322 value -= (input_section->output_section->vma
6323 + input_section->output_offset);
6324 value -= rel->r_offset;
4e7fd91e
PB		 6325 if (globals->use_rel)
6326 value += (signed_addend << howto->size);
6327 else
6328 /* RELA addends do not have to be adjusted by howto->size. */
6329 value += signed_addend;
23080146 6330
dcb5e6e6
NC		 6331 signed_addend = value;
6332 signed_addend >>= howto->rightshift;
9a5aca8c 6333
5ab79981 6334 /* A branch to an undefined weak symbol is turned into a jump to
82b5c97a
CL		 6335 the next instruction unless a PLT entry will be created. */
6336 if (h && h->root.type == bfd_link_hash_undefweak
6337 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 6338 {
6339 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
6340 | 0x0affffff;
6341 }
6342 else
59f2c4e7 6343 {
9b485d32 6344 /* Perform a signed range check. */
dcb5e6e6 6345 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 6346 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
6347 return bfd_reloc_overflow;
9a5aca8c 6348
5ab79981 6349 addend = (value & 2);
39b41c9c 6350
5ab79981
PB		 6351 value = (signed_addend & howto->dst_mask)
6352 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 6353
5ab79981
PB		 6354 if (r_type == R_ARM_CALL)
6355 {
155d87d7
CL		 6356 /* Set the H bit in the BLX instruction. */
6357 if (sym_flags == STT_ARM_TFUNC)
6358 {
6359 if (addend)
6360 value |= (1 << 24);
6361 else
6362 value &= ~(bfd_vma)(1 << 24);
6363 }
6364
5ab79981 6365 /* Select the correct instruction (BL or BLX). */
906e58ca 6366 /* Only if we are not handling a BL to a stub. In this
8029a119 6367 case, mode switching is performed by the stub. */
906e58ca 6368 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 6369 value |= (1 << 28);
6370 else
6371 {
6372 value &= ~(bfd_vma)(1 << 28);
6373 value |= (1 << 24);
6374 }
39b41c9c
PB		 6375 }
6376 }
906e58ca 6377 }
252b5132 6378 break;
f21f3fe0 6379
252b5132
RH		 6380 case R_ARM_ABS32:
6381 value += addend;
6382 if (sym_flags == STT_ARM_TFUNC)
6383 value |= 1;
6384 break;
f21f3fe0 6385
bb224fc3
MS		 6386 case R_ARM_ABS32_NOI:
6387 value += addend;
6388 break;
6389
252b5132 6390 case R_ARM_REL32:
a8bc6c78
PB		 6391 value += addend;
6392 if (sym_flags == STT_ARM_TFUNC)
6393 value |= 1;
252b5132 6394 value -= (input_section->output_section->vma
62efb346 6395 + input_section->output_offset + rel->r_offset);
252b5132 6396 break;
eb043451 6397
bb224fc3
MS		 6398 case R_ARM_REL32_NOI:
6399 value += addend;
6400 value -= (input_section->output_section->vma
6401 + input_section->output_offset + rel->r_offset);
6402 break;
6403
eb043451
PB		 6404 case R_ARM_PREL31:
6405 value -= (input_section->output_section->vma
6406 + input_section->output_offset + rel->r_offset);
6407 value += signed_addend;
6408 if (! h || h->root.type != bfd_link_hash_undefweak)
6409 {
8029a119 6410 /* Check for overflow. */
eb043451
PB		 6411 if ((value ^ (value >> 1)) & (1 << 30))
6412 return bfd_reloc_overflow;
6413 }
6414 value &= 0x7fffffff;
6415 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
6416 if (sym_flags == STT_ARM_TFUNC)
6417 value |= 1;
6418 break;
252b5132 6419 }
f21f3fe0 6420
252b5132
RH		 6421 bfd_put_32 (input_bfd, value, hit_data);
6422 return bfd_reloc_ok;
6423
6424 case R_ARM_ABS8:
6425 value += addend;
6426 if ((long) value > 0x7f || (long) value < -0x80)
6427 return bfd_reloc_overflow;
6428
6429 bfd_put_8 (input_bfd, value, hit_data);
6430 return bfd_reloc_ok;
6431
6432 case R_ARM_ABS16:
6433 value += addend;
6434
6435 if ((long) value > 0x7fff || (long) value < -0x8000)
6436 return bfd_reloc_overflow;
6437
6438 bfd_put_16 (input_bfd, value, hit_data);
6439 return bfd_reloc_ok;
6440
252b5132 6441 case R_ARM_THM_ABS5:
9b485d32 6442 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 6443 if (globals->use_rel)
6444 {
6445 /* Need to refetch addend. */
6446 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
6447 /* ??? Need to determine shift amount from operand size. */
6448 addend >>= howto->rightshift;
6449 }
252b5132
RH		 6450 value += addend;
6451
6452 /* ??? Isn't value unsigned? */
6453 if ((long) value > 0x1f || (long) value < -0x10)
6454 return bfd_reloc_overflow;
6455
6456 /* ??? Value needs to be properly shifted into place first. */
6457 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
6458 bfd_put_16 (input_bfd, value, hit_data);
6459 return bfd_reloc_ok;
6460
2cab6cc3
MS		 6461 case R_ARM_THM_ALU_PREL_11_0:
6462 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
6463 {
6464 bfd_vma insn;
6465 bfd_signed_vma relocation;
6466
6467 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
6468 | bfd_get_16 (input_bfd, hit_data + 2);
6469
6470 if (globals->use_rel)
6471 {
6472 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
6473 | ((insn & (1 << 26)) >> 15);
6474 if (insn & 0xf00000)
6475 signed_addend = -signed_addend;
6476 }
6477
6478 relocation = value + signed_addend;
6479 relocation -= (input_section->output_section->vma
6480 + input_section->output_offset
6481 + rel->r_offset);
6482
6483 value = abs (relocation);
6484
6485 if (value >= 0x1000)
6486 return bfd_reloc_overflow;
6487
6488 insn = (insn & 0xfb0f8f00) | (value & 0xff)
6489 | ((value & 0x700) << 4)
6490 | ((value & 0x800) << 15);
6491 if (relocation < 0)
6492 insn |= 0xa00000;
6493
6494 bfd_put_16 (input_bfd, insn >> 16, hit_data);
6495 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
6496
6497 return bfd_reloc_ok;
6498 }
6499
6500 case R_ARM_THM_PC12:
6501 /* Corresponds to: ldr.w reg, [pc, #offset]. */
6502 {
6503 bfd_vma insn;
6504 bfd_signed_vma relocation;
6505
6506 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
6507 | bfd_get_16 (input_bfd, hit_data + 2);
6508
6509 if (globals->use_rel)
6510 {
6511 signed_addend = insn & 0xfff;
6512 if (!(insn & (1 << 23)))
6513 signed_addend = -signed_addend;
6514 }
6515
6516 relocation = value + signed_addend;
6517 relocation -= (input_section->output_section->vma
6518 + input_section->output_offset
6519 + rel->r_offset);
6520
6521 value = abs (relocation);
6522
6523 if (value >= 0x1000)
6524 return bfd_reloc_overflow;
6525
6526 insn = (insn & 0xff7ff000) | value;
6527 if (relocation >= 0)
6528 insn |= (1 << 23);
6529
6530 bfd_put_16 (input_bfd, insn >> 16, hit_data);
6531 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
6532
6533 return bfd_reloc_ok;
6534 }
6535
dfc5f959 6536 case R_ARM_THM_XPC22:
c19d1205 6537 case R_ARM_THM_CALL:
bd97cb95 6538 case R_ARM_THM_JUMP24:
dfc5f959 6539 /* Thumb BL (branch long instruction). */
252b5132 6540 {
b34976b6 6541 bfd_vma relocation;
e95de063 6542 bfd_vma reloc_sign;
b34976b6
AM		 6543 bfd_boolean overflow = FALSE;
6544 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
6545 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 6546 bfd_signed_vma reloc_signed_max;
6547 bfd_signed_vma reloc_signed_min;
b34976b6 6548 bfd_vma check;
252b5132 6549 bfd_signed_vma signed_check;
e95de063
MS		 6550 int bitsize;
6551 int thumb2 = using_thumb2 (globals);
252b5132 6552
5ab79981 6553 /* A branch to an undefined weak symbol is turned into a jump to
19540007
JM		 6554 the next instruction unless a PLT entry will be created. */
6555 if (h && h->root.type == bfd_link_hash_undefweak
6556 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 6557 {
6558 bfd_put_16 (input_bfd, 0xe000, hit_data);
6559 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
6560 return bfd_reloc_ok;
6561 }
6562
e95de063
MS		 6563 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
6564 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 6565 if (globals->use_rel)
6566 {
e95de063
MS		 6567 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
6568 bfd_vma upper = upper_insn & 0x3ff;
6569 bfd_vma lower = lower_insn & 0x7ff;
6570 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
6571 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
6572 bfd_vma i1 = j1 ^ s ? 0 : 1;
6573 bfd_vma i2 = j2 ^ s ? 0 : 1;
6574
6575 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
6576 /* Sign extend. */
6577 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
6578
4e7fd91e
PB		 6579 signed_addend = addend;
6580 }
cb1afa5c 6581
dfc5f959
NC		 6582 if (r_type == R_ARM_THM_XPC22)
6583 {
6584 /* Check for Thumb to Thumb call. */
6585 /* FIXME: Should we translate the instruction into a BL
6586 instruction instead ? */
6587 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 6588 (*_bfd_error_handler)
6589 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
6590 input_bfd,
6591 h ? h->root.root.string : "(local)");
dfc5f959
NC		 6592 }
6593 else
252b5132 6594 {
dfc5f959
NC		 6595 /* If it is not a call to Thumb, assume call to Arm.
6596 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 6597 function call at all, but rather a long jump. Calls through
6598 the PLT do not require stubs. */
6599 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
6600 && (h == NULL || splt == NULL
6601 || h->plt.offset == (bfd_vma) -1))
dfc5f959 6602 {
bd97cb95 6603 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 6604 {
6605 /* Convert BL to BLX. */
6606 lower_insn = (lower_insn & ~0x1000) | 0x0800;
6607 }
155d87d7
CL		 6608 else if (( r_type != R_ARM_THM_CALL)
6609 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 6610 {
6611 if (elf32_thumb_to_arm_stub
6612 (info, sym_name, input_bfd, output_bfd, input_section,
6613 hit_data, sym_sec, rel->r_offset, signed_addend, value,
6614 error_message))
6615 return bfd_reloc_ok;
6616 else
6617 return bfd_reloc_dangerous;
6618 }
da5938a2 6619 }
bd97cb95
DJ		 6620 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
6621 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 6622 {
6623 /* Make sure this is a BL. */
6624 lower_insn |= 0x1800;
6625 }
252b5132 6626 }
f21f3fe0 6627
b7693d02
DJ		 6628 /* Handle calls via the PLT. */
6629 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
6630 {
6631 value = (splt->output_section->vma
6632 + splt->output_offset
6633 + h->plt.offset);
bd97cb95 6634 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 6635 {
6636 /* If the Thumb BLX instruction is available, convert the
6637 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 6638 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 6639 }
6640 else
6641 /* Target the Thumb stub before the ARM PLT entry. */
6642 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 6643 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 6644 }
6645
155d87d7 6646 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 6647 {
6648 /* Check if a stub has to be inserted because the destination
8029a119 6649 is too far. */
906e58ca
NC		 6650 bfd_vma from;
6651 bfd_signed_vma branch_offset;
6652 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6653
6654 from = (input_section->output_section->vma
6655 + input_section->output_offset
6656 + rel->r_offset);
6657 branch_offset = (bfd_signed_vma)(value - from);
6658
6659 if ((!thumb2
6660 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
6661 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
6662 ||
6663 (thumb2
6664 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
f4ac8484 6665 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
155d87d7
CL		 6666 || ((sym_flags != STT_ARM_TFUNC)
6667 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
6668 || r_type == R_ARM_THM_JUMP24)))
906e58ca
NC		 6669 {
6670 /* The target is out of reach or we are changing modes, so
6671 redirect the branch to the local stub for this
6672 function. */
6673 stub_entry = elf32_arm_get_stub_entry (input_section,
6674 sym_sec, h,
6675 rel, globals);
6676 if (stub_entry != NULL)
6677 value = (stub_entry->stub_offset
6678 + stub_entry->stub_sec->output_offset
6679 + stub_entry->stub_sec->output_section->vma);
6680
f4ac8484 6681 /* If this call becomes a call to Arm, force BLX. */
155d87d7 6682 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 6683 {
6684 if ((stub_entry
6685 && !arm_stub_is_thumb (stub_entry->stub_type))
6686 || (sym_flags != STT_ARM_TFUNC))
6687 lower_insn = (lower_insn & ~0x1000) | 0x0800;
6688 }
906e58ca
NC		 6689 }
6690 }
6691
ba96a88f 6692 relocation = value + signed_addend;
f21f3fe0 6693
252b5132 6694 relocation -= (input_section->output_section->vma
ba96a88f
NC		 6695 + input_section->output_offset
6696 + rel->r_offset);
9a5aca8c 6697
252b5132
RH		 6698 check = relocation >> howto->rightshift;
6699
6700 /* If this is a signed value, the rightshift just dropped
6701 leading 1 bits (assuming twos complement). */
6702 if ((bfd_signed_vma) relocation >= 0)
6703 signed_check = check;
6704 else
6705 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
6706
e95de063
MS		 6707 /* Calculate the permissable maximum and minimum values for
6708 this relocation according to whether we're relocating for
6709 Thumb-2 or not. */
6710 bitsize = howto->bitsize;
6711 if (!thumb2)
6712 bitsize -= 2;
6713 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
6714 reloc_signed_min = ~reloc_signed_max;
6715
252b5132 6716 /* Assumes two's complement. */
ba96a88f 6717 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 6718 overflow = TRUE;
252b5132 6719
bd97cb95 6720 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 6721 /* For a BLX instruction, make sure that the relocation is rounded up
6722 to a word boundary. This follows the semantics of the instruction
6723 which specifies that bit 1 of the target address will come from bit
6724 1 of the base address. */
6725 relocation = (relocation + 2) & ~ 3;
cb1afa5c 6726
e95de063
MS		 6727 /* Put RELOCATION back into the insn. Assumes two's complement.
6728 We use the Thumb-2 encoding, which is safe even if dealing with
6729 a Thumb-1 instruction by virtue of our overflow check above. */
6730 reloc_sign = (signed_check < 0) ? 1 : 0;
6731 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
6732 | ((relocation >> 12) & 0x3ff)
6733 | (reloc_sign << 10);
906e58ca 6734 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 6735 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
6736 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
6737 | ((relocation >> 1) & 0x7ff);
c62e1cc3 6738
252b5132
RH		 6739 /* Put the relocated value back in the object file: */
6740 bfd_put_16 (input_bfd, upper_insn, hit_data);
6741 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
6742
6743 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
6744 }
6745 break;
6746
c19d1205
ZW		 6747 case R_ARM_THM_JUMP19:
6748 /* Thumb32 conditional branch instruction. */
6749 {
6750 bfd_vma relocation;
6751 bfd_boolean overflow = FALSE;
6752 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
6753 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 6754 bfd_signed_vma reloc_signed_max = 0xffffe;
6755 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 6756 bfd_signed_vma signed_check;
6757
6758 /* Need to refetch the addend, reconstruct the top three bits,
6759 and squish the two 11 bit pieces together. */
6760 if (globals->use_rel)
6761 {
6762 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 6763 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 6764 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
6765 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
6766 bfd_vma lower = (lower_insn & 0x07ff);
6767
a00a1f35
MS		 6768 upper |= J1 << 6;
6769 upper |= J2 << 7;
6770 upper |= (!S) << 8;
c19d1205
ZW		 6771 upper -= 0x0100; /* Sign extend. */
6772
6773 addend = (upper << 12) | (lower << 1);
6774 signed_addend = addend;
6775 }
6776
bd97cb95
DJ		 6777 /* Handle calls via the PLT. */
6778 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
6779 {
6780 value = (splt->output_section->vma
6781 + splt->output_offset
6782 + h->plt.offset);
6783 /* Target the Thumb stub before the ARM PLT entry. */
6784 value -= PLT_THUMB_STUB_SIZE;
6785 *unresolved_reloc_p = FALSE;
6786 }
6787
c19d1205
ZW		 6788 /* ??? Should handle interworking? GCC might someday try to
6789 use this for tail calls. */
6790
6791 relocation = value + signed_addend;
6792 relocation -= (input_section->output_section->vma
6793 + input_section->output_offset
6794 + rel->r_offset);
a00a1f35 6795 signed_check = (bfd_signed_vma) relocation;
c19d1205 6796
c19d1205
ZW		 6797 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
6798 overflow = TRUE;
6799
6800 /* Put RELOCATION back into the insn. */
6801 {
6802 bfd_vma S = (relocation & 0x00100000) >> 20;
6803 bfd_vma J2 = (relocation & 0x00080000) >> 19;
6804 bfd_vma J1 = (relocation & 0x00040000) >> 18;
6805 bfd_vma hi = (relocation & 0x0003f000) >> 12;
6806 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
6807
a00a1f35 6808 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 6809 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
6810 }
6811
6812 /* Put the relocated value back in the object file: */
6813 bfd_put_16 (input_bfd, upper_insn, hit_data);
6814 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
6815
6816 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
6817 }
6818
6819 case R_ARM_THM_JUMP11:
6820 case R_ARM_THM_JUMP8:
6821 case R_ARM_THM_JUMP6:
51c5503b
NC		 6822 /* Thumb B (branch) instruction). */
6823 {
6cf9e9fe 6824 bfd_signed_vma relocation;
51c5503b
NC		 6825 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
6826 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 6827 bfd_signed_vma signed_check;
6828
c19d1205
ZW		 6829 /* CZB cannot jump backward. */
6830 if (r_type == R_ARM_THM_JUMP6)
6831 reloc_signed_min = 0;
6832
4e7fd91e 6833 if (globals->use_rel)
6cf9e9fe 6834 {
4e7fd91e
PB		 6835 /* Need to refetch addend. */
6836 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
6837 if (addend & ((howto->src_mask + 1) >> 1))
6838 {
6839 signed_addend = -1;
6840 signed_addend &= ~ howto->src_mask;
6841 signed_addend |= addend;
6842 }
6843 else
6844 signed_addend = addend;
6845 /* The value in the insn has been right shifted. We need to
6846 undo this, so that we can perform the address calculation
6847 in terms of bytes. */
6848 signed_addend <<= howto->rightshift;
6cf9e9fe 6849 }
6cf9e9fe 6850 relocation = value + signed_addend;
51c5503b
NC		 6851
6852 relocation -= (input_section->output_section->vma
6853 + input_section->output_offset
6854 + rel->r_offset);
6855
6cf9e9fe
NC		 6856 relocation >>= howto->rightshift;
6857 signed_check = relocation;
c19d1205
ZW		 6858
6859 if (r_type == R_ARM_THM_JUMP6)
6860 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
6861 else
6862 relocation &= howto->dst_mask;
51c5503b 6863 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 6864
51c5503b
NC		 6865 bfd_put_16 (input_bfd, relocation, hit_data);
6866
6867 /* Assumes two's complement. */
6868 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
6869 return bfd_reloc_overflow;
6870
6871 return bfd_reloc_ok;
6872 }
cedb70c5 6873
8375c36b
PB		 6874 case R_ARM_ALU_PCREL7_0:
6875 case R_ARM_ALU_PCREL15_8:
6876 case R_ARM_ALU_PCREL23_15:
6877 {
6878 bfd_vma insn;
6879 bfd_vma relocation;
6880
6881 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 6882 if (globals->use_rel)
6883 {
6884 /* Extract the addend. */
6885 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
6886 signed_addend = addend;
6887 }
8375c36b
PB		 6888 relocation = value + signed_addend;
6889
6890 relocation -= (input_section->output_section->vma
6891 + input_section->output_offset
6892 + rel->r_offset);
6893 insn = (insn & ~0xfff)
6894 | ((howto->bitpos << 7) & 0xf00)
6895 | ((relocation >> howto->bitpos) & 0xff);
6896 bfd_put_32 (input_bfd, value, hit_data);
6897 }
6898 return bfd_reloc_ok;
6899
252b5132
RH		 6900 case R_ARM_GNU_VTINHERIT:
6901 case R_ARM_GNU_VTENTRY:
6902 return bfd_reloc_ok;
6903
c19d1205 6904 case R_ARM_GOTOFF32:
252b5132
RH		 6905 /* Relocation is relative to the start of the
6906 global offset table. */
6907
6908 BFD_ASSERT (sgot != NULL);
6909 if (sgot == NULL)
6910 return bfd_reloc_notsupported;
9a5aca8c 6911
cedb70c5 6912 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 6913 address by one, so that attempts to call the function pointer will
6914 correctly interpret it as Thumb code. */
6915 if (sym_flags == STT_ARM_TFUNC)
6916 value += 1;
6917
252b5132
RH		 6918 /* Note that sgot->output_offset is not involved in this
6919 calculation. We always want the start of .got. If we
6920 define _GLOBAL_OFFSET_TABLE in a different way, as is
6921 permitted by the ABI, we might have to change this
9b485d32 6922 calculation. */
252b5132 6923 value -= sgot->output_section->vma;
f21f3fe0 6924 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 6925 contents, rel->r_offset, value,
00a97672 6926 rel->r_addend);
252b5132
RH		 6927
6928 case R_ARM_GOTPC:
a7c10850 6929 /* Use global offset table as symbol value. */
252b5132 6930 BFD_ASSERT (sgot != NULL);
f21f3fe0 6931
252b5132
RH		 6932 if (sgot == NULL)
6933 return bfd_reloc_notsupported;
6934
0945cdfd 6935 *unresolved_reloc_p = FALSE;
252b5132 6936 value = sgot->output_section->vma;
f21f3fe0 6937 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 6938 contents, rel->r_offset, value,
00a97672 6939 rel->r_addend);
f21f3fe0 6940
252b5132 6941 case R_ARM_GOT32:
eb043451 6942 case R_ARM_GOT_PREL:
252b5132 6943 /* Relocation is to the entry for this symbol in the
9b485d32 6944 global offset table. */
252b5132
RH		 6945 if (sgot == NULL)
6946 return bfd_reloc_notsupported;
f21f3fe0 6947
252b5132
RH		 6948 if (h != NULL)
6949 {
6950 bfd_vma off;
5e681ec4 6951 bfd_boolean dyn;
f21f3fe0 6952
252b5132
RH		 6953 off = h->got.offset;
6954 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 6955 dyn = globals->root.dynamic_sections_created;
f21f3fe0 6956
5e681ec4 6957 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 6958 || (info->shared
5e681ec4
PB		 6959 && SYMBOL_REFERENCES_LOCAL (info, h))
6960 || (ELF_ST_VISIBILITY (h->other)
6961 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 6962 {
6963 /* This is actually a static link, or it is a -Bsymbolic link
6964 and the symbol is defined locally. We must initialize this
6965 entry in the global offset table. Since the offset must
6966 always be a multiple of 4, we use the least significant bit
6967 to record whether we have initialized it already.
f21f3fe0 6968
00a97672 6969 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 6970 entry to initialize the value. This is done in the
9b485d32 6971 finish_dynamic_symbol routine. */
252b5132
RH		 6972 if ((off & 1) != 0)
6973 off &= ~1;
6974 else
6975 {
ee29b9fb
RE		 6976 /* If we are addressing a Thumb function, we need to
6977 adjust the address by one, so that attempts to
6978 call the function pointer will correctly
6979 interpret it as Thumb code. */
6980 if (sym_flags == STT_ARM_TFUNC)
6981 value |= 1;
6982
252b5132
RH		 6983 bfd_put_32 (output_bfd, value, sgot->contents + off);
6984 h->got.offset |= 1;
6985 }
6986 }
0945cdfd
DJ		 6987 else
6988 *unresolved_reloc_p = FALSE;
f21f3fe0 6989
252b5132
RH		 6990 value = sgot->output_offset + off;
6991 }
6992 else
6993 {
6994 bfd_vma off;
f21f3fe0 6995
252b5132
RH		 6996 BFD_ASSERT (local_got_offsets != NULL &&
6997 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 6998
252b5132 6999 off = local_got_offsets[r_symndx];
f21f3fe0 7000
252b5132
RH		 7001 /* The offset must always be a multiple of 4. We use the
7002 least significant bit to record whether we have already
9b485d32 7003 generated the necessary reloc. */
252b5132
RH		 7004 if ((off & 1) != 0)
7005 off &= ~1;
7006 else
7007 {
b7693d02
DJ		 7008 /* If we are addressing a Thumb function, we need to
7009 adjust the address by one, so that attempts to
7010 call the function pointer will correctly
7011 interpret it as Thumb code. */
7012 if (sym_flags == STT_ARM_TFUNC)
7013 value |= 1;
7014
00a97672
RS		 7015 if (globals->use_rel)
7016 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7017
252b5132
RH		 7018 if (info->shared)
7019 {
7020 asection * srelgot;
947216bf
AM		 7021 Elf_Internal_Rela outrel;
7022 bfd_byte *loc;
f21f3fe0 7023
00a97672
RS		 7024 srelgot = (bfd_get_section_by_name
7025 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7026 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7027
00a97672 7028 outrel.r_addend = addend + value;
252b5132 7029 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7030 + sgot->output_offset
252b5132
RH		 7031 + off);
7032 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7033 loc = srelgot->contents;
00a97672
RS		 7034 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7035 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7036 }
f21f3fe0 7037
252b5132
RH		 7038 local_got_offsets[r_symndx] |= 1;
7039 }
f21f3fe0 7040
252b5132
RH		 7041 value = sgot->output_offset + off;
7042 }
eb043451
PB		 7043 if (r_type != R_ARM_GOT32)
7044 value += sgot->output_section->vma;
9a5aca8c 7045
f21f3fe0 7046 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7047 contents, rel->r_offset, value,
00a97672 7048 rel->r_addend);
f21f3fe0 7049
ba93b8ac
DJ		 7050 case R_ARM_TLS_LDO32:
7051 value = value - dtpoff_base (info);
7052
7053 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7054 contents, rel->r_offset, value,
7055 rel->r_addend);
ba93b8ac
DJ		 7056
7057 case R_ARM_TLS_LDM32:
7058 {
7059 bfd_vma off;
7060
7061 if (globals->sgot == NULL)
7062 abort ();
7063
7064 off = globals->tls_ldm_got.offset;
7065
7066 if ((off & 1) != 0)
7067 off &= ~1;
7068 else
7069 {
7070 /* If we don't know the module number, create a relocation
7071 for it. */
7072 if (info->shared)
7073 {
7074 Elf_Internal_Rela outrel;
7075 bfd_byte *loc;
7076
7077 if (globals->srelgot == NULL)
7078 abort ();
7079
00a97672 7080 outrel.r_addend = 0;
ba93b8ac
DJ		 7081 outrel.r_offset = (globals->sgot->output_section->vma
7082 + globals->sgot->output_offset + off);
7083 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7084
00a97672
RS		 7085 if (globals->use_rel)
7086 bfd_put_32 (output_bfd, outrel.r_addend,
7087 globals->sgot->contents + off);
ba93b8ac
DJ		 7088
7089 loc = globals->srelgot->contents;
00a97672
RS		 7090 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
7091 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7092 }
7093 else
7094 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
7095
7096 globals->tls_ldm_got.offset |= 1;
7097 }
7098
906e58ca 7099 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7100 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7101
7102 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7103 contents, rel->r_offset, value,
00a97672 7104 rel->r_addend);
ba93b8ac
DJ		 7105 }
7106
7107 case R_ARM_TLS_GD32:
7108 case R_ARM_TLS_IE32:
7109 {
7110 bfd_vma off;
7111 int indx;
7112 char tls_type;
7113
7114 if (globals->sgot == NULL)
7115 abort ();
7116
7117 indx = 0;
7118 if (h != NULL)
7119 {
7120 bfd_boolean dyn;
7121 dyn = globals->root.dynamic_sections_created;
7122 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7123 && (!info->shared
7124 || !SYMBOL_REFERENCES_LOCAL (info, h)))
7125 {
7126 *unresolved_reloc_p = FALSE;
7127 indx = h->dynindx;
7128 }
7129 off = h->got.offset;
7130 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
7131 }
7132 else
7133 {
7134 if (local_got_offsets == NULL)
7135 abort ();
7136 off = local_got_offsets[r_symndx];
7137 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
7138 }
7139
7140 if (tls_type == GOT_UNKNOWN)
7141 abort ();
7142
7143 if ((off & 1) != 0)
7144 off &= ~1;
7145 else
7146 {
7147 bfd_boolean need_relocs = FALSE;
7148 Elf_Internal_Rela outrel;
7149 bfd_byte *loc = NULL;
7150 int cur_off = off;
7151
7152 /* The GOT entries have not been initialized yet. Do it
7153 now, and emit any relocations. If both an IE GOT and a
7154 GD GOT are necessary, we emit the GD first. */
7155
7156 if ((info->shared || indx != 0)
7157 && (h == NULL
7158 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7159 || h->root.type != bfd_link_hash_undefweak))
7160 {
7161 need_relocs = TRUE;
7162 if (globals->srelgot == NULL)
7163 abort ();
7164 loc = globals->srelgot->contents;
00a97672 7165 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 7166 }
7167
7168 if (tls_type & GOT_TLS_GD)
7169 {
7170 if (need_relocs)
7171 {
00a97672 7172 outrel.r_addend = 0;
ba93b8ac 7173 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 7174 + globals->sgot->output_offset
7175 + cur_off);
ba93b8ac 7176 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 7177
00a97672
RS		 7178 if (globals->use_rel)
7179 bfd_put_32 (output_bfd, outrel.r_addend,
7180 globals->sgot->contents + cur_off);
7181
7182 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7183 globals->srelgot->reloc_count++;
00a97672 7184 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7185
7186 if (indx == 0)
7187 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7188 globals->sgot->contents + cur_off + 4);
7189 else
7190 {
00a97672 7191 outrel.r_addend = 0;
ba93b8ac
DJ		 7192 outrel.r_info = ELF32_R_INFO (indx,
7193 R_ARM_TLS_DTPOFF32);
7194 outrel.r_offset += 4;
00a97672
RS		 7195
7196 if (globals->use_rel)
7197 bfd_put_32 (output_bfd, outrel.r_addend,
7198 globals->sgot->contents + cur_off + 4);
7199
7200
7201 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7202 globals->srelgot->reloc_count++;
00a97672 7203 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7204 }
7205 }
7206 else
7207 {
7208 /* If we are not emitting relocations for a
7209 general dynamic reference, then we must be in a
7210 static link or an executable link with the
7211 symbol binding locally. Mark it as belonging
7212 to module 1, the executable. */
7213 bfd_put_32 (output_bfd, 1,
7214 globals->sgot->contents + cur_off);
7215 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7216 globals->sgot->contents + cur_off + 4);
7217 }
7218
7219 cur_off += 8;
7220 }
7221
7222 if (tls_type & GOT_TLS_IE)
7223 {
7224 if (need_relocs)
7225 {
00a97672
RS		 7226 if (indx == 0)
7227 outrel.r_addend = value - dtpoff_base (info);
7228 else
7229 outrel.r_addend = 0;
ba93b8ac
DJ		 7230 outrel.r_offset = (globals->sgot->output_section->vma
7231 + globals->sgot->output_offset
7232 + cur_off);
7233 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
7234
00a97672
RS		 7235 if (globals->use_rel)
7236 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 7237 globals->sgot->contents + cur_off);
7238
00a97672 7239 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7240 globals->srelgot->reloc_count++;
00a97672 7241 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7242 }
7243 else
7244 bfd_put_32 (output_bfd, tpoff (info, value),
7245 globals->sgot->contents + cur_off);
7246 cur_off += 4;
7247 }
7248
7249 if (h != NULL)
7250 h->got.offset |= 1;
7251 else
7252 local_got_offsets[r_symndx] |= 1;
7253 }
7254
7255 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
7256 off += 8;
906e58ca 7257 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7258 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7259
7260 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7261 contents, rel->r_offset, value,
00a97672 7262 rel->r_addend);
ba93b8ac
DJ		 7263 }
7264
7265 case R_ARM_TLS_LE32:
7266 if (info->shared)
7267 {
7268 (*_bfd_error_handler)
7269 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
7270 input_bfd, input_section,
7271 (long) rel->r_offset, howto->name);
906e58ca 7272 return FALSE;
ba93b8ac
DJ		 7273 }
7274 else
7275 value = tpoff (info, value);
906e58ca 7276
ba93b8ac 7277 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7278 contents, rel->r_offset, value,
7279 rel->r_addend);
ba93b8ac 7280
319850b4
JB		 7281 case R_ARM_V4BX:
7282 if (globals->fix_v4bx)
845b51d6
PB		 7283 {
7284 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 7285
845b51d6
PB		 7286 /* Ensure that we have a BX instruction. */
7287 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 7288
845b51d6
PB		 7289 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
7290 {
7291 /* Branch to veneer. */
7292 bfd_vma glue_addr;
7293 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
7294 glue_addr -= input_section->output_section->vma
7295 + input_section->output_offset
7296 + rel->r_offset + 8;
7297 insn = (insn & 0xf0000000) | 0x0a000000
7298 | ((glue_addr >> 2) & 0x00ffffff);
7299 }
7300 else
7301 {
7302 /* Preserve Rm (lowest four bits) and the condition code
7303 (highest four bits). Other bits encode MOV PC,Rm. */
7304 insn = (insn & 0xf000000f) | 0x01a0f000;
7305 }
319850b4 7306
845b51d6
PB		 7307 bfd_put_32 (input_bfd, insn, hit_data);
7308 }
319850b4
JB		 7309 return bfd_reloc_ok;
7310
b6895b4f
PB		 7311 case R_ARM_MOVW_ABS_NC:
7312 case R_ARM_MOVT_ABS:
7313 case R_ARM_MOVW_PREL_NC:
7314 case R_ARM_MOVT_PREL:
92f5d02b
MS		 7315 /* Until we properly support segment-base-relative addressing then
7316 we assume the segment base to be zero, as for the group relocations.
7317 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
7318 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
7319 case R_ARM_MOVW_BREL_NC:
7320 case R_ARM_MOVW_BREL:
7321 case R_ARM_MOVT_BREL:
b6895b4f
PB		 7322 {
7323 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7324
7325 if (globals->use_rel)
7326 {
7327 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 7328 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 7329 }
92f5d02b 7330
b6895b4f 7331 value += signed_addend;
b6895b4f
PB		 7332
7333 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
7334 value -= (input_section->output_section->vma
7335 + input_section->output_offset + rel->r_offset);
7336
92f5d02b
MS		 7337 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
7338 return bfd_reloc_overflow;
7339
7340 if (sym_flags == STT_ARM_TFUNC)
7341 value |= 1;
7342
7343 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
7344 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 7345 value >>= 16;
7346
7347 insn &= 0xfff0f000;
7348 insn |= value & 0xfff;
7349 insn |= (value & 0xf000) << 4;
7350 bfd_put_32 (input_bfd, insn, hit_data);
7351 }
7352 return bfd_reloc_ok;
7353
7354 case R_ARM_THM_MOVW_ABS_NC:
7355 case R_ARM_THM_MOVT_ABS:
7356 case R_ARM_THM_MOVW_PREL_NC:
7357 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 7358 /* Until we properly support segment-base-relative addressing then
7359 we assume the segment base to be zero, as for the above relocations.
7360 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
7361 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
7362 as R_ARM_THM_MOVT_ABS. */
7363 case R_ARM_THM_MOVW_BREL_NC:
7364 case R_ARM_THM_MOVW_BREL:
7365 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 7366 {
7367 bfd_vma insn;
906e58ca 7368
b6895b4f
PB		 7369 insn = bfd_get_16 (input_bfd, hit_data) << 16;
7370 insn |= bfd_get_16 (input_bfd, hit_data + 2);
7371
7372 if (globals->use_rel)
7373 {
7374 addend = ((insn >> 4) & 0xf000)
7375 | ((insn >> 15) & 0x0800)
7376 | ((insn >> 4) & 0x0700)
7377 | (insn & 0x00ff);
39623e12 7378 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 7379 }
92f5d02b 7380
b6895b4f 7381 value += signed_addend;
b6895b4f
PB		 7382
7383 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
7384 value -= (input_section->output_section->vma
7385 + input_section->output_offset + rel->r_offset);
7386
92f5d02b
MS		 7387 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
7388 return bfd_reloc_overflow;
7389
7390 if (sym_flags == STT_ARM_TFUNC)
7391 value |= 1;
7392
7393 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
7394 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 7395 value >>= 16;
7396
7397 insn &= 0xfbf08f00;
7398 insn |= (value & 0xf000) << 4;
7399 insn |= (value & 0x0800) << 15;
7400 insn |= (value & 0x0700) << 4;
7401 insn |= (value & 0x00ff);
7402
7403 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7404 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7405 }
7406 return bfd_reloc_ok;
7407
4962c51a
MS		 7408 case R_ARM_ALU_PC_G0_NC:
7409 case R_ARM_ALU_PC_G1_NC:
7410 case R_ARM_ALU_PC_G0:
7411 case R_ARM_ALU_PC_G1:
7412 case R_ARM_ALU_PC_G2:
7413 case R_ARM_ALU_SB_G0_NC:
7414 case R_ARM_ALU_SB_G1_NC:
7415 case R_ARM_ALU_SB_G0:
7416 case R_ARM_ALU_SB_G1:
7417 case R_ARM_ALU_SB_G2:
7418 {
7419 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7420 bfd_vma pc = input_section->output_section->vma
7421 + input_section->output_offset + rel->r_offset;
7422 /* sb should be the origin of the *segment* containing the symbol.
7423 It is not clear how to obtain this OS-dependent value, so we
7424 make an arbitrary choice of zero. */
7425 bfd_vma sb = 0;
7426 bfd_vma residual;
7427 bfd_vma g_n;
7428 bfd_signed_vma signed_value;
7429 int group = 0;
7430
7431 /* Determine which group of bits to select. */
7432 switch (r_type)
7433 {
7434 case R_ARM_ALU_PC_G0_NC:
7435 case R_ARM_ALU_PC_G0:
7436 case R_ARM_ALU_SB_G0_NC:
7437 case R_ARM_ALU_SB_G0:
7438 group = 0;
7439 break;
7440
7441 case R_ARM_ALU_PC_G1_NC:
7442 case R_ARM_ALU_PC_G1:
7443 case R_ARM_ALU_SB_G1_NC:
7444 case R_ARM_ALU_SB_G1:
7445 group = 1;
7446 break;
7447
7448 case R_ARM_ALU_PC_G2:
7449 case R_ARM_ALU_SB_G2:
7450 group = 2;
7451 break;
7452
7453 default:
906e58ca 7454 abort ();
4962c51a
MS		 7455 }
7456
7457 /* If REL, extract the addend from the insn. If RELA, it will
7458 have already been fetched for us. */
7459 if (globals->use_rel)
7460 {
7461 int negative;
7462 bfd_vma constant = insn & 0xff;
7463 bfd_vma rotation = (insn & 0xf00) >> 8;
7464
7465 if (rotation == 0)
7466 signed_addend = constant;
7467 else
7468 {
7469 /* Compensate for the fact that in the instruction, the
7470 rotation is stored in multiples of 2 bits. */
7471 rotation *= 2;
7472
7473 /* Rotate "constant" right by "rotation" bits. */
7474 signed_addend = (constant >> rotation) |
7475 (constant << (8 * sizeof (bfd_vma) - rotation));
7476 }
7477
7478 /* Determine if the instruction is an ADD or a SUB.
7479 (For REL, this determines the sign of the addend.) */
7480 negative = identify_add_or_sub (insn);
7481 if (negative == 0)
7482 {
7483 (*_bfd_error_handler)
7484 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
7485 input_bfd, input_section,
7486 (long) rel->r_offset, howto->name);
906e58ca 7487 return bfd_reloc_overflow;
4962c51a
MS		 7488 }
7489
7490 signed_addend *= negative;
7491 }
7492
7493 /* Compute the value (X) to go in the place. */
7494 if (r_type == R_ARM_ALU_PC_G0_NC
7495 || r_type == R_ARM_ALU_PC_G1_NC
7496 || r_type == R_ARM_ALU_PC_G0
7497 || r_type == R_ARM_ALU_PC_G1
7498 || r_type == R_ARM_ALU_PC_G2)
7499 /* PC relative. */
7500 signed_value = value - pc + signed_addend;
7501 else
7502 /* Section base relative. */
7503 signed_value = value - sb + signed_addend;
7504
7505 /* If the target symbol is a Thumb function, then set the
7506 Thumb bit in the address. */
7507 if (sym_flags == STT_ARM_TFUNC)
7508 signed_value |= 1;
7509
7510 /* Calculate the value of the relevant G_n, in encoded
7511 constant-with-rotation format. */
7512 g_n = calculate_group_reloc_mask (abs (signed_value), group,
7513 &residual);
7514
7515 /* Check for overflow if required. */
7516 if ((r_type == R_ARM_ALU_PC_G0
7517 || r_type == R_ARM_ALU_PC_G1
7518 || r_type == R_ARM_ALU_PC_G2
7519 || r_type == R_ARM_ALU_SB_G0
7520 || r_type == R_ARM_ALU_SB_G1
7521 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
7522 {
7523 (*_bfd_error_handler)
7524 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
7525 input_bfd, input_section,
7526 (long) rel->r_offset, abs (signed_value), howto->name);
7527 return bfd_reloc_overflow;
7528 }
7529
7530 /* Mask out the value and the ADD/SUB part of the opcode; take care
7531 not to destroy the S bit. */
7532 insn &= 0xff1ff000;
7533
7534 /* Set the opcode according to whether the value to go in the
7535 place is negative. */
7536 if (signed_value < 0)
7537 insn |= 1 << 22;
7538 else
7539 insn |= 1 << 23;
7540
7541 /* Encode the offset. */
7542 insn |= g_n;
7543
7544 bfd_put_32 (input_bfd, insn, hit_data);
7545 }
7546 return bfd_reloc_ok;
7547
7548 case R_ARM_LDR_PC_G0:
7549 case R_ARM_LDR_PC_G1:
7550 case R_ARM_LDR_PC_G2:
7551 case R_ARM_LDR_SB_G0:
7552 case R_ARM_LDR_SB_G1:
7553 case R_ARM_LDR_SB_G2:
7554 {
7555 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7556 bfd_vma pc = input_section->output_section->vma
7557 + input_section->output_offset + rel->r_offset;
7558 bfd_vma sb = 0; /* See note above. */
7559 bfd_vma residual;
7560 bfd_signed_vma signed_value;
7561 int group = 0;
7562
7563 /* Determine which groups of bits to calculate. */
7564 switch (r_type)
7565 {
7566 case R_ARM_LDR_PC_G0:
7567 case R_ARM_LDR_SB_G0:
7568 group = 0;
7569 break;
7570
7571 case R_ARM_LDR_PC_G1:
7572 case R_ARM_LDR_SB_G1:
7573 group = 1;
7574 break;
7575
7576 case R_ARM_LDR_PC_G2:
7577 case R_ARM_LDR_SB_G2:
7578 group = 2;
7579 break;
7580
7581 default:
906e58ca 7582 abort ();
4962c51a
MS		 7583 }
7584
7585 /* If REL, extract the addend from the insn. If RELA, it will
7586 have already been fetched for us. */
7587 if (globals->use_rel)
7588 {
7589 int negative = (insn & (1 << 23)) ? 1 : -1;
7590 signed_addend = negative * (insn & 0xfff);
7591 }
7592
7593 /* Compute the value (X) to go in the place. */
7594 if (r_type == R_ARM_LDR_PC_G0
7595 || r_type == R_ARM_LDR_PC_G1
7596 || r_type == R_ARM_LDR_PC_G2)
7597 /* PC relative. */
7598 signed_value = value - pc + signed_addend;
7599 else
7600 /* Section base relative. */
7601 signed_value = value - sb + signed_addend;
7602
7603 /* Calculate the value of the relevant G_{n-1} to obtain
7604 the residual at that stage. */
7605 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
7606
7607 /* Check for overflow. */
7608 if (residual >= 0x1000)
7609 {
7610 (*_bfd_error_handler)
7611 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
7612 input_bfd, input_section,
7613 (long) rel->r_offset, abs (signed_value), howto->name);
7614 return bfd_reloc_overflow;
7615 }
7616
7617 /* Mask out the value and U bit. */
7618 insn &= 0xff7ff000;
7619
7620 /* Set the U bit if the value to go in the place is non-negative. */
7621 if (signed_value >= 0)
7622 insn |= 1 << 23;
7623
7624 /* Encode the offset. */
7625 insn |= residual;
7626
7627 bfd_put_32 (input_bfd, insn, hit_data);
7628 }
7629 return bfd_reloc_ok;
7630
7631 case R_ARM_LDRS_PC_G0:
7632 case R_ARM_LDRS_PC_G1:
7633 case R_ARM_LDRS_PC_G2:
7634 case R_ARM_LDRS_SB_G0:
7635 case R_ARM_LDRS_SB_G1:
7636 case R_ARM_LDRS_SB_G2:
7637 {
7638 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7639 bfd_vma pc = input_section->output_section->vma
7640 + input_section->output_offset + rel->r_offset;
7641 bfd_vma sb = 0; /* See note above. */
7642 bfd_vma residual;
7643 bfd_signed_vma signed_value;
7644 int group = 0;
7645
7646 /* Determine which groups of bits to calculate. */
7647 switch (r_type)
7648 {
7649 case R_ARM_LDRS_PC_G0:
7650 case R_ARM_LDRS_SB_G0:
7651 group = 0;
7652 break;
7653
7654 case R_ARM_LDRS_PC_G1:
7655 case R_ARM_LDRS_SB_G1:
7656 group = 1;
7657 break;
7658
7659 case R_ARM_LDRS_PC_G2:
7660 case R_ARM_LDRS_SB_G2:
7661 group = 2;
7662 break;
7663
7664 default:
906e58ca 7665 abort ();
4962c51a
MS		 7666 }
7667
7668 /* If REL, extract the addend from the insn. If RELA, it will
7669 have already been fetched for us. */
7670 if (globals->use_rel)
7671 {
7672 int negative = (insn & (1 << 23)) ? 1 : -1;
7673 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
7674 }
7675
7676 /* Compute the value (X) to go in the place. */
7677 if (r_type == R_ARM_LDRS_PC_G0
7678 || r_type == R_ARM_LDRS_PC_G1
7679 || r_type == R_ARM_LDRS_PC_G2)
7680 /* PC relative. */
7681 signed_value = value - pc + signed_addend;
7682 else
7683 /* Section base relative. */
7684 signed_value = value - sb + signed_addend;
7685
7686 /* Calculate the value of the relevant G_{n-1} to obtain
7687 the residual at that stage. */
7688 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
7689
7690 /* Check for overflow. */
7691 if (residual >= 0x100)
7692 {
7693 (*_bfd_error_handler)
7694 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
7695 input_bfd, input_section,
7696 (long) rel->r_offset, abs (signed_value), howto->name);
7697 return bfd_reloc_overflow;
7698 }
7699
7700 /* Mask out the value and U bit. */
7701 insn &= 0xff7ff0f0;
7702
7703 /* Set the U bit if the value to go in the place is non-negative. */
7704 if (signed_value >= 0)
7705 insn |= 1 << 23;
7706
7707 /* Encode the offset. */
7708 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
7709
7710 bfd_put_32 (input_bfd, insn, hit_data);
7711 }
7712 return bfd_reloc_ok;
7713
7714 case R_ARM_LDC_PC_G0:
7715 case R_ARM_LDC_PC_G1:
7716 case R_ARM_LDC_PC_G2:
7717 case R_ARM_LDC_SB_G0:
7718 case R_ARM_LDC_SB_G1:
7719 case R_ARM_LDC_SB_G2:
7720 {
7721 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
7722 bfd_vma pc = input_section->output_section->vma
7723 + input_section->output_offset + rel->r_offset;
7724 bfd_vma sb = 0; /* See note above. */
7725 bfd_vma residual;
7726 bfd_signed_vma signed_value;
7727 int group = 0;
7728
7729 /* Determine which groups of bits to calculate. */
7730 switch (r_type)
7731 {
7732 case R_ARM_LDC_PC_G0:
7733 case R_ARM_LDC_SB_G0:
7734 group = 0;
7735 break;
7736
7737 case R_ARM_LDC_PC_G1:
7738 case R_ARM_LDC_SB_G1:
7739 group = 1;
7740 break;
7741
7742 case R_ARM_LDC_PC_G2:
7743 case R_ARM_LDC_SB_G2:
7744 group = 2;
7745 break;
7746
7747 default:
906e58ca 7748 abort ();
4962c51a
MS		 7749 }
7750
7751 /* If REL, extract the addend from the insn. If RELA, it will
7752 have already been fetched for us. */
7753 if (globals->use_rel)
7754 {
7755 int negative = (insn & (1 << 23)) ? 1 : -1;
7756 signed_addend = negative * ((insn & 0xff) << 2);
7757 }
7758
7759 /* Compute the value (X) to go in the place. */
7760 if (r_type == R_ARM_LDC_PC_G0
7761 || r_type == R_ARM_LDC_PC_G1
7762 || r_type == R_ARM_LDC_PC_G2)
7763 /* PC relative. */
7764 signed_value = value - pc + signed_addend;
7765 else
7766 /* Section base relative. */
7767 signed_value = value - sb + signed_addend;
7768
7769 /* Calculate the value of the relevant G_{n-1} to obtain
7770 the residual at that stage. */
7771 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
7772
7773 /* Check for overflow. (The absolute value to go in the place must be
7774 divisible by four and, after having been divided by four, must
7775 fit in eight bits.) */
7776 if ((residual & 0x3) != 0 || residual >= 0x400)
7777 {
7778 (*_bfd_error_handler)
7779 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
7780 input_bfd, input_section,
7781 (long) rel->r_offset, abs (signed_value), howto->name);
7782 return bfd_reloc_overflow;
7783 }
7784
7785 /* Mask out the value and U bit. */
7786 insn &= 0xff7fff00;
7787
7788 /* Set the U bit if the value to go in the place is non-negative. */
7789 if (signed_value >= 0)
7790 insn |= 1 << 23;
7791
7792 /* Encode the offset. */
7793 insn |= residual >> 2;
7794
7795 bfd_put_32 (input_bfd, insn, hit_data);
7796 }
7797 return bfd_reloc_ok;
7798
252b5132
RH		 7799 default:
7800 return bfd_reloc_notsupported;
7801 }
7802}
7803
98c1d4aa
NC		 7804/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
7805static void
57e8b36a
NC		 7806arm_add_to_rel (bfd * abfd,
7807 bfd_byte * address,
7808 reloc_howto_type * howto,
7809 bfd_signed_vma increment)
98c1d4aa 7810{
98c1d4aa
NC		 7811 bfd_signed_vma addend;
7812
bd97cb95
DJ		 7813 if (howto->type == R_ARM_THM_CALL
7814 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 7815 {
9a5aca8c
AM		 7816 int upper_insn, lower_insn;
7817 int upper, lower;
98c1d4aa 7818
9a5aca8c
AM		 7819 upper_insn = bfd_get_16 (abfd, address);
7820 lower_insn = bfd_get_16 (abfd, address + 2);
7821 upper = upper_insn & 0x7ff;
7822 lower = lower_insn & 0x7ff;
7823
7824 addend = (upper << 12) | (lower << 1);
ddda4409 7825 addend += increment;
9a5aca8c 7826 addend >>= 1;
98c1d4aa 7827
9a5aca8c
AM		 7828 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
7829 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
7830
dc810e39
AM		 7831 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
7832 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 7833 }
7834 else
7835 {
7836 bfd_vma contents;
7837
7838 contents = bfd_get_32 (abfd, address);
7839
7840 /* Get the (signed) value from the instruction. */
7841 addend = contents & howto->src_mask;
7842 if (addend & ((howto->src_mask + 1) >> 1))
7843 {
7844 bfd_signed_vma mask;
7845
7846 mask = -1;
7847 mask &= ~ howto->src_mask;
7848 addend |= mask;
7849 }
7850
7851 /* Add in the increment, (which is a byte value). */
7852 switch (howto->type)
7853 {
7854 default:
7855 addend += increment;
7856 break;
7857
7858 case R_ARM_PC24:
c6596c5e 7859 case R_ARM_PLT32:
5b5bb741
PB		 7860 case R_ARM_CALL:
7861 case R_ARM_JUMP24:
9a5aca8c 7862 addend <<= howto->size;
dc810e39 7863 addend += increment;
9a5aca8c
AM		 7864
7865 /* Should we check for overflow here ? */
7866
7867 /* Drop any undesired bits. */
7868 addend >>= howto->rightshift;
7869 break;
7870 }
7871
7872 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
7873
7874 bfd_put_32 (abfd, contents, address);
ddda4409 7875 }
98c1d4aa 7876}
252b5132 7877
ba93b8ac
DJ		 7878#define IS_ARM_TLS_RELOC(R_TYPE) \
7879 ((R_TYPE) == R_ARM_TLS_GD32 \
7880 || (R_TYPE) == R_ARM_TLS_LDO32 \
7881 || (R_TYPE) == R_ARM_TLS_LDM32 \
7882 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
7883 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
7884 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
7885 || (R_TYPE) == R_ARM_TLS_LE32 \
7886 || (R_TYPE) == R_ARM_TLS_IE32)
7887
252b5132 7888/* Relocate an ARM ELF section. */
906e58ca 7889
b34976b6 7890static bfd_boolean
57e8b36a
NC		 7891elf32_arm_relocate_section (bfd * output_bfd,
7892 struct bfd_link_info * info,
7893 bfd * input_bfd,
7894 asection * input_section,
7895 bfd_byte * contents,
7896 Elf_Internal_Rela * relocs,
7897 Elf_Internal_Sym * local_syms,
7898 asection ** local_sections)
252b5132 7899{
b34976b6
AM		 7900 Elf_Internal_Shdr *symtab_hdr;
7901 struct elf_link_hash_entry **sym_hashes;
7902 Elf_Internal_Rela *rel;
7903 Elf_Internal_Rela *relend;
7904 const char *name;
b32d3aa2 7905 struct elf32_arm_link_hash_table * globals;
252b5132 7906
4e7fd91e 7907 globals = elf32_arm_hash_table (info);
b491616a 7908
0ffa91dd 7909 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 7910 sym_hashes = elf_sym_hashes (input_bfd);
7911
7912 rel = relocs;
7913 relend = relocs + input_section->reloc_count;
7914 for (; rel < relend; rel++)
7915 {
ba96a88f
NC		 7916 int r_type;
7917 reloc_howto_type * howto;
7918 unsigned long r_symndx;
7919 Elf_Internal_Sym * sym;
7920 asection * sec;
252b5132 7921 struct elf_link_hash_entry * h;
ba96a88f
NC		 7922 bfd_vma relocation;
7923 bfd_reloc_status_type r;
7924 arelent bfd_reloc;
ba93b8ac 7925 char sym_type;
0945cdfd 7926 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 7927 char *error_message = NULL;
f21f3fe0 7928
252b5132 7929 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 7930 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 7931 r_type = arm_real_reloc_type (globals, r_type);
252b5132 7932
ba96a88f
NC		 7933 if ( r_type == R_ARM_GNU_VTENTRY
7934 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 7935 continue;
7936
b32d3aa2 7937 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 7938 howto = bfd_reloc.howto;
252b5132 7939
252b5132
RH		 7940 h = NULL;
7941 sym = NULL;
7942 sec = NULL;
9b485d32 7943
252b5132
RH		 7944 if (r_symndx < symtab_hdr->sh_info)
7945 {
7946 sym = local_syms + r_symndx;
ba93b8ac 7947 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 7948 sec = local_sections[r_symndx];
4e7fd91e 7949 if (globals->use_rel)
f8df10f4 7950 {
4e7fd91e
PB		 7951 relocation = (sec->output_section->vma
7952 + sec->output_offset
7953 + sym->st_value);
ab96bf03
AM		 7954 if (!info->relocatable
7955 && (sec->flags & SEC_MERGE)
7956 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 7957 {
4e7fd91e
PB		 7958 asection *msec;
7959 bfd_vma addend, value;
7960
39623e12 7961 switch (r_type)
4e7fd91e 7962 {
39623e12
PB		 7963 case R_ARM_MOVW_ABS_NC:
7964 case R_ARM_MOVT_ABS:
7965 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
7966 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
7967 addend = (addend ^ 0x8000) - 0x8000;
7968 break;
f8df10f4 7969
39623e12
PB		 7970 case R_ARM_THM_MOVW_ABS_NC:
7971 case R_ARM_THM_MOVT_ABS:
7972 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
7973 << 16;
7974 value |= bfd_get_16 (input_bfd,
7975 contents + rel->r_offset + 2);
7976 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
7977 | ((value & 0x04000000) >> 15);
7978 addend = (addend ^ 0x8000) - 0x8000;
7979 break;
f8df10f4 7980
39623e12
PB		 7981 default:
7982 if (howto->rightshift
7983 || (howto->src_mask & (howto->src_mask + 1)))
7984 {
7985 (*_bfd_error_handler)
7986 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
7987 input_bfd, input_section,
7988 (long) rel->r_offset, howto->name);
7989 return FALSE;
7990 }
7991
7992 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
7993
7994 /* Get the (signed) value from the instruction. */
7995 addend = value & howto->src_mask;
7996 if (addend & ((howto->src_mask + 1) >> 1))
7997 {
7998 bfd_signed_vma mask;
7999
8000 mask = -1;
8001 mask &= ~ howto->src_mask;
8002 addend |= mask;
8003 }
8004 break;
4e7fd91e 8005 }
39623e12 8006
4e7fd91e
PB		 8007 msec = sec;
8008 addend =
8009 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8010 - relocation;
8011 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8012
8013 /* Cases here must match those in the preceeding
8014 switch statement. */
8015 switch (r_type)
8016 {
8017 case R_ARM_MOVW_ABS_NC:
8018 case R_ARM_MOVT_ABS:
8019 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8020 | (addend & 0xfff);
8021 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8022 break;
8023
8024 case R_ARM_THM_MOVW_ABS_NC:
8025 case R_ARM_THM_MOVT_ABS:
8026 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8027 | (addend & 0xff) | ((addend & 0x0800) << 15);
8028 bfd_put_16 (input_bfd, value >> 16,
8029 contents + rel->r_offset);
8030 bfd_put_16 (input_bfd, value,
8031 contents + rel->r_offset + 2);
8032 break;
8033
8034 default:
8035 value = (value & ~ howto->dst_mask)
8036 | (addend & howto->dst_mask);
8037 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8038 break;
8039 }
f8df10f4 8040 }
f8df10f4 8041 }
4e7fd91e
PB		 8042 else
8043 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8044 }
8045 else
8046 {
560e09e9 8047 bfd_boolean warned;
560e09e9 8048
b2a8e766
AM		 8049 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8050 r_symndx, symtab_hdr, sym_hashes,
8051 h, sec, relocation,
8052 unresolved_reloc, warned);
ba93b8ac
DJ		 8053
8054 sym_type = h->type;
252b5132
RH		 8055 }
8056
ab96bf03
AM		 8057 if (sec != NULL && elf_discarded_section (sec))
8058 {
8059 /* For relocs against symbols from removed linkonce sections,
8060 or sections discarded by a linker script, we just want the
8061 section contents zeroed. Avoid any special processing. */
8062 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
8063 rel->r_info = 0;
8064 rel->r_addend = 0;
8065 continue;
8066 }
8067
8068 if (info->relocatable)
8069 {
8070 /* This is a relocatable link. We don't have to change
8071 anything, unless the reloc is against a section symbol,
8072 in which case we have to adjust according to where the
8073 section symbol winds up in the output section. */
8074 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8075 {
8076 if (globals->use_rel)
8077 arm_add_to_rel (input_bfd, contents + rel->r_offset,
8078 howto, (bfd_signed_vma) sec->output_offset);
8079 else
8080 rel->r_addend += sec->output_offset;
8081 }
8082 continue;
8083 }
8084
252b5132
RH		 8085 if (h != NULL)
8086 name = h->root.root.string;
8087 else
8088 {
8089 name = (bfd_elf_string_from_elf_section
8090 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8091 if (name == NULL || *name == '\0')
8092 name = bfd_section_name (input_bfd, sec);
8093 }
f21f3fe0 8094
ba93b8ac
DJ		 8095 if (r_symndx != 0
8096 && r_type != R_ARM_NONE
8097 && (h == NULL
8098 || h->root.type == bfd_link_hash_defined
8099 || h->root.type == bfd_link_hash_defweak)
8100 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
8101 {
8102 (*_bfd_error_handler)
8103 ((sym_type == STT_TLS
8104 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
8105 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
8106 input_bfd,
8107 input_section,
8108 (long) rel->r_offset,
8109 howto->name,
8110 name);
8111 }
8112
252b5132
RH		 8113 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
8114 input_section, contents, rel,
8115 relocation, info, sec, name,
8116 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 8117 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 8118 &unresolved_reloc, &error_message);
0945cdfd
DJ		 8119
8120 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8121 because such sections are not SEC_ALLOC and thus ld.so will
8122 not process them. */
8123 if (unresolved_reloc
8124 && !((input_section->flags & SEC_DEBUGGING) != 0
8125 && h->def_dynamic))
8126 {
8127 (*_bfd_error_handler)
843fe662
L		 8128 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
8129 input_bfd,
8130 input_section,
8131 (long) rel->r_offset,
8132 howto->name,
8133 h->root.root.string);
0945cdfd
DJ		 8134 return FALSE;
8135 }
252b5132
RH		 8136
8137 if (r != bfd_reloc_ok)
8138 {
252b5132
RH		 8139 switch (r)
8140 {
8141 case bfd_reloc_overflow:
cf919dfd
PB		 8142 /* If the overflowing reloc was to an undefined symbol,
8143 we have already printed one error message and there
8144 is no point complaining again. */
8145 if ((! h ||
8146 h->root.type != bfd_link_hash_undefined)
8147 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 8148 (info, (h ? &h->root : NULL), name, howto->name,
8149 (bfd_vma) 0, input_bfd, input_section,
8150 rel->r_offset))))
b34976b6 8151 return FALSE;
252b5132
RH		 8152 break;
8153
8154 case bfd_reloc_undefined:
8155 if (!((*info->callbacks->undefined_symbol)
8156 (info, name, input_bfd, input_section,
b34976b6
AM		 8157 rel->r_offset, TRUE)))
8158 return FALSE;
252b5132
RH		 8159 break;
8160
8161 case bfd_reloc_outofrange:
f2a9dd69 8162 error_message = _("out of range");
252b5132
RH		 8163 goto common_error;
8164
8165 case bfd_reloc_notsupported:
f2a9dd69 8166 error_message = _("unsupported relocation");
252b5132
RH		 8167 goto common_error;
8168
8169 case bfd_reloc_dangerous:
f2a9dd69 8170 /* error_message should already be set. */
252b5132
RH		 8171 goto common_error;
8172
8173 default:
f2a9dd69 8174 error_message = _("unknown error");
8029a119 8175 /* Fall through. */
252b5132
RH		 8176
8177 common_error:
f2a9dd69
DJ		 8178 BFD_ASSERT (error_message != NULL);
8179 if (!((*info->callbacks->reloc_dangerous)
8180 (info, error_message, input_bfd, input_section,
252b5132 8181 rel->r_offset)))
b34976b6 8182 return FALSE;
252b5132
RH		 8183 break;
8184 }
8185 }
8186 }
8187
b34976b6 8188 return TRUE;
252b5132
RH		 8189}
8190
2468f9c9
PB		 8191/* Add a new unwind edit to the list described by HEAD, TAIL. If INDEX is zero,
8192 adds the edit to the start of the list. (The list must be built in order of
8193 ascending INDEX: the function's callers are primarily responsible for
8194 maintaining that condition). */
8195
8196static void
8197add_unwind_table_edit (arm_unwind_table_edit **head,
8198 arm_unwind_table_edit **tail,
8199 arm_unwind_edit_type type,
8200 asection *linked_section,
8201 unsigned int index)
8202{
8203 arm_unwind_table_edit *new_edit = xmalloc (sizeof (arm_unwind_table_edit));
8204
8205 new_edit->type = type;
8206 new_edit->linked_section = linked_section;
8207 new_edit->index = index;
8208
8209 if (index > 0)
8210 {
8211 new_edit->next = NULL;
8212
8213 if (*tail)
8214 (*tail)->next = new_edit;
8215
8216 (*tail) = new_edit;
8217
8218 if (!*head)
8219 (*head) = new_edit;
8220 }
8221 else
8222 {
8223 new_edit->next = *head;
8224
8225 if (!*tail)
8226 *tail = new_edit;
8227
8228 *head = new_edit;
8229 }
8230}
8231
8232static _arm_elf_section_data *get_arm_elf_section_data (asection *);
8233
8234/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
8235static void
8236adjust_exidx_size(asection *exidx_sec, int adjust)
8237{
8238 asection *out_sec;
8239
8240 if (!exidx_sec->rawsize)
8241 exidx_sec->rawsize = exidx_sec->size;
8242
8243 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
8244 out_sec = exidx_sec->output_section;
8245 /* Adjust size of output section. */
8246 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
8247}
8248
8249/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
8250static void
8251insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
8252{
8253 struct _arm_elf_section_data *exidx_arm_data;
8254
8255 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
8256 add_unwind_table_edit (
8257 &exidx_arm_data->u.exidx.unwind_edit_list,
8258 &exidx_arm_data->u.exidx.unwind_edit_tail,
8259 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
8260
8261 adjust_exidx_size(exidx_sec, 8);
8262}
8263
8264/* Scan .ARM.exidx tables, and create a list describing edits which should be
8265 made to those tables, such that:
8266
8267 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
8268 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
8269 codes which have been inlined into the index).
8270
8271 The edits are applied when the tables are written
8272 (in elf32_arm_write_section).
8273*/
8274
8275bfd_boolean
8276elf32_arm_fix_exidx_coverage (asection **text_section_order,
8277 unsigned int num_text_sections,
8278 struct bfd_link_info *info)
8279{
8280 bfd *inp;
8281 unsigned int last_second_word = 0, i;
8282 asection *last_exidx_sec = NULL;
8283 asection *last_text_sec = NULL;
8284 int last_unwind_type = -1;
8285
8286 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
8287 text sections. */
8288 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
8289 {
8290 asection *sec;
8291
8292 for (sec = inp->sections; sec != NULL; sec = sec->next)
8293 {
8294 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
8295 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
8296
8297 if (hdr->sh_type != SHT_ARM_EXIDX)
8298 continue;
8299
8300 if (elf_sec->linked_to)
8301 {
8302 Elf_Internal_Shdr *linked_hdr
8303 = &elf_section_data (elf_sec->linked_to)->this_hdr;
8304 struct _arm_elf_section_data *linked_sec_arm_data
8305 = get_arm_elf_section_data (linked_hdr->bfd_section);
8306
8307 if (linked_sec_arm_data == NULL)
8308 continue;
8309
8310 /* Link this .ARM.exidx section back from the text section it
8311 describes. */
8312 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
8313 }
8314 }
8315 }
8316
8317 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
8318 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
8319 and add EXIDX_CANTUNWIND entries for sections with no unwind table data.
8320 */
8321
8322 for (i = 0; i < num_text_sections; i++)
8323 {
8324 asection *sec = text_section_order[i];
8325 asection *exidx_sec;
8326 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
8327 struct _arm_elf_section_data *exidx_arm_data;
8328 bfd_byte *contents = NULL;
8329 int deleted_exidx_bytes = 0;
8330 bfd_vma j;
8331 arm_unwind_table_edit *unwind_edit_head = NULL;
8332 arm_unwind_table_edit *unwind_edit_tail = NULL;
8333 Elf_Internal_Shdr *hdr;
8334 bfd *ibfd;
8335
8336 if (arm_data == NULL)
8337 continue;
8338
8339 exidx_sec = arm_data->u.text.arm_exidx_sec;
8340 if (exidx_sec == NULL)
8341 {
8342 /* Section has no unwind data. */
8343 if (last_unwind_type == 0 || !last_exidx_sec)
8344 continue;
8345
8346 /* Ignore zero sized sections. */
8347 if (sec->size == 0)
8348 continue;
8349
8350 insert_cantunwind_after(last_text_sec, last_exidx_sec);
8351 last_unwind_type = 0;
8352 continue;
8353 }
8354
22a8f80e
PB		 8355 /* Skip /DISCARD/ sections. */
8356 if (bfd_is_abs_section (exidx_sec->output_section))
8357 continue;
8358
2468f9c9
PB		 8359 hdr = &elf_section_data (exidx_sec)->this_hdr;
8360 if (hdr->sh_type != SHT_ARM_EXIDX)
8361 continue;
8362
8363 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
8364 if (exidx_arm_data == NULL)
8365 continue;
8366
8367 ibfd = exidx_sec->owner;
8368
8369 if (hdr->contents != NULL)
8370 contents = hdr->contents;
8371 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
8372 /* An error? */
8373 continue;
8374
8375 for (j = 0; j < hdr->sh_size; j += 8)
8376 {
8377 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
8378 int unwind_type;
8379 int elide = 0;
8380
8381 /* An EXIDX_CANTUNWIND entry. */
8382 if (second_word == 1)
8383 {
8384 if (last_unwind_type == 0)
8385 elide = 1;
8386 unwind_type = 0;
8387 }
8388 /* Inlined unwinding data. Merge if equal to previous. */
8389 else if ((second_word & 0x80000000) != 0)
8390 {
8391 if (last_second_word == second_word && last_unwind_type == 1)
8392 elide = 1;
8393 unwind_type = 1;
8394 last_second_word = second_word;
8395 }
8396 /* Normal table entry. In theory we could merge these too,
8397 but duplicate entries are likely to be much less common. */
8398 else
8399 unwind_type = 2;
8400
8401 if (elide)
8402 {
8403 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
8404 DELETE_EXIDX_ENTRY, NULL, j / 8);
8405
8406 deleted_exidx_bytes += 8;
8407 }
8408
8409 last_unwind_type = unwind_type;
8410 }
8411
8412 /* Free contents if we allocated it ourselves. */
8413 if (contents != hdr->contents)
8414 free (contents);
8415
8416 /* Record edits to be applied later (in elf32_arm_write_section). */
8417 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
8418 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
8419
8420 if (deleted_exidx_bytes > 0)
8421 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
8422
8423 last_exidx_sec = exidx_sec;
8424 last_text_sec = sec;
8425 }
8426
8427 /* Add terminating CANTUNWIND entry. */
8428 if (last_exidx_sec && last_unwind_type != 0)
8429 insert_cantunwind_after(last_text_sec, last_exidx_sec);
8430
8431 return TRUE;
8432}
8433
3e6b1042
DJ		 8434static bfd_boolean
8435elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
8436 bfd *ibfd, const char *name)
8437{
8438 asection *sec, *osec;
8439
8440 sec = bfd_get_section_by_name (ibfd, name);
8441 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
8442 return TRUE;
8443
8444 osec = sec->output_section;
8445 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
8446 return TRUE;
8447
8448 if (! bfd_set_section_contents (obfd, osec, sec->contents,
8449 sec->output_offset, sec->size))
8450 return FALSE;
8451
8452 return TRUE;
8453}
8454
8455static bfd_boolean
8456elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
8457{
8458 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
8459
8460 /* Invoke the regular ELF backend linker to do all the work. */
8461 if (!bfd_elf_final_link (abfd, info))
8462 return FALSE;
8463
8464 /* Write out any glue sections now that we have created all the
8465 stubs. */
8466 if (globals->bfd_of_glue_owner != NULL)
8467 {
8468 if (! elf32_arm_output_glue_section (info, abfd,
8469 globals->bfd_of_glue_owner,
8470 ARM2THUMB_GLUE_SECTION_NAME))
8471 return FALSE;
8472
8473 if (! elf32_arm_output_glue_section (info, abfd,
8474 globals->bfd_of_glue_owner,
8475 THUMB2ARM_GLUE_SECTION_NAME))
8476 return FALSE;
8477
8478 if (! elf32_arm_output_glue_section (info, abfd,
8479 globals->bfd_of_glue_owner,
8480 VFP11_ERRATUM_VENEER_SECTION_NAME))
8481 return FALSE;
8482
8483 if (! elf32_arm_output_glue_section (info, abfd,
8484 globals->bfd_of_glue_owner,
8485 ARM_BX_GLUE_SECTION_NAME))
8486 return FALSE;
8487 }
8488
8489 return TRUE;
8490}
8491
c178919b
NC		 8492/* Set the right machine number. */
8493
8494static bfd_boolean
57e8b36a 8495elf32_arm_object_p (bfd *abfd)
c178919b 8496{
5a6c6817 8497 unsigned int mach;
57e8b36a 8498
5a6c6817 8499 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 8500
5a6c6817
NC		 8501 if (mach != bfd_mach_arm_unknown)
8502 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
8503
8504 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
8505 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 8506
e16bb312 8507 else
5a6c6817 8508 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 8509
8510 return TRUE;
8511}
8512
fc830a83 8513/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 8514
b34976b6 8515static bfd_boolean
57e8b36a 8516elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 8517{
8518 if (elf_flags_init (abfd)
8519 && elf_elfheader (abfd)->e_flags != flags)
8520 {
fc830a83
NC		 8521 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
8522 {
fd2ec330 8523 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 8524 (*_bfd_error_handler)
8525 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
8526 abfd);
fc830a83 8527 else
d003868e
AM		 8528 _bfd_error_handler
8529 (_("Warning: Clearing the interworking flag of %B due to outside request"),
8530 abfd);
fc830a83 8531 }
252b5132
RH		 8532 }
8533 else
8534 {
8535 elf_elfheader (abfd)->e_flags = flags;
b34976b6 8536 elf_flags_init (abfd) = TRUE;
252b5132
RH		 8537 }
8538
b34976b6 8539 return TRUE;
252b5132
RH		 8540}
8541
fc830a83 8542/* Copy backend specific data from one object module to another. */
9b485d32 8543
b34976b6 8544static bfd_boolean
57e8b36a 8545elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 8546{
8547 flagword in_flags;
8548 flagword out_flags;
8549
0ffa91dd 8550 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 8551 return TRUE;
252b5132 8552
fc830a83 8553 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 8554 out_flags = elf_elfheader (obfd)->e_flags;
8555
fc830a83
NC		 8556 if (elf_flags_init (obfd)
8557 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
8558 && in_flags != out_flags)
252b5132 8559 {
252b5132 8560 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 8561 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 8562 return FALSE;
252b5132
RH		 8563
8564 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 8565 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 8566 return FALSE;
252b5132
RH		 8567
8568 /* If the src and dest have different interworking flags
8569 then turn off the interworking bit. */
fd2ec330 8570 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 8571 {
fd2ec330 8572 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 8573 _bfd_error_handler
8574 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
8575 obfd, ibfd);
252b5132 8576
fd2ec330 8577 in_flags &= ~EF_ARM_INTERWORK;
252b5132 8578 }
1006ba19
PB		 8579
8580 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 8581 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
8582 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 8583 }
8584
8585 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 8586 elf_flags_init (obfd) = TRUE;
252b5132 8587
94a3258f
PB		 8588 /* Also copy the EI_OSABI field. */
8589 elf_elfheader (obfd)->e_ident[EI_OSABI] =
8590 elf_elfheader (ibfd)->e_ident[EI_OSABI];
8591
104d59d1
JM		 8592 /* Copy object attributes. */
8593 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 8594
8595 return TRUE;
8596}
8597
8598/* Values for Tag_ABI_PCS_R9_use. */
8599enum
8600{
8601 AEABI_R9_V6,
8602 AEABI_R9_SB,
8603 AEABI_R9_TLS,
8604 AEABI_R9_unused
8605};
8606
8607/* Values for Tag_ABI_PCS_RW_data. */
8608enum
8609{
8610 AEABI_PCS_RW_data_absolute,
8611 AEABI_PCS_RW_data_PCrel,
8612 AEABI_PCS_RW_data_SBrel,
8613 AEABI_PCS_RW_data_unused
8614};
8615
8616/* Values for Tag_ABI_enum_size. */
8617enum
8618{
8619 AEABI_enum_unused,
8620 AEABI_enum_short,
8621 AEABI_enum_wide,
8622 AEABI_enum_forced_wide
8623};
8624
104d59d1
JM		 8625/* Determine whether an object attribute tag takes an integer, a
8626 string or both. */
906e58ca 8627
104d59d1
JM		 8628static int
8629elf32_arm_obj_attrs_arg_type (int tag)
8630{
8631 if (tag == Tag_compatibility)
3483fe2e 8632 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 8633 else if (tag == Tag_nodefaults)
3483fe2e
AS		 8634 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
8635 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
8636 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 8637 else if (tag < 32)
3483fe2e 8638 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 8639 else
3483fe2e 8640 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 8641}
8642
5aa6ff7c
AS		 8643/* The ABI defines that Tag_conformance should be emitted first, and that
8644 Tag_nodefaults should be second (if either is defined). This sets those
8645 two positions, and bumps up the position of all the remaining tags to
8646 compensate. */
8647static int
8648elf32_arm_obj_attrs_order (int num)
8649{
8650 if (num == 4)
8651 return Tag_conformance;
8652 if (num == 5)
8653 return Tag_nodefaults;
8654 if ((num - 2) < Tag_nodefaults)
8655 return num - 2;
8656 if ((num - 1) < Tag_conformance)
8657 return num - 1;
8658 return num;
8659}
8660
91e22acd
AS		 8661/* Read the architecture from the Tag_also_compatible_with attribute, if any.
8662 Returns -1 if no architecture could be read. */
8663
8664static int
8665get_secondary_compatible_arch (bfd *abfd)
8666{
8667 obj_attribute *attr =
8668 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8669
8670 /* Note: the tag and its argument below are uleb128 values, though
8671 currently-defined values fit in one byte for each. */
8672 if (attr->s
8673 && attr->s[0] == Tag_CPU_arch
8674 && (attr->s[1] & 128) != 128
8675 && attr->s[2] == 0)
8676 return attr->s[1];
8677
8678 /* This tag is "safely ignorable", so don't complain if it looks funny. */
8679 return -1;
8680}
8681
8682/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8683 The tag is removed if ARCH is -1. */
8684
8e79c3df 8685static void
91e22acd 8686set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 8687{
91e22acd
AS		 8688 obj_attribute *attr =
8689 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 8690
91e22acd
AS		 8691 if (arch == -1)
8692 {
8693 attr->s = NULL;
8694 return;
8e79c3df 8695 }
91e22acd
AS		 8696
8697 /* Note: the tag and its argument below are uleb128 values, though
8698 currently-defined values fit in one byte for each. */
8699 if (!attr->s)
8700 attr->s = bfd_alloc (abfd, 3);
8701 attr->s[0] = Tag_CPU_arch;
8702 attr->s[1] = arch;
8703 attr->s[2] = '\0';
8e79c3df
CM		 8704}
8705
91e22acd
AS		 8706/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8707 into account. */
8708
8709static int
8710tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
8711 int newtag, int secondary_compat)
8e79c3df 8712{
91e22acd
AS		 8713#define T(X) TAG_CPU_ARCH_##X
8714 int tagl, tagh, result;
8715 const int v6t2[] =
8716 {
8717 T(V6T2), /* PRE_V4. */
8718 T(V6T2), /* V4. */
8719 T(V6T2), /* V4T. */
8720 T(V6T2), /* V5T. */
8721 T(V6T2), /* V5TE. */
8722 T(V6T2), /* V5TEJ. */
8723 T(V6T2), /* V6. */
8724 T(V7), /* V6KZ. */
8725 T(V6T2) /* V6T2. */
8726 };
8727 const int v6k[] =
8728 {
8729 T(V6K), /* PRE_V4. */
8730 T(V6K), /* V4. */
8731 T(V6K), /* V4T. */
8732 T(V6K), /* V5T. */
8733 T(V6K), /* V5TE. */
8734 T(V6K), /* V5TEJ. */
8735 T(V6K), /* V6. */
8736 T(V6KZ), /* V6KZ. */
8737 T(V7), /* V6T2. */
8738 T(V6K) /* V6K. */
8739 };
8740 const int v7[] =
8741 {
8742 T(V7), /* PRE_V4. */
8743 T(V7), /* V4. */
8744 T(V7), /* V4T. */
8745 T(V7), /* V5T. */
8746 T(V7), /* V5TE. */
8747 T(V7), /* V5TEJ. */
8748 T(V7), /* V6. */
8749 T(V7), /* V6KZ. */
8750 T(V7), /* V6T2. */
8751 T(V7), /* V6K. */
8752 T(V7) /* V7. */
8753 };
8754 const int v6_m[] =
8755 {
8756 -1, /* PRE_V4. */
8757 -1, /* V4. */
8758 T(V6K), /* V4T. */
8759 T(V6K), /* V5T. */
8760 T(V6K), /* V5TE. */
8761 T(V6K), /* V5TEJ. */
8762 T(V6K), /* V6. */
8763 T(V6KZ), /* V6KZ. */
8764 T(V7), /* V6T2. */
8765 T(V6K), /* V6K. */
8766 T(V7), /* V7. */
8767 T(V6_M) /* V6_M. */
8768 };
8769 const int v6s_m[] =
8770 {
8771 -1, /* PRE_V4. */
8772 -1, /* V4. */
8773 T(V6K), /* V4T. */
8774 T(V6K), /* V5T. */
8775 T(V6K), /* V5TE. */
8776 T(V6K), /* V5TEJ. */
8777 T(V6K), /* V6. */
8778 T(V6KZ), /* V6KZ. */
8779 T(V7), /* V6T2. */
8780 T(V6K), /* V6K. */
8781 T(V7), /* V7. */
8782 T(V6S_M), /* V6_M. */
8783 T(V6S_M) /* V6S_M. */
8784 };
8785 const int v4t_plus_v6_m[] =
8786 {
8787 -1, /* PRE_V4. */
8788 -1, /* V4. */
8789 T(V4T), /* V4T. */
8790 T(V5T), /* V5T. */
8791 T(V5TE), /* V5TE. */
8792 T(V5TEJ), /* V5TEJ. */
8793 T(V6), /* V6. */
8794 T(V6KZ), /* V6KZ. */
8795 T(V6T2), /* V6T2. */
8796 T(V6K), /* V6K. */
8797 T(V7), /* V7. */
8798 T(V6_M), /* V6_M. */
8799 T(V6S_M), /* V6S_M. */
8800 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
8801 };
8802 const int *comb[] =
8803 {
8804 v6t2,
8805 v6k,
8806 v7,
8807 v6_m,
8808 v6s_m,
8809 /* Pseudo-architecture. */
8810 v4t_plus_v6_m
8811 };
8812
8813 /* Check we've not got a higher architecture than we know about. */
8814
8815 if (oldtag >= MAX_TAG_CPU_ARCH || newtag >= MAX_TAG_CPU_ARCH)
8816 {
3895f852 8817 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 8818 return -1;
8819 }
8820
8821 /* Override old tag if we have a Tag_also_compatible_with on the output. */
8822
8823 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
8824 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
8825 oldtag = T(V4T_PLUS_V6_M);
8826
8827 /* And override the new tag if we have a Tag_also_compatible_with on the
8828 input. */
8829
8830 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
8831 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
8832 newtag = T(V4T_PLUS_V6_M);
8833
8834 tagl = (oldtag < newtag) ? oldtag : newtag;
8835 result = tagh = (oldtag > newtag) ? oldtag : newtag;
8836
8837 /* Architectures before V6KZ add features monotonically. */
8838 if (tagh <= TAG_CPU_ARCH_V6KZ)
8839 return result;
8840
8841 result = comb[tagh - T(V6T2)][tagl];
8842
8843 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8844 as the canonical version. */
8845 if (result == T(V4T_PLUS_V6_M))
8846 {
8847 result = T(V4T);
8848 *secondary_compat_out = T(V6_M);
8849 }
8850 else
8851 *secondary_compat_out = -1;
8852
8853 if (result == -1)
8854 {
3895f852 8855 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 8856 ibfd, oldtag, newtag);
8857 return -1;
8858 }
8859
8860 return result;
8861#undef T
8e79c3df
CM		 8862}
8863
ee065d83
PB		 8864/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
8865 are conflicting attributes. */
906e58ca 8866
ee065d83
PB		 8867static bfd_boolean
8868elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
8869{
104d59d1
JM		 8870 obj_attribute *in_attr;
8871 obj_attribute *out_attr;
8872 obj_attribute_list *in_list;
8e79c3df 8873 obj_attribute_list *out_list;
91e22acd 8874 obj_attribute_list **out_listp;
ee065d83
PB		 8875 /* Some tags have 0 = don't care, 1 = strong requirement,
8876 2 = weak requirement. */
91e22acd 8877 static const int order_021[3] = {0, 2, 1};
b1cc4aeb
PB		 8878 /* For use with Tag_VFP_arch. */
8879 static const int order_01243[5] = {0, 1, 2, 4, 3};
ee065d83 8880 int i;
91e22acd 8881 bfd_boolean result = TRUE;
ee065d83 8882
3e6b1042
DJ		 8883 /* Skip the linker stubs file. This preserves previous behavior
8884 of accepting unknown attributes in the first input file - but
8885 is that a bug? */
8886 if (ibfd->flags & BFD_LINKER_CREATED)
8887 return TRUE;
8888
104d59d1 8889 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 8890 {
8891 /* This is the first object. Copy the attributes. */
104d59d1 8892 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 8893
8894 /* Use the Tag_null value to indicate the attributes have been
8895 initialized. */
104d59d1 8896 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 8897
ee065d83
PB		 8898 return TRUE;
8899 }
8900
104d59d1
JM		 8901 in_attr = elf_known_obj_attributes_proc (ibfd);
8902 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 8903 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
8904 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
8905 {
8e79c3df 8906 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 8907 if (out_attr[Tag_ABI_FP_number_model].i == 0)
8908 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
8909 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
8910 {
8911 _bfd_error_handler
3895f852 8912 (_("error: %B uses VFP register arguments, %B does not"),
ee065d83 8913 ibfd, obfd);
91e22acd 8914 result = FALSE;
ee065d83
PB		 8915 }
8916 }
8917
104d59d1 8918 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 8919 {
8920 /* Merge this attribute with existing attributes. */
8921 switch (i)
8922 {
8923 case Tag_CPU_raw_name:
8924 case Tag_CPU_name:
91e22acd 8925 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 8926 break;
8927
8928 case Tag_ABI_optimization_goals:
8929 case Tag_ABI_FP_optimization_goals:
8930 /* Use the first value seen. */
8931 break;
8932
8933 case Tag_CPU_arch:
91e22acd
AS		 8934 {
8935 int secondary_compat = -1, secondary_compat_out = -1;
8936 unsigned int saved_out_attr = out_attr[i].i;
8937 static const char *name_table[] = {
8938 /* These aren't real CPU names, but we can't guess
8939 that from the architecture version alone. */
8940 "Pre v4",
8941 "ARM v4",
8942 "ARM v4T",
8943 "ARM v5T",
8944 "ARM v5TE",
8945 "ARM v5TEJ",
8946 "ARM v6",
8947 "ARM v6KZ",
8948 "ARM v6T2",
8949 "ARM v6K",
8950 "ARM v7",
8951 "ARM v6-M",
8952 "ARM v6S-M"
8953 };
8954
8955 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
8956 secondary_compat = get_secondary_compatible_arch (ibfd);
8957 secondary_compat_out = get_secondary_compatible_arch (obfd);
8958 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
8959 &secondary_compat_out,
8960 in_attr[i].i,
8961 secondary_compat);
8962 set_secondary_compatible_arch (obfd, secondary_compat_out);
8963
8964 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
8965 if (out_attr[i].i == saved_out_attr)
8966 ; /* Leave the names alone. */
8967 else if (out_attr[i].i == in_attr[i].i)
8968 {
8969 /* The output architecture has been changed to match the
8970 input architecture. Use the input names. */
8971 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
8972 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
8973 : NULL;
8974 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
8975 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
8976 : NULL;
8977 }
8978 else
8979 {
8980 out_attr[Tag_CPU_name].s = NULL;
8981 out_attr[Tag_CPU_raw_name].s = NULL;
8982 }
8983
8984 /* If we still don't have a value for Tag_CPU_name,
8985 make one up now. Tag_CPU_raw_name remains blank. */
8986 if (out_attr[Tag_CPU_name].s == NULL
8987 && out_attr[i].i < ARRAY_SIZE (name_table))
8988 out_attr[Tag_CPU_name].s =
8989 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
8990 }
8991 break;
8992
ee065d83
PB		 8993 case Tag_ARM_ISA_use:
8994 case Tag_THUMB_ISA_use:
ee065d83 8995 case Tag_WMMX_arch:
91e22acd
AS		 8996 case Tag_Advanced_SIMD_arch:
8997 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 8998 case Tag_ABI_FP_rounding:
ee065d83
PB		 8999 case Tag_ABI_FP_exceptions:
9000 case Tag_ABI_FP_user_exceptions:
9001 case Tag_ABI_FP_number_model:
91e22acd
AS		 9002 case Tag_VFP_HP_extension:
9003 case Tag_CPU_unaligned_access:
9004 case Tag_T2EE_use:
9005 case Tag_Virtualization_use:
9006 case Tag_MPextension_use:
ee065d83
PB		 9007 /* Use the largest value specified. */
9008 if (in_attr[i].i > out_attr[i].i)
9009 out_attr[i].i = in_attr[i].i;
9010 break;
9011
91e22acd
AS		 9012 case Tag_ABI_align8_preserved:
9013 case Tag_ABI_PCS_RO_data:
9014 /* Use the smallest value specified. */
9015 if (in_attr[i].i < out_attr[i].i)
9016 out_attr[i].i = in_attr[i].i;
9017 break;
9018
9019 case Tag_ABI_align8_needed:
9020 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
9021 && (in_attr[Tag_ABI_align8_preserved].i == 0
9022 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 9023 {
91e22acd
AS		 9024 /* This error message should be enabled once all non-conformant
9025 binaries in the toolchain have had the attributes set
9026 properly.
ee065d83 9027 _bfd_error_handler
3895f852 9028 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 9029 obfd, ibfd);
9030 result = FALSE; */
ee065d83 9031 }
91e22acd
AS		 9032 /* Fall through. */
9033 case Tag_ABI_FP_denormal:
9034 case Tag_ABI_PCS_GOT_use:
9035 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
9036 value if greater than 2 (for future-proofing). */
9037 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
9038 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
9039 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 9040 out_attr[i].i = in_attr[i].i;
9041 break;
91e22acd
AS		 9042
9043
9044 case Tag_CPU_arch_profile:
9045 if (out_attr[i].i != in_attr[i].i)
9046 {
9047 /* 0 will merge with anything.
9048 'A' and 'S' merge to 'A'.
9049 'R' and 'S' merge to 'R'.
9050 'M' and 'A|R|S' is an error. */
9051 if (out_attr[i].i == 0
9052 || (out_attr[i].i == 'S'
9053 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
9054 out_attr[i].i = in_attr[i].i;
9055 else if (in_attr[i].i == 0
9056 || (in_attr[i].i == 'S'
9057 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
9058 ; /* Do nothing. */
9059 else
9060 {
9061 _bfd_error_handler
3895f852 9062 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 9063 ibfd,
9064 in_attr[i].i ? in_attr[i].i : '0',
9065 out_attr[i].i ? out_attr[i].i : '0');
9066 result = FALSE;
9067 }
9068 }
9069 break;
b1cc4aeb 9070 case Tag_VFP_arch:
91e22acd
AS		 9071 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
9072 largest value if greater than 4 (for future-proofing). */
9073 if ((in_attr[i].i > 4 && in_attr[i].i > out_attr[i].i)
9074 || (in_attr[i].i <= 4 && out_attr[i].i <= 4
9075 && order_01243[in_attr[i].i] > order_01243[out_attr[i].i]))
b1cc4aeb
PB		 9076 out_attr[i].i = in_attr[i].i;
9077 break;
ee065d83
PB		 9078 case Tag_PCS_config:
9079 if (out_attr[i].i == 0)
9080 out_attr[i].i = in_attr[i].i;
9081 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
9082 {
9083 /* It's sometimes ok to mix different configs, so this is only
9084 a warning. */
9085 _bfd_error_handler
9086 (_("Warning: %B: Conflicting platform configuration"), ibfd);
9087 }
9088 break;
9089 case Tag_ABI_PCS_R9_use:
004ae526
PB		 9090 if (in_attr[i].i != out_attr[i].i
9091 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 9092 && in_attr[i].i != AEABI_R9_unused)
9093 {
9094 _bfd_error_handler
3895f852 9095 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 9096 result = FALSE;
ee065d83
PB		 9097 }
9098 if (out_attr[i].i == AEABI_R9_unused)
9099 out_attr[i].i = in_attr[i].i;
9100 break;
9101 case Tag_ABI_PCS_RW_data:
9102 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
9103 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
9104 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
9105 {
9106 _bfd_error_handler
3895f852 9107 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 9108 ibfd);
91e22acd 9109 result = FALSE;
ee065d83
PB		 9110 }
9111 /* Use the smallest value specified. */
9112 if (in_attr[i].i < out_attr[i].i)
9113 out_attr[i].i = in_attr[i].i;
9114 break;
ee065d83 9115 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 9116 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
9117 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 9118 {
9119 _bfd_error_handler
a9dc9481
JM		 9120 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
9121 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 9122 }
a9dc9481 9123 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 9124 out_attr[i].i = in_attr[i].i;
9125 break;
ee065d83
PB		 9126 case Tag_ABI_enum_size:
9127 if (in_attr[i].i != AEABI_enum_unused)
9128 {
9129 if (out_attr[i].i == AEABI_enum_unused
9130 || out_attr[i].i == AEABI_enum_forced_wide)
9131 {
9132 /* The existing object is compatible with anything.
9133 Use whatever requirements the new object has. */
9134 out_attr[i].i = in_attr[i].i;
9135 }
9136 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 9137 && out_attr[i].i != in_attr[i].i
0ffa91dd 9138 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 9139 {
91e22acd 9140 static const char *aeabi_enum_names[] =
bf21ed78 9141 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 9142 const char *in_name =
9143 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9144 ? aeabi_enum_names[in_attr[i].i]
9145 : "<unknown>";
9146 const char *out_name =
9147 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9148 ? aeabi_enum_names[out_attr[i].i]
9149 : "<unknown>";
ee065d83 9150 _bfd_error_handler
bf21ed78 9151 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 9152 ibfd, in_name, out_name);
ee065d83
PB		 9153 }
9154 }
9155 break;
9156 case Tag_ABI_VFP_args:
9157 /* Aready done. */
9158 break;
9159 case Tag_ABI_WMMX_args:
9160 if (in_attr[i].i != out_attr[i].i)
9161 {
9162 _bfd_error_handler
3895f852 9163 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 9164 ibfd, obfd);
91e22acd 9165 result = FALSE;
ee065d83
PB		 9166 }
9167 break;
7b86a9fa
AS		 9168 case Tag_compatibility:
9169 /* Merged in target-independent code. */
9170 break;
91e22acd
AS		 9171 case Tag_ABI_HardFP_use:
9172 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
9173 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
9174 || (in_attr[i].i == 2 && out_attr[i].i == 1))
9175 out_attr[i].i = 3;
9176 else if (in_attr[i].i > out_attr[i].i)
9177 out_attr[i].i = in_attr[i].i;
9178 break;
9179 case Tag_ABI_FP_16bit_format:
9180 if (in_attr[i].i != 0 && out_attr[i].i != 0)
9181 {
9182 if (in_attr[i].i != out_attr[i].i)
9183 {
9184 _bfd_error_handler
3895f852 9185 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 9186 ibfd, obfd);
9187 result = FALSE;
9188 }
9189 }
9190 if (in_attr[i].i != 0)
9191 out_attr[i].i = in_attr[i].i;
9192 break;
7b86a9fa 9193
91e22acd 9194 case Tag_nodefaults:
2d0bb761
AS		 9195 /* This tag is set if it exists, but the value is unused (and is
9196 typically zero). We don't actually need to do anything here -
9197 the merge happens automatically when the type flags are merged
9198 below. */
91e22acd
AS		 9199 break;
9200 case Tag_also_compatible_with:
9201 /* Already done in Tag_CPU_arch. */
9202 break;
9203 case Tag_conformance:
9204 /* Keep the attribute if it matches. Throw it away otherwise.
9205 No attribute means no claim to conform. */
9206 if (!in_attr[i].s || !out_attr[i].s
9207 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
9208 out_attr[i].s = NULL;
9209 break;
3cfad14c 9210
91e22acd 9211 default:
3cfad14c 9212 {
91e22acd
AS		 9213 bfd *err_bfd = NULL;
9214
9215 /* The "known_obj_attributes" table does contain some undefined
9216 attributes. Ensure that there are unused. */
9217 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
9218 err_bfd = obfd;
9219 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
9220 err_bfd = ibfd;
9221
9222 if (err_bfd != NULL)
9223 {
9224 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9225 if ((i & 127) < 64)
9226 {
9227 _bfd_error_handler
9228 (_("%B: Unknown mandatory EABI object attribute %d"),
9229 err_bfd, i);
9230 bfd_set_error (bfd_error_bad_value);
9231 result = FALSE;
9232 }
9233 else
9234 {
9235 _bfd_error_handler
9236 (_("Warning: %B: Unknown EABI object attribute %d"),
9237 err_bfd, i);
9238 }
9239 }
9240
9241 /* Only pass on attributes that match in both inputs. */
9242 if (in_attr[i].i != out_attr[i].i
9243 || in_attr[i].s != out_attr[i].s
9244 || (in_attr[i].s != NULL && out_attr[i].s != NULL
9245 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
9246 {
9247 out_attr[i].i = 0;
9248 out_attr[i].s = NULL;
9249 }
3cfad14c 9250 }
91e22acd
AS		 9251 }
9252
9253 /* If out_attr was copied from in_attr then it won't have a type yet. */
9254 if (in_attr[i].type && !out_attr[i].type)
9255 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 9256 }
9257
104d59d1
JM		 9258 /* Merge Tag_compatibility attributes and any common GNU ones. */
9259 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 9260
104d59d1
JM		 9261 /* Check for any attributes not known on ARM. */
9262 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 9263 out_listp = &elf_other_obj_attributes_proc (obfd);
9264 out_list = *out_listp;
8e79c3df 9265
91e22acd 9266 for (; in_list || out_list; )
ee065d83 9267 {
91e22acd
AS		 9268 bfd *err_bfd = NULL;
9269 int err_tag = 0;
8e79c3df
CM		 9270
9271 /* The tags for each list are in numerical order. */
9272 /* If the tags are equal, then merge. */
91e22acd 9273 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 9274 {
91e22acd
AS		 9275 /* This attribute only exists in obfd. We can't merge, and we don't
9276 know what the tag means, so delete it. */
9277 err_bfd = obfd;
9278 err_tag = out_list->tag;
9279 *out_listp = out_list->next;
9280 out_list = *out_listp;
8e79c3df 9281 }
91e22acd 9282 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 9283 {
91e22acd
AS		 9284 /* This attribute only exists in ibfd. We can't merge, and we don't
9285 know what the tag means, so ignore it. */
9286 err_bfd = ibfd;
9287 err_tag = in_list->tag;
8e79c3df 9288 in_list = in_list->next;
eb111b1f 9289 }
91e22acd
AS		 9290 else /* The tags are equal. */
9291 {
9292 /* As present, all attributes in the list are unknown, and
9293 therefore can't be merged meaningfully. */
9294 err_bfd = obfd;
9295 err_tag = out_list->tag;
9296
9297 /* Only pass on attributes that match in both inputs. */
9298 if (in_list->attr.i != out_list->attr.i
9299 || in_list->attr.s != out_list->attr.s
9300 || (in_list->attr.s && out_list->attr.s
9301 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
9302 {
9303 /* No match. Delete the attribute. */
9304 *out_listp = out_list->next;
9305 out_list = *out_listp;
9306 }
9307 else
9308 {
9309 /* Matched. Keep the attribute and move to the next. */
9310 out_list = out_list->next;
9311 in_list = in_list->next;
9312 }
9313 }
9314
9315 if (err_bfd)
9316 {
9317 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9318 if ((err_tag & 127) < 64)
9319 {
9320 _bfd_error_handler
9321 (_("%B: Unknown mandatory EABI object attribute %d"),
9322 err_bfd, err_tag);
9323 bfd_set_error (bfd_error_bad_value);
9324 result = FALSE;
9325 }
9326 else
9327 {
9328 _bfd_error_handler
9329 (_("Warning: %B: Unknown EABI object attribute %d"),
9330 err_bfd, err_tag);
9331 }
9332 }
ee065d83 9333 }
91e22acd 9334 return result;
252b5132
RH		 9335}
9336
3a4a14e9
PB		 9337
9338/* Return TRUE if the two EABI versions are incompatible. */
9339
9340static bfd_boolean
9341elf32_arm_versions_compatible (unsigned iver, unsigned over)
9342{
9343 /* v4 and v5 are the same spec before and after it was released,
9344 so allow mixing them. */
9345 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
9346 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
9347 return TRUE;
9348
9349 return (iver == over);
9350}
9351
252b5132
RH		 9352/* Merge backend specific data from an object file to the output
9353 object file when linking. */
9b485d32 9354
b34976b6 9355static bfd_boolean
57e8b36a 9356elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 9357{
9358 flagword out_flags;
9359 flagword in_flags;
b34976b6 9360 bfd_boolean flags_compatible = TRUE;
cf919dfd 9361 asection *sec;
252b5132 9362
9b485d32 9363 /* Check if we have the same endianess. */
82e51918 9364 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 9365 return FALSE;
1fe494a5 9366
0ffa91dd 9367 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9368 return TRUE;
252b5132 9369
ee065d83
PB		 9370 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
9371 return FALSE;
9372
252b5132
RH		 9373 /* The input BFD must have had its flags initialised. */
9374 /* The following seems bogus to me -- The flags are initialized in
9375 the assembler but I don't think an elf_flags_init field is
9b485d32 9376 written into the object. */
252b5132
RH		 9377 /* BFD_ASSERT (elf_flags_init (ibfd)); */
9378
9379 in_flags = elf_elfheader (ibfd)->e_flags;
9380 out_flags = elf_elfheader (obfd)->e_flags;
9381
23684067
PB		 9382 /* In theory there is no reason why we couldn't handle this. However
9383 in practice it isn't even close to working and there is no real
9384 reason to want it. */
9385 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
c13bb2ea 9386 && !(ibfd->flags & DYNAMIC)
23684067
PB		 9387 && (in_flags & EF_ARM_BE8))
9388 {
3895f852 9389 _bfd_error_handler (_("error: %B is already in final BE8 format"),
23684067
PB		 9390 ibfd);
9391 return FALSE;
9392 }
9393
252b5132
RH		 9394 if (!elf_flags_init (obfd))
9395 {
fe077fa6
NC		 9396 /* If the input is the default architecture and had the default
9397 flags then do not bother setting the flags for the output
9398 architecture, instead allow future merges to do this. If no
9399 future merges ever set these flags then they will retain their
9400 uninitialised values, which surprise surprise, correspond
252b5132 9401 to the default values. */
fe077fa6
NC		 9402 if (bfd_get_arch_info (ibfd)->the_default
9403 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 9404 return TRUE;
252b5132 9405
b34976b6 9406 elf_flags_init (obfd) = TRUE;
252b5132
RH		 9407 elf_elfheader (obfd)->e_flags = in_flags;
9408
9409 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
9410 && bfd_get_arch_info (obfd)->the_default)
9411 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
9412
b34976b6 9413 return TRUE;
252b5132
RH		 9414 }
9415
5a6c6817
NC		 9416 /* Determine what should happen if the input ARM architecture
9417 does not match the output ARM architecture. */
9418 if (! bfd_arm_merge_machines (ibfd, obfd))
9419 return FALSE;
e16bb312 9420
1006ba19 9421 /* Identical flags must be compatible. */
252b5132 9422 if (in_flags == out_flags)
b34976b6 9423 return TRUE;
252b5132 9424
35a0f415
DJ		 9425 /* Check to see if the input BFD actually contains any sections. If
9426 not, its flags may not have been initialised either, but it
8e3de13a 9427 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 9428 dynamic objects; their section list may be emptied by
d1f161ea 9429 elf_link_add_object_symbols.
35a0f415 9430
d1f161ea
NC		 9431 Also check to see if there are no code sections in the input.
9432 In this case there is no need to check for code specific flags.
9433 XXX - do we need to worry about floating-point format compatability
9434 in data sections ? */
35a0f415 9435 if (!(ibfd->flags & DYNAMIC))
cf919dfd 9436 {
35a0f415 9437 bfd_boolean null_input_bfd = TRUE;
d1f161ea 9438 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 9439
9440 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 9441 {
35a0f415
DJ		 9442 /* Ignore synthetic glue sections. */
9443 if (strcmp (sec->name, ".glue_7")
9444 && strcmp (sec->name, ".glue_7t"))
9445 {
d1f161ea
NC		 9446 if ((bfd_get_section_flags (ibfd, sec)
9447 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
9448 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
9449 only_data_sections = FALSE;
9450
35a0f415
DJ		 9451 null_input_bfd = FALSE;
9452 break;
9453 }
cf919dfd 9454 }
d1f161ea
NC		 9455
9456 if (null_input_bfd || only_data_sections)
35a0f415 9457 return TRUE;
cf919dfd 9458 }
cf919dfd 9459
252b5132 9460 /* Complain about various flag mismatches. */
3a4a14e9
PB		 9461 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
9462 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 9463 {
d003868e 9464 _bfd_error_handler
3895f852 9465 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 9466 ibfd, obfd,
9467 (in_flags & EF_ARM_EABIMASK) >> 24,
9468 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 9469 return FALSE;
fc830a83 9470 }
252b5132 9471
1006ba19 9472 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 9473 /* VxWorks libraries do not use these flags. */
9474 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
9475 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
9476 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 9477 {
fd2ec330 9478 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 9479 {
d003868e 9480 _bfd_error_handler
3895f852 9481 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
d003868e
AM		 9482 ibfd, obfd,
9483 in_flags & EF_ARM_APCS_26 ? 26 : 32,
9484 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 9485 flags_compatible = FALSE;
1006ba19 9486 }
252b5132 9487
fd2ec330 9488 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 9489 {
5eefb65f 9490 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e 9491 _bfd_error_handler
3895f852 9492 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
d003868e 9493 ibfd, obfd);
5eefb65f 9494 else
d003868e 9495 _bfd_error_handler
3895f852 9496 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
d003868e 9497 ibfd, obfd);
63b0f745 9498
b34976b6 9499 flags_compatible = FALSE;
1006ba19 9500 }
252b5132 9501
96a846ea 9502 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 9503 {
96a846ea 9504 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e 9505 _bfd_error_handler
3895f852 9506 (_("error: %B uses VFP instructions, whereas %B does not"),
d003868e 9507 ibfd, obfd);
5eefb65f 9508 else
d003868e 9509 _bfd_error_handler
3895f852 9510 (_("error: %B uses FPA instructions, whereas %B does not"),
d003868e 9511 ibfd, obfd);
fde78edd
NC		 9512
9513 flags_compatible = FALSE;
9514 }
9515
9516 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
9517 {
9518 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e 9519 _bfd_error_handler
3895f852 9520 (_("error: %B uses Maverick instructions, whereas %B does not"),
d003868e 9521 ibfd, obfd);
fde78edd 9522 else
d003868e 9523 _bfd_error_handler
3895f852 9524 (_("error: %B does not use Maverick instructions, whereas %B does"),
d003868e 9525 ibfd, obfd);
63b0f745 9526
b34976b6 9527 flags_compatible = FALSE;
1006ba19 9528 }
96a846ea
RE		 9529
9530#ifdef EF_ARM_SOFT_FLOAT
9531 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
9532 {
9533 /* We can allow interworking between code that is VFP format
9534 layout, and uses either soft float or integer regs for
9535 passing floating point arguments and results. We already
9536 know that the APCS_FLOAT flags match; similarly for VFP
9537 flags. */
9538 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
9539 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
9540 {
9541 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e 9542 _bfd_error_handler
3895f852 9543 (_("error: %B uses software FP, whereas %B uses hardware FP"),
d003868e 9544 ibfd, obfd);
96a846ea 9545 else
d003868e 9546 _bfd_error_handler
3895f852 9547 (_("error: %B uses hardware FP, whereas %B uses software FP"),
d003868e 9548 ibfd, obfd);
96a846ea 9549
b34976b6 9550 flags_compatible = FALSE;
96a846ea
RE		 9551 }
9552 }
ee43f35e 9553#endif
252b5132 9554
1006ba19 9555 /* Interworking mismatch is only a warning. */
fd2ec330 9556 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 9557 {
e3c8793a
NC		 9558 if (in_flags & EF_ARM_INTERWORK)
9559 {
d003868e
AM		 9560 _bfd_error_handler
9561 (_("Warning: %B supports interworking, whereas %B does not"),
9562 ibfd, obfd);
e3c8793a
NC		 9563 }
9564 else
9565 {
d003868e
AM		 9566 _bfd_error_handler
9567 (_("Warning: %B does not support interworking, whereas %B does"),
9568 ibfd, obfd);
e3c8793a 9569 }
8f615d07 9570 }
252b5132 9571 }
63b0f745 9572
1006ba19 9573 return flags_compatible;
252b5132
RH		 9574}
9575
9b485d32
NC		 9576/* Display the flags field. */
9577
b34976b6 9578static bfd_boolean
57e8b36a 9579elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 9580{
fc830a83
NC		 9581 FILE * file = (FILE *) ptr;
9582 unsigned long flags;
252b5132
RH		 9583
9584 BFD_ASSERT (abfd != NULL && ptr != NULL);
9585
9586 /* Print normal ELF private data. */
9587 _bfd_elf_print_private_bfd_data (abfd, ptr);
9588
fc830a83 9589 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 9590 /* Ignore init flag - it may not be set, despite the flags field
9591 containing valid data. */
252b5132
RH		 9592
9593 /* xgettext:c-format */
9b485d32 9594 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 9595
fc830a83
NC		 9596 switch (EF_ARM_EABI_VERSION (flags))
9597 {
9598 case EF_ARM_EABI_UNKNOWN:
4cc11e76 9599 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 9600 official ARM ELF extended ABI. Hence they are only decoded if
9601 the EABI version is not set. */
fd2ec330 9602 if (flags & EF_ARM_INTERWORK)
9b485d32 9603 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 9604
fd2ec330 9605 if (flags & EF_ARM_APCS_26)
6c571f00 9606 fprintf (file, " [APCS-26]");
fc830a83 9607 else
6c571f00 9608 fprintf (file, " [APCS-32]");
9a5aca8c 9609
96a846ea
RE		 9610 if (flags & EF_ARM_VFP_FLOAT)
9611 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 9612 else if (flags & EF_ARM_MAVERICK_FLOAT)
9613 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 9614 else
9615 fprintf (file, _(" [FPA float format]"));
9616
fd2ec330 9617 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 9618 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 9619
fd2ec330 9620 if (flags & EF_ARM_PIC)
9b485d32 9621 fprintf (file, _(" [position independent]"));
fc830a83 9622
fd2ec330 9623 if (flags & EF_ARM_NEW_ABI)
9b485d32 9624 fprintf (file, _(" [new ABI]"));
9a5aca8c 9625
fd2ec330 9626 if (flags & EF_ARM_OLD_ABI)
9b485d32 9627 fprintf (file, _(" [old ABI]"));
9a5aca8c 9628
fd2ec330 9629 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 9630 fprintf (file, _(" [software FP]"));
9a5aca8c 9631
96a846ea
RE		 9632 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
9633 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 9634 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
9635 | EF_ARM_MAVERICK_FLOAT);
fc830a83 9636 break;
9a5aca8c 9637
fc830a83 9638 case EF_ARM_EABI_VER1:
9b485d32 9639 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 9640
fc830a83 9641 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 9642 fprintf (file, _(" [sorted symbol table]"));
fc830a83 9643 else
9b485d32 9644 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 9645
fc830a83
NC		 9646 flags &= ~ EF_ARM_SYMSARESORTED;
9647 break;
9a5aca8c 9648
fd2ec330
PB		 9649 case EF_ARM_EABI_VER2:
9650 fprintf (file, _(" [Version2 EABI]"));
9651
9652 if (flags & EF_ARM_SYMSARESORTED)
9653 fprintf (file, _(" [sorted symbol table]"));
9654 else
9655 fprintf (file, _(" [unsorted symbol table]"));
9656
9657 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
9658 fprintf (file, _(" [dynamic symbols use segment index]"));
9659
9660 if (flags & EF_ARM_MAPSYMSFIRST)
9661 fprintf (file, _(" [mapping symbols precede others]"));
9662
99e4ae17 9663 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 9664 | EF_ARM_MAPSYMSFIRST);
9665 break;
9666
d507cf36
PB		 9667 case EF_ARM_EABI_VER3:
9668 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 9669 break;
9670
9671 case EF_ARM_EABI_VER4:
9672 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 9673 goto eabi;
d507cf36 9674
3a4a14e9
PB		 9675 case EF_ARM_EABI_VER5:
9676 fprintf (file, _(" [Version5 EABI]"));
9677 eabi:
d507cf36
PB		 9678 if (flags & EF_ARM_BE8)
9679 fprintf (file, _(" [BE8]"));
9680
9681 if (flags & EF_ARM_LE8)
9682 fprintf (file, _(" [LE8]"));
9683
9684 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
9685 break;
9686
fc830a83 9687 default:
9b485d32 9688 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 9689 break;
9690 }
252b5132 9691
fc830a83 9692 flags &= ~ EF_ARM_EABIMASK;
252b5132 9693
fc830a83 9694 if (flags & EF_ARM_RELEXEC)
9b485d32 9695 fprintf (file, _(" [relocatable executable]"));
252b5132 9696
fc830a83 9697 if (flags & EF_ARM_HASENTRY)
9b485d32 9698 fprintf (file, _(" [has entry point]"));
252b5132 9699
fc830a83
NC		 9700 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
9701
9702 if (flags)
9b485d32 9703 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 9704
252b5132
RH		 9705 fputc ('\n', file);
9706
b34976b6 9707 return TRUE;
252b5132
RH		 9708}
9709
9710static int
57e8b36a 9711elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 9712{
2f0ca46a
NC		 9713 switch (ELF_ST_TYPE (elf_sym->st_info))
9714 {
9715 case STT_ARM_TFUNC:
9716 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 9717
2f0ca46a
NC		 9718 case STT_ARM_16BIT:
9719 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
9720 This allows us to distinguish between data used by Thumb instructions
9721 and non-data (which is probably code) inside Thumb regions of an
9722 executable. */
1a0eb693 9723 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 9724 return ELF_ST_TYPE (elf_sym->st_info);
9725 break;
9a5aca8c 9726
ce855c42
NC		 9727 default:
9728 break;
2f0ca46a
NC		 9729 }
9730
9731 return type;
252b5132 9732}
f21f3fe0 9733
252b5132 9734static asection *
07adf181
AM		 9735elf32_arm_gc_mark_hook (asection *sec,
9736 struct bfd_link_info *info,
9737 Elf_Internal_Rela *rel,
9738 struct elf_link_hash_entry *h,
9739 Elf_Internal_Sym *sym)
252b5132
RH		 9740{
9741 if (h != NULL)
07adf181 9742 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 9743 {
9744 case R_ARM_GNU_VTINHERIT:
9745 case R_ARM_GNU_VTENTRY:
07adf181
AM		 9746 return NULL;
9747 }
9ad5cbcf 9748
07adf181 9749 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 9750}
9751
780a67af
NC		 9752/* Update the got entry reference counts for the section being removed. */
9753
b34976b6 9754static bfd_boolean
ba93b8ac
DJ		 9755elf32_arm_gc_sweep_hook (bfd * abfd,
9756 struct bfd_link_info * info,
9757 asection * sec,
9758 const Elf_Internal_Rela * relocs)
252b5132 9759{
5e681ec4
PB		 9760 Elf_Internal_Shdr *symtab_hdr;
9761 struct elf_link_hash_entry **sym_hashes;
9762 bfd_signed_vma *local_got_refcounts;
9763 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 9764 struct elf32_arm_link_hash_table * globals;
9765
7dda2462
TG		 9766 if (info->relocatable)
9767 return TRUE;
9768
eb043451 9769 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 9770
9771 elf_section_data (sec)->local_dynrel = NULL;
9772
0ffa91dd 9773 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 9774 sym_hashes = elf_sym_hashes (abfd);
9775 local_got_refcounts = elf_local_got_refcounts (abfd);
9776
906e58ca 9777 check_use_blx (globals);
bd97cb95 9778
5e681ec4
PB		 9779 relend = relocs + sec->reloc_count;
9780 for (rel = relocs; rel < relend; rel++)
eb043451 9781 {
3eb128b2
AM		 9782 unsigned long r_symndx;
9783 struct elf_link_hash_entry *h = NULL;
eb043451 9784 int r_type;
5e681ec4 9785
3eb128b2
AM		 9786 r_symndx = ELF32_R_SYM (rel->r_info);
9787 if (r_symndx >= symtab_hdr->sh_info)
9788 {
9789 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
9790 while (h->root.type == bfd_link_hash_indirect
9791 || h->root.type == bfd_link_hash_warning)
9792 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9793 }
9794
eb043451 9795 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 9796 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 9797 switch (r_type)
9798 {
9799 case R_ARM_GOT32:
eb043451 9800 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 9801 case R_ARM_TLS_GD32:
9802 case R_ARM_TLS_IE32:
3eb128b2 9803 if (h != NULL)
eb043451 9804 {
eb043451
PB		 9805 if (h->got.refcount > 0)
9806 h->got.refcount -= 1;
9807 }
9808 else if (local_got_refcounts != NULL)
9809 {
9810 if (local_got_refcounts[r_symndx] > 0)
9811 local_got_refcounts[r_symndx] -= 1;
9812 }
9813 break;
9814
ba93b8ac
DJ		 9815 case R_ARM_TLS_LDM32:
9816 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
9817 break;
9818
eb043451 9819 case R_ARM_ABS32:
bb224fc3 9820 case R_ARM_ABS32_NOI:
eb043451 9821 case R_ARM_REL32:
bb224fc3 9822 case R_ARM_REL32_NOI:
eb043451
PB		 9823 case R_ARM_PC24:
9824 case R_ARM_PLT32:
5b5bb741
PB		 9825 case R_ARM_CALL:
9826 case R_ARM_JUMP24:
eb043451 9827 case R_ARM_PREL31:
c19d1205 9828 case R_ARM_THM_CALL:
bd97cb95
DJ		 9829 case R_ARM_THM_JUMP24:
9830 case R_ARM_THM_JUMP19:
b6895b4f
PB		 9831 case R_ARM_MOVW_ABS_NC:
9832 case R_ARM_MOVT_ABS:
9833 case R_ARM_MOVW_PREL_NC:
9834 case R_ARM_MOVT_PREL:
9835 case R_ARM_THM_MOVW_ABS_NC:
9836 case R_ARM_THM_MOVT_ABS:
9837 case R_ARM_THM_MOVW_PREL_NC:
9838 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 9839 /* Should the interworking branches be here also? */
9840
3eb128b2 9841 if (h != NULL)
eb043451
PB		 9842 {
9843 struct elf32_arm_link_hash_entry *eh;
9844 struct elf32_arm_relocs_copied **pp;
9845 struct elf32_arm_relocs_copied *p;
5e681ec4 9846
b7693d02 9847 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 9848
eb043451 9849 if (h->plt.refcount > 0)
b7693d02
DJ		 9850 {
9851 h->plt.refcount -= 1;
bd97cb95
DJ		 9852 if (r_type == R_ARM_THM_CALL)
9853 eh->plt_maybe_thumb_refcount--;
9854
9855 if (r_type == R_ARM_THM_JUMP24
9856 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 9857 eh->plt_thumb_refcount--;
9858 }
5e681ec4 9859
eb043451 9860 if (r_type == R_ARM_ABS32
bb224fc3
MS		 9861 || r_type == R_ARM_REL32
9862 || r_type == R_ARM_ABS32_NOI
9863 || r_type == R_ARM_REL32_NOI)
eb043451 9864 {
eb043451
PB		 9865 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
9866 pp = &p->next)
9867 if (p->section == sec)
9868 {
9869 p->count -= 1;
bb224fc3
MS		 9870 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
9871 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 9872 p->pc_count -= 1;
eb043451
PB		 9873 if (p->count == 0)
9874 *pp = p->next;
9875 break;
9876 }
9877 }
9878 }
9879 break;
5e681ec4 9880
eb043451
PB		 9881 default:
9882 break;
9883 }
9884 }
5e681ec4 9885
b34976b6 9886 return TRUE;
252b5132
RH		 9887}
9888
780a67af
NC		 9889/* Look through the relocs for a section during the first phase. */
9890
b34976b6 9891static bfd_boolean
57e8b36a
NC		 9892elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
9893 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 9894{
b34976b6
AM		 9895 Elf_Internal_Shdr *symtab_hdr;
9896 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 9897 const Elf_Internal_Rela *rel;
9898 const Elf_Internal_Rela *rel_end;
9899 bfd *dynobj;
5e681ec4 9900 asection *sreloc;
b34976b6 9901 bfd_vma *local_got_offsets;
5e681ec4 9902 struct elf32_arm_link_hash_table *htab;
39623e12 9903 bfd_boolean needs_plt;
ce98a316 9904 unsigned long nsyms;
9a5aca8c 9905
1049f94e 9906 if (info->relocatable)
b34976b6 9907 return TRUE;
9a5aca8c 9908
0ffa91dd
NC		 9909 BFD_ASSERT (is_arm_elf (abfd));
9910
5e681ec4
PB		 9911 htab = elf32_arm_hash_table (info);
9912 sreloc = NULL;
9a5aca8c 9913
67687978
PB		 9914 /* Create dynamic sections for relocatable executables so that we can
9915 copy relocations. */
9916 if (htab->root.is_relocatable_executable
9917 && ! htab->root.dynamic_sections_created)
9918 {
9919 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
9920 return FALSE;
9921 }
9922
252b5132
RH		 9923 dynobj = elf_hash_table (info)->dynobj;
9924 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 9925
0ffa91dd 9926 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 9927 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 9928 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
9929
252b5132
RH		 9930 rel_end = relocs + sec->reloc_count;
9931 for (rel = relocs; rel < rel_end; rel++)
9932 {
9933 struct elf_link_hash_entry *h;
b7693d02 9934 struct elf32_arm_link_hash_entry *eh;
252b5132 9935 unsigned long r_symndx;
eb043451 9936 int r_type;
9a5aca8c 9937
252b5132 9938 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 9939 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 9940 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 9941
ce98a316
NC		 9942 if (r_symndx >= nsyms
9943 /* PR 9934: It is possible to have relocations that do not
9944 refer to symbols, thus it is also possible to have an
9945 object file containing relocations but no symbol table. */
9946 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 9947 {
9948 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 9949 r_symndx);
ba93b8ac
DJ		 9950 return FALSE;
9951 }
9952
ce98a316 9953 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 9954 h = NULL;
9955 else
973a3492
L		 9956 {
9957 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
9958 while (h->root.type == bfd_link_hash_indirect
9959 || h->root.type == bfd_link_hash_warning)
9960 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9961 }
9a5aca8c 9962
b7693d02
DJ		 9963 eh = (struct elf32_arm_link_hash_entry *) h;
9964
eb043451 9965 switch (r_type)
252b5132 9966 {
5e681ec4 9967 case R_ARM_GOT32:
eb043451 9968 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 9969 case R_ARM_TLS_GD32:
9970 case R_ARM_TLS_IE32:
5e681ec4 9971 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 9972 {
9973 int tls_type, old_tls_type;
5e681ec4 9974
ba93b8ac
DJ		 9975 switch (r_type)
9976 {
9977 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
9978 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
9979 default: tls_type = GOT_NORMAL; break;
9980 }
252b5132 9981
ba93b8ac
DJ		 9982 if (h != NULL)
9983 {
9984 h->got.refcount++;
9985 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
9986 }
9987 else
9988 {
9989 bfd_signed_vma *local_got_refcounts;
9990
9991 /* This is a global offset table entry for a local symbol. */
9992 local_got_refcounts = elf_local_got_refcounts (abfd);
9993 if (local_got_refcounts == NULL)
9994 {
9995 bfd_size_type size;
906e58ca 9996
ba93b8ac 9997 size = symtab_hdr->sh_info;
906e58ca 9998 size *= (sizeof (bfd_signed_vma) + sizeof (char));
ba93b8ac
DJ		 9999 local_got_refcounts = bfd_zalloc (abfd, size);
10000 if (local_got_refcounts == NULL)
10001 return FALSE;
10002 elf_local_got_refcounts (abfd) = local_got_refcounts;
10003 elf32_arm_local_got_tls_type (abfd)
10004 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10005 }
10006 local_got_refcounts[r_symndx] += 1;
10007 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10008 }
10009
10010 /* We will already have issued an error message if there is a
10011 TLS / non-TLS mismatch, based on the symbol type. We don't
10012 support any linker relaxations. So just combine any TLS
10013 types needed. */
10014 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10015 && tls_type != GOT_NORMAL)
10016 tls_type |= old_tls_type;
10017
10018 if (old_tls_type != tls_type)
10019 {
10020 if (h != NULL)
10021 elf32_arm_hash_entry (h)->tls_type = tls_type;
10022 else
10023 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10024 }
10025 }
8029a119 10026 /* Fall through. */
ba93b8ac
DJ		 10027
10028 case R_ARM_TLS_LDM32:
10029 if (r_type == R_ARM_TLS_LDM32)
10030 htab->tls_ldm_got.refcount++;
8029a119 10031 /* Fall through. */
252b5132 10032
c19d1205 10033 case R_ARM_GOTOFF32:
5e681ec4
PB		 10034 case R_ARM_GOTPC:
10035 if (htab->sgot == NULL)
10036 {
10037 if (htab->root.dynobj == NULL)
10038 htab->root.dynobj = abfd;
10039 if (!create_got_section (htab->root.dynobj, info))
10040 return FALSE;
10041 }
252b5132
RH		 10042 break;
10043
00a97672
RS		 10044 case R_ARM_ABS12:
10045 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10046 ldr __GOTT_INDEX__ offsets. */
10047 if (!htab->vxworks_p)
10048 break;
8029a119 10049 /* Fall through. */
00a97672 10050
252b5132 10051 case R_ARM_PC24:
7359ea65 10052 case R_ARM_PLT32:
5b5bb741
PB		 10053 case R_ARM_CALL:
10054 case R_ARM_JUMP24:
eb043451 10055 case R_ARM_PREL31:
c19d1205 10056 case R_ARM_THM_CALL:
bd97cb95
DJ		 10057 case R_ARM_THM_JUMP24:
10058 case R_ARM_THM_JUMP19:
39623e12
PB		 10059 needs_plt = 1;
10060 goto normal_reloc;
10061
96c23d59
JM		 10062 case R_ARM_MOVW_ABS_NC:
10063 case R_ARM_MOVT_ABS:
10064 case R_ARM_THM_MOVW_ABS_NC:
10065 case R_ARM_THM_MOVT_ABS:
10066 if (info->shared)
10067 {
10068 (*_bfd_error_handler)
10069 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10070 abfd, elf32_arm_howto_table_1[r_type].name,
10071 (h) ? h->root.root.string : "a local symbol");
10072 bfd_set_error (bfd_error_bad_value);
10073 return FALSE;
10074 }
10075
10076 /* Fall through. */
39623e12
PB		 10077 case R_ARM_ABS32:
10078 case R_ARM_ABS32_NOI:
10079 case R_ARM_REL32:
10080 case R_ARM_REL32_NOI:
b6895b4f
PB		 10081 case R_ARM_MOVW_PREL_NC:
10082 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10083 case R_ARM_THM_MOVW_PREL_NC:
10084 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10085 needs_plt = 0;
10086 normal_reloc:
10087
b7693d02 10088 /* Should the interworking branches be listed here? */
7359ea65 10089 if (h != NULL)
5e681ec4
PB		 10090 {
10091 /* If this reloc is in a read-only section, we might
10092 need a copy reloc. We can't check reliably at this
10093 stage whether the section is read-only, as input
10094 sections have not yet been mapped to output sections.
10095 Tentatively set the flag for now, and correct in
10096 adjust_dynamic_symbol. */
7359ea65 10097 if (!info->shared)
f5385ebf 10098 h->non_got_ref = 1;
7359ea65 10099
5e681ec4 10100 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10101 refers to is in a different object. We can't tell for
10102 sure yet, because something later might force the
10103 symbol local. */
39623e12 10104 if (needs_plt)
f5385ebf 10105 h->needs_plt = 1;
4f199be3
DJ		 10106
10107 /* If we create a PLT entry, this relocation will reference
10108 it, even if it's an ABS32 relocation. */
10109 h->plt.refcount += 1;
b7693d02 10110
bd97cb95
DJ		 10111 /* It's too early to use htab->use_blx here, so we have to
10112 record possible blx references separately from
10113 relocs that definitely need a thumb stub. */
10114
c19d1205 10115 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10116 eh->plt_maybe_thumb_refcount += 1;
10117
10118 if (r_type == R_ARM_THM_JUMP24
10119 || r_type == R_ARM_THM_JUMP19)
b7693d02 10120 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10121 }
10122
67687978
PB		 10123 /* If we are creating a shared library or relocatable executable,
10124 and this is a reloc against a global symbol, or a non PC
10125 relative reloc against a local symbol, then we need to copy
10126 the reloc into the shared library. However, if we are linking
10127 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10128 global symbol which is defined in an object we are
10129 including in the link (i.e., DEF_REGULAR is set). At
10130 this point we have not seen all the input files, so it is
10131 possible that DEF_REGULAR is not set now but will be set
10132 later (it is never cleared). We account for that
10133 possibility below by storing information in the
5e681ec4 10134 relocs_copied field of the hash table entry. */
67687978 10135 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10136 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10137 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10138 || (h != NULL && ! h->needs_plt
10139 && (! info->symbolic || ! h->def_regular))))
252b5132 10140 {
5e681ec4
PB		 10141 struct elf32_arm_relocs_copied *p, **head;
10142
252b5132
RH		 10143 /* When creating a shared object, we must copy these
10144 reloc types into the output file. We create a reloc
10145 section in dynobj and make room for this reloc. */
83bac4b0 10146 if (sreloc == NULL)
252b5132 10147 {
83bac4b0
NC		 10148 sreloc = _bfd_elf_make_dynamic_reloc_section
10149 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10150
83bac4b0 10151 if (sreloc == NULL)
b34976b6 10152 return FALSE;
252b5132 10153
83bac4b0 10154 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 10155 if (htab->symbian_p)
252b5132 10156 {
83bac4b0 10157 flagword flags;
5e681ec4 10158
83bac4b0 10159 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 10160 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 10161 bfd_set_section_flags (dynobj, sreloc, flags);
10162 }
252b5132
RH		 10163 }
10164
5e681ec4
PB		 10165 /* If this is a global symbol, we count the number of
10166 relocations we need for this symbol. */
10167 if (h != NULL)
252b5132 10168 {
5e681ec4
PB		 10169 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
10170 }
10171 else
10172 {
10173 /* Track dynamic relocs needed for local syms too.
10174 We really need local syms available to do this
10175 easily. Oh well. */
57e8b36a 10176
5e681ec4 10177 asection *s;
6edfbbad
DJ		 10178 void *vpp;
10179
5e681ec4
PB		 10180 s = bfd_section_from_r_symndx (abfd, &htab->sym_sec,
10181 sec, r_symndx);
10182 if (s == NULL)
10183 return FALSE;
57e8b36a 10184
6edfbbad
DJ		 10185 vpp = &elf_section_data (s)->local_dynrel;
10186 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 10187 }
57e8b36a 10188
5e681ec4
PB		 10189 p = *head;
10190 if (p == NULL || p->section != sec)
10191 {
10192 bfd_size_type amt = sizeof *p;
57e8b36a 10193
5e681ec4 10194 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 10195 if (p == NULL)
5e681ec4
PB		 10196 return FALSE;
10197 p->next = *head;
10198 *head = p;
10199 p->section = sec;
10200 p->count = 0;
ba93b8ac 10201 p->pc_count = 0;
252b5132 10202 }
57e8b36a 10203
bb224fc3 10204 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 10205 p->pc_count += 1;
71a976dd 10206 p->count += 1;
252b5132
RH		 10207 }
10208 break;
10209
10210 /* This relocation describes the C++ object vtable hierarchy.
10211 Reconstruct it for later use during GC. */
10212 case R_ARM_GNU_VTINHERIT:
c152c796 10213 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 10214 return FALSE;
252b5132 10215 break;
9a5aca8c 10216
252b5132
RH		 10217 /* This relocation describes which C++ vtable entries are actually
10218 used. Record for later use during GC. */
10219 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 10220 BFD_ASSERT (h != NULL);
10221 if (h != NULL
10222 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 10223 return FALSE;
252b5132
RH		 10224 break;
10225 }
10226 }
f21f3fe0 10227
b34976b6 10228 return TRUE;
252b5132
RH		 10229}
10230
6a5bb875
PB		 10231/* Unwinding tables are not referenced directly. This pass marks them as
10232 required if the corresponding code section is marked. */
10233
10234static bfd_boolean
906e58ca
NC		 10235elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
10236 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 10237{
10238 bfd *sub;
10239 Elf_Internal_Shdr **elf_shdrp;
10240 bfd_boolean again;
10241
10242 /* Marking EH data may cause additional code sections to be marked,
10243 requiring multiple passes. */
10244 again = TRUE;
10245 while (again)
10246 {
10247 again = FALSE;
10248 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
10249 {
10250 asection *o;
10251
0ffa91dd 10252 if (! is_arm_elf (sub))
6a5bb875
PB		 10253 continue;
10254
10255 elf_shdrp = elf_elfsections (sub);
10256 for (o = sub->sections; o != NULL; o = o->next)
10257 {
10258 Elf_Internal_Shdr *hdr;
0ffa91dd 10259
6a5bb875 10260 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 10261 if (hdr->sh_type == SHT_ARM_EXIDX
10262 && hdr->sh_link
10263 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 10264 && !o->gc_mark
10265 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
10266 {
10267 again = TRUE;
10268 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
10269 return FALSE;
10270 }
10271 }
10272 }
10273 }
10274
10275 return TRUE;
10276}
10277
3c9458e9
NC		 10278/* Treat mapping symbols as special target symbols. */
10279
10280static bfd_boolean
10281elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
10282{
b0796911
PB		 10283 return bfd_is_arm_special_symbol_name (sym->name,
10284 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 10285}
10286
0367ecfb
NC		 10287/* This is a copy of elf_find_function() from elf.c except that
10288 ARM mapping symbols are ignored when looking for function names
10289 and STT_ARM_TFUNC is considered to a function type. */
252b5132 10290
0367ecfb
NC		 10291static bfd_boolean
10292arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
10293 asection * section,
10294 asymbol ** symbols,
10295 bfd_vma offset,
10296 const char ** filename_ptr,
10297 const char ** functionname_ptr)
10298{
10299 const char * filename = NULL;
10300 asymbol * func = NULL;
10301 bfd_vma low_func = 0;
10302 asymbol ** p;
252b5132
RH		 10303
10304 for (p = symbols; *p != NULL; p++)
10305 {
10306 elf_symbol_type *q;
10307
10308 q = (elf_symbol_type *) *p;
10309
252b5132
RH		 10310 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
10311 {
10312 default:
10313 break;
10314 case STT_FILE:
10315 filename = bfd_asymbol_name (&q->symbol);
10316 break;
252b5132
RH		 10317 case STT_FUNC:
10318 case STT_ARM_TFUNC:
9d2da7ca 10319 case STT_NOTYPE:
b0796911 10320 /* Skip mapping symbols. */
0367ecfb 10321 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 10322 && bfd_is_arm_special_symbol_name (q->symbol.name,
10323 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 10324 continue;
10325 /* Fall through. */
6b40fcba 10326 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 10327 && q->symbol.value >= low_func
10328 && q->symbol.value <= offset)
10329 {
10330 func = (asymbol *) q;
10331 low_func = q->symbol.value;
10332 }
10333 break;
10334 }
10335 }
10336
10337 if (func == NULL)
b34976b6 10338 return FALSE;
252b5132 10339
0367ecfb
NC		 10340 if (filename_ptr)
10341 *filename_ptr = filename;
10342 if (functionname_ptr)
10343 *functionname_ptr = bfd_asymbol_name (func);
10344
10345 return TRUE;
906e58ca 10346}
0367ecfb
NC		 10347
10348
10349/* Find the nearest line to a particular section and offset, for error
10350 reporting. This code is a duplicate of the code in elf.c, except
10351 that it uses arm_elf_find_function. */
10352
10353static bfd_boolean
10354elf32_arm_find_nearest_line (bfd * abfd,
10355 asection * section,
10356 asymbol ** symbols,
10357 bfd_vma offset,
10358 const char ** filename_ptr,
10359 const char ** functionname_ptr,
10360 unsigned int * line_ptr)
10361{
10362 bfd_boolean found = FALSE;
10363
10364 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
10365
10366 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
10367 filename_ptr, functionname_ptr,
10368 line_ptr, 0,
10369 & elf_tdata (abfd)->dwarf2_find_line_info))
10370 {
10371 if (!*functionname_ptr)
10372 arm_elf_find_function (abfd, section, symbols, offset,
10373 *filename_ptr ? NULL : filename_ptr,
10374 functionname_ptr);
f21f3fe0 10375
0367ecfb
NC		 10376 return TRUE;
10377 }
10378
10379 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
10380 & found, filename_ptr,
10381 functionname_ptr, line_ptr,
10382 & elf_tdata (abfd)->line_info))
10383 return FALSE;
10384
10385 if (found && (*functionname_ptr || *line_ptr))
10386 return TRUE;
10387
10388 if (symbols == NULL)
10389 return FALSE;
10390
10391 if (! arm_elf_find_function (abfd, section, symbols, offset,
10392 filename_ptr, functionname_ptr))
10393 return FALSE;
10394
10395 *line_ptr = 0;
b34976b6 10396 return TRUE;
252b5132
RH		 10397}
10398
4ab527b0
FF		 10399static bfd_boolean
10400elf32_arm_find_inliner_info (bfd * abfd,
10401 const char ** filename_ptr,
10402 const char ** functionname_ptr,
10403 unsigned int * line_ptr)
10404{
10405 bfd_boolean found;
10406 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
10407 functionname_ptr, line_ptr,
10408 & elf_tdata (abfd)->dwarf2_find_line_info);
10409 return found;
10410}
10411
252b5132
RH		 10412/* Adjust a symbol defined by a dynamic object and referenced by a
10413 regular object. The current definition is in some section of the
10414 dynamic object, but we're not including those sections. We have to
10415 change the definition to something the rest of the link can
10416 understand. */
10417
b34976b6 10418static bfd_boolean
57e8b36a
NC		 10419elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
10420 struct elf_link_hash_entry * h)
252b5132
RH		 10421{
10422 bfd * dynobj;
10423 asection * s;
b7693d02 10424 struct elf32_arm_link_hash_entry * eh;
67687978 10425 struct elf32_arm_link_hash_table *globals;
252b5132 10426
67687978 10427 globals = elf32_arm_hash_table (info);
252b5132
RH		 10428 dynobj = elf_hash_table (info)->dynobj;
10429
10430 /* Make sure we know what is going on here. */
10431 BFD_ASSERT (dynobj != NULL
f5385ebf 10432 && (h->needs_plt
f6e332e6 10433 || h->u.weakdef != NULL
f5385ebf
AM		 10434 || (h->def_dynamic
10435 && h->ref_regular
10436 && !h->def_regular)));
252b5132 10437
b7693d02
DJ		 10438 eh = (struct elf32_arm_link_hash_entry *) h;
10439
252b5132
RH		 10440 /* If this is a function, put it in the procedure linkage table. We
10441 will fill in the contents of the procedure linkage table later,
10442 when we know the address of the .got section. */
0f88be7a 10443 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 10444 || h->needs_plt)
252b5132 10445 {
5e681ec4
PB		 10446 if (h->plt.refcount <= 0
10447 || SYMBOL_CALLS_LOCAL (info, h)
10448 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
10449 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 10450 {
10451 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 10452 file, but the symbol was never referred to by a dynamic
10453 object, or if all references were garbage collected. In
10454 such a case, we don't actually need to build a procedure
10455 linkage table, and we can just do a PC24 reloc instead. */
10456 h->plt.offset = (bfd_vma) -1;
b7693d02 10457 eh->plt_thumb_refcount = 0;
bd97cb95 10458 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 10459 h->needs_plt = 0;
252b5132
RH		 10460 }
10461
b34976b6 10462 return TRUE;
252b5132 10463 }
5e681ec4 10464 else
b7693d02
DJ		 10465 {
10466 /* It's possible that we incorrectly decided a .plt reloc was
10467 needed for an R_ARM_PC24 or similar reloc to a non-function sym
10468 in check_relocs. We can't decide accurately between function
10469 and non-function syms in check-relocs; Objects loaded later in
10470 the link may change h->type. So fix it now. */
10471 h->plt.offset = (bfd_vma) -1;
10472 eh->plt_thumb_refcount = 0;
bd97cb95 10473 eh->plt_maybe_thumb_refcount = 0;
b7693d02 10474 }
252b5132
RH		 10475
10476 /* If this is a weak symbol, and there is a real definition, the
10477 processor independent code will have arranged for us to see the
10478 real definition first, and we can just use the same value. */
f6e332e6 10479 if (h->u.weakdef != NULL)
252b5132 10480 {
f6e332e6
AM		 10481 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
10482 || h->u.weakdef->root.type == bfd_link_hash_defweak);
10483 h->root.u.def.section = h->u.weakdef->root.u.def.section;
10484 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 10485 return TRUE;
252b5132
RH		 10486 }
10487
ba93b8ac
DJ		 10488 /* If there are no non-GOT references, we do not need a copy
10489 relocation. */
10490 if (!h->non_got_ref)
10491 return TRUE;
10492
252b5132
RH		 10493 /* This is a reference to a symbol defined by a dynamic object which
10494 is not a function. */
10495
10496 /* If we are creating a shared library, we must presume that the
10497 only references to the symbol are via the global offset table.
10498 For such cases we need not do anything here; the relocations will
67687978
PB		 10499 be handled correctly by relocate_section. Relocatable executables
10500 can reference data in shared objects directly, so we don't need to
10501 do anything here. */
10502 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 10503 return TRUE;
252b5132 10504
909272ee
AM		 10505 if (h->size == 0)
10506 {
10507 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
10508 h->root.root.string);
10509 return TRUE;
10510 }
10511
252b5132
RH		 10512 /* We must allocate the symbol in our .dynbss section, which will
10513 become part of the .bss section of the executable. There will be
10514 an entry for this symbol in the .dynsym section. The dynamic
10515 object will contain position independent code, so all references
10516 from the dynamic object to this symbol will go through the global
10517 offset table. The dynamic linker will use the .dynsym entry to
10518 determine the address it must put in the global offset table, so
10519 both the dynamic object and the regular object will refer to the
10520 same memory location for the variable. */
252b5132
RH		 10521 s = bfd_get_section_by_name (dynobj, ".dynbss");
10522 BFD_ASSERT (s != NULL);
10523
10524 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
10525 copy the initial value out of the dynamic object and into the
10526 runtime process image. We need to remember the offset into the
00a97672 10527 .rel(a).bss section we are going to use. */
252b5132
RH		 10528 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
10529 {
10530 asection *srel;
10531
00a97672 10532 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 10533 BFD_ASSERT (srel != NULL);
00a97672 10534 srel->size += RELOC_SIZE (globals);
f5385ebf 10535 h->needs_copy = 1;
252b5132
RH		 10536 }
10537
027297b7 10538 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 10539}
10540
5e681ec4
PB		 10541/* Allocate space in .plt, .got and associated reloc sections for
10542 dynamic relocs. */
10543
10544static bfd_boolean
57e8b36a 10545allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 10546{
10547 struct bfd_link_info *info;
10548 struct elf32_arm_link_hash_table *htab;
10549 struct elf32_arm_link_hash_entry *eh;
10550 struct elf32_arm_relocs_copied *p;
bd97cb95 10551 bfd_signed_vma thumb_refs;
5e681ec4 10552
b7693d02
DJ		 10553 eh = (struct elf32_arm_link_hash_entry *) h;
10554
5e681ec4
PB		 10555 if (h->root.type == bfd_link_hash_indirect)
10556 return TRUE;
10557
10558 if (h->root.type == bfd_link_hash_warning)
10559 /* When warning symbols are created, they **replace** the "real"
10560 entry in the hash table, thus we never get to see the real
10561 symbol in a hash traversal. So look at it now. */
10562 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10563
10564 info = (struct bfd_link_info *) inf;
10565 htab = elf32_arm_hash_table (info);
10566
10567 if (htab->root.dynamic_sections_created
10568 && h->plt.refcount > 0)
10569 {
10570 /* Make sure this symbol is output as a dynamic symbol.
10571 Undefined weak syms won't yet be marked as dynamic. */
10572 if (h->dynindx == -1
f5385ebf 10573 && !h->forced_local)
5e681ec4 10574 {
c152c796 10575 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 10576 return FALSE;
10577 }
10578
10579 if (info->shared
7359ea65 10580 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 10581 {
10582 asection *s = htab->splt;
10583
10584 /* If this is the first .plt entry, make room for the special
10585 first entry. */
eea6121a 10586 if (s->size == 0)
e5a52504 10587 s->size += htab->plt_header_size;
5e681ec4 10588
eea6121a 10589 h->plt.offset = s->size;
5e681ec4 10590
b7693d02
DJ		 10591 /* If we will insert a Thumb trampoline before this PLT, leave room
10592 for it. */
bd97cb95
DJ		 10593 thumb_refs = eh->plt_thumb_refcount;
10594 if (!htab->use_blx)
10595 thumb_refs += eh->plt_maybe_thumb_refcount;
10596
10597 if (thumb_refs > 0)
b7693d02
DJ		 10598 {
10599 h->plt.offset += PLT_THUMB_STUB_SIZE;
10600 s->size += PLT_THUMB_STUB_SIZE;
10601 }
10602
5e681ec4
PB		 10603 /* If this symbol is not defined in a regular file, and we are
10604 not generating a shared library, then set the symbol to this
10605 location in the .plt. This is required to make function
10606 pointers compare as equal between the normal executable and
10607 the shared library. */
10608 if (! info->shared
f5385ebf 10609 && !h->def_regular)
5e681ec4
PB		 10610 {
10611 h->root.u.def.section = s;
10612 h->root.u.def.value = h->plt.offset;
b7693d02
DJ		 10613
10614 /* Make sure the function is not marked as Thumb, in case
10615 it is the target of an ABS32 relocation, which will
10616 point to the PLT entry. */
10617 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
10618 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
5e681ec4
PB		 10619 }
10620
10621 /* Make room for this entry. */
e5a52504 10622 s->size += htab->plt_entry_size;
5e681ec4 10623
e5a52504 10624 if (!htab->symbian_p)
b7693d02
DJ		 10625 {
10626 /* We also need to make an entry in the .got.plt section, which
10627 will be placed in the .got section by the linker script. */
10628 eh->plt_got_offset = htab->sgotplt->size;
10629 htab->sgotplt->size += 4;
10630 }
5e681ec4 10631
00a97672
RS		 10632 /* We also need to make an entry in the .rel(a).plt section. */
10633 htab->srelplt->size += RELOC_SIZE (htab);
10634
10635 /* VxWorks executables have a second set of relocations for
10636 each PLT entry. They go in a separate relocation section,
10637 which is processed by the kernel loader. */
10638 if (htab->vxworks_p && !info->shared)
10639 {
10640 /* There is a relocation for the initial PLT entry:
10641 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
10642 if (h->plt.offset == htab->plt_header_size)
10643 htab->srelplt2->size += RELOC_SIZE (htab);
10644
10645 /* There are two extra relocations for each subsequent
10646 PLT entry: an R_ARM_32 relocation for the GOT entry,
10647 and an R_ARM_32 relocation for the PLT entry. */
10648 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
10649 }
5e681ec4
PB		 10650 }
10651 else
10652 {
10653 h->plt.offset = (bfd_vma) -1;
f5385ebf 10654 h->needs_plt = 0;
5e681ec4
PB		 10655 }
10656 }
10657 else
10658 {
10659 h->plt.offset = (bfd_vma) -1;
f5385ebf 10660 h->needs_plt = 0;
5e681ec4
PB		 10661 }
10662
10663 if (h->got.refcount > 0)
10664 {
10665 asection *s;
10666 bfd_boolean dyn;
ba93b8ac
DJ		 10667 int tls_type = elf32_arm_hash_entry (h)->tls_type;
10668 int indx;
5e681ec4
PB		 10669
10670 /* Make sure this symbol is output as a dynamic symbol.
10671 Undefined weak syms won't yet be marked as dynamic. */
10672 if (h->dynindx == -1
f5385ebf 10673 && !h->forced_local)
5e681ec4 10674 {
c152c796 10675 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 10676 return FALSE;
10677 }
10678
e5a52504
MM		 10679 if (!htab->symbian_p)
10680 {
10681 s = htab->sgot;
10682 h->got.offset = s->size;
ba93b8ac
DJ		 10683
10684 if (tls_type == GOT_UNKNOWN)
10685 abort ();
10686
10687 if (tls_type == GOT_NORMAL)
10688 /* Non-TLS symbols need one GOT slot. */
10689 s->size += 4;
10690 else
10691 {
10692 if (tls_type & GOT_TLS_GD)
10693 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
10694 s->size += 8;
10695 if (tls_type & GOT_TLS_IE)
10696 /* R_ARM_TLS_IE32 needs one GOT slot. */
10697 s->size += 4;
10698 }
10699
e5a52504 10700 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 10701
10702 indx = 0;
10703 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
10704 && (!info->shared
10705 || !SYMBOL_REFERENCES_LOCAL (info, h)))
10706 indx = h->dynindx;
10707
10708 if (tls_type != GOT_NORMAL
10709 && (info->shared || indx != 0)
10710 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10711 || h->root.type != bfd_link_hash_undefweak))
10712 {
10713 if (tls_type & GOT_TLS_IE)
00a97672 10714 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 10715
10716 if (tls_type & GOT_TLS_GD)
00a97672 10717 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 10718
10719 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 10720 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 10721 }
10722 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10723 || h->root.type != bfd_link_hash_undefweak)
10724 && (info->shared
10725 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 10726 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 10727 }
5e681ec4
PB		 10728 }
10729 else
10730 h->got.offset = (bfd_vma) -1;
10731
a4fd1a8e
PB		 10732 /* Allocate stubs for exported Thumb functions on v4t. */
10733 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 10734 && h->def_regular
a4fd1a8e
PB		 10735 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
10736 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
10737 {
10738 struct elf_link_hash_entry * th;
10739 struct bfd_link_hash_entry * bh;
10740 struct elf_link_hash_entry * myh;
10741 char name[1024];
10742 asection *s;
10743 bh = NULL;
10744 /* Create a new symbol to regist the real location of the function. */
10745 s = h->root.u.def.section;
906e58ca 10746 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 10747 _bfd_generic_link_add_one_symbol (info, s->owner,
10748 name, BSF_GLOBAL, s,
10749 h->root.u.def.value,
10750 NULL, TRUE, FALSE, &bh);
10751
10752 myh = (struct elf_link_hash_entry *) bh;
10753 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
10754 myh->forced_local = 1;
10755 eh->export_glue = myh;
10756 th = record_arm_to_thumb_glue (info, h);
10757 /* Point the symbol at the stub. */
10758 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
10759 h->root.u.def.section = th->root.u.def.section;
10760 h->root.u.def.value = th->root.u.def.value & ~1;
10761 }
10762
5e681ec4
PB		 10763 if (eh->relocs_copied == NULL)
10764 return TRUE;
10765
10766 /* In the shared -Bsymbolic case, discard space allocated for
10767 dynamic pc-relative relocs against symbols which turn out to be
10768 defined in regular objects. For the normal shared case, discard
10769 space for pc-relative relocs that have become local due to symbol
10770 visibility changes. */
10771
67687978 10772 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 10773 {
7bdca076 10774 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 10775 R_ARM_REL32_NOI, which will appear on something like
10776 ".long foo - .". We want calls to protected symbols to resolve
10777 directly to the function rather than going via the plt. If people
10778 want function pointer comparisons to work as expected then they
10779 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 10780 if (SYMBOL_CALLS_LOCAL (info, h))
10781 {
10782 struct elf32_arm_relocs_copied **pp;
10783
10784 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
10785 {
10786 p->count -= p->pc_count;
10787 p->pc_count = 0;
10788 if (p->count == 0)
10789 *pp = p->next;
10790 else
10791 pp = &p->next;
10792 }
10793 }
10794
3348747a
NS		 10795 if (elf32_arm_hash_table (info)->vxworks_p)
10796 {
10797 struct elf32_arm_relocs_copied **pp;
10798
10799 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
10800 {
10801 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
10802 *pp = p->next;
10803 else
10804 pp = &p->next;
10805 }
10806 }
10807
ba93b8ac 10808 /* Also discard relocs on undefined weak syms with non-default
7359ea65 10809 visibility. */
22d606e9 10810 if (eh->relocs_copied != NULL
5e681ec4 10811 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 10812 {
10813 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
10814 eh->relocs_copied = NULL;
10815
10816 /* Make sure undefined weak symbols are output as a dynamic
10817 symbol in PIEs. */
10818 else if (h->dynindx == -1
10819 && !h->forced_local)
10820 {
10821 if (! bfd_elf_link_record_dynamic_symbol (info, h))
10822 return FALSE;
10823 }
10824 }
10825
67687978
PB		 10826 else if (htab->root.is_relocatable_executable && h->dynindx == -1
10827 && h->root.type == bfd_link_hash_new)
10828 {
10829 /* Output absolute symbols so that we can create relocations
10830 against them. For normal symbols we output a relocation
10831 against the section that contains them. */
10832 if (! bfd_elf_link_record_dynamic_symbol (info, h))
10833 return FALSE;
10834 }
10835
5e681ec4
PB		 10836 }
10837 else
10838 {
10839 /* For the non-shared case, discard space for relocs against
10840 symbols which turn out to need copy relocs or are not
10841 dynamic. */
10842
f5385ebf
AM		 10843 if (!h->non_got_ref
10844 && ((h->def_dynamic
10845 && !h->def_regular)
5e681ec4
PB		 10846 || (htab->root.dynamic_sections_created
10847 && (h->root.type == bfd_link_hash_undefweak
10848 || h->root.type == bfd_link_hash_undefined))))
10849 {
10850 /* Make sure this symbol is output as a dynamic symbol.
10851 Undefined weak syms won't yet be marked as dynamic. */
10852 if (h->dynindx == -1
f5385ebf 10853 && !h->forced_local)
5e681ec4 10854 {
c152c796 10855 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 10856 return FALSE;
10857 }
10858
10859 /* If that succeeded, we know we'll be keeping all the
10860 relocs. */
10861 if (h->dynindx != -1)
10862 goto keep;
10863 }
10864
10865 eh->relocs_copied = NULL;
10866
10867 keep: ;
10868 }
10869
10870 /* Finally, allocate space. */
10871 for (p = eh->relocs_copied; p != NULL; p = p->next)
10872 {
10873 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 10874 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 10875 }
10876
10877 return TRUE;
10878}
10879
08d1f311
DJ		 10880/* Find any dynamic relocs that apply to read-only sections. */
10881
10882static bfd_boolean
8029a119 10883elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 10884{
8029a119
NC		 10885 struct elf32_arm_link_hash_entry * eh;
10886 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 10887
10888 if (h->root.type == bfd_link_hash_warning)
10889 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10890
10891 eh = (struct elf32_arm_link_hash_entry *) h;
10892 for (p = eh->relocs_copied; p != NULL; p = p->next)
10893 {
10894 asection *s = p->section;
10895
10896 if (s != NULL && (s->flags & SEC_READONLY) != 0)
10897 {
10898 struct bfd_link_info *info = (struct bfd_link_info *) inf;
10899
10900 info->flags |= DF_TEXTREL;
10901
10902 /* Not an error, just cut short the traversal. */
10903 return FALSE;
10904 }
10905 }
10906 return TRUE;
10907}
10908
d504ffc8
DJ		 10909void
10910bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
10911 int byteswap_code)
10912{
10913 struct elf32_arm_link_hash_table *globals;
10914
10915 globals = elf32_arm_hash_table (info);
10916 globals->byteswap_code = byteswap_code;
10917}
10918
252b5132
RH		 10919/* Set the sizes of the dynamic sections. */
10920
b34976b6 10921static bfd_boolean
57e8b36a
NC		 10922elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
10923 struct bfd_link_info * info)
252b5132
RH		 10924{
10925 bfd * dynobj;
10926 asection * s;
b34976b6
AM		 10927 bfd_boolean plt;
10928 bfd_boolean relocs;
5e681ec4
PB		 10929 bfd *ibfd;
10930 struct elf32_arm_link_hash_table *htab;
252b5132 10931
5e681ec4 10932 htab = elf32_arm_hash_table (info);
252b5132
RH		 10933 dynobj = elf_hash_table (info)->dynobj;
10934 BFD_ASSERT (dynobj != NULL);
39b41c9c 10935 check_use_blx (htab);
252b5132
RH		 10936
10937 if (elf_hash_table (info)->dynamic_sections_created)
10938 {
10939 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 10940 if (info->executable)
252b5132
RH		 10941 {
10942 s = bfd_get_section_by_name (dynobj, ".interp");
10943 BFD_ASSERT (s != NULL);
eea6121a 10944 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 10945 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
10946 }
10947 }
5e681ec4
PB		 10948
10949 /* Set up .got offsets for local syms, and space for local dynamic
10950 relocs. */
10951 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 10952 {
5e681ec4
PB		 10953 bfd_signed_vma *local_got;
10954 bfd_signed_vma *end_local_got;
10955 char *local_tls_type;
10956 bfd_size_type locsymcount;
10957 Elf_Internal_Shdr *symtab_hdr;
10958 asection *srel;
3348747a 10959 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 10960
0ffa91dd 10961 if (! is_arm_elf (ibfd))
5e681ec4
PB		 10962 continue;
10963
10964 for (s = ibfd->sections; s != NULL; s = s->next)
10965 {
10966 struct elf32_arm_relocs_copied *p;
10967
6edfbbad 10968 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 10969 {
10970 if (!bfd_is_abs_section (p->section)
10971 && bfd_is_abs_section (p->section->output_section))
10972 {
10973 /* Input section has been discarded, either because
10974 it is a copy of a linkonce section or due to
10975 linker script /DISCARD/, so we'll be discarding
10976 the relocs too. */
10977 }
3348747a
NS		 10978 else if (is_vxworks
10979 && strcmp (p->section->output_section->name,
10980 ".tls_vars") == 0)
10981 {
10982 /* Relocations in vxworks .tls_vars sections are
10983 handled specially by the loader. */
10984 }
5e681ec4
PB		 10985 else if (p->count != 0)
10986 {
10987 srel = elf_section_data (p->section)->sreloc;
00a97672 10988 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 10989 if ((p->section->output_section->flags & SEC_READONLY) != 0)
10990 info->flags |= DF_TEXTREL;
10991 }
10992 }
10993 }
10994
10995 local_got = elf_local_got_refcounts (ibfd);
10996 if (!local_got)
10997 continue;
10998
0ffa91dd 10999 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11000 locsymcount = symtab_hdr->sh_info;
11001 end_local_got = local_got + locsymcount;
ba93b8ac 11002 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11003 s = htab->sgot;
11004 srel = htab->srelgot;
11005 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11006 {
11007 if (*local_got > 0)
11008 {
eea6121a 11009 *local_got = s->size;
ba93b8ac
DJ		 11010 if (*local_tls_type & GOT_TLS_GD)
11011 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11012 s->size += 8;
11013 if (*local_tls_type & GOT_TLS_IE)
11014 s->size += 4;
11015 if (*local_tls_type == GOT_NORMAL)
11016 s->size += 4;
11017
11018 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11019 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11020 }
11021 else
11022 *local_got = (bfd_vma) -1;
11023 }
252b5132
RH		 11024 }
11025
ba93b8ac
DJ		 11026 if (htab->tls_ldm_got.refcount > 0)
11027 {
11028 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11029 for R_ARM_TLS_LDM32 relocations. */
11030 htab->tls_ldm_got.offset = htab->sgot->size;
11031 htab->sgot->size += 8;
11032 if (info->shared)
00a97672 11033 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11034 }
11035 else
11036 htab->tls_ldm_got.offset = -1;
11037
5e681ec4
PB		 11038 /* Allocate global sym .plt and .got entries, and space for global
11039 sym dynamic relocs. */
57e8b36a 11040 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11041
d504ffc8
DJ		 11042 /* Here we rummage through the found bfds to collect glue information. */
11043 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11044 {
0ffa91dd 11045 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11046 continue;
11047
c7b8f16e
JB		 11048 /* Initialise mapping tables for code/data. */
11049 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11050
c7b8f16e
JB		 11051 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11052 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11053 /* xgettext:c-format */
11054 _bfd_error_handler (_("Errors encountered processing file %s"),
11055 ibfd->filename);
11056 }
d504ffc8 11057
3e6b1042
DJ		 11058 /* Allocate space for the glue sections now that we've sized them. */
11059 bfd_elf32_arm_allocate_interworking_sections (info);
11060
252b5132
RH		 11061 /* The check_relocs and adjust_dynamic_symbol entry points have
11062 determined the sizes of the various dynamic sections. Allocate
11063 memory for them. */
b34976b6
AM		 11064 plt = FALSE;
11065 relocs = FALSE;
252b5132
RH		 11066 for (s = dynobj->sections; s != NULL; s = s->next)
11067 {
11068 const char * name;
252b5132
RH		 11069
11070 if ((s->flags & SEC_LINKER_CREATED) == 0)
11071 continue;
11072
11073 /* It's OK to base decisions on the section name, because none
11074 of the dynobj section names depend upon the input files. */
11075 name = bfd_get_section_name (dynobj, s);
11076
24a1ba0f 11077 if (strcmp (name, ".plt") == 0)
252b5132 11078 {
c456f082
AM		 11079 /* Remember whether there is a PLT. */
11080 plt = s->size != 0;
252b5132 11081 }
0112cd26 11082 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11083 {
c456f082 11084 if (s->size != 0)
252b5132 11085 {
252b5132 11086 /* Remember whether there are any reloc sections other
00a97672
RS		 11087 than .rel(a).plt and .rela.plt.unloaded. */
11088 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11089 relocs = TRUE;
252b5132
RH		 11090
11091 /* We use the reloc_count field as a counter if we need
11092 to copy relocs into the output file. */
11093 s->reloc_count = 0;
11094 }
11095 }
0112cd26 11096 else if (! CONST_STRNEQ (name, ".got")
c456f082 11097 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11098 {
11099 /* It's not one of our sections, so don't allocate space. */
11100 continue;
11101 }
11102
c456f082 11103 if (s->size == 0)
252b5132 11104 {
c456f082 11105 /* If we don't need this section, strip it from the
00a97672
RS		 11106 output file. This is mostly to handle .rel(a).bss and
11107 .rel(a).plt. We must create both sections in
c456f082
AM		 11108 create_dynamic_sections, because they must be created
11109 before the linker maps input sections to output
11110 sections. The linker does that before
11111 adjust_dynamic_symbol is called, and it is that
11112 function which decides whether anything needs to go
11113 into these sections. */
8423293d 11114 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11115 continue;
11116 }
11117
c456f082
AM		 11118 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11119 continue;
11120
252b5132 11121 /* Allocate memory for the section contents. */
906e58ca 11122 s->contents = bfd_zalloc (dynobj, s->size);
c456f082 11123 if (s->contents == NULL)
b34976b6 11124 return FALSE;
252b5132
RH		 11125 }
11126
11127 if (elf_hash_table (info)->dynamic_sections_created)
11128 {
11129 /* Add some entries to the .dynamic section. We fill in the
11130 values later, in elf32_arm_finish_dynamic_sections, but we
11131 must add the entries now so that we get the correct size for
11132 the .dynamic section. The DT_DEBUG entry is filled in by the
11133 dynamic linker and used by the debugger. */
dc810e39 11134#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11135 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 11136
8532796c 11137 if (info->executable)
252b5132 11138 {
dc810e39 11139 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 11140 return FALSE;
252b5132
RH		 11141 }
11142
11143 if (plt)
11144 {
dc810e39
AM		 11145 if ( !add_dynamic_entry (DT_PLTGOT, 0)
11146 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 11147 || !add_dynamic_entry (DT_PLTREL,
11148 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 11149 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 11150 return FALSE;
252b5132
RH		 11151 }
11152
11153 if (relocs)
11154 {
00a97672
RS		 11155 if (htab->use_rel)
11156 {
11157 if (!add_dynamic_entry (DT_REL, 0)
11158 || !add_dynamic_entry (DT_RELSZ, 0)
11159 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
11160 return FALSE;
11161 }
11162 else
11163 {
11164 if (!add_dynamic_entry (DT_RELA, 0)
11165 || !add_dynamic_entry (DT_RELASZ, 0)
11166 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
11167 return FALSE;
11168 }
252b5132
RH		 11169 }
11170
08d1f311
DJ		 11171 /* If any dynamic relocs apply to a read-only section,
11172 then we need a DT_TEXTREL entry. */
11173 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 11174 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
11175 info);
08d1f311 11176
99e4ae17 11177 if ((info->flags & DF_TEXTREL) != 0)
252b5132 11178 {
dc810e39 11179 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 11180 return FALSE;
252b5132 11181 }
7a2b07ff
NS		 11182 if (htab->vxworks_p
11183 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
11184 return FALSE;
252b5132 11185 }
8532796c 11186#undef add_dynamic_entry
252b5132 11187
b34976b6 11188 return TRUE;
252b5132
RH		 11189}
11190
252b5132
RH		 11191/* Finish up dynamic symbol handling. We set the contents of various
11192 dynamic sections here. */
11193
b34976b6 11194static bfd_boolean
906e58ca
NC		 11195elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
11196 struct bfd_link_info * info,
11197 struct elf_link_hash_entry * h,
11198 Elf_Internal_Sym * sym)
252b5132
RH		 11199{
11200 bfd * dynobj;
e5a52504 11201 struct elf32_arm_link_hash_table *htab;
b7693d02 11202 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 11203
11204 dynobj = elf_hash_table (info)->dynobj;
e5a52504 11205 htab = elf32_arm_hash_table (info);
b7693d02 11206 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 11207
11208 if (h->plt.offset != (bfd_vma) -1)
11209 {
11210 asection * splt;
252b5132 11211 asection * srel;
e5a52504 11212 bfd_byte *loc;
24a1ba0f 11213 bfd_vma plt_index;
947216bf 11214 Elf_Internal_Rela rel;
252b5132
RH		 11215
11216 /* This symbol has an entry in the procedure linkage table. Set
11217 it up. */
11218
11219 BFD_ASSERT (h->dynindx != -1);
11220
11221 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 11222 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 11223 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 11224
e5a52504
MM		 11225 /* Fill in the entry in the procedure linkage table. */
11226 if (htab->symbian_p)
11227 {
906e58ca 11228 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 11229 elf32_arm_symbian_plt_entry[0],
11230 splt->contents + h->plt.offset);
906e58ca 11231 bfd_put_32 (output_bfd,
52ab56c2
PB		 11232 elf32_arm_symbian_plt_entry[1],
11233 splt->contents + h->plt.offset + 4);
906e58ca 11234
e5a52504 11235 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 11236 rel.r_offset = (splt->output_section->vma
11237 + splt->output_offset
52ab56c2 11238 + h->plt.offset + 4);
e5a52504 11239 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 11240
11241 /* Get the index in the procedure linkage table which
11242 corresponds to this symbol. This is the index of this symbol
11243 in all the symbols for which we are making plt entries. The
11244 first entry in the procedure linkage table is reserved. */
906e58ca 11245 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 11246 / htab->plt_entry_size);
e5a52504
MM		 11247 }
11248 else
11249 {
00a97672 11250 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 11251 bfd_vma got_displacement;
11252 asection * sgot;
52ab56c2 11253 bfd_byte * ptr;
906e58ca 11254
e5a52504
MM		 11255 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
11256 BFD_ASSERT (sgot != NULL);
11257
b7693d02
DJ		 11258 /* Get the offset into the .got.plt table of the entry that
11259 corresponds to this function. */
11260 got_offset = eh->plt_got_offset;
11261
11262 /* Get the index in the procedure linkage table which
11263 corresponds to this symbol. This is the index of this symbol
11264 in all the symbols for which we are making plt entries. The
11265 first three entries in .got.plt are reserved; after that
11266 symbols appear in the same order as in .plt. */
11267 plt_index = (got_offset - 12) / 4;
e5a52504 11268
00a97672
RS		 11269 /* Calculate the address of the GOT entry. */
11270 got_address = (sgot->output_section->vma
11271 + sgot->output_offset
11272 + got_offset);
5e681ec4 11273
00a97672
RS		 11274 /* ...and the address of the PLT entry. */
11275 plt_address = (splt->output_section->vma
11276 + splt->output_offset
11277 + h->plt.offset);
5e681ec4 11278
52ab56c2 11279 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 11280 if (htab->vxworks_p && info->shared)
11281 {
11282 unsigned int i;
11283 bfd_vma val;
11284
52ab56c2 11285 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 11286 {
11287 val = elf32_arm_vxworks_shared_plt_entry[i];
11288 if (i == 2)
11289 val |= got_address - sgot->output_section->vma;
11290 if (i == 5)
11291 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 11292 if (i == 2 || i == 5)
11293 bfd_put_32 (output_bfd, val, ptr);
11294 else
11295 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 11296 }
11297 }
11298 else if (htab->vxworks_p)
b7693d02 11299 {
00a97672
RS		 11300 unsigned int i;
11301 bfd_vma val;
11302
d3753b85 11303 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 11304 {
11305 val = elf32_arm_vxworks_exec_plt_entry[i];
11306 if (i == 2)
11307 val |= got_address;
11308 if (i == 4)
11309 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
11310 if (i == 5)
11311 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 11312 if (i == 2 || i == 5)
11313 bfd_put_32 (output_bfd, val, ptr);
11314 else
11315 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 11316 }
11317
11318 loc = (htab->srelplt2->contents
11319 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
11320
11321 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
11322 referencing the GOT for this PLT entry. */
11323 rel.r_offset = plt_address + 8;
11324 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
11325 rel.r_addend = got_offset;
11326 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
11327 loc += RELOC_SIZE (htab);
11328
11329 /* Create the R_ARM_ABS32 relocation referencing the
11330 beginning of the PLT for this GOT entry. */
11331 rel.r_offset = got_address;
11332 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
11333 rel.r_addend = 0;
11334 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 11335 }
00a97672
RS		 11336 else
11337 {
bd97cb95 11338 bfd_signed_vma thumb_refs;
00a97672
RS		 11339 /* Calculate the displacement between the PLT slot and the
11340 entry in the GOT. The eight-byte offset accounts for the
11341 value produced by adding to pc in the first instruction
11342 of the PLT stub. */
11343 got_displacement = got_address - (plt_address + 8);
b7693d02 11344
00a97672
RS		 11345 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
11346
bd97cb95
DJ		 11347 thumb_refs = eh->plt_thumb_refcount;
11348 if (!htab->use_blx)
11349 thumb_refs += eh->plt_maybe_thumb_refcount;
11350
11351 if (thumb_refs > 0)
00a97672 11352 {
52ab56c2
PB		 11353 put_thumb_insn (htab, output_bfd,
11354 elf32_arm_plt_thumb_stub[0], ptr - 4);
11355 put_thumb_insn (htab, output_bfd,
11356 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 11357 }
11358
52ab56c2
PB		 11359 put_arm_insn (htab, output_bfd,
11360 elf32_arm_plt_entry[0]
11361 | ((got_displacement & 0x0ff00000) >> 20),
11362 ptr + 0);
11363 put_arm_insn (htab, output_bfd,
11364 elf32_arm_plt_entry[1]
11365 | ((got_displacement & 0x000ff000) >> 12),
11366 ptr+ 4);
11367 put_arm_insn (htab, output_bfd,
11368 elf32_arm_plt_entry[2]
11369 | (got_displacement & 0x00000fff),
11370 ptr + 8);
5e681ec4 11371#ifdef FOUR_WORD_PLT
52ab56c2 11372 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 11373#endif
00a97672 11374 }
252b5132 11375
e5a52504
MM		 11376 /* Fill in the entry in the global offset table. */
11377 bfd_put_32 (output_bfd,
11378 (splt->output_section->vma
11379 + splt->output_offset),
11380 sgot->contents + got_offset);
906e58ca 11381
00a97672
RS		 11382 /* Fill in the entry in the .rel(a).plt section. */
11383 rel.r_addend = 0;
11384 rel.r_offset = got_address;
e5a52504
MM		 11385 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
11386 }
57e8b36a 11387
00a97672
RS		 11388 loc = srel->contents + plt_index * RELOC_SIZE (htab);
11389 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 11390
f5385ebf 11391 if (!h->def_regular)
252b5132
RH		 11392 {
11393 /* Mark the symbol as undefined, rather than as defined in
11394 the .plt section. Leave the value alone. */
11395 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 11396 /* If the symbol is weak, we do need to clear the value.
11397 Otherwise, the PLT entry would provide a definition for
11398 the symbol even if the symbol wasn't defined anywhere,
11399 and so the symbol would never be NULL. */
f5385ebf 11400 if (!h->ref_regular_nonweak)
d982ba73 11401 sym->st_value = 0;
252b5132
RH		 11402 }
11403 }
11404
ba93b8ac
DJ		 11405 if (h->got.offset != (bfd_vma) -1
11406 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
11407 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 11408 {
11409 asection * sgot;
11410 asection * srel;
947216bf
AM		 11411 Elf_Internal_Rela rel;
11412 bfd_byte *loc;
00a97672 11413 bfd_vma offset;
252b5132
RH		 11414
11415 /* This symbol has an entry in the global offset table. Set it
11416 up. */
252b5132 11417 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 11418 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 11419 BFD_ASSERT (sgot != NULL && srel != NULL);
11420
00a97672
RS		 11421 offset = (h->got.offset & ~(bfd_vma) 1);
11422 rel.r_addend = 0;
252b5132
RH		 11423 rel.r_offset = (sgot->output_section->vma
11424 + sgot->output_offset
00a97672 11425 + offset);
252b5132 11426
5e681ec4
PB		 11427 /* If this is a static link, or it is a -Bsymbolic link and the
11428 symbol is defined locally or was forced to be local because
11429 of a version file, we just want to emit a RELATIVE reloc.
11430 The entry in the global offset table will already have been
11431 initialized in the relocate_section function. */
252b5132 11432 if (info->shared
5e681ec4
PB		 11433 && SYMBOL_REFERENCES_LOCAL (info, h))
11434 {
906e58ca 11435 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 11436 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 11437 if (!htab->use_rel)
11438 {
11439 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
11440 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
11441 }
5e681ec4 11442 }
252b5132
RH		 11443 else
11444 {
906e58ca 11445 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 11446 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 11447 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11448 }
11449
00a97672
RS		 11450 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
11451 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 11452 }
11453
f5385ebf 11454 if (h->needs_copy)
252b5132
RH		 11455 {
11456 asection * s;
947216bf
AM		 11457 Elf_Internal_Rela rel;
11458 bfd_byte *loc;
252b5132
RH		 11459
11460 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 11461 BFD_ASSERT (h->dynindx != -1
11462 && (h->root.type == bfd_link_hash_defined
11463 || h->root.type == bfd_link_hash_defweak));
11464
11465 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 11466 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 11467 BFD_ASSERT (s != NULL);
11468
00a97672 11469 rel.r_addend = 0;
252b5132
RH		 11470 rel.r_offset = (h->root.u.def.value
11471 + h->root.u.def.section->output_section->vma
11472 + h->root.u.def.section->output_offset);
11473 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 11474 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
11475 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 11476 }
11477
00a97672
RS		 11478 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
11479 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
11480 to the ".got" section. */
252b5132 11481 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 11482 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 11483 sym->st_shndx = SHN_ABS;
11484
b34976b6 11485 return TRUE;
252b5132
RH		 11486}
11487
11488/* Finish up the dynamic sections. */
11489
b34976b6 11490static bfd_boolean
57e8b36a 11491elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 11492{
11493 bfd * dynobj;
11494 asection * sgot;
11495 asection * sdyn;
11496
11497 dynobj = elf_hash_table (info)->dynobj;
11498
11499 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 11500 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 11501 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
11502
11503 if (elf_hash_table (info)->dynamic_sections_created)
11504 {
11505 asection *splt;
11506 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 11507 struct elf32_arm_link_hash_table *htab;
252b5132 11508
229fcec5 11509 htab = elf32_arm_hash_table (info);
252b5132 11510 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 11511 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 11512
11513 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 11514 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 11515
252b5132
RH		 11516 for (; dyncon < dynconend; dyncon++)
11517 {
11518 Elf_Internal_Dyn dyn;
11519 const char * name;
11520 asection * s;
11521
11522 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
11523
11524 switch (dyn.d_tag)
11525 {
229fcec5
MM		 11526 unsigned int type;
11527
252b5132 11528 default:
7a2b07ff
NS		 11529 if (htab->vxworks_p
11530 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
11531 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 11532 break;
11533
229fcec5
MM		 11534 case DT_HASH:
11535 name = ".hash";
11536 goto get_vma_if_bpabi;
11537 case DT_STRTAB:
11538 name = ".dynstr";
11539 goto get_vma_if_bpabi;
11540 case DT_SYMTAB:
11541 name = ".dynsym";
11542 goto get_vma_if_bpabi;
c0042f5d
MM		 11543 case DT_VERSYM:
11544 name = ".gnu.version";
11545 goto get_vma_if_bpabi;
11546 case DT_VERDEF:
11547 name = ".gnu.version_d";
11548 goto get_vma_if_bpabi;
11549 case DT_VERNEED:
11550 name = ".gnu.version_r";
11551 goto get_vma_if_bpabi;
11552
252b5132
RH		 11553 case DT_PLTGOT:
11554 name = ".got";
11555 goto get_vma;
11556 case DT_JMPREL:
00a97672 11557 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 11558 get_vma:
11559 s = bfd_get_section_by_name (output_bfd, name);
11560 BFD_ASSERT (s != NULL);
229fcec5
MM		 11561 if (!htab->symbian_p)
11562 dyn.d_un.d_ptr = s->vma;
11563 else
11564 /* In the BPABI, tags in the PT_DYNAMIC section point
11565 at the file offset, not the memory address, for the
11566 convenience of the post linker. */
11567 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 11568 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
11569 break;
11570
229fcec5
MM		 11571 get_vma_if_bpabi:
11572 if (htab->symbian_p)
11573 goto get_vma;
11574 break;
11575
252b5132 11576 case DT_PLTRELSZ:
00a97672
RS		 11577 s = bfd_get_section_by_name (output_bfd,
11578 RELOC_SECTION (htab, ".plt"));
252b5132 11579 BFD_ASSERT (s != NULL);
eea6121a 11580 dyn.d_un.d_val = s->size;
252b5132
RH		 11581 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
11582 break;
906e58ca 11583
252b5132 11584 case DT_RELSZ:
00a97672 11585 case DT_RELASZ:
229fcec5
MM		 11586 if (!htab->symbian_p)
11587 {
11588 /* My reading of the SVR4 ABI indicates that the
11589 procedure linkage table relocs (DT_JMPREL) should be
11590 included in the overall relocs (DT_REL). This is
11591 what Solaris does. However, UnixWare can not handle
11592 that case. Therefore, we override the DT_RELSZ entry
11593 here to make it not include the JMPREL relocs. Since
00a97672 11594 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 11595 other relocation sections, we don't have to worry
11596 about changing the DT_REL entry. */
00a97672
RS		 11597 s = bfd_get_section_by_name (output_bfd,
11598 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 11599 if (s != NULL)
11600 dyn.d_un.d_val -= s->size;
11601 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
11602 break;
11603 }
8029a119 11604 /* Fall through. */
229fcec5
MM		 11605
11606 case DT_REL:
11607 case DT_RELA:
229fcec5
MM		 11608 /* In the BPABI, the DT_REL tag must point at the file
11609 offset, not the VMA, of the first relocation
11610 section. So, we use code similar to that in
11611 elflink.c, but do not check for SHF_ALLOC on the
11612 relcoation section, since relocations sections are
11613 never allocated under the BPABI. The comments above
11614 about Unixware notwithstanding, we include all of the
11615 relocations here. */
11616 if (htab->symbian_p)
11617 {
11618 unsigned int i;
11619 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
11620 ? SHT_REL : SHT_RELA);
11621 dyn.d_un.d_val = 0;
11622 for (i = 1; i < elf_numsections (output_bfd); i++)
11623 {
906e58ca 11624 Elf_Internal_Shdr *hdr
229fcec5
MM		 11625 = elf_elfsections (output_bfd)[i];
11626 if (hdr->sh_type == type)
11627 {
906e58ca 11628 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 11629 || dyn.d_tag == DT_RELASZ)
11630 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 11631 else if ((ufile_ptr) hdr->sh_offset
11632 <= dyn.d_un.d_val - 1)
229fcec5
MM		 11633 dyn.d_un.d_val = hdr->sh_offset;
11634 }
11635 }
11636 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
11637 }
252b5132 11638 break;
88f7bcd5
NC		 11639
11640 /* Set the bottom bit of DT_INIT/FINI if the
11641 corresponding function is Thumb. */
11642 case DT_INIT:
11643 name = info->init_function;
11644 goto get_sym;
11645 case DT_FINI:
11646 name = info->fini_function;
11647 get_sym:
11648 /* If it wasn't set by elf_bfd_final_link
4cc11e76 11649 then there is nothing to adjust. */
88f7bcd5
NC		 11650 if (dyn.d_un.d_val != 0)
11651 {
11652 struct elf_link_hash_entry * eh;
11653
11654 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 11655 FALSE, FALSE, TRUE);
906e58ca 11656 if (eh != NULL
88f7bcd5
NC		 11657 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
11658 {
11659 dyn.d_un.d_val |= 1;
b34976b6 11660 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 11661 }
11662 }
11663 break;
252b5132
RH		 11664 }
11665 }
11666
24a1ba0f 11667 /* Fill in the first entry in the procedure linkage table. */
e5a52504 11668 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 11669 {
00a97672
RS		 11670 const bfd_vma *plt0_entry;
11671 bfd_vma got_address, plt_address, got_displacement;
11672
11673 /* Calculate the addresses of the GOT and PLT. */
11674 got_address = sgot->output_section->vma + sgot->output_offset;
11675 plt_address = splt->output_section->vma + splt->output_offset;
11676
11677 if (htab->vxworks_p)
11678 {
11679 /* The VxWorks GOT is relocated by the dynamic linker.
11680 Therefore, we must emit relocations rather than simply
11681 computing the values now. */
11682 Elf_Internal_Rela rel;
11683
11684 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 11685 put_arm_insn (htab, output_bfd, plt0_entry[0],
11686 splt->contents + 0);
11687 put_arm_insn (htab, output_bfd, plt0_entry[1],
11688 splt->contents + 4);
11689 put_arm_insn (htab, output_bfd, plt0_entry[2],
11690 splt->contents + 8);
00a97672
RS		 11691 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
11692
8029a119 11693 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 11694 rel.r_offset = plt_address + 12;
11695 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
11696 rel.r_addend = 0;
11697 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
11698 htab->srelplt2->contents);
11699 }
11700 else
11701 {
11702 got_displacement = got_address - (plt_address + 16);
11703
11704 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 11705 put_arm_insn (htab, output_bfd, plt0_entry[0],
11706 splt->contents + 0);
11707 put_arm_insn (htab, output_bfd, plt0_entry[1],
11708 splt->contents + 4);
11709 put_arm_insn (htab, output_bfd, plt0_entry[2],
11710 splt->contents + 8);
11711 put_arm_insn (htab, output_bfd, plt0_entry[3],
11712 splt->contents + 12);
5e681ec4 11713
5e681ec4 11714#ifdef FOUR_WORD_PLT
00a97672
RS		 11715 /* The displacement value goes in the otherwise-unused
11716 last word of the second entry. */
11717 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 11718#else
00a97672 11719 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 11720#endif
00a97672 11721 }
f7a74f8c 11722 }
252b5132
RH		 11723
11724 /* UnixWare sets the entsize of .plt to 4, although that doesn't
11725 really seem like the right value. */
74541ad4
AM		 11726 if (splt->output_section->owner == output_bfd)
11727 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 11728
11729 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
11730 {
11731 /* Correct the .rel(a).plt.unloaded relocations. They will have
11732 incorrect symbol indexes. */
11733 int num_plts;
eed62c48 11734 unsigned char *p;
00a97672
RS		 11735
11736 num_plts = ((htab->splt->size - htab->plt_header_size)
11737 / htab->plt_entry_size);
11738 p = htab->srelplt2->contents + RELOC_SIZE (htab);
11739
11740 for (; num_plts; num_plts--)
11741 {
11742 Elf_Internal_Rela rel;
11743
11744 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
11745 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
11746 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
11747 p += RELOC_SIZE (htab);
11748
11749 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
11750 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
11751 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
11752 p += RELOC_SIZE (htab);
11753 }
11754 }
252b5132
RH		 11755 }
11756
11757 /* Fill in the first three entries in the global offset table. */
229fcec5 11758 if (sgot)
252b5132 11759 {
229fcec5
MM		 11760 if (sgot->size > 0)
11761 {
11762 if (sdyn == NULL)
11763 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
11764 else
11765 bfd_put_32 (output_bfd,
11766 sdyn->output_section->vma + sdyn->output_offset,
11767 sgot->contents);
11768 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
11769 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
11770 }
252b5132 11771
229fcec5
MM		 11772 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
11773 }
252b5132 11774
b34976b6 11775 return TRUE;
252b5132
RH		 11776}
11777
ba96a88f 11778static void
57e8b36a 11779elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 11780{
9b485d32 11781 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 11782 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 11783
11784 i_ehdrp = elf_elfheader (abfd);
11785
94a3258f
PB		 11786 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
11787 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
11788 else
11789 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 11790 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 11791
93204d3a
PB		 11792 if (link_info)
11793 {
11794 globals = elf32_arm_hash_table (link_info);
11795 if (globals->byteswap_code)
11796 i_ehdrp->e_flags |= EF_ARM_BE8;
11797 }
ba96a88f
NC		 11798}
11799
99e4ae17 11800static enum elf_reloc_type_class
57e8b36a 11801elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 11802{
f51e552e 11803 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 11804 {
11805 case R_ARM_RELATIVE:
11806 return reloc_class_relative;
11807 case R_ARM_JUMP_SLOT:
11808 return reloc_class_plt;
11809 case R_ARM_COPY:
11810 return reloc_class_copy;
11811 default:
11812 return reloc_class_normal;
11813 }
11814}
11815
e16bb312
NC		 11816/* Set the right machine number for an Arm ELF file. */
11817
11818static bfd_boolean
57e8b36a 11819elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 11820{
11821 if (hdr->sh_type == SHT_NOTE)
11822 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
11823
11824 return TRUE;
11825}
11826
e489d0ae 11827static void
57e8b36a 11828elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 11829{
5a6c6817 11830 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 11831}
11832
40a18ebd
NC		 11833/* Return TRUE if this is an unwinding table entry. */
11834
11835static bfd_boolean
11836is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
11837{
0112cd26
NC		 11838 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
11839 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 11840}
11841
11842
11843/* Set the type and flags for an ARM section. We do this by
11844 the section name, which is a hack, but ought to work. */
11845
11846static bfd_boolean
11847elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
11848{
11849 const char * name;
11850
11851 name = bfd_get_section_name (abfd, sec);
11852
11853 if (is_arm_elf_unwind_section_name (abfd, name))
11854 {
11855 hdr->sh_type = SHT_ARM_EXIDX;
11856 hdr->sh_flags |= SHF_LINK_ORDER;
11857 }
11858 return TRUE;
11859}
11860
6dc132d9
L		 11861/* Handle an ARM specific section when reading an object file. This is
11862 called when bfd_section_from_shdr finds a section with an unknown
11863 type. */
40a18ebd
NC		 11864
11865static bfd_boolean
11866elf32_arm_section_from_shdr (bfd *abfd,
11867 Elf_Internal_Shdr * hdr,
6dc132d9
L		 11868 const char *name,
11869 int shindex)
40a18ebd
NC		 11870{
11871 /* There ought to be a place to keep ELF backend specific flags, but
11872 at the moment there isn't one. We just keep track of the
11873 sections by their name, instead. Fortunately, the ABI gives
11874 names for all the ARM specific sections, so we will probably get
11875 away with this. */
11876 switch (hdr->sh_type)
11877 {
11878 case SHT_ARM_EXIDX:
0951f019
RE		 11879 case SHT_ARM_PREEMPTMAP:
11880 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 11881 break;
11882
11883 default:
11884 return FALSE;
11885 }
11886
6dc132d9 11887 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 11888 return FALSE;
11889
11890 return TRUE;
11891}
e489d0ae 11892
8e3de13a
NC		 11893/* A structure used to record a list of sections, independently
11894 of the next and prev fields in the asection structure. */
11895typedef struct section_list
11896{
11897 asection * sec;
11898 struct section_list * next;
11899 struct section_list * prev;
11900}
11901section_list;
11902
11903/* Unfortunately we need to keep a list of sections for which
11904 an _arm_elf_section_data structure has been allocated. This
11905 is because it is possible for functions like elf32_arm_write_section
11906 to be called on a section which has had an elf_data_structure
11907 allocated for it (and so the used_by_bfd field is valid) but
11908 for which the ARM extended version of this structure - the
11909 _arm_elf_section_data structure - has not been allocated. */
11910static section_list * sections_with_arm_elf_section_data = NULL;
11911
11912static void
957c6e41 11913record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 11914{
11915 struct section_list * entry;
11916
957c6e41 11917 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 11918 if (entry == NULL)
11919 return;
11920 entry->sec = sec;
11921 entry->next = sections_with_arm_elf_section_data;
11922 entry->prev = NULL;
11923 if (entry->next != NULL)
11924 entry->next->prev = entry;
11925 sections_with_arm_elf_section_data = entry;
11926}
11927
44444f50
NC		 11928static struct section_list *
11929find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 11930{
11931 struct section_list * entry;
bd4aae00 11932 static struct section_list * last_entry = NULL;
8e3de13a 11933
bd4aae00
NC		 11934 /* This is a short cut for the typical case where the sections are added
11935 to the sections_with_arm_elf_section_data list in forward order and
11936 then looked up here in backwards order. This makes a real difference
11937 to the ld-srec/sec64k.exp linker test. */
44444f50 11938 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 11939 if (last_entry != NULL)
11940 {
11941 if (last_entry->sec == sec)
44444f50
NC		 11942 entry = last_entry;
11943 else if (last_entry->next != NULL
11944 && last_entry->next->sec == sec)
11945 entry = last_entry->next;
bd4aae00 11946 }
44444f50
NC		 11947
11948 for (; entry; entry = entry->next)
8e3de13a 11949 if (entry->sec == sec)
44444f50 11950 break;
bd4aae00 11951
44444f50
NC		 11952 if (entry)
11953 /* Record the entry prior to this one - it is the entry we are most
11954 likely to want to locate next time. Also this way if we have been
11955 called from unrecord_section_with_arm_elf_section_data() we will not
11956 be caching a pointer that is about to be freed. */
11957 last_entry = entry->prev;
11958
11959 return entry;
11960}
11961
11962static _arm_elf_section_data *
11963get_arm_elf_section_data (asection * sec)
11964{
11965 struct section_list * entry;
11966
11967 entry = find_arm_elf_section_entry (sec);
11968
11969 if (entry)
11970 return elf32_arm_section_data (entry->sec);
11971 else
11972 return NULL;
8e3de13a
NC		 11973}
11974
11975static void
11976unrecord_section_with_arm_elf_section_data (asection * sec)
11977{
11978 struct section_list * entry;
11979
44444f50
NC		 11980 entry = find_arm_elf_section_entry (sec);
11981
11982 if (entry)
11983 {
11984 if (entry->prev != NULL)
11985 entry->prev->next = entry->next;
11986 if (entry->next != NULL)
11987 entry->next->prev = entry->prev;
11988 if (entry == sections_with_arm_elf_section_data)
11989 sections_with_arm_elf_section_data = entry->next;
11990 free (entry);
11991 }
8e3de13a
NC		 11992}
11993
e489d0ae 11994
4e617b1e
PB		 11995typedef struct
11996{
11997 void *finfo;
11998 struct bfd_link_info *info;
91a5743d
PB		 11999 asection *sec;
12000 int sec_shndx;
4e617b1e
PB		 12001 bfd_boolean (*func) (void *, const char *, Elf_Internal_Sym *,
12002 asection *, struct elf_link_hash_entry *);
12003} output_arch_syminfo;
12004
12005enum map_symbol_type
12006{
12007 ARM_MAP_ARM,
12008 ARM_MAP_THUMB,
12009 ARM_MAP_DATA
12010};
12011
12012
7413f23f 12013/* Output a single mapping symbol. */
4e617b1e
PB		 12014
12015static bfd_boolean
7413f23f
DJ		 12016elf32_arm_output_map_sym (output_arch_syminfo *osi,
12017 enum map_symbol_type type,
12018 bfd_vma offset)
4e617b1e
PB		 12019{
12020 static const char *names[3] = {"$a", "$t", "$d"};
12021 struct elf32_arm_link_hash_table *htab;
12022 Elf_Internal_Sym sym;
12023
12024 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 12025 sym.st_value = osi->sec->output_section->vma
12026 + osi->sec->output_offset
12027 + offset;
4e617b1e
PB		 12028 sym.st_size = 0;
12029 sym.st_other = 0;
12030 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d
PB		 12031 sym.st_shndx = osi->sec_shndx;
12032 if (!osi->func (osi->finfo, names[type], &sym, osi->sec, NULL))
4e617b1e
PB		 12033 return FALSE;
12034 return TRUE;
12035}
12036
12037
12038/* Output mapping symbols for PLT entries associated with H. */
12039
12040static bfd_boolean
12041elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12042{
12043 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12044 struct elf32_arm_link_hash_table *htab;
12045 struct elf32_arm_link_hash_entry *eh;
12046 bfd_vma addr;
12047
12048 htab = elf32_arm_hash_table (osi->info);
12049
12050 if (h->root.type == bfd_link_hash_indirect)
12051 return TRUE;
12052
12053 if (h->root.type == bfd_link_hash_warning)
12054 /* When warning symbols are created, they **replace** the "real"
12055 entry in the hash table, thus we never get to see the real
12056 symbol in a hash traversal. So look at it now. */
12057 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12058
12059 if (h->plt.offset == (bfd_vma) -1)
12060 return TRUE;
12061
12062 eh = (struct elf32_arm_link_hash_entry *) h;
12063 addr = h->plt.offset;
12064 if (htab->symbian_p)
12065 {
7413f23f 12066 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12067 return FALSE;
7413f23f 12068 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12069 return FALSE;
12070 }
12071 else if (htab->vxworks_p)
12072 {
7413f23f 12073 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12074 return FALSE;
7413f23f 12075 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12076 return FALSE;
7413f23f 12077 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12078 return FALSE;
7413f23f 12079 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12080 return FALSE;
12081 }
12082 else
12083 {
bd97cb95
DJ		 12084 bfd_signed_vma thumb_refs;
12085
12086 thumb_refs = eh->plt_thumb_refcount;
12087 if (!htab->use_blx)
12088 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12089
bd97cb95 12090 if (thumb_refs > 0)
4e617b1e 12091 {
7413f23f 12092 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12093 return FALSE;
12094 }
12095#ifdef FOUR_WORD_PLT
7413f23f 12096 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12097 return FALSE;
7413f23f 12098 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12099 return FALSE;
12100#else
906e58ca 12101 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12102 so only need to output a mapping symbol for the first PLT entry and
12103 entries with thumb thunks. */
bd97cb95 12104 if (thumb_refs > 0 || addr == 20)
4e617b1e 12105 {
7413f23f 12106 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12107 return FALSE;
12108 }
12109#endif
12110 }
12111
12112 return TRUE;
12113}
12114
7413f23f
DJ		 12115/* Output a single local symbol for a generated stub. */
12116
12117static bfd_boolean
12118elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12119 bfd_vma offset, bfd_vma size)
12120{
12121 struct elf32_arm_link_hash_table *htab;
12122 Elf_Internal_Sym sym;
12123
12124 htab = elf32_arm_hash_table (osi->info);
12125 sym.st_value = osi->sec->output_section->vma
12126 + osi->sec->output_offset
12127 + offset;
12128 sym.st_size = size;
12129 sym.st_other = 0;
12130 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12131 sym.st_shndx = osi->sec_shndx;
12132 if (!osi->func (osi->finfo, name, &sym, osi->sec, NULL))
12133 return FALSE;
12134 return TRUE;
12135}
4e617b1e 12136
da5938a2 12137static bfd_boolean
8029a119
NC		 12138arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12139 void * in_arg)
da5938a2
NC		 12140{
12141 struct elf32_arm_stub_hash_entry *stub_entry;
12142 struct bfd_link_info *info;
12143 struct elf32_arm_link_hash_table *htab;
12144 asection *stub_sec;
12145 bfd_vma addr;
7413f23f 12146 char *stub_name;
9a008db3 12147 output_arch_syminfo *osi;
461a49ca
DJ		 12148 const insn_sequence *template;
12149 enum stub_insn_type prev_type;
12150 int size;
12151 int i;
12152 enum map_symbol_type sym_type;
da5938a2
NC		 12153
12154 /* Massage our args to the form they really have. */
12155 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12156 osi = (output_arch_syminfo *) in_arg;
da5938a2 12157
da5938a2
NC		 12158 info = osi->info;
12159
12160 htab = elf32_arm_hash_table (info);
12161 stub_sec = stub_entry->stub_sec;
12162
12163 /* Ensure this stub is attached to the current section being
7413f23f 12164 processed. */
da5938a2
NC		 12165 if (stub_sec != osi->sec)
12166 return TRUE;
12167
7413f23f
DJ		 12168 addr = (bfd_vma) stub_entry->stub_offset;
12169 stub_name = stub_entry->output_name;
da5938a2 12170
461a49ca 12171 template = stub_entry->stub_template;
4e31c731 12172 switch (template[0].type)
7413f23f 12173 {
461a49ca
DJ		 12174 case ARM_TYPE:
12175 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 12176 return FALSE;
12177 break;
461a49ca
DJ		 12178 case THUMB16_TYPE:
12179 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
12180 stub_entry->stub_size))
da5938a2
NC		 12181 return FALSE;
12182 break;
12183 default:
12184 BFD_FAIL ();
4e31c731 12185 return FALSE;
7413f23f 12186 }
da5938a2 12187
461a49ca
DJ		 12188 prev_type = DATA_TYPE;
12189 size = 0;
12190 for (i = 0; i < stub_entry->stub_template_size; i++)
12191 {
4e31c731 12192 switch (template[i].type)
461a49ca
DJ		 12193 {
12194 case ARM_TYPE:
12195 sym_type = ARM_MAP_ARM;
12196 break;
12197
12198 case THUMB16_TYPE:
12199 sym_type = ARM_MAP_THUMB;
12200 break;
12201
12202 case DATA_TYPE:
12203 sym_type = ARM_MAP_DATA;
12204 break;
12205
12206 default:
12207 BFD_FAIL ();
4e31c731 12208 return FALSE;
461a49ca
DJ		 12209 }
12210
12211 if (template[i].type != prev_type)
12212 {
12213 prev_type = template[i].type;
12214 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
12215 return FALSE;
12216 }
12217
4e31c731 12218 switch (template[i].type)
461a49ca
DJ		 12219 {
12220 case ARM_TYPE:
12221 size += 4;
12222 break;
12223
12224 case THUMB16_TYPE:
12225 size += 2;
12226 break;
12227
12228 case DATA_TYPE:
12229 size += 4;
12230 break;
12231
12232 default:
12233 BFD_FAIL ();
4e31c731 12234 return FALSE;
461a49ca
DJ		 12235 }
12236 }
12237
da5938a2
NC		 12238 return TRUE;
12239}
12240
91a5743d 12241/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 12242
12243static bfd_boolean
12244elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 12245 struct bfd_link_info *info,
12246 void *finfo,
12247 bfd_boolean (*func) (void *, const char *,
12248 Elf_Internal_Sym *,
12249 asection *,
12250 struct elf_link_hash_entry *))
4e617b1e
PB		 12251{
12252 output_arch_syminfo osi;
12253 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 12254 bfd_vma offset;
12255 bfd_size_type size;
4e617b1e
PB		 12256
12257 htab = elf32_arm_hash_table (info);
906e58ca 12258 check_use_blx (htab);
91a5743d 12259
4e617b1e
PB		 12260 osi.finfo = finfo;
12261 osi.info = info;
12262 osi.func = func;
906e58ca 12263
91a5743d
PB		 12264 /* ARM->Thumb glue. */
12265 if (htab->arm_glue_size > 0)
12266 {
12267 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12268 ARM2THUMB_GLUE_SECTION_NAME);
12269
12270 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12271 (output_bfd, osi.sec->output_section);
12272 if (info->shared || htab->root.is_relocatable_executable
12273 || htab->pic_veneer)
12274 size = ARM2THUMB_PIC_GLUE_SIZE;
12275 else if (htab->use_blx)
12276 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
12277 else
12278 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 12279
91a5743d
PB		 12280 for (offset = 0; offset < htab->arm_glue_size; offset += size)
12281 {
7413f23f
DJ		 12282 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
12283 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 12284 }
12285 }
12286
12287 /* Thumb->ARM glue. */
12288 if (htab->thumb_glue_size > 0)
12289 {
12290 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12291 THUMB2ARM_GLUE_SECTION_NAME);
12292
12293 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12294 (output_bfd, osi.sec->output_section);
12295 size = THUMB2ARM_GLUE_SIZE;
12296
12297 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
12298 {
7413f23f
DJ		 12299 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
12300 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 12301 }
12302 }
12303
845b51d6
PB		 12304 /* ARMv4 BX veneers. */
12305 if (htab->bx_glue_size > 0)
12306 {
12307 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12308 ARM_BX_GLUE_SECTION_NAME);
12309
12310 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12311 (output_bfd, osi.sec->output_section);
12312
7413f23f 12313 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 12314 }
12315
8029a119
NC		 12316 /* Long calls stubs. */
12317 if (htab->stub_bfd && htab->stub_bfd->sections)
12318 {
da5938a2 12319 asection* stub_sec;
8029a119 12320
da5938a2
NC		 12321 for (stub_sec = htab->stub_bfd->sections;
12322 stub_sec != NULL;
8029a119
NC		 12323 stub_sec = stub_sec->next)
12324 {
12325 /* Ignore non-stub sections. */
12326 if (!strstr (stub_sec->name, STUB_SUFFIX))
12327 continue;
da5938a2 12328
8029a119 12329 osi.sec = stub_sec;
da5938a2 12330
8029a119
NC		 12331 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12332 (output_bfd, osi.sec->output_section);
da5938a2 12333
8029a119
NC		 12334 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
12335 }
12336 }
da5938a2 12337
91a5743d
PB		 12338 /* Finally, output mapping symbols for the PLT. */
12339 if (!htab->splt || htab->splt->size == 0)
12340 return TRUE;
12341
12342 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 12343 htab->splt->output_section);
91a5743d 12344 osi.sec = htab->splt;
4e617b1e
PB		 12345 /* Output mapping symbols for the plt header. SymbianOS does not have a
12346 plt header. */
12347 if (htab->vxworks_p)
12348 {
12349 /* VxWorks shared libraries have no PLT header. */
12350 if (!info->shared)
12351 {
7413f23f 12352 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 12353 return FALSE;
7413f23f 12354 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 12355 return FALSE;
12356 }
12357 }
12358 else if (!htab->symbian_p)
12359 {
7413f23f 12360 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 12361 return FALSE;
12362#ifndef FOUR_WORD_PLT
7413f23f 12363 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 12364 return FALSE;
12365#endif
12366 }
12367
12368 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
12369 return TRUE;
12370}
12371
e489d0ae
PB		 12372/* Allocate target specific section data. */
12373
12374static bfd_boolean
12375elf32_arm_new_section_hook (bfd *abfd, asection *sec)
12376{
f592407e
AM		 12377 if (!sec->used_by_bfd)
12378 {
12379 _arm_elf_section_data *sdata;
12380 bfd_size_type amt = sizeof (*sdata);
e489d0ae 12381
f592407e
AM		 12382 sdata = bfd_zalloc (abfd, amt);
12383 if (sdata == NULL)
12384 return FALSE;
12385 sec->used_by_bfd = sdata;
12386 }
e489d0ae 12387
957c6e41 12388 record_section_with_arm_elf_section_data (sec);
8e3de13a 12389
e489d0ae
PB		 12390 return _bfd_elf_new_section_hook (abfd, sec);
12391}
12392
12393
12394/* Used to order a list of mapping symbols by address. */
12395
12396static int
12397elf32_arm_compare_mapping (const void * a, const void * b)
12398{
7f6a71ff
JM		 12399 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
12400 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
12401
12402 if (amap->vma > bmap->vma)
12403 return 1;
12404 else if (amap->vma < bmap->vma)
12405 return -1;
12406 else if (amap->type > bmap->type)
12407 /* Ensure results do not depend on the host qsort for objects with
12408 multiple mapping symbols at the same address by sorting on type
12409 after vma. */
12410 return 1;
12411 else if (amap->type < bmap->type)
12412 return -1;
12413 else
12414 return 0;
e489d0ae
PB		 12415}
12416
2468f9c9
PB		 12417/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
12418
12419static unsigned long
12420offset_prel31 (unsigned long addr, bfd_vma offset)
12421{
12422 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
12423}
12424
12425/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
12426 relocations. */
12427
12428static void
12429copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
12430{
12431 unsigned long first_word = bfd_get_32 (output_bfd, from);
12432 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
12433
12434 /* High bit of first word is supposed to be zero. */
12435 if ((first_word & 0x80000000ul) == 0)
12436 first_word = offset_prel31 (first_word, offset);
12437
12438 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
12439 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
12440 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
12441 second_word = offset_prel31 (second_word, offset);
12442
12443 bfd_put_32 (output_bfd, first_word, to);
12444 bfd_put_32 (output_bfd, second_word, to + 4);
12445}
e489d0ae
PB		 12446
12447/* Do code byteswapping. Return FALSE afterwards so that the section is
12448 written out as normal. */
12449
12450static bfd_boolean
c7b8f16e 12451elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 12452 struct bfd_link_info *link_info,
12453 asection *sec,
e489d0ae
PB		 12454 bfd_byte *contents)
12455{
c7b8f16e 12456 int mapcount, errcount;
8e3de13a 12457 _arm_elf_section_data *arm_data;
c7b8f16e 12458 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 12459 elf32_arm_section_map *map;
c7b8f16e 12460 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 12461 bfd_vma ptr;
12462 bfd_vma end;
c7b8f16e 12463 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae
PB		 12464 bfd_byte tmp;
12465 int i;
57e8b36a 12466
8e3de13a
NC		 12467 /* If this section has not been allocated an _arm_elf_section_data
12468 structure then we cannot record anything. */
12469 arm_data = get_arm_elf_section_data (sec);
12470 if (arm_data == NULL)
12471 return FALSE;
12472
12473 mapcount = arm_data->mapcount;
12474 map = arm_data->map;
c7b8f16e
JB		 12475 errcount = arm_data->erratumcount;
12476
12477 if (errcount != 0)
12478 {
12479 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
12480
12481 for (errnode = arm_data->erratumlist; errnode != 0;
12482 errnode = errnode->next)
12483 {
12484 bfd_vma index = errnode->vma - offset;
12485
12486 switch (errnode->type)
12487 {
12488 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
12489 {
12490 bfd_vma branch_to_veneer;
12491 /* Original condition code of instruction, plus bit mask for
12492 ARM B instruction. */
12493 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
12494 | 0x0a000000;
12495
12496 /* The instruction is before the label. */
12497 index -= 4;
12498
12499 /* Above offset included in -4 below. */
12500 branch_to_veneer = errnode->u.b.veneer->vma
12501 - errnode->vma - 4;
12502
12503 if ((signed) branch_to_veneer < -(1 << 25)
12504 || (signed) branch_to_veneer >= (1 << 25))
12505 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
12506 "range"), output_bfd);
12507
12508 insn |= (branch_to_veneer >> 2) & 0xffffff;
12509 contents[endianflip ^ index] = insn & 0xff;
12510 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
12511 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
12512 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
12513 }
12514 break;
12515
12516 case VFP11_ERRATUM_ARM_VENEER:
12517 {
12518 bfd_vma branch_from_veneer;
12519 unsigned int insn;
12520
12521 /* Take size of veneer into account. */
12522 branch_from_veneer = errnode->u.v.branch->vma
12523 - errnode->vma - 12;
12524
12525 if ((signed) branch_from_veneer < -(1 << 25)
12526 || (signed) branch_from_veneer >= (1 << 25))
12527 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
12528 "range"), output_bfd);
12529
12530 /* Original instruction. */
12531 insn = errnode->u.v.branch->u.b.vfp_insn;
12532 contents[endianflip ^ index] = insn & 0xff;
12533 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
12534 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
12535 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
12536
12537 /* Branch back to insn after original insn. */
12538 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
12539 contents[endianflip ^ (index + 4)] = insn & 0xff;
12540 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
12541 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
12542 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
12543 }
12544 break;
12545
12546 default:
12547 abort ();
12548 }
12549 }
12550 }
e489d0ae 12551
2468f9c9
PB		 12552 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
12553 {
12554 arm_unwind_table_edit *edit_node
12555 = arm_data->u.exidx.unwind_edit_list;
12556 /* Now, sec->size is the size of the section we will write. The original
12557 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
12558 markers) was sec->rawsize. (This isn't the case if we perform no
12559 edits, then rawsize will be zero and we should use size). */
12560 bfd_byte *edited_contents = bfd_malloc (sec->size);
12561 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
12562 unsigned int in_index, out_index;
12563 bfd_vma add_to_offsets = 0;
12564
12565 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
12566 {
12567 if (edit_node)
12568 {
12569 unsigned int edit_index = edit_node->index;
12570
12571 if (in_index < edit_index && in_index * 8 < input_size)
12572 {
12573 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
12574 contents + in_index * 8, add_to_offsets);
12575 out_index++;
12576 in_index++;
12577 }
12578 else if (in_index == edit_index
12579 || (in_index * 8 >= input_size
12580 && edit_index == UINT_MAX))
12581 {
12582 switch (edit_node->type)
12583 {
12584 case DELETE_EXIDX_ENTRY:
12585 in_index++;
12586 add_to_offsets += 8;
12587 break;
12588
12589 case INSERT_EXIDX_CANTUNWIND_AT_END:
12590 {
12591 asection *text_sec = edit_node->linked_section;
12592 bfd_vma text_offset = text_sec->output_section->vma
12593 + text_sec->output_offset
12594 + text_sec->size;
12595 bfd_vma exidx_offset = offset + out_index * 8;
12596 unsigned long prel31_offset;
12597
12598 /* Note: this is meant to be equivalent to an
12599 R_ARM_PREL31 relocation. These synthetic
12600 EXIDX_CANTUNWIND markers are not relocated by the
12601 usual BFD method. */
12602 prel31_offset = (text_offset - exidx_offset)
12603 & 0x7ffffffful;
12604
12605 /* First address we can't unwind. */
12606 bfd_put_32 (output_bfd, prel31_offset,
12607 &edited_contents[out_index * 8]);
12608
12609 /* Code for EXIDX_CANTUNWIND. */
12610 bfd_put_32 (output_bfd, 0x1,
12611 &edited_contents[out_index * 8 + 4]);
12612
12613 out_index++;
12614 add_to_offsets -= 8;
12615 }
12616 break;
12617 }
12618
12619 edit_node = edit_node->next;
12620 }
12621 }
12622 else
12623 {
12624 /* No more edits, copy remaining entries verbatim. */
12625 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
12626 contents + in_index * 8, add_to_offsets);
12627 out_index++;
12628 in_index++;
12629 }
12630 }
12631
12632 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
12633 bfd_set_section_contents (output_bfd, sec->output_section,
12634 edited_contents,
12635 (file_ptr) sec->output_offset, sec->size);
12636
12637 return TRUE;
12638 }
12639
e489d0ae
PB		 12640 if (mapcount == 0)
12641 return FALSE;
12642
c7b8f16e 12643 if (globals->byteswap_code)
e489d0ae 12644 {
c7b8f16e 12645 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 12646
c7b8f16e
JB		 12647 ptr = map[0].vma;
12648 for (i = 0; i < mapcount; i++)
12649 {
12650 if (i == mapcount - 1)
12651 end = sec->size;
12652 else
12653 end = map[i + 1].vma;
e489d0ae 12654
c7b8f16e 12655 switch (map[i].type)
e489d0ae 12656 {
c7b8f16e
JB		 12657 case 'a':
12658 /* Byte swap code words. */
12659 while (ptr + 3 < end)
12660 {
12661 tmp = contents[ptr];
12662 contents[ptr] = contents[ptr + 3];
12663 contents[ptr + 3] = tmp;
12664 tmp = contents[ptr + 1];
12665 contents[ptr + 1] = contents[ptr + 2];
12666 contents[ptr + 2] = tmp;
12667 ptr += 4;
12668 }
12669 break;
e489d0ae 12670
c7b8f16e
JB		 12671 case 't':
12672 /* Byte swap code halfwords. */
12673 while (ptr + 1 < end)
12674 {
12675 tmp = contents[ptr];
12676 contents[ptr] = contents[ptr + 1];
12677 contents[ptr + 1] = tmp;
12678 ptr += 2;
12679 }
12680 break;
12681
12682 case 'd':
12683 /* Leave data alone. */
12684 break;
12685 }
12686 ptr = end;
12687 }
e489d0ae 12688 }
8e3de13a 12689
93204d3a 12690 free (map);
8e3de13a 12691 arm_data->mapcount = 0;
c7b8f16e 12692 arm_data->mapsize = 0;
8e3de13a
NC		 12693 arm_data->map = NULL;
12694 unrecord_section_with_arm_elf_section_data (sec);
12695
e489d0ae
PB		 12696 return FALSE;
12697}
12698
957c6e41
NC		 12699static void
12700unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
12701 asection * sec,
12702 void * ignore ATTRIBUTE_UNUSED)
12703{
12704 unrecord_section_with_arm_elf_section_data (sec);
12705}
12706
12707static bfd_boolean
12708elf32_arm_close_and_cleanup (bfd * abfd)
12709{
b25e3d87
L		 12710 if (abfd->sections)
12711 bfd_map_over_sections (abfd,
12712 unrecord_section_via_map_over_sections,
12713 NULL);
957c6e41
NC		 12714
12715 return _bfd_elf_close_and_cleanup (abfd);
12716}
12717
b25e3d87
L		 12718static bfd_boolean
12719elf32_arm_bfd_free_cached_info (bfd * abfd)
12720{
12721 if (abfd->sections)
12722 bfd_map_over_sections (abfd,
12723 unrecord_section_via_map_over_sections,
12724 NULL);
12725
12726 return _bfd_free_cached_info (abfd);
12727}
12728
b7693d02
DJ		 12729/* Display STT_ARM_TFUNC symbols as functions. */
12730
12731static void
12732elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
12733 asymbol *asym)
12734{
12735 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
12736
12737 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
12738 elfsym->symbol.flags |= BSF_FUNCTION;
12739}
12740
0beaef2b
PB		 12741
12742/* Mangle thumb function symbols as we read them in. */
12743
8384fb8f 12744static bfd_boolean
0beaef2b
PB		 12745elf32_arm_swap_symbol_in (bfd * abfd,
12746 const void *psrc,
12747 const void *pshn,
12748 Elf_Internal_Sym *dst)
12749{
8384fb8f
AM		 12750 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
12751 return FALSE;
0beaef2b
PB		 12752
12753 /* New EABI objects mark thumb function symbols by setting the low bit of
12754 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 12755 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 12756 && (dst->st_value & 1))
12757 {
12758 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
12759 dst->st_value &= ~(bfd_vma) 1;
12760 }
8384fb8f 12761 return TRUE;
0beaef2b
PB		 12762}
12763
12764
12765/* Mangle thumb function symbols as we write them out. */
12766
12767static void
12768elf32_arm_swap_symbol_out (bfd *abfd,
12769 const Elf_Internal_Sym *src,
12770 void *cdst,
12771 void *shndx)
12772{
12773 Elf_Internal_Sym newsym;
12774
12775 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
12776 of the address set, as per the new EABI. We do this unconditionally
12777 because objcopy does not set the elf header flags until after
12778 it writes out the symbol table. */
12779 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
12780 {
12781 newsym = *src;
12782 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 12783 if (newsym.st_shndx != SHN_UNDEF)
12784 {
12785 /* Do this only for defined symbols. At link type, the static
12786 linker will simulate the work of dynamic linker of resolving
12787 symbols and will carry over the thumbness of found symbols to
12788 the output symbol table. It's not clear how it happens, but
b0fead2b 12789 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 12790 runtime, and writing '1' for them will be confusing for users
12791 and possibly for dynamic linker itself.
12792 */
12793 newsym.st_value |= 1;
12794 }
906e58ca 12795
0beaef2b
PB		 12796 src = &newsym;
12797 }
12798 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
12799}
12800
b294bdf8
MM		 12801/* Add the PT_ARM_EXIDX program header. */
12802
12803static bfd_boolean
906e58ca 12804elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 12805 struct bfd_link_info *info ATTRIBUTE_UNUSED)
12806{
12807 struct elf_segment_map *m;
12808 asection *sec;
12809
12810 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
12811 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
12812 {
12813 /* If there is already a PT_ARM_EXIDX header, then we do not
12814 want to add another one. This situation arises when running
12815 "strip"; the input binary already has the header. */
12816 m = elf_tdata (abfd)->segment_map;
12817 while (m && m->p_type != PT_ARM_EXIDX)
12818 m = m->next;
12819 if (!m)
12820 {
12821 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
12822 if (m == NULL)
12823 return FALSE;
12824 m->p_type = PT_ARM_EXIDX;
12825 m->count = 1;
12826 m->sections[0] = sec;
12827
12828 m->next = elf_tdata (abfd)->segment_map;
12829 elf_tdata (abfd)->segment_map = m;
12830 }
12831 }
12832
12833 return TRUE;
12834}
12835
12836/* We may add a PT_ARM_EXIDX program header. */
12837
12838static int
a6b96beb
AM		 12839elf32_arm_additional_program_headers (bfd *abfd,
12840 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 12841{
12842 asection *sec;
12843
12844 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
12845 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
12846 return 1;
12847 else
12848 return 0;
12849}
12850
fcb93ecf 12851/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 12852
fcb93ecf
PB		 12853static bfd_boolean
12854elf32_arm_is_function_type (unsigned int type)
12855{
0f88be7a 12856 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 12857}
12858
0beaef2b 12859/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 12860const struct elf_size_info elf32_arm_size_info =
12861{
0beaef2b
PB		 12862 sizeof (Elf32_External_Ehdr),
12863 sizeof (Elf32_External_Phdr),
12864 sizeof (Elf32_External_Shdr),
12865 sizeof (Elf32_External_Rel),
12866 sizeof (Elf32_External_Rela),
12867 sizeof (Elf32_External_Sym),
12868 sizeof (Elf32_External_Dyn),
12869 sizeof (Elf_External_Note),
12870 4,
12871 1,
12872 32, 2,
12873 ELFCLASS32, EV_CURRENT,
12874 bfd_elf32_write_out_phdrs,
12875 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 12876 bfd_elf32_checksum_contents,
0beaef2b
PB		 12877 bfd_elf32_write_relocs,
12878 elf32_arm_swap_symbol_in,
12879 elf32_arm_swap_symbol_out,
12880 bfd_elf32_slurp_reloc_table,
12881 bfd_elf32_slurp_symbol_table,
12882 bfd_elf32_swap_dyn_in,
12883 bfd_elf32_swap_dyn_out,
12884 bfd_elf32_swap_reloc_in,
12885 bfd_elf32_swap_reloc_out,
12886 bfd_elf32_swap_reloca_in,
12887 bfd_elf32_swap_reloca_out
12888};
12889
252b5132
RH		 12890#define ELF_ARCH bfd_arch_arm
12891#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 12892#ifdef __QNXTARGET__
12893#define ELF_MAXPAGESIZE 0x1000
12894#else
f21f3fe0 12895#define ELF_MAXPAGESIZE 0x8000
d0facd1b 12896#endif
b1342370 12897#define ELF_MINPAGESIZE 0x1000
24718e3b 12898#define ELF_COMMONPAGESIZE 0x1000
252b5132 12899
ba93b8ac
DJ		 12900#define bfd_elf32_mkobject elf32_arm_mkobject
12901
99e4ae17
AJ		 12902#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
12903#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 12904#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
12905#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
12906#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 12907#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 12908#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 12909#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 12910#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 12911#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 12912#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 12913#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 12914#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 12915#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 12916#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 12917
12918#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
12919#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 12920#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 12921#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
12922#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 12923#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 12924#define elf_backend_write_section elf32_arm_write_section
252b5132 12925#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 12926#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 12927#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
12928#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
12929#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 12930#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 12931#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 12932#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 12933#define elf_backend_object_p elf32_arm_object_p
e16bb312 12934#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 12935#define elf_backend_fake_sections elf32_arm_fake_sections
12936#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 12937#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 12938#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 12939#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 12940#define elf_backend_size_info elf32_arm_size_info
b294bdf8 12941#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 12942#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
12943#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
12944#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
12945#define elf_backend_is_function_type elf32_arm_is_function_type
12946
12947#define elf_backend_can_refcount 1
12948#define elf_backend_can_gc_sections 1
12949#define elf_backend_plt_readonly 1
12950#define elf_backend_want_got_plt 1
12951#define elf_backend_want_plt_sym 0
12952#define elf_backend_may_use_rel_p 1
12953#define elf_backend_may_use_rela_p 0
4e7fd91e 12954#define elf_backend_default_use_rela_p 0
252b5132 12955
04f7c78d 12956#define elf_backend_got_header_size 12
04f7c78d 12957
906e58ca
NC		 12958#undef elf_backend_obj_attrs_vendor
12959#define elf_backend_obj_attrs_vendor "aeabi"
12960#undef elf_backend_obj_attrs_section
12961#define elf_backend_obj_attrs_section ".ARM.attributes"
12962#undef elf_backend_obj_attrs_arg_type
12963#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
12964#undef elf_backend_obj_attrs_section_type
104d59d1 12965#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 12966#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 12967
252b5132 12968#include "elf32-target.h"
7f266840 12969
906e58ca 12970/* VxWorks Targets. */
4e7fd91e 12971
906e58ca 12972#undef TARGET_LITTLE_SYM
4e7fd91e 12973#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 12974#undef TARGET_LITTLE_NAME
4e7fd91e 12975#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 12976#undef TARGET_BIG_SYM
4e7fd91e 12977#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 12978#undef TARGET_BIG_NAME
4e7fd91e
PB		 12979#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
12980
12981/* Like elf32_arm_link_hash_table_create -- but overrides
12982 appropriately for VxWorks. */
906e58ca 12983
4e7fd91e
PB		 12984static struct bfd_link_hash_table *
12985elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
12986{
12987 struct bfd_link_hash_table *ret;
12988
12989 ret = elf32_arm_link_hash_table_create (abfd);
12990 if (ret)
12991 {
12992 struct elf32_arm_link_hash_table *htab
00a97672 12993 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 12994 htab->use_rel = 0;
00a97672 12995 htab->vxworks_p = 1;
4e7fd91e
PB		 12996 }
12997 return ret;
906e58ca 12998}
4e7fd91e 12999
00a97672
RS		 13000static void
13001elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13002{
13003 elf32_arm_final_write_processing (abfd, linker);
13004 elf_vxworks_final_write_processing (abfd, linker);
13005}
13006
906e58ca 13007#undef elf32_bed
4e7fd91e
PB		 13008#define elf32_bed elf32_arm_vxworks_bed
13009
906e58ca
NC		 13010#undef bfd_elf32_bfd_link_hash_table_create
13011#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13012#undef elf_backend_add_symbol_hook
13013#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13014#undef elf_backend_final_write_processing
13015#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13016#undef elf_backend_emit_relocs
13017#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13018
906e58ca 13019#undef elf_backend_may_use_rel_p
00a97672 13020#define elf_backend_may_use_rel_p 0
906e58ca 13021#undef elf_backend_may_use_rela_p
00a97672 13022#define elf_backend_may_use_rela_p 1
906e58ca 13023#undef elf_backend_default_use_rela_p
00a97672 13024#define elf_backend_default_use_rela_p 1
906e58ca 13025#undef elf_backend_want_plt_sym
00a97672 13026#define elf_backend_want_plt_sym 1
906e58ca 13027#undef ELF_MAXPAGESIZE
00a97672 13028#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13029
13030#include "elf32-target.h"
13031
13032
906e58ca 13033/* Symbian OS Targets. */
7f266840 13034
906e58ca 13035#undef TARGET_LITTLE_SYM
7f266840 13036#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 13037#undef TARGET_LITTLE_NAME
7f266840 13038#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 13039#undef TARGET_BIG_SYM
7f266840 13040#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 13041#undef TARGET_BIG_NAME
7f266840
DJ		 13042#define TARGET_BIG_NAME "elf32-bigarm-symbian"
13043
13044/* Like elf32_arm_link_hash_table_create -- but overrides
13045 appropriately for Symbian OS. */
906e58ca 13046
7f266840
DJ		 13047static struct bfd_link_hash_table *
13048elf32_arm_symbian_link_hash_table_create (bfd *abfd)
13049{
13050 struct bfd_link_hash_table *ret;
13051
13052 ret = elf32_arm_link_hash_table_create (abfd);
13053 if (ret)
13054 {
13055 struct elf32_arm_link_hash_table *htab
13056 = (struct elf32_arm_link_hash_table *)ret;
13057 /* There is no PLT header for Symbian OS. */
13058 htab->plt_header_size = 0;
95720a86
DJ		 13059 /* The PLT entries are each one instruction and one word. */
13060 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 13061 htab->symbian_p = 1;
33bfe774
JB		 13062 /* Symbian uses armv5t or above, so use_blx is always true. */
13063 htab->use_blx = 1;
67687978 13064 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 13065 }
13066 return ret;
906e58ca 13067}
7f266840 13068
b35d266b 13069static const struct bfd_elf_special_section
551b43fd 13070elf32_arm_symbian_special_sections[] =
7f266840 13071{
5cd3778d
MM		 13072 /* In a BPABI executable, the dynamic linking sections do not go in
13073 the loadable read-only segment. The post-linker may wish to
13074 refer to these sections, but they are not part of the final
13075 program image. */
0112cd26
NC		 13076 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
13077 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
13078 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
13079 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
13080 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 13081 /* These sections do not need to be writable as the SymbianOS
13082 postlinker will arrange things so that no dynamic relocation is
13083 required. */
0112cd26
NC		 13084 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
13085 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
13086 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
13087 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 13088};
13089
c3c76620 13090static void
906e58ca 13091elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 13092 struct bfd_link_info *link_info)
c3c76620
MM		 13093{
13094 /* BPABI objects are never loaded directly by an OS kernel; they are
13095 processed by a postlinker first, into an OS-specific format. If
13096 the D_PAGED bit is set on the file, BFD will align segments on
13097 page boundaries, so that an OS can directly map the file. With
13098 BPABI objects, that just results in wasted space. In addition,
13099 because we clear the D_PAGED bit, map_sections_to_segments will
13100 recognize that the program headers should not be mapped into any
13101 loadable segment. */
13102 abfd->flags &= ~D_PAGED;
906e58ca 13103 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 13104}
7f266840
DJ		 13105
13106static bfd_boolean
906e58ca 13107elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 13108 struct bfd_link_info *info)
7f266840
DJ		 13109{
13110 struct elf_segment_map *m;
13111 asection *dynsec;
13112
7f266840
DJ		 13113 /* BPABI shared libraries and executables should have a PT_DYNAMIC
13114 segment. However, because the .dynamic section is not marked
13115 with SEC_LOAD, the generic ELF code will not create such a
13116 segment. */
13117 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
13118 if (dynsec)
13119 {
8ded5a0f
AM		 13120 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
13121 if (m->p_type == PT_DYNAMIC)
13122 break;
13123
13124 if (m == NULL)
13125 {
13126 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
13127 m->next = elf_tdata (abfd)->segment_map;
13128 elf_tdata (abfd)->segment_map = m;
13129 }
7f266840
DJ		 13130 }
13131
b294bdf8
MM		 13132 /* Also call the generic arm routine. */
13133 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 13134}
13135
95720a86
DJ		 13136/* Return address for Ith PLT stub in section PLT, for relocation REL
13137 or (bfd_vma) -1 if it should not be included. */
13138
13139static bfd_vma
13140elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
13141 const arelent *rel ATTRIBUTE_UNUSED)
13142{
13143 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
13144}
13145
13146
8029a119 13147#undef elf32_bed
7f266840
DJ		 13148#define elf32_bed elf32_arm_symbian_bed
13149
13150/* The dynamic sections are not allocated on SymbianOS; the postlinker
13151 will process them and then discard them. */
906e58ca 13152#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 13153#define ELF_DYNAMIC_SEC_FLAGS \
13154 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
13155
00a97672 13156#undef elf_backend_add_symbol_hook
00a97672 13157#undef elf_backend_emit_relocs
c3c76620 13158
906e58ca
NC		 13159#undef bfd_elf32_bfd_link_hash_table_create
13160#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
13161#undef elf_backend_special_sections
13162#define elf_backend_special_sections elf32_arm_symbian_special_sections
13163#undef elf_backend_begin_write_processing
13164#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
13165#undef elf_backend_final_write_processing
13166#define elf_backend_final_write_processing elf32_arm_final_write_processing
13167
13168#undef elf_backend_modify_segment_map
7f266840
DJ		 13169#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
13170
13171/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 13172#undef elf_backend_got_header_size
7f266840
DJ		 13173#define elf_backend_got_header_size 0
13174
13175/* Similarly, there is no .got.plt section. */
906e58ca 13176#undef elf_backend_want_got_plt
7f266840
DJ		 13177#define elf_backend_want_got_plt 0
13178
906e58ca 13179#undef elf_backend_plt_sym_val
95720a86
DJ		 13180#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
13181
906e58ca 13182#undef elf_backend_may_use_rel_p
00a97672 13183#define elf_backend_may_use_rel_p 1
906e58ca 13184#undef elf_backend_may_use_rela_p
00a97672 13185#define elf_backend_may_use_rela_p 0
906e58ca 13186#undef elf_backend_default_use_rela_p
00a97672 13187#define elf_backend_default_use_rela_p 0
906e58ca 13188#undef elf_backend_want_plt_sym
00a97672 13189#define elf_backend_want_plt_sym 0
906e58ca 13190#undef ELF_MAXPAGESIZE
00a97672 13191#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 13192
7f266840 13193#include "elf32-target.h"
GDB Binutils - Deliverables
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