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Fix formatting.
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
f6ebfac0 3 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840
DJ		 263
264 HOWTO (R_ARM_SWI24, /* type */
265 0, /* rightshift */
266 0, /* size (0 = byte, 1 = short, 2 = long) */
267 0, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_signed,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_SWI24", /* name */
273 FALSE, /* partial_inplace */
274 0x00000000, /* src_mask */
275 0x00000000, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
8029a119 1355 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1356 EMPTY_HOWTO (91),
1357 EMPTY_HOWTO (92),
1358 EMPTY_HOWTO (93),
1359
1360 HOWTO (R_ARM_PLT32_ABS, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_dont,/* complain_on_overflow */
1367 bfd_elf_generic_reloc, /* special_function */
1368 "R_ARM_PLT32_ABS", /* name */
1369 FALSE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_GOT_ABS, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 32, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_GOT_ABS", /* name */
1383 FALSE, /* partial_inplace */
1384 0xffffffff, /* src_mask */
1385 0xffffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_GOT_PREL, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 32, /* bitsize */
1392 TRUE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont, /* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_GOT_PREL", /* name */
1397 FALSE, /* partial_inplace */
1398 0xffffffff, /* src_mask */
1399 0xffffffff, /* dst_mask */
1400 TRUE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_GOT_BREL12, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 12, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_bitfield,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_GOT_BREL12", /* name */
1411 FALSE, /* partial_inplace */
1412 0x00000fff, /* src_mask */
1413 0x00000fff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_GOTOFF12, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_bitfield,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_GOTOFF12", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1431
1432 /* GNU extension to record C++ vtable member usage */
1433 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1434 0, /* rightshift */
1435 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1436 0, /* bitsize */
ba93b8ac
DJ		 1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
c19d1205
ZW		 1439 complain_overflow_dont, /* complain_on_overflow */
1440 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1441 "R_ARM_GNU_VTENTRY", /* name */
1442 FALSE, /* partial_inplace */
1443 0, /* src_mask */
1444 0, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446
1447 /* GNU extension to record C++ vtable hierarchy */
1448 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1449 0, /* rightshift */
1450 2, /* size (0 = byte, 1 = short, 2 = long) */
1451 0, /* bitsize */
1452 FALSE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_dont, /* complain_on_overflow */
1455 NULL, /* special_function */
1456 "R_ARM_GNU_VTINHERIT", /* name */
1457 FALSE, /* partial_inplace */
1458 0, /* src_mask */
1459 0, /* dst_mask */
1460 FALSE), /* pcrel_offset */
1461
1462 HOWTO (R_ARM_THM_JUMP11, /* type */
1463 1, /* rightshift */
1464 1, /* size (0 = byte, 1 = short, 2 = long) */
1465 11, /* bitsize */
1466 TRUE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_signed, /* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_ARM_THM_JUMP11", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000007ff, /* src_mask */
1473 0x000007ff, /* dst_mask */
1474 TRUE), /* pcrel_offset */
1475
1476 HOWTO (R_ARM_THM_JUMP8, /* type */
1477 1, /* rightshift */
1478 1, /* size (0 = byte, 1 = short, 2 = long) */
1479 8, /* bitsize */
1480 TRUE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_signed, /* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_ARM_THM_JUMP8", /* name */
1485 FALSE, /* partial_inplace */
1486 0x000000ff, /* src_mask */
1487 0x000000ff, /* dst_mask */
1488 TRUE), /* pcrel_offset */
ba93b8ac 1489
c19d1205
ZW		 1490 /* TLS relocations */
1491 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 32, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1498 NULL, /* special_function */
1499 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1500 TRUE, /* partial_inplace */
1501 0xffffffff, /* src_mask */
1502 0xffffffff, /* dst_mask */
c19d1205 1503 FALSE), /* pcrel_offset */
ba93b8ac 1504
ba93b8ac
DJ		 1505 HOWTO (R_ARM_TLS_LDM32, /* type */
1506 0, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 32, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_bitfield,/* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 "R_ARM_TLS_LDM32", /* name */
1514 TRUE, /* partial_inplace */
1515 0xffffffff, /* src_mask */
1516 0xffffffff, /* dst_mask */
c19d1205 1517 FALSE), /* pcrel_offset */
ba93b8ac 1518
c19d1205 1519 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1520 0, /* rightshift */
1521 2, /* size (0 = byte, 1 = short, 2 = long) */
1522 32, /* bitsize */
1523 FALSE, /* pc_relative */
1524 0, /* bitpos */
1525 complain_overflow_bitfield,/* complain_on_overflow */
1526 bfd_elf_generic_reloc, /* special_function */
c19d1205 1527 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1528 TRUE, /* partial_inplace */
1529 0xffffffff, /* src_mask */
1530 0xffffffff, /* dst_mask */
c19d1205 1531 FALSE), /* pcrel_offset */
ba93b8ac 1532
ba93b8ac
DJ		 1533 HOWTO (R_ARM_TLS_IE32, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 32, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_bitfield,/* complain_on_overflow */
1540 NULL, /* special_function */
1541 "R_ARM_TLS_IE32", /* name */
1542 TRUE, /* partial_inplace */
1543 0xffffffff, /* src_mask */
1544 0xffffffff, /* dst_mask */
c19d1205 1545 FALSE), /* pcrel_offset */
7f266840 1546
c19d1205 1547 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1550 32, /* bitsize */
7f266840
DJ		 1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
c19d1205
ZW		 1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 bfd_elf_generic_reloc, /* special_function */
1555 "R_ARM_TLS_LE32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
7f266840 1560
c19d1205
ZW		 1561 HOWTO (R_ARM_TLS_LDO12, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 12, /* bitsize */
1565 FALSE, /* pc_relative */
7f266840 1566 0, /* bitpos */
c19d1205 1567 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1568 bfd_elf_generic_reloc, /* special_function */
c19d1205 1569 "R_ARM_TLS_LDO12", /* name */
7f266840 1570 FALSE, /* partial_inplace */
c19d1205
ZW		 1571 0x00000fff, /* src_mask */
1572 0x00000fff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
7f266840 1574
c19d1205
ZW		 1575 HOWTO (R_ARM_TLS_LE12, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 12, /* bitsize */
1579 FALSE, /* pc_relative */
7f266840 1580 0, /* bitpos */
c19d1205 1581 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1582 bfd_elf_generic_reloc, /* special_function */
c19d1205 1583 "R_ARM_TLS_LE12", /* name */
7f266840 1584 FALSE, /* partial_inplace */
c19d1205
ZW		 1585 0x00000fff, /* src_mask */
1586 0x00000fff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
7f266840 1588
c19d1205 1589 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1592 12, /* bitsize */
1593 FALSE, /* pc_relative */
7f266840 1594 0, /* bitpos */
c19d1205 1595 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1596 bfd_elf_generic_reloc, /* special_function */
c19d1205 1597 "R_ARM_TLS_IE12GP", /* name */
7f266840 1598 FALSE, /* partial_inplace */
c19d1205
ZW		 1599 0x00000fff, /* src_mask */
1600 0x00000fff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602};
1603
1604/* 112-127 private relocations
1605 128 R_ARM_ME_TOO, obsolete
1606 129-255 unallocated in AAELF.
7f266840 1607
c19d1205
ZW		 1608 249-255 extended, currently unused, relocations: */
1609
4962c51a 1610static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1611{
1612 HOWTO (R_ARM_RREL32, /* type */
1613 0, /* rightshift */
1614 0, /* size (0 = byte, 1 = short, 2 = long) */
1615 0, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_dont,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_RREL32", /* name */
1621 FALSE, /* partial_inplace */
1622 0, /* src_mask */
1623 0, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_RABS32, /* type */
1627 0, /* rightshift */
1628 0, /* size (0 = byte, 1 = short, 2 = long) */
1629 0, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_dont,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_RABS32", /* name */
1635 FALSE, /* partial_inplace */
1636 0, /* src_mask */
1637 0, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_RPC24, /* type */
1641 0, /* rightshift */
1642 0, /* size (0 = byte, 1 = short, 2 = long) */
1643 0, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_dont,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_RPC24", /* name */
1649 FALSE, /* partial_inplace */
1650 0, /* src_mask */
1651 0, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 HOWTO (R_ARM_RBASE, /* type */
1655 0, /* rightshift */
1656 0, /* size (0 = byte, 1 = short, 2 = long) */
1657 0, /* bitsize */
1658 FALSE, /* pc_relative */
1659 0, /* bitpos */
1660 complain_overflow_dont,/* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 "R_ARM_RBASE", /* name */
1663 FALSE, /* partial_inplace */
1664 0, /* src_mask */
1665 0, /* dst_mask */
1666 FALSE) /* pcrel_offset */
1667};
1668
1669static reloc_howto_type *
1670elf32_arm_howto_from_type (unsigned int r_type)
1671{
906e58ca 1672 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1673 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1674
c19d1205 1675 if (r_type >= R_ARM_RREL32
906e58ca 1676 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1677 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1678
c19d1205 1679 return NULL;
7f266840
DJ		 1680}
1681
1682static void
1683elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1684 Elf_Internal_Rela * elf_reloc)
1685{
1686 unsigned int r_type;
1687
1688 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1689 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1690}
1691
1692struct elf32_arm_reloc_map
1693 {
1694 bfd_reloc_code_real_type bfd_reloc_val;
1695 unsigned char elf_reloc_val;
1696 };
1697
1698/* All entries in this list must also be present in elf32_arm_howto_table. */
1699static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1700 {
1701 {BFD_RELOC_NONE, R_ARM_NONE},
1702 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1703 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1704 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1705 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1706 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1707 {BFD_RELOC_32, R_ARM_ABS32},
1708 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1709 {BFD_RELOC_8, R_ARM_ABS8},
1710 {BFD_RELOC_16, R_ARM_ABS16},
1711 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1712 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1713 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1719 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1720 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1721 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1722 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1723 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1724 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1726 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1727 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1728 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1729 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1730 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1731 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1732 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1733 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1734 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1735 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1736 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1737 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1738 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1739 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1740 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1741 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1742 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1743 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1744 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1745 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1746 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1747 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1749 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1750 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1751 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1753 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1754 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1755 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1756 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1757 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1758 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1759 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1760 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1761 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1762 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1763 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1764 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1765 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1767 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1768 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1769 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1770 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1771 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1772 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1773 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1774 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1775 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1776 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1777 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1778 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1779 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1780 };
1781
1782static reloc_howto_type *
f1c71a59
ZW		 1783elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1784 bfd_reloc_code_real_type code)
7f266840
DJ		 1785{
1786 unsigned int i;
8029a119 1787
906e58ca 1788 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1789 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1790 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1791
c19d1205 1792 return NULL;
7f266840
DJ		 1793}
1794
157090f7
AM		 1795static reloc_howto_type *
1796elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1797 const char *r_name)
1798{
1799 unsigned int i;
1800
906e58ca 1801 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1802 if (elf32_arm_howto_table_1[i].name != NULL
1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1804 return &elf32_arm_howto_table_1[i];
1805
906e58ca 1806 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1807 if (elf32_arm_howto_table_2[i].name != NULL
1808 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1809 return &elf32_arm_howto_table_2[i];
1810
1811 return NULL;
1812}
1813
906e58ca
NC		 1814/* Support for core dump NOTE sections. */
1815
7f266840 1816static bfd_boolean
f1c71a59 1817elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1818{
1819 int offset;
1820 size_t size;
1821
1822 switch (note->descsz)
1823 {
1824 default:
1825 return FALSE;
1826
8029a119 1827 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1828 /* pr_cursig */
1829 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1830
1831 /* pr_pid */
1832 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1833
1834 /* pr_reg */
1835 offset = 72;
1836 size = 72;
1837
1838 break;
1839 }
1840
1841 /* Make a ".reg/999" section. */
1842 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1843 size, note->descpos + offset);
1844}
1845
1846static bfd_boolean
f1c71a59 1847elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1848{
1849 switch (note->descsz)
1850 {
1851 default:
1852 return FALSE;
1853
8029a119 1854 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1855 elf_tdata (abfd)->core_program
1856 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1857 elf_tdata (abfd)->core_command
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1859 }
1860
1861 /* Note that for some reason, a spurious space is tacked
1862 onto the end of the args in some (at least one anyway)
1863 implementations, so strip it off if it exists. */
7f266840
DJ		 1864 {
1865 char *command = elf_tdata (abfd)->core_command;
1866 int n = strlen (command);
1867
1868 if (0 < n && command[n - 1] == ' ')
1869 command[n - 1] = '\0';
1870 }
1871
1872 return TRUE;
1873}
1874
1875#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1876#define TARGET_LITTLE_NAME "elf32-littlearm"
1877#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1878#define TARGET_BIG_NAME "elf32-bigarm"
1879
1880#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1881#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1882
252b5132
RH		 1883typedef unsigned long int insn32;
1884typedef unsigned short int insn16;
1885
3a4a14e9
PB		 1886/* In lieu of proper flags, assume all EABIv4 or later objects are
1887 interworkable. */
57e8b36a 1888#define INTERWORK_FLAG(abfd) \
3a4a14e9 1889 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1890 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1891 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1892
252b5132
RH		 1893/* The linker script knows the section names for placement.
1894 The entry_names are used to do simple name mangling on the stubs.
1895 Given a function name, and its type, the stub can be found. The
9b485d32 1896 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1897#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1898#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1899
1900#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1901#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1902
c7b8f16e
JB		 1903#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1904#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1905
845b51d6
PB		 1906#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1907#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1908
7413f23f
DJ		 1909#define STUB_ENTRY_NAME "__%s_veneer"
1910
252b5132
RH		 1911/* The name of the dynamic interpreter. This is put in the .interp
1912 section. */
1913#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1914
5e681ec4
PB		 1915#ifdef FOUR_WORD_PLT
1916
252b5132
RH		 1917/* The first entry in a procedure linkage table looks like
1918 this. It is set up so that any shared library function that is
59f2c4e7 1919 called before the relocation has been set up calls the dynamic
9b485d32 1920 linker first. */
e5a52504 1921static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1922 {
1923 0xe52de004, /* str lr, [sp, #-4]! */
1924 0xe59fe010, /* ldr lr, [pc, #16] */
1925 0xe08fe00e, /* add lr, pc, lr */
1926 0xe5bef008, /* ldr pc, [lr, #8]! */
1927 };
1928
1929/* Subsequent entries in a procedure linkage table look like
1930 this. */
e5a52504 1931static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1932 {
1933 0xe28fc600, /* add ip, pc, #NN */
1934 0xe28cca00, /* add ip, ip, #NN */
1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1936 0x00000000, /* unused */
1937 };
1938
1939#else
1940
5e681ec4
PB		 1941/* The first entry in a procedure linkage table looks like
1942 this. It is set up so that any shared library function that is
1943 called before the relocation has been set up calls the dynamic
1944 linker first. */
e5a52504 1945static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1946 {
5e681ec4
PB		 1947 0xe52de004, /* str lr, [sp, #-4]! */
1948 0xe59fe004, /* ldr lr, [pc, #4] */
1949 0xe08fe00e, /* add lr, pc, lr */
1950 0xe5bef008, /* ldr pc, [lr, #8]! */
1951 0x00000000, /* &GOT[0] - . */
917583ad 1952 };
252b5132
RH		 1953
1954/* Subsequent entries in a procedure linkage table look like
1955 this. */
e5a52504 1956static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1957 {
1958 0xe28fc600, /* add ip, pc, #0xNN00000 */
1959 0xe28cca00, /* add ip, ip, #0xNN000 */
1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1961 };
1962
1963#endif
252b5132 1964
00a97672
RS		 1965/* The format of the first entry in the procedure linkage table
1966 for a VxWorks executable. */
1967static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1968 {
1969 0xe52dc008, /* str ip,[sp,#-8]! */
1970 0xe59fc000, /* ldr ip,[pc] */
1971 0xe59cf008, /* ldr pc,[ip,#8] */
1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1973 };
1974
1975/* The format of subsequent entries in a VxWorks executable. */
1976static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1977 {
1978 0xe59fc000, /* ldr ip,[pc] */
1979 0xe59cf000, /* ldr pc,[ip] */
1980 0x00000000, /* .long @got */
1981 0xe59fc000, /* ldr ip,[pc] */
1982 0xea000000, /* b _PLT */
1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1984 };
1985
1986/* The format of entries in a VxWorks shared library. */
1987static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1988 {
1989 0xe59fc000, /* ldr ip,[pc] */
1990 0xe79cf009, /* ldr pc,[ip,r9] */
1991 0x00000000, /* .long @got */
1992 0xe59fc000, /* ldr ip,[pc] */
1993 0xe599f008, /* ldr pc,[r9,#8] */
1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1995 };
1996
b7693d02
DJ		 1997/* An initial stub used if the PLT entry is referenced from Thumb code. */
1998#define PLT_THUMB_STUB_SIZE 4
1999static const bfd_vma elf32_arm_plt_thumb_stub [] =
2000 {
2001 0x4778, /* bx pc */
2002 0x46c0 /* nop */
2003 };
2004
e5a52504
MM		 2005/* The entries in a PLT when using a DLL-based target with multiple
2006 address spaces. */
906e58ca 2007static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2008 {
83a358aa 2009 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2011 };
2012
906e58ca
NC		 2013#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2014#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2015#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2016#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2017#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2018#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2019
461a49ca
DJ		 2020enum stub_insn_type
2021 {
2022 THUMB16_TYPE = 1,
2023 THUMB32_TYPE,
2024 ARM_TYPE,
2025 DATA_TYPE
2026 };
2027
48229727
JB		 2028#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2029/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2030 is inserted in arm_build_one_stub(). */
2031#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2032#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2033#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2034#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2035#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2036#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2037
2038typedef struct
2039{
2040 bfd_vma data;
2041 enum stub_insn_type type;
ebe24dd4 2042 unsigned int r_type;
461a49ca
DJ		 2043 int reloc_addend;
2044} insn_sequence;
2045
fea2b4d6
CL		 2046/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2047 to reach the stub if necessary. */
461a49ca 2048static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2049 {
461a49ca
DJ		 2050 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2051 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2052 };
2053
fea2b4d6
CL		 2054/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2055 available. */
461a49ca 2056static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2057 {
461a49ca
DJ		 2058 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2059 ARM_INSN(0xe12fff1c), /* bx ip */
2060 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2061 };
2062
d3626fb0 2063/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2064static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2065 {
461a49ca
DJ		 2066 THUMB16_INSN(0xb401), /* push {r0} */
2067 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2068 THUMB16_INSN(0x4684), /* mov ip, r0 */
2069 THUMB16_INSN(0xbc01), /* pop {r0} */
2070 THUMB16_INSN(0x4760), /* bx ip */
2071 THUMB16_INSN(0xbf00), /* nop */
2072 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2073 };
2074
d3626fb0
CL		 2075/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2076 allowed. */
2077static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2078 {
2079 THUMB16_INSN(0x4778), /* bx pc */
2080 THUMB16_INSN(0x46c0), /* nop */
2081 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2082 ARM_INSN(0xe12fff1c), /* bx ip */
2083 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2084 };
2085
fea2b4d6
CL		 2086/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2087 available. */
461a49ca 2088static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2089 {
461a49ca
DJ		 2090 THUMB16_INSN(0x4778), /* bx pc */
2091 THUMB16_INSN(0x46c0), /* nop */
2092 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2093 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2094 };
2095
fea2b4d6
CL		 2096/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2097 one, when the destination is close enough. */
461a49ca 2098static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2099 {
461a49ca
DJ		 2100 THUMB16_INSN(0x4778), /* bx pc */
2101 THUMB16_INSN(0x46c0), /* nop */
2102 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2103 };
2104
cf3eccff 2105/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2106 blx to reach the stub if necessary. */
cf3eccff 2107static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2108 {
461a49ca
DJ		 2109 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2110 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2111 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2112 };
2113
cf3eccff
DJ		 2114/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2115 blx to reach the stub if necessary. We can not add into pc;
2116 it is not guaranteed to mode switch (different in ARMv6 and
2117 ARMv7). */
2118static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2119 {
2120 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2121 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2122 ARM_INSN(0xe12fff1c), /* bx ip */
2123 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2124 };
2125
ebe24dd4
CL		 2126/* V4T ARM -> ARM long branch stub, PIC. */
2127static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2128 {
2129 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2130 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2131 ARM_INSN(0xe12fff1c), /* bx ip */
2132 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2133 };
2134
2135/* V4T Thumb -> ARM long branch stub, PIC. */
2136static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2137 {
2138 THUMB16_INSN(0x4778), /* bx pc */
2139 THUMB16_INSN(0x46c0), /* nop */
2140 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2141 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2142 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2143 };
2144
d3626fb0
CL		 2145/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2146 architectures. */
ebe24dd4
CL		 2147static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2148 {
2149 THUMB16_INSN(0xb401), /* push {r0} */
2150 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2151 THUMB16_INSN(0x46fc), /* mov ip, pc */
2152 THUMB16_INSN(0x4484), /* add ip, r0 */
2153 THUMB16_INSN(0xbc01), /* pop {r0} */
2154 THUMB16_INSN(0x4760), /* bx ip */
2155 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2156 };
2157
d3626fb0
CL		 2158/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2159 allowed. */
2160static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2161 {
2162 THUMB16_INSN(0x4778), /* bx pc */
2163 THUMB16_INSN(0x46c0), /* nop */
2164 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2165 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2166 ARM_INSN(0xe12fff1c), /* bx ip */
2167 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2168 };
2169
48229727
JB		 2170/* Cortex-A8 erratum-workaround stubs. */
2171
2172/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2173 can't use a conditional branch to reach this stub). */
2174
2175static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2176 {
2177 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2178 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2179 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2180 };
2181
2182/* Stub used for b.w and bl.w instructions. */
2183
2184static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2185 {
2186 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2187 };
2188
2189static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2190 {
2191 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2192 };
2193
2194/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2195 instruction (which switches to ARM mode) to point to this stub. Jump to the
2196 real destination using an ARM-mode branch. */
2197
2198static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2199 {
2200 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2201 };
2202
906e58ca
NC		 2203/* Section name for stubs is the associated section name plus this
2204 string. */
2205#define STUB_SUFFIX ".stub"
2206
738a79f6
CL		 2207/* One entry per long/short branch stub defined above. */
2208#define DEF_STUBS \
2209 DEF_STUB(long_branch_any_any) \
2210 DEF_STUB(long_branch_v4t_arm_thumb) \
2211 DEF_STUB(long_branch_thumb_only) \
2212 DEF_STUB(long_branch_v4t_thumb_thumb) \
2213 DEF_STUB(long_branch_v4t_thumb_arm) \
2214 DEF_STUB(short_branch_v4t_thumb_arm) \
2215 DEF_STUB(long_branch_any_arm_pic) \
2216 DEF_STUB(long_branch_any_thumb_pic) \
2217 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2220 DEF_STUB(long_branch_thumb_only_pic) \
2221 DEF_STUB(a8_veneer_b_cond) \
2222 DEF_STUB(a8_veneer_b) \
2223 DEF_STUB(a8_veneer_bl) \
2224 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2225
2226#define DEF_STUB(x) arm_stub_##x,
2227enum elf32_arm_stub_type {
906e58ca 2228 arm_stub_none,
738a79f6 2229 DEF_STUBS
eb7c4339
NS		 2230 /* Note the first a8_veneer type */
2231 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2232};
2233#undef DEF_STUB
2234
2235typedef struct
2236{
d3ce72d0 2237 const insn_sequence* template_sequence;
738a79f6
CL		 2238 int template_size;
2239} stub_def;
2240
2241#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2242static const stub_def stub_definitions[] = {
2243 {NULL, 0},
2244 DEF_STUBS
906e58ca
NC		 2245};
2246
2247struct elf32_arm_stub_hash_entry
2248{
2249 /* Base hash table entry structure. */
2250 struct bfd_hash_entry root;
2251
2252 /* The stub section. */
2253 asection *stub_sec;
2254
2255 /* Offset within stub_sec of the beginning of this stub. */
2256 bfd_vma stub_offset;
2257
2258 /* Given the symbol's value and its section we can determine its final
2259 value when building the stubs (so the stub knows where to jump). */
2260 bfd_vma target_value;
2261 asection *target_section;
2262
48229727
JB		 2263 /* Offset to apply to relocation referencing target_value. */
2264 bfd_vma target_addend;
2265
2266 /* The instruction which caused this stub to be generated (only valid for
2267 Cortex-A8 erratum workaround stubs at present). */
2268 unsigned long orig_insn;
2269
461a49ca 2270 /* The stub type. */
906e58ca 2271 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2272 /* Its encoding size in bytes. */
2273 int stub_size;
2274 /* Its template. */
2275 const insn_sequence *stub_template;
2276 /* The size of the template (number of entries). */
2277 int stub_template_size;
906e58ca
NC		 2278
2279 /* The symbol table entry, if any, that this was derived from. */
2280 struct elf32_arm_link_hash_entry *h;
2281
2282 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2283 unsigned char st_type;
2284
2285 /* Where this stub is being called from, or, in the case of combined
2286 stub sections, the first input section in the group. */
2287 asection *id_sec;
7413f23f
DJ		 2288
2289 /* The name for the local symbol at the start of this stub. The
2290 stub name in the hash table has to be unique; this does not, so
2291 it can be friendlier. */
2292 char *output_name;
906e58ca
NC		 2293};
2294
e489d0ae
PB		 2295/* Used to build a map of a section. This is required for mixed-endian
2296 code/data. */
2297
2298typedef struct elf32_elf_section_map
2299{
2300 bfd_vma vma;
2301 char type;
2302}
2303elf32_arm_section_map;
2304
c7b8f16e
JB		 2305/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2306
2307typedef enum
2308{
2309 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2310 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2311 VFP11_ERRATUM_ARM_VENEER,
2312 VFP11_ERRATUM_THUMB_VENEER
2313}
2314elf32_vfp11_erratum_type;
2315
2316typedef struct elf32_vfp11_erratum_list
2317{
2318 struct elf32_vfp11_erratum_list *next;
2319 bfd_vma vma;
2320 union
2321 {
2322 struct
2323 {
2324 struct elf32_vfp11_erratum_list *veneer;
2325 unsigned int vfp_insn;
2326 } b;
2327 struct
2328 {
2329 struct elf32_vfp11_erratum_list *branch;
2330 unsigned int id;
2331 } v;
2332 } u;
2333 elf32_vfp11_erratum_type type;
2334}
2335elf32_vfp11_erratum_list;
2336
2468f9c9
PB		 2337typedef enum
2338{
2339 DELETE_EXIDX_ENTRY,
2340 INSERT_EXIDX_CANTUNWIND_AT_END
2341}
2342arm_unwind_edit_type;
2343
2344/* A (sorted) list of edits to apply to an unwind table. */
2345typedef struct arm_unwind_table_edit
2346{
2347 arm_unwind_edit_type type;
2348 /* Note: we sometimes want to insert an unwind entry corresponding to a
2349 section different from the one we're currently writing out, so record the
2350 (text) section this edit relates to here. */
2351 asection *linked_section;
2352 unsigned int index;
2353 struct arm_unwind_table_edit *next;
2354}
2355arm_unwind_table_edit;
2356
8e3de13a 2357typedef struct _arm_elf_section_data
e489d0ae 2358{
2468f9c9 2359 /* Information about mapping symbols. */
e489d0ae 2360 struct bfd_elf_section_data elf;
8e3de13a 2361 unsigned int mapcount;
c7b8f16e 2362 unsigned int mapsize;
e489d0ae 2363 elf32_arm_section_map *map;
2468f9c9 2364 /* Information about CPU errata. */
c7b8f16e
JB		 2365 unsigned int erratumcount;
2366 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2367 /* Information about unwind tables. */
2368 union
2369 {
2370 /* Unwind info attached to a text section. */
2371 struct
2372 {
2373 asection *arm_exidx_sec;
2374 } text;
2375
2376 /* Unwind info attached to an .ARM.exidx section. */
2377 struct
2378 {
2379 arm_unwind_table_edit *unwind_edit_list;
2380 arm_unwind_table_edit *unwind_edit_tail;
2381 } exidx;
2382 } u;
8e3de13a
NC		 2383}
2384_arm_elf_section_data;
e489d0ae
PB		 2385
2386#define elf32_arm_section_data(sec) \
8e3de13a 2387 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2388
48229727
JB		 2389/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2390 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2391 so may be created multiple times: we use an array of these entries whilst
2392 relaxing which we can refresh easily, then create stubs for each potentially
2393 erratum-triggering instruction once we've settled on a solution. */
2394
2395struct a8_erratum_fix {
2396 bfd *input_bfd;
2397 asection *section;
2398 bfd_vma offset;
2399 bfd_vma addend;
2400 unsigned long orig_insn;
2401 char *stub_name;
2402 enum elf32_arm_stub_type stub_type;
fe33d2fa 2403 int st_type;
48229727
JB		 2404};
2405
2406/* A table of relocs applied to branches which might trigger Cortex-A8
2407 erratum. */
2408
2409struct a8_erratum_reloc {
2410 bfd_vma from;
2411 bfd_vma destination;
2412 unsigned int r_type;
2413 unsigned char st_type;
2414 const char *sym_name;
2415 bfd_boolean non_a8_stub;
2416};
2417
ba93b8ac
DJ		 2418/* The size of the thread control block. */
2419#define TCB_SIZE 8
2420
0ffa91dd 2421struct elf_arm_obj_tdata
ba93b8ac
DJ		 2422{
2423 struct elf_obj_tdata root;
2424
2425 /* tls_type for each local got entry. */
2426 char *local_got_tls_type;
ee065d83 2427
bf21ed78
MS		 2428 /* Zero to warn when linking objects with incompatible enum sizes. */
2429 int no_enum_size_warning;
a9dc9481
JM		 2430
2431 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2432 int no_wchar_size_warning;
ba93b8ac
DJ		 2433};
2434
0ffa91dd
NC		 2435#define elf_arm_tdata(bfd) \
2436 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2437
0ffa91dd
NC		 2438#define elf32_arm_local_got_tls_type(bfd) \
2439 (elf_arm_tdata (bfd)->local_got_tls_type)
2440
2441#define is_arm_elf(bfd) \
2442 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2443 && elf_tdata (bfd) != NULL \
4dfe6ac6 2444 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2445
2446static bfd_boolean
2447elf32_arm_mkobject (bfd *abfd)
2448{
0ffa91dd 2449 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2450 ARM_ELF_DATA);
ba93b8ac
DJ		 2451}
2452
252b5132
RH		 2453/* The ARM linker needs to keep track of the number of relocs that it
2454 decides to copy in check_relocs for each symbol. This is so that
2455 it can discard PC relative relocs if it doesn't need them when
2456 linking with -Bsymbolic. We store the information in a field
2457 extending the regular ELF linker hash table. */
2458
ba93b8ac
DJ		 2459/* This structure keeps track of the number of relocs we have copied
2460 for a given symbol. */
5e681ec4 2461struct elf32_arm_relocs_copied
917583ad
NC		 2462 {
2463 /* Next section. */
5e681ec4 2464 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2465 /* A section in dynobj. */
2466 asection * section;
2467 /* Number of relocs copied in this section. */
2468 bfd_size_type count;
ba93b8ac
DJ		 2469 /* Number of PC-relative relocs copied in this section. */
2470 bfd_size_type pc_count;
917583ad 2471 };
252b5132 2472
ba93b8ac
DJ		 2473#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2474
ba96a88f 2475/* Arm ELF linker hash entry. */
252b5132 2476struct elf32_arm_link_hash_entry
917583ad
NC		 2477 {
2478 struct elf_link_hash_entry root;
252b5132 2479
917583ad 2480 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2481 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2482
2483 /* We reference count Thumb references to a PLT entry separately,
2484 so that we can emit the Thumb trampoline only if needed. */
2485 bfd_signed_vma plt_thumb_refcount;
2486
bd97cb95
DJ		 2487 /* Some references from Thumb code may be eliminated by BL->BLX
2488 conversion, so record them separately. */
2489 bfd_signed_vma plt_maybe_thumb_refcount;
2490
b7693d02
DJ		 2491 /* Since PLT entries have variable size if the Thumb prologue is
2492 used, we need to record the index into .got.plt instead of
2493 recomputing it from the PLT offset. */
2494 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2495
2496#define GOT_UNKNOWN 0
2497#define GOT_NORMAL 1
2498#define GOT_TLS_GD 2
2499#define GOT_TLS_IE 4
2500 unsigned char tls_type;
a4fd1a8e
PB		 2501
2502 /* The symbol marking the real symbol location for exported thumb
2503 symbols with Arm stubs. */
2504 struct elf_link_hash_entry *export_glue;
906e58ca 2505
da5938a2 2506 /* A pointer to the most recently used stub hash entry against this
8029a119 2507 symbol. */
da5938a2 2508 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2509 };
252b5132 2510
252b5132 2511/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2512#define elf32_arm_link_hash_traverse(table, func, info) \
2513 (elf_link_hash_traverse \
2514 (&(table)->root, \
b7693d02 2515 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2516 (info)))
2517
2518/* Get the ARM elf linker hash table from a link_info structure. */
2519#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2520 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2521 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2522
906e58ca
NC		 2523#define arm_stub_hash_lookup(table, string, create, copy) \
2524 ((struct elf32_arm_stub_hash_entry *) \
2525 bfd_hash_lookup ((table), (string), (create), (copy)))
2526
21d799b5
NC		 2527/* Array to keep track of which stub sections have been created, and
2528 information on stub grouping. */
2529struct map_stub
2530{
2531 /* This is the section to which stubs in the group will be
2532 attached. */
2533 asection *link_sec;
2534 /* The stub section. */
2535 asection *stub_sec;
2536};
2537
9b485d32 2538/* ARM ELF linker hash table. */
252b5132 2539struct elf32_arm_link_hash_table
906e58ca
NC		 2540{
2541 /* The main hash table. */
2542 struct elf_link_hash_table root;
252b5132 2543
906e58ca
NC		 2544 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2545 bfd_size_type thumb_glue_size;
252b5132 2546
906e58ca
NC		 2547 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2548 bfd_size_type arm_glue_size;
252b5132 2549
906e58ca
NC		 2550 /* The size in bytes of section containing the ARMv4 BX veneers. */
2551 bfd_size_type bx_glue_size;
845b51d6 2552
906e58ca
NC		 2553 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2554 veneer has been populated. */
2555 bfd_vma bx_glue_offset[15];
845b51d6 2556
906e58ca
NC		 2557 /* The size in bytes of the section containing glue for VFP11 erratum
2558 veneers. */
2559 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2560
48229727
JB		 2561 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2562 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2563 elf32_arm_write_section(). */
2564 struct a8_erratum_fix *a8_erratum_fixes;
2565 unsigned int num_a8_erratum_fixes;
2566
906e58ca
NC		 2567 /* An arbitrary input BFD chosen to hold the glue sections. */
2568 bfd * bfd_of_glue_owner;
ba96a88f 2569
906e58ca
NC		 2570 /* Nonzero to output a BE8 image. */
2571 int byteswap_code;
e489d0ae 2572
906e58ca
NC		 2573 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2574 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2575 int target1_is_rel;
9c504268 2576
906e58ca
NC		 2577 /* The relocation to use for R_ARM_TARGET2 relocations. */
2578 int target2_reloc;
eb043451 2579
906e58ca
NC		 2580 /* 0 = Ignore R_ARM_V4BX.
2581 1 = Convert BX to MOV PC.
2582 2 = Generate v4 interworing stubs. */
2583 int fix_v4bx;
319850b4 2584
48229727
JB		 2585 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2586 int fix_cortex_a8;
2587
906e58ca
NC		 2588 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2589 int use_blx;
33bfe774 2590
906e58ca
NC		 2591 /* What sort of code sequences we should look for which may trigger the
2592 VFP11 denorm erratum. */
2593 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2594
906e58ca
NC		 2595 /* Global counter for the number of fixes we have emitted. */
2596 int num_vfp11_fixes;
c7b8f16e 2597
906e58ca
NC		 2598 /* Nonzero to force PIC branch veneers. */
2599 int pic_veneer;
27e55c4d 2600
906e58ca
NC		 2601 /* The number of bytes in the initial entry in the PLT. */
2602 bfd_size_type plt_header_size;
e5a52504 2603
906e58ca
NC		 2604 /* The number of bytes in the subsequent PLT etries. */
2605 bfd_size_type plt_entry_size;
e5a52504 2606
906e58ca
NC		 2607 /* True if the target system is VxWorks. */
2608 int vxworks_p;
00a97672 2609
906e58ca
NC		 2610 /* True if the target system is Symbian OS. */
2611 int symbian_p;
e5a52504 2612
906e58ca
NC		 2613 /* True if the target uses REL relocations. */
2614 int use_rel;
4e7fd91e 2615
906e58ca
NC		 2616 /* Short-cuts to get to dynamic linker sections. */
2617 asection *sgot;
2618 asection *sgotplt;
2619 asection *srelgot;
2620 asection *splt;
2621 asection *srelplt;
2622 asection *sdynbss;
2623 asection *srelbss;
5e681ec4 2624
906e58ca
NC		 2625 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2626 asection *srelplt2;
00a97672 2627
906e58ca
NC		 2628 /* Data for R_ARM_TLS_LDM32 relocations. */
2629 union
2630 {
2631 bfd_signed_vma refcount;
2632 bfd_vma offset;
2633 } tls_ldm_got;
b7693d02 2634
87d72d41
AM		 2635 /* Small local sym cache. */
2636 struct sym_cache sym_cache;
906e58ca
NC		 2637
2638 /* For convenience in allocate_dynrelocs. */
2639 bfd * obfd;
2640
2641 /* The stub hash table. */
2642 struct bfd_hash_table stub_hash_table;
2643
2644 /* Linker stub bfd. */
2645 bfd *stub_bfd;
2646
2647 /* Linker call-backs. */
2648 asection * (*add_stub_section) (const char *, asection *);
2649 void (*layout_sections_again) (void);
2650
2651 /* Array to keep track of which stub sections have been created, and
2652 information on stub grouping. */
21d799b5 2653 struct map_stub *stub_group;
906e58ca 2654
fe33d2fa
CL		 2655 /* Number of elements in stub_group. */
2656 int top_id;
2657
906e58ca
NC		 2658 /* Assorted information used by elf32_arm_size_stubs. */
2659 unsigned int bfd_count;
2660 int top_index;
2661 asection **input_list;
2662};
252b5132 2663
780a67af
NC		 2664/* Create an entry in an ARM ELF linker hash table. */
2665
2666static struct bfd_hash_entry *
57e8b36a
NC		 2667elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2668 struct bfd_hash_table * table,
2669 const char * string)
780a67af
NC		 2670{
2671 struct elf32_arm_link_hash_entry * ret =
2672 (struct elf32_arm_link_hash_entry *) entry;
2673
2674 /* Allocate the structure if it has not already been allocated by a
2675 subclass. */
906e58ca 2676 if (ret == NULL)
21d799b5
NC		 2677 ret = (struct elf32_arm_link_hash_entry *)
2678 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2679 if (ret == NULL)
780a67af
NC		 2680 return (struct bfd_hash_entry *) ret;
2681
2682 /* Call the allocation method of the superclass. */
2683 ret = ((struct elf32_arm_link_hash_entry *)
2684 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2685 table, string));
57e8b36a 2686 if (ret != NULL)
b7693d02
DJ		 2687 {
2688 ret->relocs_copied = NULL;
ba93b8ac 2689 ret->tls_type = GOT_UNKNOWN;
b7693d02 2690 ret->plt_thumb_refcount = 0;
bd97cb95 2691 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2692 ret->plt_got_offset = -1;
a4fd1a8e 2693 ret->export_glue = NULL;
906e58ca
NC		 2694
2695 ret->stub_cache = NULL;
b7693d02 2696 }
780a67af
NC		 2697
2698 return (struct bfd_hash_entry *) ret;
2699}
2700
906e58ca
NC		 2701/* Initialize an entry in the stub hash table. */
2702
2703static struct bfd_hash_entry *
2704stub_hash_newfunc (struct bfd_hash_entry *entry,
2705 struct bfd_hash_table *table,
2706 const char *string)
2707{
2708 /* Allocate the structure if it has not already been allocated by a
2709 subclass. */
2710 if (entry == NULL)
2711 {
21d799b5
NC		 2712 entry = (struct bfd_hash_entry *)
2713 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 2714 if (entry == NULL)
2715 return entry;
2716 }
2717
2718 /* Call the allocation method of the superclass. */
2719 entry = bfd_hash_newfunc (entry, table, string);
2720 if (entry != NULL)
2721 {
2722 struct elf32_arm_stub_hash_entry *eh;
2723
2724 /* Initialize the local fields. */
2725 eh = (struct elf32_arm_stub_hash_entry *) entry;
2726 eh->stub_sec = NULL;
2727 eh->stub_offset = 0;
2728 eh->target_value = 0;
2729 eh->target_section = NULL;
cedfb179
DK		 2730 eh->target_addend = 0;
2731 eh->orig_insn = 0;
906e58ca 2732 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2733 eh->stub_size = 0;
2734 eh->stub_template = NULL;
2735 eh->stub_template_size = 0;
906e58ca
NC		 2736 eh->h = NULL;
2737 eh->id_sec = NULL;
d8d2f433 2738 eh->output_name = NULL;
906e58ca
NC		 2739 }
2740
2741 return entry;
2742}
2743
00a97672 2744/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2745 shortcuts to them in our hash table. */
2746
2747static bfd_boolean
57e8b36a 2748create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2749{
2750 struct elf32_arm_link_hash_table *htab;
2751
e5a52504 2752 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2753 if (htab == NULL)
2754 return FALSE;
2755
e5a52504
MM		 2756 /* BPABI objects never have a GOT, or associated sections. */
2757 if (htab->symbian_p)
2758 return TRUE;
2759
5e681ec4
PB		 2760 if (! _bfd_elf_create_got_section (dynobj, info))
2761 return FALSE;
2762
5e681ec4
PB		 2763 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2764 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2765 if (!htab->sgot || !htab->sgotplt)
2766 abort ();
2767
64e77c6d
L		 2768 htab->srelgot = bfd_get_section_by_name (dynobj,
2769 RELOC_SECTION (htab, ".got"));
2770 if (htab->srelgot == NULL)
5e681ec4
PB		 2771 return FALSE;
2772 return TRUE;
2773}
2774
00a97672
RS		 2775/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2776 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2777 hash table. */
2778
2779static bfd_boolean
57e8b36a 2780elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2781{
2782 struct elf32_arm_link_hash_table *htab;
2783
2784 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2785 if (htab == NULL)
2786 return FALSE;
2787
5e681ec4
PB		 2788 if (!htab->sgot && !create_got_section (dynobj, info))
2789 return FALSE;
2790
2791 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2792 return FALSE;
2793
2794 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2795 htab->srelplt = bfd_get_section_by_name (dynobj,
2796 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2797 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2798 if (!info->shared)
00a97672
RS		 2799 htab->srelbss = bfd_get_section_by_name (dynobj,
2800 RELOC_SECTION (htab, ".bss"));
2801
2802 if (htab->vxworks_p)
2803 {
2804 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2805 return FALSE;
2806
2807 if (info->shared)
2808 {
2809 htab->plt_header_size = 0;
2810 htab->plt_entry_size
2811 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2812 }
2813 else
2814 {
2815 htab->plt_header_size
2816 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2817 htab->plt_entry_size
2818 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2819 }
2820 }
5e681ec4 2821
906e58ca 2822 if (!htab->splt
e5a52504
MM		 2823 || !htab->srelplt
2824 || !htab->sdynbss
5e681ec4
PB		 2825 || (!info->shared && !htab->srelbss))
2826 abort ();
2827
2828 return TRUE;
2829}
2830
906e58ca
NC		 2831/* Copy the extra info we tack onto an elf_link_hash_entry. */
2832
2833static void
2834elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2835 struct elf_link_hash_entry *dir,
2836 struct elf_link_hash_entry *ind)
2837{
2838 struct elf32_arm_link_hash_entry *edir, *eind;
2839
2840 edir = (struct elf32_arm_link_hash_entry *) dir;
2841 eind = (struct elf32_arm_link_hash_entry *) ind;
2842
2843 if (eind->relocs_copied != NULL)
2844 {
2845 if (edir->relocs_copied != NULL)
2846 {
2847 struct elf32_arm_relocs_copied **pp;
2848 struct elf32_arm_relocs_copied *p;
2849
2850 /* Add reloc counts against the indirect sym to the direct sym
2851 list. Merge any entries against the same section. */
2852 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2853 {
2854 struct elf32_arm_relocs_copied *q;
2855
2856 for (q = edir->relocs_copied; q != NULL; q = q->next)
2857 if (q->section == p->section)
2858 {
2859 q->pc_count += p->pc_count;
2860 q->count += p->count;
2861 *pp = p->next;
2862 break;
2863 }
2864 if (q == NULL)
2865 pp = &p->next;
2866 }
2867 *pp = edir->relocs_copied;
2868 }
2869
2870 edir->relocs_copied = eind->relocs_copied;
2871 eind->relocs_copied = NULL;
2872 }
2873
2874 if (ind->root.type == bfd_link_hash_indirect)
2875 {
2876 /* Copy over PLT info. */
2877 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2878 eind->plt_thumb_refcount = 0;
2879 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2880 eind->plt_maybe_thumb_refcount = 0;
2881
2882 if (dir->got.refcount <= 0)
2883 {
2884 edir->tls_type = eind->tls_type;
2885 eind->tls_type = GOT_UNKNOWN;
2886 }
2887 }
2888
2889 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2890}
2891
2892/* Create an ARM elf linker hash table. */
2893
2894static struct bfd_link_hash_table *
2895elf32_arm_link_hash_table_create (bfd *abfd)
2896{
2897 struct elf32_arm_link_hash_table *ret;
2898 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2899
21d799b5 2900 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 2901 if (ret == NULL)
2902 return NULL;
2903
2904 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2905 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 2906 sizeof (struct elf32_arm_link_hash_entry),
2907 ARM_ELF_DATA))
906e58ca
NC		 2908 {
2909 free (ret);
2910 return NULL;
2911 }
2912
2913 ret->sgot = NULL;
2914 ret->sgotplt = NULL;
2915 ret->srelgot = NULL;
2916 ret->splt = NULL;
2917 ret->srelplt = NULL;
2918 ret->sdynbss = NULL;
2919 ret->srelbss = NULL;
2920 ret->srelplt2 = NULL;
2921 ret->thumb_glue_size = 0;
2922 ret->arm_glue_size = 0;
2923 ret->bx_glue_size = 0;
2924 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2925 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2926 ret->vfp11_erratum_glue_size = 0;
2927 ret->num_vfp11_fixes = 0;
48229727 2928 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2929 ret->bfd_of_glue_owner = NULL;
2930 ret->byteswap_code = 0;
2931 ret->target1_is_rel = 0;
2932 ret->target2_reloc = R_ARM_NONE;
2933#ifdef FOUR_WORD_PLT
2934 ret->plt_header_size = 16;
2935 ret->plt_entry_size = 16;
2936#else
2937 ret->plt_header_size = 20;
2938 ret->plt_entry_size = 12;
2939#endif
2940 ret->fix_v4bx = 0;
2941 ret->use_blx = 0;
2942 ret->vxworks_p = 0;
2943 ret->symbian_p = 0;
2944 ret->use_rel = 1;
87d72d41 2945 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2946 ret->obfd = abfd;
2947 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2948 ret->stub_bfd = NULL;
2949 ret->add_stub_section = NULL;
2950 ret->layout_sections_again = NULL;
2951 ret->stub_group = NULL;
fe33d2fa 2952 ret->top_id = 0;
6cee0a6f
L		 2953 ret->bfd_count = 0;
2954 ret->top_index = 0;
2955 ret->input_list = NULL;
906e58ca
NC		 2956
2957 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2958 sizeof (struct elf32_arm_stub_hash_entry)))
2959 {
2960 free (ret);
2961 return NULL;
2962 }
2963
2964 return &ret->root.root;
2965}
2966
2967/* Free the derived linker hash table. */
2968
2969static void
2970elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2971{
2972 struct elf32_arm_link_hash_table *ret
2973 = (struct elf32_arm_link_hash_table *) hash;
2974
2975 bfd_hash_table_free (&ret->stub_hash_table);
2976 _bfd_generic_link_hash_table_free (hash);
2977}
2978
2979/* Determine if we're dealing with a Thumb only architecture. */
2980
2981static bfd_boolean
2982using_thumb_only (struct elf32_arm_link_hash_table *globals)
2983{
2984 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2985 Tag_CPU_arch);
2986 int profile;
2987
41ed1ee7
DJ		 2988 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
2989 return TRUE;
2990
9e3c6df6 2991 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 2992 return FALSE;
2993
2994 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2995 Tag_CPU_arch_profile);
2996
2997 return profile == 'M';
2998}
2999
3000/* Determine if we're dealing with a Thumb-2 object. */
3001
3002static bfd_boolean
3003using_thumb2 (struct elf32_arm_link_hash_table *globals)
3004{
3005 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3006 Tag_CPU_arch);
3007 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3008}
3009
cd1dac3d
DG		 3010/* Determine what kind of NOPs are available. */
3011
3012static bfd_boolean
3013arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3014{
3015 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3016 Tag_CPU_arch);
3017 return arch == TAG_CPU_ARCH_V6T2
3018 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3019 || arch == TAG_CPU_ARCH_V7
3020 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3021}
3022
3023static bfd_boolean
3024arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3025{
3026 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3027 Tag_CPU_arch);
9e3c6df6
PB		 3028 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3029 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3030}
3031
f4ac8484
DJ		 3032static bfd_boolean
3033arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3034{
3035 switch (stub_type)
3036 {
fea2b4d6
CL		 3037 case arm_stub_long_branch_thumb_only:
3038 case arm_stub_long_branch_v4t_thumb_arm:
3039 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 3040 case arm_stub_long_branch_v4t_thumb_arm_pic:
3041 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3042 return TRUE;
3043 case arm_stub_none:
3044 BFD_FAIL ();
3045 return FALSE;
3046 break;
3047 default:
3048 return FALSE;
3049 }
3050}
3051
906e58ca
NC		 3052/* Determine the type of stub needed, if any, for a call. */
3053
3054static enum elf32_arm_stub_type
3055arm_type_of_stub (struct bfd_link_info *info,
3056 asection *input_sec,
3057 const Elf_Internal_Rela *rel,
fe33d2fa 3058 int *actual_st_type,
906e58ca 3059 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3060 bfd_vma destination,
3061 asection *sym_sec,
3062 bfd *input_bfd,
3063 const char *name)
906e58ca
NC		 3064{
3065 bfd_vma location;
3066 bfd_signed_vma branch_offset;
3067 unsigned int r_type;
3068 struct elf32_arm_link_hash_table * globals;
3069 int thumb2;
3070 int thumb_only;
3071 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3072 int use_plt = 0;
fe33d2fa 3073 int st_type = *actual_st_type;
906e58ca 3074
da5938a2 3075 /* We don't know the actual type of destination in case it is of
8029a119 3076 type STT_SECTION: give up. */
da5938a2
NC		 3077 if (st_type == STT_SECTION)
3078 return stub_type;
3079
906e58ca 3080 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3081 if (globals == NULL)
3082 return stub_type;
906e58ca
NC		 3083
3084 thumb_only = using_thumb_only (globals);
3085
3086 thumb2 = using_thumb2 (globals);
3087
3088 /* Determine where the call point is. */
3089 location = (input_sec->output_offset
3090 + input_sec->output_section->vma
3091 + rel->r_offset);
3092
906e58ca
NC		 3093 r_type = ELF32_R_TYPE (rel->r_info);
3094
5fa9e92f 3095 /* Keep a simpler condition, for the sake of clarity. */
fe33d2fa
CL		 3096 if (globals->splt != NULL
3097 && hash != NULL
3098 && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3099 {
3100 use_plt = 1;
fe33d2fa 3101
5fa9e92f
CL		 3102 /* Note when dealing with PLT entries: the main PLT stub is in
3103 ARM mode, so if the branch is in Thumb mode, another
3104 Thumb->ARM stub will be inserted later just before the ARM
3105 PLT stub. We don't take this extra distance into account
3106 here, because if a long branch stub is needed, we'll add a
3107 Thumb->Arm one and branch directly to the ARM PLT entry
3108 because it avoids spreading offset corrections in several
3109 places. */
fe33d2fa
CL		 3110
3111 destination = (globals->splt->output_section->vma
3112 + globals->splt->output_offset
3113 + hash->root.plt.offset);
3114 st_type = STT_FUNC;
5fa9e92f 3115 }
906e58ca 3116
fe33d2fa
CL		 3117 branch_offset = (bfd_signed_vma)(destination - location);
3118
155d87d7 3119 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3120 {
5fa9e92f
CL		 3121 /* Handle cases where:
3122 - this call goes too far (different Thumb/Thumb2 max
3123 distance)
155d87d7
CL		 3124 - it's a Thumb->Arm call and blx is not available, or it's a
3125 Thumb->Arm branch (not bl). A stub is needed in this case,
3126 but only if this call is not through a PLT entry. Indeed,
3127 PLT stubs handle mode switching already.
5fa9e92f 3128 */
906e58ca
NC		 3129 if ((!thumb2
3130 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3131 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3132 || (thumb2
3133 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3134 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3135 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3136 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3137 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3138 && !use_plt))
906e58ca
NC		 3139 {
3140 if (st_type == STT_ARM_TFUNC)
3141 {
3142 /* Thumb to thumb. */
3143 if (!thumb_only)
3144 {
3145 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3146 /* PIC stubs. */
155d87d7
CL		 3147 ? ((globals->use_blx
3148 && (r_type ==R_ARM_THM_CALL))
3149 /* V5T and above. Stub starts with ARM code, so
3150 we must be able to switch mode before
3151 reaching it, which is only possible for 'bl'
3152 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3153 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3154 /* On V4T, use Thumb code only. */
d3626fb0 3155 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3156
3157 /* non-PIC stubs. */
155d87d7
CL		 3158 : ((globals->use_blx
3159 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3160 /* V5T and above. */
3161 ? arm_stub_long_branch_any_any
3162 /* V4T. */
d3626fb0 3163 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3164 }
3165 else
3166 {
3167 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3168 /* PIC stub. */
3169 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3170 /* non-PIC stub. */
3171 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3172 }
3173 }
3174 else
3175 {
3176 /* Thumb to arm. */
c820be07
NC		 3177 if (sym_sec != NULL
3178 && sym_sec->owner != NULL
3179 && !INTERWORK_FLAG (sym_sec->owner))
3180 {
3181 (*_bfd_error_handler)
3182 (_("%B(%s): warning: interworking not enabled.\n"
3183 " first occurrence: %B: Thumb call to ARM"),
3184 sym_sec->owner, input_bfd, name);
3185 }
3186
906e58ca 3187 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3188 /* PIC stubs. */
155d87d7
CL		 3189 ? ((globals->use_blx
3190 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3191 /* V5T and above. */
cf3eccff 3192 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3193 /* V4T PIC stub. */
3194 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3195
3196 /* non-PIC stubs. */
155d87d7
CL		 3197 : ((globals->use_blx
3198 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3199 /* V5T and above. */
3200 ? arm_stub_long_branch_any_any
3201 /* V4T. */
3202 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3203
3204 /* Handle v4t short branches. */
fea2b4d6 3205 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3206 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3207 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3208 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3209 }
3210 }
3211 }
fe33d2fa
CL		 3212 else if (r_type == R_ARM_CALL
3213 || r_type == R_ARM_JUMP24
3214 || r_type == R_ARM_PLT32)
906e58ca
NC		 3215 {
3216 if (st_type == STT_ARM_TFUNC)
3217 {
3218 /* Arm to thumb. */
c820be07
NC		 3219
3220 if (sym_sec != NULL
3221 && sym_sec->owner != NULL
3222 && !INTERWORK_FLAG (sym_sec->owner))
3223 {
3224 (*_bfd_error_handler)
3225 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3226 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3227 sym_sec->owner, input_bfd, name);
3228 }
3229
3230 /* We have an extra 2-bytes reach because of
3231 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3232 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3233 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3234 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3235 || (r_type == R_ARM_JUMP24)
3236 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3237 {
3238 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3239 /* PIC stubs. */
ebe24dd4
CL		 3240 ? ((globals->use_blx)
3241 /* V5T and above. */
3242 ? arm_stub_long_branch_any_thumb_pic
3243 /* V4T stub. */
3244 : arm_stub_long_branch_v4t_arm_thumb_pic)
3245
c2b4a39d
CL		 3246 /* non-PIC stubs. */
3247 : ((globals->use_blx)
3248 /* V5T and above. */
3249 ? arm_stub_long_branch_any_any
3250 /* V4T. */
3251 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3252 }
3253 }
3254 else
3255 {
3256 /* Arm to arm. */
3257 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3258 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3259 {
3260 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3261 /* PIC stubs. */
cf3eccff 3262 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3263 /* non-PIC stubs. */
fea2b4d6 3264 : arm_stub_long_branch_any_any;
906e58ca
NC		 3265 }
3266 }
3267 }
3268
fe33d2fa
CL		 3269 /* If a stub is needed, record the actual destination type. */
3270 if (stub_type != arm_stub_none)
3271 {
3272 *actual_st_type = st_type;
3273 }
3274
906e58ca
NC		 3275 return stub_type;
3276}
3277
3278/* Build a name for an entry in the stub hash table. */
3279
3280static char *
3281elf32_arm_stub_name (const asection *input_section,
3282 const asection *sym_sec,
3283 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3284 const Elf_Internal_Rela *rel,
3285 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3286{
3287 char *stub_name;
3288 bfd_size_type len;
3289
3290 if (hash)
3291 {
fe33d2fa 3292 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3293 stub_name = (char *) bfd_malloc (len);
906e58ca 3294 if (stub_name != NULL)
fe33d2fa 3295 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3296 input_section->id & 0xffffffff,
3297 hash->root.root.root.string,
fe33d2fa
CL		 3298 (int) rel->r_addend & 0xffffffff,
3299 (int) stub_type);
906e58ca
NC		 3300 }
3301 else
3302 {
fe33d2fa 3303 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3304 stub_name = (char *) bfd_malloc (len);
906e58ca 3305 if (stub_name != NULL)
fe33d2fa 3306 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3307 input_section->id & 0xffffffff,
3308 sym_sec->id & 0xffffffff,
3309 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3310 (int) rel->r_addend & 0xffffffff,
3311 (int) stub_type);
906e58ca
NC		 3312 }
3313
3314 return stub_name;
3315}
3316
3317/* Look up an entry in the stub hash. Stub entries are cached because
3318 creating the stub name takes a bit of time. */
3319
3320static struct elf32_arm_stub_hash_entry *
3321elf32_arm_get_stub_entry (const asection *input_section,
3322 const asection *sym_sec,
3323 struct elf_link_hash_entry *hash,
3324 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3325 struct elf32_arm_link_hash_table *htab,
3326 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3327{
3328 struct elf32_arm_stub_hash_entry *stub_entry;
3329 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3330 const asection *id_sec;
3331
3332 if ((input_section->flags & SEC_CODE) == 0)
3333 return NULL;
3334
3335 /* If this input section is part of a group of sections sharing one
3336 stub section, then use the id of the first section in the group.
3337 Stub names need to include a section id, as there may well be
3338 more than one stub used to reach say, printf, and we need to
3339 distinguish between them. */
3340 id_sec = htab->stub_group[input_section->id].link_sec;
3341
3342 if (h != NULL && h->stub_cache != NULL
3343 && h->stub_cache->h == h
fe33d2fa
CL		 3344 && h->stub_cache->id_sec == id_sec
3345 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3346 {
3347 stub_entry = h->stub_cache;
3348 }
3349 else
3350 {
3351 char *stub_name;
3352
fe33d2fa 3353 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3354 if (stub_name == NULL)
3355 return NULL;
3356
3357 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3358 stub_name, FALSE, FALSE);
3359 if (h != NULL)
3360 h->stub_cache = stub_entry;
3361
3362 free (stub_name);
3363 }
3364
3365 return stub_entry;
3366}
3367
48229727
JB		 3368/* Find or create a stub section. Returns a pointer to the stub section, and
3369 the section to which the stub section will be attached (in *LINK_SEC_P).
3370 LINK_SEC_P may be NULL. */
906e58ca 3371
48229727
JB		 3372static asection *
3373elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3374 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3375{
3376 asection *link_sec;
3377 asection *stub_sec;
906e58ca
NC		 3378
3379 link_sec = htab->stub_group[section->id].link_sec;
3380 stub_sec = htab->stub_group[section->id].stub_sec;
3381 if (stub_sec == NULL)
3382 {
3383 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3384 if (stub_sec == NULL)
3385 {
3386 size_t namelen;
3387 bfd_size_type len;
3388 char *s_name;
3389
3390 namelen = strlen (link_sec->name);
3391 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3392 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3393 if (s_name == NULL)
3394 return NULL;
3395
3396 memcpy (s_name, link_sec->name, namelen);
3397 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3398 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3399 if (stub_sec == NULL)
3400 return NULL;
3401 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3402 }
3403 htab->stub_group[section->id].stub_sec = stub_sec;
3404 }
48229727
JB		 3405
3406 if (link_sec_p)
3407 *link_sec_p = link_sec;
3408
3409 return stub_sec;
3410}
3411
3412/* Add a new stub entry to the stub hash. Not all fields of the new
3413 stub entry are initialised. */
3414
3415static struct elf32_arm_stub_hash_entry *
3416elf32_arm_add_stub (const char *stub_name,
3417 asection *section,
3418 struct elf32_arm_link_hash_table *htab)
3419{
3420 asection *link_sec;
3421 asection *stub_sec;
3422 struct elf32_arm_stub_hash_entry *stub_entry;
3423
3424 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3425 if (stub_sec == NULL)
3426 return NULL;
906e58ca
NC		 3427
3428 /* Enter this entry into the linker stub hash table. */
3429 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3430 TRUE, FALSE);
3431 if (stub_entry == NULL)
3432 {
3433 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3434 section->owner,
3435 stub_name);
3436 return NULL;
3437 }
3438
3439 stub_entry->stub_sec = stub_sec;
3440 stub_entry->stub_offset = 0;
3441 stub_entry->id_sec = link_sec;
3442
906e58ca
NC		 3443 return stub_entry;
3444}
3445
3446/* Store an Arm insn into an output section not processed by
3447 elf32_arm_write_section. */
3448
3449static void
8029a119
NC		 3450put_arm_insn (struct elf32_arm_link_hash_table * htab,
3451 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3452{
3453 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3454 bfd_putl32 (val, ptr);
3455 else
3456 bfd_putb32 (val, ptr);
3457}
3458
3459/* Store a 16-bit Thumb insn into an output section not processed by
3460 elf32_arm_write_section. */
3461
3462static void
8029a119
NC		 3463put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3464 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3465{
3466 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3467 bfd_putl16 (val, ptr);
3468 else
3469 bfd_putb16 (val, ptr);
3470}
3471
48229727
JB		 3472static bfd_reloc_status_type elf32_arm_final_link_relocate
3473 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3474 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3475 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3476
906e58ca
NC		 3477static bfd_boolean
3478arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3479 void * in_arg)
3480{
48229727 3481#define MAXRELOCS 2
906e58ca 3482 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3483 struct elf32_arm_link_hash_table *globals;
906e58ca 3484 struct bfd_link_info *info;
906e58ca
NC		 3485 asection *stub_sec;
3486 bfd *stub_bfd;
3487 bfd_vma stub_addr;
3488 bfd_byte *loc;
3489 bfd_vma sym_value;
3490 int template_size;
3491 int size;
d3ce72d0 3492 const insn_sequence *template_sequence;
906e58ca 3493 int i;
48229727
JB		 3494 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3495 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3496 int nrelocs = 0;
906e58ca
NC		 3497
3498 /* Massage our args to the form they really have. */
3499 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3500 info = (struct bfd_link_info *) in_arg;
3501
3502 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3503 if (globals == NULL)
3504 return FALSE;
906e58ca 3505
906e58ca
NC		 3506 stub_sec = stub_entry->stub_sec;
3507
4dfe6ac6 3508 if ((globals->fix_cortex_a8 < 0)
eb7c4339
NS		 3509 != (stub_entry->stub_type >= arm_stub_a8_veneer_lwm))
3510 /* We have to do the a8 fixes last, as they are less aligned than
3511 the other veneers. */
3512 return TRUE;
fe33d2fa 3513
906e58ca
NC		 3514 /* Make a note of the offset within the stubs for this entry. */
3515 stub_entry->stub_offset = stub_sec->size;
3516 loc = stub_sec->contents + stub_entry->stub_offset;
3517
3518 stub_bfd = stub_sec->owner;
3519
3520 /* This is the address of the start of the stub. */
3521 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3522 + stub_entry->stub_offset;
3523
3524 /* This is the address of the stub destination. */
3525 sym_value = (stub_entry->target_value
3526 + stub_entry->target_section->output_offset
3527 + stub_entry->target_section->output_section->vma);
3528
d3ce72d0 3529 template_sequence = stub_entry->stub_template;
461a49ca 3530 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3531
3532 size = 0;
461a49ca 3533 for (i = 0; i < template_size; i++)
906e58ca 3534 {
d3ce72d0 3535 switch (template_sequence[i].type)
461a49ca
DJ		 3536 {
3537 case THUMB16_TYPE:
48229727 3538 {
d3ce72d0
NC		 3539 bfd_vma data = (bfd_vma) template_sequence[i].data;
3540 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 3541 {
3542 /* We've borrowed the reloc_addend field to mean we should
3543 insert a condition code into this (Thumb-1 branch)
3544 instruction. See THUMB16_BCOND_INSN. */
3545 BFD_ASSERT ((data & 0xff00) == 0xd000);
3546 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3547 }
fe33d2fa 3548 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 3549 size += 2;
3550 }
461a49ca 3551 break;
906e58ca 3552
48229727 3553 case THUMB32_TYPE:
fe33d2fa
CL		 3554 bfd_put_16 (stub_bfd,
3555 (template_sequence[i].data >> 16) & 0xffff,
3556 loc + size);
3557 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
3558 loc + size + 2);
d3ce72d0 3559 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 3560 {
3561 stub_reloc_idx[nrelocs] = i;
3562 stub_reloc_offset[nrelocs++] = size;
3563 }
3564 size += 4;
3565 break;
3566
461a49ca 3567 case ARM_TYPE:
fe33d2fa
CL		 3568 bfd_put_32 (stub_bfd, template_sequence[i].data,
3569 loc + size);
461a49ca
DJ		 3570 /* Handle cases where the target is encoded within the
3571 instruction. */
d3ce72d0 3572 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 3573 {
48229727
JB		 3574 stub_reloc_idx[nrelocs] = i;
3575 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3576 }
3577 size += 4;
3578 break;
3579
3580 case DATA_TYPE:
d3ce72d0 3581 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 3582 stub_reloc_idx[nrelocs] = i;
3583 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3584 size += 4;
3585 break;
3586
3587 default:
3588 BFD_FAIL ();
3589 return FALSE;
3590 }
906e58ca 3591 }
461a49ca 3592
906e58ca
NC		 3593 stub_sec->size += size;
3594
461a49ca
DJ		 3595 /* Stub size has already been computed in arm_size_one_stub. Check
3596 consistency. */
3597 BFD_ASSERT (size == stub_entry->stub_size);
3598
906e58ca
NC		 3599 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3600 if (stub_entry->st_type == STT_ARM_TFUNC)
3601 sym_value |= 1;
3602
48229727
JB		 3603 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3604 in each stub. */
3605 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3606
48229727 3607 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 3608 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3609 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3610 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3611 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 3612 {
3613 Elf_Internal_Rela rel;
3614 bfd_boolean unresolved_reloc;
3615 char *error_message;
3616 int sym_flags
d3ce72d0 3617 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
48229727
JB		 3618 ? STT_ARM_TFUNC : 0;
3619 bfd_vma points_to = sym_value + stub_entry->target_addend;
3620
3621 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 3622 rel.r_info = ELF32_R_INFO (0,
3623 template_sequence[stub_reloc_idx[i]].r_type);
3624 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 3625
3626 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3627 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3628 template should refer back to the instruction after the original
3629 branch. */
3630 points_to = sym_value;
3631
33c6a8fc
JB		 3632 /* There may be unintended consequences if this is not true. */
3633 BFD_ASSERT (stub_entry->h == NULL);
3634
48229727
JB		 3635 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3636 properly. We should probably use this function unconditionally,
3637 rather than only for certain relocations listed in the enclosing
3638 conditional, for the sake of consistency. */
3639 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3640 (template_sequence[stub_reloc_idx[i]].r_type),
48229727
JB		 3641 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3642 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3643 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3644 &error_message);
3645 }
3646 else
3647 {
fe33d2fa
CL		 3648 Elf_Internal_Rela rel;
3649 bfd_boolean unresolved_reloc;
3650 char *error_message;
3651 bfd_vma points_to = sym_value + stub_entry->target_addend
3652 + template_sequence[stub_reloc_idx[i]].reloc_addend;
3653
3654 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3655 rel.r_info = ELF32_R_INFO (0,
3656 template_sequence[stub_reloc_idx[i]].r_type);
3657 rel.r_addend = 0;
3658
3659 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3660 (template_sequence[stub_reloc_idx[i]].r_type),
3661 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3662 points_to, info, stub_entry->target_section, "", stub_entry->st_type,
3663 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3664 &error_message);
48229727 3665 }
906e58ca
NC		 3666
3667 return TRUE;
48229727 3668#undef MAXRELOCS
906e58ca
NC		 3669}
3670
48229727
JB		 3671/* Calculate the template, template size and instruction size for a stub.
3672 Return value is the instruction size. */
906e58ca 3673
48229727
JB		 3674static unsigned int
3675find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3676 const insn_sequence **stub_template,
3677 int *stub_template_size)
906e58ca 3678{
d3ce72d0 3679 const insn_sequence *template_sequence = NULL;
48229727
JB		 3680 int template_size = 0, i;
3681 unsigned int size;
906e58ca 3682
d3ce72d0 3683 template_sequence = stub_definitions[stub_type].template_sequence;
48229727 3684 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3685
3686 size = 0;
461a49ca
DJ		 3687 for (i = 0; i < template_size; i++)
3688 {
d3ce72d0 3689 switch (template_sequence[i].type)
461a49ca
DJ		 3690 {
3691 case THUMB16_TYPE:
3692 size += 2;
3693 break;
3694
3695 case ARM_TYPE:
48229727 3696 case THUMB32_TYPE:
461a49ca
DJ		 3697 case DATA_TYPE:
3698 size += 4;
3699 break;
3700
3701 default:
3702 BFD_FAIL ();
3703 return FALSE;
3704 }
3705 }
3706
48229727 3707 if (stub_template)
d3ce72d0 3708 *stub_template = template_sequence;
48229727
JB		 3709
3710 if (stub_template_size)
3711 *stub_template_size = template_size;
3712
3713 return size;
3714}
3715
3716/* As above, but don't actually build the stub. Just bump offset so
3717 we know stub section sizes. */
3718
3719static bfd_boolean
3720arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3721 void * in_arg)
3722{
3723 struct elf32_arm_stub_hash_entry *stub_entry;
3724 struct elf32_arm_link_hash_table *htab;
d3ce72d0 3725 const insn_sequence *template_sequence;
48229727
JB		 3726 int template_size, size;
3727
3728 /* Massage our args to the form they really have. */
3729 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3730 htab = (struct elf32_arm_link_hash_table *) in_arg;
3731
3732 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3733 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3734
d3ce72d0 3735 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 3736 &template_size);
3737
461a49ca 3738 stub_entry->stub_size = size;
d3ce72d0 3739 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 3740 stub_entry->stub_template_size = template_size;
3741
906e58ca
NC		 3742 size = (size + 7) & ~7;
3743 stub_entry->stub_sec->size += size;
461a49ca 3744
906e58ca
NC		 3745 return TRUE;
3746}
3747
3748/* External entry points for sizing and building linker stubs. */
3749
3750/* Set up various things so that we can make a list of input sections
3751 for each output section included in the link. Returns -1 on error,
3752 0 when no stubs will be needed, and 1 on success. */
3753
3754int
3755elf32_arm_setup_section_lists (bfd *output_bfd,
3756 struct bfd_link_info *info)
3757{
3758 bfd *input_bfd;
3759 unsigned int bfd_count;
3760 int top_id, top_index;
3761 asection *section;
3762 asection **input_list, **list;
3763 bfd_size_type amt;
3764 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3765
4dfe6ac6
NC		 3766 if (htab == NULL)
3767 return 0;
906e58ca
NC		 3768 if (! is_elf_hash_table (htab))
3769 return 0;
3770
3771 /* Count the number of input BFDs and find the top input section id. */
3772 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3773 input_bfd != NULL;
3774 input_bfd = input_bfd->link_next)
3775 {
3776 bfd_count += 1;
3777 for (section = input_bfd->sections;
3778 section != NULL;
3779 section = section->next)
3780 {
3781 if (top_id < section->id)
3782 top_id = section->id;
3783 }
3784 }
3785 htab->bfd_count = bfd_count;
3786
3787 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 3788 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 3789 if (htab->stub_group == NULL)
3790 return -1;
fe33d2fa 3791 htab->top_id = top_id;
906e58ca
NC		 3792
3793 /* We can't use output_bfd->section_count here to find the top output
3794 section index as some sections may have been removed, and
3795 _bfd_strip_section_from_output doesn't renumber the indices. */
3796 for (section = output_bfd->sections, top_index = 0;
3797 section != NULL;
3798 section = section->next)
3799 {
3800 if (top_index < section->index)
3801 top_index = section->index;
3802 }
3803
3804 htab->top_index = top_index;
3805 amt = sizeof (asection *) * (top_index + 1);
21d799b5 3806 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 3807 htab->input_list = input_list;
3808 if (input_list == NULL)
3809 return -1;
3810
3811 /* For sections we aren't interested in, mark their entries with a
3812 value we can check later. */
3813 list = input_list + top_index;
3814 do
3815 *list = bfd_abs_section_ptr;
3816 while (list-- != input_list);
3817
3818 for (section = output_bfd->sections;
3819 section != NULL;
3820 section = section->next)
3821 {
3822 if ((section->flags & SEC_CODE) != 0)
3823 input_list[section->index] = NULL;
3824 }
3825
3826 return 1;
3827}
3828
3829/* The linker repeatedly calls this function for each input section,
3830 in the order that input sections are linked into output sections.
3831 Build lists of input sections to determine groupings between which
3832 we may insert linker stubs. */
3833
3834void
3835elf32_arm_next_input_section (struct bfd_link_info *info,
3836 asection *isec)
3837{
3838 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3839
4dfe6ac6
NC		 3840 if (htab == NULL)
3841 return;
3842
906e58ca
NC		 3843 if (isec->output_section->index <= htab->top_index)
3844 {
3845 asection **list = htab->input_list + isec->output_section->index;
3846
a7470592 3847 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 3848 {
3849 /* Steal the link_sec pointer for our list. */
3850#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3851 /* This happens to make the list in reverse order,
07d72278 3852 which we reverse later. */
906e58ca
NC		 3853 PREV_SEC (isec) = *list;
3854 *list = isec;
3855 }
3856 }
3857}
3858
3859/* See whether we can group stub sections together. Grouping stub
3860 sections may result in fewer stubs. More importantly, we need to
07d72278 3861 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3862 .fini output sections respectively, because glibc splits the
3863 _init and _fini functions into multiple parts. Putting a stub in
3864 the middle of a function is not a good idea. */
3865
3866static void
3867group_sections (struct elf32_arm_link_hash_table *htab,
3868 bfd_size_type stub_group_size,
07d72278 3869 bfd_boolean stubs_always_after_branch)
906e58ca 3870{
07d72278 3871 asection **list = htab->input_list;
906e58ca
NC		 3872
3873 do
3874 {
3875 asection *tail = *list;
07d72278 3876 asection *head;
906e58ca
NC		 3877
3878 if (tail == bfd_abs_section_ptr)
3879 continue;
3880
07d72278
DJ		 3881 /* Reverse the list: we must avoid placing stubs at the
3882 beginning of the section because the beginning of the text
3883 section may be required for an interrupt vector in bare metal
3884 code. */
3885#define NEXT_SEC PREV_SEC
e780aef2
CL		 3886 head = NULL;
3887 while (tail != NULL)
3888 {
3889 /* Pop from tail. */
3890 asection *item = tail;
3891 tail = PREV_SEC (item);
3892
3893 /* Push on head. */
3894 NEXT_SEC (item) = head;
3895 head = item;
3896 }
07d72278
DJ		 3897
3898 while (head != NULL)
906e58ca
NC		 3899 {
3900 asection *curr;
07d72278 3901 asection *next;
e780aef2
CL		 3902 bfd_vma stub_group_start = head->output_offset;
3903 bfd_vma end_of_next;
906e58ca 3904
07d72278 3905 curr = head;
e780aef2 3906 while (NEXT_SEC (curr) != NULL)
8cd931b7 3907 {
e780aef2
CL		 3908 next = NEXT_SEC (curr);
3909 end_of_next = next->output_offset + next->size;
3910 if (end_of_next - stub_group_start >= stub_group_size)
3911 /* End of NEXT is too far from start, so stop. */
8cd931b7 3912 break;
e780aef2
CL		 3913 /* Add NEXT to the group. */
3914 curr = next;
8cd931b7 3915 }
906e58ca 3916
07d72278 3917 /* OK, the size from the start to the start of CURR is less
906e58ca 3918 than stub_group_size and thus can be handled by one stub
07d72278 3919 section. (Or the head section is itself larger than
906e58ca
NC		 3920 stub_group_size, in which case we may be toast.)
3921 We should really be keeping track of the total size of
3922 stubs added here, as stubs contribute to the final output
7fb9f789 3923 section size. */
906e58ca
NC		 3924 do
3925 {
07d72278 3926 next = NEXT_SEC (head);
906e58ca 3927 /* Set up this stub group. */
07d72278 3928 htab->stub_group[head->id].link_sec = curr;
906e58ca 3929 }
07d72278 3930 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3931
3932 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3933 bytes after the stub section can be handled by it too. */
3934 if (!stubs_always_after_branch)
906e58ca 3935 {
e780aef2
CL		 3936 stub_group_start = curr->output_offset + curr->size;
3937
8cd931b7 3938 while (next != NULL)
906e58ca 3939 {
e780aef2
CL		 3940 end_of_next = next->output_offset + next->size;
3941 if (end_of_next - stub_group_start >= stub_group_size)
3942 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3943 break;
e780aef2 3944 /* Add NEXT to the stub group. */
07d72278
DJ		 3945 head = next;
3946 next = NEXT_SEC (head);
3947 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3948 }
3949 }
07d72278 3950 head = next;
906e58ca
NC		 3951 }
3952 }
07d72278 3953 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3954
3955 free (htab->input_list);
3956#undef PREV_SEC
07d72278 3957#undef NEXT_SEC
906e58ca
NC		 3958}
3959
48229727
JB		 3960/* Comparison function for sorting/searching relocations relating to Cortex-A8
3961 erratum fix. */
3962
3963static int
3964a8_reloc_compare (const void *a, const void *b)
3965{
21d799b5
NC		 3966 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
3967 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 3968
3969 if (ra->from < rb->from)
3970 return -1;
3971 else if (ra->from > rb->from)
3972 return 1;
3973 else
3974 return 0;
3975}
3976
3977static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3978 const char *, char **);
3979
3980/* Helper function to scan code for sequences which might trigger the Cortex-A8
3981 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3982 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3983 otherwise. */
3984
81694485
NC		 3985static bfd_boolean
3986cortex_a8_erratum_scan (bfd *input_bfd,
3987 struct bfd_link_info *info,
48229727
JB		 3988 struct a8_erratum_fix **a8_fixes_p,
3989 unsigned int *num_a8_fixes_p,
3990 unsigned int *a8_fix_table_size_p,
3991 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 3992 unsigned int num_a8_relocs,
3993 unsigned prev_num_a8_fixes,
3994 bfd_boolean *stub_changed_p)
48229727
JB		 3995{
3996 asection *section;
3997 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3998 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3999 unsigned int num_a8_fixes = *num_a8_fixes_p;
4000 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4001
4dfe6ac6
NC		 4002 if (htab == NULL)
4003 return FALSE;
4004
48229727
JB		 4005 for (section = input_bfd->sections;
4006 section != NULL;
4007 section = section->next)
4008 {
4009 bfd_byte *contents = NULL;
4010 struct _arm_elf_section_data *sec_data;
4011 unsigned int span;
4012 bfd_vma base_vma;
4013
4014 if (elf_section_type (section) != SHT_PROGBITS
4015 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4016 || (section->flags & SEC_EXCLUDE) != 0
4017 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4018 || (section->output_section == bfd_abs_section_ptr))
4019 continue;
4020
4021 base_vma = section->output_section->vma + section->output_offset;
4022
4023 if (elf_section_data (section)->this_hdr.contents != NULL)
4024 contents = elf_section_data (section)->this_hdr.contents;
4025 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4026 return TRUE;
48229727
JB		 4027
4028 sec_data = elf32_arm_section_data (section);
4029
4030 for (span = 0; span < sec_data->mapcount; span++)
4031 {
4032 unsigned int span_start = sec_data->map[span].vma;
4033 unsigned int span_end = (span == sec_data->mapcount - 1)
4034 ? section->size : sec_data->map[span + 1].vma;
4035 unsigned int i;
4036 char span_type = sec_data->map[span].type;
4037 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4038
4039 if (span_type != 't')
4040 continue;
4041
4042 /* Span is entirely within a single 4KB region: skip scanning. */
4043 if (((base_vma + span_start) & ~0xfff)
4044 == ((base_vma + span_end) & ~0xfff))
4045 continue;
4046
4047 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4048
4049 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4050 * The branch target is in the same 4KB region as the
4051 first half of the branch.
4052 * The instruction before the branch is a 32-bit
81694485 4053 length non-branch instruction. */
48229727
JB		 4054 for (i = span_start; i < span_end;)
4055 {
4056 unsigned int insn = bfd_getl16 (&contents[i]);
4057 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4058 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4059
4060 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4061 insn_32bit = TRUE;
4062
4063 if (insn_32bit)
4064 {
4065 /* Load the rest of the insn (in manual-friendly order). */
4066 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4067
4068 /* Encoding T4: B<c>.W. */
4069 is_b = (insn & 0xf800d000) == 0xf0009000;
4070 /* Encoding T1: BL<c>.W. */
4071 is_bl = (insn & 0xf800d000) == 0xf000d000;
4072 /* Encoding T2: BLX<c>.W. */
4073 is_blx = (insn & 0xf800d000) == 0xf000c000;
4074 /* Encoding T3: B<c>.W (not permitted in IT block). */
4075 is_bcc = (insn & 0xf800d000) == 0xf0008000
4076 && (insn & 0x07f00000) != 0x03800000;
4077 }
4078
4079 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4080
81694485
NC		 4081 if (((base_vma + i) & 0xfff) == 0xffe
4082 && insn_32bit
4083 && is_32bit_branch
4084 && last_was_32bit
4085 && ! last_was_branch)
48229727 4086 {
8f73510c 4087 bfd_signed_vma offset = 0;
48229727
JB		 4088 bfd_boolean force_target_arm = FALSE;
4089 bfd_boolean force_target_thumb = FALSE;
4090 bfd_vma target;
4091 enum elf32_arm_stub_type stub_type = arm_stub_none;
4092 struct a8_erratum_reloc key, *found;
4093
4094 key.from = base_vma + i;
21d799b5
NC		 4095 found = (struct a8_erratum_reloc *)
4096 bsearch (&key, a8_relocs, num_a8_relocs,
4097 sizeof (struct a8_erratum_reloc),
4098 &a8_reloc_compare);
48229727
JB		 4099
4100 if (found)
4101 {
4102 char *error_message = NULL;
4103 struct elf_link_hash_entry *entry;
4104
4105 /* We don't care about the error returned from this
4106 function, only if there is glue or not. */
4107 entry = find_thumb_glue (info, found->sym_name,
4108 &error_message);
4109
4110 if (entry)
4111 found->non_a8_stub = TRUE;
4112
4113 if (found->r_type == R_ARM_THM_CALL
4114 && found->st_type != STT_ARM_TFUNC)
4115 force_target_arm = TRUE;
4116 else if (found->r_type == R_ARM_THM_CALL
4117 && found->st_type == STT_ARM_TFUNC)
4118 force_target_thumb = TRUE;
4119 }
4120
4121 /* Check if we have an offending branch instruction. */
4122
4123 if (found && found->non_a8_stub)
4124 /* We've already made a stub for this instruction, e.g.
4125 it's a long branch or a Thumb->ARM stub. Assume that
4126 stub will suffice to work around the A8 erratum (see
4127 setting of always_after_branch above). */
4128 ;
4129 else if (is_bcc)
4130 {
4131 offset = (insn & 0x7ff) << 1;
4132 offset |= (insn & 0x3f0000) >> 4;
4133 offset |= (insn & 0x2000) ? 0x40000 : 0;
4134 offset |= (insn & 0x800) ? 0x80000 : 0;
4135 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4136 if (offset & 0x100000)
81694485 4137 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4138 stub_type = arm_stub_a8_veneer_b_cond;
4139 }
4140 else if (is_b || is_bl || is_blx)
4141 {
4142 int s = (insn & 0x4000000) != 0;
4143 int j1 = (insn & 0x2000) != 0;
4144 int j2 = (insn & 0x800) != 0;
4145 int i1 = !(j1 ^ s);
4146 int i2 = !(j2 ^ s);
4147
4148 offset = (insn & 0x7ff) << 1;
4149 offset |= (insn & 0x3ff0000) >> 4;
4150 offset |= i2 << 22;
4151 offset |= i1 << 23;
4152 offset |= s << 24;
4153 if (offset & 0x1000000)
81694485 4154 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4155
4156 if (is_blx)
81694485 4157 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4158
4159 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4160 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4161 }
4162
4163 if (stub_type != arm_stub_none)
4164 {
4165 bfd_vma pc_for_insn = base_vma + i + 4;
4166
4167 /* The original instruction is a BL, but the target is
4168 an ARM instruction. If we were not making a stub,
4169 the BL would have been converted to a BLX. Use the
4170 BLX stub instead in that case. */
4171 if (htab->use_blx && force_target_arm
4172 && stub_type == arm_stub_a8_veneer_bl)
4173 {
4174 stub_type = arm_stub_a8_veneer_blx;
4175 is_blx = TRUE;
4176 is_bl = FALSE;
4177 }
4178 /* Conversely, if the original instruction was
4179 BLX but the target is Thumb mode, use the BL
4180 stub. */
4181 else if (force_target_thumb
4182 && stub_type == arm_stub_a8_veneer_blx)
4183 {
4184 stub_type = arm_stub_a8_veneer_bl;
4185 is_blx = FALSE;
4186 is_bl = TRUE;
4187 }
4188
4189 if (is_blx)
81694485 4190 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4191
4192 /* If we found a relocation, use the proper destination,
4193 not the offset in the (unrelocated) instruction.
4194 Note this is always done if we switched the stub type
4195 above. */
4196 if (found)
81694485
NC		 4197 offset =
4198 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4199
4200 target = pc_for_insn + offset;
4201
4202 /* The BLX stub is ARM-mode code. Adjust the offset to
4203 take the different PC value (+8 instead of +4) into
4204 account. */
4205 if (stub_type == arm_stub_a8_veneer_blx)
4206 offset += 4;
4207
4208 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4209 {
eb7c4339 4210 char *stub_name = NULL;
48229727
JB		 4211
4212 if (num_a8_fixes == a8_fix_table_size)
4213 {
4214 a8_fix_table_size *= 2;
21d799b5
NC		 4215 a8_fixes = (struct a8_erratum_fix *)
4216 bfd_realloc (a8_fixes,
4217 sizeof (struct a8_erratum_fix)
4218 * a8_fix_table_size);
48229727
JB		 4219 }
4220
eb7c4339
NS		 4221 if (num_a8_fixes < prev_num_a8_fixes)
4222 {
4223 /* If we're doing a subsequent scan,
4224 check if we've found the same fix as
4225 before, and try and reuse the stub
4226 name. */
4227 stub_name = a8_fixes[num_a8_fixes].stub_name;
4228 if ((a8_fixes[num_a8_fixes].section != section)
4229 || (a8_fixes[num_a8_fixes].offset != i))
4230 {
4231 free (stub_name);
4232 stub_name = NULL;
4233 *stub_changed_p = TRUE;
4234 }
4235 }
4236
4237 if (!stub_name)
4238 {
21d799b5 4239 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4240 if (stub_name != NULL)
4241 sprintf (stub_name, "%x:%x", section->id, i);
4242 }
48229727
JB		 4243
4244 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4245 a8_fixes[num_a8_fixes].section = section;
4246 a8_fixes[num_a8_fixes].offset = i;
4247 a8_fixes[num_a8_fixes].addend = offset;
4248 a8_fixes[num_a8_fixes].orig_insn = insn;
4249 a8_fixes[num_a8_fixes].stub_name = stub_name;
4250 a8_fixes[num_a8_fixes].stub_type = stub_type;
fe33d2fa
CL		 4251 a8_fixes[num_a8_fixes].st_type =
4252 is_blx ? STT_FUNC : STT_ARM_TFUNC;
48229727
JB		 4253
4254 num_a8_fixes++;
4255 }
4256 }
4257 }
4258
4259 i += insn_32bit ? 4 : 2;
4260 last_was_32bit = insn_32bit;
4261 last_was_branch = is_32bit_branch;
4262 }
4263 }
4264
4265 if (elf_section_data (section)->this_hdr.contents == NULL)
4266 free (contents);
4267 }
fe33d2fa 4268
48229727
JB		 4269 *a8_fixes_p = a8_fixes;
4270 *num_a8_fixes_p = num_a8_fixes;
4271 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4272
81694485 4273 return FALSE;
48229727
JB		 4274}
4275
906e58ca
NC		 4276/* Determine and set the size of the stub section for a final link.
4277
4278 The basic idea here is to examine all the relocations looking for
4279 PC-relative calls to a target that is unreachable with a "bl"
4280 instruction. */
4281
4282bfd_boolean
4283elf32_arm_size_stubs (bfd *output_bfd,
4284 bfd *stub_bfd,
4285 struct bfd_link_info *info,
4286 bfd_signed_vma group_size,
4287 asection * (*add_stub_section) (const char *, asection *),
4288 void (*layout_sections_again) (void))
4289{
4290 bfd_size_type stub_group_size;
07d72278 4291 bfd_boolean stubs_always_after_branch;
906e58ca 4292 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4293 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4294 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4295 struct a8_erratum_reloc *a8_relocs = NULL;
4296 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4297
4dfe6ac6
NC		 4298 if (htab == NULL)
4299 return FALSE;
4300
48229727
JB		 4301 if (htab->fix_cortex_a8)
4302 {
21d799b5
NC		 4303 a8_fixes = (struct a8_erratum_fix *)
4304 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4305 a8_relocs = (struct a8_erratum_reloc *)
4306 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4307 }
906e58ca
NC		 4308
4309 /* Propagate mach to stub bfd, because it may not have been
4310 finalized when we created stub_bfd. */
4311 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4312 bfd_get_mach (output_bfd));
4313
4314 /* Stash our params away. */
4315 htab->stub_bfd = stub_bfd;
4316 htab->add_stub_section = add_stub_section;
4317 htab->layout_sections_again = layout_sections_again;
07d72278 4318 stubs_always_after_branch = group_size < 0;
48229727
JB		 4319
4320 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4321 as the first half of a 32-bit branch straddling two 4K pages. This is a
4322 crude way of enforcing that. */
4323 if (htab->fix_cortex_a8)
4324 stubs_always_after_branch = 1;
4325
906e58ca
NC		 4326 if (group_size < 0)
4327 stub_group_size = -group_size;
4328 else
4329 stub_group_size = group_size;
4330
4331 if (stub_group_size == 1)
4332 {
4333 /* Default values. */
4334 /* Thumb branch range is +-4MB has to be used as the default
4335 maximum size (a given section can contain both ARM and Thumb
4336 code, so the worst case has to be taken into account).
4337
4338 This value is 24K less than that, which allows for 2025
4339 12-byte stubs. If we exceed that, then we will fail to link.
4340 The user will have to relink with an explicit group size
4341 option. */
4342 stub_group_size = 4170000;
4343 }
4344
07d72278 4345 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4346
3ae046cc
NS		 4347 /* If we're applying the cortex A8 fix, we need to determine the
4348 program header size now, because we cannot change it later --
4349 that could alter section placements. Notice the A8 erratum fix
4350 ends up requiring the section addresses to remain unchanged
4351 modulo the page size. That's something we cannot represent
4352 inside BFD, and we don't want to force the section alignment to
4353 be the page size. */
4354 if (htab->fix_cortex_a8)
4355 (*htab->layout_sections_again) ();
4356
906e58ca
NC		 4357 while (1)
4358 {
4359 bfd *input_bfd;
4360 unsigned int bfd_indx;
4361 asection *stub_sec;
eb7c4339
NS		 4362 bfd_boolean stub_changed = FALSE;
4363 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4364
48229727 4365 num_a8_fixes = 0;
906e58ca
NC		 4366 for (input_bfd = info->input_bfds, bfd_indx = 0;
4367 input_bfd != NULL;
4368 input_bfd = input_bfd->link_next, bfd_indx++)
4369 {
4370 Elf_Internal_Shdr *symtab_hdr;
4371 asection *section;
4372 Elf_Internal_Sym *local_syms = NULL;
4373
48229727
JB		 4374 num_a8_relocs = 0;
4375
906e58ca
NC		 4376 /* We'll need the symbol table in a second. */
4377 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4378 if (symtab_hdr->sh_info == 0)
4379 continue;
4380
4381 /* Walk over each section attached to the input bfd. */
4382 for (section = input_bfd->sections;
4383 section != NULL;
4384 section = section->next)
4385 {
4386 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4387
4388 /* If there aren't any relocs, then there's nothing more
4389 to do. */
4390 if ((section->flags & SEC_RELOC) == 0
4391 || section->reloc_count == 0
4392 || (section->flags & SEC_CODE) == 0)
4393 continue;
4394
4395 /* If this section is a link-once section that will be
4396 discarded, then don't create any stubs. */
4397 if (section->output_section == NULL
4398 || section->output_section->owner != output_bfd)
4399 continue;
4400
4401 /* Get the relocs. */
4402 internal_relocs
4403 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4404 NULL, info->keep_memory);
4405 if (internal_relocs == NULL)
4406 goto error_ret_free_local;
4407
4408 /* Now examine each relocation. */
4409 irela = internal_relocs;
4410 irelaend = irela + section->reloc_count;
4411 for (; irela < irelaend; irela++)
4412 {
4413 unsigned int r_type, r_indx;
4414 enum elf32_arm_stub_type stub_type;
4415 struct elf32_arm_stub_hash_entry *stub_entry;
4416 asection *sym_sec;
4417 bfd_vma sym_value;
4418 bfd_vma destination;
4419 struct elf32_arm_link_hash_entry *hash;
7413f23f 4420 const char *sym_name;
906e58ca
NC		 4421 char *stub_name;
4422 const asection *id_sec;
fe33d2fa 4423 int st_type;
48229727 4424 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4425
4426 r_type = ELF32_R_TYPE (irela->r_info);
4427 r_indx = ELF32_R_SYM (irela->r_info);
4428
4429 if (r_type >= (unsigned int) R_ARM_max)
4430 {
4431 bfd_set_error (bfd_error_bad_value);
4432 error_ret_free_internal:
4433 if (elf_section_data (section)->relocs == NULL)
4434 free (internal_relocs);
4435 goto error_ret_free_local;
4436 }
4437
155d87d7 4438 /* Only look for stubs on branch instructions. */
906e58ca 4439 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4440 && (r_type != (unsigned int) R_ARM_THM_CALL)
4441 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4442 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4443 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4444 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4445 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4446 continue;
4447
4448 /* Now determine the call target, its name, value,
4449 section. */
4450 sym_sec = NULL;
4451 sym_value = 0;
4452 destination = 0;
4453 hash = NULL;
7413f23f 4454 sym_name = NULL;
906e58ca
NC		 4455 if (r_indx < symtab_hdr->sh_info)
4456 {
4457 /* It's a local symbol. */
4458 Elf_Internal_Sym *sym;
4459 Elf_Internal_Shdr *hdr;
4460
4461 if (local_syms == NULL)
4462 {
4463 local_syms
4464 = (Elf_Internal_Sym *) symtab_hdr->contents;
4465 if (local_syms == NULL)
4466 local_syms
4467 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4468 symtab_hdr->sh_info, 0,
4469 NULL, NULL, NULL);
4470 if (local_syms == NULL)
4471 goto error_ret_free_internal;
4472 }
4473
4474 sym = local_syms + r_indx;
4475 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4476 sym_sec = hdr->bfd_section;
ffcb4889
NS		 4477 if (!sym_sec)
4478 /* This is an undefined symbol. It can never
4479 be resolved. */
4480 continue;
fe33d2fa 4481
906e58ca
NC		 4482 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4483 sym_value = sym->st_value;
4484 destination = (sym_value + irela->r_addend
4485 + sym_sec->output_offset
4486 + sym_sec->output_section->vma);
4487 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4488 sym_name
4489 = bfd_elf_string_from_elf_section (input_bfd,
4490 symtab_hdr->sh_link,
4491 sym->st_name);
906e58ca
NC		 4492 }
4493 else
4494 {
4495 /* It's an external symbol. */
4496 int e_indx;
4497
4498 e_indx = r_indx - symtab_hdr->sh_info;
4499 hash = ((struct elf32_arm_link_hash_entry *)
4500 elf_sym_hashes (input_bfd)[e_indx]);
4501
4502 while (hash->root.root.type == bfd_link_hash_indirect
4503 || hash->root.root.type == bfd_link_hash_warning)
4504 hash = ((struct elf32_arm_link_hash_entry *)
4505 hash->root.root.u.i.link);
4506
4507 if (hash->root.root.type == bfd_link_hash_defined
4508 || hash->root.root.type == bfd_link_hash_defweak)
4509 {
4510 sym_sec = hash->root.root.u.def.section;
4511 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4512
4513 struct elf32_arm_link_hash_table *globals =
4514 elf32_arm_hash_table (info);
4515
4516 /* For a destination in a shared library,
4517 use the PLT stub as target address to
4518 decide whether a branch stub is
4519 needed. */
4dfe6ac6
NC		 4520 if (globals != NULL
4521 && globals->splt != NULL
4522 && hash != NULL
022f8312
CL		 4523 && hash->root.plt.offset != (bfd_vma) -1)
4524 {
4525 sym_sec = globals->splt;
4526 sym_value = hash->root.plt.offset;
4527 if (sym_sec->output_section != NULL)
4528 destination = (sym_value
4529 + sym_sec->output_offset
4530 + sym_sec->output_section->vma);
4531 }
4532 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4533 destination = (sym_value + irela->r_addend
4534 + sym_sec->output_offset
4535 + sym_sec->output_section->vma);
4536 }
69c5861e
CL		 4537 else if ((hash->root.root.type == bfd_link_hash_undefined)
4538 || (hash->root.root.type == bfd_link_hash_undefweak))
4539 {
4540 /* For a shared library, use the PLT stub as
4541 target address to decide whether a long
4542 branch stub is needed.
4543 For absolute code, they cannot be handled. */
4544 struct elf32_arm_link_hash_table *globals =
4545 elf32_arm_hash_table (info);
4546
4dfe6ac6
NC		 4547 if (globals != NULL
4548 && globals->splt != NULL
4549 && hash != NULL
69c5861e
CL		 4550 && hash->root.plt.offset != (bfd_vma) -1)
4551 {
4552 sym_sec = globals->splt;
4553 sym_value = hash->root.plt.offset;
4554 if (sym_sec->output_section != NULL)
4555 destination = (sym_value
4556 + sym_sec->output_offset
4557 + sym_sec->output_section->vma);
4558 }
4559 else
4560 continue;
4561 }
906e58ca
NC		 4562 else
4563 {
4564 bfd_set_error (bfd_error_bad_value);
4565 goto error_ret_free_internal;
4566 }
4567 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4568 sym_name = hash->root.root.root.string;
906e58ca
NC		 4569 }
4570
48229727 4571 do
7413f23f 4572 {
48229727
JB		 4573 /* Determine what (if any) linker stub is needed. */
4574 stub_type = arm_type_of_stub (info, section, irela,
fe33d2fa 4575 &st_type, hash,
48229727
JB		 4576 destination, sym_sec,
4577 input_bfd, sym_name);
4578 if (stub_type == arm_stub_none)
4579 break;
4580
4581 /* Support for grouping stub sections. */
4582 id_sec = htab->stub_group[section->id].link_sec;
4583
4584 /* Get the name of this stub. */
4585 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 4586 irela, stub_type);
48229727
JB		 4587 if (!stub_name)
4588 goto error_ret_free_internal;
4589
4590 /* We've either created a stub for this reloc already,
4591 or we are about to. */
4592 created_stub = TRUE;
4593
4594 stub_entry = arm_stub_hash_lookup
4595 (&htab->stub_hash_table, stub_name,
4596 FALSE, FALSE);
4597 if (stub_entry != NULL)
4598 {
4599 /* The proper stub has already been created. */
4600 free (stub_name);
eb7c4339 4601 stub_entry->target_value = sym_value;
48229727
JB		 4602 break;
4603 }
7413f23f 4604
48229727
JB		 4605 stub_entry = elf32_arm_add_stub (stub_name, section,
4606 htab);
4607 if (stub_entry == NULL)
4608 {
4609 free (stub_name);
4610 goto error_ret_free_internal;
4611 }
7413f23f 4612
48229727
JB		 4613 stub_entry->target_value = sym_value;
4614 stub_entry->target_section = sym_sec;
4615 stub_entry->stub_type = stub_type;
4616 stub_entry->h = hash;
4617 stub_entry->st_type = st_type;
4618
4619 if (sym_name == NULL)
4620 sym_name = "unnamed";
21d799b5
NC		 4621 stub_entry->output_name = (char *)
4622 bfd_alloc (htab->stub_bfd,
48229727
JB		 4623 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4624 + strlen (sym_name));
4625 if (stub_entry->output_name == NULL)
4626 {
4627 free (stub_name);
4628 goto error_ret_free_internal;
4629 }
4630
4631 /* For historical reasons, use the existing names for
4632 ARM-to-Thumb and Thumb-to-ARM stubs. */
4633 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4634 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4635 && st_type != STT_ARM_TFUNC)
4636 sprintf (stub_entry->output_name,
4637 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4638 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4639 || (r_type == (unsigned int) R_ARM_JUMP24))
4640 && st_type == STT_ARM_TFUNC)
4641 sprintf (stub_entry->output_name,
4642 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4643 else
4644 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4645 sym_name);
4646
4647 stub_changed = TRUE;
4648 }
4649 while (0);
4650
4651 /* Look for relocations which might trigger Cortex-A8
4652 erratum. */
4653 if (htab->fix_cortex_a8
4654 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4655 || r_type == (unsigned int) R_ARM_THM_JUMP19
4656 || r_type == (unsigned int) R_ARM_THM_CALL
4657 || r_type == (unsigned int) R_ARM_THM_XPC22))
4658 {
4659 bfd_vma from = section->output_section->vma
4660 + section->output_offset
4661 + irela->r_offset;
4662
4663 if ((from & 0xfff) == 0xffe)
4664 {
4665 /* Found a candidate. Note we haven't checked the
4666 destination is within 4K here: if we do so (and
4667 don't create an entry in a8_relocs) we can't tell
4668 that a branch should have been relocated when
4669 scanning later. */
4670 if (num_a8_relocs == a8_reloc_table_size)
4671 {
4672 a8_reloc_table_size *= 2;
21d799b5
NC		 4673 a8_relocs = (struct a8_erratum_reloc *)
4674 bfd_realloc (a8_relocs,
4675 sizeof (struct a8_erratum_reloc)
4676 * a8_reloc_table_size);
48229727
JB		 4677 }
4678
4679 a8_relocs[num_a8_relocs].from = from;
4680 a8_relocs[num_a8_relocs].destination = destination;
4681 a8_relocs[num_a8_relocs].r_type = r_type;
4682 a8_relocs[num_a8_relocs].st_type = st_type;
4683 a8_relocs[num_a8_relocs].sym_name = sym_name;
4684 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4685
4686 num_a8_relocs++;
4687 }
4688 }
906e58ca
NC		 4689 }
4690
48229727
JB		 4691 /* We're done with the internal relocs, free them. */
4692 if (elf_section_data (section)->relocs == NULL)
4693 free (internal_relocs);
4694 }
4695
4696 if (htab->fix_cortex_a8)
4697 {
4698 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4699 qsort (a8_relocs, num_a8_relocs,
4700 sizeof (struct a8_erratum_reloc),
48229727
JB		 4701 &a8_reloc_compare);
4702
4703 /* Scan for branches which might trigger Cortex-A8 erratum. */
4704 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4705 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4706 a8_relocs, num_a8_relocs,
4707 prev_num_a8_fixes, &stub_changed)
4708 != 0)
48229727 4709 goto error_ret_free_local;
5e681ec4 4710 }
5e681ec4
PB		 4711 }
4712
eb7c4339 4713 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4714 stub_changed = TRUE;
4715
906e58ca
NC		 4716 if (!stub_changed)
4717 break;
5e681ec4 4718
906e58ca
NC		 4719 /* OK, we've added some stubs. Find out the new size of the
4720 stub sections. */
4721 for (stub_sec = htab->stub_bfd->sections;
4722 stub_sec != NULL;
4723 stub_sec = stub_sec->next)
3e6b1042
DJ		 4724 {
4725 /* Ignore non-stub sections. */
4726 if (!strstr (stub_sec->name, STUB_SUFFIX))
4727 continue;
4728
4729 stub_sec->size = 0;
4730 }
b34b2d70 4731
906e58ca
NC		 4732 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4733
48229727
JB		 4734 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4735 if (htab->fix_cortex_a8)
4736 for (i = 0; i < num_a8_fixes; i++)
4737 {
4738 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4739 a8_fixes[i].section, htab);
4740
4741 if (stub_sec == NULL)
4742 goto error_ret_free_local;
4743
4744 stub_sec->size
4745 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4746 NULL);
4747 }
4748
4749
906e58ca
NC		 4750 /* Ask the linker to do its stuff. */
4751 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4752 }
4753
48229727
JB		 4754 /* Add stubs for Cortex-A8 erratum fixes now. */
4755 if (htab->fix_cortex_a8)
4756 {
4757 for (i = 0; i < num_a8_fixes; i++)
4758 {
4759 struct elf32_arm_stub_hash_entry *stub_entry;
4760 char *stub_name = a8_fixes[i].stub_name;
4761 asection *section = a8_fixes[i].section;
4762 unsigned int section_id = a8_fixes[i].section->id;
4763 asection *link_sec = htab->stub_group[section_id].link_sec;
4764 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 4765 const insn_sequence *template_sequence;
48229727
JB		 4766 int template_size, size = 0;
4767
4768 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4769 TRUE, FALSE);
4770 if (stub_entry == NULL)
4771 {
4772 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4773 section->owner,
4774 stub_name);
4775 return FALSE;
4776 }
4777
4778 stub_entry->stub_sec = stub_sec;
4779 stub_entry->stub_offset = 0;
4780 stub_entry->id_sec = link_sec;
4781 stub_entry->stub_type = a8_fixes[i].stub_type;
4782 stub_entry->target_section = a8_fixes[i].section;
4783 stub_entry->target_value = a8_fixes[i].offset;
4784 stub_entry->target_addend = a8_fixes[i].addend;
4785 stub_entry->orig_insn = a8_fixes[i].orig_insn;
fe33d2fa 4786 stub_entry->st_type = a8_fixes[i].st_type;
48229727 4787
d3ce72d0
NC		 4788 size = find_stub_size_and_template (a8_fixes[i].stub_type,
4789 &template_sequence,
48229727
JB		 4790 &template_size);
4791
4792 stub_entry->stub_size = size;
d3ce72d0 4793 stub_entry->stub_template = template_sequence;
48229727
JB		 4794 stub_entry->stub_template_size = template_size;
4795 }
4796
4797 /* Stash the Cortex-A8 erratum fix array for use later in
4798 elf32_arm_write_section(). */
4799 htab->a8_erratum_fixes = a8_fixes;
4800 htab->num_a8_erratum_fixes = num_a8_fixes;
4801 }
4802 else
4803 {
4804 htab->a8_erratum_fixes = NULL;
4805 htab->num_a8_erratum_fixes = 0;
4806 }
906e58ca
NC		 4807 return TRUE;
4808
4809 error_ret_free_local:
4810 return FALSE;
5e681ec4
PB		 4811}
4812
906e58ca
NC		 4813/* Build all the stubs associated with the current output file. The
4814 stubs are kept in a hash table attached to the main linker hash
4815 table. We also set up the .plt entries for statically linked PIC
4816 functions here. This function is called via arm_elf_finish in the
4817 linker. */
252b5132 4818
906e58ca
NC		 4819bfd_boolean
4820elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4821{
906e58ca
NC		 4822 asection *stub_sec;
4823 struct bfd_hash_table *table;
4824 struct elf32_arm_link_hash_table *htab;
252b5132 4825
906e58ca 4826 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4827 if (htab == NULL)
4828 return FALSE;
252b5132 4829
906e58ca
NC		 4830 for (stub_sec = htab->stub_bfd->sections;
4831 stub_sec != NULL;
4832 stub_sec = stub_sec->next)
252b5132 4833 {
906e58ca
NC		 4834 bfd_size_type size;
4835
8029a119 4836 /* Ignore non-stub sections. */
906e58ca
NC		 4837 if (!strstr (stub_sec->name, STUB_SUFFIX))
4838 continue;
4839
4840 /* Allocate memory to hold the linker stubs. */
4841 size = stub_sec->size;
21d799b5 4842 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 4843 if (stub_sec->contents == NULL && size != 0)
4844 return FALSE;
4845 stub_sec->size = 0;
252b5132
RH		 4846 }
4847
906e58ca
NC		 4848 /* Build the stubs as directed by the stub hash table. */
4849 table = &htab->stub_hash_table;
4850 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 4851 if (htab->fix_cortex_a8)
4852 {
4853 /* Place the cortex a8 stubs last. */
4854 htab->fix_cortex_a8 = -1;
4855 bfd_hash_traverse (table, arm_build_one_stub, info);
4856 }
252b5132 4857
906e58ca 4858 return TRUE;
252b5132
RH		 4859}
4860
9b485d32
NC		 4861/* Locate the Thumb encoded calling stub for NAME. */
4862
252b5132 4863static struct elf_link_hash_entry *
57e8b36a
NC		 4864find_thumb_glue (struct bfd_link_info *link_info,
4865 const char *name,
f2a9dd69 4866 char **error_message)
252b5132
RH		 4867{
4868 char *tmp_name;
4869 struct elf_link_hash_entry *hash;
4870 struct elf32_arm_link_hash_table *hash_table;
4871
4872 /* We need a pointer to the armelf specific hash table. */
4873 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4874 if (hash_table == NULL)
4875 return NULL;
252b5132 4876
21d799b5
NC		 4877 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4878 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4879
4880 BFD_ASSERT (tmp_name);
4881
4882 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4883
4884 hash = elf_link_hash_lookup
b34976b6 4885 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4886
b1657152
AM		 4887 if (hash == NULL
4888 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4889 tmp_name, name) == -1)
4890 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4891
4892 free (tmp_name);
4893
4894 return hash;
4895}
4896
9b485d32
NC		 4897/* Locate the ARM encoded calling stub for NAME. */
4898
252b5132 4899static struct elf_link_hash_entry *
57e8b36a
NC		 4900find_arm_glue (struct bfd_link_info *link_info,
4901 const char *name,
f2a9dd69 4902 char **error_message)
252b5132
RH		 4903{
4904 char *tmp_name;
4905 struct elf_link_hash_entry *myh;
4906 struct elf32_arm_link_hash_table *hash_table;
4907
4908 /* We need a pointer to the elfarm specific hash table. */
4909 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4910 if (hash_table == NULL)
4911 return NULL;
252b5132 4912
21d799b5
NC		 4913 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4914 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4915
4916 BFD_ASSERT (tmp_name);
4917
4918 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4919
4920 myh = elf_link_hash_lookup
b34976b6 4921 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4922
b1657152
AM		 4923 if (myh == NULL
4924 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4925 tmp_name, name) == -1)
4926 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4927
4928 free (tmp_name);
4929
4930 return myh;
4931}
4932
8f6277f5 4933/* ARM->Thumb glue (static images):
252b5132
RH		 4934
4935 .arm
4936 __func_from_arm:
4937 ldr r12, __func_addr
4938 bx r12
4939 __func_addr:
906e58ca 4940 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4941
26079076
PB		 4942 (v5t static images)
4943 .arm
4944 __func_from_arm:
4945 ldr pc, __func_addr
4946 __func_addr:
906e58ca 4947 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4948
8f6277f5
PB		 4949 (relocatable images)
4950 .arm
4951 __func_from_arm:
4952 ldr r12, __func_offset
4953 add r12, r12, pc
4954 bx r12
4955 __func_offset:
8029a119 4956 .word func - . */
8f6277f5
PB		 4957
4958#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4959static const insn32 a2t1_ldr_insn = 0xe59fc000;
4960static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4961static const insn32 a2t3_func_addr_insn = 0x00000001;
4962
26079076
PB		 4963#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4964static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4965static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4966
8f6277f5
PB		 4967#define ARM2THUMB_PIC_GLUE_SIZE 16
4968static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4969static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4970static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4971
9b485d32 4972/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4973
8029a119
NC		 4974 .thumb .thumb
4975 .align 2 .align 2
4976 __func_from_thumb: __func_from_thumb:
4977 bx pc push {r6, lr}
4978 nop ldr r6, __func_addr
4979 .arm mov lr, pc
4980 b func bx r6
fcef9eb7
NC		 4981 .arm
4982 ;; back_to_thumb
4983 ldmia r13! {r6, lr}
4984 bx lr
8029a119
NC		 4985 __func_addr:
4986 .word func */
252b5132
RH		 4987
4988#define THUMB2ARM_GLUE_SIZE 8
4989static const insn16 t2a1_bx_pc_insn = 0x4778;
4990static const insn16 t2a2_noop_insn = 0x46c0;
4991static const insn32 t2a3_b_insn = 0xea000000;
4992
c7b8f16e
JB		 4993#define VFP11_ERRATUM_VENEER_SIZE 8
4994
845b51d6
PB		 4995#define ARM_BX_VENEER_SIZE 12
4996static const insn32 armbx1_tst_insn = 0xe3100001;
4997static const insn32 armbx2_moveq_insn = 0x01a0f000;
4998static const insn32 armbx3_bx_insn = 0xe12fff10;
4999
7e392df6 5000#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5001static void
5002arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5003{
5004 asection * s;
8029a119 5005 bfd_byte * contents;
252b5132 5006
8029a119 5007 if (size == 0)
3e6b1042
DJ		 5008 {
5009 /* Do not include empty glue sections in the output. */
5010 if (abfd != NULL)
5011 {
5012 s = bfd_get_section_by_name (abfd, name);
5013 if (s != NULL)
5014 s->flags |= SEC_EXCLUDE;
5015 }
5016 return;
5017 }
252b5132 5018
8029a119 5019 BFD_ASSERT (abfd != NULL);
252b5132 5020
8029a119
NC		 5021 s = bfd_get_section_by_name (abfd, name);
5022 BFD_ASSERT (s != NULL);
252b5132 5023
21d799b5 5024 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5025
8029a119
NC		 5026 BFD_ASSERT (s->size == size);
5027 s->contents = contents;
5028}
906e58ca 5029
8029a119
NC		 5030bfd_boolean
5031bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5032{
5033 struct elf32_arm_link_hash_table * globals;
906e58ca 5034
8029a119
NC		 5035 globals = elf32_arm_hash_table (info);
5036 BFD_ASSERT (globals != NULL);
906e58ca 5037
8029a119
NC		 5038 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5039 globals->arm_glue_size,
5040 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5041
8029a119
NC		 5042 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5043 globals->thumb_glue_size,
5044 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5045
8029a119
NC		 5046 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5047 globals->vfp11_erratum_glue_size,
5048 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5049
8029a119
NC		 5050 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5051 globals->bx_glue_size,
845b51d6
PB		 5052 ARM_BX_GLUE_SECTION_NAME);
5053
b34976b6 5054 return TRUE;
252b5132
RH		 5055}
5056
a4fd1a8e 5057/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5058 returns the symbol identifying the stub. */
5059
a4fd1a8e 5060static struct elf_link_hash_entry *
57e8b36a
NC		 5061record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5062 struct elf_link_hash_entry * h)
252b5132
RH		 5063{
5064 const char * name = h->root.root.string;
63b0f745 5065 asection * s;
252b5132
RH		 5066 char * tmp_name;
5067 struct elf_link_hash_entry * myh;
14a793b2 5068 struct bfd_link_hash_entry * bh;
252b5132 5069 struct elf32_arm_link_hash_table * globals;
dc810e39 5070 bfd_vma val;
2f475487 5071 bfd_size_type size;
252b5132
RH		 5072
5073 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5074 BFD_ASSERT (globals != NULL);
5075 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5076
5077 s = bfd_get_section_by_name
5078 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5079
252b5132
RH		 5080 BFD_ASSERT (s != NULL);
5081
21d799b5
NC		 5082 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5083 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5084
5085 BFD_ASSERT (tmp_name);
5086
5087 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5088
5089 myh = elf_link_hash_lookup
b34976b6 5090 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5091
5092 if (myh != NULL)
5093 {
9b485d32 5094 /* We've already seen this guy. */
252b5132 5095 free (tmp_name);
a4fd1a8e 5096 return myh;
252b5132
RH		 5097 }
5098
57e8b36a
NC		 5099 /* The only trick here is using hash_table->arm_glue_size as the value.
5100 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5101 putting it. The +1 on the value marks that the stub has not been
5102 output yet - not that it is a Thumb function. */
14a793b2 5103 bh = NULL;
dc810e39
AM		 5104 val = globals->arm_glue_size + 1;
5105 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5106 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5107 NULL, TRUE, FALSE, &bh);
252b5132 5108
b7693d02
DJ		 5109 myh = (struct elf_link_hash_entry *) bh;
5110 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5111 myh->forced_local = 1;
5112
252b5132
RH		 5113 free (tmp_name);
5114
27e55c4d
PB		 5115 if (link_info->shared || globals->root.is_relocatable_executable
5116 || globals->pic_veneer)
2f475487 5117 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5118 else if (globals->use_blx)
5119 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5120 else
2f475487
AM		 5121 size = ARM2THUMB_STATIC_GLUE_SIZE;
5122
5123 s->size += size;
5124 globals->arm_glue_size += size;
252b5132 5125
a4fd1a8e 5126 return myh;
252b5132
RH		 5127}
5128
845b51d6
PB		 5129/* Allocate space for ARMv4 BX veneers. */
5130
5131static void
5132record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5133{
5134 asection * s;
5135 struct elf32_arm_link_hash_table *globals;
5136 char *tmp_name;
5137 struct elf_link_hash_entry *myh;
5138 struct bfd_link_hash_entry *bh;
5139 bfd_vma val;
5140
5141 /* BX PC does not need a veneer. */
5142 if (reg == 15)
5143 return;
5144
5145 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5146 BFD_ASSERT (globals != NULL);
5147 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5148
5149 /* Check if this veneer has already been allocated. */
5150 if (globals->bx_glue_offset[reg])
5151 return;
5152
5153 s = bfd_get_section_by_name
5154 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5155
5156 BFD_ASSERT (s != NULL);
5157
5158 /* Add symbol for veneer. */
21d799b5
NC		 5159 tmp_name = (char *)
5160 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5161
845b51d6 5162 BFD_ASSERT (tmp_name);
906e58ca 5163
845b51d6 5164 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5165
845b51d6
PB		 5166 myh = elf_link_hash_lookup
5167 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5168
845b51d6 5169 BFD_ASSERT (myh == NULL);
906e58ca 5170
845b51d6
PB		 5171 bh = NULL;
5172 val = globals->bx_glue_size;
5173 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5174 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5175 NULL, TRUE, FALSE, &bh);
5176
5177 myh = (struct elf_link_hash_entry *) bh;
5178 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5179 myh->forced_local = 1;
5180
5181 s->size += ARM_BX_VENEER_SIZE;
5182 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5183 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5184}
5185
5186
c7b8f16e
JB		 5187/* Add an entry to the code/data map for section SEC. */
5188
5189static void
5190elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5191{
5192 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5193 unsigned int newidx;
906e58ca 5194
c7b8f16e
JB		 5195 if (sec_data->map == NULL)
5196 {
21d799b5
NC		 5197 sec_data->map = (elf32_arm_section_map *)
5198 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5199 sec_data->mapcount = 0;
5200 sec_data->mapsize = 1;
5201 }
906e58ca 5202
c7b8f16e 5203 newidx = sec_data->mapcount++;
906e58ca 5204
c7b8f16e
JB		 5205 if (sec_data->mapcount > sec_data->mapsize)
5206 {
5207 sec_data->mapsize *= 2;
21d799b5
NC		 5208 sec_data->map = (elf32_arm_section_map *)
5209 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5210 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5211 }
5212
5213 if (sec_data->map)
5214 {
5215 sec_data->map[newidx].vma = vma;
5216 sec_data->map[newidx].type = type;
c7b8f16e 5217 }
c7b8f16e
JB		 5218}
5219
5220
5221/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5222 veneers are handled for now. */
5223
5224static bfd_vma
5225record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5226 elf32_vfp11_erratum_list *branch,
5227 bfd *branch_bfd,
5228 asection *branch_sec,
5229 unsigned int offset)
5230{
5231 asection *s;
5232 struct elf32_arm_link_hash_table *hash_table;
5233 char *tmp_name;
5234 struct elf_link_hash_entry *myh;
5235 struct bfd_link_hash_entry *bh;
5236 bfd_vma val;
5237 struct _arm_elf_section_data *sec_data;
5238 int errcount;
5239 elf32_vfp11_erratum_list *newerr;
906e58ca 5240
c7b8f16e 5241 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5242 BFD_ASSERT (hash_table != NULL);
5243 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5244
c7b8f16e
JB		 5245 s = bfd_get_section_by_name
5246 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5247
c7b8f16e 5248 sec_data = elf32_arm_section_data (s);
906e58ca 5249
c7b8f16e 5250 BFD_ASSERT (s != NULL);
906e58ca 5251
21d799b5
NC		 5252 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5253 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5254
c7b8f16e 5255 BFD_ASSERT (tmp_name);
906e58ca 5256
c7b8f16e
JB		 5257 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5258 hash_table->num_vfp11_fixes);
906e58ca 5259
c7b8f16e
JB		 5260 myh = elf_link_hash_lookup
5261 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5262
c7b8f16e 5263 BFD_ASSERT (myh == NULL);
906e58ca 5264
c7b8f16e
JB		 5265 bh = NULL;
5266 val = hash_table->vfp11_erratum_glue_size;
5267 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5268 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5269 NULL, TRUE, FALSE, &bh);
5270
5271 myh = (struct elf_link_hash_entry *) bh;
5272 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5273 myh->forced_local = 1;
5274
5275 /* Link veneer back to calling location. */
5276 errcount = ++(sec_data->erratumcount);
21d799b5
NC		 5277 newerr = (elf32_vfp11_erratum_list *)
5278 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5279
c7b8f16e
JB		 5280 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5281 newerr->vma = -1;
5282 newerr->u.v.branch = branch;
5283 newerr->u.v.id = hash_table->num_vfp11_fixes;
5284 branch->u.b.veneer = newerr;
5285
5286 newerr->next = sec_data->erratumlist;
5287 sec_data->erratumlist = newerr;
5288
5289 /* A symbol for the return from the veneer. */
5290 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5291 hash_table->num_vfp11_fixes);
5292
5293 myh = elf_link_hash_lookup
5294 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5295
c7b8f16e
JB		 5296 if (myh != NULL)
5297 abort ();
5298
5299 bh = NULL;
5300 val = offset + 4;
5301 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5302 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5303
c7b8f16e
JB		 5304 myh = (struct elf_link_hash_entry *) bh;
5305 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5306 myh->forced_local = 1;
5307
5308 free (tmp_name);
906e58ca 5309
c7b8f16e
JB		 5310 /* Generate a mapping symbol for the veneer section, and explicitly add an
5311 entry for that symbol to the code/data map for the section. */
5312 if (hash_table->vfp11_erratum_glue_size == 0)
5313 {
5314 bh = NULL;
5315 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5316 ever requires this erratum fix. */
5317 _bfd_generic_link_add_one_symbol (link_info,
5318 hash_table->bfd_of_glue_owner, "$a",
5319 BSF_LOCAL, s, 0, NULL,
5320 TRUE, FALSE, &bh);
5321
5322 myh = (struct elf_link_hash_entry *) bh;
5323 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5324 myh->forced_local = 1;
906e58ca 5325
c7b8f16e
JB		 5326 /* The elf32_arm_init_maps function only cares about symbols from input
5327 BFDs. We must make a note of this generated mapping symbol
5328 ourselves so that code byteswapping works properly in
5329 elf32_arm_write_section. */
5330 elf32_arm_section_map_add (s, 'a', 0);
5331 }
906e58ca 5332
c7b8f16e
JB		 5333 s->size += VFP11_ERRATUM_VENEER_SIZE;
5334 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5335 hash_table->num_vfp11_fixes++;
906e58ca 5336
c7b8f16e
JB		 5337 /* The offset of the veneer. */
5338 return val;
5339}
5340
8029a119 5341#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5342 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5343 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5344
5345/* Create a fake section for use by the ARM backend of the linker. */
5346
5347static bfd_boolean
5348arm_make_glue_section (bfd * abfd, const char * name)
5349{
5350 asection * sec;
5351
5352 sec = bfd_get_section_by_name (abfd, name);
5353 if (sec != NULL)
5354 /* Already made. */
5355 return TRUE;
5356
5357 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5358
5359 if (sec == NULL
5360 || !bfd_set_section_alignment (abfd, sec, 2))
5361 return FALSE;
5362
5363 /* Set the gc mark to prevent the section from being removed by garbage
5364 collection, despite the fact that no relocs refer to this section. */
5365 sec->gc_mark = 1;
5366
5367 return TRUE;
5368}
5369
8afb0e02
NC		 5370/* Add the glue sections to ABFD. This function is called from the
5371 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5372
b34976b6 5373bfd_boolean
57e8b36a
NC		 5374bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5375 struct bfd_link_info *info)
252b5132 5376{
8afb0e02
NC		 5377 /* If we are only performing a partial
5378 link do not bother adding the glue. */
1049f94e 5379 if (info->relocatable)
b34976b6 5380 return TRUE;
252b5132 5381
8029a119
NC		 5382 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5383 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5384 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5385 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5386}
5387
5388/* Select a BFD to be used to hold the sections used by the glue code.
5389 This function is called from the linker scripts in ld/emultempl/
8029a119 5390 {armelf/pe}.em. */
8afb0e02 5391
b34976b6 5392bfd_boolean
57e8b36a 5393bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5394{
5395 struct elf32_arm_link_hash_table *globals;
5396
5397 /* If we are only performing a partial link
5398 do not bother getting a bfd to hold the glue. */
1049f94e 5399 if (info->relocatable)
b34976b6 5400 return TRUE;
8afb0e02 5401
b7693d02
DJ		 5402 /* Make sure we don't attach the glue sections to a dynamic object. */
5403 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5404
8afb0e02 5405 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5406 BFD_ASSERT (globals != NULL);
5407
5408 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5409 return TRUE;
8afb0e02 5410
252b5132
RH		 5411 /* Save the bfd for later use. */
5412 globals->bfd_of_glue_owner = abfd;
cedb70c5 5413
b34976b6 5414 return TRUE;
252b5132
RH		 5415}
5416
906e58ca
NC		 5417static void
5418check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5419{
104d59d1
JM		 5420 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5421 Tag_CPU_arch) > 2)
39b41c9c
PB		 5422 globals->use_blx = 1;
5423}
5424
b34976b6 5425bfd_boolean
57e8b36a 5426bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5427 struct bfd_link_info *link_info)
252b5132
RH		 5428{
5429 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5430 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5431 Elf_Internal_Rela *irel, *irelend;
5432 bfd_byte *contents = NULL;
252b5132
RH		 5433
5434 asection *sec;
5435 struct elf32_arm_link_hash_table *globals;
5436
5437 /* If we are only performing a partial link do not bother
5438 to construct any glue. */
1049f94e 5439 if (link_info->relocatable)
b34976b6 5440 return TRUE;
252b5132 5441
39ce1a6a
NC		 5442 /* Here we have a bfd that is to be included on the link. We have a
5443 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5444 globals = elf32_arm_hash_table (link_info);
252b5132 5445 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5446
5447 check_use_blx (globals);
252b5132 5448
d504ffc8 5449 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5450 {
d003868e
AM		 5451 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5452 abfd);
e489d0ae
PB		 5453 return FALSE;
5454 }
f21f3fe0 5455
39ce1a6a
NC		 5456 /* PR 5398: If we have not decided to include any loadable sections in
5457 the output then we will not have a glue owner bfd. This is OK, it
5458 just means that there is nothing else for us to do here. */
5459 if (globals->bfd_of_glue_owner == NULL)
5460 return TRUE;
5461
252b5132
RH		 5462 /* Rummage around all the relocs and map the glue vectors. */
5463 sec = abfd->sections;
5464
5465 if (sec == NULL)
b34976b6 5466 return TRUE;
252b5132
RH		 5467
5468 for (; sec != NULL; sec = sec->next)
5469 {
5470 if (sec->reloc_count == 0)
5471 continue;
5472
2f475487
AM		 5473 if ((sec->flags & SEC_EXCLUDE) != 0)
5474 continue;
5475
0ffa91dd 5476 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5477
9b485d32 5478 /* Load the relocs. */
6cdc0ccc 5479 internal_relocs
906e58ca 5480 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5481
6cdc0ccc
AM		 5482 if (internal_relocs == NULL)
5483 goto error_return;
252b5132 5484
6cdc0ccc
AM		 5485 irelend = internal_relocs + sec->reloc_count;
5486 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5487 {
5488 long r_type;
5489 unsigned long r_index;
252b5132
RH		 5490
5491 struct elf_link_hash_entry *h;
5492
5493 r_type = ELF32_R_TYPE (irel->r_info);
5494 r_index = ELF32_R_SYM (irel->r_info);
5495
9b485d32 5496 /* These are the only relocation types we care about. */
ba96a88f 5497 if ( r_type != R_ARM_PC24
845b51d6 5498 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5499 continue;
5500
5501 /* Get the section contents if we haven't done so already. */
5502 if (contents == NULL)
5503 {
5504 /* Get cached copy if it exists. */
5505 if (elf_section_data (sec)->this_hdr.contents != NULL)
5506 contents = elf_section_data (sec)->this_hdr.contents;
5507 else
5508 {
5509 /* Go get them off disk. */
57e8b36a 5510 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5511 goto error_return;
5512 }
5513 }
5514
845b51d6
PB		 5515 if (r_type == R_ARM_V4BX)
5516 {
5517 int reg;
5518
5519 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5520 record_arm_bx_glue (link_info, reg);
5521 continue;
5522 }
5523
a7c10850 5524 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5525 h = NULL;
5526
9b485d32 5527 /* We don't care about local symbols. */
252b5132
RH		 5528 if (r_index < symtab_hdr->sh_info)
5529 continue;
5530
9b485d32 5531 /* This is an external symbol. */
252b5132
RH		 5532 r_index -= symtab_hdr->sh_info;
5533 h = (struct elf_link_hash_entry *)
5534 elf_sym_hashes (abfd)[r_index];
5535
5536 /* If the relocation is against a static symbol it must be within
5537 the current section and so cannot be a cross ARM/Thumb relocation. */
5538 if (h == NULL)
5539 continue;
5540
d504ffc8
DJ		 5541 /* If the call will go through a PLT entry then we do not need
5542 glue. */
5543 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5544 continue;
5545
252b5132
RH		 5546 switch (r_type)
5547 {
5548 case R_ARM_PC24:
5549 /* This one is a call from arm code. We need to look up
2f0ca46a 5550 the target of the call. If it is a thumb target, we
252b5132 5551 insert glue. */
ebe24dd4 5552 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5553 record_arm_to_thumb_glue (link_info, h);
5554 break;
5555
252b5132 5556 default:
c6596c5e 5557 abort ();
252b5132
RH		 5558 }
5559 }
6cdc0ccc
AM		 5560
5561 if (contents != NULL
5562 && elf_section_data (sec)->this_hdr.contents != contents)
5563 free (contents);
5564 contents = NULL;
5565
5566 if (internal_relocs != NULL
5567 && elf_section_data (sec)->relocs != internal_relocs)
5568 free (internal_relocs);
5569 internal_relocs = NULL;
252b5132
RH		 5570 }
5571
b34976b6 5572 return TRUE;
9a5aca8c 5573
252b5132 5574error_return:
6cdc0ccc
AM		 5575 if (contents != NULL
5576 && elf_section_data (sec)->this_hdr.contents != contents)
5577 free (contents);
5578 if (internal_relocs != NULL
5579 && elf_section_data (sec)->relocs != internal_relocs)
5580 free (internal_relocs);
9a5aca8c 5581
b34976b6 5582 return FALSE;
252b5132 5583}
7e392df6 5584#endif
252b5132 5585
eb043451 5586
c7b8f16e
JB		 5587/* Initialise maps of ARM/Thumb/data for input BFDs. */
5588
5589void
5590bfd_elf32_arm_init_maps (bfd *abfd)
5591{
5592 Elf_Internal_Sym *isymbuf;
5593 Elf_Internal_Shdr *hdr;
5594 unsigned int i, localsyms;
5595
af1f4419
NC		 5596 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5597 if (! is_arm_elf (abfd))
5598 return;
5599
c7b8f16e
JB		 5600 if ((abfd->flags & DYNAMIC) != 0)
5601 return;
5602
0ffa91dd 5603 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5604 localsyms = hdr->sh_info;
5605
5606 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5607 should contain the number of local symbols, which should come before any
5608 global symbols. Mapping symbols are always local. */
5609 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5610 NULL);
5611
5612 /* No internal symbols read? Skip this BFD. */
5613 if (isymbuf == NULL)
5614 return;
5615
5616 for (i = 0; i < localsyms; i++)
5617 {
5618 Elf_Internal_Sym *isym = &isymbuf[i];
5619 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5620 const char *name;
906e58ca 5621
c7b8f16e
JB		 5622 if (sec != NULL
5623 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5624 {
5625 name = bfd_elf_string_from_elf_section (abfd,
5626 hdr->sh_link, isym->st_name);
906e58ca 5627
c7b8f16e
JB		 5628 if (bfd_is_arm_special_symbol_name (name,
5629 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5630 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5631 }
5632 }
5633}
5634
5635
48229727
JB		 5636/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5637 say what they wanted. */
5638
5639void
5640bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5641{
5642 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5643 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5644
4dfe6ac6
NC		 5645 if (globals == NULL)
5646 return;
5647
48229727
JB		 5648 if (globals->fix_cortex_a8 == -1)
5649 {
5650 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5651 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5652 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5653 || out_attr[Tag_CPU_arch_profile].i == 0))
5654 globals->fix_cortex_a8 = 1;
5655 else
5656 globals->fix_cortex_a8 = 0;
5657 }
5658}
5659
5660
c7b8f16e
JB		 5661void
5662bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5663{
5664 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5665 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5666
4dfe6ac6
NC		 5667 if (globals == NULL)
5668 return;
c7b8f16e
JB		 5669 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5670 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5671 {
5672 switch (globals->vfp11_fix)
5673 {
5674 case BFD_ARM_VFP11_FIX_DEFAULT:
5675 case BFD_ARM_VFP11_FIX_NONE:
5676 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5677 break;
906e58ca 5678
c7b8f16e
JB		 5679 default:
5680 /* Give a warning, but do as the user requests anyway. */
5681 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5682 "workaround is not necessary for target architecture"), obfd);
5683 }
5684 }
5685 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5686 /* For earlier architectures, we might need the workaround, but do not
5687 enable it by default. If users is running with broken hardware, they
5688 must enable the erratum fix explicitly. */
5689 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5690}
5691
5692
906e58ca
NC		 5693enum bfd_arm_vfp11_pipe
5694{
c7b8f16e
JB		 5695 VFP11_FMAC,
5696 VFP11_LS,
5697 VFP11_DS,
5698 VFP11_BAD
5699};
5700
5701/* Return a VFP register number. This is encoded as RX:X for single-precision
5702 registers, or X:RX for double-precision registers, where RX is the group of
5703 four bits in the instruction encoding and X is the single extension bit.
5704 RX and X fields are specified using their lowest (starting) bit. The return
5705 value is:
5706
5707 0...31: single-precision registers s0...s31
5708 32...63: double-precision registers d0...d31.
906e58ca 5709
c7b8f16e
JB		 5710 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5711 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5712
c7b8f16e
JB		 5713static unsigned int
5714bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5715 unsigned int x)
5716{
5717 if (is_double)
5718 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5719 else
5720 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5721}
5722
5723/* Set bits in *WMASK according to a register number REG as encoded by
5724 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5725
5726static void
5727bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5728{
5729 if (reg < 32)
5730 *wmask |= 1 << reg;
5731 else if (reg < 48)
5732 *wmask |= 3 << ((reg - 32) * 2);
5733}
5734
5735/* Return TRUE if WMASK overwrites anything in REGS. */
5736
5737static bfd_boolean
5738bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5739{
5740 int i;
906e58ca 5741
c7b8f16e
JB		 5742 for (i = 0; i < numregs; i++)
5743 {
5744 unsigned int reg = regs[i];
5745
5746 if (reg < 32 && (wmask & (1 << reg)) != 0)
5747 return TRUE;
906e58ca 5748
c7b8f16e
JB		 5749 reg -= 32;
5750
5751 if (reg >= 16)
5752 continue;
906e58ca 5753
c7b8f16e
JB		 5754 if ((wmask & (3 << (reg * 2))) != 0)
5755 return TRUE;
5756 }
906e58ca 5757
c7b8f16e
JB		 5758 return FALSE;
5759}
5760
5761/* In this function, we're interested in two things: finding input registers
5762 for VFP data-processing instructions, and finding the set of registers which
5763 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5764 hold the written set, so FLDM etc. are easy to deal with (we're only
5765 interested in 32 SP registers or 16 dp registers, due to the VFP version
5766 implemented by the chip in question). DP registers are marked by setting
5767 both SP registers in the write mask). */
5768
5769static enum bfd_arm_vfp11_pipe
5770bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5771 int *numregs)
5772{
91d6fa6a 5773 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 5774 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5775
5776 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5777 {
5778 unsigned int pqrs;
5779 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5780 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5781
5782 pqrs = ((insn & 0x00800000) >> 20)
5783 | ((insn & 0x00300000) >> 19)
5784 | ((insn & 0x00000040) >> 6);
5785
5786 switch (pqrs)
5787 {
5788 case 0: /* fmac[sd]. */
5789 case 1: /* fnmac[sd]. */
5790 case 2: /* fmsc[sd]. */
5791 case 3: /* fnmsc[sd]. */
91d6fa6a 5792 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5793 bfd_arm_vfp11_write_mask (destmask, fd);
5794 regs[0] = fd;
5795 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5796 regs[2] = fm;
5797 *numregs = 3;
5798 break;
5799
5800 case 4: /* fmul[sd]. */
5801 case 5: /* fnmul[sd]. */
5802 case 6: /* fadd[sd]. */
5803 case 7: /* fsub[sd]. */
91d6fa6a 5804 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5805 goto vfp_binop;
5806
5807 case 8: /* fdiv[sd]. */
91d6fa6a 5808 vpipe = VFP11_DS;
c7b8f16e
JB		 5809 vfp_binop:
5810 bfd_arm_vfp11_write_mask (destmask, fd);
5811 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5812 regs[1] = fm;
5813 *numregs = 2;
5814 break;
5815
5816 case 15: /* extended opcode. */
5817 {
5818 unsigned int extn = ((insn >> 15) & 0x1e)
5819 | ((insn >> 7) & 1);
5820
5821 switch (extn)
5822 {
5823 case 0: /* fcpy[sd]. */
5824 case 1: /* fabs[sd]. */
5825 case 2: /* fneg[sd]. */
5826 case 8: /* fcmp[sd]. */
5827 case 9: /* fcmpe[sd]. */
5828 case 10: /* fcmpz[sd]. */
5829 case 11: /* fcmpez[sd]. */
5830 case 16: /* fuito[sd]. */
5831 case 17: /* fsito[sd]. */
5832 case 24: /* ftoui[sd]. */
5833 case 25: /* ftouiz[sd]. */
5834 case 26: /* ftosi[sd]. */
5835 case 27: /* ftosiz[sd]. */
5836 /* These instructions will not bounce due to underflow. */
5837 *numregs = 0;
91d6fa6a 5838 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5839 break;
5840
5841 case 3: /* fsqrt[sd]. */
5842 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5843 registers to cause the erratum in previous instructions. */
5844 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 5845 vpipe = VFP11_DS;
c7b8f16e
JB		 5846 break;
5847
5848 case 15: /* fcvt{ds,sd}. */
5849 {
5850 int rnum = 0;
5851
5852 bfd_arm_vfp11_write_mask (destmask, fd);
5853
5854 /* Only FCVTSD can underflow. */
5855 if ((insn & 0x100) != 0)
5856 regs[rnum++] = fm;
5857
5858 *numregs = rnum;
5859
91d6fa6a 5860 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5861 }
5862 break;
5863
5864 default:
5865 return VFP11_BAD;
5866 }
5867 }
5868 break;
5869
5870 default:
5871 return VFP11_BAD;
5872 }
5873 }
5874 /* Two-register transfer. */
5875 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5876 {
5877 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5878
c7b8f16e
JB		 5879 if ((insn & 0x100000) == 0)
5880 {
5881 if (is_double)
5882 bfd_arm_vfp11_write_mask (destmask, fm);
5883 else
5884 {
5885 bfd_arm_vfp11_write_mask (destmask, fm);
5886 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5887 }
5888 }
5889
91d6fa6a 5890 vpipe = VFP11_LS;
c7b8f16e
JB		 5891 }
5892 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5893 {
5894 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5895 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5896
c7b8f16e
JB		 5897 switch (puw)
5898 {
5899 case 0: /* Two-reg transfer. We should catch these above. */
5900 abort ();
906e58ca 5901
c7b8f16e
JB		 5902 case 2: /* fldm[sdx]. */
5903 case 3:
5904 case 5:
5905 {
5906 unsigned int i, offset = insn & 0xff;
5907
5908 if (is_double)
5909 offset >>= 1;
5910
5911 for (i = fd; i < fd + offset; i++)
5912 bfd_arm_vfp11_write_mask (destmask, i);
5913 }
5914 break;
906e58ca 5915
c7b8f16e
JB		 5916 case 4: /* fld[sd]. */
5917 case 6:
5918 bfd_arm_vfp11_write_mask (destmask, fd);
5919 break;
906e58ca 5920
c7b8f16e
JB		 5921 default:
5922 return VFP11_BAD;
5923 }
5924
91d6fa6a 5925 vpipe = VFP11_LS;
c7b8f16e
JB		 5926 }
5927 /* Single-register transfer. Note L==0. */
5928 else if ((insn & 0x0f100e10) == 0x0e000a10)
5929 {
5930 unsigned int opcode = (insn >> 21) & 7;
5931 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5932
5933 switch (opcode)
5934 {
5935 case 0: /* fmsr/fmdlr. */
5936 case 1: /* fmdhr. */
5937 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5938 destination register. I don't know if this is exactly right,
5939 but it is the conservative choice. */
5940 bfd_arm_vfp11_write_mask (destmask, fn);
5941 break;
5942
5943 case 7: /* fmxr. */
5944 break;
5945 }
5946
91d6fa6a 5947 vpipe = VFP11_LS;
c7b8f16e
JB		 5948 }
5949
91d6fa6a 5950 return vpipe;
c7b8f16e
JB		 5951}
5952
5953
5954static int elf32_arm_compare_mapping (const void * a, const void * b);
5955
5956
5957/* Look for potentially-troublesome code sequences which might trigger the
5958 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5959 (available from ARM) for details of the erratum. A short version is
5960 described in ld.texinfo. */
5961
5962bfd_boolean
5963bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5964{
5965 asection *sec;
5966 bfd_byte *contents = NULL;
5967 int state = 0;
5968 int regs[3], numregs = 0;
5969 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5970 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5971
4dfe6ac6
NC		 5972 if (globals == NULL)
5973 return FALSE;
5974
c7b8f16e
JB		 5975 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5976 The states transition as follows:
906e58ca 5977
c7b8f16e
JB		 5978 0 -> 1 (vector) or 0 -> 2 (scalar)
5979 A VFP FMAC-pipeline instruction has been seen. Fill
5980 regs[0]..regs[numregs-1] with its input operands. Remember this
5981 instruction in 'first_fmac'.
5982
5983 1 -> 2
5984 Any instruction, except for a VFP instruction which overwrites
5985 regs[*].
906e58ca 5986
c7b8f16e
JB		 5987 1 -> 3 [ -> 0 ] or
5988 2 -> 3 [ -> 0 ]
5989 A VFP instruction has been seen which overwrites any of regs[*].
5990 We must make a veneer! Reset state to 0 before examining next
5991 instruction.
906e58ca 5992
c7b8f16e
JB		 5993 2 -> 0
5994 If we fail to match anything in state 2, reset to state 0 and reset
5995 the instruction pointer to the instruction after 'first_fmac'.
5996
5997 If the VFP11 vector mode is in use, there must be at least two unrelated
5998 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5999 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6000
6001 /* If we are only performing a partial link do not bother
6002 to construct any glue. */
6003 if (link_info->relocatable)
6004 return TRUE;
6005
0ffa91dd
NC		 6006 /* Skip if this bfd does not correspond to an ELF image. */
6007 if (! is_arm_elf (abfd))
6008 return TRUE;
906e58ca 6009
c7b8f16e
JB		 6010 /* We should have chosen a fix type by the time we get here. */
6011 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6012
6013 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6014 return TRUE;
2e6030b9 6015
33a7ffc2
JM		 6016 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6017 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6018 return TRUE;
6019
c7b8f16e
JB		 6020 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6021 {
6022 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6023 struct _arm_elf_section_data *sec_data;
6024
6025 /* If we don't have executable progbits, we're not interested in this
6026 section. Also skip if section is to be excluded. */
6027 if (elf_section_type (sec) != SHT_PROGBITS
6028 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6029 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6030 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6031 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6032 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6033 continue;
6034
6035 sec_data = elf32_arm_section_data (sec);
906e58ca 6036
c7b8f16e
JB		 6037 if (sec_data->mapcount == 0)
6038 continue;
906e58ca 6039
c7b8f16e
JB		 6040 if (elf_section_data (sec)->this_hdr.contents != NULL)
6041 contents = elf_section_data (sec)->this_hdr.contents;
6042 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6043 goto error_return;
6044
6045 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6046 elf32_arm_compare_mapping);
6047
6048 for (span = 0; span < sec_data->mapcount; span++)
6049 {
6050 unsigned int span_start = sec_data->map[span].vma;
6051 unsigned int span_end = (span == sec_data->mapcount - 1)
6052 ? sec->size : sec_data->map[span + 1].vma;
6053 char span_type = sec_data->map[span].type;
906e58ca 6054
c7b8f16e
JB		 6055 /* FIXME: Only ARM mode is supported at present. We may need to
6056 support Thumb-2 mode also at some point. */
6057 if (span_type != 'a')
6058 continue;
6059
6060 for (i = span_start; i < span_end;)
6061 {
6062 unsigned int next_i = i + 4;
6063 unsigned int insn = bfd_big_endian (abfd)
6064 ? (contents[i] << 24)
6065 | (contents[i + 1] << 16)
6066 | (contents[i + 2] << 8)
6067 | contents[i + 3]
6068 : (contents[i + 3] << 24)
6069 | (contents[i + 2] << 16)
6070 | (contents[i + 1] << 8)
6071 | contents[i];
6072 unsigned int writemask = 0;
91d6fa6a 6073 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6074
6075 switch (state)
6076 {
6077 case 0:
91d6fa6a 6078 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6079 &numregs);
6080 /* I'm assuming the VFP11 erratum can trigger with denorm
6081 operands on either the FMAC or the DS pipeline. This might
6082 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6083 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6084 {
6085 state = use_vector ? 1 : 2;
6086 first_fmac = i;
6087 veneer_of_insn = insn;
6088 }
6089 break;
6090
6091 case 1:
6092 {
6093 int other_regs[3], other_numregs;
91d6fa6a 6094 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6095 other_regs,
6096 &other_numregs);
91d6fa6a 6097 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6098 && bfd_arm_vfp11_antidependency (writemask, regs,
6099 numregs))
6100 state = 3;
6101 else
6102 state = 2;
6103 }
6104 break;
6105
6106 case 2:
6107 {
6108 int other_regs[3], other_numregs;
91d6fa6a 6109 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6110 other_regs,
6111 &other_numregs);
91d6fa6a 6112 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6113 && bfd_arm_vfp11_antidependency (writemask, regs,
6114 numregs))
6115 state = 3;
6116 else
6117 {
6118 state = 0;
6119 next_i = first_fmac + 4;
6120 }
6121 }
6122 break;
6123
6124 case 3:
6125 abort (); /* Should be unreachable. */
6126 }
6127
6128 if (state == 3)
6129 {
21d799b5
NC		 6130 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6131 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e
JB		 6132 int errcount;
6133
6134 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
6135
6136 newerr->u.b.vfp_insn = veneer_of_insn;
6137
6138 switch (span_type)
6139 {
6140 case 'a':
6141 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6142 break;
906e58ca 6143
c7b8f16e
JB		 6144 default:
6145 abort ();
6146 }
6147
6148 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6149 first_fmac);
6150
6151 newerr->vma = -1;
6152
6153 newerr->next = sec_data->erratumlist;
6154 sec_data->erratumlist = newerr;
6155
6156 state = 0;
6157 }
6158
6159 i = next_i;
6160 }
6161 }
906e58ca 6162
c7b8f16e
JB		 6163 if (contents != NULL
6164 && elf_section_data (sec)->this_hdr.contents != contents)
6165 free (contents);
6166 contents = NULL;
6167 }
6168
6169 return TRUE;
6170
6171error_return:
6172 if (contents != NULL
6173 && elf_section_data (sec)->this_hdr.contents != contents)
6174 free (contents);
906e58ca 6175
c7b8f16e
JB		 6176 return FALSE;
6177}
6178
6179/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6180 after sections have been laid out, using specially-named symbols. */
6181
6182void
6183bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6184 struct bfd_link_info *link_info)
6185{
6186 asection *sec;
6187 struct elf32_arm_link_hash_table *globals;
6188 char *tmp_name;
906e58ca 6189
c7b8f16e
JB		 6190 if (link_info->relocatable)
6191 return;
2e6030b9
MS		 6192
6193 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6194 if (! is_arm_elf (abfd))
2e6030b9
MS		 6195 return;
6196
c7b8f16e 6197 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6198 if (globals == NULL)
6199 return;
906e58ca 6200
21d799b5
NC		 6201 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6202 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6203
6204 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6205 {
6206 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6207 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6208
c7b8f16e
JB		 6209 for (; errnode != NULL; errnode = errnode->next)
6210 {
6211 struct elf_link_hash_entry *myh;
6212 bfd_vma vma;
6213
6214 switch (errnode->type)
6215 {
6216 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6217 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6218 /* Find veneer symbol. */
6219 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6220 errnode->u.b.veneer->u.v.id);
6221
6222 myh = elf_link_hash_lookup
6223 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6224
6225 if (myh == NULL)
6226 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6227 "`%s'"), abfd, tmp_name);
6228
6229 vma = myh->root.u.def.section->output_section->vma
6230 + myh->root.u.def.section->output_offset
6231 + myh->root.u.def.value;
6232
6233 errnode->u.b.veneer->vma = vma;
6234 break;
6235
6236 case VFP11_ERRATUM_ARM_VENEER:
6237 case VFP11_ERRATUM_THUMB_VENEER:
6238 /* Find return location. */
6239 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6240 errnode->u.v.id);
6241
6242 myh = elf_link_hash_lookup
6243 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6244
6245 if (myh == NULL)
6246 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6247 "`%s'"), abfd, tmp_name);
6248
6249 vma = myh->root.u.def.section->output_section->vma
6250 + myh->root.u.def.section->output_offset
6251 + myh->root.u.def.value;
6252
6253 errnode->u.v.branch->vma = vma;
6254 break;
906e58ca 6255
c7b8f16e
JB		 6256 default:
6257 abort ();
6258 }
6259 }
6260 }
906e58ca 6261
c7b8f16e
JB		 6262 free (tmp_name);
6263}
6264
6265
eb043451
PB		 6266/* Set target relocation values needed during linking. */
6267
6268void
bf21ed78
MS		 6269bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6270 struct bfd_link_info *link_info,
eb043451 6271 int target1_is_rel,
319850b4 6272 char * target2_type,
33bfe774 6273 int fix_v4bx,
c7b8f16e 6274 int use_blx,
bf21ed78 6275 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6276 int no_enum_warn, int no_wchar_warn,
48229727 6277 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6278{
6279 struct elf32_arm_link_hash_table *globals;
6280
6281 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6282 if (globals == NULL)
6283 return;
eb043451
PB		 6284
6285 globals->target1_is_rel = target1_is_rel;
6286 if (strcmp (target2_type, "rel") == 0)
6287 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6288 else if (strcmp (target2_type, "abs") == 0)
6289 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6290 else if (strcmp (target2_type, "got-rel") == 0)
6291 globals->target2_reloc = R_ARM_GOT_PREL;
6292 else
6293 {
6294 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6295 target2_type);
6296 }
319850b4 6297 globals->fix_v4bx = fix_v4bx;
33bfe774 6298 globals->use_blx |= use_blx;
c7b8f16e 6299 globals->vfp11_fix = vfp11_fix;
27e55c4d 6300 globals->pic_veneer = pic_veneer;
48229727 6301 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6302
0ffa91dd
NC		 6303 BFD_ASSERT (is_arm_elf (output_bfd));
6304 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6305 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6306}
eb043451 6307
12a0a0fd 6308/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6309
12a0a0fd
PB		 6310static void
6311insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6312{
6313 bfd_vma upper;
6314 bfd_vma lower;
6315 int reloc_sign;
6316
6317 BFD_ASSERT ((offset & 1) == 0);
6318
6319 upper = bfd_get_16 (abfd, insn);
6320 lower = bfd_get_16 (abfd, insn + 2);
6321 reloc_sign = (offset < 0) ? 1 : 0;
6322 upper = (upper & ~(bfd_vma) 0x7ff)
6323 | ((offset >> 12) & 0x3ff)
6324 | (reloc_sign << 10);
906e58ca 6325 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6326 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6327 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6328 | ((offset >> 1) & 0x7ff);
6329 bfd_put_16 (abfd, upper, insn);
6330 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6331}
6332
9b485d32
NC		 6333/* Thumb code calling an ARM function. */
6334
252b5132 6335static int
57e8b36a
NC		 6336elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6337 const char * name,
6338 bfd * input_bfd,
6339 bfd * output_bfd,
6340 asection * input_section,
6341 bfd_byte * hit_data,
6342 asection * sym_sec,
6343 bfd_vma offset,
6344 bfd_signed_vma addend,
f2a9dd69
DJ		 6345 bfd_vma val,
6346 char **error_message)
252b5132 6347{
bcbdc74c 6348 asection * s = 0;
dc810e39 6349 bfd_vma my_offset;
252b5132 6350 long int ret_offset;
bcbdc74c
NC		 6351 struct elf_link_hash_entry * myh;
6352 struct elf32_arm_link_hash_table * globals;
252b5132 6353
f2a9dd69 6354 myh = find_thumb_glue (info, name, error_message);
252b5132 6355 if (myh == NULL)
b34976b6 6356 return FALSE;
252b5132
RH		 6357
6358 globals = elf32_arm_hash_table (info);
252b5132
RH		 6359 BFD_ASSERT (globals != NULL);
6360 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6361
6362 my_offset = myh->root.u.def.value;
6363
6364 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6365 THUMB2ARM_GLUE_SECTION_NAME);
6366
6367 BFD_ASSERT (s != NULL);
6368 BFD_ASSERT (s->contents != NULL);
6369 BFD_ASSERT (s->output_section != NULL);
6370
6371 if ((my_offset & 0x01) == 0x01)
6372 {
6373 if (sym_sec != NULL
6374 && sym_sec->owner != NULL
6375 && !INTERWORK_FLAG (sym_sec->owner))
6376 {
8f615d07 6377 (*_bfd_error_handler)
d003868e
AM		 6378 (_("%B(%s): warning: interworking not enabled.\n"
6379 " first occurrence: %B: thumb call to arm"),
6380 sym_sec->owner, input_bfd, name);
252b5132 6381
b34976b6 6382 return FALSE;
252b5132
RH		 6383 }
6384
6385 --my_offset;
6386 myh->root.u.def.value = my_offset;
6387
52ab56c2
PB		 6388 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6389 s->contents + my_offset);
252b5132 6390
52ab56c2
PB		 6391 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6392 s->contents + my_offset + 2);
252b5132
RH		 6393
6394 ret_offset =
9b485d32
NC		 6395 /* Address of destination of the stub. */
6396 ((bfd_signed_vma) val)
252b5132 6397 - ((bfd_signed_vma)
57e8b36a
NC		 6398 /* Offset from the start of the current section
6399 to the start of the stubs. */
9b485d32
NC		 6400 (s->output_offset
6401 /* Offset of the start of this stub from the start of the stubs. */
6402 + my_offset
6403 /* Address of the start of the current section. */
6404 + s->output_section->vma)
6405 /* The branch instruction is 4 bytes into the stub. */
6406 + 4
6407 /* ARM branches work from the pc of the instruction + 8. */
6408 + 8);
252b5132 6409
52ab56c2
PB		 6410 put_arm_insn (globals, output_bfd,
6411 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6412 s->contents + my_offset + 4);
252b5132
RH		 6413 }
6414
6415 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6416
427bfd90
NC		 6417 /* Now go back and fix up the original BL insn to point to here. */
6418 ret_offset =
6419 /* Address of where the stub is located. */
6420 (s->output_section->vma + s->output_offset + my_offset)
6421 /* Address of where the BL is located. */
57e8b36a
NC		 6422 - (input_section->output_section->vma + input_section->output_offset
6423 + offset)
427bfd90
NC		 6424 /* Addend in the relocation. */
6425 - addend
6426 /* Biassing for PC-relative addressing. */
6427 - 8;
252b5132 6428
12a0a0fd 6429 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6430
b34976b6 6431 return TRUE;
252b5132
RH		 6432}
6433
a4fd1a8e 6434/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6435
a4fd1a8e
PB		 6436static struct elf_link_hash_entry *
6437elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6438 const char * name,
6439 bfd * input_bfd,
6440 bfd * output_bfd,
6441 asection * sym_sec,
6442 bfd_vma val,
8029a119
NC		 6443 asection * s,
6444 char ** error_message)
252b5132 6445{
dc810e39 6446 bfd_vma my_offset;
252b5132 6447 long int ret_offset;
bcbdc74c
NC		 6448 struct elf_link_hash_entry * myh;
6449 struct elf32_arm_link_hash_table * globals;
252b5132 6450
f2a9dd69 6451 myh = find_arm_glue (info, name, error_message);
252b5132 6452 if (myh == NULL)
a4fd1a8e 6453 return NULL;
252b5132
RH		 6454
6455 globals = elf32_arm_hash_table (info);
252b5132
RH		 6456 BFD_ASSERT (globals != NULL);
6457 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6458
6459 my_offset = myh->root.u.def.value;
252b5132
RH		 6460
6461 if ((my_offset & 0x01) == 0x01)
6462 {
6463 if (sym_sec != NULL
6464 && sym_sec->owner != NULL
6465 && !INTERWORK_FLAG (sym_sec->owner))
6466 {
8f615d07 6467 (*_bfd_error_handler)
d003868e
AM		 6468 (_("%B(%s): warning: interworking not enabled.\n"
6469 " first occurrence: %B: arm call to thumb"),
6470 sym_sec->owner, input_bfd, name);
252b5132 6471 }
9b485d32 6472
252b5132
RH		 6473 --my_offset;
6474 myh->root.u.def.value = my_offset;
6475
27e55c4d
PB		 6476 if (info->shared || globals->root.is_relocatable_executable
6477 || globals->pic_veneer)
8f6277f5
PB		 6478 {
6479 /* For relocatable objects we can't use absolute addresses,
6480 so construct the address from a relative offset. */
6481 /* TODO: If the offset is small it's probably worth
6482 constructing the address with adds. */
52ab56c2
PB		 6483 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6484 s->contents + my_offset);
6485 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6486 s->contents + my_offset + 4);
6487 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6488 s->contents + my_offset + 8);
8f6277f5
PB		 6489 /* Adjust the offset by 4 for the position of the add,
6490 and 8 for the pipeline offset. */
6491 ret_offset = (val - (s->output_offset
6492 + s->output_section->vma
6493 + my_offset + 12))
6494 | 1;
6495 bfd_put_32 (output_bfd, ret_offset,
6496 s->contents + my_offset + 12);
6497 }
26079076
PB		 6498 else if (globals->use_blx)
6499 {
6500 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6501 s->contents + my_offset);
6502
6503 /* It's a thumb address. Add the low order bit. */
6504 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6505 s->contents + my_offset + 4);
6506 }
8f6277f5
PB		 6507 else
6508 {
52ab56c2
PB		 6509 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6510 s->contents + my_offset);
252b5132 6511
52ab56c2
PB		 6512 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6513 s->contents + my_offset + 4);
252b5132 6514
8f6277f5
PB		 6515 /* It's a thumb address. Add the low order bit. */
6516 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6517 s->contents + my_offset + 8);
8029a119
NC		 6518
6519 my_offset += 12;
8f6277f5 6520 }
252b5132
RH		 6521 }
6522
6523 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6524
a4fd1a8e
PB		 6525 return myh;
6526}
6527
6528/* Arm code calling a Thumb function. */
6529
6530static int
6531elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6532 const char * name,
6533 bfd * input_bfd,
6534 bfd * output_bfd,
6535 asection * input_section,
6536 bfd_byte * hit_data,
6537 asection * sym_sec,
6538 bfd_vma offset,
6539 bfd_signed_vma addend,
f2a9dd69
DJ		 6540 bfd_vma val,
6541 char **error_message)
a4fd1a8e
PB		 6542{
6543 unsigned long int tmp;
6544 bfd_vma my_offset;
6545 asection * s;
6546 long int ret_offset;
6547 struct elf_link_hash_entry * myh;
6548 struct elf32_arm_link_hash_table * globals;
6549
6550 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6551 BFD_ASSERT (globals != NULL);
6552 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6553
6554 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6555 ARM2THUMB_GLUE_SECTION_NAME);
6556 BFD_ASSERT (s != NULL);
6557 BFD_ASSERT (s->contents != NULL);
6558 BFD_ASSERT (s->output_section != NULL);
6559
6560 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6561 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6562 if (!myh)
6563 return FALSE;
6564
6565 my_offset = myh->root.u.def.value;
252b5132
RH		 6566 tmp = bfd_get_32 (input_bfd, hit_data);
6567 tmp = tmp & 0xFF000000;
6568
9b485d32 6569 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6570 ret_offset = (s->output_offset
6571 + my_offset
6572 + s->output_section->vma
6573 - (input_section->output_offset
6574 + input_section->output_section->vma
6575 + offset + addend)
6576 - 8);
9a5aca8c 6577
252b5132
RH		 6578 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6579
dc810e39 6580 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6581
b34976b6 6582 return TRUE;
252b5132
RH		 6583}
6584
a4fd1a8e
PB		 6585/* Populate Arm stub for an exported Thumb function. */
6586
6587static bfd_boolean
6588elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6589{
6590 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6591 asection * s;
6592 struct elf_link_hash_entry * myh;
6593 struct elf32_arm_link_hash_entry *eh;
6594 struct elf32_arm_link_hash_table * globals;
6595 asection *sec;
6596 bfd_vma val;
f2a9dd69 6597 char *error_message;
a4fd1a8e 6598
906e58ca 6599 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6600 /* Allocate stubs for exported Thumb functions on v4t. */
6601 if (eh->export_glue == NULL)
6602 return TRUE;
6603
6604 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6605 BFD_ASSERT (globals != NULL);
6606 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6607
6608 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6609 ARM2THUMB_GLUE_SECTION_NAME);
6610 BFD_ASSERT (s != NULL);
6611 BFD_ASSERT (s->contents != NULL);
6612 BFD_ASSERT (s->output_section != NULL);
6613
6614 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6615
6616 BFD_ASSERT (sec->output_section != NULL);
6617
a4fd1a8e
PB		 6618 val = eh->export_glue->root.u.def.value + sec->output_offset
6619 + sec->output_section->vma;
8029a119 6620
a4fd1a8e
PB		 6621 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6622 h->root.u.def.section->owner,
f2a9dd69
DJ		 6623 globals->obfd, sec, val, s,
6624 &error_message);
a4fd1a8e
PB		 6625 BFD_ASSERT (myh);
6626 return TRUE;
6627}
6628
845b51d6
PB		 6629/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6630
6631static bfd_vma
6632elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6633{
6634 bfd_byte *p;
6635 bfd_vma glue_addr;
6636 asection *s;
6637 struct elf32_arm_link_hash_table *globals;
6638
6639 globals = elf32_arm_hash_table (info);
845b51d6
PB		 6640 BFD_ASSERT (globals != NULL);
6641 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6642
6643 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6644 ARM_BX_GLUE_SECTION_NAME);
6645 BFD_ASSERT (s != NULL);
6646 BFD_ASSERT (s->contents != NULL);
6647 BFD_ASSERT (s->output_section != NULL);
6648
6649 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6650
6651 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6652
6653 if ((globals->bx_glue_offset[reg] & 1) == 0)
6654 {
6655 p = s->contents + glue_addr;
6656 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6657 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6658 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6659 globals->bx_glue_offset[reg] |= 1;
6660 }
6661
6662 return glue_addr + s->output_section->vma + s->output_offset;
6663}
6664
a4fd1a8e
PB		 6665/* Generate Arm stubs for exported Thumb symbols. */
6666static void
906e58ca 6667elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6668 struct bfd_link_info *link_info)
6669{
6670 struct elf32_arm_link_hash_table * globals;
6671
8029a119
NC		 6672 if (link_info == NULL)
6673 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6674 return;
6675
6676 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6677 if (globals == NULL)
6678 return;
6679
84c08195
PB		 6680 /* If blx is available then exported Thumb symbols are OK and there is
6681 nothing to do. */
a4fd1a8e
PB		 6682 if (globals->use_blx)
6683 return;
6684
6685 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6686 link_info);
6687}
6688
eb043451
PB		 6689/* Some relocations map to different relocations depending on the
6690 target. Return the real relocation. */
8029a119 6691
eb043451
PB		 6692static int
6693arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6694 int r_type)
6695{
6696 switch (r_type)
6697 {
6698 case R_ARM_TARGET1:
6699 if (globals->target1_is_rel)
6700 return R_ARM_REL32;
6701 else
6702 return R_ARM_ABS32;
6703
6704 case R_ARM_TARGET2:
6705 return globals->target2_reloc;
6706
6707 default:
6708 return r_type;
6709 }
6710}
eb043451 6711
ba93b8ac
DJ		 6712/* Return the base VMA address which should be subtracted from real addresses
6713 when resolving @dtpoff relocation.
6714 This is PT_TLS segment p_vaddr. */
6715
6716static bfd_vma
6717dtpoff_base (struct bfd_link_info *info)
6718{
6719 /* If tls_sec is NULL, we should have signalled an error already. */
6720 if (elf_hash_table (info)->tls_sec == NULL)
6721 return 0;
6722 return elf_hash_table (info)->tls_sec->vma;
6723}
6724
6725/* Return the relocation value for @tpoff relocation
6726 if STT_TLS virtual address is ADDRESS. */
6727
6728static bfd_vma
6729tpoff (struct bfd_link_info *info, bfd_vma address)
6730{
6731 struct elf_link_hash_table *htab = elf_hash_table (info);
6732 bfd_vma base;
6733
6734 /* If tls_sec is NULL, we should have signalled an error already. */
6735 if (htab->tls_sec == NULL)
6736 return 0;
6737 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6738 return address - htab->tls_sec->vma + base;
6739}
6740
00a97672
RS		 6741/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6742 VALUE is the relocation value. */
6743
6744static bfd_reloc_status_type
6745elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6746{
6747 if (value > 0xfff)
6748 return bfd_reloc_overflow;
6749
6750 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6751 bfd_put_32 (abfd, value, data);
6752 return bfd_reloc_ok;
6753}
6754
4962c51a
MS		 6755/* For a given value of n, calculate the value of G_n as required to
6756 deal with group relocations. We return it in the form of an
6757 encoded constant-and-rotation, together with the final residual. If n is
6758 specified as less than zero, then final_residual is filled with the
6759 input value and no further action is performed. */
6760
6761static bfd_vma
6762calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6763{
6764 int current_n;
6765 bfd_vma g_n;
6766 bfd_vma encoded_g_n = 0;
6767 bfd_vma residual = value; /* Also known as Y_n. */
6768
6769 for (current_n = 0; current_n <= n; current_n++)
6770 {
6771 int shift;
6772
6773 /* Calculate which part of the value to mask. */
6774 if (residual == 0)
6775 shift = 0;
6776 else
6777 {
6778 int msb;
6779
6780 /* Determine the most significant bit in the residual and
6781 align the resulting value to a 2-bit boundary. */
6782 for (msb = 30; msb >= 0; msb -= 2)
6783 if (residual & (3 << msb))
6784 break;
6785
6786 /* The desired shift is now (msb - 6), or zero, whichever
6787 is the greater. */
6788 shift = msb - 6;
6789 if (shift < 0)
6790 shift = 0;
6791 }
6792
6793 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6794 g_n = residual & (0xff << shift);
6795 encoded_g_n = (g_n >> shift)
6796 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6797
6798 /* Calculate the residual for the next time around. */
6799 residual &= ~g_n;
6800 }
6801
6802 *final_residual = residual;
6803
6804 return encoded_g_n;
6805}
6806
6807/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6808 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6809
4962c51a 6810static int
906e58ca 6811identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6812{
6813 int opcode = insn & 0x1e00000;
6814
6815 if (opcode == 1 << 23) /* ADD */
6816 return 1;
6817
6818 if (opcode == 1 << 22) /* SUB */
6819 return -1;
6820
6821 return 0;
6822}
6823
252b5132 6824/* Perform a relocation as part of a final link. */
9b485d32 6825
252b5132 6826static bfd_reloc_status_type
57e8b36a
NC		 6827elf32_arm_final_link_relocate (reloc_howto_type * howto,
6828 bfd * input_bfd,
6829 bfd * output_bfd,
6830 asection * input_section,
6831 bfd_byte * contents,
6832 Elf_Internal_Rela * rel,
6833 bfd_vma value,
6834 struct bfd_link_info * info,
6835 asection * sym_sec,
6836 const char * sym_name,
6837 int sym_flags,
0945cdfd 6838 struct elf_link_hash_entry * h,
f2a9dd69 6839 bfd_boolean * unresolved_reloc_p,
8029a119 6840 char ** error_message)
252b5132
RH		 6841{
6842 unsigned long r_type = howto->type;
6843 unsigned long r_symndx;
6844 bfd_byte * hit_data = contents + rel->r_offset;
6845 bfd * dynobj = NULL;
6846 Elf_Internal_Shdr * symtab_hdr;
6847 struct elf_link_hash_entry ** sym_hashes;
6848 bfd_vma * local_got_offsets;
6849 asection * sgot = NULL;
6850 asection * splt = NULL;
6851 asection * sreloc = NULL;
252b5132 6852 bfd_vma addend;
ba96a88f
NC		 6853 bfd_signed_vma signed_addend;
6854 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6855
9c504268 6856 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 6857 if (globals == NULL)
6858 return bfd_reloc_notsupported;
9c504268 6859
0ffa91dd
NC		 6860 BFD_ASSERT (is_arm_elf (input_bfd));
6861
6862 /* Some relocation types map to different relocations depending on the
9c504268 6863 target. We pick the right one here. */
eb043451
PB		 6864 r_type = arm_real_reloc_type (globals, r_type);
6865 if (r_type != howto->type)
6866 howto = elf32_arm_howto_from_type (r_type);
9c504268 6867
cac15327
NC		 6868 /* If the start address has been set, then set the EF_ARM_HASENTRY
6869 flag. Setting this more than once is redundant, but the cost is
6870 not too high, and it keeps the code simple.
99e4ae17 6871
cac15327
NC		 6872 The test is done here, rather than somewhere else, because the
6873 start address is only set just before the final link commences.
6874
6875 Note - if the user deliberately sets a start address of 0, the
6876 flag will not be set. */
6877 if (bfd_get_start_address (output_bfd) != 0)
6878 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6879
252b5132
RH		 6880 dynobj = elf_hash_table (info)->dynobj;
6881 if (dynobj)
6882 {
6883 sgot = bfd_get_section_by_name (dynobj, ".got");
6884 splt = bfd_get_section_by_name (dynobj, ".plt");
6885 }
0ffa91dd 6886 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6887 sym_hashes = elf_sym_hashes (input_bfd);
6888 local_got_offsets = elf_local_got_offsets (input_bfd);
6889 r_symndx = ELF32_R_SYM (rel->r_info);
6890
4e7fd91e 6891 if (globals->use_rel)
ba96a88f 6892 {
4e7fd91e
PB		 6893 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6894
6895 if (addend & ((howto->src_mask + 1) >> 1))
6896 {
6897 signed_addend = -1;
6898 signed_addend &= ~ howto->src_mask;
6899 signed_addend |= addend;
6900 }
6901 else
6902 signed_addend = addend;
ba96a88f
NC		 6903 }
6904 else
4e7fd91e 6905 addend = signed_addend = rel->r_addend;
f21f3fe0 6906
252b5132
RH		 6907 switch (r_type)
6908 {
6909 case R_ARM_NONE:
28a094c2
DJ		 6910 /* We don't need to find a value for this symbol. It's just a
6911 marker. */
6912 *unresolved_reloc_p = FALSE;
252b5132
RH		 6913 return bfd_reloc_ok;
6914
00a97672
RS		 6915 case R_ARM_ABS12:
6916 if (!globals->vxworks_p)
6917 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6918
252b5132
RH		 6919 case R_ARM_PC24:
6920 case R_ARM_ABS32:
bb224fc3 6921 case R_ARM_ABS32_NOI:
252b5132 6922 case R_ARM_REL32:
bb224fc3 6923 case R_ARM_REL32_NOI:
5b5bb741
PB		 6924 case R_ARM_CALL:
6925 case R_ARM_JUMP24:
dfc5f959 6926 case R_ARM_XPC25:
eb043451 6927 case R_ARM_PREL31:
7359ea65 6928 case R_ARM_PLT32:
7359ea65
DJ		 6929 /* Handle relocations which should use the PLT entry. ABS32/REL32
6930 will use the symbol's value, which may point to a PLT entry, but we
6931 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6932 branches in this object should go to it, except if the PLT is too
6933 far away, in which case a long branch stub should be inserted. */
bb224fc3 6934 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6935 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6936 && r_type != R_ARM_CALL
6937 && r_type != R_ARM_JUMP24
6938 && r_type != R_ARM_PLT32)
7359ea65 6939 && h != NULL
c84cd8ee 6940 && splt != NULL
7359ea65
DJ		 6941 && h->plt.offset != (bfd_vma) -1)
6942 {
c84cd8ee
DJ		 6943 /* If we've created a .plt section, and assigned a PLT entry to
6944 this function, it should not be known to bind locally. If
6945 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6946 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6947
6948 value = (splt->output_section->vma
6949 + splt->output_offset
6950 + h->plt.offset);
0945cdfd 6951 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6952 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6953 contents, rel->r_offset, value,
00a97672 6954 rel->r_addend);
7359ea65
DJ		 6955 }
6956
67687978
PB		 6957 /* When generating a shared object or relocatable executable, these
6958 relocations are copied into the output file to be resolved at
6959 run time. */
6960 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6961 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 6962 && !(globals->vxworks_p
3348747a
NS		 6963 && strcmp (input_section->output_section->name,
6964 ".tls_vars") == 0)
bb224fc3 6965 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6966 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 6967 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 6968 && (h == NULL
6969 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6970 || h->root.type != bfd_link_hash_undefweak)
6971 && r_type != R_ARM_PC24
5b5bb741
PB		 6972 && r_type != R_ARM_CALL
6973 && r_type != R_ARM_JUMP24
ee06dc07 6974 && r_type != R_ARM_PREL31
7359ea65 6975 && r_type != R_ARM_PLT32)
252b5132 6976 {
947216bf
AM		 6977 Elf_Internal_Rela outrel;
6978 bfd_byte *loc;
b34976b6 6979 bfd_boolean skip, relocate;
f21f3fe0 6980
0945cdfd
DJ		 6981 *unresolved_reloc_p = FALSE;
6982
252b5132
RH		 6983 if (sreloc == NULL)
6984 {
83bac4b0
NC		 6985 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6986 ! globals->use_rel);
f21f3fe0 6987
83bac4b0 6988 if (sreloc == NULL)
252b5132 6989 return bfd_reloc_notsupported;
252b5132 6990 }
f21f3fe0 6991
b34976b6
AM		 6992 skip = FALSE;
6993 relocate = FALSE;
f21f3fe0 6994
00a97672 6995 outrel.r_addend = addend;
c629eae0
JJ		 6996 outrel.r_offset =
6997 _bfd_elf_section_offset (output_bfd, info, input_section,
6998 rel->r_offset);
6999 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 7000 skip = TRUE;
0bb2d96a 7001 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 7002 skip = TRUE, relocate = TRUE;
252b5132
RH		 7003 outrel.r_offset += (input_section->output_section->vma
7004 + input_section->output_offset);
f21f3fe0 7005
252b5132 7006 if (skip)
0bb2d96a 7007 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 7008 else if (h != NULL
7009 && h->dynindx != -1
7359ea65 7010 && (!info->shared
5e681ec4 7011 || !info->symbolic
f5385ebf 7012 || !h->def_regular))
5e681ec4 7013 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 7014 else
7015 {
a16385dc
MM		 7016 int symbol;
7017
5e681ec4 7018 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 7019 if (sym_flags == STT_ARM_TFUNC)
7020 value |= 1;
a16385dc 7021 if (globals->symbian_p)
6366ff1e 7022 {
74541ad4
AM		 7023 asection *osec;
7024
6366ff1e
MM		 7025 /* On Symbian OS, the data segment and text segement
7026 can be relocated independently. Therefore, we
7027 must indicate the segment to which this
7028 relocation is relative. The BPABI allows us to
7029 use any symbol in the right segment; we just use
7030 the section symbol as it is convenient. (We
7031 cannot use the symbol given by "h" directly as it
74541ad4
AM		 7032 will not appear in the dynamic symbol table.)
7033
7034 Note that the dynamic linker ignores the section
7035 symbol value, so we don't subtract osec->vma
7036 from the emitted reloc addend. */
10dbd1f3 7037 if (sym_sec)
74541ad4 7038 osec = sym_sec->output_section;
10dbd1f3 7039 else
74541ad4
AM		 7040 osec = input_section->output_section;
7041 symbol = elf_section_data (osec)->dynindx;
7042 if (symbol == 0)
7043 {
7044 struct elf_link_hash_table *htab = elf_hash_table (info);
7045
7046 if ((osec->flags & SEC_READONLY) == 0
7047 && htab->data_index_section != NULL)
7048 osec = htab->data_index_section;
7049 else
7050 osec = htab->text_index_section;
7051 symbol = elf_section_data (osec)->dynindx;
7052 }
6366ff1e
MM		 7053 BFD_ASSERT (symbol != 0);
7054 }
a16385dc
MM		 7055 else
7056 /* On SVR4-ish systems, the dynamic loader cannot
7057 relocate the text and data segments independently,
7058 so the symbol does not matter. */
7059 symbol = 0;
7060 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 7061 if (globals->use_rel)
7062 relocate = TRUE;
7063 else
7064 outrel.r_addend += value;
252b5132 7065 }
f21f3fe0 7066
947216bf 7067 loc = sreloc->contents;
00a97672
RS		 7068 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
7069 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 7070
f21f3fe0 7071 /* If this reloc is against an external symbol, we do not want to
252b5132 7072 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 7073 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 7074 if (! relocate)
7075 return bfd_reloc_ok;
9a5aca8c 7076
f21f3fe0 7077 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 7078 contents, rel->r_offset, value,
7079 (bfd_vma) 0);
7080 }
7081 else switch (r_type)
7082 {
00a97672
RS		 7083 case R_ARM_ABS12:
7084 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7085
dfc5f959 7086 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 7087 case R_ARM_CALL:
7088 case R_ARM_JUMP24:
8029a119 7089 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 7090 case R_ARM_PLT32:
906e58ca 7091 {
906e58ca
NC		 7092 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7093
dfc5f959 7094 if (r_type == R_ARM_XPC25)
252b5132 7095 {
dfc5f959
NC		 7096 /* Check for Arm calling Arm function. */
7097 /* FIXME: Should we translate the instruction into a BL
7098 instruction instead ? */
7099 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 7100 (*_bfd_error_handler)
7101 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7102 input_bfd,
7103 h ? h->root.root.string : "(local)");
dfc5f959 7104 }
155d87d7 7105 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7106 {
7107 /* Check for Arm calling Thumb function. */
7108 if (sym_flags == STT_ARM_TFUNC)
7109 {
f2a9dd69
DJ		 7110 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7111 output_bfd, input_section,
7112 hit_data, sym_sec, rel->r_offset,
7113 signed_addend, value,
7114 error_message))
7115 return bfd_reloc_ok;
7116 else
7117 return bfd_reloc_dangerous;
dfc5f959 7118 }
252b5132 7119 }
ba96a88f 7120
906e58ca 7121 /* Check if a stub has to be inserted because the
8029a119 7122 destination is too far or we are changing mode. */
155d87d7
CL		 7123 if ( r_type == R_ARM_CALL
7124 || r_type == R_ARM_JUMP24
7125 || r_type == R_ARM_PLT32)
906e58ca 7126 {
fe33d2fa
CL		 7127 enum elf32_arm_stub_type stub_type = arm_stub_none;
7128 struct elf32_arm_link_hash_entry *hash;
7129
7130 hash = (struct elf32_arm_link_hash_entry *) h;
7131 stub_type = arm_type_of_stub (info, input_section, rel,
7132 &sym_flags, hash,
7133 value, sym_sec,
7134 input_bfd, sym_name);
5fa9e92f 7135
fe33d2fa 7136 if (stub_type != arm_stub_none)
906e58ca
NC		 7137 {
7138 /* The target is out of reach, so redirect the
7139 branch to the local stub for this function. */
7140
7141 stub_entry = elf32_arm_get_stub_entry (input_section,
7142 sym_sec, h,
fe33d2fa
CL		 7143 rel, globals,
7144 stub_type);
906e58ca
NC		 7145 if (stub_entry != NULL)
7146 value = (stub_entry->stub_offset
7147 + stub_entry->stub_sec->output_offset
7148 + stub_entry->stub_sec->output_section->vma);
7149 }
fe33d2fa
CL		 7150 else
7151 {
7152 /* If the call goes through a PLT entry, make sure to
7153 check distance to the right destination address. */
7154 if (h != NULL
7155 && splt != NULL
7156 && h->plt.offset != (bfd_vma) -1)
7157 {
7158 value = (splt->output_section->vma
7159 + splt->output_offset
7160 + h->plt.offset);
7161 *unresolved_reloc_p = FALSE;
7162 /* The PLT entry is in ARM mode, regardless of the
7163 target function. */
7164 sym_flags = STT_FUNC;
7165 }
7166 }
906e58ca
NC		 7167 }
7168
dea514f5
PB		 7169 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7170 where:
7171 S is the address of the symbol in the relocation.
7172 P is address of the instruction being relocated.
7173 A is the addend (extracted from the instruction) in bytes.
7174
7175 S is held in 'value'.
7176 P is the base address of the section containing the
7177 instruction plus the offset of the reloc into that
7178 section, ie:
7179 (input_section->output_section->vma +
7180 input_section->output_offset +
7181 rel->r_offset).
7182 A is the addend, converted into bytes, ie:
7183 (signed_addend * 4)
7184
7185 Note: None of these operations have knowledge of the pipeline
7186 size of the processor, thus it is up to the assembler to
7187 encode this information into the addend. */
7188 value -= (input_section->output_section->vma
7189 + input_section->output_offset);
7190 value -= rel->r_offset;
4e7fd91e
PB		 7191 if (globals->use_rel)
7192 value += (signed_addend << howto->size);
7193 else
7194 /* RELA addends do not have to be adjusted by howto->size. */
7195 value += signed_addend;
23080146 7196
dcb5e6e6
NC		 7197 signed_addend = value;
7198 signed_addend >>= howto->rightshift;
9a5aca8c 7199
5ab79981 7200 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7201 the next instruction unless a PLT entry will be created.
cd1dac3d
DG		 7202 Do the same for local undefined symbols.
7203 The jump to the next instruction is optimized as a NOP depending
7204 on the architecture. */
ffcb4889
NS		 7205 if (h ? (h->root.type == bfd_link_hash_undefweak
7206 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7207 : bfd_is_und_section (sym_sec))
5ab79981 7208 {
cd1dac3d
DG		 7209 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7210
7211 if (arch_has_arm_nop (globals))
7212 value |= 0x0320f000;
7213 else
7214 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7215 }
7216 else
59f2c4e7 7217 {
9b485d32 7218 /* Perform a signed range check. */
dcb5e6e6 7219 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7220 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7221 return bfd_reloc_overflow;
9a5aca8c 7222
5ab79981 7223 addend = (value & 2);
39b41c9c 7224
5ab79981
PB		 7225 value = (signed_addend & howto->dst_mask)
7226 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7227
5ab79981
PB		 7228 if (r_type == R_ARM_CALL)
7229 {
155d87d7
CL		 7230 /* Set the H bit in the BLX instruction. */
7231 if (sym_flags == STT_ARM_TFUNC)
7232 {
7233 if (addend)
7234 value |= (1 << 24);
7235 else
7236 value &= ~(bfd_vma)(1 << 24);
7237 }
7238
5ab79981 7239 /* Select the correct instruction (BL or BLX). */
906e58ca 7240 /* Only if we are not handling a BL to a stub. In this
8029a119 7241 case, mode switching is performed by the stub. */
906e58ca 7242 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7243 value |= (1 << 28);
7244 else
7245 {
7246 value &= ~(bfd_vma)(1 << 28);
7247 value |= (1 << 24);
7248 }
39b41c9c
PB		 7249 }
7250 }
906e58ca 7251 }
252b5132 7252 break;
f21f3fe0 7253
252b5132
RH		 7254 case R_ARM_ABS32:
7255 value += addend;
7256 if (sym_flags == STT_ARM_TFUNC)
7257 value |= 1;
7258 break;
f21f3fe0 7259
bb224fc3
MS		 7260 case R_ARM_ABS32_NOI:
7261 value += addend;
7262 break;
7263
252b5132 7264 case R_ARM_REL32:
a8bc6c78
PB		 7265 value += addend;
7266 if (sym_flags == STT_ARM_TFUNC)
7267 value |= 1;
252b5132 7268 value -= (input_section->output_section->vma
62efb346 7269 + input_section->output_offset + rel->r_offset);
252b5132 7270 break;
eb043451 7271
bb224fc3
MS		 7272 case R_ARM_REL32_NOI:
7273 value += addend;
7274 value -= (input_section->output_section->vma
7275 + input_section->output_offset + rel->r_offset);
7276 break;
7277
eb043451
PB		 7278 case R_ARM_PREL31:
7279 value -= (input_section->output_section->vma
7280 + input_section->output_offset + rel->r_offset);
7281 value += signed_addend;
7282 if (! h || h->root.type != bfd_link_hash_undefweak)
7283 {
8029a119 7284 /* Check for overflow. */
eb043451
PB		 7285 if ((value ^ (value >> 1)) & (1 << 30))
7286 return bfd_reloc_overflow;
7287 }
7288 value &= 0x7fffffff;
7289 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7290 if (sym_flags == STT_ARM_TFUNC)
7291 value |= 1;
7292 break;
252b5132 7293 }
f21f3fe0 7294
252b5132
RH		 7295 bfd_put_32 (input_bfd, value, hit_data);
7296 return bfd_reloc_ok;
7297
7298 case R_ARM_ABS8:
7299 value += addend;
4e67d4ca
DG		 7300
7301 /* There is no way to tell whether the user intended to use a signed or
7302 unsigned addend. When checking for overflow we accept either,
7303 as specified by the AAELF. */
7304 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 7305 return bfd_reloc_overflow;
7306
7307 bfd_put_8 (input_bfd, value, hit_data);
7308 return bfd_reloc_ok;
7309
7310 case R_ARM_ABS16:
7311 value += addend;
7312
4e67d4ca
DG		 7313 /* See comment for R_ARM_ABS8. */
7314 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 7315 return bfd_reloc_overflow;
7316
7317 bfd_put_16 (input_bfd, value, hit_data);
7318 return bfd_reloc_ok;
7319
252b5132 7320 case R_ARM_THM_ABS5:
9b485d32 7321 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7322 if (globals->use_rel)
7323 {
7324 /* Need to refetch addend. */
7325 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7326 /* ??? Need to determine shift amount from operand size. */
7327 addend >>= howto->rightshift;
7328 }
252b5132
RH		 7329 value += addend;
7330
7331 /* ??? Isn't value unsigned? */
7332 if ((long) value > 0x1f || (long) value < -0x10)
7333 return bfd_reloc_overflow;
7334
7335 /* ??? Value needs to be properly shifted into place first. */
7336 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7337 bfd_put_16 (input_bfd, value, hit_data);
7338 return bfd_reloc_ok;
7339
2cab6cc3
MS		 7340 case R_ARM_THM_ALU_PREL_11_0:
7341 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7342 {
7343 bfd_vma insn;
7344 bfd_signed_vma relocation;
7345
7346 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7347 | bfd_get_16 (input_bfd, hit_data + 2);
7348
7349 if (globals->use_rel)
7350 {
7351 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7352 | ((insn & (1 << 26)) >> 15);
7353 if (insn & 0xf00000)
7354 signed_addend = -signed_addend;
7355 }
7356
7357 relocation = value + signed_addend;
7358 relocation -= (input_section->output_section->vma
7359 + input_section->output_offset
7360 + rel->r_offset);
7361
7362 value = abs (relocation);
7363
7364 if (value >= 0x1000)
7365 return bfd_reloc_overflow;
7366
7367 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7368 | ((value & 0x700) << 4)
7369 | ((value & 0x800) << 15);
7370 if (relocation < 0)
7371 insn |= 0xa00000;
7372
7373 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7374 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7375
7376 return bfd_reloc_ok;
7377 }
7378
e1ec24c6
NC		 7379 case R_ARM_THM_PC8:
7380 /* PR 10073: This reloc is not generated by the GNU toolchain,
7381 but it is supported for compatibility with third party libraries
7382 generated by other compilers, specifically the ARM/IAR. */
7383 {
7384 bfd_vma insn;
7385 bfd_signed_vma relocation;
7386
7387 insn = bfd_get_16 (input_bfd, hit_data);
7388
7389 if (globals->use_rel)
7390 addend = (insn & 0x00ff) << 2;
7391
7392 relocation = value + addend;
7393 relocation -= (input_section->output_section->vma
7394 + input_section->output_offset
7395 + rel->r_offset);
7396
7397 value = abs (relocation);
7398
7399 /* We do not check for overflow of this reloc. Although strictly
7400 speaking this is incorrect, it appears to be necessary in order
7401 to work with IAR generated relocs. Since GCC and GAS do not
7402 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7403 a problem for them. */
7404 value &= 0x3fc;
7405
7406 insn = (insn & 0xff00) | (value >> 2);
7407
7408 bfd_put_16 (input_bfd, insn, hit_data);
7409
7410 return bfd_reloc_ok;
7411 }
7412
2cab6cc3
MS		 7413 case R_ARM_THM_PC12:
7414 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7415 {
7416 bfd_vma insn;
7417 bfd_signed_vma relocation;
7418
7419 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7420 | bfd_get_16 (input_bfd, hit_data + 2);
7421
7422 if (globals->use_rel)
7423 {
7424 signed_addend = insn & 0xfff;
7425 if (!(insn & (1 << 23)))
7426 signed_addend = -signed_addend;
7427 }
7428
7429 relocation = value + signed_addend;
7430 relocation -= (input_section->output_section->vma
7431 + input_section->output_offset
7432 + rel->r_offset);
7433
7434 value = abs (relocation);
7435
7436 if (value >= 0x1000)
7437 return bfd_reloc_overflow;
7438
7439 insn = (insn & 0xff7ff000) | value;
7440 if (relocation >= 0)
7441 insn |= (1 << 23);
7442
7443 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7444 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7445
7446 return bfd_reloc_ok;
7447 }
7448
dfc5f959 7449 case R_ARM_THM_XPC22:
c19d1205 7450 case R_ARM_THM_CALL:
bd97cb95 7451 case R_ARM_THM_JUMP24:
dfc5f959 7452 /* Thumb BL (branch long instruction). */
252b5132 7453 {
b34976b6 7454 bfd_vma relocation;
e95de063 7455 bfd_vma reloc_sign;
b34976b6
AM		 7456 bfd_boolean overflow = FALSE;
7457 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7458 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7459 bfd_signed_vma reloc_signed_max;
7460 bfd_signed_vma reloc_signed_min;
b34976b6 7461 bfd_vma check;
252b5132 7462 bfd_signed_vma signed_check;
e95de063 7463 int bitsize;
cd1dac3d 7464 const int thumb2 = using_thumb2 (globals);
252b5132 7465
5ab79981 7466 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7467 the next instruction unless a PLT entry will be created.
7468 The jump to the next instruction is optimized as a NOP.W for
7469 Thumb-2 enabled architectures. */
19540007
JM		 7470 if (h && h->root.type == bfd_link_hash_undefweak
7471 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7472 {
cd1dac3d
DG		 7473 if (arch_has_thumb2_nop (globals))
7474 {
7475 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7476 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7477 }
7478 else
7479 {
7480 bfd_put_16 (input_bfd, 0xe000, hit_data);
7481 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7482 }
5ab79981
PB		 7483 return bfd_reloc_ok;
7484 }
7485
e95de063
MS		 7486 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7487 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7488 if (globals->use_rel)
7489 {
e95de063
MS		 7490 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7491 bfd_vma upper = upper_insn & 0x3ff;
7492 bfd_vma lower = lower_insn & 0x7ff;
7493 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7494 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7495 bfd_vma i1 = j1 ^ s ? 0 : 1;
7496 bfd_vma i2 = j2 ^ s ? 0 : 1;
7497
7498 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7499 /* Sign extend. */
7500 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7501
4e7fd91e
PB		 7502 signed_addend = addend;
7503 }
cb1afa5c 7504
dfc5f959
NC		 7505 if (r_type == R_ARM_THM_XPC22)
7506 {
7507 /* Check for Thumb to Thumb call. */
7508 /* FIXME: Should we translate the instruction into a BL
7509 instruction instead ? */
7510 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7511 (*_bfd_error_handler)
7512 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7513 input_bfd,
7514 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7515 }
7516 else
252b5132 7517 {
dfc5f959
NC		 7518 /* If it is not a call to Thumb, assume call to Arm.
7519 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7520 function call at all, but rather a long jump. Calls through
7521 the PLT do not require stubs. */
7522 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7523 && (h == NULL || splt == NULL
7524 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7525 {
bd97cb95 7526 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7527 {
7528 /* Convert BL to BLX. */
7529 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7530 }
155d87d7
CL		 7531 else if (( r_type != R_ARM_THM_CALL)
7532 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7533 {
7534 if (elf32_thumb_to_arm_stub
7535 (info, sym_name, input_bfd, output_bfd, input_section,
7536 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7537 error_message))
7538 return bfd_reloc_ok;
7539 else
7540 return bfd_reloc_dangerous;
7541 }
da5938a2 7542 }
bd97cb95
DJ		 7543 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7544 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7545 {
7546 /* Make sure this is a BL. */
7547 lower_insn |= 0x1800;
7548 }
252b5132 7549 }
f21f3fe0 7550
fe33d2fa 7551 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 7552 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7553 {
7554 /* Check if a stub has to be inserted because the destination
8029a119 7555 is too far. */
fe33d2fa
CL		 7556 struct elf32_arm_stub_hash_entry *stub_entry;
7557 struct elf32_arm_link_hash_entry *hash;
7558
7559 hash = (struct elf32_arm_link_hash_entry *) h;
7560
7561 stub_type = arm_type_of_stub (info, input_section, rel,
7562 &sym_flags, hash, value, sym_sec,
7563 input_bfd, sym_name);
7564
7565 if (stub_type != arm_stub_none)
906e58ca
NC		 7566 {
7567 /* The target is out of reach or we are changing modes, so
7568 redirect the branch to the local stub for this
7569 function. */
7570 stub_entry = elf32_arm_get_stub_entry (input_section,
7571 sym_sec, h,
fe33d2fa
CL		 7572 rel, globals,
7573 stub_type);
906e58ca
NC		 7574 if (stub_entry != NULL)
7575 value = (stub_entry->stub_offset
7576 + stub_entry->stub_sec->output_offset
7577 + stub_entry->stub_sec->output_section->vma);
7578
f4ac8484 7579 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7580 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7581 {
7582 if ((stub_entry
7583 && !arm_stub_is_thumb (stub_entry->stub_type))
7584 || (sym_flags != STT_ARM_TFUNC))
7585 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7586 }
906e58ca
NC		 7587 }
7588 }
7589
fe33d2fa
CL		 7590 /* Handle calls via the PLT. */
7591 if (stub_type == arm_stub_none
7592 && h != NULL
7593 && splt != NULL
7594 && h->plt.offset != (bfd_vma) -1)
7595 {
7596 value = (splt->output_section->vma
7597 + splt->output_offset
7598 + h->plt.offset);
7599
7600 if (globals->use_blx && r_type == R_ARM_THM_CALL)
7601 {
7602 /* If the Thumb BLX instruction is available, convert
7603 the BL to a BLX instruction to call the ARM-mode
7604 PLT entry. */
7605 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7606 sym_flags = STT_FUNC;
7607 }
7608 else
7609 {
7610 /* Target the Thumb stub before the ARM PLT entry. */
7611 value -= PLT_THUMB_STUB_SIZE;
7612 sym_flags = STT_ARM_TFUNC;
7613 }
7614 *unresolved_reloc_p = FALSE;
7615 }
7616
ba96a88f 7617 relocation = value + signed_addend;
f21f3fe0 7618
252b5132 7619 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7620 + input_section->output_offset
7621 + rel->r_offset);
9a5aca8c 7622
252b5132
RH		 7623 check = relocation >> howto->rightshift;
7624
7625 /* If this is a signed value, the rightshift just dropped
7626 leading 1 bits (assuming twos complement). */
7627 if ((bfd_signed_vma) relocation >= 0)
7628 signed_check = check;
7629 else
7630 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7631
e95de063
MS		 7632 /* Calculate the permissable maximum and minimum values for
7633 this relocation according to whether we're relocating for
7634 Thumb-2 or not. */
7635 bitsize = howto->bitsize;
7636 if (!thumb2)
7637 bitsize -= 2;
f6ebfac0 7638 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 7639 reloc_signed_min = ~reloc_signed_max;
7640
252b5132 7641 /* Assumes two's complement. */
ba96a88f 7642 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7643 overflow = TRUE;
252b5132 7644
bd97cb95 7645 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7646 /* For a BLX instruction, make sure that the relocation is rounded up
7647 to a word boundary. This follows the semantics of the instruction
7648 which specifies that bit 1 of the target address will come from bit
7649 1 of the base address. */
7650 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7651
e95de063
MS		 7652 /* Put RELOCATION back into the insn. Assumes two's complement.
7653 We use the Thumb-2 encoding, which is safe even if dealing with
7654 a Thumb-1 instruction by virtue of our overflow check above. */
7655 reloc_sign = (signed_check < 0) ? 1 : 0;
7656 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7657 | ((relocation >> 12) & 0x3ff)
7658 | (reloc_sign << 10);
906e58ca 7659 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7660 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7661 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7662 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7663
252b5132
RH		 7664 /* Put the relocated value back in the object file: */
7665 bfd_put_16 (input_bfd, upper_insn, hit_data);
7666 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7667
7668 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7669 }
7670 break;
7671
c19d1205
ZW		 7672 case R_ARM_THM_JUMP19:
7673 /* Thumb32 conditional branch instruction. */
7674 {
7675 bfd_vma relocation;
7676 bfd_boolean overflow = FALSE;
7677 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7678 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7679 bfd_signed_vma reloc_signed_max = 0xffffe;
7680 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7681 bfd_signed_vma signed_check;
7682
7683 /* Need to refetch the addend, reconstruct the top three bits,
7684 and squish the two 11 bit pieces together. */
7685 if (globals->use_rel)
7686 {
7687 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7688 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7689 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7690 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7691 bfd_vma lower = (lower_insn & 0x07ff);
7692
a00a1f35
MS		 7693 upper |= J1 << 6;
7694 upper |= J2 << 7;
7695 upper |= (!S) << 8;
c19d1205
ZW		 7696 upper -= 0x0100; /* Sign extend. */
7697
7698 addend = (upper << 12) | (lower << 1);
7699 signed_addend = addend;
7700 }
7701
bd97cb95
DJ		 7702 /* Handle calls via the PLT. */
7703 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7704 {
7705 value = (splt->output_section->vma
7706 + splt->output_offset
7707 + h->plt.offset);
7708 /* Target the Thumb stub before the ARM PLT entry. */
7709 value -= PLT_THUMB_STUB_SIZE;
7710 *unresolved_reloc_p = FALSE;
7711 }
7712
c19d1205
ZW		 7713 /* ??? Should handle interworking? GCC might someday try to
7714 use this for tail calls. */
7715
7716 relocation = value + signed_addend;
7717 relocation -= (input_section->output_section->vma
7718 + input_section->output_offset
7719 + rel->r_offset);
a00a1f35 7720 signed_check = (bfd_signed_vma) relocation;
c19d1205 7721
c19d1205
ZW		 7722 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7723 overflow = TRUE;
7724
7725 /* Put RELOCATION back into the insn. */
7726 {
7727 bfd_vma S = (relocation & 0x00100000) >> 20;
7728 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7729 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7730 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7731 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7732
a00a1f35 7733 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7734 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7735 }
7736
7737 /* Put the relocated value back in the object file: */
7738 bfd_put_16 (input_bfd, upper_insn, hit_data);
7739 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7740
7741 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7742 }
7743
7744 case R_ARM_THM_JUMP11:
7745 case R_ARM_THM_JUMP8:
7746 case R_ARM_THM_JUMP6:
51c5503b
NC		 7747 /* Thumb B (branch) instruction). */
7748 {
6cf9e9fe 7749 bfd_signed_vma relocation;
51c5503b
NC		 7750 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7751 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7752 bfd_signed_vma signed_check;
7753
c19d1205
ZW		 7754 /* CZB cannot jump backward. */
7755 if (r_type == R_ARM_THM_JUMP6)
7756 reloc_signed_min = 0;
7757
4e7fd91e 7758 if (globals->use_rel)
6cf9e9fe 7759 {
4e7fd91e
PB		 7760 /* Need to refetch addend. */
7761 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7762 if (addend & ((howto->src_mask + 1) >> 1))
7763 {
7764 signed_addend = -1;
7765 signed_addend &= ~ howto->src_mask;
7766 signed_addend |= addend;
7767 }
7768 else
7769 signed_addend = addend;
7770 /* The value in the insn has been right shifted. We need to
7771 undo this, so that we can perform the address calculation
7772 in terms of bytes. */
7773 signed_addend <<= howto->rightshift;
6cf9e9fe 7774 }
6cf9e9fe 7775 relocation = value + signed_addend;
51c5503b
NC		 7776
7777 relocation -= (input_section->output_section->vma
7778 + input_section->output_offset
7779 + rel->r_offset);
7780
6cf9e9fe
NC		 7781 relocation >>= howto->rightshift;
7782 signed_check = relocation;
c19d1205
ZW		 7783
7784 if (r_type == R_ARM_THM_JUMP6)
7785 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7786 else
7787 relocation &= howto->dst_mask;
51c5503b 7788 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7789
51c5503b
NC		 7790 bfd_put_16 (input_bfd, relocation, hit_data);
7791
7792 /* Assumes two's complement. */
7793 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7794 return bfd_reloc_overflow;
7795
7796 return bfd_reloc_ok;
7797 }
cedb70c5 7798
8375c36b
PB		 7799 case R_ARM_ALU_PCREL7_0:
7800 case R_ARM_ALU_PCREL15_8:
7801 case R_ARM_ALU_PCREL23_15:
7802 {
7803 bfd_vma insn;
7804 bfd_vma relocation;
7805
7806 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7807 if (globals->use_rel)
7808 {
7809 /* Extract the addend. */
7810 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7811 signed_addend = addend;
7812 }
8375c36b
PB		 7813 relocation = value + signed_addend;
7814
7815 relocation -= (input_section->output_section->vma
7816 + input_section->output_offset
7817 + rel->r_offset);
7818 insn = (insn & ~0xfff)
7819 | ((howto->bitpos << 7) & 0xf00)
7820 | ((relocation >> howto->bitpos) & 0xff);
7821 bfd_put_32 (input_bfd, value, hit_data);
7822 }
7823 return bfd_reloc_ok;
7824
252b5132
RH		 7825 case R_ARM_GNU_VTINHERIT:
7826 case R_ARM_GNU_VTENTRY:
7827 return bfd_reloc_ok;
7828
c19d1205 7829 case R_ARM_GOTOFF32:
252b5132
RH		 7830 /* Relocation is relative to the start of the
7831 global offset table. */
7832
7833 BFD_ASSERT (sgot != NULL);
7834 if (sgot == NULL)
7835 return bfd_reloc_notsupported;
9a5aca8c 7836
cedb70c5 7837 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7838 address by one, so that attempts to call the function pointer will
7839 correctly interpret it as Thumb code. */
7840 if (sym_flags == STT_ARM_TFUNC)
7841 value += 1;
7842
252b5132
RH		 7843 /* Note that sgot->output_offset is not involved in this
7844 calculation. We always want the start of .got. If we
7845 define _GLOBAL_OFFSET_TABLE in a different way, as is
7846 permitted by the ABI, we might have to change this
9b485d32 7847 calculation. */
252b5132 7848 value -= sgot->output_section->vma;
f21f3fe0 7849 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7850 contents, rel->r_offset, value,
00a97672 7851 rel->r_addend);
252b5132
RH		 7852
7853 case R_ARM_GOTPC:
a7c10850 7854 /* Use global offset table as symbol value. */
252b5132 7855 BFD_ASSERT (sgot != NULL);
f21f3fe0 7856
252b5132
RH		 7857 if (sgot == NULL)
7858 return bfd_reloc_notsupported;
7859
0945cdfd 7860 *unresolved_reloc_p = FALSE;
252b5132 7861 value = sgot->output_section->vma;
f21f3fe0 7862 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7863 contents, rel->r_offset, value,
00a97672 7864 rel->r_addend);
f21f3fe0 7865
252b5132 7866 case R_ARM_GOT32:
eb043451 7867 case R_ARM_GOT_PREL:
252b5132 7868 /* Relocation is to the entry for this symbol in the
9b485d32 7869 global offset table. */
252b5132
RH		 7870 if (sgot == NULL)
7871 return bfd_reloc_notsupported;
f21f3fe0 7872
252b5132
RH		 7873 if (h != NULL)
7874 {
7875 bfd_vma off;
5e681ec4 7876 bfd_boolean dyn;
f21f3fe0 7877
252b5132
RH		 7878 off = h->got.offset;
7879 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7880 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7881
5e681ec4 7882 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7883 || (info->shared
5e681ec4
PB		 7884 && SYMBOL_REFERENCES_LOCAL (info, h))
7885 || (ELF_ST_VISIBILITY (h->other)
7886 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7887 {
7888 /* This is actually a static link, or it is a -Bsymbolic link
7889 and the symbol is defined locally. We must initialize this
7890 entry in the global offset table. Since the offset must
7891 always be a multiple of 4, we use the least significant bit
7892 to record whether we have initialized it already.
f21f3fe0 7893
00a97672 7894 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7895 entry to initialize the value. This is done in the
9b485d32 7896 finish_dynamic_symbol routine. */
252b5132
RH		 7897 if ((off & 1) != 0)
7898 off &= ~1;
7899 else
7900 {
ee29b9fb
RE		 7901 /* If we are addressing a Thumb function, we need to
7902 adjust the address by one, so that attempts to
7903 call the function pointer will correctly
7904 interpret it as Thumb code. */
7905 if (sym_flags == STT_ARM_TFUNC)
7906 value |= 1;
7907
252b5132
RH		 7908 bfd_put_32 (output_bfd, value, sgot->contents + off);
7909 h->got.offset |= 1;
7910 }
7911 }
0945cdfd
DJ		 7912 else
7913 *unresolved_reloc_p = FALSE;
f21f3fe0 7914
252b5132
RH		 7915 value = sgot->output_offset + off;
7916 }
7917 else
7918 {
7919 bfd_vma off;
f21f3fe0 7920
252b5132
RH		 7921 BFD_ASSERT (local_got_offsets != NULL &&
7922 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7923
252b5132 7924 off = local_got_offsets[r_symndx];
f21f3fe0 7925
252b5132
RH		 7926 /* The offset must always be a multiple of 4. We use the
7927 least significant bit to record whether we have already
9b485d32 7928 generated the necessary reloc. */
252b5132
RH		 7929 if ((off & 1) != 0)
7930 off &= ~1;
7931 else
7932 {
b7693d02
DJ		 7933 /* If we are addressing a Thumb function, we need to
7934 adjust the address by one, so that attempts to
7935 call the function pointer will correctly
7936 interpret it as Thumb code. */
7937 if (sym_flags == STT_ARM_TFUNC)
7938 value |= 1;
7939
00a97672
RS		 7940 if (globals->use_rel)
7941 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7942
252b5132
RH		 7943 if (info->shared)
7944 {
7945 asection * srelgot;
947216bf
AM		 7946 Elf_Internal_Rela outrel;
7947 bfd_byte *loc;
f21f3fe0 7948
00a97672
RS		 7949 srelgot = (bfd_get_section_by_name
7950 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7951 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7952
00a97672 7953 outrel.r_addend = addend + value;
252b5132 7954 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7955 + sgot->output_offset
252b5132
RH		 7956 + off);
7957 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7958 loc = srelgot->contents;
00a97672
RS		 7959 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7960 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7961 }
f21f3fe0 7962
252b5132
RH		 7963 local_got_offsets[r_symndx] |= 1;
7964 }
f21f3fe0 7965
252b5132
RH		 7966 value = sgot->output_offset + off;
7967 }
eb043451
PB		 7968 if (r_type != R_ARM_GOT32)
7969 value += sgot->output_section->vma;
9a5aca8c 7970
f21f3fe0 7971 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7972 contents, rel->r_offset, value,
00a97672 7973 rel->r_addend);
f21f3fe0 7974
ba93b8ac
DJ		 7975 case R_ARM_TLS_LDO32:
7976 value = value - dtpoff_base (info);
7977
7978 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7979 contents, rel->r_offset, value,
7980 rel->r_addend);
ba93b8ac
DJ		 7981
7982 case R_ARM_TLS_LDM32:
7983 {
7984 bfd_vma off;
7985
7986 if (globals->sgot == NULL)
7987 abort ();
7988
7989 off = globals->tls_ldm_got.offset;
7990
7991 if ((off & 1) != 0)
7992 off &= ~1;
7993 else
7994 {
7995 /* If we don't know the module number, create a relocation
7996 for it. */
7997 if (info->shared)
7998 {
7999 Elf_Internal_Rela outrel;
8000 bfd_byte *loc;
8001
8002 if (globals->srelgot == NULL)
8003 abort ();
8004
00a97672 8005 outrel.r_addend = 0;
ba93b8ac
DJ		 8006 outrel.r_offset = (globals->sgot->output_section->vma
8007 + globals->sgot->output_offset + off);
8008 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
8009
00a97672
RS		 8010 if (globals->use_rel)
8011 bfd_put_32 (output_bfd, outrel.r_addend,
8012 globals->sgot->contents + off);
ba93b8ac
DJ		 8013
8014 loc = globals->srelgot->contents;
00a97672
RS		 8015 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
8016 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 8017 }
8018 else
8019 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
8020
8021 globals->tls_ldm_got.offset |= 1;
8022 }
8023
906e58ca 8024 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8025 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8026
8027 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8028 contents, rel->r_offset, value,
00a97672 8029 rel->r_addend);
ba93b8ac
DJ		 8030 }
8031
8032 case R_ARM_TLS_GD32:
8033 case R_ARM_TLS_IE32:
8034 {
8035 bfd_vma off;
8036 int indx;
8037 char tls_type;
8038
8039 if (globals->sgot == NULL)
8040 abort ();
8041
8042 indx = 0;
8043 if (h != NULL)
8044 {
8045 bfd_boolean dyn;
8046 dyn = globals->root.dynamic_sections_created;
8047 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8048 && (!info->shared
8049 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8050 {
8051 *unresolved_reloc_p = FALSE;
8052 indx = h->dynindx;
8053 }
8054 off = h->got.offset;
8055 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
8056 }
8057 else
8058 {
8059 if (local_got_offsets == NULL)
8060 abort ();
8061 off = local_got_offsets[r_symndx];
8062 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
8063 }
8064
8065 if (tls_type == GOT_UNKNOWN)
8066 abort ();
8067
8068 if ((off & 1) != 0)
8069 off &= ~1;
8070 else
8071 {
8072 bfd_boolean need_relocs = FALSE;
8073 Elf_Internal_Rela outrel;
8074 bfd_byte *loc = NULL;
8075 int cur_off = off;
8076
8077 /* The GOT entries have not been initialized yet. Do it
8078 now, and emit any relocations. If both an IE GOT and a
8079 GD GOT are necessary, we emit the GD first. */
8080
8081 if ((info->shared || indx != 0)
8082 && (h == NULL
8083 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8084 || h->root.type != bfd_link_hash_undefweak))
8085 {
8086 need_relocs = TRUE;
8087 if (globals->srelgot == NULL)
8088 abort ();
8089 loc = globals->srelgot->contents;
00a97672 8090 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 8091 }
8092
8093 if (tls_type & GOT_TLS_GD)
8094 {
8095 if (need_relocs)
8096 {
00a97672 8097 outrel.r_addend = 0;
ba93b8ac 8098 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 8099 + globals->sgot->output_offset
8100 + cur_off);
ba93b8ac 8101 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 8102
00a97672
RS		 8103 if (globals->use_rel)
8104 bfd_put_32 (output_bfd, outrel.r_addend,
8105 globals->sgot->contents + cur_off);
8106
8107 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8108 globals->srelgot->reloc_count++;
00a97672 8109 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8110
8111 if (indx == 0)
8112 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8113 globals->sgot->contents + cur_off + 4);
8114 else
8115 {
00a97672 8116 outrel.r_addend = 0;
ba93b8ac
DJ		 8117 outrel.r_info = ELF32_R_INFO (indx,
8118 R_ARM_TLS_DTPOFF32);
8119 outrel.r_offset += 4;
00a97672
RS		 8120
8121 if (globals->use_rel)
8122 bfd_put_32 (output_bfd, outrel.r_addend,
8123 globals->sgot->contents + cur_off + 4);
8124
8125
8126 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8127 globals->srelgot->reloc_count++;
00a97672 8128 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8129 }
8130 }
8131 else
8132 {
8133 /* If we are not emitting relocations for a
8134 general dynamic reference, then we must be in a
8135 static link or an executable link with the
8136 symbol binding locally. Mark it as belonging
8137 to module 1, the executable. */
8138 bfd_put_32 (output_bfd, 1,
8139 globals->sgot->contents + cur_off);
8140 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8141 globals->sgot->contents + cur_off + 4);
8142 }
8143
8144 cur_off += 8;
8145 }
8146
8147 if (tls_type & GOT_TLS_IE)
8148 {
8149 if (need_relocs)
8150 {
00a97672
RS		 8151 if (indx == 0)
8152 outrel.r_addend = value - dtpoff_base (info);
8153 else
8154 outrel.r_addend = 0;
ba93b8ac
DJ		 8155 outrel.r_offset = (globals->sgot->output_section->vma
8156 + globals->sgot->output_offset
8157 + cur_off);
8158 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8159
00a97672
RS		 8160 if (globals->use_rel)
8161 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 8162 globals->sgot->contents + cur_off);
8163
00a97672 8164 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8165 globals->srelgot->reloc_count++;
00a97672 8166 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8167 }
8168 else
8169 bfd_put_32 (output_bfd, tpoff (info, value),
8170 globals->sgot->contents + cur_off);
8171 cur_off += 4;
8172 }
8173
8174 if (h != NULL)
8175 h->got.offset |= 1;
8176 else
8177 local_got_offsets[r_symndx] |= 1;
8178 }
8179
8180 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8181 off += 8;
906e58ca 8182 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8183 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8184
8185 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8186 contents, rel->r_offset, value,
00a97672 8187 rel->r_addend);
ba93b8ac
DJ		 8188 }
8189
8190 case R_ARM_TLS_LE32:
8191 if (info->shared)
8192 {
8193 (*_bfd_error_handler)
8194 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8195 input_bfd, input_section,
8196 (long) rel->r_offset, howto->name);
21d799b5 8197 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 8198 }
8199 else
8200 value = tpoff (info, value);
906e58ca 8201
ba93b8ac 8202 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8203 contents, rel->r_offset, value,
8204 rel->r_addend);
ba93b8ac 8205
319850b4
JB		 8206 case R_ARM_V4BX:
8207 if (globals->fix_v4bx)
845b51d6
PB		 8208 {
8209 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8210
845b51d6
PB		 8211 /* Ensure that we have a BX instruction. */
8212 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8213
845b51d6
PB		 8214 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8215 {
8216 /* Branch to veneer. */
8217 bfd_vma glue_addr;
8218 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8219 glue_addr -= input_section->output_section->vma
8220 + input_section->output_offset
8221 + rel->r_offset + 8;
8222 insn = (insn & 0xf0000000) | 0x0a000000
8223 | ((glue_addr >> 2) & 0x00ffffff);
8224 }
8225 else
8226 {
8227 /* Preserve Rm (lowest four bits) and the condition code
8228 (highest four bits). Other bits encode MOV PC,Rm. */
8229 insn = (insn & 0xf000000f) | 0x01a0f000;
8230 }
319850b4 8231
845b51d6
PB		 8232 bfd_put_32 (input_bfd, insn, hit_data);
8233 }
319850b4
JB		 8234 return bfd_reloc_ok;
8235
b6895b4f
PB		 8236 case R_ARM_MOVW_ABS_NC:
8237 case R_ARM_MOVT_ABS:
8238 case R_ARM_MOVW_PREL_NC:
8239 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8240 /* Until we properly support segment-base-relative addressing then
8241 we assume the segment base to be zero, as for the group relocations.
8242 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8243 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8244 case R_ARM_MOVW_BREL_NC:
8245 case R_ARM_MOVW_BREL:
8246 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8247 {
8248 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8249
8250 if (globals->use_rel)
8251 {
8252 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8253 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8254 }
92f5d02b 8255
b6895b4f 8256 value += signed_addend;
b6895b4f
PB		 8257
8258 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8259 value -= (input_section->output_section->vma
8260 + input_section->output_offset + rel->r_offset);
8261
92f5d02b
MS		 8262 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8263 return bfd_reloc_overflow;
8264
8265 if (sym_flags == STT_ARM_TFUNC)
8266 value |= 1;
8267
8268 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8269 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8270 value >>= 16;
8271
8272 insn &= 0xfff0f000;
8273 insn |= value & 0xfff;
8274 insn |= (value & 0xf000) << 4;
8275 bfd_put_32 (input_bfd, insn, hit_data);
8276 }
8277 return bfd_reloc_ok;
8278
8279 case R_ARM_THM_MOVW_ABS_NC:
8280 case R_ARM_THM_MOVT_ABS:
8281 case R_ARM_THM_MOVW_PREL_NC:
8282 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8283 /* Until we properly support segment-base-relative addressing then
8284 we assume the segment base to be zero, as for the above relocations.
8285 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8286 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8287 as R_ARM_THM_MOVT_ABS. */
8288 case R_ARM_THM_MOVW_BREL_NC:
8289 case R_ARM_THM_MOVW_BREL:
8290 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8291 {
8292 bfd_vma insn;
906e58ca 8293
b6895b4f
PB		 8294 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8295 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8296
8297 if (globals->use_rel)
8298 {
8299 addend = ((insn >> 4) & 0xf000)
8300 | ((insn >> 15) & 0x0800)
8301 | ((insn >> 4) & 0x0700)
8302 | (insn & 0x00ff);
39623e12 8303 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8304 }
92f5d02b 8305
b6895b4f 8306 value += signed_addend;
b6895b4f
PB		 8307
8308 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8309 value -= (input_section->output_section->vma
8310 + input_section->output_offset + rel->r_offset);
8311
92f5d02b
MS		 8312 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8313 return bfd_reloc_overflow;
8314
8315 if (sym_flags == STT_ARM_TFUNC)
8316 value |= 1;
8317
8318 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8319 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8320 value >>= 16;
8321
8322 insn &= 0xfbf08f00;
8323 insn |= (value & 0xf000) << 4;
8324 insn |= (value & 0x0800) << 15;
8325 insn |= (value & 0x0700) << 4;
8326 insn |= (value & 0x00ff);
8327
8328 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8329 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8330 }
8331 return bfd_reloc_ok;
8332
4962c51a
MS		 8333 case R_ARM_ALU_PC_G0_NC:
8334 case R_ARM_ALU_PC_G1_NC:
8335 case R_ARM_ALU_PC_G0:
8336 case R_ARM_ALU_PC_G1:
8337 case R_ARM_ALU_PC_G2:
8338 case R_ARM_ALU_SB_G0_NC:
8339 case R_ARM_ALU_SB_G1_NC:
8340 case R_ARM_ALU_SB_G0:
8341 case R_ARM_ALU_SB_G1:
8342 case R_ARM_ALU_SB_G2:
8343 {
8344 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8345 bfd_vma pc = input_section->output_section->vma
8346 + input_section->output_offset + rel->r_offset;
8347 /* sb should be the origin of the *segment* containing the symbol.
8348 It is not clear how to obtain this OS-dependent value, so we
8349 make an arbitrary choice of zero. */
8350 bfd_vma sb = 0;
8351 bfd_vma residual;
8352 bfd_vma g_n;
8353 bfd_signed_vma signed_value;
8354 int group = 0;
8355
8356 /* Determine which group of bits to select. */
8357 switch (r_type)
8358 {
8359 case R_ARM_ALU_PC_G0_NC:
8360 case R_ARM_ALU_PC_G0:
8361 case R_ARM_ALU_SB_G0_NC:
8362 case R_ARM_ALU_SB_G0:
8363 group = 0;
8364 break;
8365
8366 case R_ARM_ALU_PC_G1_NC:
8367 case R_ARM_ALU_PC_G1:
8368 case R_ARM_ALU_SB_G1_NC:
8369 case R_ARM_ALU_SB_G1:
8370 group = 1;
8371 break;
8372
8373 case R_ARM_ALU_PC_G2:
8374 case R_ARM_ALU_SB_G2:
8375 group = 2;
8376 break;
8377
8378 default:
906e58ca 8379 abort ();
4962c51a
MS		 8380 }
8381
8382 /* If REL, extract the addend from the insn. If RELA, it will
8383 have already been fetched for us. */
8384 if (globals->use_rel)
8385 {
8386 int negative;
8387 bfd_vma constant = insn & 0xff;
8388 bfd_vma rotation = (insn & 0xf00) >> 8;
8389
8390 if (rotation == 0)
8391 signed_addend = constant;
8392 else
8393 {
8394 /* Compensate for the fact that in the instruction, the
8395 rotation is stored in multiples of 2 bits. */
8396 rotation *= 2;
8397
8398 /* Rotate "constant" right by "rotation" bits. */
8399 signed_addend = (constant >> rotation) |
8400 (constant << (8 * sizeof (bfd_vma) - rotation));
8401 }
8402
8403 /* Determine if the instruction is an ADD or a SUB.
8404 (For REL, this determines the sign of the addend.) */
8405 negative = identify_add_or_sub (insn);
8406 if (negative == 0)
8407 {
8408 (*_bfd_error_handler)
8409 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8410 input_bfd, input_section,
8411 (long) rel->r_offset, howto->name);
906e58ca 8412 return bfd_reloc_overflow;
4962c51a
MS		 8413 }
8414
8415 signed_addend *= negative;
8416 }
8417
8418 /* Compute the value (X) to go in the place. */
8419 if (r_type == R_ARM_ALU_PC_G0_NC
8420 || r_type == R_ARM_ALU_PC_G1_NC
8421 || r_type == R_ARM_ALU_PC_G0
8422 || r_type == R_ARM_ALU_PC_G1
8423 || r_type == R_ARM_ALU_PC_G2)
8424 /* PC relative. */
8425 signed_value = value - pc + signed_addend;
8426 else
8427 /* Section base relative. */
8428 signed_value = value - sb + signed_addend;
8429
8430 /* If the target symbol is a Thumb function, then set the
8431 Thumb bit in the address. */
8432 if (sym_flags == STT_ARM_TFUNC)
8433 signed_value |= 1;
8434
8435 /* Calculate the value of the relevant G_n, in encoded
8436 constant-with-rotation format. */
8437 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8438 &residual);
8439
8440 /* Check for overflow if required. */
8441 if ((r_type == R_ARM_ALU_PC_G0
8442 || r_type == R_ARM_ALU_PC_G1
8443 || r_type == R_ARM_ALU_PC_G2
8444 || r_type == R_ARM_ALU_SB_G0
8445 || r_type == R_ARM_ALU_SB_G1
8446 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8447 {
8448 (*_bfd_error_handler)
8449 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8450 input_bfd, input_section,
8451 (long) rel->r_offset, abs (signed_value), howto->name);
8452 return bfd_reloc_overflow;
8453 }
8454
8455 /* Mask out the value and the ADD/SUB part of the opcode; take care
8456 not to destroy the S bit. */
8457 insn &= 0xff1ff000;
8458
8459 /* Set the opcode according to whether the value to go in the
8460 place is negative. */
8461 if (signed_value < 0)
8462 insn |= 1 << 22;
8463 else
8464 insn |= 1 << 23;
8465
8466 /* Encode the offset. */
8467 insn |= g_n;
8468
8469 bfd_put_32 (input_bfd, insn, hit_data);
8470 }
8471 return bfd_reloc_ok;
8472
8473 case R_ARM_LDR_PC_G0:
8474 case R_ARM_LDR_PC_G1:
8475 case R_ARM_LDR_PC_G2:
8476 case R_ARM_LDR_SB_G0:
8477 case R_ARM_LDR_SB_G1:
8478 case R_ARM_LDR_SB_G2:
8479 {
8480 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8481 bfd_vma pc = input_section->output_section->vma
8482 + input_section->output_offset + rel->r_offset;
8483 bfd_vma sb = 0; /* See note above. */
8484 bfd_vma residual;
8485 bfd_signed_vma signed_value;
8486 int group = 0;
8487
8488 /* Determine which groups of bits to calculate. */
8489 switch (r_type)
8490 {
8491 case R_ARM_LDR_PC_G0:
8492 case R_ARM_LDR_SB_G0:
8493 group = 0;
8494 break;
8495
8496 case R_ARM_LDR_PC_G1:
8497 case R_ARM_LDR_SB_G1:
8498 group = 1;
8499 break;
8500
8501 case R_ARM_LDR_PC_G2:
8502 case R_ARM_LDR_SB_G2:
8503 group = 2;
8504 break;
8505
8506 default:
906e58ca 8507 abort ();
4962c51a
MS		 8508 }
8509
8510 /* If REL, extract the addend from the insn. If RELA, it will
8511 have already been fetched for us. */
8512 if (globals->use_rel)
8513 {
8514 int negative = (insn & (1 << 23)) ? 1 : -1;
8515 signed_addend = negative * (insn & 0xfff);
8516 }
8517
8518 /* Compute the value (X) to go in the place. */
8519 if (r_type == R_ARM_LDR_PC_G0
8520 || r_type == R_ARM_LDR_PC_G1
8521 || r_type == R_ARM_LDR_PC_G2)
8522 /* PC relative. */
8523 signed_value = value - pc + signed_addend;
8524 else
8525 /* Section base relative. */
8526 signed_value = value - sb + signed_addend;
8527
8528 /* Calculate the value of the relevant G_{n-1} to obtain
8529 the residual at that stage. */
8530 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8531
8532 /* Check for overflow. */
8533 if (residual >= 0x1000)
8534 {
8535 (*_bfd_error_handler)
8536 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8537 input_bfd, input_section,
8538 (long) rel->r_offset, abs (signed_value), howto->name);
8539 return bfd_reloc_overflow;
8540 }
8541
8542 /* Mask out the value and U bit. */
8543 insn &= 0xff7ff000;
8544
8545 /* Set the U bit if the value to go in the place is non-negative. */
8546 if (signed_value >= 0)
8547 insn |= 1 << 23;
8548
8549 /* Encode the offset. */
8550 insn |= residual;
8551
8552 bfd_put_32 (input_bfd, insn, hit_data);
8553 }
8554 return bfd_reloc_ok;
8555
8556 case R_ARM_LDRS_PC_G0:
8557 case R_ARM_LDRS_PC_G1:
8558 case R_ARM_LDRS_PC_G2:
8559 case R_ARM_LDRS_SB_G0:
8560 case R_ARM_LDRS_SB_G1:
8561 case R_ARM_LDRS_SB_G2:
8562 {
8563 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8564 bfd_vma pc = input_section->output_section->vma
8565 + input_section->output_offset + rel->r_offset;
8566 bfd_vma sb = 0; /* See note above. */
8567 bfd_vma residual;
8568 bfd_signed_vma signed_value;
8569 int group = 0;
8570
8571 /* Determine which groups of bits to calculate. */
8572 switch (r_type)
8573 {
8574 case R_ARM_LDRS_PC_G0:
8575 case R_ARM_LDRS_SB_G0:
8576 group = 0;
8577 break;
8578
8579 case R_ARM_LDRS_PC_G1:
8580 case R_ARM_LDRS_SB_G1:
8581 group = 1;
8582 break;
8583
8584 case R_ARM_LDRS_PC_G2:
8585 case R_ARM_LDRS_SB_G2:
8586 group = 2;
8587 break;
8588
8589 default:
906e58ca 8590 abort ();
4962c51a
MS		 8591 }
8592
8593 /* If REL, extract the addend from the insn. If RELA, it will
8594 have already been fetched for us. */
8595 if (globals->use_rel)
8596 {
8597 int negative = (insn & (1 << 23)) ? 1 : -1;
8598 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8599 }
8600
8601 /* Compute the value (X) to go in the place. */
8602 if (r_type == R_ARM_LDRS_PC_G0
8603 || r_type == R_ARM_LDRS_PC_G1
8604 || r_type == R_ARM_LDRS_PC_G2)
8605 /* PC relative. */
8606 signed_value = value - pc + signed_addend;
8607 else
8608 /* Section base relative. */
8609 signed_value = value - sb + signed_addend;
8610
8611 /* Calculate the value of the relevant G_{n-1} to obtain
8612 the residual at that stage. */
8613 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8614
8615 /* Check for overflow. */
8616 if (residual >= 0x100)
8617 {
8618 (*_bfd_error_handler)
8619 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8620 input_bfd, input_section,
8621 (long) rel->r_offset, abs (signed_value), howto->name);
8622 return bfd_reloc_overflow;
8623 }
8624
8625 /* Mask out the value and U bit. */
8626 insn &= 0xff7ff0f0;
8627
8628 /* Set the U bit if the value to go in the place is non-negative. */
8629 if (signed_value >= 0)
8630 insn |= 1 << 23;
8631
8632 /* Encode the offset. */
8633 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8634
8635 bfd_put_32 (input_bfd, insn, hit_data);
8636 }
8637 return bfd_reloc_ok;
8638
8639 case R_ARM_LDC_PC_G0:
8640 case R_ARM_LDC_PC_G1:
8641 case R_ARM_LDC_PC_G2:
8642 case R_ARM_LDC_SB_G0:
8643 case R_ARM_LDC_SB_G1:
8644 case R_ARM_LDC_SB_G2:
8645 {
8646 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8647 bfd_vma pc = input_section->output_section->vma
8648 + input_section->output_offset + rel->r_offset;
8649 bfd_vma sb = 0; /* See note above. */
8650 bfd_vma residual;
8651 bfd_signed_vma signed_value;
8652 int group = 0;
8653
8654 /* Determine which groups of bits to calculate. */
8655 switch (r_type)
8656 {
8657 case R_ARM_LDC_PC_G0:
8658 case R_ARM_LDC_SB_G0:
8659 group = 0;
8660 break;
8661
8662 case R_ARM_LDC_PC_G1:
8663 case R_ARM_LDC_SB_G1:
8664 group = 1;
8665 break;
8666
8667 case R_ARM_LDC_PC_G2:
8668 case R_ARM_LDC_SB_G2:
8669 group = 2;
8670 break;
8671
8672 default:
906e58ca 8673 abort ();
4962c51a
MS		 8674 }
8675
8676 /* If REL, extract the addend from the insn. If RELA, it will
8677 have already been fetched for us. */
8678 if (globals->use_rel)
8679 {
8680 int negative = (insn & (1 << 23)) ? 1 : -1;
8681 signed_addend = negative * ((insn & 0xff) << 2);
8682 }
8683
8684 /* Compute the value (X) to go in the place. */
8685 if (r_type == R_ARM_LDC_PC_G0
8686 || r_type == R_ARM_LDC_PC_G1
8687 || r_type == R_ARM_LDC_PC_G2)
8688 /* PC relative. */
8689 signed_value = value - pc + signed_addend;
8690 else
8691 /* Section base relative. */
8692 signed_value = value - sb + signed_addend;
8693
8694 /* Calculate the value of the relevant G_{n-1} to obtain
8695 the residual at that stage. */
8696 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8697
8698 /* Check for overflow. (The absolute value to go in the place must be
8699 divisible by four and, after having been divided by four, must
8700 fit in eight bits.) */
8701 if ((residual & 0x3) != 0 || residual >= 0x400)
8702 {
8703 (*_bfd_error_handler)
8704 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8705 input_bfd, input_section,
8706 (long) rel->r_offset, abs (signed_value), howto->name);
8707 return bfd_reloc_overflow;
8708 }
8709
8710 /* Mask out the value and U bit. */
8711 insn &= 0xff7fff00;
8712
8713 /* Set the U bit if the value to go in the place is non-negative. */
8714 if (signed_value >= 0)
8715 insn |= 1 << 23;
8716
8717 /* Encode the offset. */
8718 insn |= residual >> 2;
8719
8720 bfd_put_32 (input_bfd, insn, hit_data);
8721 }
8722 return bfd_reloc_ok;
8723
252b5132
RH		 8724 default:
8725 return bfd_reloc_notsupported;
8726 }
8727}
8728
98c1d4aa
NC		 8729/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8730static void
57e8b36a
NC		 8731arm_add_to_rel (bfd * abfd,
8732 bfd_byte * address,
8733 reloc_howto_type * howto,
8734 bfd_signed_vma increment)
98c1d4aa 8735{
98c1d4aa
NC		 8736 bfd_signed_vma addend;
8737
bd97cb95
DJ		 8738 if (howto->type == R_ARM_THM_CALL
8739 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8740 {
9a5aca8c
AM		 8741 int upper_insn, lower_insn;
8742 int upper, lower;
98c1d4aa 8743
9a5aca8c
AM		 8744 upper_insn = bfd_get_16 (abfd, address);
8745 lower_insn = bfd_get_16 (abfd, address + 2);
8746 upper = upper_insn & 0x7ff;
8747 lower = lower_insn & 0x7ff;
8748
8749 addend = (upper << 12) | (lower << 1);
ddda4409 8750 addend += increment;
9a5aca8c 8751 addend >>= 1;
98c1d4aa 8752
9a5aca8c
AM		 8753 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8754 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8755
dc810e39
AM		 8756 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8757 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8758 }
8759 else
8760 {
8761 bfd_vma contents;
8762
8763 contents = bfd_get_32 (abfd, address);
8764
8765 /* Get the (signed) value from the instruction. */
8766 addend = contents & howto->src_mask;
8767 if (addend & ((howto->src_mask + 1) >> 1))
8768 {
8769 bfd_signed_vma mask;
8770
8771 mask = -1;
8772 mask &= ~ howto->src_mask;
8773 addend |= mask;
8774 }
8775
8776 /* Add in the increment, (which is a byte value). */
8777 switch (howto->type)
8778 {
8779 default:
8780 addend += increment;
8781 break;
8782
8783 case R_ARM_PC24:
c6596c5e 8784 case R_ARM_PLT32:
5b5bb741
PB		 8785 case R_ARM_CALL:
8786 case R_ARM_JUMP24:
9a5aca8c 8787 addend <<= howto->size;
dc810e39 8788 addend += increment;
9a5aca8c
AM		 8789
8790 /* Should we check for overflow here ? */
8791
8792 /* Drop any undesired bits. */
8793 addend >>= howto->rightshift;
8794 break;
8795 }
8796
8797 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8798
8799 bfd_put_32 (abfd, contents, address);
ddda4409 8800 }
98c1d4aa 8801}
252b5132 8802
ba93b8ac
DJ		 8803#define IS_ARM_TLS_RELOC(R_TYPE) \
8804 ((R_TYPE) == R_ARM_TLS_GD32 \
8805 || (R_TYPE) == R_ARM_TLS_LDO32 \
8806 || (R_TYPE) == R_ARM_TLS_LDM32 \
8807 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8808 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8809 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8810 || (R_TYPE) == R_ARM_TLS_LE32 \
8811 || (R_TYPE) == R_ARM_TLS_IE32)
8812
252b5132 8813/* Relocate an ARM ELF section. */
906e58ca 8814
b34976b6 8815static bfd_boolean
57e8b36a
NC		 8816elf32_arm_relocate_section (bfd * output_bfd,
8817 struct bfd_link_info * info,
8818 bfd * input_bfd,
8819 asection * input_section,
8820 bfd_byte * contents,
8821 Elf_Internal_Rela * relocs,
8822 Elf_Internal_Sym * local_syms,
8823 asection ** local_sections)
252b5132 8824{
b34976b6
AM		 8825 Elf_Internal_Shdr *symtab_hdr;
8826 struct elf_link_hash_entry **sym_hashes;
8827 Elf_Internal_Rela *rel;
8828 Elf_Internal_Rela *relend;
8829 const char *name;
b32d3aa2 8830 struct elf32_arm_link_hash_table * globals;
252b5132 8831
4e7fd91e 8832 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8833 if (globals == NULL)
8834 return FALSE;
b491616a 8835
0ffa91dd 8836 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8837 sym_hashes = elf_sym_hashes (input_bfd);
8838
8839 rel = relocs;
8840 relend = relocs + input_section->reloc_count;
8841 for (; rel < relend; rel++)
8842 {
ba96a88f
NC		 8843 int r_type;
8844 reloc_howto_type * howto;
8845 unsigned long r_symndx;
8846 Elf_Internal_Sym * sym;
8847 asection * sec;
252b5132 8848 struct elf_link_hash_entry * h;
ba96a88f
NC		 8849 bfd_vma relocation;
8850 bfd_reloc_status_type r;
8851 arelent bfd_reloc;
ba93b8ac 8852 char sym_type;
0945cdfd 8853 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8854 char *error_message = NULL;
f21f3fe0 8855
252b5132 8856 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8857 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8858 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8859
ba96a88f
NC		 8860 if ( r_type == R_ARM_GNU_VTENTRY
8861 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8862 continue;
8863
b32d3aa2 8864 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8865 howto = bfd_reloc.howto;
252b5132 8866
252b5132
RH		 8867 h = NULL;
8868 sym = NULL;
8869 sec = NULL;
9b485d32 8870
252b5132
RH		 8871 if (r_symndx < symtab_hdr->sh_info)
8872 {
8873 sym = local_syms + r_symndx;
ba93b8ac 8874 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8875 sec = local_sections[r_symndx];
ffcb4889
NS		 8876
8877 /* An object file might have a reference to a local
8878 undefined symbol. This is a daft object file, but we
8879 should at least do something about it. V4BX & NONE
8880 relocations do not use the symbol and are explicitly
8881 allowed to use the undefined symbol, so allow those. */
8882 if (r_type != R_ARM_V4BX
8883 && r_type != R_ARM_NONE
8884 && bfd_is_und_section (sec)
8885 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
8886 {
8887 if (!info->callbacks->undefined_symbol
8888 (info, bfd_elf_string_from_elf_section
8889 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8890 input_bfd, input_section,
8891 rel->r_offset, TRUE))
8892 return FALSE;
8893 }
8894
4e7fd91e 8895 if (globals->use_rel)
f8df10f4 8896 {
4e7fd91e
PB		 8897 relocation = (sec->output_section->vma
8898 + sec->output_offset
8899 + sym->st_value);
ab96bf03
AM		 8900 if (!info->relocatable
8901 && (sec->flags & SEC_MERGE)
8902 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8903 {
4e7fd91e
PB		 8904 asection *msec;
8905 bfd_vma addend, value;
8906
39623e12 8907 switch (r_type)
4e7fd91e 8908 {
39623e12
PB		 8909 case R_ARM_MOVW_ABS_NC:
8910 case R_ARM_MOVT_ABS:
8911 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8912 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8913 addend = (addend ^ 0x8000) - 0x8000;
8914 break;
f8df10f4 8915
39623e12
PB		 8916 case R_ARM_THM_MOVW_ABS_NC:
8917 case R_ARM_THM_MOVT_ABS:
8918 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8919 << 16;
8920 value |= bfd_get_16 (input_bfd,
8921 contents + rel->r_offset + 2);
8922 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8923 | ((value & 0x04000000) >> 15);
8924 addend = (addend ^ 0x8000) - 0x8000;
8925 break;
f8df10f4 8926
39623e12
PB		 8927 default:
8928 if (howto->rightshift
8929 || (howto->src_mask & (howto->src_mask + 1)))
8930 {
8931 (*_bfd_error_handler)
8932 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8933 input_bfd, input_section,
8934 (long) rel->r_offset, howto->name);
8935 return FALSE;
8936 }
8937
8938 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8939
8940 /* Get the (signed) value from the instruction. */
8941 addend = value & howto->src_mask;
8942 if (addend & ((howto->src_mask + 1) >> 1))
8943 {
8944 bfd_signed_vma mask;
8945
8946 mask = -1;
8947 mask &= ~ howto->src_mask;
8948 addend |= mask;
8949 }
8950 break;
4e7fd91e 8951 }
39623e12 8952
4e7fd91e
PB		 8953 msec = sec;
8954 addend =
8955 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8956 - relocation;
8957 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8958
8959 /* Cases here must match those in the preceeding
8960 switch statement. */
8961 switch (r_type)
8962 {
8963 case R_ARM_MOVW_ABS_NC:
8964 case R_ARM_MOVT_ABS:
8965 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8966 | (addend & 0xfff);
8967 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8968 break;
8969
8970 case R_ARM_THM_MOVW_ABS_NC:
8971 case R_ARM_THM_MOVT_ABS:
8972 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8973 | (addend & 0xff) | ((addend & 0x0800) << 15);
8974 bfd_put_16 (input_bfd, value >> 16,
8975 contents + rel->r_offset);
8976 bfd_put_16 (input_bfd, value,
8977 contents + rel->r_offset + 2);
8978 break;
8979
8980 default:
8981 value = (value & ~ howto->dst_mask)
8982 | (addend & howto->dst_mask);
8983 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8984 break;
8985 }
f8df10f4 8986 }
f8df10f4 8987 }
4e7fd91e
PB		 8988 else
8989 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8990 }
8991 else
8992 {
560e09e9 8993 bfd_boolean warned;
560e09e9 8994
b2a8e766
AM		 8995 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8996 r_symndx, symtab_hdr, sym_hashes,
8997 h, sec, relocation,
8998 unresolved_reloc, warned);
ba93b8ac
DJ		 8999
9000 sym_type = h->type;
252b5132
RH		 9001 }
9002
ab96bf03
AM		 9003 if (sec != NULL && elf_discarded_section (sec))
9004 {
9005 /* For relocs against symbols from removed linkonce sections,
9006 or sections discarded by a linker script, we just want the
9007 section contents zeroed. Avoid any special processing. */
9008 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
9009 rel->r_info = 0;
9010 rel->r_addend = 0;
9011 continue;
9012 }
9013
9014 if (info->relocatable)
9015 {
9016 /* This is a relocatable link. We don't have to change
9017 anything, unless the reloc is against a section symbol,
9018 in which case we have to adjust according to where the
9019 section symbol winds up in the output section. */
9020 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
9021 {
9022 if (globals->use_rel)
9023 arm_add_to_rel (input_bfd, contents + rel->r_offset,
9024 howto, (bfd_signed_vma) sec->output_offset);
9025 else
9026 rel->r_addend += sec->output_offset;
9027 }
9028 continue;
9029 }
9030
252b5132
RH		 9031 if (h != NULL)
9032 name = h->root.root.string;
9033 else
9034 {
9035 name = (bfd_elf_string_from_elf_section
9036 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9037 if (name == NULL || *name == '\0')
9038 name = bfd_section_name (input_bfd, sec);
9039 }
f21f3fe0 9040
ba93b8ac
DJ		 9041 if (r_symndx != 0
9042 && r_type != R_ARM_NONE
9043 && (h == NULL
9044 || h->root.type == bfd_link_hash_defined
9045 || h->root.type == bfd_link_hash_defweak)
9046 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
9047 {
9048 (*_bfd_error_handler)
9049 ((sym_type == STT_TLS
9050 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
9051 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
9052 input_bfd,
9053 input_section,
9054 (long) rel->r_offset,
9055 howto->name,
9056 name);
9057 }
9058
252b5132
RH		 9059 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
9060 input_section, contents, rel,
9061 relocation, info, sec, name,
9062 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 9063 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 9064 &unresolved_reloc, &error_message);
0945cdfd
DJ		 9065
9066 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
9067 because such sections are not SEC_ALLOC and thus ld.so will
9068 not process them. */
9069 if (unresolved_reloc
9070 && !((input_section->flags & SEC_DEBUGGING) != 0
9071 && h->def_dynamic))
9072 {
9073 (*_bfd_error_handler)
843fe662
L		 9074 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
9075 input_bfd,
9076 input_section,
9077 (long) rel->r_offset,
9078 howto->name,
9079 h->root.root.string);
0945cdfd
DJ		 9080 return FALSE;
9081 }
252b5132
RH		 9082
9083 if (r != bfd_reloc_ok)
9084 {
252b5132
RH		 9085 switch (r)
9086 {
9087 case bfd_reloc_overflow:
cf919dfd
PB		 9088 /* If the overflowing reloc was to an undefined symbol,
9089 we have already printed one error message and there
9090 is no point complaining again. */
9091 if ((! h ||
9092 h->root.type != bfd_link_hash_undefined)
9093 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 9094 (info, (h ? &h->root : NULL), name, howto->name,
9095 (bfd_vma) 0, input_bfd, input_section,
9096 rel->r_offset))))
b34976b6 9097 return FALSE;
252b5132
RH		 9098 break;
9099
9100 case bfd_reloc_undefined:
9101 if (!((*info->callbacks->undefined_symbol)
9102 (info, name, input_bfd, input_section,
b34976b6
AM		 9103 rel->r_offset, TRUE)))
9104 return FALSE;
252b5132
RH		 9105 break;
9106
9107 case bfd_reloc_outofrange:
f2a9dd69 9108 error_message = _("out of range");
252b5132
RH		 9109 goto common_error;
9110
9111 case bfd_reloc_notsupported:
f2a9dd69 9112 error_message = _("unsupported relocation");
252b5132
RH		 9113 goto common_error;
9114
9115 case bfd_reloc_dangerous:
f2a9dd69 9116 /* error_message should already be set. */
252b5132
RH		 9117 goto common_error;
9118
9119 default:
f2a9dd69 9120 error_message = _("unknown error");
8029a119 9121 /* Fall through. */
252b5132
RH		 9122
9123 common_error:
f2a9dd69
DJ		 9124 BFD_ASSERT (error_message != NULL);
9125 if (!((*info->callbacks->reloc_dangerous)
9126 (info, error_message, input_bfd, input_section,
252b5132 9127 rel->r_offset)))
b34976b6 9128 return FALSE;
252b5132
RH		 9129 break;
9130 }
9131 }
9132 }
9133
b34976b6 9134 return TRUE;
252b5132
RH		 9135}
9136
91d6fa6a 9137/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 9138 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 9139 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 9140 maintaining that condition). */
9141
9142static void
9143add_unwind_table_edit (arm_unwind_table_edit **head,
9144 arm_unwind_table_edit **tail,
9145 arm_unwind_edit_type type,
9146 asection *linked_section,
91d6fa6a 9147 unsigned int tindex)
2468f9c9 9148{
21d799b5
NC		 9149 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9150 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 9151
9152 new_edit->type = type;
9153 new_edit->linked_section = linked_section;
91d6fa6a 9154 new_edit->index = tindex;
2468f9c9 9155
91d6fa6a 9156 if (tindex > 0)
2468f9c9
PB		 9157 {
9158 new_edit->next = NULL;
9159
9160 if (*tail)
9161 (*tail)->next = new_edit;
9162
9163 (*tail) = new_edit;
9164
9165 if (!*head)
9166 (*head) = new_edit;
9167 }
9168 else
9169 {
9170 new_edit->next = *head;
9171
9172 if (!*tail)
9173 *tail = new_edit;
9174
9175 *head = new_edit;
9176 }
9177}
9178
9179static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9180
9181/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9182static void
9183adjust_exidx_size(asection *exidx_sec, int adjust)
9184{
9185 asection *out_sec;
9186
9187 if (!exidx_sec->rawsize)
9188 exidx_sec->rawsize = exidx_sec->size;
9189
9190 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9191 out_sec = exidx_sec->output_section;
9192 /* Adjust size of output section. */
9193 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9194}
9195
9196/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9197static void
9198insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9199{
9200 struct _arm_elf_section_data *exidx_arm_data;
9201
9202 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9203 add_unwind_table_edit (
9204 &exidx_arm_data->u.exidx.unwind_edit_list,
9205 &exidx_arm_data->u.exidx.unwind_edit_tail,
9206 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9207
9208 adjust_exidx_size(exidx_sec, 8);
9209}
9210
9211/* Scan .ARM.exidx tables, and create a list describing edits which should be
9212 made to those tables, such that:
9213
9214 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9215 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9216 codes which have been inlined into the index).
9217
85fdf906
AH		 9218 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
9219
2468f9c9
PB		 9220 The edits are applied when the tables are written
9221 (in elf32_arm_write_section).
9222*/
9223
9224bfd_boolean
9225elf32_arm_fix_exidx_coverage (asection **text_section_order,
9226 unsigned int num_text_sections,
85fdf906
AH		 9227 struct bfd_link_info *info,
9228 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 9229{
9230 bfd *inp;
9231 unsigned int last_second_word = 0, i;
9232 asection *last_exidx_sec = NULL;
9233 asection *last_text_sec = NULL;
9234 int last_unwind_type = -1;
9235
9236 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9237 text sections. */
9238 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9239 {
9240 asection *sec;
9241
9242 for (sec = inp->sections; sec != NULL; sec = sec->next)
9243 {
9244 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9245 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9246
dec9d5df 9247 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9248 continue;
9249
9250 if (elf_sec->linked_to)
9251 {
9252 Elf_Internal_Shdr *linked_hdr
9253 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9254 struct _arm_elf_section_data *linked_sec_arm_data
9255 = get_arm_elf_section_data (linked_hdr->bfd_section);
9256
9257 if (linked_sec_arm_data == NULL)
9258 continue;
9259
9260 /* Link this .ARM.exidx section back from the text section it
9261 describes. */
9262 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9263 }
9264 }
9265 }
9266
9267 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9268 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 9269 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 9270
9271 for (i = 0; i < num_text_sections; i++)
9272 {
9273 asection *sec = text_section_order[i];
9274 asection *exidx_sec;
9275 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9276 struct _arm_elf_section_data *exidx_arm_data;
9277 bfd_byte *contents = NULL;
9278 int deleted_exidx_bytes = 0;
9279 bfd_vma j;
9280 arm_unwind_table_edit *unwind_edit_head = NULL;
9281 arm_unwind_table_edit *unwind_edit_tail = NULL;
9282 Elf_Internal_Shdr *hdr;
9283 bfd *ibfd;
9284
9285 if (arm_data == NULL)
9286 continue;
9287
9288 exidx_sec = arm_data->u.text.arm_exidx_sec;
9289 if (exidx_sec == NULL)
9290 {
9291 /* Section has no unwind data. */
9292 if (last_unwind_type == 0 || !last_exidx_sec)
9293 continue;
9294
9295 /* Ignore zero sized sections. */
9296 if (sec->size == 0)
9297 continue;
9298
9299 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9300 last_unwind_type = 0;
9301 continue;
9302 }
9303
22a8f80e
PB		 9304 /* Skip /DISCARD/ sections. */
9305 if (bfd_is_abs_section (exidx_sec->output_section))
9306 continue;
9307
2468f9c9
PB		 9308 hdr = &elf_section_data (exidx_sec)->this_hdr;
9309 if (hdr->sh_type != SHT_ARM_EXIDX)
9310 continue;
9311
9312 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9313 if (exidx_arm_data == NULL)
9314 continue;
9315
9316 ibfd = exidx_sec->owner;
9317
9318 if (hdr->contents != NULL)
9319 contents = hdr->contents;
9320 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9321 /* An error? */
9322 continue;
9323
9324 for (j = 0; j < hdr->sh_size; j += 8)
9325 {
9326 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9327 int unwind_type;
9328 int elide = 0;
9329
9330 /* An EXIDX_CANTUNWIND entry. */
9331 if (second_word == 1)
9332 {
9333 if (last_unwind_type == 0)
9334 elide = 1;
9335 unwind_type = 0;
9336 }
9337 /* Inlined unwinding data. Merge if equal to previous. */
9338 else if ((second_word & 0x80000000) != 0)
9339 {
85fdf906
AH		 9340 if (merge_exidx_entries
9341 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 9342 elide = 1;
9343 unwind_type = 1;
9344 last_second_word = second_word;
9345 }
9346 /* Normal table entry. In theory we could merge these too,
9347 but duplicate entries are likely to be much less common. */
9348 else
9349 unwind_type = 2;
9350
9351 if (elide)
9352 {
9353 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9354 DELETE_EXIDX_ENTRY, NULL, j / 8);
9355
9356 deleted_exidx_bytes += 8;
9357 }
9358
9359 last_unwind_type = unwind_type;
9360 }
9361
9362 /* Free contents if we allocated it ourselves. */
9363 if (contents != hdr->contents)
9364 free (contents);
9365
9366 /* Record edits to be applied later (in elf32_arm_write_section). */
9367 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9368 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9369
9370 if (deleted_exidx_bytes > 0)
9371 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9372
9373 last_exidx_sec = exidx_sec;
9374 last_text_sec = sec;
9375 }
9376
9377 /* Add terminating CANTUNWIND entry. */
9378 if (last_exidx_sec && last_unwind_type != 0)
9379 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9380
9381 return TRUE;
9382}
9383
3e6b1042
DJ		 9384static bfd_boolean
9385elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9386 bfd *ibfd, const char *name)
9387{
9388 asection *sec, *osec;
9389
9390 sec = bfd_get_section_by_name (ibfd, name);
9391 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9392 return TRUE;
9393
9394 osec = sec->output_section;
9395 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9396 return TRUE;
9397
9398 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9399 sec->output_offset, sec->size))
9400 return FALSE;
9401
9402 return TRUE;
9403}
9404
9405static bfd_boolean
9406elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9407{
9408 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 9409 asection *sec, *osec;
3e6b1042 9410
4dfe6ac6
NC		 9411 if (globals == NULL)
9412 return FALSE;
9413
3e6b1042
DJ		 9414 /* Invoke the regular ELF backend linker to do all the work. */
9415 if (!bfd_elf_final_link (abfd, info))
9416 return FALSE;
9417
fe33d2fa
CL		 9418 /* Process stub sections (eg BE8 encoding, ...). */
9419 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
9420 int i;
9421 for(i=0; i<htab->top_id; i++) {
9422 sec = htab->stub_group[i].stub_sec;
9423 if (sec) {
9424 osec = sec->output_section;
9425 elf32_arm_write_section (abfd, info, sec, sec->contents);
9426 if (! bfd_set_section_contents (abfd, osec, sec->contents,
9427 sec->output_offset, sec->size))
9428 return FALSE;
9429 }
9430 }
9431
3e6b1042
DJ		 9432 /* Write out any glue sections now that we have created all the
9433 stubs. */
9434 if (globals->bfd_of_glue_owner != NULL)
9435 {
9436 if (! elf32_arm_output_glue_section (info, abfd,
9437 globals->bfd_of_glue_owner,
9438 ARM2THUMB_GLUE_SECTION_NAME))
9439 return FALSE;
9440
9441 if (! elf32_arm_output_glue_section (info, abfd,
9442 globals->bfd_of_glue_owner,
9443 THUMB2ARM_GLUE_SECTION_NAME))
9444 return FALSE;
9445
9446 if (! elf32_arm_output_glue_section (info, abfd,
9447 globals->bfd_of_glue_owner,
9448 VFP11_ERRATUM_VENEER_SECTION_NAME))
9449 return FALSE;
9450
9451 if (! elf32_arm_output_glue_section (info, abfd,
9452 globals->bfd_of_glue_owner,
9453 ARM_BX_GLUE_SECTION_NAME))
9454 return FALSE;
9455 }
9456
9457 return TRUE;
9458}
9459
c178919b
NC		 9460/* Set the right machine number. */
9461
9462static bfd_boolean
57e8b36a 9463elf32_arm_object_p (bfd *abfd)
c178919b 9464{
5a6c6817 9465 unsigned int mach;
57e8b36a 9466
5a6c6817 9467 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9468
5a6c6817
NC		 9469 if (mach != bfd_mach_arm_unknown)
9470 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9471
9472 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9473 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9474
e16bb312 9475 else
5a6c6817 9476 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9477
9478 return TRUE;
9479}
9480
fc830a83 9481/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9482
b34976b6 9483static bfd_boolean
57e8b36a 9484elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9485{
9486 if (elf_flags_init (abfd)
9487 && elf_elfheader (abfd)->e_flags != flags)
9488 {
fc830a83
NC		 9489 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9490 {
fd2ec330 9491 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9492 (*_bfd_error_handler)
9493 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9494 abfd);
fc830a83 9495 else
d003868e
AM		 9496 _bfd_error_handler
9497 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9498 abfd);
fc830a83 9499 }
252b5132
RH		 9500 }
9501 else
9502 {
9503 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9504 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9505 }
9506
b34976b6 9507 return TRUE;
252b5132
RH		 9508}
9509
fc830a83 9510/* Copy backend specific data from one object module to another. */
9b485d32 9511
b34976b6 9512static bfd_boolean
57e8b36a 9513elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9514{
9515 flagword in_flags;
9516 flagword out_flags;
9517
0ffa91dd 9518 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9519 return TRUE;
252b5132 9520
fc830a83 9521 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9522 out_flags = elf_elfheader (obfd)->e_flags;
9523
fc830a83
NC		 9524 if (elf_flags_init (obfd)
9525 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9526 && in_flags != out_flags)
252b5132 9527 {
252b5132 9528 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9529 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9530 return FALSE;
252b5132
RH		 9531
9532 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9533 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9534 return FALSE;
252b5132
RH		 9535
9536 /* If the src and dest have different interworking flags
9537 then turn off the interworking bit. */
fd2ec330 9538 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9539 {
fd2ec330 9540 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9541 _bfd_error_handler
9542 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9543 obfd, ibfd);
252b5132 9544
fd2ec330 9545 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9546 }
1006ba19
PB		 9547
9548 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9549 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9550 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9551 }
9552
9553 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9554 elf_flags_init (obfd) = TRUE;
252b5132 9555
94a3258f
PB		 9556 /* Also copy the EI_OSABI field. */
9557 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9558 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9559
104d59d1
JM		 9560 /* Copy object attributes. */
9561 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9562
9563 return TRUE;
9564}
9565
9566/* Values for Tag_ABI_PCS_R9_use. */
9567enum
9568{
9569 AEABI_R9_V6,
9570 AEABI_R9_SB,
9571 AEABI_R9_TLS,
9572 AEABI_R9_unused
9573};
9574
9575/* Values for Tag_ABI_PCS_RW_data. */
9576enum
9577{
9578 AEABI_PCS_RW_data_absolute,
9579 AEABI_PCS_RW_data_PCrel,
9580 AEABI_PCS_RW_data_SBrel,
9581 AEABI_PCS_RW_data_unused
9582};
9583
9584/* Values for Tag_ABI_enum_size. */
9585enum
9586{
9587 AEABI_enum_unused,
9588 AEABI_enum_short,
9589 AEABI_enum_wide,
9590 AEABI_enum_forced_wide
9591};
9592
104d59d1
JM		 9593/* Determine whether an object attribute tag takes an integer, a
9594 string or both. */
906e58ca 9595
104d59d1
JM		 9596static int
9597elf32_arm_obj_attrs_arg_type (int tag)
9598{
9599 if (tag == Tag_compatibility)
3483fe2e 9600 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9601 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9602 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9603 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9604 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9605 else if (tag < 32)
3483fe2e 9606 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9607 else
3483fe2e 9608 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9609}
9610
5aa6ff7c
AS		 9611/* The ABI defines that Tag_conformance should be emitted first, and that
9612 Tag_nodefaults should be second (if either is defined). This sets those
9613 two positions, and bumps up the position of all the remaining tags to
9614 compensate. */
9615static int
9616elf32_arm_obj_attrs_order (int num)
9617{
9618 if (num == 4)
9619 return Tag_conformance;
9620 if (num == 5)
9621 return Tag_nodefaults;
9622 if ((num - 2) < Tag_nodefaults)
9623 return num - 2;
9624 if ((num - 1) < Tag_conformance)
9625 return num - 1;
9626 return num;
9627}
9628
91e22acd
AS		 9629/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9630 Returns -1 if no architecture could be read. */
9631
9632static int
9633get_secondary_compatible_arch (bfd *abfd)
9634{
9635 obj_attribute *attr =
9636 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9637
9638 /* Note: the tag and its argument below are uleb128 values, though
9639 currently-defined values fit in one byte for each. */
9640 if (attr->s
9641 && attr->s[0] == Tag_CPU_arch
9642 && (attr->s[1] & 128) != 128
9643 && attr->s[2] == 0)
9644 return attr->s[1];
9645
9646 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9647 return -1;
9648}
9649
9650/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9651 The tag is removed if ARCH is -1. */
9652
8e79c3df 9653static void
91e22acd 9654set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9655{
91e22acd
AS		 9656 obj_attribute *attr =
9657 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9658
91e22acd
AS		 9659 if (arch == -1)
9660 {
9661 attr->s = NULL;
9662 return;
8e79c3df 9663 }
91e22acd
AS		 9664
9665 /* Note: the tag and its argument below are uleb128 values, though
9666 currently-defined values fit in one byte for each. */
9667 if (!attr->s)
21d799b5 9668 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 9669 attr->s[0] = Tag_CPU_arch;
9670 attr->s[1] = arch;
9671 attr->s[2] = '\0';
8e79c3df
CM		 9672}
9673
91e22acd
AS		 9674/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9675 into account. */
9676
9677static int
9678tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9679 int newtag, int secondary_compat)
8e79c3df 9680{
91e22acd
AS		 9681#define T(X) TAG_CPU_ARCH_##X
9682 int tagl, tagh, result;
9683 const int v6t2[] =
9684 {
9685 T(V6T2), /* PRE_V4. */
9686 T(V6T2), /* V4. */
9687 T(V6T2), /* V4T. */
9688 T(V6T2), /* V5T. */
9689 T(V6T2), /* V5TE. */
9690 T(V6T2), /* V5TEJ. */
9691 T(V6T2), /* V6. */
9692 T(V7), /* V6KZ. */
9693 T(V6T2) /* V6T2. */
9694 };
9695 const int v6k[] =
9696 {
9697 T(V6K), /* PRE_V4. */
9698 T(V6K), /* V4. */
9699 T(V6K), /* V4T. */
9700 T(V6K), /* V5T. */
9701 T(V6K), /* V5TE. */
9702 T(V6K), /* V5TEJ. */
9703 T(V6K), /* V6. */
9704 T(V6KZ), /* V6KZ. */
9705 T(V7), /* V6T2. */
9706 T(V6K) /* V6K. */
9707 };
9708 const int v7[] =
9709 {
9710 T(V7), /* PRE_V4. */
9711 T(V7), /* V4. */
9712 T(V7), /* V4T. */
9713 T(V7), /* V5T. */
9714 T(V7), /* V5TE. */
9715 T(V7), /* V5TEJ. */
9716 T(V7), /* V6. */
9717 T(V7), /* V6KZ. */
9718 T(V7), /* V6T2. */
9719 T(V7), /* V6K. */
9720 T(V7) /* V7. */
9721 };
9722 const int v6_m[] =
9723 {
9724 -1, /* PRE_V4. */
9725 -1, /* V4. */
9726 T(V6K), /* V4T. */
9727 T(V6K), /* V5T. */
9728 T(V6K), /* V5TE. */
9729 T(V6K), /* V5TEJ. */
9730 T(V6K), /* V6. */
9731 T(V6KZ), /* V6KZ. */
9732 T(V7), /* V6T2. */
9733 T(V6K), /* V6K. */
9734 T(V7), /* V7. */
9735 T(V6_M) /* V6_M. */
9736 };
9737 const int v6s_m[] =
9738 {
9739 -1, /* PRE_V4. */
9740 -1, /* V4. */
9741 T(V6K), /* V4T. */
9742 T(V6K), /* V5T. */
9743 T(V6K), /* V5TE. */
9744 T(V6K), /* V5TEJ. */
9745 T(V6K), /* V6. */
9746 T(V6KZ), /* V6KZ. */
9747 T(V7), /* V6T2. */
9748 T(V6K), /* V6K. */
9749 T(V7), /* V7. */
9750 T(V6S_M), /* V6_M. */
9751 T(V6S_M) /* V6S_M. */
9752 };
9e3c6df6
PB		 9753 const int v7e_m[] =
9754 {
9755 -1, /* PRE_V4. */
9756 -1, /* V4. */
9757 T(V7E_M), /* V4T. */
9758 T(V7E_M), /* V5T. */
9759 T(V7E_M), /* V5TE. */
9760 T(V7E_M), /* V5TEJ. */
9761 T(V7E_M), /* V6. */
9762 T(V7E_M), /* V6KZ. */
9763 T(V7E_M), /* V6T2. */
9764 T(V7E_M), /* V6K. */
9765 T(V7E_M), /* V7. */
9766 T(V7E_M), /* V6_M. */
9767 T(V7E_M), /* V6S_M. */
9768 T(V7E_M) /* V7E_M. */
9769 };
91e22acd
AS		 9770 const int v4t_plus_v6_m[] =
9771 {
9772 -1, /* PRE_V4. */
9773 -1, /* V4. */
9774 T(V4T), /* V4T. */
9775 T(V5T), /* V5T. */
9776 T(V5TE), /* V5TE. */
9777 T(V5TEJ), /* V5TEJ. */
9778 T(V6), /* V6. */
9779 T(V6KZ), /* V6KZ. */
9780 T(V6T2), /* V6T2. */
9781 T(V6K), /* V6K. */
9782 T(V7), /* V7. */
9783 T(V6_M), /* V6_M. */
9784 T(V6S_M), /* V6S_M. */
9e3c6df6 9785 T(V7E_M), /* V7E_M. */
91e22acd
AS		 9786 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9787 };
9788 const int *comb[] =
9789 {
9790 v6t2,
9791 v6k,
9792 v7,
9793 v6_m,
9794 v6s_m,
9e3c6df6 9795 v7e_m,
91e22acd
AS		 9796 /* Pseudo-architecture. */
9797 v4t_plus_v6_m
9798 };
9799
9800 /* Check we've not got a higher architecture than we know about. */
9801
9e3c6df6 9802 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 9803 {
3895f852 9804 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9805 return -1;
9806 }
9807
9808 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9809
9810 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9811 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9812 oldtag = T(V4T_PLUS_V6_M);
9813
9814 /* And override the new tag if we have a Tag_also_compatible_with on the
9815 input. */
9816
9817 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9818 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9819 newtag = T(V4T_PLUS_V6_M);
9820
9821 tagl = (oldtag < newtag) ? oldtag : newtag;
9822 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9823
9824 /* Architectures before V6KZ add features monotonically. */
9825 if (tagh <= TAG_CPU_ARCH_V6KZ)
9826 return result;
9827
9828 result = comb[tagh - T(V6T2)][tagl];
9829
9830 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9831 as the canonical version. */
9832 if (result == T(V4T_PLUS_V6_M))
9833 {
9834 result = T(V4T);
9835 *secondary_compat_out = T(V6_M);
9836 }
9837 else
9838 *secondary_compat_out = -1;
9839
9840 if (result == -1)
9841 {
3895f852 9842 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9843 ibfd, oldtag, newtag);
9844 return -1;
9845 }
9846
9847 return result;
9848#undef T
8e79c3df
CM		 9849}
9850
ee065d83
PB		 9851/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9852 are conflicting attributes. */
906e58ca 9853
ee065d83
PB		 9854static bfd_boolean
9855elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9856{
104d59d1
JM		 9857 obj_attribute *in_attr;
9858 obj_attribute *out_attr;
9859 obj_attribute_list *in_list;
8e79c3df 9860 obj_attribute_list *out_list;
91e22acd 9861 obj_attribute_list **out_listp;
ee065d83
PB		 9862 /* Some tags have 0 = don't care, 1 = strong requirement,
9863 2 = weak requirement. */
91e22acd 9864 static const int order_021[3] = {0, 2, 1};
ee065d83 9865 int i;
91e22acd 9866 bfd_boolean result = TRUE;
ee065d83 9867
3e6b1042
DJ		 9868 /* Skip the linker stubs file. This preserves previous behavior
9869 of accepting unknown attributes in the first input file - but
9870 is that a bug? */
9871 if (ibfd->flags & BFD_LINKER_CREATED)
9872 return TRUE;
9873
104d59d1 9874 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9875 {
9876 /* This is the first object. Copy the attributes. */
104d59d1 9877 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 9878
cd21e546
MGD		 9879 out_attr = elf_known_obj_attributes_proc (obfd);
9880
004ae526
PB		 9881 /* Use the Tag_null value to indicate the attributes have been
9882 initialized. */
cd21e546 9883 out_attr[0].i = 1;
004ae526 9884
cd21e546
MGD		 9885 /* We do not output objects with Tag_MPextension_use_legacy - we move
9886 the attribute's value to Tag_MPextension_use. */
9887 if (out_attr[Tag_MPextension_use_legacy].i != 0)
9888 {
9889 if (out_attr[Tag_MPextension_use].i != 0
9890 && out_attr[Tag_MPextension_use_legacy].i
9891 != out_attr[Tag_MPextension_use].i)
9892 {
9893 _bfd_error_handler
9894 (_("Error: %B has both the current and legacy "
9895 "Tag_MPextension_use attributes"), ibfd);
9896 result = FALSE;
9897 }
9898
9899 out_attr[Tag_MPextension_use] =
9900 out_attr[Tag_MPextension_use_legacy];
9901 out_attr[Tag_MPextension_use_legacy].type = 0;
9902 out_attr[Tag_MPextension_use_legacy].i = 0;
9903 }
9904
9905 return result;
ee065d83
PB		 9906 }
9907
104d59d1
JM		 9908 in_attr = elf_known_obj_attributes_proc (ibfd);
9909 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9910 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9911 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9912 {
8e79c3df 9913 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9914 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9915 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9916 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9917 {
9918 _bfd_error_handler
3895f852 9919 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 9920 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
9921 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 9922 result = FALSE;
ee065d83
PB		 9923 }
9924 }
9925
104d59d1 9926 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9927 {
9928 /* Merge this attribute with existing attributes. */
9929 switch (i)
9930 {
9931 case Tag_CPU_raw_name:
9932 case Tag_CPU_name:
91e22acd 9933 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9934 break;
9935
9936 case Tag_ABI_optimization_goals:
9937 case Tag_ABI_FP_optimization_goals:
9938 /* Use the first value seen. */
9939 break;
9940
9941 case Tag_CPU_arch:
91e22acd
AS		 9942 {
9943 int secondary_compat = -1, secondary_compat_out = -1;
9944 unsigned int saved_out_attr = out_attr[i].i;
9945 static const char *name_table[] = {
9946 /* These aren't real CPU names, but we can't guess
9947 that from the architecture version alone. */
9948 "Pre v4",
9949 "ARM v4",
9950 "ARM v4T",
9951 "ARM v5T",
9952 "ARM v5TE",
9953 "ARM v5TEJ",
9954 "ARM v6",
9955 "ARM v6KZ",
9956 "ARM v6T2",
9957 "ARM v6K",
9958 "ARM v7",
9959 "ARM v6-M",
9960 "ARM v6S-M"
9961 };
9962
9963 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9964 secondary_compat = get_secondary_compatible_arch (ibfd);
9965 secondary_compat_out = get_secondary_compatible_arch (obfd);
9966 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9967 &secondary_compat_out,
9968 in_attr[i].i,
9969 secondary_compat);
9970 set_secondary_compatible_arch (obfd, secondary_compat_out);
9971
9972 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9973 if (out_attr[i].i == saved_out_attr)
9974 ; /* Leave the names alone. */
9975 else if (out_attr[i].i == in_attr[i].i)
9976 {
9977 /* The output architecture has been changed to match the
9978 input architecture. Use the input names. */
9979 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9980 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9981 : NULL;
9982 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9983 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9984 : NULL;
9985 }
9986 else
9987 {
9988 out_attr[Tag_CPU_name].s = NULL;
9989 out_attr[Tag_CPU_raw_name].s = NULL;
9990 }
9991
9992 /* If we still don't have a value for Tag_CPU_name,
9993 make one up now. Tag_CPU_raw_name remains blank. */
9994 if (out_attr[Tag_CPU_name].s == NULL
9995 && out_attr[i].i < ARRAY_SIZE (name_table))
9996 out_attr[Tag_CPU_name].s =
9997 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9998 }
9999 break;
10000
ee065d83
PB		 10001 case Tag_ARM_ISA_use:
10002 case Tag_THUMB_ISA_use:
ee065d83 10003 case Tag_WMMX_arch:
91e22acd
AS		 10004 case Tag_Advanced_SIMD_arch:
10005 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 10006 case Tag_ABI_FP_rounding:
ee065d83
PB		 10007 case Tag_ABI_FP_exceptions:
10008 case Tag_ABI_FP_user_exceptions:
10009 case Tag_ABI_FP_number_model:
75375b3e 10010 case Tag_FP_HP_extension:
91e22acd
AS		 10011 case Tag_CPU_unaligned_access:
10012 case Tag_T2EE_use:
91e22acd 10013 case Tag_MPextension_use:
ee065d83
PB		 10014 /* Use the largest value specified. */
10015 if (in_attr[i].i > out_attr[i].i)
10016 out_attr[i].i = in_attr[i].i;
10017 break;
10018
75375b3e 10019 case Tag_ABI_align_preserved:
91e22acd
AS		 10020 case Tag_ABI_PCS_RO_data:
10021 /* Use the smallest value specified. */
10022 if (in_attr[i].i < out_attr[i].i)
10023 out_attr[i].i = in_attr[i].i;
10024 break;
10025
75375b3e 10026 case Tag_ABI_align_needed:
91e22acd 10027 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 10028 && (in_attr[Tag_ABI_align_preserved].i == 0
10029 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 10030 {
91e22acd
AS		 10031 /* This error message should be enabled once all non-conformant
10032 binaries in the toolchain have had the attributes set
10033 properly.
ee065d83 10034 _bfd_error_handler
3895f852 10035 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 10036 obfd, ibfd);
10037 result = FALSE; */
ee065d83 10038 }
91e22acd
AS		 10039 /* Fall through. */
10040 case Tag_ABI_FP_denormal:
10041 case Tag_ABI_PCS_GOT_use:
10042 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
10043 value if greater than 2 (for future-proofing). */
10044 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
10045 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
10046 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 10047 out_attr[i].i = in_attr[i].i;
10048 break;
91e22acd 10049
75375b3e
MGD		 10050 case Tag_Virtualization_use:
10051 /* The virtualization tag effectively stores two bits of
10052 information: the intended use of TrustZone (in bit 0), and the
10053 intended use of Virtualization (in bit 1). */
10054 if (out_attr[i].i == 0)
10055 out_attr[i].i = in_attr[i].i;
10056 else if (in_attr[i].i != 0
10057 && in_attr[i].i != out_attr[i].i)
10058 {
10059 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
10060 out_attr[i].i = 3;
10061 else
10062 {
10063 _bfd_error_handler
10064 (_("error: %B: unable to merge virtualization attributes "
10065 "with %B"),
10066 obfd, ibfd);
10067 result = FALSE;
10068 }
10069 }
10070 break;
91e22acd
AS		 10071
10072 case Tag_CPU_arch_profile:
10073 if (out_attr[i].i != in_attr[i].i)
10074 {
10075 /* 0 will merge with anything.
10076 'A' and 'S' merge to 'A'.
10077 'R' and 'S' merge to 'R'.
10078 'M' and 'A|R|S' is an error. */
10079 if (out_attr[i].i == 0
10080 || (out_attr[i].i == 'S'
10081 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
10082 out_attr[i].i = in_attr[i].i;
10083 else if (in_attr[i].i == 0
10084 || (in_attr[i].i == 'S'
10085 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
10086 ; /* Do nothing. */
10087 else
10088 {
10089 _bfd_error_handler
3895f852 10090 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 10091 ibfd,
10092 in_attr[i].i ? in_attr[i].i : '0',
10093 out_attr[i].i ? out_attr[i].i : '0');
10094 result = FALSE;
10095 }
10096 }
10097 break;
75375b3e 10098 case Tag_FP_arch:
62f3b8c8
PB		 10099 {
10100 static const struct
10101 {
10102 int ver;
10103 int regs;
10104 } vfp_versions[7] =
10105 {
10106 {0, 0},
10107 {1, 16},
10108 {2, 16},
10109 {3, 32},
10110 {3, 16},
10111 {4, 32},
10112 {4, 16}
10113 };
10114 int ver;
10115 int regs;
10116 int newval;
10117
10118 /* Values greater than 6 aren't defined, so just pick the
10119 biggest */
10120 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
10121 {
10122 out_attr[i] = in_attr[i];
10123 break;
10124 }
10125 /* The output uses the superset of input features
10126 (ISA version) and registers. */
10127 ver = vfp_versions[in_attr[i].i].ver;
10128 if (ver < vfp_versions[out_attr[i].i].ver)
10129 ver = vfp_versions[out_attr[i].i].ver;
10130 regs = vfp_versions[in_attr[i].i].regs;
10131 if (regs < vfp_versions[out_attr[i].i].regs)
10132 regs = vfp_versions[out_attr[i].i].regs;
10133 /* This assumes all possible supersets are also a valid
10134 options. */
10135 for (newval = 6; newval > 0; newval--)
10136 {
10137 if (regs == vfp_versions[newval].regs
10138 && ver == vfp_versions[newval].ver)
10139 break;
10140 }
10141 out_attr[i].i = newval;
10142 }
b1cc4aeb 10143 break;
ee065d83
PB		 10144 case Tag_PCS_config:
10145 if (out_attr[i].i == 0)
10146 out_attr[i].i = in_attr[i].i;
10147 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
10148 {
10149 /* It's sometimes ok to mix different configs, so this is only
10150 a warning. */
10151 _bfd_error_handler
10152 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10153 }
10154 break;
10155 case Tag_ABI_PCS_R9_use:
004ae526
PB		 10156 if (in_attr[i].i != out_attr[i].i
10157 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 10158 && in_attr[i].i != AEABI_R9_unused)
10159 {
10160 _bfd_error_handler
3895f852 10161 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 10162 result = FALSE;
ee065d83
PB		 10163 }
10164 if (out_attr[i].i == AEABI_R9_unused)
10165 out_attr[i].i = in_attr[i].i;
10166 break;
10167 case Tag_ABI_PCS_RW_data:
10168 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10169 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10170 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10171 {
10172 _bfd_error_handler
3895f852 10173 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 10174 ibfd);
91e22acd 10175 result = FALSE;
ee065d83
PB		 10176 }
10177 /* Use the smallest value specified. */
10178 if (in_attr[i].i < out_attr[i].i)
10179 out_attr[i].i = in_attr[i].i;
10180 break;
ee065d83 10181 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 10182 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10183 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 10184 {
10185 _bfd_error_handler
a9dc9481
JM		 10186 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10187 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 10188 }
a9dc9481 10189 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 10190 out_attr[i].i = in_attr[i].i;
10191 break;
ee065d83
PB		 10192 case Tag_ABI_enum_size:
10193 if (in_attr[i].i != AEABI_enum_unused)
10194 {
10195 if (out_attr[i].i == AEABI_enum_unused
10196 || out_attr[i].i == AEABI_enum_forced_wide)
10197 {
10198 /* The existing object is compatible with anything.
10199 Use whatever requirements the new object has. */
10200 out_attr[i].i = in_attr[i].i;
10201 }
10202 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 10203 && out_attr[i].i != in_attr[i].i
0ffa91dd 10204 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 10205 {
91e22acd 10206 static const char *aeabi_enum_names[] =
bf21ed78 10207 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 10208 const char *in_name =
10209 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10210 ? aeabi_enum_names[in_attr[i].i]
10211 : "<unknown>";
10212 const char *out_name =
10213 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10214 ? aeabi_enum_names[out_attr[i].i]
10215 : "<unknown>";
ee065d83 10216 _bfd_error_handler
bf21ed78 10217 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 10218 ibfd, in_name, out_name);
ee065d83
PB		 10219 }
10220 }
10221 break;
10222 case Tag_ABI_VFP_args:
10223 /* Aready done. */
10224 break;
10225 case Tag_ABI_WMMX_args:
10226 if (in_attr[i].i != out_attr[i].i)
10227 {
10228 _bfd_error_handler
3895f852 10229 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 10230 ibfd, obfd);
91e22acd 10231 result = FALSE;
ee065d83
PB		 10232 }
10233 break;
7b86a9fa
AS		 10234 case Tag_compatibility:
10235 /* Merged in target-independent code. */
10236 break;
91e22acd
AS		 10237 case Tag_ABI_HardFP_use:
10238 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
10239 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
10240 || (in_attr[i].i == 2 && out_attr[i].i == 1))
10241 out_attr[i].i = 3;
10242 else if (in_attr[i].i > out_attr[i].i)
10243 out_attr[i].i = in_attr[i].i;
10244 break;
10245 case Tag_ABI_FP_16bit_format:
10246 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10247 {
10248 if (in_attr[i].i != out_attr[i].i)
10249 {
10250 _bfd_error_handler
3895f852 10251 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10252 ibfd, obfd);
10253 result = FALSE;
10254 }
10255 }
10256 if (in_attr[i].i != 0)
10257 out_attr[i].i = in_attr[i].i;
10258 break;
7b86a9fa 10259
cd21e546
MGD		 10260 case Tag_DIV_use:
10261 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
10262 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10263 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10264 CPU. We will merge as follows: If the input attribute's value
10265 is one then the output attribute's value remains unchanged. If
10266 the input attribute's value is zero or two then if the output
10267 attribute's value is one the output value is set to the input
10268 value, otherwise the output value must be the same as the
10269 inputs. */
10270 if (in_attr[i].i != 1 && out_attr[i].i != 1)
10271 {
10272 if (in_attr[i].i != out_attr[i].i)
10273 {
10274 _bfd_error_handler
10275 (_("DIV usage mismatch between %B and %B"),
10276 ibfd, obfd);
10277 result = FALSE;
10278 }
10279 }
10280
10281 if (in_attr[i].i != 1)
10282 out_attr[i].i = in_attr[i].i;
10283
10284 break;
10285
10286 case Tag_MPextension_use_legacy:
10287 /* We don't output objects with Tag_MPextension_use_legacy - we
10288 move the value to Tag_MPextension_use. */
10289 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
10290 {
10291 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
10292 {
10293 _bfd_error_handler
10294 (_("%B has has both the current and legacy "
10295 "Tag_MPextension_use attributes"),
10296 ibfd);
10297 result = FALSE;
10298 }
10299 }
10300
10301 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
10302 out_attr[Tag_MPextension_use] = in_attr[i];
10303
10304 break;
10305
91e22acd 10306 case Tag_nodefaults:
2d0bb761
AS		 10307 /* This tag is set if it exists, but the value is unused (and is
10308 typically zero). We don't actually need to do anything here -
10309 the merge happens automatically when the type flags are merged
10310 below. */
91e22acd
AS		 10311 break;
10312 case Tag_also_compatible_with:
10313 /* Already done in Tag_CPU_arch. */
10314 break;
10315 case Tag_conformance:
10316 /* Keep the attribute if it matches. Throw it away otherwise.
10317 No attribute means no claim to conform. */
10318 if (!in_attr[i].s || !out_attr[i].s
10319 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10320 out_attr[i].s = NULL;
10321 break;
3cfad14c 10322
91e22acd 10323 default:
3cfad14c 10324 {
91e22acd
AS		 10325 bfd *err_bfd = NULL;
10326
10327 /* The "known_obj_attributes" table does contain some undefined
10328 attributes. Ensure that there are unused. */
10329 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
10330 err_bfd = obfd;
10331 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
10332 err_bfd = ibfd;
10333
10334 if (err_bfd != NULL)
10335 {
10336 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10337 if ((i & 127) < 64)
10338 {
10339 _bfd_error_handler
10340 (_("%B: Unknown mandatory EABI object attribute %d"),
10341 err_bfd, i);
10342 bfd_set_error (bfd_error_bad_value);
10343 result = FALSE;
10344 }
10345 else
10346 {
10347 _bfd_error_handler
10348 (_("Warning: %B: Unknown EABI object attribute %d"),
10349 err_bfd, i);
10350 }
10351 }
10352
10353 /* Only pass on attributes that match in both inputs. */
10354 if (in_attr[i].i != out_attr[i].i
10355 || in_attr[i].s != out_attr[i].s
10356 || (in_attr[i].s != NULL && out_attr[i].s != NULL
10357 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
10358 {
10359 out_attr[i].i = 0;
10360 out_attr[i].s = NULL;
10361 }
3cfad14c 10362 }
91e22acd
AS		 10363 }
10364
10365 /* If out_attr was copied from in_attr then it won't have a type yet. */
10366 if (in_attr[i].type && !out_attr[i].type)
10367 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10368 }
10369
104d59d1 10370 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 10371 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
10372 return FALSE;
ee065d83 10373
104d59d1
JM		 10374 /* Check for any attributes not known on ARM. */
10375 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 10376 out_listp = &elf_other_obj_attributes_proc (obfd);
10377 out_list = *out_listp;
8e79c3df 10378
91e22acd 10379 for (; in_list || out_list; )
ee065d83 10380 {
91e22acd
AS		 10381 bfd *err_bfd = NULL;
10382 int err_tag = 0;
8e79c3df
CM		 10383
10384 /* The tags for each list are in numerical order. */
10385 /* If the tags are equal, then merge. */
91e22acd 10386 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 10387 {
91e22acd
AS		 10388 /* This attribute only exists in obfd. We can't merge, and we don't
10389 know what the tag means, so delete it. */
10390 err_bfd = obfd;
10391 err_tag = out_list->tag;
10392 *out_listp = out_list->next;
10393 out_list = *out_listp;
8e79c3df 10394 }
91e22acd 10395 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 10396 {
91e22acd
AS		 10397 /* This attribute only exists in ibfd. We can't merge, and we don't
10398 know what the tag means, so ignore it. */
10399 err_bfd = ibfd;
10400 err_tag = in_list->tag;
8e79c3df 10401 in_list = in_list->next;
eb111b1f 10402 }
91e22acd
AS		 10403 else /* The tags are equal. */
10404 {
10405 /* As present, all attributes in the list are unknown, and
10406 therefore can't be merged meaningfully. */
10407 err_bfd = obfd;
10408 err_tag = out_list->tag;
10409
10410 /* Only pass on attributes that match in both inputs. */
10411 if (in_list->attr.i != out_list->attr.i
10412 || in_list->attr.s != out_list->attr.s
10413 || (in_list->attr.s && out_list->attr.s
10414 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10415 {
10416 /* No match. Delete the attribute. */
10417 *out_listp = out_list->next;
10418 out_list = *out_listp;
10419 }
10420 else
10421 {
10422 /* Matched. Keep the attribute and move to the next. */
10423 out_list = out_list->next;
10424 in_list = in_list->next;
10425 }
10426 }
10427
10428 if (err_bfd)
10429 {
10430 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10431 if ((err_tag & 127) < 64)
10432 {
10433 _bfd_error_handler
10434 (_("%B: Unknown mandatory EABI object attribute %d"),
10435 err_bfd, err_tag);
10436 bfd_set_error (bfd_error_bad_value);
10437 result = FALSE;
10438 }
10439 else
10440 {
10441 _bfd_error_handler
10442 (_("Warning: %B: Unknown EABI object attribute %d"),
10443 err_bfd, err_tag);
10444 }
10445 }
ee065d83 10446 }
91e22acd 10447 return result;
252b5132
RH		 10448}
10449
3a4a14e9
PB		 10450
10451/* Return TRUE if the two EABI versions are incompatible. */
10452
10453static bfd_boolean
10454elf32_arm_versions_compatible (unsigned iver, unsigned over)
10455{
10456 /* v4 and v5 are the same spec before and after it was released,
10457 so allow mixing them. */
10458 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10459 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10460 return TRUE;
10461
10462 return (iver == over);
10463}
10464
252b5132
RH		 10465/* Merge backend specific data from an object file to the output
10466 object file when linking. */
9b485d32 10467
b34976b6 10468static bfd_boolean
21d799b5 10469elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 10470
9b485d32
NC		 10471/* Display the flags field. */
10472
b34976b6 10473static bfd_boolean
57e8b36a 10474elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10475{
fc830a83
NC		 10476 FILE * file = (FILE *) ptr;
10477 unsigned long flags;
252b5132
RH		 10478
10479 BFD_ASSERT (abfd != NULL && ptr != NULL);
10480
10481 /* Print normal ELF private data. */
10482 _bfd_elf_print_private_bfd_data (abfd, ptr);
10483
fc830a83 10484 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10485 /* Ignore init flag - it may not be set, despite the flags field
10486 containing valid data. */
252b5132
RH		 10487
10488 /* xgettext:c-format */
9b485d32 10489 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10490
fc830a83
NC		 10491 switch (EF_ARM_EABI_VERSION (flags))
10492 {
10493 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10494 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10495 official ARM ELF extended ABI. Hence they are only decoded if
10496 the EABI version is not set. */
fd2ec330 10497 if (flags & EF_ARM_INTERWORK)
9b485d32 10498 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10499
fd2ec330 10500 if (flags & EF_ARM_APCS_26)
6c571f00 10501 fprintf (file, " [APCS-26]");
fc830a83 10502 else
6c571f00 10503 fprintf (file, " [APCS-32]");
9a5aca8c 10504
96a846ea
RE		 10505 if (flags & EF_ARM_VFP_FLOAT)
10506 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10507 else if (flags & EF_ARM_MAVERICK_FLOAT)
10508 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10509 else
10510 fprintf (file, _(" [FPA float format]"));
10511
fd2ec330 10512 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10513 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10514
fd2ec330 10515 if (flags & EF_ARM_PIC)
9b485d32 10516 fprintf (file, _(" [position independent]"));
fc830a83 10517
fd2ec330 10518 if (flags & EF_ARM_NEW_ABI)
9b485d32 10519 fprintf (file, _(" [new ABI]"));
9a5aca8c 10520
fd2ec330 10521 if (flags & EF_ARM_OLD_ABI)
9b485d32 10522 fprintf (file, _(" [old ABI]"));
9a5aca8c 10523
fd2ec330 10524 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10525 fprintf (file, _(" [software FP]"));
9a5aca8c 10526
96a846ea
RE		 10527 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10528 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10529 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10530 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10531 break;
9a5aca8c 10532
fc830a83 10533 case EF_ARM_EABI_VER1:
9b485d32 10534 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10535
fc830a83 10536 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10537 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10538 else
9b485d32 10539 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10540
fc830a83
NC		 10541 flags &= ~ EF_ARM_SYMSARESORTED;
10542 break;
9a5aca8c 10543
fd2ec330
PB		 10544 case EF_ARM_EABI_VER2:
10545 fprintf (file, _(" [Version2 EABI]"));
10546
10547 if (flags & EF_ARM_SYMSARESORTED)
10548 fprintf (file, _(" [sorted symbol table]"));
10549 else
10550 fprintf (file, _(" [unsorted symbol table]"));
10551
10552 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10553 fprintf (file, _(" [dynamic symbols use segment index]"));
10554
10555 if (flags & EF_ARM_MAPSYMSFIRST)
10556 fprintf (file, _(" [mapping symbols precede others]"));
10557
99e4ae17 10558 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10559 | EF_ARM_MAPSYMSFIRST);
10560 break;
10561
d507cf36
PB		 10562 case EF_ARM_EABI_VER3:
10563 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10564 break;
10565
10566 case EF_ARM_EABI_VER4:
10567 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10568 goto eabi;
d507cf36 10569
3a4a14e9
PB		 10570 case EF_ARM_EABI_VER5:
10571 fprintf (file, _(" [Version5 EABI]"));
10572 eabi:
d507cf36
PB		 10573 if (flags & EF_ARM_BE8)
10574 fprintf (file, _(" [BE8]"));
10575
10576 if (flags & EF_ARM_LE8)
10577 fprintf (file, _(" [LE8]"));
10578
10579 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10580 break;
10581
fc830a83 10582 default:
9b485d32 10583 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10584 break;
10585 }
252b5132 10586
fc830a83 10587 flags &= ~ EF_ARM_EABIMASK;
252b5132 10588
fc830a83 10589 if (flags & EF_ARM_RELEXEC)
9b485d32 10590 fprintf (file, _(" [relocatable executable]"));
252b5132 10591
fc830a83 10592 if (flags & EF_ARM_HASENTRY)
9b485d32 10593 fprintf (file, _(" [has entry point]"));
252b5132 10594
fc830a83
NC		 10595 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10596
10597 if (flags)
9b485d32 10598 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10599
252b5132
RH		 10600 fputc ('\n', file);
10601
b34976b6 10602 return TRUE;
252b5132
RH		 10603}
10604
10605static int
57e8b36a 10606elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10607{
2f0ca46a
NC		 10608 switch (ELF_ST_TYPE (elf_sym->st_info))
10609 {
10610 case STT_ARM_TFUNC:
10611 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10612
2f0ca46a
NC		 10613 case STT_ARM_16BIT:
10614 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10615 This allows us to distinguish between data used by Thumb instructions
10616 and non-data (which is probably code) inside Thumb regions of an
10617 executable. */
1a0eb693 10618 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10619 return ELF_ST_TYPE (elf_sym->st_info);
10620 break;
9a5aca8c 10621
ce855c42
NC		 10622 default:
10623 break;
2f0ca46a
NC		 10624 }
10625
10626 return type;
252b5132 10627}
f21f3fe0 10628
252b5132 10629static asection *
07adf181
AM		 10630elf32_arm_gc_mark_hook (asection *sec,
10631 struct bfd_link_info *info,
10632 Elf_Internal_Rela *rel,
10633 struct elf_link_hash_entry *h,
10634 Elf_Internal_Sym *sym)
252b5132
RH		 10635{
10636 if (h != NULL)
07adf181 10637 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10638 {
10639 case R_ARM_GNU_VTINHERIT:
10640 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10641 return NULL;
10642 }
9ad5cbcf 10643
07adf181 10644 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10645}
10646
780a67af
NC		 10647/* Update the got entry reference counts for the section being removed. */
10648
b34976b6 10649static bfd_boolean
ba93b8ac
DJ		 10650elf32_arm_gc_sweep_hook (bfd * abfd,
10651 struct bfd_link_info * info,
10652 asection * sec,
10653 const Elf_Internal_Rela * relocs)
252b5132 10654{
5e681ec4
PB		 10655 Elf_Internal_Shdr *symtab_hdr;
10656 struct elf_link_hash_entry **sym_hashes;
10657 bfd_signed_vma *local_got_refcounts;
10658 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10659 struct elf32_arm_link_hash_table * globals;
10660
7dda2462
TG		 10661 if (info->relocatable)
10662 return TRUE;
10663
eb043451 10664 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10665 if (globals == NULL)
10666 return FALSE;
5e681ec4
PB		 10667
10668 elf_section_data (sec)->local_dynrel = NULL;
10669
0ffa91dd 10670 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10671 sym_hashes = elf_sym_hashes (abfd);
10672 local_got_refcounts = elf_local_got_refcounts (abfd);
10673
906e58ca 10674 check_use_blx (globals);
bd97cb95 10675
5e681ec4
PB		 10676 relend = relocs + sec->reloc_count;
10677 for (rel = relocs; rel < relend; rel++)
eb043451 10678 {
3eb128b2
AM		 10679 unsigned long r_symndx;
10680 struct elf_link_hash_entry *h = NULL;
eb043451 10681 int r_type;
5e681ec4 10682
3eb128b2
AM		 10683 r_symndx = ELF32_R_SYM (rel->r_info);
10684 if (r_symndx >= symtab_hdr->sh_info)
10685 {
10686 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10687 while (h->root.type == bfd_link_hash_indirect
10688 || h->root.type == bfd_link_hash_warning)
10689 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10690 }
10691
eb043451 10692 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10693 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10694 switch (r_type)
10695 {
10696 case R_ARM_GOT32:
eb043451 10697 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10698 case R_ARM_TLS_GD32:
10699 case R_ARM_TLS_IE32:
3eb128b2 10700 if (h != NULL)
eb043451 10701 {
eb043451
PB		 10702 if (h->got.refcount > 0)
10703 h->got.refcount -= 1;
10704 }
10705 else if (local_got_refcounts != NULL)
10706 {
10707 if (local_got_refcounts[r_symndx] > 0)
10708 local_got_refcounts[r_symndx] -= 1;
10709 }
10710 break;
10711
ba93b8ac 10712 case R_ARM_TLS_LDM32:
4dfe6ac6 10713 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 10714 break;
10715
eb043451 10716 case R_ARM_ABS32:
bb224fc3 10717 case R_ARM_ABS32_NOI:
eb043451 10718 case R_ARM_REL32:
bb224fc3 10719 case R_ARM_REL32_NOI:
eb043451
PB		 10720 case R_ARM_PC24:
10721 case R_ARM_PLT32:
5b5bb741
PB		 10722 case R_ARM_CALL:
10723 case R_ARM_JUMP24:
eb043451 10724 case R_ARM_PREL31:
c19d1205 10725 case R_ARM_THM_CALL:
bd97cb95
DJ		 10726 case R_ARM_THM_JUMP24:
10727 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10728 case R_ARM_MOVW_ABS_NC:
10729 case R_ARM_MOVT_ABS:
10730 case R_ARM_MOVW_PREL_NC:
10731 case R_ARM_MOVT_PREL:
10732 case R_ARM_THM_MOVW_ABS_NC:
10733 case R_ARM_THM_MOVT_ABS:
10734 case R_ARM_THM_MOVW_PREL_NC:
10735 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10736 /* Should the interworking branches be here also? */
10737
3eb128b2 10738 if (h != NULL)
eb043451
PB		 10739 {
10740 struct elf32_arm_link_hash_entry *eh;
10741 struct elf32_arm_relocs_copied **pp;
10742 struct elf32_arm_relocs_copied *p;
5e681ec4 10743
b7693d02 10744 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10745
eb043451 10746 if (h->plt.refcount > 0)
b7693d02
DJ		 10747 {
10748 h->plt.refcount -= 1;
bd97cb95
DJ		 10749 if (r_type == R_ARM_THM_CALL)
10750 eh->plt_maybe_thumb_refcount--;
10751
10752 if (r_type == R_ARM_THM_JUMP24
10753 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10754 eh->plt_thumb_refcount--;
10755 }
5e681ec4 10756
eb043451 10757 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10758 || r_type == R_ARM_REL32
10759 || r_type == R_ARM_ABS32_NOI
10760 || r_type == R_ARM_REL32_NOI)
eb043451 10761 {
eb043451
PB		 10762 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10763 pp = &p->next)
10764 if (p->section == sec)
10765 {
10766 p->count -= 1;
bb224fc3
MS		 10767 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10768 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10769 p->pc_count -= 1;
eb043451
PB		 10770 if (p->count == 0)
10771 *pp = p->next;
10772 break;
10773 }
10774 }
10775 }
10776 break;
5e681ec4 10777
eb043451
PB		 10778 default:
10779 break;
10780 }
10781 }
5e681ec4 10782
b34976b6 10783 return TRUE;
252b5132
RH		 10784}
10785
780a67af
NC		 10786/* Look through the relocs for a section during the first phase. */
10787
b34976b6 10788static bfd_boolean
57e8b36a
NC		 10789elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10790 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10791{
b34976b6
AM		 10792 Elf_Internal_Shdr *symtab_hdr;
10793 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10794 const Elf_Internal_Rela *rel;
10795 const Elf_Internal_Rela *rel_end;
10796 bfd *dynobj;
5e681ec4 10797 asection *sreloc;
b34976b6 10798 bfd_vma *local_got_offsets;
5e681ec4 10799 struct elf32_arm_link_hash_table *htab;
39623e12 10800 bfd_boolean needs_plt;
ce98a316 10801 unsigned long nsyms;
9a5aca8c 10802
1049f94e 10803 if (info->relocatable)
b34976b6 10804 return TRUE;
9a5aca8c 10805
0ffa91dd
NC		 10806 BFD_ASSERT (is_arm_elf (abfd));
10807
5e681ec4 10808 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10809 if (htab == NULL)
10810 return FALSE;
10811
5e681ec4 10812 sreloc = NULL;
9a5aca8c 10813
67687978
PB		 10814 /* Create dynamic sections for relocatable executables so that we can
10815 copy relocations. */
10816 if (htab->root.is_relocatable_executable
10817 && ! htab->root.dynamic_sections_created)
10818 {
10819 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10820 return FALSE;
10821 }
10822
252b5132
RH		 10823 dynobj = elf_hash_table (info)->dynobj;
10824 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10825
0ffa91dd 10826 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10827 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10828 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10829
252b5132
RH		 10830 rel_end = relocs + sec->reloc_count;
10831 for (rel = relocs; rel < rel_end; rel++)
10832 {
10833 struct elf_link_hash_entry *h;
b7693d02 10834 struct elf32_arm_link_hash_entry *eh;
252b5132 10835 unsigned long r_symndx;
eb043451 10836 int r_type;
9a5aca8c 10837
252b5132 10838 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10839 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10840 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10841
ce98a316
NC		 10842 if (r_symndx >= nsyms
10843 /* PR 9934: It is possible to have relocations that do not
10844 refer to symbols, thus it is also possible to have an
10845 object file containing relocations but no symbol table. */
10846 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10847 {
10848 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10849 r_symndx);
ba93b8ac
DJ		 10850 return FALSE;
10851 }
10852
ce98a316 10853 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10854 h = NULL;
10855 else
973a3492
L		 10856 {
10857 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10858 while (h->root.type == bfd_link_hash_indirect
10859 || h->root.type == bfd_link_hash_warning)
10860 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10861 }
9a5aca8c 10862
b7693d02
DJ		 10863 eh = (struct elf32_arm_link_hash_entry *) h;
10864
eb043451 10865 switch (r_type)
252b5132 10866 {
5e681ec4 10867 case R_ARM_GOT32:
eb043451 10868 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10869 case R_ARM_TLS_GD32:
10870 case R_ARM_TLS_IE32:
5e681ec4 10871 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10872 {
10873 int tls_type, old_tls_type;
5e681ec4 10874
ba93b8ac
DJ		 10875 switch (r_type)
10876 {
10877 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10878 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10879 default: tls_type = GOT_NORMAL; break;
10880 }
252b5132 10881
ba93b8ac
DJ		 10882 if (h != NULL)
10883 {
10884 h->got.refcount++;
10885 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10886 }
10887 else
10888 {
10889 bfd_signed_vma *local_got_refcounts;
10890
10891 /* This is a global offset table entry for a local symbol. */
10892 local_got_refcounts = elf_local_got_refcounts (abfd);
10893 if (local_got_refcounts == NULL)
10894 {
10895 bfd_size_type size;
906e58ca 10896
ba93b8ac 10897 size = symtab_hdr->sh_info;
906e58ca 10898 size *= (sizeof (bfd_signed_vma) + sizeof (char));
21d799b5
NC		 10899 local_got_refcounts = (bfd_signed_vma *)
10900 bfd_zalloc (abfd, size);
ba93b8ac
DJ		 10901 if (local_got_refcounts == NULL)
10902 return FALSE;
10903 elf_local_got_refcounts (abfd) = local_got_refcounts;
10904 elf32_arm_local_got_tls_type (abfd)
10905 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10906 }
10907 local_got_refcounts[r_symndx] += 1;
10908 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10909 }
10910
10911 /* We will already have issued an error message if there is a
10912 TLS / non-TLS mismatch, based on the symbol type. We don't
10913 support any linker relaxations. So just combine any TLS
10914 types needed. */
10915 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10916 && tls_type != GOT_NORMAL)
10917 tls_type |= old_tls_type;
10918
10919 if (old_tls_type != tls_type)
10920 {
10921 if (h != NULL)
10922 elf32_arm_hash_entry (h)->tls_type = tls_type;
10923 else
10924 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10925 }
10926 }
8029a119 10927 /* Fall through. */
ba93b8ac
DJ		 10928
10929 case R_ARM_TLS_LDM32:
10930 if (r_type == R_ARM_TLS_LDM32)
10931 htab->tls_ldm_got.refcount++;
8029a119 10932 /* Fall through. */
252b5132 10933
c19d1205 10934 case R_ARM_GOTOFF32:
5e681ec4
PB		 10935 case R_ARM_GOTPC:
10936 if (htab->sgot == NULL)
10937 {
10938 if (htab->root.dynobj == NULL)
10939 htab->root.dynobj = abfd;
10940 if (!create_got_section (htab->root.dynobj, info))
10941 return FALSE;
10942 }
252b5132
RH		 10943 break;
10944
00a97672
RS		 10945 case R_ARM_ABS12:
10946 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10947 ldr __GOTT_INDEX__ offsets. */
10948 if (!htab->vxworks_p)
10949 break;
8029a119 10950 /* Fall through. */
00a97672 10951
252b5132 10952 case R_ARM_PC24:
7359ea65 10953 case R_ARM_PLT32:
5b5bb741
PB		 10954 case R_ARM_CALL:
10955 case R_ARM_JUMP24:
eb043451 10956 case R_ARM_PREL31:
c19d1205 10957 case R_ARM_THM_CALL:
bd97cb95
DJ		 10958 case R_ARM_THM_JUMP24:
10959 case R_ARM_THM_JUMP19:
39623e12
PB		 10960 needs_plt = 1;
10961 goto normal_reloc;
10962
96c23d59
JM		 10963 case R_ARM_MOVW_ABS_NC:
10964 case R_ARM_MOVT_ABS:
10965 case R_ARM_THM_MOVW_ABS_NC:
10966 case R_ARM_THM_MOVT_ABS:
10967 if (info->shared)
10968 {
10969 (*_bfd_error_handler)
10970 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10971 abfd, elf32_arm_howto_table_1[r_type].name,
10972 (h) ? h->root.root.string : "a local symbol");
10973 bfd_set_error (bfd_error_bad_value);
10974 return FALSE;
10975 }
10976
10977 /* Fall through. */
39623e12
PB		 10978 case R_ARM_ABS32:
10979 case R_ARM_ABS32_NOI:
10980 case R_ARM_REL32:
10981 case R_ARM_REL32_NOI:
b6895b4f
PB		 10982 case R_ARM_MOVW_PREL_NC:
10983 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10984 case R_ARM_THM_MOVW_PREL_NC:
10985 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10986 needs_plt = 0;
10987 normal_reloc:
10988
b7693d02 10989 /* Should the interworking branches be listed here? */
7359ea65 10990 if (h != NULL)
5e681ec4
PB		 10991 {
10992 /* If this reloc is in a read-only section, we might
10993 need a copy reloc. We can't check reliably at this
10994 stage whether the section is read-only, as input
10995 sections have not yet been mapped to output sections.
10996 Tentatively set the flag for now, and correct in
10997 adjust_dynamic_symbol. */
7359ea65 10998 if (!info->shared)
f5385ebf 10999 h->non_got_ref = 1;
7359ea65 11000
5e681ec4 11001 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 11002 refers to is in a different object. We can't tell for
11003 sure yet, because something later might force the
11004 symbol local. */
39623e12 11005 if (needs_plt)
f5385ebf 11006 h->needs_plt = 1;
4f199be3
DJ		 11007
11008 /* If we create a PLT entry, this relocation will reference
11009 it, even if it's an ABS32 relocation. */
11010 h->plt.refcount += 1;
b7693d02 11011
bd97cb95
DJ		 11012 /* It's too early to use htab->use_blx here, so we have to
11013 record possible blx references separately from
11014 relocs that definitely need a thumb stub. */
11015
c19d1205 11016 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 11017 eh->plt_maybe_thumb_refcount += 1;
11018
11019 if (r_type == R_ARM_THM_JUMP24
11020 || r_type == R_ARM_THM_JUMP19)
b7693d02 11021 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 11022 }
11023
67687978
PB		 11024 /* If we are creating a shared library or relocatable executable,
11025 and this is a reloc against a global symbol, or a non PC
11026 relative reloc against a local symbol, then we need to copy
11027 the reloc into the shared library. However, if we are linking
11028 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 11029 global symbol which is defined in an object we are
11030 including in the link (i.e., DEF_REGULAR is set). At
11031 this point we have not seen all the input files, so it is
11032 possible that DEF_REGULAR is not set now but will be set
11033 later (it is never cleared). We account for that
11034 possibility below by storing information in the
5e681ec4 11035 relocs_copied field of the hash table entry. */
67687978 11036 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 11037 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 11038 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 11039 || (h != NULL && ! h->needs_plt
11040 && (! info->symbolic || ! h->def_regular))))
252b5132 11041 {
5e681ec4
PB		 11042 struct elf32_arm_relocs_copied *p, **head;
11043
252b5132
RH		 11044 /* When creating a shared object, we must copy these
11045 reloc types into the output file. We create a reloc
11046 section in dynobj and make room for this reloc. */
83bac4b0 11047 if (sreloc == NULL)
252b5132 11048 {
83bac4b0
NC		 11049 sreloc = _bfd_elf_make_dynamic_reloc_section
11050 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 11051
83bac4b0 11052 if (sreloc == NULL)
b34976b6 11053 return FALSE;
252b5132 11054
83bac4b0 11055 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 11056 if (htab->symbian_p)
252b5132 11057 {
83bac4b0 11058 flagword flags;
5e681ec4 11059
83bac4b0 11060 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 11061 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 11062 bfd_set_section_flags (dynobj, sreloc, flags);
11063 }
252b5132
RH		 11064 }
11065
5e681ec4
PB		 11066 /* If this is a global symbol, we count the number of
11067 relocations we need for this symbol. */
11068 if (h != NULL)
252b5132 11069 {
5e681ec4
PB		 11070 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
11071 }
11072 else
11073 {
11074 /* Track dynamic relocs needed for local syms too.
11075 We really need local syms available to do this
11076 easily. Oh well. */
5e681ec4 11077 asection *s;
6edfbbad 11078 void *vpp;
87d72d41 11079 Elf_Internal_Sym *isym;
6edfbbad 11080
87d72d41
AM		 11081 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11082 abfd, r_symndx);
11083 if (isym == NULL)
5e681ec4 11084 return FALSE;
57e8b36a 11085
87d72d41
AM		 11086 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11087 if (s == NULL)
11088 s = sec;
11089
6edfbbad
DJ		 11090 vpp = &elf_section_data (s)->local_dynrel;
11091 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 11092 }
57e8b36a 11093
5e681ec4
PB		 11094 p = *head;
11095 if (p == NULL || p->section != sec)
11096 {
11097 bfd_size_type amt = sizeof *p;
57e8b36a 11098
21d799b5
NC		 11099 p = (struct elf32_arm_relocs_copied *)
11100 bfd_alloc (htab->root.dynobj, amt);
252b5132 11101 if (p == NULL)
5e681ec4
PB		 11102 return FALSE;
11103 p->next = *head;
11104 *head = p;
11105 p->section = sec;
11106 p->count = 0;
ba93b8ac 11107 p->pc_count = 0;
252b5132 11108 }
57e8b36a 11109
bb224fc3 11110 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 11111 p->pc_count += 1;
71a976dd 11112 p->count += 1;
252b5132
RH		 11113 }
11114 break;
11115
11116 /* This relocation describes the C++ object vtable hierarchy.
11117 Reconstruct it for later use during GC. */
11118 case R_ARM_GNU_VTINHERIT:
c152c796 11119 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 11120 return FALSE;
252b5132 11121 break;
9a5aca8c 11122
252b5132
RH		 11123 /* This relocation describes which C++ vtable entries are actually
11124 used. Record for later use during GC. */
11125 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 11126 BFD_ASSERT (h != NULL);
11127 if (h != NULL
11128 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 11129 return FALSE;
252b5132
RH		 11130 break;
11131 }
11132 }
f21f3fe0 11133
b34976b6 11134 return TRUE;
252b5132
RH		 11135}
11136
6a5bb875
PB		 11137/* Unwinding tables are not referenced directly. This pass marks them as
11138 required if the corresponding code section is marked. */
11139
11140static bfd_boolean
906e58ca
NC		 11141elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11142 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11143{
11144 bfd *sub;
11145 Elf_Internal_Shdr **elf_shdrp;
11146 bfd_boolean again;
11147
11148 /* Marking EH data may cause additional code sections to be marked,
11149 requiring multiple passes. */
11150 again = TRUE;
11151 while (again)
11152 {
11153 again = FALSE;
11154 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11155 {
11156 asection *o;
11157
0ffa91dd 11158 if (! is_arm_elf (sub))
6a5bb875
PB		 11159 continue;
11160
11161 elf_shdrp = elf_elfsections (sub);
11162 for (o = sub->sections; o != NULL; o = o->next)
11163 {
11164 Elf_Internal_Shdr *hdr;
0ffa91dd 11165
6a5bb875 11166 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11167 if (hdr->sh_type == SHT_ARM_EXIDX
11168 && hdr->sh_link
11169 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11170 && !o->gc_mark
11171 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11172 {
11173 again = TRUE;
11174 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11175 return FALSE;
11176 }
11177 }
11178 }
11179 }
11180
11181 return TRUE;
11182}
11183
3c9458e9
NC		 11184/* Treat mapping symbols as special target symbols. */
11185
11186static bfd_boolean
11187elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11188{
b0796911
PB		 11189 return bfd_is_arm_special_symbol_name (sym->name,
11190 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11191}
11192
0367ecfb
NC		 11193/* This is a copy of elf_find_function() from elf.c except that
11194 ARM mapping symbols are ignored when looking for function names
11195 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11196
0367ecfb
NC		 11197static bfd_boolean
11198arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11199 asection * section,
11200 asymbol ** symbols,
11201 bfd_vma offset,
11202 const char ** filename_ptr,
11203 const char ** functionname_ptr)
11204{
11205 const char * filename = NULL;
11206 asymbol * func = NULL;
11207 bfd_vma low_func = 0;
11208 asymbol ** p;
252b5132
RH		 11209
11210 for (p = symbols; *p != NULL; p++)
11211 {
11212 elf_symbol_type *q;
11213
11214 q = (elf_symbol_type *) *p;
11215
252b5132
RH		 11216 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11217 {
11218 default:
11219 break;
11220 case STT_FILE:
11221 filename = bfd_asymbol_name (&q->symbol);
11222 break;
252b5132
RH		 11223 case STT_FUNC:
11224 case STT_ARM_TFUNC:
9d2da7ca 11225 case STT_NOTYPE:
b0796911 11226 /* Skip mapping symbols. */
0367ecfb 11227 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11228 && bfd_is_arm_special_symbol_name (q->symbol.name,
11229 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11230 continue;
11231 /* Fall through. */
6b40fcba 11232 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11233 && q->symbol.value >= low_func
11234 && q->symbol.value <= offset)
11235 {
11236 func = (asymbol *) q;
11237 low_func = q->symbol.value;
11238 }
11239 break;
11240 }
11241 }
11242
11243 if (func == NULL)
b34976b6 11244 return FALSE;
252b5132 11245
0367ecfb
NC		 11246 if (filename_ptr)
11247 *filename_ptr = filename;
11248 if (functionname_ptr)
11249 *functionname_ptr = bfd_asymbol_name (func);
11250
11251 return TRUE;
906e58ca 11252}
0367ecfb
NC		 11253
11254
11255/* Find the nearest line to a particular section and offset, for error
11256 reporting. This code is a duplicate of the code in elf.c, except
11257 that it uses arm_elf_find_function. */
11258
11259static bfd_boolean
11260elf32_arm_find_nearest_line (bfd * abfd,
11261 asection * section,
11262 asymbol ** symbols,
11263 bfd_vma offset,
11264 const char ** filename_ptr,
11265 const char ** functionname_ptr,
11266 unsigned int * line_ptr)
11267{
11268 bfd_boolean found = FALSE;
11269
11270 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11271
11272 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11273 filename_ptr, functionname_ptr,
11274 line_ptr, 0,
11275 & elf_tdata (abfd)->dwarf2_find_line_info))
11276 {
11277 if (!*functionname_ptr)
11278 arm_elf_find_function (abfd, section, symbols, offset,
11279 *filename_ptr ? NULL : filename_ptr,
11280 functionname_ptr);
f21f3fe0 11281
0367ecfb
NC		 11282 return TRUE;
11283 }
11284
11285 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11286 & found, filename_ptr,
11287 functionname_ptr, line_ptr,
11288 & elf_tdata (abfd)->line_info))
11289 return FALSE;
11290
11291 if (found && (*functionname_ptr || *line_ptr))
11292 return TRUE;
11293
11294 if (symbols == NULL)
11295 return FALSE;
11296
11297 if (! arm_elf_find_function (abfd, section, symbols, offset,
11298 filename_ptr, functionname_ptr))
11299 return FALSE;
11300
11301 *line_ptr = 0;
b34976b6 11302 return TRUE;
252b5132
RH		 11303}
11304
4ab527b0
FF		 11305static bfd_boolean
11306elf32_arm_find_inliner_info (bfd * abfd,
11307 const char ** filename_ptr,
11308 const char ** functionname_ptr,
11309 unsigned int * line_ptr)
11310{
11311 bfd_boolean found;
11312 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11313 functionname_ptr, line_ptr,
11314 & elf_tdata (abfd)->dwarf2_find_line_info);
11315 return found;
11316}
11317
252b5132
RH		 11318/* Adjust a symbol defined by a dynamic object and referenced by a
11319 regular object. The current definition is in some section of the
11320 dynamic object, but we're not including those sections. We have to
11321 change the definition to something the rest of the link can
11322 understand. */
11323
b34976b6 11324static bfd_boolean
57e8b36a
NC		 11325elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11326 struct elf_link_hash_entry * h)
252b5132
RH		 11327{
11328 bfd * dynobj;
11329 asection * s;
b7693d02 11330 struct elf32_arm_link_hash_entry * eh;
67687978 11331 struct elf32_arm_link_hash_table *globals;
252b5132 11332
67687978 11333 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11334 if (globals == NULL)
11335 return FALSE;
11336
252b5132
RH		 11337 dynobj = elf_hash_table (info)->dynobj;
11338
11339 /* Make sure we know what is going on here. */
11340 BFD_ASSERT (dynobj != NULL
f5385ebf 11341 && (h->needs_plt
f6e332e6 11342 || h->u.weakdef != NULL
f5385ebf
AM		 11343 || (h->def_dynamic
11344 && h->ref_regular
11345 && !h->def_regular)));
252b5132 11346
b7693d02
DJ		 11347 eh = (struct elf32_arm_link_hash_entry *) h;
11348
252b5132
RH		 11349 /* If this is a function, put it in the procedure linkage table. We
11350 will fill in the contents of the procedure linkage table later,
11351 when we know the address of the .got section. */
0f88be7a 11352 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11353 || h->needs_plt)
252b5132 11354 {
5e681ec4
PB		 11355 if (h->plt.refcount <= 0
11356 || SYMBOL_CALLS_LOCAL (info, h)
11357 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11358 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11359 {
11360 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11361 file, but the symbol was never referred to by a dynamic
11362 object, or if all references were garbage collected. In
11363 such a case, we don't actually need to build a procedure
11364 linkage table, and we can just do a PC24 reloc instead. */
11365 h->plt.offset = (bfd_vma) -1;
b7693d02 11366 eh->plt_thumb_refcount = 0;
bd97cb95 11367 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11368 h->needs_plt = 0;
252b5132
RH		 11369 }
11370
b34976b6 11371 return TRUE;
252b5132 11372 }
5e681ec4 11373 else
b7693d02
DJ		 11374 {
11375 /* It's possible that we incorrectly decided a .plt reloc was
11376 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11377 in check_relocs. We can't decide accurately between function
11378 and non-function syms in check-relocs; Objects loaded later in
11379 the link may change h->type. So fix it now. */
11380 h->plt.offset = (bfd_vma) -1;
11381 eh->plt_thumb_refcount = 0;
bd97cb95 11382 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11383 }
252b5132
RH		 11384
11385 /* If this is a weak symbol, and there is a real definition, the
11386 processor independent code will have arranged for us to see the
11387 real definition first, and we can just use the same value. */
f6e332e6 11388 if (h->u.weakdef != NULL)
252b5132 11389 {
f6e332e6
AM		 11390 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11391 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11392 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11393 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11394 return TRUE;
252b5132
RH		 11395 }
11396
ba93b8ac
DJ		 11397 /* If there are no non-GOT references, we do not need a copy
11398 relocation. */
11399 if (!h->non_got_ref)
11400 return TRUE;
11401
252b5132
RH		 11402 /* This is a reference to a symbol defined by a dynamic object which
11403 is not a function. */
11404
11405 /* If we are creating a shared library, we must presume that the
11406 only references to the symbol are via the global offset table.
11407 For such cases we need not do anything here; the relocations will
67687978
PB		 11408 be handled correctly by relocate_section. Relocatable executables
11409 can reference data in shared objects directly, so we don't need to
11410 do anything here. */
11411 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11412 return TRUE;
252b5132 11413
909272ee
AM		 11414 if (h->size == 0)
11415 {
11416 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11417 h->root.root.string);
11418 return TRUE;
11419 }
11420
252b5132
RH		 11421 /* We must allocate the symbol in our .dynbss section, which will
11422 become part of the .bss section of the executable. There will be
11423 an entry for this symbol in the .dynsym section. The dynamic
11424 object will contain position independent code, so all references
11425 from the dynamic object to this symbol will go through the global
11426 offset table. The dynamic linker will use the .dynsym entry to
11427 determine the address it must put in the global offset table, so
11428 both the dynamic object and the regular object will refer to the
11429 same memory location for the variable. */
252b5132
RH		 11430 s = bfd_get_section_by_name (dynobj, ".dynbss");
11431 BFD_ASSERT (s != NULL);
11432
11433 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11434 copy the initial value out of the dynamic object and into the
11435 runtime process image. We need to remember the offset into the
00a97672 11436 .rel(a).bss section we are going to use. */
252b5132
RH		 11437 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11438 {
11439 asection *srel;
11440
00a97672 11441 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11442 BFD_ASSERT (srel != NULL);
00a97672 11443 srel->size += RELOC_SIZE (globals);
f5385ebf 11444 h->needs_copy = 1;
252b5132
RH		 11445 }
11446
027297b7 11447 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11448}
11449
5e681ec4
PB		 11450/* Allocate space in .plt, .got and associated reloc sections for
11451 dynamic relocs. */
11452
11453static bfd_boolean
57e8b36a 11454allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11455{
11456 struct bfd_link_info *info;
11457 struct elf32_arm_link_hash_table *htab;
11458 struct elf32_arm_link_hash_entry *eh;
11459 struct elf32_arm_relocs_copied *p;
bd97cb95 11460 bfd_signed_vma thumb_refs;
5e681ec4 11461
b7693d02
DJ		 11462 eh = (struct elf32_arm_link_hash_entry *) h;
11463
5e681ec4
PB		 11464 if (h->root.type == bfd_link_hash_indirect)
11465 return TRUE;
11466
11467 if (h->root.type == bfd_link_hash_warning)
11468 /* When warning symbols are created, they **replace** the "real"
11469 entry in the hash table, thus we never get to see the real
11470 symbol in a hash traversal. So look at it now. */
11471 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11472
11473 info = (struct bfd_link_info *) inf;
11474 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11475 if (htab == NULL)
11476 return FALSE;
5e681ec4
PB		 11477
11478 if (htab->root.dynamic_sections_created
11479 && h->plt.refcount > 0)
11480 {
11481 /* Make sure this symbol is output as a dynamic symbol.
11482 Undefined weak syms won't yet be marked as dynamic. */
11483 if (h->dynindx == -1
f5385ebf 11484 && !h->forced_local)
5e681ec4 11485 {
c152c796 11486 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11487 return FALSE;
11488 }
11489
11490 if (info->shared
7359ea65 11491 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11492 {
11493 asection *s = htab->splt;
11494
11495 /* If this is the first .plt entry, make room for the special
11496 first entry. */
eea6121a 11497 if (s->size == 0)
e5a52504 11498 s->size += htab->plt_header_size;
5e681ec4 11499
eea6121a 11500 h->plt.offset = s->size;
5e681ec4 11501
b7693d02
DJ		 11502 /* If we will insert a Thumb trampoline before this PLT, leave room
11503 for it. */
bd97cb95
DJ		 11504 thumb_refs = eh->plt_thumb_refcount;
11505 if (!htab->use_blx)
11506 thumb_refs += eh->plt_maybe_thumb_refcount;
11507
11508 if (thumb_refs > 0)
b7693d02
DJ		 11509 {
11510 h->plt.offset += PLT_THUMB_STUB_SIZE;
11511 s->size += PLT_THUMB_STUB_SIZE;
11512 }
11513
5e681ec4
PB		 11514 /* If this symbol is not defined in a regular file, and we are
11515 not generating a shared library, then set the symbol to this
11516 location in the .plt. This is required to make function
11517 pointers compare as equal between the normal executable and
11518 the shared library. */
11519 if (! info->shared
f5385ebf 11520 && !h->def_regular)
5e681ec4
PB		 11521 {
11522 h->root.u.def.section = s;
11523 h->root.u.def.value = h->plt.offset;
5e681ec4 11524
67d74e43
DJ		 11525 /* Make sure the function is not marked as Thumb, in case
11526 it is the target of an ABS32 relocation, which will
11527 point to the PLT entry. */
11528 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11529 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11530 }
022f8312 11531
5e681ec4 11532 /* Make room for this entry. */
e5a52504 11533 s->size += htab->plt_entry_size;
5e681ec4 11534
e5a52504 11535 if (!htab->symbian_p)
b7693d02
DJ		 11536 {
11537 /* We also need to make an entry in the .got.plt section, which
11538 will be placed in the .got section by the linker script. */
11539 eh->plt_got_offset = htab->sgotplt->size;
11540 htab->sgotplt->size += 4;
11541 }
5e681ec4 11542
00a97672
RS		 11543 /* We also need to make an entry in the .rel(a).plt section. */
11544 htab->srelplt->size += RELOC_SIZE (htab);
11545
11546 /* VxWorks executables have a second set of relocations for
11547 each PLT entry. They go in a separate relocation section,
11548 which is processed by the kernel loader. */
11549 if (htab->vxworks_p && !info->shared)
11550 {
11551 /* There is a relocation for the initial PLT entry:
11552 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11553 if (h->plt.offset == htab->plt_header_size)
11554 htab->srelplt2->size += RELOC_SIZE (htab);
11555
11556 /* There are two extra relocations for each subsequent
11557 PLT entry: an R_ARM_32 relocation for the GOT entry,
11558 and an R_ARM_32 relocation for the PLT entry. */
11559 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11560 }
5e681ec4
PB		 11561 }
11562 else
11563 {
11564 h->plt.offset = (bfd_vma) -1;
f5385ebf 11565 h->needs_plt = 0;
5e681ec4
PB		 11566 }
11567 }
11568 else
11569 {
11570 h->plt.offset = (bfd_vma) -1;
f5385ebf 11571 h->needs_plt = 0;
5e681ec4
PB		 11572 }
11573
11574 if (h->got.refcount > 0)
11575 {
11576 asection *s;
11577 bfd_boolean dyn;
ba93b8ac
DJ		 11578 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11579 int indx;
5e681ec4
PB		 11580
11581 /* Make sure this symbol is output as a dynamic symbol.
11582 Undefined weak syms won't yet be marked as dynamic. */
11583 if (h->dynindx == -1
f5385ebf 11584 && !h->forced_local)
5e681ec4 11585 {
c152c796 11586 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11587 return FALSE;
11588 }
11589
e5a52504
MM		 11590 if (!htab->symbian_p)
11591 {
11592 s = htab->sgot;
11593 h->got.offset = s->size;
ba93b8ac
DJ		 11594
11595 if (tls_type == GOT_UNKNOWN)
11596 abort ();
11597
11598 if (tls_type == GOT_NORMAL)
11599 /* Non-TLS symbols need one GOT slot. */
11600 s->size += 4;
11601 else
11602 {
11603 if (tls_type & GOT_TLS_GD)
11604 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11605 s->size += 8;
11606 if (tls_type & GOT_TLS_IE)
11607 /* R_ARM_TLS_IE32 needs one GOT slot. */
11608 s->size += 4;
11609 }
11610
e5a52504 11611 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11612
11613 indx = 0;
11614 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11615 && (!info->shared
11616 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11617 indx = h->dynindx;
11618
11619 if (tls_type != GOT_NORMAL
11620 && (info->shared || indx != 0)
11621 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11622 || h->root.type != bfd_link_hash_undefweak))
11623 {
11624 if (tls_type & GOT_TLS_IE)
00a97672 11625 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11626
11627 if (tls_type & GOT_TLS_GD)
00a97672 11628 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11629
11630 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11631 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11632 }
11633 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11634 || h->root.type != bfd_link_hash_undefweak)
11635 && (info->shared
11636 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11637 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11638 }
5e681ec4
PB		 11639 }
11640 else
11641 h->got.offset = (bfd_vma) -1;
11642
a4fd1a8e
PB		 11643 /* Allocate stubs for exported Thumb functions on v4t. */
11644 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11645 && h->def_regular
a4fd1a8e
PB		 11646 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11647 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11648 {
11649 struct elf_link_hash_entry * th;
11650 struct bfd_link_hash_entry * bh;
11651 struct elf_link_hash_entry * myh;
11652 char name[1024];
11653 asection *s;
11654 bh = NULL;
11655 /* Create a new symbol to regist the real location of the function. */
11656 s = h->root.u.def.section;
906e58ca 11657 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11658 _bfd_generic_link_add_one_symbol (info, s->owner,
11659 name, BSF_GLOBAL, s,
11660 h->root.u.def.value,
11661 NULL, TRUE, FALSE, &bh);
11662
11663 myh = (struct elf_link_hash_entry *) bh;
11664 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11665 myh->forced_local = 1;
11666 eh->export_glue = myh;
11667 th = record_arm_to_thumb_glue (info, h);
11668 /* Point the symbol at the stub. */
11669 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11670 h->root.u.def.section = th->root.u.def.section;
11671 h->root.u.def.value = th->root.u.def.value & ~1;
11672 }
11673
5e681ec4
PB		 11674 if (eh->relocs_copied == NULL)
11675 return TRUE;
11676
11677 /* In the shared -Bsymbolic case, discard space allocated for
11678 dynamic pc-relative relocs against symbols which turn out to be
11679 defined in regular objects. For the normal shared case, discard
11680 space for pc-relative relocs that have become local due to symbol
11681 visibility changes. */
11682
67687978 11683 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11684 {
7bdca076 11685 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11686 R_ARM_REL32_NOI, which will appear on something like
11687 ".long foo - .". We want calls to protected symbols to resolve
11688 directly to the function rather than going via the plt. If people
11689 want function pointer comparisons to work as expected then they
11690 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11691 if (SYMBOL_CALLS_LOCAL (info, h))
11692 {
11693 struct elf32_arm_relocs_copied **pp;
11694
11695 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11696 {
11697 p->count -= p->pc_count;
11698 p->pc_count = 0;
11699 if (p->count == 0)
11700 *pp = p->next;
11701 else
11702 pp = &p->next;
11703 }
11704 }
11705
4dfe6ac6 11706 if (htab->vxworks_p)
3348747a
NS		 11707 {
11708 struct elf32_arm_relocs_copied **pp;
11709
11710 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11711 {
11712 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11713 *pp = p->next;
11714 else
11715 pp = &p->next;
11716 }
11717 }
11718
ba93b8ac 11719 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11720 visibility. */
22d606e9 11721 if (eh->relocs_copied != NULL
5e681ec4 11722 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11723 {
11724 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11725 eh->relocs_copied = NULL;
11726
11727 /* Make sure undefined weak symbols are output as a dynamic
11728 symbol in PIEs. */
11729 else if (h->dynindx == -1
11730 && !h->forced_local)
11731 {
11732 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11733 return FALSE;
11734 }
11735 }
11736
67687978
PB		 11737 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11738 && h->root.type == bfd_link_hash_new)
11739 {
11740 /* Output absolute symbols so that we can create relocations
11741 against them. For normal symbols we output a relocation
11742 against the section that contains them. */
11743 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11744 return FALSE;
11745 }
11746
5e681ec4
PB		 11747 }
11748 else
11749 {
11750 /* For the non-shared case, discard space for relocs against
11751 symbols which turn out to need copy relocs or are not
11752 dynamic. */
11753
f5385ebf
AM		 11754 if (!h->non_got_ref
11755 && ((h->def_dynamic
11756 && !h->def_regular)
5e681ec4
PB		 11757 || (htab->root.dynamic_sections_created
11758 && (h->root.type == bfd_link_hash_undefweak
11759 || h->root.type == bfd_link_hash_undefined))))
11760 {
11761 /* Make sure this symbol is output as a dynamic symbol.
11762 Undefined weak syms won't yet be marked as dynamic. */
11763 if (h->dynindx == -1
f5385ebf 11764 && !h->forced_local)
5e681ec4 11765 {
c152c796 11766 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11767 return FALSE;
11768 }
11769
11770 /* If that succeeded, we know we'll be keeping all the
11771 relocs. */
11772 if (h->dynindx != -1)
11773 goto keep;
11774 }
11775
11776 eh->relocs_copied = NULL;
11777
11778 keep: ;
11779 }
11780
11781 /* Finally, allocate space. */
11782 for (p = eh->relocs_copied; p != NULL; p = p->next)
11783 {
11784 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11785 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11786 }
11787
11788 return TRUE;
11789}
11790
08d1f311
DJ		 11791/* Find any dynamic relocs that apply to read-only sections. */
11792
11793static bfd_boolean
8029a119 11794elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11795{
8029a119
NC		 11796 struct elf32_arm_link_hash_entry * eh;
11797 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11798
11799 if (h->root.type == bfd_link_hash_warning)
11800 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11801
11802 eh = (struct elf32_arm_link_hash_entry *) h;
11803 for (p = eh->relocs_copied; p != NULL; p = p->next)
11804 {
11805 asection *s = p->section;
11806
11807 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11808 {
11809 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11810
11811 info->flags |= DF_TEXTREL;
11812
11813 /* Not an error, just cut short the traversal. */
11814 return FALSE;
11815 }
11816 }
11817 return TRUE;
11818}
11819
d504ffc8
DJ		 11820void
11821bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11822 int byteswap_code)
11823{
11824 struct elf32_arm_link_hash_table *globals;
11825
11826 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11827 if (globals == NULL)
11828 return;
11829
d504ffc8
DJ		 11830 globals->byteswap_code = byteswap_code;
11831}
11832
252b5132
RH		 11833/* Set the sizes of the dynamic sections. */
11834
b34976b6 11835static bfd_boolean
57e8b36a
NC		 11836elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11837 struct bfd_link_info * info)
252b5132
RH		 11838{
11839 bfd * dynobj;
11840 asection * s;
b34976b6
AM		 11841 bfd_boolean plt;
11842 bfd_boolean relocs;
5e681ec4
PB		 11843 bfd *ibfd;
11844 struct elf32_arm_link_hash_table *htab;
252b5132 11845
5e681ec4 11846 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11847 if (htab == NULL)
11848 return FALSE;
11849
252b5132
RH		 11850 dynobj = elf_hash_table (info)->dynobj;
11851 BFD_ASSERT (dynobj != NULL);
39b41c9c 11852 check_use_blx (htab);
252b5132
RH		 11853
11854 if (elf_hash_table (info)->dynamic_sections_created)
11855 {
11856 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11857 if (info->executable)
252b5132
RH		 11858 {
11859 s = bfd_get_section_by_name (dynobj, ".interp");
11860 BFD_ASSERT (s != NULL);
eea6121a 11861 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11862 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11863 }
11864 }
5e681ec4
PB		 11865
11866 /* Set up .got offsets for local syms, and space for local dynamic
11867 relocs. */
11868 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11869 {
5e681ec4
PB		 11870 bfd_signed_vma *local_got;
11871 bfd_signed_vma *end_local_got;
11872 char *local_tls_type;
11873 bfd_size_type locsymcount;
11874 Elf_Internal_Shdr *symtab_hdr;
11875 asection *srel;
4dfe6ac6 11876 bfd_boolean is_vxworks = htab->vxworks_p;
5e681ec4 11877
0ffa91dd 11878 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11879 continue;
11880
11881 for (s = ibfd->sections; s != NULL; s = s->next)
11882 {
11883 struct elf32_arm_relocs_copied *p;
11884
21d799b5
NC		 11885 for (p = (struct elf32_arm_relocs_copied *)
11886 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11887 {
11888 if (!bfd_is_abs_section (p->section)
11889 && bfd_is_abs_section (p->section->output_section))
11890 {
11891 /* Input section has been discarded, either because
11892 it is a copy of a linkonce section or due to
11893 linker script /DISCARD/, so we'll be discarding
11894 the relocs too. */
11895 }
3348747a
NS		 11896 else if (is_vxworks
11897 && strcmp (p->section->output_section->name,
11898 ".tls_vars") == 0)
11899 {
11900 /* Relocations in vxworks .tls_vars sections are
11901 handled specially by the loader. */
11902 }
5e681ec4
PB		 11903 else if (p->count != 0)
11904 {
11905 srel = elf_section_data (p->section)->sreloc;
00a97672 11906 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11907 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11908 info->flags |= DF_TEXTREL;
11909 }
11910 }
11911 }
11912
11913 local_got = elf_local_got_refcounts (ibfd);
11914 if (!local_got)
11915 continue;
11916
0ffa91dd 11917 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11918 locsymcount = symtab_hdr->sh_info;
11919 end_local_got = local_got + locsymcount;
ba93b8ac 11920 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11921 s = htab->sgot;
11922 srel = htab->srelgot;
11923 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11924 {
11925 if (*local_got > 0)
11926 {
eea6121a 11927 *local_got = s->size;
ba93b8ac
DJ		 11928 if (*local_tls_type & GOT_TLS_GD)
11929 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11930 s->size += 8;
11931 if (*local_tls_type & GOT_TLS_IE)
11932 s->size += 4;
11933 if (*local_tls_type == GOT_NORMAL)
11934 s->size += 4;
11935
11936 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11937 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11938 }
11939 else
11940 *local_got = (bfd_vma) -1;
11941 }
252b5132
RH		 11942 }
11943
ba93b8ac
DJ		 11944 if (htab->tls_ldm_got.refcount > 0)
11945 {
11946 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11947 for R_ARM_TLS_LDM32 relocations. */
11948 htab->tls_ldm_got.offset = htab->sgot->size;
11949 htab->sgot->size += 8;
11950 if (info->shared)
00a97672 11951 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11952 }
11953 else
11954 htab->tls_ldm_got.offset = -1;
11955
5e681ec4
PB		 11956 /* Allocate global sym .plt and .got entries, and space for global
11957 sym dynamic relocs. */
57e8b36a 11958 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11959
d504ffc8
DJ		 11960 /* Here we rummage through the found bfds to collect glue information. */
11961 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11962 {
0ffa91dd 11963 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11964 continue;
11965
c7b8f16e
JB		 11966 /* Initialise mapping tables for code/data. */
11967 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11968
c7b8f16e
JB		 11969 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11970 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11971 /* xgettext:c-format */
11972 _bfd_error_handler (_("Errors encountered processing file %s"),
11973 ibfd->filename);
11974 }
d504ffc8 11975
3e6b1042
DJ		 11976 /* Allocate space for the glue sections now that we've sized them. */
11977 bfd_elf32_arm_allocate_interworking_sections (info);
11978
252b5132
RH		 11979 /* The check_relocs and adjust_dynamic_symbol entry points have
11980 determined the sizes of the various dynamic sections. Allocate
11981 memory for them. */
b34976b6
AM		 11982 plt = FALSE;
11983 relocs = FALSE;
252b5132
RH		 11984 for (s = dynobj->sections; s != NULL; s = s->next)
11985 {
11986 const char * name;
252b5132
RH		 11987
11988 if ((s->flags & SEC_LINKER_CREATED) == 0)
11989 continue;
11990
11991 /* It's OK to base decisions on the section name, because none
11992 of the dynobj section names depend upon the input files. */
11993 name = bfd_get_section_name (dynobj, s);
11994
24a1ba0f 11995 if (strcmp (name, ".plt") == 0)
252b5132 11996 {
c456f082
AM		 11997 /* Remember whether there is a PLT. */
11998 plt = s->size != 0;
252b5132 11999 }
0112cd26 12000 else if (CONST_STRNEQ (name, ".rel"))
252b5132 12001 {
c456f082 12002 if (s->size != 0)
252b5132 12003 {
252b5132 12004 /* Remember whether there are any reloc sections other
00a97672
RS		 12005 than .rel(a).plt and .rela.plt.unloaded. */
12006 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 12007 relocs = TRUE;
252b5132
RH		 12008
12009 /* We use the reloc_count field as a counter if we need
12010 to copy relocs into the output file. */
12011 s->reloc_count = 0;
12012 }
12013 }
0112cd26 12014 else if (! CONST_STRNEQ (name, ".got")
c456f082 12015 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 12016 {
12017 /* It's not one of our sections, so don't allocate space. */
12018 continue;
12019 }
12020
c456f082 12021 if (s->size == 0)
252b5132 12022 {
c456f082 12023 /* If we don't need this section, strip it from the
00a97672
RS		 12024 output file. This is mostly to handle .rel(a).bss and
12025 .rel(a).plt. We must create both sections in
c456f082
AM		 12026 create_dynamic_sections, because they must be created
12027 before the linker maps input sections to output
12028 sections. The linker does that before
12029 adjust_dynamic_symbol is called, and it is that
12030 function which decides whether anything needs to go
12031 into these sections. */
8423293d 12032 s->flags |= SEC_EXCLUDE;
252b5132
RH		 12033 continue;
12034 }
12035
c456f082
AM		 12036 if ((s->flags & SEC_HAS_CONTENTS) == 0)
12037 continue;
12038
252b5132 12039 /* Allocate memory for the section contents. */
21d799b5 12040 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 12041 if (s->contents == NULL)
b34976b6 12042 return FALSE;
252b5132
RH		 12043 }
12044
12045 if (elf_hash_table (info)->dynamic_sections_created)
12046 {
12047 /* Add some entries to the .dynamic section. We fill in the
12048 values later, in elf32_arm_finish_dynamic_sections, but we
12049 must add the entries now so that we get the correct size for
12050 the .dynamic section. The DT_DEBUG entry is filled in by the
12051 dynamic linker and used by the debugger. */
dc810e39 12052#define add_dynamic_entry(TAG, VAL) \
5a580b3a 12053 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 12054
8532796c 12055 if (info->executable)
252b5132 12056 {
dc810e39 12057 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 12058 return FALSE;
252b5132
RH		 12059 }
12060
12061 if (plt)
12062 {
dc810e39
AM		 12063 if ( !add_dynamic_entry (DT_PLTGOT, 0)
12064 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 12065 || !add_dynamic_entry (DT_PLTREL,
12066 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 12067 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 12068 return FALSE;
252b5132
RH		 12069 }
12070
12071 if (relocs)
12072 {
00a97672
RS		 12073 if (htab->use_rel)
12074 {
12075 if (!add_dynamic_entry (DT_REL, 0)
12076 || !add_dynamic_entry (DT_RELSZ, 0)
12077 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
12078 return FALSE;
12079 }
12080 else
12081 {
12082 if (!add_dynamic_entry (DT_RELA, 0)
12083 || !add_dynamic_entry (DT_RELASZ, 0)
12084 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12085 return FALSE;
12086 }
252b5132
RH		 12087 }
12088
08d1f311
DJ		 12089 /* If any dynamic relocs apply to a read-only section,
12090 then we need a DT_TEXTREL entry. */
12091 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 12092 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12093 info);
08d1f311 12094
99e4ae17 12095 if ((info->flags & DF_TEXTREL) != 0)
252b5132 12096 {
dc810e39 12097 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 12098 return FALSE;
252b5132 12099 }
7a2b07ff
NS		 12100 if (htab->vxworks_p
12101 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12102 return FALSE;
252b5132 12103 }
8532796c 12104#undef add_dynamic_entry
252b5132 12105
b34976b6 12106 return TRUE;
252b5132
RH		 12107}
12108
252b5132
RH		 12109/* Finish up dynamic symbol handling. We set the contents of various
12110 dynamic sections here. */
12111
b34976b6 12112static bfd_boolean
906e58ca
NC		 12113elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12114 struct bfd_link_info * info,
12115 struct elf_link_hash_entry * h,
12116 Elf_Internal_Sym * sym)
252b5132
RH		 12117{
12118 bfd * dynobj;
e5a52504 12119 struct elf32_arm_link_hash_table *htab;
b7693d02 12120 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 12121
12122 dynobj = elf_hash_table (info)->dynobj;
e5a52504 12123 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12124 if (htab == NULL)
12125 return FALSE;
12126
b7693d02 12127 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 12128
12129 if (h->plt.offset != (bfd_vma) -1)
12130 {
12131 asection * splt;
252b5132 12132 asection * srel;
e5a52504 12133 bfd_byte *loc;
24a1ba0f 12134 bfd_vma plt_index;
947216bf 12135 Elf_Internal_Rela rel;
252b5132
RH		 12136
12137 /* This symbol has an entry in the procedure linkage table. Set
12138 it up. */
12139
12140 BFD_ASSERT (h->dynindx != -1);
12141
12142 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 12143 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 12144 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 12145
e5a52504
MM		 12146 /* Fill in the entry in the procedure linkage table. */
12147 if (htab->symbian_p)
12148 {
906e58ca 12149 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12150 elf32_arm_symbian_plt_entry[0],
12151 splt->contents + h->plt.offset);
906e58ca 12152 bfd_put_32 (output_bfd,
52ab56c2
PB		 12153 elf32_arm_symbian_plt_entry[1],
12154 splt->contents + h->plt.offset + 4);
906e58ca 12155
e5a52504 12156 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12157 rel.r_offset = (splt->output_section->vma
12158 + splt->output_offset
52ab56c2 12159 + h->plt.offset + 4);
e5a52504 12160 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12161
12162 /* Get the index in the procedure linkage table which
12163 corresponds to this symbol. This is the index of this symbol
12164 in all the symbols for which we are making plt entries. The
12165 first entry in the procedure linkage table is reserved. */
906e58ca 12166 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12167 / htab->plt_entry_size);
e5a52504
MM		 12168 }
12169 else
12170 {
00a97672 12171 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12172 bfd_vma got_displacement;
12173 asection * sgot;
52ab56c2 12174 bfd_byte * ptr;
906e58ca 12175
e5a52504
MM		 12176 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
12177 BFD_ASSERT (sgot != NULL);
12178
b7693d02
DJ		 12179 /* Get the offset into the .got.plt table of the entry that
12180 corresponds to this function. */
12181 got_offset = eh->plt_got_offset;
12182
12183 /* Get the index in the procedure linkage table which
12184 corresponds to this symbol. This is the index of this symbol
12185 in all the symbols for which we are making plt entries. The
12186 first three entries in .got.plt are reserved; after that
12187 symbols appear in the same order as in .plt. */
12188 plt_index = (got_offset - 12) / 4;
e5a52504 12189
00a97672
RS		 12190 /* Calculate the address of the GOT entry. */
12191 got_address = (sgot->output_section->vma
12192 + sgot->output_offset
12193 + got_offset);
5e681ec4 12194
00a97672
RS		 12195 /* ...and the address of the PLT entry. */
12196 plt_address = (splt->output_section->vma
12197 + splt->output_offset
12198 + h->plt.offset);
5e681ec4 12199
52ab56c2 12200 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 12201 if (htab->vxworks_p && info->shared)
12202 {
12203 unsigned int i;
12204 bfd_vma val;
12205
52ab56c2 12206 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12207 {
12208 val = elf32_arm_vxworks_shared_plt_entry[i];
12209 if (i == 2)
12210 val |= got_address - sgot->output_section->vma;
12211 if (i == 5)
12212 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12213 if (i == 2 || i == 5)
12214 bfd_put_32 (output_bfd, val, ptr);
12215 else
12216 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12217 }
12218 }
12219 else if (htab->vxworks_p)
b7693d02 12220 {
00a97672
RS		 12221 unsigned int i;
12222 bfd_vma val;
12223
d3753b85 12224 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12225 {
12226 val = elf32_arm_vxworks_exec_plt_entry[i];
12227 if (i == 2)
12228 val |= got_address;
12229 if (i == 4)
12230 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12231 if (i == 5)
12232 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12233 if (i == 2 || i == 5)
12234 bfd_put_32 (output_bfd, val, ptr);
12235 else
12236 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12237 }
12238
12239 loc = (htab->srelplt2->contents
12240 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12241
12242 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12243 referencing the GOT for this PLT entry. */
12244 rel.r_offset = plt_address + 8;
12245 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12246 rel.r_addend = got_offset;
12247 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12248 loc += RELOC_SIZE (htab);
12249
12250 /* Create the R_ARM_ABS32 relocation referencing the
12251 beginning of the PLT for this GOT entry. */
12252 rel.r_offset = got_address;
12253 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12254 rel.r_addend = 0;
12255 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12256 }
00a97672
RS		 12257 else
12258 {
bd97cb95 12259 bfd_signed_vma thumb_refs;
00a97672
RS		 12260 /* Calculate the displacement between the PLT slot and the
12261 entry in the GOT. The eight-byte offset accounts for the
12262 value produced by adding to pc in the first instruction
12263 of the PLT stub. */
12264 got_displacement = got_address - (plt_address + 8);
b7693d02 12265
00a97672
RS		 12266 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12267
bd97cb95
DJ		 12268 thumb_refs = eh->plt_thumb_refcount;
12269 if (!htab->use_blx)
12270 thumb_refs += eh->plt_maybe_thumb_refcount;
12271
12272 if (thumb_refs > 0)
00a97672 12273 {
52ab56c2
PB		 12274 put_thumb_insn (htab, output_bfd,
12275 elf32_arm_plt_thumb_stub[0], ptr - 4);
12276 put_thumb_insn (htab, output_bfd,
12277 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12278 }
12279
52ab56c2
PB		 12280 put_arm_insn (htab, output_bfd,
12281 elf32_arm_plt_entry[0]
12282 | ((got_displacement & 0x0ff00000) >> 20),
12283 ptr + 0);
12284 put_arm_insn (htab, output_bfd,
12285 elf32_arm_plt_entry[1]
12286 | ((got_displacement & 0x000ff000) >> 12),
12287 ptr+ 4);
12288 put_arm_insn (htab, output_bfd,
12289 elf32_arm_plt_entry[2]
12290 | (got_displacement & 0x00000fff),
12291 ptr + 8);
5e681ec4 12292#ifdef FOUR_WORD_PLT
52ab56c2 12293 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12294#endif
00a97672 12295 }
252b5132 12296
e5a52504
MM		 12297 /* Fill in the entry in the global offset table. */
12298 bfd_put_32 (output_bfd,
12299 (splt->output_section->vma
12300 + splt->output_offset),
12301 sgot->contents + got_offset);
906e58ca 12302
00a97672
RS		 12303 /* Fill in the entry in the .rel(a).plt section. */
12304 rel.r_addend = 0;
12305 rel.r_offset = got_address;
e5a52504
MM		 12306 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12307 }
57e8b36a 12308
00a97672
RS		 12309 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12310 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12311
f5385ebf 12312 if (!h->def_regular)
252b5132
RH		 12313 {
12314 /* Mark the symbol as undefined, rather than as defined in
12315 the .plt section. Leave the value alone. */
12316 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12317 /* If the symbol is weak, we do need to clear the value.
12318 Otherwise, the PLT entry would provide a definition for
12319 the symbol even if the symbol wasn't defined anywhere,
12320 and so the symbol would never be NULL. */
f5385ebf 12321 if (!h->ref_regular_nonweak)
d982ba73 12322 sym->st_value = 0;
252b5132
RH		 12323 }
12324 }
12325
ba93b8ac
DJ		 12326 if (h->got.offset != (bfd_vma) -1
12327 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12328 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12329 {
12330 asection * sgot;
12331 asection * srel;
947216bf
AM		 12332 Elf_Internal_Rela rel;
12333 bfd_byte *loc;
00a97672 12334 bfd_vma offset;
252b5132
RH		 12335
12336 /* This symbol has an entry in the global offset table. Set it
12337 up. */
252b5132 12338 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12339 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12340 BFD_ASSERT (sgot != NULL && srel != NULL);
12341
00a97672
RS		 12342 offset = (h->got.offset & ~(bfd_vma) 1);
12343 rel.r_addend = 0;
252b5132
RH		 12344 rel.r_offset = (sgot->output_section->vma
12345 + sgot->output_offset
00a97672 12346 + offset);
252b5132 12347
5e681ec4
PB		 12348 /* If this is a static link, or it is a -Bsymbolic link and the
12349 symbol is defined locally or was forced to be local because
12350 of a version file, we just want to emit a RELATIVE reloc.
12351 The entry in the global offset table will already have been
12352 initialized in the relocate_section function. */
252b5132 12353 if (info->shared
5e681ec4
PB		 12354 && SYMBOL_REFERENCES_LOCAL (info, h))
12355 {
906e58ca 12356 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12357 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12358 if (!htab->use_rel)
12359 {
12360 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12361 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12362 }
5e681ec4 12363 }
252b5132
RH		 12364 else
12365 {
906e58ca 12366 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12367 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12368 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12369 }
12370
00a97672
RS		 12371 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12372 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12373 }
12374
f5385ebf 12375 if (h->needs_copy)
252b5132
RH		 12376 {
12377 asection * s;
947216bf
AM		 12378 Elf_Internal_Rela rel;
12379 bfd_byte *loc;
252b5132
RH		 12380
12381 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12382 BFD_ASSERT (h->dynindx != -1
12383 && (h->root.type == bfd_link_hash_defined
12384 || h->root.type == bfd_link_hash_defweak));
12385
12386 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12387 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12388 BFD_ASSERT (s != NULL);
12389
00a97672 12390 rel.r_addend = 0;
252b5132
RH		 12391 rel.r_offset = (h->root.u.def.value
12392 + h->root.u.def.section->output_section->vma
12393 + h->root.u.def.section->output_offset);
12394 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12395 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12396 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12397 }
12398
00a97672
RS		 12399 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12400 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12401 to the ".got" section. */
252b5132 12402 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12403 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12404 sym->st_shndx = SHN_ABS;
12405
b34976b6 12406 return TRUE;
252b5132
RH		 12407}
12408
12409/* Finish up the dynamic sections. */
12410
b34976b6 12411static bfd_boolean
57e8b36a 12412elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12413{
12414 bfd * dynobj;
12415 asection * sgot;
12416 asection * sdyn;
4dfe6ac6
NC		 12417 struct elf32_arm_link_hash_table *htab;
12418
12419 htab = elf32_arm_hash_table (info);
12420 if (htab == NULL)
12421 return FALSE;
252b5132
RH		 12422
12423 dynobj = elf_hash_table (info)->dynobj;
12424
12425 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
4dfe6ac6 12426 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 12427 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12428
12429 if (elf_hash_table (info)->dynamic_sections_created)
12430 {
12431 asection *splt;
12432 Elf32_External_Dyn *dyncon, *dynconend;
12433
12434 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12435 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12436
12437 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12438 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12439
252b5132
RH		 12440 for (; dyncon < dynconend; dyncon++)
12441 {
12442 Elf_Internal_Dyn dyn;
12443 const char * name;
12444 asection * s;
12445
12446 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12447
12448 switch (dyn.d_tag)
12449 {
229fcec5
MM		 12450 unsigned int type;
12451
252b5132 12452 default:
7a2b07ff
NS		 12453 if (htab->vxworks_p
12454 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12455 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12456 break;
12457
229fcec5
MM		 12458 case DT_HASH:
12459 name = ".hash";
12460 goto get_vma_if_bpabi;
12461 case DT_STRTAB:
12462 name = ".dynstr";
12463 goto get_vma_if_bpabi;
12464 case DT_SYMTAB:
12465 name = ".dynsym";
12466 goto get_vma_if_bpabi;
c0042f5d
MM		 12467 case DT_VERSYM:
12468 name = ".gnu.version";
12469 goto get_vma_if_bpabi;
12470 case DT_VERDEF:
12471 name = ".gnu.version_d";
12472 goto get_vma_if_bpabi;
12473 case DT_VERNEED:
12474 name = ".gnu.version_r";
12475 goto get_vma_if_bpabi;
12476
252b5132
RH		 12477 case DT_PLTGOT:
12478 name = ".got";
12479 goto get_vma;
12480 case DT_JMPREL:
00a97672 12481 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12482 get_vma:
12483 s = bfd_get_section_by_name (output_bfd, name);
12484 BFD_ASSERT (s != NULL);
229fcec5
MM		 12485 if (!htab->symbian_p)
12486 dyn.d_un.d_ptr = s->vma;
12487 else
12488 /* In the BPABI, tags in the PT_DYNAMIC section point
12489 at the file offset, not the memory address, for the
12490 convenience of the post linker. */
12491 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12492 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12493 break;
12494
229fcec5
MM		 12495 get_vma_if_bpabi:
12496 if (htab->symbian_p)
12497 goto get_vma;
12498 break;
12499
252b5132 12500 case DT_PLTRELSZ:
00a97672
RS		 12501 s = bfd_get_section_by_name (output_bfd,
12502 RELOC_SECTION (htab, ".plt"));
252b5132 12503 BFD_ASSERT (s != NULL);
eea6121a 12504 dyn.d_un.d_val = s->size;
252b5132
RH		 12505 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12506 break;
906e58ca 12507
252b5132 12508 case DT_RELSZ:
00a97672 12509 case DT_RELASZ:
229fcec5
MM		 12510 if (!htab->symbian_p)
12511 {
12512 /* My reading of the SVR4 ABI indicates that the
12513 procedure linkage table relocs (DT_JMPREL) should be
12514 included in the overall relocs (DT_REL). This is
12515 what Solaris does. However, UnixWare can not handle
12516 that case. Therefore, we override the DT_RELSZ entry
12517 here to make it not include the JMPREL relocs. Since
00a97672 12518 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12519 other relocation sections, we don't have to worry
12520 about changing the DT_REL entry. */
00a97672
RS		 12521 s = bfd_get_section_by_name (output_bfd,
12522 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12523 if (s != NULL)
12524 dyn.d_un.d_val -= s->size;
12525 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12526 break;
12527 }
8029a119 12528 /* Fall through. */
229fcec5
MM		 12529
12530 case DT_REL:
12531 case DT_RELA:
229fcec5
MM		 12532 /* In the BPABI, the DT_REL tag must point at the file
12533 offset, not the VMA, of the first relocation
12534 section. So, we use code similar to that in
12535 elflink.c, but do not check for SHF_ALLOC on the
12536 relcoation section, since relocations sections are
12537 never allocated under the BPABI. The comments above
12538 about Unixware notwithstanding, we include all of the
12539 relocations here. */
12540 if (htab->symbian_p)
12541 {
12542 unsigned int i;
12543 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12544 ? SHT_REL : SHT_RELA);
12545 dyn.d_un.d_val = 0;
12546 for (i = 1; i < elf_numsections (output_bfd); i++)
12547 {
906e58ca 12548 Elf_Internal_Shdr *hdr
229fcec5
MM		 12549 = elf_elfsections (output_bfd)[i];
12550 if (hdr->sh_type == type)
12551 {
906e58ca 12552 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12553 || dyn.d_tag == DT_RELASZ)
12554 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12555 else if ((ufile_ptr) hdr->sh_offset
12556 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12557 dyn.d_un.d_val = hdr->sh_offset;
12558 }
12559 }
12560 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12561 }
252b5132 12562 break;
88f7bcd5
NC		 12563
12564 /* Set the bottom bit of DT_INIT/FINI if the
12565 corresponding function is Thumb. */
12566 case DT_INIT:
12567 name = info->init_function;
12568 goto get_sym;
12569 case DT_FINI:
12570 name = info->fini_function;
12571 get_sym:
12572 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12573 then there is nothing to adjust. */
88f7bcd5
NC		 12574 if (dyn.d_un.d_val != 0)
12575 {
12576 struct elf_link_hash_entry * eh;
12577
12578 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12579 FALSE, FALSE, TRUE);
906e58ca 12580 if (eh != NULL
88f7bcd5
NC		 12581 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12582 {
12583 dyn.d_un.d_val |= 1;
b34976b6 12584 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12585 }
12586 }
12587 break;
252b5132
RH		 12588 }
12589 }
12590
24a1ba0f 12591 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 12592 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 12593 {
00a97672
RS		 12594 const bfd_vma *plt0_entry;
12595 bfd_vma got_address, plt_address, got_displacement;
12596
12597 /* Calculate the addresses of the GOT and PLT. */
12598 got_address = sgot->output_section->vma + sgot->output_offset;
12599 plt_address = splt->output_section->vma + splt->output_offset;
12600
12601 if (htab->vxworks_p)
12602 {
12603 /* The VxWorks GOT is relocated by the dynamic linker.
12604 Therefore, we must emit relocations rather than simply
12605 computing the values now. */
12606 Elf_Internal_Rela rel;
12607
12608 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12609 put_arm_insn (htab, output_bfd, plt0_entry[0],
12610 splt->contents + 0);
12611 put_arm_insn (htab, output_bfd, plt0_entry[1],
12612 splt->contents + 4);
12613 put_arm_insn (htab, output_bfd, plt0_entry[2],
12614 splt->contents + 8);
00a97672
RS		 12615 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12616
8029a119 12617 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12618 rel.r_offset = plt_address + 12;
12619 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12620 rel.r_addend = 0;
12621 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12622 htab->srelplt2->contents);
12623 }
12624 else
12625 {
12626 got_displacement = got_address - (plt_address + 16);
12627
12628 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12629 put_arm_insn (htab, output_bfd, plt0_entry[0],
12630 splt->contents + 0);
12631 put_arm_insn (htab, output_bfd, plt0_entry[1],
12632 splt->contents + 4);
12633 put_arm_insn (htab, output_bfd, plt0_entry[2],
12634 splt->contents + 8);
12635 put_arm_insn (htab, output_bfd, plt0_entry[3],
12636 splt->contents + 12);
5e681ec4 12637
5e681ec4 12638#ifdef FOUR_WORD_PLT
00a97672
RS		 12639 /* The displacement value goes in the otherwise-unused
12640 last word of the second entry. */
12641 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12642#else
00a97672 12643 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12644#endif
00a97672 12645 }
f7a74f8c 12646 }
252b5132
RH		 12647
12648 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12649 really seem like the right value. */
74541ad4
AM		 12650 if (splt->output_section->owner == output_bfd)
12651 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12652
12653 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12654 {
12655 /* Correct the .rel(a).plt.unloaded relocations. They will have
12656 incorrect symbol indexes. */
12657 int num_plts;
eed62c48 12658 unsigned char *p;
00a97672
RS		 12659
12660 num_plts = ((htab->splt->size - htab->plt_header_size)
12661 / htab->plt_entry_size);
12662 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12663
12664 for (; num_plts; num_plts--)
12665 {
12666 Elf_Internal_Rela rel;
12667
12668 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12669 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12670 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12671 p += RELOC_SIZE (htab);
12672
12673 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12674 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12675 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12676 p += RELOC_SIZE (htab);
12677 }
12678 }
252b5132
RH		 12679 }
12680
12681 /* Fill in the first three entries in the global offset table. */
229fcec5 12682 if (sgot)
252b5132 12683 {
229fcec5
MM		 12684 if (sgot->size > 0)
12685 {
12686 if (sdyn == NULL)
12687 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12688 else
12689 bfd_put_32 (output_bfd,
12690 sdyn->output_section->vma + sdyn->output_offset,
12691 sgot->contents);
12692 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12693 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12694 }
252b5132 12695
229fcec5
MM		 12696 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12697 }
252b5132 12698
b34976b6 12699 return TRUE;
252b5132
RH		 12700}
12701
ba96a88f 12702static void
57e8b36a 12703elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12704{
9b485d32 12705 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12706 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12707
12708 i_ehdrp = elf_elfheader (abfd);
12709
94a3258f
PB		 12710 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12711 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12712 else
12713 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12714 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12715
93204d3a
PB		 12716 if (link_info)
12717 {
12718 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 12719 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 12720 i_ehdrp->e_flags |= EF_ARM_BE8;
12721 }
ba96a88f
NC		 12722}
12723
99e4ae17 12724static enum elf_reloc_type_class
57e8b36a 12725elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12726{
f51e552e 12727 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12728 {
12729 case R_ARM_RELATIVE:
12730 return reloc_class_relative;
12731 case R_ARM_JUMP_SLOT:
12732 return reloc_class_plt;
12733 case R_ARM_COPY:
12734 return reloc_class_copy;
12735 default:
12736 return reloc_class_normal;
12737 }
12738}
12739
e16bb312
NC		 12740/* Set the right machine number for an Arm ELF file. */
12741
12742static bfd_boolean
57e8b36a 12743elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12744{
12745 if (hdr->sh_type == SHT_NOTE)
12746 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12747
12748 return TRUE;
12749}
12750
e489d0ae 12751static void
57e8b36a 12752elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12753{
5a6c6817 12754 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12755}
12756
40a18ebd
NC		 12757/* Return TRUE if this is an unwinding table entry. */
12758
12759static bfd_boolean
12760is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12761{
0112cd26
NC		 12762 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12763 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12764}
12765
12766
12767/* Set the type and flags for an ARM section. We do this by
12768 the section name, which is a hack, but ought to work. */
12769
12770static bfd_boolean
12771elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12772{
12773 const char * name;
12774
12775 name = bfd_get_section_name (abfd, sec);
12776
12777 if (is_arm_elf_unwind_section_name (abfd, name))
12778 {
12779 hdr->sh_type = SHT_ARM_EXIDX;
12780 hdr->sh_flags |= SHF_LINK_ORDER;
12781 }
12782 return TRUE;
12783}
12784
6dc132d9
L		 12785/* Handle an ARM specific section when reading an object file. This is
12786 called when bfd_section_from_shdr finds a section with an unknown
12787 type. */
40a18ebd
NC		 12788
12789static bfd_boolean
12790elf32_arm_section_from_shdr (bfd *abfd,
12791 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12792 const char *name,
12793 int shindex)
40a18ebd
NC		 12794{
12795 /* There ought to be a place to keep ELF backend specific flags, but
12796 at the moment there isn't one. We just keep track of the
12797 sections by their name, instead. Fortunately, the ABI gives
12798 names for all the ARM specific sections, so we will probably get
12799 away with this. */
12800 switch (hdr->sh_type)
12801 {
12802 case SHT_ARM_EXIDX:
0951f019
RE		 12803 case SHT_ARM_PREEMPTMAP:
12804 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12805 break;
12806
12807 default:
12808 return FALSE;
12809 }
12810
6dc132d9 12811 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12812 return FALSE;
12813
12814 return TRUE;
12815}
e489d0ae 12816
44444f50
NC		 12817static _arm_elf_section_data *
12818get_arm_elf_section_data (asection * sec)
12819{
47b2e99c
JZ		 12820 if (sec && sec->owner && is_arm_elf (sec->owner))
12821 return elf32_arm_section_data (sec);
44444f50
NC		 12822 else
12823 return NULL;
8e3de13a
NC		 12824}
12825
4e617b1e
PB		 12826typedef struct
12827{
12828 void *finfo;
12829 struct bfd_link_info *info;
91a5743d
PB		 12830 asection *sec;
12831 int sec_shndx;
6e0b88f1
AM		 12832 int (*func) (void *, const char *, Elf_Internal_Sym *,
12833 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12834} output_arch_syminfo;
12835
12836enum map_symbol_type
12837{
12838 ARM_MAP_ARM,
12839 ARM_MAP_THUMB,
12840 ARM_MAP_DATA
12841};
12842
12843
7413f23f 12844/* Output a single mapping symbol. */
4e617b1e
PB		 12845
12846static bfd_boolean
7413f23f
DJ		 12847elf32_arm_output_map_sym (output_arch_syminfo *osi,
12848 enum map_symbol_type type,
12849 bfd_vma offset)
4e617b1e
PB		 12850{
12851 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 12852 Elf_Internal_Sym sym;
12853
91a5743d
PB		 12854 sym.st_value = osi->sec->output_section->vma
12855 + osi->sec->output_offset
12856 + offset;
4e617b1e
PB		 12857 sym.st_size = 0;
12858 sym.st_other = 0;
12859 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12860 sym.st_shndx = osi->sec_shndx;
fe33d2fa 12861 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 12862 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12863}
12864
12865
12866/* Output mapping symbols for PLT entries associated with H. */
12867
12868static bfd_boolean
12869elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12870{
12871 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12872 struct elf32_arm_link_hash_table *htab;
12873 struct elf32_arm_link_hash_entry *eh;
12874 bfd_vma addr;
12875
4e617b1e
PB		 12876 if (h->root.type == bfd_link_hash_indirect)
12877 return TRUE;
12878
12879 if (h->root.type == bfd_link_hash_warning)
12880 /* When warning symbols are created, they **replace** the "real"
12881 entry in the hash table, thus we never get to see the real
12882 symbol in a hash traversal. So look at it now. */
12883 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12884
12885 if (h->plt.offset == (bfd_vma) -1)
12886 return TRUE;
12887
4dfe6ac6
NC		 12888 htab = elf32_arm_hash_table (osi->info);
12889 if (htab == NULL)
12890 return FALSE;
12891
4e617b1e
PB		 12892 eh = (struct elf32_arm_link_hash_entry *) h;
12893 addr = h->plt.offset;
12894 if (htab->symbian_p)
12895 {
7413f23f 12896 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12897 return FALSE;
7413f23f 12898 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12899 return FALSE;
12900 }
12901 else if (htab->vxworks_p)
12902 {
7413f23f 12903 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12904 return FALSE;
7413f23f 12905 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12906 return FALSE;
7413f23f 12907 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12908 return FALSE;
7413f23f 12909 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12910 return FALSE;
12911 }
12912 else
12913 {
bd97cb95
DJ		 12914 bfd_signed_vma thumb_refs;
12915
12916 thumb_refs = eh->plt_thumb_refcount;
12917 if (!htab->use_blx)
12918 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12919
bd97cb95 12920 if (thumb_refs > 0)
4e617b1e 12921 {
7413f23f 12922 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12923 return FALSE;
12924 }
12925#ifdef FOUR_WORD_PLT
7413f23f 12926 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12927 return FALSE;
7413f23f 12928 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12929 return FALSE;
12930#else
906e58ca 12931 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12932 so only need to output a mapping symbol for the first PLT entry and
12933 entries with thumb thunks. */
bd97cb95 12934 if (thumb_refs > 0 || addr == 20)
4e617b1e 12935 {
7413f23f 12936 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12937 return FALSE;
12938 }
12939#endif
12940 }
12941
12942 return TRUE;
12943}
12944
7413f23f
DJ		 12945/* Output a single local symbol for a generated stub. */
12946
12947static bfd_boolean
12948elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12949 bfd_vma offset, bfd_vma size)
12950{
7413f23f
DJ		 12951 Elf_Internal_Sym sym;
12952
7413f23f
DJ		 12953 sym.st_value = osi->sec->output_section->vma
12954 + osi->sec->output_offset
12955 + offset;
12956 sym.st_size = size;
12957 sym.st_other = 0;
12958 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12959 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12960 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12961}
4e617b1e 12962
da5938a2 12963static bfd_boolean
8029a119
NC		 12964arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12965 void * in_arg)
da5938a2
NC		 12966{
12967 struct elf32_arm_stub_hash_entry *stub_entry;
12968 struct bfd_link_info *info;
da5938a2
NC		 12969 asection *stub_sec;
12970 bfd_vma addr;
7413f23f 12971 char *stub_name;
9a008db3 12972 output_arch_syminfo *osi;
d3ce72d0 12973 const insn_sequence *template_sequence;
461a49ca
DJ		 12974 enum stub_insn_type prev_type;
12975 int size;
12976 int i;
12977 enum map_symbol_type sym_type;
da5938a2
NC		 12978
12979 /* Massage our args to the form they really have. */
12980 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12981 osi = (output_arch_syminfo *) in_arg;
da5938a2 12982
da5938a2
NC		 12983 info = osi->info;
12984
da5938a2
NC		 12985 stub_sec = stub_entry->stub_sec;
12986
12987 /* Ensure this stub is attached to the current section being
7413f23f 12988 processed. */
da5938a2
NC		 12989 if (stub_sec != osi->sec)
12990 return TRUE;
12991
7413f23f
DJ		 12992 addr = (bfd_vma) stub_entry->stub_offset;
12993 stub_name = stub_entry->output_name;
da5938a2 12994
d3ce72d0
NC		 12995 template_sequence = stub_entry->stub_template;
12996 switch (template_sequence[0].type)
7413f23f 12997 {
461a49ca
DJ		 12998 case ARM_TYPE:
12999 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 13000 return FALSE;
13001 break;
461a49ca 13002 case THUMB16_TYPE:
48229727 13003 case THUMB32_TYPE:
461a49ca
DJ		 13004 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
13005 stub_entry->stub_size))
da5938a2
NC		 13006 return FALSE;
13007 break;
13008 default:
13009 BFD_FAIL ();
48229727 13010 return 0;
7413f23f 13011 }
da5938a2 13012
461a49ca
DJ		 13013 prev_type = DATA_TYPE;
13014 size = 0;
13015 for (i = 0; i < stub_entry->stub_template_size; i++)
13016 {
d3ce72d0 13017 switch (template_sequence[i].type)
461a49ca
DJ		 13018 {
13019 case ARM_TYPE:
13020 sym_type = ARM_MAP_ARM;
13021 break;
13022
13023 case THUMB16_TYPE:
48229727 13024 case THUMB32_TYPE:
461a49ca
DJ		 13025 sym_type = ARM_MAP_THUMB;
13026 break;
13027
13028 case DATA_TYPE:
13029 sym_type = ARM_MAP_DATA;
13030 break;
13031
13032 default:
13033 BFD_FAIL ();
4e31c731 13034 return FALSE;
461a49ca
DJ		 13035 }
13036
d3ce72d0 13037 if (template_sequence[i].type != prev_type)
461a49ca 13038 {
d3ce72d0 13039 prev_type = template_sequence[i].type;
461a49ca
DJ		 13040 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
13041 return FALSE;
13042 }
13043
d3ce72d0 13044 switch (template_sequence[i].type)
461a49ca
DJ		 13045 {
13046 case ARM_TYPE:
48229727 13047 case THUMB32_TYPE:
461a49ca
DJ		 13048 size += 4;
13049 break;
13050
13051 case THUMB16_TYPE:
13052 size += 2;
13053 break;
13054
13055 case DATA_TYPE:
13056 size += 4;
13057 break;
13058
13059 default:
13060 BFD_FAIL ();
4e31c731 13061 return FALSE;
461a49ca
DJ		 13062 }
13063 }
13064
da5938a2
NC		 13065 return TRUE;
13066}
13067
33811162
DG		 13068/* Output mapping symbols for linker generated sections,
13069 and for those data-only sections that do not have a
13070 $d. */
4e617b1e
PB		 13071
13072static bfd_boolean
13073elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 13074 struct bfd_link_info *info,
13075 void *finfo,
6e0b88f1
AM		 13076 int (*func) (void *, const char *,
13077 Elf_Internal_Sym *,
13078 asection *,
13079 struct elf_link_hash_entry *))
4e617b1e
PB		 13080{
13081 output_arch_syminfo osi;
13082 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 13083 bfd_vma offset;
13084 bfd_size_type size;
33811162 13085 bfd *input_bfd;
4e617b1e
PB		 13086
13087 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13088 if (htab == NULL)
13089 return FALSE;
13090
906e58ca 13091 check_use_blx (htab);
91a5743d 13092
4e617b1e
PB		 13093 osi.finfo = finfo;
13094 osi.info = info;
13095 osi.func = func;
906e58ca 13096
33811162
DG		 13097 /* Add a $d mapping symbol to data-only sections that
13098 don't have any mapping symbol. This may result in (harmless) redundant
13099 mapping symbols. */
13100 for (input_bfd = info->input_bfds;
13101 input_bfd != NULL;
13102 input_bfd = input_bfd->link_next)
13103 {
13104 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
13105 for (osi.sec = input_bfd->sections;
13106 osi.sec != NULL;
13107 osi.sec = osi.sec->next)
13108 {
13109 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 13110 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
13111 != 0)
33811162
DG		 13112 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
13113 == SEC_HAS_CONTENTS
13114 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0
DJ		 13115 && get_arm_elf_section_data (osi.sec)->mapcount == 0
13116 && osi.sec->size > 0)
33811162
DG		 13117 {
13118 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13119 (output_bfd, osi.sec->output_section);
13120 if (osi.sec_shndx != (int)SHN_BAD)
13121 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
13122 }
13123 }
13124 }
13125
91a5743d
PB		 13126 /* ARM->Thumb glue. */
13127 if (htab->arm_glue_size > 0)
13128 {
13129 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13130 ARM2THUMB_GLUE_SECTION_NAME);
13131
13132 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13133 (output_bfd, osi.sec->output_section);
13134 if (info->shared || htab->root.is_relocatable_executable
13135 || htab->pic_veneer)
13136 size = ARM2THUMB_PIC_GLUE_SIZE;
13137 else if (htab->use_blx)
13138 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13139 else
13140 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13141
91a5743d
PB		 13142 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13143 {
7413f23f
DJ		 13144 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13145 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13146 }
13147 }
13148
13149 /* Thumb->ARM glue. */
13150 if (htab->thumb_glue_size > 0)
13151 {
13152 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13153 THUMB2ARM_GLUE_SECTION_NAME);
13154
13155 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13156 (output_bfd, osi.sec->output_section);
13157 size = THUMB2ARM_GLUE_SIZE;
13158
13159 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13160 {
7413f23f
DJ		 13161 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13162 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13163 }
13164 }
13165
845b51d6
PB		 13166 /* ARMv4 BX veneers. */
13167 if (htab->bx_glue_size > 0)
13168 {
13169 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13170 ARM_BX_GLUE_SECTION_NAME);
13171
13172 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13173 (output_bfd, osi.sec->output_section);
13174
7413f23f 13175 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13176 }
13177
8029a119
NC		 13178 /* Long calls stubs. */
13179 if (htab->stub_bfd && htab->stub_bfd->sections)
13180 {
da5938a2 13181 asection* stub_sec;
8029a119 13182
da5938a2
NC		 13183 for (stub_sec = htab->stub_bfd->sections;
13184 stub_sec != NULL;
8029a119
NC		 13185 stub_sec = stub_sec->next)
13186 {
13187 /* Ignore non-stub sections. */
13188 if (!strstr (stub_sec->name, STUB_SUFFIX))
13189 continue;
da5938a2 13190
8029a119 13191 osi.sec = stub_sec;
da5938a2 13192
8029a119
NC		 13193 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13194 (output_bfd, osi.sec->output_section);
da5938a2 13195
8029a119
NC		 13196 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13197 }
13198 }
da5938a2 13199
91a5743d
PB		 13200 /* Finally, output mapping symbols for the PLT. */
13201 if (!htab->splt || htab->splt->size == 0)
13202 return TRUE;
13203
13204 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13205 htab->splt->output_section);
91a5743d 13206 osi.sec = htab->splt;
4e617b1e
PB		 13207 /* Output mapping symbols for the plt header. SymbianOS does not have a
13208 plt header. */
13209 if (htab->vxworks_p)
13210 {
13211 /* VxWorks shared libraries have no PLT header. */
13212 if (!info->shared)
13213 {
7413f23f 13214 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13215 return FALSE;
7413f23f 13216 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13217 return FALSE;
13218 }
13219 }
13220 else if (!htab->symbian_p)
13221 {
7413f23f 13222 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13223 return FALSE;
13224#ifndef FOUR_WORD_PLT
7413f23f 13225 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13226 return FALSE;
13227#endif
13228 }
13229
13230 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13231 return TRUE;
13232}
13233
e489d0ae
PB		 13234/* Allocate target specific section data. */
13235
13236static bfd_boolean
13237elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13238{
f592407e
AM		 13239 if (!sec->used_by_bfd)
13240 {
13241 _arm_elf_section_data *sdata;
13242 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13243
21d799b5 13244 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 13245 if (sdata == NULL)
13246 return FALSE;
13247 sec->used_by_bfd = sdata;
13248 }
e489d0ae
PB		 13249
13250 return _bfd_elf_new_section_hook (abfd, sec);
13251}
13252
13253
13254/* Used to order a list of mapping symbols by address. */
13255
13256static int
13257elf32_arm_compare_mapping (const void * a, const void * b)
13258{
7f6a71ff
JM		 13259 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13260 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13261
13262 if (amap->vma > bmap->vma)
13263 return 1;
13264 else if (amap->vma < bmap->vma)
13265 return -1;
13266 else if (amap->type > bmap->type)
13267 /* Ensure results do not depend on the host qsort for objects with
13268 multiple mapping symbols at the same address by sorting on type
13269 after vma. */
13270 return 1;
13271 else if (amap->type < bmap->type)
13272 return -1;
13273 else
13274 return 0;
e489d0ae
PB		 13275}
13276
2468f9c9
PB		 13277/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13278
13279static unsigned long
13280offset_prel31 (unsigned long addr, bfd_vma offset)
13281{
13282 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13283}
13284
13285/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13286 relocations. */
13287
13288static void
13289copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13290{
13291 unsigned long first_word = bfd_get_32 (output_bfd, from);
13292 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13293
13294 /* High bit of first word is supposed to be zero. */
13295 if ((first_word & 0x80000000ul) == 0)
13296 first_word = offset_prel31 (first_word, offset);
13297
13298 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13299 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13300 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13301 second_word = offset_prel31 (second_word, offset);
13302
13303 bfd_put_32 (output_bfd, first_word, to);
13304 bfd_put_32 (output_bfd, second_word, to + 4);
13305}
e489d0ae 13306
48229727
JB		 13307/* Data for make_branch_to_a8_stub(). */
13308
13309struct a8_branch_to_stub_data {
13310 asection *writing_section;
13311 bfd_byte *contents;
13312};
13313
13314
13315/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13316 places for a particular section. */
13317
13318static bfd_boolean
13319make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13320 void *in_arg)
13321{
13322 struct elf32_arm_stub_hash_entry *stub_entry;
13323 struct a8_branch_to_stub_data *data;
13324 bfd_byte *contents;
13325 unsigned long branch_insn;
13326 bfd_vma veneered_insn_loc, veneer_entry_loc;
13327 bfd_signed_vma branch_offset;
13328 bfd *abfd;
91d6fa6a 13329 unsigned int target;
48229727
JB		 13330
13331 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13332 data = (struct a8_branch_to_stub_data *) in_arg;
13333
13334 if (stub_entry->target_section != data->writing_section
13335 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13336 return TRUE;
13337
13338 contents = data->contents;
13339
13340 veneered_insn_loc = stub_entry->target_section->output_section->vma
13341 + stub_entry->target_section->output_offset
13342 + stub_entry->target_value;
13343
13344 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13345 + stub_entry->stub_sec->output_offset
13346 + stub_entry->stub_offset;
13347
13348 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13349 veneered_insn_loc &= ~3u;
13350
13351 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13352
13353 abfd = stub_entry->target_section->owner;
91d6fa6a 13354 target = stub_entry->target_value;
48229727
JB		 13355
13356 /* We attempt to avoid this condition by setting stubs_always_after_branch
13357 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13358 This check is just to be on the safe side... */
13359 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13360 {
13361 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13362 "allocated in unsafe location"), abfd);
13363 return FALSE;
13364 }
13365
13366 switch (stub_entry->stub_type)
13367 {
13368 case arm_stub_a8_veneer_b:
13369 case arm_stub_a8_veneer_b_cond:
13370 branch_insn = 0xf0009000;
13371 goto jump24;
13372
13373 case arm_stub_a8_veneer_blx:
13374 branch_insn = 0xf000e800;
13375 goto jump24;
13376
13377 case arm_stub_a8_veneer_bl:
13378 {
13379 unsigned int i1, j1, i2, j2, s;
13380
13381 branch_insn = 0xf000d000;
13382
13383 jump24:
13384 if (branch_offset < -16777216 || branch_offset > 16777214)
13385 {
13386 /* There's not much we can do apart from complain if this
13387 happens. */
13388 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13389 "of range (input file too large)"), abfd);
13390 return FALSE;
13391 }
13392
13393 /* i1 = not(j1 eor s), so:
13394 not i1 = j1 eor s
13395 j1 = (not i1) eor s. */
13396
13397 branch_insn |= (branch_offset >> 1) & 0x7ff;
13398 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13399 i2 = (branch_offset >> 22) & 1;
13400 i1 = (branch_offset >> 23) & 1;
13401 s = (branch_offset >> 24) & 1;
13402 j1 = (!i1) ^ s;
13403 j2 = (!i2) ^ s;
13404 branch_insn |= j2 << 11;
13405 branch_insn |= j1 << 13;
13406 branch_insn |= s << 26;
13407 }
13408 break;
13409
13410 default:
13411 BFD_FAIL ();
13412 return FALSE;
13413 }
13414
91d6fa6a
NC		 13415 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
13416 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 13417
13418 return TRUE;
13419}
13420
e489d0ae
PB		 13421/* Do code byteswapping. Return FALSE afterwards so that the section is
13422 written out as normal. */
13423
13424static bfd_boolean
c7b8f16e 13425elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13426 struct bfd_link_info *link_info,
13427 asection *sec,
e489d0ae
PB		 13428 bfd_byte *contents)
13429{
48229727 13430 unsigned int mapcount, errcount;
8e3de13a 13431 _arm_elf_section_data *arm_data;
c7b8f16e 13432 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13433 elf32_arm_section_map *map;
c7b8f16e 13434 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13435 bfd_vma ptr;
13436 bfd_vma end;
c7b8f16e 13437 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13438 bfd_byte tmp;
48229727 13439 unsigned int i;
57e8b36a 13440
4dfe6ac6
NC		 13441 if (globals == NULL)
13442 return FALSE;
13443
8e3de13a
NC		 13444 /* If this section has not been allocated an _arm_elf_section_data
13445 structure then we cannot record anything. */
13446 arm_data = get_arm_elf_section_data (sec);
13447 if (arm_data == NULL)
13448 return FALSE;
13449
13450 mapcount = arm_data->mapcount;
13451 map = arm_data->map;
c7b8f16e
JB		 13452 errcount = arm_data->erratumcount;
13453
13454 if (errcount != 0)
13455 {
13456 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13457
13458 for (errnode = arm_data->erratumlist; errnode != 0;
13459 errnode = errnode->next)
13460 {
91d6fa6a 13461 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 13462
13463 switch (errnode->type)
13464 {
13465 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13466 {
13467 bfd_vma branch_to_veneer;
13468 /* Original condition code of instruction, plus bit mask for
13469 ARM B instruction. */
13470 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13471 | 0x0a000000;
13472
13473 /* The instruction is before the label. */
91d6fa6a 13474 target -= 4;
c7b8f16e
JB		 13475
13476 /* Above offset included in -4 below. */
13477 branch_to_veneer = errnode->u.b.veneer->vma
13478 - errnode->vma - 4;
13479
13480 if ((signed) branch_to_veneer < -(1 << 25)
13481 || (signed) branch_to_veneer >= (1 << 25))
13482 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13483 "range"), output_bfd);
13484
13485 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 13486 contents[endianflip ^ target] = insn & 0xff;
13487 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13488 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13489 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13490 }
13491 break;
13492
13493 case VFP11_ERRATUM_ARM_VENEER:
13494 {
13495 bfd_vma branch_from_veneer;
13496 unsigned int insn;
13497
13498 /* Take size of veneer into account. */
13499 branch_from_veneer = errnode->u.v.branch->vma
13500 - errnode->vma - 12;
13501
13502 if ((signed) branch_from_veneer < -(1 << 25)
13503 || (signed) branch_from_veneer >= (1 << 25))
13504 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13505 "range"), output_bfd);
13506
13507 /* Original instruction. */
13508 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 13509 contents[endianflip ^ target] = insn & 0xff;
13510 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13511 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13512 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13513
13514 /* Branch back to insn after original insn. */
13515 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 13516 contents[endianflip ^ (target + 4)] = insn & 0xff;
13517 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
13518 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
13519 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13520 }
13521 break;
13522
13523 default:
13524 abort ();
13525 }
13526 }
13527 }
e489d0ae 13528
2468f9c9
PB		 13529 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13530 {
13531 arm_unwind_table_edit *edit_node
13532 = arm_data->u.exidx.unwind_edit_list;
13533 /* Now, sec->size is the size of the section we will write. The original
13534 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13535 markers) was sec->rawsize. (This isn't the case if we perform no
13536 edits, then rawsize will be zero and we should use size). */
21d799b5 13537 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 13538 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13539 unsigned int in_index, out_index;
13540 bfd_vma add_to_offsets = 0;
13541
13542 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13543 {
13544 if (edit_node)
13545 {
13546 unsigned int edit_index = edit_node->index;
13547
13548 if (in_index < edit_index && in_index * 8 < input_size)
13549 {
13550 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13551 contents + in_index * 8, add_to_offsets);
13552 out_index++;
13553 in_index++;
13554 }
13555 else if (in_index == edit_index
13556 || (in_index * 8 >= input_size
13557 && edit_index == UINT_MAX))
13558 {
13559 switch (edit_node->type)
13560 {
13561 case DELETE_EXIDX_ENTRY:
13562 in_index++;
13563 add_to_offsets += 8;
13564 break;
13565
13566 case INSERT_EXIDX_CANTUNWIND_AT_END:
13567 {
13568 asection *text_sec = edit_node->linked_section;
13569 bfd_vma text_offset = text_sec->output_section->vma
13570 + text_sec->output_offset
13571 + text_sec->size;
13572 bfd_vma exidx_offset = offset + out_index * 8;
13573 unsigned long prel31_offset;
13574
13575 /* Note: this is meant to be equivalent to an
13576 R_ARM_PREL31 relocation. These synthetic
13577 EXIDX_CANTUNWIND markers are not relocated by the
13578 usual BFD method. */
13579 prel31_offset = (text_offset - exidx_offset)
13580 & 0x7ffffffful;
13581
13582 /* First address we can't unwind. */
13583 bfd_put_32 (output_bfd, prel31_offset,
13584 &edited_contents[out_index * 8]);
13585
13586 /* Code for EXIDX_CANTUNWIND. */
13587 bfd_put_32 (output_bfd, 0x1,
13588 &edited_contents[out_index * 8 + 4]);
13589
13590 out_index++;
13591 add_to_offsets -= 8;
13592 }
13593 break;
13594 }
13595
13596 edit_node = edit_node->next;
13597 }
13598 }
13599 else
13600 {
13601 /* No more edits, copy remaining entries verbatim. */
13602 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13603 contents + in_index * 8, add_to_offsets);
13604 out_index++;
13605 in_index++;
13606 }
13607 }
13608
13609 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13610 bfd_set_section_contents (output_bfd, sec->output_section,
13611 edited_contents,
13612 (file_ptr) sec->output_offset, sec->size);
13613
13614 return TRUE;
13615 }
13616
48229727
JB		 13617 /* Fix code to point to Cortex-A8 erratum stubs. */
13618 if (globals->fix_cortex_a8)
13619 {
13620 struct a8_branch_to_stub_data data;
13621
13622 data.writing_section = sec;
13623 data.contents = contents;
13624
13625 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13626 &data);
13627 }
13628
e489d0ae
PB		 13629 if (mapcount == 0)
13630 return FALSE;
13631
c7b8f16e 13632 if (globals->byteswap_code)
e489d0ae 13633 {
c7b8f16e 13634 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13635
c7b8f16e
JB		 13636 ptr = map[0].vma;
13637 for (i = 0; i < mapcount; i++)
13638 {
13639 if (i == mapcount - 1)
13640 end = sec->size;
13641 else
13642 end = map[i + 1].vma;
e489d0ae 13643
c7b8f16e 13644 switch (map[i].type)
e489d0ae 13645 {
c7b8f16e
JB		 13646 case 'a':
13647 /* Byte swap code words. */
13648 while (ptr + 3 < end)
13649 {
13650 tmp = contents[ptr];
13651 contents[ptr] = contents[ptr + 3];
13652 contents[ptr + 3] = tmp;
13653 tmp = contents[ptr + 1];
13654 contents[ptr + 1] = contents[ptr + 2];
13655 contents[ptr + 2] = tmp;
13656 ptr += 4;
13657 }
13658 break;
e489d0ae 13659
c7b8f16e
JB		 13660 case 't':
13661 /* Byte swap code halfwords. */
13662 while (ptr + 1 < end)
13663 {
13664 tmp = contents[ptr];
13665 contents[ptr] = contents[ptr + 1];
13666 contents[ptr + 1] = tmp;
13667 ptr += 2;
13668 }
13669 break;
13670
13671 case 'd':
13672 /* Leave data alone. */
13673 break;
13674 }
13675 ptr = end;
13676 }
e489d0ae 13677 }
8e3de13a 13678
93204d3a 13679 free (map);
47b2e99c 13680 arm_data->mapcount = -1;
c7b8f16e 13681 arm_data->mapsize = 0;
8e3de13a 13682 arm_data->map = NULL;
8e3de13a 13683
e489d0ae
PB		 13684 return FALSE;
13685}
13686
b7693d02
DJ		 13687/* Display STT_ARM_TFUNC symbols as functions. */
13688
13689static void
13690elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13691 asymbol *asym)
13692{
13693 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13694
13695 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13696 elfsym->symbol.flags |= BSF_FUNCTION;
13697}
13698
0beaef2b
PB		 13699
13700/* Mangle thumb function symbols as we read them in. */
13701
8384fb8f 13702static bfd_boolean
0beaef2b
PB		 13703elf32_arm_swap_symbol_in (bfd * abfd,
13704 const void *psrc,
13705 const void *pshn,
13706 Elf_Internal_Sym *dst)
13707{
8384fb8f
AM		 13708 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13709 return FALSE;
0beaef2b
PB		 13710
13711 /* New EABI objects mark thumb function symbols by setting the low bit of
13712 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13713 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13714 && (dst->st_value & 1))
13715 {
13716 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13717 dst->st_value &= ~(bfd_vma) 1;
13718 }
8384fb8f 13719 return TRUE;
0beaef2b
PB		 13720}
13721
13722
13723/* Mangle thumb function symbols as we write them out. */
13724
13725static void
13726elf32_arm_swap_symbol_out (bfd *abfd,
13727 const Elf_Internal_Sym *src,
13728 void *cdst,
13729 void *shndx)
13730{
13731 Elf_Internal_Sym newsym;
13732
13733 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13734 of the address set, as per the new EABI. We do this unconditionally
13735 because objcopy does not set the elf header flags until after
13736 it writes out the symbol table. */
13737 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13738 {
13739 newsym = *src;
13740 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13741 if (newsym.st_shndx != SHN_UNDEF)
13742 {
13743 /* Do this only for defined symbols. At link type, the static
13744 linker will simulate the work of dynamic linker of resolving
13745 symbols and will carry over the thumbness of found symbols to
13746 the output symbol table. It's not clear how it happens, but
b0fead2b 13747 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13748 runtime, and writing '1' for them will be confusing for users
13749 and possibly for dynamic linker itself.
13750 */
13751 newsym.st_value |= 1;
13752 }
906e58ca 13753
0beaef2b
PB		 13754 src = &newsym;
13755 }
13756 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13757}
13758
b294bdf8
MM		 13759/* Add the PT_ARM_EXIDX program header. */
13760
13761static bfd_boolean
906e58ca 13762elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13763 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13764{
13765 struct elf_segment_map *m;
13766 asection *sec;
13767
13768 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13769 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13770 {
13771 /* If there is already a PT_ARM_EXIDX header, then we do not
13772 want to add another one. This situation arises when running
13773 "strip"; the input binary already has the header. */
13774 m = elf_tdata (abfd)->segment_map;
13775 while (m && m->p_type != PT_ARM_EXIDX)
13776 m = m->next;
13777 if (!m)
13778 {
21d799b5
NC		 13779 m = (struct elf_segment_map *)
13780 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 13781 if (m == NULL)
13782 return FALSE;
13783 m->p_type = PT_ARM_EXIDX;
13784 m->count = 1;
13785 m->sections[0] = sec;
13786
13787 m->next = elf_tdata (abfd)->segment_map;
13788 elf_tdata (abfd)->segment_map = m;
13789 }
13790 }
13791
13792 return TRUE;
13793}
13794
13795/* We may add a PT_ARM_EXIDX program header. */
13796
13797static int
a6b96beb
AM		 13798elf32_arm_additional_program_headers (bfd *abfd,
13799 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13800{
13801 asection *sec;
13802
13803 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13804 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13805 return 1;
13806 else
13807 return 0;
13808}
13809
fcb93ecf 13810/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13811
fcb93ecf
PB		 13812static bfd_boolean
13813elf32_arm_is_function_type (unsigned int type)
13814{
0f88be7a 13815 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13816}
13817
0beaef2b 13818/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13819const struct elf_size_info elf32_arm_size_info =
13820{
0beaef2b
PB		 13821 sizeof (Elf32_External_Ehdr),
13822 sizeof (Elf32_External_Phdr),
13823 sizeof (Elf32_External_Shdr),
13824 sizeof (Elf32_External_Rel),
13825 sizeof (Elf32_External_Rela),
13826 sizeof (Elf32_External_Sym),
13827 sizeof (Elf32_External_Dyn),
13828 sizeof (Elf_External_Note),
13829 4,
13830 1,
13831 32, 2,
13832 ELFCLASS32, EV_CURRENT,
13833 bfd_elf32_write_out_phdrs,
13834 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13835 bfd_elf32_checksum_contents,
0beaef2b
PB		 13836 bfd_elf32_write_relocs,
13837 elf32_arm_swap_symbol_in,
13838 elf32_arm_swap_symbol_out,
13839 bfd_elf32_slurp_reloc_table,
13840 bfd_elf32_slurp_symbol_table,
13841 bfd_elf32_swap_dyn_in,
13842 bfd_elf32_swap_dyn_out,
13843 bfd_elf32_swap_reloc_in,
13844 bfd_elf32_swap_reloc_out,
13845 bfd_elf32_swap_reloca_in,
13846 bfd_elf32_swap_reloca_out
13847};
13848
252b5132
RH		 13849#define ELF_ARCH bfd_arch_arm
13850#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13851#ifdef __QNXTARGET__
13852#define ELF_MAXPAGESIZE 0x1000
13853#else
f21f3fe0 13854#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13855#endif
b1342370 13856#define ELF_MINPAGESIZE 0x1000
24718e3b 13857#define ELF_COMMONPAGESIZE 0x1000
252b5132 13858
ba93b8ac
DJ		 13859#define bfd_elf32_mkobject elf32_arm_mkobject
13860
99e4ae17
AJ		 13861#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13862#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13863#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13864#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13865#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13866#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13867#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13868#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13869#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13870#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13871#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13872#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 13873#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13874
13875#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13876#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13877#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13878#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13879#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13880#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13881#define elf_backend_write_section elf32_arm_write_section
252b5132 13882#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13883#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13884#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13885#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13886#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13887#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13888#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13889#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13890#define elf_backend_object_p elf32_arm_object_p
e16bb312 13891#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13892#define elf_backend_fake_sections elf32_arm_fake_sections
13893#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13894#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13895#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13896#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13897#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13898#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13899#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13900#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13901#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13902#define elf_backend_is_function_type elf32_arm_is_function_type
13903
13904#define elf_backend_can_refcount 1
13905#define elf_backend_can_gc_sections 1
13906#define elf_backend_plt_readonly 1
13907#define elf_backend_want_got_plt 1
13908#define elf_backend_want_plt_sym 0
13909#define elf_backend_may_use_rel_p 1
13910#define elf_backend_may_use_rela_p 0
4e7fd91e 13911#define elf_backend_default_use_rela_p 0
252b5132 13912
04f7c78d 13913#define elf_backend_got_header_size 12
04f7c78d 13914
906e58ca
NC		 13915#undef elf_backend_obj_attrs_vendor
13916#define elf_backend_obj_attrs_vendor "aeabi"
13917#undef elf_backend_obj_attrs_section
13918#define elf_backend_obj_attrs_section ".ARM.attributes"
13919#undef elf_backend_obj_attrs_arg_type
13920#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13921#undef elf_backend_obj_attrs_section_type
104d59d1 13922#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13923#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13924
252b5132 13925#include "elf32-target.h"
7f266840 13926
906e58ca 13927/* VxWorks Targets. */
4e7fd91e 13928
906e58ca 13929#undef TARGET_LITTLE_SYM
4e7fd91e 13930#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13931#undef TARGET_LITTLE_NAME
4e7fd91e 13932#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13933#undef TARGET_BIG_SYM
4e7fd91e 13934#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13935#undef TARGET_BIG_NAME
4e7fd91e
PB		 13936#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13937
13938/* Like elf32_arm_link_hash_table_create -- but overrides
13939 appropriately for VxWorks. */
906e58ca 13940
4e7fd91e
PB		 13941static struct bfd_link_hash_table *
13942elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13943{
13944 struct bfd_link_hash_table *ret;
13945
13946 ret = elf32_arm_link_hash_table_create (abfd);
13947 if (ret)
13948 {
13949 struct elf32_arm_link_hash_table *htab
00a97672 13950 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13951 htab->use_rel = 0;
00a97672 13952 htab->vxworks_p = 1;
4e7fd91e
PB		 13953 }
13954 return ret;
906e58ca 13955}
4e7fd91e 13956
00a97672
RS		 13957static void
13958elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13959{
13960 elf32_arm_final_write_processing (abfd, linker);
13961 elf_vxworks_final_write_processing (abfd, linker);
13962}
13963
906e58ca 13964#undef elf32_bed
4e7fd91e
PB		 13965#define elf32_bed elf32_arm_vxworks_bed
13966
906e58ca
NC		 13967#undef bfd_elf32_bfd_link_hash_table_create
13968#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13969#undef elf_backend_add_symbol_hook
13970#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13971#undef elf_backend_final_write_processing
13972#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13973#undef elf_backend_emit_relocs
13974#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13975
906e58ca 13976#undef elf_backend_may_use_rel_p
00a97672 13977#define elf_backend_may_use_rel_p 0
906e58ca 13978#undef elf_backend_may_use_rela_p
00a97672 13979#define elf_backend_may_use_rela_p 1
906e58ca 13980#undef elf_backend_default_use_rela_p
00a97672 13981#define elf_backend_default_use_rela_p 1
906e58ca 13982#undef elf_backend_want_plt_sym
00a97672 13983#define elf_backend_want_plt_sym 1
906e58ca 13984#undef ELF_MAXPAGESIZE
00a97672 13985#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13986
13987#include "elf32-target.h"
13988
13989
21d799b5
NC		 13990/* Merge backend specific data from an object file to the output
13991 object file when linking. */
13992
13993static bfd_boolean
13994elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
13995{
13996 flagword out_flags;
13997 flagword in_flags;
13998 bfd_boolean flags_compatible = TRUE;
13999 asection *sec;
14000
14001 /* Check if we have the same endianess. */
14002 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
14003 return FALSE;
14004
14005 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
14006 return TRUE;
14007
14008 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
14009 return FALSE;
14010
14011 /* The input BFD must have had its flags initialised. */
14012 /* The following seems bogus to me -- The flags are initialized in
14013 the assembler but I don't think an elf_flags_init field is
14014 written into the object. */
14015 /* BFD_ASSERT (elf_flags_init (ibfd)); */
14016
14017 in_flags = elf_elfheader (ibfd)->e_flags;
14018 out_flags = elf_elfheader (obfd)->e_flags;
14019
14020 /* In theory there is no reason why we couldn't handle this. However
14021 in practice it isn't even close to working and there is no real
14022 reason to want it. */
14023 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
14024 && !(ibfd->flags & DYNAMIC)
14025 && (in_flags & EF_ARM_BE8))
14026 {
14027 _bfd_error_handler (_("error: %B is already in final BE8 format"),
14028 ibfd);
14029 return FALSE;
14030 }
14031
14032 if (!elf_flags_init (obfd))
14033 {
14034 /* If the input is the default architecture and had the default
14035 flags then do not bother setting the flags for the output
14036 architecture, instead allow future merges to do this. If no
14037 future merges ever set these flags then they will retain their
14038 uninitialised values, which surprise surprise, correspond
14039 to the default values. */
14040 if (bfd_get_arch_info (ibfd)->the_default
14041 && elf_elfheader (ibfd)->e_flags == 0)
14042 return TRUE;
14043
14044 elf_flags_init (obfd) = TRUE;
14045 elf_elfheader (obfd)->e_flags = in_flags;
14046
14047 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
14048 && bfd_get_arch_info (obfd)->the_default)
14049 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
14050
14051 return TRUE;
14052 }
14053
14054 /* Determine what should happen if the input ARM architecture
14055 does not match the output ARM architecture. */
14056 if (! bfd_arm_merge_machines (ibfd, obfd))
14057 return FALSE;
14058
14059 /* Identical flags must be compatible. */
14060 if (in_flags == out_flags)
14061 return TRUE;
14062
14063 /* Check to see if the input BFD actually contains any sections. If
14064 not, its flags may not have been initialised either, but it
14065 cannot actually cause any incompatiblity. Do not short-circuit
14066 dynamic objects; their section list may be emptied by
14067 elf_link_add_object_symbols.
14068
14069 Also check to see if there are no code sections in the input.
14070 In this case there is no need to check for code specific flags.
14071 XXX - do we need to worry about floating-point format compatability
14072 in data sections ? */
14073 if (!(ibfd->flags & DYNAMIC))
14074 {
14075 bfd_boolean null_input_bfd = TRUE;
14076 bfd_boolean only_data_sections = TRUE;
14077
14078 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
14079 {
14080 /* Ignore synthetic glue sections. */
14081 if (strcmp (sec->name, ".glue_7")
14082 && strcmp (sec->name, ".glue_7t"))
14083 {
14084 if ((bfd_get_section_flags (ibfd, sec)
14085 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14086 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14087 only_data_sections = FALSE;
14088
14089 null_input_bfd = FALSE;
14090 break;
14091 }
14092 }
14093
14094 if (null_input_bfd || only_data_sections)
14095 return TRUE;
14096 }
14097
14098 /* Complain about various flag mismatches. */
14099 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
14100 EF_ARM_EABI_VERSION (out_flags)))
14101 {
14102 _bfd_error_handler
14103 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
14104 ibfd, obfd,
14105 (in_flags & EF_ARM_EABIMASK) >> 24,
14106 (out_flags & EF_ARM_EABIMASK) >> 24);
14107 return FALSE;
14108 }
14109
14110 /* Not sure what needs to be checked for EABI versions >= 1. */
14111 /* VxWorks libraries do not use these flags. */
14112 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
14113 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
14114 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
14115 {
14116 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14117 {
14118 _bfd_error_handler
14119 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
14120 ibfd, obfd,
14121 in_flags & EF_ARM_APCS_26 ? 26 : 32,
14122 out_flags & EF_ARM_APCS_26 ? 26 : 32);
14123 flags_compatible = FALSE;
14124 }
14125
14126 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14127 {
14128 if (in_flags & EF_ARM_APCS_FLOAT)
14129 _bfd_error_handler
14130 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14131 ibfd, obfd);
14132 else
14133 _bfd_error_handler
14134 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14135 ibfd, obfd);
14136
14137 flags_compatible = FALSE;
14138 }
14139
14140 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14141 {
14142 if (in_flags & EF_ARM_VFP_FLOAT)
14143 _bfd_error_handler
14144 (_("error: %B uses VFP instructions, whereas %B does not"),
14145 ibfd, obfd);
14146 else
14147 _bfd_error_handler
14148 (_("error: %B uses FPA instructions, whereas %B does not"),
14149 ibfd, obfd);
14150
14151 flags_compatible = FALSE;
14152 }
14153
14154 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14155 {
14156 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14157 _bfd_error_handler
14158 (_("error: %B uses Maverick instructions, whereas %B does not"),
14159 ibfd, obfd);
14160 else
14161 _bfd_error_handler
14162 (_("error: %B does not use Maverick instructions, whereas %B does"),
14163 ibfd, obfd);
14164
14165 flags_compatible = FALSE;
14166 }
14167
14168#ifdef EF_ARM_SOFT_FLOAT
14169 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14170 {
14171 /* We can allow interworking between code that is VFP format
14172 layout, and uses either soft float or integer regs for
14173 passing floating point arguments and results. We already
14174 know that the APCS_FLOAT flags match; similarly for VFP
14175 flags. */
14176 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14177 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14178 {
14179 if (in_flags & EF_ARM_SOFT_FLOAT)
14180 _bfd_error_handler
14181 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14182 ibfd, obfd);
14183 else
14184 _bfd_error_handler
14185 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14186 ibfd, obfd);
14187
14188 flags_compatible = FALSE;
14189 }
14190 }
14191#endif
14192
14193 /* Interworking mismatch is only a warning. */
14194 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14195 {
14196 if (in_flags & EF_ARM_INTERWORK)
14197 {
14198 _bfd_error_handler
14199 (_("Warning: %B supports interworking, whereas %B does not"),
14200 ibfd, obfd);
14201 }
14202 else
14203 {
14204 _bfd_error_handler
14205 (_("Warning: %B does not support interworking, whereas %B does"),
14206 ibfd, obfd);
14207 }
14208 }
14209 }
14210
14211 return flags_compatible;
14212}
14213
14214
906e58ca 14215/* Symbian OS Targets. */
7f266840 14216
906e58ca 14217#undef TARGET_LITTLE_SYM
7f266840 14218#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 14219#undef TARGET_LITTLE_NAME
7f266840 14220#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 14221#undef TARGET_BIG_SYM
7f266840 14222#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14223#undef TARGET_BIG_NAME
7f266840
DJ		 14224#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14225
14226/* Like elf32_arm_link_hash_table_create -- but overrides
14227 appropriately for Symbian OS. */
906e58ca 14228
7f266840
DJ		 14229static struct bfd_link_hash_table *
14230elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14231{
14232 struct bfd_link_hash_table *ret;
14233
14234 ret = elf32_arm_link_hash_table_create (abfd);
14235 if (ret)
14236 {
14237 struct elf32_arm_link_hash_table *htab
14238 = (struct elf32_arm_link_hash_table *)ret;
14239 /* There is no PLT header for Symbian OS. */
14240 htab->plt_header_size = 0;
95720a86
DJ		 14241 /* The PLT entries are each one instruction and one word. */
14242 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 14243 htab->symbian_p = 1;
33bfe774
JB		 14244 /* Symbian uses armv5t or above, so use_blx is always true. */
14245 htab->use_blx = 1;
67687978 14246 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 14247 }
14248 return ret;
906e58ca 14249}
7f266840 14250
b35d266b 14251static const struct bfd_elf_special_section
551b43fd 14252elf32_arm_symbian_special_sections[] =
7f266840 14253{
5cd3778d
MM		 14254 /* In a BPABI executable, the dynamic linking sections do not go in
14255 the loadable read-only segment. The post-linker may wish to
14256 refer to these sections, but they are not part of the final
14257 program image. */
0112cd26
NC		 14258 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
14259 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
14260 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
14261 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
14262 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 14263 /* These sections do not need to be writable as the SymbianOS
14264 postlinker will arrange things so that no dynamic relocation is
14265 required. */
0112cd26
NC		 14266 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
14267 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
14268 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
14269 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 14270};
14271
c3c76620 14272static void
906e58ca 14273elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 14274 struct bfd_link_info *link_info)
c3c76620
MM		 14275{
14276 /* BPABI objects are never loaded directly by an OS kernel; they are
14277 processed by a postlinker first, into an OS-specific format. If
14278 the D_PAGED bit is set on the file, BFD will align segments on
14279 page boundaries, so that an OS can directly map the file. With
14280 BPABI objects, that just results in wasted space. In addition,
14281 because we clear the D_PAGED bit, map_sections_to_segments will
14282 recognize that the program headers should not be mapped into any
14283 loadable segment. */
14284 abfd->flags &= ~D_PAGED;
906e58ca 14285 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 14286}
7f266840
DJ		 14287
14288static bfd_boolean
906e58ca 14289elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 14290 struct bfd_link_info *info)
7f266840
DJ		 14291{
14292 struct elf_segment_map *m;
14293 asection *dynsec;
14294
7f266840
DJ		 14295 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14296 segment. However, because the .dynamic section is not marked
14297 with SEC_LOAD, the generic ELF code will not create such a
14298 segment. */
14299 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14300 if (dynsec)
14301 {
8ded5a0f
AM		 14302 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14303 if (m->p_type == PT_DYNAMIC)
14304 break;
14305
14306 if (m == NULL)
14307 {
14308 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14309 m->next = elf_tdata (abfd)->segment_map;
14310 elf_tdata (abfd)->segment_map = m;
14311 }
7f266840
DJ		 14312 }
14313
b294bdf8
MM		 14314 /* Also call the generic arm routine. */
14315 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 14316}
14317
95720a86
DJ		 14318/* Return address for Ith PLT stub in section PLT, for relocation REL
14319 or (bfd_vma) -1 if it should not be included. */
14320
14321static bfd_vma
14322elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14323 const arelent *rel ATTRIBUTE_UNUSED)
14324{
14325 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14326}
14327
14328
8029a119 14329#undef elf32_bed
7f266840
DJ		 14330#define elf32_bed elf32_arm_symbian_bed
14331
14332/* The dynamic sections are not allocated on SymbianOS; the postlinker
14333 will process them and then discard them. */
906e58ca 14334#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14335#define ELF_DYNAMIC_SEC_FLAGS \
14336 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14337
00a97672 14338#undef elf_backend_add_symbol_hook
00a97672 14339#undef elf_backend_emit_relocs
c3c76620 14340
906e58ca
NC		 14341#undef bfd_elf32_bfd_link_hash_table_create
14342#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14343#undef elf_backend_special_sections
14344#define elf_backend_special_sections elf32_arm_symbian_special_sections
14345#undef elf_backend_begin_write_processing
14346#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14347#undef elf_backend_final_write_processing
14348#define elf_backend_final_write_processing elf32_arm_final_write_processing
14349
14350#undef elf_backend_modify_segment_map
7f266840
DJ		 14351#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14352
14353/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14354#undef elf_backend_got_header_size
7f266840
DJ		 14355#define elf_backend_got_header_size 0
14356
14357/* Similarly, there is no .got.plt section. */
906e58ca 14358#undef elf_backend_want_got_plt
7f266840
DJ		 14359#define elf_backend_want_got_plt 0
14360
906e58ca 14361#undef elf_backend_plt_sym_val
95720a86
DJ		 14362#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14363
906e58ca 14364#undef elf_backend_may_use_rel_p
00a97672 14365#define elf_backend_may_use_rel_p 1
906e58ca 14366#undef elf_backend_may_use_rela_p
00a97672 14367#define elf_backend_may_use_rela_p 0
906e58ca 14368#undef elf_backend_default_use_rela_p
00a97672 14369#define elf_backend_default_use_rela_p 0
906e58ca 14370#undef elf_backend_want_plt_sym
00a97672 14371#define elf_backend_want_plt_sym 0
906e58ca 14372#undef ELF_MAXPAGESIZE
00a97672 14373#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14374
7f266840 14375#include "elf32-target.h"
GDB Binutils - Deliverables
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