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2012-12-17 Jeff Johnston <jjohnstn@redhat.com>
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
1d7e9d18 3 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
6034aab8 26#include "bfd_stdint.h"
00a97672 27#include "libiberty.h"
7f266840
DJ		 28#include "libbfd.h"
29#include "elf-bfd.h"
b38cadfb 30#include "elf-nacl.h"
00a97672 31#include "elf-vxworks.h"
ee065d83 32#include "elf/arm.h"
7f266840 33
00a97672
RS		 34/* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36#define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39/* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41#define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46/* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48#define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53/* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55#define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
7f266840
DJ		 60#define elf_info_to_howto 0
61#define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63#define ARM_ELF_ABI_VERSION 0
64#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
79f08007
YZ		 66/* The Adjusted Place, as defined by AAELF. */
67#define Pa(X) ((X) & 0xfffffffc)
68
3e6b1042
DJ		 69static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
7f266840
DJ		 74/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
c19d1205 78static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 79{
8029a119 80 /* No relocation. */
7f266840
DJ		 81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 0, /* size (0 = byte, 1 = short, 2 = long) */
84 0, /* bitsize */
85 FALSE, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 FALSE, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 FALSE), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
98 24, /* bitsize */
99 TRUE, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 FALSE, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 TRUE), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
113 32, /* bitsize */
114 FALSE, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 FALSE, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 FALSE), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
128 32, /* bitsize */
129 TRUE, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 FALSE, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 TRUE), /* pcrel_offset */
138
c19d1205 139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 140 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 141 0, /* rightshift */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 143 32, /* bitsize */
144 TRUE, /* pc_relative */
7f266840 145 0, /* bitpos */
4962c51a 146 complain_overflow_dont,/* complain_on_overflow */
7f266840 147 bfd_elf_generic_reloc, /* special_function */
4962c51a 148 "R_ARM_LDR_PC_G0", /* name */
7f266840 149 FALSE, /* partial_inplace */
4962c51a
MS		 150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 TRUE), /* pcrel_offset */
7f266840
DJ		 153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
158 16, /* bitsize */
159 FALSE, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 FALSE, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 FALSE), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
173 12, /* bitsize */
174 FALSE, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 FALSE, /* partial_inplace */
00a97672
RS		 180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
7f266840
DJ		 182 FALSE), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
187 5, /* bitsize */
188 FALSE, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 FALSE, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 FALSE), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
202 8, /* bitsize */
203 FALSE, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 FALSE, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 FALSE), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
216 32, /* bitsize */
217 FALSE, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 FALSE, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 FALSE), /* pcrel_offset */
226
c19d1205 227 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 228 1, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 230 24, /* bitsize */
7f266840
DJ		 231 TRUE, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
c19d1205 235 "R_ARM_THM_CALL", /* name */
7f266840 236 FALSE, /* partial_inplace */
7f6ab9f8
AM		 237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
7f266840
DJ		 239 TRUE), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
244 8, /* bitsize */
245 TRUE, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 FALSE, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 TRUE), /* pcrel_offset */
254
c19d1205 255 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 256 1, /* rightshift */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 258 32, /* bitsize */
259 FALSE, /* pc_relative */
7f266840
DJ		 260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
c19d1205 263 "R_ARM_BREL_ADJ", /* name */
7f266840 264 FALSE, /* partial_inplace */
c19d1205
ZW		 265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 FALSE), /* pcrel_offset */
7f266840 268
0855e32b 269 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 270 0, /* rightshift */
0855e32b
NS		 271 2, /* size (0 = byte, 1 = short, 2 = long) */
272 32, /* bitsize */
7f266840
DJ		 273 FALSE, /* pc_relative */
274 0, /* bitpos */
0855e32b 275 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 276 bfd_elf_generic_reloc, /* special_function */
0855e32b 277 "R_ARM_TLS_DESC", /* name */
7f266840 278 FALSE, /* partial_inplace */
0855e32b
NS		 279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
7f266840
DJ		 281 FALSE), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
286 0, /* bitsize */
287 FALSE, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 FALSE, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 FALSE), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 301 24, /* bitsize */
7f266840
DJ		 302 TRUE, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 FALSE, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 TRUE), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 316 24, /* bitsize */
7f266840
DJ		 317 TRUE, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 FALSE, /* partial_inplace */
7f6ab9f8
AM		 323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
7f266840
DJ		 325 TRUE), /* pcrel_offset */
326
ba93b8ac 327 /* Dynamic TLS relocations. */
7f266840 328
ba93b8ac
DJ		 329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 32, /* bitsize */
333 FALSE, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 TRUE, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 FALSE), /* pcrel_offset */
7f266840 342
ba93b8ac
DJ		 343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
346 32, /* bitsize */
347 FALSE, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 TRUE, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 FALSE), /* pcrel_offset */
7f266840 356
ba93b8ac
DJ		 357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
360 32, /* bitsize */
361 FALSE, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 TRUE, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 FALSE), /* pcrel_offset */
7f266840
DJ		 370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
376 32, /* bitsize */
377 FALSE, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 TRUE, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 FALSE), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
390 32, /* bitsize */
391 FALSE, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 TRUE, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 FALSE), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
404 32, /* bitsize */
405 FALSE, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 TRUE, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 FALSE), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
418 32, /* bitsize */
419 FALSE, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 TRUE, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 FALSE), /* pcrel_offset */
428
c19d1205 429 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 430 0, /* rightshift */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
432 32, /* bitsize */
433 FALSE, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
c19d1205 437 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 438 TRUE, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 FALSE), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
446 32, /* bitsize */
447 TRUE, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 TRUE, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 TRUE), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
460 32, /* bitsize */
461 FALSE, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 TRUE, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 FALSE), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 474 24, /* bitsize */
7f266840
DJ		 475 TRUE, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
ce490eda 480 FALSE, /* partial_inplace */
7f266840
DJ		 481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 TRUE), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 24, /* bitsize */
489 TRUE, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 FALSE, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 TRUE), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 24, /* bitsize */
503 TRUE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 FALSE, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 TRUE), /* pcrel_offset */
512
c19d1205
ZW		 513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 24, /* bitsize */
517 TRUE, /* pc_relative */
7f266840 518 0, /* bitpos */
c19d1205 519 complain_overflow_signed,/* complain_on_overflow */
7f266840 520 bfd_elf_generic_reloc, /* special_function */
c19d1205 521 "R_ARM_THM_JUMP24", /* name */
7f266840 522 FALSE, /* partial_inplace */
c19d1205
ZW		 523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 TRUE), /* pcrel_offset */
7f266840 526
c19d1205 527 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 528 0, /* rightshift */
c19d1205
ZW		 529 2, /* size (0 = byte, 1 = short, 2 = long) */
530 32, /* bitsize */
7f266840
DJ		 531 FALSE, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
c19d1205 535 "R_ARM_BASE_ABS", /* name */
7f266840 536 FALSE, /* partial_inplace */
c19d1205
ZW		 537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
7f266840
DJ		 539 FALSE), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 12, /* bitsize */
545 TRUE, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 FALSE, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 TRUE), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
558 12, /* bitsize */
559 TRUE, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 FALSE, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 TRUE), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
572 12, /* bitsize */
573 TRUE, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 FALSE, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 TRUE), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
586 12, /* bitsize */
587 FALSE, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 FALSE, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 FALSE), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
600 8, /* bitsize */
601 FALSE, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 FALSE, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 FALSE), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
614 8, /* bitsize */
615 FALSE, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 FALSE, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 FALSE), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
628 32, /* bitsize */
629 FALSE, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 FALSE, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 FALSE), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 32, /* bitsize */
643 FALSE, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 FALSE, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 FALSE), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
656 32, /* bitsize */
657 FALSE, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 FALSE, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 FALSE), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
670 32, /* bitsize */
671 FALSE, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 FALSE, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 TRUE), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
684 31, /* bitsize */
685 TRUE, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 FALSE, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 TRUE), /* pcrel_offset */
c19d1205
ZW		 694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
698 16, /* bitsize */
699 FALSE, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 FALSE, /* partial_inplace */
39623e12
PB		 705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
c19d1205
ZW		 707 FALSE), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 16, /* bitsize */
713 FALSE, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 FALSE, /* partial_inplace */
39623e12
PB		 719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
c19d1205
ZW		 721 FALSE), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 16, /* bitsize */
727 TRUE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 FALSE, /* partial_inplace */
39623e12
PB		 733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
c19d1205
ZW		 735 TRUE), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 16, /* bitsize */
741 TRUE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 FALSE, /* partial_inplace */
39623e12
PB		 747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
c19d1205
ZW		 749 TRUE), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 16, /* bitsize */
755 FALSE, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 FALSE, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 FALSE), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 16, /* bitsize */
769 FALSE, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 FALSE, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 FALSE), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
782 16, /* bitsize */
783 TRUE, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 FALSE, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 TRUE), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
796 16, /* bitsize */
797 TRUE, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 FALSE, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 TRUE), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
810 19, /* bitsize */
811 TRUE, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 FALSE, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 TRUE), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
824 6, /* bitsize */
825 TRUE, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 FALSE, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 TRUE), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 13, /* bitsize */
842 TRUE, /* pc_relative */
843 0, /* bitpos */
2cab6cc3 844 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 FALSE, /* partial_inplace */
2cab6cc3
MS		 848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
c19d1205
ZW		 850 TRUE), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
855 13, /* bitsize */
856 TRUE, /* pc_relative */
857 0, /* bitpos */
2cab6cc3 858 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 FALSE, /* partial_inplace */
2cab6cc3
MS		 862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
c19d1205
ZW		 864 TRUE), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
869 32, /* bitsize */
870 FALSE, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 FALSE, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 FALSE), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
883 32, /* bitsize */
884 TRUE, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 FALSE, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 FALSE), /* pcrel_offset */
7f266840 893
4962c51a
MS		 894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
899 32, /* bitsize */
900 TRUE, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 FALSE, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 TRUE), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
913 32, /* bitsize */
914 TRUE, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 FALSE, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 TRUE), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 32, /* bitsize */
928 TRUE, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 FALSE, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 TRUE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 TRUE), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 TRUE, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 FALSE, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 TRUE), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 32, /* bitsize */
970 TRUE, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 FALSE, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 TRUE), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 32, /* bitsize */
984 TRUE, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 FALSE, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 TRUE), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 32, /* bitsize */
998 TRUE, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 FALSE, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 TRUE), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 32, /* bitsize */
1012 TRUE, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 FALSE, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 TRUE), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 32, /* bitsize */
1026 TRUE, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 FALSE, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 TRUE), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 32, /* bitsize */
1040 TRUE, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 FALSE, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 TRUE), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 32, /* bitsize */
1054 TRUE, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 FALSE, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 TRUE), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 32, /* bitsize */
1068 TRUE, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 FALSE, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 TRUE), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 32, /* bitsize */
1082 TRUE, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 FALSE, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 TRUE), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 32, /* bitsize */
1096 TRUE, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 FALSE, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 TRUE), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 32, /* bitsize */
1110 TRUE, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 FALSE, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 TRUE), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 32, /* bitsize */
1124 TRUE, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 FALSE, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 TRUE), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 TRUE, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 FALSE, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 TRUE), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 TRUE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 TRUE), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 TRUE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 FALSE, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 TRUE), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 32, /* bitsize */
1180 TRUE, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 FALSE, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 TRUE), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 TRUE, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 FALSE, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 TRUE), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 32, /* bitsize */
1208 TRUE, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 FALSE, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 TRUE), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 32, /* bitsize */
1222 TRUE, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 FALSE, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 TRUE), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 32, /* bitsize */
1236 TRUE, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 FALSE, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 TRUE), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 32, /* bitsize */
1250 TRUE, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 FALSE, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 TRUE), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 32, /* bitsize */
1264 TRUE, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 FALSE, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 TRUE), /* pcrel_offset */
1273
1274 /* End of group relocations. */
c19d1205 1275
c19d1205
ZW		 1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 16, /* bitsize */
1280 FALSE, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 FALSE, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 FALSE), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 16, /* bitsize */
1294 FALSE, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 FALSE, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 FALSE), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 16, /* bitsize */
1308 FALSE, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 FALSE, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 FALSE), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 16, /* bitsize */
1322 FALSE, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 FALSE, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 FALSE), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 16, /* bitsize */
1336 FALSE, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 FALSE, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 FALSE), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 16, /* bitsize */
1350 FALSE, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 FALSE, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 FALSE), /* pcrel_offset */
1359
0855e32b
NS		 1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 TRUE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 24, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 FALSE, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 0, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_bitfield,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 FALSE, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 24, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 FALSE, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
c19d1205
ZW		 1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 32, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 FALSE, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 32, /* bitsize */
1434 FALSE, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 FALSE, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 FALSE), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 32, /* bitsize */
1448 TRUE, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 FALSE, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 TRUE), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 12, /* bitsize */
1462 FALSE, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 FALSE, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 FALSE), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 12, /* bitsize */
1476 FALSE, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 FALSE, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 FALSE), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1490 0, /* rightshift */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1492 0, /* bitsize */
ba93b8ac
DJ		 1493 FALSE, /* pc_relative */
1494 0, /* bitpos */
c19d1205
ZW		 1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 FALSE, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 FALSE), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 0, /* bitsize */
1508 FALSE, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 FALSE, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 FALSE), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 11, /* bitsize */
1522 TRUE, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 FALSE, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 TRUE), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 8, /* bitsize */
1536 TRUE, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 FALSE, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 TRUE), /* pcrel_offset */
ba93b8ac 1545
c19d1205
ZW		 1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 32, /* bitsize */
1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
c19d1205 1559 FALSE), /* pcrel_offset */
ba93b8ac 1560
ba93b8ac
DJ		 1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 32, /* bitsize */
1565 FALSE, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 TRUE, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
c19d1205 1573 FALSE), /* pcrel_offset */
ba93b8ac 1574
c19d1205 1575 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 32, /* bitsize */
1579 FALSE, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
c19d1205 1583 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1584 TRUE, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
c19d1205 1587 FALSE), /* pcrel_offset */
ba93b8ac 1588
ba93b8ac
DJ		 1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 32, /* bitsize */
1593 FALSE, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 TRUE, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
c19d1205 1601 FALSE), /* pcrel_offset */
7f266840 1602
c19d1205 1603 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1604 0, /* rightshift */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1606 32, /* bitsize */
7f266840
DJ		 1607 FALSE, /* pc_relative */
1608 0, /* bitpos */
c19d1205
ZW		 1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 bfd_elf_generic_reloc, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 TRUE, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 FALSE), /* pcrel_offset */
7f266840 1616
c19d1205
ZW		 1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 12, /* bitsize */
1621 FALSE, /* pc_relative */
7f266840 1622 0, /* bitpos */
c19d1205 1623 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1624 bfd_elf_generic_reloc, /* special_function */
c19d1205 1625 "R_ARM_TLS_LDO12", /* name */
7f266840 1626 FALSE, /* partial_inplace */
c19d1205
ZW		 1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 FALSE), /* pcrel_offset */
7f266840 1630
c19d1205
ZW		 1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 12, /* bitsize */
1635 FALSE, /* pc_relative */
7f266840 1636 0, /* bitpos */
c19d1205 1637 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1638 bfd_elf_generic_reloc, /* special_function */
c19d1205 1639 "R_ARM_TLS_LE12", /* name */
7f266840 1640 FALSE, /* partial_inplace */
c19d1205
ZW		 1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 FALSE), /* pcrel_offset */
7f266840 1644
c19d1205 1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1646 0, /* rightshift */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1648 12, /* bitsize */
1649 FALSE, /* pc_relative */
7f266840 1650 0, /* bitpos */
c19d1205 1651 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1652 bfd_elf_generic_reloc, /* special_function */
c19d1205 1653 "R_ARM_TLS_IE12GP", /* name */
7f266840 1654 FALSE, /* partial_inplace */
c19d1205
ZW		 1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 FALSE), /* pcrel_offset */
0855e32b 1658
34e77a92 1659 /* 112-127 private relocations. */
0855e32b
NS		 1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
34e77a92
RS		 1676
1677 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 0, /* bitsize */
1684 FALSE, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_bitfield,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 FALSE, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 FALSE), /* pcrel_offset */
c19d1205
ZW		 1693};
1694
34e77a92
RS		 1695/* 160 onwards: */
1696static reloc_howto_type elf32_arm_howto_table_2[1] =
1697{
1698 HOWTO (R_ARM_IRELATIVE, /* type */
1699 0, /* rightshift */
1700 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 32, /* bitsize */
1702 FALSE, /* pc_relative */
1703 0, /* bitpos */
1704 complain_overflow_bitfield,/* complain_on_overflow */
1705 bfd_elf_generic_reloc, /* special_function */
1706 "R_ARM_IRELATIVE", /* name */
1707 TRUE, /* partial_inplace */
1708 0xffffffff, /* src_mask */
1709 0xffffffff, /* dst_mask */
1710 FALSE) /* pcrel_offset */
1711};
c19d1205 1712
34e77a92
RS		 1713/* 249-255 extended, currently unused, relocations: */
1714static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1715{
1716 HOWTO (R_ARM_RREL32, /* type */
1717 0, /* rightshift */
1718 0, /* size (0 = byte, 1 = short, 2 = long) */
1719 0, /* bitsize */
1720 FALSE, /* pc_relative */
1721 0, /* bitpos */
1722 complain_overflow_dont,/* complain_on_overflow */
1723 bfd_elf_generic_reloc, /* special_function */
1724 "R_ARM_RREL32", /* name */
1725 FALSE, /* partial_inplace */
1726 0, /* src_mask */
1727 0, /* dst_mask */
1728 FALSE), /* pcrel_offset */
1729
1730 HOWTO (R_ARM_RABS32, /* type */
1731 0, /* rightshift */
1732 0, /* size (0 = byte, 1 = short, 2 = long) */
1733 0, /* bitsize */
1734 FALSE, /* pc_relative */
1735 0, /* bitpos */
1736 complain_overflow_dont,/* complain_on_overflow */
1737 bfd_elf_generic_reloc, /* special_function */
1738 "R_ARM_RABS32", /* name */
1739 FALSE, /* partial_inplace */
1740 0, /* src_mask */
1741 0, /* dst_mask */
1742 FALSE), /* pcrel_offset */
1743
1744 HOWTO (R_ARM_RPC24, /* type */
1745 0, /* rightshift */
1746 0, /* size (0 = byte, 1 = short, 2 = long) */
1747 0, /* bitsize */
1748 FALSE, /* pc_relative */
1749 0, /* bitpos */
1750 complain_overflow_dont,/* complain_on_overflow */
1751 bfd_elf_generic_reloc, /* special_function */
1752 "R_ARM_RPC24", /* name */
1753 FALSE, /* partial_inplace */
1754 0, /* src_mask */
1755 0, /* dst_mask */
1756 FALSE), /* pcrel_offset */
1757
1758 HOWTO (R_ARM_RBASE, /* type */
1759 0, /* rightshift */
1760 0, /* size (0 = byte, 1 = short, 2 = long) */
1761 0, /* bitsize */
1762 FALSE, /* pc_relative */
1763 0, /* bitpos */
1764 complain_overflow_dont,/* complain_on_overflow */
1765 bfd_elf_generic_reloc, /* special_function */
1766 "R_ARM_RBASE", /* name */
1767 FALSE, /* partial_inplace */
1768 0, /* src_mask */
1769 0, /* dst_mask */
1770 FALSE) /* pcrel_offset */
1771};
1772
1773static reloc_howto_type *
1774elf32_arm_howto_from_type (unsigned int r_type)
1775{
906e58ca 1776 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1777 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1778
34e77a92
RS		 1779 if (r_type == R_ARM_IRELATIVE)
1780 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1781
c19d1205 1782 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1783 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1784 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1785
c19d1205 1786 return NULL;
7f266840
DJ		 1787}
1788
1789static void
1790elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1791 Elf_Internal_Rela * elf_reloc)
1792{
1793 unsigned int r_type;
1794
1795 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1796 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1797}
1798
1799struct elf32_arm_reloc_map
1800 {
1801 bfd_reloc_code_real_type bfd_reloc_val;
1802 unsigned char elf_reloc_val;
1803 };
1804
1805/* All entries in this list must also be present in elf32_arm_howto_table. */
1806static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1807 {
1808 {BFD_RELOC_NONE, R_ARM_NONE},
1809 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1810 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1811 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1812 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1813 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1814 {BFD_RELOC_32, R_ARM_ABS32},
1815 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1816 {BFD_RELOC_8, R_ARM_ABS8},
1817 {BFD_RELOC_16, R_ARM_ABS16},
1818 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1819 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1820 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1825 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1826 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1827 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1828 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1829 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1830 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1831 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1832 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1833 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1834 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1835 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1836 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1837 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1838 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1839 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1840 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1841 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1842 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1843 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1845 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1846 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1847 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1848 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1849 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1850 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1851 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1852 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1853 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1854 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1855 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1856 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1857 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1858 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1859 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1860 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1861 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1862 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1863 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1864 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1865 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1866 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1867 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1868 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1869 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1870 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1871 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1872 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1873 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1874 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1875 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1876 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1877 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1878 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1879 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1880 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1881 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1882 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1883 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1884 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1885 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1886 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1887 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1888 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1889 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1890 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1891 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1892 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1893 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1894 };
1895
1896static reloc_howto_type *
f1c71a59
ZW		 1897elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1898 bfd_reloc_code_real_type code)
7f266840
DJ		 1899{
1900 unsigned int i;
8029a119 1901
906e58ca 1902 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1903 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1904 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1905
c19d1205 1906 return NULL;
7f266840
DJ		 1907}
1908
157090f7
AM		 1909static reloc_howto_type *
1910elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1911 const char *r_name)
1912{
1913 unsigned int i;
1914
906e58ca 1915 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1916 if (elf32_arm_howto_table_1[i].name != NULL
1917 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1918 return &elf32_arm_howto_table_1[i];
1919
906e58ca 1920 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1921 if (elf32_arm_howto_table_2[i].name != NULL
1922 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1923 return &elf32_arm_howto_table_2[i];
1924
34e77a92
RS		 1925 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1926 if (elf32_arm_howto_table_3[i].name != NULL
1927 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1928 return &elf32_arm_howto_table_3[i];
1929
157090f7
AM		 1930 return NULL;
1931}
1932
906e58ca
NC		 1933/* Support for core dump NOTE sections. */
1934
7f266840 1935static bfd_boolean
f1c71a59 1936elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1937{
1938 int offset;
1939 size_t size;
1940
1941 switch (note->descsz)
1942 {
1943 default:
1944 return FALSE;
1945
8029a119 1946 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1947 /* pr_cursig */
1948 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1949
1950 /* pr_pid */
261b8d08 1951 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1952
1953 /* pr_reg */
1954 offset = 72;
1955 size = 72;
1956
1957 break;
1958 }
1959
1960 /* Make a ".reg/999" section. */
1961 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1962 size, note->descpos + offset);
1963}
1964
1965static bfd_boolean
f1c71a59 1966elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1967{
1968 switch (note->descsz)
1969 {
1970 default:
1971 return FALSE;
1972
8029a119 1973 case 124: /* Linux/ARM elf_prpsinfo. */
4395ee08
UW		 1974 elf_tdata (abfd)->core_pid
1975 = bfd_get_32 (abfd, note->descdata + 12);
7f266840
DJ		 1976 elf_tdata (abfd)->core_program
1977 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1978 elf_tdata (abfd)->core_command
1979 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1980 }
1981
1982 /* Note that for some reason, a spurious space is tacked
1983 onto the end of the args in some (at least one anyway)
1984 implementations, so strip it off if it exists. */
7f266840
DJ		 1985 {
1986 char *command = elf_tdata (abfd)->core_command;
1987 int n = strlen (command);
1988
1989 if (0 < n && command[n - 1] == ' ')
1990 command[n - 1] = '\0';
1991 }
1992
1993 return TRUE;
1994}
1995
1f20dca5
UW		 1996static char *
1997elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1998 int note_type, ...)
1999{
2000 switch (note_type)
2001 {
2002 default:
2003 return NULL;
2004
2005 case NT_PRPSINFO:
2006 {
2007 char data[124];
2008 va_list ap;
2009
2010 va_start (ap, note_type);
2011 memset (data, 0, sizeof (data));
2012 strncpy (data + 28, va_arg (ap, const char *), 16);
2013 strncpy (data + 44, va_arg (ap, const char *), 80);
2014 va_end (ap);
2015
2016 return elfcore_write_note (abfd, buf, bufsiz,
2017 "CORE", note_type, data, sizeof (data));
2018 }
2019
2020 case NT_PRSTATUS:
2021 {
2022 char data[148];
2023 va_list ap;
2024 long pid;
2025 int cursig;
2026 const void *greg;
2027
2028 va_start (ap, note_type);
2029 memset (data, 0, sizeof (data));
2030 pid = va_arg (ap, long);
2031 bfd_put_32 (abfd, pid, data + 24);
2032 cursig = va_arg (ap, int);
2033 bfd_put_16 (abfd, cursig, data + 12);
2034 greg = va_arg (ap, const void *);
2035 memcpy (data + 72, greg, 72);
2036 va_end (ap);
2037
2038 return elfcore_write_note (abfd, buf, bufsiz,
2039 "CORE", note_type, data, sizeof (data));
2040 }
2041 }
2042}
2043
7f266840
DJ		 2044#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2045#define TARGET_LITTLE_NAME "elf32-littlearm"
2046#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2047#define TARGET_BIG_NAME "elf32-bigarm"
2048
2049#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2050#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1f20dca5 2051#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
7f266840 2052
252b5132
RH		 2053typedef unsigned long int insn32;
2054typedef unsigned short int insn16;
2055
3a4a14e9
PB		 2056/* In lieu of proper flags, assume all EABIv4 or later objects are
2057 interworkable. */
57e8b36a 2058#define INTERWORK_FLAG(abfd) \
3a4a14e9 2059 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2060 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2061 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2062
252b5132
RH		 2063/* The linker script knows the section names for placement.
2064 The entry_names are used to do simple name mangling on the stubs.
2065 Given a function name, and its type, the stub can be found. The
9b485d32 2066 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2067#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2068#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2069
2070#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2071#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2072
c7b8f16e
JB		 2073#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2074#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2075
845b51d6
PB		 2076#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2077#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2078
7413f23f
DJ		 2079#define STUB_ENTRY_NAME "__%s_veneer"
2080
252b5132
RH		 2081/* The name of the dynamic interpreter. This is put in the .interp
2082 section. */
2083#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2084
0855e32b 2085static const unsigned long tls_trampoline [] =
b38cadfb
NC		 2086{
2087 0xe08e0000, /* add r0, lr, r0 */
2088 0xe5901004, /* ldr r1, [r0,#4] */
2089 0xe12fff11, /* bx r1 */
2090};
0855e32b
NS		 2091
2092static const unsigned long dl_tlsdesc_lazy_trampoline [] =
b38cadfb
NC		 2093{
2094 0xe52d2004, /* push {r2} */
2095 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2096 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2097 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2098 0xe081100f, /* 2: add r1, pc */
2099 0xe12fff12, /* bx r2 */
2100 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
0855e32b 2101 + dl_tlsdesc_lazy_resolver(GOT) */
b38cadfb
NC		 2102 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2103};
0855e32b 2104
5e681ec4
PB		 2105#ifdef FOUR_WORD_PLT
2106
252b5132
RH		 2107/* The first entry in a procedure linkage table looks like
2108 this. It is set up so that any shared library function that is
59f2c4e7 2109 called before the relocation has been set up calls the dynamic
9b485d32 2110 linker first. */
e5a52504 2111static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2112{
2113 0xe52de004, /* str lr, [sp, #-4]! */
2114 0xe59fe010, /* ldr lr, [pc, #16] */
2115 0xe08fe00e, /* add lr, pc, lr */
2116 0xe5bef008, /* ldr pc, [lr, #8]! */
2117};
5e681ec4
PB		 2118
2119/* Subsequent entries in a procedure linkage table look like
2120 this. */
e5a52504 2121static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2122{
2123 0xe28fc600, /* add ip, pc, #NN */
2124 0xe28cca00, /* add ip, ip, #NN */
2125 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2126 0x00000000, /* unused */
2127};
5e681ec4
PB		 2128
2129#else
2130
5e681ec4
PB		 2131/* The first entry in a procedure linkage table looks like
2132 this. It is set up so that any shared library function that is
2133 called before the relocation has been set up calls the dynamic
2134 linker first. */
e5a52504 2135static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2136{
2137 0xe52de004, /* str lr, [sp, #-4]! */
2138 0xe59fe004, /* ldr lr, [pc, #4] */
2139 0xe08fe00e, /* add lr, pc, lr */
2140 0xe5bef008, /* ldr pc, [lr, #8]! */
2141 0x00000000, /* &GOT[0] - . */
2142};
252b5132
RH		 2143
2144/* Subsequent entries in a procedure linkage table look like
2145 this. */
e5a52504 2146static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2147{
2148 0xe28fc600, /* add ip, pc, #0xNN00000 */
2149 0xe28cca00, /* add ip, ip, #0xNN000 */
2150 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2151};
5e681ec4
PB		 2152
2153#endif
252b5132 2154
00a97672
RS		 2155/* The format of the first entry in the procedure linkage table
2156 for a VxWorks executable. */
2157static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
b38cadfb
NC		 2158{
2159 0xe52dc008, /* str ip,[sp,#-8]! */
2160 0xe59fc000, /* ldr ip,[pc] */
2161 0xe59cf008, /* ldr pc,[ip,#8] */
2162 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2163};
00a97672
RS		 2164
2165/* The format of subsequent entries in a VxWorks executable. */
2166static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
b38cadfb
NC		 2167{
2168 0xe59fc000, /* ldr ip,[pc] */
2169 0xe59cf000, /* ldr pc,[ip] */
2170 0x00000000, /* .long @got */
2171 0xe59fc000, /* ldr ip,[pc] */
2172 0xea000000, /* b _PLT */
2173 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2174};
00a97672
RS		 2175
2176/* The format of entries in a VxWorks shared library. */
2177static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
b38cadfb
NC		 2178{
2179 0xe59fc000, /* ldr ip,[pc] */
2180 0xe79cf009, /* ldr pc,[ip,r9] */
2181 0x00000000, /* .long @got */
2182 0xe59fc000, /* ldr ip,[pc] */
2183 0xe599f008, /* ldr pc,[r9,#8] */
2184 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2185};
00a97672 2186
b7693d02
DJ		 2187/* An initial stub used if the PLT entry is referenced from Thumb code. */
2188#define PLT_THUMB_STUB_SIZE 4
2189static const bfd_vma elf32_arm_plt_thumb_stub [] =
b38cadfb
NC		 2190{
2191 0x4778, /* bx pc */
2192 0x46c0 /* nop */
2193};
b7693d02 2194
e5a52504
MM		 2195/* The entries in a PLT when using a DLL-based target with multiple
2196 address spaces. */
906e58ca 2197static const bfd_vma elf32_arm_symbian_plt_entry [] =
b38cadfb
NC		 2198{
2199 0xe51ff004, /* ldr pc, [pc, #-4] */
2200 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2201};
2202
2203/* The first entry in a procedure linkage table looks like
2204 this. It is set up so that any shared library function that is
2205 called before the relocation has been set up calls the dynamic
2206 linker first. */
2207static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2208{
2209 /* First bundle: */
2210 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2211 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2212 0xe08cc00f, /* add ip, ip, pc */
2213 0xe52dc008, /* str ip, [sp, #-8]! */
2214 /* Second bundle: */
edccdf7c
RM		 2215 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2216 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2217 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2218 0xe12fff1c, /* bx ip */
b38cadfb 2219 /* Third bundle: */
edccdf7c
RM		 2220 0xe320f000, /* nop */
2221 0xe320f000, /* nop */
2222 0xe320f000, /* nop */
b38cadfb
NC		 2223 /* .Lplt_tail: */
2224 0xe50dc004, /* str ip, [sp, #-4] */
2225 /* Fourth bundle: */
edccdf7c
RM		 2226 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2227 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2228 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2229 0xe12fff1c, /* bx ip */
b38cadfb
NC		 2230};
2231#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2232
2233/* Subsequent entries in a procedure linkage table look like this. */
2234static const bfd_vma elf32_arm_nacl_plt_entry [] =
2235{
2236 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2237 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2238 0xe08cc00f, /* add ip, ip, pc */
2239 0xea000000, /* b .Lplt_tail */
2240};
e5a52504 2241
906e58ca
NC		 2242#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2243#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2244#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2245#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2246#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2247#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2248
461a49ca 2249enum stub_insn_type
b38cadfb
NC		 2250{
2251 THUMB16_TYPE = 1,
2252 THUMB32_TYPE,
2253 ARM_TYPE,
2254 DATA_TYPE
2255};
461a49ca 2256
48229727
JB		 2257#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2258/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2259 is inserted in arm_build_one_stub(). */
2260#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2261#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2262#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2263#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2264#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2265#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2266
2267typedef struct
2268{
b38cadfb
NC		 2269 bfd_vma data;
2270 enum stub_insn_type type;
2271 unsigned int r_type;
2272 int reloc_addend;
461a49ca
DJ		 2273} insn_sequence;
2274
fea2b4d6
CL		 2275/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2276 to reach the stub if necessary. */
461a49ca 2277static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
b38cadfb
NC		 2278{
2279 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2280 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2281};
906e58ca 2282
fea2b4d6
CL		 2283/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2284 available. */
461a49ca 2285static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
b38cadfb
NC		 2286{
2287 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2288 ARM_INSN (0xe12fff1c), /* bx ip */
2289 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2290};
906e58ca 2291
d3626fb0 2292/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2293static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
b38cadfb
NC		 2294{
2295 THUMB16_INSN (0xb401), /* push {r0} */
2296 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2297 THUMB16_INSN (0x4684), /* mov ip, r0 */
2298 THUMB16_INSN (0xbc01), /* pop {r0} */
2299 THUMB16_INSN (0x4760), /* bx ip */
2300 THUMB16_INSN (0xbf00), /* nop */
2301 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2302};
906e58ca 2303
d3626fb0
CL		 2304/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2305 allowed. */
2306static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
b38cadfb
NC		 2307{
2308 THUMB16_INSN (0x4778), /* bx pc */
2309 THUMB16_INSN (0x46c0), /* nop */
2310 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2311 ARM_INSN (0xe12fff1c), /* bx ip */
2312 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2313};
d3626fb0 2314
fea2b4d6
CL		 2315/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2316 available. */
461a49ca 2317static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2318{
2319 THUMB16_INSN (0x4778), /* bx pc */
2320 THUMB16_INSN (0x46c0), /* nop */
2321 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2322 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2323};
906e58ca 2324
fea2b4d6
CL		 2325/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2326 one, when the destination is close enough. */
461a49ca 2327static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2328{
2329 THUMB16_INSN (0x4778), /* bx pc */
2330 THUMB16_INSN (0x46c0), /* nop */
2331 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2332};
c820be07 2333
cf3eccff 2334/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2335 blx to reach the stub if necessary. */
cf3eccff 2336static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
b38cadfb
NC		 2337{
2338 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2339 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2340 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2341};
906e58ca 2342
cf3eccff
DJ		 2343/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2344 blx to reach the stub if necessary. We can not add into pc;
2345 it is not guaranteed to mode switch (different in ARMv6 and
2346 ARMv7). */
2347static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
b38cadfb
NC		 2348{
2349 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2350 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2351 ARM_INSN (0xe12fff1c), /* bx ip */
2352 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2353};
cf3eccff 2354
ebe24dd4
CL		 2355/* V4T ARM -> ARM long branch stub, PIC. */
2356static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
b38cadfb
NC		 2357{
2358 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2359 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2360 ARM_INSN (0xe12fff1c), /* bx ip */
2361 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2362};
ebe24dd4
CL		 2363
2364/* V4T Thumb -> ARM long branch stub, PIC. */
2365static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
b38cadfb
NC		 2366{
2367 THUMB16_INSN (0x4778), /* bx pc */
2368 THUMB16_INSN (0x46c0), /* nop */
2369 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2370 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2371 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2372};
ebe24dd4 2373
d3626fb0
CL		 2374/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2375 architectures. */
ebe24dd4 2376static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
b38cadfb
NC		 2377{
2378 THUMB16_INSN (0xb401), /* push {r0} */
2379 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2380 THUMB16_INSN (0x46fc), /* mov ip, pc */
2381 THUMB16_INSN (0x4484), /* add ip, r0 */
2382 THUMB16_INSN (0xbc01), /* pop {r0} */
2383 THUMB16_INSN (0x4760), /* bx ip */
2384 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2385};
ebe24dd4 2386
d3626fb0
CL		 2387/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2388 allowed. */
2389static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
b38cadfb
NC		 2390{
2391 THUMB16_INSN (0x4778), /* bx pc */
2392 THUMB16_INSN (0x46c0), /* nop */
2393 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2394 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2395 ARM_INSN (0xe12fff1c), /* bx ip */
2396 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2397};
d3626fb0 2398
0855e32b
NS		 2399/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2400 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2401static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2402{
b38cadfb
NC		 2403 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2404 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2405 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
0855e32b
NS		 2406};
2407
2408/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2409 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2410static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2411{
b38cadfb
NC		 2412 THUMB16_INSN (0x4778), /* bx pc */
2413 THUMB16_INSN (0x46c0), /* nop */
2414 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2415 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2416 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
0855e32b
NS		 2417};
2418
48229727
JB		 2419/* Cortex-A8 erratum-workaround stubs. */
2420
2421/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2422 can't use a conditional branch to reach this stub). */
2423
2424static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
b38cadfb
NC		 2425{
2426 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2427 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2428 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2429};
48229727
JB		 2430
2431/* Stub used for b.w and bl.w instructions. */
2432
2433static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
b38cadfb
NC		 2434{
2435 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2436};
48229727
JB		 2437
2438static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
b38cadfb
NC		 2439{
2440 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2441};
48229727
JB		 2442
2443/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2444 instruction (which switches to ARM mode) to point to this stub. Jump to the
2445 real destination using an ARM-mode branch. */
2446
2447static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
b38cadfb
NC		 2448{
2449 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2450};
48229727 2451
9553db3c
NC		 2452/* For each section group there can be a specially created linker section
2453 to hold the stubs for that group. The name of the stub section is based
2454 upon the name of another section within that group with the suffix below
2455 applied.
2456
2457 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2458 create what appeared to be a linker stub section when it actually
2459 contained user code/data. For example, consider this fragment:
b38cadfb 2460
9553db3c
NC		 2461 const char * stubborn_problems[] = { "np" };
2462
2463 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2464 section called:
2465
2466 .data.rel.local.stubborn_problems
2467
2468 This then causes problems in arm32_arm_build_stubs() as it triggers:
2469
2470 // Ignore non-stub sections.
2471 if (!strstr (stub_sec->name, STUB_SUFFIX))
2472 continue;
2473
2474 And so the section would be ignored instead of being processed. Hence
2475 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2476 C identifier. */
2477#define STUB_SUFFIX ".__stub"
906e58ca 2478
738a79f6
CL		 2479/* One entry per long/short branch stub defined above. */
2480#define DEF_STUBS \
2481 DEF_STUB(long_branch_any_any) \
2482 DEF_STUB(long_branch_v4t_arm_thumb) \
2483 DEF_STUB(long_branch_thumb_only) \
2484 DEF_STUB(long_branch_v4t_thumb_thumb) \
2485 DEF_STUB(long_branch_v4t_thumb_arm) \
2486 DEF_STUB(short_branch_v4t_thumb_arm) \
2487 DEF_STUB(long_branch_any_arm_pic) \
2488 DEF_STUB(long_branch_any_thumb_pic) \
2489 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2490 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2491 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2492 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2493 DEF_STUB(long_branch_any_tls_pic) \
2494 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
48229727
JB		 2495 DEF_STUB(a8_veneer_b_cond) \
2496 DEF_STUB(a8_veneer_b) \
2497 DEF_STUB(a8_veneer_bl) \
2498 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2499
2500#define DEF_STUB(x) arm_stub_##x,
b38cadfb
NC		 2501enum elf32_arm_stub_type
2502{
906e58ca 2503 arm_stub_none,
738a79f6 2504 DEF_STUBS
eb7c4339
NS		 2505 /* Note the first a8_veneer type */
2506 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2507};
2508#undef DEF_STUB
2509
2510typedef struct
2511{
d3ce72d0 2512 const insn_sequence* template_sequence;
738a79f6
CL		 2513 int template_size;
2514} stub_def;
2515
2516#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
b38cadfb
NC		 2517static const stub_def stub_definitions[] =
2518{
738a79f6
CL		 2519 {NULL, 0},
2520 DEF_STUBS
906e58ca
NC		 2521};
2522
2523struct elf32_arm_stub_hash_entry
2524{
2525 /* Base hash table entry structure. */
2526 struct bfd_hash_entry root;
2527
2528 /* The stub section. */
2529 asection *stub_sec;
2530
2531 /* Offset within stub_sec of the beginning of this stub. */
2532 bfd_vma stub_offset;
2533
2534 /* Given the symbol's value and its section we can determine its final
2535 value when building the stubs (so the stub knows where to jump). */
2536 bfd_vma target_value;
2537 asection *target_section;
2538
48229727
JB		 2539 /* Offset to apply to relocation referencing target_value. */
2540 bfd_vma target_addend;
2541
2542 /* The instruction which caused this stub to be generated (only valid for
2543 Cortex-A8 erratum workaround stubs at present). */
2544 unsigned long orig_insn;
2545
461a49ca 2546 /* The stub type. */
906e58ca 2547 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2548 /* Its encoding size in bytes. */
2549 int stub_size;
2550 /* Its template. */
2551 const insn_sequence *stub_template;
2552 /* The size of the template (number of entries). */
2553 int stub_template_size;
906e58ca
NC		 2554
2555 /* The symbol table entry, if any, that this was derived from. */
2556 struct elf32_arm_link_hash_entry *h;
2557
35fc36a8
RS		 2558 /* Type of branch. */
2559 enum arm_st_branch_type branch_type;
906e58ca
NC		 2560
2561 /* Where this stub is being called from, or, in the case of combined
2562 stub sections, the first input section in the group. */
2563 asection *id_sec;
7413f23f
DJ		 2564
2565 /* The name for the local symbol at the start of this stub. The
2566 stub name in the hash table has to be unique; this does not, so
2567 it can be friendlier. */
2568 char *output_name;
906e58ca
NC		 2569};
2570
e489d0ae
PB		 2571/* Used to build a map of a section. This is required for mixed-endian
2572 code/data. */
2573
2574typedef struct elf32_elf_section_map
2575{
2576 bfd_vma vma;
2577 char type;
2578}
2579elf32_arm_section_map;
2580
c7b8f16e
JB		 2581/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2582
2583typedef enum
2584{
2585 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2586 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2587 VFP11_ERRATUM_ARM_VENEER,
2588 VFP11_ERRATUM_THUMB_VENEER
2589}
2590elf32_vfp11_erratum_type;
2591
2592typedef struct elf32_vfp11_erratum_list
2593{
2594 struct elf32_vfp11_erratum_list *next;
2595 bfd_vma vma;
2596 union
2597 {
2598 struct
2599 {
2600 struct elf32_vfp11_erratum_list *veneer;
2601 unsigned int vfp_insn;
2602 } b;
2603 struct
2604 {
2605 struct elf32_vfp11_erratum_list *branch;
2606 unsigned int id;
2607 } v;
2608 } u;
2609 elf32_vfp11_erratum_type type;
2610}
2611elf32_vfp11_erratum_list;
2612
2468f9c9
PB		 2613typedef enum
2614{
2615 DELETE_EXIDX_ENTRY,
2616 INSERT_EXIDX_CANTUNWIND_AT_END
2617}
2618arm_unwind_edit_type;
2619
2620/* A (sorted) list of edits to apply to an unwind table. */
2621typedef struct arm_unwind_table_edit
2622{
2623 arm_unwind_edit_type type;
2624 /* Note: we sometimes want to insert an unwind entry corresponding to a
2625 section different from the one we're currently writing out, so record the
2626 (text) section this edit relates to here. */
2627 asection *linked_section;
2628 unsigned int index;
2629 struct arm_unwind_table_edit *next;
2630}
2631arm_unwind_table_edit;
2632
8e3de13a 2633typedef struct _arm_elf_section_data
e489d0ae 2634{
2468f9c9 2635 /* Information about mapping symbols. */
e489d0ae 2636 struct bfd_elf_section_data elf;
8e3de13a 2637 unsigned int mapcount;
c7b8f16e 2638 unsigned int mapsize;
e489d0ae 2639 elf32_arm_section_map *map;
2468f9c9 2640 /* Information about CPU errata. */
c7b8f16e
JB		 2641 unsigned int erratumcount;
2642 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2643 /* Information about unwind tables. */
2644 union
2645 {
2646 /* Unwind info attached to a text section. */
2647 struct
2648 {
2649 asection *arm_exidx_sec;
2650 } text;
2651
2652 /* Unwind info attached to an .ARM.exidx section. */
2653 struct
2654 {
2655 arm_unwind_table_edit *unwind_edit_list;
2656 arm_unwind_table_edit *unwind_edit_tail;
2657 } exidx;
2658 } u;
8e3de13a
NC		 2659}
2660_arm_elf_section_data;
e489d0ae
PB		 2661
2662#define elf32_arm_section_data(sec) \
8e3de13a 2663 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2664
48229727
JB		 2665/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2666 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2667 so may be created multiple times: we use an array of these entries whilst
2668 relaxing which we can refresh easily, then create stubs for each potentially
2669 erratum-triggering instruction once we've settled on a solution. */
2670
b38cadfb
NC		 2671struct a8_erratum_fix
2672{
48229727
JB		 2673 bfd *input_bfd;
2674 asection *section;
2675 bfd_vma offset;
2676 bfd_vma addend;
2677 unsigned long orig_insn;
2678 char *stub_name;
2679 enum elf32_arm_stub_type stub_type;
35fc36a8 2680 enum arm_st_branch_type branch_type;
48229727
JB		 2681};
2682
2683/* A table of relocs applied to branches which might trigger Cortex-A8
2684 erratum. */
2685
b38cadfb
NC		 2686struct a8_erratum_reloc
2687{
48229727
JB		 2688 bfd_vma from;
2689 bfd_vma destination;
92750f34
DJ		 2690 struct elf32_arm_link_hash_entry *hash;
2691 const char *sym_name;
48229727 2692 unsigned int r_type;
35fc36a8 2693 enum arm_st_branch_type branch_type;
48229727
JB		 2694 bfd_boolean non_a8_stub;
2695};
2696
ba93b8ac
DJ		 2697/* The size of the thread control block. */
2698#define TCB_SIZE 8
2699
34e77a92
RS		 2700/* ARM-specific information about a PLT entry, over and above the usual
2701 gotplt_union. */
b38cadfb
NC		 2702struct arm_plt_info
2703{
34e77a92
RS		 2704 /* We reference count Thumb references to a PLT entry separately,
2705 so that we can emit the Thumb trampoline only if needed. */
2706 bfd_signed_vma thumb_refcount;
2707
2708 /* Some references from Thumb code may be eliminated by BL->BLX
2709 conversion, so record them separately. */
2710 bfd_signed_vma maybe_thumb_refcount;
2711
2712 /* How many of the recorded PLT accesses were from non-call relocations.
2713 This information is useful when deciding whether anything takes the
2714 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2715 non-call references to the function should resolve directly to the
2716 real runtime target. */
2717 unsigned int noncall_refcount;
2718
2719 /* Since PLT entries have variable size if the Thumb prologue is
2720 used, we need to record the index into .got.plt instead of
2721 recomputing it from the PLT offset. */
2722 bfd_signed_vma got_offset;
2723};
2724
2725/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
b38cadfb
NC		 2726struct arm_local_iplt_info
2727{
34e77a92
RS		 2728 /* The information that is usually found in the generic ELF part of
2729 the hash table entry. */
2730 union gotplt_union root;
2731
2732 /* The information that is usually found in the ARM-specific part of
2733 the hash table entry. */
2734 struct arm_plt_info arm;
2735
2736 /* A list of all potential dynamic relocations against this symbol. */
2737 struct elf_dyn_relocs *dyn_relocs;
2738};
2739
0ffa91dd 2740struct elf_arm_obj_tdata
ba93b8ac
DJ		 2741{
2742 struct elf_obj_tdata root;
2743
2744 /* tls_type for each local got entry. */
2745 char *local_got_tls_type;
ee065d83 2746
0855e32b
NS		 2747 /* GOTPLT entries for TLS descriptors. */
2748 bfd_vma *local_tlsdesc_gotent;
2749
34e77a92
RS		 2750 /* Information for local symbols that need entries in .iplt. */
2751 struct arm_local_iplt_info **local_iplt;
2752
bf21ed78
MS		 2753 /* Zero to warn when linking objects with incompatible enum sizes. */
2754 int no_enum_size_warning;
a9dc9481
JM		 2755
2756 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2757 int no_wchar_size_warning;
ba93b8ac
DJ		 2758};
2759
0ffa91dd
NC		 2760#define elf_arm_tdata(bfd) \
2761 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2762
0ffa91dd
NC		 2763#define elf32_arm_local_got_tls_type(bfd) \
2764 (elf_arm_tdata (bfd)->local_got_tls_type)
2765
0855e32b
NS		 2766#define elf32_arm_local_tlsdesc_gotent(bfd) \
2767 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2768
34e77a92
RS		 2769#define elf32_arm_local_iplt(bfd) \
2770 (elf_arm_tdata (bfd)->local_iplt)
2771
0ffa91dd
NC		 2772#define is_arm_elf(bfd) \
2773 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2774 && elf_tdata (bfd) != NULL \
4dfe6ac6 2775 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2776
2777static bfd_boolean
2778elf32_arm_mkobject (bfd *abfd)
2779{
0ffa91dd 2780 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2781 ARM_ELF_DATA);
ba93b8ac
DJ		 2782}
2783
ba93b8ac
DJ		 2784#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2785
ba96a88f 2786/* Arm ELF linker hash entry. */
252b5132 2787struct elf32_arm_link_hash_entry
b38cadfb
NC		 2788{
2789 struct elf_link_hash_entry root;
252b5132 2790
b38cadfb
NC		 2791 /* Track dynamic relocs copied for this symbol. */
2792 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2793
b38cadfb
NC		 2794 /* ARM-specific PLT information. */
2795 struct arm_plt_info plt;
ba93b8ac
DJ		 2796
2797#define GOT_UNKNOWN 0
2798#define GOT_NORMAL 1
2799#define GOT_TLS_GD 2
2800#define GOT_TLS_IE 4
0855e32b
NS		 2801#define GOT_TLS_GDESC 8
2802#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
b38cadfb 2803 unsigned int tls_type : 8;
34e77a92 2804
b38cadfb
NC		 2805 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2806 unsigned int is_iplt : 1;
34e77a92 2807
b38cadfb 2808 unsigned int unused : 23;
a4fd1a8e 2809
b38cadfb
NC		 2810 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2811 starting at the end of the jump table. */
2812 bfd_vma tlsdesc_got;
0855e32b 2813
b38cadfb
NC		 2814 /* The symbol marking the real symbol location for exported thumb
2815 symbols with Arm stubs. */
2816 struct elf_link_hash_entry *export_glue;
906e58ca 2817
b38cadfb 2818 /* A pointer to the most recently used stub hash entry against this
8029a119 2819 symbol. */
b38cadfb
NC		 2820 struct elf32_arm_stub_hash_entry *stub_cache;
2821};
252b5132 2822
252b5132 2823/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2824#define elf32_arm_link_hash_traverse(table, func, info) \
2825 (elf_link_hash_traverse \
2826 (&(table)->root, \
b7693d02 2827 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2828 (info)))
2829
2830/* Get the ARM elf linker hash table from a link_info structure. */
2831#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2832 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2833 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2834
906e58ca
NC		 2835#define arm_stub_hash_lookup(table, string, create, copy) \
2836 ((struct elf32_arm_stub_hash_entry *) \
2837 bfd_hash_lookup ((table), (string), (create), (copy)))
2838
21d799b5
NC		 2839/* Array to keep track of which stub sections have been created, and
2840 information on stub grouping. */
2841struct map_stub
2842{
2843 /* This is the section to which stubs in the group will be
2844 attached. */
2845 asection *link_sec;
2846 /* The stub section. */
2847 asection *stub_sec;
2848};
2849
0855e32b
NS		 2850#define elf32_arm_compute_jump_table_size(htab) \
2851 ((htab)->next_tls_desc_index * 4)
2852
9b485d32 2853/* ARM ELF linker hash table. */
252b5132 2854struct elf32_arm_link_hash_table
906e58ca
NC		 2855{
2856 /* The main hash table. */
2857 struct elf_link_hash_table root;
252b5132 2858
906e58ca
NC		 2859 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2860 bfd_size_type thumb_glue_size;
252b5132 2861
906e58ca
NC		 2862 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2863 bfd_size_type arm_glue_size;
252b5132 2864
906e58ca
NC		 2865 /* The size in bytes of section containing the ARMv4 BX veneers. */
2866 bfd_size_type bx_glue_size;
845b51d6 2867
906e58ca
NC		 2868 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2869 veneer has been populated. */
2870 bfd_vma bx_glue_offset[15];
845b51d6 2871
906e58ca
NC		 2872 /* The size in bytes of the section containing glue for VFP11 erratum
2873 veneers. */
2874 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2875
48229727
JB		 2876 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2877 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2878 elf32_arm_write_section(). */
2879 struct a8_erratum_fix *a8_erratum_fixes;
2880 unsigned int num_a8_erratum_fixes;
2881
906e58ca
NC		 2882 /* An arbitrary input BFD chosen to hold the glue sections. */
2883 bfd * bfd_of_glue_owner;
ba96a88f 2884
906e58ca
NC		 2885 /* Nonzero to output a BE8 image. */
2886 int byteswap_code;
e489d0ae 2887
906e58ca
NC		 2888 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2889 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2890 int target1_is_rel;
9c504268 2891
906e58ca
NC		 2892 /* The relocation to use for R_ARM_TARGET2 relocations. */
2893 int target2_reloc;
eb043451 2894
906e58ca
NC		 2895 /* 0 = Ignore R_ARM_V4BX.
2896 1 = Convert BX to MOV PC.
2897 2 = Generate v4 interworing stubs. */
2898 int fix_v4bx;
319850b4 2899
48229727
JB		 2900 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2901 int fix_cortex_a8;
2902
2de70689
MGD		 2903 /* Whether we should fix the ARM1176 BLX immediate issue. */
2904 int fix_arm1176;
2905
906e58ca
NC		 2906 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2907 int use_blx;
33bfe774 2908
906e58ca
NC		 2909 /* What sort of code sequences we should look for which may trigger the
2910 VFP11 denorm erratum. */
2911 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2912
906e58ca
NC		 2913 /* Global counter for the number of fixes we have emitted. */
2914 int num_vfp11_fixes;
c7b8f16e 2915
906e58ca
NC		 2916 /* Nonzero to force PIC branch veneers. */
2917 int pic_veneer;
27e55c4d 2918
906e58ca
NC		 2919 /* The number of bytes in the initial entry in the PLT. */
2920 bfd_size_type plt_header_size;
e5a52504 2921
906e58ca
NC		 2922 /* The number of bytes in the subsequent PLT etries. */
2923 bfd_size_type plt_entry_size;
e5a52504 2924
906e58ca
NC		 2925 /* True if the target system is VxWorks. */
2926 int vxworks_p;
00a97672 2927
906e58ca
NC		 2928 /* True if the target system is Symbian OS. */
2929 int symbian_p;
e5a52504 2930
b38cadfb
NC		 2931 /* True if the target system is Native Client. */
2932 int nacl_p;
2933
906e58ca
NC		 2934 /* True if the target uses REL relocations. */
2935 int use_rel;
4e7fd91e 2936
0855e32b
NS		 2937 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2938 bfd_vma next_tls_desc_index;
2939
2940 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2941 bfd_vma num_tls_desc;
2942
906e58ca 2943 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2944 asection *sdynbss;
2945 asection *srelbss;
5e681ec4 2946
906e58ca
NC		 2947 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2948 asection *srelplt2;
00a97672 2949
0855e32b
NS		 2950 /* The offset into splt of the PLT entry for the TLS descriptor
2951 resolver. Special values are 0, if not necessary (or not found
2952 to be necessary yet), and -1 if needed but not determined
2953 yet. */
2954 bfd_vma dt_tlsdesc_plt;
2955
2956 /* The offset into sgot of the GOT entry used by the PLT entry
2957 above. */
b38cadfb 2958 bfd_vma dt_tlsdesc_got;
0855e32b
NS		 2959
2960 /* Offset in .plt section of tls_arm_trampoline. */
2961 bfd_vma tls_trampoline;
2962
906e58ca
NC		 2963 /* Data for R_ARM_TLS_LDM32 relocations. */
2964 union
2965 {
2966 bfd_signed_vma refcount;
2967 bfd_vma offset;
2968 } tls_ldm_got;
b7693d02 2969
87d72d41
AM		 2970 /* Small local sym cache. */
2971 struct sym_cache sym_cache;
906e58ca
NC		 2972
2973 /* For convenience in allocate_dynrelocs. */
2974 bfd * obfd;
2975
0855e32b
NS		 2976 /* The amount of space used by the reserved portion of the sgotplt
2977 section, plus whatever space is used by the jump slots. */
2978 bfd_vma sgotplt_jump_table_size;
2979
906e58ca
NC		 2980 /* The stub hash table. */
2981 struct bfd_hash_table stub_hash_table;
2982
2983 /* Linker stub bfd. */
2984 bfd *stub_bfd;
2985
2986 /* Linker call-backs. */
2987 asection * (*add_stub_section) (const char *, asection *);
2988 void (*layout_sections_again) (void);
2989
2990 /* Array to keep track of which stub sections have been created, and
2991 information on stub grouping. */
21d799b5 2992 struct map_stub *stub_group;
906e58ca 2993
fe33d2fa
CL		 2994 /* Number of elements in stub_group. */
2995 int top_id;
2996
906e58ca
NC		 2997 /* Assorted information used by elf32_arm_size_stubs. */
2998 unsigned int bfd_count;
2999 int top_index;
3000 asection **input_list;
3001};
252b5132 3002
780a67af
NC		 3003/* Create an entry in an ARM ELF linker hash table. */
3004
3005static struct bfd_hash_entry *
57e8b36a
NC		 3006elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3007 struct bfd_hash_table * table,
3008 const char * string)
780a67af
NC		 3009{
3010 struct elf32_arm_link_hash_entry * ret =
3011 (struct elf32_arm_link_hash_entry *) entry;
3012
3013 /* Allocate the structure if it has not already been allocated by a
3014 subclass. */
906e58ca 3015 if (ret == NULL)
21d799b5
NC		 3016 ret = (struct elf32_arm_link_hash_entry *)
3017 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 3018 if (ret == NULL)
780a67af
NC		 3019 return (struct bfd_hash_entry *) ret;
3020
3021 /* Call the allocation method of the superclass. */
3022 ret = ((struct elf32_arm_link_hash_entry *)
3023 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3024 table, string));
57e8b36a 3025 if (ret != NULL)
b7693d02 3026 {
0bdcacaf 3027 ret->dyn_relocs = NULL;
ba93b8ac 3028 ret->tls_type = GOT_UNKNOWN;
0855e32b 3029 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 3030 ret->plt.thumb_refcount = 0;
3031 ret->plt.maybe_thumb_refcount = 0;
3032 ret->plt.noncall_refcount = 0;
3033 ret->plt.got_offset = -1;
3034 ret->is_iplt = FALSE;
a4fd1a8e 3035 ret->export_glue = NULL;
906e58ca
NC		 3036
3037 ret->stub_cache = NULL;
b7693d02 3038 }
780a67af
NC		 3039
3040 return (struct bfd_hash_entry *) ret;
3041}
3042
34e77a92
RS		 3043/* Ensure that we have allocated bookkeeping structures for ABFD's local
3044 symbols. */
3045
3046static bfd_boolean
3047elf32_arm_allocate_local_sym_info (bfd *abfd)
3048{
3049 if (elf_local_got_refcounts (abfd) == NULL)
3050 {
3051 bfd_size_type num_syms;
3052 bfd_size_type size;
3053 char *data;
3054
3055 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3056 size = num_syms * (sizeof (bfd_signed_vma)
3057 + sizeof (struct arm_local_iplt_info *)
3058 + sizeof (bfd_vma)
3059 + sizeof (char));
3060 data = bfd_zalloc (abfd, size);
3061 if (data == NULL)
3062 return FALSE;
3063
3064 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3065 data += num_syms * sizeof (bfd_signed_vma);
3066
3067 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3068 data += num_syms * sizeof (struct arm_local_iplt_info *);
3069
3070 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3071 data += num_syms * sizeof (bfd_vma);
3072
3073 elf32_arm_local_got_tls_type (abfd) = data;
3074 }
3075 return TRUE;
3076}
3077
3078/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3079 to input bfd ABFD. Create the information if it doesn't already exist.
3080 Return null if an allocation fails. */
3081
3082static struct arm_local_iplt_info *
3083elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3084{
3085 struct arm_local_iplt_info **ptr;
3086
3087 if (!elf32_arm_allocate_local_sym_info (abfd))
3088 return NULL;
3089
3090 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3091 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3092 if (*ptr == NULL)
3093 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3094 return *ptr;
3095}
3096
3097/* Try to obtain PLT information for the symbol with index R_SYMNDX
3098 in ABFD's symbol table. If the symbol is global, H points to its
3099 hash table entry, otherwise H is null.
3100
3101 Return true if the symbol does have PLT information. When returning
3102 true, point *ROOT_PLT at the target-independent reference count/offset
3103 union and *ARM_PLT at the ARM-specific information. */
3104
3105static bfd_boolean
3106elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3107 unsigned long r_symndx, union gotplt_union **root_plt,
3108 struct arm_plt_info **arm_plt)
3109{
3110 struct arm_local_iplt_info *local_iplt;
3111
3112 if (h != NULL)
3113 {
3114 *root_plt = &h->root.plt;
3115 *arm_plt = &h->plt;
3116 return TRUE;
3117 }
3118
3119 if (elf32_arm_local_iplt (abfd) == NULL)
3120 return FALSE;
3121
3122 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3123 if (local_iplt == NULL)
3124 return FALSE;
3125
3126 *root_plt = &local_iplt->root;
3127 *arm_plt = &local_iplt->arm;
3128 return TRUE;
3129}
3130
3131/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3132 before it. */
3133
3134static bfd_boolean
3135elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3136 struct arm_plt_info *arm_plt)
3137{
3138 struct elf32_arm_link_hash_table *htab;
3139
3140 htab = elf32_arm_hash_table (info);
3141 return (arm_plt->thumb_refcount != 0
3142 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3143}
3144
3145/* Return a pointer to the head of the dynamic reloc list that should
3146 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3147 ABFD's symbol table. Return null if an error occurs. */
3148
3149static struct elf_dyn_relocs **
3150elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3151 Elf_Internal_Sym *isym)
3152{
3153 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3154 {
3155 struct arm_local_iplt_info *local_iplt;
3156
3157 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3158 if (local_iplt == NULL)
3159 return NULL;
3160 return &local_iplt->dyn_relocs;
3161 }
3162 else
3163 {
3164 /* Track dynamic relocs needed for local syms too.
3165 We really need local syms available to do this
3166 easily. Oh well. */
3167 asection *s;
3168 void *vpp;
3169
3170 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3171 if (s == NULL)
3172 abort ();
3173
3174 vpp = &elf_section_data (s)->local_dynrel;
3175 return (struct elf_dyn_relocs **) vpp;
3176 }
3177}
3178
906e58ca
NC		 3179/* Initialize an entry in the stub hash table. */
3180
3181static struct bfd_hash_entry *
3182stub_hash_newfunc (struct bfd_hash_entry *entry,
3183 struct bfd_hash_table *table,
3184 const char *string)
3185{
3186 /* Allocate the structure if it has not already been allocated by a
3187 subclass. */
3188 if (entry == NULL)
3189 {
21d799b5
NC		 3190 entry = (struct bfd_hash_entry *)
3191 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3192 if (entry == NULL)
3193 return entry;
3194 }
3195
3196 /* Call the allocation method of the superclass. */
3197 entry = bfd_hash_newfunc (entry, table, string);
3198 if (entry != NULL)
3199 {
3200 struct elf32_arm_stub_hash_entry *eh;
3201
3202 /* Initialize the local fields. */
3203 eh = (struct elf32_arm_stub_hash_entry *) entry;
3204 eh->stub_sec = NULL;
3205 eh->stub_offset = 0;
3206 eh->target_value = 0;
3207 eh->target_section = NULL;
cedfb179
DK		 3208 eh->target_addend = 0;
3209 eh->orig_insn = 0;
906e58ca 3210 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3211 eh->stub_size = 0;
3212 eh->stub_template = NULL;
3213 eh->stub_template_size = 0;
906e58ca
NC		 3214 eh->h = NULL;
3215 eh->id_sec = NULL;
d8d2f433 3216 eh->output_name = NULL;
906e58ca
NC		 3217 }
3218
3219 return entry;
3220}
3221
00a97672 3222/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3223 shortcuts to them in our hash table. */
3224
3225static bfd_boolean
57e8b36a 3226create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3227{
3228 struct elf32_arm_link_hash_table *htab;
3229
e5a52504 3230 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3231 if (htab == NULL)
3232 return FALSE;
3233
e5a52504
MM		 3234 /* BPABI objects never have a GOT, or associated sections. */
3235 if (htab->symbian_p)
3236 return TRUE;
3237
5e681ec4
PB		 3238 if (! _bfd_elf_create_got_section (dynobj, info))
3239 return FALSE;
3240
5e681ec4
PB		 3241 return TRUE;
3242}
3243
34e77a92
RS		 3244/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3245
3246static bfd_boolean
3247create_ifunc_sections (struct bfd_link_info *info)
3248{
3249 struct elf32_arm_link_hash_table *htab;
3250 const struct elf_backend_data *bed;
3251 bfd *dynobj;
3252 asection *s;
3253 flagword flags;
b38cadfb 3254
34e77a92
RS		 3255 htab = elf32_arm_hash_table (info);
3256 dynobj = htab->root.dynobj;
3257 bed = get_elf_backend_data (dynobj);
3258 flags = bed->dynamic_sec_flags;
3259
3260 if (htab->root.iplt == NULL)
3261 {
3d4d4302
AM		 3262 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3263 flags | SEC_READONLY | SEC_CODE);
34e77a92 3264 if (s == NULL
a0f49396 3265 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
34e77a92
RS		 3266 return FALSE;
3267 htab->root.iplt = s;
3268 }
3269
3270 if (htab->root.irelplt == NULL)
3271 {
3d4d4302
AM		 3272 s = bfd_make_section_anyway_with_flags (dynobj,
3273 RELOC_SECTION (htab, ".iplt"),
3274 flags | SEC_READONLY);
34e77a92 3275 if (s == NULL
a0f49396 3276 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
34e77a92
RS		 3277 return FALSE;
3278 htab->root.irelplt = s;
3279 }
3280
3281 if (htab->root.igotplt == NULL)
3282 {
3d4d4302 3283 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
34e77a92
RS		 3284 if (s == NULL
3285 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3286 return FALSE;
3287 htab->root.igotplt = s;
3288 }
3289 return TRUE;
3290}
3291
00a97672
RS		 3292/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3293 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3294 hash table. */
3295
3296static bfd_boolean
57e8b36a 3297elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3298{
3299 struct elf32_arm_link_hash_table *htab;
3300
3301 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3302 if (htab == NULL)
3303 return FALSE;
3304
362d30a1 3305 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3306 return FALSE;
3307
3308 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3309 return FALSE;
3310
3d4d4302 3311 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
5e681ec4 3312 if (!info->shared)
3d4d4302
AM		 3313 htab->srelbss = bfd_get_linker_section (dynobj,
3314 RELOC_SECTION (htab, ".bss"));
00a97672
RS		 3315
3316 if (htab->vxworks_p)
3317 {
3318 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3319 return FALSE;
3320
3321 if (info->shared)
3322 {
3323 htab->plt_header_size = 0;
3324 htab->plt_entry_size
3325 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3326 }
3327 else
3328 {
3329 htab->plt_header_size
3330 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3331 htab->plt_entry_size
3332 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3333 }
3334 }
5e681ec4 3335
362d30a1
RS		 3336 if (!htab->root.splt
3337 || !htab->root.srelplt
e5a52504 3338 || !htab->sdynbss
5e681ec4
PB		 3339 || (!info->shared && !htab->srelbss))
3340 abort ();
3341
3342 return TRUE;
3343}
3344
906e58ca
NC		 3345/* Copy the extra info we tack onto an elf_link_hash_entry. */
3346
3347static void
3348elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3349 struct elf_link_hash_entry *dir,
3350 struct elf_link_hash_entry *ind)
3351{
3352 struct elf32_arm_link_hash_entry *edir, *eind;
3353
3354 edir = (struct elf32_arm_link_hash_entry *) dir;
3355 eind = (struct elf32_arm_link_hash_entry *) ind;
3356
0bdcacaf 3357 if (eind->dyn_relocs != NULL)
906e58ca 3358 {
0bdcacaf 3359 if (edir->dyn_relocs != NULL)
906e58ca 3360 {
0bdcacaf
RS		 3361 struct elf_dyn_relocs **pp;
3362 struct elf_dyn_relocs *p;
906e58ca
NC		 3363
3364 /* Add reloc counts against the indirect sym to the direct sym
3365 list. Merge any entries against the same section. */
0bdcacaf 3366 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3367 {
0bdcacaf 3368 struct elf_dyn_relocs *q;
906e58ca 3369
0bdcacaf
RS		 3370 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3371 if (q->sec == p->sec)
906e58ca
NC		 3372 {
3373 q->pc_count += p->pc_count;
3374 q->count += p->count;
3375 *pp = p->next;
3376 break;
3377 }
3378 if (q == NULL)
3379 pp = &p->next;
3380 }
0bdcacaf 3381 *pp = edir->dyn_relocs;
906e58ca
NC		 3382 }
3383
0bdcacaf
RS		 3384 edir->dyn_relocs = eind->dyn_relocs;
3385 eind->dyn_relocs = NULL;
906e58ca
NC		 3386 }
3387
3388 if (ind->root.type == bfd_link_hash_indirect)
3389 {
3390 /* Copy over PLT info. */
34e77a92
RS		 3391 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3392 eind->plt.thumb_refcount = 0;
3393 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3394 eind->plt.maybe_thumb_refcount = 0;
3395 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3396 eind->plt.noncall_refcount = 0;
3397
3398 /* We should only allocate a function to .iplt once the final
3399 symbol information is known. */
3400 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3401
3402 if (dir->got.refcount <= 0)
3403 {
3404 edir->tls_type = eind->tls_type;
3405 eind->tls_type = GOT_UNKNOWN;
3406 }
3407 }
3408
3409 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3410}
3411
3412/* Create an ARM elf linker hash table. */
3413
3414static struct bfd_link_hash_table *
3415elf32_arm_link_hash_table_create (bfd *abfd)
3416{
3417 struct elf32_arm_link_hash_table *ret;
3418 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3419
21d799b5 3420 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 3421 if (ret == NULL)
3422 return NULL;
3423
3424 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3425 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3426 sizeof (struct elf32_arm_link_hash_entry),
3427 ARM_ELF_DATA))
906e58ca
NC		 3428 {
3429 free (ret);
3430 return NULL;
3431 }
3432
906e58ca
NC		 3433 ret->sdynbss = NULL;
3434 ret->srelbss = NULL;
3435 ret->srelplt2 = NULL;
0855e32b
NS		 3436 ret->dt_tlsdesc_plt = 0;
3437 ret->dt_tlsdesc_got = 0;
3438 ret->tls_trampoline = 0;
3439 ret->next_tls_desc_index = 0;
3440 ret->num_tls_desc = 0;
906e58ca
NC		 3441 ret->thumb_glue_size = 0;
3442 ret->arm_glue_size = 0;
3443 ret->bx_glue_size = 0;
3444 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3445 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3446 ret->vfp11_erratum_glue_size = 0;
3447 ret->num_vfp11_fixes = 0;
48229727 3448 ret->fix_cortex_a8 = 0;
2de70689 3449 ret->fix_arm1176 = 0;
906e58ca
NC		 3450 ret->bfd_of_glue_owner = NULL;
3451 ret->byteswap_code = 0;
3452 ret->target1_is_rel = 0;
3453 ret->target2_reloc = R_ARM_NONE;
3454#ifdef FOUR_WORD_PLT
3455 ret->plt_header_size = 16;
3456 ret->plt_entry_size = 16;
3457#else
3458 ret->plt_header_size = 20;
3459 ret->plt_entry_size = 12;
3460#endif
3461 ret->fix_v4bx = 0;
3462 ret->use_blx = 0;
3463 ret->vxworks_p = 0;
3464 ret->symbian_p = 0;
b38cadfb 3465 ret->nacl_p = 0;
906e58ca 3466 ret->use_rel = 1;
87d72d41 3467 ret->sym_cache.abfd = NULL;
906e58ca
NC		 3468 ret->obfd = abfd;
3469 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 3470 ret->stub_bfd = NULL;
3471 ret->add_stub_section = NULL;
3472 ret->layout_sections_again = NULL;
3473 ret->stub_group = NULL;
fe33d2fa 3474 ret->top_id = 0;
6cee0a6f
L		 3475 ret->bfd_count = 0;
3476 ret->top_index = 0;
3477 ret->input_list = NULL;
906e58ca
NC		 3478
3479 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3480 sizeof (struct elf32_arm_stub_hash_entry)))
3481 {
3482 free (ret);
3483 return NULL;
3484 }
3485
3486 return &ret->root.root;
3487}
3488
3489/* Free the derived linker hash table. */
3490
3491static void
3492elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3493{
3494 struct elf32_arm_link_hash_table *ret
3495 = (struct elf32_arm_link_hash_table *) hash;
3496
3497 bfd_hash_table_free (&ret->stub_hash_table);
3498 _bfd_generic_link_hash_table_free (hash);
3499}
3500
3501/* Determine if we're dealing with a Thumb only architecture. */
3502
3503static bfd_boolean
3504using_thumb_only (struct elf32_arm_link_hash_table *globals)
3505{
3506 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3507 Tag_CPU_arch);
3508 int profile;
3509
41ed1ee7
DJ		 3510 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3511 return TRUE;
3512
9e3c6df6 3513 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3514 return FALSE;
3515
3516 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3517 Tag_CPU_arch_profile);
3518
3519 return profile == 'M';
3520}
3521
3522/* Determine if we're dealing with a Thumb-2 object. */
3523
3524static bfd_boolean
3525using_thumb2 (struct elf32_arm_link_hash_table *globals)
3526{
3527 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3528 Tag_CPU_arch);
3529 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3530}
3531
cd1dac3d
DG		 3532/* Determine what kind of NOPs are available. */
3533
3534static bfd_boolean
3535arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3536{
3537 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3538 Tag_CPU_arch);
3539 return arch == TAG_CPU_ARCH_V6T2
3540 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3541 || arch == TAG_CPU_ARCH_V7
3542 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3543}
3544
3545static bfd_boolean
3546arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3547{
3548 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3549 Tag_CPU_arch);
9e3c6df6
PB		 3550 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3551 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3552}
3553
f4ac8484
DJ		 3554static bfd_boolean
3555arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3556{
3557 switch (stub_type)
3558 {
fea2b4d6
CL		 3559 case arm_stub_long_branch_thumb_only:
3560 case arm_stub_long_branch_v4t_thumb_arm:
3561 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3562 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3563 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3564 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3565 return TRUE;
3566 case arm_stub_none:
3567 BFD_FAIL ();
3568 return FALSE;
3569 break;
3570 default:
3571 return FALSE;
3572 }
3573}
3574
906e58ca
NC		 3575/* Determine the type of stub needed, if any, for a call. */
3576
3577static enum elf32_arm_stub_type
3578arm_type_of_stub (struct bfd_link_info *info,
3579 asection *input_sec,
3580 const Elf_Internal_Rela *rel,
34e77a92 3581 unsigned char st_type,
35fc36a8 3582 enum arm_st_branch_type *actual_branch_type,
906e58ca 3583 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3584 bfd_vma destination,
3585 asection *sym_sec,
3586 bfd *input_bfd,
3587 const char *name)
906e58ca
NC		 3588{
3589 bfd_vma location;
3590 bfd_signed_vma branch_offset;
3591 unsigned int r_type;
3592 struct elf32_arm_link_hash_table * globals;
3593 int thumb2;
3594 int thumb_only;
3595 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3596 int use_plt = 0;
35fc36a8 3597 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3598 union gotplt_union *root_plt;
3599 struct arm_plt_info *arm_plt;
906e58ca 3600
35fc36a8 3601 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3602 return stub_type;
3603
906e58ca 3604 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3605 if (globals == NULL)
3606 return stub_type;
906e58ca
NC		 3607
3608 thumb_only = using_thumb_only (globals);
3609
3610 thumb2 = using_thumb2 (globals);
3611
3612 /* Determine where the call point is. */
3613 location = (input_sec->output_offset
3614 + input_sec->output_section->vma
3615 + rel->r_offset);
3616
906e58ca
NC		 3617 r_type = ELF32_R_TYPE (rel->r_info);
3618
34e77a92
RS		 3619 /* For TLS call relocs, it is the caller's responsibility to provide
3620 the address of the appropriate trampoline. */
3621 if (r_type != R_ARM_TLS_CALL
3622 && r_type != R_ARM_THM_TLS_CALL
3623 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3624 &root_plt, &arm_plt)
3625 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3626 {
34e77a92 3627 asection *splt;
fe33d2fa 3628
34e77a92
RS		 3629 if (hash == NULL || hash->is_iplt)
3630 splt = globals->root.iplt;
3631 else
3632 splt = globals->root.splt;
3633 if (splt != NULL)
b38cadfb 3634 {
34e77a92
RS		 3635 use_plt = 1;
3636
3637 /* Note when dealing with PLT entries: the main PLT stub is in
3638 ARM mode, so if the branch is in Thumb mode, another
3639 Thumb->ARM stub will be inserted later just before the ARM
3640 PLT stub. We don't take this extra distance into account
3641 here, because if a long branch stub is needed, we'll add a
3642 Thumb->Arm one and branch directly to the ARM PLT entry
3643 because it avoids spreading offset corrections in several
3644 places. */
3645
3646 destination = (splt->output_section->vma
3647 + splt->output_offset
3648 + root_plt->offset);
3649 st_type = STT_FUNC;
3650 branch_type = ST_BRANCH_TO_ARM;
3651 }
5fa9e92f 3652 }
34e77a92
RS		 3653 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3654 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3655
fe33d2fa
CL		 3656 branch_offset = (bfd_signed_vma)(destination - location);
3657
0855e32b
NS		 3658 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3659 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3660 {
5fa9e92f
CL		 3661 /* Handle cases where:
3662 - this call goes too far (different Thumb/Thumb2 max
3663 distance)
155d87d7
CL		 3664 - it's a Thumb->Arm call and blx is not available, or it's a
3665 Thumb->Arm branch (not bl). A stub is needed in this case,
3666 but only if this call is not through a PLT entry. Indeed,
3667 PLT stubs handle mode switching already.
5fa9e92f 3668 */
906e58ca
NC		 3669 if ((!thumb2
3670 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3671 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3672 || (thumb2
3673 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3674 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3675 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3676 && (((r_type == R_ARM_THM_CALL
3677 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3678 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3679 && !use_plt))
906e58ca 3680 {
35fc36a8 3681 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3682 {
3683 /* Thumb to thumb. */
3684 if (!thumb_only)
3685 {
3686 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3687 /* PIC stubs. */
155d87d7 3688 ? ((globals->use_blx
9553db3c 3689 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3690 /* V5T and above. Stub starts with ARM code, so
3691 we must be able to switch mode before
3692 reaching it, which is only possible for 'bl'
3693 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3694 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3695 /* On V4T, use Thumb code only. */
d3626fb0 3696 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3697
3698 /* non-PIC stubs. */
155d87d7 3699 : ((globals->use_blx
9553db3c 3700 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3701 /* V5T and above. */
3702 ? arm_stub_long_branch_any_any
3703 /* V4T. */
d3626fb0 3704 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3705 }
3706 else
3707 {
3708 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3709 /* PIC stub. */
3710 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3711 /* non-PIC stub. */
3712 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3713 }
3714 }
3715 else
3716 {
3717 /* Thumb to arm. */
c820be07
NC		 3718 if (sym_sec != NULL
3719 && sym_sec->owner != NULL
3720 && !INTERWORK_FLAG (sym_sec->owner))
3721 {
3722 (*_bfd_error_handler)
3723 (_("%B(%s): warning: interworking not enabled.\n"
3724 " first occurrence: %B: Thumb call to ARM"),
3725 sym_sec->owner, input_bfd, name);
3726 }
3727
0855e32b
NS		 3728 stub_type =
3729 (info->shared | globals->pic_veneer)
c2b4a39d 3730 /* PIC stubs. */
0855e32b
NS		 3731 ? (r_type == R_ARM_THM_TLS_CALL
3732 /* TLS PIC stubs */
3733 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3734 : arm_stub_long_branch_v4t_thumb_tls_pic)
3735 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3736 /* V5T PIC and above. */
3737 ? arm_stub_long_branch_any_arm_pic
3738 /* V4T PIC stub. */
3739 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3740
3741 /* non-PIC stubs. */
0855e32b 3742 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3743 /* V5T and above. */
3744 ? arm_stub_long_branch_any_any
3745 /* V4T. */
3746 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3747
3748 /* Handle v4t short branches. */
fea2b4d6 3749 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3750 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3751 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3752 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3753 }
3754 }
3755 }
fe33d2fa
CL		 3756 else if (r_type == R_ARM_CALL
3757 || r_type == R_ARM_JUMP24
0855e32b
NS		 3758 || r_type == R_ARM_PLT32
3759 || r_type == R_ARM_TLS_CALL)
906e58ca 3760 {
35fc36a8 3761 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3762 {
3763 /* Arm to thumb. */
c820be07
NC		 3764
3765 if (sym_sec != NULL
3766 && sym_sec->owner != NULL
3767 && !INTERWORK_FLAG (sym_sec->owner))
3768 {
3769 (*_bfd_error_handler)
3770 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3771 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3772 sym_sec->owner, input_bfd, name);
3773 }
3774
3775 /* We have an extra 2-bytes reach because of
3776 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3777 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3778 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3779 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3780 || (r_type == R_ARM_JUMP24)
3781 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3782 {
3783 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3784 /* PIC stubs. */
ebe24dd4
CL		 3785 ? ((globals->use_blx)
3786 /* V5T and above. */
3787 ? arm_stub_long_branch_any_thumb_pic
3788 /* V4T stub. */
3789 : arm_stub_long_branch_v4t_arm_thumb_pic)
3790
c2b4a39d
CL		 3791 /* non-PIC stubs. */
3792 : ((globals->use_blx)
3793 /* V5T and above. */
3794 ? arm_stub_long_branch_any_any
3795 /* V4T. */
3796 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3797 }
3798 }
3799 else
3800 {
3801 /* Arm to arm. */
3802 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3803 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3804 {
0855e32b
NS		 3805 stub_type =
3806 (info->shared | globals->pic_veneer)
c2b4a39d 3807 /* PIC stubs. */
0855e32b
NS		 3808 ? (r_type == R_ARM_TLS_CALL
3809 /* TLS PIC Stub */
3810 ? arm_stub_long_branch_any_tls_pic
3811 : arm_stub_long_branch_any_arm_pic)
c2b4a39d 3812 /* non-PIC stubs. */
fea2b4d6 3813 : arm_stub_long_branch_any_any;
906e58ca
NC		 3814 }
3815 }
3816 }
3817
fe33d2fa
CL		 3818 /* If a stub is needed, record the actual destination type. */
3819 if (stub_type != arm_stub_none)
35fc36a8 3820 *actual_branch_type = branch_type;
fe33d2fa 3821
906e58ca
NC		 3822 return stub_type;
3823}
3824
3825/* Build a name for an entry in the stub hash table. */
3826
3827static char *
3828elf32_arm_stub_name (const asection *input_section,
3829 const asection *sym_sec,
3830 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3831 const Elf_Internal_Rela *rel,
3832 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3833{
3834 char *stub_name;
3835 bfd_size_type len;
3836
3837 if (hash)
3838 {
fe33d2fa 3839 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3840 stub_name = (char *) bfd_malloc (len);
906e58ca 3841 if (stub_name != NULL)
fe33d2fa 3842 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3843 input_section->id & 0xffffffff,
3844 hash->root.root.root.string,
fe33d2fa
CL		 3845 (int) rel->r_addend & 0xffffffff,
3846 (int) stub_type);
906e58ca
NC		 3847 }
3848 else
3849 {
fe33d2fa 3850 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3851 stub_name = (char *) bfd_malloc (len);
906e58ca 3852 if (stub_name != NULL)
fe33d2fa 3853 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3854 input_section->id & 0xffffffff,
3855 sym_sec->id & 0xffffffff,
0855e32b
NS		 3856 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3857 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3858 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3859 (int) rel->r_addend & 0xffffffff,
3860 (int) stub_type);
906e58ca
NC		 3861 }
3862
3863 return stub_name;
3864}
3865
3866/* Look up an entry in the stub hash. Stub entries are cached because
3867 creating the stub name takes a bit of time. */
3868
3869static struct elf32_arm_stub_hash_entry *
3870elf32_arm_get_stub_entry (const asection *input_section,
3871 const asection *sym_sec,
3872 struct elf_link_hash_entry *hash,
3873 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3874 struct elf32_arm_link_hash_table *htab,
3875 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3876{
3877 struct elf32_arm_stub_hash_entry *stub_entry;
3878 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3879 const asection *id_sec;
3880
3881 if ((input_section->flags & SEC_CODE) == 0)
3882 return NULL;
3883
3884 /* If this input section is part of a group of sections sharing one
3885 stub section, then use the id of the first section in the group.
3886 Stub names need to include a section id, as there may well be
3887 more than one stub used to reach say, printf, and we need to
3888 distinguish between them. */
3889 id_sec = htab->stub_group[input_section->id].link_sec;
3890
3891 if (h != NULL && h->stub_cache != NULL
3892 && h->stub_cache->h == h
fe33d2fa
CL		 3893 && h->stub_cache->id_sec == id_sec
3894 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3895 {
3896 stub_entry = h->stub_cache;
3897 }
3898 else
3899 {
3900 char *stub_name;
3901
fe33d2fa 3902 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3903 if (stub_name == NULL)
3904 return NULL;
3905
3906 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3907 stub_name, FALSE, FALSE);
3908 if (h != NULL)
3909 h->stub_cache = stub_entry;
3910
3911 free (stub_name);
3912 }
3913
3914 return stub_entry;
3915}
3916
48229727 3917/* Find or create a stub section. Returns a pointer to the stub section, and
b38cadfb 3918 the section to which the stub section will be attached (in *LINK_SEC_P).
48229727 3919 LINK_SEC_P may be NULL. */
906e58ca 3920
48229727
JB		 3921static asection *
3922elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3923 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3924{
3925 asection *link_sec;
3926 asection *stub_sec;
906e58ca
NC		 3927
3928 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3929 BFD_ASSERT (link_sec != NULL);
906e58ca 3930 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3931
906e58ca
NC		 3932 if (stub_sec == NULL)
3933 {
3934 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3935 if (stub_sec == NULL)
3936 {
3937 size_t namelen;
3938 bfd_size_type len;
3939 char *s_name;
3940
3941 namelen = strlen (link_sec->name);
3942 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3943 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3944 if (s_name == NULL)
3945 return NULL;
3946
3947 memcpy (s_name, link_sec->name, namelen);
3948 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3949 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3950 if (stub_sec == NULL)
3951 return NULL;
3952 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3953 }
3954 htab->stub_group[section->id].stub_sec = stub_sec;
3955 }
b38cadfb 3956
48229727
JB		 3957 if (link_sec_p)
3958 *link_sec_p = link_sec;
b38cadfb 3959
48229727
JB		 3960 return stub_sec;
3961}
3962
3963/* Add a new stub entry to the stub hash. Not all fields of the new
3964 stub entry are initialised. */
3965
3966static struct elf32_arm_stub_hash_entry *
3967elf32_arm_add_stub (const char *stub_name,
3968 asection *section,
3969 struct elf32_arm_link_hash_table *htab)
3970{
3971 asection *link_sec;
3972 asection *stub_sec;
3973 struct elf32_arm_stub_hash_entry *stub_entry;
3974
3975 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3976 if (stub_sec == NULL)
3977 return NULL;
906e58ca
NC		 3978
3979 /* Enter this entry into the linker stub hash table. */
3980 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3981 TRUE, FALSE);
3982 if (stub_entry == NULL)
3983 {
3984 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3985 section->owner,
3986 stub_name);
3987 return NULL;
3988 }
3989
3990 stub_entry->stub_sec = stub_sec;
3991 stub_entry->stub_offset = 0;
3992 stub_entry->id_sec = link_sec;
3993
906e58ca
NC		 3994 return stub_entry;
3995}
3996
3997/* Store an Arm insn into an output section not processed by
3998 elf32_arm_write_section. */
3999
4000static void
8029a119
NC		 4001put_arm_insn (struct elf32_arm_link_hash_table * htab,
4002 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4003{
4004 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4005 bfd_putl32 (val, ptr);
4006 else
4007 bfd_putb32 (val, ptr);
4008}
4009
4010/* Store a 16-bit Thumb insn into an output section not processed by
4011 elf32_arm_write_section. */
4012
4013static void
8029a119
NC		 4014put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4015 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4016{
4017 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4018 bfd_putl16 (val, ptr);
4019 else
4020 bfd_putb16 (val, ptr);
4021}
4022
0855e32b
NS		 4023/* If it's possible to change R_TYPE to a more efficient access
4024 model, return the new reloc type. */
4025
4026static unsigned
b38cadfb 4027elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
0855e32b
NS		 4028 struct elf_link_hash_entry *h)
4029{
4030 int is_local = (h == NULL);
4031
4032 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4033 return r_type;
4034
b38cadfb 4035 /* We do not support relaxations for Old TLS models. */
0855e32b
NS		 4036 switch (r_type)
4037 {
4038 case R_ARM_TLS_GOTDESC:
4039 case R_ARM_TLS_CALL:
4040 case R_ARM_THM_TLS_CALL:
4041 case R_ARM_TLS_DESCSEQ:
4042 case R_ARM_THM_TLS_DESCSEQ:
4043 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4044 }
4045
4046 return r_type;
4047}
4048
48229727
JB		 4049static bfd_reloc_status_type elf32_arm_final_link_relocate
4050 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4051 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 4052 const char *, unsigned char, enum arm_st_branch_type,
4053 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 4054
4563a860
JB		 4055static unsigned int
4056arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4057{
4058 switch (stub_type)
4059 {
4060 case arm_stub_a8_veneer_b_cond:
4061 case arm_stub_a8_veneer_b:
4062 case arm_stub_a8_veneer_bl:
4063 return 2;
4064
4065 case arm_stub_long_branch_any_any:
4066 case arm_stub_long_branch_v4t_arm_thumb:
4067 case arm_stub_long_branch_thumb_only:
4068 case arm_stub_long_branch_v4t_thumb_thumb:
4069 case arm_stub_long_branch_v4t_thumb_arm:
4070 case arm_stub_short_branch_v4t_thumb_arm:
4071 case arm_stub_long_branch_any_arm_pic:
4072 case arm_stub_long_branch_any_thumb_pic:
4073 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4074 case arm_stub_long_branch_v4t_arm_thumb_pic:
4075 case arm_stub_long_branch_v4t_thumb_arm_pic:
4076 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 4077 case arm_stub_long_branch_any_tls_pic:
4078 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 4079 case arm_stub_a8_veneer_blx:
4080 return 4;
b38cadfb 4081
4563a860
JB		 4082 default:
4083 abort (); /* Should be unreachable. */
4084 }
4085}
4086
906e58ca
NC		 4087static bfd_boolean
4088arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4089 void * in_arg)
4090{
48229727 4091#define MAXRELOCS 2
906e58ca 4092 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 4093 struct elf32_arm_link_hash_table *globals;
906e58ca 4094 struct bfd_link_info *info;
906e58ca
NC		 4095 asection *stub_sec;
4096 bfd *stub_bfd;
906e58ca
NC		 4097 bfd_byte *loc;
4098 bfd_vma sym_value;
4099 int template_size;
4100 int size;
d3ce72d0 4101 const insn_sequence *template_sequence;
906e58ca 4102 int i;
48229727
JB		 4103 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4104 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4105 int nrelocs = 0;
906e58ca
NC		 4106
4107 /* Massage our args to the form they really have. */
4108 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4109 info = (struct bfd_link_info *) in_arg;
4110
4111 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4112 if (globals == NULL)
4113 return FALSE;
906e58ca 4114
906e58ca
NC		 4115 stub_sec = stub_entry->stub_sec;
4116
4dfe6ac6 4117 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4118 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4119 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4120 return TRUE;
fe33d2fa 4121
906e58ca
NC		 4122 /* Make a note of the offset within the stubs for this entry. */
4123 stub_entry->stub_offset = stub_sec->size;
4124 loc = stub_sec->contents + stub_entry->stub_offset;
4125
4126 stub_bfd = stub_sec->owner;
4127
906e58ca
NC		 4128 /* This is the address of the stub destination. */
4129 sym_value = (stub_entry->target_value
4130 + stub_entry->target_section->output_offset
4131 + stub_entry->target_section->output_section->vma);
4132
d3ce72d0 4133 template_sequence = stub_entry->stub_template;
461a49ca 4134 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4135
4136 size = 0;
461a49ca 4137 for (i = 0; i < template_size; i++)
906e58ca 4138 {
d3ce72d0 4139 switch (template_sequence[i].type)
461a49ca
DJ		 4140 {
4141 case THUMB16_TYPE:
48229727 4142 {
d3ce72d0
NC		 4143 bfd_vma data = (bfd_vma) template_sequence[i].data;
4144 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 4145 {
4146 /* We've borrowed the reloc_addend field to mean we should
4147 insert a condition code into this (Thumb-1 branch)
4148 instruction. See THUMB16_BCOND_INSN. */
4149 BFD_ASSERT ((data & 0xff00) == 0xd000);
4150 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4151 }
fe33d2fa 4152 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4153 size += 2;
4154 }
461a49ca 4155 break;
906e58ca 4156
48229727 4157 case THUMB32_TYPE:
fe33d2fa
CL		 4158 bfd_put_16 (stub_bfd,
4159 (template_sequence[i].data >> 16) & 0xffff,
4160 loc + size);
4161 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4162 loc + size + 2);
d3ce72d0 4163 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 4164 {
4165 stub_reloc_idx[nrelocs] = i;
4166 stub_reloc_offset[nrelocs++] = size;
4167 }
4168 size += 4;
4169 break;
4170
461a49ca 4171 case ARM_TYPE:
fe33d2fa
CL		 4172 bfd_put_32 (stub_bfd, template_sequence[i].data,
4173 loc + size);
461a49ca
DJ		 4174 /* Handle cases where the target is encoded within the
4175 instruction. */
d3ce72d0 4176 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4177 {
48229727
JB		 4178 stub_reloc_idx[nrelocs] = i;
4179 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4180 }
4181 size += 4;
4182 break;
4183
4184 case DATA_TYPE:
d3ce72d0 4185 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4186 stub_reloc_idx[nrelocs] = i;
4187 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4188 size += 4;
4189 break;
4190
4191 default:
4192 BFD_FAIL ();
4193 return FALSE;
4194 }
906e58ca 4195 }
461a49ca 4196
906e58ca
NC		 4197 stub_sec->size += size;
4198
461a49ca
DJ		 4199 /* Stub size has already been computed in arm_size_one_stub. Check
4200 consistency. */
4201 BFD_ASSERT (size == stub_entry->stub_size);
4202
906e58ca 4203 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4204 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4205 sym_value |= 1;
4206
48229727
JB		 4207 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4208 in each stub. */
4209 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4210
48229727 4211 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4212 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4213 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4214 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4215 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4216 {
4217 Elf_Internal_Rela rel;
4218 bfd_boolean unresolved_reloc;
4219 char *error_message;
35fc36a8
RS		 4220 enum arm_st_branch_type branch_type
4221 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4222 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4223 bfd_vma points_to = sym_value + stub_entry->target_addend;
4224
4225 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 4226 rel.r_info = ELF32_R_INFO (0,
4227 template_sequence[stub_reloc_idx[i]].r_type);
4228 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4229
4230 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4231 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4232 template should refer back to the instruction after the original
4233 branch. */
4234 points_to = sym_value;
4235
33c6a8fc
JB		 4236 /* There may be unintended consequences if this is not true. */
4237 BFD_ASSERT (stub_entry->h == NULL);
4238
48229727
JB		 4239 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4240 properly. We should probably use this function unconditionally,
4241 rather than only for certain relocations listed in the enclosing
4242 conditional, for the sake of consistency. */
4243 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4244 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4245 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4246 points_to, info, stub_entry->target_section, "", STT_FUNC,
4247 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4248 &unresolved_reloc, &error_message);
48229727
JB		 4249 }
4250 else
4251 {
fe33d2fa
CL		 4252 Elf_Internal_Rela rel;
4253 bfd_boolean unresolved_reloc;
4254 char *error_message;
4255 bfd_vma points_to = sym_value + stub_entry->target_addend
4256 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4257
4258 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4259 rel.r_info = ELF32_R_INFO (0,
4260 template_sequence[stub_reloc_idx[i]].r_type);
4261 rel.r_addend = 0;
4262
4263 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4264 (template_sequence[stub_reloc_idx[i]].r_type),
4265 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4266 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4267 stub_entry->branch_type,
fe33d2fa
CL		 4268 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4269 &error_message);
48229727 4270 }
906e58ca
NC		 4271
4272 return TRUE;
48229727 4273#undef MAXRELOCS
906e58ca
NC		 4274}
4275
48229727
JB		 4276/* Calculate the template, template size and instruction size for a stub.
4277 Return value is the instruction size. */
906e58ca 4278
48229727
JB		 4279static unsigned int
4280find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4281 const insn_sequence **stub_template,
4282 int *stub_template_size)
906e58ca 4283{
d3ce72d0 4284 const insn_sequence *template_sequence = NULL;
48229727
JB		 4285 int template_size = 0, i;
4286 unsigned int size;
906e58ca 4287
d3ce72d0 4288 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4289 if (stub_template)
4290 *stub_template = template_sequence;
4291
48229727 4292 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4293 if (stub_template_size)
4294 *stub_template_size = template_size;
906e58ca
NC		 4295
4296 size = 0;
461a49ca
DJ		 4297 for (i = 0; i < template_size; i++)
4298 {
d3ce72d0 4299 switch (template_sequence[i].type)
461a49ca
DJ		 4300 {
4301 case THUMB16_TYPE:
4302 size += 2;
4303 break;
4304
4305 case ARM_TYPE:
48229727 4306 case THUMB32_TYPE:
461a49ca
DJ		 4307 case DATA_TYPE:
4308 size += 4;
4309 break;
4310
4311 default:
4312 BFD_FAIL ();
2a229407 4313 return 0;
461a49ca
DJ		 4314 }
4315 }
4316
48229727
JB		 4317 return size;
4318}
4319
4320/* As above, but don't actually build the stub. Just bump offset so
4321 we know stub section sizes. */
4322
4323static bfd_boolean
4324arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4325 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4326{
4327 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4328 const insn_sequence *template_sequence;
48229727
JB		 4329 int template_size, size;
4330
4331 /* Massage our args to the form they really have. */
4332 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4333
4334 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4335 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4336
d3ce72d0 4337 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4338 &template_size);
4339
461a49ca 4340 stub_entry->stub_size = size;
d3ce72d0 4341 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4342 stub_entry->stub_template_size = template_size;
4343
906e58ca
NC		 4344 size = (size + 7) & ~7;
4345 stub_entry->stub_sec->size += size;
461a49ca 4346
906e58ca
NC		 4347 return TRUE;
4348}
4349
4350/* External entry points for sizing and building linker stubs. */
4351
4352/* Set up various things so that we can make a list of input sections
4353 for each output section included in the link. Returns -1 on error,
4354 0 when no stubs will be needed, and 1 on success. */
4355
4356int
4357elf32_arm_setup_section_lists (bfd *output_bfd,
4358 struct bfd_link_info *info)
4359{
4360 bfd *input_bfd;
4361 unsigned int bfd_count;
4362 int top_id, top_index;
4363 asection *section;
4364 asection **input_list, **list;
4365 bfd_size_type amt;
4366 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4367
4dfe6ac6
NC		 4368 if (htab == NULL)
4369 return 0;
906e58ca
NC		 4370 if (! is_elf_hash_table (htab))
4371 return 0;
4372
4373 /* Count the number of input BFDs and find the top input section id. */
4374 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4375 input_bfd != NULL;
4376 input_bfd = input_bfd->link_next)
4377 {
4378 bfd_count += 1;
4379 for (section = input_bfd->sections;
4380 section != NULL;
4381 section = section->next)
4382 {
4383 if (top_id < section->id)
4384 top_id = section->id;
4385 }
4386 }
4387 htab->bfd_count = bfd_count;
4388
4389 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4390 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4391 if (htab->stub_group == NULL)
4392 return -1;
fe33d2fa 4393 htab->top_id = top_id;
906e58ca
NC		 4394
4395 /* We can't use output_bfd->section_count here to find the top output
4396 section index as some sections may have been removed, and
4397 _bfd_strip_section_from_output doesn't renumber the indices. */
4398 for (section = output_bfd->sections, top_index = 0;
4399 section != NULL;
4400 section = section->next)
4401 {
4402 if (top_index < section->index)
4403 top_index = section->index;
4404 }
4405
4406 htab->top_index = top_index;
4407 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4408 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4409 htab->input_list = input_list;
4410 if (input_list == NULL)
4411 return -1;
4412
4413 /* For sections we aren't interested in, mark their entries with a
4414 value we can check later. */
4415 list = input_list + top_index;
4416 do
4417 *list = bfd_abs_section_ptr;
4418 while (list-- != input_list);
4419
4420 for (section = output_bfd->sections;
4421 section != NULL;
4422 section = section->next)
4423 {
4424 if ((section->flags & SEC_CODE) != 0)
4425 input_list[section->index] = NULL;
4426 }
4427
4428 return 1;
4429}
4430
4431/* The linker repeatedly calls this function for each input section,
4432 in the order that input sections are linked into output sections.
4433 Build lists of input sections to determine groupings between which
4434 we may insert linker stubs. */
4435
4436void
4437elf32_arm_next_input_section (struct bfd_link_info *info,
4438 asection *isec)
4439{
4440 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4441
4dfe6ac6
NC		 4442 if (htab == NULL)
4443 return;
4444
906e58ca
NC		 4445 if (isec->output_section->index <= htab->top_index)
4446 {
4447 asection **list = htab->input_list + isec->output_section->index;
4448
a7470592 4449 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4450 {
4451 /* Steal the link_sec pointer for our list. */
4452#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4453 /* This happens to make the list in reverse order,
07d72278 4454 which we reverse later. */
906e58ca
NC		 4455 PREV_SEC (isec) = *list;
4456 *list = isec;
4457 }
4458 }
4459}
4460
4461/* See whether we can group stub sections together. Grouping stub
4462 sections may result in fewer stubs. More importantly, we need to
07d72278 4463 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4464 .fini output sections respectively, because glibc splits the
4465 _init and _fini functions into multiple parts. Putting a stub in
4466 the middle of a function is not a good idea. */
4467
4468static void
4469group_sections (struct elf32_arm_link_hash_table *htab,
4470 bfd_size_type stub_group_size,
07d72278 4471 bfd_boolean stubs_always_after_branch)
906e58ca 4472{
07d72278 4473 asection **list = htab->input_list;
906e58ca
NC		 4474
4475 do
4476 {
4477 asection *tail = *list;
07d72278 4478 asection *head;
906e58ca
NC		 4479
4480 if (tail == bfd_abs_section_ptr)
4481 continue;
4482
07d72278
DJ		 4483 /* Reverse the list: we must avoid placing stubs at the
4484 beginning of the section because the beginning of the text
4485 section may be required for an interrupt vector in bare metal
4486 code. */
4487#define NEXT_SEC PREV_SEC
e780aef2
CL		 4488 head = NULL;
4489 while (tail != NULL)
4490 {
4491 /* Pop from tail. */
4492 asection *item = tail;
4493 tail = PREV_SEC (item);
4494
4495 /* Push on head. */
4496 NEXT_SEC (item) = head;
4497 head = item;
4498 }
07d72278
DJ		 4499
4500 while (head != NULL)
906e58ca
NC		 4501 {
4502 asection *curr;
07d72278 4503 asection *next;
e780aef2
CL		 4504 bfd_vma stub_group_start = head->output_offset;
4505 bfd_vma end_of_next;
906e58ca 4506
07d72278 4507 curr = head;
e780aef2 4508 while (NEXT_SEC (curr) != NULL)
8cd931b7 4509 {
e780aef2
CL		 4510 next = NEXT_SEC (curr);
4511 end_of_next = next->output_offset + next->size;
4512 if (end_of_next - stub_group_start >= stub_group_size)
4513 /* End of NEXT is too far from start, so stop. */
8cd931b7 4514 break;
e780aef2
CL		 4515 /* Add NEXT to the group. */
4516 curr = next;
8cd931b7 4517 }
906e58ca 4518
07d72278 4519 /* OK, the size from the start to the start of CURR is less
906e58ca 4520 than stub_group_size and thus can be handled by one stub
07d72278 4521 section. (Or the head section is itself larger than
906e58ca
NC		 4522 stub_group_size, in which case we may be toast.)
4523 We should really be keeping track of the total size of
4524 stubs added here, as stubs contribute to the final output
7fb9f789 4525 section size. */
906e58ca
NC		 4526 do
4527 {
07d72278 4528 next = NEXT_SEC (head);
906e58ca 4529 /* Set up this stub group. */
07d72278 4530 htab->stub_group[head->id].link_sec = curr;
906e58ca 4531 }
07d72278 4532 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4533
4534 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4535 bytes after the stub section can be handled by it too. */
4536 if (!stubs_always_after_branch)
906e58ca 4537 {
e780aef2
CL		 4538 stub_group_start = curr->output_offset + curr->size;
4539
8cd931b7 4540 while (next != NULL)
906e58ca 4541 {
e780aef2
CL		 4542 end_of_next = next->output_offset + next->size;
4543 if (end_of_next - stub_group_start >= stub_group_size)
4544 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4545 break;
e780aef2 4546 /* Add NEXT to the stub group. */
07d72278
DJ		 4547 head = next;
4548 next = NEXT_SEC (head);
4549 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4550 }
4551 }
07d72278 4552 head = next;
906e58ca
NC		 4553 }
4554 }
07d72278 4555 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4556
4557 free (htab->input_list);
4558#undef PREV_SEC
07d72278 4559#undef NEXT_SEC
906e58ca
NC		 4560}
4561
48229727
JB		 4562/* Comparison function for sorting/searching relocations relating to Cortex-A8
4563 erratum fix. */
4564
4565static int
4566a8_reloc_compare (const void *a, const void *b)
4567{
21d799b5
NC		 4568 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4569 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4570
4571 if (ra->from < rb->from)
4572 return -1;
4573 else if (ra->from > rb->from)
4574 return 1;
4575 else
4576 return 0;
4577}
4578
4579static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4580 const char *, char **);
4581
4582/* Helper function to scan code for sequences which might trigger the Cortex-A8
4583 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4584 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4585 otherwise. */
4586
81694485
NC		 4587static bfd_boolean
4588cortex_a8_erratum_scan (bfd *input_bfd,
4589 struct bfd_link_info *info,
48229727
JB		 4590 struct a8_erratum_fix **a8_fixes_p,
4591 unsigned int *num_a8_fixes_p,
4592 unsigned int *a8_fix_table_size_p,
4593 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4594 unsigned int num_a8_relocs,
4595 unsigned prev_num_a8_fixes,
4596 bfd_boolean *stub_changed_p)
48229727
JB		 4597{
4598 asection *section;
4599 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4600 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4601 unsigned int num_a8_fixes = *num_a8_fixes_p;
4602 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4603
4dfe6ac6
NC		 4604 if (htab == NULL)
4605 return FALSE;
4606
48229727
JB		 4607 for (section = input_bfd->sections;
4608 section != NULL;
4609 section = section->next)
4610 {
4611 bfd_byte *contents = NULL;
4612 struct _arm_elf_section_data *sec_data;
4613 unsigned int span;
4614 bfd_vma base_vma;
4615
4616 if (elf_section_type (section) != SHT_PROGBITS
4617 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4618 || (section->flags & SEC_EXCLUDE) != 0
dbaa2011 4619 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
48229727
JB		 4620 || (section->output_section == bfd_abs_section_ptr))
4621 continue;
4622
4623 base_vma = section->output_section->vma + section->output_offset;
4624
4625 if (elf_section_data (section)->this_hdr.contents != NULL)
4626 contents = elf_section_data (section)->this_hdr.contents;
4627 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4628 return TRUE;
48229727
JB		 4629
4630 sec_data = elf32_arm_section_data (section);
4631
4632 for (span = 0; span < sec_data->mapcount; span++)
4633 {
4634 unsigned int span_start = sec_data->map[span].vma;
4635 unsigned int span_end = (span == sec_data->mapcount - 1)
4636 ? section->size : sec_data->map[span + 1].vma;
4637 unsigned int i;
4638 char span_type = sec_data->map[span].type;
4639 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4640
4641 if (span_type != 't')
4642 continue;
4643
4644 /* Span is entirely within a single 4KB region: skip scanning. */
4645 if (((base_vma + span_start) & ~0xfff)
4646 == ((base_vma + span_end) & ~0xfff))
4647 continue;
4648
4649 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4650
4651 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4652 * The branch target is in the same 4KB region as the
4653 first half of the branch.
4654 * The instruction before the branch is a 32-bit
81694485 4655 length non-branch instruction. */
48229727
JB		 4656 for (i = span_start; i < span_end;)
4657 {
4658 unsigned int insn = bfd_getl16 (&contents[i]);
4659 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4660 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4661
4662 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4663 insn_32bit = TRUE;
4664
4665 if (insn_32bit)
4666 {
4667 /* Load the rest of the insn (in manual-friendly order). */
4668 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4669
4670 /* Encoding T4: B<c>.W. */
4671 is_b = (insn & 0xf800d000) == 0xf0009000;
4672 /* Encoding T1: BL<c>.W. */
4673 is_bl = (insn & 0xf800d000) == 0xf000d000;
4674 /* Encoding T2: BLX<c>.W. */
4675 is_blx = (insn & 0xf800d000) == 0xf000c000;
4676 /* Encoding T3: B<c>.W (not permitted in IT block). */
4677 is_bcc = (insn & 0xf800d000) == 0xf0008000
4678 && (insn & 0x07f00000) != 0x03800000;
4679 }
4680
4681 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4682
81694485
NC		 4683 if (((base_vma + i) & 0xfff) == 0xffe
4684 && insn_32bit
4685 && is_32bit_branch
4686 && last_was_32bit
4687 && ! last_was_branch)
48229727 4688 {
8f73510c 4689 bfd_signed_vma offset = 0;
48229727
JB		 4690 bfd_boolean force_target_arm = FALSE;
4691 bfd_boolean force_target_thumb = FALSE;
4692 bfd_vma target;
4693 enum elf32_arm_stub_type stub_type = arm_stub_none;
4694 struct a8_erratum_reloc key, *found;
7d24e6a6 4695 bfd_boolean use_plt = FALSE;
48229727
JB		 4696
4697 key.from = base_vma + i;
21d799b5
NC		 4698 found = (struct a8_erratum_reloc *)
4699 bsearch (&key, a8_relocs, num_a8_relocs,
4700 sizeof (struct a8_erratum_reloc),
4701 &a8_reloc_compare);
48229727
JB		 4702
4703 if (found)
4704 {
4705 char *error_message = NULL;
4706 struct elf_link_hash_entry *entry;
4707
4708 /* We don't care about the error returned from this
4709 function, only if there is glue or not. */
4710 entry = find_thumb_glue (info, found->sym_name,
4711 &error_message);
4712
4713 if (entry)
4714 found->non_a8_stub = TRUE;
4715
92750f34 4716 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4717 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4718 && found->hash->root.plt.offset != (bfd_vma) -1)
4719 use_plt = TRUE;
4720
4721 if (found->r_type == R_ARM_THM_CALL)
4722 {
35fc36a8
RS		 4723 if (found->branch_type == ST_BRANCH_TO_ARM
4724 || use_plt)
92750f34
DJ		 4725 force_target_arm = TRUE;
4726 else
4727 force_target_thumb = TRUE;
4728 }
48229727
JB		 4729 }
4730
4731 /* Check if we have an offending branch instruction. */
4732
4733 if (found && found->non_a8_stub)
4734 /* We've already made a stub for this instruction, e.g.
4735 it's a long branch or a Thumb->ARM stub. Assume that
4736 stub will suffice to work around the A8 erratum (see
4737 setting of always_after_branch above). */
4738 ;
4739 else if (is_bcc)
4740 {
4741 offset = (insn & 0x7ff) << 1;
4742 offset |= (insn & 0x3f0000) >> 4;
4743 offset |= (insn & 0x2000) ? 0x40000 : 0;
4744 offset |= (insn & 0x800) ? 0x80000 : 0;
4745 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4746 if (offset & 0x100000)
81694485 4747 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4748 stub_type = arm_stub_a8_veneer_b_cond;
4749 }
4750 else if (is_b || is_bl || is_blx)
4751 {
4752 int s = (insn & 0x4000000) != 0;
4753 int j1 = (insn & 0x2000) != 0;
4754 int j2 = (insn & 0x800) != 0;
4755 int i1 = !(j1 ^ s);
4756 int i2 = !(j2 ^ s);
4757
4758 offset = (insn & 0x7ff) << 1;
4759 offset |= (insn & 0x3ff0000) >> 4;
4760 offset |= i2 << 22;
4761 offset |= i1 << 23;
4762 offset |= s << 24;
4763 if (offset & 0x1000000)
81694485 4764 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4765
4766 if (is_blx)
81694485 4767 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4768
4769 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4770 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4771 }
4772
4773 if (stub_type != arm_stub_none)
4774 {
4775 bfd_vma pc_for_insn = base_vma + i + 4;
4776
4777 /* The original instruction is a BL, but the target is
4778 an ARM instruction. If we were not making a stub,
4779 the BL would have been converted to a BLX. Use the
4780 BLX stub instead in that case. */
4781 if (htab->use_blx && force_target_arm
4782 && stub_type == arm_stub_a8_veneer_bl)
4783 {
4784 stub_type = arm_stub_a8_veneer_blx;
4785 is_blx = TRUE;
4786 is_bl = FALSE;
4787 }
4788 /* Conversely, if the original instruction was
4789 BLX but the target is Thumb mode, use the BL
4790 stub. */
4791 else if (force_target_thumb
4792 && stub_type == arm_stub_a8_veneer_blx)
4793 {
4794 stub_type = arm_stub_a8_veneer_bl;
4795 is_blx = FALSE;
4796 is_bl = TRUE;
4797 }
4798
4799 if (is_blx)
81694485 4800 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4801
4802 /* If we found a relocation, use the proper destination,
4803 not the offset in the (unrelocated) instruction.
4804 Note this is always done if we switched the stub type
4805 above. */
4806 if (found)
81694485
NC		 4807 offset =
4808 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4809
7d24e6a6
RS		 4810 /* If the stub will use a Thumb-mode branch to a
4811 PLT target, redirect it to the preceding Thumb
4812 entry point. */
4813 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4814 offset -= PLT_THUMB_STUB_SIZE;
4815
48229727
JB		 4816 target = pc_for_insn + offset;
4817
4818 /* The BLX stub is ARM-mode code. Adjust the offset to
4819 take the different PC value (+8 instead of +4) into
4820 account. */
4821 if (stub_type == arm_stub_a8_veneer_blx)
4822 offset += 4;
4823
4824 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4825 {
eb7c4339 4826 char *stub_name = NULL;
48229727
JB		 4827
4828 if (num_a8_fixes == a8_fix_table_size)
4829 {
4830 a8_fix_table_size *= 2;
21d799b5
NC		 4831 a8_fixes = (struct a8_erratum_fix *)
4832 bfd_realloc (a8_fixes,
4833 sizeof (struct a8_erratum_fix)
4834 * a8_fix_table_size);
48229727
JB		 4835 }
4836
eb7c4339
NS		 4837 if (num_a8_fixes < prev_num_a8_fixes)
4838 {
4839 /* If we're doing a subsequent scan,
4840 check if we've found the same fix as
4841 before, and try and reuse the stub
4842 name. */
4843 stub_name = a8_fixes[num_a8_fixes].stub_name;
4844 if ((a8_fixes[num_a8_fixes].section != section)
4845 || (a8_fixes[num_a8_fixes].offset != i))
4846 {
4847 free (stub_name);
4848 stub_name = NULL;
4849 *stub_changed_p = TRUE;
4850 }
4851 }
4852
4853 if (!stub_name)
4854 {
21d799b5 4855 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4856 if (stub_name != NULL)
4857 sprintf (stub_name, "%x:%x", section->id, i);
4858 }
48229727
JB		 4859
4860 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4861 a8_fixes[num_a8_fixes].section = section;
4862 a8_fixes[num_a8_fixes].offset = i;
4863 a8_fixes[num_a8_fixes].addend = offset;
4864 a8_fixes[num_a8_fixes].orig_insn = insn;
4865 a8_fixes[num_a8_fixes].stub_name = stub_name;
4866 a8_fixes[num_a8_fixes].stub_type = stub_type;
35fc36a8
RS		 4867 a8_fixes[num_a8_fixes].branch_type =
4868 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727
JB		 4869
4870 num_a8_fixes++;
4871 }
4872 }
4873 }
4874
4875 i += insn_32bit ? 4 : 2;
4876 last_was_32bit = insn_32bit;
4877 last_was_branch = is_32bit_branch;
4878 }
4879 }
4880
4881 if (elf_section_data (section)->this_hdr.contents == NULL)
4882 free (contents);
4883 }
fe33d2fa 4884
48229727
JB		 4885 *a8_fixes_p = a8_fixes;
4886 *num_a8_fixes_p = num_a8_fixes;
4887 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4888
81694485 4889 return FALSE;
48229727
JB		 4890}
4891
906e58ca
NC		 4892/* Determine and set the size of the stub section for a final link.
4893
4894 The basic idea here is to examine all the relocations looking for
4895 PC-relative calls to a target that is unreachable with a "bl"
4896 instruction. */
4897
4898bfd_boolean
4899elf32_arm_size_stubs (bfd *output_bfd,
4900 bfd *stub_bfd,
4901 struct bfd_link_info *info,
4902 bfd_signed_vma group_size,
4903 asection * (*add_stub_section) (const char *, asection *),
4904 void (*layout_sections_again) (void))
4905{
4906 bfd_size_type stub_group_size;
07d72278 4907 bfd_boolean stubs_always_after_branch;
906e58ca 4908 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4909 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4910 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4911 struct a8_erratum_reloc *a8_relocs = NULL;
4912 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4913
4dfe6ac6
NC		 4914 if (htab == NULL)
4915 return FALSE;
4916
48229727
JB		 4917 if (htab->fix_cortex_a8)
4918 {
21d799b5
NC		 4919 a8_fixes = (struct a8_erratum_fix *)
4920 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4921 a8_relocs = (struct a8_erratum_reloc *)
4922 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4923 }
906e58ca
NC		 4924
4925 /* Propagate mach to stub bfd, because it may not have been
4926 finalized when we created stub_bfd. */
4927 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4928 bfd_get_mach (output_bfd));
4929
4930 /* Stash our params away. */
4931 htab->stub_bfd = stub_bfd;
4932 htab->add_stub_section = add_stub_section;
4933 htab->layout_sections_again = layout_sections_again;
07d72278 4934 stubs_always_after_branch = group_size < 0;
48229727
JB		 4935
4936 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4937 as the first half of a 32-bit branch straddling two 4K pages. This is a
4938 crude way of enforcing that. */
4939 if (htab->fix_cortex_a8)
4940 stubs_always_after_branch = 1;
4941
906e58ca
NC		 4942 if (group_size < 0)
4943 stub_group_size = -group_size;
4944 else
4945 stub_group_size = group_size;
4946
4947 if (stub_group_size == 1)
4948 {
4949 /* Default values. */
4950 /* Thumb branch range is +-4MB has to be used as the default
4951 maximum size (a given section can contain both ARM and Thumb
4952 code, so the worst case has to be taken into account).
4953
4954 This value is 24K less than that, which allows for 2025
4955 12-byte stubs. If we exceed that, then we will fail to link.
4956 The user will have to relink with an explicit group size
4957 option. */
4958 stub_group_size = 4170000;
4959 }
4960
07d72278 4961 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4962
3ae046cc
NS		 4963 /* If we're applying the cortex A8 fix, we need to determine the
4964 program header size now, because we cannot change it later --
4965 that could alter section placements. Notice the A8 erratum fix
4966 ends up requiring the section addresses to remain unchanged
4967 modulo the page size. That's something we cannot represent
4968 inside BFD, and we don't want to force the section alignment to
4969 be the page size. */
4970 if (htab->fix_cortex_a8)
4971 (*htab->layout_sections_again) ();
4972
906e58ca
NC		 4973 while (1)
4974 {
4975 bfd *input_bfd;
4976 unsigned int bfd_indx;
4977 asection *stub_sec;
eb7c4339
NS		 4978 bfd_boolean stub_changed = FALSE;
4979 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4980
48229727 4981 num_a8_fixes = 0;
906e58ca
NC		 4982 for (input_bfd = info->input_bfds, bfd_indx = 0;
4983 input_bfd != NULL;
4984 input_bfd = input_bfd->link_next, bfd_indx++)
4985 {
4986 Elf_Internal_Shdr *symtab_hdr;
4987 asection *section;
4988 Elf_Internal_Sym *local_syms = NULL;
4989
48229727
JB		 4990 num_a8_relocs = 0;
4991
906e58ca
NC		 4992 /* We'll need the symbol table in a second. */
4993 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4994 if (symtab_hdr->sh_info == 0)
4995 continue;
4996
4997 /* Walk over each section attached to the input bfd. */
4998 for (section = input_bfd->sections;
4999 section != NULL;
5000 section = section->next)
5001 {
5002 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5003
5004 /* If there aren't any relocs, then there's nothing more
5005 to do. */
5006 if ((section->flags & SEC_RELOC) == 0
5007 || section->reloc_count == 0
5008 || (section->flags & SEC_CODE) == 0)
5009 continue;
5010
5011 /* If this section is a link-once section that will be
5012 discarded, then don't create any stubs. */
5013 if (section->output_section == NULL
5014 || section->output_section->owner != output_bfd)
5015 continue;
5016
5017 /* Get the relocs. */
5018 internal_relocs
5019 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5020 NULL, info->keep_memory);
5021 if (internal_relocs == NULL)
5022 goto error_ret_free_local;
5023
5024 /* Now examine each relocation. */
5025 irela = internal_relocs;
5026 irelaend = irela + section->reloc_count;
5027 for (; irela < irelaend; irela++)
5028 {
5029 unsigned int r_type, r_indx;
5030 enum elf32_arm_stub_type stub_type;
5031 struct elf32_arm_stub_hash_entry *stub_entry;
5032 asection *sym_sec;
5033 bfd_vma sym_value;
5034 bfd_vma destination;
5035 struct elf32_arm_link_hash_entry *hash;
7413f23f 5036 const char *sym_name;
906e58ca
NC		 5037 char *stub_name;
5038 const asection *id_sec;
34e77a92 5039 unsigned char st_type;
35fc36a8 5040 enum arm_st_branch_type branch_type;
48229727 5041 bfd_boolean created_stub = FALSE;
906e58ca
NC		 5042
5043 r_type = ELF32_R_TYPE (irela->r_info);
5044 r_indx = ELF32_R_SYM (irela->r_info);
5045
5046 if (r_type >= (unsigned int) R_ARM_max)
5047 {
5048 bfd_set_error (bfd_error_bad_value);
5049 error_ret_free_internal:
5050 if (elf_section_data (section)->relocs == NULL)
5051 free (internal_relocs);
5052 goto error_ret_free_local;
5053 }
b38cadfb 5054
0855e32b
NS		 5055 hash = NULL;
5056 if (r_indx >= symtab_hdr->sh_info)
5057 hash = elf32_arm_hash_entry
5058 (elf_sym_hashes (input_bfd)
5059 [r_indx - symtab_hdr->sh_info]);
b38cadfb 5060
0855e32b
NS		 5061 /* Only look for stubs on branch instructions, or
5062 non-relaxed TLSCALL */
906e58ca 5063 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 5064 && (r_type != (unsigned int) R_ARM_THM_CALL)
5065 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 5066 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5067 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 5068 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 5069 && (r_type != (unsigned int) R_ARM_PLT32)
5070 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5071 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5072 && r_type == elf32_arm_tls_transition
5073 (info, r_type, &hash->root)
5074 && ((hash ? hash->tls_type
5075 : (elf32_arm_local_got_tls_type
5076 (input_bfd)[r_indx]))
5077 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 5078 continue;
5079
5080 /* Now determine the call target, its name, value,
5081 section. */
5082 sym_sec = NULL;
5083 sym_value = 0;
5084 destination = 0;
7413f23f 5085 sym_name = NULL;
b38cadfb 5086
0855e32b
NS		 5087 if (r_type == (unsigned int) R_ARM_TLS_CALL
5088 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5089 {
5090 /* A non-relaxed TLS call. The target is the
5091 plt-resident trampoline and nothing to do
5092 with the symbol. */
5093 BFD_ASSERT (htab->tls_trampoline > 0);
5094 sym_sec = htab->root.splt;
5095 sym_value = htab->tls_trampoline;
5096 hash = 0;
34e77a92 5097 st_type = STT_FUNC;
35fc36a8 5098 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 5099 }
5100 else if (!hash)
906e58ca
NC		 5101 {
5102 /* It's a local symbol. */
5103 Elf_Internal_Sym *sym;
906e58ca
NC		 5104
5105 if (local_syms == NULL)
5106 {
5107 local_syms
5108 = (Elf_Internal_Sym *) symtab_hdr->contents;
5109 if (local_syms == NULL)
5110 local_syms
5111 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5112 symtab_hdr->sh_info, 0,
5113 NULL, NULL, NULL);
5114 if (local_syms == NULL)
5115 goto error_ret_free_internal;
5116 }
5117
5118 sym = local_syms + r_indx;
f6d250ce
TS		 5119 if (sym->st_shndx == SHN_UNDEF)
5120 sym_sec = bfd_und_section_ptr;
5121 else if (sym->st_shndx == SHN_ABS)
5122 sym_sec = bfd_abs_section_ptr;
5123 else if (sym->st_shndx == SHN_COMMON)
5124 sym_sec = bfd_com_section_ptr;
5125 else
5126 sym_sec =
5127 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5128
ffcb4889
NS		 5129 if (!sym_sec)
5130 /* This is an undefined symbol. It can never
5131 be resolved. */
5132 continue;
fe33d2fa 5133
906e58ca
NC		 5134 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5135 sym_value = sym->st_value;
5136 destination = (sym_value + irela->r_addend
5137 + sym_sec->output_offset
5138 + sym_sec->output_section->vma);
34e77a92 5139 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5140 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5141 sym_name
5142 = bfd_elf_string_from_elf_section (input_bfd,
5143 symtab_hdr->sh_link,
5144 sym->st_name);
906e58ca
NC		 5145 }
5146 else
5147 {
5148 /* It's an external symbol. */
906e58ca
NC		 5149 while (hash->root.root.type == bfd_link_hash_indirect
5150 || hash->root.root.type == bfd_link_hash_warning)
5151 hash = ((struct elf32_arm_link_hash_entry *)
5152 hash->root.root.u.i.link);
5153
5154 if (hash->root.root.type == bfd_link_hash_defined
5155 || hash->root.root.type == bfd_link_hash_defweak)
5156 {
5157 sym_sec = hash->root.root.u.def.section;
5158 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5159
5160 struct elf32_arm_link_hash_table *globals =
5161 elf32_arm_hash_table (info);
5162
5163 /* For a destination in a shared library,
5164 use the PLT stub as target address to
5165 decide whether a branch stub is
5166 needed. */
4dfe6ac6 5167 if (globals != NULL
362d30a1 5168 && globals->root.splt != NULL
4dfe6ac6 5169 && hash != NULL
022f8312
CL		 5170 && hash->root.plt.offset != (bfd_vma) -1)
5171 {
362d30a1 5172 sym_sec = globals->root.splt;
022f8312
CL		 5173 sym_value = hash->root.plt.offset;
5174 if (sym_sec->output_section != NULL)
5175 destination = (sym_value
5176 + sym_sec->output_offset
5177 + sym_sec->output_section->vma);
5178 }
5179 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5180 destination = (sym_value + irela->r_addend
5181 + sym_sec->output_offset
5182 + sym_sec->output_section->vma);
5183 }
69c5861e
CL		 5184 else if ((hash->root.root.type == bfd_link_hash_undefined)
5185 || (hash->root.root.type == bfd_link_hash_undefweak))
5186 {
5187 /* For a shared library, use the PLT stub as
5188 target address to decide whether a long
5189 branch stub is needed.
5190 For absolute code, they cannot be handled. */
5191 struct elf32_arm_link_hash_table *globals =
5192 elf32_arm_hash_table (info);
5193
4dfe6ac6 5194 if (globals != NULL
362d30a1 5195 && globals->root.splt != NULL
4dfe6ac6 5196 && hash != NULL
69c5861e
CL		 5197 && hash->root.plt.offset != (bfd_vma) -1)
5198 {
362d30a1 5199 sym_sec = globals->root.splt;
69c5861e
CL		 5200 sym_value = hash->root.plt.offset;
5201 if (sym_sec->output_section != NULL)
5202 destination = (sym_value
5203 + sym_sec->output_offset
5204 + sym_sec->output_section->vma);
5205 }
5206 else
5207 continue;
5208 }
906e58ca
NC		 5209 else
5210 {
5211 bfd_set_error (bfd_error_bad_value);
5212 goto error_ret_free_internal;
5213 }
34e77a92 5214 st_type = hash->root.type;
35fc36a8 5215 branch_type = hash->root.target_internal;
7413f23f 5216 sym_name = hash->root.root.root.string;
906e58ca
NC		 5217 }
5218
48229727 5219 do
7413f23f 5220 {
48229727
JB		 5221 /* Determine what (if any) linker stub is needed. */
5222 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5223 st_type, &branch_type,
5224 hash, destination, sym_sec,
48229727
JB		 5225 input_bfd, sym_name);
5226 if (stub_type == arm_stub_none)
5227 break;
5228
5229 /* Support for grouping stub sections. */
5230 id_sec = htab->stub_group[section->id].link_sec;
5231
5232 /* Get the name of this stub. */
5233 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5234 irela, stub_type);
48229727
JB		 5235 if (!stub_name)
5236 goto error_ret_free_internal;
5237
5238 /* We've either created a stub for this reloc already,
5239 or we are about to. */
5240 created_stub = TRUE;
5241
5242 stub_entry = arm_stub_hash_lookup
5243 (&htab->stub_hash_table, stub_name,
5244 FALSE, FALSE);
5245 if (stub_entry != NULL)
5246 {
5247 /* The proper stub has already been created. */
5248 free (stub_name);
eb7c4339 5249 stub_entry->target_value = sym_value;
48229727
JB		 5250 break;
5251 }
7413f23f 5252
48229727
JB		 5253 stub_entry = elf32_arm_add_stub (stub_name, section,
5254 htab);
5255 if (stub_entry == NULL)
5256 {
5257 free (stub_name);
5258 goto error_ret_free_internal;
5259 }
7413f23f 5260
48229727
JB		 5261 stub_entry->target_value = sym_value;
5262 stub_entry->target_section = sym_sec;
5263 stub_entry->stub_type = stub_type;
5264 stub_entry->h = hash;
35fc36a8 5265 stub_entry->branch_type = branch_type;
48229727
JB		 5266
5267 if (sym_name == NULL)
5268 sym_name = "unnamed";
21d799b5
NC		 5269 stub_entry->output_name = (char *)
5270 bfd_alloc (htab->stub_bfd,
48229727
JB		 5271 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5272 + strlen (sym_name));
5273 if (stub_entry->output_name == NULL)
5274 {
5275 free (stub_name);
5276 goto error_ret_free_internal;
5277 }
5278
5279 /* For historical reasons, use the existing names for
5280 ARM-to-Thumb and Thumb-to-ARM stubs. */
35fc36a8
RS		 5281 if ((r_type == (unsigned int) R_ARM_THM_CALL
5282 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5283 && branch_type == ST_BRANCH_TO_ARM)
48229727
JB		 5284 sprintf (stub_entry->output_name,
5285 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
35fc36a8
RS		 5286 else if ((r_type == (unsigned int) R_ARM_CALL
5287 || r_type == (unsigned int) R_ARM_JUMP24)
5288 && branch_type == ST_BRANCH_TO_THUMB)
48229727
JB		 5289 sprintf (stub_entry->output_name,
5290 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5291 else
5292 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5293 sym_name);
5294
5295 stub_changed = TRUE;
5296 }
5297 while (0);
5298
5299 /* Look for relocations which might trigger Cortex-A8
5300 erratum. */
5301 if (htab->fix_cortex_a8
5302 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5303 || r_type == (unsigned int) R_ARM_THM_JUMP19
5304 || r_type == (unsigned int) R_ARM_THM_CALL
5305 || r_type == (unsigned int) R_ARM_THM_XPC22))
5306 {
5307 bfd_vma from = section->output_section->vma
5308 + section->output_offset
5309 + irela->r_offset;
5310
5311 if ((from & 0xfff) == 0xffe)
5312 {
5313 /* Found a candidate. Note we haven't checked the
5314 destination is within 4K here: if we do so (and
5315 don't create an entry in a8_relocs) we can't tell
5316 that a branch should have been relocated when
5317 scanning later. */
5318 if (num_a8_relocs == a8_reloc_table_size)
5319 {
5320 a8_reloc_table_size *= 2;
21d799b5
NC		 5321 a8_relocs = (struct a8_erratum_reloc *)
5322 bfd_realloc (a8_relocs,
5323 sizeof (struct a8_erratum_reloc)
5324 * a8_reloc_table_size);
48229727
JB		 5325 }
5326
5327 a8_relocs[num_a8_relocs].from = from;
5328 a8_relocs[num_a8_relocs].destination = destination;
5329 a8_relocs[num_a8_relocs].r_type = r_type;
35fc36a8 5330 a8_relocs[num_a8_relocs].branch_type = branch_type;
48229727
JB		 5331 a8_relocs[num_a8_relocs].sym_name = sym_name;
5332 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 5333 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 5334
5335 num_a8_relocs++;
5336 }
5337 }
906e58ca
NC		 5338 }
5339
48229727
JB		 5340 /* We're done with the internal relocs, free them. */
5341 if (elf_section_data (section)->relocs == NULL)
5342 free (internal_relocs);
5343 }
5344
5345 if (htab->fix_cortex_a8)
5346 {
5347 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 5348 qsort (a8_relocs, num_a8_relocs,
5349 sizeof (struct a8_erratum_reloc),
48229727
JB		 5350 &a8_reloc_compare);
5351
5352 /* Scan for branches which might trigger Cortex-A8 erratum. */
5353 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5354 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5355 a8_relocs, num_a8_relocs,
5356 prev_num_a8_fixes, &stub_changed)
5357 != 0)
48229727 5358 goto error_ret_free_local;
5e681ec4 5359 }
5e681ec4
PB		 5360 }
5361
eb7c4339 5362 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 5363 stub_changed = TRUE;
5364
906e58ca
NC		 5365 if (!stub_changed)
5366 break;
5e681ec4 5367
906e58ca
NC		 5368 /* OK, we've added some stubs. Find out the new size of the
5369 stub sections. */
5370 for (stub_sec = htab->stub_bfd->sections;
5371 stub_sec != NULL;
5372 stub_sec = stub_sec->next)
3e6b1042
DJ		 5373 {
5374 /* Ignore non-stub sections. */
5375 if (!strstr (stub_sec->name, STUB_SUFFIX))
5376 continue;
5377
5378 stub_sec->size = 0;
5379 }
b34b2d70 5380
906e58ca
NC		 5381 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5382
48229727
JB		 5383 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5384 if (htab->fix_cortex_a8)
5385 for (i = 0; i < num_a8_fixes; i++)
5386 {
5387 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5388 a8_fixes[i].section, htab);
5389
5390 if (stub_sec == NULL)
5391 goto error_ret_free_local;
5392
5393 stub_sec->size
5394 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5395 NULL);
5396 }
5397
5398
906e58ca
NC		 5399 /* Ask the linker to do its stuff. */
5400 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5401 }
5402
48229727
JB		 5403 /* Add stubs for Cortex-A8 erratum fixes now. */
5404 if (htab->fix_cortex_a8)
5405 {
5406 for (i = 0; i < num_a8_fixes; i++)
5407 {
5408 struct elf32_arm_stub_hash_entry *stub_entry;
5409 char *stub_name = a8_fixes[i].stub_name;
5410 asection *section = a8_fixes[i].section;
5411 unsigned int section_id = a8_fixes[i].section->id;
5412 asection *link_sec = htab->stub_group[section_id].link_sec;
5413 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 5414 const insn_sequence *template_sequence;
48229727
JB		 5415 int template_size, size = 0;
5416
5417 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5418 TRUE, FALSE);
5419 if (stub_entry == NULL)
5420 {
5421 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5422 section->owner,
5423 stub_name);
5424 return FALSE;
5425 }
5426
5427 stub_entry->stub_sec = stub_sec;
5428 stub_entry->stub_offset = 0;
5429 stub_entry->id_sec = link_sec;
5430 stub_entry->stub_type = a8_fixes[i].stub_type;
5431 stub_entry->target_section = a8_fixes[i].section;
5432 stub_entry->target_value = a8_fixes[i].offset;
5433 stub_entry->target_addend = a8_fixes[i].addend;
5434 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5435 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5436
d3ce72d0
NC		 5437 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5438 &template_sequence,
48229727
JB		 5439 &template_size);
5440
5441 stub_entry->stub_size = size;
d3ce72d0 5442 stub_entry->stub_template = template_sequence;
48229727
JB		 5443 stub_entry->stub_template_size = template_size;
5444 }
5445
5446 /* Stash the Cortex-A8 erratum fix array for use later in
5447 elf32_arm_write_section(). */
5448 htab->a8_erratum_fixes = a8_fixes;
5449 htab->num_a8_erratum_fixes = num_a8_fixes;
5450 }
5451 else
5452 {
5453 htab->a8_erratum_fixes = NULL;
5454 htab->num_a8_erratum_fixes = 0;
5455 }
906e58ca
NC		 5456 return TRUE;
5457
5458 error_ret_free_local:
5459 return FALSE;
5e681ec4
PB		 5460}
5461
906e58ca
NC		 5462/* Build all the stubs associated with the current output file. The
5463 stubs are kept in a hash table attached to the main linker hash
5464 table. We also set up the .plt entries for statically linked PIC
5465 functions here. This function is called via arm_elf_finish in the
5466 linker. */
252b5132 5467
906e58ca
NC		 5468bfd_boolean
5469elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5470{
906e58ca
NC		 5471 asection *stub_sec;
5472 struct bfd_hash_table *table;
5473 struct elf32_arm_link_hash_table *htab;
252b5132 5474
906e58ca 5475 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5476 if (htab == NULL)
5477 return FALSE;
252b5132 5478
906e58ca
NC		 5479 for (stub_sec = htab->stub_bfd->sections;
5480 stub_sec != NULL;
5481 stub_sec = stub_sec->next)
252b5132 5482 {
906e58ca
NC		 5483 bfd_size_type size;
5484
8029a119 5485 /* Ignore non-stub sections. */
906e58ca
NC		 5486 if (!strstr (stub_sec->name, STUB_SUFFIX))
5487 continue;
5488
5489 /* Allocate memory to hold the linker stubs. */
5490 size = stub_sec->size;
21d799b5 5491 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5492 if (stub_sec->contents == NULL && size != 0)
5493 return FALSE;
5494 stub_sec->size = 0;
252b5132
RH		 5495 }
5496
906e58ca
NC		 5497 /* Build the stubs as directed by the stub hash table. */
5498 table = &htab->stub_hash_table;
5499 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5500 if (htab->fix_cortex_a8)
5501 {
5502 /* Place the cortex a8 stubs last. */
5503 htab->fix_cortex_a8 = -1;
5504 bfd_hash_traverse (table, arm_build_one_stub, info);
5505 }
252b5132 5506
906e58ca 5507 return TRUE;
252b5132
RH		 5508}
5509
9b485d32
NC		 5510/* Locate the Thumb encoded calling stub for NAME. */
5511
252b5132 5512static struct elf_link_hash_entry *
57e8b36a
NC		 5513find_thumb_glue (struct bfd_link_info *link_info,
5514 const char *name,
f2a9dd69 5515 char **error_message)
252b5132
RH		 5516{
5517 char *tmp_name;
5518 struct elf_link_hash_entry *hash;
5519 struct elf32_arm_link_hash_table *hash_table;
5520
5521 /* We need a pointer to the armelf specific hash table. */
5522 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5523 if (hash_table == NULL)
5524 return NULL;
252b5132 5525
21d799b5
NC		 5526 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5527 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5528
5529 BFD_ASSERT (tmp_name);
5530
5531 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5532
5533 hash = elf_link_hash_lookup
b34976b6 5534 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5535
b1657152
AM		 5536 if (hash == NULL
5537 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5538 tmp_name, name) == -1)
5539 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5540
5541 free (tmp_name);
5542
5543 return hash;
5544}
5545
9b485d32
NC		 5546/* Locate the ARM encoded calling stub for NAME. */
5547
252b5132 5548static struct elf_link_hash_entry *
57e8b36a
NC		 5549find_arm_glue (struct bfd_link_info *link_info,
5550 const char *name,
f2a9dd69 5551 char **error_message)
252b5132
RH		 5552{
5553 char *tmp_name;
5554 struct elf_link_hash_entry *myh;
5555 struct elf32_arm_link_hash_table *hash_table;
5556
5557 /* We need a pointer to the elfarm specific hash table. */
5558 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5559 if (hash_table == NULL)
5560 return NULL;
252b5132 5561
21d799b5
NC		 5562 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5563 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5564
5565 BFD_ASSERT (tmp_name);
5566
5567 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5568
5569 myh = elf_link_hash_lookup
b34976b6 5570 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5571
b1657152
AM		 5572 if (myh == NULL
5573 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5574 tmp_name, name) == -1)
5575 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5576
5577 free (tmp_name);
5578
5579 return myh;
5580}
5581
8f6277f5 5582/* ARM->Thumb glue (static images):
252b5132
RH		 5583
5584 .arm
5585 __func_from_arm:
5586 ldr r12, __func_addr
5587 bx r12
5588 __func_addr:
906e58ca 5589 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5590
26079076
PB		 5591 (v5t static images)
5592 .arm
5593 __func_from_arm:
5594 ldr pc, __func_addr
5595 __func_addr:
906e58ca 5596 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5597
8f6277f5
PB		 5598 (relocatable images)
5599 .arm
5600 __func_from_arm:
5601 ldr r12, __func_offset
5602 add r12, r12, pc
5603 bx r12
5604 __func_offset:
8029a119 5605 .word func - . */
8f6277f5
PB		 5606
5607#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5608static const insn32 a2t1_ldr_insn = 0xe59fc000;
5609static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5610static const insn32 a2t3_func_addr_insn = 0x00000001;
5611
26079076
PB		 5612#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5613static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5614static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5615
8f6277f5
PB		 5616#define ARM2THUMB_PIC_GLUE_SIZE 16
5617static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5618static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5619static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5620
9b485d32 5621/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5622
8029a119
NC		 5623 .thumb .thumb
5624 .align 2 .align 2
5625 __func_from_thumb: __func_from_thumb:
5626 bx pc push {r6, lr}
5627 nop ldr r6, __func_addr
5628 .arm mov lr, pc
5629 b func bx r6
fcef9eb7 5630 .arm
b38cadfb 5631 ;; back_to_thumb
fcef9eb7 5632 ldmia r13! {r6, lr}
b38cadfb 5633 bx lr
8029a119
NC		 5634 __func_addr:
5635 .word func */
252b5132
RH		 5636
5637#define THUMB2ARM_GLUE_SIZE 8
5638static const insn16 t2a1_bx_pc_insn = 0x4778;
5639static const insn16 t2a2_noop_insn = 0x46c0;
5640static const insn32 t2a3_b_insn = 0xea000000;
5641
c7b8f16e
JB		 5642#define VFP11_ERRATUM_VENEER_SIZE 8
5643
845b51d6
PB		 5644#define ARM_BX_VENEER_SIZE 12
5645static const insn32 armbx1_tst_insn = 0xe3100001;
5646static const insn32 armbx2_moveq_insn = 0x01a0f000;
5647static const insn32 armbx3_bx_insn = 0xe12fff10;
5648
7e392df6 5649#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5650static void
5651arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5652{
5653 asection * s;
8029a119 5654 bfd_byte * contents;
252b5132 5655
8029a119 5656 if (size == 0)
3e6b1042
DJ		 5657 {
5658 /* Do not include empty glue sections in the output. */
5659 if (abfd != NULL)
5660 {
3d4d4302 5661 s = bfd_get_linker_section (abfd, name);
3e6b1042
DJ		 5662 if (s != NULL)
5663 s->flags |= SEC_EXCLUDE;
5664 }
5665 return;
5666 }
252b5132 5667
8029a119 5668 BFD_ASSERT (abfd != NULL);
252b5132 5669
3d4d4302 5670 s = bfd_get_linker_section (abfd, name);
8029a119 5671 BFD_ASSERT (s != NULL);
252b5132 5672
21d799b5 5673 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5674
8029a119
NC		 5675 BFD_ASSERT (s->size == size);
5676 s->contents = contents;
5677}
906e58ca 5678
8029a119
NC		 5679bfd_boolean
5680bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5681{
5682 struct elf32_arm_link_hash_table * globals;
906e58ca 5683
8029a119
NC		 5684 globals = elf32_arm_hash_table (info);
5685 BFD_ASSERT (globals != NULL);
906e58ca 5686
8029a119
NC		 5687 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5688 globals->arm_glue_size,
5689 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5690
8029a119
NC		 5691 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5692 globals->thumb_glue_size,
5693 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5694
8029a119
NC		 5695 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5696 globals->vfp11_erratum_glue_size,
5697 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5698
8029a119
NC		 5699 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5700 globals->bx_glue_size,
845b51d6
PB		 5701 ARM_BX_GLUE_SECTION_NAME);
5702
b34976b6 5703 return TRUE;
252b5132
RH		 5704}
5705
a4fd1a8e 5706/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5707 returns the symbol identifying the stub. */
5708
a4fd1a8e 5709static struct elf_link_hash_entry *
57e8b36a
NC		 5710record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5711 struct elf_link_hash_entry * h)
252b5132
RH		 5712{
5713 const char * name = h->root.root.string;
63b0f745 5714 asection * s;
252b5132
RH		 5715 char * tmp_name;
5716 struct elf_link_hash_entry * myh;
14a793b2 5717 struct bfd_link_hash_entry * bh;
252b5132 5718 struct elf32_arm_link_hash_table * globals;
dc810e39 5719 bfd_vma val;
2f475487 5720 bfd_size_type size;
252b5132
RH		 5721
5722 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5723 BFD_ASSERT (globals != NULL);
5724 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5725
3d4d4302 5726 s = bfd_get_linker_section
252b5132
RH		 5727 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5728
252b5132
RH		 5729 BFD_ASSERT (s != NULL);
5730
21d799b5
NC		 5731 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5732 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5733
5734 BFD_ASSERT (tmp_name);
5735
5736 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5737
5738 myh = elf_link_hash_lookup
b34976b6 5739 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5740
5741 if (myh != NULL)
5742 {
9b485d32 5743 /* We've already seen this guy. */
252b5132 5744 free (tmp_name);
a4fd1a8e 5745 return myh;
252b5132
RH		 5746 }
5747
57e8b36a
NC		 5748 /* The only trick here is using hash_table->arm_glue_size as the value.
5749 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5750 putting it. The +1 on the value marks that the stub has not been
5751 output yet - not that it is a Thumb function. */
14a793b2 5752 bh = NULL;
dc810e39
AM		 5753 val = globals->arm_glue_size + 1;
5754 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5755 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5756 NULL, TRUE, FALSE, &bh);
252b5132 5757
b7693d02
DJ		 5758 myh = (struct elf_link_hash_entry *) bh;
5759 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5760 myh->forced_local = 1;
5761
252b5132
RH		 5762 free (tmp_name);
5763
27e55c4d
PB		 5764 if (link_info->shared || globals->root.is_relocatable_executable
5765 || globals->pic_veneer)
2f475487 5766 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5767 else if (globals->use_blx)
5768 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5769 else
2f475487
AM		 5770 size = ARM2THUMB_STATIC_GLUE_SIZE;
5771
5772 s->size += size;
5773 globals->arm_glue_size += size;
252b5132 5774
a4fd1a8e 5775 return myh;
252b5132
RH		 5776}
5777
845b51d6
PB		 5778/* Allocate space for ARMv4 BX veneers. */
5779
5780static void
5781record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5782{
5783 asection * s;
5784 struct elf32_arm_link_hash_table *globals;
5785 char *tmp_name;
5786 struct elf_link_hash_entry *myh;
5787 struct bfd_link_hash_entry *bh;
5788 bfd_vma val;
5789
5790 /* BX PC does not need a veneer. */
5791 if (reg == 15)
5792 return;
5793
5794 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5795 BFD_ASSERT (globals != NULL);
5796 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5797
5798 /* Check if this veneer has already been allocated. */
5799 if (globals->bx_glue_offset[reg])
5800 return;
5801
3d4d4302 5802 s = bfd_get_linker_section
845b51d6
PB		 5803 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5804
5805 BFD_ASSERT (s != NULL);
5806
5807 /* Add symbol for veneer. */
21d799b5
NC		 5808 tmp_name = (char *)
5809 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5810
845b51d6 5811 BFD_ASSERT (tmp_name);
906e58ca 5812
845b51d6 5813 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5814
845b51d6
PB		 5815 myh = elf_link_hash_lookup
5816 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5817
845b51d6 5818 BFD_ASSERT (myh == NULL);
906e58ca 5819
845b51d6
PB		 5820 bh = NULL;
5821 val = globals->bx_glue_size;
5822 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5823 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5824 NULL, TRUE, FALSE, &bh);
5825
5826 myh = (struct elf_link_hash_entry *) bh;
5827 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5828 myh->forced_local = 1;
5829
5830 s->size += ARM_BX_VENEER_SIZE;
5831 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5832 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5833}
5834
5835
c7b8f16e
JB		 5836/* Add an entry to the code/data map for section SEC. */
5837
5838static void
5839elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5840{
5841 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5842 unsigned int newidx;
906e58ca 5843
c7b8f16e
JB		 5844 if (sec_data->map == NULL)
5845 {
21d799b5
NC		 5846 sec_data->map = (elf32_arm_section_map *)
5847 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5848 sec_data->mapcount = 0;
5849 sec_data->mapsize = 1;
5850 }
906e58ca 5851
c7b8f16e 5852 newidx = sec_data->mapcount++;
906e58ca 5853
c7b8f16e
JB		 5854 if (sec_data->mapcount > sec_data->mapsize)
5855 {
5856 sec_data->mapsize *= 2;
21d799b5
NC		 5857 sec_data->map = (elf32_arm_section_map *)
5858 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5859 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5860 }
5861
5862 if (sec_data->map)
5863 {
5864 sec_data->map[newidx].vma = vma;
5865 sec_data->map[newidx].type = type;
c7b8f16e 5866 }
c7b8f16e
JB		 5867}
5868
5869
5870/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5871 veneers are handled for now. */
5872
5873static bfd_vma
5874record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5875 elf32_vfp11_erratum_list *branch,
5876 bfd *branch_bfd,
5877 asection *branch_sec,
5878 unsigned int offset)
5879{
5880 asection *s;
5881 struct elf32_arm_link_hash_table *hash_table;
5882 char *tmp_name;
5883 struct elf_link_hash_entry *myh;
5884 struct bfd_link_hash_entry *bh;
5885 bfd_vma val;
5886 struct _arm_elf_section_data *sec_data;
c7b8f16e 5887 elf32_vfp11_erratum_list *newerr;
906e58ca 5888
c7b8f16e 5889 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5890 BFD_ASSERT (hash_table != NULL);
5891 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5892
3d4d4302 5893 s = bfd_get_linker_section
c7b8f16e 5894 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5895
c7b8f16e 5896 sec_data = elf32_arm_section_data (s);
906e58ca 5897
c7b8f16e 5898 BFD_ASSERT (s != NULL);
906e58ca 5899
21d799b5
NC		 5900 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5901 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5902
c7b8f16e 5903 BFD_ASSERT (tmp_name);
906e58ca 5904
c7b8f16e
JB		 5905 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5906 hash_table->num_vfp11_fixes);
906e58ca 5907
c7b8f16e
JB		 5908 myh = elf_link_hash_lookup
5909 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5910
c7b8f16e 5911 BFD_ASSERT (myh == NULL);
906e58ca 5912
c7b8f16e
JB		 5913 bh = NULL;
5914 val = hash_table->vfp11_erratum_glue_size;
5915 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5916 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5917 NULL, TRUE, FALSE, &bh);
5918
5919 myh = (struct elf_link_hash_entry *) bh;
5920 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5921 myh->forced_local = 1;
5922
5923 /* Link veneer back to calling location. */
c7e2358a 5924 sec_data->erratumcount += 1;
21d799b5
NC		 5925 newerr = (elf32_vfp11_erratum_list *)
5926 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5927
c7b8f16e
JB		 5928 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5929 newerr->vma = -1;
5930 newerr->u.v.branch = branch;
5931 newerr->u.v.id = hash_table->num_vfp11_fixes;
5932 branch->u.b.veneer = newerr;
5933
5934 newerr->next = sec_data->erratumlist;
5935 sec_data->erratumlist = newerr;
5936
5937 /* A symbol for the return from the veneer. */
5938 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5939 hash_table->num_vfp11_fixes);
5940
5941 myh = elf_link_hash_lookup
5942 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5943
c7b8f16e
JB		 5944 if (myh != NULL)
5945 abort ();
5946
5947 bh = NULL;
5948 val = offset + 4;
5949 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5950 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5951
c7b8f16e
JB		 5952 myh = (struct elf_link_hash_entry *) bh;
5953 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5954 myh->forced_local = 1;
5955
5956 free (tmp_name);
906e58ca 5957
c7b8f16e
JB		 5958 /* Generate a mapping symbol for the veneer section, and explicitly add an
5959 entry for that symbol to the code/data map for the section. */
5960 if (hash_table->vfp11_erratum_glue_size == 0)
5961 {
5962 bh = NULL;
5963 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5964 ever requires this erratum fix. */
5965 _bfd_generic_link_add_one_symbol (link_info,
5966 hash_table->bfd_of_glue_owner, "$a",
5967 BSF_LOCAL, s, 0, NULL,
5968 TRUE, FALSE, &bh);
5969
5970 myh = (struct elf_link_hash_entry *) bh;
5971 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5972 myh->forced_local = 1;
906e58ca 5973
c7b8f16e
JB		 5974 /* The elf32_arm_init_maps function only cares about symbols from input
5975 BFDs. We must make a note of this generated mapping symbol
5976 ourselves so that code byteswapping works properly in
5977 elf32_arm_write_section. */
5978 elf32_arm_section_map_add (s, 'a', 0);
5979 }
906e58ca 5980
c7b8f16e
JB		 5981 s->size += VFP11_ERRATUM_VENEER_SIZE;
5982 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5983 hash_table->num_vfp11_fixes++;
906e58ca 5984
c7b8f16e
JB		 5985 /* The offset of the veneer. */
5986 return val;
5987}
5988
8029a119 5989#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5990 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5991 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5992
5993/* Create a fake section for use by the ARM backend of the linker. */
5994
5995static bfd_boolean
5996arm_make_glue_section (bfd * abfd, const char * name)
5997{
5998 asection * sec;
5999
3d4d4302 6000 sec = bfd_get_linker_section (abfd, name);
8029a119
NC		 6001 if (sec != NULL)
6002 /* Already made. */
6003 return TRUE;
6004
3d4d4302 6005 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
8029a119
NC		 6006
6007 if (sec == NULL
6008 || !bfd_set_section_alignment (abfd, sec, 2))
6009 return FALSE;
6010
6011 /* Set the gc mark to prevent the section from being removed by garbage
6012 collection, despite the fact that no relocs refer to this section. */
6013 sec->gc_mark = 1;
6014
6015 return TRUE;
6016}
6017
8afb0e02
NC		 6018/* Add the glue sections to ABFD. This function is called from the
6019 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 6020
b34976b6 6021bfd_boolean
57e8b36a
NC		 6022bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6023 struct bfd_link_info *info)
252b5132 6024{
8afb0e02
NC		 6025 /* If we are only performing a partial
6026 link do not bother adding the glue. */
1049f94e 6027 if (info->relocatable)
b34976b6 6028 return TRUE;
252b5132 6029
8029a119
NC		 6030 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6031 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6032 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6033 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 6034}
6035
6036/* Select a BFD to be used to hold the sections used by the glue code.
6037 This function is called from the linker scripts in ld/emultempl/
8029a119 6038 {armelf/pe}.em. */
8afb0e02 6039
b34976b6 6040bfd_boolean
57e8b36a 6041bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 6042{
6043 struct elf32_arm_link_hash_table *globals;
6044
6045 /* If we are only performing a partial link
6046 do not bother getting a bfd to hold the glue. */
1049f94e 6047 if (info->relocatable)
b34976b6 6048 return TRUE;
8afb0e02 6049
b7693d02
DJ		 6050 /* Make sure we don't attach the glue sections to a dynamic object. */
6051 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6052
8afb0e02 6053 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 6054 BFD_ASSERT (globals != NULL);
6055
6056 if (globals->bfd_of_glue_owner != NULL)
b34976b6 6057 return TRUE;
8afb0e02 6058
252b5132
RH		 6059 /* Save the bfd for later use. */
6060 globals->bfd_of_glue_owner = abfd;
cedb70c5 6061
b34976b6 6062 return TRUE;
252b5132
RH		 6063}
6064
906e58ca
NC		 6065static void
6066check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 6067{
2de70689
MGD		 6068 int cpu_arch;
6069
b38cadfb 6070 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2de70689
MGD		 6071 Tag_CPU_arch);
6072
6073 if (globals->fix_arm1176)
6074 {
6075 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6076 globals->use_blx = 1;
6077 }
6078 else
6079 {
6080 if (cpu_arch > TAG_CPU_ARCH_V4T)
6081 globals->use_blx = 1;
6082 }
39b41c9c
PB		 6083}
6084
b34976b6 6085bfd_boolean
57e8b36a 6086bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 6087 struct bfd_link_info *link_info)
252b5132
RH		 6088{
6089 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 6090 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 6091 Elf_Internal_Rela *irel, *irelend;
6092 bfd_byte *contents = NULL;
252b5132
RH		 6093
6094 asection *sec;
6095 struct elf32_arm_link_hash_table *globals;
6096
6097 /* If we are only performing a partial link do not bother
6098 to construct any glue. */
1049f94e 6099 if (link_info->relocatable)
b34976b6 6100 return TRUE;
252b5132 6101
39ce1a6a
NC		 6102 /* Here we have a bfd that is to be included on the link. We have a
6103 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 6104 globals = elf32_arm_hash_table (link_info);
252b5132 6105 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6106
6107 check_use_blx (globals);
252b5132 6108
d504ffc8 6109 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6110 {
d003868e
AM		 6111 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6112 abfd);
e489d0ae
PB		 6113 return FALSE;
6114 }
f21f3fe0 6115
39ce1a6a
NC		 6116 /* PR 5398: If we have not decided to include any loadable sections in
6117 the output then we will not have a glue owner bfd. This is OK, it
6118 just means that there is nothing else for us to do here. */
6119 if (globals->bfd_of_glue_owner == NULL)
6120 return TRUE;
6121
252b5132
RH		 6122 /* Rummage around all the relocs and map the glue vectors. */
6123 sec = abfd->sections;
6124
6125 if (sec == NULL)
b34976b6 6126 return TRUE;
252b5132
RH		 6127
6128 for (; sec != NULL; sec = sec->next)
6129 {
6130 if (sec->reloc_count == 0)
6131 continue;
6132
2f475487
AM		 6133 if ((sec->flags & SEC_EXCLUDE) != 0)
6134 continue;
6135
0ffa91dd 6136 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6137
9b485d32 6138 /* Load the relocs. */
6cdc0ccc 6139 internal_relocs
906e58ca 6140 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6141
6cdc0ccc
AM		 6142 if (internal_relocs == NULL)
6143 goto error_return;
252b5132 6144
6cdc0ccc
AM		 6145 irelend = internal_relocs + sec->reloc_count;
6146 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6147 {
6148 long r_type;
6149 unsigned long r_index;
252b5132
RH		 6150
6151 struct elf_link_hash_entry *h;
6152
6153 r_type = ELF32_R_TYPE (irel->r_info);
6154 r_index = ELF32_R_SYM (irel->r_info);
6155
9b485d32 6156 /* These are the only relocation types we care about. */
ba96a88f 6157 if ( r_type != R_ARM_PC24
845b51d6 6158 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6159 continue;
6160
6161 /* Get the section contents if we haven't done so already. */
6162 if (contents == NULL)
6163 {
6164 /* Get cached copy if it exists. */
6165 if (elf_section_data (sec)->this_hdr.contents != NULL)
6166 contents = elf_section_data (sec)->this_hdr.contents;
6167 else
6168 {
6169 /* Go get them off disk. */
57e8b36a 6170 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6171 goto error_return;
6172 }
6173 }
6174
845b51d6
PB		 6175 if (r_type == R_ARM_V4BX)
6176 {
6177 int reg;
6178
6179 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6180 record_arm_bx_glue (link_info, reg);
6181 continue;
6182 }
6183
a7c10850 6184 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6185 h = NULL;
6186
9b485d32 6187 /* We don't care about local symbols. */
252b5132
RH		 6188 if (r_index < symtab_hdr->sh_info)
6189 continue;
6190
9b485d32 6191 /* This is an external symbol. */
252b5132
RH		 6192 r_index -= symtab_hdr->sh_info;
6193 h = (struct elf_link_hash_entry *)
6194 elf_sym_hashes (abfd)[r_index];
6195
6196 /* If the relocation is against a static symbol it must be within
6197 the current section and so cannot be a cross ARM/Thumb relocation. */
6198 if (h == NULL)
6199 continue;
6200
d504ffc8
DJ		 6201 /* If the call will go through a PLT entry then we do not need
6202 glue. */
362d30a1 6203 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6204 continue;
6205
252b5132
RH		 6206 switch (r_type)
6207 {
6208 case R_ARM_PC24:
6209 /* This one is a call from arm code. We need to look up
2f0ca46a 6210 the target of the call. If it is a thumb target, we
252b5132 6211 insert glue. */
35fc36a8 6212 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6213 record_arm_to_thumb_glue (link_info, h);
6214 break;
6215
252b5132 6216 default:
c6596c5e 6217 abort ();
252b5132
RH		 6218 }
6219 }
6cdc0ccc
AM		 6220
6221 if (contents != NULL
6222 && elf_section_data (sec)->this_hdr.contents != contents)
6223 free (contents);
6224 contents = NULL;
6225
6226 if (internal_relocs != NULL
6227 && elf_section_data (sec)->relocs != internal_relocs)
6228 free (internal_relocs);
6229 internal_relocs = NULL;
252b5132
RH		 6230 }
6231
b34976b6 6232 return TRUE;
9a5aca8c 6233
252b5132 6234error_return:
6cdc0ccc
AM		 6235 if (contents != NULL
6236 && elf_section_data (sec)->this_hdr.contents != contents)
6237 free (contents);
6238 if (internal_relocs != NULL
6239 && elf_section_data (sec)->relocs != internal_relocs)
6240 free (internal_relocs);
9a5aca8c 6241
b34976b6 6242 return FALSE;
252b5132 6243}
7e392df6 6244#endif
252b5132 6245
eb043451 6246
c7b8f16e
JB		 6247/* Initialise maps of ARM/Thumb/data for input BFDs. */
6248
6249void
6250bfd_elf32_arm_init_maps (bfd *abfd)
6251{
6252 Elf_Internal_Sym *isymbuf;
6253 Elf_Internal_Shdr *hdr;
6254 unsigned int i, localsyms;
6255
af1f4419
NC		 6256 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6257 if (! is_arm_elf (abfd))
6258 return;
6259
c7b8f16e
JB		 6260 if ((abfd->flags & DYNAMIC) != 0)
6261 return;
6262
0ffa91dd 6263 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6264 localsyms = hdr->sh_info;
6265
6266 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6267 should contain the number of local symbols, which should come before any
6268 global symbols. Mapping symbols are always local. */
6269 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6270 NULL);
6271
6272 /* No internal symbols read? Skip this BFD. */
6273 if (isymbuf == NULL)
6274 return;
6275
6276 for (i = 0; i < localsyms; i++)
6277 {
6278 Elf_Internal_Sym *isym = &isymbuf[i];
6279 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6280 const char *name;
906e58ca 6281
c7b8f16e
JB		 6282 if (sec != NULL
6283 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6284 {
6285 name = bfd_elf_string_from_elf_section (abfd,
6286 hdr->sh_link, isym->st_name);
906e58ca 6287
c7b8f16e
JB		 6288 if (bfd_is_arm_special_symbol_name (name,
6289 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6290 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6291 }
6292 }
6293}
6294
6295
48229727
JB		 6296/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6297 say what they wanted. */
6298
6299void
6300bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6301{
6302 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6303 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6304
4dfe6ac6
NC		 6305 if (globals == NULL)
6306 return;
6307
48229727
JB		 6308 if (globals->fix_cortex_a8 == -1)
6309 {
6310 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6311 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6312 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6313 || out_attr[Tag_CPU_arch_profile].i == 0))
6314 globals->fix_cortex_a8 = 1;
6315 else
6316 globals->fix_cortex_a8 = 0;
6317 }
6318}
6319
6320
c7b8f16e
JB		 6321void
6322bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6323{
6324 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6325 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6326
4dfe6ac6
NC		 6327 if (globals == NULL)
6328 return;
c7b8f16e
JB		 6329 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6330 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6331 {
6332 switch (globals->vfp11_fix)
6333 {
6334 case BFD_ARM_VFP11_FIX_DEFAULT:
6335 case BFD_ARM_VFP11_FIX_NONE:
6336 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6337 break;
906e58ca 6338
c7b8f16e
JB		 6339 default:
6340 /* Give a warning, but do as the user requests anyway. */
6341 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6342 "workaround is not necessary for target architecture"), obfd);
6343 }
6344 }
6345 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6346 /* For earlier architectures, we might need the workaround, but do not
6347 enable it by default. If users is running with broken hardware, they
6348 must enable the erratum fix explicitly. */
6349 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6350}
6351
6352
906e58ca
NC		 6353enum bfd_arm_vfp11_pipe
6354{
c7b8f16e
JB		 6355 VFP11_FMAC,
6356 VFP11_LS,
6357 VFP11_DS,
6358 VFP11_BAD
6359};
6360
6361/* Return a VFP register number. This is encoded as RX:X for single-precision
6362 registers, or X:RX for double-precision registers, where RX is the group of
6363 four bits in the instruction encoding and X is the single extension bit.
6364 RX and X fields are specified using their lowest (starting) bit. The return
6365 value is:
6366
6367 0...31: single-precision registers s0...s31
6368 32...63: double-precision registers d0...d31.
906e58ca 6369
c7b8f16e
JB		 6370 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6371 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6372
c7b8f16e
JB		 6373static unsigned int
6374bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6375 unsigned int x)
6376{
6377 if (is_double)
6378 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6379 else
6380 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6381}
6382
6383/* Set bits in *WMASK according to a register number REG as encoded by
6384 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6385
6386static void
6387bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6388{
6389 if (reg < 32)
6390 *wmask |= 1 << reg;
6391 else if (reg < 48)
6392 *wmask |= 3 << ((reg - 32) * 2);
6393}
6394
6395/* Return TRUE if WMASK overwrites anything in REGS. */
6396
6397static bfd_boolean
6398bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6399{
6400 int i;
906e58ca 6401
c7b8f16e
JB		 6402 for (i = 0; i < numregs; i++)
6403 {
6404 unsigned int reg = regs[i];
6405
6406 if (reg < 32 && (wmask & (1 << reg)) != 0)
6407 return TRUE;
906e58ca 6408
c7b8f16e
JB		 6409 reg -= 32;
6410
6411 if (reg >= 16)
6412 continue;
906e58ca 6413
c7b8f16e
JB		 6414 if ((wmask & (3 << (reg * 2))) != 0)
6415 return TRUE;
6416 }
906e58ca 6417
c7b8f16e
JB		 6418 return FALSE;
6419}
6420
6421/* In this function, we're interested in two things: finding input registers
6422 for VFP data-processing instructions, and finding the set of registers which
6423 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6424 hold the written set, so FLDM etc. are easy to deal with (we're only
6425 interested in 32 SP registers or 16 dp registers, due to the VFP version
6426 implemented by the chip in question). DP registers are marked by setting
6427 both SP registers in the write mask). */
6428
6429static enum bfd_arm_vfp11_pipe
6430bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6431 int *numregs)
6432{
91d6fa6a 6433 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6434 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6435
6436 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6437 {
6438 unsigned int pqrs;
6439 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6440 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6441
6442 pqrs = ((insn & 0x00800000) >> 20)
6443 | ((insn & 0x00300000) >> 19)
6444 | ((insn & 0x00000040) >> 6);
6445
6446 switch (pqrs)
6447 {
6448 case 0: /* fmac[sd]. */
6449 case 1: /* fnmac[sd]. */
6450 case 2: /* fmsc[sd]. */
6451 case 3: /* fnmsc[sd]. */
91d6fa6a 6452 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6453 bfd_arm_vfp11_write_mask (destmask, fd);
6454 regs[0] = fd;
6455 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6456 regs[2] = fm;
6457 *numregs = 3;
6458 break;
6459
6460 case 4: /* fmul[sd]. */
6461 case 5: /* fnmul[sd]. */
6462 case 6: /* fadd[sd]. */
6463 case 7: /* fsub[sd]. */
91d6fa6a 6464 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6465 goto vfp_binop;
6466
6467 case 8: /* fdiv[sd]. */
91d6fa6a 6468 vpipe = VFP11_DS;
c7b8f16e
JB		 6469 vfp_binop:
6470 bfd_arm_vfp11_write_mask (destmask, fd);
6471 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6472 regs[1] = fm;
6473 *numregs = 2;
6474 break;
6475
6476 case 15: /* extended opcode. */
6477 {
6478 unsigned int extn = ((insn >> 15) & 0x1e)
6479 | ((insn >> 7) & 1);
6480
6481 switch (extn)
6482 {
6483 case 0: /* fcpy[sd]. */
6484 case 1: /* fabs[sd]. */
6485 case 2: /* fneg[sd]. */
6486 case 8: /* fcmp[sd]. */
6487 case 9: /* fcmpe[sd]. */
6488 case 10: /* fcmpz[sd]. */
6489 case 11: /* fcmpez[sd]. */
6490 case 16: /* fuito[sd]. */
6491 case 17: /* fsito[sd]. */
6492 case 24: /* ftoui[sd]. */
6493 case 25: /* ftouiz[sd]. */
6494 case 26: /* ftosi[sd]. */
6495 case 27: /* ftosiz[sd]. */
6496 /* These instructions will not bounce due to underflow. */
6497 *numregs = 0;
91d6fa6a 6498 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6499 break;
6500
6501 case 3: /* fsqrt[sd]. */
6502 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6503 registers to cause the erratum in previous instructions. */
6504 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 6505 vpipe = VFP11_DS;
c7b8f16e
JB		 6506 break;
6507
6508 case 15: /* fcvt{ds,sd}. */
6509 {
6510 int rnum = 0;
6511
6512 bfd_arm_vfp11_write_mask (destmask, fd);
6513
6514 /* Only FCVTSD can underflow. */
6515 if ((insn & 0x100) != 0)
6516 regs[rnum++] = fm;
6517
6518 *numregs = rnum;
6519
91d6fa6a 6520 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6521 }
6522 break;
6523
6524 default:
6525 return VFP11_BAD;
6526 }
6527 }
6528 break;
6529
6530 default:
6531 return VFP11_BAD;
6532 }
6533 }
6534 /* Two-register transfer. */
6535 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6536 {
6537 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6538
c7b8f16e
JB		 6539 if ((insn & 0x100000) == 0)
6540 {
6541 if (is_double)
6542 bfd_arm_vfp11_write_mask (destmask, fm);
6543 else
6544 {
6545 bfd_arm_vfp11_write_mask (destmask, fm);
6546 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6547 }
6548 }
6549
91d6fa6a 6550 vpipe = VFP11_LS;
c7b8f16e
JB		 6551 }
6552 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6553 {
6554 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6555 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6556
c7b8f16e
JB		 6557 switch (puw)
6558 {
6559 case 0: /* Two-reg transfer. We should catch these above. */
6560 abort ();
906e58ca 6561
c7b8f16e
JB		 6562 case 2: /* fldm[sdx]. */
6563 case 3:
6564 case 5:
6565 {
6566 unsigned int i, offset = insn & 0xff;
6567
6568 if (is_double)
6569 offset >>= 1;
6570
6571 for (i = fd; i < fd + offset; i++)
6572 bfd_arm_vfp11_write_mask (destmask, i);
6573 }
6574 break;
906e58ca 6575
c7b8f16e
JB		 6576 case 4: /* fld[sd]. */
6577 case 6:
6578 bfd_arm_vfp11_write_mask (destmask, fd);
6579 break;
906e58ca 6580
c7b8f16e
JB		 6581 default:
6582 return VFP11_BAD;
6583 }
6584
91d6fa6a 6585 vpipe = VFP11_LS;
c7b8f16e
JB		 6586 }
6587 /* Single-register transfer. Note L==0. */
6588 else if ((insn & 0x0f100e10) == 0x0e000a10)
6589 {
6590 unsigned int opcode = (insn >> 21) & 7;
6591 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6592
6593 switch (opcode)
6594 {
6595 case 0: /* fmsr/fmdlr. */
6596 case 1: /* fmdhr. */
6597 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6598 destination register. I don't know if this is exactly right,
6599 but it is the conservative choice. */
6600 bfd_arm_vfp11_write_mask (destmask, fn);
6601 break;
6602
6603 case 7: /* fmxr. */
6604 break;
6605 }
6606
91d6fa6a 6607 vpipe = VFP11_LS;
c7b8f16e
JB		 6608 }
6609
91d6fa6a 6610 return vpipe;
c7b8f16e
JB		 6611}
6612
6613
6614static int elf32_arm_compare_mapping (const void * a, const void * b);
6615
6616
6617/* Look for potentially-troublesome code sequences which might trigger the
6618 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6619 (available from ARM) for details of the erratum. A short version is
6620 described in ld.texinfo. */
6621
6622bfd_boolean
6623bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6624{
6625 asection *sec;
6626 bfd_byte *contents = NULL;
6627 int state = 0;
6628 int regs[3], numregs = 0;
6629 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6630 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6631
4dfe6ac6
NC		 6632 if (globals == NULL)
6633 return FALSE;
6634
c7b8f16e
JB		 6635 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6636 The states transition as follows:
906e58ca 6637
c7b8f16e
JB		 6638 0 -> 1 (vector) or 0 -> 2 (scalar)
6639 A VFP FMAC-pipeline instruction has been seen. Fill
6640 regs[0]..regs[numregs-1] with its input operands. Remember this
6641 instruction in 'first_fmac'.
6642
6643 1 -> 2
6644 Any instruction, except for a VFP instruction which overwrites
6645 regs[*].
906e58ca 6646
c7b8f16e
JB		 6647 1 -> 3 [ -> 0 ] or
6648 2 -> 3 [ -> 0 ]
6649 A VFP instruction has been seen which overwrites any of regs[*].
6650 We must make a veneer! Reset state to 0 before examining next
6651 instruction.
906e58ca 6652
c7b8f16e
JB		 6653 2 -> 0
6654 If we fail to match anything in state 2, reset to state 0 and reset
6655 the instruction pointer to the instruction after 'first_fmac'.
6656
6657 If the VFP11 vector mode is in use, there must be at least two unrelated
6658 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6659 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6660
6661 /* If we are only performing a partial link do not bother
6662 to construct any glue. */
6663 if (link_info->relocatable)
6664 return TRUE;
6665
0ffa91dd
NC		 6666 /* Skip if this bfd does not correspond to an ELF image. */
6667 if (! is_arm_elf (abfd))
6668 return TRUE;
906e58ca 6669
c7b8f16e
JB		 6670 /* We should have chosen a fix type by the time we get here. */
6671 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6672
6673 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6674 return TRUE;
2e6030b9 6675
33a7ffc2
JM		 6676 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6677 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6678 return TRUE;
6679
c7b8f16e
JB		 6680 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6681 {
6682 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6683 struct _arm_elf_section_data *sec_data;
6684
6685 /* If we don't have executable progbits, we're not interested in this
6686 section. Also skip if section is to be excluded. */
6687 if (elf_section_type (sec) != SHT_PROGBITS
6688 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6689 || (sec->flags & SEC_EXCLUDE) != 0
dbaa2011 6690 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
33a7ffc2 6691 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6692 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6693 continue;
6694
6695 sec_data = elf32_arm_section_data (sec);
906e58ca 6696
c7b8f16e
JB		 6697 if (sec_data->mapcount == 0)
6698 continue;
906e58ca 6699
c7b8f16e
JB		 6700 if (elf_section_data (sec)->this_hdr.contents != NULL)
6701 contents = elf_section_data (sec)->this_hdr.contents;
6702 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6703 goto error_return;
6704
6705 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6706 elf32_arm_compare_mapping);
6707
6708 for (span = 0; span < sec_data->mapcount; span++)
6709 {
6710 unsigned int span_start = sec_data->map[span].vma;
6711 unsigned int span_end = (span == sec_data->mapcount - 1)
6712 ? sec->size : sec_data->map[span + 1].vma;
6713 char span_type = sec_data->map[span].type;
906e58ca 6714
c7b8f16e
JB		 6715 /* FIXME: Only ARM mode is supported at present. We may need to
6716 support Thumb-2 mode also at some point. */
6717 if (span_type != 'a')
6718 continue;
6719
6720 for (i = span_start; i < span_end;)
6721 {
6722 unsigned int next_i = i + 4;
6723 unsigned int insn = bfd_big_endian (abfd)
6724 ? (contents[i] << 24)
6725 | (contents[i + 1] << 16)
6726 | (contents[i + 2] << 8)
6727 | contents[i + 3]
6728 : (contents[i + 3] << 24)
6729 | (contents[i + 2] << 16)
6730 | (contents[i + 1] << 8)
6731 | contents[i];
6732 unsigned int writemask = 0;
91d6fa6a 6733 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6734
6735 switch (state)
6736 {
6737 case 0:
91d6fa6a 6738 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6739 &numregs);
6740 /* I'm assuming the VFP11 erratum can trigger with denorm
6741 operands on either the FMAC or the DS pipeline. This might
6742 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6743 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6744 {
6745 state = use_vector ? 1 : 2;
6746 first_fmac = i;
6747 veneer_of_insn = insn;
6748 }
6749 break;
6750
6751 case 1:
6752 {
6753 int other_regs[3], other_numregs;
91d6fa6a 6754 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6755 other_regs,
6756 &other_numregs);
91d6fa6a 6757 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6758 && bfd_arm_vfp11_antidependency (writemask, regs,
6759 numregs))
6760 state = 3;
6761 else
6762 state = 2;
6763 }
6764 break;
6765
6766 case 2:
6767 {
6768 int other_regs[3], other_numregs;
91d6fa6a 6769 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6770 other_regs,
6771 &other_numregs);
91d6fa6a 6772 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6773 && bfd_arm_vfp11_antidependency (writemask, regs,
6774 numregs))
6775 state = 3;
6776 else
6777 {
6778 state = 0;
6779 next_i = first_fmac + 4;
6780 }
6781 }
6782 break;
6783
6784 case 3:
6785 abort (); /* Should be unreachable. */
6786 }
6787
6788 if (state == 3)
6789 {
21d799b5
NC		 6790 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6791 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6792
c7e2358a 6793 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6794
6795 newerr->u.b.vfp_insn = veneer_of_insn;
6796
6797 switch (span_type)
6798 {
6799 case 'a':
6800 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6801 break;
906e58ca 6802
c7b8f16e
JB		 6803 default:
6804 abort ();
6805 }
6806
6807 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6808 first_fmac);
6809
6810 newerr->vma = -1;
6811
6812 newerr->next = sec_data->erratumlist;
6813 sec_data->erratumlist = newerr;
6814
6815 state = 0;
6816 }
6817
6818 i = next_i;
6819 }
6820 }
906e58ca 6821
c7b8f16e
JB		 6822 if (contents != NULL
6823 && elf_section_data (sec)->this_hdr.contents != contents)
6824 free (contents);
6825 contents = NULL;
6826 }
6827
6828 return TRUE;
6829
6830error_return:
6831 if (contents != NULL
6832 && elf_section_data (sec)->this_hdr.contents != contents)
6833 free (contents);
906e58ca 6834
c7b8f16e
JB		 6835 return FALSE;
6836}
6837
6838/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6839 after sections have been laid out, using specially-named symbols. */
6840
6841void
6842bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6843 struct bfd_link_info *link_info)
6844{
6845 asection *sec;
6846 struct elf32_arm_link_hash_table *globals;
6847 char *tmp_name;
906e58ca 6848
c7b8f16e
JB		 6849 if (link_info->relocatable)
6850 return;
2e6030b9
MS		 6851
6852 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6853 if (! is_arm_elf (abfd))
2e6030b9
MS		 6854 return;
6855
c7b8f16e 6856 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6857 if (globals == NULL)
6858 return;
906e58ca 6859
21d799b5
NC		 6860 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6861 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6862
6863 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6864 {
6865 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6866 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6867
c7b8f16e
JB		 6868 for (; errnode != NULL; errnode = errnode->next)
6869 {
6870 struct elf_link_hash_entry *myh;
6871 bfd_vma vma;
6872
6873 switch (errnode->type)
6874 {
6875 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6876 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6877 /* Find veneer symbol. */
6878 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6879 errnode->u.b.veneer->u.v.id);
6880
6881 myh = elf_link_hash_lookup
6882 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6883
6884 if (myh == NULL)
6885 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6886 "`%s'"), abfd, tmp_name);
6887
6888 vma = myh->root.u.def.section->output_section->vma
6889 + myh->root.u.def.section->output_offset
6890 + myh->root.u.def.value;
6891
6892 errnode->u.b.veneer->vma = vma;
6893 break;
6894
6895 case VFP11_ERRATUM_ARM_VENEER:
6896 case VFP11_ERRATUM_THUMB_VENEER:
6897 /* Find return location. */
6898 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6899 errnode->u.v.id);
6900
6901 myh = elf_link_hash_lookup
6902 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6903
6904 if (myh == NULL)
6905 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6906 "`%s'"), abfd, tmp_name);
6907
6908 vma = myh->root.u.def.section->output_section->vma
6909 + myh->root.u.def.section->output_offset
6910 + myh->root.u.def.value;
6911
6912 errnode->u.v.branch->vma = vma;
6913 break;
906e58ca 6914
c7b8f16e
JB		 6915 default:
6916 abort ();
6917 }
6918 }
6919 }
906e58ca 6920
c7b8f16e
JB		 6921 free (tmp_name);
6922}
6923
6924
eb043451
PB		 6925/* Set target relocation values needed during linking. */
6926
6927void
bf21ed78
MS		 6928bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6929 struct bfd_link_info *link_info,
eb043451 6930 int target1_is_rel,
319850b4 6931 char * target2_type,
33bfe774 6932 int fix_v4bx,
c7b8f16e 6933 int use_blx,
bf21ed78 6934 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6935 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 6936 int pic_veneer, int fix_cortex_a8,
6937 int fix_arm1176)
eb043451
PB		 6938{
6939 struct elf32_arm_link_hash_table *globals;
6940
6941 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6942 if (globals == NULL)
6943 return;
eb043451
PB		 6944
6945 globals->target1_is_rel = target1_is_rel;
6946 if (strcmp (target2_type, "rel") == 0)
6947 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6948 else if (strcmp (target2_type, "abs") == 0)
6949 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6950 else if (strcmp (target2_type, "got-rel") == 0)
6951 globals->target2_reloc = R_ARM_GOT_PREL;
6952 else
6953 {
6954 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6955 target2_type);
6956 }
319850b4 6957 globals->fix_v4bx = fix_v4bx;
33bfe774 6958 globals->use_blx |= use_blx;
c7b8f16e 6959 globals->vfp11_fix = vfp11_fix;
27e55c4d 6960 globals->pic_veneer = pic_veneer;
48229727 6961 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 6962 globals->fix_arm1176 = fix_arm1176;
bf21ed78 6963
0ffa91dd
NC		 6964 BFD_ASSERT (is_arm_elf (output_bfd));
6965 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6966 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6967}
eb043451 6968
12a0a0fd 6969/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6970
12a0a0fd
PB		 6971static void
6972insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6973{
6974 bfd_vma upper;
6975 bfd_vma lower;
6976 int reloc_sign;
6977
6978 BFD_ASSERT ((offset & 1) == 0);
6979
6980 upper = bfd_get_16 (abfd, insn);
6981 lower = bfd_get_16 (abfd, insn + 2);
6982 reloc_sign = (offset < 0) ? 1 : 0;
6983 upper = (upper & ~(bfd_vma) 0x7ff)
6984 | ((offset >> 12) & 0x3ff)
6985 | (reloc_sign << 10);
906e58ca 6986 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6987 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6988 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6989 | ((offset >> 1) & 0x7ff);
6990 bfd_put_16 (abfd, upper, insn);
6991 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6992}
6993
9b485d32
NC		 6994/* Thumb code calling an ARM function. */
6995
252b5132 6996static int
57e8b36a
NC		 6997elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6998 const char * name,
6999 bfd * input_bfd,
7000 bfd * output_bfd,
7001 asection * input_section,
7002 bfd_byte * hit_data,
7003 asection * sym_sec,
7004 bfd_vma offset,
7005 bfd_signed_vma addend,
f2a9dd69
DJ		 7006 bfd_vma val,
7007 char **error_message)
252b5132 7008{
bcbdc74c 7009 asection * s = 0;
dc810e39 7010 bfd_vma my_offset;
252b5132 7011 long int ret_offset;
bcbdc74c
NC		 7012 struct elf_link_hash_entry * myh;
7013 struct elf32_arm_link_hash_table * globals;
252b5132 7014
f2a9dd69 7015 myh = find_thumb_glue (info, name, error_message);
252b5132 7016 if (myh == NULL)
b34976b6 7017 return FALSE;
252b5132
RH		 7018
7019 globals = elf32_arm_hash_table (info);
252b5132
RH		 7020 BFD_ASSERT (globals != NULL);
7021 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7022
7023 my_offset = myh->root.u.def.value;
7024
3d4d4302
AM		 7025 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7026 THUMB2ARM_GLUE_SECTION_NAME);
252b5132
RH		 7027
7028 BFD_ASSERT (s != NULL);
7029 BFD_ASSERT (s->contents != NULL);
7030 BFD_ASSERT (s->output_section != NULL);
7031
7032 if ((my_offset & 0x01) == 0x01)
7033 {
7034 if (sym_sec != NULL
7035 && sym_sec->owner != NULL
7036 && !INTERWORK_FLAG (sym_sec->owner))
7037 {
8f615d07 7038 (*_bfd_error_handler)
d003868e 7039 (_("%B(%s): warning: interworking not enabled.\n"
3aaeb7d3 7040 " first occurrence: %B: Thumb call to ARM"),
d003868e 7041 sym_sec->owner, input_bfd, name);
252b5132 7042
b34976b6 7043 return FALSE;
252b5132
RH		 7044 }
7045
7046 --my_offset;
7047 myh->root.u.def.value = my_offset;
7048
52ab56c2
PB		 7049 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7050 s->contents + my_offset);
252b5132 7051
52ab56c2
PB		 7052 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7053 s->contents + my_offset + 2);
252b5132
RH		 7054
7055 ret_offset =
9b485d32
NC		 7056 /* Address of destination of the stub. */
7057 ((bfd_signed_vma) val)
252b5132 7058 - ((bfd_signed_vma)
57e8b36a
NC		 7059 /* Offset from the start of the current section
7060 to the start of the stubs. */
9b485d32
NC		 7061 (s->output_offset
7062 /* Offset of the start of this stub from the start of the stubs. */
7063 + my_offset
7064 /* Address of the start of the current section. */
7065 + s->output_section->vma)
7066 /* The branch instruction is 4 bytes into the stub. */
7067 + 4
7068 /* ARM branches work from the pc of the instruction + 8. */
7069 + 8);
252b5132 7070
52ab56c2
PB		 7071 put_arm_insn (globals, output_bfd,
7072 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7073 s->contents + my_offset + 4);
252b5132
RH		 7074 }
7075
7076 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7077
427bfd90
NC		 7078 /* Now go back and fix up the original BL insn to point to here. */
7079 ret_offset =
7080 /* Address of where the stub is located. */
7081 (s->output_section->vma + s->output_offset + my_offset)
7082 /* Address of where the BL is located. */
57e8b36a
NC		 7083 - (input_section->output_section->vma + input_section->output_offset
7084 + offset)
427bfd90
NC		 7085 /* Addend in the relocation. */
7086 - addend
7087 /* Biassing for PC-relative addressing. */
7088 - 8;
252b5132 7089
12a0a0fd 7090 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 7091
b34976b6 7092 return TRUE;
252b5132
RH		 7093}
7094
a4fd1a8e 7095/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 7096
a4fd1a8e
PB		 7097static struct elf_link_hash_entry *
7098elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7099 const char * name,
7100 bfd * input_bfd,
7101 bfd * output_bfd,
7102 asection * sym_sec,
7103 bfd_vma val,
8029a119
NC		 7104 asection * s,
7105 char ** error_message)
252b5132 7106{
dc810e39 7107 bfd_vma my_offset;
252b5132 7108 long int ret_offset;
bcbdc74c
NC		 7109 struct elf_link_hash_entry * myh;
7110 struct elf32_arm_link_hash_table * globals;
252b5132 7111
f2a9dd69 7112 myh = find_arm_glue (info, name, error_message);
252b5132 7113 if (myh == NULL)
a4fd1a8e 7114 return NULL;
252b5132
RH		 7115
7116 globals = elf32_arm_hash_table (info);
252b5132
RH		 7117 BFD_ASSERT (globals != NULL);
7118 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7119
7120 my_offset = myh->root.u.def.value;
252b5132
RH		 7121
7122 if ((my_offset & 0x01) == 0x01)
7123 {
7124 if (sym_sec != NULL
7125 && sym_sec->owner != NULL
7126 && !INTERWORK_FLAG (sym_sec->owner))
7127 {
8f615d07 7128 (*_bfd_error_handler)
d003868e
AM		 7129 (_("%B(%s): warning: interworking not enabled.\n"
7130 " first occurrence: %B: arm call to thumb"),
7131 sym_sec->owner, input_bfd, name);
252b5132 7132 }
9b485d32 7133
252b5132
RH		 7134 --my_offset;
7135 myh->root.u.def.value = my_offset;
7136
27e55c4d
PB		 7137 if (info->shared || globals->root.is_relocatable_executable
7138 || globals->pic_veneer)
8f6277f5
PB		 7139 {
7140 /* For relocatable objects we can't use absolute addresses,
7141 so construct the address from a relative offset. */
7142 /* TODO: If the offset is small it's probably worth
7143 constructing the address with adds. */
52ab56c2
PB		 7144 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7145 s->contents + my_offset);
7146 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7147 s->contents + my_offset + 4);
7148 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7149 s->contents + my_offset + 8);
8f6277f5
PB		 7150 /* Adjust the offset by 4 for the position of the add,
7151 and 8 for the pipeline offset. */
7152 ret_offset = (val - (s->output_offset
7153 + s->output_section->vma
7154 + my_offset + 12))
7155 | 1;
7156 bfd_put_32 (output_bfd, ret_offset,
7157 s->contents + my_offset + 12);
7158 }
26079076
PB		 7159 else if (globals->use_blx)
7160 {
7161 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7162 s->contents + my_offset);
7163
7164 /* It's a thumb address. Add the low order bit. */
7165 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7166 s->contents + my_offset + 4);
7167 }
8f6277f5
PB		 7168 else
7169 {
52ab56c2
PB		 7170 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7171 s->contents + my_offset);
252b5132 7172
52ab56c2
PB		 7173 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7174 s->contents + my_offset + 4);
252b5132 7175
8f6277f5
PB		 7176 /* It's a thumb address. Add the low order bit. */
7177 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7178 s->contents + my_offset + 8);
8029a119
NC		 7179
7180 my_offset += 12;
8f6277f5 7181 }
252b5132
RH		 7182 }
7183
7184 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7185
a4fd1a8e
PB		 7186 return myh;
7187}
7188
7189/* Arm code calling a Thumb function. */
7190
7191static int
7192elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7193 const char * name,
7194 bfd * input_bfd,
7195 bfd * output_bfd,
7196 asection * input_section,
7197 bfd_byte * hit_data,
7198 asection * sym_sec,
7199 bfd_vma offset,
7200 bfd_signed_vma addend,
f2a9dd69
DJ		 7201 bfd_vma val,
7202 char **error_message)
a4fd1a8e
PB		 7203{
7204 unsigned long int tmp;
7205 bfd_vma my_offset;
7206 asection * s;
7207 long int ret_offset;
7208 struct elf_link_hash_entry * myh;
7209 struct elf32_arm_link_hash_table * globals;
7210
7211 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7212 BFD_ASSERT (globals != NULL);
7213 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7214
3d4d4302
AM		 7215 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7216 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7217 BFD_ASSERT (s != NULL);
7218 BFD_ASSERT (s->contents != NULL);
7219 BFD_ASSERT (s->output_section != NULL);
7220
7221 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7222 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7223 if (!myh)
7224 return FALSE;
7225
7226 my_offset = myh->root.u.def.value;
252b5132
RH		 7227 tmp = bfd_get_32 (input_bfd, hit_data);
7228 tmp = tmp & 0xFF000000;
7229
9b485d32 7230 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7231 ret_offset = (s->output_offset
7232 + my_offset
7233 + s->output_section->vma
7234 - (input_section->output_offset
7235 + input_section->output_section->vma
7236 + offset + addend)
7237 - 8);
9a5aca8c 7238
252b5132
RH		 7239 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7240
dc810e39 7241 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7242
b34976b6 7243 return TRUE;
252b5132
RH		 7244}
7245
a4fd1a8e
PB		 7246/* Populate Arm stub for an exported Thumb function. */
7247
7248static bfd_boolean
7249elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7250{
7251 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7252 asection * s;
7253 struct elf_link_hash_entry * myh;
7254 struct elf32_arm_link_hash_entry *eh;
7255 struct elf32_arm_link_hash_table * globals;
7256 asection *sec;
7257 bfd_vma val;
f2a9dd69 7258 char *error_message;
a4fd1a8e 7259
906e58ca 7260 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7261 /* Allocate stubs for exported Thumb functions on v4t. */
7262 if (eh->export_glue == NULL)
7263 return TRUE;
7264
7265 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7266 BFD_ASSERT (globals != NULL);
7267 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7268
3d4d4302
AM		 7269 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7270 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7271 BFD_ASSERT (s != NULL);
7272 BFD_ASSERT (s->contents != NULL);
7273 BFD_ASSERT (s->output_section != NULL);
7274
7275 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7276
7277 BFD_ASSERT (sec->output_section != NULL);
7278
a4fd1a8e
PB		 7279 val = eh->export_glue->root.u.def.value + sec->output_offset
7280 + sec->output_section->vma;
8029a119 7281
a4fd1a8e
PB		 7282 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7283 h->root.u.def.section->owner,
f2a9dd69
DJ		 7284 globals->obfd, sec, val, s,
7285 &error_message);
a4fd1a8e
PB		 7286 BFD_ASSERT (myh);
7287 return TRUE;
7288}
7289
845b51d6
PB		 7290/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7291
7292static bfd_vma
7293elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7294{
7295 bfd_byte *p;
7296 bfd_vma glue_addr;
7297 asection *s;
7298 struct elf32_arm_link_hash_table *globals;
7299
7300 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7301 BFD_ASSERT (globals != NULL);
7302 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7303
3d4d4302
AM		 7304 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7305 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 7306 BFD_ASSERT (s != NULL);
7307 BFD_ASSERT (s->contents != NULL);
7308 BFD_ASSERT (s->output_section != NULL);
7309
7310 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7311
7312 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7313
7314 if ((globals->bx_glue_offset[reg] & 1) == 0)
7315 {
7316 p = s->contents + glue_addr;
7317 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7318 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7319 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7320 globals->bx_glue_offset[reg] |= 1;
7321 }
7322
7323 return glue_addr + s->output_section->vma + s->output_offset;
7324}
7325
a4fd1a8e
PB		 7326/* Generate Arm stubs for exported Thumb symbols. */
7327static void
906e58ca 7328elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7329 struct bfd_link_info *link_info)
7330{
7331 struct elf32_arm_link_hash_table * globals;
7332
8029a119
NC		 7333 if (link_info == NULL)
7334 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7335 return;
7336
7337 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7338 if (globals == NULL)
7339 return;
7340
84c08195
PB		 7341 /* If blx is available then exported Thumb symbols are OK and there is
7342 nothing to do. */
a4fd1a8e
PB		 7343 if (globals->use_blx)
7344 return;
7345
7346 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7347 link_info);
7348}
7349
47beaa6a
RS		 7350/* Reserve space for COUNT dynamic relocations in relocation selection
7351 SRELOC. */
7352
7353static void
7354elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7355 bfd_size_type count)
7356{
7357 struct elf32_arm_link_hash_table *htab;
7358
7359 htab = elf32_arm_hash_table (info);
7360 BFD_ASSERT (htab->root.dynamic_sections_created);
7361 if (sreloc == NULL)
7362 abort ();
7363 sreloc->size += RELOC_SIZE (htab) * count;
7364}
7365
34e77a92
RS		 7366/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7367 dynamic, the relocations should go in SRELOC, otherwise they should
7368 go in the special .rel.iplt section. */
7369
7370static void
7371elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7372 bfd_size_type count)
7373{
7374 struct elf32_arm_link_hash_table *htab;
7375
7376 htab = elf32_arm_hash_table (info);
7377 if (!htab->root.dynamic_sections_created)
7378 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7379 else
7380 {
7381 BFD_ASSERT (sreloc != NULL);
7382 sreloc->size += RELOC_SIZE (htab) * count;
7383 }
7384}
7385
47beaa6a
RS		 7386/* Add relocation REL to the end of relocation section SRELOC. */
7387
7388static void
7389elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7390 asection *sreloc, Elf_Internal_Rela *rel)
7391{
7392 bfd_byte *loc;
7393 struct elf32_arm_link_hash_table *htab;
7394
7395 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7396 if (!htab->root.dynamic_sections_created
7397 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7398 sreloc = htab->root.irelplt;
47beaa6a
RS		 7399 if (sreloc == NULL)
7400 abort ();
7401 loc = sreloc->contents;
7402 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7403 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7404 abort ();
7405 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7406}
7407
34e77a92
RS		 7408/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7409 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7410 to .plt. */
7411
7412static void
7413elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7414 bfd_boolean is_iplt_entry,
7415 union gotplt_union *root_plt,
7416 struct arm_plt_info *arm_plt)
7417{
7418 struct elf32_arm_link_hash_table *htab;
7419 asection *splt;
7420 asection *sgotplt;
7421
7422 htab = elf32_arm_hash_table (info);
7423
7424 if (is_iplt_entry)
7425 {
7426 splt = htab->root.iplt;
7427 sgotplt = htab->root.igotplt;
7428
7429 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7430 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7431 }
7432 else
7433 {
7434 splt = htab->root.splt;
7435 sgotplt = htab->root.sgotplt;
7436
7437 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7438 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7439
7440 /* If this is the first .plt entry, make room for the special
7441 first entry. */
7442 if (splt->size == 0)
7443 splt->size += htab->plt_header_size;
7444 }
7445
7446 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7447 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7448 splt->size += PLT_THUMB_STUB_SIZE;
7449 root_plt->offset = splt->size;
7450 splt->size += htab->plt_entry_size;
7451
7452 if (!htab->symbian_p)
7453 {
7454 /* We also need to make an entry in the .got.plt section, which
7455 will be placed in the .got section by the linker script. */
7456 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7457 sgotplt->size += 4;
7458 }
7459}
7460
b38cadfb
NC		 7461static bfd_vma
7462arm_movw_immediate (bfd_vma value)
7463{
7464 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7465}
7466
7467static bfd_vma
7468arm_movt_immediate (bfd_vma value)
7469{
7470 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7471}
7472
34e77a92
RS		 7473/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7474 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7475 Otherwise, DYNINDX is the index of the symbol in the dynamic
7476 symbol table and SYM_VALUE is undefined.
7477
7478 ROOT_PLT points to the offset of the PLT entry from the start of its
7479 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7480 bookkeeping information. */
7481
7482static void
7483elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7484 union gotplt_union *root_plt,
7485 struct arm_plt_info *arm_plt,
7486 int dynindx, bfd_vma sym_value)
7487{
7488 struct elf32_arm_link_hash_table *htab;
7489 asection *sgot;
7490 asection *splt;
7491 asection *srel;
7492 bfd_byte *loc;
7493 bfd_vma plt_index;
7494 Elf_Internal_Rela rel;
7495 bfd_vma plt_header_size;
7496 bfd_vma got_header_size;
7497
7498 htab = elf32_arm_hash_table (info);
7499
7500 /* Pick the appropriate sections and sizes. */
7501 if (dynindx == -1)
7502 {
7503 splt = htab->root.iplt;
7504 sgot = htab->root.igotplt;
7505 srel = htab->root.irelplt;
7506
7507 /* There are no reserved entries in .igot.plt, and no special
7508 first entry in .iplt. */
7509 got_header_size = 0;
7510 plt_header_size = 0;
7511 }
7512 else
7513 {
7514 splt = htab->root.splt;
7515 sgot = htab->root.sgotplt;
7516 srel = htab->root.srelplt;
7517
7518 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7519 plt_header_size = htab->plt_header_size;
7520 }
7521 BFD_ASSERT (splt != NULL && srel != NULL);
7522
7523 /* Fill in the entry in the procedure linkage table. */
7524 if (htab->symbian_p)
7525 {
7526 BFD_ASSERT (dynindx >= 0);
7527 put_arm_insn (htab, output_bfd,
7528 elf32_arm_symbian_plt_entry[0],
7529 splt->contents + root_plt->offset);
7530 bfd_put_32 (output_bfd,
7531 elf32_arm_symbian_plt_entry[1],
7532 splt->contents + root_plt->offset + 4);
7533
7534 /* Fill in the entry in the .rel.plt section. */
7535 rel.r_offset = (splt->output_section->vma
7536 + splt->output_offset
7537 + root_plt->offset + 4);
7538 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7539
7540 /* Get the index in the procedure linkage table which
7541 corresponds to this symbol. This is the index of this symbol
7542 in all the symbols for which we are making plt entries. The
7543 first entry in the procedure linkage table is reserved. */
7544 plt_index = ((root_plt->offset - plt_header_size)
7545 / htab->plt_entry_size);
7546 }
7547 else
7548 {
7549 bfd_vma got_offset, got_address, plt_address;
7550 bfd_vma got_displacement, initial_got_entry;
7551 bfd_byte * ptr;
7552
7553 BFD_ASSERT (sgot != NULL);
7554
7555 /* Get the offset into the .(i)got.plt table of the entry that
7556 corresponds to this function. */
7557 got_offset = (arm_plt->got_offset & -2);
7558
7559 /* Get the index in the procedure linkage table which
7560 corresponds to this symbol. This is the index of this symbol
7561 in all the symbols for which we are making plt entries.
7562 After the reserved .got.plt entries, all symbols appear in
7563 the same order as in .plt. */
7564 plt_index = (got_offset - got_header_size) / 4;
7565
7566 /* Calculate the address of the GOT entry. */
7567 got_address = (sgot->output_section->vma
7568 + sgot->output_offset
7569 + got_offset);
7570
7571 /* ...and the address of the PLT entry. */
7572 plt_address = (splt->output_section->vma
7573 + splt->output_offset
7574 + root_plt->offset);
7575
7576 ptr = splt->contents + root_plt->offset;
7577 if (htab->vxworks_p && info->shared)
7578 {
7579 unsigned int i;
7580 bfd_vma val;
7581
7582 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7583 {
7584 val = elf32_arm_vxworks_shared_plt_entry[i];
7585 if (i == 2)
7586 val |= got_address - sgot->output_section->vma;
7587 if (i == 5)
7588 val |= plt_index * RELOC_SIZE (htab);
7589 if (i == 2 || i == 5)
7590 bfd_put_32 (output_bfd, val, ptr);
7591 else
7592 put_arm_insn (htab, output_bfd, val, ptr);
7593 }
7594 }
7595 else if (htab->vxworks_p)
7596 {
7597 unsigned int i;
7598 bfd_vma val;
7599
7600 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7601 {
7602 val = elf32_arm_vxworks_exec_plt_entry[i];
7603 if (i == 2)
7604 val |= got_address;
7605 if (i == 4)
7606 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7607 if (i == 5)
7608 val |= plt_index * RELOC_SIZE (htab);
7609 if (i == 2 || i == 5)
7610 bfd_put_32 (output_bfd, val, ptr);
7611 else
7612 put_arm_insn (htab, output_bfd, val, ptr);
7613 }
7614
7615 loc = (htab->srelplt2->contents
7616 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7617
7618 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7619 referencing the GOT for this PLT entry. */
7620 rel.r_offset = plt_address + 8;
7621 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7622 rel.r_addend = got_offset;
7623 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7624 loc += RELOC_SIZE (htab);
7625
7626 /* Create the R_ARM_ABS32 relocation referencing the
7627 beginning of the PLT for this GOT entry. */
7628 rel.r_offset = got_address;
7629 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7630 rel.r_addend = 0;
7631 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7632 }
b38cadfb
NC		 7633 else if (htab->nacl_p)
7634 {
7635 /* Calculate the displacement between the PLT slot and the
7636 common tail that's part of the special initial PLT slot. */
6034aab8 7637 int32_t tail_displacement
b38cadfb
NC		 7638 = ((splt->output_section->vma + splt->output_offset
7639 + ARM_NACL_PLT_TAIL_OFFSET)
7640 - (plt_address + htab->plt_entry_size + 4));
7641 BFD_ASSERT ((tail_displacement & 3) == 0);
7642 tail_displacement >>= 2;
7643
7644 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7645 || (-tail_displacement & 0xff000000) == 0);
7646
7647 /* Calculate the displacement between the PLT slot and the entry
7648 in the GOT. The offset accounts for the value produced by
7649 adding to pc in the penultimate instruction of the PLT stub. */
6034aab8
RM		 7650 got_displacement = (got_address
7651 - (plt_address + htab->plt_entry_size));
b38cadfb
NC		 7652
7653 /* NaCl does not support interworking at all. */
7654 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7655
7656 put_arm_insn (htab, output_bfd,
7657 elf32_arm_nacl_plt_entry[0]
7658 | arm_movw_immediate (got_displacement),
7659 ptr + 0);
7660 put_arm_insn (htab, output_bfd,
7661 elf32_arm_nacl_plt_entry[1]
7662 | arm_movt_immediate (got_displacement),
7663 ptr + 4);
7664 put_arm_insn (htab, output_bfd,
7665 elf32_arm_nacl_plt_entry[2],
7666 ptr + 8);
7667 put_arm_insn (htab, output_bfd,
7668 elf32_arm_nacl_plt_entry[3]
7669 | (tail_displacement & 0x00ffffff),
7670 ptr + 12);
7671 }
34e77a92
RS		 7672 else
7673 {
7674 /* Calculate the displacement between the PLT slot and the
7675 entry in the GOT. The eight-byte offset accounts for the
7676 value produced by adding to pc in the first instruction
7677 of the PLT stub. */
7678 got_displacement = got_address - (plt_address + 8);
7679
7680 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7681
7682 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7683 {
7684 put_thumb_insn (htab, output_bfd,
7685 elf32_arm_plt_thumb_stub[0], ptr - 4);
7686 put_thumb_insn (htab, output_bfd,
7687 elf32_arm_plt_thumb_stub[1], ptr - 2);
7688 }
7689
7690 put_arm_insn (htab, output_bfd,
7691 elf32_arm_plt_entry[0]
7692 | ((got_displacement & 0x0ff00000) >> 20),
7693 ptr + 0);
7694 put_arm_insn (htab, output_bfd,
7695 elf32_arm_plt_entry[1]
7696 | ((got_displacement & 0x000ff000) >> 12),
7697 ptr+ 4);
7698 put_arm_insn (htab, output_bfd,
7699 elf32_arm_plt_entry[2]
7700 | (got_displacement & 0x00000fff),
7701 ptr + 8);
7702#ifdef FOUR_WORD_PLT
7703 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7704#endif
7705 }
7706
7707 /* Fill in the entry in the .rel(a).(i)plt section. */
7708 rel.r_offset = got_address;
7709 rel.r_addend = 0;
7710 if (dynindx == -1)
7711 {
7712 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7713 The dynamic linker or static executable then calls SYM_VALUE
7714 to determine the correct run-time value of the .igot.plt entry. */
7715 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7716 initial_got_entry = sym_value;
7717 }
7718 else
7719 {
7720 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7721 initial_got_entry = (splt->output_section->vma
7722 + splt->output_offset);
7723 }
7724
7725 /* Fill in the entry in the global offset table. */
7726 bfd_put_32 (output_bfd, initial_got_entry,
7727 sgot->contents + got_offset);
7728 }
7729
7730 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7731 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7732}
7733
eb043451
PB		 7734/* Some relocations map to different relocations depending on the
7735 target. Return the real relocation. */
8029a119 7736
eb043451
PB		 7737static int
7738arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7739 int r_type)
7740{
7741 switch (r_type)
7742 {
7743 case R_ARM_TARGET1:
7744 if (globals->target1_is_rel)
7745 return R_ARM_REL32;
7746 else
7747 return R_ARM_ABS32;
7748
7749 case R_ARM_TARGET2:
7750 return globals->target2_reloc;
7751
7752 default:
7753 return r_type;
7754 }
7755}
eb043451 7756
ba93b8ac
DJ		 7757/* Return the base VMA address which should be subtracted from real addresses
7758 when resolving @dtpoff relocation.
7759 This is PT_TLS segment p_vaddr. */
7760
7761static bfd_vma
7762dtpoff_base (struct bfd_link_info *info)
7763{
7764 /* If tls_sec is NULL, we should have signalled an error already. */
7765 if (elf_hash_table (info)->tls_sec == NULL)
7766 return 0;
7767 return elf_hash_table (info)->tls_sec->vma;
7768}
7769
7770/* Return the relocation value for @tpoff relocation
7771 if STT_TLS virtual address is ADDRESS. */
7772
7773static bfd_vma
7774tpoff (struct bfd_link_info *info, bfd_vma address)
7775{
7776 struct elf_link_hash_table *htab = elf_hash_table (info);
7777 bfd_vma base;
7778
7779 /* If tls_sec is NULL, we should have signalled an error already. */
7780 if (htab->tls_sec == NULL)
7781 return 0;
7782 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7783 return address - htab->tls_sec->vma + base;
7784}
7785
00a97672
RS		 7786/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7787 VALUE is the relocation value. */
7788
7789static bfd_reloc_status_type
7790elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7791{
7792 if (value > 0xfff)
7793 return bfd_reloc_overflow;
7794
7795 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7796 bfd_put_32 (abfd, value, data);
7797 return bfd_reloc_ok;
7798}
7799
0855e32b
NS		 7800/* Handle TLS relaxations. Relaxing is possible for symbols that use
7801 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7802 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7803
7804 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7805 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7806 case of error.
7807
7808 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7809 the pre-relaxed code. It would be nice if the relocs were updated
7810 to match the optimization. */
0855e32b 7811
b38cadfb 7812static bfd_reloc_status_type
0855e32b 7813elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
b38cadfb 7814 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
0855e32b
NS		 7815 Elf_Internal_Rela *rel, unsigned long is_local)
7816{
7817 unsigned long insn;
b38cadfb 7818
0855e32b
NS		 7819 switch (ELF32_R_TYPE (rel->r_info))
7820 {
7821 default:
7822 return bfd_reloc_notsupported;
b38cadfb 7823
0855e32b
NS		 7824 case R_ARM_TLS_GOTDESC:
7825 if (is_local)
7826 insn = 0;
7827 else
7828 {
7829 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7830 if (insn & 1)
7831 insn -= 5; /* THUMB */
7832 else
7833 insn -= 8; /* ARM */
7834 }
7835 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7836 return bfd_reloc_continue;
7837
7838 case R_ARM_THM_TLS_DESCSEQ:
7839 /* Thumb insn. */
7840 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7841 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7842 {
7843 if (is_local)
7844 /* nop */
7845 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7846 }
7847 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7848 {
7849 if (is_local)
7850 /* nop */
7851 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7852 else
7853 /* ldr rx,[ry] */
7854 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7855 }
7856 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7857 {
7858 if (is_local)
7859 /* nop */
7860 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7861 else
7862 /* mov r0, rx */
7863 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7864 contents + rel->r_offset);
7865 }
7866 else
7867 {
7868 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7869 /* It's a 32 bit instruction, fetch the rest of it for
7870 error generation. */
7871 insn = (insn << 16)
7872 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7873 (*_bfd_error_handler)
7874 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7875 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7876 return bfd_reloc_notsupported;
7877 }
7878 break;
b38cadfb 7879
0855e32b
NS		 7880 case R_ARM_TLS_DESCSEQ:
7881 /* arm insn. */
7882 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7883 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7884 {
7885 if (is_local)
7886 /* mov rx, ry */
7887 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7888 contents + rel->r_offset);
7889 }
7890 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7891 {
7892 if (is_local)
7893 /* nop */
7894 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7895 else
7896 /* ldr rx,[ry] */
7897 bfd_put_32 (input_bfd, insn & 0xfffff000,
7898 contents + rel->r_offset);
7899 }
7900 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7901 {
7902 if (is_local)
7903 /* nop */
7904 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7905 else
7906 /* mov r0, rx */
7907 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7908 contents + rel->r_offset);
7909 }
7910 else
7911 {
7912 (*_bfd_error_handler)
7913 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7914 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7915 return bfd_reloc_notsupported;
7916 }
7917 break;
7918
7919 case R_ARM_TLS_CALL:
7920 /* GD->IE relaxation, turn the instruction into 'nop' or
7921 'ldr r0, [pc,r0]' */
7922 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7923 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7924 break;
b38cadfb 7925
0855e32b
NS		 7926 case R_ARM_THM_TLS_CALL:
7927 /* GD->IE relaxation */
7928 if (!is_local)
7929 /* add r0,pc; ldr r0, [r0] */
7930 insn = 0x44786800;
7931 else if (arch_has_thumb2_nop (globals))
7932 /* nop.w */
7933 insn = 0xf3af8000;
7934 else
7935 /* nop; nop */
7936 insn = 0xbf00bf00;
b38cadfb 7937
0855e32b
NS		 7938 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7939 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7940 break;
7941 }
7942 return bfd_reloc_ok;
7943}
7944
4962c51a
MS		 7945/* For a given value of n, calculate the value of G_n as required to
7946 deal with group relocations. We return it in the form of an
7947 encoded constant-and-rotation, together with the final residual. If n is
7948 specified as less than zero, then final_residual is filled with the
7949 input value and no further action is performed. */
7950
7951static bfd_vma
7952calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7953{
7954 int current_n;
7955 bfd_vma g_n;
7956 bfd_vma encoded_g_n = 0;
7957 bfd_vma residual = value; /* Also known as Y_n. */
7958
7959 for (current_n = 0; current_n <= n; current_n++)
7960 {
7961 int shift;
7962
7963 /* Calculate which part of the value to mask. */
7964 if (residual == 0)
7965 shift = 0;
7966 else
7967 {
7968 int msb;
7969
7970 /* Determine the most significant bit in the residual and
7971 align the resulting value to a 2-bit boundary. */
7972 for (msb = 30; msb >= 0; msb -= 2)
7973 if (residual & (3 << msb))
7974 break;
7975
7976 /* The desired shift is now (msb - 6), or zero, whichever
7977 is the greater. */
7978 shift = msb - 6;
7979 if (shift < 0)
7980 shift = 0;
7981 }
7982
7983 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7984 g_n = residual & (0xff << shift);
7985 encoded_g_n = (g_n >> shift)
7986 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7987
7988 /* Calculate the residual for the next time around. */
7989 residual &= ~g_n;
7990 }
7991
7992 *final_residual = residual;
7993
7994 return encoded_g_n;
7995}
7996
7997/* Given an ARM instruction, determine whether it is an ADD or a SUB.
7998 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 7999
4962c51a 8000static int
906e58ca 8001identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 8002{
8003 int opcode = insn & 0x1e00000;
8004
8005 if (opcode == 1 << 23) /* ADD */
8006 return 1;
8007
8008 if (opcode == 1 << 22) /* SUB */
8009 return -1;
8010
8011 return 0;
8012}
8013
252b5132 8014/* Perform a relocation as part of a final link. */
9b485d32 8015
252b5132 8016static bfd_reloc_status_type
57e8b36a
NC		 8017elf32_arm_final_link_relocate (reloc_howto_type * howto,
8018 bfd * input_bfd,
8019 bfd * output_bfd,
8020 asection * input_section,
8021 bfd_byte * contents,
8022 Elf_Internal_Rela * rel,
8023 bfd_vma value,
8024 struct bfd_link_info * info,
8025 asection * sym_sec,
8026 const char * sym_name,
34e77a92
RS		 8027 unsigned char st_type,
8028 enum arm_st_branch_type branch_type,
0945cdfd 8029 struct elf_link_hash_entry * h,
f2a9dd69 8030 bfd_boolean * unresolved_reloc_p,
8029a119 8031 char ** error_message)
252b5132
RH		 8032{
8033 unsigned long r_type = howto->type;
8034 unsigned long r_symndx;
8035 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 8036 bfd_vma * local_got_offsets;
0855e32b 8037 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 8038 asection * sgot;
8039 asection * splt;
252b5132 8040 asection * sreloc = NULL;
362d30a1 8041 asection * srelgot;
252b5132 8042 bfd_vma addend;
ba96a88f 8043 bfd_signed_vma signed_addend;
34e77a92
RS		 8044 unsigned char dynreloc_st_type;
8045 bfd_vma dynreloc_value;
ba96a88f 8046 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 8047 struct elf32_arm_link_hash_entry *eh;
8048 union gotplt_union *root_plt;
8049 struct arm_plt_info *arm_plt;
8050 bfd_vma plt_offset;
8051 bfd_vma gotplt_offset;
8052 bfd_boolean has_iplt_entry;
f21f3fe0 8053
9c504268 8054 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8055 if (globals == NULL)
8056 return bfd_reloc_notsupported;
9c504268 8057
0ffa91dd
NC		 8058 BFD_ASSERT (is_arm_elf (input_bfd));
8059
8060 /* Some relocation types map to different relocations depending on the
9c504268 8061 target. We pick the right one here. */
eb043451 8062 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 8063
8064 /* It is possible to have linker relaxations on some TLS access
8065 models. Update our information here. */
8066 r_type = elf32_arm_tls_transition (info, r_type, h);
8067
eb043451
PB		 8068 if (r_type != howto->type)
8069 howto = elf32_arm_howto_from_type (r_type);
9c504268 8070
cac15327
NC		 8071 /* If the start address has been set, then set the EF_ARM_HASENTRY
8072 flag. Setting this more than once is redundant, but the cost is
8073 not too high, and it keeps the code simple.
99e4ae17 8074
cac15327
NC		 8075 The test is done here, rather than somewhere else, because the
8076 start address is only set just before the final link commences.
8077
8078 Note - if the user deliberately sets a start address of 0, the
8079 flag will not be set. */
8080 if (bfd_get_start_address (output_bfd) != 0)
8081 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 8082
34e77a92 8083 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 8084 sgot = globals->root.sgot;
252b5132 8085 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 8086 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8087
34e77a92
RS		 8088 if (globals->root.dynamic_sections_created)
8089 srelgot = globals->root.srelgot;
8090 else
8091 srelgot = NULL;
8092
252b5132
RH		 8093 r_symndx = ELF32_R_SYM (rel->r_info);
8094
4e7fd91e 8095 if (globals->use_rel)
ba96a88f 8096 {
4e7fd91e
PB		 8097 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8098
8099 if (addend & ((howto->src_mask + 1) >> 1))
8100 {
8101 signed_addend = -1;
8102 signed_addend &= ~ howto->src_mask;
8103 signed_addend |= addend;
8104 }
8105 else
8106 signed_addend = addend;
ba96a88f
NC		 8107 }
8108 else
4e7fd91e 8109 addend = signed_addend = rel->r_addend;
f21f3fe0 8110
34e77a92
RS		 8111 /* Record the symbol information that should be used in dynamic
8112 relocations. */
8113 dynreloc_st_type = st_type;
8114 dynreloc_value = value;
8115 if (branch_type == ST_BRANCH_TO_THUMB)
8116 dynreloc_value |= 1;
8117
8118 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8119 VALUE appropriately for relocations that we resolve at link time. */
8120 has_iplt_entry = FALSE;
8121 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8122 && root_plt->offset != (bfd_vma) -1)
8123 {
8124 plt_offset = root_plt->offset;
8125 gotplt_offset = arm_plt->got_offset;
8126
8127 if (h == NULL || eh->is_iplt)
8128 {
8129 has_iplt_entry = TRUE;
8130 splt = globals->root.iplt;
8131
8132 /* Populate .iplt entries here, because not all of them will
8133 be seen by finish_dynamic_symbol. The lower bit is set if
8134 we have already populated the entry. */
8135 if (plt_offset & 1)
8136 plt_offset--;
8137 else
8138 {
8139 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8140 -1, dynreloc_value);
8141 root_plt->offset |= 1;
8142 }
8143
8144 /* Static relocations always resolve to the .iplt entry. */
8145 st_type = STT_FUNC;
8146 value = (splt->output_section->vma
8147 + splt->output_offset
8148 + plt_offset);
8149 branch_type = ST_BRANCH_TO_ARM;
8150
8151 /* If there are non-call relocations that resolve to the .iplt
8152 entry, then all dynamic ones must too. */
8153 if (arm_plt->noncall_refcount != 0)
8154 {
8155 dynreloc_st_type = st_type;
8156 dynreloc_value = value;
8157 }
8158 }
8159 else
8160 /* We populate the .plt entry in finish_dynamic_symbol. */
8161 splt = globals->root.splt;
8162 }
8163 else
8164 {
8165 splt = NULL;
8166 plt_offset = (bfd_vma) -1;
8167 gotplt_offset = (bfd_vma) -1;
8168 }
8169
252b5132
RH		 8170 switch (r_type)
8171 {
8172 case R_ARM_NONE:
28a094c2
DJ		 8173 /* We don't need to find a value for this symbol. It's just a
8174 marker. */
8175 *unresolved_reloc_p = FALSE;
252b5132
RH		 8176 return bfd_reloc_ok;
8177
00a97672
RS		 8178 case R_ARM_ABS12:
8179 if (!globals->vxworks_p)
8180 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8181
252b5132
RH		 8182 case R_ARM_PC24:
8183 case R_ARM_ABS32:
bb224fc3 8184 case R_ARM_ABS32_NOI:
252b5132 8185 case R_ARM_REL32:
bb224fc3 8186 case R_ARM_REL32_NOI:
5b5bb741
PB		 8187 case R_ARM_CALL:
8188 case R_ARM_JUMP24:
dfc5f959 8189 case R_ARM_XPC25:
eb043451 8190 case R_ARM_PREL31:
7359ea65 8191 case R_ARM_PLT32:
7359ea65
DJ		 8192 /* Handle relocations which should use the PLT entry. ABS32/REL32
8193 will use the symbol's value, which may point to a PLT entry, but we
8194 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8195 branches in this object should go to it, except if the PLT is too
8196 far away, in which case a long branch stub should be inserted. */
bb224fc3 8197 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 8198 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8199 && r_type != R_ARM_CALL
8200 && r_type != R_ARM_JUMP24
8201 && r_type != R_ARM_PLT32)
34e77a92 8202 && plt_offset != (bfd_vma) -1)
7359ea65 8203 {
34e77a92
RS		 8204 /* If we've created a .plt section, and assigned a PLT entry
8205 to this function, it must either be a STT_GNU_IFUNC reference
8206 or not be known to bind locally. In other cases, we should
8207 have cleared the PLT entry by now. */
8208 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8209
8210 value = (splt->output_section->vma
8211 + splt->output_offset
34e77a92 8212 + plt_offset);
0945cdfd 8213 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8214 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8215 contents, rel->r_offset, value,
00a97672 8216 rel->r_addend);
7359ea65
DJ		 8217 }
8218
67687978
PB		 8219 /* When generating a shared object or relocatable executable, these
8220 relocations are copied into the output file to be resolved at
8221 run time. */
8222 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8223 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8224 && !(globals->vxworks_p
3348747a
NS		 8225 && strcmp (input_section->output_section->name,
8226 ".tls_vars") == 0)
bb224fc3 8227 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8228 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 8229 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8230 && (h == NULL
8231 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8232 || h->root.type != bfd_link_hash_undefweak)
8233 && r_type != R_ARM_PC24
5b5bb741
PB		 8234 && r_type != R_ARM_CALL
8235 && r_type != R_ARM_JUMP24
ee06dc07 8236 && r_type != R_ARM_PREL31
7359ea65 8237 && r_type != R_ARM_PLT32)
252b5132 8238 {
947216bf 8239 Elf_Internal_Rela outrel;
b34976b6 8240 bfd_boolean skip, relocate;
f21f3fe0 8241
0945cdfd
DJ		 8242 *unresolved_reloc_p = FALSE;
8243
34e77a92 8244 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8245 {
83bac4b0
NC		 8246 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8247 ! globals->use_rel);
f21f3fe0 8248
83bac4b0 8249 if (sreloc == NULL)
252b5132 8250 return bfd_reloc_notsupported;
252b5132 8251 }
f21f3fe0 8252
b34976b6
AM		 8253 skip = FALSE;
8254 relocate = FALSE;
f21f3fe0 8255
00a97672 8256 outrel.r_addend = addend;
c629eae0
JJ		 8257 outrel.r_offset =
8258 _bfd_elf_section_offset (output_bfd, info, input_section,
8259 rel->r_offset);
8260 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8261 skip = TRUE;
0bb2d96a 8262 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8263 skip = TRUE, relocate = TRUE;
252b5132
RH		 8264 outrel.r_offset += (input_section->output_section->vma
8265 + input_section->output_offset);
f21f3fe0 8266
252b5132 8267 if (skip)
0bb2d96a 8268 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8269 else if (h != NULL
8270 && h->dynindx != -1
7359ea65 8271 && (!info->shared
5e681ec4 8272 || !info->symbolic
f5385ebf 8273 || !h->def_regular))
5e681ec4 8274 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8275 else
8276 {
a16385dc
MM		 8277 int symbol;
8278
5e681ec4 8279 /* This symbol is local, or marked to become local. */
34e77a92 8280 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8281 if (globals->symbian_p)
6366ff1e 8282 {
74541ad4
AM		 8283 asection *osec;
8284
6366ff1e
MM		 8285 /* On Symbian OS, the data segment and text segement
8286 can be relocated independently. Therefore, we
8287 must indicate the segment to which this
8288 relocation is relative. The BPABI allows us to
8289 use any symbol in the right segment; we just use
8290 the section symbol as it is convenient. (We
8291 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8292 will not appear in the dynamic symbol table.)
8293
8294 Note that the dynamic linker ignores the section
8295 symbol value, so we don't subtract osec->vma
8296 from the emitted reloc addend. */
10dbd1f3 8297 if (sym_sec)
74541ad4 8298 osec = sym_sec->output_section;
10dbd1f3 8299 else
74541ad4
AM		 8300 osec = input_section->output_section;
8301 symbol = elf_section_data (osec)->dynindx;
8302 if (symbol == 0)
8303 {
8304 struct elf_link_hash_table *htab = elf_hash_table (info);
8305
8306 if ((osec->flags & SEC_READONLY) == 0
8307 && htab->data_index_section != NULL)
8308 osec = htab->data_index_section;
8309 else
8310 osec = htab->text_index_section;
8311 symbol = elf_section_data (osec)->dynindx;
8312 }
6366ff1e
MM		 8313 BFD_ASSERT (symbol != 0);
8314 }
a16385dc
MM		 8315 else
8316 /* On SVR4-ish systems, the dynamic loader cannot
8317 relocate the text and data segments independently,
8318 so the symbol does not matter. */
8319 symbol = 0;
34e77a92
RS		 8320 if (dynreloc_st_type == STT_GNU_IFUNC)
8321 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8322 to the .iplt entry. Instead, every non-call reference
8323 must use an R_ARM_IRELATIVE relocation to obtain the
8324 correct run-time address. */
8325 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8326 else
8327 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8328 if (globals->use_rel)
8329 relocate = TRUE;
8330 else
34e77a92 8331 outrel.r_addend += dynreloc_value;
252b5132 8332 }
f21f3fe0 8333
47beaa6a 8334 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8335
f21f3fe0 8336 /* If this reloc is against an external symbol, we do not want to
252b5132 8337 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8338 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8339 if (! relocate)
8340 return bfd_reloc_ok;
9a5aca8c 8341
f21f3fe0 8342 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8343 contents, rel->r_offset,
8344 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8345 }
8346 else switch (r_type)
8347 {
00a97672
RS		 8348 case R_ARM_ABS12:
8349 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8350
dfc5f959 8351 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8352 case R_ARM_CALL:
8353 case R_ARM_JUMP24:
8029a119 8354 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8355 case R_ARM_PLT32:
906e58ca 8356 {
906e58ca
NC		 8357 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8358
dfc5f959 8359 if (r_type == R_ARM_XPC25)
252b5132 8360 {
dfc5f959
NC		 8361 /* Check for Arm calling Arm function. */
8362 /* FIXME: Should we translate the instruction into a BL
8363 instruction instead ? */
35fc36a8 8364 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8365 (*_bfd_error_handler)
8366 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8367 input_bfd,
8368 h ? h->root.root.string : "(local)");
dfc5f959 8369 }
155d87d7 8370 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8371 {
8372 /* Check for Arm calling Thumb function. */
35fc36a8 8373 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8374 {
f2a9dd69
DJ		 8375 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8376 output_bfd, input_section,
8377 hit_data, sym_sec, rel->r_offset,
8378 signed_addend, value,
8379 error_message))
8380 return bfd_reloc_ok;
8381 else
8382 return bfd_reloc_dangerous;
dfc5f959 8383 }
252b5132 8384 }
ba96a88f 8385
906e58ca 8386 /* Check if a stub has to be inserted because the
8029a119 8387 destination is too far or we are changing mode. */
155d87d7
CL		 8388 if ( r_type == R_ARM_CALL
8389 || r_type == R_ARM_JUMP24
8390 || r_type == R_ARM_PLT32)
906e58ca 8391 {
fe33d2fa
CL		 8392 enum elf32_arm_stub_type stub_type = arm_stub_none;
8393 struct elf32_arm_link_hash_entry *hash;
8394
8395 hash = (struct elf32_arm_link_hash_entry *) h;
8396 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8397 st_type, &branch_type,
8398 hash, value, sym_sec,
fe33d2fa 8399 input_bfd, sym_name);
5fa9e92f 8400
fe33d2fa 8401 if (stub_type != arm_stub_none)
906e58ca
NC		 8402 {
8403 /* The target is out of reach, so redirect the
8404 branch to the local stub for this function. */
906e58ca
NC		 8405 stub_entry = elf32_arm_get_stub_entry (input_section,
8406 sym_sec, h,
fe33d2fa
CL		 8407 rel, globals,
8408 stub_type);
9cd3e4e5
NC		 8409 {
8410 if (stub_entry != NULL)
8411 value = (stub_entry->stub_offset
8412 + stub_entry->stub_sec->output_offset
8413 + stub_entry->stub_sec->output_section->vma);
8414
8415 if (plt_offset != (bfd_vma) -1)
8416 *unresolved_reloc_p = FALSE;
8417 }
906e58ca 8418 }
fe33d2fa
CL		 8419 else
8420 {
8421 /* If the call goes through a PLT entry, make sure to
8422 check distance to the right destination address. */
34e77a92 8423 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8424 {
8425 value = (splt->output_section->vma
8426 + splt->output_offset
34e77a92 8427 + plt_offset);
fe33d2fa
CL		 8428 *unresolved_reloc_p = FALSE;
8429 /* The PLT entry is in ARM mode, regardless of the
8430 target function. */
35fc36a8 8431 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8432 }
8433 }
906e58ca
NC		 8434 }
8435
dea514f5
PB		 8436 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8437 where:
8438 S is the address of the symbol in the relocation.
8439 P is address of the instruction being relocated.
8440 A is the addend (extracted from the instruction) in bytes.
8441
8442 S is held in 'value'.
8443 P is the base address of the section containing the
8444 instruction plus the offset of the reloc into that
8445 section, ie:
8446 (input_section->output_section->vma +
8447 input_section->output_offset +
8448 rel->r_offset).
8449 A is the addend, converted into bytes, ie:
8450 (signed_addend * 4)
8451
8452 Note: None of these operations have knowledge of the pipeline
8453 size of the processor, thus it is up to the assembler to
8454 encode this information into the addend. */
8455 value -= (input_section->output_section->vma
8456 + input_section->output_offset);
8457 value -= rel->r_offset;
4e7fd91e
PB		 8458 if (globals->use_rel)
8459 value += (signed_addend << howto->size);
8460 else
8461 /* RELA addends do not have to be adjusted by howto->size. */
8462 value += signed_addend;
23080146 8463
dcb5e6e6
NC		 8464 signed_addend = value;
8465 signed_addend >>= howto->rightshift;
9a5aca8c 8466
5ab79981 8467 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8468 the next instruction unless a PLT entry will be created.
77b4f08f 8469 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8470 The jump to the next instruction is optimized as a NOP depending
8471 on the architecture. */
ffcb4889 8472 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8473 && plt_offset == (bfd_vma) -1)
77b4f08f 8474 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8475 {
cd1dac3d
DG		 8476 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8477
8478 if (arch_has_arm_nop (globals))
8479 value |= 0x0320f000;
8480 else
8481 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8482 }
8483 else
59f2c4e7 8484 {
9b485d32 8485 /* Perform a signed range check. */
dcb5e6e6 8486 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8487 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8488 return bfd_reloc_overflow;
9a5aca8c 8489
5ab79981 8490 addend = (value & 2);
39b41c9c 8491
5ab79981
PB		 8492 value = (signed_addend & howto->dst_mask)
8493 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8494
5ab79981
PB		 8495 if (r_type == R_ARM_CALL)
8496 {
155d87d7 8497 /* Set the H bit in the BLX instruction. */
35fc36a8 8498 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8499 {
8500 if (addend)
8501 value |= (1 << 24);
8502 else
8503 value &= ~(bfd_vma)(1 << 24);
8504 }
8505
5ab79981 8506 /* Select the correct instruction (BL or BLX). */
906e58ca 8507 /* Only if we are not handling a BL to a stub. In this
8029a119 8508 case, mode switching is performed by the stub. */
35fc36a8 8509 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8510 value |= (1 << 28);
63e1a0fc 8511 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8512 {
8513 value &= ~(bfd_vma)(1 << 28);
8514 value |= (1 << 24);
8515 }
39b41c9c
PB		 8516 }
8517 }
906e58ca 8518 }
252b5132 8519 break;
f21f3fe0 8520
252b5132
RH		 8521 case R_ARM_ABS32:
8522 value += addend;
35fc36a8 8523 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8524 value |= 1;
8525 break;
f21f3fe0 8526
bb224fc3
MS		 8527 case R_ARM_ABS32_NOI:
8528 value += addend;
8529 break;
8530
252b5132 8531 case R_ARM_REL32:
a8bc6c78 8532 value += addend;
35fc36a8 8533 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8534 value |= 1;
252b5132 8535 value -= (input_section->output_section->vma
62efb346 8536 + input_section->output_offset + rel->r_offset);
252b5132 8537 break;
eb043451 8538
bb224fc3
MS		 8539 case R_ARM_REL32_NOI:
8540 value += addend;
8541 value -= (input_section->output_section->vma
8542 + input_section->output_offset + rel->r_offset);
8543 break;
8544
eb043451
PB		 8545 case R_ARM_PREL31:
8546 value -= (input_section->output_section->vma
8547 + input_section->output_offset + rel->r_offset);
8548 value += signed_addend;
8549 if (! h || h->root.type != bfd_link_hash_undefweak)
8550 {
8029a119 8551 /* Check for overflow. */
eb043451
PB		 8552 if ((value ^ (value >> 1)) & (1 << 30))
8553 return bfd_reloc_overflow;
8554 }
8555 value &= 0x7fffffff;
8556 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8557 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8558 value |= 1;
8559 break;
252b5132 8560 }
f21f3fe0 8561
252b5132
RH		 8562 bfd_put_32 (input_bfd, value, hit_data);
8563 return bfd_reloc_ok;
8564
8565 case R_ARM_ABS8:
8566 value += addend;
4e67d4ca
DG		 8567
8568 /* There is no way to tell whether the user intended to use a signed or
8569 unsigned addend. When checking for overflow we accept either,
8570 as specified by the AAELF. */
8571 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8572 return bfd_reloc_overflow;
8573
8574 bfd_put_8 (input_bfd, value, hit_data);
8575 return bfd_reloc_ok;
8576
8577 case R_ARM_ABS16:
8578 value += addend;
8579
4e67d4ca
DG		 8580 /* See comment for R_ARM_ABS8. */
8581 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8582 return bfd_reloc_overflow;
8583
8584 bfd_put_16 (input_bfd, value, hit_data);
8585 return bfd_reloc_ok;
8586
252b5132 8587 case R_ARM_THM_ABS5:
9b485d32 8588 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8589 if (globals->use_rel)
8590 {
8591 /* Need to refetch addend. */
8592 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8593 /* ??? Need to determine shift amount from operand size. */
8594 addend >>= howto->rightshift;
8595 }
252b5132
RH		 8596 value += addend;
8597
8598 /* ??? Isn't value unsigned? */
8599 if ((long) value > 0x1f || (long) value < -0x10)
8600 return bfd_reloc_overflow;
8601
8602 /* ??? Value needs to be properly shifted into place first. */
8603 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8604 bfd_put_16 (input_bfd, value, hit_data);
8605 return bfd_reloc_ok;
8606
2cab6cc3
MS		 8607 case R_ARM_THM_ALU_PREL_11_0:
8608 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8609 {
8610 bfd_vma insn;
8611 bfd_signed_vma relocation;
8612
8613 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8614 | bfd_get_16 (input_bfd, hit_data + 2);
8615
8616 if (globals->use_rel)
8617 {
8618 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8619 | ((insn & (1 << 26)) >> 15);
8620 if (insn & 0xf00000)
8621 signed_addend = -signed_addend;
8622 }
8623
8624 relocation = value + signed_addend;
79f08007
YZ		 8625 relocation -= Pa (input_section->output_section->vma
8626 + input_section->output_offset
8627 + rel->r_offset);
2cab6cc3
MS		 8628
8629 value = abs (relocation);
8630
8631 if (value >= 0x1000)
8632 return bfd_reloc_overflow;
8633
8634 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8635 | ((value & 0x700) << 4)
8636 | ((value & 0x800) << 15);
8637 if (relocation < 0)
8638 insn |= 0xa00000;
8639
8640 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8641 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8642
8643 return bfd_reloc_ok;
8644 }
8645
e1ec24c6
NC		 8646 case R_ARM_THM_PC8:
8647 /* PR 10073: This reloc is not generated by the GNU toolchain,
8648 but it is supported for compatibility with third party libraries
8649 generated by other compilers, specifically the ARM/IAR. */
8650 {
8651 bfd_vma insn;
8652 bfd_signed_vma relocation;
8653
8654 insn = bfd_get_16 (input_bfd, hit_data);
8655
8656 if (globals->use_rel)
79f08007 8657 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
e1ec24c6
NC		 8658
8659 relocation = value + addend;
79f08007
YZ		 8660 relocation -= Pa (input_section->output_section->vma
8661 + input_section->output_offset
8662 + rel->r_offset);
e1ec24c6
NC		 8663
8664 value = abs (relocation);
8665
8666 /* We do not check for overflow of this reloc. Although strictly
8667 speaking this is incorrect, it appears to be necessary in order
8668 to work with IAR generated relocs. Since GCC and GAS do not
8669 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8670 a problem for them. */
8671 value &= 0x3fc;
8672
8673 insn = (insn & 0xff00) | (value >> 2);
8674
8675 bfd_put_16 (input_bfd, insn, hit_data);
8676
8677 return bfd_reloc_ok;
8678 }
8679
2cab6cc3
MS		 8680 case R_ARM_THM_PC12:
8681 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8682 {
8683 bfd_vma insn;
8684 bfd_signed_vma relocation;
8685
8686 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8687 | bfd_get_16 (input_bfd, hit_data + 2);
8688
8689 if (globals->use_rel)
8690 {
8691 signed_addend = insn & 0xfff;
8692 if (!(insn & (1 << 23)))
8693 signed_addend = -signed_addend;
8694 }
8695
8696 relocation = value + signed_addend;
79f08007
YZ		 8697 relocation -= Pa (input_section->output_section->vma
8698 + input_section->output_offset
8699 + rel->r_offset);
2cab6cc3
MS		 8700
8701 value = abs (relocation);
8702
8703 if (value >= 0x1000)
8704 return bfd_reloc_overflow;
8705
8706 insn = (insn & 0xff7ff000) | value;
8707 if (relocation >= 0)
8708 insn |= (1 << 23);
8709
8710 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8711 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8712
8713 return bfd_reloc_ok;
8714 }
8715
dfc5f959 8716 case R_ARM_THM_XPC22:
c19d1205 8717 case R_ARM_THM_CALL:
bd97cb95 8718 case R_ARM_THM_JUMP24:
dfc5f959 8719 /* Thumb BL (branch long instruction). */
252b5132 8720 {
b34976b6 8721 bfd_vma relocation;
e95de063 8722 bfd_vma reloc_sign;
b34976b6
AM		 8723 bfd_boolean overflow = FALSE;
8724 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8725 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8726 bfd_signed_vma reloc_signed_max;
8727 bfd_signed_vma reloc_signed_min;
b34976b6 8728 bfd_vma check;
252b5132 8729 bfd_signed_vma signed_check;
e95de063 8730 int bitsize;
cd1dac3d 8731 const int thumb2 = using_thumb2 (globals);
252b5132 8732
5ab79981 8733 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8734 the next instruction unless a PLT entry will be created.
8735 The jump to the next instruction is optimized as a NOP.W for
8736 Thumb-2 enabled architectures. */
19540007 8737 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8738 && plt_offset == (bfd_vma) -1)
5ab79981 8739 {
cd1dac3d
DG		 8740 if (arch_has_thumb2_nop (globals))
8741 {
8742 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8743 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8744 }
8745 else
8746 {
8747 bfd_put_16 (input_bfd, 0xe000, hit_data);
8748 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8749 }
5ab79981
PB		 8750 return bfd_reloc_ok;
8751 }
8752
e95de063
MS		 8753 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8754 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8755 if (globals->use_rel)
8756 {
e95de063
MS		 8757 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8758 bfd_vma upper = upper_insn & 0x3ff;
8759 bfd_vma lower = lower_insn & 0x7ff;
8760 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8761 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8762 bfd_vma i1 = j1 ^ s ? 0 : 1;
8763 bfd_vma i2 = j2 ^ s ? 0 : 1;
8764
8765 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8766 /* Sign extend. */
8767 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8768
4e7fd91e
PB		 8769 signed_addend = addend;
8770 }
cb1afa5c 8771
dfc5f959
NC		 8772 if (r_type == R_ARM_THM_XPC22)
8773 {
8774 /* Check for Thumb to Thumb call. */
8775 /* FIXME: Should we translate the instruction into a BL
8776 instruction instead ? */
35fc36a8 8777 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8778 (*_bfd_error_handler)
8779 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8780 input_bfd,
8781 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8782 }
8783 else
252b5132 8784 {
dfc5f959
NC		 8785 /* If it is not a call to Thumb, assume call to Arm.
8786 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8787 function call at all, but rather a long jump. Calls through
8788 the PLT do not require stubs. */
34e77a92 8789 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8790 {
bd97cb95 8791 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8792 {
8793 /* Convert BL to BLX. */
8794 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8795 }
155d87d7
CL		 8796 else if (( r_type != R_ARM_THM_CALL)
8797 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8798 {
8799 if (elf32_thumb_to_arm_stub
8800 (info, sym_name, input_bfd, output_bfd, input_section,
8801 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8802 error_message))
8803 return bfd_reloc_ok;
8804 else
8805 return bfd_reloc_dangerous;
8806 }
da5938a2 8807 }
35fc36a8
RS		 8808 else if (branch_type == ST_BRANCH_TO_THUMB
8809 && globals->use_blx
bd97cb95 8810 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8811 {
8812 /* Make sure this is a BL. */
8813 lower_insn |= 0x1800;
8814 }
252b5132 8815 }
f21f3fe0 8816
fe33d2fa 8817 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8818 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8819 {
8820 /* Check if a stub has to be inserted because the destination
8029a119 8821 is too far. */
fe33d2fa
CL		 8822 struct elf32_arm_stub_hash_entry *stub_entry;
8823 struct elf32_arm_link_hash_entry *hash;
8824
8825 hash = (struct elf32_arm_link_hash_entry *) h;
8826
8827 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8828 st_type, &branch_type,
8829 hash, value, sym_sec,
fe33d2fa
CL		 8830 input_bfd, sym_name);
8831
8832 if (stub_type != arm_stub_none)
906e58ca
NC		 8833 {
8834 /* The target is out of reach or we are changing modes, so
8835 redirect the branch to the local stub for this
8836 function. */
8837 stub_entry = elf32_arm_get_stub_entry (input_section,
8838 sym_sec, h,
fe33d2fa
CL		 8839 rel, globals,
8840 stub_type);
906e58ca 8841 if (stub_entry != NULL)
9cd3e4e5
NC		 8842 {
8843 value = (stub_entry->stub_offset
8844 + stub_entry->stub_sec->output_offset
8845 + stub_entry->stub_sec->output_section->vma);
8846
8847 if (plt_offset != (bfd_vma) -1)
8848 *unresolved_reloc_p = FALSE;
8849 }
906e58ca 8850
f4ac8484 8851 /* If this call becomes a call to Arm, force BLX. */
155d87d7 8852 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 8853 {
8854 if ((stub_entry
8855 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 8856 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 8857 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8858 }
906e58ca
NC		 8859 }
8860 }
8861
fe33d2fa 8862 /* Handle calls via the PLT. */
34e77a92 8863 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8864 {
8865 value = (splt->output_section->vma
8866 + splt->output_offset
34e77a92 8867 + plt_offset);
fe33d2fa
CL		 8868
8869 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8870 {
8871 /* If the Thumb BLX instruction is available, convert
8872 the BL to a BLX instruction to call the ARM-mode
8873 PLT entry. */
8874 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8875 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8876 }
8877 else
8878 {
8879 /* Target the Thumb stub before the ARM PLT entry. */
8880 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8881 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8882 }
8883 *unresolved_reloc_p = FALSE;
8884 }
8885
ba96a88f 8886 relocation = value + signed_addend;
f21f3fe0 8887
252b5132 8888 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8889 + input_section->output_offset
8890 + rel->r_offset);
9a5aca8c 8891
252b5132
RH		 8892 check = relocation >> howto->rightshift;
8893
8894 /* If this is a signed value, the rightshift just dropped
8895 leading 1 bits (assuming twos complement). */
8896 if ((bfd_signed_vma) relocation >= 0)
8897 signed_check = check;
8898 else
8899 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8900
e95de063
MS		 8901 /* Calculate the permissable maximum and minimum values for
8902 this relocation according to whether we're relocating for
8903 Thumb-2 or not. */
8904 bitsize = howto->bitsize;
8905 if (!thumb2)
8906 bitsize -= 2;
f6ebfac0 8907 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8908 reloc_signed_min = ~reloc_signed_max;
8909
252b5132 8910 /* Assumes two's complement. */
ba96a88f 8911 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8912 overflow = TRUE;
252b5132 8913
bd97cb95 8914 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8915 /* For a BLX instruction, make sure that the relocation is rounded up
8916 to a word boundary. This follows the semantics of the instruction
8917 which specifies that bit 1 of the target address will come from bit
8918 1 of the base address. */
8919 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8920
e95de063
MS		 8921 /* Put RELOCATION back into the insn. Assumes two's complement.
8922 We use the Thumb-2 encoding, which is safe even if dealing with
8923 a Thumb-1 instruction by virtue of our overflow check above. */
8924 reloc_sign = (signed_check < 0) ? 1 : 0;
8925 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8926 | ((relocation >> 12) & 0x3ff)
8927 | (reloc_sign << 10);
906e58ca 8928 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 8929 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8930 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8931 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8932
252b5132
RH		 8933 /* Put the relocated value back in the object file: */
8934 bfd_put_16 (input_bfd, upper_insn, hit_data);
8935 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8936
8937 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8938 }
8939 break;
8940
c19d1205
ZW		 8941 case R_ARM_THM_JUMP19:
8942 /* Thumb32 conditional branch instruction. */
8943 {
8944 bfd_vma relocation;
8945 bfd_boolean overflow = FALSE;
8946 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8947 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8948 bfd_signed_vma reloc_signed_max = 0xffffe;
8949 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8950 bfd_signed_vma signed_check;
8951
8952 /* Need to refetch the addend, reconstruct the top three bits,
8953 and squish the two 11 bit pieces together. */
8954 if (globals->use_rel)
8955 {
8956 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 8957 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 8958 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8959 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8960 bfd_vma lower = (lower_insn & 0x07ff);
8961
a00a1f35
MS		 8962 upper |= J1 << 6;
8963 upper |= J2 << 7;
8964 upper |= (!S) << 8;
c19d1205
ZW		 8965 upper -= 0x0100; /* Sign extend. */
8966
8967 addend = (upper << 12) | (lower << 1);
8968 signed_addend = addend;
8969 }
8970
bd97cb95 8971 /* Handle calls via the PLT. */
34e77a92 8972 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 8973 {
8974 value = (splt->output_section->vma
8975 + splt->output_offset
34e77a92 8976 + plt_offset);
bd97cb95
DJ		 8977 /* Target the Thumb stub before the ARM PLT entry. */
8978 value -= PLT_THUMB_STUB_SIZE;
8979 *unresolved_reloc_p = FALSE;
8980 }
8981
c19d1205
ZW		 8982 /* ??? Should handle interworking? GCC might someday try to
8983 use this for tail calls. */
8984
8985 relocation = value + signed_addend;
8986 relocation -= (input_section->output_section->vma
8987 + input_section->output_offset
8988 + rel->r_offset);
a00a1f35 8989 signed_check = (bfd_signed_vma) relocation;
c19d1205 8990
c19d1205
ZW		 8991 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8992 overflow = TRUE;
8993
8994 /* Put RELOCATION back into the insn. */
8995 {
8996 bfd_vma S = (relocation & 0x00100000) >> 20;
8997 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8998 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8999 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9000 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9001
a00a1f35 9002 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 9003 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9004 }
9005
9006 /* Put the relocated value back in the object file: */
9007 bfd_put_16 (input_bfd, upper_insn, hit_data);
9008 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9009
9010 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9011 }
9012
9013 case R_ARM_THM_JUMP11:
9014 case R_ARM_THM_JUMP8:
9015 case R_ARM_THM_JUMP6:
51c5503b
NC		 9016 /* Thumb B (branch) instruction). */
9017 {
6cf9e9fe 9018 bfd_signed_vma relocation;
51c5503b
NC		 9019 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9020 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 9021 bfd_signed_vma signed_check;
9022
c19d1205
ZW		 9023 /* CZB cannot jump backward. */
9024 if (r_type == R_ARM_THM_JUMP6)
9025 reloc_signed_min = 0;
9026
4e7fd91e 9027 if (globals->use_rel)
6cf9e9fe 9028 {
4e7fd91e
PB		 9029 /* Need to refetch addend. */
9030 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9031 if (addend & ((howto->src_mask + 1) >> 1))
9032 {
9033 signed_addend = -1;
9034 signed_addend &= ~ howto->src_mask;
9035 signed_addend |= addend;
9036 }
9037 else
9038 signed_addend = addend;
9039 /* The value in the insn has been right shifted. We need to
9040 undo this, so that we can perform the address calculation
9041 in terms of bytes. */
9042 signed_addend <<= howto->rightshift;
6cf9e9fe 9043 }
6cf9e9fe 9044 relocation = value + signed_addend;
51c5503b
NC		 9045
9046 relocation -= (input_section->output_section->vma
9047 + input_section->output_offset
9048 + rel->r_offset);
9049
6cf9e9fe
NC		 9050 relocation >>= howto->rightshift;
9051 signed_check = relocation;
c19d1205
ZW		 9052
9053 if (r_type == R_ARM_THM_JUMP6)
9054 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9055 else
9056 relocation &= howto->dst_mask;
51c5503b 9057 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 9058
51c5503b
NC		 9059 bfd_put_16 (input_bfd, relocation, hit_data);
9060
9061 /* Assumes two's complement. */
9062 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9063 return bfd_reloc_overflow;
9064
9065 return bfd_reloc_ok;
9066 }
cedb70c5 9067
8375c36b
PB		 9068 case R_ARM_ALU_PCREL7_0:
9069 case R_ARM_ALU_PCREL15_8:
9070 case R_ARM_ALU_PCREL23_15:
9071 {
9072 bfd_vma insn;
9073 bfd_vma relocation;
9074
9075 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 9076 if (globals->use_rel)
9077 {
9078 /* Extract the addend. */
9079 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9080 signed_addend = addend;
9081 }
8375c36b
PB		 9082 relocation = value + signed_addend;
9083
9084 relocation -= (input_section->output_section->vma
9085 + input_section->output_offset
9086 + rel->r_offset);
9087 insn = (insn & ~0xfff)
9088 | ((howto->bitpos << 7) & 0xf00)
9089 | ((relocation >> howto->bitpos) & 0xff);
9090 bfd_put_32 (input_bfd, value, hit_data);
9091 }
9092 return bfd_reloc_ok;
9093
252b5132
RH		 9094 case R_ARM_GNU_VTINHERIT:
9095 case R_ARM_GNU_VTENTRY:
9096 return bfd_reloc_ok;
9097
c19d1205 9098 case R_ARM_GOTOFF32:
252b5132
RH		 9099 /* Relocation is relative to the start of the
9100 global offset table. */
9101
9102 BFD_ASSERT (sgot != NULL);
9103 if (sgot == NULL)
9104 return bfd_reloc_notsupported;
9a5aca8c 9105
cedb70c5 9106 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 9107 address by one, so that attempts to call the function pointer will
9108 correctly interpret it as Thumb code. */
35fc36a8 9109 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 9110 value += 1;
9111
252b5132
RH		 9112 /* Note that sgot->output_offset is not involved in this
9113 calculation. We always want the start of .got. If we
9114 define _GLOBAL_OFFSET_TABLE in a different way, as is
9115 permitted by the ABI, we might have to change this
9b485d32 9116 calculation. */
252b5132 9117 value -= sgot->output_section->vma;
f21f3fe0 9118 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9119 contents, rel->r_offset, value,
00a97672 9120 rel->r_addend);
252b5132
RH		 9121
9122 case R_ARM_GOTPC:
a7c10850 9123 /* Use global offset table as symbol value. */
252b5132 9124 BFD_ASSERT (sgot != NULL);
f21f3fe0 9125
252b5132
RH		 9126 if (sgot == NULL)
9127 return bfd_reloc_notsupported;
9128
0945cdfd 9129 *unresolved_reloc_p = FALSE;
252b5132 9130 value = sgot->output_section->vma;
f21f3fe0 9131 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9132 contents, rel->r_offset, value,
00a97672 9133 rel->r_addend);
f21f3fe0 9134
252b5132 9135 case R_ARM_GOT32:
eb043451 9136 case R_ARM_GOT_PREL:
252b5132 9137 /* Relocation is to the entry for this symbol in the
9b485d32 9138 global offset table. */
252b5132
RH		 9139 if (sgot == NULL)
9140 return bfd_reloc_notsupported;
f21f3fe0 9141
34e77a92
RS		 9142 if (dynreloc_st_type == STT_GNU_IFUNC
9143 && plt_offset != (bfd_vma) -1
9144 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9145 {
9146 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9147 symbol, and the relocation resolves directly to the runtime
9148 target rather than to the .iplt entry. This means that any
9149 .got entry would be the same value as the .igot.plt entry,
9150 so there's no point creating both. */
9151 sgot = globals->root.igotplt;
9152 value = sgot->output_offset + gotplt_offset;
9153 }
9154 else if (h != NULL)
252b5132
RH		 9155 {
9156 bfd_vma off;
f21f3fe0 9157
252b5132
RH		 9158 off = h->got.offset;
9159 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9160 if ((off & 1) != 0)
252b5132 9161 {
b436d854
RS		 9162 /* We have already processsed one GOT relocation against
9163 this symbol. */
9164 off &= ~1;
9165 if (globals->root.dynamic_sections_created
9166 && !SYMBOL_REFERENCES_LOCAL (info, h))
9167 *unresolved_reloc_p = FALSE;
9168 }
9169 else
9170 {
9171 Elf_Internal_Rela outrel;
9172
9173 if (!SYMBOL_REFERENCES_LOCAL (info, h))
9174 {
9175 /* If the symbol doesn't resolve locally in a static
9176 object, we have an undefined reference. If the
9177 symbol doesn't resolve locally in a dynamic object,
9178 it should be resolved by the dynamic linker. */
9179 if (globals->root.dynamic_sections_created)
9180 {
9181 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9182 *unresolved_reloc_p = FALSE;
9183 }
9184 else
9185 outrel.r_info = 0;
9186 outrel.r_addend = 0;
9187 }
252b5132
RH		 9188 else
9189 {
34e77a92
RS		 9190 if (dynreloc_st_type == STT_GNU_IFUNC)
9191 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9192 else if (info->shared)
9193 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9194 else
9195 outrel.r_info = 0;
9196 outrel.r_addend = dynreloc_value;
b436d854 9197 }
ee29b9fb 9198
b436d854
RS		 9199 /* The GOT entry is initialized to zero by default.
9200 See if we should install a different value. */
9201 if (outrel.r_addend != 0
9202 && (outrel.r_info == 0 || globals->use_rel))
9203 {
9204 bfd_put_32 (output_bfd, outrel.r_addend,
9205 sgot->contents + off);
9206 outrel.r_addend = 0;
252b5132 9207 }
f21f3fe0 9208
b436d854
RS		 9209 if (outrel.r_info != 0)
9210 {
9211 outrel.r_offset = (sgot->output_section->vma
9212 + sgot->output_offset
9213 + off);
9214 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9215 }
9216 h->got.offset |= 1;
9217 }
252b5132
RH		 9218 value = sgot->output_offset + off;
9219 }
9220 else
9221 {
9222 bfd_vma off;
f21f3fe0 9223
252b5132
RH		 9224 BFD_ASSERT (local_got_offsets != NULL &&
9225 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9226
252b5132 9227 off = local_got_offsets[r_symndx];
f21f3fe0 9228
252b5132
RH		 9229 /* The offset must always be a multiple of 4. We use the
9230 least significant bit to record whether we have already
9b485d32 9231 generated the necessary reloc. */
252b5132
RH		 9232 if ((off & 1) != 0)
9233 off &= ~1;
9234 else
9235 {
00a97672 9236 if (globals->use_rel)
34e77a92 9237 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9238
34e77a92 9239 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9240 {
947216bf 9241 Elf_Internal_Rela outrel;
f21f3fe0 9242
34e77a92 9243 outrel.r_addend = addend + dynreloc_value;
252b5132 9244 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9245 + sgot->output_offset
252b5132 9246 + off);
34e77a92
RS		 9247 if (dynreloc_st_type == STT_GNU_IFUNC)
9248 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9249 else
9250 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9251 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9252 }
f21f3fe0 9253
252b5132
RH		 9254 local_got_offsets[r_symndx] |= 1;
9255 }
f21f3fe0 9256
252b5132
RH		 9257 value = sgot->output_offset + off;
9258 }
eb043451
PB		 9259 if (r_type != R_ARM_GOT32)
9260 value += sgot->output_section->vma;
9a5aca8c 9261
f21f3fe0 9262 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9263 contents, rel->r_offset, value,
00a97672 9264 rel->r_addend);
f21f3fe0 9265
ba93b8ac
DJ		 9266 case R_ARM_TLS_LDO32:
9267 value = value - dtpoff_base (info);
9268
9269 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9270 contents, rel->r_offset, value,
9271 rel->r_addend);
ba93b8ac
DJ		 9272
9273 case R_ARM_TLS_LDM32:
9274 {
9275 bfd_vma off;
9276
362d30a1 9277 if (sgot == NULL)
ba93b8ac
DJ		 9278 abort ();
9279
9280 off = globals->tls_ldm_got.offset;
9281
9282 if ((off & 1) != 0)
9283 off &= ~1;
9284 else
9285 {
9286 /* If we don't know the module number, create a relocation
9287 for it. */
9288 if (info->shared)
9289 {
9290 Elf_Internal_Rela outrel;
ba93b8ac 9291
362d30a1 9292 if (srelgot == NULL)
ba93b8ac
DJ		 9293 abort ();
9294
00a97672 9295 outrel.r_addend = 0;
362d30a1
RS		 9296 outrel.r_offset = (sgot->output_section->vma
9297 + sgot->output_offset + off);
ba93b8ac
DJ		 9298 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9299
00a97672
RS		 9300 if (globals->use_rel)
9301 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9302 sgot->contents + off);
ba93b8ac 9303
47beaa6a 9304 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9305 }
9306 else
362d30a1 9307 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9308
9309 globals->tls_ldm_got.offset |= 1;
9310 }
9311
362d30a1 9312 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9313 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9314
9315 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9316 contents, rel->r_offset, value,
00a97672 9317 rel->r_addend);
ba93b8ac
DJ		 9318 }
9319
0855e32b
NS		 9320 case R_ARM_TLS_CALL:
9321 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9322 case R_ARM_TLS_GD32:
9323 case R_ARM_TLS_IE32:
0855e32b
NS		 9324 case R_ARM_TLS_GOTDESC:
9325 case R_ARM_TLS_DESCSEQ:
9326 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9327 {
0855e32b
NS		 9328 bfd_vma off, offplt;
9329 int indx = 0;
ba93b8ac
DJ		 9330 char tls_type;
9331
0855e32b 9332 BFD_ASSERT (sgot != NULL);
ba93b8ac 9333
ba93b8ac
DJ		 9334 if (h != NULL)
9335 {
9336 bfd_boolean dyn;
9337 dyn = globals->root.dynamic_sections_created;
9338 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9339 && (!info->shared
9340 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9341 {
9342 *unresolved_reloc_p = FALSE;
9343 indx = h->dynindx;
9344 }
9345 off = h->got.offset;
0855e32b 9346 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9347 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9348 }
9349 else
9350 {
0855e32b 9351 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9352 off = local_got_offsets[r_symndx];
0855e32b 9353 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9354 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9355 }
9356
0855e32b 9357 /* Linker relaxations happens from one of the
b38cadfb 9358 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
0855e32b 9359 if (ELF32_R_TYPE(rel->r_info) != r_type)
b38cadfb 9360 tls_type = GOT_TLS_IE;
0855e32b
NS		 9361
9362 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9363
9364 if ((off & 1) != 0)
9365 off &= ~1;
9366 else
9367 {
9368 bfd_boolean need_relocs = FALSE;
9369 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9370 int cur_off = off;
9371
9372 /* The GOT entries have not been initialized yet. Do it
9373 now, and emit any relocations. If both an IE GOT and a
9374 GD GOT are necessary, we emit the GD first. */
9375
9376 if ((info->shared || indx != 0)
9377 && (h == NULL
9378 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9379 || h->root.type != bfd_link_hash_undefweak))
9380 {
9381 need_relocs = TRUE;
0855e32b 9382 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9383 }
9384
0855e32b
NS		 9385 if (tls_type & GOT_TLS_GDESC)
9386 {
47beaa6a
RS		 9387 bfd_byte *loc;
9388
0855e32b
NS		 9389 /* We should have relaxed, unless this is an undefined
9390 weak symbol. */
9391 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9392 || info->shared);
9393 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9394 <= globals->root.sgotplt->size);
9395
9396 outrel.r_addend = 0;
9397 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9398 + globals->root.sgotplt->output_offset
9399 + offplt
9400 + globals->sgotplt_jump_table_size);
b38cadfb 9401
0855e32b
NS		 9402 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9403 sreloc = globals->root.srelplt;
9404 loc = sreloc->contents;
9405 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9406 BFD_ASSERT (loc + RELOC_SIZE (globals)
9407 <= sreloc->contents + sreloc->size);
9408
9409 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9410
9411 /* For globals, the first word in the relocation gets
9412 the relocation index and the top bit set, or zero,
9413 if we're binding now. For locals, it gets the
9414 symbol's offset in the tls section. */
9415 bfd_put_32 (output_bfd,
9416 !h ? value - elf_hash_table (info)->tls_sec->vma
9417 : info->flags & DF_BIND_NOW ? 0
9418 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
b38cadfb
NC		 9419 globals->root.sgotplt->contents + offplt
9420 + globals->sgotplt_jump_table_size);
9421
0855e32b
NS		 9422 /* Second word in the relocation is always zero. */
9423 bfd_put_32 (output_bfd, 0,
b38cadfb
NC		 9424 globals->root.sgotplt->contents + offplt
9425 + globals->sgotplt_jump_table_size + 4);
0855e32b 9426 }
ba93b8ac
DJ		 9427 if (tls_type & GOT_TLS_GD)
9428 {
9429 if (need_relocs)
9430 {
00a97672 9431 outrel.r_addend = 0;
362d30a1
RS		 9432 outrel.r_offset = (sgot->output_section->vma
9433 + sgot->output_offset
00a97672 9434 + cur_off);
ba93b8ac 9435 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9436
00a97672
RS		 9437 if (globals->use_rel)
9438 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9439 sgot->contents + cur_off);
00a97672 9440
47beaa6a 9441 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9442
9443 if (indx == 0)
9444 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9445 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9446 else
9447 {
00a97672 9448 outrel.r_addend = 0;
ba93b8ac
DJ		 9449 outrel.r_info = ELF32_R_INFO (indx,
9450 R_ARM_TLS_DTPOFF32);
9451 outrel.r_offset += 4;
00a97672
RS		 9452
9453 if (globals->use_rel)
9454 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9455 sgot->contents + cur_off + 4);
00a97672 9456
47beaa6a
RS		 9457 elf32_arm_add_dynreloc (output_bfd, info,
9458 srelgot, &outrel);
ba93b8ac
DJ		 9459 }
9460 }
9461 else
9462 {
9463 /* If we are not emitting relocations for a
9464 general dynamic reference, then we must be in a
9465 static link or an executable link with the
9466 symbol binding locally. Mark it as belonging
9467 to module 1, the executable. */
9468 bfd_put_32 (output_bfd, 1,
362d30a1 9469 sgot->contents + cur_off);
ba93b8ac 9470 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9471 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9472 }
9473
9474 cur_off += 8;
9475 }
9476
9477 if (tls_type & GOT_TLS_IE)
9478 {
9479 if (need_relocs)
9480 {
00a97672
RS		 9481 if (indx == 0)
9482 outrel.r_addend = value - dtpoff_base (info);
9483 else
9484 outrel.r_addend = 0;
362d30a1
RS		 9485 outrel.r_offset = (sgot->output_section->vma
9486 + sgot->output_offset
ba93b8ac
DJ		 9487 + cur_off);
9488 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9489
00a97672
RS		 9490 if (globals->use_rel)
9491 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9492 sgot->contents + cur_off);
ba93b8ac 9493
47beaa6a 9494 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9495 }
9496 else
9497 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9498 sgot->contents + cur_off);
ba93b8ac
DJ		 9499 cur_off += 4;
9500 }
9501
9502 if (h != NULL)
9503 h->got.offset |= 1;
9504 else
9505 local_got_offsets[r_symndx] |= 1;
9506 }
9507
9508 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9509 off += 8;
0855e32b
NS		 9510 else if (tls_type & GOT_TLS_GDESC)
9511 off = offplt;
9512
9513 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9514 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9515 {
9516 bfd_signed_vma offset;
12352d3f
PB		 9517 /* TLS stubs are arm mode. The original symbol is a
9518 data object, so branch_type is bogus. */
9519 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9520 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9521 = arm_type_of_stub (info, input_section, rel,
9522 st_type, &branch_type,
0855e32b
NS		 9523 (struct elf32_arm_link_hash_entry *)h,
9524 globals->tls_trampoline, globals->root.splt,
9525 input_bfd, sym_name);
9526
9527 if (stub_type != arm_stub_none)
9528 {
9529 struct elf32_arm_stub_hash_entry *stub_entry
9530 = elf32_arm_get_stub_entry
9531 (input_section, globals->root.splt, 0, rel,
9532 globals, stub_type);
9533 offset = (stub_entry->stub_offset
9534 + stub_entry->stub_sec->output_offset
9535 + stub_entry->stub_sec->output_section->vma);
9536 }
9537 else
9538 offset = (globals->root.splt->output_section->vma
9539 + globals->root.splt->output_offset
9540 + globals->tls_trampoline);
9541
9542 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9543 {
9544 unsigned long inst;
b38cadfb
NC		 9545
9546 offset -= (input_section->output_section->vma
9547 + input_section->output_offset
9548 + rel->r_offset + 8);
0855e32b
NS		 9549
9550 inst = offset >> 2;
9551 inst &= 0x00ffffff;
9552 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9553 }
9554 else
9555 {
9556 /* Thumb blx encodes the offset in a complicated
9557 fashion. */
9558 unsigned upper_insn, lower_insn;
9559 unsigned neg;
9560
b38cadfb
NC		 9561 offset -= (input_section->output_section->vma
9562 + input_section->output_offset
0855e32b 9563 + rel->r_offset + 4);
b38cadfb 9564
12352d3f
PB		 9565 if (stub_type != arm_stub_none
9566 && arm_stub_is_thumb (stub_type))
9567 {
9568 lower_insn = 0xd000;
9569 }
9570 else
9571 {
9572 lower_insn = 0xc000;
9573 /* Round up the offset to a word boundary */
9574 offset = (offset + 2) & ~2;
9575 }
9576
0855e32b
NS		 9577 neg = offset < 0;
9578 upper_insn = (0xf000
9579 | ((offset >> 12) & 0x3ff)
9580 | (neg << 10));
12352d3f 9581 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9582 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9583 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9584 bfd_put_16 (input_bfd, upper_insn, hit_data);
9585 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9586 return bfd_reloc_ok;
9587 }
9588 }
9589 /* These relocations needs special care, as besides the fact
9590 they point somewhere in .gotplt, the addend must be
9591 adjusted accordingly depending on the type of instruction
9592 we refer to */
9593 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9594 {
9595 unsigned long data, insn;
9596 unsigned thumb;
b38cadfb 9597
0855e32b
NS		 9598 data = bfd_get_32 (input_bfd, hit_data);
9599 thumb = data & 1;
9600 data &= ~1u;
b38cadfb 9601
0855e32b
NS		 9602 if (thumb)
9603 {
9604 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9605 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9606 insn = (insn << 16)
9607 | bfd_get_16 (input_bfd,
9608 contents + rel->r_offset - data + 2);
9609 if ((insn & 0xf800c000) == 0xf000c000)
9610 /* bl/blx */
9611 value = -6;
9612 else if ((insn & 0xffffff00) == 0x4400)
9613 /* add */
9614 value = -5;
9615 else
9616 {
9617 (*_bfd_error_handler)
9618 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9619 input_bfd, input_section,
9620 (unsigned long)rel->r_offset, insn);
9621 return bfd_reloc_notsupported;
9622 }
9623 }
9624 else
9625 {
9626 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9627
9628 switch (insn >> 24)
9629 {
9630 case 0xeb: /* bl */
9631 case 0xfa: /* blx */
9632 value = -4;
9633 break;
9634
9635 case 0xe0: /* add */
9636 value = -8;
9637 break;
b38cadfb 9638
0855e32b
NS		 9639 default:
9640 (*_bfd_error_handler)
9641 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9642 input_bfd, input_section,
9643 (unsigned long)rel->r_offset, insn);
9644 return bfd_reloc_notsupported;
9645 }
9646 }
b38cadfb 9647
0855e32b
NS		 9648 value += ((globals->root.sgotplt->output_section->vma
9649 + globals->root.sgotplt->output_offset + off)
9650 - (input_section->output_section->vma
9651 + input_section->output_offset
9652 + rel->r_offset)
9653 + globals->sgotplt_jump_table_size);
9654 }
9655 else
9656 value = ((globals->root.sgot->output_section->vma
9657 + globals->root.sgot->output_offset + off)
9658 - (input_section->output_section->vma
9659 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9660
9661 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9662 contents, rel->r_offset, value,
00a97672 9663 rel->r_addend);
ba93b8ac
DJ		 9664 }
9665
9666 case R_ARM_TLS_LE32:
9ec0c936 9667 if (info->shared && !info->pie)
ba93b8ac
DJ		 9668 {
9669 (*_bfd_error_handler)
9670 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9671 input_bfd, input_section,
9672 (long) rel->r_offset, howto->name);
46691134 9673 return bfd_reloc_notsupported;
ba93b8ac
DJ		 9674 }
9675 else
9676 value = tpoff (info, value);
906e58ca 9677
ba93b8ac 9678 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9679 contents, rel->r_offset, value,
9680 rel->r_addend);
ba93b8ac 9681
319850b4
JB		 9682 case R_ARM_V4BX:
9683 if (globals->fix_v4bx)
845b51d6
PB		 9684 {
9685 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9686
845b51d6
PB		 9687 /* Ensure that we have a BX instruction. */
9688 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9689
845b51d6
PB		 9690 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9691 {
9692 /* Branch to veneer. */
9693 bfd_vma glue_addr;
9694 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9695 glue_addr -= input_section->output_section->vma
9696 + input_section->output_offset
9697 + rel->r_offset + 8;
9698 insn = (insn & 0xf0000000) | 0x0a000000
9699 | ((glue_addr >> 2) & 0x00ffffff);
9700 }
9701 else
9702 {
9703 /* Preserve Rm (lowest four bits) and the condition code
9704 (highest four bits). Other bits encode MOV PC,Rm. */
9705 insn = (insn & 0xf000000f) | 0x01a0f000;
9706 }
319850b4 9707
845b51d6
PB		 9708 bfd_put_32 (input_bfd, insn, hit_data);
9709 }
319850b4
JB		 9710 return bfd_reloc_ok;
9711
b6895b4f
PB		 9712 case R_ARM_MOVW_ABS_NC:
9713 case R_ARM_MOVT_ABS:
9714 case R_ARM_MOVW_PREL_NC:
9715 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9716 /* Until we properly support segment-base-relative addressing then
9717 we assume the segment base to be zero, as for the group relocations.
9718 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9719 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9720 case R_ARM_MOVW_BREL_NC:
9721 case R_ARM_MOVW_BREL:
9722 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9723 {
9724 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9725
9726 if (globals->use_rel)
9727 {
9728 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9729 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9730 }
92f5d02b 9731
b6895b4f 9732 value += signed_addend;
b6895b4f
PB		 9733
9734 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9735 value -= (input_section->output_section->vma
9736 + input_section->output_offset + rel->r_offset);
9737
92f5d02b
MS		 9738 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9739 return bfd_reloc_overflow;
9740
35fc36a8 9741 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9742 value |= 1;
9743
9744 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9745 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9746 value >>= 16;
9747
9748 insn &= 0xfff0f000;
9749 insn |= value & 0xfff;
9750 insn |= (value & 0xf000) << 4;
9751 bfd_put_32 (input_bfd, insn, hit_data);
9752 }
9753 return bfd_reloc_ok;
9754
9755 case R_ARM_THM_MOVW_ABS_NC:
9756 case R_ARM_THM_MOVT_ABS:
9757 case R_ARM_THM_MOVW_PREL_NC:
9758 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9759 /* Until we properly support segment-base-relative addressing then
9760 we assume the segment base to be zero, as for the above relocations.
9761 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9762 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9763 as R_ARM_THM_MOVT_ABS. */
9764 case R_ARM_THM_MOVW_BREL_NC:
9765 case R_ARM_THM_MOVW_BREL:
9766 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9767 {
9768 bfd_vma insn;
906e58ca 9769
b6895b4f
PB		 9770 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9771 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9772
9773 if (globals->use_rel)
9774 {
9775 addend = ((insn >> 4) & 0xf000)
9776 | ((insn >> 15) & 0x0800)
9777 | ((insn >> 4) & 0x0700)
9778 | (insn & 0x00ff);
39623e12 9779 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9780 }
92f5d02b 9781
b6895b4f 9782 value += signed_addend;
b6895b4f
PB		 9783
9784 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9785 value -= (input_section->output_section->vma
9786 + input_section->output_offset + rel->r_offset);
9787
92f5d02b
MS		 9788 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9789 return bfd_reloc_overflow;
9790
35fc36a8 9791 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9792 value |= 1;
9793
9794 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9795 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9796 value >>= 16;
9797
9798 insn &= 0xfbf08f00;
9799 insn |= (value & 0xf000) << 4;
9800 insn |= (value & 0x0800) << 15;
9801 insn |= (value & 0x0700) << 4;
9802 insn |= (value & 0x00ff);
9803
9804 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9805 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9806 }
9807 return bfd_reloc_ok;
9808
4962c51a
MS		 9809 case R_ARM_ALU_PC_G0_NC:
9810 case R_ARM_ALU_PC_G1_NC:
9811 case R_ARM_ALU_PC_G0:
9812 case R_ARM_ALU_PC_G1:
9813 case R_ARM_ALU_PC_G2:
9814 case R_ARM_ALU_SB_G0_NC:
9815 case R_ARM_ALU_SB_G1_NC:
9816 case R_ARM_ALU_SB_G0:
9817 case R_ARM_ALU_SB_G1:
9818 case R_ARM_ALU_SB_G2:
9819 {
9820 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9821 bfd_vma pc = input_section->output_section->vma
9822 + input_section->output_offset + rel->r_offset;
9823 /* sb should be the origin of the *segment* containing the symbol.
9824 It is not clear how to obtain this OS-dependent value, so we
9825 make an arbitrary choice of zero. */
9826 bfd_vma sb = 0;
9827 bfd_vma residual;
9828 bfd_vma g_n;
9829 bfd_signed_vma signed_value;
9830 int group = 0;
9831
9832 /* Determine which group of bits to select. */
9833 switch (r_type)
9834 {
9835 case R_ARM_ALU_PC_G0_NC:
9836 case R_ARM_ALU_PC_G0:
9837 case R_ARM_ALU_SB_G0_NC:
9838 case R_ARM_ALU_SB_G0:
9839 group = 0;
9840 break;
9841
9842 case R_ARM_ALU_PC_G1_NC:
9843 case R_ARM_ALU_PC_G1:
9844 case R_ARM_ALU_SB_G1_NC:
9845 case R_ARM_ALU_SB_G1:
9846 group = 1;
9847 break;
9848
9849 case R_ARM_ALU_PC_G2:
9850 case R_ARM_ALU_SB_G2:
9851 group = 2;
9852 break;
9853
9854 default:
906e58ca 9855 abort ();
4962c51a
MS		 9856 }
9857
9858 /* If REL, extract the addend from the insn. If RELA, it will
9859 have already been fetched for us. */
9860 if (globals->use_rel)
9861 {
9862 int negative;
9863 bfd_vma constant = insn & 0xff;
9864 bfd_vma rotation = (insn & 0xf00) >> 8;
9865
9866 if (rotation == 0)
9867 signed_addend = constant;
9868 else
9869 {
9870 /* Compensate for the fact that in the instruction, the
9871 rotation is stored in multiples of 2 bits. */
9872 rotation *= 2;
9873
9874 /* Rotate "constant" right by "rotation" bits. */
9875 signed_addend = (constant >> rotation) |
9876 (constant << (8 * sizeof (bfd_vma) - rotation));
9877 }
9878
9879 /* Determine if the instruction is an ADD or a SUB.
9880 (For REL, this determines the sign of the addend.) */
9881 negative = identify_add_or_sub (insn);
9882 if (negative == 0)
9883 {
9884 (*_bfd_error_handler)
9885 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9886 input_bfd, input_section,
9887 (long) rel->r_offset, howto->name);
906e58ca 9888 return bfd_reloc_overflow;
4962c51a
MS		 9889 }
9890
9891 signed_addend *= negative;
9892 }
9893
9894 /* Compute the value (X) to go in the place. */
9895 if (r_type == R_ARM_ALU_PC_G0_NC
9896 || r_type == R_ARM_ALU_PC_G1_NC
9897 || r_type == R_ARM_ALU_PC_G0
9898 || r_type == R_ARM_ALU_PC_G1
9899 || r_type == R_ARM_ALU_PC_G2)
9900 /* PC relative. */
9901 signed_value = value - pc + signed_addend;
9902 else
9903 /* Section base relative. */
9904 signed_value = value - sb + signed_addend;
9905
9906 /* If the target symbol is a Thumb function, then set the
9907 Thumb bit in the address. */
35fc36a8 9908 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 9909 signed_value |= 1;
9910
9911 /* Calculate the value of the relevant G_n, in encoded
9912 constant-with-rotation format. */
9913 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9914 &residual);
9915
9916 /* Check for overflow if required. */
9917 if ((r_type == R_ARM_ALU_PC_G0
9918 || r_type == R_ARM_ALU_PC_G1
9919 || r_type == R_ARM_ALU_PC_G2
9920 || r_type == R_ARM_ALU_SB_G0
9921 || r_type == R_ARM_ALU_SB_G1
9922 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9923 {
9924 (*_bfd_error_handler)
9925 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9926 input_bfd, input_section,
9927 (long) rel->r_offset, abs (signed_value), howto->name);
9928 return bfd_reloc_overflow;
9929 }
9930
9931 /* Mask out the value and the ADD/SUB part of the opcode; take care
9932 not to destroy the S bit. */
9933 insn &= 0xff1ff000;
9934
9935 /* Set the opcode according to whether the value to go in the
9936 place is negative. */
9937 if (signed_value < 0)
9938 insn |= 1 << 22;
9939 else
9940 insn |= 1 << 23;
9941
9942 /* Encode the offset. */
9943 insn |= g_n;
9944
9945 bfd_put_32 (input_bfd, insn, hit_data);
9946 }
9947 return bfd_reloc_ok;
9948
9949 case R_ARM_LDR_PC_G0:
9950 case R_ARM_LDR_PC_G1:
9951 case R_ARM_LDR_PC_G2:
9952 case R_ARM_LDR_SB_G0:
9953 case R_ARM_LDR_SB_G1:
9954 case R_ARM_LDR_SB_G2:
9955 {
9956 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9957 bfd_vma pc = input_section->output_section->vma
9958 + input_section->output_offset + rel->r_offset;
9959 bfd_vma sb = 0; /* See note above. */
9960 bfd_vma residual;
9961 bfd_signed_vma signed_value;
9962 int group = 0;
9963
9964 /* Determine which groups of bits to calculate. */
9965 switch (r_type)
9966 {
9967 case R_ARM_LDR_PC_G0:
9968 case R_ARM_LDR_SB_G0:
9969 group = 0;
9970 break;
9971
9972 case R_ARM_LDR_PC_G1:
9973 case R_ARM_LDR_SB_G1:
9974 group = 1;
9975 break;
9976
9977 case R_ARM_LDR_PC_G2:
9978 case R_ARM_LDR_SB_G2:
9979 group = 2;
9980 break;
9981
9982 default:
906e58ca 9983 abort ();
4962c51a
MS		 9984 }
9985
9986 /* If REL, extract the addend from the insn. If RELA, it will
9987 have already been fetched for us. */
9988 if (globals->use_rel)
9989 {
9990 int negative = (insn & (1 << 23)) ? 1 : -1;
9991 signed_addend = negative * (insn & 0xfff);
9992 }
9993
9994 /* Compute the value (X) to go in the place. */
9995 if (r_type == R_ARM_LDR_PC_G0
9996 || r_type == R_ARM_LDR_PC_G1
9997 || r_type == R_ARM_LDR_PC_G2)
9998 /* PC relative. */
9999 signed_value = value - pc + signed_addend;
10000 else
10001 /* Section base relative. */
10002 signed_value = value - sb + signed_addend;
10003
10004 /* Calculate the value of the relevant G_{n-1} to obtain
10005 the residual at that stage. */
10006 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10007
10008 /* Check for overflow. */
10009 if (residual >= 0x1000)
10010 {
10011 (*_bfd_error_handler)
10012 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10013 input_bfd, input_section,
10014 (long) rel->r_offset, abs (signed_value), howto->name);
10015 return bfd_reloc_overflow;
10016 }
10017
10018 /* Mask out the value and U bit. */
10019 insn &= 0xff7ff000;
10020
10021 /* Set the U bit if the value to go in the place is non-negative. */
10022 if (signed_value >= 0)
10023 insn |= 1 << 23;
10024
10025 /* Encode the offset. */
10026 insn |= residual;
10027
10028 bfd_put_32 (input_bfd, insn, hit_data);
10029 }
10030 return bfd_reloc_ok;
10031
10032 case R_ARM_LDRS_PC_G0:
10033 case R_ARM_LDRS_PC_G1:
10034 case R_ARM_LDRS_PC_G2:
10035 case R_ARM_LDRS_SB_G0:
10036 case R_ARM_LDRS_SB_G1:
10037 case R_ARM_LDRS_SB_G2:
10038 {
10039 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10040 bfd_vma pc = input_section->output_section->vma
10041 + input_section->output_offset + rel->r_offset;
10042 bfd_vma sb = 0; /* See note above. */
10043 bfd_vma residual;
10044 bfd_signed_vma signed_value;
10045 int group = 0;
10046
10047 /* Determine which groups of bits to calculate. */
10048 switch (r_type)
10049 {
10050 case R_ARM_LDRS_PC_G0:
10051 case R_ARM_LDRS_SB_G0:
10052 group = 0;
10053 break;
10054
10055 case R_ARM_LDRS_PC_G1:
10056 case R_ARM_LDRS_SB_G1:
10057 group = 1;
10058 break;
10059
10060 case R_ARM_LDRS_PC_G2:
10061 case R_ARM_LDRS_SB_G2:
10062 group = 2;
10063 break;
10064
10065 default:
906e58ca 10066 abort ();
4962c51a
MS		 10067 }
10068
10069 /* If REL, extract the addend from the insn. If RELA, it will
10070 have already been fetched for us. */
10071 if (globals->use_rel)
10072 {
10073 int negative = (insn & (1 << 23)) ? 1 : -1;
10074 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10075 }
10076
10077 /* Compute the value (X) to go in the place. */
10078 if (r_type == R_ARM_LDRS_PC_G0
10079 || r_type == R_ARM_LDRS_PC_G1
10080 || r_type == R_ARM_LDRS_PC_G2)
10081 /* PC relative. */
10082 signed_value = value - pc + signed_addend;
10083 else
10084 /* Section base relative. */
10085 signed_value = value - sb + signed_addend;
10086
10087 /* Calculate the value of the relevant G_{n-1} to obtain
10088 the residual at that stage. */
10089 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10090
10091 /* Check for overflow. */
10092 if (residual >= 0x100)
10093 {
10094 (*_bfd_error_handler)
10095 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10096 input_bfd, input_section,
10097 (long) rel->r_offset, abs (signed_value), howto->name);
10098 return bfd_reloc_overflow;
10099 }
10100
10101 /* Mask out the value and U bit. */
10102 insn &= 0xff7ff0f0;
10103
10104 /* Set the U bit if the value to go in the place is non-negative. */
10105 if (signed_value >= 0)
10106 insn |= 1 << 23;
10107
10108 /* Encode the offset. */
10109 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10110
10111 bfd_put_32 (input_bfd, insn, hit_data);
10112 }
10113 return bfd_reloc_ok;
10114
10115 case R_ARM_LDC_PC_G0:
10116 case R_ARM_LDC_PC_G1:
10117 case R_ARM_LDC_PC_G2:
10118 case R_ARM_LDC_SB_G0:
10119 case R_ARM_LDC_SB_G1:
10120 case R_ARM_LDC_SB_G2:
10121 {
10122 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10123 bfd_vma pc = input_section->output_section->vma
10124 + input_section->output_offset + rel->r_offset;
10125 bfd_vma sb = 0; /* See note above. */
10126 bfd_vma residual;
10127 bfd_signed_vma signed_value;
10128 int group = 0;
10129
10130 /* Determine which groups of bits to calculate. */
10131 switch (r_type)
10132 {
10133 case R_ARM_LDC_PC_G0:
10134 case R_ARM_LDC_SB_G0:
10135 group = 0;
10136 break;
10137
10138 case R_ARM_LDC_PC_G1:
10139 case R_ARM_LDC_SB_G1:
10140 group = 1;
10141 break;
10142
10143 case R_ARM_LDC_PC_G2:
10144 case R_ARM_LDC_SB_G2:
10145 group = 2;
10146 break;
10147
10148 default:
906e58ca 10149 abort ();
4962c51a
MS		 10150 }
10151
10152 /* If REL, extract the addend from the insn. If RELA, it will
10153 have already been fetched for us. */
10154 if (globals->use_rel)
10155 {
10156 int negative = (insn & (1 << 23)) ? 1 : -1;
10157 signed_addend = negative * ((insn & 0xff) << 2);
10158 }
10159
10160 /* Compute the value (X) to go in the place. */
10161 if (r_type == R_ARM_LDC_PC_G0
10162 || r_type == R_ARM_LDC_PC_G1
10163 || r_type == R_ARM_LDC_PC_G2)
10164 /* PC relative. */
10165 signed_value = value - pc + signed_addend;
10166 else
10167 /* Section base relative. */
10168 signed_value = value - sb + signed_addend;
10169
10170 /* Calculate the value of the relevant G_{n-1} to obtain
10171 the residual at that stage. */
10172 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10173
10174 /* Check for overflow. (The absolute value to go in the place must be
10175 divisible by four and, after having been divided by four, must
10176 fit in eight bits.) */
10177 if ((residual & 0x3) != 0 || residual >= 0x400)
10178 {
10179 (*_bfd_error_handler)
10180 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10181 input_bfd, input_section,
10182 (long) rel->r_offset, abs (signed_value), howto->name);
10183 return bfd_reloc_overflow;
10184 }
10185
10186 /* Mask out the value and U bit. */
10187 insn &= 0xff7fff00;
10188
10189 /* Set the U bit if the value to go in the place is non-negative. */
10190 if (signed_value >= 0)
10191 insn |= 1 << 23;
10192
10193 /* Encode the offset. */
10194 insn |= residual >> 2;
10195
10196 bfd_put_32 (input_bfd, insn, hit_data);
10197 }
10198 return bfd_reloc_ok;
10199
252b5132
RH		 10200 default:
10201 return bfd_reloc_notsupported;
10202 }
10203}
10204
98c1d4aa
NC		 10205/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10206static void
57e8b36a
NC		 10207arm_add_to_rel (bfd * abfd,
10208 bfd_byte * address,
10209 reloc_howto_type * howto,
10210 bfd_signed_vma increment)
98c1d4aa 10211{
98c1d4aa
NC		 10212 bfd_signed_vma addend;
10213
bd97cb95
DJ		 10214 if (howto->type == R_ARM_THM_CALL
10215 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10216 {
9a5aca8c
AM		 10217 int upper_insn, lower_insn;
10218 int upper, lower;
98c1d4aa 10219
9a5aca8c
AM		 10220 upper_insn = bfd_get_16 (abfd, address);
10221 lower_insn = bfd_get_16 (abfd, address + 2);
10222 upper = upper_insn & 0x7ff;
10223 lower = lower_insn & 0x7ff;
10224
10225 addend = (upper << 12) | (lower << 1);
ddda4409 10226 addend += increment;
9a5aca8c 10227 addend >>= 1;
98c1d4aa 10228
9a5aca8c
AM		 10229 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10230 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10231
dc810e39
AM		 10232 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10233 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10234 }
10235 else
10236 {
10237 bfd_vma contents;
10238
10239 contents = bfd_get_32 (abfd, address);
10240
10241 /* Get the (signed) value from the instruction. */
10242 addend = contents & howto->src_mask;
10243 if (addend & ((howto->src_mask + 1) >> 1))
10244 {
10245 bfd_signed_vma mask;
10246
10247 mask = -1;
10248 mask &= ~ howto->src_mask;
10249 addend |= mask;
10250 }
10251
10252 /* Add in the increment, (which is a byte value). */
10253 switch (howto->type)
10254 {
10255 default:
10256 addend += increment;
10257 break;
10258
10259 case R_ARM_PC24:
c6596c5e 10260 case R_ARM_PLT32:
5b5bb741
PB		 10261 case R_ARM_CALL:
10262 case R_ARM_JUMP24:
9a5aca8c 10263 addend <<= howto->size;
dc810e39 10264 addend += increment;
9a5aca8c
AM		 10265
10266 /* Should we check for overflow here ? */
10267
10268 /* Drop any undesired bits. */
10269 addend >>= howto->rightshift;
10270 break;
10271 }
10272
10273 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10274
10275 bfd_put_32 (abfd, contents, address);
ddda4409 10276 }
98c1d4aa 10277}
252b5132 10278
ba93b8ac
DJ		 10279#define IS_ARM_TLS_RELOC(R_TYPE) \
10280 ((R_TYPE) == R_ARM_TLS_GD32 \
10281 || (R_TYPE) == R_ARM_TLS_LDO32 \
10282 || (R_TYPE) == R_ARM_TLS_LDM32 \
10283 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10284 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10285 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10286 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10287 || (R_TYPE) == R_ARM_TLS_IE32 \
10288 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10289
10290/* Specific set of relocations for the gnu tls dialect. */
10291#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10292 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10293 || (R_TYPE) == R_ARM_TLS_CALL \
10294 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10295 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10296 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10297
252b5132 10298/* Relocate an ARM ELF section. */
906e58ca 10299
b34976b6 10300static bfd_boolean
57e8b36a
NC		 10301elf32_arm_relocate_section (bfd * output_bfd,
10302 struct bfd_link_info * info,
10303 bfd * input_bfd,
10304 asection * input_section,
10305 bfd_byte * contents,
10306 Elf_Internal_Rela * relocs,
10307 Elf_Internal_Sym * local_syms,
10308 asection ** local_sections)
252b5132 10309{
b34976b6
AM		 10310 Elf_Internal_Shdr *symtab_hdr;
10311 struct elf_link_hash_entry **sym_hashes;
10312 Elf_Internal_Rela *rel;
10313 Elf_Internal_Rela *relend;
10314 const char *name;
b32d3aa2 10315 struct elf32_arm_link_hash_table * globals;
252b5132 10316
4e7fd91e 10317 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10318 if (globals == NULL)
10319 return FALSE;
b491616a 10320
0ffa91dd 10321 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10322 sym_hashes = elf_sym_hashes (input_bfd);
10323
10324 rel = relocs;
10325 relend = relocs + input_section->reloc_count;
10326 for (; rel < relend; rel++)
10327 {
ba96a88f
NC		 10328 int r_type;
10329 reloc_howto_type * howto;
10330 unsigned long r_symndx;
10331 Elf_Internal_Sym * sym;
10332 asection * sec;
252b5132 10333 struct elf_link_hash_entry * h;
ba96a88f
NC		 10334 bfd_vma relocation;
10335 bfd_reloc_status_type r;
10336 arelent bfd_reloc;
ba93b8ac 10337 char sym_type;
0945cdfd 10338 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10339 char *error_message = NULL;
f21f3fe0 10340
252b5132 10341 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10342 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10343 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10344
ba96a88f
NC		 10345 if ( r_type == R_ARM_GNU_VTENTRY
10346 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 10347 continue;
10348
b32d3aa2 10349 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10350 howto = bfd_reloc.howto;
252b5132 10351
252b5132
RH		 10352 h = NULL;
10353 sym = NULL;
10354 sec = NULL;
9b485d32 10355
252b5132
RH		 10356 if (r_symndx < symtab_hdr->sh_info)
10357 {
10358 sym = local_syms + r_symndx;
ba93b8ac 10359 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10360 sec = local_sections[r_symndx];
ffcb4889
NS		 10361
10362 /* An object file might have a reference to a local
10363 undefined symbol. This is a daft object file, but we
10364 should at least do something about it. V4BX & NONE
10365 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10366 allowed to use the undefined symbol, so allow those.
10367 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10368 if (r_type != R_ARM_V4BX
10369 && r_type != R_ARM_NONE
77b4f08f 10370 && r_symndx != STN_UNDEF
ffcb4889
NS		 10371 && bfd_is_und_section (sec)
10372 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10373 {
10374 if (!info->callbacks->undefined_symbol
10375 (info, bfd_elf_string_from_elf_section
10376 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10377 input_bfd, input_section,
10378 rel->r_offset, TRUE))
10379 return FALSE;
10380 }
b38cadfb 10381
4e7fd91e 10382 if (globals->use_rel)
f8df10f4 10383 {
4e7fd91e
PB		 10384 relocation = (sec->output_section->vma
10385 + sec->output_offset
10386 + sym->st_value);
ab96bf03
AM		 10387 if (!info->relocatable
10388 && (sec->flags & SEC_MERGE)
10389 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10390 {
4e7fd91e
PB		 10391 asection *msec;
10392 bfd_vma addend, value;
10393
39623e12 10394 switch (r_type)
4e7fd91e 10395 {
39623e12
PB		 10396 case R_ARM_MOVW_ABS_NC:
10397 case R_ARM_MOVT_ABS:
10398 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10399 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10400 addend = (addend ^ 0x8000) - 0x8000;
10401 break;
f8df10f4 10402
39623e12
PB		 10403 case R_ARM_THM_MOVW_ABS_NC:
10404 case R_ARM_THM_MOVT_ABS:
10405 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10406 << 16;
10407 value |= bfd_get_16 (input_bfd,
10408 contents + rel->r_offset + 2);
10409 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10410 | ((value & 0x04000000) >> 15);
10411 addend = (addend ^ 0x8000) - 0x8000;
10412 break;
f8df10f4 10413
39623e12
PB		 10414 default:
10415 if (howto->rightshift
10416 || (howto->src_mask & (howto->src_mask + 1)))
10417 {
10418 (*_bfd_error_handler)
10419 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10420 input_bfd, input_section,
10421 (long) rel->r_offset, howto->name);
10422 return FALSE;
10423 }
10424
10425 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10426
10427 /* Get the (signed) value from the instruction. */
10428 addend = value & howto->src_mask;
10429 if (addend & ((howto->src_mask + 1) >> 1))
10430 {
10431 bfd_signed_vma mask;
10432
10433 mask = -1;
10434 mask &= ~ howto->src_mask;
10435 addend |= mask;
10436 }
10437 break;
4e7fd91e 10438 }
39623e12 10439
4e7fd91e
PB		 10440 msec = sec;
10441 addend =
10442 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10443 - relocation;
10444 addend += msec->output_section->vma + msec->output_offset;
39623e12 10445
cc643b88 10446 /* Cases here must match those in the preceding
39623e12
PB		 10447 switch statement. */
10448 switch (r_type)
10449 {
10450 case R_ARM_MOVW_ABS_NC:
10451 case R_ARM_MOVT_ABS:
10452 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10453 | (addend & 0xfff);
10454 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10455 break;
10456
10457 case R_ARM_THM_MOVW_ABS_NC:
10458 case R_ARM_THM_MOVT_ABS:
10459 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10460 | (addend & 0xff) | ((addend & 0x0800) << 15);
10461 bfd_put_16 (input_bfd, value >> 16,
10462 contents + rel->r_offset);
10463 bfd_put_16 (input_bfd, value,
10464 contents + rel->r_offset + 2);
10465 break;
10466
10467 default:
10468 value = (value & ~ howto->dst_mask)
10469 | (addend & howto->dst_mask);
10470 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10471 break;
10472 }
f8df10f4 10473 }
f8df10f4 10474 }
4e7fd91e
PB		 10475 else
10476 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10477 }
10478 else
10479 {
560e09e9 10480 bfd_boolean warned;
560e09e9 10481
b2a8e766
AM		 10482 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10483 r_symndx, symtab_hdr, sym_hashes,
10484 h, sec, relocation,
10485 unresolved_reloc, warned);
ba93b8ac
DJ		 10486
10487 sym_type = h->type;
252b5132
RH		 10488 }
10489
dbaa2011 10490 if (sec != NULL && discarded_section (sec))
e4067dbb 10491 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 10492 rel, 1, relend, howto, 0, contents);
ab96bf03
AM		 10493
10494 if (info->relocatable)
10495 {
10496 /* This is a relocatable link. We don't have to change
10497 anything, unless the reloc is against a section symbol,
10498 in which case we have to adjust according to where the
10499 section symbol winds up in the output section. */
10500 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10501 {
10502 if (globals->use_rel)
10503 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10504 howto, (bfd_signed_vma) sec->output_offset);
10505 else
10506 rel->r_addend += sec->output_offset;
10507 }
10508 continue;
10509 }
10510
252b5132
RH		 10511 if (h != NULL)
10512 name = h->root.root.string;
10513 else
10514 {
10515 name = (bfd_elf_string_from_elf_section
10516 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10517 if (name == NULL || *name == '\0')
10518 name = bfd_section_name (input_bfd, sec);
10519 }
f21f3fe0 10520
cf35638d 10521 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10522 && r_type != R_ARM_NONE
10523 && (h == NULL
10524 || h->root.type == bfd_link_hash_defined
10525 || h->root.type == bfd_link_hash_defweak)
10526 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10527 {
10528 (*_bfd_error_handler)
10529 ((sym_type == STT_TLS
10530 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10531 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10532 input_bfd,
10533 input_section,
10534 (long) rel->r_offset,
10535 howto->name,
10536 name);
10537 }
10538
0855e32b
NS		 10539 /* We call elf32_arm_final_link_relocate unless we're completely
10540 done, i.e., the relaxation produced the final output we want,
10541 and we won't let anybody mess with it. Also, we have to do
10542 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10543 both in relaxed and non-relaxed cases */
10544 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10545 || (IS_ARM_TLS_GNU_RELOC (r_type)
b38cadfb 10546 && !((h ? elf32_arm_hash_entry (h)->tls_type :
0855e32b
NS		 10547 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10548 & GOT_TLS_GDESC)))
10549 {
10550 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10551 contents, rel, h == NULL);
10552 /* This may have been marked unresolved because it came from
10553 a shared library. But we've just dealt with that. */
10554 unresolved_reloc = 0;
10555 }
10556 else
10557 r = bfd_reloc_continue;
b38cadfb 10558
0855e32b
NS		 10559 if (r == bfd_reloc_continue)
10560 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10561 input_section, contents, rel,
34e77a92 10562 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10563 (h ? h->target_internal
10564 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10565 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10566
10567 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10568 because such sections are not SEC_ALLOC and thus ld.so will
10569 not process them. */
10570 if (unresolved_reloc
10571 && !((input_section->flags & SEC_DEBUGGING) != 0
1d5316ab
AM		 10572 && h->def_dynamic)
10573 && _bfd_elf_section_offset (output_bfd, info, input_section,
10574 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10575 {
10576 (*_bfd_error_handler)
843fe662
L		 10577 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10578 input_bfd,
10579 input_section,
10580 (long) rel->r_offset,
10581 howto->name,
10582 h->root.root.string);
0945cdfd
DJ		 10583 return FALSE;
10584 }
252b5132
RH		 10585
10586 if (r != bfd_reloc_ok)
10587 {
252b5132
RH		 10588 switch (r)
10589 {
10590 case bfd_reloc_overflow:
cf919dfd
PB		 10591 /* If the overflowing reloc was to an undefined symbol,
10592 we have already printed one error message and there
10593 is no point complaining again. */
10594 if ((! h ||
10595 h->root.type != bfd_link_hash_undefined)
10596 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10597 (info, (h ? &h->root : NULL), name, howto->name,
10598 (bfd_vma) 0, input_bfd, input_section,
10599 rel->r_offset))))
b34976b6 10600 return FALSE;
252b5132
RH		 10601 break;
10602
10603 case bfd_reloc_undefined:
10604 if (!((*info->callbacks->undefined_symbol)
10605 (info, name, input_bfd, input_section,
b34976b6
AM		 10606 rel->r_offset, TRUE)))
10607 return FALSE;
252b5132
RH		 10608 break;
10609
10610 case bfd_reloc_outofrange:
f2a9dd69 10611 error_message = _("out of range");
252b5132
RH		 10612 goto common_error;
10613
10614 case bfd_reloc_notsupported:
f2a9dd69 10615 error_message = _("unsupported relocation");
252b5132
RH		 10616 goto common_error;
10617
10618 case bfd_reloc_dangerous:
f2a9dd69 10619 /* error_message should already be set. */
252b5132
RH		 10620 goto common_error;
10621
10622 default:
f2a9dd69 10623 error_message = _("unknown error");
8029a119 10624 /* Fall through. */
252b5132
RH		 10625
10626 common_error:
f2a9dd69
DJ		 10627 BFD_ASSERT (error_message != NULL);
10628 if (!((*info->callbacks->reloc_dangerous)
10629 (info, error_message, input_bfd, input_section,
252b5132 10630 rel->r_offset)))
b34976b6 10631 return FALSE;
252b5132
RH		 10632 break;
10633 }
10634 }
10635 }
10636
b34976b6 10637 return TRUE;
252b5132
RH		 10638}
10639
91d6fa6a 10640/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10641 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10642 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10643 maintaining that condition). */
10644
10645static void
10646add_unwind_table_edit (arm_unwind_table_edit **head,
10647 arm_unwind_table_edit **tail,
10648 arm_unwind_edit_type type,
10649 asection *linked_section,
91d6fa6a 10650 unsigned int tindex)
2468f9c9 10651{
21d799b5
NC		 10652 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10653 xmalloc (sizeof (arm_unwind_table_edit));
b38cadfb 10654
2468f9c9
PB		 10655 new_edit->type = type;
10656 new_edit->linked_section = linked_section;
91d6fa6a 10657 new_edit->index = tindex;
b38cadfb 10658
91d6fa6a 10659 if (tindex > 0)
2468f9c9
PB		 10660 {
10661 new_edit->next = NULL;
10662
10663 if (*tail)
10664 (*tail)->next = new_edit;
10665
10666 (*tail) = new_edit;
10667
10668 if (!*head)
10669 (*head) = new_edit;
10670 }
10671 else
10672 {
10673 new_edit->next = *head;
10674
10675 if (!*tail)
10676 *tail = new_edit;
10677
10678 *head = new_edit;
10679 }
10680}
10681
10682static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10683
10684/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10685static void
10686adjust_exidx_size(asection *exidx_sec, int adjust)
10687{
10688 asection *out_sec;
10689
10690 if (!exidx_sec->rawsize)
10691 exidx_sec->rawsize = exidx_sec->size;
10692
10693 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10694 out_sec = exidx_sec->output_section;
10695 /* Adjust size of output section. */
10696 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10697}
10698
10699/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10700static void
10701insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10702{
10703 struct _arm_elf_section_data *exidx_arm_data;
10704
10705 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10706 add_unwind_table_edit (
10707 &exidx_arm_data->u.exidx.unwind_edit_list,
10708 &exidx_arm_data->u.exidx.unwind_edit_tail,
10709 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10710
10711 adjust_exidx_size(exidx_sec, 8);
10712}
10713
10714/* Scan .ARM.exidx tables, and create a list describing edits which should be
10715 made to those tables, such that:
b38cadfb 10716
2468f9c9
PB		 10717 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10718 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10719 codes which have been inlined into the index).
10720
85fdf906
AH		 10721 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10722
2468f9c9 10723 The edits are applied when the tables are written
b38cadfb 10724 (in elf32_arm_write_section). */
2468f9c9
PB		 10725
10726bfd_boolean
10727elf32_arm_fix_exidx_coverage (asection **text_section_order,
10728 unsigned int num_text_sections,
85fdf906
AH		 10729 struct bfd_link_info *info,
10730 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10731{
10732 bfd *inp;
10733 unsigned int last_second_word = 0, i;
10734 asection *last_exidx_sec = NULL;
10735 asection *last_text_sec = NULL;
10736 int last_unwind_type = -1;
10737
10738 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10739 text sections. */
10740 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10741 {
10742 asection *sec;
b38cadfb 10743
2468f9c9
PB		 10744 for (sec = inp->sections; sec != NULL; sec = sec->next)
10745 {
10746 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10747 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
b38cadfb 10748
dec9d5df 10749 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9 10750 continue;
b38cadfb 10751
2468f9c9
PB		 10752 if (elf_sec->linked_to)
10753 {
10754 Elf_Internal_Shdr *linked_hdr
10755 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10756 struct _arm_elf_section_data *linked_sec_arm_data
10757 = get_arm_elf_section_data (linked_hdr->bfd_section);
10758
10759 if (linked_sec_arm_data == NULL)
10760 continue;
10761
10762 /* Link this .ARM.exidx section back from the text section it
10763 describes. */
10764 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10765 }
10766 }
10767 }
10768
10769 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10770 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10771 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10772
10773 for (i = 0; i < num_text_sections; i++)
10774 {
10775 asection *sec = text_section_order[i];
10776 asection *exidx_sec;
10777 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10778 struct _arm_elf_section_data *exidx_arm_data;
10779 bfd_byte *contents = NULL;
10780 int deleted_exidx_bytes = 0;
10781 bfd_vma j;
10782 arm_unwind_table_edit *unwind_edit_head = NULL;
10783 arm_unwind_table_edit *unwind_edit_tail = NULL;
10784 Elf_Internal_Shdr *hdr;
10785 bfd *ibfd;
10786
10787 if (arm_data == NULL)
10788 continue;
10789
10790 exidx_sec = arm_data->u.text.arm_exidx_sec;
10791 if (exidx_sec == NULL)
10792 {
10793 /* Section has no unwind data. */
10794 if (last_unwind_type == 0 || !last_exidx_sec)
10795 continue;
10796
10797 /* Ignore zero sized sections. */
10798 if (sec->size == 0)
10799 continue;
10800
10801 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10802 last_unwind_type = 0;
10803 continue;
10804 }
10805
22a8f80e
PB		 10806 /* Skip /DISCARD/ sections. */
10807 if (bfd_is_abs_section (exidx_sec->output_section))
10808 continue;
10809
2468f9c9
PB		 10810 hdr = &elf_section_data (exidx_sec)->this_hdr;
10811 if (hdr->sh_type != SHT_ARM_EXIDX)
10812 continue;
b38cadfb 10813
2468f9c9
PB		 10814 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10815 if (exidx_arm_data == NULL)
10816 continue;
b38cadfb 10817
2468f9c9 10818 ibfd = exidx_sec->owner;
b38cadfb 10819
2468f9c9
PB		 10820 if (hdr->contents != NULL)
10821 contents = hdr->contents;
10822 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10823 /* An error? */
10824 continue;
10825
10826 for (j = 0; j < hdr->sh_size; j += 8)
10827 {
10828 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10829 int unwind_type;
10830 int elide = 0;
10831
10832 /* An EXIDX_CANTUNWIND entry. */
10833 if (second_word == 1)
10834 {
10835 if (last_unwind_type == 0)
10836 elide = 1;
10837 unwind_type = 0;
10838 }
10839 /* Inlined unwinding data. Merge if equal to previous. */
10840 else if ((second_word & 0x80000000) != 0)
10841 {
85fdf906
AH		 10842 if (merge_exidx_entries
10843 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 10844 elide = 1;
10845 unwind_type = 1;
10846 last_second_word = second_word;
10847 }
10848 /* Normal table entry. In theory we could merge these too,
10849 but duplicate entries are likely to be much less common. */
10850 else
10851 unwind_type = 2;
10852
10853 if (elide)
10854 {
10855 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10856 DELETE_EXIDX_ENTRY, NULL, j / 8);
10857
10858 deleted_exidx_bytes += 8;
10859 }
10860
10861 last_unwind_type = unwind_type;
10862 }
10863
10864 /* Free contents if we allocated it ourselves. */
10865 if (contents != hdr->contents)
10866 free (contents);
10867
10868 /* Record edits to be applied later (in elf32_arm_write_section). */
10869 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10870 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
b38cadfb 10871
2468f9c9
PB		 10872 if (deleted_exidx_bytes > 0)
10873 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10874
10875 last_exidx_sec = exidx_sec;
10876 last_text_sec = sec;
10877 }
10878
10879 /* Add terminating CANTUNWIND entry. */
10880 if (last_exidx_sec && last_unwind_type != 0)
10881 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10882
10883 return TRUE;
10884}
10885
3e6b1042
DJ		 10886static bfd_boolean
10887elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10888 bfd *ibfd, const char *name)
10889{
10890 asection *sec, *osec;
10891
3d4d4302 10892 sec = bfd_get_linker_section (ibfd, name);
3e6b1042
DJ		 10893 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10894 return TRUE;
10895
10896 osec = sec->output_section;
10897 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10898 return TRUE;
10899
10900 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10901 sec->output_offset, sec->size))
10902 return FALSE;
10903
10904 return TRUE;
10905}
10906
10907static bfd_boolean
10908elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10909{
10910 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 10911 asection *sec, *osec;
3e6b1042 10912
4dfe6ac6
NC		 10913 if (globals == NULL)
10914 return FALSE;
10915
3e6b1042
DJ		 10916 /* Invoke the regular ELF backend linker to do all the work. */
10917 if (!bfd_elf_final_link (abfd, info))
10918 return FALSE;
10919
fe33d2fa
CL		 10920 /* Process stub sections (eg BE8 encoding, ...). */
10921 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10922 int i;
cdb21a0a
NS		 10923 for (i=0; i<htab->top_id; i++)
10924 {
10925 sec = htab->stub_group[i].stub_sec;
10926 /* Only process it once, in its link_sec slot. */
10927 if (sec && i == htab->stub_group[i].link_sec->id)
10928 {
10929 osec = sec->output_section;
10930 elf32_arm_write_section (abfd, info, sec, sec->contents);
10931 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10932 sec->output_offset, sec->size))
10933 return FALSE;
10934 }
fe33d2fa 10935 }
fe33d2fa 10936
3e6b1042
DJ		 10937 /* Write out any glue sections now that we have created all the
10938 stubs. */
10939 if (globals->bfd_of_glue_owner != NULL)
10940 {
10941 if (! elf32_arm_output_glue_section (info, abfd,
10942 globals->bfd_of_glue_owner,
10943 ARM2THUMB_GLUE_SECTION_NAME))
10944 return FALSE;
10945
10946 if (! elf32_arm_output_glue_section (info, abfd,
10947 globals->bfd_of_glue_owner,
10948 THUMB2ARM_GLUE_SECTION_NAME))
10949 return FALSE;
10950
10951 if (! elf32_arm_output_glue_section (info, abfd,
10952 globals->bfd_of_glue_owner,
10953 VFP11_ERRATUM_VENEER_SECTION_NAME))
10954 return FALSE;
10955
10956 if (! elf32_arm_output_glue_section (info, abfd,
10957 globals->bfd_of_glue_owner,
10958 ARM_BX_GLUE_SECTION_NAME))
10959 return FALSE;
10960 }
10961
10962 return TRUE;
10963}
10964
5968a7b8
NC		 10965/* Return a best guess for the machine number based on the attributes. */
10966
10967static unsigned int
10968bfd_arm_get_mach_from_attributes (bfd * abfd)
10969{
10970 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
10971
10972 switch (arch)
10973 {
10974 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
10975 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
10976 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
10977
10978 case TAG_CPU_ARCH_V5TE:
10979 {
10980 char * name;
10981
10982 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
10983 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
10984
10985 if (name)
10986 {
10987 if (strcmp (name, "IWMMXT2") == 0)
10988 return bfd_mach_arm_iWMMXt2;
10989
10990 if (strcmp (name, "IWMMXT") == 0)
6034aab8 10991 return bfd_mach_arm_iWMMXt;
5968a7b8
NC		 10992 }
10993
10994 return bfd_mach_arm_5TE;
10995 }
10996
10997 default:
10998 return bfd_mach_arm_unknown;
10999 }
11000}
11001
c178919b
NC		 11002/* Set the right machine number. */
11003
11004static bfd_boolean
57e8b36a 11005elf32_arm_object_p (bfd *abfd)
c178919b 11006{
5a6c6817 11007 unsigned int mach;
57e8b36a 11008
5a6c6817 11009 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 11010
5968a7b8
NC		 11011 if (mach == bfd_mach_arm_unknown)
11012 {
11013 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11014 mach = bfd_mach_arm_ep9312;
11015 else
11016 mach = bfd_arm_get_mach_from_attributes (abfd);
11017 }
c178919b 11018
5968a7b8 11019 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 11020 return TRUE;
11021}
11022
fc830a83 11023/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 11024
b34976b6 11025static bfd_boolean
57e8b36a 11026elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 11027{
11028 if (elf_flags_init (abfd)
11029 && elf_elfheader (abfd)->e_flags != flags)
11030 {
fc830a83
NC		 11031 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11032 {
fd2ec330 11033 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 11034 (*_bfd_error_handler)
11035 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11036 abfd);
fc830a83 11037 else
d003868e
AM		 11038 _bfd_error_handler
11039 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11040 abfd);
fc830a83 11041 }
252b5132
RH		 11042 }
11043 else
11044 {
11045 elf_elfheader (abfd)->e_flags = flags;
b34976b6 11046 elf_flags_init (abfd) = TRUE;
252b5132
RH		 11047 }
11048
b34976b6 11049 return TRUE;
252b5132
RH		 11050}
11051
fc830a83 11052/* Copy backend specific data from one object module to another. */
9b485d32 11053
b34976b6 11054static bfd_boolean
57e8b36a 11055elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 11056{
11057 flagword in_flags;
11058 flagword out_flags;
11059
0ffa91dd 11060 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 11061 return TRUE;
252b5132 11062
fc830a83 11063 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 11064 out_flags = elf_elfheader (obfd)->e_flags;
11065
fc830a83
NC		 11066 if (elf_flags_init (obfd)
11067 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11068 && in_flags != out_flags)
252b5132 11069 {
252b5132 11070 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 11071 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 11072 return FALSE;
252b5132
RH		 11073
11074 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 11075 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 11076 return FALSE;
252b5132
RH		 11077
11078 /* If the src and dest have different interworking flags
11079 then turn off the interworking bit. */
fd2ec330 11080 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 11081 {
fd2ec330 11082 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 11083 _bfd_error_handler
11084 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11085 obfd, ibfd);
252b5132 11086
fd2ec330 11087 in_flags &= ~EF_ARM_INTERWORK;
252b5132 11088 }
1006ba19
PB		 11089
11090 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 11091 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11092 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 11093 }
11094
11095 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 11096 elf_flags_init (obfd) = TRUE;
252b5132 11097
94a3258f
PB		 11098 /* Also copy the EI_OSABI field. */
11099 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11100 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11101
104d59d1
JM		 11102 /* Copy object attributes. */
11103 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 11104
11105 return TRUE;
11106}
11107
11108/* Values for Tag_ABI_PCS_R9_use. */
11109enum
11110{
11111 AEABI_R9_V6,
11112 AEABI_R9_SB,
11113 AEABI_R9_TLS,
11114 AEABI_R9_unused
11115};
11116
11117/* Values for Tag_ABI_PCS_RW_data. */
11118enum
11119{
11120 AEABI_PCS_RW_data_absolute,
11121 AEABI_PCS_RW_data_PCrel,
11122 AEABI_PCS_RW_data_SBrel,
11123 AEABI_PCS_RW_data_unused
11124};
11125
11126/* Values for Tag_ABI_enum_size. */
11127enum
11128{
11129 AEABI_enum_unused,
11130 AEABI_enum_short,
11131 AEABI_enum_wide,
11132 AEABI_enum_forced_wide
11133};
11134
104d59d1
JM		 11135/* Determine whether an object attribute tag takes an integer, a
11136 string or both. */
906e58ca 11137
104d59d1
JM		 11138static int
11139elf32_arm_obj_attrs_arg_type (int tag)
11140{
11141 if (tag == Tag_compatibility)
3483fe2e 11142 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 11143 else if (tag == Tag_nodefaults)
3483fe2e
AS		 11144 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11145 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11146 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 11147 else if (tag < 32)
3483fe2e 11148 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 11149 else
3483fe2e 11150 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 11151}
11152
5aa6ff7c
AS		 11153/* The ABI defines that Tag_conformance should be emitted first, and that
11154 Tag_nodefaults should be second (if either is defined). This sets those
11155 two positions, and bumps up the position of all the remaining tags to
11156 compensate. */
11157static int
11158elf32_arm_obj_attrs_order (int num)
11159{
3de4a297 11160 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 11161 return Tag_conformance;
3de4a297 11162 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 11163 return Tag_nodefaults;
11164 if ((num - 2) < Tag_nodefaults)
11165 return num - 2;
11166 if ((num - 1) < Tag_conformance)
11167 return num - 1;
11168 return num;
11169}
11170
e8b36cd1
JM		 11171/* Attribute numbers >=64 (mod 128) can be safely ignored. */
11172static bfd_boolean
11173elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11174{
11175 if ((tag & 127) < 64)
11176 {
11177 _bfd_error_handler
11178 (_("%B: Unknown mandatory EABI object attribute %d"),
11179 abfd, tag);
11180 bfd_set_error (bfd_error_bad_value);
11181 return FALSE;
11182 }
11183 else
11184 {
11185 _bfd_error_handler
11186 (_("Warning: %B: Unknown EABI object attribute %d"),
11187 abfd, tag);
11188 return TRUE;
11189 }
11190}
11191
91e22acd
AS		 11192/* Read the architecture from the Tag_also_compatible_with attribute, if any.
11193 Returns -1 if no architecture could be read. */
11194
11195static int
11196get_secondary_compatible_arch (bfd *abfd)
11197{
11198 obj_attribute *attr =
11199 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11200
11201 /* Note: the tag and its argument below are uleb128 values, though
11202 currently-defined values fit in one byte for each. */
11203 if (attr->s
11204 && attr->s[0] == Tag_CPU_arch
11205 && (attr->s[1] & 128) != 128
11206 && attr->s[2] == 0)
11207 return attr->s[1];
11208
11209 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11210 return -1;
11211}
11212
11213/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11214 The tag is removed if ARCH is -1. */
11215
8e79c3df 11216static void
91e22acd 11217set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11218{
91e22acd
AS		 11219 obj_attribute *attr =
11220 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11221
91e22acd
AS		 11222 if (arch == -1)
11223 {
11224 attr->s = NULL;
11225 return;
8e79c3df 11226 }
91e22acd
AS		 11227
11228 /* Note: the tag and its argument below are uleb128 values, though
11229 currently-defined values fit in one byte for each. */
11230 if (!attr->s)
21d799b5 11231 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11232 attr->s[0] = Tag_CPU_arch;
11233 attr->s[1] = arch;
11234 attr->s[2] = '\0';
8e79c3df
CM		 11235}
11236
91e22acd
AS		 11237/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11238 into account. */
11239
11240static int
11241tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11242 int newtag, int secondary_compat)
8e79c3df 11243{
91e22acd
AS		 11244#define T(X) TAG_CPU_ARCH_##X
11245 int tagl, tagh, result;
11246 const int v6t2[] =
11247 {
11248 T(V6T2), /* PRE_V4. */
11249 T(V6T2), /* V4. */
11250 T(V6T2), /* V4T. */
11251 T(V6T2), /* V5T. */
11252 T(V6T2), /* V5TE. */
11253 T(V6T2), /* V5TEJ. */
11254 T(V6T2), /* V6. */
11255 T(V7), /* V6KZ. */
11256 T(V6T2) /* V6T2. */
11257 };
11258 const int v6k[] =
11259 {
11260 T(V6K), /* PRE_V4. */
11261 T(V6K), /* V4. */
11262 T(V6K), /* V4T. */
11263 T(V6K), /* V5T. */
11264 T(V6K), /* V5TE. */
11265 T(V6K), /* V5TEJ. */
11266 T(V6K), /* V6. */
11267 T(V6KZ), /* V6KZ. */
11268 T(V7), /* V6T2. */
11269 T(V6K) /* V6K. */
11270 };
11271 const int v7[] =
11272 {
11273 T(V7), /* PRE_V4. */
11274 T(V7), /* V4. */
11275 T(V7), /* V4T. */
11276 T(V7), /* V5T. */
11277 T(V7), /* V5TE. */
11278 T(V7), /* V5TEJ. */
11279 T(V7), /* V6. */
11280 T(V7), /* V6KZ. */
11281 T(V7), /* V6T2. */
11282 T(V7), /* V6K. */
11283 T(V7) /* V7. */
11284 };
11285 const int v6_m[] =
11286 {
11287 -1, /* PRE_V4. */
11288 -1, /* V4. */
11289 T(V6K), /* V4T. */
11290 T(V6K), /* V5T. */
11291 T(V6K), /* V5TE. */
11292 T(V6K), /* V5TEJ. */
11293 T(V6K), /* V6. */
11294 T(V6KZ), /* V6KZ. */
11295 T(V7), /* V6T2. */
11296 T(V6K), /* V6K. */
11297 T(V7), /* V7. */
11298 T(V6_M) /* V6_M. */
11299 };
11300 const int v6s_m[] =
11301 {
11302 -1, /* PRE_V4. */
11303 -1, /* V4. */
11304 T(V6K), /* V4T. */
11305 T(V6K), /* V5T. */
11306 T(V6K), /* V5TE. */
11307 T(V6K), /* V5TEJ. */
11308 T(V6K), /* V6. */
11309 T(V6KZ), /* V6KZ. */
11310 T(V7), /* V6T2. */
11311 T(V6K), /* V6K. */
11312 T(V7), /* V7. */
11313 T(V6S_M), /* V6_M. */
11314 T(V6S_M) /* V6S_M. */
11315 };
9e3c6df6
PB		 11316 const int v7e_m[] =
11317 {
11318 -1, /* PRE_V4. */
11319 -1, /* V4. */
11320 T(V7E_M), /* V4T. */
11321 T(V7E_M), /* V5T. */
11322 T(V7E_M), /* V5TE. */
11323 T(V7E_M), /* V5TEJ. */
11324 T(V7E_M), /* V6. */
11325 T(V7E_M), /* V6KZ. */
11326 T(V7E_M), /* V6T2. */
11327 T(V7E_M), /* V6K. */
11328 T(V7E_M), /* V7. */
11329 T(V7E_M), /* V6_M. */
11330 T(V7E_M), /* V6S_M. */
11331 T(V7E_M) /* V7E_M. */
11332 };
bca38921
MGD		 11333 const int v8[] =
11334 {
11335 T(V8), /* PRE_V4. */
11336 T(V8), /* V4. */
11337 T(V8), /* V4T. */
11338 T(V8), /* V5T. */
11339 T(V8), /* V5TE. */
11340 T(V8), /* V5TEJ. */
11341 T(V8), /* V6. */
11342 T(V8), /* V6KZ. */
11343 T(V8), /* V6T2. */
11344 T(V8), /* V6K. */
11345 T(V8), /* V7. */
11346 T(V8), /* V6_M. */
11347 T(V8), /* V6S_M. */
11348 T(V8), /* V7E_M. */
11349 T(V8) /* V8. */
11350 };
91e22acd
AS		 11351 const int v4t_plus_v6_m[] =
11352 {
11353 -1, /* PRE_V4. */
11354 -1, /* V4. */
11355 T(V4T), /* V4T. */
11356 T(V5T), /* V5T. */
11357 T(V5TE), /* V5TE. */
11358 T(V5TEJ), /* V5TEJ. */
11359 T(V6), /* V6. */
11360 T(V6KZ), /* V6KZ. */
11361 T(V6T2), /* V6T2. */
11362 T(V6K), /* V6K. */
11363 T(V7), /* V7. */
11364 T(V6_M), /* V6_M. */
11365 T(V6S_M), /* V6S_M. */
9e3c6df6 11366 T(V7E_M), /* V7E_M. */
bca38921 11367 T(V8), /* V8. */
91e22acd
AS		 11368 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11369 };
11370 const int *comb[] =
11371 {
11372 v6t2,
11373 v6k,
11374 v7,
11375 v6_m,
11376 v6s_m,
9e3c6df6 11377 v7e_m,
bca38921 11378 v8,
91e22acd
AS		 11379 /* Pseudo-architecture. */
11380 v4t_plus_v6_m
11381 };
11382
11383 /* Check we've not got a higher architecture than we know about. */
11384
9e3c6df6 11385 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11386 {
3895f852 11387 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11388 return -1;
11389 }
11390
11391 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11392
11393 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11394 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11395 oldtag = T(V4T_PLUS_V6_M);
11396
11397 /* And override the new tag if we have a Tag_also_compatible_with on the
11398 input. */
11399
11400 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11401 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11402 newtag = T(V4T_PLUS_V6_M);
11403
11404 tagl = (oldtag < newtag) ? oldtag : newtag;
11405 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11406
11407 /* Architectures before V6KZ add features monotonically. */
11408 if (tagh <= TAG_CPU_ARCH_V6KZ)
11409 return result;
11410
11411 result = comb[tagh - T(V6T2)][tagl];
11412
11413 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11414 as the canonical version. */
11415 if (result == T(V4T_PLUS_V6_M))
11416 {
11417 result = T(V4T);
11418 *secondary_compat_out = T(V6_M);
11419 }
11420 else
11421 *secondary_compat_out = -1;
11422
11423 if (result == -1)
11424 {
3895f852 11425 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11426 ibfd, oldtag, newtag);
11427 return -1;
11428 }
11429
11430 return result;
11431#undef T
8e79c3df
CM		 11432}
11433
ac56ee8f
MGD		 11434/* Query attributes object to see if integer divide instructions may be
11435 present in an object. */
11436static bfd_boolean
11437elf32_arm_attributes_accept_div (const obj_attribute *attr)
11438{
11439 int arch = attr[Tag_CPU_arch].i;
11440 int profile = attr[Tag_CPU_arch_profile].i;
11441
11442 switch (attr[Tag_DIV_use].i)
11443 {
11444 case 0:
11445 /* Integer divide allowed if instruction contained in archetecture. */
11446 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11447 return TRUE;
11448 else if (arch >= TAG_CPU_ARCH_V7E_M)
11449 return TRUE;
11450 else
11451 return FALSE;
11452
11453 case 1:
11454 /* Integer divide explicitly prohibited. */
11455 return FALSE;
11456
11457 default:
11458 /* Unrecognised case - treat as allowing divide everywhere. */
11459 case 2:
11460 /* Integer divide allowed in ARM state. */
11461 return TRUE;
11462 }
11463}
11464
11465/* Query attributes object to see if integer divide instructions are
11466 forbidden to be in the object. This is not the inverse of
11467 elf32_arm_attributes_accept_div. */
11468static bfd_boolean
11469elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11470{
11471 return attr[Tag_DIV_use].i == 1;
11472}
11473
ee065d83
PB		 11474/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11475 are conflicting attributes. */
906e58ca 11476
ee065d83
PB		 11477static bfd_boolean
11478elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11479{
104d59d1
JM		 11480 obj_attribute *in_attr;
11481 obj_attribute *out_attr;
ee065d83
PB		 11482 /* Some tags have 0 = don't care, 1 = strong requirement,
11483 2 = weak requirement. */
91e22acd 11484 static const int order_021[3] = {0, 2, 1};
ee065d83 11485 int i;
91e22acd 11486 bfd_boolean result = TRUE;
ee065d83 11487
3e6b1042
DJ		 11488 /* Skip the linker stubs file. This preserves previous behavior
11489 of accepting unknown attributes in the first input file - but
11490 is that a bug? */
11491 if (ibfd->flags & BFD_LINKER_CREATED)
11492 return TRUE;
11493
104d59d1 11494 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11495 {
11496 /* This is the first object. Copy the attributes. */
104d59d1 11497 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11498
cd21e546
MGD		 11499 out_attr = elf_known_obj_attributes_proc (obfd);
11500
004ae526
PB		 11501 /* Use the Tag_null value to indicate the attributes have been
11502 initialized. */
cd21e546 11503 out_attr[0].i = 1;
004ae526 11504
cd21e546
MGD		 11505 /* We do not output objects with Tag_MPextension_use_legacy - we move
11506 the attribute's value to Tag_MPextension_use. */
11507 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11508 {
11509 if (out_attr[Tag_MPextension_use].i != 0
11510 && out_attr[Tag_MPextension_use_legacy].i
11511 != out_attr[Tag_MPextension_use].i)
11512 {
11513 _bfd_error_handler
11514 (_("Error: %B has both the current and legacy "
11515 "Tag_MPextension_use attributes"), ibfd);
11516 result = FALSE;
11517 }
11518
11519 out_attr[Tag_MPextension_use] =
11520 out_attr[Tag_MPextension_use_legacy];
11521 out_attr[Tag_MPextension_use_legacy].type = 0;
11522 out_attr[Tag_MPextension_use_legacy].i = 0;
11523 }
11524
11525 return result;
ee065d83
PB		 11526 }
11527
104d59d1
JM		 11528 in_attr = elf_known_obj_attributes_proc (ibfd);
11529 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11530 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11531 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11532 {
8e79c3df 11533 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11534 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11535 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11536 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11537 {
11538 _bfd_error_handler
3895f852 11539 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11540 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11541 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11542 result = FALSE;
ee065d83
PB		 11543 }
11544 }
11545
3de4a297 11546 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11547 {
11548 /* Merge this attribute with existing attributes. */
11549 switch (i)
11550 {
11551 case Tag_CPU_raw_name:
11552 case Tag_CPU_name:
91e22acd 11553 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11554 break;
11555
11556 case Tag_ABI_optimization_goals:
11557 case Tag_ABI_FP_optimization_goals:
11558 /* Use the first value seen. */
11559 break;
11560
11561 case Tag_CPU_arch:
91e22acd
AS		 11562 {
11563 int secondary_compat = -1, secondary_compat_out = -1;
11564 unsigned int saved_out_attr = out_attr[i].i;
11565 static const char *name_table[] = {
11566 /* These aren't real CPU names, but we can't guess
11567 that from the architecture version alone. */
11568 "Pre v4",
11569 "ARM v4",
11570 "ARM v4T",
11571 "ARM v5T",
11572 "ARM v5TE",
11573 "ARM v5TEJ",
11574 "ARM v6",
11575 "ARM v6KZ",
11576 "ARM v6T2",
11577 "ARM v6K",
11578 "ARM v7",
11579 "ARM v6-M",
bca38921
MGD		 11580 "ARM v6S-M",
11581 "ARM v8"
91e22acd
AS		 11582 };
11583
11584 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11585 secondary_compat = get_secondary_compatible_arch (ibfd);
11586 secondary_compat_out = get_secondary_compatible_arch (obfd);
11587 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11588 &secondary_compat_out,
11589 in_attr[i].i,
11590 secondary_compat);
11591 set_secondary_compatible_arch (obfd, secondary_compat_out);
11592
11593 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11594 if (out_attr[i].i == saved_out_attr)
11595 ; /* Leave the names alone. */
11596 else if (out_attr[i].i == in_attr[i].i)
11597 {
11598 /* The output architecture has been changed to match the
11599 input architecture. Use the input names. */
11600 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11601 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11602 : NULL;
11603 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11604 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11605 : NULL;
11606 }
11607 else
11608 {
11609 out_attr[Tag_CPU_name].s = NULL;
11610 out_attr[Tag_CPU_raw_name].s = NULL;
11611 }
11612
11613 /* If we still don't have a value for Tag_CPU_name,
11614 make one up now. Tag_CPU_raw_name remains blank. */
11615 if (out_attr[Tag_CPU_name].s == NULL
11616 && out_attr[i].i < ARRAY_SIZE (name_table))
11617 out_attr[Tag_CPU_name].s =
11618 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11619 }
11620 break;
11621
ee065d83
PB		 11622 case Tag_ARM_ISA_use:
11623 case Tag_THUMB_ISA_use:
ee065d83 11624 case Tag_WMMX_arch:
91e22acd
AS		 11625 case Tag_Advanced_SIMD_arch:
11626 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11627 case Tag_ABI_FP_rounding:
ee065d83
PB		 11628 case Tag_ABI_FP_exceptions:
11629 case Tag_ABI_FP_user_exceptions:
11630 case Tag_ABI_FP_number_model:
75375b3e 11631 case Tag_FP_HP_extension:
91e22acd
AS		 11632 case Tag_CPU_unaligned_access:
11633 case Tag_T2EE_use:
91e22acd 11634 case Tag_MPextension_use:
ee065d83
PB		 11635 /* Use the largest value specified. */
11636 if (in_attr[i].i > out_attr[i].i)
11637 out_attr[i].i = in_attr[i].i;
11638 break;
11639
75375b3e 11640 case Tag_ABI_align_preserved:
91e22acd
AS		 11641 case Tag_ABI_PCS_RO_data:
11642 /* Use the smallest value specified. */
11643 if (in_attr[i].i < out_attr[i].i)
11644 out_attr[i].i = in_attr[i].i;
11645 break;
11646
75375b3e 11647 case Tag_ABI_align_needed:
91e22acd 11648 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11649 && (in_attr[Tag_ABI_align_preserved].i == 0
11650 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11651 {
91e22acd
AS		 11652 /* This error message should be enabled once all non-conformant
11653 binaries in the toolchain have had the attributes set
11654 properly.
ee065d83 11655 _bfd_error_handler
3895f852 11656 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11657 obfd, ibfd);
11658 result = FALSE; */
ee065d83 11659 }
91e22acd
AS		 11660 /* Fall through. */
11661 case Tag_ABI_FP_denormal:
11662 case Tag_ABI_PCS_GOT_use:
11663 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11664 value if greater than 2 (for future-proofing). */
11665 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11666 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11667 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11668 out_attr[i].i = in_attr[i].i;
11669 break;
91e22acd 11670
75375b3e
MGD		 11671 case Tag_Virtualization_use:
11672 /* The virtualization tag effectively stores two bits of
11673 information: the intended use of TrustZone (in bit 0), and the
11674 intended use of Virtualization (in bit 1). */
11675 if (out_attr[i].i == 0)
11676 out_attr[i].i = in_attr[i].i;
11677 else if (in_attr[i].i != 0
11678 && in_attr[i].i != out_attr[i].i)
11679 {
11680 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11681 out_attr[i].i = 3;
11682 else
11683 {
11684 _bfd_error_handler
11685 (_("error: %B: unable to merge virtualization attributes "
11686 "with %B"),
11687 obfd, ibfd);
11688 result = FALSE;
11689 }
11690 }
11691 break;
91e22acd
AS		 11692
11693 case Tag_CPU_arch_profile:
11694 if (out_attr[i].i != in_attr[i].i)
11695 {
11696 /* 0 will merge with anything.
11697 'A' and 'S' merge to 'A'.
11698 'R' and 'S' merge to 'R'.
11699 'M' and 'A|R|S' is an error. */
11700 if (out_attr[i].i == 0
11701 || (out_attr[i].i == 'S'
11702 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11703 out_attr[i].i = in_attr[i].i;
11704 else if (in_attr[i].i == 0
11705 || (in_attr[i].i == 'S'
11706 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11707 ; /* Do nothing. */
11708 else
11709 {
11710 _bfd_error_handler
3895f852 11711 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11712 ibfd,
11713 in_attr[i].i ? in_attr[i].i : '0',
11714 out_attr[i].i ? out_attr[i].i : '0');
11715 result = FALSE;
11716 }
11717 }
11718 break;
75375b3e 11719 case Tag_FP_arch:
62f3b8c8 11720 {
4547cb56
NC		 11721 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11722 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11723 when it's 0. It might mean absence of FP hardware if
11724 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11725
bca38921 11726#define VFP_VERSION_COUNT 8
62f3b8c8
PB		 11727 static const struct
11728 {
11729 int ver;
11730 int regs;
bca38921 11731 } vfp_versions[VFP_VERSION_COUNT] =
62f3b8c8
PB		 11732 {
11733 {0, 0},
11734 {1, 16},
11735 {2, 16},
11736 {3, 32},
11737 {3, 16},
11738 {4, 32},
bca38921
MGD		 11739 {4, 16},
11740 {8, 32}
62f3b8c8
PB		 11741 };
11742 int ver;
11743 int regs;
11744 int newval;
11745
4547cb56
NC		 11746 /* If the output has no requirement about FP hardware,
11747 follow the requirement of the input. */
11748 if (out_attr[i].i == 0)
11749 {
11750 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11751 out_attr[i].i = in_attr[i].i;
11752 out_attr[Tag_ABI_HardFP_use].i
11753 = in_attr[Tag_ABI_HardFP_use].i;
11754 break;
11755 }
11756 /* If the input has no requirement about FP hardware, do
11757 nothing. */
11758 else if (in_attr[i].i == 0)
11759 {
11760 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11761 break;
11762 }
11763
11764 /* Both the input and the output have nonzero Tag_FP_arch.
11765 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11766
11767 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11768 do nothing. */
11769 if (in_attr[Tag_ABI_HardFP_use].i == 0
11770 && out_attr[Tag_ABI_HardFP_use].i == 0)
11771 ;
11772 /* If the input and the output have different Tag_ABI_HardFP_use,
11773 the combination of them is 3 (SP & DP). */
11774 else if (in_attr[Tag_ABI_HardFP_use].i
11775 != out_attr[Tag_ABI_HardFP_use].i)
11776 out_attr[Tag_ABI_HardFP_use].i = 3;
11777
11778 /* Now we can handle Tag_FP_arch. */
11779
bca38921
MGD		 11780 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11781 pick the biggest. */
11782 if (in_attr[i].i >= VFP_VERSION_COUNT
11783 && in_attr[i].i > out_attr[i].i)
62f3b8c8
PB		 11784 {
11785 out_attr[i] = in_attr[i];
11786 break;
11787 }
11788 /* The output uses the superset of input features
11789 (ISA version) and registers. */
11790 ver = vfp_versions[in_attr[i].i].ver;
11791 if (ver < vfp_versions[out_attr[i].i].ver)
11792 ver = vfp_versions[out_attr[i].i].ver;
11793 regs = vfp_versions[in_attr[i].i].regs;
11794 if (regs < vfp_versions[out_attr[i].i].regs)
11795 regs = vfp_versions[out_attr[i].i].regs;
11796 /* This assumes all possible supersets are also a valid
11797 options. */
bca38921 11798 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
62f3b8c8
PB		 11799 {
11800 if (regs == vfp_versions[newval].regs
11801 && ver == vfp_versions[newval].ver)
11802 break;
11803 }
11804 out_attr[i].i = newval;
11805 }
b1cc4aeb 11806 break;
ee065d83
PB		 11807 case Tag_PCS_config:
11808 if (out_attr[i].i == 0)
11809 out_attr[i].i = in_attr[i].i;
b6009aca 11810 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
ee065d83
PB		 11811 {
11812 /* It's sometimes ok to mix different configs, so this is only
11813 a warning. */
11814 _bfd_error_handler
11815 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11816 }
11817 break;
11818 case Tag_ABI_PCS_R9_use:
004ae526
PB		 11819 if (in_attr[i].i != out_attr[i].i
11820 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 11821 && in_attr[i].i != AEABI_R9_unused)
11822 {
11823 _bfd_error_handler
3895f852 11824 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 11825 result = FALSE;
ee065d83
PB		 11826 }
11827 if (out_attr[i].i == AEABI_R9_unused)
11828 out_attr[i].i = in_attr[i].i;
11829 break;
11830 case Tag_ABI_PCS_RW_data:
11831 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11832 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11833 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11834 {
11835 _bfd_error_handler
3895f852 11836 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 11837 ibfd);
91e22acd 11838 result = FALSE;
ee065d83
PB		 11839 }
11840 /* Use the smallest value specified. */
11841 if (in_attr[i].i < out_attr[i].i)
11842 out_attr[i].i = in_attr[i].i;
11843 break;
ee065d83 11844 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 11845 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11846 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 11847 {
11848 _bfd_error_handler
a9dc9481
JM		 11849 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11850 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 11851 }
a9dc9481 11852 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 11853 out_attr[i].i = in_attr[i].i;
11854 break;
ee065d83
PB		 11855 case Tag_ABI_enum_size:
11856 if (in_attr[i].i != AEABI_enum_unused)
11857 {
11858 if (out_attr[i].i == AEABI_enum_unused
11859 || out_attr[i].i == AEABI_enum_forced_wide)
11860 {
11861 /* The existing object is compatible with anything.
11862 Use whatever requirements the new object has. */
11863 out_attr[i].i = in_attr[i].i;
11864 }
11865 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 11866 && out_attr[i].i != in_attr[i].i
0ffa91dd 11867 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 11868 {
91e22acd 11869 static const char *aeabi_enum_names[] =
bf21ed78 11870 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 11871 const char *in_name =
11872 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11873 ? aeabi_enum_names[in_attr[i].i]
11874 : "<unknown>";
11875 const char *out_name =
11876 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11877 ? aeabi_enum_names[out_attr[i].i]
11878 : "<unknown>";
ee065d83 11879 _bfd_error_handler
bf21ed78 11880 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 11881 ibfd, in_name, out_name);
ee065d83
PB		 11882 }
11883 }
11884 break;
11885 case Tag_ABI_VFP_args:
11886 /* Aready done. */
11887 break;
11888 case Tag_ABI_WMMX_args:
11889 if (in_attr[i].i != out_attr[i].i)
11890 {
11891 _bfd_error_handler
3895f852 11892 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 11893 ibfd, obfd);
91e22acd 11894 result = FALSE;
ee065d83
PB		 11895 }
11896 break;
7b86a9fa
AS		 11897 case Tag_compatibility:
11898 /* Merged in target-independent code. */
11899 break;
91e22acd 11900 case Tag_ABI_HardFP_use:
4547cb56 11901 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 11902 break;
11903 case Tag_ABI_FP_16bit_format:
11904 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11905 {
11906 if (in_attr[i].i != out_attr[i].i)
11907 {
11908 _bfd_error_handler
3895f852 11909 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 11910 ibfd, obfd);
11911 result = FALSE;
11912 }
11913 }
11914 if (in_attr[i].i != 0)
11915 out_attr[i].i = in_attr[i].i;
11916 break;
7b86a9fa 11917
cd21e546 11918 case Tag_DIV_use:
ac56ee8f
MGD		 11919 /* A value of zero on input means that the divide instruction may
11920 be used if available in the base architecture as specified via
11921 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11922 the user did not want divide instructions. A value of 2
11923 explicitly means that divide instructions were allowed in ARM
11924 and Thumb state. */
11925 if (in_attr[i].i == out_attr[i].i)
11926 /* Do nothing. */ ;
11927 else if (elf32_arm_attributes_forbid_div (in_attr)
11928 && !elf32_arm_attributes_accept_div (out_attr))
11929 out_attr[i].i = 1;
11930 else if (elf32_arm_attributes_forbid_div (out_attr)
11931 && elf32_arm_attributes_accept_div (in_attr))
11932 out_attr[i].i = in_attr[i].i;
11933 else if (in_attr[i].i == 2)
11934 out_attr[i].i = in_attr[i].i;
cd21e546
MGD		 11935 break;
11936
11937 case Tag_MPextension_use_legacy:
11938 /* We don't output objects with Tag_MPextension_use_legacy - we
11939 move the value to Tag_MPextension_use. */
11940 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11941 {
11942 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11943 {
11944 _bfd_error_handler
11945 (_("%B has has both the current and legacy "
b38cadfb 11946 "Tag_MPextension_use attributes"),
cd21e546
MGD		 11947 ibfd);
11948 result = FALSE;
11949 }
11950 }
11951
11952 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11953 out_attr[Tag_MPextension_use] = in_attr[i];
11954
11955 break;
11956
91e22acd 11957 case Tag_nodefaults:
2d0bb761
AS		 11958 /* This tag is set if it exists, but the value is unused (and is
11959 typically zero). We don't actually need to do anything here -
11960 the merge happens automatically when the type flags are merged
11961 below. */
91e22acd
AS		 11962 break;
11963 case Tag_also_compatible_with:
11964 /* Already done in Tag_CPU_arch. */
11965 break;
11966 case Tag_conformance:
11967 /* Keep the attribute if it matches. Throw it away otherwise.
11968 No attribute means no claim to conform. */
11969 if (!in_attr[i].s || !out_attr[i].s
11970 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11971 out_attr[i].s = NULL;
11972 break;
3cfad14c 11973
91e22acd 11974 default:
e8b36cd1
JM		 11975 result
11976 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 11977 }
11978
11979 /* If out_attr was copied from in_attr then it won't have a type yet. */
11980 if (in_attr[i].type && !out_attr[i].type)
11981 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 11982 }
11983
104d59d1 11984 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 11985 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11986 return FALSE;
ee065d83 11987
104d59d1 11988 /* Check for any attributes not known on ARM. */
e8b36cd1 11989 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 11990
91e22acd 11991 return result;
252b5132
RH		 11992}
11993
3a4a14e9
PB		 11994
11995/* Return TRUE if the two EABI versions are incompatible. */
11996
11997static bfd_boolean
11998elf32_arm_versions_compatible (unsigned iver, unsigned over)
11999{
12000 /* v4 and v5 are the same spec before and after it was released,
12001 so allow mixing them. */
12002 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12003 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12004 return TRUE;
12005
12006 return (iver == over);
12007}
12008
252b5132
RH		 12009/* Merge backend specific data from an object file to the output
12010 object file when linking. */
9b485d32 12011
b34976b6 12012static bfd_boolean
21d799b5 12013elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 12014
9b485d32
NC		 12015/* Display the flags field. */
12016
b34976b6 12017static bfd_boolean
57e8b36a 12018elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 12019{
fc830a83
NC		 12020 FILE * file = (FILE *) ptr;
12021 unsigned long flags;
252b5132
RH		 12022
12023 BFD_ASSERT (abfd != NULL && ptr != NULL);
12024
12025 /* Print normal ELF private data. */
12026 _bfd_elf_print_private_bfd_data (abfd, ptr);
12027
fc830a83 12028 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 12029 /* Ignore init flag - it may not be set, despite the flags field
12030 containing valid data. */
252b5132
RH		 12031
12032 /* xgettext:c-format */
9b485d32 12033 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 12034
fc830a83
NC		 12035 switch (EF_ARM_EABI_VERSION (flags))
12036 {
12037 case EF_ARM_EABI_UNKNOWN:
4cc11e76 12038 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 12039 official ARM ELF extended ABI. Hence they are only decoded if
12040 the EABI version is not set. */
fd2ec330 12041 if (flags & EF_ARM_INTERWORK)
9b485d32 12042 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 12043
fd2ec330 12044 if (flags & EF_ARM_APCS_26)
6c571f00 12045 fprintf (file, " [APCS-26]");
fc830a83 12046 else
6c571f00 12047 fprintf (file, " [APCS-32]");
9a5aca8c 12048
96a846ea
RE		 12049 if (flags & EF_ARM_VFP_FLOAT)
12050 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 12051 else if (flags & EF_ARM_MAVERICK_FLOAT)
12052 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 12053 else
12054 fprintf (file, _(" [FPA float format]"));
12055
fd2ec330 12056 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 12057 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 12058
fd2ec330 12059 if (flags & EF_ARM_PIC)
9b485d32 12060 fprintf (file, _(" [position independent]"));
fc830a83 12061
fd2ec330 12062 if (flags & EF_ARM_NEW_ABI)
9b485d32 12063 fprintf (file, _(" [new ABI]"));
9a5aca8c 12064
fd2ec330 12065 if (flags & EF_ARM_OLD_ABI)
9b485d32 12066 fprintf (file, _(" [old ABI]"));
9a5aca8c 12067
fd2ec330 12068 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 12069 fprintf (file, _(" [software FP]"));
9a5aca8c 12070
96a846ea
RE		 12071 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12072 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 12073 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12074 | EF_ARM_MAVERICK_FLOAT);
fc830a83 12075 break;
9a5aca8c 12076
fc830a83 12077 case EF_ARM_EABI_VER1:
9b485d32 12078 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 12079
fc830a83 12080 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 12081 fprintf (file, _(" [sorted symbol table]"));
fc830a83 12082 else
9b485d32 12083 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 12084
fc830a83
NC		 12085 flags &= ~ EF_ARM_SYMSARESORTED;
12086 break;
9a5aca8c 12087
fd2ec330
PB		 12088 case EF_ARM_EABI_VER2:
12089 fprintf (file, _(" [Version2 EABI]"));
12090
12091 if (flags & EF_ARM_SYMSARESORTED)
12092 fprintf (file, _(" [sorted symbol table]"));
12093 else
12094 fprintf (file, _(" [unsorted symbol table]"));
12095
12096 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12097 fprintf (file, _(" [dynamic symbols use segment index]"));
12098
12099 if (flags & EF_ARM_MAPSYMSFIRST)
12100 fprintf (file, _(" [mapping symbols precede others]"));
12101
99e4ae17 12102 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 12103 | EF_ARM_MAPSYMSFIRST);
12104 break;
12105
d507cf36
PB		 12106 case EF_ARM_EABI_VER3:
12107 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 12108 break;
12109
12110 case EF_ARM_EABI_VER4:
12111 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 12112 goto eabi;
d507cf36 12113
3a4a14e9
PB		 12114 case EF_ARM_EABI_VER5:
12115 fprintf (file, _(" [Version5 EABI]"));
3bfcb652
NC		 12116
12117 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12118 fprintf (file, _(" [soft-float ABI]"));
12119
12120 if (flags & EF_ARM_ABI_FLOAT_HARD)
12121 fprintf (file, _(" [hard-float ABI]"));
12122
12123 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12124
3a4a14e9 12125 eabi:
d507cf36
PB		 12126 if (flags & EF_ARM_BE8)
12127 fprintf (file, _(" [BE8]"));
12128
12129 if (flags & EF_ARM_LE8)
12130 fprintf (file, _(" [LE8]"));
12131
12132 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12133 break;
12134
fc830a83 12135 default:
9b485d32 12136 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 12137 break;
12138 }
252b5132 12139
fc830a83 12140 flags &= ~ EF_ARM_EABIMASK;
252b5132 12141
fc830a83 12142 if (flags & EF_ARM_RELEXEC)
9b485d32 12143 fprintf (file, _(" [relocatable executable]"));
252b5132 12144
fc830a83 12145 if (flags & EF_ARM_HASENTRY)
9b485d32 12146 fprintf (file, _(" [has entry point]"));
252b5132 12147
fc830a83
NC		 12148 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12149
12150 if (flags)
9b485d32 12151 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 12152
252b5132
RH		 12153 fputc ('\n', file);
12154
b34976b6 12155 return TRUE;
252b5132
RH		 12156}
12157
12158static int
57e8b36a 12159elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 12160{
2f0ca46a
NC		 12161 switch (ELF_ST_TYPE (elf_sym->st_info))
12162 {
12163 case STT_ARM_TFUNC:
12164 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 12165
2f0ca46a
NC		 12166 case STT_ARM_16BIT:
12167 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12168 This allows us to distinguish between data used by Thumb instructions
12169 and non-data (which is probably code) inside Thumb regions of an
12170 executable. */
1a0eb693 12171 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 12172 return ELF_ST_TYPE (elf_sym->st_info);
12173 break;
9a5aca8c 12174
ce855c42
NC		 12175 default:
12176 break;
2f0ca46a
NC		 12177 }
12178
12179 return type;
252b5132 12180}
f21f3fe0 12181
252b5132 12182static asection *
07adf181
AM		 12183elf32_arm_gc_mark_hook (asection *sec,
12184 struct bfd_link_info *info,
12185 Elf_Internal_Rela *rel,
12186 struct elf_link_hash_entry *h,
12187 Elf_Internal_Sym *sym)
252b5132
RH		 12188{
12189 if (h != NULL)
07adf181 12190 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 12191 {
12192 case R_ARM_GNU_VTINHERIT:
12193 case R_ARM_GNU_VTENTRY:
07adf181
AM		 12194 return NULL;
12195 }
9ad5cbcf 12196
07adf181 12197 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 12198}
12199
780a67af
NC		 12200/* Update the got entry reference counts for the section being removed. */
12201
b34976b6 12202static bfd_boolean
ba93b8ac
DJ		 12203elf32_arm_gc_sweep_hook (bfd * abfd,
12204 struct bfd_link_info * info,
12205 asection * sec,
12206 const Elf_Internal_Rela * relocs)
252b5132 12207{
5e681ec4
PB		 12208 Elf_Internal_Shdr *symtab_hdr;
12209 struct elf_link_hash_entry **sym_hashes;
12210 bfd_signed_vma *local_got_refcounts;
12211 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 12212 struct elf32_arm_link_hash_table * globals;
12213
7dda2462
TG		 12214 if (info->relocatable)
12215 return TRUE;
12216
eb043451 12217 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12218 if (globals == NULL)
12219 return FALSE;
5e681ec4
PB		 12220
12221 elf_section_data (sec)->local_dynrel = NULL;
12222
0ffa91dd 12223 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 12224 sym_hashes = elf_sym_hashes (abfd);
12225 local_got_refcounts = elf_local_got_refcounts (abfd);
12226
906e58ca 12227 check_use_blx (globals);
bd97cb95 12228
5e681ec4
PB		 12229 relend = relocs + sec->reloc_count;
12230 for (rel = relocs; rel < relend; rel++)
eb043451 12231 {
3eb128b2
AM		 12232 unsigned long r_symndx;
12233 struct elf_link_hash_entry *h = NULL;
f6e32f6d 12234 struct elf32_arm_link_hash_entry *eh;
eb043451 12235 int r_type;
34e77a92 12236 bfd_boolean call_reloc_p;
f6e32f6d
RS		 12237 bfd_boolean may_become_dynamic_p;
12238 bfd_boolean may_need_local_target_p;
34e77a92
RS		 12239 union gotplt_union *root_plt;
12240 struct arm_plt_info *arm_plt;
5e681ec4 12241
3eb128b2
AM		 12242 r_symndx = ELF32_R_SYM (rel->r_info);
12243 if (r_symndx >= symtab_hdr->sh_info)
12244 {
12245 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12246 while (h->root.type == bfd_link_hash_indirect
12247 || h->root.type == bfd_link_hash_warning)
12248 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12249 }
f6e32f6d
RS		 12250 eh = (struct elf32_arm_link_hash_entry *) h;
12251
34e77a92 12252 call_reloc_p = FALSE;
f6e32f6d
RS		 12253 may_become_dynamic_p = FALSE;
12254 may_need_local_target_p = FALSE;
3eb128b2 12255
eb043451 12256 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12257 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 12258 switch (r_type)
12259 {
12260 case R_ARM_GOT32:
eb043451 12261 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12262 case R_ARM_TLS_GD32:
12263 case R_ARM_TLS_IE32:
3eb128b2 12264 if (h != NULL)
eb043451 12265 {
eb043451
PB		 12266 if (h->got.refcount > 0)
12267 h->got.refcount -= 1;
12268 }
12269 else if (local_got_refcounts != NULL)
12270 {
12271 if (local_got_refcounts[r_symndx] > 0)
12272 local_got_refcounts[r_symndx] -= 1;
12273 }
12274 break;
12275
ba93b8ac 12276 case R_ARM_TLS_LDM32:
4dfe6ac6 12277 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12278 break;
12279
eb043451
PB		 12280 case R_ARM_PC24:
12281 case R_ARM_PLT32:
5b5bb741
PB		 12282 case R_ARM_CALL:
12283 case R_ARM_JUMP24:
eb043451 12284 case R_ARM_PREL31:
c19d1205 12285 case R_ARM_THM_CALL:
bd97cb95
DJ		 12286 case R_ARM_THM_JUMP24:
12287 case R_ARM_THM_JUMP19:
34e77a92 12288 call_reloc_p = TRUE;
f6e32f6d
RS		 12289 may_need_local_target_p = TRUE;
12290 break;
12291
12292 case R_ARM_ABS12:
12293 if (!globals->vxworks_p)
12294 {
12295 may_need_local_target_p = TRUE;
12296 break;
12297 }
12298 /* Fall through. */
12299 case R_ARM_ABS32:
12300 case R_ARM_ABS32_NOI:
12301 case R_ARM_REL32:
12302 case R_ARM_REL32_NOI:
b6895b4f
PB		 12303 case R_ARM_MOVW_ABS_NC:
12304 case R_ARM_MOVT_ABS:
12305 case R_ARM_MOVW_PREL_NC:
12306 case R_ARM_MOVT_PREL:
12307 case R_ARM_THM_MOVW_ABS_NC:
12308 case R_ARM_THM_MOVT_ABS:
12309 case R_ARM_THM_MOVW_PREL_NC:
12310 case R_ARM_THM_MOVT_PREL:
b7693d02 12311 /* Should the interworking branches be here also? */
f6e32f6d 12312 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12313 && (sec->flags & SEC_ALLOC) != 0)
12314 {
12315 if (h == NULL
12316 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12317 {
12318 call_reloc_p = TRUE;
12319 may_need_local_target_p = TRUE;
12320 }
12321 else
12322 may_become_dynamic_p = TRUE;
12323 }
f6e32f6d
RS		 12324 else
12325 may_need_local_target_p = TRUE;
12326 break;
b7693d02 12327
f6e32f6d
RS		 12328 default:
12329 break;
12330 }
5e681ec4 12331
34e77a92
RS		 12332 if (may_need_local_target_p
12333 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12334 {
27586251
HPN		 12335 /* If PLT refcount book-keeping is wrong and too low, we'll
12336 see a zero value (going to -1) for the root PLT reference
12337 count. */
12338 if (root_plt->refcount >= 0)
12339 {
12340 BFD_ASSERT (root_plt->refcount != 0);
12341 root_plt->refcount -= 1;
12342 }
12343 else
12344 /* A value of -1 means the symbol has become local, forced
12345 or seeing a hidden definition. Any other negative value
12346 is an error. */
12347 BFD_ASSERT (root_plt->refcount == -1);
34e77a92
RS		 12348
12349 if (!call_reloc_p)
12350 arm_plt->noncall_refcount--;
5e681ec4 12351
f6e32f6d 12352 if (r_type == R_ARM_THM_CALL)
34e77a92 12353 arm_plt->maybe_thumb_refcount--;
bd97cb95 12354
f6e32f6d
RS		 12355 if (r_type == R_ARM_THM_JUMP24
12356 || r_type == R_ARM_THM_JUMP19)
34e77a92 12357 arm_plt->thumb_refcount--;
f6e32f6d 12358 }
5e681ec4 12359
34e77a92 12360 if (may_become_dynamic_p)
f6e32f6d
RS		 12361 {
12362 struct elf_dyn_relocs **pp;
12363 struct elf_dyn_relocs *p;
5e681ec4 12364
34e77a92 12365 if (h != NULL)
9c489990 12366 pp = &(eh->dyn_relocs);
34e77a92
RS		 12367 else
12368 {
12369 Elf_Internal_Sym *isym;
12370
12371 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12372 abfd, r_symndx);
12373 if (isym == NULL)
12374 return FALSE;
12375 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12376 if (pp == NULL)
12377 return FALSE;
12378 }
9c489990 12379 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12380 if (p->sec == sec)
12381 {
12382 /* Everything must go for SEC. */
12383 *pp = p->next;
12384 break;
12385 }
eb043451
PB		 12386 }
12387 }
5e681ec4 12388
b34976b6 12389 return TRUE;
252b5132
RH		 12390}
12391
780a67af
NC		 12392/* Look through the relocs for a section during the first phase. */
12393
b34976b6 12394static bfd_boolean
57e8b36a
NC		 12395elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12396 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12397{
b34976b6
AM		 12398 Elf_Internal_Shdr *symtab_hdr;
12399 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12400 const Elf_Internal_Rela *rel;
12401 const Elf_Internal_Rela *rel_end;
12402 bfd *dynobj;
5e681ec4 12403 asection *sreloc;
5e681ec4 12404 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12405 bfd_boolean call_reloc_p;
12406 bfd_boolean may_become_dynamic_p;
12407 bfd_boolean may_need_local_target_p;
ce98a316 12408 unsigned long nsyms;
9a5aca8c 12409
1049f94e 12410 if (info->relocatable)
b34976b6 12411 return TRUE;
9a5aca8c 12412
0ffa91dd
NC		 12413 BFD_ASSERT (is_arm_elf (abfd));
12414
5e681ec4 12415 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12416 if (htab == NULL)
12417 return FALSE;
12418
5e681ec4 12419 sreloc = NULL;
9a5aca8c 12420
67687978
PB		 12421 /* Create dynamic sections for relocatable executables so that we can
12422 copy relocations. */
12423 if (htab->root.is_relocatable_executable
12424 && ! htab->root.dynamic_sections_created)
12425 {
12426 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12427 return FALSE;
12428 }
12429
cbc704f3
RS		 12430 if (htab->root.dynobj == NULL)
12431 htab->root.dynobj = abfd;
34e77a92
RS		 12432 if (!create_ifunc_sections (info))
12433 return FALSE;
cbc704f3
RS		 12434
12435 dynobj = htab->root.dynobj;
12436
0ffa91dd 12437 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12438 sym_hashes = elf_sym_hashes (abfd);
ce98a316 12439 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
b38cadfb 12440
252b5132
RH		 12441 rel_end = relocs + sec->reloc_count;
12442 for (rel = relocs; rel < rel_end; rel++)
12443 {
34e77a92 12444 Elf_Internal_Sym *isym;
252b5132 12445 struct elf_link_hash_entry *h;
b7693d02 12446 struct elf32_arm_link_hash_entry *eh;
252b5132 12447 unsigned long r_symndx;
eb043451 12448 int r_type;
9a5aca8c 12449
252b5132 12450 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12451 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12452 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12453
ce98a316
NC		 12454 if (r_symndx >= nsyms
12455 /* PR 9934: It is possible to have relocations that do not
12456 refer to symbols, thus it is also possible to have an
12457 object file containing relocations but no symbol table. */
cf35638d 12458 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12459 {
12460 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12461 r_symndx);
ba93b8ac
DJ		 12462 return FALSE;
12463 }
12464
34e77a92
RS		 12465 h = NULL;
12466 isym = NULL;
12467 if (nsyms > 0)
973a3492 12468 {
34e77a92
RS		 12469 if (r_symndx < symtab_hdr->sh_info)
12470 {
12471 /* A local symbol. */
12472 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12473 abfd, r_symndx);
12474 if (isym == NULL)
12475 return FALSE;
12476 }
12477 else
12478 {
12479 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12480 while (h->root.type == bfd_link_hash_indirect
12481 || h->root.type == bfd_link_hash_warning)
12482 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12483 }
973a3492 12484 }
9a5aca8c 12485
b7693d02
DJ		 12486 eh = (struct elf32_arm_link_hash_entry *) h;
12487
f6e32f6d
RS		 12488 call_reloc_p = FALSE;
12489 may_become_dynamic_p = FALSE;
12490 may_need_local_target_p = FALSE;
12491
0855e32b
NS		 12492 /* Could be done earlier, if h were already available. */
12493 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12494 switch (r_type)
252b5132 12495 {
5e681ec4 12496 case R_ARM_GOT32:
eb043451 12497 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12498 case R_ARM_TLS_GD32:
12499 case R_ARM_TLS_IE32:
0855e32b
NS		 12500 case R_ARM_TLS_GOTDESC:
12501 case R_ARM_TLS_DESCSEQ:
12502 case R_ARM_THM_TLS_DESCSEQ:
12503 case R_ARM_TLS_CALL:
12504 case R_ARM_THM_TLS_CALL:
5e681ec4 12505 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12506 {
12507 int tls_type, old_tls_type;
5e681ec4 12508
ba93b8ac
DJ		 12509 switch (r_type)
12510 {
12511 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
b38cadfb 12512
ba93b8ac 12513 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
b38cadfb 12514
0855e32b
NS		 12515 case R_ARM_TLS_GOTDESC:
12516 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12517 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12518 tls_type = GOT_TLS_GDESC; break;
b38cadfb 12519
ba93b8ac
DJ		 12520 default: tls_type = GOT_NORMAL; break;
12521 }
252b5132 12522
ba93b8ac
DJ		 12523 if (h != NULL)
12524 {
12525 h->got.refcount++;
12526 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12527 }
12528 else
12529 {
ba93b8ac 12530 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12531 if (!elf32_arm_allocate_local_sym_info (abfd))
12532 return FALSE;
12533 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12534 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12535 }
12536
0855e32b
NS		 12537 /* If a variable is accessed with both tls methods, two
12538 slots may be created. */
12539 if (GOT_TLS_GD_ANY_P (old_tls_type)
12540 && GOT_TLS_GD_ANY_P (tls_type))
12541 tls_type |= old_tls_type;
12542
12543 /* We will already have issued an error message if there
12544 is a TLS/non-TLS mismatch, based on the symbol
12545 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12546 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12547 && tls_type != GOT_NORMAL)
12548 tls_type |= old_tls_type;
12549
0855e32b
NS		 12550 /* If the symbol is accessed in both IE and GDESC
12551 method, we're able to relax. Turn off the GDESC flag,
12552 without messing up with any other kind of tls types
12553 that may be involved */
12554 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12555 tls_type &= ~GOT_TLS_GDESC;
12556
ba93b8ac
DJ		 12557 if (old_tls_type != tls_type)
12558 {
12559 if (h != NULL)
12560 elf32_arm_hash_entry (h)->tls_type = tls_type;
12561 else
12562 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12563 }
12564 }
8029a119 12565 /* Fall through. */
ba93b8ac
DJ		 12566
12567 case R_ARM_TLS_LDM32:
12568 if (r_type == R_ARM_TLS_LDM32)
12569 htab->tls_ldm_got.refcount++;
8029a119 12570 /* Fall through. */
252b5132 12571
c19d1205 12572 case R_ARM_GOTOFF32:
5e681ec4 12573 case R_ARM_GOTPC:
cbc704f3
RS		 12574 if (htab->root.sgot == NULL
12575 && !create_got_section (htab->root.dynobj, info))
12576 return FALSE;
252b5132
RH		 12577 break;
12578
252b5132 12579 case R_ARM_PC24:
7359ea65 12580 case R_ARM_PLT32:
5b5bb741
PB		 12581 case R_ARM_CALL:
12582 case R_ARM_JUMP24:
eb043451 12583 case R_ARM_PREL31:
c19d1205 12584 case R_ARM_THM_CALL:
bd97cb95
DJ		 12585 case R_ARM_THM_JUMP24:
12586 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12587 call_reloc_p = TRUE;
12588 may_need_local_target_p = TRUE;
12589 break;
12590
12591 case R_ARM_ABS12:
12592 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12593 ldr __GOTT_INDEX__ offsets. */
12594 if (!htab->vxworks_p)
12595 {
12596 may_need_local_target_p = TRUE;
12597 break;
12598 }
12599 /* Fall through. */
39623e12 12600
96c23d59
JM		 12601 case R_ARM_MOVW_ABS_NC:
12602 case R_ARM_MOVT_ABS:
12603 case R_ARM_THM_MOVW_ABS_NC:
12604 case R_ARM_THM_MOVT_ABS:
12605 if (info->shared)
12606 {
12607 (*_bfd_error_handler)
12608 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12609 abfd, elf32_arm_howto_table_1[r_type].name,
12610 (h) ? h->root.root.string : "a local symbol");
12611 bfd_set_error (bfd_error_bad_value);
12612 return FALSE;
12613 }
12614
12615 /* Fall through. */
39623e12
PB		 12616 case R_ARM_ABS32:
12617 case R_ARM_ABS32_NOI:
12618 case R_ARM_REL32:
12619 case R_ARM_REL32_NOI:
b6895b4f
PB		 12620 case R_ARM_MOVW_PREL_NC:
12621 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12622 case R_ARM_THM_MOVW_PREL_NC:
12623 case R_ARM_THM_MOVT_PREL:
39623e12 12624
b7693d02 12625 /* Should the interworking branches be listed here? */
67687978 12626 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12627 && (sec->flags & SEC_ALLOC) != 0)
12628 {
12629 if (h == NULL
12630 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12631 {
12632 /* In shared libraries and relocatable executables,
12633 we treat local relative references as calls;
12634 see the related SYMBOL_CALLS_LOCAL code in
12635 allocate_dynrelocs. */
12636 call_reloc_p = TRUE;
12637 may_need_local_target_p = TRUE;
12638 }
12639 else
12640 /* We are creating a shared library or relocatable
12641 executable, and this is a reloc against a global symbol,
12642 or a non-PC-relative reloc against a local symbol.
12643 We may need to copy the reloc into the output. */
12644 may_become_dynamic_p = TRUE;
12645 }
f6e32f6d
RS		 12646 else
12647 may_need_local_target_p = TRUE;
252b5132
RH		 12648 break;
12649
12650 /* This relocation describes the C++ object vtable hierarchy.
12651 Reconstruct it for later use during GC. */
12652 case R_ARM_GNU_VTINHERIT:
c152c796 12653 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 12654 return FALSE;
252b5132 12655 break;
9a5aca8c 12656
252b5132
RH		 12657 /* This relocation describes which C++ vtable entries are actually
12658 used. Record for later use during GC. */
12659 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 12660 BFD_ASSERT (h != NULL);
12661 if (h != NULL
12662 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 12663 return FALSE;
252b5132
RH		 12664 break;
12665 }
f6e32f6d
RS		 12666
12667 if (h != NULL)
12668 {
12669 if (call_reloc_p)
12670 /* We may need a .plt entry if the function this reloc
12671 refers to is in a different object, regardless of the
12672 symbol's type. We can't tell for sure yet, because
12673 something later might force the symbol local. */
12674 h->needs_plt = 1;
12675 else if (may_need_local_target_p)
12676 /* If this reloc is in a read-only section, we might
12677 need a copy reloc. We can't check reliably at this
12678 stage whether the section is read-only, as input
12679 sections have not yet been mapped to output sections.
12680 Tentatively set the flag for now, and correct in
12681 adjust_dynamic_symbol. */
12682 h->non_got_ref = 1;
12683 }
12684
34e77a92
RS		 12685 if (may_need_local_target_p
12686 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12687 {
34e77a92
RS		 12688 union gotplt_union *root_plt;
12689 struct arm_plt_info *arm_plt;
12690 struct arm_local_iplt_info *local_iplt;
12691
12692 if (h != NULL)
12693 {
12694 root_plt = &h->plt;
12695 arm_plt = &eh->plt;
12696 }
12697 else
12698 {
12699 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12700 if (local_iplt == NULL)
12701 return FALSE;
12702 root_plt = &local_iplt->root;
12703 arm_plt = &local_iplt->arm;
12704 }
12705
f6e32f6d
RS		 12706 /* If the symbol is a function that doesn't bind locally,
12707 this relocation will need a PLT entry. */
a8c887dd
NC		 12708 if (root_plt->refcount != -1)
12709 root_plt->refcount += 1;
34e77a92
RS		 12710
12711 if (!call_reloc_p)
12712 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12713
12714 /* It's too early to use htab->use_blx here, so we have to
12715 record possible blx references separately from
12716 relocs that definitely need a thumb stub. */
12717
12718 if (r_type == R_ARM_THM_CALL)
34e77a92 12719 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12720
12721 if (r_type == R_ARM_THM_JUMP24
12722 || r_type == R_ARM_THM_JUMP19)
34e77a92 12723 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12724 }
12725
12726 if (may_become_dynamic_p)
12727 {
12728 struct elf_dyn_relocs *p, **head;
12729
12730 /* Create a reloc section in dynobj. */
12731 if (sreloc == NULL)
12732 {
12733 sreloc = _bfd_elf_make_dynamic_reloc_section
12734 (sec, dynobj, 2, abfd, ! htab->use_rel);
12735
12736 if (sreloc == NULL)
12737 return FALSE;
12738
12739 /* BPABI objects never have dynamic relocations mapped. */
12740 if (htab->symbian_p)
12741 {
12742 flagword flags;
12743
12744 flags = bfd_get_section_flags (dynobj, sreloc);
12745 flags &= ~(SEC_LOAD | SEC_ALLOC);
12746 bfd_set_section_flags (dynobj, sreloc, flags);
12747 }
12748 }
12749
12750 /* If this is a global symbol, count the number of
12751 relocations we need for this symbol. */
12752 if (h != NULL)
12753 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12754 else
12755 {
34e77a92
RS		 12756 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12757 if (head == NULL)
f6e32f6d 12758 return FALSE;
f6e32f6d
RS		 12759 }
12760
12761 p = *head;
12762 if (p == NULL || p->sec != sec)
12763 {
12764 bfd_size_type amt = sizeof *p;
12765
12766 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12767 if (p == NULL)
12768 return FALSE;
12769 p->next = *head;
12770 *head = p;
12771 p->sec = sec;
12772 p->count = 0;
12773 p->pc_count = 0;
12774 }
12775
12776 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12777 p->pc_count += 1;
12778 p->count += 1;
12779 }
252b5132 12780 }
f21f3fe0 12781
b34976b6 12782 return TRUE;
252b5132
RH		 12783}
12784
6a5bb875
PB		 12785/* Unwinding tables are not referenced directly. This pass marks them as
12786 required if the corresponding code section is marked. */
12787
12788static bfd_boolean
906e58ca
NC		 12789elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12790 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12791{
12792 bfd *sub;
12793 Elf_Internal_Shdr **elf_shdrp;
12794 bfd_boolean again;
12795
7f6ab9f8
AM		 12796 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12797
6a5bb875
PB		 12798 /* Marking EH data may cause additional code sections to be marked,
12799 requiring multiple passes. */
12800 again = TRUE;
12801 while (again)
12802 {
12803 again = FALSE;
12804 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12805 {
12806 asection *o;
12807
0ffa91dd 12808 if (! is_arm_elf (sub))
6a5bb875
PB		 12809 continue;
12810
12811 elf_shdrp = elf_elfsections (sub);
12812 for (o = sub->sections; o != NULL; o = o->next)
12813 {
12814 Elf_Internal_Shdr *hdr;
0ffa91dd 12815
6a5bb875 12816 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 12817 if (hdr->sh_type == SHT_ARM_EXIDX
12818 && hdr->sh_link
12819 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 12820 && !o->gc_mark
12821 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12822 {
12823 again = TRUE;
12824 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12825 return FALSE;
12826 }
12827 }
12828 }
12829 }
12830
12831 return TRUE;
12832}
12833
3c9458e9
NC		 12834/* Treat mapping symbols as special target symbols. */
12835
12836static bfd_boolean
12837elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12838{
b0796911
PB		 12839 return bfd_is_arm_special_symbol_name (sym->name,
12840 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 12841}
12842
0367ecfb
NC		 12843/* This is a copy of elf_find_function() from elf.c except that
12844 ARM mapping symbols are ignored when looking for function names
12845 and STT_ARM_TFUNC is considered to a function type. */
252b5132 12846
0367ecfb
NC		 12847static bfd_boolean
12848arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12849 asection * section,
12850 asymbol ** symbols,
12851 bfd_vma offset,
12852 const char ** filename_ptr,
12853 const char ** functionname_ptr)
12854{
12855 const char * filename = NULL;
12856 asymbol * func = NULL;
12857 bfd_vma low_func = 0;
12858 asymbol ** p;
252b5132
RH		 12859
12860 for (p = symbols; *p != NULL; p++)
12861 {
12862 elf_symbol_type *q;
12863
12864 q = (elf_symbol_type *) *p;
12865
252b5132
RH		 12866 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12867 {
12868 default:
12869 break;
12870 case STT_FILE:
12871 filename = bfd_asymbol_name (&q->symbol);
12872 break;
252b5132
RH		 12873 case STT_FUNC:
12874 case STT_ARM_TFUNC:
9d2da7ca 12875 case STT_NOTYPE:
b0796911 12876 /* Skip mapping symbols. */
0367ecfb 12877 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 12878 && bfd_is_arm_special_symbol_name (q->symbol.name,
12879 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 12880 continue;
12881 /* Fall through. */
6b40fcba 12882 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 12883 && q->symbol.value >= low_func
12884 && q->symbol.value <= offset)
12885 {
12886 func = (asymbol *) q;
12887 low_func = q->symbol.value;
12888 }
12889 break;
12890 }
12891 }
12892
12893 if (func == NULL)
b34976b6 12894 return FALSE;
252b5132 12895
0367ecfb
NC		 12896 if (filename_ptr)
12897 *filename_ptr = filename;
12898 if (functionname_ptr)
12899 *functionname_ptr = bfd_asymbol_name (func);
12900
12901 return TRUE;
906e58ca 12902}
0367ecfb
NC		 12903
12904
12905/* Find the nearest line to a particular section and offset, for error
12906 reporting. This code is a duplicate of the code in elf.c, except
12907 that it uses arm_elf_find_function. */
12908
12909static bfd_boolean
12910elf32_arm_find_nearest_line (bfd * abfd,
12911 asection * section,
12912 asymbol ** symbols,
12913 bfd_vma offset,
12914 const char ** filename_ptr,
12915 const char ** functionname_ptr,
12916 unsigned int * line_ptr)
12917{
12918 bfd_boolean found = FALSE;
12919
12920 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12921
fc28f9aa
TG		 12922 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12923 section, symbols, offset,
0367ecfb 12924 filename_ptr, functionname_ptr,
9b8d1a36 12925 line_ptr, NULL, 0,
0367ecfb
NC		 12926 & elf_tdata (abfd)->dwarf2_find_line_info))
12927 {
12928 if (!*functionname_ptr)
12929 arm_elf_find_function (abfd, section, symbols, offset,
12930 *filename_ptr ? NULL : filename_ptr,
12931 functionname_ptr);
f21f3fe0 12932
0367ecfb
NC		 12933 return TRUE;
12934 }
12935
12936 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12937 & found, filename_ptr,
12938 functionname_ptr, line_ptr,
12939 & elf_tdata (abfd)->line_info))
12940 return FALSE;
12941
12942 if (found && (*functionname_ptr || *line_ptr))
12943 return TRUE;
12944
12945 if (symbols == NULL)
12946 return FALSE;
12947
12948 if (! arm_elf_find_function (abfd, section, symbols, offset,
12949 filename_ptr, functionname_ptr))
12950 return FALSE;
12951
12952 *line_ptr = 0;
b34976b6 12953 return TRUE;
252b5132
RH		 12954}
12955
4ab527b0
FF		 12956static bfd_boolean
12957elf32_arm_find_inliner_info (bfd * abfd,
12958 const char ** filename_ptr,
12959 const char ** functionname_ptr,
12960 unsigned int * line_ptr)
12961{
12962 bfd_boolean found;
12963 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12964 functionname_ptr, line_ptr,
12965 & elf_tdata (abfd)->dwarf2_find_line_info);
12966 return found;
12967}
12968
252b5132
RH		 12969/* Adjust a symbol defined by a dynamic object and referenced by a
12970 regular object. The current definition is in some section of the
12971 dynamic object, but we're not including those sections. We have to
12972 change the definition to something the rest of the link can
12973 understand. */
12974
b34976b6 12975static bfd_boolean
57e8b36a
NC		 12976elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12977 struct elf_link_hash_entry * h)
252b5132
RH		 12978{
12979 bfd * dynobj;
12980 asection * s;
b7693d02 12981 struct elf32_arm_link_hash_entry * eh;
67687978 12982 struct elf32_arm_link_hash_table *globals;
252b5132 12983
67687978 12984 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12985 if (globals == NULL)
12986 return FALSE;
12987
252b5132
RH		 12988 dynobj = elf_hash_table (info)->dynobj;
12989
12990 /* Make sure we know what is going on here. */
12991 BFD_ASSERT (dynobj != NULL
f5385ebf 12992 && (h->needs_plt
34e77a92 12993 || h->type == STT_GNU_IFUNC
f6e332e6 12994 || h->u.weakdef != NULL
f5385ebf
AM		 12995 || (h->def_dynamic
12996 && h->ref_regular
12997 && !h->def_regular)));
252b5132 12998
b7693d02
DJ		 12999 eh = (struct elf32_arm_link_hash_entry *) h;
13000
252b5132
RH		 13001 /* If this is a function, put it in the procedure linkage table. We
13002 will fill in the contents of the procedure linkage table later,
13003 when we know the address of the .got section. */
34e77a92 13004 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 13005 {
34e77a92
RS		 13006 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13007 symbol binds locally. */
5e681ec4 13008 if (h->plt.refcount <= 0
34e77a92
RS		 13009 || (h->type != STT_GNU_IFUNC
13010 && (SYMBOL_CALLS_LOCAL (info, h)
13011 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13012 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 13013 {
13014 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 13015 file, but the symbol was never referred to by a dynamic
13016 object, or if all references were garbage collected. In
13017 such a case, we don't actually need to build a procedure
13018 linkage table, and we can just do a PC24 reloc instead. */
13019 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13020 eh->plt.thumb_refcount = 0;
13021 eh->plt.maybe_thumb_refcount = 0;
13022 eh->plt.noncall_refcount = 0;
f5385ebf 13023 h->needs_plt = 0;
252b5132
RH		 13024 }
13025
b34976b6 13026 return TRUE;
252b5132 13027 }
5e681ec4 13028 else
b7693d02
DJ		 13029 {
13030 /* It's possible that we incorrectly decided a .plt reloc was
13031 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13032 in check_relocs. We can't decide accurately between function
13033 and non-function syms in check-relocs; Objects loaded later in
13034 the link may change h->type. So fix it now. */
13035 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13036 eh->plt.thumb_refcount = 0;
13037 eh->plt.maybe_thumb_refcount = 0;
13038 eh->plt.noncall_refcount = 0;
b7693d02 13039 }
252b5132
RH		 13040
13041 /* If this is a weak symbol, and there is a real definition, the
13042 processor independent code will have arranged for us to see the
13043 real definition first, and we can just use the same value. */
f6e332e6 13044 if (h->u.weakdef != NULL)
252b5132 13045 {
f6e332e6
AM		 13046 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13047 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13048 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13049 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 13050 return TRUE;
252b5132
RH		 13051 }
13052
ba93b8ac
DJ		 13053 /* If there are no non-GOT references, we do not need a copy
13054 relocation. */
13055 if (!h->non_got_ref)
13056 return TRUE;
13057
252b5132
RH		 13058 /* This is a reference to a symbol defined by a dynamic object which
13059 is not a function. */
13060
13061 /* If we are creating a shared library, we must presume that the
13062 only references to the symbol are via the global offset table.
13063 For such cases we need not do anything here; the relocations will
67687978
PB		 13064 be handled correctly by relocate_section. Relocatable executables
13065 can reference data in shared objects directly, so we don't need to
13066 do anything here. */
13067 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 13068 return TRUE;
252b5132
RH		 13069
13070 /* We must allocate the symbol in our .dynbss section, which will
13071 become part of the .bss section of the executable. There will be
13072 an entry for this symbol in the .dynsym section. The dynamic
13073 object will contain position independent code, so all references
13074 from the dynamic object to this symbol will go through the global
13075 offset table. The dynamic linker will use the .dynsym entry to
13076 determine the address it must put in the global offset table, so
13077 both the dynamic object and the regular object will refer to the
13078 same memory location for the variable. */
3d4d4302 13079 s = bfd_get_linker_section (dynobj, ".dynbss");
252b5132
RH		 13080 BFD_ASSERT (s != NULL);
13081
13082 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13083 copy the initial value out of the dynamic object and into the
13084 runtime process image. We need to remember the offset into the
00a97672 13085 .rel(a).bss section we are going to use. */
1d7e9d18 13086 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
252b5132
RH		 13087 {
13088 asection *srel;
13089
3d4d4302 13090 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 13091 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 13092 h->needs_copy = 1;
252b5132
RH		 13093 }
13094
027297b7 13095 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 13096}
13097
5e681ec4
PB		 13098/* Allocate space in .plt, .got and associated reloc sections for
13099 dynamic relocs. */
13100
13101static bfd_boolean
47beaa6a 13102allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 13103{
13104 struct bfd_link_info *info;
13105 struct elf32_arm_link_hash_table *htab;
13106 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 13107 struct elf_dyn_relocs *p;
5e681ec4
PB		 13108
13109 if (h->root.type == bfd_link_hash_indirect)
13110 return TRUE;
13111
e6a6bb22
AM		 13112 eh = (struct elf32_arm_link_hash_entry *) h;
13113
5e681ec4
PB		 13114 info = (struct bfd_link_info *) inf;
13115 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13116 if (htab == NULL)
13117 return FALSE;
5e681ec4 13118
34e77a92 13119 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 13120 && h->plt.refcount > 0)
13121 {
13122 /* Make sure this symbol is output as a dynamic symbol.
13123 Undefined weak syms won't yet be marked as dynamic. */
13124 if (h->dynindx == -1
f5385ebf 13125 && !h->forced_local)
5e681ec4 13126 {
c152c796 13127 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13128 return FALSE;
13129 }
13130
34e77a92
RS		 13131 /* If the call in the PLT entry binds locally, the associated
13132 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13133 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13134 than the .plt section. */
13135 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13136 {
13137 eh->is_iplt = 1;
13138 if (eh->plt.noncall_refcount == 0
13139 && SYMBOL_REFERENCES_LOCAL (info, h))
13140 /* All non-call references can be resolved directly.
13141 This means that they can (and in some cases, must)
13142 resolve directly to the run-time target, rather than
13143 to the PLT. That in turns means that any .got entry
13144 would be equal to the .igot.plt entry, so there's
13145 no point having both. */
13146 h->got.refcount = 0;
13147 }
13148
5e681ec4 13149 if (info->shared
34e77a92 13150 || eh->is_iplt
7359ea65 13151 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 13152 {
34e77a92 13153 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 13154
5e681ec4
PB		 13155 /* If this symbol is not defined in a regular file, and we are
13156 not generating a shared library, then set the symbol to this
13157 location in the .plt. This is required to make function
13158 pointers compare as equal between the normal executable and
13159 the shared library. */
13160 if (! info->shared
f5385ebf 13161 && !h->def_regular)
5e681ec4 13162 {
34e77a92 13163 h->root.u.def.section = htab->root.splt;
5e681ec4 13164 h->root.u.def.value = h->plt.offset;
5e681ec4 13165
67d74e43
DJ		 13166 /* Make sure the function is not marked as Thumb, in case
13167 it is the target of an ABS32 relocation, which will
13168 point to the PLT entry. */
35fc36a8 13169 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 13170 }
022f8312 13171
0855e32b 13172 htab->next_tls_desc_index++;
00a97672
RS		 13173
13174 /* VxWorks executables have a second set of relocations for
13175 each PLT entry. They go in a separate relocation section,
13176 which is processed by the kernel loader. */
13177 if (htab->vxworks_p && !info->shared)
13178 {
13179 /* There is a relocation for the initial PLT entry:
13180 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13181 if (h->plt.offset == htab->plt_header_size)
47beaa6a 13182 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 13183
13184 /* There are two extra relocations for each subsequent
13185 PLT entry: an R_ARM_32 relocation for the GOT entry,
13186 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 13187 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 13188 }
5e681ec4
PB		 13189 }
13190 else
13191 {
13192 h->plt.offset = (bfd_vma) -1;
f5385ebf 13193 h->needs_plt = 0;
5e681ec4
PB		 13194 }
13195 }
13196 else
13197 {
13198 h->plt.offset = (bfd_vma) -1;
f5385ebf 13199 h->needs_plt = 0;
5e681ec4
PB		 13200 }
13201
0855e32b
NS		 13202 eh = (struct elf32_arm_link_hash_entry *) h;
13203 eh->tlsdesc_got = (bfd_vma) -1;
13204
5e681ec4
PB		 13205 if (h->got.refcount > 0)
13206 {
13207 asection *s;
13208 bfd_boolean dyn;
ba93b8ac
DJ		 13209 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13210 int indx;
5e681ec4
PB		 13211
13212 /* Make sure this symbol is output as a dynamic symbol.
13213 Undefined weak syms won't yet be marked as dynamic. */
13214 if (h->dynindx == -1
f5385ebf 13215 && !h->forced_local)
5e681ec4 13216 {
c152c796 13217 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13218 return FALSE;
13219 }
13220
e5a52504
MM		 13221 if (!htab->symbian_p)
13222 {
362d30a1 13223 s = htab->root.sgot;
e5a52504 13224 h->got.offset = s->size;
ba93b8ac
DJ		 13225
13226 if (tls_type == GOT_UNKNOWN)
13227 abort ();
13228
13229 if (tls_type == GOT_NORMAL)
13230 /* Non-TLS symbols need one GOT slot. */
13231 s->size += 4;
13232 else
13233 {
0855e32b
NS		 13234 if (tls_type & GOT_TLS_GDESC)
13235 {
13236 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13237 eh->tlsdesc_got
13238 = (htab->root.sgotplt->size
13239 - elf32_arm_compute_jump_table_size (htab));
13240 htab->root.sgotplt->size += 8;
13241 h->got.offset = (bfd_vma) -2;
34e77a92 13242 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13243 reloc in the middle of .got.plt. */
13244 htab->num_tls_desc++;
13245 }
13246
ba93b8ac 13247 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 13248 {
13249 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13250 the symbol is both GD and GDESC, got.offset may
13251 have been overwritten. */
13252 h->got.offset = s->size;
13253 s->size += 8;
13254 }
13255
ba93b8ac
DJ		 13256 if (tls_type & GOT_TLS_IE)
13257 /* R_ARM_TLS_IE32 needs one GOT slot. */
13258 s->size += 4;
13259 }
13260
e5a52504 13261 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 13262
13263 indx = 0;
13264 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13265 && (!info->shared
13266 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13267 indx = h->dynindx;
13268
13269 if (tls_type != GOT_NORMAL
13270 && (info->shared || indx != 0)
13271 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13272 || h->root.type != bfd_link_hash_undefweak))
13273 {
13274 if (tls_type & GOT_TLS_IE)
47beaa6a 13275 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13276
13277 if (tls_type & GOT_TLS_GD)
47beaa6a 13278 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13279
b38cadfb 13280 if (tls_type & GOT_TLS_GDESC)
0855e32b 13281 {
47beaa6a 13282 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13283 /* GDESC needs a trampoline to jump to. */
13284 htab->tls_trampoline = -1;
13285 }
13286
13287 /* Only GD needs it. GDESC just emits one relocation per
13288 2 entries. */
b38cadfb 13289 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13290 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13291 }
b436d854
RS		 13292 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13293 {
13294 if (htab->root.dynamic_sections_created)
13295 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13296 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13297 }
34e77a92
RS		 13298 else if (h->type == STT_GNU_IFUNC
13299 && eh->plt.noncall_refcount == 0)
13300 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13301 they all resolve dynamically instead. Reserve room for the
13302 GOT entry's R_ARM_IRELATIVE relocation. */
13303 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
b436d854
RS		 13304 else if (info->shared)
13305 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13306 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13307 }
5e681ec4
PB		 13308 }
13309 else
13310 h->got.offset = (bfd_vma) -1;
13311
a4fd1a8e
PB		 13312 /* Allocate stubs for exported Thumb functions on v4t. */
13313 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13314 && h->def_regular
35fc36a8 13315 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13316 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13317 {
13318 struct elf_link_hash_entry * th;
13319 struct bfd_link_hash_entry * bh;
13320 struct elf_link_hash_entry * myh;
13321 char name[1024];
13322 asection *s;
13323 bh = NULL;
13324 /* Create a new symbol to regist the real location of the function. */
13325 s = h->root.u.def.section;
906e58ca 13326 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13327 _bfd_generic_link_add_one_symbol (info, s->owner,
13328 name, BSF_GLOBAL, s,
13329 h->root.u.def.value,
13330 NULL, TRUE, FALSE, &bh);
13331
13332 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13333 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13334 myh->forced_local = 1;
35fc36a8 13335 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13336 eh->export_glue = myh;
13337 th = record_arm_to_thumb_glue (info, h);
13338 /* Point the symbol at the stub. */
13339 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13340 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13341 h->root.u.def.section = th->root.u.def.section;
13342 h->root.u.def.value = th->root.u.def.value & ~1;
13343 }
13344
0bdcacaf 13345 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13346 return TRUE;
13347
13348 /* In the shared -Bsymbolic case, discard space allocated for
13349 dynamic pc-relative relocs against symbols which turn out to be
13350 defined in regular objects. For the normal shared case, discard
13351 space for pc-relative relocs that have become local due to symbol
13352 visibility changes. */
13353
67687978 13354 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13355 {
7bdca076 13356 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 13357 R_ARM_REL32_NOI, which will appear on something like
13358 ".long foo - .". We want calls to protected symbols to resolve
13359 directly to the function rather than going via the plt. If people
13360 want function pointer comparisons to work as expected then they
13361 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13362 if (SYMBOL_CALLS_LOCAL (info, h))
13363 {
0bdcacaf 13364 struct elf_dyn_relocs **pp;
ba93b8ac 13365
0bdcacaf 13366 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13367 {
13368 p->count -= p->pc_count;
13369 p->pc_count = 0;
13370 if (p->count == 0)
13371 *pp = p->next;
13372 else
13373 pp = &p->next;
13374 }
13375 }
13376
4dfe6ac6 13377 if (htab->vxworks_p)
3348747a 13378 {
0bdcacaf 13379 struct elf_dyn_relocs **pp;
3348747a 13380
0bdcacaf 13381 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13382 {
0bdcacaf 13383 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13384 *pp = p->next;
13385 else
13386 pp = &p->next;
13387 }
13388 }
13389
ba93b8ac 13390 /* Also discard relocs on undefined weak syms with non-default
7359ea65 13391 visibility. */
0bdcacaf 13392 if (eh->dyn_relocs != NULL
5e681ec4 13393 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13394 {
13395 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13396 eh->dyn_relocs = NULL;
22d606e9
AM		 13397
13398 /* Make sure undefined weak symbols are output as a dynamic
13399 symbol in PIEs. */
13400 else if (h->dynindx == -1
13401 && !h->forced_local)
13402 {
13403 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13404 return FALSE;
13405 }
13406 }
13407
67687978
PB		 13408 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13409 && h->root.type == bfd_link_hash_new)
13410 {
13411 /* Output absolute symbols so that we can create relocations
13412 against them. For normal symbols we output a relocation
13413 against the section that contains them. */
13414 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13415 return FALSE;
13416 }
13417
5e681ec4
PB		 13418 }
13419 else
13420 {
13421 /* For the non-shared case, discard space for relocs against
13422 symbols which turn out to need copy relocs or are not
13423 dynamic. */
13424
f5385ebf
AM		 13425 if (!h->non_got_ref
13426 && ((h->def_dynamic
13427 && !h->def_regular)
5e681ec4
PB		 13428 || (htab->root.dynamic_sections_created
13429 && (h->root.type == bfd_link_hash_undefweak
13430 || h->root.type == bfd_link_hash_undefined))))
13431 {
13432 /* Make sure this symbol is output as a dynamic symbol.
13433 Undefined weak syms won't yet be marked as dynamic. */
13434 if (h->dynindx == -1
f5385ebf 13435 && !h->forced_local)
5e681ec4 13436 {
c152c796 13437 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13438 return FALSE;
13439 }
13440
13441 /* If that succeeded, we know we'll be keeping all the
13442 relocs. */
13443 if (h->dynindx != -1)
13444 goto keep;
13445 }
13446
0bdcacaf 13447 eh->dyn_relocs = NULL;
5e681ec4
PB		 13448
13449 keep: ;
13450 }
13451
13452 /* Finally, allocate space. */
0bdcacaf 13453 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13454 {
0bdcacaf 13455 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13456 if (h->type == STT_GNU_IFUNC
13457 && eh->plt.noncall_refcount == 0
13458 && SYMBOL_REFERENCES_LOCAL (info, h))
13459 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13460 else
13461 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13462 }
13463
13464 return TRUE;
13465}
13466
08d1f311
DJ		 13467/* Find any dynamic relocs that apply to read-only sections. */
13468
13469static bfd_boolean
8029a119 13470elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13471{
8029a119 13472 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13473 struct elf_dyn_relocs * p;
08d1f311 13474
08d1f311 13475 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13476 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13477 {
0bdcacaf 13478 asection *s = p->sec;
08d1f311
DJ		 13479
13480 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13481 {
13482 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13483
13484 info->flags |= DF_TEXTREL;
13485
13486 /* Not an error, just cut short the traversal. */
13487 return FALSE;
13488 }
13489 }
13490 return TRUE;
13491}
13492
d504ffc8
DJ		 13493void
13494bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13495 int byteswap_code)
13496{
13497 struct elf32_arm_link_hash_table *globals;
13498
13499 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13500 if (globals == NULL)
13501 return;
13502
d504ffc8
DJ		 13503 globals->byteswap_code = byteswap_code;
13504}
13505
252b5132
RH		 13506/* Set the sizes of the dynamic sections. */
13507
b34976b6 13508static bfd_boolean
57e8b36a
NC		 13509elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13510 struct bfd_link_info * info)
252b5132
RH		 13511{
13512 bfd * dynobj;
13513 asection * s;
b34976b6
AM		 13514 bfd_boolean plt;
13515 bfd_boolean relocs;
5e681ec4
PB		 13516 bfd *ibfd;
13517 struct elf32_arm_link_hash_table *htab;
252b5132 13518
5e681ec4 13519 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13520 if (htab == NULL)
13521 return FALSE;
13522
252b5132
RH		 13523 dynobj = elf_hash_table (info)->dynobj;
13524 BFD_ASSERT (dynobj != NULL);
39b41c9c 13525 check_use_blx (htab);
252b5132
RH		 13526
13527 if (elf_hash_table (info)->dynamic_sections_created)
13528 {
13529 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13530 if (info->executable)
252b5132 13531 {
3d4d4302 13532 s = bfd_get_linker_section (dynobj, ".interp");
252b5132 13533 BFD_ASSERT (s != NULL);
eea6121a 13534 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13535 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13536 }
13537 }
5e681ec4
PB		 13538
13539 /* Set up .got offsets for local syms, and space for local dynamic
13540 relocs. */
13541 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 13542 {
5e681ec4
PB		 13543 bfd_signed_vma *local_got;
13544 bfd_signed_vma *end_local_got;
34e77a92 13545 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13546 char *local_tls_type;
0855e32b 13547 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13548 bfd_size_type locsymcount;
13549 Elf_Internal_Shdr *symtab_hdr;
13550 asection *srel;
4dfe6ac6 13551 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13552 unsigned int symndx;
5e681ec4 13553
0ffa91dd 13554 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13555 continue;
13556
13557 for (s = ibfd->sections; s != NULL; s = s->next)
13558 {
0bdcacaf 13559 struct elf_dyn_relocs *p;
5e681ec4 13560
0bdcacaf 13561 for (p = (struct elf_dyn_relocs *)
21d799b5 13562 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13563 {
0bdcacaf
RS		 13564 if (!bfd_is_abs_section (p->sec)
13565 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13566 {
13567 /* Input section has been discarded, either because
13568 it is a copy of a linkonce section or due to
13569 linker script /DISCARD/, so we'll be discarding
13570 the relocs too. */
13571 }
3348747a 13572 else if (is_vxworks
0bdcacaf 13573 && strcmp (p->sec->output_section->name,
3348747a
NS		 13574 ".tls_vars") == 0)
13575 {
13576 /* Relocations in vxworks .tls_vars sections are
13577 handled specially by the loader. */
13578 }
5e681ec4
PB		 13579 else if (p->count != 0)
13580 {
0bdcacaf 13581 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13582 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13583 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13584 info->flags |= DF_TEXTREL;
13585 }
13586 }
13587 }
13588
13589 local_got = elf_local_got_refcounts (ibfd);
13590 if (!local_got)
13591 continue;
13592
0ffa91dd 13593 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13594 locsymcount = symtab_hdr->sh_info;
13595 end_local_got = local_got + locsymcount;
34e77a92 13596 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13597 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13598 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13599 symndx = 0;
362d30a1
RS		 13600 s = htab->root.sgot;
13601 srel = htab->root.srelgot;
0855e32b 13602 for (; local_got < end_local_got;
34e77a92
RS		 13603 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13604 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13605 {
0855e32b 13606 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13607 local_iplt = *local_iplt_ptr;
13608 if (local_iplt != NULL)
13609 {
13610 struct elf_dyn_relocs *p;
13611
13612 if (local_iplt->root.refcount > 0)
13613 {
13614 elf32_arm_allocate_plt_entry (info, TRUE,
13615 &local_iplt->root,
13616 &local_iplt->arm);
13617 if (local_iplt->arm.noncall_refcount == 0)
13618 /* All references to the PLT are calls, so all
13619 non-call references can resolve directly to the
13620 run-time target. This means that the .got entry
13621 would be the same as the .igot.plt entry, so there's
13622 no point creating both. */
13623 *local_got = 0;
13624 }
13625 else
13626 {
13627 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13628 local_iplt->root.offset = (bfd_vma) -1;
13629 }
13630
13631 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13632 {
13633 asection *psrel;
13634
13635 psrel = elf_section_data (p->sec)->sreloc;
13636 if (local_iplt->arm.noncall_refcount == 0)
13637 elf32_arm_allocate_irelocs (info, psrel, p->count);
13638 else
13639 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13640 }
13641 }
5e681ec4
PB		 13642 if (*local_got > 0)
13643 {
34e77a92
RS		 13644 Elf_Internal_Sym *isym;
13645
eea6121a 13646 *local_got = s->size;
ba93b8ac
DJ		 13647 if (*local_tls_type & GOT_TLS_GD)
13648 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13649 s->size += 8;
0855e32b
NS		 13650 if (*local_tls_type & GOT_TLS_GDESC)
13651 {
13652 *local_tlsdesc_gotent = htab->root.sgotplt->size
13653 - elf32_arm_compute_jump_table_size (htab);
13654 htab->root.sgotplt->size += 8;
13655 *local_got = (bfd_vma) -2;
34e77a92 13656 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13657 reloc in the middle of .got.plt. */
13658 htab->num_tls_desc++;
13659 }
ba93b8ac
DJ		 13660 if (*local_tls_type & GOT_TLS_IE)
13661 s->size += 4;
ba93b8ac 13662
0855e32b
NS		 13663 if (*local_tls_type & GOT_NORMAL)
13664 {
13665 /* If the symbol is both GD and GDESC, *local_got
13666 may have been overwritten. */
13667 *local_got = s->size;
13668 s->size += 4;
13669 }
13670
34e77a92
RS		 13671 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13672 if (isym == NULL)
13673 return FALSE;
13674
13675 /* If all references to an STT_GNU_IFUNC PLT are calls,
13676 then all non-call references, including this GOT entry,
13677 resolve directly to the run-time target. */
13678 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13679 && (local_iplt == NULL
13680 || local_iplt->arm.noncall_refcount == 0))
13681 elf32_arm_allocate_irelocs (info, srel, 1);
13682 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13683 || *local_tls_type & GOT_TLS_GD)
47beaa6a 13684 elf32_arm_allocate_dynrelocs (info, srel, 1);
0855e32b
NS		 13685
13686 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13687 {
47beaa6a 13688 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13689 htab->tls_trampoline = -1;
13690 }
5e681ec4
PB		 13691 }
13692 else
13693 *local_got = (bfd_vma) -1;
13694 }
252b5132
RH		 13695 }
13696
ba93b8ac
DJ		 13697 if (htab->tls_ldm_got.refcount > 0)
13698 {
13699 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13700 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13701 htab->tls_ldm_got.offset = htab->root.sgot->size;
13702 htab->root.sgot->size += 8;
ba93b8ac 13703 if (info->shared)
47beaa6a 13704 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13705 }
13706 else
13707 htab->tls_ldm_got.offset = -1;
13708
5e681ec4
PB		 13709 /* Allocate global sym .plt and .got entries, and space for global
13710 sym dynamic relocs. */
47beaa6a 13711 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13712
d504ffc8
DJ		 13713 /* Here we rummage through the found bfds to collect glue information. */
13714 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 13715 {
0ffa91dd 13716 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13717 continue;
13718
c7b8f16e
JB		 13719 /* Initialise mapping tables for code/data. */
13720 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13721
c7b8f16e
JB		 13722 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13723 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13724 /* xgettext:c-format */
13725 _bfd_error_handler (_("Errors encountered processing file %s"),
13726 ibfd->filename);
13727 }
d504ffc8 13728
3e6b1042
DJ		 13729 /* Allocate space for the glue sections now that we've sized them. */
13730 bfd_elf32_arm_allocate_interworking_sections (info);
13731
0855e32b
NS		 13732 /* For every jump slot reserved in the sgotplt, reloc_count is
13733 incremented. However, when we reserve space for TLS descriptors,
13734 it's not incremented, so in order to compute the space reserved
13735 for them, it suffices to multiply the reloc count by the jump
13736 slot size. */
13737 if (htab->root.srelplt)
13738 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13739
13740 if (htab->tls_trampoline)
13741 {
13742 if (htab->root.splt->size == 0)
13743 htab->root.splt->size += htab->plt_header_size;
b38cadfb 13744
0855e32b
NS		 13745 htab->tls_trampoline = htab->root.splt->size;
13746 htab->root.splt->size += htab->plt_entry_size;
b38cadfb 13747
0855e32b
NS		 13748 /* If we're not using lazy TLS relocations, don't generate the
13749 PLT and GOT entries they require. */
13750 if (!(info->flags & DF_BIND_NOW))
13751 {
13752 htab->dt_tlsdesc_got = htab->root.sgot->size;
13753 htab->root.sgot->size += 4;
13754
13755 htab->dt_tlsdesc_plt = htab->root.splt->size;
13756 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13757 }
13758 }
13759
252b5132
RH		 13760 /* The check_relocs and adjust_dynamic_symbol entry points have
13761 determined the sizes of the various dynamic sections. Allocate
13762 memory for them. */
b34976b6
AM		 13763 plt = FALSE;
13764 relocs = FALSE;
252b5132
RH		 13765 for (s = dynobj->sections; s != NULL; s = s->next)
13766 {
13767 const char * name;
252b5132
RH		 13768
13769 if ((s->flags & SEC_LINKER_CREATED) == 0)
13770 continue;
13771
13772 /* It's OK to base decisions on the section name, because none
13773 of the dynobj section names depend upon the input files. */
13774 name = bfd_get_section_name (dynobj, s);
13775
34e77a92 13776 if (s == htab->root.splt)
252b5132 13777 {
c456f082
AM		 13778 /* Remember whether there is a PLT. */
13779 plt = s->size != 0;
252b5132 13780 }
0112cd26 13781 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13782 {
c456f082 13783 if (s->size != 0)
252b5132 13784 {
252b5132 13785 /* Remember whether there are any reloc sections other
00a97672 13786 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13787 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13788 relocs = TRUE;
252b5132
RH		 13789
13790 /* We use the reloc_count field as a counter if we need
13791 to copy relocs into the output file. */
13792 s->reloc_count = 0;
13793 }
13794 }
34e77a92
RS		 13795 else if (s != htab->root.sgot
13796 && s != htab->root.sgotplt
13797 && s != htab->root.iplt
13798 && s != htab->root.igotplt
13799 && s != htab->sdynbss)
252b5132
RH		 13800 {
13801 /* It's not one of our sections, so don't allocate space. */
13802 continue;
13803 }
13804
c456f082 13805 if (s->size == 0)
252b5132 13806 {
c456f082 13807 /* If we don't need this section, strip it from the
00a97672
RS		 13808 output file. This is mostly to handle .rel(a).bss and
13809 .rel(a).plt. We must create both sections in
c456f082
AM		 13810 create_dynamic_sections, because they must be created
13811 before the linker maps input sections to output
13812 sections. The linker does that before
13813 adjust_dynamic_symbol is called, and it is that
13814 function which decides whether anything needs to go
13815 into these sections. */
8423293d 13816 s->flags |= SEC_EXCLUDE;
252b5132
RH		 13817 continue;
13818 }
13819
c456f082
AM		 13820 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13821 continue;
13822
252b5132 13823 /* Allocate memory for the section contents. */
21d799b5 13824 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 13825 if (s->contents == NULL)
b34976b6 13826 return FALSE;
252b5132
RH		 13827 }
13828
13829 if (elf_hash_table (info)->dynamic_sections_created)
13830 {
13831 /* Add some entries to the .dynamic section. We fill in the
13832 values later, in elf32_arm_finish_dynamic_sections, but we
13833 must add the entries now so that we get the correct size for
13834 the .dynamic section. The DT_DEBUG entry is filled in by the
13835 dynamic linker and used by the debugger. */
dc810e39 13836#define add_dynamic_entry(TAG, VAL) \
5a580b3a 13837 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 13838
8532796c 13839 if (info->executable)
252b5132 13840 {
dc810e39 13841 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 13842 return FALSE;
252b5132
RH		 13843 }
13844
13845 if (plt)
13846 {
dc810e39
AM		 13847 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13848 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 13849 || !add_dynamic_entry (DT_PLTREL,
13850 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 13851 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 13852 return FALSE;
0855e32b
NS		 13853
13854 if (htab->dt_tlsdesc_plt &&
b38cadfb 13855 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
0855e32b 13856 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
b38cadfb 13857 return FALSE;
252b5132
RH		 13858 }
13859
13860 if (relocs)
13861 {
00a97672
RS		 13862 if (htab->use_rel)
13863 {
13864 if (!add_dynamic_entry (DT_REL, 0)
13865 || !add_dynamic_entry (DT_RELSZ, 0)
13866 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13867 return FALSE;
13868 }
13869 else
13870 {
13871 if (!add_dynamic_entry (DT_RELA, 0)
13872 || !add_dynamic_entry (DT_RELASZ, 0)
13873 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13874 return FALSE;
13875 }
252b5132
RH		 13876 }
13877
08d1f311
DJ		 13878 /* If any dynamic relocs apply to a read-only section,
13879 then we need a DT_TEXTREL entry. */
13880 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 13881 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13882 info);
08d1f311 13883
99e4ae17 13884 if ((info->flags & DF_TEXTREL) != 0)
252b5132 13885 {
dc810e39 13886 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 13887 return FALSE;
252b5132 13888 }
7a2b07ff
NS		 13889 if (htab->vxworks_p
13890 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13891 return FALSE;
252b5132 13892 }
8532796c 13893#undef add_dynamic_entry
252b5132 13894
b34976b6 13895 return TRUE;
252b5132
RH		 13896}
13897
0855e32b
NS		 13898/* Size sections even though they're not dynamic. We use it to setup
13899 _TLS_MODULE_BASE_, if needed. */
13900
13901static bfd_boolean
13902elf32_arm_always_size_sections (bfd *output_bfd,
13903 struct bfd_link_info *info)
13904{
13905 asection *tls_sec;
13906
13907 if (info->relocatable)
13908 return TRUE;
13909
13910 tls_sec = elf_hash_table (info)->tls_sec;
13911
13912 if (tls_sec)
13913 {
13914 struct elf_link_hash_entry *tlsbase;
13915
13916 tlsbase = elf_link_hash_lookup
13917 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13918
13919 if (tlsbase)
13920 {
13921 struct bfd_link_hash_entry *bh = NULL;
13922 const struct elf_backend_data *bed
13923 = get_elf_backend_data (output_bfd);
13924
13925 if (!(_bfd_generic_link_add_one_symbol
13926 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13927 tls_sec, 0, NULL, FALSE,
13928 bed->collect, &bh)))
13929 return FALSE;
b38cadfb 13930
0855e32b
NS		 13931 tlsbase->type = STT_TLS;
13932 tlsbase = (struct elf_link_hash_entry *)bh;
13933 tlsbase->def_regular = 1;
13934 tlsbase->other = STV_HIDDEN;
13935 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13936 }
13937 }
13938 return TRUE;
13939}
13940
252b5132
RH		 13941/* Finish up dynamic symbol handling. We set the contents of various
13942 dynamic sections here. */
13943
b34976b6 13944static bfd_boolean
906e58ca
NC		 13945elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13946 struct bfd_link_info * info,
13947 struct elf_link_hash_entry * h,
13948 Elf_Internal_Sym * sym)
252b5132 13949{
e5a52504 13950 struct elf32_arm_link_hash_table *htab;
b7693d02 13951 struct elf32_arm_link_hash_entry *eh;
252b5132 13952
e5a52504 13953 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13954 if (htab == NULL)
13955 return FALSE;
13956
b7693d02 13957 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 13958
13959 if (h->plt.offset != (bfd_vma) -1)
13960 {
34e77a92 13961 if (!eh->is_iplt)
e5a52504 13962 {
34e77a92
RS		 13963 BFD_ASSERT (h->dynindx != -1);
13964 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13965 h->dynindx, 0);
e5a52504 13966 }
57e8b36a 13967
f5385ebf 13968 if (!h->def_regular)
252b5132
RH		 13969 {
13970 /* Mark the symbol as undefined, rather than as defined in
13971 the .plt section. Leave the value alone. */
13972 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 13973 /* If the symbol is weak, we do need to clear the value.
13974 Otherwise, the PLT entry would provide a definition for
13975 the symbol even if the symbol wasn't defined anywhere,
13976 and so the symbol would never be NULL. */
f5385ebf 13977 if (!h->ref_regular_nonweak)
d982ba73 13978 sym->st_value = 0;
252b5132 13979 }
34e77a92
RS		 13980 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13981 {
13982 /* At least one non-call relocation references this .iplt entry,
13983 so the .iplt entry is the function's canonical address. */
13984 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13985 sym->st_target_internal = ST_BRANCH_TO_ARM;
13986 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13987 (output_bfd, htab->root.iplt->output_section));
13988 sym->st_value = (h->plt.offset
13989 + htab->root.iplt->output_section->vma
13990 + htab->root.iplt->output_offset);
13991 }
252b5132
RH		 13992 }
13993
f5385ebf 13994 if (h->needs_copy)
252b5132
RH		 13995 {
13996 asection * s;
947216bf 13997 Elf_Internal_Rela rel;
252b5132
RH		 13998
13999 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 14000 BFD_ASSERT (h->dynindx != -1
14001 && (h->root.type == bfd_link_hash_defined
14002 || h->root.type == bfd_link_hash_defweak));
14003
362d30a1 14004 s = htab->srelbss;
252b5132
RH		 14005 BFD_ASSERT (s != NULL);
14006
00a97672 14007 rel.r_addend = 0;
252b5132
RH		 14008 rel.r_offset = (h->root.u.def.value
14009 + h->root.u.def.section->output_section->vma
14010 + h->root.u.def.section->output_offset);
14011 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 14012 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 14013 }
14014
00a97672
RS		 14015 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14016 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14017 to the ".got" section. */
9637f6ef 14018 if (h == htab->root.hdynamic
00a97672 14019 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 14020 sym->st_shndx = SHN_ABS;
14021
b34976b6 14022 return TRUE;
252b5132
RH		 14023}
14024
0855e32b
NS		 14025static void
14026arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14027 void *contents,
14028 const unsigned long *template, unsigned count)
14029{
14030 unsigned ix;
b38cadfb 14031
0855e32b
NS		 14032 for (ix = 0; ix != count; ix++)
14033 {
14034 unsigned long insn = template[ix];
14035
14036 /* Emit mov pc,rx if bx is not permitted. */
14037 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14038 insn = (insn & 0xf000000f) | 0x01a0f000;
14039 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14040 }
14041}
14042
252b5132
RH		 14043/* Finish up the dynamic sections. */
14044
b34976b6 14045static bfd_boolean
57e8b36a 14046elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 14047{
14048 bfd * dynobj;
14049 asection * sgot;
14050 asection * sdyn;
4dfe6ac6
NC		 14051 struct elf32_arm_link_hash_table *htab;
14052
14053 htab = elf32_arm_hash_table (info);
14054 if (htab == NULL)
14055 return FALSE;
252b5132
RH		 14056
14057 dynobj = elf_hash_table (info)->dynobj;
14058
362d30a1 14059 sgot = htab->root.sgotplt;
894891db
NC		 14060 /* A broken linker script might have discarded the dynamic sections.
14061 Catch this here so that we do not seg-fault later on. */
14062 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14063 return FALSE;
3d4d4302 14064 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
252b5132
RH		 14065
14066 if (elf_hash_table (info)->dynamic_sections_created)
14067 {
14068 asection *splt;
14069 Elf32_External_Dyn *dyncon, *dynconend;
14070
362d30a1 14071 splt = htab->root.splt;
24a1ba0f 14072 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 14073 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 14074
14075 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 14076 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 14077
252b5132
RH		 14078 for (; dyncon < dynconend; dyncon++)
14079 {
14080 Elf_Internal_Dyn dyn;
14081 const char * name;
14082 asection * s;
14083
14084 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14085
14086 switch (dyn.d_tag)
14087 {
229fcec5
MM		 14088 unsigned int type;
14089
252b5132 14090 default:
7a2b07ff
NS		 14091 if (htab->vxworks_p
14092 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14093 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 14094 break;
14095
229fcec5
MM		 14096 case DT_HASH:
14097 name = ".hash";
14098 goto get_vma_if_bpabi;
14099 case DT_STRTAB:
14100 name = ".dynstr";
14101 goto get_vma_if_bpabi;
14102 case DT_SYMTAB:
14103 name = ".dynsym";
14104 goto get_vma_if_bpabi;
c0042f5d
MM		 14105 case DT_VERSYM:
14106 name = ".gnu.version";
14107 goto get_vma_if_bpabi;
14108 case DT_VERDEF:
14109 name = ".gnu.version_d";
14110 goto get_vma_if_bpabi;
14111 case DT_VERNEED:
14112 name = ".gnu.version_r";
14113 goto get_vma_if_bpabi;
14114
252b5132
RH		 14115 case DT_PLTGOT:
14116 name = ".got";
14117 goto get_vma;
14118 case DT_JMPREL:
00a97672 14119 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 14120 get_vma:
14121 s = bfd_get_section_by_name (output_bfd, name);
05456594
NC		 14122 if (s == NULL)
14123 {
14124 /* PR ld/14397: Issue an error message if a required section is missing. */
14125 (*_bfd_error_handler)
14126 (_("error: required section '%s' not found in the linker script"), name);
14127 bfd_set_error (bfd_error_invalid_operation);
14128 return FALSE;
14129 }
229fcec5
MM		 14130 if (!htab->symbian_p)
14131 dyn.d_un.d_ptr = s->vma;
14132 else
14133 /* In the BPABI, tags in the PT_DYNAMIC section point
14134 at the file offset, not the memory address, for the
14135 convenience of the post linker. */
14136 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 14137 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14138 break;
14139
229fcec5
MM		 14140 get_vma_if_bpabi:
14141 if (htab->symbian_p)
14142 goto get_vma;
14143 break;
14144
252b5132 14145 case DT_PLTRELSZ:
362d30a1 14146 s = htab->root.srelplt;
252b5132 14147 BFD_ASSERT (s != NULL);
eea6121a 14148 dyn.d_un.d_val = s->size;
252b5132
RH		 14149 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14150 break;
906e58ca 14151
252b5132 14152 case DT_RELSZ:
00a97672 14153 case DT_RELASZ:
229fcec5
MM		 14154 if (!htab->symbian_p)
14155 {
14156 /* My reading of the SVR4 ABI indicates that the
14157 procedure linkage table relocs (DT_JMPREL) should be
14158 included in the overall relocs (DT_REL). This is
14159 what Solaris does. However, UnixWare can not handle
14160 that case. Therefore, we override the DT_RELSZ entry
14161 here to make it not include the JMPREL relocs. Since
00a97672 14162 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 14163 other relocation sections, we don't have to worry
14164 about changing the DT_REL entry. */
362d30a1 14165 s = htab->root.srelplt;
229fcec5
MM		 14166 if (s != NULL)
14167 dyn.d_un.d_val -= s->size;
14168 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14169 break;
14170 }
8029a119 14171 /* Fall through. */
229fcec5
MM		 14172
14173 case DT_REL:
14174 case DT_RELA:
229fcec5
MM		 14175 /* In the BPABI, the DT_REL tag must point at the file
14176 offset, not the VMA, of the first relocation
14177 section. So, we use code similar to that in
14178 elflink.c, but do not check for SHF_ALLOC on the
14179 relcoation section, since relocations sections are
14180 never allocated under the BPABI. The comments above
14181 about Unixware notwithstanding, we include all of the
14182 relocations here. */
14183 if (htab->symbian_p)
14184 {
14185 unsigned int i;
14186 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14187 ? SHT_REL : SHT_RELA);
14188 dyn.d_un.d_val = 0;
14189 for (i = 1; i < elf_numsections (output_bfd); i++)
14190 {
906e58ca 14191 Elf_Internal_Shdr *hdr
229fcec5
MM		 14192 = elf_elfsections (output_bfd)[i];
14193 if (hdr->sh_type == type)
14194 {
906e58ca 14195 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 14196 || dyn.d_tag == DT_RELASZ)
14197 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 14198 else if ((ufile_ptr) hdr->sh_offset
14199 <= dyn.d_un.d_val - 1)
229fcec5
MM		 14200 dyn.d_un.d_val = hdr->sh_offset;
14201 }
14202 }
14203 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14204 }
252b5132 14205 break;
88f7bcd5 14206
0855e32b
NS		 14207 case DT_TLSDESC_PLT:
14208 s = htab->root.splt;
14209 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14210 + htab->dt_tlsdesc_plt);
14211 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14212 break;
14213
14214 case DT_TLSDESC_GOT:
14215 s = htab->root.sgot;
14216 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14217 + htab->dt_tlsdesc_got);
14218 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14219 break;
14220
88f7bcd5
NC		 14221 /* Set the bottom bit of DT_INIT/FINI if the
14222 corresponding function is Thumb. */
14223 case DT_INIT:
14224 name = info->init_function;
14225 goto get_sym;
14226 case DT_FINI:
14227 name = info->fini_function;
14228 get_sym:
14229 /* If it wasn't set by elf_bfd_final_link
4cc11e76 14230 then there is nothing to adjust. */
88f7bcd5
NC		 14231 if (dyn.d_un.d_val != 0)
14232 {
14233 struct elf_link_hash_entry * eh;
14234
14235 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 14236 FALSE, FALSE, TRUE);
35fc36a8 14237 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 14238 {
14239 dyn.d_un.d_val |= 1;
b34976b6 14240 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 14241 }
14242 }
14243 break;
252b5132
RH		 14244 }
14245 }
14246
24a1ba0f 14247 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 14248 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 14249 {
00a97672
RS		 14250 const bfd_vma *plt0_entry;
14251 bfd_vma got_address, plt_address, got_displacement;
14252
14253 /* Calculate the addresses of the GOT and PLT. */
14254 got_address = sgot->output_section->vma + sgot->output_offset;
14255 plt_address = splt->output_section->vma + splt->output_offset;
14256
14257 if (htab->vxworks_p)
14258 {
14259 /* The VxWorks GOT is relocated by the dynamic linker.
14260 Therefore, we must emit relocations rather than simply
14261 computing the values now. */
14262 Elf_Internal_Rela rel;
14263
14264 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 14265 put_arm_insn (htab, output_bfd, plt0_entry[0],
14266 splt->contents + 0);
14267 put_arm_insn (htab, output_bfd, plt0_entry[1],
14268 splt->contents + 4);
14269 put_arm_insn (htab, output_bfd, plt0_entry[2],
14270 splt->contents + 8);
00a97672
RS		 14271 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14272
8029a119 14273 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14274 rel.r_offset = plt_address + 12;
14275 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14276 rel.r_addend = 0;
14277 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14278 htab->srelplt2->contents);
14279 }
b38cadfb
NC		 14280 else if (htab->nacl_p)
14281 {
14282 unsigned int i;
14283
14284 got_displacement = got_address + 8 - (plt_address + 16);
14285
14286 put_arm_insn (htab, output_bfd,
14287 elf32_arm_nacl_plt0_entry[0]
14288 | arm_movw_immediate (got_displacement),
14289 splt->contents + 0);
14290 put_arm_insn (htab, output_bfd,
14291 elf32_arm_nacl_plt0_entry[1]
14292 | arm_movt_immediate (got_displacement),
14293 splt->contents + 4);
14294 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14295 put_arm_insn (htab, output_bfd,
14296 elf32_arm_nacl_plt0_entry[i],
14297 splt->contents + (i * 4));
14298 }
00a97672
RS		 14299 else
14300 {
14301 got_displacement = got_address - (plt_address + 16);
14302
14303 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14304 put_arm_insn (htab, output_bfd, plt0_entry[0],
14305 splt->contents + 0);
14306 put_arm_insn (htab, output_bfd, plt0_entry[1],
14307 splt->contents + 4);
14308 put_arm_insn (htab, output_bfd, plt0_entry[2],
14309 splt->contents + 8);
14310 put_arm_insn (htab, output_bfd, plt0_entry[3],
14311 splt->contents + 12);
5e681ec4 14312
5e681ec4 14313#ifdef FOUR_WORD_PLT
00a97672
RS		 14314 /* The displacement value goes in the otherwise-unused
14315 last word of the second entry. */
14316 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14317#else
00a97672 14318 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14319#endif
00a97672 14320 }
f7a74f8c 14321 }
252b5132
RH		 14322
14323 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14324 really seem like the right value. */
74541ad4
AM		 14325 if (splt->output_section->owner == output_bfd)
14326 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14327
0855e32b
NS		 14328 if (htab->dt_tlsdesc_plt)
14329 {
14330 bfd_vma got_address
14331 = sgot->output_section->vma + sgot->output_offset;
14332 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14333 + htab->root.sgot->output_offset);
14334 bfd_vma plt_address
14335 = splt->output_section->vma + splt->output_offset;
14336
b38cadfb 14337 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14338 splt->contents + htab->dt_tlsdesc_plt,
14339 dl_tlsdesc_lazy_trampoline, 6);
14340
14341 bfd_put_32 (output_bfd,
14342 gotplt_address + htab->dt_tlsdesc_got
14343 - (plt_address + htab->dt_tlsdesc_plt)
14344 - dl_tlsdesc_lazy_trampoline[6],
14345 splt->contents + htab->dt_tlsdesc_plt + 24);
14346 bfd_put_32 (output_bfd,
14347 got_address - (plt_address + htab->dt_tlsdesc_plt)
14348 - dl_tlsdesc_lazy_trampoline[7],
14349 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14350 }
14351
14352 if (htab->tls_trampoline)
14353 {
b38cadfb 14354 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14355 splt->contents + htab->tls_trampoline,
14356 tls_trampoline, 3);
14357#ifdef FOUR_WORD_PLT
14358 bfd_put_32 (output_bfd, 0x00000000,
14359 splt->contents + htab->tls_trampoline + 12);
b38cadfb 14360#endif
0855e32b
NS		 14361 }
14362
362d30a1 14363 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14364 {
14365 /* Correct the .rel(a).plt.unloaded relocations. They will have
14366 incorrect symbol indexes. */
14367 int num_plts;
eed62c48 14368 unsigned char *p;
00a97672 14369
362d30a1 14370 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14371 / htab->plt_entry_size);
14372 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14373
14374 for (; num_plts; num_plts--)
14375 {
14376 Elf_Internal_Rela rel;
14377
14378 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14379 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14380 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14381 p += RELOC_SIZE (htab);
14382
14383 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14384 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14385 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14386 p += RELOC_SIZE (htab);
14387 }
14388 }
252b5132
RH		 14389 }
14390
14391 /* Fill in the first three entries in the global offset table. */
229fcec5 14392 if (sgot)
252b5132 14393 {
229fcec5
MM		 14394 if (sgot->size > 0)
14395 {
14396 if (sdyn == NULL)
14397 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14398 else
14399 bfd_put_32 (output_bfd,
14400 sdyn->output_section->vma + sdyn->output_offset,
14401 sgot->contents);
14402 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14403 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14404 }
252b5132 14405
229fcec5
MM		 14406 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14407 }
252b5132 14408
b34976b6 14409 return TRUE;
252b5132
RH		 14410}
14411
ba96a88f 14412static void
57e8b36a 14413elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14414{
9b485d32 14415 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14416 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14417
14418 i_ehdrp = elf_elfheader (abfd);
14419
94a3258f
PB		 14420 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14421 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14422 else
14423 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 14424 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14425
93204d3a
PB		 14426 if (link_info)
14427 {
14428 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14429 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14430 i_ehdrp->e_flags |= EF_ARM_BE8;
14431 }
3bfcb652
NC		 14432
14433 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14434 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14435 {
14436 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14437 if (abi)
14438 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14439 else
14440 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14441 }
ba96a88f
NC		 14442}
14443
99e4ae17 14444static enum elf_reloc_type_class
57e8b36a 14445elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 14446{
f51e552e 14447 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14448 {
14449 case R_ARM_RELATIVE:
14450 return reloc_class_relative;
14451 case R_ARM_JUMP_SLOT:
14452 return reloc_class_plt;
14453 case R_ARM_COPY:
14454 return reloc_class_copy;
14455 default:
14456 return reloc_class_normal;
14457 }
14458}
14459
e489d0ae 14460static void
57e8b36a 14461elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14462{
5a6c6817 14463 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14464}
14465
40a18ebd
NC		 14466/* Return TRUE if this is an unwinding table entry. */
14467
14468static bfd_boolean
14469is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14470{
0112cd26
NC		 14471 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14472 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14473}
14474
14475
14476/* Set the type and flags for an ARM section. We do this by
14477 the section name, which is a hack, but ought to work. */
14478
14479static bfd_boolean
14480elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14481{
14482 const char * name;
14483
14484 name = bfd_get_section_name (abfd, sec);
14485
14486 if (is_arm_elf_unwind_section_name (abfd, name))
14487 {
14488 hdr->sh_type = SHT_ARM_EXIDX;
14489 hdr->sh_flags |= SHF_LINK_ORDER;
14490 }
14491 return TRUE;
14492}
14493
6dc132d9
L		 14494/* Handle an ARM specific section when reading an object file. This is
14495 called when bfd_section_from_shdr finds a section with an unknown
14496 type. */
40a18ebd
NC		 14497
14498static bfd_boolean
14499elf32_arm_section_from_shdr (bfd *abfd,
14500 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14501 const char *name,
14502 int shindex)
40a18ebd
NC		 14503{
14504 /* There ought to be a place to keep ELF backend specific flags, but
14505 at the moment there isn't one. We just keep track of the
14506 sections by their name, instead. Fortunately, the ABI gives
14507 names for all the ARM specific sections, so we will probably get
14508 away with this. */
14509 switch (hdr->sh_type)
14510 {
14511 case SHT_ARM_EXIDX:
0951f019
RE		 14512 case SHT_ARM_PREEMPTMAP:
14513 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14514 break;
14515
14516 default:
14517 return FALSE;
14518 }
14519
6dc132d9 14520 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14521 return FALSE;
14522
14523 return TRUE;
14524}
e489d0ae 14525
44444f50
NC		 14526static _arm_elf_section_data *
14527get_arm_elf_section_data (asection * sec)
14528{
47b2e99c
JZ		 14529 if (sec && sec->owner && is_arm_elf (sec->owner))
14530 return elf32_arm_section_data (sec);
44444f50
NC		 14531 else
14532 return NULL;
8e3de13a
NC		 14533}
14534
4e617b1e
PB		 14535typedef struct
14536{
57402f1e 14537 void *flaginfo;
4e617b1e 14538 struct bfd_link_info *info;
91a5743d
PB		 14539 asection *sec;
14540 int sec_shndx;
6e0b88f1
AM		 14541 int (*func) (void *, const char *, Elf_Internal_Sym *,
14542 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14543} output_arch_syminfo;
14544
14545enum map_symbol_type
14546{
14547 ARM_MAP_ARM,
14548 ARM_MAP_THUMB,
14549 ARM_MAP_DATA
14550};
14551
14552
7413f23f 14553/* Output a single mapping symbol. */
4e617b1e
PB		 14554
14555static bfd_boolean
7413f23f
DJ		 14556elf32_arm_output_map_sym (output_arch_syminfo *osi,
14557 enum map_symbol_type type,
14558 bfd_vma offset)
4e617b1e
PB		 14559{
14560 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14561 Elf_Internal_Sym sym;
14562
91a5743d
PB		 14563 sym.st_value = osi->sec->output_section->vma
14564 + osi->sec->output_offset
14565 + offset;
4e617b1e
PB		 14566 sym.st_size = 0;
14567 sym.st_other = 0;
14568 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14569 sym.st_shndx = osi->sec_shndx;
35fc36a8 14570 sym.st_target_internal = 0;
fe33d2fa 14571 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
57402f1e 14572 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14573}
14574
34e77a92
RS		 14575/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14576 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14577
14578static bfd_boolean
34e77a92
RS		 14579elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14580 bfd_boolean is_iplt_entry_p,
14581 union gotplt_union *root_plt,
14582 struct arm_plt_info *arm_plt)
4e617b1e 14583{
4e617b1e 14584 struct elf32_arm_link_hash_table *htab;
34e77a92 14585 bfd_vma addr, plt_header_size;
4e617b1e 14586
34e77a92 14587 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14588 return TRUE;
14589
4dfe6ac6
NC		 14590 htab = elf32_arm_hash_table (osi->info);
14591 if (htab == NULL)
14592 return FALSE;
14593
34e77a92
RS		 14594 if (is_iplt_entry_p)
14595 {
14596 osi->sec = htab->root.iplt;
14597 plt_header_size = 0;
14598 }
14599 else
14600 {
14601 osi->sec = htab->root.splt;
14602 plt_header_size = htab->plt_header_size;
14603 }
14604 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14605 (osi->info->output_bfd, osi->sec->output_section));
14606
14607 addr = root_plt->offset & -2;
4e617b1e
PB		 14608 if (htab->symbian_p)
14609 {
7413f23f 14610 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14611 return FALSE;
7413f23f 14612 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14613 return FALSE;
14614 }
14615 else if (htab->vxworks_p)
14616 {
7413f23f 14617 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14618 return FALSE;
7413f23f 14619 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14620 return FALSE;
7413f23f 14621 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14622 return FALSE;
7413f23f 14623 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14624 return FALSE;
14625 }
b38cadfb
NC		 14626 else if (htab->nacl_p)
14627 {
14628 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14629 return FALSE;
14630 }
4e617b1e
PB		 14631 else
14632 {
34e77a92 14633 bfd_boolean thumb_stub_p;
bd97cb95 14634
34e77a92
RS		 14635 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14636 if (thumb_stub_p)
4e617b1e 14637 {
7413f23f 14638 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14639 return FALSE;
14640 }
14641#ifdef FOUR_WORD_PLT
7413f23f 14642 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14643 return FALSE;
7413f23f 14644 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14645 return FALSE;
14646#else
906e58ca 14647 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14648 so only need to output a mapping symbol for the first PLT entry and
14649 entries with thumb thunks. */
34e77a92 14650 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14651 {
7413f23f 14652 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14653 return FALSE;
14654 }
14655#endif
14656 }
14657
14658 return TRUE;
14659}
14660
34e77a92
RS		 14661/* Output mapping symbols for PLT entries associated with H. */
14662
14663static bfd_boolean
14664elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14665{
14666 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14667 struct elf32_arm_link_hash_entry *eh;
14668
14669 if (h->root.type == bfd_link_hash_indirect)
14670 return TRUE;
14671
14672 if (h->root.type == bfd_link_hash_warning)
14673 /* When warning symbols are created, they **replace** the "real"
14674 entry in the hash table, thus we never get to see the real
14675 symbol in a hash traversal. So look at it now. */
14676 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14677
14678 eh = (struct elf32_arm_link_hash_entry *) h;
14679 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14680 &h->plt, &eh->plt);
14681}
14682
7413f23f
DJ		 14683/* Output a single local symbol for a generated stub. */
14684
14685static bfd_boolean
14686elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14687 bfd_vma offset, bfd_vma size)
14688{
7413f23f
DJ		 14689 Elf_Internal_Sym sym;
14690
7413f23f
DJ		 14691 sym.st_value = osi->sec->output_section->vma
14692 + osi->sec->output_offset
14693 + offset;
14694 sym.st_size = size;
14695 sym.st_other = 0;
14696 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14697 sym.st_shndx = osi->sec_shndx;
35fc36a8 14698 sym.st_target_internal = 0;
57402f1e 14699 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14700}
4e617b1e 14701
da5938a2 14702static bfd_boolean
8029a119
NC		 14703arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14704 void * in_arg)
da5938a2
NC		 14705{
14706 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14707 asection *stub_sec;
14708 bfd_vma addr;
7413f23f 14709 char *stub_name;
9a008db3 14710 output_arch_syminfo *osi;
d3ce72d0 14711 const insn_sequence *template_sequence;
461a49ca
DJ		 14712 enum stub_insn_type prev_type;
14713 int size;
14714 int i;
14715 enum map_symbol_type sym_type;
da5938a2
NC		 14716
14717 /* Massage our args to the form they really have. */
14718 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14719 osi = (output_arch_syminfo *) in_arg;
da5938a2 14720
da5938a2
NC		 14721 stub_sec = stub_entry->stub_sec;
14722
14723 /* Ensure this stub is attached to the current section being
7413f23f 14724 processed. */
da5938a2
NC		 14725 if (stub_sec != osi->sec)
14726 return TRUE;
14727
7413f23f
DJ		 14728 addr = (bfd_vma) stub_entry->stub_offset;
14729 stub_name = stub_entry->output_name;
da5938a2 14730
d3ce72d0
NC		 14731 template_sequence = stub_entry->stub_template;
14732 switch (template_sequence[0].type)
7413f23f 14733 {
461a49ca
DJ		 14734 case ARM_TYPE:
14735 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14736 return FALSE;
14737 break;
461a49ca 14738 case THUMB16_TYPE:
48229727 14739 case THUMB32_TYPE:
461a49ca
DJ		 14740 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14741 stub_entry->stub_size))
da5938a2
NC		 14742 return FALSE;
14743 break;
14744 default:
14745 BFD_FAIL ();
48229727 14746 return 0;
7413f23f 14747 }
da5938a2 14748
461a49ca
DJ		 14749 prev_type = DATA_TYPE;
14750 size = 0;
14751 for (i = 0; i < stub_entry->stub_template_size; i++)
14752 {
d3ce72d0 14753 switch (template_sequence[i].type)
461a49ca
DJ		 14754 {
14755 case ARM_TYPE:
14756 sym_type = ARM_MAP_ARM;
14757 break;
14758
14759 case THUMB16_TYPE:
48229727 14760 case THUMB32_TYPE:
461a49ca
DJ		 14761 sym_type = ARM_MAP_THUMB;
14762 break;
14763
14764 case DATA_TYPE:
14765 sym_type = ARM_MAP_DATA;
14766 break;
14767
14768 default:
14769 BFD_FAIL ();
4e31c731 14770 return FALSE;
461a49ca
DJ		 14771 }
14772
d3ce72d0 14773 if (template_sequence[i].type != prev_type)
461a49ca 14774 {
d3ce72d0 14775 prev_type = template_sequence[i].type;
461a49ca
DJ		 14776 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14777 return FALSE;
14778 }
14779
d3ce72d0 14780 switch (template_sequence[i].type)
461a49ca
DJ		 14781 {
14782 case ARM_TYPE:
48229727 14783 case THUMB32_TYPE:
461a49ca
DJ		 14784 size += 4;
14785 break;
14786
14787 case THUMB16_TYPE:
14788 size += 2;
14789 break;
14790
14791 case DATA_TYPE:
14792 size += 4;
14793 break;
14794
14795 default:
14796 BFD_FAIL ();
4e31c731 14797 return FALSE;
461a49ca
DJ		 14798 }
14799 }
14800
da5938a2
NC		 14801 return TRUE;
14802}
14803
33811162
DG		 14804/* Output mapping symbols for linker generated sections,
14805 and for those data-only sections that do not have a
14806 $d. */
4e617b1e
PB		 14807
14808static bfd_boolean
14809elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca 14810 struct bfd_link_info *info,
57402f1e 14811 void *flaginfo,
6e0b88f1
AM		 14812 int (*func) (void *, const char *,
14813 Elf_Internal_Sym *,
14814 asection *,
14815 struct elf_link_hash_entry *))
4e617b1e
PB		 14816{
14817 output_arch_syminfo osi;
14818 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 14819 bfd_vma offset;
14820 bfd_size_type size;
33811162 14821 bfd *input_bfd;
4e617b1e
PB		 14822
14823 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14824 if (htab == NULL)
14825 return FALSE;
14826
906e58ca 14827 check_use_blx (htab);
91a5743d 14828
57402f1e 14829 osi.flaginfo = flaginfo;
4e617b1e
PB		 14830 osi.info = info;
14831 osi.func = func;
906e58ca 14832
33811162
DG		 14833 /* Add a $d mapping symbol to data-only sections that
14834 don't have any mapping symbol. This may result in (harmless) redundant
14835 mapping symbols. */
14836 for (input_bfd = info->input_bfds;
14837 input_bfd != NULL;
14838 input_bfd = input_bfd->link_next)
14839 {
14840 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14841 for (osi.sec = input_bfd->sections;
14842 osi.sec != NULL;
14843 osi.sec = osi.sec->next)
14844 {
14845 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 14846 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14847 != 0)
33811162
DG		 14848 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14849 == SEC_HAS_CONTENTS
14850 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 14851 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 14852 && osi.sec->size > 0
14853 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 14854 {
14855 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14856 (output_bfd, osi.sec->output_section);
14857 if (osi.sec_shndx != (int)SHN_BAD)
14858 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14859 }
14860 }
14861 }
14862
91a5743d
PB		 14863 /* ARM->Thumb glue. */
14864 if (htab->arm_glue_size > 0)
14865 {
3d4d4302
AM		 14866 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14867 ARM2THUMB_GLUE_SECTION_NAME);
91a5743d
PB		 14868
14869 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14870 (output_bfd, osi.sec->output_section);
14871 if (info->shared || htab->root.is_relocatable_executable
14872 || htab->pic_veneer)
14873 size = ARM2THUMB_PIC_GLUE_SIZE;
14874 else if (htab->use_blx)
14875 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14876 else
14877 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 14878
91a5743d
PB		 14879 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14880 {
7413f23f
DJ		 14881 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14882 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 14883 }
14884 }
14885
14886 /* Thumb->ARM glue. */
14887 if (htab->thumb_glue_size > 0)
14888 {
3d4d4302
AM		 14889 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14890 THUMB2ARM_GLUE_SECTION_NAME);
91a5743d
PB		 14891
14892 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14893 (output_bfd, osi.sec->output_section);
14894 size = THUMB2ARM_GLUE_SIZE;
14895
14896 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14897 {
7413f23f
DJ		 14898 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14899 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 14900 }
14901 }
14902
845b51d6
PB		 14903 /* ARMv4 BX veneers. */
14904 if (htab->bx_glue_size > 0)
14905 {
3d4d4302
AM		 14906 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14907 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 14908
14909 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14910 (output_bfd, osi.sec->output_section);
14911
7413f23f 14912 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 14913 }
14914
8029a119
NC		 14915 /* Long calls stubs. */
14916 if (htab->stub_bfd && htab->stub_bfd->sections)
14917 {
da5938a2 14918 asection* stub_sec;
8029a119 14919
da5938a2
NC		 14920 for (stub_sec = htab->stub_bfd->sections;
14921 stub_sec != NULL;
8029a119
NC		 14922 stub_sec = stub_sec->next)
14923 {
14924 /* Ignore non-stub sections. */
14925 if (!strstr (stub_sec->name, STUB_SUFFIX))
14926 continue;
da5938a2 14927
8029a119 14928 osi.sec = stub_sec;
da5938a2 14929
8029a119
NC		 14930 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14931 (output_bfd, osi.sec->output_section);
da5938a2 14932
8029a119
NC		 14933 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14934 }
14935 }
da5938a2 14936
91a5743d 14937 /* Finally, output mapping symbols for the PLT. */
34e77a92 14938 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 14939 {
34e77a92
RS		 14940 osi.sec = htab->root.splt;
14941 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14942 (output_bfd, osi.sec->output_section));
14943
14944 /* Output mapping symbols for the plt header. SymbianOS does not have a
14945 plt header. */
14946 if (htab->vxworks_p)
14947 {
14948 /* VxWorks shared libraries have no PLT header. */
14949 if (!info->shared)
14950 {
14951 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14952 return FALSE;
14953 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14954 return FALSE;
14955 }
14956 }
b38cadfb
NC		 14957 else if (htab->nacl_p)
14958 {
14959 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14960 return FALSE;
14961 }
34e77a92 14962 else if (!htab->symbian_p)
4e617b1e 14963 {
7413f23f 14964 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 14965 return FALSE;
34e77a92
RS		 14966#ifndef FOUR_WORD_PLT
14967 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 14968 return FALSE;
34e77a92 14969#endif
4e617b1e
PB		 14970 }
14971 }
34e77a92
RS		 14972 if ((htab->root.splt && htab->root.splt->size > 0)
14973 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 14974 {
34e77a92
RS		 14975 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14976 for (input_bfd = info->input_bfds;
14977 input_bfd != NULL;
14978 input_bfd = input_bfd->link_next)
14979 {
14980 struct arm_local_iplt_info **local_iplt;
14981 unsigned int i, num_syms;
4e617b1e 14982
34e77a92
RS		 14983 local_iplt = elf32_arm_local_iplt (input_bfd);
14984 if (local_iplt != NULL)
14985 {
14986 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14987 for (i = 0; i < num_syms; i++)
14988 if (local_iplt[i] != NULL
14989 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14990 &local_iplt[i]->root,
14991 &local_iplt[i]->arm))
14992 return FALSE;
14993 }
14994 }
14995 }
0855e32b
NS		 14996 if (htab->dt_tlsdesc_plt != 0)
14997 {
14998 /* Mapping symbols for the lazy tls trampoline. */
14999 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15000 return FALSE;
b38cadfb 15001
0855e32b
NS		 15002 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15003 htab->dt_tlsdesc_plt + 24))
15004 return FALSE;
15005 }
15006 if (htab->tls_trampoline != 0)
15007 {
15008 /* Mapping symbols for the tls trampoline. */
15009 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15010 return FALSE;
15011#ifdef FOUR_WORD_PLT
15012 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15013 htab->tls_trampoline + 12))
15014 return FALSE;
b38cadfb 15015#endif
0855e32b 15016 }
b38cadfb 15017
4e617b1e
PB		 15018 return TRUE;
15019}
15020
e489d0ae
PB		 15021/* Allocate target specific section data. */
15022
15023static bfd_boolean
15024elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15025{
f592407e
AM		 15026 if (!sec->used_by_bfd)
15027 {
15028 _arm_elf_section_data *sdata;
15029 bfd_size_type amt = sizeof (*sdata);
e489d0ae 15030
21d799b5 15031 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 15032 if (sdata == NULL)
15033 return FALSE;
15034 sec->used_by_bfd = sdata;
15035 }
e489d0ae
PB		 15036
15037 return _bfd_elf_new_section_hook (abfd, sec);
15038}
15039
15040
15041/* Used to order a list of mapping symbols by address. */
15042
15043static int
15044elf32_arm_compare_mapping (const void * a, const void * b)
15045{
7f6a71ff
JM		 15046 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15047 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15048
15049 if (amap->vma > bmap->vma)
15050 return 1;
15051 else if (amap->vma < bmap->vma)
15052 return -1;
15053 else if (amap->type > bmap->type)
15054 /* Ensure results do not depend on the host qsort for objects with
15055 multiple mapping symbols at the same address by sorting on type
15056 after vma. */
15057 return 1;
15058 else if (amap->type < bmap->type)
15059 return -1;
15060 else
15061 return 0;
e489d0ae
PB		 15062}
15063
2468f9c9
PB		 15064/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15065
15066static unsigned long
15067offset_prel31 (unsigned long addr, bfd_vma offset)
15068{
15069 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15070}
15071
15072/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15073 relocations. */
15074
15075static void
15076copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15077{
15078 unsigned long first_word = bfd_get_32 (output_bfd, from);
15079 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
b38cadfb 15080
2468f9c9
PB		 15081 /* High bit of first word is supposed to be zero. */
15082 if ((first_word & 0x80000000ul) == 0)
15083 first_word = offset_prel31 (first_word, offset);
b38cadfb 15084
2468f9c9
PB		 15085 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15086 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15087 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15088 second_word = offset_prel31 (second_word, offset);
b38cadfb 15089
2468f9c9
PB		 15090 bfd_put_32 (output_bfd, first_word, to);
15091 bfd_put_32 (output_bfd, second_word, to + 4);
15092}
e489d0ae 15093
48229727
JB		 15094/* Data for make_branch_to_a8_stub(). */
15095
b38cadfb
NC		 15096struct a8_branch_to_stub_data
15097{
48229727
JB		 15098 asection *writing_section;
15099 bfd_byte *contents;
15100};
15101
15102
15103/* Helper to insert branches to Cortex-A8 erratum stubs in the right
15104 places for a particular section. */
15105
15106static bfd_boolean
15107make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15108 void *in_arg)
15109{
15110 struct elf32_arm_stub_hash_entry *stub_entry;
15111 struct a8_branch_to_stub_data *data;
15112 bfd_byte *contents;
15113 unsigned long branch_insn;
15114 bfd_vma veneered_insn_loc, veneer_entry_loc;
15115 bfd_signed_vma branch_offset;
15116 bfd *abfd;
91d6fa6a 15117 unsigned int target;
48229727
JB		 15118
15119 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15120 data = (struct a8_branch_to_stub_data *) in_arg;
15121
15122 if (stub_entry->target_section != data->writing_section
4563a860 15123 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 15124 return TRUE;
15125
15126 contents = data->contents;
15127
15128 veneered_insn_loc = stub_entry->target_section->output_section->vma
15129 + stub_entry->target_section->output_offset
15130 + stub_entry->target_value;
15131
15132 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15133 + stub_entry->stub_sec->output_offset
15134 + stub_entry->stub_offset;
15135
15136 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15137 veneered_insn_loc &= ~3u;
15138
15139 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15140
15141 abfd = stub_entry->target_section->owner;
91d6fa6a 15142 target = stub_entry->target_value;
48229727
JB		 15143
15144 /* We attempt to avoid this condition by setting stubs_always_after_branch
15145 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15146 This check is just to be on the safe side... */
15147 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15148 {
15149 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15150 "allocated in unsafe location"), abfd);
15151 return FALSE;
15152 }
15153
15154 switch (stub_entry->stub_type)
15155 {
15156 case arm_stub_a8_veneer_b:
15157 case arm_stub_a8_veneer_b_cond:
15158 branch_insn = 0xf0009000;
15159 goto jump24;
15160
15161 case arm_stub_a8_veneer_blx:
15162 branch_insn = 0xf000e800;
15163 goto jump24;
15164
15165 case arm_stub_a8_veneer_bl:
15166 {
15167 unsigned int i1, j1, i2, j2, s;
15168
15169 branch_insn = 0xf000d000;
15170
15171 jump24:
15172 if (branch_offset < -16777216 || branch_offset > 16777214)
15173 {
15174 /* There's not much we can do apart from complain if this
15175 happens. */
15176 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15177 "of range (input file too large)"), abfd);
15178 return FALSE;
15179 }
15180
15181 /* i1 = not(j1 eor s), so:
15182 not i1 = j1 eor s
15183 j1 = (not i1) eor s. */
15184
15185 branch_insn |= (branch_offset >> 1) & 0x7ff;
15186 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15187 i2 = (branch_offset >> 22) & 1;
15188 i1 = (branch_offset >> 23) & 1;
15189 s = (branch_offset >> 24) & 1;
15190 j1 = (!i1) ^ s;
15191 j2 = (!i2) ^ s;
15192 branch_insn |= j2 << 11;
15193 branch_insn |= j1 << 13;
15194 branch_insn |= s << 26;
15195 }
15196 break;
15197
15198 default:
15199 BFD_FAIL ();
15200 return FALSE;
15201 }
15202
91d6fa6a
NC		 15203 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15204 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 15205
15206 return TRUE;
15207}
15208
e489d0ae
PB		 15209/* Do code byteswapping. Return FALSE afterwards so that the section is
15210 written out as normal. */
15211
15212static bfd_boolean
c7b8f16e 15213elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 15214 struct bfd_link_info *link_info,
15215 asection *sec,
e489d0ae
PB		 15216 bfd_byte *contents)
15217{
48229727 15218 unsigned int mapcount, errcount;
8e3de13a 15219 _arm_elf_section_data *arm_data;
c7b8f16e 15220 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 15221 elf32_arm_section_map *map;
c7b8f16e 15222 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 15223 bfd_vma ptr;
15224 bfd_vma end;
c7b8f16e 15225 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 15226 bfd_byte tmp;
48229727 15227 unsigned int i;
57e8b36a 15228
4dfe6ac6
NC		 15229 if (globals == NULL)
15230 return FALSE;
15231
8e3de13a
NC		 15232 /* If this section has not been allocated an _arm_elf_section_data
15233 structure then we cannot record anything. */
15234 arm_data = get_arm_elf_section_data (sec);
15235 if (arm_data == NULL)
15236 return FALSE;
15237
15238 mapcount = arm_data->mapcount;
15239 map = arm_data->map;
c7b8f16e
JB		 15240 errcount = arm_data->erratumcount;
15241
15242 if (errcount != 0)
15243 {
15244 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15245
15246 for (errnode = arm_data->erratumlist; errnode != 0;
15247 errnode = errnode->next)
15248 {
91d6fa6a 15249 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 15250
15251 switch (errnode->type)
15252 {
15253 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15254 {
15255 bfd_vma branch_to_veneer;
15256 /* Original condition code of instruction, plus bit mask for
15257 ARM B instruction. */
15258 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15259 | 0x0a000000;
15260
15261 /* The instruction is before the label. */
91d6fa6a 15262 target -= 4;
c7b8f16e
JB		 15263
15264 /* Above offset included in -4 below. */
15265 branch_to_veneer = errnode->u.b.veneer->vma
15266 - errnode->vma - 4;
15267
15268 if ((signed) branch_to_veneer < -(1 << 25)
15269 || (signed) branch_to_veneer >= (1 << 25))
15270 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15271 "range"), output_bfd);
15272
15273 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 15274 contents[endianflip ^ target] = insn & 0xff;
15275 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15276 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15277 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15278 }
15279 break;
15280
15281 case VFP11_ERRATUM_ARM_VENEER:
15282 {
15283 bfd_vma branch_from_veneer;
15284 unsigned int insn;
15285
15286 /* Take size of veneer into account. */
15287 branch_from_veneer = errnode->u.v.branch->vma
15288 - errnode->vma - 12;
15289
15290 if ((signed) branch_from_veneer < -(1 << 25)
15291 || (signed) branch_from_veneer >= (1 << 25))
15292 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15293 "range"), output_bfd);
15294
15295 /* Original instruction. */
15296 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 15297 contents[endianflip ^ target] = insn & 0xff;
15298 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15299 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15300 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15301
15302 /* Branch back to insn after original insn. */
15303 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 15304 contents[endianflip ^ (target + 4)] = insn & 0xff;
15305 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15306 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15307 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 15308 }
15309 break;
15310
15311 default:
15312 abort ();
15313 }
15314 }
15315 }
e489d0ae 15316
2468f9c9
PB		 15317 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15318 {
15319 arm_unwind_table_edit *edit_node
15320 = arm_data->u.exidx.unwind_edit_list;
15321 /* Now, sec->size is the size of the section we will write. The original
15322 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15323 markers) was sec->rawsize. (This isn't the case if we perform no
15324 edits, then rawsize will be zero and we should use size). */
21d799b5 15325 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15326 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15327 unsigned int in_index, out_index;
15328 bfd_vma add_to_offsets = 0;
15329
15330 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15331 {
15332 if (edit_node)
15333 {
15334 unsigned int edit_index = edit_node->index;
b38cadfb 15335
2468f9c9
PB		 15336 if (in_index < edit_index && in_index * 8 < input_size)
15337 {
15338 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15339 contents + in_index * 8, add_to_offsets);
15340 out_index++;
15341 in_index++;
15342 }
15343 else if (in_index == edit_index
15344 || (in_index * 8 >= input_size
15345 && edit_index == UINT_MAX))
15346 {
15347 switch (edit_node->type)
15348 {
15349 case DELETE_EXIDX_ENTRY:
15350 in_index++;
15351 add_to_offsets += 8;
15352 break;
b38cadfb 15353
2468f9c9
PB		 15354 case INSERT_EXIDX_CANTUNWIND_AT_END:
15355 {
15356 asection *text_sec = edit_node->linked_section;
15357 bfd_vma text_offset = text_sec->output_section->vma
15358 + text_sec->output_offset
15359 + text_sec->size;
15360 bfd_vma exidx_offset = offset + out_index * 8;
15361 unsigned long prel31_offset;
15362
15363 /* Note: this is meant to be equivalent to an
15364 R_ARM_PREL31 relocation. These synthetic
15365 EXIDX_CANTUNWIND markers are not relocated by the
15366 usual BFD method. */
15367 prel31_offset = (text_offset - exidx_offset)
15368 & 0x7ffffffful;
15369
15370 /* First address we can't unwind. */
15371 bfd_put_32 (output_bfd, prel31_offset,
15372 &edited_contents[out_index * 8]);
15373
15374 /* Code for EXIDX_CANTUNWIND. */
15375 bfd_put_32 (output_bfd, 0x1,
15376 &edited_contents[out_index * 8 + 4]);
15377
15378 out_index++;
15379 add_to_offsets -= 8;
15380 }
15381 break;
15382 }
b38cadfb 15383
2468f9c9
PB		 15384 edit_node = edit_node->next;
15385 }
15386 }
15387 else
15388 {
15389 /* No more edits, copy remaining entries verbatim. */
15390 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15391 contents + in_index * 8, add_to_offsets);
15392 out_index++;
15393 in_index++;
15394 }
15395 }
15396
15397 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15398 bfd_set_section_contents (output_bfd, sec->output_section,
15399 edited_contents,
15400 (file_ptr) sec->output_offset, sec->size);
15401
15402 return TRUE;
15403 }
15404
48229727
JB		 15405 /* Fix code to point to Cortex-A8 erratum stubs. */
15406 if (globals->fix_cortex_a8)
15407 {
15408 struct a8_branch_to_stub_data data;
15409
15410 data.writing_section = sec;
15411 data.contents = contents;
15412
15413 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15414 &data);
15415 }
15416
e489d0ae
PB		 15417 if (mapcount == 0)
15418 return FALSE;
15419
c7b8f16e 15420 if (globals->byteswap_code)
e489d0ae 15421 {
c7b8f16e 15422 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15423
c7b8f16e
JB		 15424 ptr = map[0].vma;
15425 for (i = 0; i < mapcount; i++)
15426 {
15427 if (i == mapcount - 1)
15428 end = sec->size;
15429 else
15430 end = map[i + 1].vma;
e489d0ae 15431
c7b8f16e 15432 switch (map[i].type)
e489d0ae 15433 {
c7b8f16e
JB		 15434 case 'a':
15435 /* Byte swap code words. */
15436 while (ptr + 3 < end)
15437 {
15438 tmp = contents[ptr];
15439 contents[ptr] = contents[ptr + 3];
15440 contents[ptr + 3] = tmp;
15441 tmp = contents[ptr + 1];
15442 contents[ptr + 1] = contents[ptr + 2];
15443 contents[ptr + 2] = tmp;
15444 ptr += 4;
15445 }
15446 break;
e489d0ae 15447
c7b8f16e
JB		 15448 case 't':
15449 /* Byte swap code halfwords. */
15450 while (ptr + 1 < end)
15451 {
15452 tmp = contents[ptr];
15453 contents[ptr] = contents[ptr + 1];
15454 contents[ptr + 1] = tmp;
15455 ptr += 2;
15456 }
15457 break;
15458
15459 case 'd':
15460 /* Leave data alone. */
15461 break;
15462 }
15463 ptr = end;
15464 }
e489d0ae 15465 }
8e3de13a 15466
93204d3a 15467 free (map);
47b2e99c 15468 arm_data->mapcount = -1;
c7b8f16e 15469 arm_data->mapsize = 0;
8e3de13a 15470 arm_data->map = NULL;
8e3de13a 15471
e489d0ae
PB		 15472 return FALSE;
15473}
15474
0beaef2b
PB		 15475/* Mangle thumb function symbols as we read them in. */
15476
8384fb8f 15477static bfd_boolean
0beaef2b
PB		 15478elf32_arm_swap_symbol_in (bfd * abfd,
15479 const void *psrc,
15480 const void *pshn,
15481 Elf_Internal_Sym *dst)
15482{
8384fb8f
AM		 15483 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15484 return FALSE;
0beaef2b
PB		 15485
15486 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15487 the address. */
63e1a0fc
PB		 15488 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15489 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15490 {
63e1a0fc
PB		 15491 if (dst->st_value & 1)
15492 {
15493 dst->st_value &= ~(bfd_vma) 1;
15494 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15495 }
15496 else
15497 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15498 }
15499 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15500 {
15501 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15502 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15503 }
35fc36a8
RS		 15504 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15505 dst->st_target_internal = ST_BRANCH_LONG;
15506 else
63e1a0fc 15507 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15508
8384fb8f 15509 return TRUE;
0beaef2b
PB		 15510}
15511
15512
15513/* Mangle thumb function symbols as we write them out. */
15514
15515static void
15516elf32_arm_swap_symbol_out (bfd *abfd,
15517 const Elf_Internal_Sym *src,
15518 void *cdst,
15519 void *shndx)
15520{
15521 Elf_Internal_Sym newsym;
15522
15523 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15524 of the address set, as per the new EABI. We do this unconditionally
15525 because objcopy does not set the elf header flags until after
15526 it writes out the symbol table. */
35fc36a8 15527 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15528 {
15529 newsym = *src;
34e77a92
RS		 15530 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15531 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 15532 if (newsym.st_shndx != SHN_UNDEF)
15533 {
15534 /* Do this only for defined symbols. At link type, the static
15535 linker will simulate the work of dynamic linker of resolving
15536 symbols and will carry over the thumbness of found symbols to
15537 the output symbol table. It's not clear how it happens, but
b0fead2b 15538 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 15539 runtime, and writing '1' for them will be confusing for users
15540 and possibly for dynamic linker itself.
15541 */
15542 newsym.st_value |= 1;
15543 }
906e58ca 15544
0beaef2b
PB		 15545 src = &newsym;
15546 }
15547 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15548}
15549
b294bdf8
MM		 15550/* Add the PT_ARM_EXIDX program header. */
15551
15552static bfd_boolean
906e58ca 15553elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15554 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15555{
15556 struct elf_segment_map *m;
15557 asection *sec;
15558
15559 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15560 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15561 {
15562 /* If there is already a PT_ARM_EXIDX header, then we do not
15563 want to add another one. This situation arises when running
15564 "strip"; the input binary already has the header. */
15565 m = elf_tdata (abfd)->segment_map;
15566 while (m && m->p_type != PT_ARM_EXIDX)
15567 m = m->next;
15568 if (!m)
15569 {
21d799b5
NC		 15570 m = (struct elf_segment_map *)
15571 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15572 if (m == NULL)
15573 return FALSE;
15574 m->p_type = PT_ARM_EXIDX;
15575 m->count = 1;
15576 m->sections[0] = sec;
15577
15578 m->next = elf_tdata (abfd)->segment_map;
15579 elf_tdata (abfd)->segment_map = m;
15580 }
15581 }
15582
15583 return TRUE;
15584}
15585
15586/* We may add a PT_ARM_EXIDX program header. */
15587
15588static int
a6b96beb
AM		 15589elf32_arm_additional_program_headers (bfd *abfd,
15590 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15591{
15592 asection *sec;
15593
15594 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15595 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15596 return 1;
15597 else
15598 return 0;
15599}
15600
34e77a92
RS		 15601/* Hook called by the linker routine which adds symbols from an object
15602 file. */
15603
15604static bfd_boolean
15605elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15606 Elf_Internal_Sym *sym, const char **namep,
15607 flagword *flagsp, asection **secp, bfd_vma *valp)
15608{
15609 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15610 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15611 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15612 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92
RS		 15613
15614 if (elf32_arm_hash_table (info)->vxworks_p
15615 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15616 flagsp, secp, valp))
15617 return FALSE;
15618
15619 return TRUE;
15620}
15621
0beaef2b 15622/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15623const struct elf_size_info elf32_arm_size_info =
15624{
0beaef2b
PB		 15625 sizeof (Elf32_External_Ehdr),
15626 sizeof (Elf32_External_Phdr),
15627 sizeof (Elf32_External_Shdr),
15628 sizeof (Elf32_External_Rel),
15629 sizeof (Elf32_External_Rela),
15630 sizeof (Elf32_External_Sym),
15631 sizeof (Elf32_External_Dyn),
15632 sizeof (Elf_External_Note),
15633 4,
15634 1,
15635 32, 2,
15636 ELFCLASS32, EV_CURRENT,
15637 bfd_elf32_write_out_phdrs,
15638 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15639 bfd_elf32_checksum_contents,
0beaef2b
PB		 15640 bfd_elf32_write_relocs,
15641 elf32_arm_swap_symbol_in,
15642 elf32_arm_swap_symbol_out,
15643 bfd_elf32_slurp_reloc_table,
15644 bfd_elf32_slurp_symbol_table,
15645 bfd_elf32_swap_dyn_in,
15646 bfd_elf32_swap_dyn_out,
15647 bfd_elf32_swap_reloc_in,
15648 bfd_elf32_swap_reloc_out,
15649 bfd_elf32_swap_reloca_in,
15650 bfd_elf32_swap_reloca_out
15651};
15652
252b5132 15653#define ELF_ARCH bfd_arch_arm
ae95ffa6 15654#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 15655#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 15656#ifdef __QNXTARGET__
15657#define ELF_MAXPAGESIZE 0x1000
15658#else
f21f3fe0 15659#define ELF_MAXPAGESIZE 0x8000
d0facd1b 15660#endif
b1342370 15661#define ELF_MINPAGESIZE 0x1000
24718e3b 15662#define ELF_COMMONPAGESIZE 0x1000
252b5132 15663
ba93b8ac
DJ		 15664#define bfd_elf32_mkobject elf32_arm_mkobject
15665
99e4ae17
AJ		 15666#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15667#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 15668#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15669#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15670#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 15671#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 15672#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
b38cadfb 15673#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 15674#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 15675#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 15676#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 15677#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 15678#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 15679
15680#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15681#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 15682#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 15683#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15684#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 15685#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 15686#define elf_backend_write_section elf32_arm_write_section
252b5132 15687#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 15688#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 15689#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15690#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15691#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 15692#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 15693#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 15694#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 15695#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 15696#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 15697#define elf_backend_fake_sections elf32_arm_fake_sections
15698#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 15699#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 15700#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 15701#define elf_backend_size_info elf32_arm_size_info
b294bdf8 15702#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 15703#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15704#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15705#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 15706#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 15707
15708#define elf_backend_can_refcount 1
15709#define elf_backend_can_gc_sections 1
15710#define elf_backend_plt_readonly 1
15711#define elf_backend_want_got_plt 1
15712#define elf_backend_want_plt_sym 0
15713#define elf_backend_may_use_rel_p 1
15714#define elf_backend_may_use_rela_p 0
4e7fd91e 15715#define elf_backend_default_use_rela_p 0
252b5132 15716
04f7c78d 15717#define elf_backend_got_header_size 12
04f7c78d 15718
906e58ca
NC		 15719#undef elf_backend_obj_attrs_vendor
15720#define elf_backend_obj_attrs_vendor "aeabi"
15721#undef elf_backend_obj_attrs_section
15722#define elf_backend_obj_attrs_section ".ARM.attributes"
15723#undef elf_backend_obj_attrs_arg_type
15724#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15725#undef elf_backend_obj_attrs_section_type
104d59d1 15726#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
b38cadfb
NC		 15727#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15728#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 15729
252b5132 15730#include "elf32-target.h"
7f266840 15731
b38cadfb
NC		 15732/* Native Client targets. */
15733
15734#undef TARGET_LITTLE_SYM
15735#define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15736#undef TARGET_LITTLE_NAME
15737#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15738#undef TARGET_BIG_SYM
15739#define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15740#undef TARGET_BIG_NAME
15741#define TARGET_BIG_NAME "elf32-bigarm-nacl"
15742
15743/* Like elf32_arm_link_hash_table_create -- but overrides
15744 appropriately for NaCl. */
15745
15746static struct bfd_link_hash_table *
15747elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15748{
15749 struct bfd_link_hash_table *ret;
15750
15751 ret = elf32_arm_link_hash_table_create (abfd);
15752 if (ret)
15753 {
15754 struct elf32_arm_link_hash_table *htab
15755 = (struct elf32_arm_link_hash_table *) ret;
15756
15757 htab->nacl_p = 1;
15758
15759 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15760 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15761 }
15762 return ret;
15763}
15764
15765/* Since NaCl doesn't use the ARM-specific unwind format, we don't
15766 really need to use elf32_arm_modify_segment_map. But we do it
15767 anyway just to reduce gratuitous differences with the stock ARM backend. */
15768
15769static bfd_boolean
15770elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15771{
15772 return (elf32_arm_modify_segment_map (abfd, info)
15773 && nacl_modify_segment_map (abfd, info));
15774}
15775
15776#undef elf32_bed
15777#define elf32_bed elf32_arm_nacl_bed
15778#undef bfd_elf32_bfd_link_hash_table_create
15779#define bfd_elf32_bfd_link_hash_table_create \
15780 elf32_arm_nacl_link_hash_table_create
15781#undef elf_backend_plt_alignment
15782#define elf_backend_plt_alignment 4
15783#undef elf_backend_modify_segment_map
15784#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15785#undef elf_backend_modify_program_headers
15786#define elf_backend_modify_program_headers nacl_modify_program_headers
15787
15788#undef ELF_MAXPAGESIZE
15789#define ELF_MAXPAGESIZE 0x10000
15790
15791#include "elf32-target.h"
15792
15793/* Reset to defaults. */
15794#undef elf_backend_plt_alignment
15795#undef elf_backend_modify_segment_map
15796#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15797#undef elf_backend_modify_program_headers
15798
906e58ca 15799/* VxWorks Targets. */
4e7fd91e 15800
906e58ca 15801#undef TARGET_LITTLE_SYM
4e7fd91e 15802#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 15803#undef TARGET_LITTLE_NAME
4e7fd91e 15804#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 15805#undef TARGET_BIG_SYM
4e7fd91e 15806#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 15807#undef TARGET_BIG_NAME
4e7fd91e
PB		 15808#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15809
15810/* Like elf32_arm_link_hash_table_create -- but overrides
15811 appropriately for VxWorks. */
906e58ca 15812
4e7fd91e
PB		 15813static struct bfd_link_hash_table *
15814elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15815{
15816 struct bfd_link_hash_table *ret;
15817
15818 ret = elf32_arm_link_hash_table_create (abfd);
15819 if (ret)
15820 {
15821 struct elf32_arm_link_hash_table *htab
00a97672 15822 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 15823 htab->use_rel = 0;
00a97672 15824 htab->vxworks_p = 1;
4e7fd91e
PB		 15825 }
15826 return ret;
906e58ca 15827}
4e7fd91e 15828
00a97672
RS		 15829static void
15830elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15831{
15832 elf32_arm_final_write_processing (abfd, linker);
15833 elf_vxworks_final_write_processing (abfd, linker);
15834}
15835
906e58ca 15836#undef elf32_bed
4e7fd91e
PB		 15837#define elf32_bed elf32_arm_vxworks_bed
15838
906e58ca
NC		 15839#undef bfd_elf32_bfd_link_hash_table_create
15840#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 15841#undef elf_backend_final_write_processing
15842#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15843#undef elf_backend_emit_relocs
15844#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 15845
906e58ca 15846#undef elf_backend_may_use_rel_p
00a97672 15847#define elf_backend_may_use_rel_p 0
906e58ca 15848#undef elf_backend_may_use_rela_p
00a97672 15849#define elf_backend_may_use_rela_p 1
906e58ca 15850#undef elf_backend_default_use_rela_p
00a97672 15851#define elf_backend_default_use_rela_p 1
906e58ca 15852#undef elf_backend_want_plt_sym
00a97672 15853#define elf_backend_want_plt_sym 1
906e58ca 15854#undef ELF_MAXPAGESIZE
00a97672 15855#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 15856
15857#include "elf32-target.h"
15858
15859
21d799b5
NC		 15860/* Merge backend specific data from an object file to the output
15861 object file when linking. */
15862
15863static bfd_boolean
15864elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15865{
15866 flagword out_flags;
15867 flagword in_flags;
15868 bfd_boolean flags_compatible = TRUE;
15869 asection *sec;
15870
cc643b88 15871 /* Check if we have the same endianness. */
21d799b5
NC		 15872 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15873 return FALSE;
15874
15875 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15876 return TRUE;
15877
15878 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15879 return FALSE;
15880
15881 /* The input BFD must have had its flags initialised. */
15882 /* The following seems bogus to me -- The flags are initialized in
15883 the assembler but I don't think an elf_flags_init field is
15884 written into the object. */
15885 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15886
15887 in_flags = elf_elfheader (ibfd)->e_flags;
15888 out_flags = elf_elfheader (obfd)->e_flags;
15889
15890 /* In theory there is no reason why we couldn't handle this. However
15891 in practice it isn't even close to working and there is no real
15892 reason to want it. */
15893 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15894 && !(ibfd->flags & DYNAMIC)
15895 && (in_flags & EF_ARM_BE8))
15896 {
15897 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15898 ibfd);
15899 return FALSE;
15900 }
15901
15902 if (!elf_flags_init (obfd))
15903 {
15904 /* If the input is the default architecture and had the default
15905 flags then do not bother setting the flags for the output
15906 architecture, instead allow future merges to do this. If no
15907 future merges ever set these flags then they will retain their
15908 uninitialised values, which surprise surprise, correspond
15909 to the default values. */
15910 if (bfd_get_arch_info (ibfd)->the_default
15911 && elf_elfheader (ibfd)->e_flags == 0)
15912 return TRUE;
15913
15914 elf_flags_init (obfd) = TRUE;
15915 elf_elfheader (obfd)->e_flags = in_flags;
15916
15917 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15918 && bfd_get_arch_info (obfd)->the_default)
15919 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15920
15921 return TRUE;
15922 }
15923
15924 /* Determine what should happen if the input ARM architecture
15925 does not match the output ARM architecture. */
15926 if (! bfd_arm_merge_machines (ibfd, obfd))
15927 return FALSE;
15928
15929 /* Identical flags must be compatible. */
15930 if (in_flags == out_flags)
15931 return TRUE;
15932
15933 /* Check to see if the input BFD actually contains any sections. If
15934 not, its flags may not have been initialised either, but it
15935 cannot actually cause any incompatiblity. Do not short-circuit
15936 dynamic objects; their section list may be emptied by
15937 elf_link_add_object_symbols.
15938
15939 Also check to see if there are no code sections in the input.
15940 In this case there is no need to check for code specific flags.
15941 XXX - do we need to worry about floating-point format compatability
15942 in data sections ? */
15943 if (!(ibfd->flags & DYNAMIC))
15944 {
15945 bfd_boolean null_input_bfd = TRUE;
15946 bfd_boolean only_data_sections = TRUE;
15947
15948 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15949 {
15950 /* Ignore synthetic glue sections. */
15951 if (strcmp (sec->name, ".glue_7")
15952 && strcmp (sec->name, ".glue_7t"))
15953 {
15954 if ((bfd_get_section_flags (ibfd, sec)
15955 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15956 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15957 only_data_sections = FALSE;
15958
15959 null_input_bfd = FALSE;
15960 break;
15961 }
15962 }
15963
15964 if (null_input_bfd || only_data_sections)
15965 return TRUE;
15966 }
15967
15968 /* Complain about various flag mismatches. */
15969 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15970 EF_ARM_EABI_VERSION (out_flags)))
15971 {
15972 _bfd_error_handler
15973 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15974 ibfd, obfd,
15975 (in_flags & EF_ARM_EABIMASK) >> 24,
15976 (out_flags & EF_ARM_EABIMASK) >> 24);
15977 return FALSE;
15978 }
15979
15980 /* Not sure what needs to be checked for EABI versions >= 1. */
15981 /* VxWorks libraries do not use these flags. */
15982 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15983 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15984 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15985 {
15986 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15987 {
15988 _bfd_error_handler
15989 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15990 ibfd, obfd,
15991 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15992 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15993 flags_compatible = FALSE;
15994 }
15995
15996 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15997 {
15998 if (in_flags & EF_ARM_APCS_FLOAT)
15999 _bfd_error_handler
16000 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16001 ibfd, obfd);
16002 else
16003 _bfd_error_handler
16004 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16005 ibfd, obfd);
16006
16007 flags_compatible = FALSE;
16008 }
16009
16010 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16011 {
16012 if (in_flags & EF_ARM_VFP_FLOAT)
16013 _bfd_error_handler
16014 (_("error: %B uses VFP instructions, whereas %B does not"),
16015 ibfd, obfd);
16016 else
16017 _bfd_error_handler
16018 (_("error: %B uses FPA instructions, whereas %B does not"),
16019 ibfd, obfd);
16020
16021 flags_compatible = FALSE;
16022 }
16023
16024 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16025 {
16026 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16027 _bfd_error_handler
16028 (_("error: %B uses Maverick instructions, whereas %B does not"),
16029 ibfd, obfd);
16030 else
16031 _bfd_error_handler
16032 (_("error: %B does not use Maverick instructions, whereas %B does"),
16033 ibfd, obfd);
16034
16035 flags_compatible = FALSE;
16036 }
16037
16038#ifdef EF_ARM_SOFT_FLOAT
16039 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16040 {
16041 /* We can allow interworking between code that is VFP format
16042 layout, and uses either soft float or integer regs for
16043 passing floating point arguments and results. We already
16044 know that the APCS_FLOAT flags match; similarly for VFP
16045 flags. */
16046 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16047 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16048 {
16049 if (in_flags & EF_ARM_SOFT_FLOAT)
16050 _bfd_error_handler
16051 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16052 ibfd, obfd);
16053 else
16054 _bfd_error_handler
16055 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16056 ibfd, obfd);
16057
16058 flags_compatible = FALSE;
16059 }
16060 }
16061#endif
16062
16063 /* Interworking mismatch is only a warning. */
16064 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16065 {
16066 if (in_flags & EF_ARM_INTERWORK)
16067 {
16068 _bfd_error_handler
16069 (_("Warning: %B supports interworking, whereas %B does not"),
16070 ibfd, obfd);
16071 }
16072 else
16073 {
16074 _bfd_error_handler
16075 (_("Warning: %B does not support interworking, whereas %B does"),
16076 ibfd, obfd);
16077 }
16078 }
16079 }
16080
16081 return flags_compatible;
16082}
16083
16084
906e58ca 16085/* Symbian OS Targets. */
7f266840 16086
906e58ca 16087#undef TARGET_LITTLE_SYM
7f266840 16088#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 16089#undef TARGET_LITTLE_NAME
7f266840 16090#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 16091#undef TARGET_BIG_SYM
7f266840 16092#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 16093#undef TARGET_BIG_NAME
7f266840
DJ		 16094#define TARGET_BIG_NAME "elf32-bigarm-symbian"
16095
16096/* Like elf32_arm_link_hash_table_create -- but overrides
16097 appropriately for Symbian OS. */
906e58ca 16098
7f266840
DJ		 16099static struct bfd_link_hash_table *
16100elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16101{
16102 struct bfd_link_hash_table *ret;
16103
16104 ret = elf32_arm_link_hash_table_create (abfd);
16105 if (ret)
16106 {
16107 struct elf32_arm_link_hash_table *htab
16108 = (struct elf32_arm_link_hash_table *)ret;
16109 /* There is no PLT header for Symbian OS. */
16110 htab->plt_header_size = 0;
95720a86
DJ		 16111 /* The PLT entries are each one instruction and one word. */
16112 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 16113 htab->symbian_p = 1;
33bfe774
JB		 16114 /* Symbian uses armv5t or above, so use_blx is always true. */
16115 htab->use_blx = 1;
67687978 16116 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 16117 }
16118 return ret;
906e58ca 16119}
7f266840 16120
b35d266b 16121static const struct bfd_elf_special_section
551b43fd 16122elf32_arm_symbian_special_sections[] =
7f266840 16123{
5cd3778d
MM		 16124 /* In a BPABI executable, the dynamic linking sections do not go in
16125 the loadable read-only segment. The post-linker may wish to
16126 refer to these sections, but they are not part of the final
16127 program image. */
0112cd26
NC		 16128 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16129 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16130 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16131 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16132 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 16133 /* These sections do not need to be writable as the SymbianOS
16134 postlinker will arrange things so that no dynamic relocation is
16135 required. */
0112cd26
NC		 16136 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16137 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16138 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16139 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 16140};
16141
c3c76620 16142static void
906e58ca 16143elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 16144 struct bfd_link_info *link_info)
c3c76620
MM		 16145{
16146 /* BPABI objects are never loaded directly by an OS kernel; they are
16147 processed by a postlinker first, into an OS-specific format. If
16148 the D_PAGED bit is set on the file, BFD will align segments on
16149 page boundaries, so that an OS can directly map the file. With
16150 BPABI objects, that just results in wasted space. In addition,
16151 because we clear the D_PAGED bit, map_sections_to_segments will
16152 recognize that the program headers should not be mapped into any
16153 loadable segment. */
16154 abfd->flags &= ~D_PAGED;
906e58ca 16155 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 16156}
7f266840
DJ		 16157
16158static bfd_boolean
906e58ca 16159elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 16160 struct bfd_link_info *info)
7f266840
DJ		 16161{
16162 struct elf_segment_map *m;
16163 asection *dynsec;
16164
7f266840
DJ		 16165 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16166 segment. However, because the .dynamic section is not marked
16167 with SEC_LOAD, the generic ELF code will not create such a
16168 segment. */
16169 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16170 if (dynsec)
16171 {
8ded5a0f
AM		 16172 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
16173 if (m->p_type == PT_DYNAMIC)
16174 break;
16175
16176 if (m == NULL)
16177 {
16178 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16179 m->next = elf_tdata (abfd)->segment_map;
16180 elf_tdata (abfd)->segment_map = m;
16181 }
7f266840
DJ		 16182 }
16183
b294bdf8
MM		 16184 /* Also call the generic arm routine. */
16185 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 16186}
16187
95720a86
DJ		 16188/* Return address for Ith PLT stub in section PLT, for relocation REL
16189 or (bfd_vma) -1 if it should not be included. */
16190
16191static bfd_vma
16192elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16193 const arelent *rel ATTRIBUTE_UNUSED)
16194{
16195 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16196}
16197
16198
8029a119 16199#undef elf32_bed
7f266840
DJ		 16200#define elf32_bed elf32_arm_symbian_bed
16201
16202/* The dynamic sections are not allocated on SymbianOS; the postlinker
16203 will process them and then discard them. */
906e58ca 16204#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 16205#define ELF_DYNAMIC_SEC_FLAGS \
16206 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16207
00a97672 16208#undef elf_backend_emit_relocs
c3c76620 16209
906e58ca
NC		 16210#undef bfd_elf32_bfd_link_hash_table_create
16211#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16212#undef elf_backend_special_sections
16213#define elf_backend_special_sections elf32_arm_symbian_special_sections
16214#undef elf_backend_begin_write_processing
16215#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16216#undef elf_backend_final_write_processing
16217#define elf_backend_final_write_processing elf32_arm_final_write_processing
16218
16219#undef elf_backend_modify_segment_map
7f266840
DJ		 16220#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16221
16222/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 16223#undef elf_backend_got_header_size
7f266840
DJ		 16224#define elf_backend_got_header_size 0
16225
16226/* Similarly, there is no .got.plt section. */
906e58ca 16227#undef elf_backend_want_got_plt
7f266840
DJ		 16228#define elf_backend_want_got_plt 0
16229
906e58ca 16230#undef elf_backend_plt_sym_val
95720a86
DJ		 16231#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16232
906e58ca 16233#undef elf_backend_may_use_rel_p
00a97672 16234#define elf_backend_may_use_rel_p 1
906e58ca 16235#undef elf_backend_may_use_rela_p
00a97672 16236#define elf_backend_may_use_rela_p 0
906e58ca 16237#undef elf_backend_default_use_rela_p
00a97672 16238#define elf_backend_default_use_rela_p 0
906e58ca 16239#undef elf_backend_want_plt_sym
00a97672 16240#define elf_backend_want_plt_sym 0
906e58ca 16241#undef ELF_MAXPAGESIZE
00a97672 16242#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 16243
7f266840 16244#include "elf32-target.h"
GDB Binutils - Deliverables
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