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PR symtab/15885
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
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252b5132 1/* 32-bit ELF support for ARM
2f47f5fc 2 Copyright 1998-2013 Free Software Foundation, Inc.
252b5132
RH		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cd123cb7
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
6e6718a3 21#include "sysdep.h"
2468f9c9
PB		 22#include <limits.h>
23
3db64b00 24#include "bfd.h"
6034aab8 25#include "bfd_stdint.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
b38cadfb 29#include "elf-nacl.h"
00a97672 30#include "elf-vxworks.h"
ee065d83 31#include "elf/arm.h"
7f266840 32
00a97672
RS		 33/* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35#define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38/* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40#define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45/* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47#define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52/* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54#define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
7f266840
DJ		 59#define elf_info_to_howto 0
60#define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62#define ARM_ELF_ABI_VERSION 0
63#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
79f08007
YZ		 65/* The Adjusted Place, as defined by AAELF. */
66#define Pa(X) ((X) & 0xfffffffc)
67
3e6b1042
DJ		 68static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
7f266840
DJ		 73/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
c19d1205 77static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 78{
8029a119 79 /* No relocation. */
7f266840
DJ		 80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
c19d1205 138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 139 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 142 32, /* bitsize */
143 TRUE, /* pc_relative */
7f266840 144 0, /* bitpos */
4962c51a 145 complain_overflow_dont,/* complain_on_overflow */
7f266840 146 bfd_elf_generic_reloc, /* special_function */
4962c51a 147 "R_ARM_LDR_PC_G0", /* name */
7f266840 148 FALSE, /* partial_inplace */
4962c51a
MS		 149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
7f266840
DJ		 152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
00a97672
RS		 179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
7f266840
DJ		 181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
c19d1205 226 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 229 24, /* bitsize */
7f266840
DJ		 230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
c19d1205 234 "R_ARM_THM_CALL", /* name */
7f266840 235 FALSE, /* partial_inplace */
7f6ab9f8
AM		 236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
7f266840
DJ		 238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
c19d1205 254 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 257 32, /* bitsize */
258 FALSE, /* pc_relative */
7f266840
DJ		 259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
c19d1205 262 "R_ARM_BREL_ADJ", /* name */
7f266840 263 FALSE, /* partial_inplace */
c19d1205
ZW		 264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
7f266840 267
0855e32b 268 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 269 0, /* rightshift */
0855e32b
NS		 270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
7f266840
DJ		 272 FALSE, /* pc_relative */
273 0, /* bitpos */
0855e32b 274 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 275 bfd_elf_generic_reloc, /* special_function */
0855e32b 276 "R_ARM_TLS_DESC", /* name */
7f266840 277 FALSE, /* partial_inplace */
0855e32b
NS		 278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
7f266840
DJ		 280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 300 24, /* bitsize */
7f266840
DJ		 301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 315 24, /* bitsize */
7f266840
DJ		 316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
7f6ab9f8
AM		 322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
7f266840
DJ		 324 TRUE), /* pcrel_offset */
325
ba93b8ac 326 /* Dynamic TLS relocations. */
7f266840 327
ba93b8ac 328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
99059e56
RM		 329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
7f266840 341
ba93b8ac 342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
99059e56
RM		 343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
7f266840 355
ba93b8ac 356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
99059e56
RM		 357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
7f266840
DJ		 369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
99059e56
RM		 373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
7f266840
DJ		 385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
99059e56
RM		 387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
7f266840
DJ		 399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
99059e56
RM		 401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
7f266840
DJ		 413
414 HOWTO (R_ARM_RELATIVE, /* type */
99059e56
RM		 415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
7f266840 427
c19d1205 428 HOWTO (R_ARM_GOTOFF32, /* type */
99059e56
RM		 429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
7f266840
DJ		 441
442 HOWTO (R_ARM_GOTPC, /* type */
99059e56
RM		 443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
7f266840
DJ		 455
456 HOWTO (R_ARM_GOT32, /* type */
99059e56
RM		 457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
7f266840
DJ		 469
470 HOWTO (R_ARM_PLT32, /* type */
99059e56
RM		 471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
7f266840
DJ		 483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
c19d1205
ZW		 512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
7f266840 517 0, /* bitpos */
c19d1205 518 complain_overflow_signed,/* complain_on_overflow */
7f266840 519 bfd_elf_generic_reloc, /* special_function */
c19d1205 520 "R_ARM_THM_JUMP24", /* name */
7f266840 521 FALSE, /* partial_inplace */
c19d1205
ZW		 522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
7f266840 525
c19d1205 526 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 527 0, /* rightshift */
c19d1205
ZW		 528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
7f266840
DJ		 530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
c19d1205 534 "R_ARM_BASE_ABS", /* name */
7f266840 535 FALSE, /* partial_inplace */
c19d1205
ZW		 536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
7f266840
DJ		 538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
c19d1205
ZW		 693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
39623e12
PB		 704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
c19d1205
ZW		 706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
39623e12
PB		 718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
c19d1205
ZW		 720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
39623e12
PB		 732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
c19d1205
ZW		 734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
39623e12
PB		 746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
c19d1205
ZW		 748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
2cab6cc3 843 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
2cab6cc3
MS		 847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
c19d1205
ZW		 849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
2cab6cc3 857 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
2cab6cc3
MS		 861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
c19d1205
ZW		 863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
7f266840 892
4962c51a
MS		 893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
c19d1205 1274
c19d1205
ZW		 1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
0855e32b
NS		 1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
c19d1205
ZW		 1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
99059e56
RM		 1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
c19d1205
ZW		 1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
99059e56
RM		 1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
c19d1205
ZW		 1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
ba93b8ac 1544
c19d1205
ZW		 1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
99059e56
RM		 1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
ba93b8ac 1559
ba93b8ac 1560 HOWTO (R_ARM_TLS_LDM32, /* type */
99059e56
RM		 1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
ba93b8ac 1573
c19d1205 1574 HOWTO (R_ARM_TLS_LDO32, /* type */
99059e56
RM		 1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
ba93b8ac 1587
ba93b8ac 1588 HOWTO (R_ARM_TLS_IE32, /* type */
99059e56
RM		 1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
7f266840 1601
c19d1205 1602 HOWTO (R_ARM_TLS_LE32, /* type */
99059e56
RM		 1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
7f266840 1615
c19d1205
ZW		 1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
7f266840 1621 0, /* bitpos */
c19d1205 1622 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1623 bfd_elf_generic_reloc, /* special_function */
c19d1205 1624 "R_ARM_TLS_LDO12", /* name */
7f266840 1625 FALSE, /* partial_inplace */
c19d1205
ZW		 1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
7f266840 1629
c19d1205
ZW		 1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
7f266840 1635 0, /* bitpos */
c19d1205 1636 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1637 bfd_elf_generic_reloc, /* special_function */
c19d1205 1638 "R_ARM_TLS_LE12", /* name */
7f266840 1639 FALSE, /* partial_inplace */
c19d1205
ZW		 1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
7f266840 1643
c19d1205 1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
7f266840 1649 0, /* bitpos */
c19d1205 1650 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1651 bfd_elf_generic_reloc, /* special_function */
c19d1205 1652 "R_ARM_TLS_IE12GP", /* name */
7f266840 1653 FALSE, /* partial_inplace */
c19d1205
ZW		 1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
0855e32b 1657
34e77a92 1658 /* 112-127 private relocations. */
0855e32b
NS		 1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
34e77a92
RS		 1675
1676 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
c19d1205
ZW		 1692};
1693
34e77a92
RS		 1694/* 160 onwards: */
1695static reloc_howto_type elf32_arm_howto_table_2[1] =
1696{
1697 HOWTO (R_ARM_IRELATIVE, /* type */
99059e56
RM		 1698 0, /* rightshift */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1700 32, /* bitsize */
1701 FALSE, /* pc_relative */
1702 0, /* bitpos */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
34e77a92 1710};
c19d1205 1711
34e77a92
RS		 1712/* 249-255 extended, currently unused, relocations: */
1713static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1714{
1715 HOWTO (R_ARM_RREL32, /* type */
1716 0, /* rightshift */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1718 0, /* bitsize */
1719 FALSE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1725 0, /* src_mask */
1726 0, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
1729 HOWTO (R_ARM_RABS32, /* type */
1730 0, /* rightshift */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1732 0, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1739 0, /* src_mask */
1740 0, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 HOWTO (R_ARM_RPC24, /* type */
1744 0, /* rightshift */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1746 0, /* bitsize */
1747 FALSE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1753 0, /* src_mask */
1754 0, /* dst_mask */
1755 FALSE), /* pcrel_offset */
1756
1757 HOWTO (R_ARM_RBASE, /* type */
1758 0, /* rightshift */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1760 0, /* bitsize */
1761 FALSE, /* pc_relative */
1762 0, /* bitpos */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1767 0, /* src_mask */
1768 0, /* dst_mask */
1769 FALSE) /* pcrel_offset */
1770};
1771
1772static reloc_howto_type *
1773elf32_arm_howto_from_type (unsigned int r_type)
1774{
906e58ca 1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1776 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1777
34e77a92
RS		 1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1780
c19d1205 1781 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1784
c19d1205 1785 return NULL;
7f266840
DJ		 1786}
1787
1788static void
1789elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1791{
1792 unsigned int r_type;
1793
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1796}
1797
1798struct elf32_arm_reloc_map
1799 {
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1802 };
1803
1804/* All entries in this list must also be present in elf32_arm_howto_table. */
1805static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1806 {
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1893 };
1894
1895static reloc_howto_type *
f1c71a59
ZW		 1896elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
7f266840
DJ		 1898{
1899 unsigned int i;
8029a119 1900
906e58ca 1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1904
c19d1205 1905 return NULL;
7f266840
DJ		 1906}
1907
157090f7
AM		 1908static reloc_howto_type *
1909elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1910 const char *r_name)
1911{
1912 unsigned int i;
1913
906e58ca 1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1918
906e58ca 1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1923
34e77a92
RS		 1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1928
157090f7
AM		 1929 return NULL;
1930}
1931
906e58ca
NC		 1932/* Support for core dump NOTE sections. */
1933
7f266840 1934static bfd_boolean
f1c71a59 1935elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1936{
1937 int offset;
1938 size_t size;
1939
1940 switch (note->descsz)
1941 {
1942 default:
1943 return FALSE;
1944
8029a119 1945 case 148: /* Linux/ARM 32-bit. */
7f266840 1946 /* pr_cursig */
228e534f 1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
7f266840
DJ		 1948
1949 /* pr_pid */
228e534f 1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1951
1952 /* pr_reg */
1953 offset = 72;
1954 size = 72;
1955
1956 break;
1957 }
1958
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1962}
1963
1964static bfd_boolean
f1c71a59 1965elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1966{
1967 switch (note->descsz)
1968 {
1969 default:
1970 return FALSE;
1971
8029a119 1972 case 124: /* Linux/ARM elf_prpsinfo. */
228e534f 1973 elf_tdata (abfd)->core->pid
4395ee08 1974 = bfd_get_32 (abfd, note->descdata + 12);
228e534f 1975 elf_tdata (abfd)->core->program
7f266840 1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
228e534f 1977 elf_tdata (abfd)->core->command
7f266840
DJ		 1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1979 }
1980
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
7f266840 1984 {
228e534f 1985 char *command = elf_tdata (abfd)->core->command;
7f266840
DJ		 1986 int n = strlen (command);
1987
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1990 }
1991
1992 return TRUE;
1993}
1994
1f20dca5
UW		 1995static char *
1996elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1997 int note_type, ...)
1998{
1999 switch (note_type)
2000 {
2001 default:
2002 return NULL;
2003
2004 case NT_PRPSINFO:
2005 {
2006 char data[124];
2007 va_list ap;
2008
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2013 va_end (ap);
2014
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2017 }
2018
2019 case NT_PRSTATUS:
2020 {
2021 char data[148];
2022 va_list ap;
2023 long pid;
2024 int cursig;
2025 const void *greg;
2026
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2035 va_end (ap);
2036
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2039 }
2040 }
2041}
2042
7f266840
DJ		 2043#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2044#define TARGET_LITTLE_NAME "elf32-littlearm"
2045#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2046#define TARGET_BIG_NAME "elf32-bigarm"
2047
2048#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1f20dca5 2050#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
7f266840 2051
252b5132
RH		 2052typedef unsigned long int insn32;
2053typedef unsigned short int insn16;
2054
3a4a14e9
PB		 2055/* In lieu of proper flags, assume all EABIv4 or later objects are
2056 interworkable. */
57e8b36a 2057#define INTERWORK_FLAG(abfd) \
3a4a14e9 2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2061
252b5132
RH		 2062/* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
9b485d32 2065 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2066#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2068
2069#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2071
c7b8f16e
JB		 2072#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2074
845b51d6
PB		 2075#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2077
7413f23f
DJ		 2078#define STUB_ENTRY_NAME "__%s_veneer"
2079
252b5132
RH		 2080/* The name of the dynamic interpreter. This is put in the .interp
2081 section. */
2082#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2083
0855e32b 2084static const unsigned long tls_trampoline [] =
b38cadfb
NC		 2085{
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2089};
0855e32b
NS		 2090
2091static const unsigned long dl_tlsdesc_lazy_trampoline [] =
b38cadfb
NC		 2092{
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
99059e56 2100 + dl_tlsdesc_lazy_resolver(GOT) */
b38cadfb
NC		 2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2102};
0855e32b 2103
5e681ec4
PB		 2104#ifdef FOUR_WORD_PLT
2105
252b5132
RH		 2106/* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
59f2c4e7 2108 called before the relocation has been set up calls the dynamic
9b485d32 2109 linker first. */
e5a52504 2110static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2111{
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2116};
5e681ec4
PB		 2117
2118/* Subsequent entries in a procedure linkage table look like
2119 this. */
e5a52504 2120static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2121{
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2126};
5e681ec4
PB		 2127
2128#else
2129
5e681ec4
PB		 2130/* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2133 linker first. */
e5a52504 2134static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2135{
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2141};
252b5132
RH		 2142
2143/* Subsequent entries in a procedure linkage table look like
2144 this. */
e5a52504 2145static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2146{
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2150};
5e681ec4
PB		 2151
2152#endif
252b5132 2153
00a97672
RS		 2154/* The format of the first entry in the procedure linkage table
2155 for a VxWorks executable. */
2156static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
b38cadfb
NC		 2157{
2158 0xe52dc008, /* str ip,[sp,#-8]! */
2159 0xe59fc000, /* ldr ip,[pc] */
2160 0xe59cf008, /* ldr pc,[ip,#8] */
2161 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2162};
00a97672
RS		 2163
2164/* The format of subsequent entries in a VxWorks executable. */
2165static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
b38cadfb
NC		 2166{
2167 0xe59fc000, /* ldr ip,[pc] */
2168 0xe59cf000, /* ldr pc,[ip] */
2169 0x00000000, /* .long @got */
2170 0xe59fc000, /* ldr ip,[pc] */
2171 0xea000000, /* b _PLT */
2172 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2173};
00a97672
RS		 2174
2175/* The format of entries in a VxWorks shared library. */
2176static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
b38cadfb
NC		 2177{
2178 0xe59fc000, /* ldr ip,[pc] */
2179 0xe79cf009, /* ldr pc,[ip,r9] */
2180 0x00000000, /* .long @got */
2181 0xe59fc000, /* ldr ip,[pc] */
2182 0xe599f008, /* ldr pc,[r9,#8] */
2183 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2184};
00a97672 2185
b7693d02
DJ		 2186/* An initial stub used if the PLT entry is referenced from Thumb code. */
2187#define PLT_THUMB_STUB_SIZE 4
2188static const bfd_vma elf32_arm_plt_thumb_stub [] =
b38cadfb
NC		 2189{
2190 0x4778, /* bx pc */
2191 0x46c0 /* nop */
2192};
b7693d02 2193
e5a52504
MM		 2194/* The entries in a PLT when using a DLL-based target with multiple
2195 address spaces. */
906e58ca 2196static const bfd_vma elf32_arm_symbian_plt_entry [] =
b38cadfb
NC		 2197{
2198 0xe51ff004, /* ldr pc, [pc, #-4] */
2199 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2200};
2201
2202/* The first entry in a procedure linkage table looks like
2203 this. It is set up so that any shared library function that is
2204 called before the relocation has been set up calls the dynamic
2205 linker first. */
2206static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2207{
2208 /* First bundle: */
2209 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2210 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2211 0xe08cc00f, /* add ip, ip, pc */
2212 0xe52dc008, /* str ip, [sp, #-8]! */
2213 /* Second bundle: */
edccdf7c
RM		 2214 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2215 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2216 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2217 0xe12fff1c, /* bx ip */
b38cadfb 2218 /* Third bundle: */
edccdf7c
RM		 2219 0xe320f000, /* nop */
2220 0xe320f000, /* nop */
2221 0xe320f000, /* nop */
b38cadfb
NC		 2222 /* .Lplt_tail: */
2223 0xe50dc004, /* str ip, [sp, #-4] */
2224 /* Fourth bundle: */
edccdf7c
RM		 2225 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2226 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2227 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2228 0xe12fff1c, /* bx ip */
b38cadfb
NC		 2229};
2230#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2231
2232/* Subsequent entries in a procedure linkage table look like this. */
2233static const bfd_vma elf32_arm_nacl_plt_entry [] =
2234{
2235 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2236 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2237 0xe08cc00f, /* add ip, ip, pc */
2238 0xea000000, /* b .Lplt_tail */
2239};
e5a52504 2240
906e58ca
NC		 2241#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2242#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2243#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2244#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2245#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2246#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2247
461a49ca 2248enum stub_insn_type
b38cadfb
NC		 2249{
2250 THUMB16_TYPE = 1,
2251 THUMB32_TYPE,
2252 ARM_TYPE,
2253 DATA_TYPE
2254};
461a49ca 2255
48229727
JB		 2256#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2257/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2258 is inserted in arm_build_one_stub(). */
2259#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2260#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2261#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2262#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2263#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2264#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2265
2266typedef struct
2267{
b38cadfb
NC		 2268 bfd_vma data;
2269 enum stub_insn_type type;
2270 unsigned int r_type;
2271 int reloc_addend;
461a49ca
DJ		 2272} insn_sequence;
2273
fea2b4d6
CL		 2274/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2275 to reach the stub if necessary. */
461a49ca 2276static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
b38cadfb
NC		 2277{
2278 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2279 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2280};
906e58ca 2281
fea2b4d6
CL		 2282/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2283 available. */
461a49ca 2284static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
b38cadfb
NC		 2285{
2286 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2287 ARM_INSN (0xe12fff1c), /* bx ip */
2288 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2289};
906e58ca 2290
d3626fb0 2291/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2292static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
b38cadfb
NC		 2293{
2294 THUMB16_INSN (0xb401), /* push {r0} */
2295 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2296 THUMB16_INSN (0x4684), /* mov ip, r0 */
2297 THUMB16_INSN (0xbc01), /* pop {r0} */
2298 THUMB16_INSN (0x4760), /* bx ip */
2299 THUMB16_INSN (0xbf00), /* nop */
2300 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2301};
906e58ca 2302
d3626fb0
CL		 2303/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2304 allowed. */
2305static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
b38cadfb
NC		 2306{
2307 THUMB16_INSN (0x4778), /* bx pc */
2308 THUMB16_INSN (0x46c0), /* nop */
2309 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2310 ARM_INSN (0xe12fff1c), /* bx ip */
2311 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2312};
d3626fb0 2313
fea2b4d6
CL		 2314/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2315 available. */
461a49ca 2316static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2317{
2318 THUMB16_INSN (0x4778), /* bx pc */
2319 THUMB16_INSN (0x46c0), /* nop */
2320 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2321 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2322};
906e58ca 2323
fea2b4d6
CL		 2324/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2325 one, when the destination is close enough. */
461a49ca 2326static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2327{
2328 THUMB16_INSN (0x4778), /* bx pc */
2329 THUMB16_INSN (0x46c0), /* nop */
2330 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2331};
c820be07 2332
cf3eccff 2333/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2334 blx to reach the stub if necessary. */
cf3eccff 2335static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
b38cadfb
NC		 2336{
2337 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2338 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2339 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2340};
906e58ca 2341
cf3eccff
DJ		 2342/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2343 blx to reach the stub if necessary. We can not add into pc;
2344 it is not guaranteed to mode switch (different in ARMv6 and
2345 ARMv7). */
2346static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
b38cadfb
NC		 2347{
2348 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2349 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2350 ARM_INSN (0xe12fff1c), /* bx ip */
2351 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2352};
cf3eccff 2353
ebe24dd4
CL		 2354/* V4T ARM -> ARM long branch stub, PIC. */
2355static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
b38cadfb
NC		 2356{
2357 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2358 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2359 ARM_INSN (0xe12fff1c), /* bx ip */
2360 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2361};
ebe24dd4
CL		 2362
2363/* V4T Thumb -> ARM long branch stub, PIC. */
2364static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
b38cadfb
NC		 2365{
2366 THUMB16_INSN (0x4778), /* bx pc */
2367 THUMB16_INSN (0x46c0), /* nop */
2368 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2369 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2370 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2371};
ebe24dd4 2372
d3626fb0
CL		 2373/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2374 architectures. */
ebe24dd4 2375static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
b38cadfb
NC		 2376{
2377 THUMB16_INSN (0xb401), /* push {r0} */
2378 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2379 THUMB16_INSN (0x46fc), /* mov ip, pc */
2380 THUMB16_INSN (0x4484), /* add ip, r0 */
2381 THUMB16_INSN (0xbc01), /* pop {r0} */
2382 THUMB16_INSN (0x4760), /* bx ip */
2383 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2384};
ebe24dd4 2385
d3626fb0
CL		 2386/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2387 allowed. */
2388static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
b38cadfb
NC		 2389{
2390 THUMB16_INSN (0x4778), /* bx pc */
2391 THUMB16_INSN (0x46c0), /* nop */
2392 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2393 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2394 ARM_INSN (0xe12fff1c), /* bx ip */
2395 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2396};
d3626fb0 2397
0855e32b
NS		 2398/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2399 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2400static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2401{
b38cadfb
NC		 2402 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2403 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2404 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
0855e32b
NS		 2405};
2406
2407/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2408 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2409static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2410{
b38cadfb
NC		 2411 THUMB16_INSN (0x4778), /* bx pc */
2412 THUMB16_INSN (0x46c0), /* nop */
2413 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2414 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2415 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
0855e32b
NS		 2416};
2417
7a89b94e
NC		 2418/* NaCl ARM -> ARM long branch stub. */
2419static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2420{
2421 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2422 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2423 ARM_INSN (0xe12fff1c), /* bx ip */
2424 ARM_INSN (0xe320f000), /* nop */
2425 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2426 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2427 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2428 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2429};
2430
2431/* NaCl ARM -> ARM long branch stub, PIC. */
2432static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2433{
2434 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2435 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2436 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2437 ARM_INSN (0xe12fff1c), /* bx ip */
2438 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2439 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2440 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2441 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2442};
2443
2444
48229727
JB		 2445/* Cortex-A8 erratum-workaround stubs. */
2446
2447/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2448 can't use a conditional branch to reach this stub). */
2449
2450static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
b38cadfb
NC		 2451{
2452 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2453 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2454 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2455};
48229727
JB		 2456
2457/* Stub used for b.w and bl.w instructions. */
2458
2459static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
b38cadfb
NC		 2460{
2461 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2462};
48229727
JB		 2463
2464static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
b38cadfb
NC		 2465{
2466 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2467};
48229727
JB		 2468
2469/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2470 instruction (which switches to ARM mode) to point to this stub. Jump to the
2471 real destination using an ARM-mode branch. */
2472
2473static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
b38cadfb
NC		 2474{
2475 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2476};
48229727 2477
9553db3c
NC		 2478/* For each section group there can be a specially created linker section
2479 to hold the stubs for that group. The name of the stub section is based
2480 upon the name of another section within that group with the suffix below
2481 applied.
2482
2483 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2484 create what appeared to be a linker stub section when it actually
2485 contained user code/data. For example, consider this fragment:
b38cadfb 2486
9553db3c
NC		 2487 const char * stubborn_problems[] = { "np" };
2488
2489 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2490 section called:
2491
2492 .data.rel.local.stubborn_problems
2493
2494 This then causes problems in arm32_arm_build_stubs() as it triggers:
2495
2496 // Ignore non-stub sections.
2497 if (!strstr (stub_sec->name, STUB_SUFFIX))
2498 continue;
2499
2500 And so the section would be ignored instead of being processed. Hence
2501 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2502 C identifier. */
2503#define STUB_SUFFIX ".__stub"
906e58ca 2504
738a79f6
CL		 2505/* One entry per long/short branch stub defined above. */
2506#define DEF_STUBS \
2507 DEF_STUB(long_branch_any_any) \
2508 DEF_STUB(long_branch_v4t_arm_thumb) \
2509 DEF_STUB(long_branch_thumb_only) \
2510 DEF_STUB(long_branch_v4t_thumb_thumb) \
2511 DEF_STUB(long_branch_v4t_thumb_arm) \
2512 DEF_STUB(short_branch_v4t_thumb_arm) \
2513 DEF_STUB(long_branch_any_arm_pic) \
2514 DEF_STUB(long_branch_any_thumb_pic) \
2515 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2516 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2517 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2518 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2519 DEF_STUB(long_branch_any_tls_pic) \
2520 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
7a89b94e
NC		 2521 DEF_STUB(long_branch_arm_nacl) \
2522 DEF_STUB(long_branch_arm_nacl_pic) \
48229727
JB		 2523 DEF_STUB(a8_veneer_b_cond) \
2524 DEF_STUB(a8_veneer_b) \
2525 DEF_STUB(a8_veneer_bl) \
2526 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2527
2528#define DEF_STUB(x) arm_stub_##x,
b38cadfb
NC		 2529enum elf32_arm_stub_type
2530{
906e58ca 2531 arm_stub_none,
738a79f6 2532 DEF_STUBS
eb7c4339
NS		 2533 /* Note the first a8_veneer type */
2534 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2535};
2536#undef DEF_STUB
2537
2538typedef struct
2539{
d3ce72d0 2540 const insn_sequence* template_sequence;
738a79f6
CL		 2541 int template_size;
2542} stub_def;
2543
2544#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
b38cadfb
NC		 2545static const stub_def stub_definitions[] =
2546{
738a79f6
CL		 2547 {NULL, 0},
2548 DEF_STUBS
906e58ca
NC		 2549};
2550
2551struct elf32_arm_stub_hash_entry
2552{
2553 /* Base hash table entry structure. */
2554 struct bfd_hash_entry root;
2555
2556 /* The stub section. */
2557 asection *stub_sec;
2558
2559 /* Offset within stub_sec of the beginning of this stub. */
2560 bfd_vma stub_offset;
2561
2562 /* Given the symbol's value and its section we can determine its final
2563 value when building the stubs (so the stub knows where to jump). */
2564 bfd_vma target_value;
2565 asection *target_section;
2566
48229727
JB		 2567 /* Offset to apply to relocation referencing target_value. */
2568 bfd_vma target_addend;
2569
2570 /* The instruction which caused this stub to be generated (only valid for
2571 Cortex-A8 erratum workaround stubs at present). */
2572 unsigned long orig_insn;
2573
461a49ca 2574 /* The stub type. */
906e58ca 2575 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2576 /* Its encoding size in bytes. */
2577 int stub_size;
2578 /* Its template. */
2579 const insn_sequence *stub_template;
2580 /* The size of the template (number of entries). */
2581 int stub_template_size;
906e58ca
NC		 2582
2583 /* The symbol table entry, if any, that this was derived from. */
2584 struct elf32_arm_link_hash_entry *h;
2585
35fc36a8
RS		 2586 /* Type of branch. */
2587 enum arm_st_branch_type branch_type;
906e58ca
NC		 2588
2589 /* Where this stub is being called from, or, in the case of combined
2590 stub sections, the first input section in the group. */
2591 asection *id_sec;
7413f23f
DJ		 2592
2593 /* The name for the local symbol at the start of this stub. The
2594 stub name in the hash table has to be unique; this does not, so
2595 it can be friendlier. */
2596 char *output_name;
906e58ca
NC		 2597};
2598
e489d0ae
PB		 2599/* Used to build a map of a section. This is required for mixed-endian
2600 code/data. */
2601
2602typedef struct elf32_elf_section_map
2603{
2604 bfd_vma vma;
2605 char type;
2606}
2607elf32_arm_section_map;
2608
c7b8f16e
JB		 2609/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2610
2611typedef enum
2612{
2613 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2614 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2615 VFP11_ERRATUM_ARM_VENEER,
2616 VFP11_ERRATUM_THUMB_VENEER
2617}
2618elf32_vfp11_erratum_type;
2619
2620typedef struct elf32_vfp11_erratum_list
2621{
2622 struct elf32_vfp11_erratum_list *next;
2623 bfd_vma vma;
2624 union
2625 {
2626 struct
2627 {
2628 struct elf32_vfp11_erratum_list *veneer;
2629 unsigned int vfp_insn;
2630 } b;
2631 struct
2632 {
2633 struct elf32_vfp11_erratum_list *branch;
2634 unsigned int id;
2635 } v;
2636 } u;
2637 elf32_vfp11_erratum_type type;
2638}
2639elf32_vfp11_erratum_list;
2640
2468f9c9
PB		 2641typedef enum
2642{
2643 DELETE_EXIDX_ENTRY,
2644 INSERT_EXIDX_CANTUNWIND_AT_END
2645}
2646arm_unwind_edit_type;
2647
2648/* A (sorted) list of edits to apply to an unwind table. */
2649typedef struct arm_unwind_table_edit
2650{
2651 arm_unwind_edit_type type;
2652 /* Note: we sometimes want to insert an unwind entry corresponding to a
2653 section different from the one we're currently writing out, so record the
2654 (text) section this edit relates to here. */
2655 asection *linked_section;
2656 unsigned int index;
2657 struct arm_unwind_table_edit *next;
2658}
2659arm_unwind_table_edit;
2660
8e3de13a 2661typedef struct _arm_elf_section_data
e489d0ae 2662{
2468f9c9 2663 /* Information about mapping symbols. */
e489d0ae 2664 struct bfd_elf_section_data elf;
8e3de13a 2665 unsigned int mapcount;
c7b8f16e 2666 unsigned int mapsize;
e489d0ae 2667 elf32_arm_section_map *map;
2468f9c9 2668 /* Information about CPU errata. */
c7b8f16e
JB		 2669 unsigned int erratumcount;
2670 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2671 /* Information about unwind tables. */
2672 union
2673 {
2674 /* Unwind info attached to a text section. */
2675 struct
2676 {
2677 asection *arm_exidx_sec;
2678 } text;
2679
2680 /* Unwind info attached to an .ARM.exidx section. */
2681 struct
2682 {
2683 arm_unwind_table_edit *unwind_edit_list;
2684 arm_unwind_table_edit *unwind_edit_tail;
2685 } exidx;
2686 } u;
8e3de13a
NC		 2687}
2688_arm_elf_section_data;
e489d0ae
PB		 2689
2690#define elf32_arm_section_data(sec) \
8e3de13a 2691 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2692
48229727
JB		 2693/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2694 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2695 so may be created multiple times: we use an array of these entries whilst
2696 relaxing which we can refresh easily, then create stubs for each potentially
2697 erratum-triggering instruction once we've settled on a solution. */
2698
b38cadfb
NC		 2699struct a8_erratum_fix
2700{
48229727
JB		 2701 bfd *input_bfd;
2702 asection *section;
2703 bfd_vma offset;
2704 bfd_vma addend;
2705 unsigned long orig_insn;
2706 char *stub_name;
2707 enum elf32_arm_stub_type stub_type;
35fc36a8 2708 enum arm_st_branch_type branch_type;
48229727
JB		 2709};
2710
2711/* A table of relocs applied to branches which might trigger Cortex-A8
2712 erratum. */
2713
b38cadfb
NC		 2714struct a8_erratum_reloc
2715{
48229727
JB		 2716 bfd_vma from;
2717 bfd_vma destination;
92750f34
DJ		 2718 struct elf32_arm_link_hash_entry *hash;
2719 const char *sym_name;
48229727 2720 unsigned int r_type;
35fc36a8 2721 enum arm_st_branch_type branch_type;
48229727
JB		 2722 bfd_boolean non_a8_stub;
2723};
2724
ba93b8ac
DJ		 2725/* The size of the thread control block. */
2726#define TCB_SIZE 8
2727
34e77a92
RS		 2728/* ARM-specific information about a PLT entry, over and above the usual
2729 gotplt_union. */
b38cadfb
NC		 2730struct arm_plt_info
2731{
34e77a92
RS		 2732 /* We reference count Thumb references to a PLT entry separately,
2733 so that we can emit the Thumb trampoline only if needed. */
2734 bfd_signed_vma thumb_refcount;
2735
2736 /* Some references from Thumb code may be eliminated by BL->BLX
2737 conversion, so record them separately. */
2738 bfd_signed_vma maybe_thumb_refcount;
2739
2740 /* How many of the recorded PLT accesses were from non-call relocations.
2741 This information is useful when deciding whether anything takes the
2742 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2743 non-call references to the function should resolve directly to the
2744 real runtime target. */
2745 unsigned int noncall_refcount;
2746
2747 /* Since PLT entries have variable size if the Thumb prologue is
2748 used, we need to record the index into .got.plt instead of
2749 recomputing it from the PLT offset. */
2750 bfd_signed_vma got_offset;
2751};
2752
2753/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
b38cadfb
NC		 2754struct arm_local_iplt_info
2755{
34e77a92
RS		 2756 /* The information that is usually found in the generic ELF part of
2757 the hash table entry. */
2758 union gotplt_union root;
2759
2760 /* The information that is usually found in the ARM-specific part of
2761 the hash table entry. */
2762 struct arm_plt_info arm;
2763
2764 /* A list of all potential dynamic relocations against this symbol. */
2765 struct elf_dyn_relocs *dyn_relocs;
2766};
2767
0ffa91dd 2768struct elf_arm_obj_tdata
ba93b8ac
DJ		 2769{
2770 struct elf_obj_tdata root;
2771
2772 /* tls_type for each local got entry. */
2773 char *local_got_tls_type;
ee065d83 2774
0855e32b
NS		 2775 /* GOTPLT entries for TLS descriptors. */
2776 bfd_vma *local_tlsdesc_gotent;
2777
34e77a92
RS		 2778 /* Information for local symbols that need entries in .iplt. */
2779 struct arm_local_iplt_info **local_iplt;
2780
bf21ed78
MS		 2781 /* Zero to warn when linking objects with incompatible enum sizes. */
2782 int no_enum_size_warning;
a9dc9481
JM		 2783
2784 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2785 int no_wchar_size_warning;
ba93b8ac
DJ		 2786};
2787
0ffa91dd
NC		 2788#define elf_arm_tdata(bfd) \
2789 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2790
0ffa91dd
NC		 2791#define elf32_arm_local_got_tls_type(bfd) \
2792 (elf_arm_tdata (bfd)->local_got_tls_type)
2793
0855e32b
NS		 2794#define elf32_arm_local_tlsdesc_gotent(bfd) \
2795 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2796
34e77a92
RS		 2797#define elf32_arm_local_iplt(bfd) \
2798 (elf_arm_tdata (bfd)->local_iplt)
2799
0ffa91dd
NC		 2800#define is_arm_elf(bfd) \
2801 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2802 && elf_tdata (bfd) != NULL \
4dfe6ac6 2803 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2804
2805static bfd_boolean
2806elf32_arm_mkobject (bfd *abfd)
2807{
0ffa91dd 2808 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2809 ARM_ELF_DATA);
ba93b8ac
DJ		 2810}
2811
ba93b8ac
DJ		 2812#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2813
ba96a88f 2814/* Arm ELF linker hash entry. */
252b5132 2815struct elf32_arm_link_hash_entry
b38cadfb
NC		 2816{
2817 struct elf_link_hash_entry root;
252b5132 2818
b38cadfb
NC		 2819 /* Track dynamic relocs copied for this symbol. */
2820 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2821
b38cadfb
NC		 2822 /* ARM-specific PLT information. */
2823 struct arm_plt_info plt;
ba93b8ac
DJ		 2824
2825#define GOT_UNKNOWN 0
2826#define GOT_NORMAL 1
2827#define GOT_TLS_GD 2
2828#define GOT_TLS_IE 4
0855e32b
NS		 2829#define GOT_TLS_GDESC 8
2830#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
b38cadfb 2831 unsigned int tls_type : 8;
34e77a92 2832
b38cadfb
NC		 2833 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2834 unsigned int is_iplt : 1;
34e77a92 2835
b38cadfb 2836 unsigned int unused : 23;
a4fd1a8e 2837
b38cadfb
NC		 2838 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2839 starting at the end of the jump table. */
2840 bfd_vma tlsdesc_got;
0855e32b 2841
b38cadfb
NC		 2842 /* The symbol marking the real symbol location for exported thumb
2843 symbols with Arm stubs. */
2844 struct elf_link_hash_entry *export_glue;
906e58ca 2845
b38cadfb 2846 /* A pointer to the most recently used stub hash entry against this
8029a119 2847 symbol. */
b38cadfb
NC		 2848 struct elf32_arm_stub_hash_entry *stub_cache;
2849};
252b5132 2850
252b5132 2851/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2852#define elf32_arm_link_hash_traverse(table, func, info) \
2853 (elf_link_hash_traverse \
2854 (&(table)->root, \
b7693d02 2855 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2856 (info)))
2857
2858/* Get the ARM elf linker hash table from a link_info structure. */
2859#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2860 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2861 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2862
906e58ca
NC		 2863#define arm_stub_hash_lookup(table, string, create, copy) \
2864 ((struct elf32_arm_stub_hash_entry *) \
2865 bfd_hash_lookup ((table), (string), (create), (copy)))
2866
21d799b5
NC		 2867/* Array to keep track of which stub sections have been created, and
2868 information on stub grouping. */
2869struct map_stub
2870{
2871 /* This is the section to which stubs in the group will be
2872 attached. */
2873 asection *link_sec;
2874 /* The stub section. */
2875 asection *stub_sec;
2876};
2877
0855e32b
NS		 2878#define elf32_arm_compute_jump_table_size(htab) \
2879 ((htab)->next_tls_desc_index * 4)
2880
9b485d32 2881/* ARM ELF linker hash table. */
252b5132 2882struct elf32_arm_link_hash_table
906e58ca
NC		 2883{
2884 /* The main hash table. */
2885 struct elf_link_hash_table root;
252b5132 2886
906e58ca
NC		 2887 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2888 bfd_size_type thumb_glue_size;
252b5132 2889
906e58ca
NC		 2890 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2891 bfd_size_type arm_glue_size;
252b5132 2892
906e58ca
NC		 2893 /* The size in bytes of section containing the ARMv4 BX veneers. */
2894 bfd_size_type bx_glue_size;
845b51d6 2895
906e58ca
NC		 2896 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2897 veneer has been populated. */
2898 bfd_vma bx_glue_offset[15];
845b51d6 2899
906e58ca
NC		 2900 /* The size in bytes of the section containing glue for VFP11 erratum
2901 veneers. */
2902 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2903
48229727
JB		 2904 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2905 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2906 elf32_arm_write_section(). */
2907 struct a8_erratum_fix *a8_erratum_fixes;
2908 unsigned int num_a8_erratum_fixes;
2909
906e58ca
NC		 2910 /* An arbitrary input BFD chosen to hold the glue sections. */
2911 bfd * bfd_of_glue_owner;
ba96a88f 2912
906e58ca
NC		 2913 /* Nonzero to output a BE8 image. */
2914 int byteswap_code;
e489d0ae 2915
906e58ca
NC		 2916 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2917 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2918 int target1_is_rel;
9c504268 2919
906e58ca
NC		 2920 /* The relocation to use for R_ARM_TARGET2 relocations. */
2921 int target2_reloc;
eb043451 2922
906e58ca
NC		 2923 /* 0 = Ignore R_ARM_V4BX.
2924 1 = Convert BX to MOV PC.
2925 2 = Generate v4 interworing stubs. */
2926 int fix_v4bx;
319850b4 2927
48229727
JB		 2928 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2929 int fix_cortex_a8;
2930
2de70689
MGD		 2931 /* Whether we should fix the ARM1176 BLX immediate issue. */
2932 int fix_arm1176;
2933
906e58ca
NC		 2934 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2935 int use_blx;
33bfe774 2936
906e58ca
NC		 2937 /* What sort of code sequences we should look for which may trigger the
2938 VFP11 denorm erratum. */
2939 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2940
906e58ca
NC		 2941 /* Global counter for the number of fixes we have emitted. */
2942 int num_vfp11_fixes;
c7b8f16e 2943
906e58ca
NC		 2944 /* Nonzero to force PIC branch veneers. */
2945 int pic_veneer;
27e55c4d 2946
906e58ca
NC		 2947 /* The number of bytes in the initial entry in the PLT. */
2948 bfd_size_type plt_header_size;
e5a52504 2949
906e58ca
NC		 2950 /* The number of bytes in the subsequent PLT etries. */
2951 bfd_size_type plt_entry_size;
e5a52504 2952
906e58ca
NC		 2953 /* True if the target system is VxWorks. */
2954 int vxworks_p;
00a97672 2955
906e58ca
NC		 2956 /* True if the target system is Symbian OS. */
2957 int symbian_p;
e5a52504 2958
b38cadfb
NC		 2959 /* True if the target system is Native Client. */
2960 int nacl_p;
2961
906e58ca
NC		 2962 /* True if the target uses REL relocations. */
2963 int use_rel;
4e7fd91e 2964
0855e32b
NS		 2965 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2966 bfd_vma next_tls_desc_index;
2967
2968 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2969 bfd_vma num_tls_desc;
2970
906e58ca 2971 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2972 asection *sdynbss;
2973 asection *srelbss;
5e681ec4 2974
906e58ca
NC		 2975 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2976 asection *srelplt2;
00a97672 2977
0855e32b
NS		 2978 /* The offset into splt of the PLT entry for the TLS descriptor
2979 resolver. Special values are 0, if not necessary (or not found
2980 to be necessary yet), and -1 if needed but not determined
2981 yet. */
2982 bfd_vma dt_tlsdesc_plt;
2983
2984 /* The offset into sgot of the GOT entry used by the PLT entry
2985 above. */
b38cadfb 2986 bfd_vma dt_tlsdesc_got;
0855e32b
NS		 2987
2988 /* Offset in .plt section of tls_arm_trampoline. */
2989 bfd_vma tls_trampoline;
2990
906e58ca
NC		 2991 /* Data for R_ARM_TLS_LDM32 relocations. */
2992 union
2993 {
2994 bfd_signed_vma refcount;
2995 bfd_vma offset;
2996 } tls_ldm_got;
b7693d02 2997
87d72d41
AM		 2998 /* Small local sym cache. */
2999 struct sym_cache sym_cache;
906e58ca
NC		 3000
3001 /* For convenience in allocate_dynrelocs. */
3002 bfd * obfd;
3003
0855e32b
NS		 3004 /* The amount of space used by the reserved portion of the sgotplt
3005 section, plus whatever space is used by the jump slots. */
3006 bfd_vma sgotplt_jump_table_size;
3007
906e58ca
NC		 3008 /* The stub hash table. */
3009 struct bfd_hash_table stub_hash_table;
3010
3011 /* Linker stub bfd. */
3012 bfd *stub_bfd;
3013
3014 /* Linker call-backs. */
7a89b94e 3015 asection * (*add_stub_section) (const char *, asection *, unsigned int);
906e58ca
NC		 3016 void (*layout_sections_again) (void);
3017
3018 /* Array to keep track of which stub sections have been created, and
3019 information on stub grouping. */
21d799b5 3020 struct map_stub *stub_group;
906e58ca 3021
fe33d2fa
CL		 3022 /* Number of elements in stub_group. */
3023 int top_id;
3024
906e58ca
NC		 3025 /* Assorted information used by elf32_arm_size_stubs. */
3026 unsigned int bfd_count;
3027 int top_index;
3028 asection **input_list;
3029};
252b5132 3030
780a67af
NC		 3031/* Create an entry in an ARM ELF linker hash table. */
3032
3033static struct bfd_hash_entry *
57e8b36a 3034elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
99059e56
RM		 3035 struct bfd_hash_table * table,
3036 const char * string)
780a67af
NC		 3037{
3038 struct elf32_arm_link_hash_entry * ret =
3039 (struct elf32_arm_link_hash_entry *) entry;
3040
3041 /* Allocate the structure if it has not already been allocated by a
3042 subclass. */
906e58ca 3043 if (ret == NULL)
21d799b5 3044 ret = (struct elf32_arm_link_hash_entry *)
99059e56 3045 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 3046 if (ret == NULL)
780a67af
NC		 3047 return (struct bfd_hash_entry *) ret;
3048
3049 /* Call the allocation method of the superclass. */
3050 ret = ((struct elf32_arm_link_hash_entry *)
3051 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3052 table, string));
57e8b36a 3053 if (ret != NULL)
b7693d02 3054 {
0bdcacaf 3055 ret->dyn_relocs = NULL;
ba93b8ac 3056 ret->tls_type = GOT_UNKNOWN;
0855e32b 3057 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 3058 ret->plt.thumb_refcount = 0;
3059 ret->plt.maybe_thumb_refcount = 0;
3060 ret->plt.noncall_refcount = 0;
3061 ret->plt.got_offset = -1;
3062 ret->is_iplt = FALSE;
a4fd1a8e 3063 ret->export_glue = NULL;
906e58ca
NC		 3064
3065 ret->stub_cache = NULL;
b7693d02 3066 }
780a67af
NC		 3067
3068 return (struct bfd_hash_entry *) ret;
3069}
3070
34e77a92
RS		 3071/* Ensure that we have allocated bookkeeping structures for ABFD's local
3072 symbols. */
3073
3074static bfd_boolean
3075elf32_arm_allocate_local_sym_info (bfd *abfd)
3076{
3077 if (elf_local_got_refcounts (abfd) == NULL)
3078 {
3079 bfd_size_type num_syms;
3080 bfd_size_type size;
3081 char *data;
3082
3083 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3084 size = num_syms * (sizeof (bfd_signed_vma)
3085 + sizeof (struct arm_local_iplt_info *)
3086 + sizeof (bfd_vma)
3087 + sizeof (char));
3088 data = bfd_zalloc (abfd, size);
3089 if (data == NULL)
3090 return FALSE;
3091
3092 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3093 data += num_syms * sizeof (bfd_signed_vma);
3094
3095 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3096 data += num_syms * sizeof (struct arm_local_iplt_info *);
3097
3098 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3099 data += num_syms * sizeof (bfd_vma);
3100
3101 elf32_arm_local_got_tls_type (abfd) = data;
3102 }
3103 return TRUE;
3104}
3105
3106/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3107 to input bfd ABFD. Create the information if it doesn't already exist.
3108 Return null if an allocation fails. */
3109
3110static struct arm_local_iplt_info *
3111elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3112{
3113 struct arm_local_iplt_info **ptr;
3114
3115 if (!elf32_arm_allocate_local_sym_info (abfd))
3116 return NULL;
3117
3118 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3119 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3120 if (*ptr == NULL)
3121 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3122 return *ptr;
3123}
3124
3125/* Try to obtain PLT information for the symbol with index R_SYMNDX
3126 in ABFD's symbol table. If the symbol is global, H points to its
3127 hash table entry, otherwise H is null.
3128
3129 Return true if the symbol does have PLT information. When returning
3130 true, point *ROOT_PLT at the target-independent reference count/offset
3131 union and *ARM_PLT at the ARM-specific information. */
3132
3133static bfd_boolean
3134elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3135 unsigned long r_symndx, union gotplt_union **root_plt,
3136 struct arm_plt_info **arm_plt)
3137{
3138 struct arm_local_iplt_info *local_iplt;
3139
3140 if (h != NULL)
3141 {
3142 *root_plt = &h->root.plt;
3143 *arm_plt = &h->plt;
3144 return TRUE;
3145 }
3146
3147 if (elf32_arm_local_iplt (abfd) == NULL)
3148 return FALSE;
3149
3150 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3151 if (local_iplt == NULL)
3152 return FALSE;
3153
3154 *root_plt = &local_iplt->root;
3155 *arm_plt = &local_iplt->arm;
3156 return TRUE;
3157}
3158
3159/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3160 before it. */
3161
3162static bfd_boolean
3163elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3164 struct arm_plt_info *arm_plt)
3165{
3166 struct elf32_arm_link_hash_table *htab;
3167
3168 htab = elf32_arm_hash_table (info);
3169 return (arm_plt->thumb_refcount != 0
3170 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3171}
3172
3173/* Return a pointer to the head of the dynamic reloc list that should
3174 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3175 ABFD's symbol table. Return null if an error occurs. */
3176
3177static struct elf_dyn_relocs **
3178elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3179 Elf_Internal_Sym *isym)
3180{
3181 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3182 {
3183 struct arm_local_iplt_info *local_iplt;
3184
3185 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3186 if (local_iplt == NULL)
3187 return NULL;
3188 return &local_iplt->dyn_relocs;
3189 }
3190 else
3191 {
3192 /* Track dynamic relocs needed for local syms too.
3193 We really need local syms available to do this
3194 easily. Oh well. */
3195 asection *s;
3196 void *vpp;
3197
3198 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3199 if (s == NULL)
3200 abort ();
3201
3202 vpp = &elf_section_data (s)->local_dynrel;
3203 return (struct elf_dyn_relocs **) vpp;
3204 }
3205}
3206
906e58ca
NC		 3207/* Initialize an entry in the stub hash table. */
3208
3209static struct bfd_hash_entry *
3210stub_hash_newfunc (struct bfd_hash_entry *entry,
3211 struct bfd_hash_table *table,
3212 const char *string)
3213{
3214 /* Allocate the structure if it has not already been allocated by a
3215 subclass. */
3216 if (entry == NULL)
3217 {
21d799b5 3218 entry = (struct bfd_hash_entry *)
99059e56 3219 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3220 if (entry == NULL)
3221 return entry;
3222 }
3223
3224 /* Call the allocation method of the superclass. */
3225 entry = bfd_hash_newfunc (entry, table, string);
3226 if (entry != NULL)
3227 {
3228 struct elf32_arm_stub_hash_entry *eh;
3229
3230 /* Initialize the local fields. */
3231 eh = (struct elf32_arm_stub_hash_entry *) entry;
3232 eh->stub_sec = NULL;
3233 eh->stub_offset = 0;
3234 eh->target_value = 0;
3235 eh->target_section = NULL;
cedfb179
DK		 3236 eh->target_addend = 0;
3237 eh->orig_insn = 0;
906e58ca 3238 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3239 eh->stub_size = 0;
3240 eh->stub_template = NULL;
3241 eh->stub_template_size = 0;
906e58ca
NC		 3242 eh->h = NULL;
3243 eh->id_sec = NULL;
d8d2f433 3244 eh->output_name = NULL;
906e58ca
NC		 3245 }
3246
3247 return entry;
3248}
3249
00a97672 3250/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3251 shortcuts to them in our hash table. */
3252
3253static bfd_boolean
57e8b36a 3254create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3255{
3256 struct elf32_arm_link_hash_table *htab;
3257
e5a52504 3258 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3259 if (htab == NULL)
3260 return FALSE;
3261
e5a52504
MM		 3262 /* BPABI objects never have a GOT, or associated sections. */
3263 if (htab->symbian_p)
3264 return TRUE;
3265
5e681ec4
PB		 3266 if (! _bfd_elf_create_got_section (dynobj, info))
3267 return FALSE;
3268
5e681ec4
PB		 3269 return TRUE;
3270}
3271
34e77a92
RS		 3272/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3273
3274static bfd_boolean
3275create_ifunc_sections (struct bfd_link_info *info)
3276{
3277 struct elf32_arm_link_hash_table *htab;
3278 const struct elf_backend_data *bed;
3279 bfd *dynobj;
3280 asection *s;
3281 flagword flags;
b38cadfb 3282
34e77a92
RS		 3283 htab = elf32_arm_hash_table (info);
3284 dynobj = htab->root.dynobj;
3285 bed = get_elf_backend_data (dynobj);
3286 flags = bed->dynamic_sec_flags;
3287
3288 if (htab->root.iplt == NULL)
3289 {
3d4d4302
AM		 3290 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3291 flags | SEC_READONLY | SEC_CODE);
34e77a92 3292 if (s == NULL
a0f49396 3293 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
34e77a92
RS		 3294 return FALSE;
3295 htab->root.iplt = s;
3296 }
3297
3298 if (htab->root.irelplt == NULL)
3299 {
3d4d4302
AM		 3300 s = bfd_make_section_anyway_with_flags (dynobj,
3301 RELOC_SECTION (htab, ".iplt"),
3302 flags | SEC_READONLY);
34e77a92 3303 if (s == NULL
a0f49396 3304 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
34e77a92
RS		 3305 return FALSE;
3306 htab->root.irelplt = s;
3307 }
3308
3309 if (htab->root.igotplt == NULL)
3310 {
3d4d4302 3311 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
34e77a92
RS		 3312 if (s == NULL
3313 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3314 return FALSE;
3315 htab->root.igotplt = s;
3316 }
3317 return TRUE;
3318}
3319
00a97672
RS		 3320/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3321 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3322 hash table. */
3323
3324static bfd_boolean
57e8b36a 3325elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3326{
3327 struct elf32_arm_link_hash_table *htab;
3328
3329 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3330 if (htab == NULL)
3331 return FALSE;
3332
362d30a1 3333 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3334 return FALSE;
3335
3336 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3337 return FALSE;
3338
3d4d4302 3339 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
5e681ec4 3340 if (!info->shared)
3d4d4302
AM		 3341 htab->srelbss = bfd_get_linker_section (dynobj,
3342 RELOC_SECTION (htab, ".bss"));
00a97672
RS		 3343
3344 if (htab->vxworks_p)
3345 {
3346 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3347 return FALSE;
3348
3349 if (info->shared)
3350 {
3351 htab->plt_header_size = 0;
3352 htab->plt_entry_size
3353 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3354 }
3355 else
3356 {
3357 htab->plt_header_size
3358 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3359 htab->plt_entry_size
3360 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3361 }
3362 }
5e681ec4 3363
362d30a1
RS		 3364 if (!htab->root.splt
3365 || !htab->root.srelplt
e5a52504 3366 || !htab->sdynbss
5e681ec4
PB		 3367 || (!info->shared && !htab->srelbss))
3368 abort ();
3369
3370 return TRUE;
3371}
3372
906e58ca
NC		 3373/* Copy the extra info we tack onto an elf_link_hash_entry. */
3374
3375static void
3376elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3377 struct elf_link_hash_entry *dir,
3378 struct elf_link_hash_entry *ind)
3379{
3380 struct elf32_arm_link_hash_entry *edir, *eind;
3381
3382 edir = (struct elf32_arm_link_hash_entry *) dir;
3383 eind = (struct elf32_arm_link_hash_entry *) ind;
3384
0bdcacaf 3385 if (eind->dyn_relocs != NULL)
906e58ca 3386 {
0bdcacaf 3387 if (edir->dyn_relocs != NULL)
906e58ca 3388 {
0bdcacaf
RS		 3389 struct elf_dyn_relocs **pp;
3390 struct elf_dyn_relocs *p;
906e58ca
NC		 3391
3392 /* Add reloc counts against the indirect sym to the direct sym
3393 list. Merge any entries against the same section. */
0bdcacaf 3394 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3395 {
0bdcacaf 3396 struct elf_dyn_relocs *q;
906e58ca 3397
0bdcacaf
RS		 3398 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3399 if (q->sec == p->sec)
906e58ca
NC		 3400 {
3401 q->pc_count += p->pc_count;
3402 q->count += p->count;
3403 *pp = p->next;
3404 break;
3405 }
3406 if (q == NULL)
3407 pp = &p->next;
3408 }
0bdcacaf 3409 *pp = edir->dyn_relocs;
906e58ca
NC		 3410 }
3411
0bdcacaf
RS		 3412 edir->dyn_relocs = eind->dyn_relocs;
3413 eind->dyn_relocs = NULL;
906e58ca
NC		 3414 }
3415
3416 if (ind->root.type == bfd_link_hash_indirect)
3417 {
3418 /* Copy over PLT info. */
34e77a92
RS		 3419 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3420 eind->plt.thumb_refcount = 0;
3421 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3422 eind->plt.maybe_thumb_refcount = 0;
3423 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3424 eind->plt.noncall_refcount = 0;
3425
3426 /* We should only allocate a function to .iplt once the final
3427 symbol information is known. */
3428 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3429
3430 if (dir->got.refcount <= 0)
3431 {
3432 edir->tls_type = eind->tls_type;
3433 eind->tls_type = GOT_UNKNOWN;
3434 }
3435 }
3436
3437 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3438}
3439
3440/* Create an ARM elf linker hash table. */
3441
3442static struct bfd_link_hash_table *
3443elf32_arm_link_hash_table_create (bfd *abfd)
3444{
3445 struct elf32_arm_link_hash_table *ret;
3446 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3447
7bf52ea2 3448 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
906e58ca
NC		 3449 if (ret == NULL)
3450 return NULL;
3451
3452 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3453 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3454 sizeof (struct elf32_arm_link_hash_entry),
3455 ARM_ELF_DATA))
906e58ca
NC		 3456 {
3457 free (ret);
3458 return NULL;
3459 }
3460
906e58ca 3461 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
906e58ca
NC		 3462#ifdef FOUR_WORD_PLT
3463 ret->plt_header_size = 16;
3464 ret->plt_entry_size = 16;
3465#else
3466 ret->plt_header_size = 20;
3467 ret->plt_entry_size = 12;
3468#endif
906e58ca 3469 ret->use_rel = 1;
906e58ca 3470 ret->obfd = abfd;
906e58ca
NC		 3471
3472 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3473 sizeof (struct elf32_arm_stub_hash_entry)))
3474 {
3475 free (ret);
3476 return NULL;
3477 }
3478
3479 return &ret->root.root;
3480}
3481
3482/* Free the derived linker hash table. */
3483
3484static void
3485elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3486{
3487 struct elf32_arm_link_hash_table *ret
3488 = (struct elf32_arm_link_hash_table *) hash;
3489
3490 bfd_hash_table_free (&ret->stub_hash_table);
9f7c3e5e 3491 _bfd_elf_link_hash_table_free (hash);
906e58ca
NC		 3492}
3493
3494/* Determine if we're dealing with a Thumb only architecture. */
3495
3496static bfd_boolean
3497using_thumb_only (struct elf32_arm_link_hash_table *globals)
3498{
3499 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3500 Tag_CPU_arch);
3501 int profile;
3502
41ed1ee7
DJ		 3503 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3504 return TRUE;
3505
9e3c6df6 3506 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3507 return FALSE;
3508
3509 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3510 Tag_CPU_arch_profile);
3511
3512 return profile == 'M';
3513}
3514
3515/* Determine if we're dealing with a Thumb-2 object. */
3516
3517static bfd_boolean
3518using_thumb2 (struct elf32_arm_link_hash_table *globals)
3519{
3520 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3521 Tag_CPU_arch);
3522 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3523}
3524
cd1dac3d
DG		 3525/* Determine what kind of NOPs are available. */
3526
3527static bfd_boolean
3528arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3529{
3530 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3531 Tag_CPU_arch);
3532 return arch == TAG_CPU_ARCH_V6T2
3533 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3534 || arch == TAG_CPU_ARCH_V7
3535 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3536}
3537
3538static bfd_boolean
3539arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3540{
3541 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3542 Tag_CPU_arch);
9e3c6df6
PB		 3543 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3544 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3545}
3546
f4ac8484
DJ		 3547static bfd_boolean
3548arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3549{
3550 switch (stub_type)
3551 {
fea2b4d6
CL		 3552 case arm_stub_long_branch_thumb_only:
3553 case arm_stub_long_branch_v4t_thumb_arm:
3554 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3555 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3556 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3557 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3558 return TRUE;
3559 case arm_stub_none:
3560 BFD_FAIL ();
3561 return FALSE;
3562 break;
3563 default:
3564 return FALSE;
3565 }
3566}
3567
906e58ca
NC		 3568/* Determine the type of stub needed, if any, for a call. */
3569
3570static enum elf32_arm_stub_type
3571arm_type_of_stub (struct bfd_link_info *info,
3572 asection *input_sec,
3573 const Elf_Internal_Rela *rel,
34e77a92 3574 unsigned char st_type,
35fc36a8 3575 enum arm_st_branch_type *actual_branch_type,
906e58ca 3576 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3577 bfd_vma destination,
3578 asection *sym_sec,
3579 bfd *input_bfd,
3580 const char *name)
906e58ca
NC		 3581{
3582 bfd_vma location;
3583 bfd_signed_vma branch_offset;
3584 unsigned int r_type;
3585 struct elf32_arm_link_hash_table * globals;
3586 int thumb2;
3587 int thumb_only;
3588 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3589 int use_plt = 0;
35fc36a8 3590 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3591 union gotplt_union *root_plt;
3592 struct arm_plt_info *arm_plt;
906e58ca 3593
35fc36a8 3594 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3595 return stub_type;
3596
906e58ca 3597 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3598 if (globals == NULL)
3599 return stub_type;
906e58ca
NC		 3600
3601 thumb_only = using_thumb_only (globals);
3602
3603 thumb2 = using_thumb2 (globals);
3604
3605 /* Determine where the call point is. */
3606 location = (input_sec->output_offset
3607 + input_sec->output_section->vma
3608 + rel->r_offset);
3609
906e58ca
NC		 3610 r_type = ELF32_R_TYPE (rel->r_info);
3611
39f21624
NC		 3612 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3613 are considering a function call relocation. */
3614 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
3615 && branch_type == ST_BRANCH_TO_ARM)
3616 branch_type = ST_BRANCH_TO_THUMB;
3617
34e77a92
RS		 3618 /* For TLS call relocs, it is the caller's responsibility to provide
3619 the address of the appropriate trampoline. */
3620 if (r_type != R_ARM_TLS_CALL
3621 && r_type != R_ARM_THM_TLS_CALL
3622 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3623 &root_plt, &arm_plt)
3624 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3625 {
34e77a92 3626 asection *splt;
fe33d2fa 3627
34e77a92
RS		 3628 if (hash == NULL || hash->is_iplt)
3629 splt = globals->root.iplt;
3630 else
3631 splt = globals->root.splt;
3632 if (splt != NULL)
b38cadfb 3633 {
34e77a92
RS		 3634 use_plt = 1;
3635
3636 /* Note when dealing with PLT entries: the main PLT stub is in
3637 ARM mode, so if the branch is in Thumb mode, another
3638 Thumb->ARM stub will be inserted later just before the ARM
3639 PLT stub. We don't take this extra distance into account
3640 here, because if a long branch stub is needed, we'll add a
3641 Thumb->Arm one and branch directly to the ARM PLT entry
3642 because it avoids spreading offset corrections in several
3643 places. */
3644
3645 destination = (splt->output_section->vma
3646 + splt->output_offset
3647 + root_plt->offset);
3648 st_type = STT_FUNC;
3649 branch_type = ST_BRANCH_TO_ARM;
3650 }
5fa9e92f 3651 }
34e77a92
RS		 3652 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3653 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3654
fe33d2fa
CL		 3655 branch_offset = (bfd_signed_vma)(destination - location);
3656
0855e32b
NS		 3657 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3658 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3659 {
5fa9e92f
CL		 3660 /* Handle cases where:
3661 - this call goes too far (different Thumb/Thumb2 max
99059e56 3662 distance)
155d87d7 3663 - it's a Thumb->Arm call and blx is not available, or it's a
99059e56
RM		 3664 Thumb->Arm branch (not bl). A stub is needed in this case,
3665 but only if this call is not through a PLT entry. Indeed,
3666 PLT stubs handle mode switching already.
5fa9e92f 3667 */
906e58ca
NC		 3668 if ((!thumb2
3669 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3670 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3671 || (thumb2
3672 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3673 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3674 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3675 && (((r_type == R_ARM_THM_CALL
3676 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3677 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3678 && !use_plt))
906e58ca 3679 {
35fc36a8 3680 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3681 {
3682 /* Thumb to thumb. */
3683 if (!thumb_only)
3684 {
3685 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3686 /* PIC stubs. */
155d87d7 3687 ? ((globals->use_blx
9553db3c 3688 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3689 /* V5T and above. Stub starts with ARM code, so
3690 we must be able to switch mode before
3691 reaching it, which is only possible for 'bl'
3692 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3693 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3694 /* On V4T, use Thumb code only. */
d3626fb0 3695 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3696
3697 /* non-PIC stubs. */
155d87d7 3698 : ((globals->use_blx
9553db3c 3699 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3700 /* V5T and above. */
3701 ? arm_stub_long_branch_any_any
3702 /* V4T. */
d3626fb0 3703 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3704 }
3705 else
3706 {
3707 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3708 /* PIC stub. */
3709 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3710 /* non-PIC stub. */
3711 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3712 }
3713 }
3714 else
3715 {
3716 /* Thumb to arm. */
c820be07
NC		 3717 if (sym_sec != NULL
3718 && sym_sec->owner != NULL
3719 && !INTERWORK_FLAG (sym_sec->owner))
3720 {
3721 (*_bfd_error_handler)
3722 (_("%B(%s): warning: interworking not enabled.\n"
3723 " first occurrence: %B: Thumb call to ARM"),
3724 sym_sec->owner, input_bfd, name);
3725 }
3726
0855e32b
NS		 3727 stub_type =
3728 (info->shared | globals->pic_veneer)
c2b4a39d 3729 /* PIC stubs. */
0855e32b
NS		 3730 ? (r_type == R_ARM_THM_TLS_CALL
3731 /* TLS PIC stubs */
3732 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3733 : arm_stub_long_branch_v4t_thumb_tls_pic)
3734 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3735 /* V5T PIC and above. */
3736 ? arm_stub_long_branch_any_arm_pic
3737 /* V4T PIC stub. */
3738 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3739
3740 /* non-PIC stubs. */
0855e32b 3741 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3742 /* V5T and above. */
3743 ? arm_stub_long_branch_any_any
3744 /* V4T. */
3745 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3746
3747 /* Handle v4t short branches. */
fea2b4d6 3748 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3749 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3750 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3751 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3752 }
3753 }
3754 }
fe33d2fa
CL		 3755 else if (r_type == R_ARM_CALL
3756 || r_type == R_ARM_JUMP24
0855e32b
NS		 3757 || r_type == R_ARM_PLT32
3758 || r_type == R_ARM_TLS_CALL)
906e58ca 3759 {
35fc36a8 3760 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3761 {
3762 /* Arm to thumb. */
c820be07
NC		 3763
3764 if (sym_sec != NULL
3765 && sym_sec->owner != NULL
3766 && !INTERWORK_FLAG (sym_sec->owner))
3767 {
3768 (*_bfd_error_handler)
3769 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3770 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3771 sym_sec->owner, input_bfd, name);
3772 }
3773
3774 /* We have an extra 2-bytes reach because of
3775 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3776 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3777 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3778 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3779 || (r_type == R_ARM_JUMP24)
3780 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3781 {
3782 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3783 /* PIC stubs. */
ebe24dd4
CL		 3784 ? ((globals->use_blx)
3785 /* V5T and above. */
3786 ? arm_stub_long_branch_any_thumb_pic
3787 /* V4T stub. */
3788 : arm_stub_long_branch_v4t_arm_thumb_pic)
3789
c2b4a39d
CL		 3790 /* non-PIC stubs. */
3791 : ((globals->use_blx)
3792 /* V5T and above. */
3793 ? arm_stub_long_branch_any_any
3794 /* V4T. */
3795 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3796 }
3797 }
3798 else
3799 {
3800 /* Arm to arm. */
3801 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3802 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3803 {
0855e32b
NS		 3804 stub_type =
3805 (info->shared | globals->pic_veneer)
c2b4a39d 3806 /* PIC stubs. */
0855e32b
NS		 3807 ? (r_type == R_ARM_TLS_CALL
3808 /* TLS PIC Stub */
3809 ? arm_stub_long_branch_any_tls_pic
7a89b94e
NC		 3810 : (globals->nacl_p
3811 ? arm_stub_long_branch_arm_nacl_pic
3812 : arm_stub_long_branch_any_arm_pic))
c2b4a39d 3813 /* non-PIC stubs. */
7a89b94e
NC		 3814 : (globals->nacl_p
3815 ? arm_stub_long_branch_arm_nacl
3816 : arm_stub_long_branch_any_any);
906e58ca
NC		 3817 }
3818 }
3819 }
3820
fe33d2fa
CL		 3821 /* If a stub is needed, record the actual destination type. */
3822 if (stub_type != arm_stub_none)
35fc36a8 3823 *actual_branch_type = branch_type;
fe33d2fa 3824
906e58ca
NC		 3825 return stub_type;
3826}
3827
3828/* Build a name for an entry in the stub hash table. */
3829
3830static char *
3831elf32_arm_stub_name (const asection *input_section,
3832 const asection *sym_sec,
3833 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3834 const Elf_Internal_Rela *rel,
3835 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3836{
3837 char *stub_name;
3838 bfd_size_type len;
3839
3840 if (hash)
3841 {
fe33d2fa 3842 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3843 stub_name = (char *) bfd_malloc (len);
906e58ca 3844 if (stub_name != NULL)
fe33d2fa 3845 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3846 input_section->id & 0xffffffff,
3847 hash->root.root.root.string,
fe33d2fa
CL		 3848 (int) rel->r_addend & 0xffffffff,
3849 (int) stub_type);
906e58ca
NC		 3850 }
3851 else
3852 {
fe33d2fa 3853 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3854 stub_name = (char *) bfd_malloc (len);
906e58ca 3855 if (stub_name != NULL)
fe33d2fa 3856 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3857 input_section->id & 0xffffffff,
3858 sym_sec->id & 0xffffffff,
0855e32b
NS		 3859 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3860 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3861 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3862 (int) rel->r_addend & 0xffffffff,
3863 (int) stub_type);
906e58ca
NC		 3864 }
3865
3866 return stub_name;
3867}
3868
3869/* Look up an entry in the stub hash. Stub entries are cached because
3870 creating the stub name takes a bit of time. */
3871
3872static struct elf32_arm_stub_hash_entry *
3873elf32_arm_get_stub_entry (const asection *input_section,
3874 const asection *sym_sec,
3875 struct elf_link_hash_entry *hash,
3876 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3877 struct elf32_arm_link_hash_table *htab,
3878 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3879{
3880 struct elf32_arm_stub_hash_entry *stub_entry;
3881 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3882 const asection *id_sec;
3883
3884 if ((input_section->flags & SEC_CODE) == 0)
3885 return NULL;
3886
3887 /* If this input section is part of a group of sections sharing one
3888 stub section, then use the id of the first section in the group.
3889 Stub names need to include a section id, as there may well be
3890 more than one stub used to reach say, printf, and we need to
3891 distinguish between them. */
3892 id_sec = htab->stub_group[input_section->id].link_sec;
3893
3894 if (h != NULL && h->stub_cache != NULL
3895 && h->stub_cache->h == h
fe33d2fa
CL		 3896 && h->stub_cache->id_sec == id_sec
3897 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3898 {
3899 stub_entry = h->stub_cache;
3900 }
3901 else
3902 {
3903 char *stub_name;
3904
fe33d2fa 3905 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3906 if (stub_name == NULL)
3907 return NULL;
3908
3909 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3910 stub_name, FALSE, FALSE);
3911 if (h != NULL)
3912 h->stub_cache = stub_entry;
3913
3914 free (stub_name);
3915 }
3916
3917 return stub_entry;
3918}
3919
48229727 3920/* Find or create a stub section. Returns a pointer to the stub section, and
b38cadfb 3921 the section to which the stub section will be attached (in *LINK_SEC_P).
48229727 3922 LINK_SEC_P may be NULL. */
906e58ca 3923
48229727
JB		 3924static asection *
3925elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3926 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3927{
3928 asection *link_sec;
3929 asection *stub_sec;
906e58ca
NC		 3930
3931 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3932 BFD_ASSERT (link_sec != NULL);
906e58ca 3933 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3934
906e58ca
NC		 3935 if (stub_sec == NULL)
3936 {
3937 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3938 if (stub_sec == NULL)
3939 {
3940 size_t namelen;
3941 bfd_size_type len;
3942 char *s_name;
3943
3944 namelen = strlen (link_sec->name);
3945 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3946 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3947 if (s_name == NULL)
3948 return NULL;
3949
3950 memcpy (s_name, link_sec->name, namelen);
3951 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
7a89b94e
NC		 3952 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
3953 htab->nacl_p ? 4 : 3);
906e58ca
NC		 3954 if (stub_sec == NULL)
3955 return NULL;
3956 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3957 }
3958 htab->stub_group[section->id].stub_sec = stub_sec;
3959 }
b38cadfb 3960
48229727
JB		 3961 if (link_sec_p)
3962 *link_sec_p = link_sec;
b38cadfb 3963
48229727
JB		 3964 return stub_sec;
3965}
3966
3967/* Add a new stub entry to the stub hash. Not all fields of the new
3968 stub entry are initialised. */
3969
3970static struct elf32_arm_stub_hash_entry *
3971elf32_arm_add_stub (const char *stub_name,
3972 asection *section,
3973 struct elf32_arm_link_hash_table *htab)
3974{
3975 asection *link_sec;
3976 asection *stub_sec;
3977 struct elf32_arm_stub_hash_entry *stub_entry;
3978
3979 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3980 if (stub_sec == NULL)
3981 return NULL;
906e58ca
NC		 3982
3983 /* Enter this entry into the linker stub hash table. */
3984 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3985 TRUE, FALSE);
3986 if (stub_entry == NULL)
3987 {
3988 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3989 section->owner,
3990 stub_name);
3991 return NULL;
3992 }
3993
3994 stub_entry->stub_sec = stub_sec;
3995 stub_entry->stub_offset = 0;
3996 stub_entry->id_sec = link_sec;
3997
906e58ca
NC		 3998 return stub_entry;
3999}
4000
4001/* Store an Arm insn into an output section not processed by
4002 elf32_arm_write_section. */
4003
4004static void
8029a119
NC		 4005put_arm_insn (struct elf32_arm_link_hash_table * htab,
4006 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4007{
4008 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4009 bfd_putl32 (val, ptr);
4010 else
4011 bfd_putb32 (val, ptr);
4012}
4013
4014/* Store a 16-bit Thumb insn into an output section not processed by
4015 elf32_arm_write_section. */
4016
4017static void
8029a119
NC		 4018put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4019 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4020{
4021 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4022 bfd_putl16 (val, ptr);
4023 else
4024 bfd_putb16 (val, ptr);
4025}
4026
0855e32b
NS		 4027/* If it's possible to change R_TYPE to a more efficient access
4028 model, return the new reloc type. */
4029
4030static unsigned
b38cadfb 4031elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
0855e32b
NS		 4032 struct elf_link_hash_entry *h)
4033{
4034 int is_local = (h == NULL);
4035
4036 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4037 return r_type;
4038
b38cadfb 4039 /* We do not support relaxations for Old TLS models. */
0855e32b
NS		 4040 switch (r_type)
4041 {
4042 case R_ARM_TLS_GOTDESC:
4043 case R_ARM_TLS_CALL:
4044 case R_ARM_THM_TLS_CALL:
4045 case R_ARM_TLS_DESCSEQ:
4046 case R_ARM_THM_TLS_DESCSEQ:
4047 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4048 }
4049
4050 return r_type;
4051}
4052
48229727
JB		 4053static bfd_reloc_status_type elf32_arm_final_link_relocate
4054 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4055 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 4056 const char *, unsigned char, enum arm_st_branch_type,
4057 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 4058
4563a860
JB		 4059static unsigned int
4060arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4061{
4062 switch (stub_type)
4063 {
4064 case arm_stub_a8_veneer_b_cond:
4065 case arm_stub_a8_veneer_b:
4066 case arm_stub_a8_veneer_bl:
4067 return 2;
4068
4069 case arm_stub_long_branch_any_any:
4070 case arm_stub_long_branch_v4t_arm_thumb:
4071 case arm_stub_long_branch_thumb_only:
4072 case arm_stub_long_branch_v4t_thumb_thumb:
4073 case arm_stub_long_branch_v4t_thumb_arm:
4074 case arm_stub_short_branch_v4t_thumb_arm:
4075 case arm_stub_long_branch_any_arm_pic:
4076 case arm_stub_long_branch_any_thumb_pic:
4077 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4078 case arm_stub_long_branch_v4t_arm_thumb_pic:
4079 case arm_stub_long_branch_v4t_thumb_arm_pic:
4080 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 4081 case arm_stub_long_branch_any_tls_pic:
4082 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 4083 case arm_stub_a8_veneer_blx:
4084 return 4;
b38cadfb 4085
7a89b94e
NC		 4086 case arm_stub_long_branch_arm_nacl:
4087 case arm_stub_long_branch_arm_nacl_pic:
4088 return 16;
4089
4563a860
JB		 4090 default:
4091 abort (); /* Should be unreachable. */
4092 }
4093}
4094
906e58ca
NC		 4095static bfd_boolean
4096arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4097 void * in_arg)
4098{
7a89b94e 4099#define MAXRELOCS 3
906e58ca 4100 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 4101 struct elf32_arm_link_hash_table *globals;
906e58ca 4102 struct bfd_link_info *info;
906e58ca
NC		 4103 asection *stub_sec;
4104 bfd *stub_bfd;
906e58ca
NC		 4105 bfd_byte *loc;
4106 bfd_vma sym_value;
4107 int template_size;
4108 int size;
d3ce72d0 4109 const insn_sequence *template_sequence;
906e58ca 4110 int i;
48229727
JB		 4111 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4112 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4113 int nrelocs = 0;
906e58ca
NC		 4114
4115 /* Massage our args to the form they really have. */
4116 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4117 info = (struct bfd_link_info *) in_arg;
4118
4119 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4120 if (globals == NULL)
4121 return FALSE;
906e58ca 4122
906e58ca
NC		 4123 stub_sec = stub_entry->stub_sec;
4124
4dfe6ac6 4125 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4126 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4127 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4128 return TRUE;
fe33d2fa 4129
906e58ca
NC		 4130 /* Make a note of the offset within the stubs for this entry. */
4131 stub_entry->stub_offset = stub_sec->size;
4132 loc = stub_sec->contents + stub_entry->stub_offset;
4133
4134 stub_bfd = stub_sec->owner;
4135
906e58ca
NC		 4136 /* This is the address of the stub destination. */
4137 sym_value = (stub_entry->target_value
4138 + stub_entry->target_section->output_offset
4139 + stub_entry->target_section->output_section->vma);
4140
d3ce72d0 4141 template_sequence = stub_entry->stub_template;
461a49ca 4142 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4143
4144 size = 0;
461a49ca 4145 for (i = 0; i < template_size; i++)
906e58ca 4146 {
d3ce72d0 4147 switch (template_sequence[i].type)
461a49ca
DJ		 4148 {
4149 case THUMB16_TYPE:
48229727 4150 {
d3ce72d0
NC		 4151 bfd_vma data = (bfd_vma) template_sequence[i].data;
4152 if (template_sequence[i].reloc_addend != 0)
48229727 4153 {
99059e56
RM		 4154 /* We've borrowed the reloc_addend field to mean we should
4155 insert a condition code into this (Thumb-1 branch)
4156 instruction. See THUMB16_BCOND_INSN. */
4157 BFD_ASSERT ((data & 0xff00) == 0xd000);
4158 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
48229727 4159 }
fe33d2fa 4160 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4161 size += 2;
4162 }
461a49ca 4163 break;
906e58ca 4164
48229727 4165 case THUMB32_TYPE:
fe33d2fa
CL		 4166 bfd_put_16 (stub_bfd,
4167 (template_sequence[i].data >> 16) & 0xffff,
4168 loc + size);
4169 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4170 loc + size + 2);
99059e56
RM		 4171 if (template_sequence[i].r_type != R_ARM_NONE)
4172 {
4173 stub_reloc_idx[nrelocs] = i;
4174 stub_reloc_offset[nrelocs++] = size;
4175 }
4176 size += 4;
4177 break;
48229727 4178
461a49ca 4179 case ARM_TYPE:
fe33d2fa
CL		 4180 bfd_put_32 (stub_bfd, template_sequence[i].data,
4181 loc + size);
461a49ca
DJ		 4182 /* Handle cases where the target is encoded within the
4183 instruction. */
d3ce72d0 4184 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4185 {
48229727
JB		 4186 stub_reloc_idx[nrelocs] = i;
4187 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4188 }
4189 size += 4;
4190 break;
4191
4192 case DATA_TYPE:
d3ce72d0 4193 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4194 stub_reloc_idx[nrelocs] = i;
4195 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4196 size += 4;
4197 break;
4198
4199 default:
4200 BFD_FAIL ();
4201 return FALSE;
4202 }
906e58ca 4203 }
461a49ca 4204
906e58ca
NC		 4205 stub_sec->size += size;
4206
461a49ca
DJ		 4207 /* Stub size has already been computed in arm_size_one_stub. Check
4208 consistency. */
4209 BFD_ASSERT (size == stub_entry->stub_size);
4210
906e58ca 4211 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4212 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4213 sym_value |= 1;
4214
48229727
JB		 4215 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4216 in each stub. */
4217 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4218
48229727 4219 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4220 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4221 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4222 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4223 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4224 {
4225 Elf_Internal_Rela rel;
4226 bfd_boolean unresolved_reloc;
4227 char *error_message;
35fc36a8
RS		 4228 enum arm_st_branch_type branch_type
4229 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4230 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4231 bfd_vma points_to = sym_value + stub_entry->target_addend;
4232
4233 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0 4234 rel.r_info = ELF32_R_INFO (0,
99059e56 4235 template_sequence[stub_reloc_idx[i]].r_type);
d3ce72d0 4236 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4237
4238 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4239 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4240 template should refer back to the instruction after the original
4241 branch. */
4242 points_to = sym_value;
4243
33c6a8fc
JB		 4244 /* There may be unintended consequences if this is not true. */
4245 BFD_ASSERT (stub_entry->h == NULL);
4246
48229727
JB		 4247 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4248 properly. We should probably use this function unconditionally,
4249 rather than only for certain relocations listed in the enclosing
4250 conditional, for the sake of consistency. */
4251 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4252 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4253 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4254 points_to, info, stub_entry->target_section, "", STT_FUNC,
4255 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4256 &unresolved_reloc, &error_message);
48229727
JB		 4257 }
4258 else
4259 {
fe33d2fa
CL		 4260 Elf_Internal_Rela rel;
4261 bfd_boolean unresolved_reloc;
4262 char *error_message;
4263 bfd_vma points_to = sym_value + stub_entry->target_addend
4264 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4265
4266 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4267 rel.r_info = ELF32_R_INFO (0,
99059e56 4268 template_sequence[stub_reloc_idx[i]].r_type);
fe33d2fa
CL		 4269 rel.r_addend = 0;
4270
4271 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4272 (template_sequence[stub_reloc_idx[i]].r_type),
4273 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4274 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4275 stub_entry->branch_type,
fe33d2fa
CL		 4276 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4277 &error_message);
48229727 4278 }
906e58ca
NC		 4279
4280 return TRUE;
48229727 4281#undef MAXRELOCS
906e58ca
NC		 4282}
4283
48229727
JB		 4284/* Calculate the template, template size and instruction size for a stub.
4285 Return value is the instruction size. */
906e58ca 4286
48229727
JB		 4287static unsigned int
4288find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4289 const insn_sequence **stub_template,
4290 int *stub_template_size)
906e58ca 4291{
d3ce72d0 4292 const insn_sequence *template_sequence = NULL;
48229727
JB		 4293 int template_size = 0, i;
4294 unsigned int size;
906e58ca 4295
d3ce72d0 4296 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4297 if (stub_template)
4298 *stub_template = template_sequence;
4299
48229727 4300 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4301 if (stub_template_size)
4302 *stub_template_size = template_size;
906e58ca
NC		 4303
4304 size = 0;
461a49ca
DJ		 4305 for (i = 0; i < template_size; i++)
4306 {
d3ce72d0 4307 switch (template_sequence[i].type)
461a49ca
DJ		 4308 {
4309 case THUMB16_TYPE:
4310 size += 2;
4311 break;
4312
4313 case ARM_TYPE:
48229727 4314 case THUMB32_TYPE:
461a49ca
DJ		 4315 case DATA_TYPE:
4316 size += 4;
4317 break;
4318
4319 default:
4320 BFD_FAIL ();
2a229407 4321 return 0;
461a49ca
DJ		 4322 }
4323 }
4324
48229727
JB		 4325 return size;
4326}
4327
4328/* As above, but don't actually build the stub. Just bump offset so
4329 we know stub section sizes. */
4330
4331static bfd_boolean
4332arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4333 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4334{
4335 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4336 const insn_sequence *template_sequence;
48229727
JB		 4337 int template_size, size;
4338
4339 /* Massage our args to the form they really have. */
4340 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4341
4342 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4343 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4344
d3ce72d0 4345 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4346 &template_size);
4347
461a49ca 4348 stub_entry->stub_size = size;
d3ce72d0 4349 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4350 stub_entry->stub_template_size = template_size;
4351
906e58ca
NC		 4352 size = (size + 7) & ~7;
4353 stub_entry->stub_sec->size += size;
461a49ca 4354
906e58ca
NC		 4355 return TRUE;
4356}
4357
4358/* External entry points for sizing and building linker stubs. */
4359
4360/* Set up various things so that we can make a list of input sections
4361 for each output section included in the link. Returns -1 on error,
4362 0 when no stubs will be needed, and 1 on success. */
4363
4364int
4365elf32_arm_setup_section_lists (bfd *output_bfd,
4366 struct bfd_link_info *info)
4367{
4368 bfd *input_bfd;
4369 unsigned int bfd_count;
4370 int top_id, top_index;
4371 asection *section;
4372 asection **input_list, **list;
4373 bfd_size_type amt;
4374 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4375
4dfe6ac6
NC		 4376 if (htab == NULL)
4377 return 0;
906e58ca
NC		 4378 if (! is_elf_hash_table (htab))
4379 return 0;
4380
4381 /* Count the number of input BFDs and find the top input section id. */
4382 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4383 input_bfd != NULL;
4384 input_bfd = input_bfd->link_next)
4385 {
4386 bfd_count += 1;
4387 for (section = input_bfd->sections;
4388 section != NULL;
4389 section = section->next)
4390 {
4391 if (top_id < section->id)
4392 top_id = section->id;
4393 }
4394 }
4395 htab->bfd_count = bfd_count;
4396
4397 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4398 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4399 if (htab->stub_group == NULL)
4400 return -1;
fe33d2fa 4401 htab->top_id = top_id;
906e58ca
NC		 4402
4403 /* We can't use output_bfd->section_count here to find the top output
4404 section index as some sections may have been removed, and
4405 _bfd_strip_section_from_output doesn't renumber the indices. */
4406 for (section = output_bfd->sections, top_index = 0;
4407 section != NULL;
4408 section = section->next)
4409 {
4410 if (top_index < section->index)
4411 top_index = section->index;
4412 }
4413
4414 htab->top_index = top_index;
4415 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4416 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4417 htab->input_list = input_list;
4418 if (input_list == NULL)
4419 return -1;
4420
4421 /* For sections we aren't interested in, mark their entries with a
4422 value we can check later. */
4423 list = input_list + top_index;
4424 do
4425 *list = bfd_abs_section_ptr;
4426 while (list-- != input_list);
4427
4428 for (section = output_bfd->sections;
4429 section != NULL;
4430 section = section->next)
4431 {
4432 if ((section->flags & SEC_CODE) != 0)
4433 input_list[section->index] = NULL;
4434 }
4435
4436 return 1;
4437}
4438
4439/* The linker repeatedly calls this function for each input section,
4440 in the order that input sections are linked into output sections.
4441 Build lists of input sections to determine groupings between which
4442 we may insert linker stubs. */
4443
4444void
4445elf32_arm_next_input_section (struct bfd_link_info *info,
4446 asection *isec)
4447{
4448 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4449
4dfe6ac6
NC		 4450 if (htab == NULL)
4451 return;
4452
906e58ca
NC		 4453 if (isec->output_section->index <= htab->top_index)
4454 {
4455 asection **list = htab->input_list + isec->output_section->index;
4456
a7470592 4457 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4458 {
4459 /* Steal the link_sec pointer for our list. */
4460#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4461 /* This happens to make the list in reverse order,
07d72278 4462 which we reverse later. */
906e58ca
NC		 4463 PREV_SEC (isec) = *list;
4464 *list = isec;
4465 }
4466 }
4467}
4468
4469/* See whether we can group stub sections together. Grouping stub
4470 sections may result in fewer stubs. More importantly, we need to
07d72278 4471 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4472 .fini output sections respectively, because glibc splits the
4473 _init and _fini functions into multiple parts. Putting a stub in
4474 the middle of a function is not a good idea. */
4475
4476static void
4477group_sections (struct elf32_arm_link_hash_table *htab,
4478 bfd_size_type stub_group_size,
07d72278 4479 bfd_boolean stubs_always_after_branch)
906e58ca 4480{
07d72278 4481 asection **list = htab->input_list;
906e58ca
NC		 4482
4483 do
4484 {
4485 asection *tail = *list;
07d72278 4486 asection *head;
906e58ca
NC		 4487
4488 if (tail == bfd_abs_section_ptr)
4489 continue;
4490
07d72278
DJ		 4491 /* Reverse the list: we must avoid placing stubs at the
4492 beginning of the section because the beginning of the text
4493 section may be required for an interrupt vector in bare metal
4494 code. */
4495#define NEXT_SEC PREV_SEC
e780aef2
CL		 4496 head = NULL;
4497 while (tail != NULL)
99059e56
RM		 4498 {
4499 /* Pop from tail. */
4500 asection *item = tail;
4501 tail = PREV_SEC (item);
e780aef2 4502
99059e56
RM		 4503 /* Push on head. */
4504 NEXT_SEC (item) = head;
4505 head = item;
4506 }
07d72278
DJ		 4507
4508 while (head != NULL)
906e58ca
NC		 4509 {
4510 asection *curr;
07d72278 4511 asection *next;
e780aef2
CL		 4512 bfd_vma stub_group_start = head->output_offset;
4513 bfd_vma end_of_next;
906e58ca 4514
07d72278 4515 curr = head;
e780aef2 4516 while (NEXT_SEC (curr) != NULL)
8cd931b7 4517 {
e780aef2
CL		 4518 next = NEXT_SEC (curr);
4519 end_of_next = next->output_offset + next->size;
4520 if (end_of_next - stub_group_start >= stub_group_size)
4521 /* End of NEXT is too far from start, so stop. */
8cd931b7 4522 break;
e780aef2
CL		 4523 /* Add NEXT to the group. */
4524 curr = next;
8cd931b7 4525 }
906e58ca 4526
07d72278 4527 /* OK, the size from the start to the start of CURR is less
906e58ca 4528 than stub_group_size and thus can be handled by one stub
07d72278 4529 section. (Or the head section is itself larger than
906e58ca
NC		 4530 stub_group_size, in which case we may be toast.)
4531 We should really be keeping track of the total size of
4532 stubs added here, as stubs contribute to the final output
7fb9f789 4533 section size. */
906e58ca
NC		 4534 do
4535 {
07d72278 4536 next = NEXT_SEC (head);
906e58ca 4537 /* Set up this stub group. */
07d72278 4538 htab->stub_group[head->id].link_sec = curr;
906e58ca 4539 }
07d72278 4540 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4541
4542 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4543 bytes after the stub section can be handled by it too. */
4544 if (!stubs_always_after_branch)
906e58ca 4545 {
e780aef2
CL		 4546 stub_group_start = curr->output_offset + curr->size;
4547
8cd931b7 4548 while (next != NULL)
906e58ca 4549 {
e780aef2
CL		 4550 end_of_next = next->output_offset + next->size;
4551 if (end_of_next - stub_group_start >= stub_group_size)
4552 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4553 break;
e780aef2 4554 /* Add NEXT to the stub group. */
07d72278
DJ		 4555 head = next;
4556 next = NEXT_SEC (head);
4557 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4558 }
4559 }
07d72278 4560 head = next;
906e58ca
NC		 4561 }
4562 }
07d72278 4563 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4564
4565 free (htab->input_list);
4566#undef PREV_SEC
07d72278 4567#undef NEXT_SEC
906e58ca
NC		 4568}
4569
48229727
JB		 4570/* Comparison function for sorting/searching relocations relating to Cortex-A8
4571 erratum fix. */
4572
4573static int
4574a8_reloc_compare (const void *a, const void *b)
4575{
21d799b5
NC		 4576 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4577 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4578
4579 if (ra->from < rb->from)
4580 return -1;
4581 else if (ra->from > rb->from)
4582 return 1;
4583 else
4584 return 0;
4585}
4586
4587static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4588 const char *, char **);
4589
4590/* Helper function to scan code for sequences which might trigger the Cortex-A8
4591 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4592 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4593 otherwise. */
4594
81694485
NC		 4595static bfd_boolean
4596cortex_a8_erratum_scan (bfd *input_bfd,
4597 struct bfd_link_info *info,
48229727
JB		 4598 struct a8_erratum_fix **a8_fixes_p,
4599 unsigned int *num_a8_fixes_p,
4600 unsigned int *a8_fix_table_size_p,
4601 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4602 unsigned int num_a8_relocs,
4603 unsigned prev_num_a8_fixes,
4604 bfd_boolean *stub_changed_p)
48229727
JB		 4605{
4606 asection *section;
4607 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4608 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4609 unsigned int num_a8_fixes = *num_a8_fixes_p;
4610 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4611
4dfe6ac6
NC		 4612 if (htab == NULL)
4613 return FALSE;
4614
48229727
JB		 4615 for (section = input_bfd->sections;
4616 section != NULL;
4617 section = section->next)
4618 {
4619 bfd_byte *contents = NULL;
4620 struct _arm_elf_section_data *sec_data;
4621 unsigned int span;
4622 bfd_vma base_vma;
4623
4624 if (elf_section_type (section) != SHT_PROGBITS
99059e56
RM		 4625 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4626 || (section->flags & SEC_EXCLUDE) != 0
4627 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4628 || (section->output_section == bfd_abs_section_ptr))
4629 continue;
48229727
JB		 4630
4631 base_vma = section->output_section->vma + section->output_offset;
4632
4633 if (elf_section_data (section)->this_hdr.contents != NULL)
99059e56 4634 contents = elf_section_data (section)->this_hdr.contents;
48229727 4635 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
99059e56 4636 return TRUE;
48229727
JB		 4637
4638 sec_data = elf32_arm_section_data (section);
4639
4640 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 4641 {
4642 unsigned int span_start = sec_data->map[span].vma;
4643 unsigned int span_end = (span == sec_data->mapcount - 1)
4644 ? section->size : sec_data->map[span + 1].vma;
4645 unsigned int i;
4646 char span_type = sec_data->map[span].type;
4647 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4648
4649 if (span_type != 't')
4650 continue;
4651
4652 /* Span is entirely within a single 4KB region: skip scanning. */
4653 if (((base_vma + span_start) & ~0xfff)
48229727 4654 == ((base_vma + span_end) & ~0xfff))
99059e56
RM		 4655 continue;
4656
4657 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4658
4659 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4660 * The branch target is in the same 4KB region as the
4661 first half of the branch.
4662 * The instruction before the branch is a 32-bit
4663 length non-branch instruction. */
4664 for (i = span_start; i < span_end;)
4665 {
4666 unsigned int insn = bfd_getl16 (&contents[i]);
4667 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
48229727
JB		 4668 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4669
99059e56
RM		 4670 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4671 insn_32bit = TRUE;
48229727
JB		 4672
4673 if (insn_32bit)
99059e56
RM		 4674 {
4675 /* Load the rest of the insn (in manual-friendly order). */
4676 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4677
4678 /* Encoding T4: B<c>.W. */
4679 is_b = (insn & 0xf800d000) == 0xf0009000;
4680 /* Encoding T1: BL<c>.W. */
4681 is_bl = (insn & 0xf800d000) == 0xf000d000;
4682 /* Encoding T2: BLX<c>.W. */
4683 is_blx = (insn & 0xf800d000) == 0xf000c000;
48229727
JB		 4684 /* Encoding T3: B<c>.W (not permitted in IT block). */
4685 is_bcc = (insn & 0xf800d000) == 0xf0008000
4686 && (insn & 0x07f00000) != 0x03800000;
4687 }
4688
4689 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4690
99059e56 4691 if (((base_vma + i) & 0xfff) == 0xffe
81694485
NC		 4692 && insn_32bit
4693 && is_32bit_branch
4694 && last_was_32bit
4695 && ! last_was_branch)
99059e56
RM		 4696 {
4697 bfd_signed_vma offset = 0;
4698 bfd_boolean force_target_arm = FALSE;
48229727 4699 bfd_boolean force_target_thumb = FALSE;
99059e56
RM		 4700 bfd_vma target;
4701 enum elf32_arm_stub_type stub_type = arm_stub_none;
4702 struct a8_erratum_reloc key, *found;
4703 bfd_boolean use_plt = FALSE;
48229727 4704
99059e56
RM		 4705 key.from = base_vma + i;
4706 found = (struct a8_erratum_reloc *)
4707 bsearch (&key, a8_relocs, num_a8_relocs,
4708 sizeof (struct a8_erratum_reloc),
4709 &a8_reloc_compare);
48229727
JB		 4710
4711 if (found)
4712 {
4713 char *error_message = NULL;
4714 struct elf_link_hash_entry *entry;
4715
4716 /* We don't care about the error returned from this
99059e56 4717 function, only if there is glue or not. */
48229727
JB		 4718 entry = find_thumb_glue (info, found->sym_name,
4719 &error_message);
4720
4721 if (entry)
4722 found->non_a8_stub = TRUE;
4723
92750f34 4724 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4725 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4726 && found->hash->root.plt.offset != (bfd_vma) -1)
4727 use_plt = TRUE;
4728
4729 if (found->r_type == R_ARM_THM_CALL)
4730 {
35fc36a8
RS		 4731 if (found->branch_type == ST_BRANCH_TO_ARM
4732 || use_plt)
92750f34
DJ		 4733 force_target_arm = TRUE;
4734 else
4735 force_target_thumb = TRUE;
4736 }
48229727
JB		 4737 }
4738
99059e56 4739 /* Check if we have an offending branch instruction. */
48229727
JB		 4740
4741 if (found && found->non_a8_stub)
4742 /* We've already made a stub for this instruction, e.g.
4743 it's a long branch or a Thumb->ARM stub. Assume that
4744 stub will suffice to work around the A8 erratum (see
4745 setting of always_after_branch above). */
4746 ;
99059e56
RM		 4747 else if (is_bcc)
4748 {
4749 offset = (insn & 0x7ff) << 1;
4750 offset |= (insn & 0x3f0000) >> 4;
4751 offset |= (insn & 0x2000) ? 0x40000 : 0;
4752 offset |= (insn & 0x800) ? 0x80000 : 0;
4753 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4754 if (offset & 0x100000)
4755 offset |= ~ ((bfd_signed_vma) 0xfffff);
4756 stub_type = arm_stub_a8_veneer_b_cond;
4757 }
4758 else if (is_b || is_bl || is_blx)
4759 {
4760 int s = (insn & 0x4000000) != 0;
4761 int j1 = (insn & 0x2000) != 0;
4762 int j2 = (insn & 0x800) != 0;
4763 int i1 = !(j1 ^ s);
4764 int i2 = !(j2 ^ s);
4765
4766 offset = (insn & 0x7ff) << 1;
4767 offset |= (insn & 0x3ff0000) >> 4;
4768 offset |= i2 << 22;
4769 offset |= i1 << 23;
4770 offset |= s << 24;
4771 if (offset & 0x1000000)
4772 offset |= ~ ((bfd_signed_vma) 0xffffff);
4773
4774 if (is_blx)
4775 offset &= ~ ((bfd_signed_vma) 3);
4776
4777 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4778 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4779 }
4780
4781 if (stub_type != arm_stub_none)
4782 {
4783 bfd_vma pc_for_insn = base_vma + i + 4;
48229727
JB		 4784
4785 /* The original instruction is a BL, but the target is
99059e56 4786 an ARM instruction. If we were not making a stub,
48229727
JB		 4787 the BL would have been converted to a BLX. Use the
4788 BLX stub instead in that case. */
4789 if (htab->use_blx && force_target_arm
4790 && stub_type == arm_stub_a8_veneer_bl)
4791 {
4792 stub_type = arm_stub_a8_veneer_blx;
4793 is_blx = TRUE;
4794 is_bl = FALSE;
4795 }
4796 /* Conversely, if the original instruction was
4797 BLX but the target is Thumb mode, use the BL
4798 stub. */
4799 else if (force_target_thumb
4800 && stub_type == arm_stub_a8_veneer_blx)
4801 {
4802 stub_type = arm_stub_a8_veneer_bl;
4803 is_blx = FALSE;
4804 is_bl = TRUE;
4805 }
4806
99059e56
RM		 4807 if (is_blx)
4808 pc_for_insn &= ~ ((bfd_vma) 3);
48229727 4809
99059e56
RM		 4810 /* If we found a relocation, use the proper destination,
4811 not the offset in the (unrelocated) instruction.
48229727
JB		 4812 Note this is always done if we switched the stub type
4813 above. */
99059e56
RM		 4814 if (found)
4815 offset =
81694485 4816 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4817
99059e56
RM		 4818 /* If the stub will use a Thumb-mode branch to a
4819 PLT target, redirect it to the preceding Thumb
4820 entry point. */
4821 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4822 offset -= PLT_THUMB_STUB_SIZE;
7d24e6a6 4823
99059e56 4824 target = pc_for_insn + offset;
48229727 4825
99059e56
RM		 4826 /* The BLX stub is ARM-mode code. Adjust the offset to
4827 take the different PC value (+8 instead of +4) into
48229727 4828 account. */
99059e56
RM		 4829 if (stub_type == arm_stub_a8_veneer_blx)
4830 offset += 4;
4831
4832 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4833 {
4834 char *stub_name = NULL;
4835
4836 if (num_a8_fixes == a8_fix_table_size)
4837 {
4838 a8_fix_table_size *= 2;
4839 a8_fixes = (struct a8_erratum_fix *)
4840 bfd_realloc (a8_fixes,
4841 sizeof (struct a8_erratum_fix)
4842 * a8_fix_table_size);
4843 }
48229727 4844
eb7c4339
NS		 4845 if (num_a8_fixes < prev_num_a8_fixes)
4846 {
4847 /* If we're doing a subsequent scan,
4848 check if we've found the same fix as
4849 before, and try and reuse the stub
4850 name. */
4851 stub_name = a8_fixes[num_a8_fixes].stub_name;
4852 if ((a8_fixes[num_a8_fixes].section != section)
4853 || (a8_fixes[num_a8_fixes].offset != i))
4854 {
4855 free (stub_name);
4856 stub_name = NULL;
4857 *stub_changed_p = TRUE;
4858 }
4859 }
4860
4861 if (!stub_name)
4862 {
21d799b5 4863 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4864 if (stub_name != NULL)
4865 sprintf (stub_name, "%x:%x", section->id, i);
4866 }
48229727 4867
99059e56
RM		 4868 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4869 a8_fixes[num_a8_fixes].section = section;
4870 a8_fixes[num_a8_fixes].offset = i;
4871 a8_fixes[num_a8_fixes].addend = offset;
4872 a8_fixes[num_a8_fixes].orig_insn = insn;
4873 a8_fixes[num_a8_fixes].stub_name = stub_name;
4874 a8_fixes[num_a8_fixes].stub_type = stub_type;
4875 a8_fixes[num_a8_fixes].branch_type =
35fc36a8 4876 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727 4877
99059e56
RM		 4878 num_a8_fixes++;
4879 }
4880 }
4881 }
48229727 4882
99059e56
RM		 4883 i += insn_32bit ? 4 : 2;
4884 last_was_32bit = insn_32bit;
48229727 4885 last_was_branch = is_32bit_branch;
99059e56
RM		 4886 }
4887 }
48229727
JB		 4888
4889 if (elf_section_data (section)->this_hdr.contents == NULL)
99059e56 4890 free (contents);
48229727 4891 }
fe33d2fa 4892
48229727
JB		 4893 *a8_fixes_p = a8_fixes;
4894 *num_a8_fixes_p = num_a8_fixes;
4895 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4896
81694485 4897 return FALSE;
48229727
JB		 4898}
4899
906e58ca
NC		 4900/* Determine and set the size of the stub section for a final link.
4901
4902 The basic idea here is to examine all the relocations looking for
4903 PC-relative calls to a target that is unreachable with a "bl"
4904 instruction. */
4905
4906bfd_boolean
4907elf32_arm_size_stubs (bfd *output_bfd,
4908 bfd *stub_bfd,
4909 struct bfd_link_info *info,
4910 bfd_signed_vma group_size,
7a89b94e
NC		 4911 asection * (*add_stub_section) (const char *, asection *,
4912 unsigned int),
906e58ca
NC		 4913 void (*layout_sections_again) (void))
4914{
4915 bfd_size_type stub_group_size;
07d72278 4916 bfd_boolean stubs_always_after_branch;
906e58ca 4917 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4918 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4919 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4920 struct a8_erratum_reloc *a8_relocs = NULL;
4921 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4922
4dfe6ac6
NC		 4923 if (htab == NULL)
4924 return FALSE;
4925
48229727
JB		 4926 if (htab->fix_cortex_a8)
4927 {
21d799b5 4928 a8_fixes = (struct a8_erratum_fix *)
99059e56 4929 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
21d799b5 4930 a8_relocs = (struct a8_erratum_reloc *)
99059e56 4931 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4932 }
906e58ca
NC		 4933
4934 /* Propagate mach to stub bfd, because it may not have been
4935 finalized when we created stub_bfd. */
4936 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4937 bfd_get_mach (output_bfd));
4938
4939 /* Stash our params away. */
4940 htab->stub_bfd = stub_bfd;
4941 htab->add_stub_section = add_stub_section;
4942 htab->layout_sections_again = layout_sections_again;
07d72278 4943 stubs_always_after_branch = group_size < 0;
48229727
JB		 4944
4945 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4946 as the first half of a 32-bit branch straddling two 4K pages. This is a
4947 crude way of enforcing that. */
4948 if (htab->fix_cortex_a8)
4949 stubs_always_after_branch = 1;
4950
906e58ca
NC		 4951 if (group_size < 0)
4952 stub_group_size = -group_size;
4953 else
4954 stub_group_size = group_size;
4955
4956 if (stub_group_size == 1)
4957 {
4958 /* Default values. */
4959 /* Thumb branch range is +-4MB has to be used as the default
4960 maximum size (a given section can contain both ARM and Thumb
4961 code, so the worst case has to be taken into account).
4962
4963 This value is 24K less than that, which allows for 2025
4964 12-byte stubs. If we exceed that, then we will fail to link.
4965 The user will have to relink with an explicit group size
4966 option. */
4967 stub_group_size = 4170000;
4968 }
4969
07d72278 4970 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4971
3ae046cc
NS		 4972 /* If we're applying the cortex A8 fix, we need to determine the
4973 program header size now, because we cannot change it later --
4974 that could alter section placements. Notice the A8 erratum fix
4975 ends up requiring the section addresses to remain unchanged
4976 modulo the page size. That's something we cannot represent
4977 inside BFD, and we don't want to force the section alignment to
4978 be the page size. */
4979 if (htab->fix_cortex_a8)
4980 (*htab->layout_sections_again) ();
4981
906e58ca
NC		 4982 while (1)
4983 {
4984 bfd *input_bfd;
4985 unsigned int bfd_indx;
4986 asection *stub_sec;
eb7c4339
NS		 4987 bfd_boolean stub_changed = FALSE;
4988 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4989
48229727 4990 num_a8_fixes = 0;
906e58ca
NC		 4991 for (input_bfd = info->input_bfds, bfd_indx = 0;
4992 input_bfd != NULL;
4993 input_bfd = input_bfd->link_next, bfd_indx++)
4994 {
4995 Elf_Internal_Shdr *symtab_hdr;
4996 asection *section;
4997 Elf_Internal_Sym *local_syms = NULL;
4998
99059e56
RM		 4999 if (!is_arm_elf (input_bfd))
5000 continue;
adbcc655 5001
48229727
JB		 5002 num_a8_relocs = 0;
5003
906e58ca
NC		 5004 /* We'll need the symbol table in a second. */
5005 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5006 if (symtab_hdr->sh_info == 0)
5007 continue;
5008
5009 /* Walk over each section attached to the input bfd. */
5010 for (section = input_bfd->sections;
5011 section != NULL;
5012 section = section->next)
5013 {
5014 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5015
5016 /* If there aren't any relocs, then there's nothing more
5017 to do. */
5018 if ((section->flags & SEC_RELOC) == 0
5019 || section->reloc_count == 0
5020 || (section->flags & SEC_CODE) == 0)
5021 continue;
5022
5023 /* If this section is a link-once section that will be
5024 discarded, then don't create any stubs. */
5025 if (section->output_section == NULL
5026 || section->output_section->owner != output_bfd)
5027 continue;
5028
5029 /* Get the relocs. */
5030 internal_relocs
5031 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5032 NULL, info->keep_memory);
5033 if (internal_relocs == NULL)
5034 goto error_ret_free_local;
5035
5036 /* Now examine each relocation. */
5037 irela = internal_relocs;
5038 irelaend = irela + section->reloc_count;
5039 for (; irela < irelaend; irela++)
5040 {
5041 unsigned int r_type, r_indx;
5042 enum elf32_arm_stub_type stub_type;
5043 struct elf32_arm_stub_hash_entry *stub_entry;
5044 asection *sym_sec;
5045 bfd_vma sym_value;
5046 bfd_vma destination;
5047 struct elf32_arm_link_hash_entry *hash;
7413f23f 5048 const char *sym_name;
906e58ca
NC		 5049 char *stub_name;
5050 const asection *id_sec;
34e77a92 5051 unsigned char st_type;
35fc36a8 5052 enum arm_st_branch_type branch_type;
48229727 5053 bfd_boolean created_stub = FALSE;
906e58ca
NC		 5054
5055 r_type = ELF32_R_TYPE (irela->r_info);
5056 r_indx = ELF32_R_SYM (irela->r_info);
5057
5058 if (r_type >= (unsigned int) R_ARM_max)
5059 {
5060 bfd_set_error (bfd_error_bad_value);
5061 error_ret_free_internal:
5062 if (elf_section_data (section)->relocs == NULL)
5063 free (internal_relocs);
5064 goto error_ret_free_local;
5065 }
b38cadfb 5066
0855e32b
NS		 5067 hash = NULL;
5068 if (r_indx >= symtab_hdr->sh_info)
5069 hash = elf32_arm_hash_entry
5070 (elf_sym_hashes (input_bfd)
5071 [r_indx - symtab_hdr->sh_info]);
b38cadfb 5072
0855e32b
NS		 5073 /* Only look for stubs on branch instructions, or
5074 non-relaxed TLSCALL */
906e58ca 5075 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 5076 && (r_type != (unsigned int) R_ARM_THM_CALL)
5077 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 5078 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5079 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 5080 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 5081 && (r_type != (unsigned int) R_ARM_PLT32)
5082 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5083 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5084 && r_type == elf32_arm_tls_transition
5085 (info, r_type, &hash->root)
5086 && ((hash ? hash->tls_type
5087 : (elf32_arm_local_got_tls_type
5088 (input_bfd)[r_indx]))
5089 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 5090 continue;
5091
5092 /* Now determine the call target, its name, value,
5093 section. */
5094 sym_sec = NULL;
5095 sym_value = 0;
5096 destination = 0;
7413f23f 5097 sym_name = NULL;
b38cadfb 5098
0855e32b
NS		 5099 if (r_type == (unsigned int) R_ARM_TLS_CALL
5100 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5101 {
5102 /* A non-relaxed TLS call. The target is the
5103 plt-resident trampoline and nothing to do
5104 with the symbol. */
5105 BFD_ASSERT (htab->tls_trampoline > 0);
5106 sym_sec = htab->root.splt;
5107 sym_value = htab->tls_trampoline;
5108 hash = 0;
34e77a92 5109 st_type = STT_FUNC;
35fc36a8 5110 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 5111 }
5112 else if (!hash)
906e58ca
NC		 5113 {
5114 /* It's a local symbol. */
5115 Elf_Internal_Sym *sym;
906e58ca
NC		 5116
5117 if (local_syms == NULL)
5118 {
5119 local_syms
5120 = (Elf_Internal_Sym *) symtab_hdr->contents;
5121 if (local_syms == NULL)
5122 local_syms
5123 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5124 symtab_hdr->sh_info, 0,
5125 NULL, NULL, NULL);
5126 if (local_syms == NULL)
5127 goto error_ret_free_internal;
5128 }
5129
5130 sym = local_syms + r_indx;
f6d250ce
TS		 5131 if (sym->st_shndx == SHN_UNDEF)
5132 sym_sec = bfd_und_section_ptr;
5133 else if (sym->st_shndx == SHN_ABS)
5134 sym_sec = bfd_abs_section_ptr;
5135 else if (sym->st_shndx == SHN_COMMON)
5136 sym_sec = bfd_com_section_ptr;
5137 else
5138 sym_sec =
5139 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5140
ffcb4889
NS		 5141 if (!sym_sec)
5142 /* This is an undefined symbol. It can never
5143 be resolved. */
5144 continue;
fe33d2fa 5145
906e58ca
NC		 5146 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5147 sym_value = sym->st_value;
5148 destination = (sym_value + irela->r_addend
5149 + sym_sec->output_offset
5150 + sym_sec->output_section->vma);
34e77a92 5151 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5152 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5153 sym_name
5154 = bfd_elf_string_from_elf_section (input_bfd,
5155 symtab_hdr->sh_link,
5156 sym->st_name);
906e58ca
NC		 5157 }
5158 else
5159 {
5160 /* It's an external symbol. */
906e58ca
NC		 5161 while (hash->root.root.type == bfd_link_hash_indirect
5162 || hash->root.root.type == bfd_link_hash_warning)
5163 hash = ((struct elf32_arm_link_hash_entry *)
5164 hash->root.root.u.i.link);
5165
5166 if (hash->root.root.type == bfd_link_hash_defined
5167 || hash->root.root.type == bfd_link_hash_defweak)
5168 {
5169 sym_sec = hash->root.root.u.def.section;
5170 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5171
5172 struct elf32_arm_link_hash_table *globals =
5173 elf32_arm_hash_table (info);
5174
5175 /* For a destination in a shared library,
5176 use the PLT stub as target address to
5177 decide whether a branch stub is
5178 needed. */
4dfe6ac6 5179 if (globals != NULL
362d30a1 5180 && globals->root.splt != NULL
4dfe6ac6 5181 && hash != NULL
022f8312
CL		 5182 && hash->root.plt.offset != (bfd_vma) -1)
5183 {
362d30a1 5184 sym_sec = globals->root.splt;
022f8312
CL		 5185 sym_value = hash->root.plt.offset;
5186 if (sym_sec->output_section != NULL)
5187 destination = (sym_value
5188 + sym_sec->output_offset
5189 + sym_sec->output_section->vma);
5190 }
5191 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5192 destination = (sym_value + irela->r_addend
5193 + sym_sec->output_offset
5194 + sym_sec->output_section->vma);
5195 }
69c5861e
CL		 5196 else if ((hash->root.root.type == bfd_link_hash_undefined)
5197 || (hash->root.root.type == bfd_link_hash_undefweak))
5198 {
5199 /* For a shared library, use the PLT stub as
5200 target address to decide whether a long
5201 branch stub is needed.
5202 For absolute code, they cannot be handled. */
5203 struct elf32_arm_link_hash_table *globals =
5204 elf32_arm_hash_table (info);
5205
4dfe6ac6 5206 if (globals != NULL
362d30a1 5207 && globals->root.splt != NULL
4dfe6ac6 5208 && hash != NULL
69c5861e
CL		 5209 && hash->root.plt.offset != (bfd_vma) -1)
5210 {
362d30a1 5211 sym_sec = globals->root.splt;
69c5861e
CL		 5212 sym_value = hash->root.plt.offset;
5213 if (sym_sec->output_section != NULL)
5214 destination = (sym_value
5215 + sym_sec->output_offset
5216 + sym_sec->output_section->vma);
5217 }
5218 else
5219 continue;
5220 }
906e58ca
NC		 5221 else
5222 {
5223 bfd_set_error (bfd_error_bad_value);
5224 goto error_ret_free_internal;
5225 }
34e77a92 5226 st_type = hash->root.type;
35fc36a8 5227 branch_type = hash->root.target_internal;
7413f23f 5228 sym_name = hash->root.root.root.string;
906e58ca
NC		 5229 }
5230
48229727 5231 do
7413f23f 5232 {
48229727
JB		 5233 /* Determine what (if any) linker stub is needed. */
5234 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5235 st_type, &branch_type,
5236 hash, destination, sym_sec,
48229727
JB		 5237 input_bfd, sym_name);
5238 if (stub_type == arm_stub_none)
5239 break;
5240
5241 /* Support for grouping stub sections. */
5242 id_sec = htab->stub_group[section->id].link_sec;
5243
5244 /* Get the name of this stub. */
5245 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5246 irela, stub_type);
48229727
JB		 5247 if (!stub_name)
5248 goto error_ret_free_internal;
5249
5250 /* We've either created a stub for this reloc already,
5251 or we are about to. */
5252 created_stub = TRUE;
5253
5254 stub_entry = arm_stub_hash_lookup
5255 (&htab->stub_hash_table, stub_name,
5256 FALSE, FALSE);
5257 if (stub_entry != NULL)
5258 {
5259 /* The proper stub has already been created. */
5260 free (stub_name);
eb7c4339 5261 stub_entry->target_value = sym_value;
48229727
JB		 5262 break;
5263 }
7413f23f 5264
48229727
JB		 5265 stub_entry = elf32_arm_add_stub (stub_name, section,
5266 htab);
5267 if (stub_entry == NULL)
5268 {
5269 free (stub_name);
5270 goto error_ret_free_internal;
5271 }
7413f23f 5272
99059e56
RM		 5273 stub_entry->target_value = sym_value;
5274 stub_entry->target_section = sym_sec;
5275 stub_entry->stub_type = stub_type;
5276 stub_entry->h = hash;
5277 stub_entry->branch_type = branch_type;
5278
5279 if (sym_name == NULL)
5280 sym_name = "unnamed";
5281 stub_entry->output_name = (char *)
5282 bfd_alloc (htab->stub_bfd,
5283 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5284 + strlen (sym_name));
5285 if (stub_entry->output_name == NULL)
5286 {
5287 free (stub_name);
5288 goto error_ret_free_internal;
5289 }
5290
5291 /* For historical reasons, use the existing names for
5292 ARM-to-Thumb and Thumb-to-ARM stubs. */
5293 if ((r_type == (unsigned int) R_ARM_THM_CALL
35fc36a8
RS		 5294 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5295 && branch_type == ST_BRANCH_TO_ARM)
99059e56
RM		 5296 sprintf (stub_entry->output_name,
5297 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5298 else if ((r_type == (unsigned int) R_ARM_CALL
35fc36a8
RS		 5299 || r_type == (unsigned int) R_ARM_JUMP24)
5300 && branch_type == ST_BRANCH_TO_THUMB)
99059e56
RM		 5301 sprintf (stub_entry->output_name,
5302 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5303 else
5304 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5305 sym_name);
5306
5307 stub_changed = TRUE;
5308 }
5309 while (0);
5310
5311 /* Look for relocations which might trigger Cortex-A8
5312 erratum. */
5313 if (htab->fix_cortex_a8
5314 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5315 || r_type == (unsigned int) R_ARM_THM_JUMP19
5316 || r_type == (unsigned int) R_ARM_THM_CALL
5317 || r_type == (unsigned int) R_ARM_THM_XPC22))
5318 {
5319 bfd_vma from = section->output_section->vma
5320 + section->output_offset
5321 + irela->r_offset;
5322
5323 if ((from & 0xfff) == 0xffe)
5324 {
5325 /* Found a candidate. Note we haven't checked the
5326 destination is within 4K here: if we do so (and
5327 don't create an entry in a8_relocs) we can't tell
5328 that a branch should have been relocated when
5329 scanning later. */
5330 if (num_a8_relocs == a8_reloc_table_size)
5331 {
5332 a8_reloc_table_size *= 2;
5333 a8_relocs = (struct a8_erratum_reloc *)
5334 bfd_realloc (a8_relocs,
5335 sizeof (struct a8_erratum_reloc)
5336 * a8_reloc_table_size);
5337 }
5338
5339 a8_relocs[num_a8_relocs].from = from;
5340 a8_relocs[num_a8_relocs].destination = destination;
5341 a8_relocs[num_a8_relocs].r_type = r_type;
5342 a8_relocs[num_a8_relocs].branch_type = branch_type;
5343 a8_relocs[num_a8_relocs].sym_name = sym_name;
5344 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5345 a8_relocs[num_a8_relocs].hash = hash;
5346
5347 num_a8_relocs++;
5348 }
5349 }
906e58ca
NC		 5350 }
5351
99059e56
RM		 5352 /* We're done with the internal relocs, free them. */
5353 if (elf_section_data (section)->relocs == NULL)
5354 free (internal_relocs);
5355 }
48229727 5356
99059e56 5357 if (htab->fix_cortex_a8)
48229727 5358 {
99059e56
RM		 5359 /* Sort relocs which might apply to Cortex-A8 erratum. */
5360 qsort (a8_relocs, num_a8_relocs,
eb7c4339 5361 sizeof (struct a8_erratum_reloc),
99059e56 5362 &a8_reloc_compare);
48229727 5363
99059e56
RM		 5364 /* Scan for branches which might trigger Cortex-A8 erratum. */
5365 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
48229727 5366 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5367 a8_relocs, num_a8_relocs,
5368 prev_num_a8_fixes, &stub_changed)
5369 != 0)
48229727 5370 goto error_ret_free_local;
5e681ec4 5371 }
5e681ec4
PB		 5372 }
5373
eb7c4339 5374 if (prev_num_a8_fixes != num_a8_fixes)
99059e56 5375 stub_changed = TRUE;
48229727 5376
906e58ca
NC		 5377 if (!stub_changed)
5378 break;
5e681ec4 5379
906e58ca
NC		 5380 /* OK, we've added some stubs. Find out the new size of the
5381 stub sections. */
5382 for (stub_sec = htab->stub_bfd->sections;
5383 stub_sec != NULL;
5384 stub_sec = stub_sec->next)
3e6b1042
DJ		 5385 {
5386 /* Ignore non-stub sections. */
5387 if (!strstr (stub_sec->name, STUB_SUFFIX))
5388 continue;
5389
5390 stub_sec->size = 0;
5391 }
b34b2d70 5392
906e58ca
NC		 5393 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5394
48229727
JB		 5395 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5396 if (htab->fix_cortex_a8)
99059e56
RM		 5397 for (i = 0; i < num_a8_fixes; i++)
5398 {
48229727
JB		 5399 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5400 a8_fixes[i].section, htab);
5401
5402 if (stub_sec == NULL)
5403 goto error_ret_free_local;
5404
99059e56
RM		 5405 stub_sec->size
5406 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5407 NULL);
5408 }
48229727
JB		 5409
5410
906e58ca
NC		 5411 /* Ask the linker to do its stuff. */
5412 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5413 }
5414
48229727
JB		 5415 /* Add stubs for Cortex-A8 erratum fixes now. */
5416 if (htab->fix_cortex_a8)
5417 {
5418 for (i = 0; i < num_a8_fixes; i++)
99059e56
RM		 5419 {
5420 struct elf32_arm_stub_hash_entry *stub_entry;
5421 char *stub_name = a8_fixes[i].stub_name;
5422 asection *section = a8_fixes[i].section;
5423 unsigned int section_id = a8_fixes[i].section->id;
5424 asection *link_sec = htab->stub_group[section_id].link_sec;
5425 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5426 const insn_sequence *template_sequence;
5427 int template_size, size = 0;
5428
5429 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5430 TRUE, FALSE);
5431 if (stub_entry == NULL)
5432 {
5433 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5434 section->owner,
5435 stub_name);
5436 return FALSE;
5437 }
5438
5439 stub_entry->stub_sec = stub_sec;
5440 stub_entry->stub_offset = 0;
5441 stub_entry->id_sec = link_sec;
5442 stub_entry->stub_type = a8_fixes[i].stub_type;
5443 stub_entry->target_section = a8_fixes[i].section;
5444 stub_entry->target_value = a8_fixes[i].offset;
5445 stub_entry->target_addend = a8_fixes[i].addend;
5446 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5447 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5448
99059e56
RM		 5449 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5450 &template_sequence,
5451 &template_size);
48229727 5452
99059e56
RM		 5453 stub_entry->stub_size = size;
5454 stub_entry->stub_template = template_sequence;
5455 stub_entry->stub_template_size = template_size;
5456 }
48229727
JB		 5457
5458 /* Stash the Cortex-A8 erratum fix array for use later in
99059e56 5459 elf32_arm_write_section(). */
48229727
JB		 5460 htab->a8_erratum_fixes = a8_fixes;
5461 htab->num_a8_erratum_fixes = num_a8_fixes;
5462 }
5463 else
5464 {
5465 htab->a8_erratum_fixes = NULL;
5466 htab->num_a8_erratum_fixes = 0;
5467 }
906e58ca
NC		 5468 return TRUE;
5469
5470 error_ret_free_local:
5471 return FALSE;
5e681ec4
PB		 5472}
5473
906e58ca
NC		 5474/* Build all the stubs associated with the current output file. The
5475 stubs are kept in a hash table attached to the main linker hash
5476 table. We also set up the .plt entries for statically linked PIC
5477 functions here. This function is called via arm_elf_finish in the
5478 linker. */
252b5132 5479
906e58ca
NC		 5480bfd_boolean
5481elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5482{
906e58ca
NC		 5483 asection *stub_sec;
5484 struct bfd_hash_table *table;
5485 struct elf32_arm_link_hash_table *htab;
252b5132 5486
906e58ca 5487 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5488 if (htab == NULL)
5489 return FALSE;
252b5132 5490
906e58ca
NC		 5491 for (stub_sec = htab->stub_bfd->sections;
5492 stub_sec != NULL;
5493 stub_sec = stub_sec->next)
252b5132 5494 {
906e58ca
NC		 5495 bfd_size_type size;
5496
8029a119 5497 /* Ignore non-stub sections. */
906e58ca
NC		 5498 if (!strstr (stub_sec->name, STUB_SUFFIX))
5499 continue;
5500
5501 /* Allocate memory to hold the linker stubs. */
5502 size = stub_sec->size;
21d799b5 5503 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5504 if (stub_sec->contents == NULL && size != 0)
5505 return FALSE;
5506 stub_sec->size = 0;
252b5132
RH		 5507 }
5508
906e58ca
NC		 5509 /* Build the stubs as directed by the stub hash table. */
5510 table = &htab->stub_hash_table;
5511 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5512 if (htab->fix_cortex_a8)
5513 {
5514 /* Place the cortex a8 stubs last. */
5515 htab->fix_cortex_a8 = -1;
5516 bfd_hash_traverse (table, arm_build_one_stub, info);
5517 }
252b5132 5518
906e58ca 5519 return TRUE;
252b5132
RH		 5520}
5521
9b485d32
NC		 5522/* Locate the Thumb encoded calling stub for NAME. */
5523
252b5132 5524static struct elf_link_hash_entry *
57e8b36a
NC		 5525find_thumb_glue (struct bfd_link_info *link_info,
5526 const char *name,
f2a9dd69 5527 char **error_message)
252b5132
RH		 5528{
5529 char *tmp_name;
5530 struct elf_link_hash_entry *hash;
5531 struct elf32_arm_link_hash_table *hash_table;
5532
5533 /* We need a pointer to the armelf specific hash table. */
5534 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5535 if (hash_table == NULL)
5536 return NULL;
252b5132 5537
21d799b5 5538 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5539 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5540
5541 BFD_ASSERT (tmp_name);
5542
5543 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5544
5545 hash = elf_link_hash_lookup
b34976b6 5546 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5547
b1657152
AM		 5548 if (hash == NULL
5549 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5550 tmp_name, name) == -1)
5551 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5552
5553 free (tmp_name);
5554
5555 return hash;
5556}
5557
9b485d32
NC		 5558/* Locate the ARM encoded calling stub for NAME. */
5559
252b5132 5560static struct elf_link_hash_entry *
57e8b36a
NC		 5561find_arm_glue (struct bfd_link_info *link_info,
5562 const char *name,
f2a9dd69 5563 char **error_message)
252b5132
RH		 5564{
5565 char *tmp_name;
5566 struct elf_link_hash_entry *myh;
5567 struct elf32_arm_link_hash_table *hash_table;
5568
5569 /* We need a pointer to the elfarm specific hash table. */
5570 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5571 if (hash_table == NULL)
5572 return NULL;
252b5132 5573
21d799b5 5574 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5575 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5576
5577 BFD_ASSERT (tmp_name);
5578
5579 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5580
5581 myh = elf_link_hash_lookup
b34976b6 5582 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5583
b1657152
AM		 5584 if (myh == NULL
5585 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5586 tmp_name, name) == -1)
5587 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5588
5589 free (tmp_name);
5590
5591 return myh;
5592}
5593
8f6277f5 5594/* ARM->Thumb glue (static images):
252b5132
RH		 5595
5596 .arm
5597 __func_from_arm:
5598 ldr r12, __func_addr
5599 bx r12
5600 __func_addr:
906e58ca 5601 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5602
26079076
PB		 5603 (v5t static images)
5604 .arm
5605 __func_from_arm:
5606 ldr pc, __func_addr
5607 __func_addr:
906e58ca 5608 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5609
8f6277f5
PB		 5610 (relocatable images)
5611 .arm
5612 __func_from_arm:
5613 ldr r12, __func_offset
5614 add r12, r12, pc
5615 bx r12
5616 __func_offset:
8029a119 5617 .word func - . */
8f6277f5
PB		 5618
5619#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5620static const insn32 a2t1_ldr_insn = 0xe59fc000;
5621static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5622static const insn32 a2t3_func_addr_insn = 0x00000001;
5623
26079076
PB		 5624#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5625static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5626static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5627
8f6277f5
PB		 5628#define ARM2THUMB_PIC_GLUE_SIZE 16
5629static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5630static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5631static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5632
9b485d32 5633/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5634
8029a119
NC		 5635 .thumb .thumb
5636 .align 2 .align 2
5637 __func_from_thumb: __func_from_thumb:
5638 bx pc push {r6, lr}
5639 nop ldr r6, __func_addr
5640 .arm mov lr, pc
5641 b func bx r6
99059e56
RM		 5642 .arm
5643 ;; back_to_thumb
5644 ldmia r13! {r6, lr}
5645 bx lr
5646 __func_addr:
5647 .word func */
252b5132
RH		 5648
5649#define THUMB2ARM_GLUE_SIZE 8
5650static const insn16 t2a1_bx_pc_insn = 0x4778;
5651static const insn16 t2a2_noop_insn = 0x46c0;
5652static const insn32 t2a3_b_insn = 0xea000000;
5653
c7b8f16e
JB		 5654#define VFP11_ERRATUM_VENEER_SIZE 8
5655
845b51d6
PB		 5656#define ARM_BX_VENEER_SIZE 12
5657static const insn32 armbx1_tst_insn = 0xe3100001;
5658static const insn32 armbx2_moveq_insn = 0x01a0f000;
5659static const insn32 armbx3_bx_insn = 0xe12fff10;
5660
7e392df6 5661#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5662static void
5663arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5664{
5665 asection * s;
8029a119 5666 bfd_byte * contents;
252b5132 5667
8029a119 5668 if (size == 0)
3e6b1042
DJ		 5669 {
5670 /* Do not include empty glue sections in the output. */
5671 if (abfd != NULL)
5672 {
3d4d4302 5673 s = bfd_get_linker_section (abfd, name);
3e6b1042
DJ		 5674 if (s != NULL)
5675 s->flags |= SEC_EXCLUDE;
5676 }
5677 return;
5678 }
252b5132 5679
8029a119 5680 BFD_ASSERT (abfd != NULL);
252b5132 5681
3d4d4302 5682 s = bfd_get_linker_section (abfd, name);
8029a119 5683 BFD_ASSERT (s != NULL);
252b5132 5684
21d799b5 5685 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5686
8029a119
NC		 5687 BFD_ASSERT (s->size == size);
5688 s->contents = contents;
5689}
906e58ca 5690
8029a119
NC		 5691bfd_boolean
5692bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5693{
5694 struct elf32_arm_link_hash_table * globals;
906e58ca 5695
8029a119
NC		 5696 globals = elf32_arm_hash_table (info);
5697 BFD_ASSERT (globals != NULL);
906e58ca 5698
8029a119
NC		 5699 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5700 globals->arm_glue_size,
5701 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5702
8029a119
NC		 5703 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5704 globals->thumb_glue_size,
5705 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5706
8029a119
NC		 5707 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5708 globals->vfp11_erratum_glue_size,
5709 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5710
8029a119
NC		 5711 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5712 globals->bx_glue_size,
845b51d6
PB		 5713 ARM_BX_GLUE_SECTION_NAME);
5714
b34976b6 5715 return TRUE;
252b5132
RH		 5716}
5717
a4fd1a8e 5718/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5719 returns the symbol identifying the stub. */
5720
a4fd1a8e 5721static struct elf_link_hash_entry *
57e8b36a
NC		 5722record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5723 struct elf_link_hash_entry * h)
252b5132
RH		 5724{
5725 const char * name = h->root.root.string;
63b0f745 5726 asection * s;
252b5132
RH		 5727 char * tmp_name;
5728 struct elf_link_hash_entry * myh;
14a793b2 5729 struct bfd_link_hash_entry * bh;
252b5132 5730 struct elf32_arm_link_hash_table * globals;
dc810e39 5731 bfd_vma val;
2f475487 5732 bfd_size_type size;
252b5132
RH		 5733
5734 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5735 BFD_ASSERT (globals != NULL);
5736 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5737
3d4d4302 5738 s = bfd_get_linker_section
252b5132
RH		 5739 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5740
252b5132
RH		 5741 BFD_ASSERT (s != NULL);
5742
21d799b5 5743 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5744 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5745
5746 BFD_ASSERT (tmp_name);
5747
5748 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5749
5750 myh = elf_link_hash_lookup
b34976b6 5751 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5752
5753 if (myh != NULL)
5754 {
9b485d32 5755 /* We've already seen this guy. */
252b5132 5756 free (tmp_name);
a4fd1a8e 5757 return myh;
252b5132
RH		 5758 }
5759
57e8b36a
NC		 5760 /* The only trick here is using hash_table->arm_glue_size as the value.
5761 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5762 putting it. The +1 on the value marks that the stub has not been
5763 output yet - not that it is a Thumb function. */
14a793b2 5764 bh = NULL;
dc810e39
AM		 5765 val = globals->arm_glue_size + 1;
5766 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5767 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5768 NULL, TRUE, FALSE, &bh);
252b5132 5769
b7693d02
DJ		 5770 myh = (struct elf_link_hash_entry *) bh;
5771 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5772 myh->forced_local = 1;
5773
252b5132
RH		 5774 free (tmp_name);
5775
27e55c4d
PB		 5776 if (link_info->shared || globals->root.is_relocatable_executable
5777 || globals->pic_veneer)
2f475487 5778 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5779 else if (globals->use_blx)
5780 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5781 else
2f475487
AM		 5782 size = ARM2THUMB_STATIC_GLUE_SIZE;
5783
5784 s->size += size;
5785 globals->arm_glue_size += size;
252b5132 5786
a4fd1a8e 5787 return myh;
252b5132
RH		 5788}
5789
845b51d6
PB		 5790/* Allocate space for ARMv4 BX veneers. */
5791
5792static void
5793record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5794{
5795 asection * s;
5796 struct elf32_arm_link_hash_table *globals;
5797 char *tmp_name;
5798 struct elf_link_hash_entry *myh;
5799 struct bfd_link_hash_entry *bh;
5800 bfd_vma val;
5801
5802 /* BX PC does not need a veneer. */
5803 if (reg == 15)
5804 return;
5805
5806 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5807 BFD_ASSERT (globals != NULL);
5808 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5809
5810 /* Check if this veneer has already been allocated. */
5811 if (globals->bx_glue_offset[reg])
5812 return;
5813
3d4d4302 5814 s = bfd_get_linker_section
845b51d6
PB		 5815 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5816
5817 BFD_ASSERT (s != NULL);
5818
5819 /* Add symbol for veneer. */
21d799b5
NC		 5820 tmp_name = (char *)
5821 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5822
845b51d6 5823 BFD_ASSERT (tmp_name);
906e58ca 5824
845b51d6 5825 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5826
845b51d6
PB		 5827 myh = elf_link_hash_lookup
5828 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5829
845b51d6 5830 BFD_ASSERT (myh == NULL);
906e58ca 5831
845b51d6
PB		 5832 bh = NULL;
5833 val = globals->bx_glue_size;
5834 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
99059e56
RM		 5835 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5836 NULL, TRUE, FALSE, &bh);
845b51d6
PB		 5837
5838 myh = (struct elf_link_hash_entry *) bh;
5839 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5840 myh->forced_local = 1;
5841
5842 s->size += ARM_BX_VENEER_SIZE;
5843 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5844 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5845}
5846
5847
c7b8f16e
JB		 5848/* Add an entry to the code/data map for section SEC. */
5849
5850static void
5851elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5852{
5853 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5854 unsigned int newidx;
906e58ca 5855
c7b8f16e
JB		 5856 if (sec_data->map == NULL)
5857 {
21d799b5 5858 sec_data->map = (elf32_arm_section_map *)
99059e56 5859 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5860 sec_data->mapcount = 0;
5861 sec_data->mapsize = 1;
5862 }
906e58ca 5863
c7b8f16e 5864 newidx = sec_data->mapcount++;
906e58ca 5865
c7b8f16e
JB		 5866 if (sec_data->mapcount > sec_data->mapsize)
5867 {
5868 sec_data->mapsize *= 2;
21d799b5 5869 sec_data->map = (elf32_arm_section_map *)
99059e56
RM		 5870 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5871 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5872 }
5873
5874 if (sec_data->map)
5875 {
5876 sec_data->map[newidx].vma = vma;
5877 sec_data->map[newidx].type = type;
c7b8f16e 5878 }
c7b8f16e
JB		 5879}
5880
5881
5882/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5883 veneers are handled for now. */
5884
5885static bfd_vma
5886record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
99059e56
RM		 5887 elf32_vfp11_erratum_list *branch,
5888 bfd *branch_bfd,
5889 asection *branch_sec,
5890 unsigned int offset)
c7b8f16e
JB		 5891{
5892 asection *s;
5893 struct elf32_arm_link_hash_table *hash_table;
5894 char *tmp_name;
5895 struct elf_link_hash_entry *myh;
5896 struct bfd_link_hash_entry *bh;
5897 bfd_vma val;
5898 struct _arm_elf_section_data *sec_data;
c7b8f16e 5899 elf32_vfp11_erratum_list *newerr;
906e58ca 5900
c7b8f16e 5901 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5902 BFD_ASSERT (hash_table != NULL);
5903 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5904
3d4d4302 5905 s = bfd_get_linker_section
c7b8f16e 5906 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5907
c7b8f16e 5908 sec_data = elf32_arm_section_data (s);
906e58ca 5909
c7b8f16e 5910 BFD_ASSERT (s != NULL);
906e58ca 5911
21d799b5 5912 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 5913 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5914
c7b8f16e 5915 BFD_ASSERT (tmp_name);
906e58ca 5916
c7b8f16e
JB		 5917 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5918 hash_table->num_vfp11_fixes);
906e58ca 5919
c7b8f16e
JB		 5920 myh = elf_link_hash_lookup
5921 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5922
c7b8f16e 5923 BFD_ASSERT (myh == NULL);
906e58ca 5924
c7b8f16e
JB		 5925 bh = NULL;
5926 val = hash_table->vfp11_erratum_glue_size;
5927 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
99059e56
RM		 5928 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5929 NULL, TRUE, FALSE, &bh);
c7b8f16e
JB		 5930
5931 myh = (struct elf_link_hash_entry *) bh;
5932 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5933 myh->forced_local = 1;
5934
5935 /* Link veneer back to calling location. */
c7e2358a 5936 sec_data->erratumcount += 1;
21d799b5
NC		 5937 newerr = (elf32_vfp11_erratum_list *)
5938 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5939
c7b8f16e
JB		 5940 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5941 newerr->vma = -1;
5942 newerr->u.v.branch = branch;
5943 newerr->u.v.id = hash_table->num_vfp11_fixes;
5944 branch->u.b.veneer = newerr;
5945
5946 newerr->next = sec_data->erratumlist;
5947 sec_data->erratumlist = newerr;
5948
5949 /* A symbol for the return from the veneer. */
5950 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5951 hash_table->num_vfp11_fixes);
5952
5953 myh = elf_link_hash_lookup
5954 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5955
c7b8f16e
JB		 5956 if (myh != NULL)
5957 abort ();
5958
5959 bh = NULL;
5960 val = offset + 4;
5961 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5962 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5963
c7b8f16e
JB		 5964 myh = (struct elf_link_hash_entry *) bh;
5965 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5966 myh->forced_local = 1;
5967
5968 free (tmp_name);
906e58ca 5969
c7b8f16e
JB		 5970 /* Generate a mapping symbol for the veneer section, and explicitly add an
5971 entry for that symbol to the code/data map for the section. */
5972 if (hash_table->vfp11_erratum_glue_size == 0)
5973 {
5974 bh = NULL;
5975 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
99059e56 5976 ever requires this erratum fix. */
c7b8f16e
JB		 5977 _bfd_generic_link_add_one_symbol (link_info,
5978 hash_table->bfd_of_glue_owner, "$a",
5979 BSF_LOCAL, s, 0, NULL,
99059e56 5980 TRUE, FALSE, &bh);
c7b8f16e
JB		 5981
5982 myh = (struct elf_link_hash_entry *) bh;
5983 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5984 myh->forced_local = 1;
906e58ca 5985
c7b8f16e 5986 /* The elf32_arm_init_maps function only cares about symbols from input
99059e56
RM		 5987 BFDs. We must make a note of this generated mapping symbol
5988 ourselves so that code byteswapping works properly in
5989 elf32_arm_write_section. */
c7b8f16e
JB		 5990 elf32_arm_section_map_add (s, 'a', 0);
5991 }
906e58ca 5992
c7b8f16e
JB		 5993 s->size += VFP11_ERRATUM_VENEER_SIZE;
5994 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5995 hash_table->num_vfp11_fixes++;
906e58ca 5996
c7b8f16e
JB		 5997 /* The offset of the veneer. */
5998 return val;
5999}
6000
8029a119 6001#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 6002 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6003 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 6004
6005/* Create a fake section for use by the ARM backend of the linker. */
6006
6007static bfd_boolean
6008arm_make_glue_section (bfd * abfd, const char * name)
6009{
6010 asection * sec;
6011
3d4d4302 6012 sec = bfd_get_linker_section (abfd, name);
8029a119
NC		 6013 if (sec != NULL)
6014 /* Already made. */
6015 return TRUE;
6016
3d4d4302 6017 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
8029a119
NC		 6018
6019 if (sec == NULL
6020 || !bfd_set_section_alignment (abfd, sec, 2))
6021 return FALSE;
6022
6023 /* Set the gc mark to prevent the section from being removed by garbage
6024 collection, despite the fact that no relocs refer to this section. */
6025 sec->gc_mark = 1;
6026
6027 return TRUE;
6028}
6029
8afb0e02
NC		 6030/* Add the glue sections to ABFD. This function is called from the
6031 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 6032
b34976b6 6033bfd_boolean
57e8b36a
NC		 6034bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6035 struct bfd_link_info *info)
252b5132 6036{
8afb0e02
NC		 6037 /* If we are only performing a partial
6038 link do not bother adding the glue. */
1049f94e 6039 if (info->relocatable)
b34976b6 6040 return TRUE;
252b5132 6041
8029a119
NC		 6042 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6043 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6044 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6045 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 6046}
6047
6048/* Select a BFD to be used to hold the sections used by the glue code.
6049 This function is called from the linker scripts in ld/emultempl/
8029a119 6050 {armelf/pe}.em. */
8afb0e02 6051
b34976b6 6052bfd_boolean
57e8b36a 6053bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 6054{
6055 struct elf32_arm_link_hash_table *globals;
6056
6057 /* If we are only performing a partial link
6058 do not bother getting a bfd to hold the glue. */
1049f94e 6059 if (info->relocatable)
b34976b6 6060 return TRUE;
8afb0e02 6061
b7693d02
DJ		 6062 /* Make sure we don't attach the glue sections to a dynamic object. */
6063 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6064
8afb0e02 6065 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 6066 BFD_ASSERT (globals != NULL);
6067
6068 if (globals->bfd_of_glue_owner != NULL)
b34976b6 6069 return TRUE;
8afb0e02 6070
252b5132
RH		 6071 /* Save the bfd for later use. */
6072 globals->bfd_of_glue_owner = abfd;
cedb70c5 6073
b34976b6 6074 return TRUE;
252b5132
RH		 6075}
6076
906e58ca
NC		 6077static void
6078check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 6079{
2de70689
MGD		 6080 int cpu_arch;
6081
b38cadfb 6082 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2de70689
MGD		 6083 Tag_CPU_arch);
6084
6085 if (globals->fix_arm1176)
6086 {
6087 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6088 globals->use_blx = 1;
6089 }
6090 else
6091 {
6092 if (cpu_arch > TAG_CPU_ARCH_V4T)
6093 globals->use_blx = 1;
6094 }
39b41c9c
PB		 6095}
6096
b34976b6 6097bfd_boolean
57e8b36a 6098bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 6099 struct bfd_link_info *link_info)
252b5132
RH		 6100{
6101 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 6102 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 6103 Elf_Internal_Rela *irel, *irelend;
6104 bfd_byte *contents = NULL;
252b5132
RH		 6105
6106 asection *sec;
6107 struct elf32_arm_link_hash_table *globals;
6108
6109 /* If we are only performing a partial link do not bother
6110 to construct any glue. */
1049f94e 6111 if (link_info->relocatable)
b34976b6 6112 return TRUE;
252b5132 6113
39ce1a6a
NC		 6114 /* Here we have a bfd that is to be included on the link. We have a
6115 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 6116 globals = elf32_arm_hash_table (link_info);
252b5132 6117 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6118
6119 check_use_blx (globals);
252b5132 6120
d504ffc8 6121 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6122 {
d003868e
AM		 6123 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6124 abfd);
e489d0ae
PB		 6125 return FALSE;
6126 }
f21f3fe0 6127
39ce1a6a
NC		 6128 /* PR 5398: If we have not decided to include any loadable sections in
6129 the output then we will not have a glue owner bfd. This is OK, it
6130 just means that there is nothing else for us to do here. */
6131 if (globals->bfd_of_glue_owner == NULL)
6132 return TRUE;
6133
252b5132
RH		 6134 /* Rummage around all the relocs and map the glue vectors. */
6135 sec = abfd->sections;
6136
6137 if (sec == NULL)
b34976b6 6138 return TRUE;
252b5132
RH		 6139
6140 for (; sec != NULL; sec = sec->next)
6141 {
6142 if (sec->reloc_count == 0)
6143 continue;
6144
2f475487
AM		 6145 if ((sec->flags & SEC_EXCLUDE) != 0)
6146 continue;
6147
0ffa91dd 6148 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6149
9b485d32 6150 /* Load the relocs. */
6cdc0ccc 6151 internal_relocs
906e58ca 6152 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6153
6cdc0ccc
AM		 6154 if (internal_relocs == NULL)
6155 goto error_return;
252b5132 6156
6cdc0ccc
AM		 6157 irelend = internal_relocs + sec->reloc_count;
6158 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6159 {
6160 long r_type;
6161 unsigned long r_index;
252b5132
RH		 6162
6163 struct elf_link_hash_entry *h;
6164
6165 r_type = ELF32_R_TYPE (irel->r_info);
6166 r_index = ELF32_R_SYM (irel->r_info);
6167
9b485d32 6168 /* These are the only relocation types we care about. */
ba96a88f 6169 if ( r_type != R_ARM_PC24
845b51d6 6170 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6171 continue;
6172
6173 /* Get the section contents if we haven't done so already. */
6174 if (contents == NULL)
6175 {
6176 /* Get cached copy if it exists. */
6177 if (elf_section_data (sec)->this_hdr.contents != NULL)
6178 contents = elf_section_data (sec)->this_hdr.contents;
6179 else
6180 {
6181 /* Go get them off disk. */
57e8b36a 6182 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6183 goto error_return;
6184 }
6185 }
6186
845b51d6
PB		 6187 if (r_type == R_ARM_V4BX)
6188 {
6189 int reg;
6190
6191 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6192 record_arm_bx_glue (link_info, reg);
6193 continue;
6194 }
6195
a7c10850 6196 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6197 h = NULL;
6198
9b485d32 6199 /* We don't care about local symbols. */
252b5132
RH		 6200 if (r_index < symtab_hdr->sh_info)
6201 continue;
6202
9b485d32 6203 /* This is an external symbol. */
252b5132
RH		 6204 r_index -= symtab_hdr->sh_info;
6205 h = (struct elf_link_hash_entry *)
6206 elf_sym_hashes (abfd)[r_index];
6207
6208 /* If the relocation is against a static symbol it must be within
6209 the current section and so cannot be a cross ARM/Thumb relocation. */
6210 if (h == NULL)
6211 continue;
6212
d504ffc8
DJ		 6213 /* If the call will go through a PLT entry then we do not need
6214 glue. */
362d30a1 6215 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6216 continue;
6217
252b5132
RH		 6218 switch (r_type)
6219 {
6220 case R_ARM_PC24:
6221 /* This one is a call from arm code. We need to look up
99059e56
RM		 6222 the target of the call. If it is a thumb target, we
6223 insert glue. */
35fc36a8 6224 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6225 record_arm_to_thumb_glue (link_info, h);
6226 break;
6227
252b5132 6228 default:
c6596c5e 6229 abort ();
252b5132
RH		 6230 }
6231 }
6cdc0ccc
AM		 6232
6233 if (contents != NULL
6234 && elf_section_data (sec)->this_hdr.contents != contents)
6235 free (contents);
6236 contents = NULL;
6237
6238 if (internal_relocs != NULL
6239 && elf_section_data (sec)->relocs != internal_relocs)
6240 free (internal_relocs);
6241 internal_relocs = NULL;
252b5132
RH		 6242 }
6243
b34976b6 6244 return TRUE;
9a5aca8c 6245
252b5132 6246error_return:
6cdc0ccc
AM		 6247 if (contents != NULL
6248 && elf_section_data (sec)->this_hdr.contents != contents)
6249 free (contents);
6250 if (internal_relocs != NULL
6251 && elf_section_data (sec)->relocs != internal_relocs)
6252 free (internal_relocs);
9a5aca8c 6253
b34976b6 6254 return FALSE;
252b5132 6255}
7e392df6 6256#endif
252b5132 6257
eb043451 6258
c7b8f16e
JB		 6259/* Initialise maps of ARM/Thumb/data for input BFDs. */
6260
6261void
6262bfd_elf32_arm_init_maps (bfd *abfd)
6263{
6264 Elf_Internal_Sym *isymbuf;
6265 Elf_Internal_Shdr *hdr;
6266 unsigned int i, localsyms;
6267
af1f4419
NC		 6268 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6269 if (! is_arm_elf (abfd))
6270 return;
6271
c7b8f16e
JB		 6272 if ((abfd->flags & DYNAMIC) != 0)
6273 return;
6274
0ffa91dd 6275 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6276 localsyms = hdr->sh_info;
6277
6278 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6279 should contain the number of local symbols, which should come before any
6280 global symbols. Mapping symbols are always local. */
6281 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6282 NULL);
6283
6284 /* No internal symbols read? Skip this BFD. */
6285 if (isymbuf == NULL)
6286 return;
6287
6288 for (i = 0; i < localsyms; i++)
6289 {
6290 Elf_Internal_Sym *isym = &isymbuf[i];
6291 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6292 const char *name;
906e58ca 6293
c7b8f16e 6294 if (sec != NULL
99059e56
RM		 6295 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6296 {
6297 name = bfd_elf_string_from_elf_section (abfd,
6298 hdr->sh_link, isym->st_name);
906e58ca 6299
99059e56 6300 if (bfd_is_arm_special_symbol_name (name,
c7b8f16e 6301 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
99059e56
RM		 6302 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6303 }
c7b8f16e
JB		 6304 }
6305}
6306
6307
48229727
JB		 6308/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6309 say what they wanted. */
6310
6311void
6312bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6313{
6314 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6315 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6316
4dfe6ac6
NC		 6317 if (globals == NULL)
6318 return;
6319
48229727
JB		 6320 if (globals->fix_cortex_a8 == -1)
6321 {
6322 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6323 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6324 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6325 || out_attr[Tag_CPU_arch_profile].i == 0))
6326 globals->fix_cortex_a8 = 1;
6327 else
6328 globals->fix_cortex_a8 = 0;
6329 }
6330}
6331
6332
c7b8f16e
JB		 6333void
6334bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6335{
6336 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6337 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6338
4dfe6ac6
NC		 6339 if (globals == NULL)
6340 return;
c7b8f16e
JB		 6341 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6342 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6343 {
6344 switch (globals->vfp11_fix)
99059e56
RM		 6345 {
6346 case BFD_ARM_VFP11_FIX_DEFAULT:
6347 case BFD_ARM_VFP11_FIX_NONE:
6348 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6349 break;
6350
6351 default:
6352 /* Give a warning, but do as the user requests anyway. */
6353 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6354 "workaround is not necessary for target architecture"), obfd);
6355 }
c7b8f16e
JB		 6356 }
6357 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6358 /* For earlier architectures, we might need the workaround, but do not
6359 enable it by default. If users is running with broken hardware, they
6360 must enable the erratum fix explicitly. */
6361 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6362}
6363
6364
906e58ca
NC		 6365enum bfd_arm_vfp11_pipe
6366{
c7b8f16e
JB		 6367 VFP11_FMAC,
6368 VFP11_LS,
6369 VFP11_DS,
6370 VFP11_BAD
6371};
6372
6373/* Return a VFP register number. This is encoded as RX:X for single-precision
6374 registers, or X:RX for double-precision registers, where RX is the group of
6375 four bits in the instruction encoding and X is the single extension bit.
6376 RX and X fields are specified using their lowest (starting) bit. The return
6377 value is:
6378
6379 0...31: single-precision registers s0...s31
6380 32...63: double-precision registers d0...d31.
906e58ca 6381
c7b8f16e
JB		 6382 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6383 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6384
c7b8f16e
JB		 6385static unsigned int
6386bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
99059e56 6387 unsigned int x)
c7b8f16e
JB		 6388{
6389 if (is_double)
6390 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6391 else
6392 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6393}
6394
6395/* Set bits in *WMASK according to a register number REG as encoded by
6396 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6397
6398static void
6399bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6400{
6401 if (reg < 32)
6402 *wmask |= 1 << reg;
6403 else if (reg < 48)
6404 *wmask |= 3 << ((reg - 32) * 2);
6405}
6406
6407/* Return TRUE if WMASK overwrites anything in REGS. */
6408
6409static bfd_boolean
6410bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6411{
6412 int i;
906e58ca 6413
c7b8f16e
JB		 6414 for (i = 0; i < numregs; i++)
6415 {
6416 unsigned int reg = regs[i];
6417
6418 if (reg < 32 && (wmask & (1 << reg)) != 0)
99059e56 6419 return TRUE;
906e58ca 6420
c7b8f16e
JB		 6421 reg -= 32;
6422
6423 if (reg >= 16)
99059e56 6424 continue;
906e58ca 6425
c7b8f16e 6426 if ((wmask & (3 << (reg * 2))) != 0)
99059e56 6427 return TRUE;
c7b8f16e 6428 }
906e58ca 6429
c7b8f16e
JB		 6430 return FALSE;
6431}
6432
6433/* In this function, we're interested in two things: finding input registers
6434 for VFP data-processing instructions, and finding the set of registers which
6435 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6436 hold the written set, so FLDM etc. are easy to deal with (we're only
6437 interested in 32 SP registers or 16 dp registers, due to the VFP version
6438 implemented by the chip in question). DP registers are marked by setting
6439 both SP registers in the write mask). */
6440
6441static enum bfd_arm_vfp11_pipe
6442bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
99059e56 6443 int *numregs)
c7b8f16e 6444{
91d6fa6a 6445 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6446 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6447
6448 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6449 {
6450 unsigned int pqrs;
6451 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6452 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6453
6454 pqrs = ((insn & 0x00800000) >> 20)
99059e56
RM		 6455 | ((insn & 0x00300000) >> 19)
6456 | ((insn & 0x00000040) >> 6);
c7b8f16e
JB		 6457
6458 switch (pqrs)
99059e56
RM		 6459 {
6460 case 0: /* fmac[sd]. */
6461 case 1: /* fnmac[sd]. */
6462 case 2: /* fmsc[sd]. */
6463 case 3: /* fnmsc[sd]. */
6464 vpipe = VFP11_FMAC;
6465 bfd_arm_vfp11_write_mask (destmask, fd);
6466 regs[0] = fd;
6467 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6468 regs[2] = fm;
6469 *numregs = 3;
6470 break;
6471
6472 case 4: /* fmul[sd]. */
6473 case 5: /* fnmul[sd]. */
6474 case 6: /* fadd[sd]. */
6475 case 7: /* fsub[sd]. */
6476 vpipe = VFP11_FMAC;
6477 goto vfp_binop;
6478
6479 case 8: /* fdiv[sd]. */
6480 vpipe = VFP11_DS;
6481 vfp_binop:
6482 bfd_arm_vfp11_write_mask (destmask, fd);
6483 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6484 regs[1] = fm;
6485 *numregs = 2;
6486 break;
6487
6488 case 15: /* extended opcode. */
6489 {
6490 unsigned int extn = ((insn >> 15) & 0x1e)
6491 | ((insn >> 7) & 1);
6492
6493 switch (extn)
6494 {
6495 case 0: /* fcpy[sd]. */
6496 case 1: /* fabs[sd]. */
6497 case 2: /* fneg[sd]. */
6498 case 8: /* fcmp[sd]. */
6499 case 9: /* fcmpe[sd]. */
6500 case 10: /* fcmpz[sd]. */
6501 case 11: /* fcmpez[sd]. */
6502 case 16: /* fuito[sd]. */
6503 case 17: /* fsito[sd]. */
6504 case 24: /* ftoui[sd]. */
6505 case 25: /* ftouiz[sd]. */
6506 case 26: /* ftosi[sd]. */
6507 case 27: /* ftosiz[sd]. */
6508 /* These instructions will not bounce due to underflow. */
6509 *numregs = 0;
6510 vpipe = VFP11_FMAC;
6511 break;
6512
6513 case 3: /* fsqrt[sd]. */
6514 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6515 registers to cause the erratum in previous instructions. */
6516 bfd_arm_vfp11_write_mask (destmask, fd);
6517 vpipe = VFP11_DS;
6518 break;
6519
6520 case 15: /* fcvt{ds,sd}. */
6521 {
6522 int rnum = 0;
6523
6524 bfd_arm_vfp11_write_mask (destmask, fd);
c7b8f16e
JB		 6525
6526 /* Only FCVTSD can underflow. */
99059e56
RM		 6527 if ((insn & 0x100) != 0)
6528 regs[rnum++] = fm;
c7b8f16e 6529
99059e56 6530 *numregs = rnum;
c7b8f16e 6531
99059e56
RM		 6532 vpipe = VFP11_FMAC;
6533 }
6534 break;
c7b8f16e 6535
99059e56
RM		 6536 default:
6537 return VFP11_BAD;
6538 }
6539 }
6540 break;
c7b8f16e 6541
99059e56
RM		 6542 default:
6543 return VFP11_BAD;
6544 }
c7b8f16e
JB		 6545 }
6546 /* Two-register transfer. */
6547 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6548 {
6549 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6550
c7b8f16e
JB		 6551 if ((insn & 0x100000) == 0)
6552 {
99059e56
RM		 6553 if (is_double)
6554 bfd_arm_vfp11_write_mask (destmask, fm);
6555 else
6556 {
6557 bfd_arm_vfp11_write_mask (destmask, fm);
6558 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6559 }
c7b8f16e
JB		 6560 }
6561
91d6fa6a 6562 vpipe = VFP11_LS;
c7b8f16e
JB		 6563 }
6564 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6565 {
6566 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6567 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6568
c7b8f16e 6569 switch (puw)
99059e56
RM		 6570 {
6571 case 0: /* Two-reg transfer. We should catch these above. */
6572 abort ();
906e58ca 6573
99059e56
RM		 6574 case 2: /* fldm[sdx]. */
6575 case 3:
6576 case 5:
6577 {
6578 unsigned int i, offset = insn & 0xff;
c7b8f16e 6579
99059e56
RM		 6580 if (is_double)
6581 offset >>= 1;
c7b8f16e 6582
99059e56
RM		 6583 for (i = fd; i < fd + offset; i++)
6584 bfd_arm_vfp11_write_mask (destmask, i);
6585 }
6586 break;
906e58ca 6587
99059e56
RM		 6588 case 4: /* fld[sd]. */
6589 case 6:
6590 bfd_arm_vfp11_write_mask (destmask, fd);
6591 break;
906e58ca 6592
99059e56
RM		 6593 default:
6594 return VFP11_BAD;
6595 }
c7b8f16e 6596
91d6fa6a 6597 vpipe = VFP11_LS;
c7b8f16e
JB		 6598 }
6599 /* Single-register transfer. Note L==0. */
6600 else if ((insn & 0x0f100e10) == 0x0e000a10)
6601 {
6602 unsigned int opcode = (insn >> 21) & 7;
6603 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6604
6605 switch (opcode)
99059e56
RM		 6606 {
6607 case 0: /* fmsr/fmdlr. */
6608 case 1: /* fmdhr. */
6609 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6610 destination register. I don't know if this is exactly right,
6611 but it is the conservative choice. */
6612 bfd_arm_vfp11_write_mask (destmask, fn);
6613 break;
6614
6615 case 7: /* fmxr. */
6616 break;
6617 }
c7b8f16e 6618
91d6fa6a 6619 vpipe = VFP11_LS;
c7b8f16e
JB		 6620 }
6621
91d6fa6a 6622 return vpipe;
c7b8f16e
JB		 6623}
6624
6625
6626static int elf32_arm_compare_mapping (const void * a, const void * b);
6627
6628
6629/* Look for potentially-troublesome code sequences which might trigger the
6630 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6631 (available from ARM) for details of the erratum. A short version is
6632 described in ld.texinfo. */
6633
6634bfd_boolean
6635bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6636{
6637 asection *sec;
6638 bfd_byte *contents = NULL;
6639 int state = 0;
6640 int regs[3], numregs = 0;
6641 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6642 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6643
4dfe6ac6
NC		 6644 if (globals == NULL)
6645 return FALSE;
6646
c7b8f16e
JB		 6647 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6648 The states transition as follows:
906e58ca 6649
c7b8f16e 6650 0 -> 1 (vector) or 0 -> 2 (scalar)
99059e56
RM		 6651 A VFP FMAC-pipeline instruction has been seen. Fill
6652 regs[0]..regs[numregs-1] with its input operands. Remember this
6653 instruction in 'first_fmac'.
c7b8f16e
JB		 6654
6655 1 -> 2
99059e56
RM		 6656 Any instruction, except for a VFP instruction which overwrites
6657 regs[*].
906e58ca 6658
c7b8f16e
JB		 6659 1 -> 3 [ -> 0 ] or
6660 2 -> 3 [ -> 0 ]
99059e56
RM		 6661 A VFP instruction has been seen which overwrites any of regs[*].
6662 We must make a veneer! Reset state to 0 before examining next
6663 instruction.
906e58ca 6664
c7b8f16e 6665 2 -> 0
99059e56
RM		 6666 If we fail to match anything in state 2, reset to state 0 and reset
6667 the instruction pointer to the instruction after 'first_fmac'.
c7b8f16e
JB		 6668
6669 If the VFP11 vector mode is in use, there must be at least two unrelated
6670 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6671 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6672
6673 /* If we are only performing a partial link do not bother
6674 to construct any glue. */
6675 if (link_info->relocatable)
6676 return TRUE;
6677
0ffa91dd
NC		 6678 /* Skip if this bfd does not correspond to an ELF image. */
6679 if (! is_arm_elf (abfd))
6680 return TRUE;
906e58ca 6681
c7b8f16e
JB		 6682 /* We should have chosen a fix type by the time we get here. */
6683 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6684
6685 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6686 return TRUE;
2e6030b9 6687
33a7ffc2
JM		 6688 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6689 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6690 return TRUE;
6691
c7b8f16e
JB		 6692 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6693 {
6694 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6695 struct _arm_elf_section_data *sec_data;
6696
6697 /* If we don't have executable progbits, we're not interested in this
99059e56 6698 section. Also skip if section is to be excluded. */
c7b8f16e 6699 if (elf_section_type (sec) != SHT_PROGBITS
99059e56
RM		 6700 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6701 || (sec->flags & SEC_EXCLUDE) != 0
dbaa2011 6702 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
33a7ffc2 6703 || sec->output_section == bfd_abs_section_ptr
99059e56
RM		 6704 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6705 continue;
c7b8f16e
JB		 6706
6707 sec_data = elf32_arm_section_data (sec);
906e58ca 6708
c7b8f16e 6709 if (sec_data->mapcount == 0)
99059e56 6710 continue;
906e58ca 6711
c7b8f16e
JB		 6712 if (elf_section_data (sec)->this_hdr.contents != NULL)
6713 contents = elf_section_data (sec)->this_hdr.contents;
6714 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6715 goto error_return;
6716
6717 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6718 elf32_arm_compare_mapping);
6719
6720 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 6721 {
6722 unsigned int span_start = sec_data->map[span].vma;
6723 unsigned int span_end = (span == sec_data->mapcount - 1)
c7b8f16e 6724 ? sec->size : sec_data->map[span + 1].vma;
99059e56
RM		 6725 char span_type = sec_data->map[span].type;
6726
6727 /* FIXME: Only ARM mode is supported at present. We may need to
6728 support Thumb-2 mode also at some point. */
6729 if (span_type != 'a')
6730 continue;
6731
6732 for (i = span_start; i < span_end;)
6733 {
6734 unsigned int next_i = i + 4;
6735 unsigned int insn = bfd_big_endian (abfd)
6736 ? (contents[i] << 24)
6737 | (contents[i + 1] << 16)
6738 | (contents[i + 2] << 8)
6739 | contents[i + 3]
6740 : (contents[i + 3] << 24)
6741 | (contents[i + 2] << 16)
6742 | (contents[i + 1] << 8)
6743 | contents[i];
6744 unsigned int writemask = 0;
6745 enum bfd_arm_vfp11_pipe vpipe;
6746
6747 switch (state)
6748 {
6749 case 0:
6750 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6751 &numregs);
6752 /* I'm assuming the VFP11 erratum can trigger with denorm
6753 operands on either the FMAC or the DS pipeline. This might
6754 lead to slightly overenthusiastic veneer insertion. */
6755 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6756 {
6757 state = use_vector ? 1 : 2;
6758 first_fmac = i;
6759 veneer_of_insn = insn;
6760 }
6761 break;
6762
6763 case 1:
6764 {
6765 int other_regs[3], other_numregs;
6766 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6767 other_regs,
99059e56
RM		 6768 &other_numregs);
6769 if (vpipe != VFP11_BAD
6770 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6771 numregs))
99059e56
RM		 6772 state = 3;
6773 else
6774 state = 2;
6775 }
6776 break;
6777
6778 case 2:
6779 {
6780 int other_regs[3], other_numregs;
6781 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6782 other_regs,
99059e56
RM		 6783 &other_numregs);
6784 if (vpipe != VFP11_BAD
6785 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6786 numregs))
99059e56
RM		 6787 state = 3;
6788 else
6789 {
6790 state = 0;
6791 next_i = first_fmac + 4;
6792 }
6793 }
6794 break;
6795
6796 case 3:
6797 abort (); /* Should be unreachable. */
6798 }
6799
6800 if (state == 3)
6801 {
6802 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6803 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6804
6805 elf32_arm_section_data (sec)->erratumcount += 1;
6806
6807 newerr->u.b.vfp_insn = veneer_of_insn;
6808
6809 switch (span_type)
6810 {
6811 case 'a':
6812 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6813 break;
6814
6815 default:
6816 abort ();
6817 }
6818
6819 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
c7b8f16e
JB		 6820 first_fmac);
6821
99059e56 6822 newerr->vma = -1;
c7b8f16e 6823
99059e56
RM		 6824 newerr->next = sec_data->erratumlist;
6825 sec_data->erratumlist = newerr;
c7b8f16e 6826
99059e56
RM		 6827 state = 0;
6828 }
c7b8f16e 6829
99059e56
RM		 6830 i = next_i;
6831 }
6832 }
906e58ca 6833
c7b8f16e 6834 if (contents != NULL
99059e56
RM		 6835 && elf_section_data (sec)->this_hdr.contents != contents)
6836 free (contents);
c7b8f16e
JB		 6837 contents = NULL;
6838 }
6839
6840 return TRUE;
6841
6842error_return:
6843 if (contents != NULL
6844 && elf_section_data (sec)->this_hdr.contents != contents)
6845 free (contents);
906e58ca 6846
c7b8f16e
JB		 6847 return FALSE;
6848}
6849
6850/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6851 after sections have been laid out, using specially-named symbols. */
6852
6853void
6854bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6855 struct bfd_link_info *link_info)
6856{
6857 asection *sec;
6858 struct elf32_arm_link_hash_table *globals;
6859 char *tmp_name;
906e58ca 6860
c7b8f16e
JB		 6861 if (link_info->relocatable)
6862 return;
2e6030b9
MS		 6863
6864 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6865 if (! is_arm_elf (abfd))
2e6030b9
MS		 6866 return;
6867
c7b8f16e 6868 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6869 if (globals == NULL)
6870 return;
906e58ca 6871
21d799b5 6872 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 6873 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6874
6875 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6876 {
6877 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6878 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6879
c7b8f16e 6880 for (; errnode != NULL; errnode = errnode->next)
99059e56
RM		 6881 {
6882 struct elf_link_hash_entry *myh;
6883 bfd_vma vma;
6884
6885 switch (errnode->type)
6886 {
6887 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6888 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6889 /* Find veneer symbol. */
6890 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
c7b8f16e
JB		 6891 errnode->u.b.veneer->u.v.id);
6892
99059e56
RM		 6893 myh = elf_link_hash_lookup
6894 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6895
99059e56
RM		 6896 if (myh == NULL)
6897 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6898 "`%s'"), abfd, tmp_name);
c7b8f16e 6899
99059e56
RM		 6900 vma = myh->root.u.def.section->output_section->vma
6901 + myh->root.u.def.section->output_offset
6902 + myh->root.u.def.value;
c7b8f16e 6903
99059e56
RM		 6904 errnode->u.b.veneer->vma = vma;
6905 break;
c7b8f16e
JB		 6906
6907 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 6908 case VFP11_ERRATUM_THUMB_VENEER:
6909 /* Find return location. */
6910 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6911 errnode->u.v.id);
c7b8f16e 6912
99059e56
RM		 6913 myh = elf_link_hash_lookup
6914 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6915
99059e56
RM		 6916 if (myh == NULL)
6917 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
c7b8f16e
JB		 6918 "`%s'"), abfd, tmp_name);
6919
99059e56
RM		 6920 vma = myh->root.u.def.section->output_section->vma
6921 + myh->root.u.def.section->output_offset
6922 + myh->root.u.def.value;
c7b8f16e 6923
99059e56
RM		 6924 errnode->u.v.branch->vma = vma;
6925 break;
906e58ca 6926
99059e56
RM		 6927 default:
6928 abort ();
6929 }
6930 }
c7b8f16e 6931 }
906e58ca 6932
c7b8f16e
JB		 6933 free (tmp_name);
6934}
6935
6936
eb043451
PB		 6937/* Set target relocation values needed during linking. */
6938
6939void
bf21ed78
MS		 6940bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6941 struct bfd_link_info *link_info,
eb043451 6942 int target1_is_rel,
319850b4 6943 char * target2_type,
99059e56 6944 int fix_v4bx,
c7b8f16e 6945 int use_blx,
99059e56 6946 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6947 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 6948 int pic_veneer, int fix_cortex_a8,
6949 int fix_arm1176)
eb043451
PB		 6950{
6951 struct elf32_arm_link_hash_table *globals;
6952
6953 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6954 if (globals == NULL)
6955 return;
eb043451
PB		 6956
6957 globals->target1_is_rel = target1_is_rel;
6958 if (strcmp (target2_type, "rel") == 0)
6959 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6960 else if (strcmp (target2_type, "abs") == 0)
6961 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6962 else if (strcmp (target2_type, "got-rel") == 0)
6963 globals->target2_reloc = R_ARM_GOT_PREL;
6964 else
6965 {
6966 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6967 target2_type);
6968 }
319850b4 6969 globals->fix_v4bx = fix_v4bx;
33bfe774 6970 globals->use_blx |= use_blx;
c7b8f16e 6971 globals->vfp11_fix = vfp11_fix;
27e55c4d 6972 globals->pic_veneer = pic_veneer;
48229727 6973 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 6974 globals->fix_arm1176 = fix_arm1176;
bf21ed78 6975
0ffa91dd
NC		 6976 BFD_ASSERT (is_arm_elf (output_bfd));
6977 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6978 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6979}
eb043451 6980
12a0a0fd 6981/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6982
12a0a0fd
PB		 6983static void
6984insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6985{
6986 bfd_vma upper;
6987 bfd_vma lower;
6988 int reloc_sign;
6989
6990 BFD_ASSERT ((offset & 1) == 0);
6991
6992 upper = bfd_get_16 (abfd, insn);
6993 lower = bfd_get_16 (abfd, insn + 2);
6994 reloc_sign = (offset < 0) ? 1 : 0;
6995 upper = (upper & ~(bfd_vma) 0x7ff)
6996 | ((offset >> 12) & 0x3ff)
6997 | (reloc_sign << 10);
906e58ca 6998 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6999 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7000 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7001 | ((offset >> 1) & 0x7ff);
7002 bfd_put_16 (abfd, upper, insn);
7003 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 7004}
7005
9b485d32
NC		 7006/* Thumb code calling an ARM function. */
7007
252b5132 7008static int
57e8b36a
NC		 7009elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7010 const char * name,
7011 bfd * input_bfd,
7012 bfd * output_bfd,
7013 asection * input_section,
7014 bfd_byte * hit_data,
7015 asection * sym_sec,
7016 bfd_vma offset,
7017 bfd_signed_vma addend,
f2a9dd69
DJ		 7018 bfd_vma val,
7019 char **error_message)
252b5132 7020{
bcbdc74c 7021 asection * s = 0;
dc810e39 7022 bfd_vma my_offset;
252b5132 7023 long int ret_offset;
bcbdc74c
NC		 7024 struct elf_link_hash_entry * myh;
7025 struct elf32_arm_link_hash_table * globals;
252b5132 7026
f2a9dd69 7027 myh = find_thumb_glue (info, name, error_message);
252b5132 7028 if (myh == NULL)
b34976b6 7029 return FALSE;
252b5132
RH		 7030
7031 globals = elf32_arm_hash_table (info);
252b5132
RH		 7032 BFD_ASSERT (globals != NULL);
7033 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7034
7035 my_offset = myh->root.u.def.value;
7036
3d4d4302
AM		 7037 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7038 THUMB2ARM_GLUE_SECTION_NAME);
252b5132
RH		 7039
7040 BFD_ASSERT (s != NULL);
7041 BFD_ASSERT (s->contents != NULL);
7042 BFD_ASSERT (s->output_section != NULL);
7043
7044 if ((my_offset & 0x01) == 0x01)
7045 {
7046 if (sym_sec != NULL
7047 && sym_sec->owner != NULL
7048 && !INTERWORK_FLAG (sym_sec->owner))
7049 {
8f615d07 7050 (*_bfd_error_handler)
d003868e 7051 (_("%B(%s): warning: interworking not enabled.\n"
3aaeb7d3 7052 " first occurrence: %B: Thumb call to ARM"),
d003868e 7053 sym_sec->owner, input_bfd, name);
252b5132 7054
b34976b6 7055 return FALSE;
252b5132
RH		 7056 }
7057
7058 --my_offset;
7059 myh->root.u.def.value = my_offset;
7060
52ab56c2
PB		 7061 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7062 s->contents + my_offset);
252b5132 7063
52ab56c2
PB		 7064 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7065 s->contents + my_offset + 2);
252b5132
RH		 7066
7067 ret_offset =
9b485d32
NC		 7068 /* Address of destination of the stub. */
7069 ((bfd_signed_vma) val)
252b5132 7070 - ((bfd_signed_vma)
57e8b36a
NC		 7071 /* Offset from the start of the current section
7072 to the start of the stubs. */
9b485d32
NC		 7073 (s->output_offset
7074 /* Offset of the start of this stub from the start of the stubs. */
7075 + my_offset
7076 /* Address of the start of the current section. */
7077 + s->output_section->vma)
7078 /* The branch instruction is 4 bytes into the stub. */
7079 + 4
7080 /* ARM branches work from the pc of the instruction + 8. */
7081 + 8);
252b5132 7082
52ab56c2
PB		 7083 put_arm_insn (globals, output_bfd,
7084 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7085 s->contents + my_offset + 4);
252b5132
RH		 7086 }
7087
7088 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7089
427bfd90
NC		 7090 /* Now go back and fix up the original BL insn to point to here. */
7091 ret_offset =
7092 /* Address of where the stub is located. */
7093 (s->output_section->vma + s->output_offset + my_offset)
7094 /* Address of where the BL is located. */
57e8b36a
NC		 7095 - (input_section->output_section->vma + input_section->output_offset
7096 + offset)
427bfd90
NC		 7097 /* Addend in the relocation. */
7098 - addend
7099 /* Biassing for PC-relative addressing. */
7100 - 8;
252b5132 7101
12a0a0fd 7102 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 7103
b34976b6 7104 return TRUE;
252b5132
RH		 7105}
7106
a4fd1a8e 7107/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 7108
a4fd1a8e
PB		 7109static struct elf_link_hash_entry *
7110elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7111 const char * name,
7112 bfd * input_bfd,
7113 bfd * output_bfd,
7114 asection * sym_sec,
7115 bfd_vma val,
8029a119
NC		 7116 asection * s,
7117 char ** error_message)
252b5132 7118{
dc810e39 7119 bfd_vma my_offset;
252b5132 7120 long int ret_offset;
bcbdc74c
NC		 7121 struct elf_link_hash_entry * myh;
7122 struct elf32_arm_link_hash_table * globals;
252b5132 7123
f2a9dd69 7124 myh = find_arm_glue (info, name, error_message);
252b5132 7125 if (myh == NULL)
a4fd1a8e 7126 return NULL;
252b5132
RH		 7127
7128 globals = elf32_arm_hash_table (info);
252b5132
RH		 7129 BFD_ASSERT (globals != NULL);
7130 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7131
7132 my_offset = myh->root.u.def.value;
252b5132
RH		 7133
7134 if ((my_offset & 0x01) == 0x01)
7135 {
7136 if (sym_sec != NULL
7137 && sym_sec->owner != NULL
7138 && !INTERWORK_FLAG (sym_sec->owner))
7139 {
8f615d07 7140 (*_bfd_error_handler)
d003868e
AM		 7141 (_("%B(%s): warning: interworking not enabled.\n"
7142 " first occurrence: %B: arm call to thumb"),
7143 sym_sec->owner, input_bfd, name);
252b5132 7144 }
9b485d32 7145
252b5132
RH		 7146 --my_offset;
7147 myh->root.u.def.value = my_offset;
7148
27e55c4d
PB		 7149 if (info->shared || globals->root.is_relocatable_executable
7150 || globals->pic_veneer)
8f6277f5
PB		 7151 {
7152 /* For relocatable objects we can't use absolute addresses,
7153 so construct the address from a relative offset. */
7154 /* TODO: If the offset is small it's probably worth
7155 constructing the address with adds. */
52ab56c2
PB		 7156 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7157 s->contents + my_offset);
7158 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7159 s->contents + my_offset + 4);
7160 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7161 s->contents + my_offset + 8);
8f6277f5
PB		 7162 /* Adjust the offset by 4 for the position of the add,
7163 and 8 for the pipeline offset. */
7164 ret_offset = (val - (s->output_offset
7165 + s->output_section->vma
7166 + my_offset + 12))
7167 | 1;
7168 bfd_put_32 (output_bfd, ret_offset,
7169 s->contents + my_offset + 12);
7170 }
26079076
PB		 7171 else if (globals->use_blx)
7172 {
7173 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7174 s->contents + my_offset);
7175
7176 /* It's a thumb address. Add the low order bit. */
7177 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7178 s->contents + my_offset + 4);
7179 }
8f6277f5
PB		 7180 else
7181 {
52ab56c2
PB		 7182 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7183 s->contents + my_offset);
252b5132 7184
52ab56c2
PB		 7185 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7186 s->contents + my_offset + 4);
252b5132 7187
8f6277f5
PB		 7188 /* It's a thumb address. Add the low order bit. */
7189 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7190 s->contents + my_offset + 8);
8029a119
NC		 7191
7192 my_offset += 12;
8f6277f5 7193 }
252b5132
RH		 7194 }
7195
7196 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7197
a4fd1a8e
PB		 7198 return myh;
7199}
7200
7201/* Arm code calling a Thumb function. */
7202
7203static int
7204elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7205 const char * name,
7206 bfd * input_bfd,
7207 bfd * output_bfd,
7208 asection * input_section,
7209 bfd_byte * hit_data,
7210 asection * sym_sec,
7211 bfd_vma offset,
7212 bfd_signed_vma addend,
f2a9dd69
DJ		 7213 bfd_vma val,
7214 char **error_message)
a4fd1a8e
PB		 7215{
7216 unsigned long int tmp;
7217 bfd_vma my_offset;
7218 asection * s;
7219 long int ret_offset;
7220 struct elf_link_hash_entry * myh;
7221 struct elf32_arm_link_hash_table * globals;
7222
7223 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7224 BFD_ASSERT (globals != NULL);
7225 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7226
3d4d4302
AM		 7227 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7228 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7229 BFD_ASSERT (s != NULL);
7230 BFD_ASSERT (s->contents != NULL);
7231 BFD_ASSERT (s->output_section != NULL);
7232
7233 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7234 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7235 if (!myh)
7236 return FALSE;
7237
7238 my_offset = myh->root.u.def.value;
252b5132
RH		 7239 tmp = bfd_get_32 (input_bfd, hit_data);
7240 tmp = tmp & 0xFF000000;
7241
9b485d32 7242 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7243 ret_offset = (s->output_offset
7244 + my_offset
7245 + s->output_section->vma
7246 - (input_section->output_offset
7247 + input_section->output_section->vma
7248 + offset + addend)
7249 - 8);
9a5aca8c 7250
252b5132
RH		 7251 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7252
dc810e39 7253 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7254
b34976b6 7255 return TRUE;
252b5132
RH		 7256}
7257
a4fd1a8e
PB		 7258/* Populate Arm stub for an exported Thumb function. */
7259
7260static bfd_boolean
7261elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7262{
7263 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7264 asection * s;
7265 struct elf_link_hash_entry * myh;
7266 struct elf32_arm_link_hash_entry *eh;
7267 struct elf32_arm_link_hash_table * globals;
7268 asection *sec;
7269 bfd_vma val;
f2a9dd69 7270 char *error_message;
a4fd1a8e 7271
906e58ca 7272 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7273 /* Allocate stubs for exported Thumb functions on v4t. */
7274 if (eh->export_glue == NULL)
7275 return TRUE;
7276
7277 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7278 BFD_ASSERT (globals != NULL);
7279 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7280
3d4d4302
AM		 7281 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7282 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7283 BFD_ASSERT (s != NULL);
7284 BFD_ASSERT (s->contents != NULL);
7285 BFD_ASSERT (s->output_section != NULL);
7286
7287 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7288
7289 BFD_ASSERT (sec->output_section != NULL);
7290
a4fd1a8e
PB		 7291 val = eh->export_glue->root.u.def.value + sec->output_offset
7292 + sec->output_section->vma;
8029a119 7293
a4fd1a8e
PB		 7294 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7295 h->root.u.def.section->owner,
f2a9dd69
DJ		 7296 globals->obfd, sec, val, s,
7297 &error_message);
a4fd1a8e
PB		 7298 BFD_ASSERT (myh);
7299 return TRUE;
7300}
7301
845b51d6
PB		 7302/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7303
7304static bfd_vma
7305elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7306{
7307 bfd_byte *p;
7308 bfd_vma glue_addr;
7309 asection *s;
7310 struct elf32_arm_link_hash_table *globals;
7311
7312 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7313 BFD_ASSERT (globals != NULL);
7314 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7315
3d4d4302
AM		 7316 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7317 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 7318 BFD_ASSERT (s != NULL);
7319 BFD_ASSERT (s->contents != NULL);
7320 BFD_ASSERT (s->output_section != NULL);
7321
7322 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7323
7324 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7325
7326 if ((globals->bx_glue_offset[reg] & 1) == 0)
7327 {
7328 p = s->contents + glue_addr;
7329 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7330 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7331 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7332 globals->bx_glue_offset[reg] |= 1;
7333 }
7334
7335 return glue_addr + s->output_section->vma + s->output_offset;
7336}
7337
a4fd1a8e
PB		 7338/* Generate Arm stubs for exported Thumb symbols. */
7339static void
906e58ca 7340elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7341 struct bfd_link_info *link_info)
7342{
7343 struct elf32_arm_link_hash_table * globals;
7344
8029a119
NC		 7345 if (link_info == NULL)
7346 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7347 return;
7348
7349 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7350 if (globals == NULL)
7351 return;
7352
84c08195
PB		 7353 /* If blx is available then exported Thumb symbols are OK and there is
7354 nothing to do. */
a4fd1a8e
PB		 7355 if (globals->use_blx)
7356 return;
7357
7358 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7359 link_info);
7360}
7361
47beaa6a
RS		 7362/* Reserve space for COUNT dynamic relocations in relocation selection
7363 SRELOC. */
7364
7365static void
7366elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7367 bfd_size_type count)
7368{
7369 struct elf32_arm_link_hash_table *htab;
7370
7371 htab = elf32_arm_hash_table (info);
7372 BFD_ASSERT (htab->root.dynamic_sections_created);
7373 if (sreloc == NULL)
7374 abort ();
7375 sreloc->size += RELOC_SIZE (htab) * count;
7376}
7377
34e77a92
RS		 7378/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7379 dynamic, the relocations should go in SRELOC, otherwise they should
7380 go in the special .rel.iplt section. */
7381
7382static void
7383elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7384 bfd_size_type count)
7385{
7386 struct elf32_arm_link_hash_table *htab;
7387
7388 htab = elf32_arm_hash_table (info);
7389 if (!htab->root.dynamic_sections_created)
7390 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7391 else
7392 {
7393 BFD_ASSERT (sreloc != NULL);
7394 sreloc->size += RELOC_SIZE (htab) * count;
7395 }
7396}
7397
47beaa6a
RS		 7398/* Add relocation REL to the end of relocation section SRELOC. */
7399
7400static void
7401elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7402 asection *sreloc, Elf_Internal_Rela *rel)
7403{
7404 bfd_byte *loc;
7405 struct elf32_arm_link_hash_table *htab;
7406
7407 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7408 if (!htab->root.dynamic_sections_created
7409 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7410 sreloc = htab->root.irelplt;
47beaa6a
RS		 7411 if (sreloc == NULL)
7412 abort ();
7413 loc = sreloc->contents;
7414 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7415 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7416 abort ();
7417 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7418}
7419
34e77a92
RS		 7420/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7421 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7422 to .plt. */
7423
7424static void
7425elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7426 bfd_boolean is_iplt_entry,
7427 union gotplt_union *root_plt,
7428 struct arm_plt_info *arm_plt)
7429{
7430 struct elf32_arm_link_hash_table *htab;
7431 asection *splt;
7432 asection *sgotplt;
7433
7434 htab = elf32_arm_hash_table (info);
7435
7436 if (is_iplt_entry)
7437 {
7438 splt = htab->root.iplt;
7439 sgotplt = htab->root.igotplt;
7440
99059e56
RM		 7441 /* NaCl uses a special first entry in .iplt too. */
7442 if (htab->nacl_p && splt->size == 0)
7443 splt->size += htab->plt_header_size;
7444
34e77a92
RS		 7445 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7446 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7447 }
7448 else
7449 {
7450 splt = htab->root.splt;
7451 sgotplt = htab->root.sgotplt;
7452
7453 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7454 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7455
7456 /* If this is the first .plt entry, make room for the special
7457 first entry. */
7458 if (splt->size == 0)
7459 splt->size += htab->plt_header_size;
7460 }
7461
7462 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7463 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7464 splt->size += PLT_THUMB_STUB_SIZE;
7465 root_plt->offset = splt->size;
7466 splt->size += htab->plt_entry_size;
7467
7468 if (!htab->symbian_p)
7469 {
7470 /* We also need to make an entry in the .got.plt section, which
7471 will be placed in the .got section by the linker script. */
7472 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7473 sgotplt->size += 4;
7474 }
7475}
7476
b38cadfb
NC		 7477static bfd_vma
7478arm_movw_immediate (bfd_vma value)
7479{
7480 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7481}
7482
7483static bfd_vma
7484arm_movt_immediate (bfd_vma value)
7485{
7486 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7487}
7488
34e77a92
RS		 7489/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7490 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7491 Otherwise, DYNINDX is the index of the symbol in the dynamic
7492 symbol table and SYM_VALUE is undefined.
7493
7494 ROOT_PLT points to the offset of the PLT entry from the start of its
7495 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7496 bookkeeping information. */
7497
7498static void
7499elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7500 union gotplt_union *root_plt,
7501 struct arm_plt_info *arm_plt,
7502 int dynindx, bfd_vma sym_value)
7503{
7504 struct elf32_arm_link_hash_table *htab;
7505 asection *sgot;
7506 asection *splt;
7507 asection *srel;
7508 bfd_byte *loc;
7509 bfd_vma plt_index;
7510 Elf_Internal_Rela rel;
7511 bfd_vma plt_header_size;
7512 bfd_vma got_header_size;
7513
7514 htab = elf32_arm_hash_table (info);
7515
7516 /* Pick the appropriate sections and sizes. */
7517 if (dynindx == -1)
7518 {
7519 splt = htab->root.iplt;
7520 sgot = htab->root.igotplt;
7521 srel = htab->root.irelplt;
7522
7523 /* There are no reserved entries in .igot.plt, and no special
7524 first entry in .iplt. */
7525 got_header_size = 0;
7526 plt_header_size = 0;
7527 }
7528 else
7529 {
7530 splt = htab->root.splt;
7531 sgot = htab->root.sgotplt;
7532 srel = htab->root.srelplt;
7533
7534 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7535 plt_header_size = htab->plt_header_size;
7536 }
7537 BFD_ASSERT (splt != NULL && srel != NULL);
7538
7539 /* Fill in the entry in the procedure linkage table. */
7540 if (htab->symbian_p)
7541 {
7542 BFD_ASSERT (dynindx >= 0);
7543 put_arm_insn (htab, output_bfd,
7544 elf32_arm_symbian_plt_entry[0],
7545 splt->contents + root_plt->offset);
7546 bfd_put_32 (output_bfd,
7547 elf32_arm_symbian_plt_entry[1],
7548 splt->contents + root_plt->offset + 4);
7549
7550 /* Fill in the entry in the .rel.plt section. */
7551 rel.r_offset = (splt->output_section->vma
7552 + splt->output_offset
7553 + root_plt->offset + 4);
7554 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7555
7556 /* Get the index in the procedure linkage table which
7557 corresponds to this symbol. This is the index of this symbol
7558 in all the symbols for which we are making plt entries. The
7559 first entry in the procedure linkage table is reserved. */
7560 plt_index = ((root_plt->offset - plt_header_size)
7561 / htab->plt_entry_size);
7562 }
7563 else
7564 {
7565 bfd_vma got_offset, got_address, plt_address;
7566 bfd_vma got_displacement, initial_got_entry;
7567 bfd_byte * ptr;
7568
7569 BFD_ASSERT (sgot != NULL);
7570
7571 /* Get the offset into the .(i)got.plt table of the entry that
7572 corresponds to this function. */
7573 got_offset = (arm_plt->got_offset & -2);
7574
7575 /* Get the index in the procedure linkage table which
7576 corresponds to this symbol. This is the index of this symbol
7577 in all the symbols for which we are making plt entries.
7578 After the reserved .got.plt entries, all symbols appear in
7579 the same order as in .plt. */
7580 plt_index = (got_offset - got_header_size) / 4;
7581
7582 /* Calculate the address of the GOT entry. */
7583 got_address = (sgot->output_section->vma
7584 + sgot->output_offset
7585 + got_offset);
7586
7587 /* ...and the address of the PLT entry. */
7588 plt_address = (splt->output_section->vma
7589 + splt->output_offset
7590 + root_plt->offset);
7591
7592 ptr = splt->contents + root_plt->offset;
7593 if (htab->vxworks_p && info->shared)
7594 {
7595 unsigned int i;
7596 bfd_vma val;
7597
7598 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7599 {
7600 val = elf32_arm_vxworks_shared_plt_entry[i];
7601 if (i == 2)
7602 val |= got_address - sgot->output_section->vma;
7603 if (i == 5)
7604 val |= plt_index * RELOC_SIZE (htab);
7605 if (i == 2 || i == 5)
7606 bfd_put_32 (output_bfd, val, ptr);
7607 else
7608 put_arm_insn (htab, output_bfd, val, ptr);
7609 }
7610 }
7611 else if (htab->vxworks_p)
7612 {
7613 unsigned int i;
7614 bfd_vma val;
7615
7616 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7617 {
7618 val = elf32_arm_vxworks_exec_plt_entry[i];
7619 if (i == 2)
7620 val |= got_address;
7621 if (i == 4)
7622 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7623 if (i == 5)
7624 val |= plt_index * RELOC_SIZE (htab);
7625 if (i == 2 || i == 5)
7626 bfd_put_32 (output_bfd, val, ptr);
7627 else
7628 put_arm_insn (htab, output_bfd, val, ptr);
7629 }
7630
7631 loc = (htab->srelplt2->contents
7632 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7633
7634 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7635 referencing the GOT for this PLT entry. */
7636 rel.r_offset = plt_address + 8;
7637 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7638 rel.r_addend = got_offset;
7639 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7640 loc += RELOC_SIZE (htab);
7641
7642 /* Create the R_ARM_ABS32 relocation referencing the
7643 beginning of the PLT for this GOT entry. */
7644 rel.r_offset = got_address;
7645 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7646 rel.r_addend = 0;
7647 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7648 }
b38cadfb
NC		 7649 else if (htab->nacl_p)
7650 {
7651 /* Calculate the displacement between the PLT slot and the
7652 common tail that's part of the special initial PLT slot. */
6034aab8 7653 int32_t tail_displacement
b38cadfb
NC		 7654 = ((splt->output_section->vma + splt->output_offset
7655 + ARM_NACL_PLT_TAIL_OFFSET)
7656 - (plt_address + htab->plt_entry_size + 4));
7657 BFD_ASSERT ((tail_displacement & 3) == 0);
7658 tail_displacement >>= 2;
7659
7660 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7661 || (-tail_displacement & 0xff000000) == 0);
7662
7663 /* Calculate the displacement between the PLT slot and the entry
7664 in the GOT. The offset accounts for the value produced by
7665 adding to pc in the penultimate instruction of the PLT stub. */
6034aab8 7666 got_displacement = (got_address
99059e56 7667 - (plt_address + htab->plt_entry_size));
b38cadfb
NC		 7668
7669 /* NaCl does not support interworking at all. */
7670 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7671
7672 put_arm_insn (htab, output_bfd,
7673 elf32_arm_nacl_plt_entry[0]
7674 | arm_movw_immediate (got_displacement),
7675 ptr + 0);
7676 put_arm_insn (htab, output_bfd,
7677 elf32_arm_nacl_plt_entry[1]
7678 | arm_movt_immediate (got_displacement),
7679 ptr + 4);
7680 put_arm_insn (htab, output_bfd,
7681 elf32_arm_nacl_plt_entry[2],
7682 ptr + 8);
7683 put_arm_insn (htab, output_bfd,
7684 elf32_arm_nacl_plt_entry[3]
7685 | (tail_displacement & 0x00ffffff),
7686 ptr + 12);
7687 }
34e77a92
RS		 7688 else
7689 {
7690 /* Calculate the displacement between the PLT slot and the
7691 entry in the GOT. The eight-byte offset accounts for the
7692 value produced by adding to pc in the first instruction
7693 of the PLT stub. */
7694 got_displacement = got_address - (plt_address + 8);
7695
7696 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7697
7698 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7699 {
7700 put_thumb_insn (htab, output_bfd,
7701 elf32_arm_plt_thumb_stub[0], ptr - 4);
7702 put_thumb_insn (htab, output_bfd,
7703 elf32_arm_plt_thumb_stub[1], ptr - 2);
7704 }
7705
7706 put_arm_insn (htab, output_bfd,
7707 elf32_arm_plt_entry[0]
7708 | ((got_displacement & 0x0ff00000) >> 20),
7709 ptr + 0);
7710 put_arm_insn (htab, output_bfd,
7711 elf32_arm_plt_entry[1]
7712 | ((got_displacement & 0x000ff000) >> 12),
7713 ptr+ 4);
7714 put_arm_insn (htab, output_bfd,
7715 elf32_arm_plt_entry[2]
7716 | (got_displacement & 0x00000fff),
7717 ptr + 8);
7718#ifdef FOUR_WORD_PLT
7719 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7720#endif
7721 }
7722
7723 /* Fill in the entry in the .rel(a).(i)plt section. */
7724 rel.r_offset = got_address;
7725 rel.r_addend = 0;
7726 if (dynindx == -1)
7727 {
7728 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7729 The dynamic linker or static executable then calls SYM_VALUE
7730 to determine the correct run-time value of the .igot.plt entry. */
7731 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7732 initial_got_entry = sym_value;
7733 }
7734 else
7735 {
7736 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7737 initial_got_entry = (splt->output_section->vma
7738 + splt->output_offset);
7739 }
7740
7741 /* Fill in the entry in the global offset table. */
7742 bfd_put_32 (output_bfd, initial_got_entry,
7743 sgot->contents + got_offset);
7744 }
7745
aba8c3de
WN		 7746 if (dynindx == -1)
7747 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7748 else
7749 {
7750 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7751 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7752 }
34e77a92
RS		 7753}
7754
eb043451
PB		 7755/* Some relocations map to different relocations depending on the
7756 target. Return the real relocation. */
8029a119 7757
eb043451
PB		 7758static int
7759arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7760 int r_type)
7761{
7762 switch (r_type)
7763 {
7764 case R_ARM_TARGET1:
7765 if (globals->target1_is_rel)
7766 return R_ARM_REL32;
7767 else
7768 return R_ARM_ABS32;
7769
7770 case R_ARM_TARGET2:
7771 return globals->target2_reloc;
7772
7773 default:
7774 return r_type;
7775 }
7776}
eb043451 7777
ba93b8ac
DJ		 7778/* Return the base VMA address which should be subtracted from real addresses
7779 when resolving @dtpoff relocation.
7780 This is PT_TLS segment p_vaddr. */
7781
7782static bfd_vma
7783dtpoff_base (struct bfd_link_info *info)
7784{
7785 /* If tls_sec is NULL, we should have signalled an error already. */
7786 if (elf_hash_table (info)->tls_sec == NULL)
7787 return 0;
7788 return elf_hash_table (info)->tls_sec->vma;
7789}
7790
7791/* Return the relocation value for @tpoff relocation
7792 if STT_TLS virtual address is ADDRESS. */
7793
7794static bfd_vma
7795tpoff (struct bfd_link_info *info, bfd_vma address)
7796{
7797 struct elf_link_hash_table *htab = elf_hash_table (info);
7798 bfd_vma base;
7799
7800 /* If tls_sec is NULL, we should have signalled an error already. */
7801 if (htab->tls_sec == NULL)
7802 return 0;
7803 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7804 return address - htab->tls_sec->vma + base;
7805}
7806
00a97672
RS		 7807/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7808 VALUE is the relocation value. */
7809
7810static bfd_reloc_status_type
7811elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7812{
7813 if (value > 0xfff)
7814 return bfd_reloc_overflow;
7815
7816 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7817 bfd_put_32 (abfd, value, data);
7818 return bfd_reloc_ok;
7819}
7820
0855e32b
NS		 7821/* Handle TLS relaxations. Relaxing is possible for symbols that use
7822 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7823 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7824
7825 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7826 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7827 case of error.
7828
7829 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7830 the pre-relaxed code. It would be nice if the relocs were updated
7831 to match the optimization. */
0855e32b 7832
b38cadfb 7833static bfd_reloc_status_type
0855e32b 7834elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
b38cadfb 7835 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
0855e32b
NS		 7836 Elf_Internal_Rela *rel, unsigned long is_local)
7837{
7838 unsigned long insn;
b38cadfb 7839
0855e32b
NS		 7840 switch (ELF32_R_TYPE (rel->r_info))
7841 {
7842 default:
7843 return bfd_reloc_notsupported;
b38cadfb 7844
0855e32b
NS		 7845 case R_ARM_TLS_GOTDESC:
7846 if (is_local)
7847 insn = 0;
7848 else
7849 {
7850 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7851 if (insn & 1)
7852 insn -= 5; /* THUMB */
7853 else
7854 insn -= 8; /* ARM */
7855 }
7856 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7857 return bfd_reloc_continue;
7858
7859 case R_ARM_THM_TLS_DESCSEQ:
7860 /* Thumb insn. */
7861 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7862 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7863 {
7864 if (is_local)
7865 /* nop */
7866 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7867 }
7868 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7869 {
7870 if (is_local)
7871 /* nop */
7872 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7873 else
7874 /* ldr rx,[ry] */
7875 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7876 }
7877 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7878 {
7879 if (is_local)
7880 /* nop */
7881 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7882 else
7883 /* mov r0, rx */
7884 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7885 contents + rel->r_offset);
7886 }
7887 else
7888 {
7889 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7890 /* It's a 32 bit instruction, fetch the rest of it for
7891 error generation. */
7892 insn = (insn << 16)
7893 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7894 (*_bfd_error_handler)
7895 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7896 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7897 return bfd_reloc_notsupported;
7898 }
7899 break;
b38cadfb 7900
0855e32b
NS		 7901 case R_ARM_TLS_DESCSEQ:
7902 /* arm insn. */
7903 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7904 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7905 {
7906 if (is_local)
7907 /* mov rx, ry */
7908 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7909 contents + rel->r_offset);
7910 }
7911 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7912 {
7913 if (is_local)
7914 /* nop */
7915 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7916 else
7917 /* ldr rx,[ry] */
7918 bfd_put_32 (input_bfd, insn & 0xfffff000,
7919 contents + rel->r_offset);
7920 }
7921 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7922 {
7923 if (is_local)
7924 /* nop */
7925 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7926 else
7927 /* mov r0, rx */
7928 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7929 contents + rel->r_offset);
7930 }
7931 else
7932 {
7933 (*_bfd_error_handler)
7934 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7935 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7936 return bfd_reloc_notsupported;
7937 }
7938 break;
7939
7940 case R_ARM_TLS_CALL:
7941 /* GD->IE relaxation, turn the instruction into 'nop' or
7942 'ldr r0, [pc,r0]' */
7943 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7944 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7945 break;
b38cadfb 7946
0855e32b
NS		 7947 case R_ARM_THM_TLS_CALL:
7948 /* GD->IE relaxation */
7949 if (!is_local)
7950 /* add r0,pc; ldr r0, [r0] */
7951 insn = 0x44786800;
7952 else if (arch_has_thumb2_nop (globals))
7953 /* nop.w */
7954 insn = 0xf3af8000;
7955 else
7956 /* nop; nop */
7957 insn = 0xbf00bf00;
b38cadfb 7958
0855e32b
NS		 7959 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7960 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7961 break;
7962 }
7963 return bfd_reloc_ok;
7964}
7965
4962c51a
MS		 7966/* For a given value of n, calculate the value of G_n as required to
7967 deal with group relocations. We return it in the form of an
7968 encoded constant-and-rotation, together with the final residual. If n is
7969 specified as less than zero, then final_residual is filled with the
7970 input value and no further action is performed. */
7971
7972static bfd_vma
7973calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7974{
7975 int current_n;
7976 bfd_vma g_n;
7977 bfd_vma encoded_g_n = 0;
7978 bfd_vma residual = value; /* Also known as Y_n. */
7979
7980 for (current_n = 0; current_n <= n; current_n++)
7981 {
7982 int shift;
7983
7984 /* Calculate which part of the value to mask. */
7985 if (residual == 0)
99059e56 7986 shift = 0;
4962c51a 7987 else
99059e56
RM		 7988 {
7989 int msb;
7990
7991 /* Determine the most significant bit in the residual and
7992 align the resulting value to a 2-bit boundary. */
7993 for (msb = 30; msb >= 0; msb -= 2)
7994 if (residual & (3 << msb))
7995 break;
7996
7997 /* The desired shift is now (msb - 6), or zero, whichever
7998 is the greater. */
7999 shift = msb - 6;
8000 if (shift < 0)
8001 shift = 0;
8002 }
4962c51a
MS		 8003
8004 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8005 g_n = residual & (0xff << shift);
8006 encoded_g_n = (g_n >> shift)
99059e56 8007 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4962c51a
MS		 8008
8009 /* Calculate the residual for the next time around. */
8010 residual &= ~g_n;
8011 }
8012
8013 *final_residual = residual;
8014
8015 return encoded_g_n;
8016}
8017
8018/* Given an ARM instruction, determine whether it is an ADD or a SUB.
8019 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 8020
4962c51a 8021static int
906e58ca 8022identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 8023{
8024 int opcode = insn & 0x1e00000;
8025
8026 if (opcode == 1 << 23) /* ADD */
8027 return 1;
8028
8029 if (opcode == 1 << 22) /* SUB */
8030 return -1;
8031
8032 return 0;
8033}
8034
252b5132 8035/* Perform a relocation as part of a final link. */
9b485d32 8036
252b5132 8037static bfd_reloc_status_type
57e8b36a
NC		 8038elf32_arm_final_link_relocate (reloc_howto_type * howto,
8039 bfd * input_bfd,
8040 bfd * output_bfd,
8041 asection * input_section,
8042 bfd_byte * contents,
8043 Elf_Internal_Rela * rel,
8044 bfd_vma value,
8045 struct bfd_link_info * info,
8046 asection * sym_sec,
8047 const char * sym_name,
34e77a92
RS		 8048 unsigned char st_type,
8049 enum arm_st_branch_type branch_type,
0945cdfd 8050 struct elf_link_hash_entry * h,
f2a9dd69 8051 bfd_boolean * unresolved_reloc_p,
8029a119 8052 char ** error_message)
252b5132
RH		 8053{
8054 unsigned long r_type = howto->type;
8055 unsigned long r_symndx;
8056 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 8057 bfd_vma * local_got_offsets;
0855e32b 8058 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 8059 asection * sgot;
8060 asection * splt;
252b5132 8061 asection * sreloc = NULL;
362d30a1 8062 asection * srelgot;
252b5132 8063 bfd_vma addend;
ba96a88f 8064 bfd_signed_vma signed_addend;
34e77a92
RS		 8065 unsigned char dynreloc_st_type;
8066 bfd_vma dynreloc_value;
ba96a88f 8067 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 8068 struct elf32_arm_link_hash_entry *eh;
8069 union gotplt_union *root_plt;
8070 struct arm_plt_info *arm_plt;
8071 bfd_vma plt_offset;
8072 bfd_vma gotplt_offset;
8073 bfd_boolean has_iplt_entry;
f21f3fe0 8074
9c504268 8075 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8076 if (globals == NULL)
8077 return bfd_reloc_notsupported;
9c504268 8078
0ffa91dd
NC		 8079 BFD_ASSERT (is_arm_elf (input_bfd));
8080
8081 /* Some relocation types map to different relocations depending on the
9c504268 8082 target. We pick the right one here. */
eb043451 8083 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 8084
8085 /* It is possible to have linker relaxations on some TLS access
8086 models. Update our information here. */
8087 r_type = elf32_arm_tls_transition (info, r_type, h);
8088
eb043451
PB		 8089 if (r_type != howto->type)
8090 howto = elf32_arm_howto_from_type (r_type);
9c504268 8091
cac15327
NC		 8092 /* If the start address has been set, then set the EF_ARM_HASENTRY
8093 flag. Setting this more than once is redundant, but the cost is
8094 not too high, and it keeps the code simple.
99e4ae17 8095
cac15327
NC		 8096 The test is done here, rather than somewhere else, because the
8097 start address is only set just before the final link commences.
8098
8099 Note - if the user deliberately sets a start address of 0, the
8100 flag will not be set. */
8101 if (bfd_get_start_address (output_bfd) != 0)
8102 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 8103
34e77a92 8104 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 8105 sgot = globals->root.sgot;
252b5132 8106 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 8107 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8108
34e77a92
RS		 8109 if (globals->root.dynamic_sections_created)
8110 srelgot = globals->root.srelgot;
8111 else
8112 srelgot = NULL;
8113
252b5132
RH		 8114 r_symndx = ELF32_R_SYM (rel->r_info);
8115
4e7fd91e 8116 if (globals->use_rel)
ba96a88f 8117 {
4e7fd91e
PB		 8118 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8119
8120 if (addend & ((howto->src_mask + 1) >> 1))
8121 {
8122 signed_addend = -1;
8123 signed_addend &= ~ howto->src_mask;
8124 signed_addend |= addend;
8125 }
8126 else
8127 signed_addend = addend;
ba96a88f
NC		 8128 }
8129 else
4e7fd91e 8130 addend = signed_addend = rel->r_addend;
f21f3fe0 8131
39f21624
NC		 8132 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8133 are resolving a function call relocation. */
8134 if (using_thumb_only (globals)
8135 && (r_type == R_ARM_THM_CALL
8136 || r_type == R_ARM_THM_JUMP24)
8137 && branch_type == ST_BRANCH_TO_ARM)
8138 branch_type = ST_BRANCH_TO_THUMB;
8139
34e77a92
RS		 8140 /* Record the symbol information that should be used in dynamic
8141 relocations. */
8142 dynreloc_st_type = st_type;
8143 dynreloc_value = value;
8144 if (branch_type == ST_BRANCH_TO_THUMB)
8145 dynreloc_value |= 1;
8146
8147 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8148 VALUE appropriately for relocations that we resolve at link time. */
8149 has_iplt_entry = FALSE;
8150 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8151 && root_plt->offset != (bfd_vma) -1)
8152 {
8153 plt_offset = root_plt->offset;
8154 gotplt_offset = arm_plt->got_offset;
8155
8156 if (h == NULL || eh->is_iplt)
8157 {
8158 has_iplt_entry = TRUE;
8159 splt = globals->root.iplt;
8160
8161 /* Populate .iplt entries here, because not all of them will
8162 be seen by finish_dynamic_symbol. The lower bit is set if
8163 we have already populated the entry. */
8164 if (plt_offset & 1)
8165 plt_offset--;
8166 else
8167 {
8168 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8169 -1, dynreloc_value);
8170 root_plt->offset |= 1;
8171 }
8172
8173 /* Static relocations always resolve to the .iplt entry. */
8174 st_type = STT_FUNC;
8175 value = (splt->output_section->vma
8176 + splt->output_offset
8177 + plt_offset);
8178 branch_type = ST_BRANCH_TO_ARM;
8179
8180 /* If there are non-call relocations that resolve to the .iplt
8181 entry, then all dynamic ones must too. */
8182 if (arm_plt->noncall_refcount != 0)
8183 {
8184 dynreloc_st_type = st_type;
8185 dynreloc_value = value;
8186 }
8187 }
8188 else
8189 /* We populate the .plt entry in finish_dynamic_symbol. */
8190 splt = globals->root.splt;
8191 }
8192 else
8193 {
8194 splt = NULL;
8195 plt_offset = (bfd_vma) -1;
8196 gotplt_offset = (bfd_vma) -1;
8197 }
8198
252b5132
RH		 8199 switch (r_type)
8200 {
8201 case R_ARM_NONE:
28a094c2
DJ		 8202 /* We don't need to find a value for this symbol. It's just a
8203 marker. */
8204 *unresolved_reloc_p = FALSE;
252b5132
RH		 8205 return bfd_reloc_ok;
8206
00a97672
RS		 8207 case R_ARM_ABS12:
8208 if (!globals->vxworks_p)
8209 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8210
252b5132
RH		 8211 case R_ARM_PC24:
8212 case R_ARM_ABS32:
bb224fc3 8213 case R_ARM_ABS32_NOI:
252b5132 8214 case R_ARM_REL32:
bb224fc3 8215 case R_ARM_REL32_NOI:
5b5bb741
PB		 8216 case R_ARM_CALL:
8217 case R_ARM_JUMP24:
dfc5f959 8218 case R_ARM_XPC25:
eb043451 8219 case R_ARM_PREL31:
7359ea65 8220 case R_ARM_PLT32:
7359ea65
DJ		 8221 /* Handle relocations which should use the PLT entry. ABS32/REL32
8222 will use the symbol's value, which may point to a PLT entry, but we
8223 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8224 branches in this object should go to it, except if the PLT is too
8225 far away, in which case a long branch stub should be inserted. */
bb224fc3 8226 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
99059e56 8227 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8228 && r_type != R_ARM_CALL
8229 && r_type != R_ARM_JUMP24
8230 && r_type != R_ARM_PLT32)
34e77a92 8231 && plt_offset != (bfd_vma) -1)
7359ea65 8232 {
34e77a92
RS		 8233 /* If we've created a .plt section, and assigned a PLT entry
8234 to this function, it must either be a STT_GNU_IFUNC reference
8235 or not be known to bind locally. In other cases, we should
8236 have cleared the PLT entry by now. */
8237 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8238
8239 value = (splt->output_section->vma
8240 + splt->output_offset
34e77a92 8241 + plt_offset);
0945cdfd 8242 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8243 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8244 contents, rel->r_offset, value,
00a97672 8245 rel->r_addend);
7359ea65
DJ		 8246 }
8247
67687978
PB		 8248 /* When generating a shared object or relocatable executable, these
8249 relocations are copied into the output file to be resolved at
8250 run time. */
8251 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8252 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8253 && !(globals->vxworks_p
3348747a
NS		 8254 && strcmp (input_section->output_section->name,
8255 ".tls_vars") == 0)
bb224fc3 8256 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8257 || !SYMBOL_CALLS_LOCAL (info, h))
ca6b5f82
AM		 8258 && !(input_bfd == globals->stub_bfd
8259 && strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8260 && (h == NULL
8261 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8262 || h->root.type != bfd_link_hash_undefweak)
8263 && r_type != R_ARM_PC24
5b5bb741
PB		 8264 && r_type != R_ARM_CALL
8265 && r_type != R_ARM_JUMP24
ee06dc07 8266 && r_type != R_ARM_PREL31
7359ea65 8267 && r_type != R_ARM_PLT32)
252b5132 8268 {
947216bf 8269 Elf_Internal_Rela outrel;
b34976b6 8270 bfd_boolean skip, relocate;
f21f3fe0 8271
0945cdfd
DJ		 8272 *unresolved_reloc_p = FALSE;
8273
34e77a92 8274 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8275 {
83bac4b0
NC		 8276 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8277 ! globals->use_rel);
f21f3fe0 8278
83bac4b0 8279 if (sreloc == NULL)
252b5132 8280 return bfd_reloc_notsupported;
252b5132 8281 }
f21f3fe0 8282
b34976b6
AM		 8283 skip = FALSE;
8284 relocate = FALSE;
f21f3fe0 8285
00a97672 8286 outrel.r_addend = addend;
c629eae0
JJ		 8287 outrel.r_offset =
8288 _bfd_elf_section_offset (output_bfd, info, input_section,
8289 rel->r_offset);
8290 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8291 skip = TRUE;
0bb2d96a 8292 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8293 skip = TRUE, relocate = TRUE;
252b5132
RH		 8294 outrel.r_offset += (input_section->output_section->vma
8295 + input_section->output_offset);
f21f3fe0 8296
252b5132 8297 if (skip)
0bb2d96a 8298 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8299 else if (h != NULL
8300 && h->dynindx != -1
7359ea65 8301 && (!info->shared
5e681ec4 8302 || !info->symbolic
f5385ebf 8303 || !h->def_regular))
5e681ec4 8304 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8305 else
8306 {
a16385dc
MM		 8307 int symbol;
8308
5e681ec4 8309 /* This symbol is local, or marked to become local. */
34e77a92 8310 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8311 if (globals->symbian_p)
6366ff1e 8312 {
74541ad4
AM		 8313 asection *osec;
8314
6366ff1e
MM		 8315 /* On Symbian OS, the data segment and text segement
8316 can be relocated independently. Therefore, we
8317 must indicate the segment to which this
8318 relocation is relative. The BPABI allows us to
8319 use any symbol in the right segment; we just use
8320 the section symbol as it is convenient. (We
8321 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8322 will not appear in the dynamic symbol table.)
8323
8324 Note that the dynamic linker ignores the section
8325 symbol value, so we don't subtract osec->vma
8326 from the emitted reloc addend. */
10dbd1f3 8327 if (sym_sec)
74541ad4 8328 osec = sym_sec->output_section;
10dbd1f3 8329 else
74541ad4
AM		 8330 osec = input_section->output_section;
8331 symbol = elf_section_data (osec)->dynindx;
8332 if (symbol == 0)
8333 {
8334 struct elf_link_hash_table *htab = elf_hash_table (info);
8335
8336 if ((osec->flags & SEC_READONLY) == 0
8337 && htab->data_index_section != NULL)
8338 osec = htab->data_index_section;
8339 else
8340 osec = htab->text_index_section;
8341 symbol = elf_section_data (osec)->dynindx;
8342 }
6366ff1e
MM		 8343 BFD_ASSERT (symbol != 0);
8344 }
a16385dc
MM		 8345 else
8346 /* On SVR4-ish systems, the dynamic loader cannot
8347 relocate the text and data segments independently,
8348 so the symbol does not matter. */
8349 symbol = 0;
34e77a92
RS		 8350 if (dynreloc_st_type == STT_GNU_IFUNC)
8351 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8352 to the .iplt entry. Instead, every non-call reference
8353 must use an R_ARM_IRELATIVE relocation to obtain the
8354 correct run-time address. */
8355 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8356 else
8357 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8358 if (globals->use_rel)
8359 relocate = TRUE;
8360 else
34e77a92 8361 outrel.r_addend += dynreloc_value;
252b5132 8362 }
f21f3fe0 8363
47beaa6a 8364 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8365
f21f3fe0 8366 /* If this reloc is against an external symbol, we do not want to
252b5132 8367 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8368 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8369 if (! relocate)
8370 return bfd_reloc_ok;
9a5aca8c 8371
f21f3fe0 8372 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8373 contents, rel->r_offset,
8374 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8375 }
8376 else switch (r_type)
8377 {
00a97672
RS		 8378 case R_ARM_ABS12:
8379 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8380
dfc5f959 8381 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8382 case R_ARM_CALL:
8383 case R_ARM_JUMP24:
8029a119 8384 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8385 case R_ARM_PLT32:
906e58ca 8386 {
906e58ca
NC		 8387 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8388
dfc5f959 8389 if (r_type == R_ARM_XPC25)
252b5132 8390 {
dfc5f959
NC		 8391 /* Check for Arm calling Arm function. */
8392 /* FIXME: Should we translate the instruction into a BL
8393 instruction instead ? */
35fc36a8 8394 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8395 (*_bfd_error_handler)
8396 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8397 input_bfd,
8398 h ? h->root.root.string : "(local)");
dfc5f959 8399 }
155d87d7 8400 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8401 {
8402 /* Check for Arm calling Thumb function. */
35fc36a8 8403 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8404 {
f2a9dd69
DJ		 8405 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8406 output_bfd, input_section,
8407 hit_data, sym_sec, rel->r_offset,
8408 signed_addend, value,
8409 error_message))
8410 return bfd_reloc_ok;
8411 else
8412 return bfd_reloc_dangerous;
dfc5f959 8413 }
252b5132 8414 }
ba96a88f 8415
906e58ca 8416 /* Check if a stub has to be inserted because the
8029a119 8417 destination is too far or we are changing mode. */
155d87d7
CL		 8418 if ( r_type == R_ARM_CALL
8419 || r_type == R_ARM_JUMP24
8420 || r_type == R_ARM_PLT32)
906e58ca 8421 {
fe33d2fa
CL		 8422 enum elf32_arm_stub_type stub_type = arm_stub_none;
8423 struct elf32_arm_link_hash_entry *hash;
8424
8425 hash = (struct elf32_arm_link_hash_entry *) h;
8426 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8427 st_type, &branch_type,
8428 hash, value, sym_sec,
fe33d2fa 8429 input_bfd, sym_name);
5fa9e92f 8430
fe33d2fa 8431 if (stub_type != arm_stub_none)
906e58ca
NC		 8432 {
8433 /* The target is out of reach, so redirect the
8434 branch to the local stub for this function. */
906e58ca
NC		 8435 stub_entry = elf32_arm_get_stub_entry (input_section,
8436 sym_sec, h,
fe33d2fa
CL		 8437 rel, globals,
8438 stub_type);
9cd3e4e5
NC		 8439 {
8440 if (stub_entry != NULL)
8441 value = (stub_entry->stub_offset
8442 + stub_entry->stub_sec->output_offset
8443 + stub_entry->stub_sec->output_section->vma);
8444
8445 if (plt_offset != (bfd_vma) -1)
8446 *unresolved_reloc_p = FALSE;
8447 }
906e58ca 8448 }
fe33d2fa
CL		 8449 else
8450 {
8451 /* If the call goes through a PLT entry, make sure to
8452 check distance to the right destination address. */
34e77a92 8453 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8454 {
8455 value = (splt->output_section->vma
8456 + splt->output_offset
34e77a92 8457 + plt_offset);
fe33d2fa
CL		 8458 *unresolved_reloc_p = FALSE;
8459 /* The PLT entry is in ARM mode, regardless of the
8460 target function. */
35fc36a8 8461 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8462 }
8463 }
906e58ca
NC		 8464 }
8465
dea514f5
PB		 8466 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8467 where:
8468 S is the address of the symbol in the relocation.
8469 P is address of the instruction being relocated.
8470 A is the addend (extracted from the instruction) in bytes.
8471
8472 S is held in 'value'.
8473 P is the base address of the section containing the
8474 instruction plus the offset of the reloc into that
8475 section, ie:
8476 (input_section->output_section->vma +
8477 input_section->output_offset +
8478 rel->r_offset).
8479 A is the addend, converted into bytes, ie:
8480 (signed_addend * 4)
8481
8482 Note: None of these operations have knowledge of the pipeline
8483 size of the processor, thus it is up to the assembler to
8484 encode this information into the addend. */
8485 value -= (input_section->output_section->vma
8486 + input_section->output_offset);
8487 value -= rel->r_offset;
4e7fd91e
PB		 8488 if (globals->use_rel)
8489 value += (signed_addend << howto->size);
8490 else
8491 /* RELA addends do not have to be adjusted by howto->size. */
8492 value += signed_addend;
23080146 8493
dcb5e6e6
NC		 8494 signed_addend = value;
8495 signed_addend >>= howto->rightshift;
9a5aca8c 8496
5ab79981 8497 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8498 the next instruction unless a PLT entry will be created.
77b4f08f 8499 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8500 The jump to the next instruction is optimized as a NOP depending
8501 on the architecture. */
ffcb4889 8502 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8503 && plt_offset == (bfd_vma) -1)
77b4f08f 8504 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8505 {
cd1dac3d
DG		 8506 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8507
8508 if (arch_has_arm_nop (globals))
8509 value |= 0x0320f000;
8510 else
8511 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8512 }
8513 else
59f2c4e7 8514 {
9b485d32 8515 /* Perform a signed range check. */
dcb5e6e6 8516 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8517 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8518 return bfd_reloc_overflow;
9a5aca8c 8519
5ab79981 8520 addend = (value & 2);
39b41c9c 8521
5ab79981
PB		 8522 value = (signed_addend & howto->dst_mask)
8523 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8524
5ab79981
PB		 8525 if (r_type == R_ARM_CALL)
8526 {
155d87d7 8527 /* Set the H bit in the BLX instruction. */
35fc36a8 8528 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8529 {
8530 if (addend)
8531 value |= (1 << 24);
8532 else
8533 value &= ~(bfd_vma)(1 << 24);
8534 }
8535
5ab79981 8536 /* Select the correct instruction (BL or BLX). */
906e58ca 8537 /* Only if we are not handling a BL to a stub. In this
8029a119 8538 case, mode switching is performed by the stub. */
35fc36a8 8539 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8540 value |= (1 << 28);
63e1a0fc 8541 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8542 {
8543 value &= ~(bfd_vma)(1 << 28);
8544 value |= (1 << 24);
8545 }
39b41c9c
PB		 8546 }
8547 }
906e58ca 8548 }
252b5132 8549 break;
f21f3fe0 8550
252b5132
RH		 8551 case R_ARM_ABS32:
8552 value += addend;
35fc36a8 8553 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8554 value |= 1;
8555 break;
f21f3fe0 8556
bb224fc3
MS		 8557 case R_ARM_ABS32_NOI:
8558 value += addend;
8559 break;
8560
252b5132 8561 case R_ARM_REL32:
a8bc6c78 8562 value += addend;
35fc36a8 8563 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8564 value |= 1;
252b5132 8565 value -= (input_section->output_section->vma
62efb346 8566 + input_section->output_offset + rel->r_offset);
252b5132 8567 break;
eb043451 8568
bb224fc3
MS		 8569 case R_ARM_REL32_NOI:
8570 value += addend;
8571 value -= (input_section->output_section->vma
8572 + input_section->output_offset + rel->r_offset);
8573 break;
8574
eb043451
PB		 8575 case R_ARM_PREL31:
8576 value -= (input_section->output_section->vma
8577 + input_section->output_offset + rel->r_offset);
8578 value += signed_addend;
8579 if (! h || h->root.type != bfd_link_hash_undefweak)
8580 {
8029a119 8581 /* Check for overflow. */
eb043451
PB		 8582 if ((value ^ (value >> 1)) & (1 << 30))
8583 return bfd_reloc_overflow;
8584 }
8585 value &= 0x7fffffff;
8586 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8587 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8588 value |= 1;
8589 break;
252b5132 8590 }
f21f3fe0 8591
252b5132
RH		 8592 bfd_put_32 (input_bfd, value, hit_data);
8593 return bfd_reloc_ok;
8594
8595 case R_ARM_ABS8:
8596 value += addend;
4e67d4ca
DG		 8597
8598 /* There is no way to tell whether the user intended to use a signed or
8599 unsigned addend. When checking for overflow we accept either,
8600 as specified by the AAELF. */
8601 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8602 return bfd_reloc_overflow;
8603
8604 bfd_put_8 (input_bfd, value, hit_data);
8605 return bfd_reloc_ok;
8606
8607 case R_ARM_ABS16:
8608 value += addend;
8609
4e67d4ca
DG		 8610 /* See comment for R_ARM_ABS8. */
8611 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8612 return bfd_reloc_overflow;
8613
8614 bfd_put_16 (input_bfd, value, hit_data);
8615 return bfd_reloc_ok;
8616
252b5132 8617 case R_ARM_THM_ABS5:
9b485d32 8618 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8619 if (globals->use_rel)
8620 {
8621 /* Need to refetch addend. */
8622 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8623 /* ??? Need to determine shift amount from operand size. */
8624 addend >>= howto->rightshift;
8625 }
252b5132
RH		 8626 value += addend;
8627
8628 /* ??? Isn't value unsigned? */
8629 if ((long) value > 0x1f || (long) value < -0x10)
8630 return bfd_reloc_overflow;
8631
8632 /* ??? Value needs to be properly shifted into place first. */
8633 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8634 bfd_put_16 (input_bfd, value, hit_data);
8635 return bfd_reloc_ok;
8636
2cab6cc3
MS		 8637 case R_ARM_THM_ALU_PREL_11_0:
8638 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8639 {
8640 bfd_vma insn;
8641 bfd_signed_vma relocation;
8642
8643 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8644 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8645
99059e56
RM		 8646 if (globals->use_rel)
8647 {
8648 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8649 | ((insn & (1 << 26)) >> 15);
8650 if (insn & 0xf00000)
8651 signed_addend = -signed_addend;
8652 }
2cab6cc3
MS		 8653
8654 relocation = value + signed_addend;
79f08007 8655 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8656 + input_section->output_offset
8657 + rel->r_offset);
2cab6cc3 8658
99059e56 8659 value = abs (relocation);
2cab6cc3 8660
99059e56
RM		 8661 if (value >= 0x1000)
8662 return bfd_reloc_overflow;
2cab6cc3
MS		 8663
8664 insn = (insn & 0xfb0f8f00) | (value & 0xff)
99059e56
RM		 8665 | ((value & 0x700) << 4)
8666 | ((value & 0x800) << 15);
8667 if (relocation < 0)
8668 insn |= 0xa00000;
2cab6cc3
MS		 8669
8670 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8671 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8672
99059e56 8673 return bfd_reloc_ok;
2cab6cc3
MS		 8674 }
8675
e1ec24c6
NC		 8676 case R_ARM_THM_PC8:
8677 /* PR 10073: This reloc is not generated by the GNU toolchain,
8678 but it is supported for compatibility with third party libraries
8679 generated by other compilers, specifically the ARM/IAR. */
8680 {
8681 bfd_vma insn;
8682 bfd_signed_vma relocation;
8683
8684 insn = bfd_get_16 (input_bfd, hit_data);
8685
99059e56 8686 if (globals->use_rel)
79f08007 8687 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
e1ec24c6
NC		 8688
8689 relocation = value + addend;
79f08007 8690 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8691 + input_section->output_offset
8692 + rel->r_offset);
e1ec24c6 8693
99059e56 8694 value = abs (relocation);
e1ec24c6
NC		 8695
8696 /* We do not check for overflow of this reloc. Although strictly
8697 speaking this is incorrect, it appears to be necessary in order
8698 to work with IAR generated relocs. Since GCC and GAS do not
8699 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8700 a problem for them. */
8701 value &= 0x3fc;
8702
8703 insn = (insn & 0xff00) | (value >> 2);
8704
8705 bfd_put_16 (input_bfd, insn, hit_data);
8706
99059e56 8707 return bfd_reloc_ok;
e1ec24c6
NC		 8708 }
8709
2cab6cc3
MS		 8710 case R_ARM_THM_PC12:
8711 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8712 {
8713 bfd_vma insn;
8714 bfd_signed_vma relocation;
8715
8716 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8717 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8718
99059e56
RM		 8719 if (globals->use_rel)
8720 {
8721 signed_addend = insn & 0xfff;
8722 if (!(insn & (1 << 23)))
8723 signed_addend = -signed_addend;
8724 }
2cab6cc3
MS		 8725
8726 relocation = value + signed_addend;
79f08007 8727 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8728 + input_section->output_offset
8729 + rel->r_offset);
2cab6cc3 8730
99059e56 8731 value = abs (relocation);
2cab6cc3 8732
99059e56
RM		 8733 if (value >= 0x1000)
8734 return bfd_reloc_overflow;
2cab6cc3
MS		 8735
8736 insn = (insn & 0xff7ff000) | value;
99059e56
RM		 8737 if (relocation >= 0)
8738 insn |= (1 << 23);
2cab6cc3
MS		 8739
8740 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8741 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8742
99059e56 8743 return bfd_reloc_ok;
2cab6cc3
MS		 8744 }
8745
dfc5f959 8746 case R_ARM_THM_XPC22:
c19d1205 8747 case R_ARM_THM_CALL:
bd97cb95 8748 case R_ARM_THM_JUMP24:
dfc5f959 8749 /* Thumb BL (branch long instruction). */
252b5132 8750 {
b34976b6 8751 bfd_vma relocation;
99059e56 8752 bfd_vma reloc_sign;
b34976b6
AM		 8753 bfd_boolean overflow = FALSE;
8754 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8755 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8756 bfd_signed_vma reloc_signed_max;
8757 bfd_signed_vma reloc_signed_min;
b34976b6 8758 bfd_vma check;
252b5132 8759 bfd_signed_vma signed_check;
e95de063 8760 int bitsize;
cd1dac3d 8761 const int thumb2 = using_thumb2 (globals);
252b5132 8762
5ab79981 8763 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8764 the next instruction unless a PLT entry will be created.
8765 The jump to the next instruction is optimized as a NOP.W for
8766 Thumb-2 enabled architectures. */
19540007 8767 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8768 && plt_offset == (bfd_vma) -1)
5ab79981 8769 {
cd1dac3d
DG		 8770 if (arch_has_thumb2_nop (globals))
8771 {
8772 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8773 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8774 }
8775 else
8776 {
8777 bfd_put_16 (input_bfd, 0xe000, hit_data);
8778 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8779 }
5ab79981
PB		 8780 return bfd_reloc_ok;
8781 }
8782
e95de063 8783 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
99059e56 8784 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8785 if (globals->use_rel)
8786 {
99059e56
RM		 8787 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8788 bfd_vma upper = upper_insn & 0x3ff;
8789 bfd_vma lower = lower_insn & 0x7ff;
e95de063
MS		 8790 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8791 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
99059e56
RM		 8792 bfd_vma i1 = j1 ^ s ? 0 : 1;
8793 bfd_vma i2 = j2 ^ s ? 0 : 1;
e95de063 8794
99059e56
RM		 8795 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8796 /* Sign extend. */
8797 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
e95de063 8798
4e7fd91e
PB		 8799 signed_addend = addend;
8800 }
cb1afa5c 8801
dfc5f959
NC		 8802 if (r_type == R_ARM_THM_XPC22)
8803 {
8804 /* Check for Thumb to Thumb call. */
8805 /* FIXME: Should we translate the instruction into a BL
8806 instruction instead ? */
35fc36a8 8807 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8808 (*_bfd_error_handler)
8809 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8810 input_bfd,
8811 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8812 }
8813 else
252b5132 8814 {
dfc5f959
NC		 8815 /* If it is not a call to Thumb, assume call to Arm.
8816 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8817 function call at all, but rather a long jump. Calls through
8818 the PLT do not require stubs. */
34e77a92 8819 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8820 {
bd97cb95 8821 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8822 {
8823 /* Convert BL to BLX. */
8824 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8825 }
155d87d7
CL		 8826 else if (( r_type != R_ARM_THM_CALL)
8827 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8828 {
8829 if (elf32_thumb_to_arm_stub
8830 (info, sym_name, input_bfd, output_bfd, input_section,
8831 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8832 error_message))
8833 return bfd_reloc_ok;
8834 else
8835 return bfd_reloc_dangerous;
8836 }
da5938a2 8837 }
35fc36a8
RS		 8838 else if (branch_type == ST_BRANCH_TO_THUMB
8839 && globals->use_blx
bd97cb95 8840 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8841 {
8842 /* Make sure this is a BL. */
8843 lower_insn |= 0x1800;
8844 }
252b5132 8845 }
f21f3fe0 8846
fe33d2fa 8847 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8848 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8849 {
8850 /* Check if a stub has to be inserted because the destination
8029a119 8851 is too far. */
fe33d2fa
CL		 8852 struct elf32_arm_stub_hash_entry *stub_entry;
8853 struct elf32_arm_link_hash_entry *hash;
8854
8855 hash = (struct elf32_arm_link_hash_entry *) h;
8856
8857 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8858 st_type, &branch_type,
8859 hash, value, sym_sec,
fe33d2fa
CL		 8860 input_bfd, sym_name);
8861
8862 if (stub_type != arm_stub_none)
906e58ca
NC		 8863 {
8864 /* The target is out of reach or we are changing modes, so
8865 redirect the branch to the local stub for this
8866 function. */
8867 stub_entry = elf32_arm_get_stub_entry (input_section,
8868 sym_sec, h,
fe33d2fa
CL		 8869 rel, globals,
8870 stub_type);
906e58ca 8871 if (stub_entry != NULL)
9cd3e4e5
NC		 8872 {
8873 value = (stub_entry->stub_offset
8874 + stub_entry->stub_sec->output_offset
8875 + stub_entry->stub_sec->output_section->vma);
8876
8877 if (plt_offset != (bfd_vma) -1)
8878 *unresolved_reloc_p = FALSE;
8879 }
906e58ca 8880
f4ac8484 8881 /* If this call becomes a call to Arm, force BLX. */
155d87d7 8882 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 8883 {
8884 if ((stub_entry
8885 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 8886 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 8887 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8888 }
906e58ca
NC		 8889 }
8890 }
8891
fe33d2fa 8892 /* Handle calls via the PLT. */
34e77a92 8893 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8894 {
8895 value = (splt->output_section->vma
8896 + splt->output_offset
34e77a92 8897 + plt_offset);
fe33d2fa
CL		 8898
8899 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8900 {
8901 /* If the Thumb BLX instruction is available, convert
8902 the BL to a BLX instruction to call the ARM-mode
8903 PLT entry. */
8904 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8905 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8906 }
8907 else
8908 {
8909 /* Target the Thumb stub before the ARM PLT entry. */
8910 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8911 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8912 }
8913 *unresolved_reloc_p = FALSE;
8914 }
8915
ba96a88f 8916 relocation = value + signed_addend;
f21f3fe0 8917
252b5132 8918 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8919 + input_section->output_offset
8920 + rel->r_offset);
9a5aca8c 8921
252b5132
RH		 8922 check = relocation >> howto->rightshift;
8923
8924 /* If this is a signed value, the rightshift just dropped
8925 leading 1 bits (assuming twos complement). */
8926 if ((bfd_signed_vma) relocation >= 0)
8927 signed_check = check;
8928 else
8929 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8930
e95de063
MS		 8931 /* Calculate the permissable maximum and minimum values for
8932 this relocation according to whether we're relocating for
8933 Thumb-2 or not. */
8934 bitsize = howto->bitsize;
8935 if (!thumb2)
8936 bitsize -= 2;
f6ebfac0 8937 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8938 reloc_signed_min = ~reloc_signed_max;
8939
252b5132 8940 /* Assumes two's complement. */
ba96a88f 8941 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8942 overflow = TRUE;
252b5132 8943
bd97cb95 8944 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8945 /* For a BLX instruction, make sure that the relocation is rounded up
8946 to a word boundary. This follows the semantics of the instruction
8947 which specifies that bit 1 of the target address will come from bit
8948 1 of the base address. */
8949 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8950
e95de063
MS		 8951 /* Put RELOCATION back into the insn. Assumes two's complement.
8952 We use the Thumb-2 encoding, which is safe even if dealing with
8953 a Thumb-1 instruction by virtue of our overflow check above. */
99059e56 8954 reloc_sign = (signed_check < 0) ? 1 : 0;
e95de063 8955 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
99059e56
RM		 8956 | ((relocation >> 12) & 0x3ff)
8957 | (reloc_sign << 10);
906e58ca 8958 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
99059e56
RM		 8959 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8960 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8961 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8962
252b5132
RH		 8963 /* Put the relocated value back in the object file: */
8964 bfd_put_16 (input_bfd, upper_insn, hit_data);
8965 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8966
8967 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8968 }
8969 break;
8970
c19d1205
ZW		 8971 case R_ARM_THM_JUMP19:
8972 /* Thumb32 conditional branch instruction. */
8973 {
8974 bfd_vma relocation;
8975 bfd_boolean overflow = FALSE;
8976 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8977 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8978 bfd_signed_vma reloc_signed_max = 0xffffe;
8979 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8980 bfd_signed_vma signed_check;
8981
8982 /* Need to refetch the addend, reconstruct the top three bits,
8983 and squish the two 11 bit pieces together. */
8984 if (globals->use_rel)
8985 {
8986 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 8987 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 8988 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8989 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8990 bfd_vma lower = (lower_insn & 0x07ff);
8991
a00a1f35
MS		 8992 upper |= J1 << 6;
8993 upper |= J2 << 7;
8994 upper |= (!S) << 8;
c19d1205
ZW		 8995 upper -= 0x0100; /* Sign extend. */
8996
8997 addend = (upper << 12) | (lower << 1);
8998 signed_addend = addend;
8999 }
9000
bd97cb95 9001 /* Handle calls via the PLT. */
34e77a92 9002 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 9003 {
9004 value = (splt->output_section->vma
9005 + splt->output_offset
34e77a92 9006 + plt_offset);
bd97cb95
DJ		 9007 /* Target the Thumb stub before the ARM PLT entry. */
9008 value -= PLT_THUMB_STUB_SIZE;
9009 *unresolved_reloc_p = FALSE;
9010 }
9011
c19d1205
ZW		 9012 /* ??? Should handle interworking? GCC might someday try to
9013 use this for tail calls. */
9014
99059e56 9015 relocation = value + signed_addend;
c19d1205
ZW		 9016 relocation -= (input_section->output_section->vma
9017 + input_section->output_offset
9018 + rel->r_offset);
a00a1f35 9019 signed_check = (bfd_signed_vma) relocation;
c19d1205 9020
c19d1205
ZW		 9021 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9022 overflow = TRUE;
9023
9024 /* Put RELOCATION back into the insn. */
9025 {
9026 bfd_vma S = (relocation & 0x00100000) >> 20;
9027 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9028 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9029 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9030 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9031
a00a1f35 9032 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 9033 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9034 }
9035
9036 /* Put the relocated value back in the object file: */
9037 bfd_put_16 (input_bfd, upper_insn, hit_data);
9038 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9039
9040 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9041 }
9042
9043 case R_ARM_THM_JUMP11:
9044 case R_ARM_THM_JUMP8:
9045 case R_ARM_THM_JUMP6:
51c5503b
NC		 9046 /* Thumb B (branch) instruction). */
9047 {
6cf9e9fe 9048 bfd_signed_vma relocation;
51c5503b
NC		 9049 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9050 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 9051 bfd_signed_vma signed_check;
9052
c19d1205
ZW		 9053 /* CZB cannot jump backward. */
9054 if (r_type == R_ARM_THM_JUMP6)
9055 reloc_signed_min = 0;
9056
4e7fd91e 9057 if (globals->use_rel)
6cf9e9fe 9058 {
4e7fd91e
PB		 9059 /* Need to refetch addend. */
9060 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9061 if (addend & ((howto->src_mask + 1) >> 1))
9062 {
9063 signed_addend = -1;
9064 signed_addend &= ~ howto->src_mask;
9065 signed_addend |= addend;
9066 }
9067 else
9068 signed_addend = addend;
9069 /* The value in the insn has been right shifted. We need to
9070 undo this, so that we can perform the address calculation
9071 in terms of bytes. */
9072 signed_addend <<= howto->rightshift;
6cf9e9fe 9073 }
6cf9e9fe 9074 relocation = value + signed_addend;
51c5503b
NC		 9075
9076 relocation -= (input_section->output_section->vma
9077 + input_section->output_offset
9078 + rel->r_offset);
9079
6cf9e9fe
NC		 9080 relocation >>= howto->rightshift;
9081 signed_check = relocation;
c19d1205
ZW		 9082
9083 if (r_type == R_ARM_THM_JUMP6)
9084 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9085 else
9086 relocation &= howto->dst_mask;
51c5503b 9087 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 9088
51c5503b
NC		 9089 bfd_put_16 (input_bfd, relocation, hit_data);
9090
9091 /* Assumes two's complement. */
9092 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9093 return bfd_reloc_overflow;
9094
9095 return bfd_reloc_ok;
9096 }
cedb70c5 9097
8375c36b
PB		 9098 case R_ARM_ALU_PCREL7_0:
9099 case R_ARM_ALU_PCREL15_8:
9100 case R_ARM_ALU_PCREL23_15:
9101 {
9102 bfd_vma insn;
9103 bfd_vma relocation;
9104
9105 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 9106 if (globals->use_rel)
9107 {
9108 /* Extract the addend. */
9109 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9110 signed_addend = addend;
9111 }
8375c36b
PB		 9112 relocation = value + signed_addend;
9113
9114 relocation -= (input_section->output_section->vma
9115 + input_section->output_offset
9116 + rel->r_offset);
9117 insn = (insn & ~0xfff)
9118 | ((howto->bitpos << 7) & 0xf00)
9119 | ((relocation >> howto->bitpos) & 0xff);
9120 bfd_put_32 (input_bfd, value, hit_data);
9121 }
9122 return bfd_reloc_ok;
9123
252b5132
RH		 9124 case R_ARM_GNU_VTINHERIT:
9125 case R_ARM_GNU_VTENTRY:
9126 return bfd_reloc_ok;
9127
c19d1205 9128 case R_ARM_GOTOFF32:
252b5132 9129 /* Relocation is relative to the start of the
99059e56 9130 global offset table. */
252b5132
RH		 9131
9132 BFD_ASSERT (sgot != NULL);
9133 if (sgot == NULL)
99059e56 9134 return bfd_reloc_notsupported;
9a5aca8c 9135
cedb70c5 9136 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 9137 address by one, so that attempts to call the function pointer will
9138 correctly interpret it as Thumb code. */
35fc36a8 9139 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 9140 value += 1;
9141
252b5132 9142 /* Note that sgot->output_offset is not involved in this
99059e56
RM		 9143 calculation. We always want the start of .got. If we
9144 define _GLOBAL_OFFSET_TABLE in a different way, as is
9145 permitted by the ABI, we might have to change this
9146 calculation. */
252b5132 9147 value -= sgot->output_section->vma;
f21f3fe0 9148 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9149 contents, rel->r_offset, value,
00a97672 9150 rel->r_addend);
252b5132
RH		 9151
9152 case R_ARM_GOTPC:
a7c10850 9153 /* Use global offset table as symbol value. */
252b5132 9154 BFD_ASSERT (sgot != NULL);
f21f3fe0 9155
252b5132 9156 if (sgot == NULL)
99059e56 9157 return bfd_reloc_notsupported;
252b5132 9158
0945cdfd 9159 *unresolved_reloc_p = FALSE;
252b5132 9160 value = sgot->output_section->vma;
f21f3fe0 9161 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9162 contents, rel->r_offset, value,
00a97672 9163 rel->r_addend);
f21f3fe0 9164
252b5132 9165 case R_ARM_GOT32:
eb043451 9166 case R_ARM_GOT_PREL:
252b5132 9167 /* Relocation is to the entry for this symbol in the
99059e56 9168 global offset table. */
252b5132
RH		 9169 if (sgot == NULL)
9170 return bfd_reloc_notsupported;
f21f3fe0 9171
34e77a92
RS		 9172 if (dynreloc_st_type == STT_GNU_IFUNC
9173 && plt_offset != (bfd_vma) -1
9174 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9175 {
9176 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9177 symbol, and the relocation resolves directly to the runtime
9178 target rather than to the .iplt entry. This means that any
9179 .got entry would be the same value as the .igot.plt entry,
9180 so there's no point creating both. */
9181 sgot = globals->root.igotplt;
9182 value = sgot->output_offset + gotplt_offset;
9183 }
9184 else if (h != NULL)
252b5132
RH		 9185 {
9186 bfd_vma off;
f21f3fe0 9187
252b5132
RH		 9188 off = h->got.offset;
9189 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9190 if ((off & 1) != 0)
252b5132 9191 {
b436d854
RS		 9192 /* We have already processsed one GOT relocation against
9193 this symbol. */
9194 off &= ~1;
9195 if (globals->root.dynamic_sections_created
9196 && !SYMBOL_REFERENCES_LOCAL (info, h))
9197 *unresolved_reloc_p = FALSE;
9198 }
9199 else
9200 {
9201 Elf_Internal_Rela outrel;
9202
6f820c85 9203 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 9204 {
9205 /* If the symbol doesn't resolve locally in a static
9206 object, we have an undefined reference. If the
9207 symbol doesn't resolve locally in a dynamic object,
9208 it should be resolved by the dynamic linker. */
9209 if (globals->root.dynamic_sections_created)
9210 {
9211 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9212 *unresolved_reloc_p = FALSE;
9213 }
9214 else
9215 outrel.r_info = 0;
9216 outrel.r_addend = 0;
9217 }
252b5132
RH		 9218 else
9219 {
34e77a92 9220 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9221 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
31943882
WN		 9222 else if (info->shared &&
9223 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9224 || h->root.type != bfd_link_hash_undefweak))
99059e56
RM		 9225 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9226 else
9227 outrel.r_info = 0;
34e77a92 9228 outrel.r_addend = dynreloc_value;
b436d854 9229 }
ee29b9fb 9230
b436d854
RS		 9231 /* The GOT entry is initialized to zero by default.
9232 See if we should install a different value. */
9233 if (outrel.r_addend != 0
9234 && (outrel.r_info == 0 || globals->use_rel))
9235 {
9236 bfd_put_32 (output_bfd, outrel.r_addend,
9237 sgot->contents + off);
9238 outrel.r_addend = 0;
252b5132 9239 }
f21f3fe0 9240
b436d854
RS		 9241 if (outrel.r_info != 0)
9242 {
9243 outrel.r_offset = (sgot->output_section->vma
9244 + sgot->output_offset
9245 + off);
9246 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9247 }
9248 h->got.offset |= 1;
9249 }
252b5132
RH		 9250 value = sgot->output_offset + off;
9251 }
9252 else
9253 {
9254 bfd_vma off;
f21f3fe0 9255
252b5132
RH		 9256 BFD_ASSERT (local_got_offsets != NULL &&
9257 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9258
252b5132 9259 off = local_got_offsets[r_symndx];
f21f3fe0 9260
252b5132
RH		 9261 /* The offset must always be a multiple of 4. We use the
9262 least significant bit to record whether we have already
9b485d32 9263 generated the necessary reloc. */
252b5132
RH		 9264 if ((off & 1) != 0)
9265 off &= ~1;
9266 else
9267 {
00a97672 9268 if (globals->use_rel)
34e77a92 9269 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9270
34e77a92 9271 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9272 {
947216bf 9273 Elf_Internal_Rela outrel;
f21f3fe0 9274
34e77a92 9275 outrel.r_addend = addend + dynreloc_value;
252b5132 9276 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9277 + sgot->output_offset
252b5132 9278 + off);
34e77a92 9279 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9280 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
34e77a92
RS		 9281 else
9282 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9283 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9284 }
f21f3fe0 9285
252b5132
RH		 9286 local_got_offsets[r_symndx] |= 1;
9287 }
f21f3fe0 9288
252b5132
RH		 9289 value = sgot->output_offset + off;
9290 }
eb043451
PB		 9291 if (r_type != R_ARM_GOT32)
9292 value += sgot->output_section->vma;
9a5aca8c 9293
f21f3fe0 9294 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9295 contents, rel->r_offset, value,
00a97672 9296 rel->r_addend);
f21f3fe0 9297
ba93b8ac
DJ		 9298 case R_ARM_TLS_LDO32:
9299 value = value - dtpoff_base (info);
9300
9301 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9302 contents, rel->r_offset, value,
9303 rel->r_addend);
ba93b8ac
DJ		 9304
9305 case R_ARM_TLS_LDM32:
9306 {
9307 bfd_vma off;
9308
362d30a1 9309 if (sgot == NULL)
ba93b8ac
DJ		 9310 abort ();
9311
9312 off = globals->tls_ldm_got.offset;
9313
9314 if ((off & 1) != 0)
9315 off &= ~1;
9316 else
9317 {
9318 /* If we don't know the module number, create a relocation
9319 for it. */
9320 if (info->shared)
9321 {
9322 Elf_Internal_Rela outrel;
ba93b8ac 9323
362d30a1 9324 if (srelgot == NULL)
ba93b8ac
DJ		 9325 abort ();
9326
00a97672 9327 outrel.r_addend = 0;
362d30a1
RS		 9328 outrel.r_offset = (sgot->output_section->vma
9329 + sgot->output_offset + off);
ba93b8ac
DJ		 9330 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9331
00a97672
RS		 9332 if (globals->use_rel)
9333 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9334 sgot->contents + off);
ba93b8ac 9335
47beaa6a 9336 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9337 }
9338 else
362d30a1 9339 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9340
9341 globals->tls_ldm_got.offset |= 1;
9342 }
9343
362d30a1 9344 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9345 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9346
9347 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9348 contents, rel->r_offset, value,
00a97672 9349 rel->r_addend);
ba93b8ac
DJ		 9350 }
9351
0855e32b
NS		 9352 case R_ARM_TLS_CALL:
9353 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9354 case R_ARM_TLS_GD32:
9355 case R_ARM_TLS_IE32:
0855e32b
NS		 9356 case R_ARM_TLS_GOTDESC:
9357 case R_ARM_TLS_DESCSEQ:
9358 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9359 {
0855e32b
NS		 9360 bfd_vma off, offplt;
9361 int indx = 0;
ba93b8ac
DJ		 9362 char tls_type;
9363
0855e32b 9364 BFD_ASSERT (sgot != NULL);
ba93b8ac 9365
ba93b8ac
DJ		 9366 if (h != NULL)
9367 {
9368 bfd_boolean dyn;
9369 dyn = globals->root.dynamic_sections_created;
9370 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9371 && (!info->shared
9372 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9373 {
9374 *unresolved_reloc_p = FALSE;
9375 indx = h->dynindx;
9376 }
9377 off = h->got.offset;
0855e32b 9378 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9379 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9380 }
9381 else
9382 {
0855e32b 9383 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9384 off = local_got_offsets[r_symndx];
0855e32b 9385 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9386 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9387 }
9388
0855e32b 9389 /* Linker relaxations happens from one of the
b38cadfb 9390 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
0855e32b 9391 if (ELF32_R_TYPE(rel->r_info) != r_type)
b38cadfb 9392 tls_type = GOT_TLS_IE;
0855e32b
NS		 9393
9394 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9395
9396 if ((off & 1) != 0)
9397 off &= ~1;
9398 else
9399 {
9400 bfd_boolean need_relocs = FALSE;
9401 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9402 int cur_off = off;
9403
9404 /* The GOT entries have not been initialized yet. Do it
9405 now, and emit any relocations. If both an IE GOT and a
9406 GD GOT are necessary, we emit the GD first. */
9407
9408 if ((info->shared || indx != 0)
9409 && (h == NULL
9410 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9411 || h->root.type != bfd_link_hash_undefweak))
9412 {
9413 need_relocs = TRUE;
0855e32b 9414 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9415 }
9416
0855e32b
NS		 9417 if (tls_type & GOT_TLS_GDESC)
9418 {
47beaa6a
RS		 9419 bfd_byte *loc;
9420
0855e32b
NS		 9421 /* We should have relaxed, unless this is an undefined
9422 weak symbol. */
9423 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9424 || info->shared);
9425 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
99059e56 9426 <= globals->root.sgotplt->size);
0855e32b
NS		 9427
9428 outrel.r_addend = 0;
9429 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9430 + globals->root.sgotplt->output_offset
9431 + offplt
9432 + globals->sgotplt_jump_table_size);
b38cadfb 9433
0855e32b
NS		 9434 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9435 sreloc = globals->root.srelplt;
9436 loc = sreloc->contents;
9437 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9438 BFD_ASSERT (loc + RELOC_SIZE (globals)
99059e56 9439 <= sreloc->contents + sreloc->size);
0855e32b
NS		 9440
9441 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9442
9443 /* For globals, the first word in the relocation gets
9444 the relocation index and the top bit set, or zero,
9445 if we're binding now. For locals, it gets the
9446 symbol's offset in the tls section. */
99059e56 9447 bfd_put_32 (output_bfd,
0855e32b
NS		 9448 !h ? value - elf_hash_table (info)->tls_sec->vma
9449 : info->flags & DF_BIND_NOW ? 0
9450 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
b38cadfb
NC		 9451 globals->root.sgotplt->contents + offplt
9452 + globals->sgotplt_jump_table_size);
9453
0855e32b 9454 /* Second word in the relocation is always zero. */
99059e56 9455 bfd_put_32 (output_bfd, 0,
b38cadfb
NC		 9456 globals->root.sgotplt->contents + offplt
9457 + globals->sgotplt_jump_table_size + 4);
0855e32b 9458 }
ba93b8ac
DJ		 9459 if (tls_type & GOT_TLS_GD)
9460 {
9461 if (need_relocs)
9462 {
00a97672 9463 outrel.r_addend = 0;
362d30a1
RS		 9464 outrel.r_offset = (sgot->output_section->vma
9465 + sgot->output_offset
00a97672 9466 + cur_off);
ba93b8ac 9467 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9468
00a97672
RS		 9469 if (globals->use_rel)
9470 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9471 sgot->contents + cur_off);
00a97672 9472
47beaa6a 9473 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9474
9475 if (indx == 0)
9476 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9477 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9478 else
9479 {
00a97672 9480 outrel.r_addend = 0;
ba93b8ac
DJ		 9481 outrel.r_info = ELF32_R_INFO (indx,
9482 R_ARM_TLS_DTPOFF32);
9483 outrel.r_offset += 4;
00a97672
RS		 9484
9485 if (globals->use_rel)
9486 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9487 sgot->contents + cur_off + 4);
00a97672 9488
47beaa6a
RS		 9489 elf32_arm_add_dynreloc (output_bfd, info,
9490 srelgot, &outrel);
ba93b8ac
DJ		 9491 }
9492 }
9493 else
9494 {
9495 /* If we are not emitting relocations for a
9496 general dynamic reference, then we must be in a
9497 static link or an executable link with the
9498 symbol binding locally. Mark it as belonging
9499 to module 1, the executable. */
9500 bfd_put_32 (output_bfd, 1,
362d30a1 9501 sgot->contents + cur_off);
ba93b8ac 9502 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9503 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9504 }
9505
9506 cur_off += 8;
9507 }
9508
9509 if (tls_type & GOT_TLS_IE)
9510 {
9511 if (need_relocs)
9512 {
00a97672
RS		 9513 if (indx == 0)
9514 outrel.r_addend = value - dtpoff_base (info);
9515 else
9516 outrel.r_addend = 0;
362d30a1
RS		 9517 outrel.r_offset = (sgot->output_section->vma
9518 + sgot->output_offset
ba93b8ac
DJ		 9519 + cur_off);
9520 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9521
00a97672
RS		 9522 if (globals->use_rel)
9523 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9524 sgot->contents + cur_off);
ba93b8ac 9525
47beaa6a 9526 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9527 }
9528 else
9529 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9530 sgot->contents + cur_off);
ba93b8ac
DJ		 9531 cur_off += 4;
9532 }
9533
9534 if (h != NULL)
9535 h->got.offset |= 1;
9536 else
9537 local_got_offsets[r_symndx] |= 1;
9538 }
9539
9540 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9541 off += 8;
0855e32b
NS		 9542 else if (tls_type & GOT_TLS_GDESC)
9543 off = offplt;
9544
9545 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9546 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9547 {
9548 bfd_signed_vma offset;
12352d3f
PB		 9549 /* TLS stubs are arm mode. The original symbol is a
9550 data object, so branch_type is bogus. */
9551 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9552 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9553 = arm_type_of_stub (info, input_section, rel,
9554 st_type, &branch_type,
0855e32b
NS		 9555 (struct elf32_arm_link_hash_entry *)h,
9556 globals->tls_trampoline, globals->root.splt,
9557 input_bfd, sym_name);
9558
9559 if (stub_type != arm_stub_none)
9560 {
9561 struct elf32_arm_stub_hash_entry *stub_entry
9562 = elf32_arm_get_stub_entry
9563 (input_section, globals->root.splt, 0, rel,
9564 globals, stub_type);
9565 offset = (stub_entry->stub_offset
9566 + stub_entry->stub_sec->output_offset
9567 + stub_entry->stub_sec->output_section->vma);
9568 }
9569 else
9570 offset = (globals->root.splt->output_section->vma
9571 + globals->root.splt->output_offset
9572 + globals->tls_trampoline);
9573
9574 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9575 {
9576 unsigned long inst;
b38cadfb
NC		 9577
9578 offset -= (input_section->output_section->vma
9579 + input_section->output_offset
9580 + rel->r_offset + 8);
0855e32b
NS		 9581
9582 inst = offset >> 2;
9583 inst &= 0x00ffffff;
9584 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9585 }
9586 else
9587 {
9588 /* Thumb blx encodes the offset in a complicated
9589 fashion. */
9590 unsigned upper_insn, lower_insn;
9591 unsigned neg;
9592
b38cadfb
NC		 9593 offset -= (input_section->output_section->vma
9594 + input_section->output_offset
0855e32b 9595 + rel->r_offset + 4);
b38cadfb 9596
12352d3f
PB		 9597 if (stub_type != arm_stub_none
9598 && arm_stub_is_thumb (stub_type))
9599 {
9600 lower_insn = 0xd000;
9601 }
9602 else
9603 {
9604 lower_insn = 0xc000;
9605 /* Round up the offset to a word boundary */
9606 offset = (offset + 2) & ~2;
9607 }
9608
0855e32b
NS		 9609 neg = offset < 0;
9610 upper_insn = (0xf000
9611 | ((offset >> 12) & 0x3ff)
9612 | (neg << 10));
12352d3f 9613 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9614 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9615 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9616 bfd_put_16 (input_bfd, upper_insn, hit_data);
9617 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9618 return bfd_reloc_ok;
9619 }
9620 }
9621 /* These relocations needs special care, as besides the fact
9622 they point somewhere in .gotplt, the addend must be
9623 adjusted accordingly depending on the type of instruction
9624 we refer to */
9625 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9626 {
9627 unsigned long data, insn;
9628 unsigned thumb;
b38cadfb 9629
0855e32b
NS		 9630 data = bfd_get_32 (input_bfd, hit_data);
9631 thumb = data & 1;
9632 data &= ~1u;
b38cadfb 9633
0855e32b
NS		 9634 if (thumb)
9635 {
9636 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9637 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9638 insn = (insn << 16)
9639 | bfd_get_16 (input_bfd,
9640 contents + rel->r_offset - data + 2);
9641 if ((insn & 0xf800c000) == 0xf000c000)
9642 /* bl/blx */
9643 value = -6;
9644 else if ((insn & 0xffffff00) == 0x4400)
9645 /* add */
9646 value = -5;
9647 else
9648 {
9649 (*_bfd_error_handler)
9650 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9651 input_bfd, input_section,
9652 (unsigned long)rel->r_offset, insn);
9653 return bfd_reloc_notsupported;
9654 }
9655 }
9656 else
9657 {
9658 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9659
9660 switch (insn >> 24)
9661 {
9662 case 0xeb: /* bl */
9663 case 0xfa: /* blx */
9664 value = -4;
9665 break;
9666
9667 case 0xe0: /* add */
9668 value = -8;
9669 break;
b38cadfb 9670
0855e32b
NS		 9671 default:
9672 (*_bfd_error_handler)
9673 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9674 input_bfd, input_section,
9675 (unsigned long)rel->r_offset, insn);
9676 return bfd_reloc_notsupported;
9677 }
9678 }
b38cadfb 9679
0855e32b
NS		 9680 value += ((globals->root.sgotplt->output_section->vma
9681 + globals->root.sgotplt->output_offset + off)
9682 - (input_section->output_section->vma
9683 + input_section->output_offset
9684 + rel->r_offset)
9685 + globals->sgotplt_jump_table_size);
9686 }
9687 else
9688 value = ((globals->root.sgot->output_section->vma
9689 + globals->root.sgot->output_offset + off)
9690 - (input_section->output_section->vma
9691 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9692
9693 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9694 contents, rel->r_offset, value,
00a97672 9695 rel->r_addend);
ba93b8ac
DJ		 9696 }
9697
9698 case R_ARM_TLS_LE32:
9ec0c936 9699 if (info->shared && !info->pie)
ba93b8ac
DJ		 9700 {
9701 (*_bfd_error_handler)
9702 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9703 input_bfd, input_section,
9704 (long) rel->r_offset, howto->name);
46691134 9705 return bfd_reloc_notsupported;
ba93b8ac
DJ		 9706 }
9707 else
9708 value = tpoff (info, value);
906e58ca 9709
ba93b8ac 9710 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9711 contents, rel->r_offset, value,
9712 rel->r_addend);
ba93b8ac 9713
319850b4
JB		 9714 case R_ARM_V4BX:
9715 if (globals->fix_v4bx)
845b51d6
PB		 9716 {
9717 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9718
845b51d6
PB		 9719 /* Ensure that we have a BX instruction. */
9720 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9721
845b51d6
PB		 9722 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9723 {
9724 /* Branch to veneer. */
9725 bfd_vma glue_addr;
9726 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9727 glue_addr -= input_section->output_section->vma
9728 + input_section->output_offset
9729 + rel->r_offset + 8;
9730 insn = (insn & 0xf0000000) | 0x0a000000
9731 | ((glue_addr >> 2) & 0x00ffffff);
9732 }
9733 else
9734 {
9735 /* Preserve Rm (lowest four bits) and the condition code
9736 (highest four bits). Other bits encode MOV PC,Rm. */
9737 insn = (insn & 0xf000000f) | 0x01a0f000;
9738 }
319850b4 9739
845b51d6
PB		 9740 bfd_put_32 (input_bfd, insn, hit_data);
9741 }
319850b4
JB		 9742 return bfd_reloc_ok;
9743
b6895b4f
PB		 9744 case R_ARM_MOVW_ABS_NC:
9745 case R_ARM_MOVT_ABS:
9746 case R_ARM_MOVW_PREL_NC:
9747 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9748 /* Until we properly support segment-base-relative addressing then
9749 we assume the segment base to be zero, as for the group relocations.
9750 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9751 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9752 case R_ARM_MOVW_BREL_NC:
9753 case R_ARM_MOVW_BREL:
9754 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9755 {
9756 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9757
9758 if (globals->use_rel)
9759 {
9760 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9761 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9762 }
92f5d02b 9763
b6895b4f 9764 value += signed_addend;
b6895b4f
PB		 9765
9766 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9767 value -= (input_section->output_section->vma
9768 + input_section->output_offset + rel->r_offset);
9769
92f5d02b 9770 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
99059e56 9771 return bfd_reloc_overflow;
92f5d02b 9772
35fc36a8 9773 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9774 value |= 1;
9775
9776 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
99059e56 9777 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9778 value >>= 16;
9779
9780 insn &= 0xfff0f000;
9781 insn |= value & 0xfff;
9782 insn |= (value & 0xf000) << 4;
9783 bfd_put_32 (input_bfd, insn, hit_data);
9784 }
9785 return bfd_reloc_ok;
9786
9787 case R_ARM_THM_MOVW_ABS_NC:
9788 case R_ARM_THM_MOVT_ABS:
9789 case R_ARM_THM_MOVW_PREL_NC:
9790 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9791 /* Until we properly support segment-base-relative addressing then
9792 we assume the segment base to be zero, as for the above relocations.
9793 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9794 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9795 as R_ARM_THM_MOVT_ABS. */
9796 case R_ARM_THM_MOVW_BREL_NC:
9797 case R_ARM_THM_MOVW_BREL:
9798 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9799 {
9800 bfd_vma insn;
906e58ca 9801
b6895b4f
PB		 9802 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9803 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9804
9805 if (globals->use_rel)
9806 {
9807 addend = ((insn >> 4) & 0xf000)
9808 | ((insn >> 15) & 0x0800)
9809 | ((insn >> 4) & 0x0700)
9810 | (insn & 0x00ff);
39623e12 9811 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9812 }
92f5d02b 9813
b6895b4f 9814 value += signed_addend;
b6895b4f
PB		 9815
9816 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9817 value -= (input_section->output_section->vma
9818 + input_section->output_offset + rel->r_offset);
9819
92f5d02b 9820 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
99059e56 9821 return bfd_reloc_overflow;
92f5d02b 9822
35fc36a8 9823 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9824 value |= 1;
9825
9826 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
99059e56 9827 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9828 value >>= 16;
9829
9830 insn &= 0xfbf08f00;
9831 insn |= (value & 0xf000) << 4;
9832 insn |= (value & 0x0800) << 15;
9833 insn |= (value & 0x0700) << 4;
9834 insn |= (value & 0x00ff);
9835
9836 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9837 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9838 }
9839 return bfd_reloc_ok;
9840
4962c51a
MS		 9841 case R_ARM_ALU_PC_G0_NC:
9842 case R_ARM_ALU_PC_G1_NC:
9843 case R_ARM_ALU_PC_G0:
9844 case R_ARM_ALU_PC_G1:
9845 case R_ARM_ALU_PC_G2:
9846 case R_ARM_ALU_SB_G0_NC:
9847 case R_ARM_ALU_SB_G1_NC:
9848 case R_ARM_ALU_SB_G0:
9849 case R_ARM_ALU_SB_G1:
9850 case R_ARM_ALU_SB_G2:
9851 {
9852 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 9853 bfd_vma pc = input_section->output_section->vma
4962c51a 9854 + input_section->output_offset + rel->r_offset;
31a91d61 9855 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 9856 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56
RM		 9857 bfd_vma residual;
9858 bfd_vma g_n;
4962c51a 9859 bfd_signed_vma signed_value;
99059e56
RM		 9860 int group = 0;
9861
9862 /* Determine which group of bits to select. */
9863 switch (r_type)
9864 {
9865 case R_ARM_ALU_PC_G0_NC:
9866 case R_ARM_ALU_PC_G0:
9867 case R_ARM_ALU_SB_G0_NC:
9868 case R_ARM_ALU_SB_G0:
9869 group = 0;
9870 break;
9871
9872 case R_ARM_ALU_PC_G1_NC:
9873 case R_ARM_ALU_PC_G1:
9874 case R_ARM_ALU_SB_G1_NC:
9875 case R_ARM_ALU_SB_G1:
9876 group = 1;
9877 break;
9878
9879 case R_ARM_ALU_PC_G2:
9880 case R_ARM_ALU_SB_G2:
9881 group = 2;
9882 break;
9883
9884 default:
9885 abort ();
9886 }
9887
9888 /* If REL, extract the addend from the insn. If RELA, it will
9889 have already been fetched for us. */
4962c51a 9890 if (globals->use_rel)
99059e56
RM		 9891 {
9892 int negative;
9893 bfd_vma constant = insn & 0xff;
9894 bfd_vma rotation = (insn & 0xf00) >> 8;
9895
9896 if (rotation == 0)
9897 signed_addend = constant;
9898 else
9899 {
9900 /* Compensate for the fact that in the instruction, the
9901 rotation is stored in multiples of 2 bits. */
9902 rotation *= 2;
9903
9904 /* Rotate "constant" right by "rotation" bits. */
9905 signed_addend = (constant >> rotation) |
9906 (constant << (8 * sizeof (bfd_vma) - rotation));
9907 }
9908
9909 /* Determine if the instruction is an ADD or a SUB.
9910 (For REL, this determines the sign of the addend.) */
9911 negative = identify_add_or_sub (insn);
9912 if (negative == 0)
9913 {
9914 (*_bfd_error_handler)
9915 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9916 input_bfd, input_section,
9917 (long) rel->r_offset, howto->name);
9918 return bfd_reloc_overflow;
9919 }
9920
9921 signed_addend *= negative;
9922 }
4962c51a
MS		 9923
9924 /* Compute the value (X) to go in the place. */
99059e56
RM		 9925 if (r_type == R_ARM_ALU_PC_G0_NC
9926 || r_type == R_ARM_ALU_PC_G1_NC
9927 || r_type == R_ARM_ALU_PC_G0
9928 || r_type == R_ARM_ALU_PC_G1
9929 || r_type == R_ARM_ALU_PC_G2)
9930 /* PC relative. */
9931 signed_value = value - pc + signed_addend;
9932 else
9933 /* Section base relative. */
9934 signed_value = value - sb + signed_addend;
9935
9936 /* If the target symbol is a Thumb function, then set the
9937 Thumb bit in the address. */
35fc36a8 9938 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 9939 signed_value |= 1;
9940
99059e56
RM		 9941 /* Calculate the value of the relevant G_n, in encoded
9942 constant-with-rotation format. */
9943 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9944 &residual);
9945
9946 /* Check for overflow if required. */
9947 if ((r_type == R_ARM_ALU_PC_G0
9948 || r_type == R_ARM_ALU_PC_G1
9949 || r_type == R_ARM_ALU_PC_G2
9950 || r_type == R_ARM_ALU_SB_G0
9951 || r_type == R_ARM_ALU_SB_G1
9952 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9953 {
9954 (*_bfd_error_handler)
9955 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9956 input_bfd, input_section,
9957 (long) rel->r_offset, abs (signed_value), howto->name);
9958 return bfd_reloc_overflow;
9959 }
9960
9961 /* Mask out the value and the ADD/SUB part of the opcode; take care
9962 not to destroy the S bit. */
9963 insn &= 0xff1ff000;
9964
9965 /* Set the opcode according to whether the value to go in the
9966 place is negative. */
9967 if (signed_value < 0)
9968 insn |= 1 << 22;
9969 else
9970 insn |= 1 << 23;
9971
9972 /* Encode the offset. */
9973 insn |= g_n;
4962c51a
MS		 9974
9975 bfd_put_32 (input_bfd, insn, hit_data);
9976 }
9977 return bfd_reloc_ok;
9978
9979 case R_ARM_LDR_PC_G0:
9980 case R_ARM_LDR_PC_G1:
9981 case R_ARM_LDR_PC_G2:
9982 case R_ARM_LDR_SB_G0:
9983 case R_ARM_LDR_SB_G1:
9984 case R_ARM_LDR_SB_G2:
9985 {
9986 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 9987 bfd_vma pc = input_section->output_section->vma
4962c51a 9988 + input_section->output_offset + rel->r_offset;
31a91d61 9989 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 9990 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 9991 bfd_vma residual;
4962c51a 9992 bfd_signed_vma signed_value;
99059e56
RM		 9993 int group = 0;
9994
9995 /* Determine which groups of bits to calculate. */
9996 switch (r_type)
9997 {
9998 case R_ARM_LDR_PC_G0:
9999 case R_ARM_LDR_SB_G0:
10000 group = 0;
10001 break;
10002
10003 case R_ARM_LDR_PC_G1:
10004 case R_ARM_LDR_SB_G1:
10005 group = 1;
10006 break;
10007
10008 case R_ARM_LDR_PC_G2:
10009 case R_ARM_LDR_SB_G2:
10010 group = 2;
10011 break;
10012
10013 default:
10014 abort ();
10015 }
10016
10017 /* If REL, extract the addend from the insn. If RELA, it will
10018 have already been fetched for us. */
4962c51a 10019 if (globals->use_rel)
99059e56
RM		 10020 {
10021 int negative = (insn & (1 << 23)) ? 1 : -1;
10022 signed_addend = negative * (insn & 0xfff);
10023 }
4962c51a
MS		 10024
10025 /* Compute the value (X) to go in the place. */
99059e56
RM		 10026 if (r_type == R_ARM_LDR_PC_G0
10027 || r_type == R_ARM_LDR_PC_G1
10028 || r_type == R_ARM_LDR_PC_G2)
10029 /* PC relative. */
10030 signed_value = value - pc + signed_addend;
10031 else
10032 /* Section base relative. */
10033 signed_value = value - sb + signed_addend;
10034
10035 /* Calculate the value of the relevant G_{n-1} to obtain
10036 the residual at that stage. */
10037 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10038
10039 /* Check for overflow. */
10040 if (residual >= 0x1000)
10041 {
10042 (*_bfd_error_handler)
10043 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10044 input_bfd, input_section,
10045 (long) rel->r_offset, abs (signed_value), howto->name);
10046 return bfd_reloc_overflow;
10047 }
10048
10049 /* Mask out the value and U bit. */
10050 insn &= 0xff7ff000;
10051
10052 /* Set the U bit if the value to go in the place is non-negative. */
10053 if (signed_value >= 0)
10054 insn |= 1 << 23;
10055
10056 /* Encode the offset. */
10057 insn |= residual;
4962c51a
MS		 10058
10059 bfd_put_32 (input_bfd, insn, hit_data);
10060 }
10061 return bfd_reloc_ok;
10062
10063 case R_ARM_LDRS_PC_G0:
10064 case R_ARM_LDRS_PC_G1:
10065 case R_ARM_LDRS_PC_G2:
10066 case R_ARM_LDRS_SB_G0:
10067 case R_ARM_LDRS_SB_G1:
10068 case R_ARM_LDRS_SB_G2:
10069 {
10070 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10071 bfd_vma pc = input_section->output_section->vma
4962c51a 10072 + input_section->output_offset + rel->r_offset;
31a91d61 10073 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10074 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10075 bfd_vma residual;
4962c51a 10076 bfd_signed_vma signed_value;
99059e56
RM		 10077 int group = 0;
10078
10079 /* Determine which groups of bits to calculate. */
10080 switch (r_type)
10081 {
10082 case R_ARM_LDRS_PC_G0:
10083 case R_ARM_LDRS_SB_G0:
10084 group = 0;
10085 break;
10086
10087 case R_ARM_LDRS_PC_G1:
10088 case R_ARM_LDRS_SB_G1:
10089 group = 1;
10090 break;
10091
10092 case R_ARM_LDRS_PC_G2:
10093 case R_ARM_LDRS_SB_G2:
10094 group = 2;
10095 break;
10096
10097 default:
10098 abort ();
10099 }
10100
10101 /* If REL, extract the addend from the insn. If RELA, it will
10102 have already been fetched for us. */
4962c51a 10103 if (globals->use_rel)
99059e56
RM		 10104 {
10105 int negative = (insn & (1 << 23)) ? 1 : -1;
10106 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10107 }
4962c51a
MS		 10108
10109 /* Compute the value (X) to go in the place. */
99059e56
RM		 10110 if (r_type == R_ARM_LDRS_PC_G0
10111 || r_type == R_ARM_LDRS_PC_G1
10112 || r_type == R_ARM_LDRS_PC_G2)
10113 /* PC relative. */
10114 signed_value = value - pc + signed_addend;
10115 else
10116 /* Section base relative. */
10117 signed_value = value - sb + signed_addend;
10118
10119 /* Calculate the value of the relevant G_{n-1} to obtain
10120 the residual at that stage. */
10121 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10122
10123 /* Check for overflow. */
10124 if (residual >= 0x100)
10125 {
10126 (*_bfd_error_handler)
10127 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10128 input_bfd, input_section,
10129 (long) rel->r_offset, abs (signed_value), howto->name);
10130 return bfd_reloc_overflow;
10131 }
10132
10133 /* Mask out the value and U bit. */
10134 insn &= 0xff7ff0f0;
10135
10136 /* Set the U bit if the value to go in the place is non-negative. */
10137 if (signed_value >= 0)
10138 insn |= 1 << 23;
10139
10140 /* Encode the offset. */
10141 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
4962c51a
MS		 10142
10143 bfd_put_32 (input_bfd, insn, hit_data);
10144 }
10145 return bfd_reloc_ok;
10146
10147 case R_ARM_LDC_PC_G0:
10148 case R_ARM_LDC_PC_G1:
10149 case R_ARM_LDC_PC_G2:
10150 case R_ARM_LDC_SB_G0:
10151 case R_ARM_LDC_SB_G1:
10152 case R_ARM_LDC_SB_G2:
10153 {
10154 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10155 bfd_vma pc = input_section->output_section->vma
4962c51a 10156 + input_section->output_offset + rel->r_offset;
31a91d61 10157 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10158 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10159 bfd_vma residual;
4962c51a 10160 bfd_signed_vma signed_value;
99059e56
RM		 10161 int group = 0;
10162
10163 /* Determine which groups of bits to calculate. */
10164 switch (r_type)
10165 {
10166 case R_ARM_LDC_PC_G0:
10167 case R_ARM_LDC_SB_G0:
10168 group = 0;
10169 break;
10170
10171 case R_ARM_LDC_PC_G1:
10172 case R_ARM_LDC_SB_G1:
10173 group = 1;
10174 break;
10175
10176 case R_ARM_LDC_PC_G2:
10177 case R_ARM_LDC_SB_G2:
10178 group = 2;
10179 break;
10180
10181 default:
10182 abort ();
10183 }
10184
10185 /* If REL, extract the addend from the insn. If RELA, it will
10186 have already been fetched for us. */
4962c51a 10187 if (globals->use_rel)
99059e56
RM		 10188 {
10189 int negative = (insn & (1 << 23)) ? 1 : -1;
10190 signed_addend = negative * ((insn & 0xff) << 2);
10191 }
4962c51a
MS		 10192
10193 /* Compute the value (X) to go in the place. */
99059e56
RM		 10194 if (r_type == R_ARM_LDC_PC_G0
10195 || r_type == R_ARM_LDC_PC_G1
10196 || r_type == R_ARM_LDC_PC_G2)
10197 /* PC relative. */
10198 signed_value = value - pc + signed_addend;
10199 else
10200 /* Section base relative. */
10201 signed_value = value - sb + signed_addend;
10202
10203 /* Calculate the value of the relevant G_{n-1} to obtain
10204 the residual at that stage. */
10205 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10206
10207 /* Check for overflow. (The absolute value to go in the place must be
10208 divisible by four and, after having been divided by four, must
10209 fit in eight bits.) */
10210 if ((residual & 0x3) != 0 || residual >= 0x400)
10211 {
10212 (*_bfd_error_handler)
10213 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10214 input_bfd, input_section,
10215 (long) rel->r_offset, abs (signed_value), howto->name);
10216 return bfd_reloc_overflow;
10217 }
10218
10219 /* Mask out the value and U bit. */
10220 insn &= 0xff7fff00;
10221
10222 /* Set the U bit if the value to go in the place is non-negative. */
10223 if (signed_value >= 0)
10224 insn |= 1 << 23;
10225
10226 /* Encode the offset. */
10227 insn |= residual >> 2;
4962c51a
MS		 10228
10229 bfd_put_32 (input_bfd, insn, hit_data);
10230 }
10231 return bfd_reloc_ok;
10232
252b5132
RH		 10233 default:
10234 return bfd_reloc_notsupported;
10235 }
10236}
10237
98c1d4aa
NC		 10238/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10239static void
57e8b36a
NC		 10240arm_add_to_rel (bfd * abfd,
10241 bfd_byte * address,
10242 reloc_howto_type * howto,
10243 bfd_signed_vma increment)
98c1d4aa 10244{
98c1d4aa
NC		 10245 bfd_signed_vma addend;
10246
bd97cb95
DJ		 10247 if (howto->type == R_ARM_THM_CALL
10248 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10249 {
9a5aca8c
AM		 10250 int upper_insn, lower_insn;
10251 int upper, lower;
98c1d4aa 10252
9a5aca8c
AM		 10253 upper_insn = bfd_get_16 (abfd, address);
10254 lower_insn = bfd_get_16 (abfd, address + 2);
10255 upper = upper_insn & 0x7ff;
10256 lower = lower_insn & 0x7ff;
10257
10258 addend = (upper << 12) | (lower << 1);
ddda4409 10259 addend += increment;
9a5aca8c 10260 addend >>= 1;
98c1d4aa 10261
9a5aca8c
AM		 10262 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10263 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10264
dc810e39
AM		 10265 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10266 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10267 }
10268 else
10269 {
10270 bfd_vma contents;
10271
10272 contents = bfd_get_32 (abfd, address);
10273
10274 /* Get the (signed) value from the instruction. */
10275 addend = contents & howto->src_mask;
10276 if (addend & ((howto->src_mask + 1) >> 1))
10277 {
10278 bfd_signed_vma mask;
10279
10280 mask = -1;
10281 mask &= ~ howto->src_mask;
10282 addend |= mask;
10283 }
10284
10285 /* Add in the increment, (which is a byte value). */
10286 switch (howto->type)
10287 {
10288 default:
10289 addend += increment;
10290 break;
10291
10292 case R_ARM_PC24:
c6596c5e 10293 case R_ARM_PLT32:
5b5bb741
PB		 10294 case R_ARM_CALL:
10295 case R_ARM_JUMP24:
9a5aca8c 10296 addend <<= howto->size;
dc810e39 10297 addend += increment;
9a5aca8c
AM		 10298
10299 /* Should we check for overflow here ? */
10300
10301 /* Drop any undesired bits. */
10302 addend >>= howto->rightshift;
10303 break;
10304 }
10305
10306 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10307
10308 bfd_put_32 (abfd, contents, address);
ddda4409 10309 }
98c1d4aa 10310}
252b5132 10311
ba93b8ac
DJ		 10312#define IS_ARM_TLS_RELOC(R_TYPE) \
10313 ((R_TYPE) == R_ARM_TLS_GD32 \
10314 || (R_TYPE) == R_ARM_TLS_LDO32 \
10315 || (R_TYPE) == R_ARM_TLS_LDM32 \
10316 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10317 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10318 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10319 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10320 || (R_TYPE) == R_ARM_TLS_IE32 \
10321 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10322
10323/* Specific set of relocations for the gnu tls dialect. */
10324#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10325 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10326 || (R_TYPE) == R_ARM_TLS_CALL \
10327 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10328 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10329 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10330
252b5132 10331/* Relocate an ARM ELF section. */
906e58ca 10332
b34976b6 10333static bfd_boolean
57e8b36a
NC		 10334elf32_arm_relocate_section (bfd * output_bfd,
10335 struct bfd_link_info * info,
10336 bfd * input_bfd,
10337 asection * input_section,
10338 bfd_byte * contents,
10339 Elf_Internal_Rela * relocs,
10340 Elf_Internal_Sym * local_syms,
10341 asection ** local_sections)
252b5132 10342{
b34976b6
AM		 10343 Elf_Internal_Shdr *symtab_hdr;
10344 struct elf_link_hash_entry **sym_hashes;
10345 Elf_Internal_Rela *rel;
10346 Elf_Internal_Rela *relend;
10347 const char *name;
b32d3aa2 10348 struct elf32_arm_link_hash_table * globals;
252b5132 10349
4e7fd91e 10350 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10351 if (globals == NULL)
10352 return FALSE;
b491616a 10353
0ffa91dd 10354 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10355 sym_hashes = elf_sym_hashes (input_bfd);
10356
10357 rel = relocs;
10358 relend = relocs + input_section->reloc_count;
10359 for (; rel < relend; rel++)
10360 {
ba96a88f
NC		 10361 int r_type;
10362 reloc_howto_type * howto;
10363 unsigned long r_symndx;
10364 Elf_Internal_Sym * sym;
10365 asection * sec;
252b5132 10366 struct elf_link_hash_entry * h;
ba96a88f
NC		 10367 bfd_vma relocation;
10368 bfd_reloc_status_type r;
10369 arelent bfd_reloc;
ba93b8ac 10370 char sym_type;
0945cdfd 10371 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10372 char *error_message = NULL;
f21f3fe0 10373
252b5132 10374 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10375 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10376 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10377
ba96a88f 10378 if ( r_type == R_ARM_GNU_VTENTRY
99059e56
RM		 10379 || r_type == R_ARM_GNU_VTINHERIT)
10380 continue;
252b5132 10381
b32d3aa2 10382 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10383 howto = bfd_reloc.howto;
252b5132 10384
252b5132
RH		 10385 h = NULL;
10386 sym = NULL;
10387 sec = NULL;
9b485d32 10388
252b5132
RH		 10389 if (r_symndx < symtab_hdr->sh_info)
10390 {
10391 sym = local_syms + r_symndx;
ba93b8ac 10392 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10393 sec = local_sections[r_symndx];
ffcb4889
NS		 10394
10395 /* An object file might have a reference to a local
10396 undefined symbol. This is a daft object file, but we
10397 should at least do something about it. V4BX & NONE
10398 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10399 allowed to use the undefined symbol, so allow those.
10400 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10401 if (r_type != R_ARM_V4BX
10402 && r_type != R_ARM_NONE
77b4f08f 10403 && r_symndx != STN_UNDEF
ffcb4889
NS		 10404 && bfd_is_und_section (sec)
10405 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10406 {
10407 if (!info->callbacks->undefined_symbol
10408 (info, bfd_elf_string_from_elf_section
10409 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10410 input_bfd, input_section,
10411 rel->r_offset, TRUE))
10412 return FALSE;
10413 }
b38cadfb 10414
4e7fd91e 10415 if (globals->use_rel)
f8df10f4 10416 {
4e7fd91e
PB		 10417 relocation = (sec->output_section->vma
10418 + sec->output_offset
10419 + sym->st_value);
ab96bf03
AM		 10420 if (!info->relocatable
10421 && (sec->flags & SEC_MERGE)
10422 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10423 {
4e7fd91e
PB		 10424 asection *msec;
10425 bfd_vma addend, value;
10426
39623e12 10427 switch (r_type)
4e7fd91e 10428 {
39623e12
PB		 10429 case R_ARM_MOVW_ABS_NC:
10430 case R_ARM_MOVT_ABS:
10431 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10432 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10433 addend = (addend ^ 0x8000) - 0x8000;
10434 break;
f8df10f4 10435
39623e12
PB		 10436 case R_ARM_THM_MOVW_ABS_NC:
10437 case R_ARM_THM_MOVT_ABS:
10438 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10439 << 16;
10440 value |= bfd_get_16 (input_bfd,
10441 contents + rel->r_offset + 2);
10442 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10443 | ((value & 0x04000000) >> 15);
10444 addend = (addend ^ 0x8000) - 0x8000;
10445 break;
f8df10f4 10446
39623e12
PB		 10447 default:
10448 if (howto->rightshift
10449 || (howto->src_mask & (howto->src_mask + 1)))
10450 {
10451 (*_bfd_error_handler)
10452 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10453 input_bfd, input_section,
10454 (long) rel->r_offset, howto->name);
10455 return FALSE;
10456 }
10457
10458 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10459
10460 /* Get the (signed) value from the instruction. */
10461 addend = value & howto->src_mask;
10462 if (addend & ((howto->src_mask + 1) >> 1))
10463 {
10464 bfd_signed_vma mask;
10465
10466 mask = -1;
10467 mask &= ~ howto->src_mask;
10468 addend |= mask;
10469 }
10470 break;
4e7fd91e 10471 }
39623e12 10472
4e7fd91e
PB		 10473 msec = sec;
10474 addend =
10475 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10476 - relocation;
10477 addend += msec->output_section->vma + msec->output_offset;
39623e12 10478
cc643b88 10479 /* Cases here must match those in the preceding
39623e12
PB		 10480 switch statement. */
10481 switch (r_type)
10482 {
10483 case R_ARM_MOVW_ABS_NC:
10484 case R_ARM_MOVT_ABS:
10485 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10486 | (addend & 0xfff);
10487 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10488 break;
10489
10490 case R_ARM_THM_MOVW_ABS_NC:
10491 case R_ARM_THM_MOVT_ABS:
10492 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10493 | (addend & 0xff) | ((addend & 0x0800) << 15);
10494 bfd_put_16 (input_bfd, value >> 16,
10495 contents + rel->r_offset);
10496 bfd_put_16 (input_bfd, value,
10497 contents + rel->r_offset + 2);
10498 break;
10499
10500 default:
10501 value = (value & ~ howto->dst_mask)
10502 | (addend & howto->dst_mask);
10503 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10504 break;
10505 }
f8df10f4 10506 }
f8df10f4 10507 }
4e7fd91e
PB		 10508 else
10509 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10510 }
10511 else
10512 {
560e09e9 10513 bfd_boolean warned;
560e09e9 10514
b2a8e766
AM		 10515 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10516 r_symndx, symtab_hdr, sym_hashes,
10517 h, sec, relocation,
10518 unresolved_reloc, warned);
ba93b8ac
DJ		 10519
10520 sym_type = h->type;
252b5132
RH		 10521 }
10522
dbaa2011 10523 if (sec != NULL && discarded_section (sec))
e4067dbb 10524 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 10525 rel, 1, relend, howto, 0, contents);
ab96bf03
AM		 10526
10527 if (info->relocatable)
10528 {
10529 /* This is a relocatable link. We don't have to change
10530 anything, unless the reloc is against a section symbol,
10531 in which case we have to adjust according to where the
10532 section symbol winds up in the output section. */
10533 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10534 {
10535 if (globals->use_rel)
10536 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10537 howto, (bfd_signed_vma) sec->output_offset);
10538 else
10539 rel->r_addend += sec->output_offset;
10540 }
10541 continue;
10542 }
10543
252b5132
RH		 10544 if (h != NULL)
10545 name = h->root.root.string;
10546 else
10547 {
10548 name = (bfd_elf_string_from_elf_section
10549 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10550 if (name == NULL || *name == '\0')
10551 name = bfd_section_name (input_bfd, sec);
10552 }
f21f3fe0 10553
cf35638d 10554 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10555 && r_type != R_ARM_NONE
10556 && (h == NULL
10557 || h->root.type == bfd_link_hash_defined
10558 || h->root.type == bfd_link_hash_defweak)
10559 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10560 {
10561 (*_bfd_error_handler)
10562 ((sym_type == STT_TLS
10563 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10564 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10565 input_bfd,
10566 input_section,
10567 (long) rel->r_offset,
10568 howto->name,
10569 name);
10570 }
10571
0855e32b 10572 /* We call elf32_arm_final_link_relocate unless we're completely
99059e56
RM		 10573 done, i.e., the relaxation produced the final output we want,
10574 and we won't let anybody mess with it. Also, we have to do
10575 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10576 both in relaxed and non-relaxed cases */
0855e32b
NS		 10577 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10578 || (IS_ARM_TLS_GNU_RELOC (r_type)
b38cadfb 10579 && !((h ? elf32_arm_hash_entry (h)->tls_type :
0855e32b
NS		 10580 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10581 & GOT_TLS_GDESC)))
10582 {
10583 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10584 contents, rel, h == NULL);
10585 /* This may have been marked unresolved because it came from
10586 a shared library. But we've just dealt with that. */
10587 unresolved_reloc = 0;
10588 }
10589 else
10590 r = bfd_reloc_continue;
b38cadfb 10591
0855e32b
NS		 10592 if (r == bfd_reloc_continue)
10593 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10594 input_section, contents, rel,
34e77a92 10595 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10596 (h ? h->target_internal
10597 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10598 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10599
10600 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10601 because such sections are not SEC_ALLOC and thus ld.so will
10602 not process them. */
10603 if (unresolved_reloc
99059e56
RM		 10604 && !((input_section->flags & SEC_DEBUGGING) != 0
10605 && h->def_dynamic)
1d5316ab
AM		 10606 && _bfd_elf_section_offset (output_bfd, info, input_section,
10607 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10608 {
10609 (*_bfd_error_handler)
843fe662
L		 10610 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10611 input_bfd,
10612 input_section,
10613 (long) rel->r_offset,
10614 howto->name,
10615 h->root.root.string);
0945cdfd
DJ		 10616 return FALSE;
10617 }
252b5132
RH		 10618
10619 if (r != bfd_reloc_ok)
10620 {
252b5132
RH		 10621 switch (r)
10622 {
10623 case bfd_reloc_overflow:
cf919dfd
PB		 10624 /* If the overflowing reloc was to an undefined symbol,
10625 we have already printed one error message and there
10626 is no point complaining again. */
10627 if ((! h ||
10628 h->root.type != bfd_link_hash_undefined)
10629 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10630 (info, (h ? &h->root : NULL), name, howto->name,
10631 (bfd_vma) 0, input_bfd, input_section,
10632 rel->r_offset))))
b34976b6 10633 return FALSE;
252b5132
RH		 10634 break;
10635
10636 case bfd_reloc_undefined:
10637 if (!((*info->callbacks->undefined_symbol)
10638 (info, name, input_bfd, input_section,
b34976b6
AM		 10639 rel->r_offset, TRUE)))
10640 return FALSE;
252b5132
RH		 10641 break;
10642
10643 case bfd_reloc_outofrange:
f2a9dd69 10644 error_message = _("out of range");
252b5132
RH		 10645 goto common_error;
10646
10647 case bfd_reloc_notsupported:
f2a9dd69 10648 error_message = _("unsupported relocation");
252b5132
RH		 10649 goto common_error;
10650
10651 case bfd_reloc_dangerous:
f2a9dd69 10652 /* error_message should already be set. */
252b5132
RH		 10653 goto common_error;
10654
10655 default:
f2a9dd69 10656 error_message = _("unknown error");
8029a119 10657 /* Fall through. */
252b5132
RH		 10658
10659 common_error:
f2a9dd69
DJ		 10660 BFD_ASSERT (error_message != NULL);
10661 if (!((*info->callbacks->reloc_dangerous)
10662 (info, error_message, input_bfd, input_section,
252b5132 10663 rel->r_offset)))
b34976b6 10664 return FALSE;
252b5132
RH		 10665 break;
10666 }
10667 }
10668 }
10669
b34976b6 10670 return TRUE;
252b5132
RH		 10671}
10672
91d6fa6a 10673/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10674 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10675 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10676 maintaining that condition). */
10677
10678static void
10679add_unwind_table_edit (arm_unwind_table_edit **head,
10680 arm_unwind_table_edit **tail,
10681 arm_unwind_edit_type type,
10682 asection *linked_section,
91d6fa6a 10683 unsigned int tindex)
2468f9c9 10684{
21d799b5
NC		 10685 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10686 xmalloc (sizeof (arm_unwind_table_edit));
b38cadfb 10687
2468f9c9
PB		 10688 new_edit->type = type;
10689 new_edit->linked_section = linked_section;
91d6fa6a 10690 new_edit->index = tindex;
b38cadfb 10691
91d6fa6a 10692 if (tindex > 0)
2468f9c9
PB		 10693 {
10694 new_edit->next = NULL;
10695
10696 if (*tail)
10697 (*tail)->next = new_edit;
10698
10699 (*tail) = new_edit;
10700
10701 if (!*head)
10702 (*head) = new_edit;
10703 }
10704 else
10705 {
10706 new_edit->next = *head;
10707
10708 if (!*tail)
10709 *tail = new_edit;
10710
10711 *head = new_edit;
10712 }
10713}
10714
10715static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10716
10717/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10718static void
10719adjust_exidx_size(asection *exidx_sec, int adjust)
10720{
10721 asection *out_sec;
10722
10723 if (!exidx_sec->rawsize)
10724 exidx_sec->rawsize = exidx_sec->size;
10725
10726 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10727 out_sec = exidx_sec->output_section;
10728 /* Adjust size of output section. */
10729 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10730}
10731
10732/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10733static void
10734insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10735{
10736 struct _arm_elf_section_data *exidx_arm_data;
10737
10738 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10739 add_unwind_table_edit (
10740 &exidx_arm_data->u.exidx.unwind_edit_list,
10741 &exidx_arm_data->u.exidx.unwind_edit_tail,
10742 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10743
10744 adjust_exidx_size(exidx_sec, 8);
10745}
10746
10747/* Scan .ARM.exidx tables, and create a list describing edits which should be
10748 made to those tables, such that:
b38cadfb 10749
2468f9c9
PB		 10750 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10751 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
99059e56 10752 codes which have been inlined into the index).
2468f9c9 10753
85fdf906
AH		 10754 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10755
2468f9c9 10756 The edits are applied when the tables are written
b38cadfb 10757 (in elf32_arm_write_section). */
2468f9c9
PB		 10758
10759bfd_boolean
10760elf32_arm_fix_exidx_coverage (asection **text_section_order,
10761 unsigned int num_text_sections,
85fdf906
AH		 10762 struct bfd_link_info *info,
10763 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10764{
10765 bfd *inp;
10766 unsigned int last_second_word = 0, i;
10767 asection *last_exidx_sec = NULL;
10768 asection *last_text_sec = NULL;
10769 int last_unwind_type = -1;
10770
10771 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10772 text sections. */
10773 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10774 {
10775 asection *sec;
b38cadfb 10776
2468f9c9 10777 for (sec = inp->sections; sec != NULL; sec = sec->next)
99059e56 10778 {
2468f9c9
PB		 10779 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10780 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
b38cadfb 10781
dec9d5df 10782 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9 10783 continue;
b38cadfb 10784
2468f9c9
PB		 10785 if (elf_sec->linked_to)
10786 {
10787 Elf_Internal_Shdr *linked_hdr
99059e56 10788 = &elf_section_data (elf_sec->linked_to)->this_hdr;
2468f9c9 10789 struct _arm_elf_section_data *linked_sec_arm_data
99059e56 10790 = get_arm_elf_section_data (linked_hdr->bfd_section);
2468f9c9
PB		 10791
10792 if (linked_sec_arm_data == NULL)
99059e56 10793 continue;
2468f9c9
PB		 10794
10795 /* Link this .ARM.exidx section back from the text section it
99059e56 10796 describes. */
2468f9c9
PB		 10797 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10798 }
10799 }
10800 }
10801
10802 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10803 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10804 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10805
10806 for (i = 0; i < num_text_sections; i++)
10807 {
10808 asection *sec = text_section_order[i];
10809 asection *exidx_sec;
10810 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10811 struct _arm_elf_section_data *exidx_arm_data;
10812 bfd_byte *contents = NULL;
10813 int deleted_exidx_bytes = 0;
10814 bfd_vma j;
10815 arm_unwind_table_edit *unwind_edit_head = NULL;
10816 arm_unwind_table_edit *unwind_edit_tail = NULL;
10817 Elf_Internal_Shdr *hdr;
10818 bfd *ibfd;
10819
10820 if (arm_data == NULL)
99059e56 10821 continue;
2468f9c9
PB		 10822
10823 exidx_sec = arm_data->u.text.arm_exidx_sec;
10824 if (exidx_sec == NULL)
10825 {
10826 /* Section has no unwind data. */
10827 if (last_unwind_type == 0 || !last_exidx_sec)
10828 continue;
10829
10830 /* Ignore zero sized sections. */
10831 if (sec->size == 0)
10832 continue;
10833
10834 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10835 last_unwind_type = 0;
10836 continue;
10837 }
10838
22a8f80e
PB		 10839 /* Skip /DISCARD/ sections. */
10840 if (bfd_is_abs_section (exidx_sec->output_section))
10841 continue;
10842
2468f9c9
PB		 10843 hdr = &elf_section_data (exidx_sec)->this_hdr;
10844 if (hdr->sh_type != SHT_ARM_EXIDX)
99059e56 10845 continue;
b38cadfb 10846
2468f9c9
PB		 10847 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10848 if (exidx_arm_data == NULL)
99059e56 10849 continue;
b38cadfb 10850
2468f9c9 10851 ibfd = exidx_sec->owner;
b38cadfb 10852
2468f9c9
PB		 10853 if (hdr->contents != NULL)
10854 contents = hdr->contents;
10855 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10856 /* An error? */
10857 continue;
10858
10859 for (j = 0; j < hdr->sh_size; j += 8)
10860 {
10861 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10862 int unwind_type;
10863 int elide = 0;
10864
10865 /* An EXIDX_CANTUNWIND entry. */
10866 if (second_word == 1)
10867 {
10868 if (last_unwind_type == 0)
10869 elide = 1;
10870 unwind_type = 0;
10871 }
10872 /* Inlined unwinding data. Merge if equal to previous. */
10873 else if ((second_word & 0x80000000) != 0)
10874 {
85fdf906
AH		 10875 if (merge_exidx_entries
10876 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 10877 elide = 1;
10878 unwind_type = 1;
10879 last_second_word = second_word;
10880 }
10881 /* Normal table entry. In theory we could merge these too,
10882 but duplicate entries are likely to be much less common. */
10883 else
10884 unwind_type = 2;
10885
10886 if (elide)
10887 {
10888 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10889 DELETE_EXIDX_ENTRY, NULL, j / 8);
10890
10891 deleted_exidx_bytes += 8;
10892 }
10893
10894 last_unwind_type = unwind_type;
10895 }
10896
10897 /* Free contents if we allocated it ourselves. */
10898 if (contents != hdr->contents)
99059e56 10899 free (contents);
2468f9c9
PB		 10900
10901 /* Record edits to be applied later (in elf32_arm_write_section). */
10902 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10903 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
b38cadfb 10904
2468f9c9
PB		 10905 if (deleted_exidx_bytes > 0)
10906 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10907
10908 last_exidx_sec = exidx_sec;
10909 last_text_sec = sec;
10910 }
10911
10912 /* Add terminating CANTUNWIND entry. */
10913 if (last_exidx_sec && last_unwind_type != 0)
10914 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10915
10916 return TRUE;
10917}
10918
3e6b1042
DJ		 10919static bfd_boolean
10920elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10921 bfd *ibfd, const char *name)
10922{
10923 asection *sec, *osec;
10924
3d4d4302 10925 sec = bfd_get_linker_section (ibfd, name);
3e6b1042
DJ		 10926 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10927 return TRUE;
10928
10929 osec = sec->output_section;
10930 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10931 return TRUE;
10932
10933 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10934 sec->output_offset, sec->size))
10935 return FALSE;
10936
10937 return TRUE;
10938}
10939
10940static bfd_boolean
10941elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10942{
10943 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 10944 asection *sec, *osec;
3e6b1042 10945
4dfe6ac6
NC		 10946 if (globals == NULL)
10947 return FALSE;
10948
3e6b1042
DJ		 10949 /* Invoke the regular ELF backend linker to do all the work. */
10950 if (!bfd_elf_final_link (abfd, info))
10951 return FALSE;
10952
fe33d2fa
CL		 10953 /* Process stub sections (eg BE8 encoding, ...). */
10954 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10955 int i;
cdb21a0a
NS		 10956 for (i=0; i<htab->top_id; i++)
10957 {
10958 sec = htab->stub_group[i].stub_sec;
10959 /* Only process it once, in its link_sec slot. */
10960 if (sec && i == htab->stub_group[i].link_sec->id)
10961 {
10962 osec = sec->output_section;
10963 elf32_arm_write_section (abfd, info, sec, sec->contents);
10964 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10965 sec->output_offset, sec->size))
10966 return FALSE;
10967 }
fe33d2fa 10968 }
fe33d2fa 10969
3e6b1042
DJ		 10970 /* Write out any glue sections now that we have created all the
10971 stubs. */
10972 if (globals->bfd_of_glue_owner != NULL)
10973 {
10974 if (! elf32_arm_output_glue_section (info, abfd,
10975 globals->bfd_of_glue_owner,
10976 ARM2THUMB_GLUE_SECTION_NAME))
10977 return FALSE;
10978
10979 if (! elf32_arm_output_glue_section (info, abfd,
10980 globals->bfd_of_glue_owner,
10981 THUMB2ARM_GLUE_SECTION_NAME))
10982 return FALSE;
10983
10984 if (! elf32_arm_output_glue_section (info, abfd,
10985 globals->bfd_of_glue_owner,
10986 VFP11_ERRATUM_VENEER_SECTION_NAME))
10987 return FALSE;
10988
10989 if (! elf32_arm_output_glue_section (info, abfd,
10990 globals->bfd_of_glue_owner,
10991 ARM_BX_GLUE_SECTION_NAME))
10992 return FALSE;
10993 }
10994
10995 return TRUE;
10996}
10997
5968a7b8
NC		 10998/* Return a best guess for the machine number based on the attributes. */
10999
11000static unsigned int
11001bfd_arm_get_mach_from_attributes (bfd * abfd)
11002{
11003 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11004
11005 switch (arch)
11006 {
11007 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11008 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11009 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11010
11011 case TAG_CPU_ARCH_V5TE:
11012 {
11013 char * name;
11014
11015 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11016 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11017
11018 if (name)
11019 {
11020 if (strcmp (name, "IWMMXT2") == 0)
11021 return bfd_mach_arm_iWMMXt2;
11022
11023 if (strcmp (name, "IWMMXT") == 0)
6034aab8 11024 return bfd_mach_arm_iWMMXt;
088ca6c1
NC		 11025
11026 if (strcmp (name, "XSCALE") == 0)
11027 {
11028 int wmmx;
11029
11030 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11031 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11032 switch (wmmx)
11033 {
11034 case 1: return bfd_mach_arm_iWMMXt;
11035 case 2: return bfd_mach_arm_iWMMXt2;
11036 default: return bfd_mach_arm_XScale;
11037 }
11038 }
5968a7b8
NC		 11039 }
11040
11041 return bfd_mach_arm_5TE;
11042 }
11043
11044 default:
11045 return bfd_mach_arm_unknown;
11046 }
11047}
11048
c178919b
NC		 11049/* Set the right machine number. */
11050
11051static bfd_boolean
57e8b36a 11052elf32_arm_object_p (bfd *abfd)
c178919b 11053{
5a6c6817 11054 unsigned int mach;
57e8b36a 11055
5a6c6817 11056 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 11057
5968a7b8
NC		 11058 if (mach == bfd_mach_arm_unknown)
11059 {
11060 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11061 mach = bfd_mach_arm_ep9312;
11062 else
11063 mach = bfd_arm_get_mach_from_attributes (abfd);
11064 }
c178919b 11065
5968a7b8 11066 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 11067 return TRUE;
11068}
11069
fc830a83 11070/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 11071
b34976b6 11072static bfd_boolean
57e8b36a 11073elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 11074{
11075 if (elf_flags_init (abfd)
11076 && elf_elfheader (abfd)->e_flags != flags)
11077 {
fc830a83
NC		 11078 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11079 {
fd2ec330 11080 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 11081 (*_bfd_error_handler)
11082 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11083 abfd);
fc830a83 11084 else
d003868e
AM		 11085 _bfd_error_handler
11086 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11087 abfd);
fc830a83 11088 }
252b5132
RH		 11089 }
11090 else
11091 {
11092 elf_elfheader (abfd)->e_flags = flags;
b34976b6 11093 elf_flags_init (abfd) = TRUE;
252b5132
RH		 11094 }
11095
b34976b6 11096 return TRUE;
252b5132
RH		 11097}
11098
fc830a83 11099/* Copy backend specific data from one object module to another. */
9b485d32 11100
b34976b6 11101static bfd_boolean
57e8b36a 11102elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 11103{
11104 flagword in_flags;
11105 flagword out_flags;
11106
0ffa91dd 11107 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 11108 return TRUE;
252b5132 11109
fc830a83 11110 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 11111 out_flags = elf_elfheader (obfd)->e_flags;
11112
fc830a83
NC		 11113 if (elf_flags_init (obfd)
11114 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11115 && in_flags != out_flags)
252b5132 11116 {
252b5132 11117 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 11118 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 11119 return FALSE;
252b5132
RH		 11120
11121 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 11122 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 11123 return FALSE;
252b5132
RH		 11124
11125 /* If the src and dest have different interworking flags
99059e56 11126 then turn off the interworking bit. */
fd2ec330 11127 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 11128 {
fd2ec330 11129 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 11130 _bfd_error_handler
11131 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11132 obfd, ibfd);
252b5132 11133
fd2ec330 11134 in_flags &= ~EF_ARM_INTERWORK;
252b5132 11135 }
1006ba19
PB		 11136
11137 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 11138 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11139 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 11140 }
11141
11142 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 11143 elf_flags_init (obfd) = TRUE;
252b5132 11144
94a3258f
PB		 11145 /* Also copy the EI_OSABI field. */
11146 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11147 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11148
104d59d1
JM		 11149 /* Copy object attributes. */
11150 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 11151
11152 return TRUE;
11153}
11154
11155/* Values for Tag_ABI_PCS_R9_use. */
11156enum
11157{
11158 AEABI_R9_V6,
11159 AEABI_R9_SB,
11160 AEABI_R9_TLS,
11161 AEABI_R9_unused
11162};
11163
11164/* Values for Tag_ABI_PCS_RW_data. */
11165enum
11166{
11167 AEABI_PCS_RW_data_absolute,
11168 AEABI_PCS_RW_data_PCrel,
11169 AEABI_PCS_RW_data_SBrel,
11170 AEABI_PCS_RW_data_unused
11171};
11172
11173/* Values for Tag_ABI_enum_size. */
11174enum
11175{
11176 AEABI_enum_unused,
11177 AEABI_enum_short,
11178 AEABI_enum_wide,
11179 AEABI_enum_forced_wide
11180};
11181
104d59d1
JM		 11182/* Determine whether an object attribute tag takes an integer, a
11183 string or both. */
906e58ca 11184
104d59d1
JM		 11185static int
11186elf32_arm_obj_attrs_arg_type (int tag)
11187{
11188 if (tag == Tag_compatibility)
3483fe2e 11189 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 11190 else if (tag == Tag_nodefaults)
3483fe2e
AS		 11191 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11192 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11193 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 11194 else if (tag < 32)
3483fe2e 11195 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 11196 else
3483fe2e 11197 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 11198}
11199
5aa6ff7c
AS		 11200/* The ABI defines that Tag_conformance should be emitted first, and that
11201 Tag_nodefaults should be second (if either is defined). This sets those
11202 two positions, and bumps up the position of all the remaining tags to
11203 compensate. */
11204static int
11205elf32_arm_obj_attrs_order (int num)
11206{
3de4a297 11207 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 11208 return Tag_conformance;
3de4a297 11209 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 11210 return Tag_nodefaults;
11211 if ((num - 2) < Tag_nodefaults)
11212 return num - 2;
11213 if ((num - 1) < Tag_conformance)
11214 return num - 1;
11215 return num;
11216}
11217
e8b36cd1
JM		 11218/* Attribute numbers >=64 (mod 128) can be safely ignored. */
11219static bfd_boolean
11220elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11221{
11222 if ((tag & 127) < 64)
11223 {
11224 _bfd_error_handler
11225 (_("%B: Unknown mandatory EABI object attribute %d"),
11226 abfd, tag);
11227 bfd_set_error (bfd_error_bad_value);
11228 return FALSE;
11229 }
11230 else
11231 {
11232 _bfd_error_handler
11233 (_("Warning: %B: Unknown EABI object attribute %d"),
11234 abfd, tag);
11235 return TRUE;
11236 }
11237}
11238
91e22acd
AS		 11239/* Read the architecture from the Tag_also_compatible_with attribute, if any.
11240 Returns -1 if no architecture could be read. */
11241
11242static int
11243get_secondary_compatible_arch (bfd *abfd)
11244{
11245 obj_attribute *attr =
11246 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11247
11248 /* Note: the tag and its argument below are uleb128 values, though
11249 currently-defined values fit in one byte for each. */
11250 if (attr->s
11251 && attr->s[0] == Tag_CPU_arch
11252 && (attr->s[1] & 128) != 128
11253 && attr->s[2] == 0)
11254 return attr->s[1];
11255
11256 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11257 return -1;
11258}
11259
11260/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11261 The tag is removed if ARCH is -1. */
11262
8e79c3df 11263static void
91e22acd 11264set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11265{
91e22acd
AS		 11266 obj_attribute *attr =
11267 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11268
91e22acd
AS		 11269 if (arch == -1)
11270 {
11271 attr->s = NULL;
11272 return;
8e79c3df 11273 }
91e22acd
AS		 11274
11275 /* Note: the tag and its argument below are uleb128 values, though
11276 currently-defined values fit in one byte for each. */
11277 if (!attr->s)
21d799b5 11278 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11279 attr->s[0] = Tag_CPU_arch;
11280 attr->s[1] = arch;
11281 attr->s[2] = '\0';
8e79c3df
CM		 11282}
11283
91e22acd
AS		 11284/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11285 into account. */
11286
11287static int
11288tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11289 int newtag, int secondary_compat)
8e79c3df 11290{
91e22acd
AS		 11291#define T(X) TAG_CPU_ARCH_##X
11292 int tagl, tagh, result;
11293 const int v6t2[] =
11294 {
11295 T(V6T2), /* PRE_V4. */
11296 T(V6T2), /* V4. */
11297 T(V6T2), /* V4T. */
11298 T(V6T2), /* V5T. */
11299 T(V6T2), /* V5TE. */
11300 T(V6T2), /* V5TEJ. */
11301 T(V6T2), /* V6. */
11302 T(V7), /* V6KZ. */
11303 T(V6T2) /* V6T2. */
11304 };
11305 const int v6k[] =
11306 {
11307 T(V6K), /* PRE_V4. */
11308 T(V6K), /* V4. */
11309 T(V6K), /* V4T. */
11310 T(V6K), /* V5T. */
11311 T(V6K), /* V5TE. */
11312 T(V6K), /* V5TEJ. */
11313 T(V6K), /* V6. */
11314 T(V6KZ), /* V6KZ. */
11315 T(V7), /* V6T2. */
11316 T(V6K) /* V6K. */
11317 };
11318 const int v7[] =
11319 {
11320 T(V7), /* PRE_V4. */
11321 T(V7), /* V4. */
11322 T(V7), /* V4T. */
11323 T(V7), /* V5T. */
11324 T(V7), /* V5TE. */
11325 T(V7), /* V5TEJ. */
11326 T(V7), /* V6. */
11327 T(V7), /* V6KZ. */
11328 T(V7), /* V6T2. */
11329 T(V7), /* V6K. */
11330 T(V7) /* V7. */
11331 };
11332 const int v6_m[] =
11333 {
11334 -1, /* PRE_V4. */
11335 -1, /* V4. */
11336 T(V6K), /* V4T. */
11337 T(V6K), /* V5T. */
11338 T(V6K), /* V5TE. */
11339 T(V6K), /* V5TEJ. */
11340 T(V6K), /* V6. */
11341 T(V6KZ), /* V6KZ. */
11342 T(V7), /* V6T2. */
11343 T(V6K), /* V6K. */
11344 T(V7), /* V7. */
11345 T(V6_M) /* V6_M. */
11346 };
11347 const int v6s_m[] =
11348 {
11349 -1, /* PRE_V4. */
11350 -1, /* V4. */
11351 T(V6K), /* V4T. */
11352 T(V6K), /* V5T. */
11353 T(V6K), /* V5TE. */
11354 T(V6K), /* V5TEJ. */
11355 T(V6K), /* V6. */
11356 T(V6KZ), /* V6KZ. */
11357 T(V7), /* V6T2. */
11358 T(V6K), /* V6K. */
11359 T(V7), /* V7. */
11360 T(V6S_M), /* V6_M. */
11361 T(V6S_M) /* V6S_M. */
11362 };
9e3c6df6
PB		 11363 const int v7e_m[] =
11364 {
11365 -1, /* PRE_V4. */
11366 -1, /* V4. */
11367 T(V7E_M), /* V4T. */
11368 T(V7E_M), /* V5T. */
11369 T(V7E_M), /* V5TE. */
11370 T(V7E_M), /* V5TEJ. */
11371 T(V7E_M), /* V6. */
11372 T(V7E_M), /* V6KZ. */
11373 T(V7E_M), /* V6T2. */
11374 T(V7E_M), /* V6K. */
11375 T(V7E_M), /* V7. */
11376 T(V7E_M), /* V6_M. */
11377 T(V7E_M), /* V6S_M. */
11378 T(V7E_M) /* V7E_M. */
11379 };
bca38921
MGD		 11380 const int v8[] =
11381 {
11382 T(V8), /* PRE_V4. */
11383 T(V8), /* V4. */
11384 T(V8), /* V4T. */
11385 T(V8), /* V5T. */
11386 T(V8), /* V5TE. */
11387 T(V8), /* V5TEJ. */
11388 T(V8), /* V6. */
11389 T(V8), /* V6KZ. */
11390 T(V8), /* V6T2. */
11391 T(V8), /* V6K. */
11392 T(V8), /* V7. */
11393 T(V8), /* V6_M. */
11394 T(V8), /* V6S_M. */
11395 T(V8), /* V7E_M. */
11396 T(V8) /* V8. */
11397 };
91e22acd
AS		 11398 const int v4t_plus_v6_m[] =
11399 {
11400 -1, /* PRE_V4. */
11401 -1, /* V4. */
11402 T(V4T), /* V4T. */
11403 T(V5T), /* V5T. */
11404 T(V5TE), /* V5TE. */
11405 T(V5TEJ), /* V5TEJ. */
11406 T(V6), /* V6. */
11407 T(V6KZ), /* V6KZ. */
11408 T(V6T2), /* V6T2. */
11409 T(V6K), /* V6K. */
11410 T(V7), /* V7. */
11411 T(V6_M), /* V6_M. */
11412 T(V6S_M), /* V6S_M. */
9e3c6df6 11413 T(V7E_M), /* V7E_M. */
bca38921 11414 T(V8), /* V8. */
91e22acd
AS		 11415 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11416 };
11417 const int *comb[] =
11418 {
11419 v6t2,
11420 v6k,
11421 v7,
11422 v6_m,
11423 v6s_m,
9e3c6df6 11424 v7e_m,
bca38921 11425 v8,
91e22acd
AS		 11426 /* Pseudo-architecture. */
11427 v4t_plus_v6_m
11428 };
11429
11430 /* Check we've not got a higher architecture than we know about. */
11431
9e3c6df6 11432 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11433 {
3895f852 11434 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11435 return -1;
11436 }
11437
11438 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11439
11440 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11441 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11442 oldtag = T(V4T_PLUS_V6_M);
11443
11444 /* And override the new tag if we have a Tag_also_compatible_with on the
11445 input. */
11446
11447 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11448 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11449 newtag = T(V4T_PLUS_V6_M);
11450
11451 tagl = (oldtag < newtag) ? oldtag : newtag;
11452 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11453
11454 /* Architectures before V6KZ add features monotonically. */
11455 if (tagh <= TAG_CPU_ARCH_V6KZ)
11456 return result;
11457
11458 result = comb[tagh - T(V6T2)][tagl];
11459
11460 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11461 as the canonical version. */
11462 if (result == T(V4T_PLUS_V6_M))
11463 {
11464 result = T(V4T);
11465 *secondary_compat_out = T(V6_M);
11466 }
11467 else
11468 *secondary_compat_out = -1;
11469
11470 if (result == -1)
11471 {
3895f852 11472 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11473 ibfd, oldtag, newtag);
11474 return -1;
11475 }
11476
11477 return result;
11478#undef T
8e79c3df
CM		 11479}
11480
ac56ee8f
MGD		 11481/* Query attributes object to see if integer divide instructions may be
11482 present in an object. */
11483static bfd_boolean
11484elf32_arm_attributes_accept_div (const obj_attribute *attr)
11485{
11486 int arch = attr[Tag_CPU_arch].i;
11487 int profile = attr[Tag_CPU_arch_profile].i;
11488
11489 switch (attr[Tag_DIV_use].i)
11490 {
11491 case 0:
11492 /* Integer divide allowed if instruction contained in archetecture. */
11493 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11494 return TRUE;
11495 else if (arch >= TAG_CPU_ARCH_V7E_M)
11496 return TRUE;
11497 else
11498 return FALSE;
11499
11500 case 1:
11501 /* Integer divide explicitly prohibited. */
11502 return FALSE;
11503
11504 default:
11505 /* Unrecognised case - treat as allowing divide everywhere. */
11506 case 2:
11507 /* Integer divide allowed in ARM state. */
11508 return TRUE;
11509 }
11510}
11511
11512/* Query attributes object to see if integer divide instructions are
11513 forbidden to be in the object. This is not the inverse of
11514 elf32_arm_attributes_accept_div. */
11515static bfd_boolean
11516elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11517{
11518 return attr[Tag_DIV_use].i == 1;
11519}
11520
ee065d83
PB		 11521/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11522 are conflicting attributes. */
906e58ca 11523
ee065d83
PB		 11524static bfd_boolean
11525elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11526{
104d59d1
JM		 11527 obj_attribute *in_attr;
11528 obj_attribute *out_attr;
ee065d83
PB		 11529 /* Some tags have 0 = don't care, 1 = strong requirement,
11530 2 = weak requirement. */
91e22acd 11531 static const int order_021[3] = {0, 2, 1};
ee065d83 11532 int i;
91e22acd 11533 bfd_boolean result = TRUE;
ee065d83 11534
3e6b1042
DJ		 11535 /* Skip the linker stubs file. This preserves previous behavior
11536 of accepting unknown attributes in the first input file - but
11537 is that a bug? */
11538 if (ibfd->flags & BFD_LINKER_CREATED)
11539 return TRUE;
11540
104d59d1 11541 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11542 {
11543 /* This is the first object. Copy the attributes. */
104d59d1 11544 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11545
cd21e546
MGD		 11546 out_attr = elf_known_obj_attributes_proc (obfd);
11547
004ae526
PB		 11548 /* Use the Tag_null value to indicate the attributes have been
11549 initialized. */
cd21e546 11550 out_attr[0].i = 1;
004ae526 11551
cd21e546
MGD		 11552 /* We do not output objects with Tag_MPextension_use_legacy - we move
11553 the attribute's value to Tag_MPextension_use. */
11554 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11555 {
11556 if (out_attr[Tag_MPextension_use].i != 0
11557 && out_attr[Tag_MPextension_use_legacy].i
99059e56 11558 != out_attr[Tag_MPextension_use].i)
cd21e546
MGD		 11559 {
11560 _bfd_error_handler
11561 (_("Error: %B has both the current and legacy "
11562 "Tag_MPextension_use attributes"), ibfd);
11563 result = FALSE;
11564 }
11565
11566 out_attr[Tag_MPextension_use] =
11567 out_attr[Tag_MPextension_use_legacy];
11568 out_attr[Tag_MPextension_use_legacy].type = 0;
11569 out_attr[Tag_MPextension_use_legacy].i = 0;
11570 }
11571
11572 return result;
ee065d83
PB		 11573 }
11574
104d59d1
JM		 11575 in_attr = elf_known_obj_attributes_proc (ibfd);
11576 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11577 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11578 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11579 {
8e79c3df 11580 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11581 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11582 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11583 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11584 {
11585 _bfd_error_handler
3895f852 11586 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11587 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11588 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11589 result = FALSE;
ee065d83
PB		 11590 }
11591 }
11592
3de4a297 11593 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11594 {
11595 /* Merge this attribute with existing attributes. */
11596 switch (i)
11597 {
11598 case Tag_CPU_raw_name:
11599 case Tag_CPU_name:
91e22acd 11600 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11601 break;
11602
11603 case Tag_ABI_optimization_goals:
11604 case Tag_ABI_FP_optimization_goals:
11605 /* Use the first value seen. */
11606 break;
11607
11608 case Tag_CPU_arch:
91e22acd
AS		 11609 {
11610 int secondary_compat = -1, secondary_compat_out = -1;
11611 unsigned int saved_out_attr = out_attr[i].i;
11612 static const char *name_table[] = {
11613 /* These aren't real CPU names, but we can't guess
11614 that from the architecture version alone. */
11615 "Pre v4",
11616 "ARM v4",
11617 "ARM v4T",
11618 "ARM v5T",
11619 "ARM v5TE",
11620 "ARM v5TEJ",
11621 "ARM v6",
11622 "ARM v6KZ",
11623 "ARM v6T2",
11624 "ARM v6K",
11625 "ARM v7",
11626 "ARM v6-M",
bca38921
MGD		 11627 "ARM v6S-M",
11628 "ARM v8"
91e22acd
AS		 11629 };
11630
11631 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11632 secondary_compat = get_secondary_compatible_arch (ibfd);
11633 secondary_compat_out = get_secondary_compatible_arch (obfd);
11634 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11635 &secondary_compat_out,
11636 in_attr[i].i,
11637 secondary_compat);
11638 set_secondary_compatible_arch (obfd, secondary_compat_out);
11639
11640 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11641 if (out_attr[i].i == saved_out_attr)
11642 ; /* Leave the names alone. */
11643 else if (out_attr[i].i == in_attr[i].i)
11644 {
11645 /* The output architecture has been changed to match the
11646 input architecture. Use the input names. */
11647 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11648 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11649 : NULL;
11650 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11651 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11652 : NULL;
11653 }
11654 else
11655 {
11656 out_attr[Tag_CPU_name].s = NULL;
11657 out_attr[Tag_CPU_raw_name].s = NULL;
11658 }
11659
11660 /* If we still don't have a value for Tag_CPU_name,
11661 make one up now. Tag_CPU_raw_name remains blank. */
11662 if (out_attr[Tag_CPU_name].s == NULL
11663 && out_attr[i].i < ARRAY_SIZE (name_table))
11664 out_attr[Tag_CPU_name].s =
11665 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11666 }
11667 break;
11668
ee065d83
PB		 11669 case Tag_ARM_ISA_use:
11670 case Tag_THUMB_ISA_use:
ee065d83 11671 case Tag_WMMX_arch:
91e22acd
AS		 11672 case Tag_Advanced_SIMD_arch:
11673 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11674 case Tag_ABI_FP_rounding:
ee065d83
PB		 11675 case Tag_ABI_FP_exceptions:
11676 case Tag_ABI_FP_user_exceptions:
11677 case Tag_ABI_FP_number_model:
75375b3e 11678 case Tag_FP_HP_extension:
91e22acd
AS		 11679 case Tag_CPU_unaligned_access:
11680 case Tag_T2EE_use:
91e22acd 11681 case Tag_MPextension_use:
ee065d83
PB		 11682 /* Use the largest value specified. */
11683 if (in_attr[i].i > out_attr[i].i)
11684 out_attr[i].i = in_attr[i].i;
11685 break;
11686
75375b3e 11687 case Tag_ABI_align_preserved:
91e22acd
AS		 11688 case Tag_ABI_PCS_RO_data:
11689 /* Use the smallest value specified. */
11690 if (in_attr[i].i < out_attr[i].i)
11691 out_attr[i].i = in_attr[i].i;
11692 break;
11693
75375b3e 11694 case Tag_ABI_align_needed:
91e22acd 11695 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11696 && (in_attr[Tag_ABI_align_preserved].i == 0
11697 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11698 {
91e22acd
AS		 11699 /* This error message should be enabled once all non-conformant
11700 binaries in the toolchain have had the attributes set
11701 properly.
ee065d83 11702 _bfd_error_handler
3895f852 11703 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11704 obfd, ibfd);
11705 result = FALSE; */
ee065d83 11706 }
91e22acd
AS		 11707 /* Fall through. */
11708 case Tag_ABI_FP_denormal:
11709 case Tag_ABI_PCS_GOT_use:
11710 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11711 value if greater than 2 (for future-proofing). */
11712 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11713 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11714 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11715 out_attr[i].i = in_attr[i].i;
11716 break;
91e22acd 11717
75375b3e
MGD		 11718 case Tag_Virtualization_use:
11719 /* The virtualization tag effectively stores two bits of
11720 information: the intended use of TrustZone (in bit 0), and the
11721 intended use of Virtualization (in bit 1). */
11722 if (out_attr[i].i == 0)
11723 out_attr[i].i = in_attr[i].i;
11724 else if (in_attr[i].i != 0
11725 && in_attr[i].i != out_attr[i].i)
11726 {
11727 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11728 out_attr[i].i = 3;
11729 else
11730 {
11731 _bfd_error_handler
11732 (_("error: %B: unable to merge virtualization attributes "
11733 "with %B"),
11734 obfd, ibfd);
11735 result = FALSE;
11736 }
11737 }
11738 break;
91e22acd
AS		 11739
11740 case Tag_CPU_arch_profile:
11741 if (out_attr[i].i != in_attr[i].i)
11742 {
11743 /* 0 will merge with anything.
11744 'A' and 'S' merge to 'A'.
11745 'R' and 'S' merge to 'R'.
99059e56 11746 'M' and 'A|R|S' is an error. */
91e22acd
AS		 11747 if (out_attr[i].i == 0
11748 || (out_attr[i].i == 'S'
11749 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11750 out_attr[i].i = in_attr[i].i;
11751 else if (in_attr[i].i == 0
11752 || (in_attr[i].i == 'S'
11753 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11754 ; /* Do nothing. */
11755 else
11756 {
11757 _bfd_error_handler
3895f852 11758 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11759 ibfd,
11760 in_attr[i].i ? in_attr[i].i : '0',
11761 out_attr[i].i ? out_attr[i].i : '0');
11762 result = FALSE;
11763 }
11764 }
11765 break;
75375b3e 11766 case Tag_FP_arch:
62f3b8c8 11767 {
4547cb56
NC		 11768 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11769 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11770 when it's 0. It might mean absence of FP hardware if
11771 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11772
bca38921 11773#define VFP_VERSION_COUNT 8
62f3b8c8
PB		 11774 static const struct
11775 {
11776 int ver;
11777 int regs;
bca38921 11778 } vfp_versions[VFP_VERSION_COUNT] =
62f3b8c8
PB		 11779 {
11780 {0, 0},
11781 {1, 16},
11782 {2, 16},
11783 {3, 32},
11784 {3, 16},
11785 {4, 32},
bca38921
MGD		 11786 {4, 16},
11787 {8, 32}
62f3b8c8
PB		 11788 };
11789 int ver;
11790 int regs;
11791 int newval;
11792
4547cb56
NC		 11793 /* If the output has no requirement about FP hardware,
11794 follow the requirement of the input. */
11795 if (out_attr[i].i == 0)
11796 {
11797 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11798 out_attr[i].i = in_attr[i].i;
11799 out_attr[Tag_ABI_HardFP_use].i
11800 = in_attr[Tag_ABI_HardFP_use].i;
11801 break;
11802 }
11803 /* If the input has no requirement about FP hardware, do
11804 nothing. */
11805 else if (in_attr[i].i == 0)
11806 {
11807 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11808 break;
11809 }
11810
11811 /* Both the input and the output have nonzero Tag_FP_arch.
11812 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11813
11814 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11815 do nothing. */
11816 if (in_attr[Tag_ABI_HardFP_use].i == 0
11817 && out_attr[Tag_ABI_HardFP_use].i == 0)
11818 ;
11819 /* If the input and the output have different Tag_ABI_HardFP_use,
11820 the combination of them is 3 (SP & DP). */
11821 else if (in_attr[Tag_ABI_HardFP_use].i
11822 != out_attr[Tag_ABI_HardFP_use].i)
11823 out_attr[Tag_ABI_HardFP_use].i = 3;
11824
11825 /* Now we can handle Tag_FP_arch. */
11826
bca38921
MGD		 11827 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11828 pick the biggest. */
11829 if (in_attr[i].i >= VFP_VERSION_COUNT
11830 && in_attr[i].i > out_attr[i].i)
62f3b8c8
PB		 11831 {
11832 out_attr[i] = in_attr[i];
11833 break;
11834 }
11835 /* The output uses the superset of input features
11836 (ISA version) and registers. */
11837 ver = vfp_versions[in_attr[i].i].ver;
11838 if (ver < vfp_versions[out_attr[i].i].ver)
11839 ver = vfp_versions[out_attr[i].i].ver;
11840 regs = vfp_versions[in_attr[i].i].regs;
11841 if (regs < vfp_versions[out_attr[i].i].regs)
11842 regs = vfp_versions[out_attr[i].i].regs;
11843 /* This assumes all possible supersets are also a valid
99059e56 11844 options. */
bca38921 11845 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
62f3b8c8
PB		 11846 {
11847 if (regs == vfp_versions[newval].regs
11848 && ver == vfp_versions[newval].ver)
11849 break;
11850 }
11851 out_attr[i].i = newval;
11852 }
b1cc4aeb 11853 break;
ee065d83
PB		 11854 case Tag_PCS_config:
11855 if (out_attr[i].i == 0)
11856 out_attr[i].i = in_attr[i].i;
b6009aca 11857 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
ee065d83
PB		 11858 {
11859 /* It's sometimes ok to mix different configs, so this is only
99059e56 11860 a warning. */
ee065d83
PB		 11861 _bfd_error_handler
11862 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11863 }
11864 break;
11865 case Tag_ABI_PCS_R9_use:
004ae526
PB		 11866 if (in_attr[i].i != out_attr[i].i
11867 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 11868 && in_attr[i].i != AEABI_R9_unused)
11869 {
11870 _bfd_error_handler
3895f852 11871 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 11872 result = FALSE;
ee065d83
PB		 11873 }
11874 if (out_attr[i].i == AEABI_R9_unused)
11875 out_attr[i].i = in_attr[i].i;
11876 break;
11877 case Tag_ABI_PCS_RW_data:
11878 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11879 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11880 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11881 {
11882 _bfd_error_handler
3895f852 11883 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 11884 ibfd);
91e22acd 11885 result = FALSE;
ee065d83
PB		 11886 }
11887 /* Use the smallest value specified. */
11888 if (in_attr[i].i < out_attr[i].i)
11889 out_attr[i].i = in_attr[i].i;
11890 break;
ee065d83 11891 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 11892 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11893 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 11894 {
11895 _bfd_error_handler
a9dc9481
JM		 11896 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11897 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 11898 }
a9dc9481 11899 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 11900 out_attr[i].i = in_attr[i].i;
11901 break;
ee065d83
PB		 11902 case Tag_ABI_enum_size:
11903 if (in_attr[i].i != AEABI_enum_unused)
11904 {
11905 if (out_attr[i].i == AEABI_enum_unused
11906 || out_attr[i].i == AEABI_enum_forced_wide)
11907 {
11908 /* The existing object is compatible with anything.
11909 Use whatever requirements the new object has. */
11910 out_attr[i].i = in_attr[i].i;
11911 }
11912 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 11913 && out_attr[i].i != in_attr[i].i
0ffa91dd 11914 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 11915 {
91e22acd 11916 static const char *aeabi_enum_names[] =
bf21ed78 11917 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 11918 const char *in_name =
11919 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11920 ? aeabi_enum_names[in_attr[i].i]
11921 : "<unknown>";
11922 const char *out_name =
11923 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11924 ? aeabi_enum_names[out_attr[i].i]
11925 : "<unknown>";
ee065d83 11926 _bfd_error_handler
bf21ed78 11927 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 11928 ibfd, in_name, out_name);
ee065d83
PB		 11929 }
11930 }
11931 break;
11932 case Tag_ABI_VFP_args:
11933 /* Aready done. */
11934 break;
11935 case Tag_ABI_WMMX_args:
11936 if (in_attr[i].i != out_attr[i].i)
11937 {
11938 _bfd_error_handler
3895f852 11939 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 11940 ibfd, obfd);
91e22acd 11941 result = FALSE;
ee065d83
PB		 11942 }
11943 break;
7b86a9fa
AS		 11944 case Tag_compatibility:
11945 /* Merged in target-independent code. */
11946 break;
91e22acd 11947 case Tag_ABI_HardFP_use:
4547cb56 11948 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 11949 break;
11950 case Tag_ABI_FP_16bit_format:
11951 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11952 {
11953 if (in_attr[i].i != out_attr[i].i)
11954 {
11955 _bfd_error_handler
3895f852 11956 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 11957 ibfd, obfd);
11958 result = FALSE;
11959 }
11960 }
11961 if (in_attr[i].i != 0)
11962 out_attr[i].i = in_attr[i].i;
11963 break;
7b86a9fa 11964
cd21e546 11965 case Tag_DIV_use:
ac56ee8f
MGD		 11966 /* A value of zero on input means that the divide instruction may
11967 be used if available in the base architecture as specified via
11968 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11969 the user did not want divide instructions. A value of 2
11970 explicitly means that divide instructions were allowed in ARM
11971 and Thumb state. */
11972 if (in_attr[i].i == out_attr[i].i)
11973 /* Do nothing. */ ;
11974 else if (elf32_arm_attributes_forbid_div (in_attr)
11975 && !elf32_arm_attributes_accept_div (out_attr))
11976 out_attr[i].i = 1;
11977 else if (elf32_arm_attributes_forbid_div (out_attr)
11978 && elf32_arm_attributes_accept_div (in_attr))
11979 out_attr[i].i = in_attr[i].i;
11980 else if (in_attr[i].i == 2)
11981 out_attr[i].i = in_attr[i].i;
cd21e546
MGD		 11982 break;
11983
11984 case Tag_MPextension_use_legacy:
11985 /* We don't output objects with Tag_MPextension_use_legacy - we
11986 move the value to Tag_MPextension_use. */
11987 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11988 {
11989 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11990 {
11991 _bfd_error_handler
11992 (_("%B has has both the current and legacy "
b38cadfb 11993 "Tag_MPextension_use attributes"),
cd21e546
MGD		 11994 ibfd);
11995 result = FALSE;
11996 }
11997 }
11998
11999 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12000 out_attr[Tag_MPextension_use] = in_attr[i];
12001
12002 break;
12003
91e22acd 12004 case Tag_nodefaults:
2d0bb761
AS		 12005 /* This tag is set if it exists, but the value is unused (and is
12006 typically zero). We don't actually need to do anything here -
12007 the merge happens automatically when the type flags are merged
12008 below. */
91e22acd
AS		 12009 break;
12010 case Tag_also_compatible_with:
12011 /* Already done in Tag_CPU_arch. */
12012 break;
12013 case Tag_conformance:
12014 /* Keep the attribute if it matches. Throw it away otherwise.
12015 No attribute means no claim to conform. */
12016 if (!in_attr[i].s || !out_attr[i].s
12017 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12018 out_attr[i].s = NULL;
12019 break;
3cfad14c 12020
91e22acd 12021 default:
e8b36cd1
JM		 12022 result
12023 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 12024 }
12025
12026 /* If out_attr was copied from in_attr then it won't have a type yet. */
12027 if (in_attr[i].type && !out_attr[i].type)
12028 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 12029 }
12030
104d59d1 12031 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 12032 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12033 return FALSE;
ee065d83 12034
104d59d1 12035 /* Check for any attributes not known on ARM. */
e8b36cd1 12036 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 12037
91e22acd 12038 return result;
252b5132
RH		 12039}
12040
3a4a14e9
PB		 12041
12042/* Return TRUE if the two EABI versions are incompatible. */
12043
12044static bfd_boolean
12045elf32_arm_versions_compatible (unsigned iver, unsigned over)
12046{
12047 /* v4 and v5 are the same spec before and after it was released,
12048 so allow mixing them. */
12049 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12050 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12051 return TRUE;
12052
12053 return (iver == over);
12054}
12055
252b5132
RH		 12056/* Merge backend specific data from an object file to the output
12057 object file when linking. */
9b485d32 12058
b34976b6 12059static bfd_boolean
21d799b5 12060elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 12061
9b485d32
NC		 12062/* Display the flags field. */
12063
b34976b6 12064static bfd_boolean
57e8b36a 12065elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 12066{
fc830a83
NC		 12067 FILE * file = (FILE *) ptr;
12068 unsigned long flags;
252b5132
RH		 12069
12070 BFD_ASSERT (abfd != NULL && ptr != NULL);
12071
12072 /* Print normal ELF private data. */
12073 _bfd_elf_print_private_bfd_data (abfd, ptr);
12074
fc830a83 12075 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 12076 /* Ignore init flag - it may not be set, despite the flags field
12077 containing valid data. */
252b5132
RH		 12078
12079 /* xgettext:c-format */
9b485d32 12080 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 12081
fc830a83
NC		 12082 switch (EF_ARM_EABI_VERSION (flags))
12083 {
12084 case EF_ARM_EABI_UNKNOWN:
4cc11e76 12085 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 12086 official ARM ELF extended ABI. Hence they are only decoded if
12087 the EABI version is not set. */
fd2ec330 12088 if (flags & EF_ARM_INTERWORK)
9b485d32 12089 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 12090
fd2ec330 12091 if (flags & EF_ARM_APCS_26)
6c571f00 12092 fprintf (file, " [APCS-26]");
fc830a83 12093 else
6c571f00 12094 fprintf (file, " [APCS-32]");
9a5aca8c 12095
96a846ea
RE		 12096 if (flags & EF_ARM_VFP_FLOAT)
12097 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 12098 else if (flags & EF_ARM_MAVERICK_FLOAT)
12099 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 12100 else
12101 fprintf (file, _(" [FPA float format]"));
12102
fd2ec330 12103 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 12104 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 12105
fd2ec330 12106 if (flags & EF_ARM_PIC)
9b485d32 12107 fprintf (file, _(" [position independent]"));
fc830a83 12108
fd2ec330 12109 if (flags & EF_ARM_NEW_ABI)
9b485d32 12110 fprintf (file, _(" [new ABI]"));
9a5aca8c 12111
fd2ec330 12112 if (flags & EF_ARM_OLD_ABI)
9b485d32 12113 fprintf (file, _(" [old ABI]"));
9a5aca8c 12114
fd2ec330 12115 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 12116 fprintf (file, _(" [software FP]"));
9a5aca8c 12117
96a846ea
RE		 12118 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12119 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 12120 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12121 | EF_ARM_MAVERICK_FLOAT);
fc830a83 12122 break;
9a5aca8c 12123
fc830a83 12124 case EF_ARM_EABI_VER1:
9b485d32 12125 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 12126
fc830a83 12127 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 12128 fprintf (file, _(" [sorted symbol table]"));
fc830a83 12129 else
9b485d32 12130 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 12131
fc830a83
NC		 12132 flags &= ~ EF_ARM_SYMSARESORTED;
12133 break;
9a5aca8c 12134
fd2ec330
PB		 12135 case EF_ARM_EABI_VER2:
12136 fprintf (file, _(" [Version2 EABI]"));
12137
12138 if (flags & EF_ARM_SYMSARESORTED)
12139 fprintf (file, _(" [sorted symbol table]"));
12140 else
12141 fprintf (file, _(" [unsorted symbol table]"));
12142
12143 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12144 fprintf (file, _(" [dynamic symbols use segment index]"));
12145
12146 if (flags & EF_ARM_MAPSYMSFIRST)
12147 fprintf (file, _(" [mapping symbols precede others]"));
12148
99e4ae17 12149 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 12150 | EF_ARM_MAPSYMSFIRST);
12151 break;
12152
d507cf36
PB		 12153 case EF_ARM_EABI_VER3:
12154 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 12155 break;
12156
12157 case EF_ARM_EABI_VER4:
12158 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 12159 goto eabi;
d507cf36 12160
3a4a14e9
PB		 12161 case EF_ARM_EABI_VER5:
12162 fprintf (file, _(" [Version5 EABI]"));
3bfcb652
NC		 12163
12164 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12165 fprintf (file, _(" [soft-float ABI]"));
12166
12167 if (flags & EF_ARM_ABI_FLOAT_HARD)
12168 fprintf (file, _(" [hard-float ABI]"));
12169
12170 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12171
3a4a14e9 12172 eabi:
d507cf36
PB		 12173 if (flags & EF_ARM_BE8)
12174 fprintf (file, _(" [BE8]"));
12175
12176 if (flags & EF_ARM_LE8)
12177 fprintf (file, _(" [LE8]"));
12178
12179 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12180 break;
12181
fc830a83 12182 default:
9b485d32 12183 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 12184 break;
12185 }
252b5132 12186
fc830a83 12187 flags &= ~ EF_ARM_EABIMASK;
252b5132 12188
fc830a83 12189 if (flags & EF_ARM_RELEXEC)
9b485d32 12190 fprintf (file, _(" [relocatable executable]"));
252b5132 12191
fc830a83 12192 if (flags & EF_ARM_HASENTRY)
9b485d32 12193 fprintf (file, _(" [has entry point]"));
252b5132 12194
fc830a83
NC		 12195 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12196
12197 if (flags)
9b485d32 12198 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 12199
252b5132
RH		 12200 fputc ('\n', file);
12201
b34976b6 12202 return TRUE;
252b5132
RH		 12203}
12204
12205static int
57e8b36a 12206elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 12207{
2f0ca46a
NC		 12208 switch (ELF_ST_TYPE (elf_sym->st_info))
12209 {
12210 case STT_ARM_TFUNC:
12211 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 12212
2f0ca46a
NC		 12213 case STT_ARM_16BIT:
12214 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12215 This allows us to distinguish between data used by Thumb instructions
12216 and non-data (which is probably code) inside Thumb regions of an
12217 executable. */
1a0eb693 12218 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 12219 return ELF_ST_TYPE (elf_sym->st_info);
12220 break;
9a5aca8c 12221
ce855c42
NC		 12222 default:
12223 break;
2f0ca46a
NC		 12224 }
12225
12226 return type;
252b5132 12227}
f21f3fe0 12228
252b5132 12229static asection *
07adf181
AM		 12230elf32_arm_gc_mark_hook (asection *sec,
12231 struct bfd_link_info *info,
12232 Elf_Internal_Rela *rel,
12233 struct elf_link_hash_entry *h,
12234 Elf_Internal_Sym *sym)
252b5132
RH		 12235{
12236 if (h != NULL)
07adf181 12237 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 12238 {
12239 case R_ARM_GNU_VTINHERIT:
12240 case R_ARM_GNU_VTENTRY:
07adf181
AM		 12241 return NULL;
12242 }
9ad5cbcf 12243
07adf181 12244 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 12245}
12246
780a67af
NC		 12247/* Update the got entry reference counts for the section being removed. */
12248
b34976b6 12249static bfd_boolean
ba93b8ac
DJ		 12250elf32_arm_gc_sweep_hook (bfd * abfd,
12251 struct bfd_link_info * info,
12252 asection * sec,
12253 const Elf_Internal_Rela * relocs)
252b5132 12254{
5e681ec4
PB		 12255 Elf_Internal_Shdr *symtab_hdr;
12256 struct elf_link_hash_entry **sym_hashes;
12257 bfd_signed_vma *local_got_refcounts;
12258 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 12259 struct elf32_arm_link_hash_table * globals;
12260
7dda2462
TG		 12261 if (info->relocatable)
12262 return TRUE;
12263
eb043451 12264 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12265 if (globals == NULL)
12266 return FALSE;
5e681ec4
PB		 12267
12268 elf_section_data (sec)->local_dynrel = NULL;
12269
0ffa91dd 12270 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 12271 sym_hashes = elf_sym_hashes (abfd);
12272 local_got_refcounts = elf_local_got_refcounts (abfd);
12273
906e58ca 12274 check_use_blx (globals);
bd97cb95 12275
5e681ec4
PB		 12276 relend = relocs + sec->reloc_count;
12277 for (rel = relocs; rel < relend; rel++)
eb043451 12278 {
3eb128b2
AM		 12279 unsigned long r_symndx;
12280 struct elf_link_hash_entry *h = NULL;
f6e32f6d 12281 struct elf32_arm_link_hash_entry *eh;
eb043451 12282 int r_type;
34e77a92 12283 bfd_boolean call_reloc_p;
f6e32f6d
RS		 12284 bfd_boolean may_become_dynamic_p;
12285 bfd_boolean may_need_local_target_p;
34e77a92
RS		 12286 union gotplt_union *root_plt;
12287 struct arm_plt_info *arm_plt;
5e681ec4 12288
3eb128b2
AM		 12289 r_symndx = ELF32_R_SYM (rel->r_info);
12290 if (r_symndx >= symtab_hdr->sh_info)
12291 {
12292 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12293 while (h->root.type == bfd_link_hash_indirect
12294 || h->root.type == bfd_link_hash_warning)
12295 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12296 }
f6e32f6d
RS		 12297 eh = (struct elf32_arm_link_hash_entry *) h;
12298
34e77a92 12299 call_reloc_p = FALSE;
f6e32f6d
RS		 12300 may_become_dynamic_p = FALSE;
12301 may_need_local_target_p = FALSE;
3eb128b2 12302
eb043451 12303 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12304 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 12305 switch (r_type)
12306 {
12307 case R_ARM_GOT32:
eb043451 12308 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12309 case R_ARM_TLS_GD32:
12310 case R_ARM_TLS_IE32:
3eb128b2 12311 if (h != NULL)
eb043451 12312 {
eb043451
PB		 12313 if (h->got.refcount > 0)
12314 h->got.refcount -= 1;
12315 }
12316 else if (local_got_refcounts != NULL)
12317 {
12318 if (local_got_refcounts[r_symndx] > 0)
12319 local_got_refcounts[r_symndx] -= 1;
12320 }
12321 break;
12322
ba93b8ac 12323 case R_ARM_TLS_LDM32:
4dfe6ac6 12324 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12325 break;
12326
eb043451
PB		 12327 case R_ARM_PC24:
12328 case R_ARM_PLT32:
5b5bb741
PB		 12329 case R_ARM_CALL:
12330 case R_ARM_JUMP24:
eb043451 12331 case R_ARM_PREL31:
c19d1205 12332 case R_ARM_THM_CALL:
bd97cb95
DJ		 12333 case R_ARM_THM_JUMP24:
12334 case R_ARM_THM_JUMP19:
34e77a92 12335 call_reloc_p = TRUE;
f6e32f6d
RS		 12336 may_need_local_target_p = TRUE;
12337 break;
12338
12339 case R_ARM_ABS12:
12340 if (!globals->vxworks_p)
12341 {
12342 may_need_local_target_p = TRUE;
12343 break;
12344 }
12345 /* Fall through. */
12346 case R_ARM_ABS32:
12347 case R_ARM_ABS32_NOI:
12348 case R_ARM_REL32:
12349 case R_ARM_REL32_NOI:
b6895b4f
PB		 12350 case R_ARM_MOVW_ABS_NC:
12351 case R_ARM_MOVT_ABS:
12352 case R_ARM_MOVW_PREL_NC:
12353 case R_ARM_MOVT_PREL:
12354 case R_ARM_THM_MOVW_ABS_NC:
12355 case R_ARM_THM_MOVT_ABS:
12356 case R_ARM_THM_MOVW_PREL_NC:
12357 case R_ARM_THM_MOVT_PREL:
b7693d02 12358 /* Should the interworking branches be here also? */
f6e32f6d 12359 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12360 && (sec->flags & SEC_ALLOC) != 0)
12361 {
12362 if (h == NULL
12363 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12364 {
12365 call_reloc_p = TRUE;
12366 may_need_local_target_p = TRUE;
12367 }
12368 else
12369 may_become_dynamic_p = TRUE;
12370 }
f6e32f6d
RS		 12371 else
12372 may_need_local_target_p = TRUE;
12373 break;
b7693d02 12374
f6e32f6d
RS		 12375 default:
12376 break;
12377 }
5e681ec4 12378
34e77a92
RS		 12379 if (may_need_local_target_p
12380 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12381 {
27586251
HPN		 12382 /* If PLT refcount book-keeping is wrong and too low, we'll
12383 see a zero value (going to -1) for the root PLT reference
12384 count. */
12385 if (root_plt->refcount >= 0)
12386 {
12387 BFD_ASSERT (root_plt->refcount != 0);
12388 root_plt->refcount -= 1;
12389 }
12390 else
12391 /* A value of -1 means the symbol has become local, forced
12392 or seeing a hidden definition. Any other negative value
12393 is an error. */
12394 BFD_ASSERT (root_plt->refcount == -1);
34e77a92
RS		 12395
12396 if (!call_reloc_p)
12397 arm_plt->noncall_refcount--;
5e681ec4 12398
f6e32f6d 12399 if (r_type == R_ARM_THM_CALL)
34e77a92 12400 arm_plt->maybe_thumb_refcount--;
bd97cb95 12401
f6e32f6d
RS		 12402 if (r_type == R_ARM_THM_JUMP24
12403 || r_type == R_ARM_THM_JUMP19)
34e77a92 12404 arm_plt->thumb_refcount--;
f6e32f6d 12405 }
5e681ec4 12406
34e77a92 12407 if (may_become_dynamic_p)
f6e32f6d
RS		 12408 {
12409 struct elf_dyn_relocs **pp;
12410 struct elf_dyn_relocs *p;
5e681ec4 12411
34e77a92 12412 if (h != NULL)
9c489990 12413 pp = &(eh->dyn_relocs);
34e77a92
RS		 12414 else
12415 {
12416 Elf_Internal_Sym *isym;
12417
12418 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12419 abfd, r_symndx);
12420 if (isym == NULL)
12421 return FALSE;
12422 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12423 if (pp == NULL)
12424 return FALSE;
12425 }
9c489990 12426 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12427 if (p->sec == sec)
12428 {
12429 /* Everything must go for SEC. */
12430 *pp = p->next;
12431 break;
12432 }
eb043451
PB		 12433 }
12434 }
5e681ec4 12435
b34976b6 12436 return TRUE;
252b5132
RH		 12437}
12438
780a67af
NC		 12439/* Look through the relocs for a section during the first phase. */
12440
b34976b6 12441static bfd_boolean
57e8b36a
NC		 12442elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12443 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12444{
b34976b6
AM		 12445 Elf_Internal_Shdr *symtab_hdr;
12446 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12447 const Elf_Internal_Rela *rel;
12448 const Elf_Internal_Rela *rel_end;
12449 bfd *dynobj;
5e681ec4 12450 asection *sreloc;
5e681ec4 12451 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12452 bfd_boolean call_reloc_p;
12453 bfd_boolean may_become_dynamic_p;
12454 bfd_boolean may_need_local_target_p;
ce98a316 12455 unsigned long nsyms;
9a5aca8c 12456
1049f94e 12457 if (info->relocatable)
b34976b6 12458 return TRUE;
9a5aca8c 12459
0ffa91dd
NC		 12460 BFD_ASSERT (is_arm_elf (abfd));
12461
5e681ec4 12462 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12463 if (htab == NULL)
12464 return FALSE;
12465
5e681ec4 12466 sreloc = NULL;
9a5aca8c 12467
67687978
PB		 12468 /* Create dynamic sections for relocatable executables so that we can
12469 copy relocations. */
12470 if (htab->root.is_relocatable_executable
12471 && ! htab->root.dynamic_sections_created)
12472 {
12473 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12474 return FALSE;
12475 }
12476
cbc704f3
RS		 12477 if (htab->root.dynobj == NULL)
12478 htab->root.dynobj = abfd;
34e77a92
RS		 12479 if (!create_ifunc_sections (info))
12480 return FALSE;
cbc704f3
RS		 12481
12482 dynobj = htab->root.dynobj;
12483
0ffa91dd 12484 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12485 sym_hashes = elf_sym_hashes (abfd);
ce98a316 12486 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
b38cadfb 12487
252b5132
RH		 12488 rel_end = relocs + sec->reloc_count;
12489 for (rel = relocs; rel < rel_end; rel++)
12490 {
34e77a92 12491 Elf_Internal_Sym *isym;
252b5132 12492 struct elf_link_hash_entry *h;
b7693d02 12493 struct elf32_arm_link_hash_entry *eh;
252b5132 12494 unsigned long r_symndx;
eb043451 12495 int r_type;
9a5aca8c 12496
252b5132 12497 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12498 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12499 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12500
ce98a316
NC		 12501 if (r_symndx >= nsyms
12502 /* PR 9934: It is possible to have relocations that do not
12503 refer to symbols, thus it is also possible to have an
12504 object file containing relocations but no symbol table. */
cf35638d 12505 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12506 {
12507 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12508 r_symndx);
ba93b8ac
DJ		 12509 return FALSE;
12510 }
12511
34e77a92
RS		 12512 h = NULL;
12513 isym = NULL;
12514 if (nsyms > 0)
973a3492 12515 {
34e77a92
RS		 12516 if (r_symndx < symtab_hdr->sh_info)
12517 {
12518 /* A local symbol. */
12519 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12520 abfd, r_symndx);
12521 if (isym == NULL)
12522 return FALSE;
12523 }
12524 else
12525 {
12526 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12527 while (h->root.type == bfd_link_hash_indirect
12528 || h->root.type == bfd_link_hash_warning)
12529 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 12530
12531 /* PR15323, ref flags aren't set for references in the
12532 same object. */
12533 h->root.non_ir_ref = 1;
34e77a92 12534 }
973a3492 12535 }
9a5aca8c 12536
b7693d02
DJ		 12537 eh = (struct elf32_arm_link_hash_entry *) h;
12538
f6e32f6d
RS		 12539 call_reloc_p = FALSE;
12540 may_become_dynamic_p = FALSE;
12541 may_need_local_target_p = FALSE;
12542
0855e32b
NS		 12543 /* Could be done earlier, if h were already available. */
12544 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12545 switch (r_type)
99059e56 12546 {
5e681ec4 12547 case R_ARM_GOT32:
eb043451 12548 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12549 case R_ARM_TLS_GD32:
12550 case R_ARM_TLS_IE32:
0855e32b
NS		 12551 case R_ARM_TLS_GOTDESC:
12552 case R_ARM_TLS_DESCSEQ:
12553 case R_ARM_THM_TLS_DESCSEQ:
12554 case R_ARM_TLS_CALL:
12555 case R_ARM_THM_TLS_CALL:
5e681ec4 12556 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12557 {
12558 int tls_type, old_tls_type;
5e681ec4 12559
ba93b8ac
DJ		 12560 switch (r_type)
12561 {
12562 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
b38cadfb 12563
ba93b8ac 12564 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
b38cadfb 12565
0855e32b
NS		 12566 case R_ARM_TLS_GOTDESC:
12567 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12568 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12569 tls_type = GOT_TLS_GDESC; break;
b38cadfb 12570
ba93b8ac
DJ		 12571 default: tls_type = GOT_NORMAL; break;
12572 }
252b5132 12573
ba93b8ac
DJ		 12574 if (h != NULL)
12575 {
12576 h->got.refcount++;
12577 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12578 }
12579 else
12580 {
ba93b8ac 12581 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12582 if (!elf32_arm_allocate_local_sym_info (abfd))
12583 return FALSE;
12584 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12585 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12586 }
12587
0855e32b 12588 /* If a variable is accessed with both tls methods, two
99059e56 12589 slots may be created. */
0855e32b
NS		 12590 if (GOT_TLS_GD_ANY_P (old_tls_type)
12591 && GOT_TLS_GD_ANY_P (tls_type))
12592 tls_type |= old_tls_type;
12593
12594 /* We will already have issued an error message if there
12595 is a TLS/non-TLS mismatch, based on the symbol
12596 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12597 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12598 && tls_type != GOT_NORMAL)
12599 tls_type |= old_tls_type;
12600
0855e32b 12601 /* If the symbol is accessed in both IE and GDESC
99059e56
RM		 12602 method, we're able to relax. Turn off the GDESC flag,
12603 without messing up with any other kind of tls types
12604 that may be involved */
0855e32b
NS		 12605 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12606 tls_type &= ~GOT_TLS_GDESC;
12607
ba93b8ac
DJ		 12608 if (old_tls_type != tls_type)
12609 {
12610 if (h != NULL)
12611 elf32_arm_hash_entry (h)->tls_type = tls_type;
12612 else
12613 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12614 }
12615 }
8029a119 12616 /* Fall through. */
ba93b8ac
DJ		 12617
12618 case R_ARM_TLS_LDM32:
12619 if (r_type == R_ARM_TLS_LDM32)
12620 htab->tls_ldm_got.refcount++;
8029a119 12621 /* Fall through. */
252b5132 12622
c19d1205 12623 case R_ARM_GOTOFF32:
5e681ec4 12624 case R_ARM_GOTPC:
cbc704f3
RS		 12625 if (htab->root.sgot == NULL
12626 && !create_got_section (htab->root.dynobj, info))
12627 return FALSE;
252b5132
RH		 12628 break;
12629
252b5132 12630 case R_ARM_PC24:
7359ea65 12631 case R_ARM_PLT32:
5b5bb741
PB		 12632 case R_ARM_CALL:
12633 case R_ARM_JUMP24:
eb043451 12634 case R_ARM_PREL31:
c19d1205 12635 case R_ARM_THM_CALL:
bd97cb95
DJ		 12636 case R_ARM_THM_JUMP24:
12637 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12638 call_reloc_p = TRUE;
12639 may_need_local_target_p = TRUE;
12640 break;
12641
12642 case R_ARM_ABS12:
12643 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12644 ldr __GOTT_INDEX__ offsets. */
12645 if (!htab->vxworks_p)
12646 {
12647 may_need_local_target_p = TRUE;
12648 break;
12649 }
12650 /* Fall through. */
39623e12 12651
96c23d59
JM		 12652 case R_ARM_MOVW_ABS_NC:
12653 case R_ARM_MOVT_ABS:
12654 case R_ARM_THM_MOVW_ABS_NC:
12655 case R_ARM_THM_MOVT_ABS:
12656 if (info->shared)
12657 {
12658 (*_bfd_error_handler)
12659 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12660 abfd, elf32_arm_howto_table_1[r_type].name,
12661 (h) ? h->root.root.string : "a local symbol");
12662 bfd_set_error (bfd_error_bad_value);
12663 return FALSE;
12664 }
12665
12666 /* Fall through. */
39623e12
PB		 12667 case R_ARM_ABS32:
12668 case R_ARM_ABS32_NOI:
12669 case R_ARM_REL32:
12670 case R_ARM_REL32_NOI:
b6895b4f
PB		 12671 case R_ARM_MOVW_PREL_NC:
12672 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12673 case R_ARM_THM_MOVW_PREL_NC:
12674 case R_ARM_THM_MOVT_PREL:
39623e12 12675
b7693d02 12676 /* Should the interworking branches be listed here? */
67687978 12677 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12678 && (sec->flags & SEC_ALLOC) != 0)
12679 {
12680 if (h == NULL
12681 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12682 {
12683 /* In shared libraries and relocatable executables,
12684 we treat local relative references as calls;
12685 see the related SYMBOL_CALLS_LOCAL code in
12686 allocate_dynrelocs. */
12687 call_reloc_p = TRUE;
12688 may_need_local_target_p = TRUE;
12689 }
12690 else
12691 /* We are creating a shared library or relocatable
12692 executable, and this is a reloc against a global symbol,
12693 or a non-PC-relative reloc against a local symbol.
12694 We may need to copy the reloc into the output. */
12695 may_become_dynamic_p = TRUE;
12696 }
f6e32f6d
RS		 12697 else
12698 may_need_local_target_p = TRUE;
252b5132
RH		 12699 break;
12700
99059e56
RM		 12701 /* This relocation describes the C++ object vtable hierarchy.
12702 Reconstruct it for later use during GC. */
12703 case R_ARM_GNU_VTINHERIT:
12704 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12705 return FALSE;
12706 break;
12707
12708 /* This relocation describes which C++ vtable entries are actually
12709 used. Record for later use during GC. */
12710 case R_ARM_GNU_VTENTRY:
12711 BFD_ASSERT (h != NULL);
12712 if (h != NULL
12713 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12714 return FALSE;
12715 break;
12716 }
f6e32f6d
RS		 12717
12718 if (h != NULL)
12719 {
12720 if (call_reloc_p)
12721 /* We may need a .plt entry if the function this reloc
12722 refers to is in a different object, regardless of the
12723 symbol's type. We can't tell for sure yet, because
12724 something later might force the symbol local. */
12725 h->needs_plt = 1;
12726 else if (may_need_local_target_p)
12727 /* If this reloc is in a read-only section, we might
12728 need a copy reloc. We can't check reliably at this
12729 stage whether the section is read-only, as input
12730 sections have not yet been mapped to output sections.
12731 Tentatively set the flag for now, and correct in
12732 adjust_dynamic_symbol. */
12733 h->non_got_ref = 1;
12734 }
12735
34e77a92
RS		 12736 if (may_need_local_target_p
12737 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12738 {
34e77a92
RS		 12739 union gotplt_union *root_plt;
12740 struct arm_plt_info *arm_plt;
12741 struct arm_local_iplt_info *local_iplt;
12742
12743 if (h != NULL)
12744 {
12745 root_plt = &h->plt;
12746 arm_plt = &eh->plt;
12747 }
12748 else
12749 {
12750 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12751 if (local_iplt == NULL)
12752 return FALSE;
12753 root_plt = &local_iplt->root;
12754 arm_plt = &local_iplt->arm;
12755 }
12756
f6e32f6d
RS		 12757 /* If the symbol is a function that doesn't bind locally,
12758 this relocation will need a PLT entry. */
a8c887dd
NC		 12759 if (root_plt->refcount != -1)
12760 root_plt->refcount += 1;
34e77a92
RS		 12761
12762 if (!call_reloc_p)
12763 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12764
12765 /* It's too early to use htab->use_blx here, so we have to
12766 record possible blx references separately from
12767 relocs that definitely need a thumb stub. */
12768
12769 if (r_type == R_ARM_THM_CALL)
34e77a92 12770 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12771
12772 if (r_type == R_ARM_THM_JUMP24
12773 || r_type == R_ARM_THM_JUMP19)
34e77a92 12774 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12775 }
12776
12777 if (may_become_dynamic_p)
12778 {
12779 struct elf_dyn_relocs *p, **head;
12780
12781 /* Create a reloc section in dynobj. */
12782 if (sreloc == NULL)
12783 {
12784 sreloc = _bfd_elf_make_dynamic_reloc_section
12785 (sec, dynobj, 2, abfd, ! htab->use_rel);
12786
12787 if (sreloc == NULL)
12788 return FALSE;
12789
12790 /* BPABI objects never have dynamic relocations mapped. */
12791 if (htab->symbian_p)
12792 {
12793 flagword flags;
12794
12795 flags = bfd_get_section_flags (dynobj, sreloc);
12796 flags &= ~(SEC_LOAD | SEC_ALLOC);
12797 bfd_set_section_flags (dynobj, sreloc, flags);
12798 }
12799 }
12800
12801 /* If this is a global symbol, count the number of
12802 relocations we need for this symbol. */
12803 if (h != NULL)
12804 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12805 else
12806 {
34e77a92
RS		 12807 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12808 if (head == NULL)
f6e32f6d 12809 return FALSE;
f6e32f6d
RS		 12810 }
12811
12812 p = *head;
12813 if (p == NULL || p->sec != sec)
12814 {
12815 bfd_size_type amt = sizeof *p;
12816
12817 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12818 if (p == NULL)
12819 return FALSE;
12820 p->next = *head;
12821 *head = p;
12822 p->sec = sec;
12823 p->count = 0;
12824 p->pc_count = 0;
12825 }
12826
12827 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12828 p->pc_count += 1;
12829 p->count += 1;
12830 }
252b5132 12831 }
f21f3fe0 12832
b34976b6 12833 return TRUE;
252b5132
RH		 12834}
12835
6a5bb875
PB		 12836/* Unwinding tables are not referenced directly. This pass marks them as
12837 required if the corresponding code section is marked. */
12838
12839static bfd_boolean
906e58ca
NC		 12840elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12841 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12842{
12843 bfd *sub;
12844 Elf_Internal_Shdr **elf_shdrp;
12845 bfd_boolean again;
12846
7f6ab9f8
AM		 12847 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12848
6a5bb875
PB		 12849 /* Marking EH data may cause additional code sections to be marked,
12850 requiring multiple passes. */
12851 again = TRUE;
12852 while (again)
12853 {
12854 again = FALSE;
12855 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12856 {
12857 asection *o;
12858
0ffa91dd 12859 if (! is_arm_elf (sub))
6a5bb875
PB		 12860 continue;
12861
12862 elf_shdrp = elf_elfsections (sub);
12863 for (o = sub->sections; o != NULL; o = o->next)
12864 {
12865 Elf_Internal_Shdr *hdr;
0ffa91dd 12866
6a5bb875 12867 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 12868 if (hdr->sh_type == SHT_ARM_EXIDX
12869 && hdr->sh_link
12870 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 12871 && !o->gc_mark
12872 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12873 {
12874 again = TRUE;
12875 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12876 return FALSE;
12877 }
12878 }
12879 }
12880 }
12881
12882 return TRUE;
12883}
12884
3c9458e9
NC		 12885/* Treat mapping symbols as special target symbols. */
12886
12887static bfd_boolean
12888elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12889{
b0796911
PB		 12890 return bfd_is_arm_special_symbol_name (sym->name,
12891 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 12892}
12893
0367ecfb
NC		 12894/* This is a copy of elf_find_function() from elf.c except that
12895 ARM mapping symbols are ignored when looking for function names
12896 and STT_ARM_TFUNC is considered to a function type. */
252b5132 12897
0367ecfb
NC		 12898static bfd_boolean
12899arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12900 asection * section,
12901 asymbol ** symbols,
12902 bfd_vma offset,
12903 const char ** filename_ptr,
12904 const char ** functionname_ptr)
12905{
12906 const char * filename = NULL;
12907 asymbol * func = NULL;
12908 bfd_vma low_func = 0;
12909 asymbol ** p;
252b5132
RH		 12910
12911 for (p = symbols; *p != NULL; p++)
12912 {
12913 elf_symbol_type *q;
12914
12915 q = (elf_symbol_type *) *p;
12916
252b5132
RH		 12917 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12918 {
12919 default:
12920 break;
12921 case STT_FILE:
12922 filename = bfd_asymbol_name (&q->symbol);
12923 break;
252b5132
RH		 12924 case STT_FUNC:
12925 case STT_ARM_TFUNC:
9d2da7ca 12926 case STT_NOTYPE:
b0796911 12927 /* Skip mapping symbols. */
0367ecfb 12928 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 12929 && bfd_is_arm_special_symbol_name (q->symbol.name,
12930 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 12931 continue;
12932 /* Fall through. */
6b40fcba 12933 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 12934 && q->symbol.value >= low_func
12935 && q->symbol.value <= offset)
12936 {
12937 func = (asymbol *) q;
12938 low_func = q->symbol.value;
12939 }
12940 break;
12941 }
12942 }
12943
12944 if (func == NULL)
b34976b6 12945 return FALSE;
252b5132 12946
0367ecfb
NC		 12947 if (filename_ptr)
12948 *filename_ptr = filename;
12949 if (functionname_ptr)
12950 *functionname_ptr = bfd_asymbol_name (func);
12951
12952 return TRUE;
906e58ca 12953}
0367ecfb
NC		 12954
12955
12956/* Find the nearest line to a particular section and offset, for error
12957 reporting. This code is a duplicate of the code in elf.c, except
12958 that it uses arm_elf_find_function. */
12959
12960static bfd_boolean
12961elf32_arm_find_nearest_line (bfd * abfd,
12962 asection * section,
12963 asymbol ** symbols,
12964 bfd_vma offset,
12965 const char ** filename_ptr,
12966 const char ** functionname_ptr,
12967 unsigned int * line_ptr)
12968{
12969 bfd_boolean found = FALSE;
12970
12971 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12972
fc28f9aa 12973 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
99059e56 12974 section, symbols, offset,
0367ecfb 12975 filename_ptr, functionname_ptr,
9b8d1a36 12976 line_ptr, NULL, 0,
0367ecfb
NC		 12977 & elf_tdata (abfd)->dwarf2_find_line_info))
12978 {
12979 if (!*functionname_ptr)
12980 arm_elf_find_function (abfd, section, symbols, offset,
12981 *filename_ptr ? NULL : filename_ptr,
12982 functionname_ptr);
f21f3fe0 12983
0367ecfb
NC		 12984 return TRUE;
12985 }
12986
12987 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12988 & found, filename_ptr,
12989 functionname_ptr, line_ptr,
12990 & elf_tdata (abfd)->line_info))
12991 return FALSE;
12992
12993 if (found && (*functionname_ptr || *line_ptr))
12994 return TRUE;
12995
12996 if (symbols == NULL)
12997 return FALSE;
12998
12999 if (! arm_elf_find_function (abfd, section, symbols, offset,
13000 filename_ptr, functionname_ptr))
13001 return FALSE;
13002
13003 *line_ptr = 0;
b34976b6 13004 return TRUE;
252b5132
RH		 13005}
13006
4ab527b0
FF		 13007static bfd_boolean
13008elf32_arm_find_inliner_info (bfd * abfd,
13009 const char ** filename_ptr,
13010 const char ** functionname_ptr,
13011 unsigned int * line_ptr)
13012{
13013 bfd_boolean found;
13014 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13015 functionname_ptr, line_ptr,
13016 & elf_tdata (abfd)->dwarf2_find_line_info);
13017 return found;
13018}
13019
252b5132
RH		 13020/* Adjust a symbol defined by a dynamic object and referenced by a
13021 regular object. The current definition is in some section of the
13022 dynamic object, but we're not including those sections. We have to
13023 change the definition to something the rest of the link can
13024 understand. */
13025
b34976b6 13026static bfd_boolean
57e8b36a
NC		 13027elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13028 struct elf_link_hash_entry * h)
252b5132
RH		 13029{
13030 bfd * dynobj;
13031 asection * s;
b7693d02 13032 struct elf32_arm_link_hash_entry * eh;
67687978 13033 struct elf32_arm_link_hash_table *globals;
252b5132 13034
67687978 13035 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13036 if (globals == NULL)
13037 return FALSE;
13038
252b5132
RH		 13039 dynobj = elf_hash_table (info)->dynobj;
13040
13041 /* Make sure we know what is going on here. */
13042 BFD_ASSERT (dynobj != NULL
f5385ebf 13043 && (h->needs_plt
34e77a92 13044 || h->type == STT_GNU_IFUNC
f6e332e6 13045 || h->u.weakdef != NULL
f5385ebf
AM		 13046 || (h->def_dynamic
13047 && h->ref_regular
13048 && !h->def_regular)));
252b5132 13049
b7693d02
DJ		 13050 eh = (struct elf32_arm_link_hash_entry *) h;
13051
252b5132
RH		 13052 /* If this is a function, put it in the procedure linkage table. We
13053 will fill in the contents of the procedure linkage table later,
13054 when we know the address of the .got section. */
34e77a92 13055 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 13056 {
34e77a92
RS		 13057 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13058 symbol binds locally. */
5e681ec4 13059 if (h->plt.refcount <= 0
34e77a92
RS		 13060 || (h->type != STT_GNU_IFUNC
13061 && (SYMBOL_CALLS_LOCAL (info, h)
13062 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13063 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 13064 {
13065 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 13066 file, but the symbol was never referred to by a dynamic
13067 object, or if all references were garbage collected. In
13068 such a case, we don't actually need to build a procedure
13069 linkage table, and we can just do a PC24 reloc instead. */
13070 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13071 eh->plt.thumb_refcount = 0;
13072 eh->plt.maybe_thumb_refcount = 0;
13073 eh->plt.noncall_refcount = 0;
f5385ebf 13074 h->needs_plt = 0;
252b5132
RH		 13075 }
13076
b34976b6 13077 return TRUE;
252b5132 13078 }
5e681ec4 13079 else
b7693d02
DJ		 13080 {
13081 /* It's possible that we incorrectly decided a .plt reloc was
13082 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13083 in check_relocs. We can't decide accurately between function
13084 and non-function syms in check-relocs; Objects loaded later in
13085 the link may change h->type. So fix it now. */
13086 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13087 eh->plt.thumb_refcount = 0;
13088 eh->plt.maybe_thumb_refcount = 0;
13089 eh->plt.noncall_refcount = 0;
b7693d02 13090 }
252b5132
RH		 13091
13092 /* If this is a weak symbol, and there is a real definition, the
13093 processor independent code will have arranged for us to see the
13094 real definition first, and we can just use the same value. */
f6e332e6 13095 if (h->u.weakdef != NULL)
252b5132 13096 {
f6e332e6
AM		 13097 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13098 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13099 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13100 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 13101 return TRUE;
252b5132
RH		 13102 }
13103
ba93b8ac
DJ		 13104 /* If there are no non-GOT references, we do not need a copy
13105 relocation. */
13106 if (!h->non_got_ref)
13107 return TRUE;
13108
252b5132
RH		 13109 /* This is a reference to a symbol defined by a dynamic object which
13110 is not a function. */
13111
13112 /* If we are creating a shared library, we must presume that the
13113 only references to the symbol are via the global offset table.
13114 For such cases we need not do anything here; the relocations will
67687978
PB		 13115 be handled correctly by relocate_section. Relocatable executables
13116 can reference data in shared objects directly, so we don't need to
13117 do anything here. */
13118 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 13119 return TRUE;
252b5132
RH		 13120
13121 /* We must allocate the symbol in our .dynbss section, which will
13122 become part of the .bss section of the executable. There will be
13123 an entry for this symbol in the .dynsym section. The dynamic
13124 object will contain position independent code, so all references
13125 from the dynamic object to this symbol will go through the global
13126 offset table. The dynamic linker will use the .dynsym entry to
13127 determine the address it must put in the global offset table, so
13128 both the dynamic object and the regular object will refer to the
13129 same memory location for the variable. */
3d4d4302 13130 s = bfd_get_linker_section (dynobj, ".dynbss");
252b5132
RH		 13131 BFD_ASSERT (s != NULL);
13132
13133 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13134 copy the initial value out of the dynamic object and into the
13135 runtime process image. We need to remember the offset into the
00a97672 13136 .rel(a).bss section we are going to use. */
1d7e9d18 13137 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
252b5132
RH		 13138 {
13139 asection *srel;
13140
3d4d4302 13141 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 13142 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 13143 h->needs_copy = 1;
252b5132
RH		 13144 }
13145
027297b7 13146 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 13147}
13148
5e681ec4
PB		 13149/* Allocate space in .plt, .got and associated reloc sections for
13150 dynamic relocs. */
13151
13152static bfd_boolean
47beaa6a 13153allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 13154{
13155 struct bfd_link_info *info;
13156 struct elf32_arm_link_hash_table *htab;
13157 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 13158 struct elf_dyn_relocs *p;
5e681ec4
PB		 13159
13160 if (h->root.type == bfd_link_hash_indirect)
13161 return TRUE;
13162
e6a6bb22
AM		 13163 eh = (struct elf32_arm_link_hash_entry *) h;
13164
5e681ec4
PB		 13165 info = (struct bfd_link_info *) inf;
13166 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13167 if (htab == NULL)
13168 return FALSE;
5e681ec4 13169
34e77a92 13170 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 13171 && h->plt.refcount > 0)
13172 {
13173 /* Make sure this symbol is output as a dynamic symbol.
13174 Undefined weak syms won't yet be marked as dynamic. */
13175 if (h->dynindx == -1
f5385ebf 13176 && !h->forced_local)
5e681ec4 13177 {
c152c796 13178 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13179 return FALSE;
13180 }
13181
34e77a92
RS		 13182 /* If the call in the PLT entry binds locally, the associated
13183 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13184 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13185 than the .plt section. */
13186 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13187 {
13188 eh->is_iplt = 1;
13189 if (eh->plt.noncall_refcount == 0
13190 && SYMBOL_REFERENCES_LOCAL (info, h))
13191 /* All non-call references can be resolved directly.
13192 This means that they can (and in some cases, must)
13193 resolve directly to the run-time target, rather than
13194 to the PLT. That in turns means that any .got entry
13195 would be equal to the .igot.plt entry, so there's
13196 no point having both. */
13197 h->got.refcount = 0;
13198 }
13199
5e681ec4 13200 if (info->shared
34e77a92 13201 || eh->is_iplt
7359ea65 13202 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 13203 {
34e77a92 13204 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 13205
5e681ec4
PB		 13206 /* If this symbol is not defined in a regular file, and we are
13207 not generating a shared library, then set the symbol to this
13208 location in the .plt. This is required to make function
13209 pointers compare as equal between the normal executable and
13210 the shared library. */
13211 if (! info->shared
f5385ebf 13212 && !h->def_regular)
5e681ec4 13213 {
34e77a92 13214 h->root.u.def.section = htab->root.splt;
5e681ec4 13215 h->root.u.def.value = h->plt.offset;
5e681ec4 13216
67d74e43
DJ		 13217 /* Make sure the function is not marked as Thumb, in case
13218 it is the target of an ABS32 relocation, which will
13219 point to the PLT entry. */
35fc36a8 13220 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 13221 }
022f8312 13222
0855e32b 13223 htab->next_tls_desc_index++;
00a97672
RS		 13224
13225 /* VxWorks executables have a second set of relocations for
13226 each PLT entry. They go in a separate relocation section,
13227 which is processed by the kernel loader. */
13228 if (htab->vxworks_p && !info->shared)
13229 {
13230 /* There is a relocation for the initial PLT entry:
13231 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13232 if (h->plt.offset == htab->plt_header_size)
47beaa6a 13233 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 13234
13235 /* There are two extra relocations for each subsequent
13236 PLT entry: an R_ARM_32 relocation for the GOT entry,
13237 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 13238 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 13239 }
5e681ec4
PB		 13240 }
13241 else
13242 {
13243 h->plt.offset = (bfd_vma) -1;
f5385ebf 13244 h->needs_plt = 0;
5e681ec4
PB		 13245 }
13246 }
13247 else
13248 {
13249 h->plt.offset = (bfd_vma) -1;
f5385ebf 13250 h->needs_plt = 0;
5e681ec4
PB		 13251 }
13252
0855e32b
NS		 13253 eh = (struct elf32_arm_link_hash_entry *) h;
13254 eh->tlsdesc_got = (bfd_vma) -1;
13255
5e681ec4
PB		 13256 if (h->got.refcount > 0)
13257 {
13258 asection *s;
13259 bfd_boolean dyn;
ba93b8ac
DJ		 13260 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13261 int indx;
5e681ec4
PB		 13262
13263 /* Make sure this symbol is output as a dynamic symbol.
13264 Undefined weak syms won't yet be marked as dynamic. */
13265 if (h->dynindx == -1
f5385ebf 13266 && !h->forced_local)
5e681ec4 13267 {
c152c796 13268 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13269 return FALSE;
13270 }
13271
e5a52504
MM		 13272 if (!htab->symbian_p)
13273 {
362d30a1 13274 s = htab->root.sgot;
e5a52504 13275 h->got.offset = s->size;
ba93b8ac
DJ		 13276
13277 if (tls_type == GOT_UNKNOWN)
13278 abort ();
13279
13280 if (tls_type == GOT_NORMAL)
13281 /* Non-TLS symbols need one GOT slot. */
13282 s->size += 4;
13283 else
13284 {
99059e56
RM		 13285 if (tls_type & GOT_TLS_GDESC)
13286 {
0855e32b 13287 /* R_ARM_TLS_DESC needs 2 GOT slots. */
99059e56 13288 eh->tlsdesc_got
0855e32b
NS		 13289 = (htab->root.sgotplt->size
13290 - elf32_arm_compute_jump_table_size (htab));
99059e56
RM		 13291 htab->root.sgotplt->size += 8;
13292 h->got.offset = (bfd_vma) -2;
34e77a92 13293 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13294 reloc in the middle of .got.plt. */
99059e56
RM		 13295 htab->num_tls_desc++;
13296 }
0855e32b 13297
ba93b8ac 13298 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 13299 {
13300 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13301 the symbol is both GD and GDESC, got.offset may
13302 have been overwritten. */
13303 h->got.offset = s->size;
13304 s->size += 8;
13305 }
13306
ba93b8ac
DJ		 13307 if (tls_type & GOT_TLS_IE)
13308 /* R_ARM_TLS_IE32 needs one GOT slot. */
13309 s->size += 4;
13310 }
13311
e5a52504 13312 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 13313
13314 indx = 0;
13315 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13316 && (!info->shared
13317 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13318 indx = h->dynindx;
13319
13320 if (tls_type != GOT_NORMAL
13321 && (info->shared || indx != 0)
13322 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13323 || h->root.type != bfd_link_hash_undefweak))
13324 {
13325 if (tls_type & GOT_TLS_IE)
47beaa6a 13326 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13327
13328 if (tls_type & GOT_TLS_GD)
47beaa6a 13329 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13330
b38cadfb 13331 if (tls_type & GOT_TLS_GDESC)
0855e32b 13332 {
47beaa6a 13333 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13334 /* GDESC needs a trampoline to jump to. */
13335 htab->tls_trampoline = -1;
13336 }
13337
13338 /* Only GD needs it. GDESC just emits one relocation per
13339 2 entries. */
b38cadfb 13340 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13341 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13342 }
6f820c85 13343 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 13344 {
13345 if (htab->root.dynamic_sections_created)
13346 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13347 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13348 }
34e77a92
RS		 13349 else if (h->type == STT_GNU_IFUNC
13350 && eh->plt.noncall_refcount == 0)
13351 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13352 they all resolve dynamically instead. Reserve room for the
13353 GOT entry's R_ARM_IRELATIVE relocation. */
13354 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
31943882
WN		 13355 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13356 || h->root.type != bfd_link_hash_undefweak))
b436d854 13357 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13358 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13359 }
5e681ec4
PB		 13360 }
13361 else
13362 h->got.offset = (bfd_vma) -1;
13363
a4fd1a8e
PB		 13364 /* Allocate stubs for exported Thumb functions on v4t. */
13365 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13366 && h->def_regular
35fc36a8 13367 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13368 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13369 {
13370 struct elf_link_hash_entry * th;
13371 struct bfd_link_hash_entry * bh;
13372 struct elf_link_hash_entry * myh;
13373 char name[1024];
13374 asection *s;
13375 bh = NULL;
13376 /* Create a new symbol to regist the real location of the function. */
13377 s = h->root.u.def.section;
906e58ca 13378 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13379 _bfd_generic_link_add_one_symbol (info, s->owner,
13380 name, BSF_GLOBAL, s,
13381 h->root.u.def.value,
13382 NULL, TRUE, FALSE, &bh);
13383
13384 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13385 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13386 myh->forced_local = 1;
35fc36a8 13387 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13388 eh->export_glue = myh;
13389 th = record_arm_to_thumb_glue (info, h);
13390 /* Point the symbol at the stub. */
13391 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13392 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13393 h->root.u.def.section = th->root.u.def.section;
13394 h->root.u.def.value = th->root.u.def.value & ~1;
13395 }
13396
0bdcacaf 13397 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13398 return TRUE;
13399
13400 /* In the shared -Bsymbolic case, discard space allocated for
13401 dynamic pc-relative relocs against symbols which turn out to be
13402 defined in regular objects. For the normal shared case, discard
13403 space for pc-relative relocs that have become local due to symbol
13404 visibility changes. */
13405
67687978 13406 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13407 {
7bdca076 13408 /* The only relocs that use pc_count are R_ARM_REL32 and
99059e56
RM		 13409 R_ARM_REL32_NOI, which will appear on something like
13410 ".long foo - .". We want calls to protected symbols to resolve
13411 directly to the function rather than going via the plt. If people
13412 want function pointer comparisons to work as expected then they
13413 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13414 if (SYMBOL_CALLS_LOCAL (info, h))
13415 {
0bdcacaf 13416 struct elf_dyn_relocs **pp;
ba93b8ac 13417
0bdcacaf 13418 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13419 {
13420 p->count -= p->pc_count;
13421 p->pc_count = 0;
13422 if (p->count == 0)
13423 *pp = p->next;
13424 else
13425 pp = &p->next;
13426 }
13427 }
13428
4dfe6ac6 13429 if (htab->vxworks_p)
3348747a 13430 {
0bdcacaf 13431 struct elf_dyn_relocs **pp;
3348747a 13432
0bdcacaf 13433 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13434 {
0bdcacaf 13435 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13436 *pp = p->next;
13437 else
13438 pp = &p->next;
13439 }
13440 }
13441
ba93b8ac 13442 /* Also discard relocs on undefined weak syms with non-default
99059e56 13443 visibility. */
0bdcacaf 13444 if (eh->dyn_relocs != NULL
5e681ec4 13445 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13446 {
13447 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13448 eh->dyn_relocs = NULL;
22d606e9
AM		 13449
13450 /* Make sure undefined weak symbols are output as a dynamic
13451 symbol in PIEs. */
13452 else if (h->dynindx == -1
13453 && !h->forced_local)
13454 {
13455 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13456 return FALSE;
13457 }
13458 }
13459
67687978
PB		 13460 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13461 && h->root.type == bfd_link_hash_new)
13462 {
13463 /* Output absolute symbols so that we can create relocations
13464 against them. For normal symbols we output a relocation
13465 against the section that contains them. */
13466 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13467 return FALSE;
13468 }
13469
5e681ec4
PB		 13470 }
13471 else
13472 {
13473 /* For the non-shared case, discard space for relocs against
13474 symbols which turn out to need copy relocs or are not
13475 dynamic. */
13476
f5385ebf
AM		 13477 if (!h->non_got_ref
13478 && ((h->def_dynamic
13479 && !h->def_regular)
5e681ec4
PB		 13480 || (htab->root.dynamic_sections_created
13481 && (h->root.type == bfd_link_hash_undefweak
13482 || h->root.type == bfd_link_hash_undefined))))
13483 {
13484 /* Make sure this symbol is output as a dynamic symbol.
13485 Undefined weak syms won't yet be marked as dynamic. */
13486 if (h->dynindx == -1
f5385ebf 13487 && !h->forced_local)
5e681ec4 13488 {
c152c796 13489 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13490 return FALSE;
13491 }
13492
13493 /* If that succeeded, we know we'll be keeping all the
13494 relocs. */
13495 if (h->dynindx != -1)
13496 goto keep;
13497 }
13498
0bdcacaf 13499 eh->dyn_relocs = NULL;
5e681ec4
PB		 13500
13501 keep: ;
13502 }
13503
13504 /* Finally, allocate space. */
0bdcacaf 13505 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13506 {
0bdcacaf 13507 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13508 if (h->type == STT_GNU_IFUNC
13509 && eh->plt.noncall_refcount == 0
13510 && SYMBOL_REFERENCES_LOCAL (info, h))
13511 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13512 else
13513 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13514 }
13515
13516 return TRUE;
13517}
13518
08d1f311
DJ		 13519/* Find any dynamic relocs that apply to read-only sections. */
13520
13521static bfd_boolean
8029a119 13522elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13523{
8029a119 13524 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13525 struct elf_dyn_relocs * p;
08d1f311 13526
08d1f311 13527 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13528 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13529 {
0bdcacaf 13530 asection *s = p->sec;
08d1f311
DJ		 13531
13532 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13533 {
13534 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13535
13536 info->flags |= DF_TEXTREL;
13537
13538 /* Not an error, just cut short the traversal. */
13539 return FALSE;
13540 }
13541 }
13542 return TRUE;
13543}
13544
d504ffc8
DJ		 13545void
13546bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13547 int byteswap_code)
13548{
13549 struct elf32_arm_link_hash_table *globals;
13550
13551 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13552 if (globals == NULL)
13553 return;
13554
d504ffc8
DJ		 13555 globals->byteswap_code = byteswap_code;
13556}
13557
252b5132
RH		 13558/* Set the sizes of the dynamic sections. */
13559
b34976b6 13560static bfd_boolean
57e8b36a
NC		 13561elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13562 struct bfd_link_info * info)
252b5132
RH		 13563{
13564 bfd * dynobj;
13565 asection * s;
b34976b6
AM		 13566 bfd_boolean plt;
13567 bfd_boolean relocs;
5e681ec4
PB		 13568 bfd *ibfd;
13569 struct elf32_arm_link_hash_table *htab;
252b5132 13570
5e681ec4 13571 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13572 if (htab == NULL)
13573 return FALSE;
13574
252b5132
RH		 13575 dynobj = elf_hash_table (info)->dynobj;
13576 BFD_ASSERT (dynobj != NULL);
39b41c9c 13577 check_use_blx (htab);
252b5132
RH		 13578
13579 if (elf_hash_table (info)->dynamic_sections_created)
13580 {
13581 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13582 if (info->executable)
252b5132 13583 {
3d4d4302 13584 s = bfd_get_linker_section (dynobj, ".interp");
252b5132 13585 BFD_ASSERT (s != NULL);
eea6121a 13586 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13587 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13588 }
13589 }
5e681ec4
PB		 13590
13591 /* Set up .got offsets for local syms, and space for local dynamic
13592 relocs. */
13593 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 13594 {
5e681ec4
PB		 13595 bfd_signed_vma *local_got;
13596 bfd_signed_vma *end_local_got;
34e77a92 13597 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13598 char *local_tls_type;
0855e32b 13599 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13600 bfd_size_type locsymcount;
13601 Elf_Internal_Shdr *symtab_hdr;
13602 asection *srel;
4dfe6ac6 13603 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13604 unsigned int symndx;
5e681ec4 13605
0ffa91dd 13606 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13607 continue;
13608
13609 for (s = ibfd->sections; s != NULL; s = s->next)
13610 {
0bdcacaf 13611 struct elf_dyn_relocs *p;
5e681ec4 13612
0bdcacaf 13613 for (p = (struct elf_dyn_relocs *)
99059e56 13614 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13615 {
0bdcacaf
RS		 13616 if (!bfd_is_abs_section (p->sec)
13617 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13618 {
13619 /* Input section has been discarded, either because
13620 it is a copy of a linkonce section or due to
13621 linker script /DISCARD/, so we'll be discarding
13622 the relocs too. */
13623 }
3348747a 13624 else if (is_vxworks
0bdcacaf 13625 && strcmp (p->sec->output_section->name,
3348747a
NS		 13626 ".tls_vars") == 0)
13627 {
13628 /* Relocations in vxworks .tls_vars sections are
13629 handled specially by the loader. */
13630 }
5e681ec4
PB		 13631 else if (p->count != 0)
13632 {
0bdcacaf 13633 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13634 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13635 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13636 info->flags |= DF_TEXTREL;
13637 }
13638 }
13639 }
13640
13641 local_got = elf_local_got_refcounts (ibfd);
13642 if (!local_got)
13643 continue;
13644
0ffa91dd 13645 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13646 locsymcount = symtab_hdr->sh_info;
13647 end_local_got = local_got + locsymcount;
34e77a92 13648 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13649 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13650 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13651 symndx = 0;
362d30a1
RS		 13652 s = htab->root.sgot;
13653 srel = htab->root.srelgot;
0855e32b 13654 for (; local_got < end_local_got;
34e77a92
RS		 13655 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13656 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13657 {
0855e32b 13658 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13659 local_iplt = *local_iplt_ptr;
13660 if (local_iplt != NULL)
13661 {
13662 struct elf_dyn_relocs *p;
13663
13664 if (local_iplt->root.refcount > 0)
13665 {
13666 elf32_arm_allocate_plt_entry (info, TRUE,
13667 &local_iplt->root,
13668 &local_iplt->arm);
13669 if (local_iplt->arm.noncall_refcount == 0)
13670 /* All references to the PLT are calls, so all
13671 non-call references can resolve directly to the
13672 run-time target. This means that the .got entry
13673 would be the same as the .igot.plt entry, so there's
13674 no point creating both. */
13675 *local_got = 0;
13676 }
13677 else
13678 {
13679 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13680 local_iplt->root.offset = (bfd_vma) -1;
13681 }
13682
13683 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13684 {
13685 asection *psrel;
13686
13687 psrel = elf_section_data (p->sec)->sreloc;
13688 if (local_iplt->arm.noncall_refcount == 0)
13689 elf32_arm_allocate_irelocs (info, psrel, p->count);
13690 else
13691 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13692 }
13693 }
5e681ec4
PB		 13694 if (*local_got > 0)
13695 {
34e77a92
RS		 13696 Elf_Internal_Sym *isym;
13697
eea6121a 13698 *local_got = s->size;
ba93b8ac
DJ		 13699 if (*local_tls_type & GOT_TLS_GD)
13700 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13701 s->size += 8;
0855e32b
NS		 13702 if (*local_tls_type & GOT_TLS_GDESC)
13703 {
13704 *local_tlsdesc_gotent = htab->root.sgotplt->size
13705 - elf32_arm_compute_jump_table_size (htab);
13706 htab->root.sgotplt->size += 8;
13707 *local_got = (bfd_vma) -2;
34e77a92 13708 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13709 reloc in the middle of .got.plt. */
99059e56 13710 htab->num_tls_desc++;
0855e32b 13711 }
ba93b8ac
DJ		 13712 if (*local_tls_type & GOT_TLS_IE)
13713 s->size += 4;
ba93b8ac 13714
0855e32b
NS		 13715 if (*local_tls_type & GOT_NORMAL)
13716 {
13717 /* If the symbol is both GD and GDESC, *local_got
13718 may have been overwritten. */
13719 *local_got = s->size;
13720 s->size += 4;
13721 }
13722
34e77a92
RS		 13723 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13724 if (isym == NULL)
13725 return FALSE;
13726
13727 /* If all references to an STT_GNU_IFUNC PLT are calls,
13728 then all non-call references, including this GOT entry,
13729 resolve directly to the run-time target. */
13730 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13731 && (local_iplt == NULL
13732 || local_iplt->arm.noncall_refcount == 0))
13733 elf32_arm_allocate_irelocs (info, srel, 1);
3064e1ff 13734 else if (info->shared || output_bfd->flags & DYNAMIC)
0855e32b 13735 {
3064e1ff
JB		 13736 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13737 || *local_tls_type & GOT_TLS_GD)
13738 elf32_arm_allocate_dynrelocs (info, srel, 1);
99059e56 13739
3064e1ff
JB		 13740 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13741 {
13742 elf32_arm_allocate_dynrelocs (info,
13743 htab->root.srelplt, 1);
13744 htab->tls_trampoline = -1;
13745 }
0855e32b 13746 }
5e681ec4
PB		 13747 }
13748 else
13749 *local_got = (bfd_vma) -1;
13750 }
252b5132
RH		 13751 }
13752
ba93b8ac
DJ		 13753 if (htab->tls_ldm_got.refcount > 0)
13754 {
13755 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13756 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13757 htab->tls_ldm_got.offset = htab->root.sgot->size;
13758 htab->root.sgot->size += 8;
ba93b8ac 13759 if (info->shared)
47beaa6a 13760 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13761 }
13762 else
13763 htab->tls_ldm_got.offset = -1;
13764
5e681ec4
PB		 13765 /* Allocate global sym .plt and .got entries, and space for global
13766 sym dynamic relocs. */
47beaa6a 13767 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13768
d504ffc8
DJ		 13769 /* Here we rummage through the found bfds to collect glue information. */
13770 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 13771 {
0ffa91dd 13772 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13773 continue;
13774
c7b8f16e
JB		 13775 /* Initialise mapping tables for code/data. */
13776 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13777
c7b8f16e
JB		 13778 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13779 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
99059e56
RM		 13780 /* xgettext:c-format */
13781 _bfd_error_handler (_("Errors encountered processing file %s"),
c7b8f16e
JB		 13782 ibfd->filename);
13783 }
d504ffc8 13784
3e6b1042
DJ		 13785 /* Allocate space for the glue sections now that we've sized them. */
13786 bfd_elf32_arm_allocate_interworking_sections (info);
13787
0855e32b
NS		 13788 /* For every jump slot reserved in the sgotplt, reloc_count is
13789 incremented. However, when we reserve space for TLS descriptors,
13790 it's not incremented, so in order to compute the space reserved
13791 for them, it suffices to multiply the reloc count by the jump
13792 slot size. */
13793 if (htab->root.srelplt)
13794 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13795
13796 if (htab->tls_trampoline)
13797 {
13798 if (htab->root.splt->size == 0)
13799 htab->root.splt->size += htab->plt_header_size;
b38cadfb 13800
0855e32b
NS		 13801 htab->tls_trampoline = htab->root.splt->size;
13802 htab->root.splt->size += htab->plt_entry_size;
b38cadfb 13803
0855e32b 13804 /* If we're not using lazy TLS relocations, don't generate the
99059e56 13805 PLT and GOT entries they require. */
0855e32b
NS		 13806 if (!(info->flags & DF_BIND_NOW))
13807 {
13808 htab->dt_tlsdesc_got = htab->root.sgot->size;
13809 htab->root.sgot->size += 4;
13810
13811 htab->dt_tlsdesc_plt = htab->root.splt->size;
13812 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13813 }
13814 }
13815
252b5132
RH		 13816 /* The check_relocs and adjust_dynamic_symbol entry points have
13817 determined the sizes of the various dynamic sections. Allocate
13818 memory for them. */
b34976b6
AM		 13819 plt = FALSE;
13820 relocs = FALSE;
252b5132
RH		 13821 for (s = dynobj->sections; s != NULL; s = s->next)
13822 {
13823 const char * name;
252b5132
RH		 13824
13825 if ((s->flags & SEC_LINKER_CREATED) == 0)
13826 continue;
13827
13828 /* It's OK to base decisions on the section name, because none
13829 of the dynobj section names depend upon the input files. */
13830 name = bfd_get_section_name (dynobj, s);
13831
34e77a92 13832 if (s == htab->root.splt)
252b5132 13833 {
c456f082
AM		 13834 /* Remember whether there is a PLT. */
13835 plt = s->size != 0;
252b5132 13836 }
0112cd26 13837 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13838 {
c456f082 13839 if (s->size != 0)
252b5132 13840 {
252b5132 13841 /* Remember whether there are any reloc sections other
00a97672 13842 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13843 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13844 relocs = TRUE;
252b5132
RH		 13845
13846 /* We use the reloc_count field as a counter if we need
13847 to copy relocs into the output file. */
13848 s->reloc_count = 0;
13849 }
13850 }
34e77a92
RS		 13851 else if (s != htab->root.sgot
13852 && s != htab->root.sgotplt
13853 && s != htab->root.iplt
13854 && s != htab->root.igotplt
13855 && s != htab->sdynbss)
252b5132
RH		 13856 {
13857 /* It's not one of our sections, so don't allocate space. */
13858 continue;
13859 }
13860
c456f082 13861 if (s->size == 0)
252b5132 13862 {
c456f082 13863 /* If we don't need this section, strip it from the
00a97672
RS		 13864 output file. This is mostly to handle .rel(a).bss and
13865 .rel(a).plt. We must create both sections in
c456f082
AM		 13866 create_dynamic_sections, because they must be created
13867 before the linker maps input sections to output
13868 sections. The linker does that before
13869 adjust_dynamic_symbol is called, and it is that
13870 function which decides whether anything needs to go
13871 into these sections. */
8423293d 13872 s->flags |= SEC_EXCLUDE;
252b5132
RH		 13873 continue;
13874 }
13875
c456f082
AM		 13876 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13877 continue;
13878
252b5132 13879 /* Allocate memory for the section contents. */
21d799b5 13880 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 13881 if (s->contents == NULL)
b34976b6 13882 return FALSE;
252b5132
RH		 13883 }
13884
13885 if (elf_hash_table (info)->dynamic_sections_created)
13886 {
13887 /* Add some entries to the .dynamic section. We fill in the
13888 values later, in elf32_arm_finish_dynamic_sections, but we
13889 must add the entries now so that we get the correct size for
13890 the .dynamic section. The DT_DEBUG entry is filled in by the
13891 dynamic linker and used by the debugger. */
dc810e39 13892#define add_dynamic_entry(TAG, VAL) \
5a580b3a 13893 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 13894
8532796c 13895 if (info->executable)
252b5132 13896 {
dc810e39 13897 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 13898 return FALSE;
252b5132
RH		 13899 }
13900
13901 if (plt)
13902 {
dc810e39
AM		 13903 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13904 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 13905 || !add_dynamic_entry (DT_PLTREL,
13906 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 13907 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 13908 return FALSE;
0855e32b
NS		 13909
13910 if (htab->dt_tlsdesc_plt &&
b38cadfb 13911 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
0855e32b 13912 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
b38cadfb 13913 return FALSE;
252b5132
RH		 13914 }
13915
13916 if (relocs)
13917 {
00a97672
RS		 13918 if (htab->use_rel)
13919 {
13920 if (!add_dynamic_entry (DT_REL, 0)
13921 || !add_dynamic_entry (DT_RELSZ, 0)
13922 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13923 return FALSE;
13924 }
13925 else
13926 {
13927 if (!add_dynamic_entry (DT_RELA, 0)
13928 || !add_dynamic_entry (DT_RELASZ, 0)
13929 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13930 return FALSE;
13931 }
252b5132
RH		 13932 }
13933
08d1f311
DJ		 13934 /* If any dynamic relocs apply to a read-only section,
13935 then we need a DT_TEXTREL entry. */
13936 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 13937 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13938 info);
08d1f311 13939
99e4ae17 13940 if ((info->flags & DF_TEXTREL) != 0)
252b5132 13941 {
dc810e39 13942 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 13943 return FALSE;
252b5132 13944 }
7a2b07ff
NS		 13945 if (htab->vxworks_p
13946 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13947 return FALSE;
252b5132 13948 }
8532796c 13949#undef add_dynamic_entry
252b5132 13950
b34976b6 13951 return TRUE;
252b5132
RH		 13952}
13953
0855e32b
NS		 13954/* Size sections even though they're not dynamic. We use it to setup
13955 _TLS_MODULE_BASE_, if needed. */
13956
13957static bfd_boolean
13958elf32_arm_always_size_sections (bfd *output_bfd,
99059e56 13959 struct bfd_link_info *info)
0855e32b
NS		 13960{
13961 asection *tls_sec;
13962
13963 if (info->relocatable)
13964 return TRUE;
13965
13966 tls_sec = elf_hash_table (info)->tls_sec;
13967
13968 if (tls_sec)
13969 {
13970 struct elf_link_hash_entry *tlsbase;
13971
13972 tlsbase = elf_link_hash_lookup
13973 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13974
13975 if (tlsbase)
99059e56
RM		 13976 {
13977 struct bfd_link_hash_entry *bh = NULL;
0855e32b 13978 const struct elf_backend_data *bed
99059e56 13979 = get_elf_backend_data (output_bfd);
0855e32b 13980
99059e56 13981 if (!(_bfd_generic_link_add_one_symbol
0855e32b
NS		 13982 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13983 tls_sec, 0, NULL, FALSE,
13984 bed->collect, &bh)))
13985 return FALSE;
b38cadfb 13986
99059e56
RM		 13987 tlsbase->type = STT_TLS;
13988 tlsbase = (struct elf_link_hash_entry *)bh;
13989 tlsbase->def_regular = 1;
13990 tlsbase->other = STV_HIDDEN;
13991 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
0855e32b
NS		 13992 }
13993 }
13994 return TRUE;
13995}
13996
252b5132
RH		 13997/* Finish up dynamic symbol handling. We set the contents of various
13998 dynamic sections here. */
13999
b34976b6 14000static bfd_boolean
906e58ca
NC		 14001elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14002 struct bfd_link_info * info,
14003 struct elf_link_hash_entry * h,
14004 Elf_Internal_Sym * sym)
252b5132 14005{
e5a52504 14006 struct elf32_arm_link_hash_table *htab;
b7693d02 14007 struct elf32_arm_link_hash_entry *eh;
252b5132 14008
e5a52504 14009 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14010 if (htab == NULL)
14011 return FALSE;
14012
b7693d02 14013 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 14014
14015 if (h->plt.offset != (bfd_vma) -1)
14016 {
34e77a92 14017 if (!eh->is_iplt)
e5a52504 14018 {
34e77a92
RS		 14019 BFD_ASSERT (h->dynindx != -1);
14020 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14021 h->dynindx, 0);
e5a52504 14022 }
57e8b36a 14023
f5385ebf 14024 if (!h->def_regular)
252b5132
RH		 14025 {
14026 /* Mark the symbol as undefined, rather than as defined in
14027 the .plt section. Leave the value alone. */
14028 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 14029 /* If the symbol is weak, we do need to clear the value.
14030 Otherwise, the PLT entry would provide a definition for
14031 the symbol even if the symbol wasn't defined anywhere,
14032 and so the symbol would never be NULL. */
f5385ebf 14033 if (!h->ref_regular_nonweak)
d982ba73 14034 sym->st_value = 0;
252b5132 14035 }
34e77a92
RS		 14036 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14037 {
14038 /* At least one non-call relocation references this .iplt entry,
14039 so the .iplt entry is the function's canonical address. */
14040 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14041 sym->st_target_internal = ST_BRANCH_TO_ARM;
14042 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14043 (output_bfd, htab->root.iplt->output_section));
14044 sym->st_value = (h->plt.offset
14045 + htab->root.iplt->output_section->vma
14046 + htab->root.iplt->output_offset);
14047 }
252b5132
RH		 14048 }
14049
f5385ebf 14050 if (h->needs_copy)
252b5132
RH		 14051 {
14052 asection * s;
947216bf 14053 Elf_Internal_Rela rel;
252b5132
RH		 14054
14055 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 14056 BFD_ASSERT (h->dynindx != -1
14057 && (h->root.type == bfd_link_hash_defined
14058 || h->root.type == bfd_link_hash_defweak));
14059
362d30a1 14060 s = htab->srelbss;
252b5132
RH		 14061 BFD_ASSERT (s != NULL);
14062
00a97672 14063 rel.r_addend = 0;
252b5132
RH		 14064 rel.r_offset = (h->root.u.def.value
14065 + h->root.u.def.section->output_section->vma
14066 + h->root.u.def.section->output_offset);
14067 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 14068 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 14069 }
14070
00a97672
RS		 14071 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14072 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14073 to the ".got" section. */
9637f6ef 14074 if (h == htab->root.hdynamic
00a97672 14075 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 14076 sym->st_shndx = SHN_ABS;
14077
b34976b6 14078 return TRUE;
252b5132
RH		 14079}
14080
0855e32b
NS		 14081static void
14082arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14083 void *contents,
14084 const unsigned long *template, unsigned count)
14085{
14086 unsigned ix;
b38cadfb 14087
0855e32b
NS		 14088 for (ix = 0; ix != count; ix++)
14089 {
14090 unsigned long insn = template[ix];
14091
14092 /* Emit mov pc,rx if bx is not permitted. */
14093 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14094 insn = (insn & 0xf000000f) | 0x01a0f000;
14095 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14096 }
14097}
14098
99059e56
RM		 14099/* Install the special first PLT entry for elf32-arm-nacl. Unlike
14100 other variants, NaCl needs this entry in a static executable's
14101 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14102 zero. For .iplt really only the last bundle is useful, and .iplt
14103 could have a shorter first entry, with each individual PLT entry's
14104 relative branch calculated differently so it targets the last
14105 bundle instead of the instruction before it (labelled .Lplt_tail
14106 above). But it's simpler to keep the size and layout of PLT0
14107 consistent with the dynamic case, at the cost of some dead code at
14108 the start of .iplt and the one dead store to the stack at the start
14109 of .Lplt_tail. */
14110static void
14111arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14112 asection *plt, bfd_vma got_displacement)
14113{
14114 unsigned int i;
14115
14116 put_arm_insn (htab, output_bfd,
14117 elf32_arm_nacl_plt0_entry[0]
14118 | arm_movw_immediate (got_displacement),
14119 plt->contents + 0);
14120 put_arm_insn (htab, output_bfd,
14121 elf32_arm_nacl_plt0_entry[1]
14122 | arm_movt_immediate (got_displacement),
14123 plt->contents + 4);
14124
14125 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14126 put_arm_insn (htab, output_bfd,
14127 elf32_arm_nacl_plt0_entry[i],
14128 plt->contents + (i * 4));
14129}
14130
252b5132
RH		 14131/* Finish up the dynamic sections. */
14132
b34976b6 14133static bfd_boolean
57e8b36a 14134elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 14135{
14136 bfd * dynobj;
14137 asection * sgot;
14138 asection * sdyn;
4dfe6ac6
NC		 14139 struct elf32_arm_link_hash_table *htab;
14140
14141 htab = elf32_arm_hash_table (info);
14142 if (htab == NULL)
14143 return FALSE;
252b5132
RH		 14144
14145 dynobj = elf_hash_table (info)->dynobj;
14146
362d30a1 14147 sgot = htab->root.sgotplt;
894891db
NC		 14148 /* A broken linker script might have discarded the dynamic sections.
14149 Catch this here so that we do not seg-fault later on. */
14150 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14151 return FALSE;
3d4d4302 14152 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
252b5132
RH		 14153
14154 if (elf_hash_table (info)->dynamic_sections_created)
14155 {
14156 asection *splt;
14157 Elf32_External_Dyn *dyncon, *dynconend;
14158
362d30a1 14159 splt = htab->root.splt;
24a1ba0f 14160 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 14161 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 14162
14163 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 14164 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 14165
252b5132
RH		 14166 for (; dyncon < dynconend; dyncon++)
14167 {
14168 Elf_Internal_Dyn dyn;
14169 const char * name;
14170 asection * s;
14171
14172 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14173
14174 switch (dyn.d_tag)
14175 {
229fcec5
MM		 14176 unsigned int type;
14177
252b5132 14178 default:
7a2b07ff
NS		 14179 if (htab->vxworks_p
14180 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14181 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 14182 break;
14183
229fcec5
MM		 14184 case DT_HASH:
14185 name = ".hash";
14186 goto get_vma_if_bpabi;
14187 case DT_STRTAB:
14188 name = ".dynstr";
14189 goto get_vma_if_bpabi;
14190 case DT_SYMTAB:
14191 name = ".dynsym";
14192 goto get_vma_if_bpabi;
c0042f5d
MM		 14193 case DT_VERSYM:
14194 name = ".gnu.version";
14195 goto get_vma_if_bpabi;
14196 case DT_VERDEF:
14197 name = ".gnu.version_d";
14198 goto get_vma_if_bpabi;
14199 case DT_VERNEED:
14200 name = ".gnu.version_r";
14201 goto get_vma_if_bpabi;
14202
252b5132
RH		 14203 case DT_PLTGOT:
14204 name = ".got";
14205 goto get_vma;
14206 case DT_JMPREL:
00a97672 14207 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 14208 get_vma:
14209 s = bfd_get_section_by_name (output_bfd, name);
05456594
NC		 14210 if (s == NULL)
14211 {
14212 /* PR ld/14397: Issue an error message if a required section is missing. */
14213 (*_bfd_error_handler)
14214 (_("error: required section '%s' not found in the linker script"), name);
14215 bfd_set_error (bfd_error_invalid_operation);
14216 return FALSE;
14217 }
229fcec5
MM		 14218 if (!htab->symbian_p)
14219 dyn.d_un.d_ptr = s->vma;
14220 else
14221 /* In the BPABI, tags in the PT_DYNAMIC section point
14222 at the file offset, not the memory address, for the
14223 convenience of the post linker. */
14224 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 14225 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14226 break;
14227
229fcec5
MM		 14228 get_vma_if_bpabi:
14229 if (htab->symbian_p)
14230 goto get_vma;
14231 break;
14232
252b5132 14233 case DT_PLTRELSZ:
362d30a1 14234 s = htab->root.srelplt;
252b5132 14235 BFD_ASSERT (s != NULL);
eea6121a 14236 dyn.d_un.d_val = s->size;
252b5132
RH		 14237 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14238 break;
906e58ca 14239
252b5132 14240 case DT_RELSZ:
00a97672 14241 case DT_RELASZ:
229fcec5
MM		 14242 if (!htab->symbian_p)
14243 {
14244 /* My reading of the SVR4 ABI indicates that the
14245 procedure linkage table relocs (DT_JMPREL) should be
14246 included in the overall relocs (DT_REL). This is
14247 what Solaris does. However, UnixWare can not handle
14248 that case. Therefore, we override the DT_RELSZ entry
14249 here to make it not include the JMPREL relocs. Since
00a97672 14250 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 14251 other relocation sections, we don't have to worry
14252 about changing the DT_REL entry. */
362d30a1 14253 s = htab->root.srelplt;
229fcec5
MM		 14254 if (s != NULL)
14255 dyn.d_un.d_val -= s->size;
14256 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14257 break;
14258 }
8029a119 14259 /* Fall through. */
229fcec5
MM		 14260
14261 case DT_REL:
14262 case DT_RELA:
229fcec5
MM		 14263 /* In the BPABI, the DT_REL tag must point at the file
14264 offset, not the VMA, of the first relocation
14265 section. So, we use code similar to that in
14266 elflink.c, but do not check for SHF_ALLOC on the
14267 relcoation section, since relocations sections are
14268 never allocated under the BPABI. The comments above
14269 about Unixware notwithstanding, we include all of the
14270 relocations here. */
14271 if (htab->symbian_p)
14272 {
14273 unsigned int i;
14274 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14275 ? SHT_REL : SHT_RELA);
14276 dyn.d_un.d_val = 0;
14277 for (i = 1; i < elf_numsections (output_bfd); i++)
14278 {
906e58ca 14279 Elf_Internal_Shdr *hdr
229fcec5
MM		 14280 = elf_elfsections (output_bfd)[i];
14281 if (hdr->sh_type == type)
14282 {
906e58ca 14283 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 14284 || dyn.d_tag == DT_RELASZ)
14285 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 14286 else if ((ufile_ptr) hdr->sh_offset
14287 <= dyn.d_un.d_val - 1)
229fcec5
MM		 14288 dyn.d_un.d_val = hdr->sh_offset;
14289 }
14290 }
14291 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14292 }
252b5132 14293 break;
88f7bcd5 14294
0855e32b 14295 case DT_TLSDESC_PLT:
99059e56 14296 s = htab->root.splt;
0855e32b
NS		 14297 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14298 + htab->dt_tlsdesc_plt);
14299 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14300 break;
14301
14302 case DT_TLSDESC_GOT:
99059e56 14303 s = htab->root.sgot;
0855e32b 14304 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
99059e56 14305 + htab->dt_tlsdesc_got);
0855e32b
NS		 14306 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14307 break;
14308
88f7bcd5
NC		 14309 /* Set the bottom bit of DT_INIT/FINI if the
14310 corresponding function is Thumb. */
14311 case DT_INIT:
14312 name = info->init_function;
14313 goto get_sym;
14314 case DT_FINI:
14315 name = info->fini_function;
14316 get_sym:
14317 /* If it wasn't set by elf_bfd_final_link
4cc11e76 14318 then there is nothing to adjust. */
88f7bcd5
NC		 14319 if (dyn.d_un.d_val != 0)
14320 {
14321 struct elf_link_hash_entry * eh;
14322
14323 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 14324 FALSE, FALSE, TRUE);
35fc36a8 14325 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 14326 {
14327 dyn.d_un.d_val |= 1;
b34976b6 14328 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 14329 }
14330 }
14331 break;
252b5132
RH		 14332 }
14333 }
14334
24a1ba0f 14335 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 14336 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 14337 {
00a97672
RS		 14338 const bfd_vma *plt0_entry;
14339 bfd_vma got_address, plt_address, got_displacement;
14340
14341 /* Calculate the addresses of the GOT and PLT. */
14342 got_address = sgot->output_section->vma + sgot->output_offset;
14343 plt_address = splt->output_section->vma + splt->output_offset;
14344
14345 if (htab->vxworks_p)
14346 {
14347 /* The VxWorks GOT is relocated by the dynamic linker.
14348 Therefore, we must emit relocations rather than simply
14349 computing the values now. */
14350 Elf_Internal_Rela rel;
14351
14352 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 14353 put_arm_insn (htab, output_bfd, plt0_entry[0],
14354 splt->contents + 0);
14355 put_arm_insn (htab, output_bfd, plt0_entry[1],
14356 splt->contents + 4);
14357 put_arm_insn (htab, output_bfd, plt0_entry[2],
14358 splt->contents + 8);
00a97672
RS		 14359 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14360
8029a119 14361 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14362 rel.r_offset = plt_address + 12;
14363 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14364 rel.r_addend = 0;
14365 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14366 htab->srelplt2->contents);
14367 }
b38cadfb 14368 else if (htab->nacl_p)
99059e56
RM		 14369 arm_nacl_put_plt0 (htab, output_bfd, splt,
14370 got_address + 8 - (plt_address + 16));
00a97672
RS		 14371 else
14372 {
14373 got_displacement = got_address - (plt_address + 16);
14374
14375 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14376 put_arm_insn (htab, output_bfd, plt0_entry[0],
14377 splt->contents + 0);
14378 put_arm_insn (htab, output_bfd, plt0_entry[1],
14379 splt->contents + 4);
14380 put_arm_insn (htab, output_bfd, plt0_entry[2],
14381 splt->contents + 8);
14382 put_arm_insn (htab, output_bfd, plt0_entry[3],
14383 splt->contents + 12);
5e681ec4 14384
5e681ec4 14385#ifdef FOUR_WORD_PLT
00a97672
RS		 14386 /* The displacement value goes in the otherwise-unused
14387 last word of the second entry. */
14388 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14389#else
00a97672 14390 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14391#endif
00a97672 14392 }
f7a74f8c 14393 }
252b5132
RH		 14394
14395 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14396 really seem like the right value. */
74541ad4
AM		 14397 if (splt->output_section->owner == output_bfd)
14398 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14399
0855e32b
NS		 14400 if (htab->dt_tlsdesc_plt)
14401 {
14402 bfd_vma got_address
14403 = sgot->output_section->vma + sgot->output_offset;
14404 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14405 + htab->root.sgot->output_offset);
14406 bfd_vma plt_address
14407 = splt->output_section->vma + splt->output_offset;
14408
b38cadfb 14409 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14410 splt->contents + htab->dt_tlsdesc_plt,
14411 dl_tlsdesc_lazy_trampoline, 6);
14412
14413 bfd_put_32 (output_bfd,
14414 gotplt_address + htab->dt_tlsdesc_got
14415 - (plt_address + htab->dt_tlsdesc_plt)
14416 - dl_tlsdesc_lazy_trampoline[6],
14417 splt->contents + htab->dt_tlsdesc_plt + 24);
14418 bfd_put_32 (output_bfd,
14419 got_address - (plt_address + htab->dt_tlsdesc_plt)
14420 - dl_tlsdesc_lazy_trampoline[7],
14421 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14422 }
14423
14424 if (htab->tls_trampoline)
14425 {
b38cadfb 14426 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14427 splt->contents + htab->tls_trampoline,
14428 tls_trampoline, 3);
14429#ifdef FOUR_WORD_PLT
14430 bfd_put_32 (output_bfd, 0x00000000,
14431 splt->contents + htab->tls_trampoline + 12);
b38cadfb 14432#endif
0855e32b
NS		 14433 }
14434
362d30a1 14435 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14436 {
14437 /* Correct the .rel(a).plt.unloaded relocations. They will have
14438 incorrect symbol indexes. */
14439 int num_plts;
eed62c48 14440 unsigned char *p;
00a97672 14441
362d30a1 14442 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14443 / htab->plt_entry_size);
14444 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14445
14446 for (; num_plts; num_plts--)
14447 {
14448 Elf_Internal_Rela rel;
14449
14450 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14451 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14452 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14453 p += RELOC_SIZE (htab);
14454
14455 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14456 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14457 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14458 p += RELOC_SIZE (htab);
14459 }
14460 }
252b5132
RH		 14461 }
14462
99059e56
RM		 14463 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14464 /* NaCl uses a special first entry in .iplt too. */
14465 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14466
252b5132 14467 /* Fill in the first three entries in the global offset table. */
229fcec5 14468 if (sgot)
252b5132 14469 {
229fcec5
MM		 14470 if (sgot->size > 0)
14471 {
14472 if (sdyn == NULL)
14473 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14474 else
14475 bfd_put_32 (output_bfd,
14476 sdyn->output_section->vma + sdyn->output_offset,
14477 sgot->contents);
14478 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14479 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14480 }
252b5132 14481
229fcec5
MM		 14482 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14483 }
252b5132 14484
b34976b6 14485 return TRUE;
252b5132
RH		 14486}
14487
ba96a88f 14488static void
57e8b36a 14489elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14490{
9b485d32 14491 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14492 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14493
14494 i_ehdrp = elf_elfheader (abfd);
14495
94a3258f
PB		 14496 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14497 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14498 else
14499 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 14500 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14501
93204d3a
PB		 14502 if (link_info)
14503 {
14504 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14505 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14506 i_ehdrp->e_flags |= EF_ARM_BE8;
14507 }
3bfcb652
NC		 14508
14509 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14510 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14511 {
14512 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14513 if (abi)
14514 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14515 else
14516 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14517 }
ba96a88f
NC		 14518}
14519
99e4ae17 14520static enum elf_reloc_type_class
7e612e98
AM		 14521elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14522 const asection *rel_sec ATTRIBUTE_UNUSED,
14523 const Elf_Internal_Rela *rela)
99e4ae17 14524{
f51e552e 14525 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14526 {
14527 case R_ARM_RELATIVE:
14528 return reloc_class_relative;
14529 case R_ARM_JUMP_SLOT:
14530 return reloc_class_plt;
14531 case R_ARM_COPY:
14532 return reloc_class_copy;
14533 default:
14534 return reloc_class_normal;
14535 }
14536}
14537
e489d0ae 14538static void
57e8b36a 14539elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14540{
5a6c6817 14541 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14542}
14543
40a18ebd
NC		 14544/* Return TRUE if this is an unwinding table entry. */
14545
14546static bfd_boolean
14547is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14548{
0112cd26
NC		 14549 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14550 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14551}
14552
14553
14554/* Set the type and flags for an ARM section. We do this by
14555 the section name, which is a hack, but ought to work. */
14556
14557static bfd_boolean
14558elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14559{
14560 const char * name;
14561
14562 name = bfd_get_section_name (abfd, sec);
14563
14564 if (is_arm_elf_unwind_section_name (abfd, name))
14565 {
14566 hdr->sh_type = SHT_ARM_EXIDX;
14567 hdr->sh_flags |= SHF_LINK_ORDER;
14568 }
14569 return TRUE;
14570}
14571
6dc132d9
L		 14572/* Handle an ARM specific section when reading an object file. This is
14573 called when bfd_section_from_shdr finds a section with an unknown
14574 type. */
40a18ebd
NC		 14575
14576static bfd_boolean
14577elf32_arm_section_from_shdr (bfd *abfd,
14578 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14579 const char *name,
14580 int shindex)
40a18ebd
NC		 14581{
14582 /* There ought to be a place to keep ELF backend specific flags, but
14583 at the moment there isn't one. We just keep track of the
14584 sections by their name, instead. Fortunately, the ABI gives
14585 names for all the ARM specific sections, so we will probably get
14586 away with this. */
14587 switch (hdr->sh_type)
14588 {
14589 case SHT_ARM_EXIDX:
0951f019
RE		 14590 case SHT_ARM_PREEMPTMAP:
14591 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14592 break;
14593
14594 default:
14595 return FALSE;
14596 }
14597
6dc132d9 14598 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14599 return FALSE;
14600
14601 return TRUE;
14602}
e489d0ae 14603
44444f50
NC		 14604static _arm_elf_section_data *
14605get_arm_elf_section_data (asection * sec)
14606{
47b2e99c
JZ		 14607 if (sec && sec->owner && is_arm_elf (sec->owner))
14608 return elf32_arm_section_data (sec);
44444f50
NC		 14609 else
14610 return NULL;
8e3de13a
NC		 14611}
14612
4e617b1e
PB		 14613typedef struct
14614{
57402f1e 14615 void *flaginfo;
4e617b1e 14616 struct bfd_link_info *info;
91a5743d
PB		 14617 asection *sec;
14618 int sec_shndx;
6e0b88f1
AM		 14619 int (*func) (void *, const char *, Elf_Internal_Sym *,
14620 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14621} output_arch_syminfo;
14622
14623enum map_symbol_type
14624{
14625 ARM_MAP_ARM,
14626 ARM_MAP_THUMB,
14627 ARM_MAP_DATA
14628};
14629
14630
7413f23f 14631/* Output a single mapping symbol. */
4e617b1e
PB		 14632
14633static bfd_boolean
7413f23f
DJ		 14634elf32_arm_output_map_sym (output_arch_syminfo *osi,
14635 enum map_symbol_type type,
14636 bfd_vma offset)
4e617b1e
PB		 14637{
14638 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14639 Elf_Internal_Sym sym;
14640
91a5743d
PB		 14641 sym.st_value = osi->sec->output_section->vma
14642 + osi->sec->output_offset
14643 + offset;
4e617b1e
PB		 14644 sym.st_size = 0;
14645 sym.st_other = 0;
14646 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14647 sym.st_shndx = osi->sec_shndx;
35fc36a8 14648 sym.st_target_internal = 0;
fe33d2fa 14649 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
57402f1e 14650 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14651}
14652
34e77a92
RS		 14653/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14654 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14655
14656static bfd_boolean
34e77a92
RS		 14657elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14658 bfd_boolean is_iplt_entry_p,
14659 union gotplt_union *root_plt,
14660 struct arm_plt_info *arm_plt)
4e617b1e 14661{
4e617b1e 14662 struct elf32_arm_link_hash_table *htab;
34e77a92 14663 bfd_vma addr, plt_header_size;
4e617b1e 14664
34e77a92 14665 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14666 return TRUE;
14667
4dfe6ac6
NC		 14668 htab = elf32_arm_hash_table (osi->info);
14669 if (htab == NULL)
14670 return FALSE;
14671
34e77a92
RS		 14672 if (is_iplt_entry_p)
14673 {
14674 osi->sec = htab->root.iplt;
14675 plt_header_size = 0;
14676 }
14677 else
14678 {
14679 osi->sec = htab->root.splt;
14680 plt_header_size = htab->plt_header_size;
14681 }
14682 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14683 (osi->info->output_bfd, osi->sec->output_section));
14684
14685 addr = root_plt->offset & -2;
4e617b1e
PB		 14686 if (htab->symbian_p)
14687 {
7413f23f 14688 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14689 return FALSE;
7413f23f 14690 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14691 return FALSE;
14692 }
14693 else if (htab->vxworks_p)
14694 {
7413f23f 14695 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14696 return FALSE;
7413f23f 14697 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14698 return FALSE;
7413f23f 14699 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14700 return FALSE;
7413f23f 14701 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14702 return FALSE;
14703 }
b38cadfb
NC		 14704 else if (htab->nacl_p)
14705 {
14706 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14707 return FALSE;
14708 }
4e617b1e
PB		 14709 else
14710 {
34e77a92 14711 bfd_boolean thumb_stub_p;
bd97cb95 14712
34e77a92
RS		 14713 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14714 if (thumb_stub_p)
4e617b1e 14715 {
7413f23f 14716 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14717 return FALSE;
14718 }
14719#ifdef FOUR_WORD_PLT
7413f23f 14720 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14721 return FALSE;
7413f23f 14722 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14723 return FALSE;
14724#else
906e58ca 14725 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14726 so only need to output a mapping symbol for the first PLT entry and
14727 entries with thumb thunks. */
34e77a92 14728 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14729 {
7413f23f 14730 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14731 return FALSE;
14732 }
14733#endif
14734 }
14735
14736 return TRUE;
14737}
14738
34e77a92
RS		 14739/* Output mapping symbols for PLT entries associated with H. */
14740
14741static bfd_boolean
14742elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14743{
14744 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14745 struct elf32_arm_link_hash_entry *eh;
14746
14747 if (h->root.type == bfd_link_hash_indirect)
14748 return TRUE;
14749
14750 if (h->root.type == bfd_link_hash_warning)
14751 /* When warning symbols are created, they **replace** the "real"
14752 entry in the hash table, thus we never get to see the real
14753 symbol in a hash traversal. So look at it now. */
14754 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14755
14756 eh = (struct elf32_arm_link_hash_entry *) h;
14757 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14758 &h->plt, &eh->plt);
14759}
14760
7413f23f
DJ		 14761/* Output a single local symbol for a generated stub. */
14762
14763static bfd_boolean
14764elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14765 bfd_vma offset, bfd_vma size)
14766{
7413f23f
DJ		 14767 Elf_Internal_Sym sym;
14768
7413f23f
DJ		 14769 sym.st_value = osi->sec->output_section->vma
14770 + osi->sec->output_offset
14771 + offset;
14772 sym.st_size = size;
14773 sym.st_other = 0;
14774 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14775 sym.st_shndx = osi->sec_shndx;
35fc36a8 14776 sym.st_target_internal = 0;
57402f1e 14777 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14778}
4e617b1e 14779
da5938a2 14780static bfd_boolean
8029a119
NC		 14781arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14782 void * in_arg)
da5938a2
NC		 14783{
14784 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14785 asection *stub_sec;
14786 bfd_vma addr;
7413f23f 14787 char *stub_name;
9a008db3 14788 output_arch_syminfo *osi;
d3ce72d0 14789 const insn_sequence *template_sequence;
461a49ca
DJ		 14790 enum stub_insn_type prev_type;
14791 int size;
14792 int i;
14793 enum map_symbol_type sym_type;
da5938a2
NC		 14794
14795 /* Massage our args to the form they really have. */
14796 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14797 osi = (output_arch_syminfo *) in_arg;
da5938a2 14798
da5938a2
NC		 14799 stub_sec = stub_entry->stub_sec;
14800
14801 /* Ensure this stub is attached to the current section being
7413f23f 14802 processed. */
da5938a2
NC		 14803 if (stub_sec != osi->sec)
14804 return TRUE;
14805
7413f23f
DJ		 14806 addr = (bfd_vma) stub_entry->stub_offset;
14807 stub_name = stub_entry->output_name;
da5938a2 14808
d3ce72d0
NC		 14809 template_sequence = stub_entry->stub_template;
14810 switch (template_sequence[0].type)
7413f23f 14811 {
461a49ca
DJ		 14812 case ARM_TYPE:
14813 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14814 return FALSE;
14815 break;
461a49ca 14816 case THUMB16_TYPE:
48229727 14817 case THUMB32_TYPE:
461a49ca
DJ		 14818 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14819 stub_entry->stub_size))
da5938a2
NC		 14820 return FALSE;
14821 break;
14822 default:
14823 BFD_FAIL ();
48229727 14824 return 0;
7413f23f 14825 }
da5938a2 14826
461a49ca
DJ		 14827 prev_type = DATA_TYPE;
14828 size = 0;
14829 for (i = 0; i < stub_entry->stub_template_size; i++)
14830 {
d3ce72d0 14831 switch (template_sequence[i].type)
461a49ca
DJ		 14832 {
14833 case ARM_TYPE:
14834 sym_type = ARM_MAP_ARM;
14835 break;
14836
14837 case THUMB16_TYPE:
48229727 14838 case THUMB32_TYPE:
461a49ca
DJ		 14839 sym_type = ARM_MAP_THUMB;
14840 break;
14841
14842 case DATA_TYPE:
14843 sym_type = ARM_MAP_DATA;
14844 break;
14845
14846 default:
14847 BFD_FAIL ();
4e31c731 14848 return FALSE;
461a49ca
DJ		 14849 }
14850
d3ce72d0 14851 if (template_sequence[i].type != prev_type)
461a49ca 14852 {
d3ce72d0 14853 prev_type = template_sequence[i].type;
461a49ca
DJ		 14854 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14855 return FALSE;
14856 }
14857
d3ce72d0 14858 switch (template_sequence[i].type)
461a49ca
DJ		 14859 {
14860 case ARM_TYPE:
48229727 14861 case THUMB32_TYPE:
461a49ca
DJ		 14862 size += 4;
14863 break;
14864
14865 case THUMB16_TYPE:
14866 size += 2;
14867 break;
14868
14869 case DATA_TYPE:
14870 size += 4;
14871 break;
14872
14873 default:
14874 BFD_FAIL ();
4e31c731 14875 return FALSE;
461a49ca
DJ		 14876 }
14877 }
14878
da5938a2
NC		 14879 return TRUE;
14880}
14881
33811162
DG		 14882/* Output mapping symbols for linker generated sections,
14883 and for those data-only sections that do not have a
14884 $d. */
4e617b1e
PB		 14885
14886static bfd_boolean
14887elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca 14888 struct bfd_link_info *info,
57402f1e 14889 void *flaginfo,
6e0b88f1
AM		 14890 int (*func) (void *, const char *,
14891 Elf_Internal_Sym *,
14892 asection *,
14893 struct elf_link_hash_entry *))
4e617b1e
PB		 14894{
14895 output_arch_syminfo osi;
14896 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 14897 bfd_vma offset;
14898 bfd_size_type size;
33811162 14899 bfd *input_bfd;
4e617b1e
PB		 14900
14901 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14902 if (htab == NULL)
14903 return FALSE;
14904
906e58ca 14905 check_use_blx (htab);
91a5743d 14906
57402f1e 14907 osi.flaginfo = flaginfo;
4e617b1e
PB		 14908 osi.info = info;
14909 osi.func = func;
906e58ca 14910
33811162
DG		 14911 /* Add a $d mapping symbol to data-only sections that
14912 don't have any mapping symbol. This may result in (harmless) redundant
14913 mapping symbols. */
14914 for (input_bfd = info->input_bfds;
14915 input_bfd != NULL;
14916 input_bfd = input_bfd->link_next)
14917 {
14918 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14919 for (osi.sec = input_bfd->sections;
14920 osi.sec != NULL;
14921 osi.sec = osi.sec->next)
14922 {
14923 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 14924 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14925 != 0)
33811162
DG		 14926 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14927 == SEC_HAS_CONTENTS
14928 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 14929 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 14930 && osi.sec->size > 0
14931 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 14932 {
14933 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14934 (output_bfd, osi.sec->output_section);
14935 if (osi.sec_shndx != (int)SHN_BAD)
14936 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14937 }
14938 }
14939 }
14940
91a5743d
PB		 14941 /* ARM->Thumb glue. */
14942 if (htab->arm_glue_size > 0)
14943 {
3d4d4302
AM		 14944 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14945 ARM2THUMB_GLUE_SECTION_NAME);
91a5743d
PB		 14946
14947 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14948 (output_bfd, osi.sec->output_section);
14949 if (info->shared || htab->root.is_relocatable_executable
14950 || htab->pic_veneer)
14951 size = ARM2THUMB_PIC_GLUE_SIZE;
14952 else if (htab->use_blx)
14953 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14954 else
14955 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 14956
91a5743d
PB		 14957 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14958 {
7413f23f
DJ		 14959 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14960 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 14961 }
14962 }
14963
14964 /* Thumb->ARM glue. */
14965 if (htab->thumb_glue_size > 0)
14966 {
3d4d4302
AM		 14967 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14968 THUMB2ARM_GLUE_SECTION_NAME);
91a5743d
PB		 14969
14970 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14971 (output_bfd, osi.sec->output_section);
14972 size = THUMB2ARM_GLUE_SIZE;
14973
14974 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14975 {
7413f23f
DJ		 14976 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14977 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 14978 }
14979 }
14980
845b51d6
PB		 14981 /* ARMv4 BX veneers. */
14982 if (htab->bx_glue_size > 0)
14983 {
3d4d4302
AM		 14984 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14985 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 14986
14987 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14988 (output_bfd, osi.sec->output_section);
14989
7413f23f 14990 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 14991 }
14992
8029a119
NC		 14993 /* Long calls stubs. */
14994 if (htab->stub_bfd && htab->stub_bfd->sections)
14995 {
da5938a2 14996 asection* stub_sec;
8029a119 14997
da5938a2
NC		 14998 for (stub_sec = htab->stub_bfd->sections;
14999 stub_sec != NULL;
8029a119
NC		 15000 stub_sec = stub_sec->next)
15001 {
15002 /* Ignore non-stub sections. */
15003 if (!strstr (stub_sec->name, STUB_SUFFIX))
15004 continue;
da5938a2 15005
8029a119 15006 osi.sec = stub_sec;
da5938a2 15007
8029a119
NC		 15008 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15009 (output_bfd, osi.sec->output_section);
da5938a2 15010
8029a119
NC		 15011 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15012 }
15013 }
da5938a2 15014
91a5743d 15015 /* Finally, output mapping symbols for the PLT. */
34e77a92 15016 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 15017 {
34e77a92
RS		 15018 osi.sec = htab->root.splt;
15019 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15020 (output_bfd, osi.sec->output_section));
15021
15022 /* Output mapping symbols for the plt header. SymbianOS does not have a
15023 plt header. */
15024 if (htab->vxworks_p)
15025 {
15026 /* VxWorks shared libraries have no PLT header. */
15027 if (!info->shared)
15028 {
15029 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15030 return FALSE;
15031 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15032 return FALSE;
15033 }
15034 }
b38cadfb
NC		 15035 else if (htab->nacl_p)
15036 {
15037 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15038 return FALSE;
15039 }
34e77a92 15040 else if (!htab->symbian_p)
4e617b1e 15041 {
7413f23f 15042 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 15043 return FALSE;
34e77a92
RS		 15044#ifndef FOUR_WORD_PLT
15045 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 15046 return FALSE;
34e77a92 15047#endif
4e617b1e
PB		 15048 }
15049 }
99059e56
RM		 15050 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15051 {
15052 /* NaCl uses a special first entry in .iplt too. */
15053 osi.sec = htab->root.iplt;
15054 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15055 (output_bfd, osi.sec->output_section));
15056 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15057 return FALSE;
15058 }
34e77a92
RS		 15059 if ((htab->root.splt && htab->root.splt->size > 0)
15060 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 15061 {
34e77a92
RS		 15062 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15063 for (input_bfd = info->input_bfds;
15064 input_bfd != NULL;
15065 input_bfd = input_bfd->link_next)
15066 {
15067 struct arm_local_iplt_info **local_iplt;
15068 unsigned int i, num_syms;
4e617b1e 15069
34e77a92
RS		 15070 local_iplt = elf32_arm_local_iplt (input_bfd);
15071 if (local_iplt != NULL)
15072 {
15073 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15074 for (i = 0; i < num_syms; i++)
15075 if (local_iplt[i] != NULL
15076 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15077 &local_iplt[i]->root,
15078 &local_iplt[i]->arm))
15079 return FALSE;
15080 }
15081 }
15082 }
0855e32b
NS		 15083 if (htab->dt_tlsdesc_plt != 0)
15084 {
15085 /* Mapping symbols for the lazy tls trampoline. */
15086 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15087 return FALSE;
b38cadfb 15088
0855e32b
NS		 15089 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15090 htab->dt_tlsdesc_plt + 24))
15091 return FALSE;
15092 }
15093 if (htab->tls_trampoline != 0)
15094 {
15095 /* Mapping symbols for the tls trampoline. */
15096 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15097 return FALSE;
15098#ifdef FOUR_WORD_PLT
15099 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15100 htab->tls_trampoline + 12))
15101 return FALSE;
b38cadfb 15102#endif
0855e32b 15103 }
b38cadfb 15104
4e617b1e
PB		 15105 return TRUE;
15106}
15107
e489d0ae
PB		 15108/* Allocate target specific section data. */
15109
15110static bfd_boolean
15111elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15112{
f592407e
AM		 15113 if (!sec->used_by_bfd)
15114 {
15115 _arm_elf_section_data *sdata;
15116 bfd_size_type amt = sizeof (*sdata);
e489d0ae 15117
21d799b5 15118 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 15119 if (sdata == NULL)
15120 return FALSE;
15121 sec->used_by_bfd = sdata;
15122 }
e489d0ae
PB		 15123
15124 return _bfd_elf_new_section_hook (abfd, sec);
15125}
15126
15127
15128/* Used to order a list of mapping symbols by address. */
15129
15130static int
15131elf32_arm_compare_mapping (const void * a, const void * b)
15132{
7f6a71ff
JM		 15133 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15134 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15135
15136 if (amap->vma > bmap->vma)
15137 return 1;
15138 else if (amap->vma < bmap->vma)
15139 return -1;
15140 else if (amap->type > bmap->type)
15141 /* Ensure results do not depend on the host qsort for objects with
15142 multiple mapping symbols at the same address by sorting on type
15143 after vma. */
15144 return 1;
15145 else if (amap->type < bmap->type)
15146 return -1;
15147 else
15148 return 0;
e489d0ae
PB		 15149}
15150
2468f9c9
PB		 15151/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15152
15153static unsigned long
15154offset_prel31 (unsigned long addr, bfd_vma offset)
15155{
15156 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15157}
15158
15159/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15160 relocations. */
15161
15162static void
15163copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15164{
15165 unsigned long first_word = bfd_get_32 (output_bfd, from);
15166 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
b38cadfb 15167
2468f9c9
PB		 15168 /* High bit of first word is supposed to be zero. */
15169 if ((first_word & 0x80000000ul) == 0)
15170 first_word = offset_prel31 (first_word, offset);
b38cadfb 15171
2468f9c9
PB		 15172 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15173 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15174 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15175 second_word = offset_prel31 (second_word, offset);
b38cadfb 15176
2468f9c9
PB		 15177 bfd_put_32 (output_bfd, first_word, to);
15178 bfd_put_32 (output_bfd, second_word, to + 4);
15179}
e489d0ae 15180
48229727
JB		 15181/* Data for make_branch_to_a8_stub(). */
15182
b38cadfb
NC		 15183struct a8_branch_to_stub_data
15184{
48229727
JB		 15185 asection *writing_section;
15186 bfd_byte *contents;
15187};
15188
15189
15190/* Helper to insert branches to Cortex-A8 erratum stubs in the right
15191 places for a particular section. */
15192
15193static bfd_boolean
15194make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
99059e56 15195 void *in_arg)
48229727
JB		 15196{
15197 struct elf32_arm_stub_hash_entry *stub_entry;
15198 struct a8_branch_to_stub_data *data;
15199 bfd_byte *contents;
15200 unsigned long branch_insn;
15201 bfd_vma veneered_insn_loc, veneer_entry_loc;
15202 bfd_signed_vma branch_offset;
15203 bfd *abfd;
91d6fa6a 15204 unsigned int target;
48229727
JB		 15205
15206 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15207 data = (struct a8_branch_to_stub_data *) in_arg;
15208
15209 if (stub_entry->target_section != data->writing_section
4563a860 15210 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 15211 return TRUE;
15212
15213 contents = data->contents;
15214
15215 veneered_insn_loc = stub_entry->target_section->output_section->vma
15216 + stub_entry->target_section->output_offset
15217 + stub_entry->target_value;
15218
15219 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15220 + stub_entry->stub_sec->output_offset
15221 + stub_entry->stub_offset;
15222
15223 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15224 veneered_insn_loc &= ~3u;
15225
15226 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15227
15228 abfd = stub_entry->target_section->owner;
91d6fa6a 15229 target = stub_entry->target_value;
48229727
JB		 15230
15231 /* We attempt to avoid this condition by setting stubs_always_after_branch
15232 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15233 This check is just to be on the safe side... */
15234 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15235 {
15236 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15237 "allocated in unsafe location"), abfd);
15238 return FALSE;
15239 }
15240
15241 switch (stub_entry->stub_type)
15242 {
15243 case arm_stub_a8_veneer_b:
15244 case arm_stub_a8_veneer_b_cond:
15245 branch_insn = 0xf0009000;
15246 goto jump24;
15247
15248 case arm_stub_a8_veneer_blx:
15249 branch_insn = 0xf000e800;
15250 goto jump24;
15251
15252 case arm_stub_a8_veneer_bl:
15253 {
15254 unsigned int i1, j1, i2, j2, s;
15255
15256 branch_insn = 0xf000d000;
15257
15258 jump24:
15259 if (branch_offset < -16777216 || branch_offset > 16777214)
15260 {
15261 /* There's not much we can do apart from complain if this
15262 happens. */
15263 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15264 "of range (input file too large)"), abfd);
15265 return FALSE;
15266 }
15267
15268 /* i1 = not(j1 eor s), so:
15269 not i1 = j1 eor s
15270 j1 = (not i1) eor s. */
15271
15272 branch_insn |= (branch_offset >> 1) & 0x7ff;
15273 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15274 i2 = (branch_offset >> 22) & 1;
15275 i1 = (branch_offset >> 23) & 1;
15276 s = (branch_offset >> 24) & 1;
15277 j1 = (!i1) ^ s;
15278 j2 = (!i2) ^ s;
15279 branch_insn |= j2 << 11;
15280 branch_insn |= j1 << 13;
15281 branch_insn |= s << 26;
15282 }
15283 break;
15284
15285 default:
15286 BFD_FAIL ();
15287 return FALSE;
15288 }
15289
91d6fa6a
NC		 15290 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15291 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 15292
15293 return TRUE;
15294}
15295
e489d0ae
PB		 15296/* Do code byteswapping. Return FALSE afterwards so that the section is
15297 written out as normal. */
15298
15299static bfd_boolean
c7b8f16e 15300elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 15301 struct bfd_link_info *link_info,
15302 asection *sec,
e489d0ae
PB		 15303 bfd_byte *contents)
15304{
48229727 15305 unsigned int mapcount, errcount;
8e3de13a 15306 _arm_elf_section_data *arm_data;
c7b8f16e 15307 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 15308 elf32_arm_section_map *map;
c7b8f16e 15309 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 15310 bfd_vma ptr;
15311 bfd_vma end;
c7b8f16e 15312 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 15313 bfd_byte tmp;
48229727 15314 unsigned int i;
57e8b36a 15315
4dfe6ac6
NC		 15316 if (globals == NULL)
15317 return FALSE;
15318
8e3de13a
NC		 15319 /* If this section has not been allocated an _arm_elf_section_data
15320 structure then we cannot record anything. */
15321 arm_data = get_arm_elf_section_data (sec);
15322 if (arm_data == NULL)
15323 return FALSE;
15324
15325 mapcount = arm_data->mapcount;
15326 map = arm_data->map;
c7b8f16e
JB		 15327 errcount = arm_data->erratumcount;
15328
15329 if (errcount != 0)
15330 {
15331 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15332
15333 for (errnode = arm_data->erratumlist; errnode != 0;
99059e56
RM		 15334 errnode = errnode->next)
15335 {
15336 bfd_vma target = errnode->vma - offset;
15337
15338 switch (errnode->type)
15339 {
15340 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15341 {
15342 bfd_vma branch_to_veneer;
15343 /* Original condition code of instruction, plus bit mask for
15344 ARM B instruction. */
15345 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15346 | 0x0a000000;
c7b8f16e
JB		 15347
15348 /* The instruction is before the label. */
91d6fa6a 15349 target -= 4;
c7b8f16e
JB		 15350
15351 /* Above offset included in -4 below. */
15352 branch_to_veneer = errnode->u.b.veneer->vma
99059e56 15353 - errnode->vma - 4;
c7b8f16e
JB		 15354
15355 if ((signed) branch_to_veneer < -(1 << 25)
15356 || (signed) branch_to_veneer >= (1 << 25))
15357 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15358 "range"), output_bfd);
15359
99059e56
RM		 15360 insn |= (branch_to_veneer >> 2) & 0xffffff;
15361 contents[endianflip ^ target] = insn & 0xff;
15362 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15363 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15364 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15365 }
15366 break;
c7b8f16e
JB		 15367
15368 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 15369 {
15370 bfd_vma branch_from_veneer;
15371 unsigned int insn;
c7b8f16e 15372
99059e56
RM		 15373 /* Take size of veneer into account. */
15374 branch_from_veneer = errnode->u.v.branch->vma
15375 - errnode->vma - 12;
c7b8f16e
JB		 15376
15377 if ((signed) branch_from_veneer < -(1 << 25)
15378 || (signed) branch_from_veneer >= (1 << 25))
15379 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15380 "range"), output_bfd);
15381
99059e56
RM		 15382 /* Original instruction. */
15383 insn = errnode->u.v.branch->u.b.vfp_insn;
15384 contents[endianflip ^ target] = insn & 0xff;
15385 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15386 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15387 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15388
15389 /* Branch back to insn after original insn. */
15390 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15391 contents[endianflip ^ (target + 4)] = insn & 0xff;
15392 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15393 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15394 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15395 }
15396 break;
c7b8f16e 15397
99059e56
RM		 15398 default:
15399 abort ();
15400 }
15401 }
c7b8f16e 15402 }
e489d0ae 15403
2468f9c9
PB		 15404 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15405 {
15406 arm_unwind_table_edit *edit_node
99059e56 15407 = arm_data->u.exidx.unwind_edit_list;
2468f9c9 15408 /* Now, sec->size is the size of the section we will write. The original
99059e56 15409 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
2468f9c9
PB		 15410 markers) was sec->rawsize. (This isn't the case if we perform no
15411 edits, then rawsize will be zero and we should use size). */
21d799b5 15412 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15413 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15414 unsigned int in_index, out_index;
15415 bfd_vma add_to_offsets = 0;
15416
15417 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
99059e56 15418 {
2468f9c9
PB		 15419 if (edit_node)
15420 {
15421 unsigned int edit_index = edit_node->index;
b38cadfb 15422
2468f9c9 15423 if (in_index < edit_index && in_index * 8 < input_size)
99059e56 15424 {
2468f9c9
PB		 15425 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15426 contents + in_index * 8, add_to_offsets);
15427 out_index++;
15428 in_index++;
15429 }
15430 else if (in_index == edit_index
15431 || (in_index * 8 >= input_size
15432 && edit_index == UINT_MAX))
99059e56 15433 {
2468f9c9
PB		 15434 switch (edit_node->type)
15435 {
15436 case DELETE_EXIDX_ENTRY:
15437 in_index++;
15438 add_to_offsets += 8;
15439 break;
b38cadfb 15440
2468f9c9
PB		 15441 case INSERT_EXIDX_CANTUNWIND_AT_END:
15442 {
99059e56 15443 asection *text_sec = edit_node->linked_section;
2468f9c9
PB		 15444 bfd_vma text_offset = text_sec->output_section->vma
15445 + text_sec->output_offset
15446 + text_sec->size;
15447 bfd_vma exidx_offset = offset + out_index * 8;
99059e56 15448 unsigned long prel31_offset;
2468f9c9
PB		 15449
15450 /* Note: this is meant to be equivalent to an
15451 R_ARM_PREL31 relocation. These synthetic
15452 EXIDX_CANTUNWIND markers are not relocated by the
15453 usual BFD method. */
15454 prel31_offset = (text_offset - exidx_offset)
15455 & 0x7ffffffful;
15456
15457 /* First address we can't unwind. */
15458 bfd_put_32 (output_bfd, prel31_offset,
15459 &edited_contents[out_index * 8]);
15460
15461 /* Code for EXIDX_CANTUNWIND. */
15462 bfd_put_32 (output_bfd, 0x1,
15463 &edited_contents[out_index * 8 + 4]);
15464
15465 out_index++;
15466 add_to_offsets -= 8;
15467 }
15468 break;
15469 }
b38cadfb 15470
2468f9c9
PB		 15471 edit_node = edit_node->next;
15472 }
15473 }
15474 else
15475 {
15476 /* No more edits, copy remaining entries verbatim. */
15477 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15478 contents + in_index * 8, add_to_offsets);
15479 out_index++;
15480 in_index++;
15481 }
15482 }
15483
15484 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15485 bfd_set_section_contents (output_bfd, sec->output_section,
15486 edited_contents,
15487 (file_ptr) sec->output_offset, sec->size);
15488
15489 return TRUE;
15490 }
15491
48229727
JB		 15492 /* Fix code to point to Cortex-A8 erratum stubs. */
15493 if (globals->fix_cortex_a8)
15494 {
15495 struct a8_branch_to_stub_data data;
15496
15497 data.writing_section = sec;
15498 data.contents = contents;
15499
15500 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15501 &data);
15502 }
15503
e489d0ae
PB		 15504 if (mapcount == 0)
15505 return FALSE;
15506
c7b8f16e 15507 if (globals->byteswap_code)
e489d0ae 15508 {
c7b8f16e 15509 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15510
c7b8f16e
JB		 15511 ptr = map[0].vma;
15512 for (i = 0; i < mapcount; i++)
99059e56
RM		 15513 {
15514 if (i == mapcount - 1)
c7b8f16e 15515 end = sec->size;
99059e56
RM		 15516 else
15517 end = map[i + 1].vma;
e489d0ae 15518
99059e56 15519 switch (map[i].type)
e489d0ae 15520 {
c7b8f16e
JB		 15521 case 'a':
15522 /* Byte swap code words. */
15523 while (ptr + 3 < end)
99059e56
RM		 15524 {
15525 tmp = contents[ptr];
15526 contents[ptr] = contents[ptr + 3];
15527 contents[ptr + 3] = tmp;
15528 tmp = contents[ptr + 1];
15529 contents[ptr + 1] = contents[ptr + 2];
15530 contents[ptr + 2] = tmp;
15531 ptr += 4;
15532 }
c7b8f16e 15533 break;
e489d0ae 15534
c7b8f16e
JB		 15535 case 't':
15536 /* Byte swap code halfwords. */
15537 while (ptr + 1 < end)
99059e56
RM		 15538 {
15539 tmp = contents[ptr];
15540 contents[ptr] = contents[ptr + 1];
15541 contents[ptr + 1] = tmp;
15542 ptr += 2;
15543 }
c7b8f16e
JB		 15544 break;
15545
15546 case 'd':
15547 /* Leave data alone. */
15548 break;
15549 }
99059e56
RM		 15550 ptr = end;
15551 }
e489d0ae 15552 }
8e3de13a 15553
93204d3a 15554 free (map);
47b2e99c 15555 arm_data->mapcount = -1;
c7b8f16e 15556 arm_data->mapsize = 0;
8e3de13a 15557 arm_data->map = NULL;
8e3de13a 15558
e489d0ae
PB		 15559 return FALSE;
15560}
15561
0beaef2b
PB		 15562/* Mangle thumb function symbols as we read them in. */
15563
8384fb8f 15564static bfd_boolean
0beaef2b
PB		 15565elf32_arm_swap_symbol_in (bfd * abfd,
15566 const void *psrc,
15567 const void *pshn,
15568 Elf_Internal_Sym *dst)
15569{
8384fb8f
AM		 15570 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15571 return FALSE;
0beaef2b
PB		 15572
15573 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15574 the address. */
63e1a0fc
PB		 15575 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15576 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15577 {
63e1a0fc
PB		 15578 if (dst->st_value & 1)
15579 {
15580 dst->st_value &= ~(bfd_vma) 1;
15581 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15582 }
15583 else
15584 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15585 }
15586 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15587 {
15588 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15589 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15590 }
35fc36a8
RS		 15591 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15592 dst->st_target_internal = ST_BRANCH_LONG;
15593 else
63e1a0fc 15594 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15595
8384fb8f 15596 return TRUE;
0beaef2b
PB		 15597}
15598
15599
15600/* Mangle thumb function symbols as we write them out. */
15601
15602static void
15603elf32_arm_swap_symbol_out (bfd *abfd,
15604 const Elf_Internal_Sym *src,
15605 void *cdst,
15606 void *shndx)
15607{
15608 Elf_Internal_Sym newsym;
15609
15610 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15611 of the address set, as per the new EABI. We do this unconditionally
15612 because objcopy does not set the elf header flags until after
15613 it writes out the symbol table. */
35fc36a8 15614 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15615 {
15616 newsym = *src;
34e77a92
RS		 15617 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15618 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad 15619 if (newsym.st_shndx != SHN_UNDEF)
99059e56
RM		 15620 {
15621 /* Do this only for defined symbols. At link type, the static
15622 linker will simulate the work of dynamic linker of resolving
15623 symbols and will carry over the thumbness of found symbols to
15624 the output symbol table. It's not clear how it happens, but
15625 the thumbness of undefined symbols can well be different at
15626 runtime, and writing '1' for them will be confusing for users
15627 and possibly for dynamic linker itself.
15628 */
15629 newsym.st_value |= 1;
15630 }
906e58ca 15631
0beaef2b
PB		 15632 src = &newsym;
15633 }
15634 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15635}
15636
b294bdf8
MM		 15637/* Add the PT_ARM_EXIDX program header. */
15638
15639static bfd_boolean
906e58ca 15640elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15641 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15642{
15643 struct elf_segment_map *m;
15644 asection *sec;
15645
15646 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15647 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15648 {
15649 /* If there is already a PT_ARM_EXIDX header, then we do not
15650 want to add another one. This situation arises when running
15651 "strip"; the input binary already has the header. */
12bd6957 15652 m = elf_seg_map (abfd);
b294bdf8
MM		 15653 while (m && m->p_type != PT_ARM_EXIDX)
15654 m = m->next;
15655 if (!m)
15656 {
21d799b5 15657 m = (struct elf_segment_map *)
99059e56 15658 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15659 if (m == NULL)
15660 return FALSE;
15661 m->p_type = PT_ARM_EXIDX;
15662 m->count = 1;
15663 m->sections[0] = sec;
15664
12bd6957
AM		 15665 m->next = elf_seg_map (abfd);
15666 elf_seg_map (abfd) = m;
b294bdf8
MM		 15667 }
15668 }
15669
15670 return TRUE;
15671}
15672
15673/* We may add a PT_ARM_EXIDX program header. */
15674
15675static int
a6b96beb
AM		 15676elf32_arm_additional_program_headers (bfd *abfd,
15677 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15678{
15679 asection *sec;
15680
15681 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15682 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15683 return 1;
15684 else
15685 return 0;
15686}
15687
34e77a92
RS		 15688/* Hook called by the linker routine which adds symbols from an object
15689 file. */
15690
15691static bfd_boolean
15692elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15693 Elf_Internal_Sym *sym, const char **namep,
15694 flagword *flagsp, asection **secp, bfd_vma *valp)
15695{
15696 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15697 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15698 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15699 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92
RS		 15700
15701 if (elf32_arm_hash_table (info)->vxworks_p
15702 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15703 flagsp, secp, valp))
15704 return FALSE;
15705
15706 return TRUE;
15707}
15708
0beaef2b 15709/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15710const struct elf_size_info elf32_arm_size_info =
15711{
0beaef2b
PB		 15712 sizeof (Elf32_External_Ehdr),
15713 sizeof (Elf32_External_Phdr),
15714 sizeof (Elf32_External_Shdr),
15715 sizeof (Elf32_External_Rel),
15716 sizeof (Elf32_External_Rela),
15717 sizeof (Elf32_External_Sym),
15718 sizeof (Elf32_External_Dyn),
15719 sizeof (Elf_External_Note),
15720 4,
15721 1,
15722 32, 2,
15723 ELFCLASS32, EV_CURRENT,
15724 bfd_elf32_write_out_phdrs,
15725 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15726 bfd_elf32_checksum_contents,
0beaef2b
PB		 15727 bfd_elf32_write_relocs,
15728 elf32_arm_swap_symbol_in,
15729 elf32_arm_swap_symbol_out,
15730 bfd_elf32_slurp_reloc_table,
15731 bfd_elf32_slurp_symbol_table,
15732 bfd_elf32_swap_dyn_in,
15733 bfd_elf32_swap_dyn_out,
15734 bfd_elf32_swap_reloc_in,
15735 bfd_elf32_swap_reloc_out,
15736 bfd_elf32_swap_reloca_in,
15737 bfd_elf32_swap_reloca_out
15738};
15739
252b5132 15740#define ELF_ARCH bfd_arch_arm
ae95ffa6 15741#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 15742#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 15743#ifdef __QNXTARGET__
15744#define ELF_MAXPAGESIZE 0x1000
15745#else
f21f3fe0 15746#define ELF_MAXPAGESIZE 0x8000
d0facd1b 15747#endif
b1342370 15748#define ELF_MINPAGESIZE 0x1000
24718e3b 15749#define ELF_COMMONPAGESIZE 0x1000
252b5132 15750
ba93b8ac
DJ		 15751#define bfd_elf32_mkobject elf32_arm_mkobject
15752
99e4ae17
AJ		 15753#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15754#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 15755#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15756#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15757#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 15758#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 15759#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
b38cadfb 15760#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 15761#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 15762#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 15763#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 15764#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 15765#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 15766
15767#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15768#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 15769#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 15770#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15771#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 15772#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 15773#define elf_backend_write_section elf32_arm_write_section
252b5132 15774#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 15775#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 15776#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15777#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15778#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 15779#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 15780#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 15781#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 15782#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 15783#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 15784#define elf_backend_fake_sections elf32_arm_fake_sections
15785#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 15786#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 15787#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 15788#define elf_backend_size_info elf32_arm_size_info
b294bdf8 15789#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 15790#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15791#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15792#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 15793#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 15794
15795#define elf_backend_can_refcount 1
15796#define elf_backend_can_gc_sections 1
15797#define elf_backend_plt_readonly 1
15798#define elf_backend_want_got_plt 1
15799#define elf_backend_want_plt_sym 0
15800#define elf_backend_may_use_rel_p 1
15801#define elf_backend_may_use_rela_p 0
4e7fd91e 15802#define elf_backend_default_use_rela_p 0
252b5132 15803
04f7c78d 15804#define elf_backend_got_header_size 12
04f7c78d 15805
906e58ca
NC		 15806#undef elf_backend_obj_attrs_vendor
15807#define elf_backend_obj_attrs_vendor "aeabi"
15808#undef elf_backend_obj_attrs_section
15809#define elf_backend_obj_attrs_section ".ARM.attributes"
15810#undef elf_backend_obj_attrs_arg_type
15811#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15812#undef elf_backend_obj_attrs_section_type
104d59d1 15813#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
b38cadfb
NC		 15814#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15815#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 15816
252b5132 15817#include "elf32-target.h"
7f266840 15818
b38cadfb
NC		 15819/* Native Client targets. */
15820
15821#undef TARGET_LITTLE_SYM
15822#define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15823#undef TARGET_LITTLE_NAME
15824#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15825#undef TARGET_BIG_SYM
15826#define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15827#undef TARGET_BIG_NAME
15828#define TARGET_BIG_NAME "elf32-bigarm-nacl"
15829
15830/* Like elf32_arm_link_hash_table_create -- but overrides
15831 appropriately for NaCl. */
15832
15833static struct bfd_link_hash_table *
15834elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15835{
15836 struct bfd_link_hash_table *ret;
15837
15838 ret = elf32_arm_link_hash_table_create (abfd);
15839 if (ret)
15840 {
15841 struct elf32_arm_link_hash_table *htab
15842 = (struct elf32_arm_link_hash_table *) ret;
15843
15844 htab->nacl_p = 1;
15845
15846 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15847 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15848 }
15849 return ret;
15850}
15851
15852/* Since NaCl doesn't use the ARM-specific unwind format, we don't
15853 really need to use elf32_arm_modify_segment_map. But we do it
15854 anyway just to reduce gratuitous differences with the stock ARM backend. */
15855
15856static bfd_boolean
15857elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15858{
15859 return (elf32_arm_modify_segment_map (abfd, info)
15860 && nacl_modify_segment_map (abfd, info));
15861}
15862
15863#undef elf32_bed
15864#define elf32_bed elf32_arm_nacl_bed
15865#undef bfd_elf32_bfd_link_hash_table_create
15866#define bfd_elf32_bfd_link_hash_table_create \
15867 elf32_arm_nacl_link_hash_table_create
15868#undef elf_backend_plt_alignment
15869#define elf_backend_plt_alignment 4
15870#undef elf_backend_modify_segment_map
15871#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15872#undef elf_backend_modify_program_headers
15873#define elf_backend_modify_program_headers nacl_modify_program_headers
15874
15875#undef ELF_MAXPAGESIZE
15876#define ELF_MAXPAGESIZE 0x10000
15877
15878#include "elf32-target.h"
15879
15880/* Reset to defaults. */
15881#undef elf_backend_plt_alignment
15882#undef elf_backend_modify_segment_map
15883#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15884#undef elf_backend_modify_program_headers
15885
906e58ca 15886/* VxWorks Targets. */
4e7fd91e 15887
906e58ca 15888#undef TARGET_LITTLE_SYM
4e7fd91e 15889#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 15890#undef TARGET_LITTLE_NAME
4e7fd91e 15891#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 15892#undef TARGET_BIG_SYM
4e7fd91e 15893#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 15894#undef TARGET_BIG_NAME
4e7fd91e
PB		 15895#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15896
15897/* Like elf32_arm_link_hash_table_create -- but overrides
15898 appropriately for VxWorks. */
906e58ca 15899
4e7fd91e
PB		 15900static struct bfd_link_hash_table *
15901elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15902{
15903 struct bfd_link_hash_table *ret;
15904
15905 ret = elf32_arm_link_hash_table_create (abfd);
15906 if (ret)
15907 {
15908 struct elf32_arm_link_hash_table *htab
00a97672 15909 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 15910 htab->use_rel = 0;
00a97672 15911 htab->vxworks_p = 1;
4e7fd91e
PB		 15912 }
15913 return ret;
906e58ca 15914}
4e7fd91e 15915
00a97672
RS		 15916static void
15917elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15918{
15919 elf32_arm_final_write_processing (abfd, linker);
15920 elf_vxworks_final_write_processing (abfd, linker);
15921}
15922
906e58ca 15923#undef elf32_bed
4e7fd91e
PB		 15924#define elf32_bed elf32_arm_vxworks_bed
15925
906e58ca
NC		 15926#undef bfd_elf32_bfd_link_hash_table_create
15927#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 15928#undef elf_backend_final_write_processing
15929#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15930#undef elf_backend_emit_relocs
15931#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 15932
906e58ca 15933#undef elf_backend_may_use_rel_p
00a97672 15934#define elf_backend_may_use_rel_p 0
906e58ca 15935#undef elf_backend_may_use_rela_p
00a97672 15936#define elf_backend_may_use_rela_p 1
906e58ca 15937#undef elf_backend_default_use_rela_p
00a97672 15938#define elf_backend_default_use_rela_p 1
906e58ca 15939#undef elf_backend_want_plt_sym
00a97672 15940#define elf_backend_want_plt_sym 1
906e58ca 15941#undef ELF_MAXPAGESIZE
00a97672 15942#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 15943
15944#include "elf32-target.h"
15945
15946
21d799b5
NC		 15947/* Merge backend specific data from an object file to the output
15948 object file when linking. */
15949
15950static bfd_boolean
15951elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15952{
15953 flagword out_flags;
15954 flagword in_flags;
15955 bfd_boolean flags_compatible = TRUE;
15956 asection *sec;
15957
cc643b88 15958 /* Check if we have the same endianness. */
21d799b5
NC		 15959 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15960 return FALSE;
15961
15962 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15963 return TRUE;
15964
15965 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15966 return FALSE;
15967
15968 /* The input BFD must have had its flags initialised. */
15969 /* The following seems bogus to me -- The flags are initialized in
15970 the assembler but I don't think an elf_flags_init field is
15971 written into the object. */
15972 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15973
15974 in_flags = elf_elfheader (ibfd)->e_flags;
15975 out_flags = elf_elfheader (obfd)->e_flags;
15976
15977 /* In theory there is no reason why we couldn't handle this. However
15978 in practice it isn't even close to working and there is no real
15979 reason to want it. */
15980 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15981 && !(ibfd->flags & DYNAMIC)
15982 && (in_flags & EF_ARM_BE8))
15983 {
15984 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15985 ibfd);
15986 return FALSE;
15987 }
15988
15989 if (!elf_flags_init (obfd))
15990 {
15991 /* If the input is the default architecture and had the default
15992 flags then do not bother setting the flags for the output
15993 architecture, instead allow future merges to do this. If no
15994 future merges ever set these flags then they will retain their
99059e56
RM		 15995 uninitialised values, which surprise surprise, correspond
15996 to the default values. */
21d799b5
NC		 15997 if (bfd_get_arch_info (ibfd)->the_default
15998 && elf_elfheader (ibfd)->e_flags == 0)
15999 return TRUE;
16000
16001 elf_flags_init (obfd) = TRUE;
16002 elf_elfheader (obfd)->e_flags = in_flags;
16003
16004 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
16005 && bfd_get_arch_info (obfd)->the_default)
16006 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
16007
16008 return TRUE;
16009 }
16010
16011 /* Determine what should happen if the input ARM architecture
16012 does not match the output ARM architecture. */
16013 if (! bfd_arm_merge_machines (ibfd, obfd))
16014 return FALSE;
16015
16016 /* Identical flags must be compatible. */
16017 if (in_flags == out_flags)
16018 return TRUE;
16019
16020 /* Check to see if the input BFD actually contains any sections. If
16021 not, its flags may not have been initialised either, but it
16022 cannot actually cause any incompatiblity. Do not short-circuit
16023 dynamic objects; their section list may be emptied by
16024 elf_link_add_object_symbols.
16025
16026 Also check to see if there are no code sections in the input.
16027 In this case there is no need to check for code specific flags.
16028 XXX - do we need to worry about floating-point format compatability
16029 in data sections ? */
16030 if (!(ibfd->flags & DYNAMIC))
16031 {
16032 bfd_boolean null_input_bfd = TRUE;
16033 bfd_boolean only_data_sections = TRUE;
16034
16035 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16036 {
16037 /* Ignore synthetic glue sections. */
16038 if (strcmp (sec->name, ".glue_7")
16039 && strcmp (sec->name, ".glue_7t"))
16040 {
16041 if ((bfd_get_section_flags (ibfd, sec)
16042 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16043 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
99059e56 16044 only_data_sections = FALSE;
21d799b5
NC		 16045
16046 null_input_bfd = FALSE;
16047 break;
16048 }
16049 }
16050
16051 if (null_input_bfd || only_data_sections)
16052 return TRUE;
16053 }
16054
16055 /* Complain about various flag mismatches. */
16056 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16057 EF_ARM_EABI_VERSION (out_flags)))
16058 {
16059 _bfd_error_handler
16060 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16061 ibfd, obfd,
16062 (in_flags & EF_ARM_EABIMASK) >> 24,
16063 (out_flags & EF_ARM_EABIMASK) >> 24);
16064 return FALSE;
16065 }
16066
16067 /* Not sure what needs to be checked for EABI versions >= 1. */
16068 /* VxWorks libraries do not use these flags. */
16069 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16070 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16071 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16072 {
16073 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16074 {
16075 _bfd_error_handler
16076 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16077 ibfd, obfd,
16078 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16079 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16080 flags_compatible = FALSE;
16081 }
16082
16083 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16084 {
16085 if (in_flags & EF_ARM_APCS_FLOAT)
16086 _bfd_error_handler
16087 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16088 ibfd, obfd);
16089 else
16090 _bfd_error_handler
16091 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16092 ibfd, obfd);
16093
16094 flags_compatible = FALSE;
16095 }
16096
16097 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16098 {
16099 if (in_flags & EF_ARM_VFP_FLOAT)
16100 _bfd_error_handler
16101 (_("error: %B uses VFP instructions, whereas %B does not"),
16102 ibfd, obfd);
16103 else
16104 _bfd_error_handler
16105 (_("error: %B uses FPA instructions, whereas %B does not"),
16106 ibfd, obfd);
16107
16108 flags_compatible = FALSE;
16109 }
16110
16111 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16112 {
16113 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16114 _bfd_error_handler
16115 (_("error: %B uses Maverick instructions, whereas %B does not"),
16116 ibfd, obfd);
16117 else
16118 _bfd_error_handler
16119 (_("error: %B does not use Maverick instructions, whereas %B does"),
16120 ibfd, obfd);
16121
16122 flags_compatible = FALSE;
16123 }
16124
16125#ifdef EF_ARM_SOFT_FLOAT
16126 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16127 {
16128 /* We can allow interworking between code that is VFP format
16129 layout, and uses either soft float or integer regs for
16130 passing floating point arguments and results. We already
16131 know that the APCS_FLOAT flags match; similarly for VFP
16132 flags. */
16133 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16134 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16135 {
16136 if (in_flags & EF_ARM_SOFT_FLOAT)
16137 _bfd_error_handler
16138 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16139 ibfd, obfd);
16140 else
16141 _bfd_error_handler
16142 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16143 ibfd, obfd);
16144
16145 flags_compatible = FALSE;
16146 }
16147 }
16148#endif
16149
16150 /* Interworking mismatch is only a warning. */
16151 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16152 {
16153 if (in_flags & EF_ARM_INTERWORK)
16154 {
16155 _bfd_error_handler
16156 (_("Warning: %B supports interworking, whereas %B does not"),
16157 ibfd, obfd);
16158 }
16159 else
16160 {
16161 _bfd_error_handler
16162 (_("Warning: %B does not support interworking, whereas %B does"),
16163 ibfd, obfd);
16164 }
16165 }
16166 }
16167
16168 return flags_compatible;
16169}
16170
16171
906e58ca 16172/* Symbian OS Targets. */
7f266840 16173
906e58ca 16174#undef TARGET_LITTLE_SYM
7f266840 16175#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 16176#undef TARGET_LITTLE_NAME
7f266840 16177#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 16178#undef TARGET_BIG_SYM
7f266840 16179#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 16180#undef TARGET_BIG_NAME
7f266840
DJ		 16181#define TARGET_BIG_NAME "elf32-bigarm-symbian"
16182
16183/* Like elf32_arm_link_hash_table_create -- but overrides
16184 appropriately for Symbian OS. */
906e58ca 16185
7f266840
DJ		 16186static struct bfd_link_hash_table *
16187elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16188{
16189 struct bfd_link_hash_table *ret;
16190
16191 ret = elf32_arm_link_hash_table_create (abfd);
16192 if (ret)
16193 {
16194 struct elf32_arm_link_hash_table *htab
16195 = (struct elf32_arm_link_hash_table *)ret;
16196 /* There is no PLT header for Symbian OS. */
16197 htab->plt_header_size = 0;
95720a86
DJ		 16198 /* The PLT entries are each one instruction and one word. */
16199 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 16200 htab->symbian_p = 1;
33bfe774
JB		 16201 /* Symbian uses armv5t or above, so use_blx is always true. */
16202 htab->use_blx = 1;
67687978 16203 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 16204 }
16205 return ret;
906e58ca 16206}
7f266840 16207
b35d266b 16208static const struct bfd_elf_special_section
551b43fd 16209elf32_arm_symbian_special_sections[] =
7f266840 16210{
5cd3778d
MM		 16211 /* In a BPABI executable, the dynamic linking sections do not go in
16212 the loadable read-only segment. The post-linker may wish to
16213 refer to these sections, but they are not part of the final
16214 program image. */
0112cd26
NC		 16215 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16216 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16217 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16218 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16219 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 16220 /* These sections do not need to be writable as the SymbianOS
16221 postlinker will arrange things so that no dynamic relocation is
16222 required. */
0112cd26
NC		 16223 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16224 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16225 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16226 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 16227};
16228
c3c76620 16229static void
906e58ca 16230elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 16231 struct bfd_link_info *link_info)
c3c76620
MM		 16232{
16233 /* BPABI objects are never loaded directly by an OS kernel; they are
16234 processed by a postlinker first, into an OS-specific format. If
16235 the D_PAGED bit is set on the file, BFD will align segments on
16236 page boundaries, so that an OS can directly map the file. With
16237 BPABI objects, that just results in wasted space. In addition,
16238 because we clear the D_PAGED bit, map_sections_to_segments will
16239 recognize that the program headers should not be mapped into any
16240 loadable segment. */
16241 abfd->flags &= ~D_PAGED;
906e58ca 16242 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 16243}
7f266840
DJ		 16244
16245static bfd_boolean
906e58ca 16246elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 16247 struct bfd_link_info *info)
7f266840
DJ		 16248{
16249 struct elf_segment_map *m;
16250 asection *dynsec;
16251
7f266840
DJ		 16252 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16253 segment. However, because the .dynamic section is not marked
16254 with SEC_LOAD, the generic ELF code will not create such a
16255 segment. */
16256 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16257 if (dynsec)
16258 {
12bd6957 16259 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
8ded5a0f
AM		 16260 if (m->p_type == PT_DYNAMIC)
16261 break;
16262
16263 if (m == NULL)
16264 {
16265 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
12bd6957
AM		 16266 m->next = elf_seg_map (abfd);
16267 elf_seg_map (abfd) = m;
8ded5a0f 16268 }
7f266840
DJ		 16269 }
16270
b294bdf8
MM		 16271 /* Also call the generic arm routine. */
16272 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 16273}
16274
95720a86
DJ		 16275/* Return address for Ith PLT stub in section PLT, for relocation REL
16276 or (bfd_vma) -1 if it should not be included. */
16277
16278static bfd_vma
16279elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16280 const arelent *rel ATTRIBUTE_UNUSED)
16281{
16282 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16283}
16284
16285
8029a119 16286#undef elf32_bed
7f266840
DJ		 16287#define elf32_bed elf32_arm_symbian_bed
16288
16289/* The dynamic sections are not allocated on SymbianOS; the postlinker
16290 will process them and then discard them. */
906e58ca 16291#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 16292#define ELF_DYNAMIC_SEC_FLAGS \
16293 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16294
00a97672 16295#undef elf_backend_emit_relocs
c3c76620 16296
906e58ca
NC		 16297#undef bfd_elf32_bfd_link_hash_table_create
16298#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16299#undef elf_backend_special_sections
16300#define elf_backend_special_sections elf32_arm_symbian_special_sections
16301#undef elf_backend_begin_write_processing
16302#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16303#undef elf_backend_final_write_processing
16304#define elf_backend_final_write_processing elf32_arm_final_write_processing
16305
16306#undef elf_backend_modify_segment_map
7f266840
DJ		 16307#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16308
16309/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 16310#undef elf_backend_got_header_size
7f266840
DJ		 16311#define elf_backend_got_header_size 0
16312
16313/* Similarly, there is no .got.plt section. */
906e58ca 16314#undef elf_backend_want_got_plt
7f266840
DJ		 16315#define elf_backend_want_got_plt 0
16316
906e58ca 16317#undef elf_backend_plt_sym_val
95720a86
DJ		 16318#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16319
906e58ca 16320#undef elf_backend_may_use_rel_p
00a97672 16321#define elf_backend_may_use_rel_p 1
906e58ca 16322#undef elf_backend_may_use_rela_p
00a97672 16323#define elf_backend_may_use_rela_p 0
906e58ca 16324#undef elf_backend_default_use_rela_p
00a97672 16325#define elf_backend_default_use_rela_p 0
906e58ca 16326#undef elf_backend_want_plt_sym
00a97672 16327#define elf_backend_want_plt_sym 0
906e58ca 16328#undef ELF_MAXPAGESIZE
00a97672 16329#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 16330
7f266840 16331#include "elf32-target.h"
GDB Binutils - Deliverables
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