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minor comment reformatting (ada-valprint.c:printstr)
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
f6ebfac0 3 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840
DJ		 263
264 HOWTO (R_ARM_SWI24, /* type */
265 0, /* rightshift */
266 0, /* size (0 = byte, 1 = short, 2 = long) */
267 0, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_signed,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_SWI24", /* name */
273 FALSE, /* partial_inplace */
274 0x00000000, /* src_mask */
275 0x00000000, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
8029a119 1355 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1356 EMPTY_HOWTO (91),
1357 EMPTY_HOWTO (92),
1358 EMPTY_HOWTO (93),
1359
1360 HOWTO (R_ARM_PLT32_ABS, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_dont,/* complain_on_overflow */
1367 bfd_elf_generic_reloc, /* special_function */
1368 "R_ARM_PLT32_ABS", /* name */
1369 FALSE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_GOT_ABS, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 32, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_GOT_ABS", /* name */
1383 FALSE, /* partial_inplace */
1384 0xffffffff, /* src_mask */
1385 0xffffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_GOT_PREL, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 32, /* bitsize */
1392 TRUE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont, /* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_GOT_PREL", /* name */
1397 FALSE, /* partial_inplace */
1398 0xffffffff, /* src_mask */
1399 0xffffffff, /* dst_mask */
1400 TRUE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_GOT_BREL12, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 12, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_bitfield,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_GOT_BREL12", /* name */
1411 FALSE, /* partial_inplace */
1412 0x00000fff, /* src_mask */
1413 0x00000fff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_GOTOFF12, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_bitfield,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_GOTOFF12", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1431
1432 /* GNU extension to record C++ vtable member usage */
1433 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1434 0, /* rightshift */
1435 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1436 0, /* bitsize */
ba93b8ac
DJ		 1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
c19d1205
ZW		 1439 complain_overflow_dont, /* complain_on_overflow */
1440 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1441 "R_ARM_GNU_VTENTRY", /* name */
1442 FALSE, /* partial_inplace */
1443 0, /* src_mask */
1444 0, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446
1447 /* GNU extension to record C++ vtable hierarchy */
1448 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1449 0, /* rightshift */
1450 2, /* size (0 = byte, 1 = short, 2 = long) */
1451 0, /* bitsize */
1452 FALSE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_dont, /* complain_on_overflow */
1455 NULL, /* special_function */
1456 "R_ARM_GNU_VTINHERIT", /* name */
1457 FALSE, /* partial_inplace */
1458 0, /* src_mask */
1459 0, /* dst_mask */
1460 FALSE), /* pcrel_offset */
1461
1462 HOWTO (R_ARM_THM_JUMP11, /* type */
1463 1, /* rightshift */
1464 1, /* size (0 = byte, 1 = short, 2 = long) */
1465 11, /* bitsize */
1466 TRUE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_signed, /* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_ARM_THM_JUMP11", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000007ff, /* src_mask */
1473 0x000007ff, /* dst_mask */
1474 TRUE), /* pcrel_offset */
1475
1476 HOWTO (R_ARM_THM_JUMP8, /* type */
1477 1, /* rightshift */
1478 1, /* size (0 = byte, 1 = short, 2 = long) */
1479 8, /* bitsize */
1480 TRUE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_signed, /* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_ARM_THM_JUMP8", /* name */
1485 FALSE, /* partial_inplace */
1486 0x000000ff, /* src_mask */
1487 0x000000ff, /* dst_mask */
1488 TRUE), /* pcrel_offset */
ba93b8ac 1489
c19d1205
ZW		 1490 /* TLS relocations */
1491 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 32, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1498 NULL, /* special_function */
1499 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1500 TRUE, /* partial_inplace */
1501 0xffffffff, /* src_mask */
1502 0xffffffff, /* dst_mask */
c19d1205 1503 FALSE), /* pcrel_offset */
ba93b8ac 1504
ba93b8ac
DJ		 1505 HOWTO (R_ARM_TLS_LDM32, /* type */
1506 0, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 32, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_bitfield,/* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 "R_ARM_TLS_LDM32", /* name */
1514 TRUE, /* partial_inplace */
1515 0xffffffff, /* src_mask */
1516 0xffffffff, /* dst_mask */
c19d1205 1517 FALSE), /* pcrel_offset */
ba93b8ac 1518
c19d1205 1519 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1520 0, /* rightshift */
1521 2, /* size (0 = byte, 1 = short, 2 = long) */
1522 32, /* bitsize */
1523 FALSE, /* pc_relative */
1524 0, /* bitpos */
1525 complain_overflow_bitfield,/* complain_on_overflow */
1526 bfd_elf_generic_reloc, /* special_function */
c19d1205 1527 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1528 TRUE, /* partial_inplace */
1529 0xffffffff, /* src_mask */
1530 0xffffffff, /* dst_mask */
c19d1205 1531 FALSE), /* pcrel_offset */
ba93b8ac 1532
ba93b8ac
DJ		 1533 HOWTO (R_ARM_TLS_IE32, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 32, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_bitfield,/* complain_on_overflow */
1540 NULL, /* special_function */
1541 "R_ARM_TLS_IE32", /* name */
1542 TRUE, /* partial_inplace */
1543 0xffffffff, /* src_mask */
1544 0xffffffff, /* dst_mask */
c19d1205 1545 FALSE), /* pcrel_offset */
7f266840 1546
c19d1205 1547 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1550 32, /* bitsize */
7f266840
DJ		 1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
c19d1205
ZW		 1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 bfd_elf_generic_reloc, /* special_function */
1555 "R_ARM_TLS_LE32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
7f266840 1560
c19d1205
ZW		 1561 HOWTO (R_ARM_TLS_LDO12, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 12, /* bitsize */
1565 FALSE, /* pc_relative */
7f266840 1566 0, /* bitpos */
c19d1205 1567 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1568 bfd_elf_generic_reloc, /* special_function */
c19d1205 1569 "R_ARM_TLS_LDO12", /* name */
7f266840 1570 FALSE, /* partial_inplace */
c19d1205
ZW		 1571 0x00000fff, /* src_mask */
1572 0x00000fff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
7f266840 1574
c19d1205
ZW		 1575 HOWTO (R_ARM_TLS_LE12, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 12, /* bitsize */
1579 FALSE, /* pc_relative */
7f266840 1580 0, /* bitpos */
c19d1205 1581 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1582 bfd_elf_generic_reloc, /* special_function */
c19d1205 1583 "R_ARM_TLS_LE12", /* name */
7f266840 1584 FALSE, /* partial_inplace */
c19d1205
ZW		 1585 0x00000fff, /* src_mask */
1586 0x00000fff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
7f266840 1588
c19d1205 1589 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1592 12, /* bitsize */
1593 FALSE, /* pc_relative */
7f266840 1594 0, /* bitpos */
c19d1205 1595 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1596 bfd_elf_generic_reloc, /* special_function */
c19d1205 1597 "R_ARM_TLS_IE12GP", /* name */
7f266840 1598 FALSE, /* partial_inplace */
c19d1205
ZW		 1599 0x00000fff, /* src_mask */
1600 0x00000fff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602};
1603
1604/* 112-127 private relocations
1605 128 R_ARM_ME_TOO, obsolete
1606 129-255 unallocated in AAELF.
7f266840 1607
c19d1205
ZW		 1608 249-255 extended, currently unused, relocations: */
1609
4962c51a 1610static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1611{
1612 HOWTO (R_ARM_RREL32, /* type */
1613 0, /* rightshift */
1614 0, /* size (0 = byte, 1 = short, 2 = long) */
1615 0, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_dont,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_RREL32", /* name */
1621 FALSE, /* partial_inplace */
1622 0, /* src_mask */
1623 0, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_RABS32, /* type */
1627 0, /* rightshift */
1628 0, /* size (0 = byte, 1 = short, 2 = long) */
1629 0, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_dont,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_RABS32", /* name */
1635 FALSE, /* partial_inplace */
1636 0, /* src_mask */
1637 0, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_RPC24, /* type */
1641 0, /* rightshift */
1642 0, /* size (0 = byte, 1 = short, 2 = long) */
1643 0, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_dont,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_RPC24", /* name */
1649 FALSE, /* partial_inplace */
1650 0, /* src_mask */
1651 0, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 HOWTO (R_ARM_RBASE, /* type */
1655 0, /* rightshift */
1656 0, /* size (0 = byte, 1 = short, 2 = long) */
1657 0, /* bitsize */
1658 FALSE, /* pc_relative */
1659 0, /* bitpos */
1660 complain_overflow_dont,/* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 "R_ARM_RBASE", /* name */
1663 FALSE, /* partial_inplace */
1664 0, /* src_mask */
1665 0, /* dst_mask */
1666 FALSE) /* pcrel_offset */
1667};
1668
1669static reloc_howto_type *
1670elf32_arm_howto_from_type (unsigned int r_type)
1671{
906e58ca 1672 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1673 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1674
c19d1205 1675 if (r_type >= R_ARM_RREL32
906e58ca 1676 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1677 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1678
c19d1205 1679 return NULL;
7f266840
DJ		 1680}
1681
1682static void
1683elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1684 Elf_Internal_Rela * elf_reloc)
1685{
1686 unsigned int r_type;
1687
1688 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1689 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1690}
1691
1692struct elf32_arm_reloc_map
1693 {
1694 bfd_reloc_code_real_type bfd_reloc_val;
1695 unsigned char elf_reloc_val;
1696 };
1697
1698/* All entries in this list must also be present in elf32_arm_howto_table. */
1699static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1700 {
1701 {BFD_RELOC_NONE, R_ARM_NONE},
1702 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1703 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1704 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1705 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1706 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1707 {BFD_RELOC_32, R_ARM_ABS32},
1708 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1709 {BFD_RELOC_8, R_ARM_ABS8},
1710 {BFD_RELOC_16, R_ARM_ABS16},
1711 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1712 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1713 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1719 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1720 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1721 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1722 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1723 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1724 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1726 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1727 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1728 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1729 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1730 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1731 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1732 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1733 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1734 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1735 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1736 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1737 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1738 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1739 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1740 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1741 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1742 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1743 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1744 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1745 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1746 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1747 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1749 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1750 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1751 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1753 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1754 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1755 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1756 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1757 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1758 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1759 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1760 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1761 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1762 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1763 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1764 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1765 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1767 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1768 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1769 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1770 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1771 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1772 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1773 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1774 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1775 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1776 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1777 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1778 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1779 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1780 };
1781
1782static reloc_howto_type *
f1c71a59
ZW		 1783elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1784 bfd_reloc_code_real_type code)
7f266840
DJ		 1785{
1786 unsigned int i;
8029a119 1787
906e58ca 1788 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1789 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1790 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1791
c19d1205 1792 return NULL;
7f266840
DJ		 1793}
1794
157090f7
AM		 1795static reloc_howto_type *
1796elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1797 const char *r_name)
1798{
1799 unsigned int i;
1800
906e58ca 1801 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1802 if (elf32_arm_howto_table_1[i].name != NULL
1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1804 return &elf32_arm_howto_table_1[i];
1805
906e58ca 1806 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1807 if (elf32_arm_howto_table_2[i].name != NULL
1808 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1809 return &elf32_arm_howto_table_2[i];
1810
1811 return NULL;
1812}
1813
906e58ca
NC		 1814/* Support for core dump NOTE sections. */
1815
7f266840 1816static bfd_boolean
f1c71a59 1817elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1818{
1819 int offset;
1820 size_t size;
1821
1822 switch (note->descsz)
1823 {
1824 default:
1825 return FALSE;
1826
8029a119 1827 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1828 /* pr_cursig */
1829 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1830
1831 /* pr_pid */
261b8d08 1832 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1833
1834 /* pr_reg */
1835 offset = 72;
1836 size = 72;
1837
1838 break;
1839 }
1840
1841 /* Make a ".reg/999" section. */
1842 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1843 size, note->descpos + offset);
1844}
1845
1846static bfd_boolean
f1c71a59 1847elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1848{
1849 switch (note->descsz)
1850 {
1851 default:
1852 return FALSE;
1853
8029a119 1854 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1855 elf_tdata (abfd)->core_program
1856 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1857 elf_tdata (abfd)->core_command
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1859 }
1860
1861 /* Note that for some reason, a spurious space is tacked
1862 onto the end of the args in some (at least one anyway)
1863 implementations, so strip it off if it exists. */
7f266840
DJ		 1864 {
1865 char *command = elf_tdata (abfd)->core_command;
1866 int n = strlen (command);
1867
1868 if (0 < n && command[n - 1] == ' ')
1869 command[n - 1] = '\0';
1870 }
1871
1872 return TRUE;
1873}
1874
1875#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1876#define TARGET_LITTLE_NAME "elf32-littlearm"
1877#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1878#define TARGET_BIG_NAME "elf32-bigarm"
1879
1880#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1881#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1882
252b5132
RH		 1883typedef unsigned long int insn32;
1884typedef unsigned short int insn16;
1885
3a4a14e9
PB		 1886/* In lieu of proper flags, assume all EABIv4 or later objects are
1887 interworkable. */
57e8b36a 1888#define INTERWORK_FLAG(abfd) \
3a4a14e9 1889 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1890 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1891 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1892
252b5132
RH		 1893/* The linker script knows the section names for placement.
1894 The entry_names are used to do simple name mangling on the stubs.
1895 Given a function name, and its type, the stub can be found. The
9b485d32 1896 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1897#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1898#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1899
1900#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1901#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1902
c7b8f16e
JB		 1903#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1904#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1905
845b51d6
PB		 1906#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1907#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1908
7413f23f
DJ		 1909#define STUB_ENTRY_NAME "__%s_veneer"
1910
252b5132
RH		 1911/* The name of the dynamic interpreter. This is put in the .interp
1912 section. */
1913#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1914
5e681ec4
PB		 1915#ifdef FOUR_WORD_PLT
1916
252b5132
RH		 1917/* The first entry in a procedure linkage table looks like
1918 this. It is set up so that any shared library function that is
59f2c4e7 1919 called before the relocation has been set up calls the dynamic
9b485d32 1920 linker first. */
e5a52504 1921static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1922 {
1923 0xe52de004, /* str lr, [sp, #-4]! */
1924 0xe59fe010, /* ldr lr, [pc, #16] */
1925 0xe08fe00e, /* add lr, pc, lr */
1926 0xe5bef008, /* ldr pc, [lr, #8]! */
1927 };
1928
1929/* Subsequent entries in a procedure linkage table look like
1930 this. */
e5a52504 1931static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1932 {
1933 0xe28fc600, /* add ip, pc, #NN */
1934 0xe28cca00, /* add ip, ip, #NN */
1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1936 0x00000000, /* unused */
1937 };
1938
1939#else
1940
5e681ec4
PB		 1941/* The first entry in a procedure linkage table looks like
1942 this. It is set up so that any shared library function that is
1943 called before the relocation has been set up calls the dynamic
1944 linker first. */
e5a52504 1945static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1946 {
5e681ec4
PB		 1947 0xe52de004, /* str lr, [sp, #-4]! */
1948 0xe59fe004, /* ldr lr, [pc, #4] */
1949 0xe08fe00e, /* add lr, pc, lr */
1950 0xe5bef008, /* ldr pc, [lr, #8]! */
1951 0x00000000, /* &GOT[0] - . */
917583ad 1952 };
252b5132
RH		 1953
1954/* Subsequent entries in a procedure linkage table look like
1955 this. */
e5a52504 1956static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1957 {
1958 0xe28fc600, /* add ip, pc, #0xNN00000 */
1959 0xe28cca00, /* add ip, ip, #0xNN000 */
1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1961 };
1962
1963#endif
252b5132 1964
00a97672
RS		 1965/* The format of the first entry in the procedure linkage table
1966 for a VxWorks executable. */
1967static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1968 {
1969 0xe52dc008, /* str ip,[sp,#-8]! */
1970 0xe59fc000, /* ldr ip,[pc] */
1971 0xe59cf008, /* ldr pc,[ip,#8] */
1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1973 };
1974
1975/* The format of subsequent entries in a VxWorks executable. */
1976static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1977 {
1978 0xe59fc000, /* ldr ip,[pc] */
1979 0xe59cf000, /* ldr pc,[ip] */
1980 0x00000000, /* .long @got */
1981 0xe59fc000, /* ldr ip,[pc] */
1982 0xea000000, /* b _PLT */
1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1984 };
1985
1986/* The format of entries in a VxWorks shared library. */
1987static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1988 {
1989 0xe59fc000, /* ldr ip,[pc] */
1990 0xe79cf009, /* ldr pc,[ip,r9] */
1991 0x00000000, /* .long @got */
1992 0xe59fc000, /* ldr ip,[pc] */
1993 0xe599f008, /* ldr pc,[r9,#8] */
1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1995 };
1996
b7693d02
DJ		 1997/* An initial stub used if the PLT entry is referenced from Thumb code. */
1998#define PLT_THUMB_STUB_SIZE 4
1999static const bfd_vma elf32_arm_plt_thumb_stub [] =
2000 {
2001 0x4778, /* bx pc */
2002 0x46c0 /* nop */
2003 };
2004
e5a52504
MM		 2005/* The entries in a PLT when using a DLL-based target with multiple
2006 address spaces. */
906e58ca 2007static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2008 {
83a358aa 2009 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2011 };
2012
906e58ca
NC		 2013#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2014#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2015#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2016#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2017#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2018#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2019
461a49ca
DJ		 2020enum stub_insn_type
2021 {
2022 THUMB16_TYPE = 1,
2023 THUMB32_TYPE,
2024 ARM_TYPE,
2025 DATA_TYPE
2026 };
2027
48229727
JB		 2028#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2029/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2030 is inserted in arm_build_one_stub(). */
2031#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2032#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2033#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2034#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2035#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2036#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2037
2038typedef struct
2039{
2040 bfd_vma data;
2041 enum stub_insn_type type;
ebe24dd4 2042 unsigned int r_type;
461a49ca
DJ		 2043 int reloc_addend;
2044} insn_sequence;
2045
fea2b4d6
CL		 2046/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2047 to reach the stub if necessary. */
461a49ca 2048static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2049 {
461a49ca
DJ		 2050 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2051 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2052 };
2053
fea2b4d6
CL		 2054/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2055 available. */
461a49ca 2056static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2057 {
461a49ca
DJ		 2058 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2059 ARM_INSN(0xe12fff1c), /* bx ip */
2060 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2061 };
2062
d3626fb0 2063/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2064static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2065 {
461a49ca
DJ		 2066 THUMB16_INSN(0xb401), /* push {r0} */
2067 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2068 THUMB16_INSN(0x4684), /* mov ip, r0 */
2069 THUMB16_INSN(0xbc01), /* pop {r0} */
2070 THUMB16_INSN(0x4760), /* bx ip */
2071 THUMB16_INSN(0xbf00), /* nop */
2072 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2073 };
2074
d3626fb0
CL		 2075/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2076 allowed. */
2077static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2078 {
2079 THUMB16_INSN(0x4778), /* bx pc */
2080 THUMB16_INSN(0x46c0), /* nop */
2081 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2082 ARM_INSN(0xe12fff1c), /* bx ip */
2083 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2084 };
2085
fea2b4d6
CL		 2086/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2087 available. */
461a49ca 2088static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2089 {
461a49ca
DJ		 2090 THUMB16_INSN(0x4778), /* bx pc */
2091 THUMB16_INSN(0x46c0), /* nop */
2092 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2093 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2094 };
2095
fea2b4d6
CL		 2096/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2097 one, when the destination is close enough. */
461a49ca 2098static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2099 {
461a49ca
DJ		 2100 THUMB16_INSN(0x4778), /* bx pc */
2101 THUMB16_INSN(0x46c0), /* nop */
2102 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2103 };
2104
cf3eccff 2105/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2106 blx to reach the stub if necessary. */
cf3eccff 2107static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2108 {
9ae92b05 2109 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
461a49ca
DJ		 2110 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2111 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2112 };
2113
cf3eccff
DJ		 2114/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2115 blx to reach the stub if necessary. We can not add into pc;
2116 it is not guaranteed to mode switch (different in ARMv6 and
2117 ARMv7). */
2118static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2119 {
9ae92b05 2120 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
cf3eccff
DJ		 2121 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2122 ARM_INSN(0xe12fff1c), /* bx ip */
2123 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2124 };
2125
ebe24dd4
CL		 2126/* V4T ARM -> ARM long branch stub, PIC. */
2127static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2128 {
2129 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2130 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2131 ARM_INSN(0xe12fff1c), /* bx ip */
2132 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2133 };
2134
2135/* V4T Thumb -> ARM long branch stub, PIC. */
2136static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2137 {
2138 THUMB16_INSN(0x4778), /* bx pc */
2139 THUMB16_INSN(0x46c0), /* nop */
2140 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2141 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2142 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2143 };
2144
d3626fb0
CL		 2145/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2146 architectures. */
ebe24dd4
CL		 2147static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2148 {
2149 THUMB16_INSN(0xb401), /* push {r0} */
2150 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2151 THUMB16_INSN(0x46fc), /* mov ip, pc */
2152 THUMB16_INSN(0x4484), /* add ip, r0 */
2153 THUMB16_INSN(0xbc01), /* pop {r0} */
2154 THUMB16_INSN(0x4760), /* bx ip */
2155 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2156 };
2157
d3626fb0
CL		 2158/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2159 allowed. */
2160static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2161 {
2162 THUMB16_INSN(0x4778), /* bx pc */
2163 THUMB16_INSN(0x46c0), /* nop */
2164 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2165 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2166 ARM_INSN(0xe12fff1c), /* bx ip */
2167 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2168 };
2169
48229727
JB		 2170/* Cortex-A8 erratum-workaround stubs. */
2171
2172/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2173 can't use a conditional branch to reach this stub). */
2174
2175static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2176 {
2177 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2178 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2179 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2180 };
2181
2182/* Stub used for b.w and bl.w instructions. */
2183
2184static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2185 {
2186 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2187 };
2188
2189static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2190 {
2191 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2192 };
2193
2194/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2195 instruction (which switches to ARM mode) to point to this stub. Jump to the
2196 real destination using an ARM-mode branch. */
2197
2198static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2199 {
2200 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2201 };
2202
906e58ca
NC		 2203/* Section name for stubs is the associated section name plus this
2204 string. */
2205#define STUB_SUFFIX ".stub"
2206
738a79f6
CL		 2207/* One entry per long/short branch stub defined above. */
2208#define DEF_STUBS \
2209 DEF_STUB(long_branch_any_any) \
2210 DEF_STUB(long_branch_v4t_arm_thumb) \
2211 DEF_STUB(long_branch_thumb_only) \
2212 DEF_STUB(long_branch_v4t_thumb_thumb) \
2213 DEF_STUB(long_branch_v4t_thumb_arm) \
2214 DEF_STUB(short_branch_v4t_thumb_arm) \
2215 DEF_STUB(long_branch_any_arm_pic) \
2216 DEF_STUB(long_branch_any_thumb_pic) \
2217 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2220 DEF_STUB(long_branch_thumb_only_pic) \
2221 DEF_STUB(a8_veneer_b_cond) \
2222 DEF_STUB(a8_veneer_b) \
2223 DEF_STUB(a8_veneer_bl) \
2224 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2225
2226#define DEF_STUB(x) arm_stub_##x,
2227enum elf32_arm_stub_type {
906e58ca 2228 arm_stub_none,
738a79f6 2229 DEF_STUBS
eb7c4339
NS		 2230 /* Note the first a8_veneer type */
2231 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2232};
2233#undef DEF_STUB
2234
2235typedef struct
2236{
d3ce72d0 2237 const insn_sequence* template_sequence;
738a79f6
CL		 2238 int template_size;
2239} stub_def;
2240
2241#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2242static const stub_def stub_definitions[] = {
2243 {NULL, 0},
2244 DEF_STUBS
906e58ca
NC		 2245};
2246
2247struct elf32_arm_stub_hash_entry
2248{
2249 /* Base hash table entry structure. */
2250 struct bfd_hash_entry root;
2251
2252 /* The stub section. */
2253 asection *stub_sec;
2254
2255 /* Offset within stub_sec of the beginning of this stub. */
2256 bfd_vma stub_offset;
2257
2258 /* Given the symbol's value and its section we can determine its final
2259 value when building the stubs (so the stub knows where to jump). */
2260 bfd_vma target_value;
2261 asection *target_section;
2262
48229727
JB		 2263 /* Offset to apply to relocation referencing target_value. */
2264 bfd_vma target_addend;
2265
2266 /* The instruction which caused this stub to be generated (only valid for
2267 Cortex-A8 erratum workaround stubs at present). */
2268 unsigned long orig_insn;
2269
461a49ca 2270 /* The stub type. */
906e58ca 2271 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2272 /* Its encoding size in bytes. */
2273 int stub_size;
2274 /* Its template. */
2275 const insn_sequence *stub_template;
2276 /* The size of the template (number of entries). */
2277 int stub_template_size;
906e58ca
NC		 2278
2279 /* The symbol table entry, if any, that this was derived from. */
2280 struct elf32_arm_link_hash_entry *h;
2281
2282 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2283 unsigned char st_type;
2284
2285 /* Where this stub is being called from, or, in the case of combined
2286 stub sections, the first input section in the group. */
2287 asection *id_sec;
7413f23f
DJ		 2288
2289 /* The name for the local symbol at the start of this stub. The
2290 stub name in the hash table has to be unique; this does not, so
2291 it can be friendlier. */
2292 char *output_name;
906e58ca
NC		 2293};
2294
e489d0ae
PB		 2295/* Used to build a map of a section. This is required for mixed-endian
2296 code/data. */
2297
2298typedef struct elf32_elf_section_map
2299{
2300 bfd_vma vma;
2301 char type;
2302}
2303elf32_arm_section_map;
2304
c7b8f16e
JB		 2305/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2306
2307typedef enum
2308{
2309 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2310 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2311 VFP11_ERRATUM_ARM_VENEER,
2312 VFP11_ERRATUM_THUMB_VENEER
2313}
2314elf32_vfp11_erratum_type;
2315
2316typedef struct elf32_vfp11_erratum_list
2317{
2318 struct elf32_vfp11_erratum_list *next;
2319 bfd_vma vma;
2320 union
2321 {
2322 struct
2323 {
2324 struct elf32_vfp11_erratum_list *veneer;
2325 unsigned int vfp_insn;
2326 } b;
2327 struct
2328 {
2329 struct elf32_vfp11_erratum_list *branch;
2330 unsigned int id;
2331 } v;
2332 } u;
2333 elf32_vfp11_erratum_type type;
2334}
2335elf32_vfp11_erratum_list;
2336
2468f9c9
PB		 2337typedef enum
2338{
2339 DELETE_EXIDX_ENTRY,
2340 INSERT_EXIDX_CANTUNWIND_AT_END
2341}
2342arm_unwind_edit_type;
2343
2344/* A (sorted) list of edits to apply to an unwind table. */
2345typedef struct arm_unwind_table_edit
2346{
2347 arm_unwind_edit_type type;
2348 /* Note: we sometimes want to insert an unwind entry corresponding to a
2349 section different from the one we're currently writing out, so record the
2350 (text) section this edit relates to here. */
2351 asection *linked_section;
2352 unsigned int index;
2353 struct arm_unwind_table_edit *next;
2354}
2355arm_unwind_table_edit;
2356
8e3de13a 2357typedef struct _arm_elf_section_data
e489d0ae 2358{
2468f9c9 2359 /* Information about mapping symbols. */
e489d0ae 2360 struct bfd_elf_section_data elf;
8e3de13a 2361 unsigned int mapcount;
c7b8f16e 2362 unsigned int mapsize;
e489d0ae 2363 elf32_arm_section_map *map;
2468f9c9 2364 /* Information about CPU errata. */
c7b8f16e
JB		 2365 unsigned int erratumcount;
2366 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2367 /* Information about unwind tables. */
2368 union
2369 {
2370 /* Unwind info attached to a text section. */
2371 struct
2372 {
2373 asection *arm_exidx_sec;
2374 } text;
2375
2376 /* Unwind info attached to an .ARM.exidx section. */
2377 struct
2378 {
2379 arm_unwind_table_edit *unwind_edit_list;
2380 arm_unwind_table_edit *unwind_edit_tail;
2381 } exidx;
2382 } u;
8e3de13a
NC		 2383}
2384_arm_elf_section_data;
e489d0ae
PB		 2385
2386#define elf32_arm_section_data(sec) \
8e3de13a 2387 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2388
48229727
JB		 2389/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2390 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2391 so may be created multiple times: we use an array of these entries whilst
2392 relaxing which we can refresh easily, then create stubs for each potentially
2393 erratum-triggering instruction once we've settled on a solution. */
2394
2395struct a8_erratum_fix {
2396 bfd *input_bfd;
2397 asection *section;
2398 bfd_vma offset;
2399 bfd_vma addend;
2400 unsigned long orig_insn;
2401 char *stub_name;
2402 enum elf32_arm_stub_type stub_type;
fe33d2fa 2403 int st_type;
48229727
JB		 2404};
2405
2406/* A table of relocs applied to branches which might trigger Cortex-A8
2407 erratum. */
2408
2409struct a8_erratum_reloc {
2410 bfd_vma from;
2411 bfd_vma destination;
92750f34
DJ		 2412 struct elf32_arm_link_hash_entry *hash;
2413 const char *sym_name;
48229727
JB		 2414 unsigned int r_type;
2415 unsigned char st_type;
48229727
JB		 2416 bfd_boolean non_a8_stub;
2417};
2418
ba93b8ac
DJ		 2419/* The size of the thread control block. */
2420#define TCB_SIZE 8
2421
0ffa91dd 2422struct elf_arm_obj_tdata
ba93b8ac
DJ		 2423{
2424 struct elf_obj_tdata root;
2425
2426 /* tls_type for each local got entry. */
2427 char *local_got_tls_type;
ee065d83 2428
bf21ed78
MS		 2429 /* Zero to warn when linking objects with incompatible enum sizes. */
2430 int no_enum_size_warning;
a9dc9481
JM		 2431
2432 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2433 int no_wchar_size_warning;
ba93b8ac
DJ		 2434};
2435
0ffa91dd
NC		 2436#define elf_arm_tdata(bfd) \
2437 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2438
0ffa91dd
NC		 2439#define elf32_arm_local_got_tls_type(bfd) \
2440 (elf_arm_tdata (bfd)->local_got_tls_type)
2441
2442#define is_arm_elf(bfd) \
2443 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2444 && elf_tdata (bfd) != NULL \
4dfe6ac6 2445 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2446
2447static bfd_boolean
2448elf32_arm_mkobject (bfd *abfd)
2449{
0ffa91dd 2450 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2451 ARM_ELF_DATA);
ba93b8ac
DJ		 2452}
2453
ba93b8ac
DJ		 2454#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2455
ba96a88f 2456/* Arm ELF linker hash entry. */
252b5132 2457struct elf32_arm_link_hash_entry
917583ad
NC		 2458 {
2459 struct elf_link_hash_entry root;
252b5132 2460
0bdcacaf
RS		 2461 /* Track dynamic relocs copied for this symbol. */
2462 struct elf_dyn_relocs *dyn_relocs;
b7693d02
DJ		 2463
2464 /* We reference count Thumb references to a PLT entry separately,
2465 so that we can emit the Thumb trampoline only if needed. */
2466 bfd_signed_vma plt_thumb_refcount;
2467
bd97cb95
DJ		 2468 /* Some references from Thumb code may be eliminated by BL->BLX
2469 conversion, so record them separately. */
2470 bfd_signed_vma plt_maybe_thumb_refcount;
2471
b7693d02
DJ		 2472 /* Since PLT entries have variable size if the Thumb prologue is
2473 used, we need to record the index into .got.plt instead of
2474 recomputing it from the PLT offset. */
2475 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2476
2477#define GOT_UNKNOWN 0
2478#define GOT_NORMAL 1
2479#define GOT_TLS_GD 2
2480#define GOT_TLS_IE 4
2481 unsigned char tls_type;
a4fd1a8e
PB		 2482
2483 /* The symbol marking the real symbol location for exported thumb
2484 symbols with Arm stubs. */
2485 struct elf_link_hash_entry *export_glue;
906e58ca 2486
da5938a2 2487 /* A pointer to the most recently used stub hash entry against this
8029a119 2488 symbol. */
da5938a2 2489 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2490 };
252b5132 2491
252b5132 2492/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2493#define elf32_arm_link_hash_traverse(table, func, info) \
2494 (elf_link_hash_traverse \
2495 (&(table)->root, \
b7693d02 2496 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2497 (info)))
2498
2499/* Get the ARM elf linker hash table from a link_info structure. */
2500#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2501 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2502 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2503
906e58ca
NC		 2504#define arm_stub_hash_lookup(table, string, create, copy) \
2505 ((struct elf32_arm_stub_hash_entry *) \
2506 bfd_hash_lookup ((table), (string), (create), (copy)))
2507
21d799b5
NC		 2508/* Array to keep track of which stub sections have been created, and
2509 information on stub grouping. */
2510struct map_stub
2511{
2512 /* This is the section to which stubs in the group will be
2513 attached. */
2514 asection *link_sec;
2515 /* The stub section. */
2516 asection *stub_sec;
2517};
2518
9b485d32 2519/* ARM ELF linker hash table. */
252b5132 2520struct elf32_arm_link_hash_table
906e58ca
NC		 2521{
2522 /* The main hash table. */
2523 struct elf_link_hash_table root;
252b5132 2524
906e58ca
NC		 2525 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2526 bfd_size_type thumb_glue_size;
252b5132 2527
906e58ca
NC		 2528 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2529 bfd_size_type arm_glue_size;
252b5132 2530
906e58ca
NC		 2531 /* The size in bytes of section containing the ARMv4 BX veneers. */
2532 bfd_size_type bx_glue_size;
845b51d6 2533
906e58ca
NC		 2534 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2535 veneer has been populated. */
2536 bfd_vma bx_glue_offset[15];
845b51d6 2537
906e58ca
NC		 2538 /* The size in bytes of the section containing glue for VFP11 erratum
2539 veneers. */
2540 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2541
48229727
JB		 2542 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2543 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2544 elf32_arm_write_section(). */
2545 struct a8_erratum_fix *a8_erratum_fixes;
2546 unsigned int num_a8_erratum_fixes;
2547
906e58ca
NC		 2548 /* An arbitrary input BFD chosen to hold the glue sections. */
2549 bfd * bfd_of_glue_owner;
ba96a88f 2550
906e58ca
NC		 2551 /* Nonzero to output a BE8 image. */
2552 int byteswap_code;
e489d0ae 2553
906e58ca
NC		 2554 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2555 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2556 int target1_is_rel;
9c504268 2557
906e58ca
NC		 2558 /* The relocation to use for R_ARM_TARGET2 relocations. */
2559 int target2_reloc;
eb043451 2560
906e58ca
NC		 2561 /* 0 = Ignore R_ARM_V4BX.
2562 1 = Convert BX to MOV PC.
2563 2 = Generate v4 interworing stubs. */
2564 int fix_v4bx;
319850b4 2565
48229727
JB		 2566 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2567 int fix_cortex_a8;
2568
906e58ca
NC		 2569 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2570 int use_blx;
33bfe774 2571
906e58ca
NC		 2572 /* What sort of code sequences we should look for which may trigger the
2573 VFP11 denorm erratum. */
2574 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2575
906e58ca
NC		 2576 /* Global counter for the number of fixes we have emitted. */
2577 int num_vfp11_fixes;
c7b8f16e 2578
906e58ca
NC		 2579 /* Nonzero to force PIC branch veneers. */
2580 int pic_veneer;
27e55c4d 2581
906e58ca
NC		 2582 /* The number of bytes in the initial entry in the PLT. */
2583 bfd_size_type plt_header_size;
e5a52504 2584
906e58ca
NC		 2585 /* The number of bytes in the subsequent PLT etries. */
2586 bfd_size_type plt_entry_size;
e5a52504 2587
906e58ca
NC		 2588 /* True if the target system is VxWorks. */
2589 int vxworks_p;
00a97672 2590
906e58ca
NC		 2591 /* True if the target system is Symbian OS. */
2592 int symbian_p;
e5a52504 2593
906e58ca
NC		 2594 /* True if the target uses REL relocations. */
2595 int use_rel;
4e7fd91e 2596
906e58ca 2597 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2598 asection *sdynbss;
2599 asection *srelbss;
5e681ec4 2600
906e58ca
NC		 2601 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2602 asection *srelplt2;
00a97672 2603
906e58ca
NC		 2604 /* Data for R_ARM_TLS_LDM32 relocations. */
2605 union
2606 {
2607 bfd_signed_vma refcount;
2608 bfd_vma offset;
2609 } tls_ldm_got;
b7693d02 2610
87d72d41
AM		 2611 /* Small local sym cache. */
2612 struct sym_cache sym_cache;
906e58ca
NC		 2613
2614 /* For convenience in allocate_dynrelocs. */
2615 bfd * obfd;
2616
2617 /* The stub hash table. */
2618 struct bfd_hash_table stub_hash_table;
2619
2620 /* Linker stub bfd. */
2621 bfd *stub_bfd;
2622
2623 /* Linker call-backs. */
2624 asection * (*add_stub_section) (const char *, asection *);
2625 void (*layout_sections_again) (void);
2626
2627 /* Array to keep track of which stub sections have been created, and
2628 information on stub grouping. */
21d799b5 2629 struct map_stub *stub_group;
906e58ca 2630
fe33d2fa
CL		 2631 /* Number of elements in stub_group. */
2632 int top_id;
2633
906e58ca
NC		 2634 /* Assorted information used by elf32_arm_size_stubs. */
2635 unsigned int bfd_count;
2636 int top_index;
2637 asection **input_list;
2638};
252b5132 2639
780a67af
NC		 2640/* Create an entry in an ARM ELF linker hash table. */
2641
2642static struct bfd_hash_entry *
57e8b36a
NC		 2643elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2644 struct bfd_hash_table * table,
2645 const char * string)
780a67af
NC		 2646{
2647 struct elf32_arm_link_hash_entry * ret =
2648 (struct elf32_arm_link_hash_entry *) entry;
2649
2650 /* Allocate the structure if it has not already been allocated by a
2651 subclass. */
906e58ca 2652 if (ret == NULL)
21d799b5
NC		 2653 ret = (struct elf32_arm_link_hash_entry *)
2654 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2655 if (ret == NULL)
780a67af
NC		 2656 return (struct bfd_hash_entry *) ret;
2657
2658 /* Call the allocation method of the superclass. */
2659 ret = ((struct elf32_arm_link_hash_entry *)
2660 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2661 table, string));
57e8b36a 2662 if (ret != NULL)
b7693d02 2663 {
0bdcacaf 2664 ret->dyn_relocs = NULL;
ba93b8ac 2665 ret->tls_type = GOT_UNKNOWN;
b7693d02 2666 ret->plt_thumb_refcount = 0;
bd97cb95 2667 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2668 ret->plt_got_offset = -1;
a4fd1a8e 2669 ret->export_glue = NULL;
906e58ca
NC		 2670
2671 ret->stub_cache = NULL;
b7693d02 2672 }
780a67af
NC		 2673
2674 return (struct bfd_hash_entry *) ret;
2675}
2676
906e58ca
NC		 2677/* Initialize an entry in the stub hash table. */
2678
2679static struct bfd_hash_entry *
2680stub_hash_newfunc (struct bfd_hash_entry *entry,
2681 struct bfd_hash_table *table,
2682 const char *string)
2683{
2684 /* Allocate the structure if it has not already been allocated by a
2685 subclass. */
2686 if (entry == NULL)
2687 {
21d799b5
NC		 2688 entry = (struct bfd_hash_entry *)
2689 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 2690 if (entry == NULL)
2691 return entry;
2692 }
2693
2694 /* Call the allocation method of the superclass. */
2695 entry = bfd_hash_newfunc (entry, table, string);
2696 if (entry != NULL)
2697 {
2698 struct elf32_arm_stub_hash_entry *eh;
2699
2700 /* Initialize the local fields. */
2701 eh = (struct elf32_arm_stub_hash_entry *) entry;
2702 eh->stub_sec = NULL;
2703 eh->stub_offset = 0;
2704 eh->target_value = 0;
2705 eh->target_section = NULL;
cedfb179
DK		 2706 eh->target_addend = 0;
2707 eh->orig_insn = 0;
906e58ca 2708 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2709 eh->stub_size = 0;
2710 eh->stub_template = NULL;
2711 eh->stub_template_size = 0;
906e58ca
NC		 2712 eh->h = NULL;
2713 eh->id_sec = NULL;
d8d2f433 2714 eh->output_name = NULL;
906e58ca
NC		 2715 }
2716
2717 return entry;
2718}
2719
00a97672 2720/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2721 shortcuts to them in our hash table. */
2722
2723static bfd_boolean
57e8b36a 2724create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2725{
2726 struct elf32_arm_link_hash_table *htab;
2727
e5a52504 2728 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2729 if (htab == NULL)
2730 return FALSE;
2731
e5a52504
MM		 2732 /* BPABI objects never have a GOT, or associated sections. */
2733 if (htab->symbian_p)
2734 return TRUE;
2735
5e681ec4
PB		 2736 if (! _bfd_elf_create_got_section (dynobj, info))
2737 return FALSE;
2738
5e681ec4
PB		 2739 return TRUE;
2740}
2741
00a97672
RS		 2742/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2743 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2744 hash table. */
2745
2746static bfd_boolean
57e8b36a 2747elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2748{
2749 struct elf32_arm_link_hash_table *htab;
2750
2751 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2752 if (htab == NULL)
2753 return FALSE;
2754
362d30a1 2755 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 2756 return FALSE;
2757
2758 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2759 return FALSE;
2760
5e681ec4
PB		 2761 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2762 if (!info->shared)
00a97672
RS		 2763 htab->srelbss = bfd_get_section_by_name (dynobj,
2764 RELOC_SECTION (htab, ".bss"));
2765
2766 if (htab->vxworks_p)
2767 {
2768 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2769 return FALSE;
2770
2771 if (info->shared)
2772 {
2773 htab->plt_header_size = 0;
2774 htab->plt_entry_size
2775 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2776 }
2777 else
2778 {
2779 htab->plt_header_size
2780 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2781 htab->plt_entry_size
2782 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2783 }
2784 }
5e681ec4 2785
362d30a1
RS		 2786 if (!htab->root.splt
2787 || !htab->root.srelplt
e5a52504 2788 || !htab->sdynbss
5e681ec4
PB		 2789 || (!info->shared && !htab->srelbss))
2790 abort ();
2791
2792 return TRUE;
2793}
2794
906e58ca
NC		 2795/* Copy the extra info we tack onto an elf_link_hash_entry. */
2796
2797static void
2798elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2799 struct elf_link_hash_entry *dir,
2800 struct elf_link_hash_entry *ind)
2801{
2802 struct elf32_arm_link_hash_entry *edir, *eind;
2803
2804 edir = (struct elf32_arm_link_hash_entry *) dir;
2805 eind = (struct elf32_arm_link_hash_entry *) ind;
2806
0bdcacaf 2807 if (eind->dyn_relocs != NULL)
906e58ca 2808 {
0bdcacaf 2809 if (edir->dyn_relocs != NULL)
906e58ca 2810 {
0bdcacaf
RS		 2811 struct elf_dyn_relocs **pp;
2812 struct elf_dyn_relocs *p;
906e58ca
NC		 2813
2814 /* Add reloc counts against the indirect sym to the direct sym
2815 list. Merge any entries against the same section. */
0bdcacaf 2816 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 2817 {
0bdcacaf 2818 struct elf_dyn_relocs *q;
906e58ca 2819
0bdcacaf
RS		 2820 for (q = edir->dyn_relocs; q != NULL; q = q->next)
2821 if (q->sec == p->sec)
906e58ca
NC		 2822 {
2823 q->pc_count += p->pc_count;
2824 q->count += p->count;
2825 *pp = p->next;
2826 break;
2827 }
2828 if (q == NULL)
2829 pp = &p->next;
2830 }
0bdcacaf 2831 *pp = edir->dyn_relocs;
906e58ca
NC		 2832 }
2833
0bdcacaf
RS		 2834 edir->dyn_relocs = eind->dyn_relocs;
2835 eind->dyn_relocs = NULL;
906e58ca
NC		 2836 }
2837
2838 if (ind->root.type == bfd_link_hash_indirect)
2839 {
2840 /* Copy over PLT info. */
2841 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2842 eind->plt_thumb_refcount = 0;
2843 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2844 eind->plt_maybe_thumb_refcount = 0;
2845
2846 if (dir->got.refcount <= 0)
2847 {
2848 edir->tls_type = eind->tls_type;
2849 eind->tls_type = GOT_UNKNOWN;
2850 }
2851 }
2852
2853 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2854}
2855
2856/* Create an ARM elf linker hash table. */
2857
2858static struct bfd_link_hash_table *
2859elf32_arm_link_hash_table_create (bfd *abfd)
2860{
2861 struct elf32_arm_link_hash_table *ret;
2862 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2863
21d799b5 2864 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 2865 if (ret == NULL)
2866 return NULL;
2867
2868 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2869 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 2870 sizeof (struct elf32_arm_link_hash_entry),
2871 ARM_ELF_DATA))
906e58ca
NC		 2872 {
2873 free (ret);
2874 return NULL;
2875 }
2876
906e58ca
NC		 2877 ret->sdynbss = NULL;
2878 ret->srelbss = NULL;
2879 ret->srelplt2 = NULL;
2880 ret->thumb_glue_size = 0;
2881 ret->arm_glue_size = 0;
2882 ret->bx_glue_size = 0;
2883 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2884 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2885 ret->vfp11_erratum_glue_size = 0;
2886 ret->num_vfp11_fixes = 0;
48229727 2887 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2888 ret->bfd_of_glue_owner = NULL;
2889 ret->byteswap_code = 0;
2890 ret->target1_is_rel = 0;
2891 ret->target2_reloc = R_ARM_NONE;
2892#ifdef FOUR_WORD_PLT
2893 ret->plt_header_size = 16;
2894 ret->plt_entry_size = 16;
2895#else
2896 ret->plt_header_size = 20;
2897 ret->plt_entry_size = 12;
2898#endif
2899 ret->fix_v4bx = 0;
2900 ret->use_blx = 0;
2901 ret->vxworks_p = 0;
2902 ret->symbian_p = 0;
2903 ret->use_rel = 1;
87d72d41 2904 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2905 ret->obfd = abfd;
2906 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2907 ret->stub_bfd = NULL;
2908 ret->add_stub_section = NULL;
2909 ret->layout_sections_again = NULL;
2910 ret->stub_group = NULL;
fe33d2fa 2911 ret->top_id = 0;
6cee0a6f
L		 2912 ret->bfd_count = 0;
2913 ret->top_index = 0;
2914 ret->input_list = NULL;
906e58ca
NC		 2915
2916 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2917 sizeof (struct elf32_arm_stub_hash_entry)))
2918 {
2919 free (ret);
2920 return NULL;
2921 }
2922
2923 return &ret->root.root;
2924}
2925
2926/* Free the derived linker hash table. */
2927
2928static void
2929elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2930{
2931 struct elf32_arm_link_hash_table *ret
2932 = (struct elf32_arm_link_hash_table *) hash;
2933
2934 bfd_hash_table_free (&ret->stub_hash_table);
2935 _bfd_generic_link_hash_table_free (hash);
2936}
2937
2938/* Determine if we're dealing with a Thumb only architecture. */
2939
2940static bfd_boolean
2941using_thumb_only (struct elf32_arm_link_hash_table *globals)
2942{
2943 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2944 Tag_CPU_arch);
2945 int profile;
2946
41ed1ee7
DJ		 2947 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
2948 return TRUE;
2949
9e3c6df6 2950 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 2951 return FALSE;
2952
2953 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2954 Tag_CPU_arch_profile);
2955
2956 return profile == 'M';
2957}
2958
2959/* Determine if we're dealing with a Thumb-2 object. */
2960
2961static bfd_boolean
2962using_thumb2 (struct elf32_arm_link_hash_table *globals)
2963{
2964 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2965 Tag_CPU_arch);
2966 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2967}
2968
cd1dac3d
DG		 2969/* Determine what kind of NOPs are available. */
2970
2971static bfd_boolean
2972arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
2973{
2974 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2975 Tag_CPU_arch);
2976 return arch == TAG_CPU_ARCH_V6T2
2977 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 2978 || arch == TAG_CPU_ARCH_V7
2979 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 2980}
2981
2982static bfd_boolean
2983arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
2984{
2985 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2986 Tag_CPU_arch);
9e3c6df6
PB		 2987 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
2988 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 2989}
2990
f4ac8484
DJ		 2991static bfd_boolean
2992arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
2993{
2994 switch (stub_type)
2995 {
fea2b4d6
CL		 2996 case arm_stub_long_branch_thumb_only:
2997 case arm_stub_long_branch_v4t_thumb_arm:
2998 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 2999 case arm_stub_long_branch_v4t_thumb_arm_pic:
3000 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3001 return TRUE;
3002 case arm_stub_none:
3003 BFD_FAIL ();
3004 return FALSE;
3005 break;
3006 default:
3007 return FALSE;
3008 }
3009}
3010
906e58ca
NC		 3011/* Determine the type of stub needed, if any, for a call. */
3012
3013static enum elf32_arm_stub_type
3014arm_type_of_stub (struct bfd_link_info *info,
3015 asection *input_sec,
3016 const Elf_Internal_Rela *rel,
fe33d2fa 3017 int *actual_st_type,
906e58ca 3018 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3019 bfd_vma destination,
3020 asection *sym_sec,
3021 bfd *input_bfd,
3022 const char *name)
906e58ca
NC		 3023{
3024 bfd_vma location;
3025 bfd_signed_vma branch_offset;
3026 unsigned int r_type;
3027 struct elf32_arm_link_hash_table * globals;
3028 int thumb2;
3029 int thumb_only;
3030 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3031 int use_plt = 0;
fe33d2fa 3032 int st_type = *actual_st_type;
906e58ca 3033
da5938a2 3034 /* We don't know the actual type of destination in case it is of
8029a119 3035 type STT_SECTION: give up. */
da5938a2
NC		 3036 if (st_type == STT_SECTION)
3037 return stub_type;
3038
906e58ca 3039 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3040 if (globals == NULL)
3041 return stub_type;
906e58ca
NC		 3042
3043 thumb_only = using_thumb_only (globals);
3044
3045 thumb2 = using_thumb2 (globals);
3046
3047 /* Determine where the call point is. */
3048 location = (input_sec->output_offset
3049 + input_sec->output_section->vma
3050 + rel->r_offset);
3051
906e58ca
NC		 3052 r_type = ELF32_R_TYPE (rel->r_info);
3053
5fa9e92f 3054 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 3055 if (globals->root.splt != NULL
fe33d2fa
CL		 3056 && hash != NULL
3057 && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3058 {
3059 use_plt = 1;
fe33d2fa 3060
5fa9e92f
CL		 3061 /* Note when dealing with PLT entries: the main PLT stub is in
3062 ARM mode, so if the branch is in Thumb mode, another
3063 Thumb->ARM stub will be inserted later just before the ARM
3064 PLT stub. We don't take this extra distance into account
3065 here, because if a long branch stub is needed, we'll add a
3066 Thumb->Arm one and branch directly to the ARM PLT entry
3067 because it avoids spreading offset corrections in several
3068 places. */
fe33d2fa 3069
362d30a1
RS		 3070 destination = (globals->root.splt->output_section->vma
3071 + globals->root.splt->output_offset
fe33d2fa
CL		 3072 + hash->root.plt.offset);
3073 st_type = STT_FUNC;
5fa9e92f 3074 }
906e58ca 3075
fe33d2fa
CL		 3076 branch_offset = (bfd_signed_vma)(destination - location);
3077
155d87d7 3078 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3079 {
5fa9e92f
CL		 3080 /* Handle cases where:
3081 - this call goes too far (different Thumb/Thumb2 max
3082 distance)
155d87d7
CL		 3083 - it's a Thumb->Arm call and blx is not available, or it's a
3084 Thumb->Arm branch (not bl). A stub is needed in this case,
3085 but only if this call is not through a PLT entry. Indeed,
3086 PLT stubs handle mode switching already.
5fa9e92f 3087 */
906e58ca
NC		 3088 if ((!thumb2
3089 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3090 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3091 || (thumb2
3092 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3093 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3094 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3095 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3096 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3097 && !use_plt))
906e58ca
NC		 3098 {
3099 if (st_type == STT_ARM_TFUNC)
3100 {
3101 /* Thumb to thumb. */
3102 if (!thumb_only)
3103 {
3104 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3105 /* PIC stubs. */
155d87d7
CL		 3106 ? ((globals->use_blx
3107 && (r_type ==R_ARM_THM_CALL))
3108 /* V5T and above. Stub starts with ARM code, so
3109 we must be able to switch mode before
3110 reaching it, which is only possible for 'bl'
3111 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3112 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3113 /* On V4T, use Thumb code only. */
d3626fb0 3114 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3115
3116 /* non-PIC stubs. */
155d87d7
CL		 3117 : ((globals->use_blx
3118 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3119 /* V5T and above. */
3120 ? arm_stub_long_branch_any_any
3121 /* V4T. */
d3626fb0 3122 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3123 }
3124 else
3125 {
3126 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3127 /* PIC stub. */
3128 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3129 /* non-PIC stub. */
3130 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3131 }
3132 }
3133 else
3134 {
3135 /* Thumb to arm. */
c820be07
NC		 3136 if (sym_sec != NULL
3137 && sym_sec->owner != NULL
3138 && !INTERWORK_FLAG (sym_sec->owner))
3139 {
3140 (*_bfd_error_handler)
3141 (_("%B(%s): warning: interworking not enabled.\n"
3142 " first occurrence: %B: Thumb call to ARM"),
3143 sym_sec->owner, input_bfd, name);
3144 }
3145
906e58ca 3146 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3147 /* PIC stubs. */
155d87d7
CL		 3148 ? ((globals->use_blx
3149 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3150 /* V5T and above. */
cf3eccff 3151 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3152 /* V4T PIC stub. */
3153 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3154
3155 /* non-PIC stubs. */
155d87d7
CL		 3156 : ((globals->use_blx
3157 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3158 /* V5T and above. */
3159 ? arm_stub_long_branch_any_any
3160 /* V4T. */
3161 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3162
3163 /* Handle v4t short branches. */
fea2b4d6 3164 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3165 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3166 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3167 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3168 }
3169 }
3170 }
fe33d2fa
CL		 3171 else if (r_type == R_ARM_CALL
3172 || r_type == R_ARM_JUMP24
3173 || r_type == R_ARM_PLT32)
906e58ca
NC		 3174 {
3175 if (st_type == STT_ARM_TFUNC)
3176 {
3177 /* Arm to thumb. */
c820be07
NC		 3178
3179 if (sym_sec != NULL
3180 && sym_sec->owner != NULL
3181 && !INTERWORK_FLAG (sym_sec->owner))
3182 {
3183 (*_bfd_error_handler)
3184 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3185 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3186 sym_sec->owner, input_bfd, name);
3187 }
3188
3189 /* We have an extra 2-bytes reach because of
3190 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3191 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3192 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3193 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3194 || (r_type == R_ARM_JUMP24)
3195 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3196 {
3197 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3198 /* PIC stubs. */
ebe24dd4
CL		 3199 ? ((globals->use_blx)
3200 /* V5T and above. */
3201 ? arm_stub_long_branch_any_thumb_pic
3202 /* V4T stub. */
3203 : arm_stub_long_branch_v4t_arm_thumb_pic)
3204
c2b4a39d
CL		 3205 /* non-PIC stubs. */
3206 : ((globals->use_blx)
3207 /* V5T and above. */
3208 ? arm_stub_long_branch_any_any
3209 /* V4T. */
3210 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3211 }
3212 }
3213 else
3214 {
3215 /* Arm to arm. */
3216 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3217 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3218 {
3219 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3220 /* PIC stubs. */
cf3eccff 3221 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3222 /* non-PIC stubs. */
fea2b4d6 3223 : arm_stub_long_branch_any_any;
906e58ca
NC		 3224 }
3225 }
3226 }
3227
fe33d2fa
CL		 3228 /* If a stub is needed, record the actual destination type. */
3229 if (stub_type != arm_stub_none)
9ae92b05 3230 *actual_st_type = st_type;
fe33d2fa 3231
906e58ca
NC		 3232 return stub_type;
3233}
3234
3235/* Build a name for an entry in the stub hash table. */
3236
3237static char *
3238elf32_arm_stub_name (const asection *input_section,
3239 const asection *sym_sec,
3240 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3241 const Elf_Internal_Rela *rel,
3242 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3243{
3244 char *stub_name;
3245 bfd_size_type len;
3246
3247 if (hash)
3248 {
fe33d2fa 3249 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3250 stub_name = (char *) bfd_malloc (len);
906e58ca 3251 if (stub_name != NULL)
fe33d2fa 3252 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3253 input_section->id & 0xffffffff,
3254 hash->root.root.root.string,
fe33d2fa
CL		 3255 (int) rel->r_addend & 0xffffffff,
3256 (int) stub_type);
906e58ca
NC		 3257 }
3258 else
3259 {
fe33d2fa 3260 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3261 stub_name = (char *) bfd_malloc (len);
906e58ca 3262 if (stub_name != NULL)
fe33d2fa 3263 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3264 input_section->id & 0xffffffff,
3265 sym_sec->id & 0xffffffff,
3266 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3267 (int) rel->r_addend & 0xffffffff,
3268 (int) stub_type);
906e58ca
NC		 3269 }
3270
3271 return stub_name;
3272}
3273
3274/* Look up an entry in the stub hash. Stub entries are cached because
3275 creating the stub name takes a bit of time. */
3276
3277static struct elf32_arm_stub_hash_entry *
3278elf32_arm_get_stub_entry (const asection *input_section,
3279 const asection *sym_sec,
3280 struct elf_link_hash_entry *hash,
3281 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3282 struct elf32_arm_link_hash_table *htab,
3283 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3284{
3285 struct elf32_arm_stub_hash_entry *stub_entry;
3286 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3287 const asection *id_sec;
3288
3289 if ((input_section->flags & SEC_CODE) == 0)
3290 return NULL;
3291
3292 /* If this input section is part of a group of sections sharing one
3293 stub section, then use the id of the first section in the group.
3294 Stub names need to include a section id, as there may well be
3295 more than one stub used to reach say, printf, and we need to
3296 distinguish between them. */
3297 id_sec = htab->stub_group[input_section->id].link_sec;
3298
3299 if (h != NULL && h->stub_cache != NULL
3300 && h->stub_cache->h == h
fe33d2fa
CL		 3301 && h->stub_cache->id_sec == id_sec
3302 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3303 {
3304 stub_entry = h->stub_cache;
3305 }
3306 else
3307 {
3308 char *stub_name;
3309
fe33d2fa 3310 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3311 if (stub_name == NULL)
3312 return NULL;
3313
3314 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3315 stub_name, FALSE, FALSE);
3316 if (h != NULL)
3317 h->stub_cache = stub_entry;
3318
3319 free (stub_name);
3320 }
3321
3322 return stub_entry;
3323}
3324
48229727
JB		 3325/* Find or create a stub section. Returns a pointer to the stub section, and
3326 the section to which the stub section will be attached (in *LINK_SEC_P).
3327 LINK_SEC_P may be NULL. */
906e58ca 3328
48229727
JB		 3329static asection *
3330elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3331 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3332{
3333 asection *link_sec;
3334 asection *stub_sec;
906e58ca
NC		 3335
3336 link_sec = htab->stub_group[section->id].link_sec;
3337 stub_sec = htab->stub_group[section->id].stub_sec;
3338 if (stub_sec == NULL)
3339 {
3340 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3341 if (stub_sec == NULL)
3342 {
3343 size_t namelen;
3344 bfd_size_type len;
3345 char *s_name;
3346
3347 namelen = strlen (link_sec->name);
3348 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3349 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3350 if (s_name == NULL)
3351 return NULL;
3352
3353 memcpy (s_name, link_sec->name, namelen);
3354 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3355 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3356 if (stub_sec == NULL)
3357 return NULL;
3358 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3359 }
3360 htab->stub_group[section->id].stub_sec = stub_sec;
3361 }
48229727
JB		 3362
3363 if (link_sec_p)
3364 *link_sec_p = link_sec;
3365
3366 return stub_sec;
3367}
3368
3369/* Add a new stub entry to the stub hash. Not all fields of the new
3370 stub entry are initialised. */
3371
3372static struct elf32_arm_stub_hash_entry *
3373elf32_arm_add_stub (const char *stub_name,
3374 asection *section,
3375 struct elf32_arm_link_hash_table *htab)
3376{
3377 asection *link_sec;
3378 asection *stub_sec;
3379 struct elf32_arm_stub_hash_entry *stub_entry;
3380
3381 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3382 if (stub_sec == NULL)
3383 return NULL;
906e58ca
NC		 3384
3385 /* Enter this entry into the linker stub hash table. */
3386 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3387 TRUE, FALSE);
3388 if (stub_entry == NULL)
3389 {
3390 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3391 section->owner,
3392 stub_name);
3393 return NULL;
3394 }
3395
3396 stub_entry->stub_sec = stub_sec;
3397 stub_entry->stub_offset = 0;
3398 stub_entry->id_sec = link_sec;
3399
906e58ca
NC		 3400 return stub_entry;
3401}
3402
3403/* Store an Arm insn into an output section not processed by
3404 elf32_arm_write_section. */
3405
3406static void
8029a119
NC		 3407put_arm_insn (struct elf32_arm_link_hash_table * htab,
3408 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3409{
3410 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3411 bfd_putl32 (val, ptr);
3412 else
3413 bfd_putb32 (val, ptr);
3414}
3415
3416/* Store a 16-bit Thumb insn into an output section not processed by
3417 elf32_arm_write_section. */
3418
3419static void
8029a119
NC		 3420put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3421 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3422{
3423 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3424 bfd_putl16 (val, ptr);
3425 else
3426 bfd_putb16 (val, ptr);
3427}
3428
48229727
JB		 3429static bfd_reloc_status_type elf32_arm_final_link_relocate
3430 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3431 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3432 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3433
4563a860
JB		 3434static unsigned int
3435arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
3436{
3437 switch (stub_type)
3438 {
3439 case arm_stub_a8_veneer_b_cond:
3440 case arm_stub_a8_veneer_b:
3441 case arm_stub_a8_veneer_bl:
3442 return 2;
3443
3444 case arm_stub_long_branch_any_any:
3445 case arm_stub_long_branch_v4t_arm_thumb:
3446 case arm_stub_long_branch_thumb_only:
3447 case arm_stub_long_branch_v4t_thumb_thumb:
3448 case arm_stub_long_branch_v4t_thumb_arm:
3449 case arm_stub_short_branch_v4t_thumb_arm:
3450 case arm_stub_long_branch_any_arm_pic:
3451 case arm_stub_long_branch_any_thumb_pic:
3452 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3453 case arm_stub_long_branch_v4t_arm_thumb_pic:
3454 case arm_stub_long_branch_v4t_thumb_arm_pic:
3455 case arm_stub_long_branch_thumb_only_pic:
3456 case arm_stub_a8_veneer_blx:
3457 return 4;
3458
3459 default:
3460 abort (); /* Should be unreachable. */
3461 }
3462}
3463
906e58ca
NC		 3464static bfd_boolean
3465arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3466 void * in_arg)
3467{
48229727 3468#define MAXRELOCS 2
906e58ca 3469 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3470 struct elf32_arm_link_hash_table *globals;
906e58ca 3471 struct bfd_link_info *info;
906e58ca
NC		 3472 asection *stub_sec;
3473 bfd *stub_bfd;
906e58ca
NC		 3474 bfd_byte *loc;
3475 bfd_vma sym_value;
3476 int template_size;
3477 int size;
d3ce72d0 3478 const insn_sequence *template_sequence;
906e58ca 3479 int i;
48229727
JB		 3480 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3481 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3482 int nrelocs = 0;
906e58ca
NC		 3483
3484 /* Massage our args to the form they really have. */
3485 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3486 info = (struct bfd_link_info *) in_arg;
3487
3488 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3489 if (globals == NULL)
3490 return FALSE;
906e58ca 3491
906e58ca
NC		 3492 stub_sec = stub_entry->stub_sec;
3493
4dfe6ac6 3494 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 3495 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
3496 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 3497 return TRUE;
fe33d2fa 3498
906e58ca
NC		 3499 /* Make a note of the offset within the stubs for this entry. */
3500 stub_entry->stub_offset = stub_sec->size;
3501 loc = stub_sec->contents + stub_entry->stub_offset;
3502
3503 stub_bfd = stub_sec->owner;
3504
906e58ca
NC		 3505 /* This is the address of the stub destination. */
3506 sym_value = (stub_entry->target_value
3507 + stub_entry->target_section->output_offset
3508 + stub_entry->target_section->output_section->vma);
3509
d3ce72d0 3510 template_sequence = stub_entry->stub_template;
461a49ca 3511 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3512
3513 size = 0;
461a49ca 3514 for (i = 0; i < template_size; i++)
906e58ca 3515 {
d3ce72d0 3516 switch (template_sequence[i].type)
461a49ca
DJ		 3517 {
3518 case THUMB16_TYPE:
48229727 3519 {
d3ce72d0
NC		 3520 bfd_vma data = (bfd_vma) template_sequence[i].data;
3521 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 3522 {
3523 /* We've borrowed the reloc_addend field to mean we should
3524 insert a condition code into this (Thumb-1 branch)
3525 instruction. See THUMB16_BCOND_INSN. */
3526 BFD_ASSERT ((data & 0xff00) == 0xd000);
3527 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3528 }
fe33d2fa 3529 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 3530 size += 2;
3531 }
461a49ca 3532 break;
906e58ca 3533
48229727 3534 case THUMB32_TYPE:
fe33d2fa
CL		 3535 bfd_put_16 (stub_bfd,
3536 (template_sequence[i].data >> 16) & 0xffff,
3537 loc + size);
3538 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
3539 loc + size + 2);
d3ce72d0 3540 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 3541 {
3542 stub_reloc_idx[nrelocs] = i;
3543 stub_reloc_offset[nrelocs++] = size;
3544 }
3545 size += 4;
3546 break;
3547
461a49ca 3548 case ARM_TYPE:
fe33d2fa
CL		 3549 bfd_put_32 (stub_bfd, template_sequence[i].data,
3550 loc + size);
461a49ca
DJ		 3551 /* Handle cases where the target is encoded within the
3552 instruction. */
d3ce72d0 3553 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 3554 {
48229727
JB		 3555 stub_reloc_idx[nrelocs] = i;
3556 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3557 }
3558 size += 4;
3559 break;
3560
3561 case DATA_TYPE:
d3ce72d0 3562 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 3563 stub_reloc_idx[nrelocs] = i;
3564 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3565 size += 4;
3566 break;
3567
3568 default:
3569 BFD_FAIL ();
3570 return FALSE;
3571 }
906e58ca 3572 }
461a49ca 3573
906e58ca
NC		 3574 stub_sec->size += size;
3575
461a49ca
DJ		 3576 /* Stub size has already been computed in arm_size_one_stub. Check
3577 consistency. */
3578 BFD_ASSERT (size == stub_entry->stub_size);
3579
906e58ca
NC		 3580 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3581 if (stub_entry->st_type == STT_ARM_TFUNC)
3582 sym_value |= 1;
3583
48229727
JB		 3584 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3585 in each stub. */
3586 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3587
48229727 3588 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 3589 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3590 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3591 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3592 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 3593 {
3594 Elf_Internal_Rela rel;
3595 bfd_boolean unresolved_reloc;
3596 char *error_message;
3597 int sym_flags
d3ce72d0 3598 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
48229727
JB		 3599 ? STT_ARM_TFUNC : 0;
3600 bfd_vma points_to = sym_value + stub_entry->target_addend;
3601
3602 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 3603 rel.r_info = ELF32_R_INFO (0,
3604 template_sequence[stub_reloc_idx[i]].r_type);
3605 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 3606
3607 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3608 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3609 template should refer back to the instruction after the original
3610 branch. */
3611 points_to = sym_value;
3612
33c6a8fc
JB		 3613 /* There may be unintended consequences if this is not true. */
3614 BFD_ASSERT (stub_entry->h == NULL);
3615
48229727
JB		 3616 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3617 properly. We should probably use this function unconditionally,
3618 rather than only for certain relocations listed in the enclosing
3619 conditional, for the sake of consistency. */
3620 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3621 (template_sequence[stub_reloc_idx[i]].r_type),
48229727
JB		 3622 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3623 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3624 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3625 &error_message);
3626 }
3627 else
3628 {
fe33d2fa
CL		 3629 Elf_Internal_Rela rel;
3630 bfd_boolean unresolved_reloc;
3631 char *error_message;
3632 bfd_vma points_to = sym_value + stub_entry->target_addend
3633 + template_sequence[stub_reloc_idx[i]].reloc_addend;
3634
3635 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3636 rel.r_info = ELF32_R_INFO (0,
3637 template_sequence[stub_reloc_idx[i]].r_type);
3638 rel.r_addend = 0;
3639
3640 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3641 (template_sequence[stub_reloc_idx[i]].r_type),
3642 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3643 points_to, info, stub_entry->target_section, "", stub_entry->st_type,
3644 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3645 &error_message);
48229727 3646 }
906e58ca
NC		 3647
3648 return TRUE;
48229727 3649#undef MAXRELOCS
906e58ca
NC		 3650}
3651
48229727
JB		 3652/* Calculate the template, template size and instruction size for a stub.
3653 Return value is the instruction size. */
906e58ca 3654
48229727
JB		 3655static unsigned int
3656find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3657 const insn_sequence **stub_template,
3658 int *stub_template_size)
906e58ca 3659{
d3ce72d0 3660 const insn_sequence *template_sequence = NULL;
48229727
JB		 3661 int template_size = 0, i;
3662 unsigned int size;
906e58ca 3663
d3ce72d0 3664 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 3665 if (stub_template)
3666 *stub_template = template_sequence;
3667
48229727 3668 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 3669 if (stub_template_size)
3670 *stub_template_size = template_size;
906e58ca
NC		 3671
3672 size = 0;
461a49ca
DJ		 3673 for (i = 0; i < template_size; i++)
3674 {
d3ce72d0 3675 switch (template_sequence[i].type)
461a49ca
DJ		 3676 {
3677 case THUMB16_TYPE:
3678 size += 2;
3679 break;
3680
3681 case ARM_TYPE:
48229727 3682 case THUMB32_TYPE:
461a49ca
DJ		 3683 case DATA_TYPE:
3684 size += 4;
3685 break;
3686
3687 default:
3688 BFD_FAIL ();
2a229407 3689 return 0;
461a49ca
DJ		 3690 }
3691 }
3692
48229727
JB		 3693 return size;
3694}
3695
3696/* As above, but don't actually build the stub. Just bump offset so
3697 we know stub section sizes. */
3698
3699static bfd_boolean
3700arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 3701 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 3702{
3703 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 3704 const insn_sequence *template_sequence;
48229727
JB		 3705 int template_size, size;
3706
3707 /* Massage our args to the form they really have. */
3708 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 3709
3710 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3711 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3712
d3ce72d0 3713 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 3714 &template_size);
3715
461a49ca 3716 stub_entry->stub_size = size;
d3ce72d0 3717 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 3718 stub_entry->stub_template_size = template_size;
3719
906e58ca
NC		 3720 size = (size + 7) & ~7;
3721 stub_entry->stub_sec->size += size;
461a49ca 3722
906e58ca
NC		 3723 return TRUE;
3724}
3725
3726/* External entry points for sizing and building linker stubs. */
3727
3728/* Set up various things so that we can make a list of input sections
3729 for each output section included in the link. Returns -1 on error,
3730 0 when no stubs will be needed, and 1 on success. */
3731
3732int
3733elf32_arm_setup_section_lists (bfd *output_bfd,
3734 struct bfd_link_info *info)
3735{
3736 bfd *input_bfd;
3737 unsigned int bfd_count;
3738 int top_id, top_index;
3739 asection *section;
3740 asection **input_list, **list;
3741 bfd_size_type amt;
3742 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3743
4dfe6ac6
NC		 3744 if (htab == NULL)
3745 return 0;
906e58ca
NC		 3746 if (! is_elf_hash_table (htab))
3747 return 0;
3748
3749 /* Count the number of input BFDs and find the top input section id. */
3750 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3751 input_bfd != NULL;
3752 input_bfd = input_bfd->link_next)
3753 {
3754 bfd_count += 1;
3755 for (section = input_bfd->sections;
3756 section != NULL;
3757 section = section->next)
3758 {
3759 if (top_id < section->id)
3760 top_id = section->id;
3761 }
3762 }
3763 htab->bfd_count = bfd_count;
3764
3765 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 3766 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 3767 if (htab->stub_group == NULL)
3768 return -1;
fe33d2fa 3769 htab->top_id = top_id;
906e58ca
NC		 3770
3771 /* We can't use output_bfd->section_count here to find the top output
3772 section index as some sections may have been removed, and
3773 _bfd_strip_section_from_output doesn't renumber the indices. */
3774 for (section = output_bfd->sections, top_index = 0;
3775 section != NULL;
3776 section = section->next)
3777 {
3778 if (top_index < section->index)
3779 top_index = section->index;
3780 }
3781
3782 htab->top_index = top_index;
3783 amt = sizeof (asection *) * (top_index + 1);
21d799b5 3784 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 3785 htab->input_list = input_list;
3786 if (input_list == NULL)
3787 return -1;
3788
3789 /* For sections we aren't interested in, mark their entries with a
3790 value we can check later. */
3791 list = input_list + top_index;
3792 do
3793 *list = bfd_abs_section_ptr;
3794 while (list-- != input_list);
3795
3796 for (section = output_bfd->sections;
3797 section != NULL;
3798 section = section->next)
3799 {
3800 if ((section->flags & SEC_CODE) != 0)
3801 input_list[section->index] = NULL;
3802 }
3803
3804 return 1;
3805}
3806
3807/* The linker repeatedly calls this function for each input section,
3808 in the order that input sections are linked into output sections.
3809 Build lists of input sections to determine groupings between which
3810 we may insert linker stubs. */
3811
3812void
3813elf32_arm_next_input_section (struct bfd_link_info *info,
3814 asection *isec)
3815{
3816 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3817
4dfe6ac6
NC		 3818 if (htab == NULL)
3819 return;
3820
906e58ca
NC		 3821 if (isec->output_section->index <= htab->top_index)
3822 {
3823 asection **list = htab->input_list + isec->output_section->index;
3824
a7470592 3825 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 3826 {
3827 /* Steal the link_sec pointer for our list. */
3828#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3829 /* This happens to make the list in reverse order,
07d72278 3830 which we reverse later. */
906e58ca
NC		 3831 PREV_SEC (isec) = *list;
3832 *list = isec;
3833 }
3834 }
3835}
3836
3837/* See whether we can group stub sections together. Grouping stub
3838 sections may result in fewer stubs. More importantly, we need to
07d72278 3839 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3840 .fini output sections respectively, because glibc splits the
3841 _init and _fini functions into multiple parts. Putting a stub in
3842 the middle of a function is not a good idea. */
3843
3844static void
3845group_sections (struct elf32_arm_link_hash_table *htab,
3846 bfd_size_type stub_group_size,
07d72278 3847 bfd_boolean stubs_always_after_branch)
906e58ca 3848{
07d72278 3849 asection **list = htab->input_list;
906e58ca
NC		 3850
3851 do
3852 {
3853 asection *tail = *list;
07d72278 3854 asection *head;
906e58ca
NC		 3855
3856 if (tail == bfd_abs_section_ptr)
3857 continue;
3858
07d72278
DJ		 3859 /* Reverse the list: we must avoid placing stubs at the
3860 beginning of the section because the beginning of the text
3861 section may be required for an interrupt vector in bare metal
3862 code. */
3863#define NEXT_SEC PREV_SEC
e780aef2
CL		 3864 head = NULL;
3865 while (tail != NULL)
3866 {
3867 /* Pop from tail. */
3868 asection *item = tail;
3869 tail = PREV_SEC (item);
3870
3871 /* Push on head. */
3872 NEXT_SEC (item) = head;
3873 head = item;
3874 }
07d72278
DJ		 3875
3876 while (head != NULL)
906e58ca
NC		 3877 {
3878 asection *curr;
07d72278 3879 asection *next;
e780aef2
CL		 3880 bfd_vma stub_group_start = head->output_offset;
3881 bfd_vma end_of_next;
906e58ca 3882
07d72278 3883 curr = head;
e780aef2 3884 while (NEXT_SEC (curr) != NULL)
8cd931b7 3885 {
e780aef2
CL		 3886 next = NEXT_SEC (curr);
3887 end_of_next = next->output_offset + next->size;
3888 if (end_of_next - stub_group_start >= stub_group_size)
3889 /* End of NEXT is too far from start, so stop. */
8cd931b7 3890 break;
e780aef2
CL		 3891 /* Add NEXT to the group. */
3892 curr = next;
8cd931b7 3893 }
906e58ca 3894
07d72278 3895 /* OK, the size from the start to the start of CURR is less
906e58ca 3896 than stub_group_size and thus can be handled by one stub
07d72278 3897 section. (Or the head section is itself larger than
906e58ca
NC		 3898 stub_group_size, in which case we may be toast.)
3899 We should really be keeping track of the total size of
3900 stubs added here, as stubs contribute to the final output
7fb9f789 3901 section size. */
906e58ca
NC		 3902 do
3903 {
07d72278 3904 next = NEXT_SEC (head);
906e58ca 3905 /* Set up this stub group. */
07d72278 3906 htab->stub_group[head->id].link_sec = curr;
906e58ca 3907 }
07d72278 3908 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3909
3910 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3911 bytes after the stub section can be handled by it too. */
3912 if (!stubs_always_after_branch)
906e58ca 3913 {
e780aef2
CL		 3914 stub_group_start = curr->output_offset + curr->size;
3915
8cd931b7 3916 while (next != NULL)
906e58ca 3917 {
e780aef2
CL		 3918 end_of_next = next->output_offset + next->size;
3919 if (end_of_next - stub_group_start >= stub_group_size)
3920 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3921 break;
e780aef2 3922 /* Add NEXT to the stub group. */
07d72278
DJ		 3923 head = next;
3924 next = NEXT_SEC (head);
3925 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3926 }
3927 }
07d72278 3928 head = next;
906e58ca
NC		 3929 }
3930 }
07d72278 3931 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3932
3933 free (htab->input_list);
3934#undef PREV_SEC
07d72278 3935#undef NEXT_SEC
906e58ca
NC		 3936}
3937
48229727
JB		 3938/* Comparison function for sorting/searching relocations relating to Cortex-A8
3939 erratum fix. */
3940
3941static int
3942a8_reloc_compare (const void *a, const void *b)
3943{
21d799b5
NC		 3944 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
3945 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 3946
3947 if (ra->from < rb->from)
3948 return -1;
3949 else if (ra->from > rb->from)
3950 return 1;
3951 else
3952 return 0;
3953}
3954
3955static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3956 const char *, char **);
3957
3958/* Helper function to scan code for sequences which might trigger the Cortex-A8
3959 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3960 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3961 otherwise. */
3962
81694485
NC		 3963static bfd_boolean
3964cortex_a8_erratum_scan (bfd *input_bfd,
3965 struct bfd_link_info *info,
48229727
JB		 3966 struct a8_erratum_fix **a8_fixes_p,
3967 unsigned int *num_a8_fixes_p,
3968 unsigned int *a8_fix_table_size_p,
3969 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 3970 unsigned int num_a8_relocs,
3971 unsigned prev_num_a8_fixes,
3972 bfd_boolean *stub_changed_p)
48229727
JB		 3973{
3974 asection *section;
3975 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3976 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3977 unsigned int num_a8_fixes = *num_a8_fixes_p;
3978 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3979
4dfe6ac6
NC		 3980 if (htab == NULL)
3981 return FALSE;
3982
48229727
JB		 3983 for (section = input_bfd->sections;
3984 section != NULL;
3985 section = section->next)
3986 {
3987 bfd_byte *contents = NULL;
3988 struct _arm_elf_section_data *sec_data;
3989 unsigned int span;
3990 bfd_vma base_vma;
3991
3992 if (elf_section_type (section) != SHT_PROGBITS
3993 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
3994 || (section->flags & SEC_EXCLUDE) != 0
3995 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
3996 || (section->output_section == bfd_abs_section_ptr))
3997 continue;
3998
3999 base_vma = section->output_section->vma + section->output_offset;
4000
4001 if (elf_section_data (section)->this_hdr.contents != NULL)
4002 contents = elf_section_data (section)->this_hdr.contents;
4003 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4004 return TRUE;
48229727
JB		 4005
4006 sec_data = elf32_arm_section_data (section);
4007
4008 for (span = 0; span < sec_data->mapcount; span++)
4009 {
4010 unsigned int span_start = sec_data->map[span].vma;
4011 unsigned int span_end = (span == sec_data->mapcount - 1)
4012 ? section->size : sec_data->map[span + 1].vma;
4013 unsigned int i;
4014 char span_type = sec_data->map[span].type;
4015 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4016
4017 if (span_type != 't')
4018 continue;
4019
4020 /* Span is entirely within a single 4KB region: skip scanning. */
4021 if (((base_vma + span_start) & ~0xfff)
4022 == ((base_vma + span_end) & ~0xfff))
4023 continue;
4024
4025 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4026
4027 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4028 * The branch target is in the same 4KB region as the
4029 first half of the branch.
4030 * The instruction before the branch is a 32-bit
81694485 4031 length non-branch instruction. */
48229727
JB		 4032 for (i = span_start; i < span_end;)
4033 {
4034 unsigned int insn = bfd_getl16 (&contents[i]);
4035 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4036 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4037
4038 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4039 insn_32bit = TRUE;
4040
4041 if (insn_32bit)
4042 {
4043 /* Load the rest of the insn (in manual-friendly order). */
4044 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4045
4046 /* Encoding T4: B<c>.W. */
4047 is_b = (insn & 0xf800d000) == 0xf0009000;
4048 /* Encoding T1: BL<c>.W. */
4049 is_bl = (insn & 0xf800d000) == 0xf000d000;
4050 /* Encoding T2: BLX<c>.W. */
4051 is_blx = (insn & 0xf800d000) == 0xf000c000;
4052 /* Encoding T3: B<c>.W (not permitted in IT block). */
4053 is_bcc = (insn & 0xf800d000) == 0xf0008000
4054 && (insn & 0x07f00000) != 0x03800000;
4055 }
4056
4057 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4058
81694485
NC		 4059 if (((base_vma + i) & 0xfff) == 0xffe
4060 && insn_32bit
4061 && is_32bit_branch
4062 && last_was_32bit
4063 && ! last_was_branch)
48229727 4064 {
8f73510c 4065 bfd_signed_vma offset = 0;
48229727
JB		 4066 bfd_boolean force_target_arm = FALSE;
4067 bfd_boolean force_target_thumb = FALSE;
4068 bfd_vma target;
4069 enum elf32_arm_stub_type stub_type = arm_stub_none;
4070 struct a8_erratum_reloc key, *found;
4071
4072 key.from = base_vma + i;
21d799b5
NC		 4073 found = (struct a8_erratum_reloc *)
4074 bsearch (&key, a8_relocs, num_a8_relocs,
4075 sizeof (struct a8_erratum_reloc),
4076 &a8_reloc_compare);
48229727
JB		 4077
4078 if (found)
4079 {
4080 char *error_message = NULL;
4081 struct elf_link_hash_entry *entry;
92750f34 4082 bfd_boolean use_plt = FALSE;
48229727
JB		 4083
4084 /* We don't care about the error returned from this
4085 function, only if there is glue or not. */
4086 entry = find_thumb_glue (info, found->sym_name,
4087 &error_message);
4088
4089 if (entry)
4090 found->non_a8_stub = TRUE;
4091
92750f34 4092 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4093 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4094 && found->hash->root.plt.offset != (bfd_vma) -1)
4095 use_plt = TRUE;
4096
4097 if (found->r_type == R_ARM_THM_CALL)
4098 {
4099 if (found->st_type != STT_ARM_TFUNC || use_plt)
4100 force_target_arm = TRUE;
4101 else
4102 force_target_thumb = TRUE;
4103 }
48229727
JB		 4104 }
4105
4106 /* Check if we have an offending branch instruction. */
4107
4108 if (found && found->non_a8_stub)
4109 /* We've already made a stub for this instruction, e.g.
4110 it's a long branch or a Thumb->ARM stub. Assume that
4111 stub will suffice to work around the A8 erratum (see
4112 setting of always_after_branch above). */
4113 ;
4114 else if (is_bcc)
4115 {
4116 offset = (insn & 0x7ff) << 1;
4117 offset |= (insn & 0x3f0000) >> 4;
4118 offset |= (insn & 0x2000) ? 0x40000 : 0;
4119 offset |= (insn & 0x800) ? 0x80000 : 0;
4120 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4121 if (offset & 0x100000)
81694485 4122 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4123 stub_type = arm_stub_a8_veneer_b_cond;
4124 }
4125 else if (is_b || is_bl || is_blx)
4126 {
4127 int s = (insn & 0x4000000) != 0;
4128 int j1 = (insn & 0x2000) != 0;
4129 int j2 = (insn & 0x800) != 0;
4130 int i1 = !(j1 ^ s);
4131 int i2 = !(j2 ^ s);
4132
4133 offset = (insn & 0x7ff) << 1;
4134 offset |= (insn & 0x3ff0000) >> 4;
4135 offset |= i2 << 22;
4136 offset |= i1 << 23;
4137 offset |= s << 24;
4138 if (offset & 0x1000000)
81694485 4139 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4140
4141 if (is_blx)
81694485 4142 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4143
4144 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4145 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4146 }
4147
4148 if (stub_type != arm_stub_none)
4149 {
4150 bfd_vma pc_for_insn = base_vma + i + 4;
4151
4152 /* The original instruction is a BL, but the target is
4153 an ARM instruction. If we were not making a stub,
4154 the BL would have been converted to a BLX. Use the
4155 BLX stub instead in that case. */
4156 if (htab->use_blx && force_target_arm
4157 && stub_type == arm_stub_a8_veneer_bl)
4158 {
4159 stub_type = arm_stub_a8_veneer_blx;
4160 is_blx = TRUE;
4161 is_bl = FALSE;
4162 }
4163 /* Conversely, if the original instruction was
4164 BLX but the target is Thumb mode, use the BL
4165 stub. */
4166 else if (force_target_thumb
4167 && stub_type == arm_stub_a8_veneer_blx)
4168 {
4169 stub_type = arm_stub_a8_veneer_bl;
4170 is_blx = FALSE;
4171 is_bl = TRUE;
4172 }
4173
4174 if (is_blx)
81694485 4175 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4176
4177 /* If we found a relocation, use the proper destination,
4178 not the offset in the (unrelocated) instruction.
4179 Note this is always done if we switched the stub type
4180 above. */
4181 if (found)
81694485
NC		 4182 offset =
4183 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4184
4185 target = pc_for_insn + offset;
4186
4187 /* The BLX stub is ARM-mode code. Adjust the offset to
4188 take the different PC value (+8 instead of +4) into
4189 account. */
4190 if (stub_type == arm_stub_a8_veneer_blx)
4191 offset += 4;
4192
4193 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4194 {
eb7c4339 4195 char *stub_name = NULL;
48229727
JB		 4196
4197 if (num_a8_fixes == a8_fix_table_size)
4198 {
4199 a8_fix_table_size *= 2;
21d799b5
NC		 4200 a8_fixes = (struct a8_erratum_fix *)
4201 bfd_realloc (a8_fixes,
4202 sizeof (struct a8_erratum_fix)
4203 * a8_fix_table_size);
48229727
JB		 4204 }
4205
eb7c4339
NS		 4206 if (num_a8_fixes < prev_num_a8_fixes)
4207 {
4208 /* If we're doing a subsequent scan,
4209 check if we've found the same fix as
4210 before, and try and reuse the stub
4211 name. */
4212 stub_name = a8_fixes[num_a8_fixes].stub_name;
4213 if ((a8_fixes[num_a8_fixes].section != section)
4214 || (a8_fixes[num_a8_fixes].offset != i))
4215 {
4216 free (stub_name);
4217 stub_name = NULL;
4218 *stub_changed_p = TRUE;
4219 }
4220 }
4221
4222 if (!stub_name)
4223 {
21d799b5 4224 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4225 if (stub_name != NULL)
4226 sprintf (stub_name, "%x:%x", section->id, i);
4227 }
48229727
JB		 4228
4229 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4230 a8_fixes[num_a8_fixes].section = section;
4231 a8_fixes[num_a8_fixes].offset = i;
4232 a8_fixes[num_a8_fixes].addend = offset;
4233 a8_fixes[num_a8_fixes].orig_insn = insn;
4234 a8_fixes[num_a8_fixes].stub_name = stub_name;
4235 a8_fixes[num_a8_fixes].stub_type = stub_type;
fe33d2fa
CL		 4236 a8_fixes[num_a8_fixes].st_type =
4237 is_blx ? STT_FUNC : STT_ARM_TFUNC;
48229727
JB		 4238
4239 num_a8_fixes++;
4240 }
4241 }
4242 }
4243
4244 i += insn_32bit ? 4 : 2;
4245 last_was_32bit = insn_32bit;
4246 last_was_branch = is_32bit_branch;
4247 }
4248 }
4249
4250 if (elf_section_data (section)->this_hdr.contents == NULL)
4251 free (contents);
4252 }
fe33d2fa 4253
48229727
JB		 4254 *a8_fixes_p = a8_fixes;
4255 *num_a8_fixes_p = num_a8_fixes;
4256 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4257
81694485 4258 return FALSE;
48229727
JB		 4259}
4260
906e58ca
NC		 4261/* Determine and set the size of the stub section for a final link.
4262
4263 The basic idea here is to examine all the relocations looking for
4264 PC-relative calls to a target that is unreachable with a "bl"
4265 instruction. */
4266
4267bfd_boolean
4268elf32_arm_size_stubs (bfd *output_bfd,
4269 bfd *stub_bfd,
4270 struct bfd_link_info *info,
4271 bfd_signed_vma group_size,
4272 asection * (*add_stub_section) (const char *, asection *),
4273 void (*layout_sections_again) (void))
4274{
4275 bfd_size_type stub_group_size;
07d72278 4276 bfd_boolean stubs_always_after_branch;
906e58ca 4277 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4278 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4279 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4280 struct a8_erratum_reloc *a8_relocs = NULL;
4281 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4282
4dfe6ac6
NC		 4283 if (htab == NULL)
4284 return FALSE;
4285
48229727
JB		 4286 if (htab->fix_cortex_a8)
4287 {
21d799b5
NC		 4288 a8_fixes = (struct a8_erratum_fix *)
4289 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4290 a8_relocs = (struct a8_erratum_reloc *)
4291 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4292 }
906e58ca
NC		 4293
4294 /* Propagate mach to stub bfd, because it may not have been
4295 finalized when we created stub_bfd. */
4296 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4297 bfd_get_mach (output_bfd));
4298
4299 /* Stash our params away. */
4300 htab->stub_bfd = stub_bfd;
4301 htab->add_stub_section = add_stub_section;
4302 htab->layout_sections_again = layout_sections_again;
07d72278 4303 stubs_always_after_branch = group_size < 0;
48229727
JB		 4304
4305 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4306 as the first half of a 32-bit branch straddling two 4K pages. This is a
4307 crude way of enforcing that. */
4308 if (htab->fix_cortex_a8)
4309 stubs_always_after_branch = 1;
4310
906e58ca
NC		 4311 if (group_size < 0)
4312 stub_group_size = -group_size;
4313 else
4314 stub_group_size = group_size;
4315
4316 if (stub_group_size == 1)
4317 {
4318 /* Default values. */
4319 /* Thumb branch range is +-4MB has to be used as the default
4320 maximum size (a given section can contain both ARM and Thumb
4321 code, so the worst case has to be taken into account).
4322
4323 This value is 24K less than that, which allows for 2025
4324 12-byte stubs. If we exceed that, then we will fail to link.
4325 The user will have to relink with an explicit group size
4326 option. */
4327 stub_group_size = 4170000;
4328 }
4329
07d72278 4330 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4331
3ae046cc
NS		 4332 /* If we're applying the cortex A8 fix, we need to determine the
4333 program header size now, because we cannot change it later --
4334 that could alter section placements. Notice the A8 erratum fix
4335 ends up requiring the section addresses to remain unchanged
4336 modulo the page size. That's something we cannot represent
4337 inside BFD, and we don't want to force the section alignment to
4338 be the page size. */
4339 if (htab->fix_cortex_a8)
4340 (*htab->layout_sections_again) ();
4341
906e58ca
NC		 4342 while (1)
4343 {
4344 bfd *input_bfd;
4345 unsigned int bfd_indx;
4346 asection *stub_sec;
eb7c4339
NS		 4347 bfd_boolean stub_changed = FALSE;
4348 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4349
48229727 4350 num_a8_fixes = 0;
906e58ca
NC		 4351 for (input_bfd = info->input_bfds, bfd_indx = 0;
4352 input_bfd != NULL;
4353 input_bfd = input_bfd->link_next, bfd_indx++)
4354 {
4355 Elf_Internal_Shdr *symtab_hdr;
4356 asection *section;
4357 Elf_Internal_Sym *local_syms = NULL;
4358
48229727
JB		 4359 num_a8_relocs = 0;
4360
906e58ca
NC		 4361 /* We'll need the symbol table in a second. */
4362 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4363 if (symtab_hdr->sh_info == 0)
4364 continue;
4365
4366 /* Walk over each section attached to the input bfd. */
4367 for (section = input_bfd->sections;
4368 section != NULL;
4369 section = section->next)
4370 {
4371 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4372
4373 /* If there aren't any relocs, then there's nothing more
4374 to do. */
4375 if ((section->flags & SEC_RELOC) == 0
4376 || section->reloc_count == 0
4377 || (section->flags & SEC_CODE) == 0)
4378 continue;
4379
4380 /* If this section is a link-once section that will be
4381 discarded, then don't create any stubs. */
4382 if (section->output_section == NULL
4383 || section->output_section->owner != output_bfd)
4384 continue;
4385
4386 /* Get the relocs. */
4387 internal_relocs
4388 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4389 NULL, info->keep_memory);
4390 if (internal_relocs == NULL)
4391 goto error_ret_free_local;
4392
4393 /* Now examine each relocation. */
4394 irela = internal_relocs;
4395 irelaend = irela + section->reloc_count;
4396 for (; irela < irelaend; irela++)
4397 {
4398 unsigned int r_type, r_indx;
4399 enum elf32_arm_stub_type stub_type;
4400 struct elf32_arm_stub_hash_entry *stub_entry;
4401 asection *sym_sec;
4402 bfd_vma sym_value;
4403 bfd_vma destination;
4404 struct elf32_arm_link_hash_entry *hash;
7413f23f 4405 const char *sym_name;
906e58ca
NC		 4406 char *stub_name;
4407 const asection *id_sec;
fe33d2fa 4408 int st_type;
48229727 4409 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4410
4411 r_type = ELF32_R_TYPE (irela->r_info);
4412 r_indx = ELF32_R_SYM (irela->r_info);
4413
4414 if (r_type >= (unsigned int) R_ARM_max)
4415 {
4416 bfd_set_error (bfd_error_bad_value);
4417 error_ret_free_internal:
4418 if (elf_section_data (section)->relocs == NULL)
4419 free (internal_relocs);
4420 goto error_ret_free_local;
4421 }
4422
155d87d7 4423 /* Only look for stubs on branch instructions. */
906e58ca 4424 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4425 && (r_type != (unsigned int) R_ARM_THM_CALL)
4426 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4427 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4428 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4429 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4430 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4431 continue;
4432
4433 /* Now determine the call target, its name, value,
4434 section. */
4435 sym_sec = NULL;
4436 sym_value = 0;
4437 destination = 0;
4438 hash = NULL;
7413f23f 4439 sym_name = NULL;
906e58ca
NC		 4440 if (r_indx < symtab_hdr->sh_info)
4441 {
4442 /* It's a local symbol. */
4443 Elf_Internal_Sym *sym;
906e58ca
NC		 4444
4445 if (local_syms == NULL)
4446 {
4447 local_syms
4448 = (Elf_Internal_Sym *) symtab_hdr->contents;
4449 if (local_syms == NULL)
4450 local_syms
4451 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4452 symtab_hdr->sh_info, 0,
4453 NULL, NULL, NULL);
4454 if (local_syms == NULL)
4455 goto error_ret_free_internal;
4456 }
4457
4458 sym = local_syms + r_indx;
f6d250ce
TS		 4459 if (sym->st_shndx == SHN_UNDEF)
4460 sym_sec = bfd_und_section_ptr;
4461 else if (sym->st_shndx == SHN_ABS)
4462 sym_sec = bfd_abs_section_ptr;
4463 else if (sym->st_shndx == SHN_COMMON)
4464 sym_sec = bfd_com_section_ptr;
4465 else
4466 sym_sec =
4467 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
4468
ffcb4889
NS		 4469 if (!sym_sec)
4470 /* This is an undefined symbol. It can never
4471 be resolved. */
4472 continue;
fe33d2fa 4473
906e58ca
NC		 4474 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4475 sym_value = sym->st_value;
4476 destination = (sym_value + irela->r_addend
4477 + sym_sec->output_offset
4478 + sym_sec->output_section->vma);
4479 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4480 sym_name
4481 = bfd_elf_string_from_elf_section (input_bfd,
4482 symtab_hdr->sh_link,
4483 sym->st_name);
906e58ca
NC		 4484 }
4485 else
4486 {
4487 /* It's an external symbol. */
4488 int e_indx;
4489
4490 e_indx = r_indx - symtab_hdr->sh_info;
4491 hash = ((struct elf32_arm_link_hash_entry *)
4492 elf_sym_hashes (input_bfd)[e_indx]);
4493
4494 while (hash->root.root.type == bfd_link_hash_indirect
4495 || hash->root.root.type == bfd_link_hash_warning)
4496 hash = ((struct elf32_arm_link_hash_entry *)
4497 hash->root.root.u.i.link);
4498
4499 if (hash->root.root.type == bfd_link_hash_defined
4500 || hash->root.root.type == bfd_link_hash_defweak)
4501 {
4502 sym_sec = hash->root.root.u.def.section;
4503 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4504
4505 struct elf32_arm_link_hash_table *globals =
4506 elf32_arm_hash_table (info);
4507
4508 /* For a destination in a shared library,
4509 use the PLT stub as target address to
4510 decide whether a branch stub is
4511 needed. */
4dfe6ac6 4512 if (globals != NULL
362d30a1 4513 && globals->root.splt != NULL
4dfe6ac6 4514 && hash != NULL
022f8312
CL		 4515 && hash->root.plt.offset != (bfd_vma) -1)
4516 {
362d30a1 4517 sym_sec = globals->root.splt;
022f8312
CL		 4518 sym_value = hash->root.plt.offset;
4519 if (sym_sec->output_section != NULL)
4520 destination = (sym_value
4521 + sym_sec->output_offset
4522 + sym_sec->output_section->vma);
4523 }
4524 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4525 destination = (sym_value + irela->r_addend
4526 + sym_sec->output_offset
4527 + sym_sec->output_section->vma);
4528 }
69c5861e
CL		 4529 else if ((hash->root.root.type == bfd_link_hash_undefined)
4530 || (hash->root.root.type == bfd_link_hash_undefweak))
4531 {
4532 /* For a shared library, use the PLT stub as
4533 target address to decide whether a long
4534 branch stub is needed.
4535 For absolute code, they cannot be handled. */
4536 struct elf32_arm_link_hash_table *globals =
4537 elf32_arm_hash_table (info);
4538
4dfe6ac6 4539 if (globals != NULL
362d30a1 4540 && globals->root.splt != NULL
4dfe6ac6 4541 && hash != NULL
69c5861e
CL		 4542 && hash->root.plt.offset != (bfd_vma) -1)
4543 {
362d30a1 4544 sym_sec = globals->root.splt;
69c5861e
CL		 4545 sym_value = hash->root.plt.offset;
4546 if (sym_sec->output_section != NULL)
4547 destination = (sym_value
4548 + sym_sec->output_offset
4549 + sym_sec->output_section->vma);
4550 }
4551 else
4552 continue;
4553 }
906e58ca
NC		 4554 else
4555 {
4556 bfd_set_error (bfd_error_bad_value);
4557 goto error_ret_free_internal;
4558 }
4559 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4560 sym_name = hash->root.root.root.string;
906e58ca
NC		 4561 }
4562
48229727 4563 do
7413f23f 4564 {
48229727
JB		 4565 /* Determine what (if any) linker stub is needed. */
4566 stub_type = arm_type_of_stub (info, section, irela,
fe33d2fa 4567 &st_type, hash,
48229727
JB		 4568 destination, sym_sec,
4569 input_bfd, sym_name);
4570 if (stub_type == arm_stub_none)
4571 break;
4572
4573 /* Support for grouping stub sections. */
4574 id_sec = htab->stub_group[section->id].link_sec;
4575
4576 /* Get the name of this stub. */
4577 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 4578 irela, stub_type);
48229727
JB		 4579 if (!stub_name)
4580 goto error_ret_free_internal;
4581
4582 /* We've either created a stub for this reloc already,
4583 or we are about to. */
4584 created_stub = TRUE;
4585
4586 stub_entry = arm_stub_hash_lookup
4587 (&htab->stub_hash_table, stub_name,
4588 FALSE, FALSE);
4589 if (stub_entry != NULL)
4590 {
4591 /* The proper stub has already been created. */
4592 free (stub_name);
eb7c4339 4593 stub_entry->target_value = sym_value;
48229727
JB		 4594 break;
4595 }
7413f23f 4596
48229727
JB		 4597 stub_entry = elf32_arm_add_stub (stub_name, section,
4598 htab);
4599 if (stub_entry == NULL)
4600 {
4601 free (stub_name);
4602 goto error_ret_free_internal;
4603 }
7413f23f 4604
48229727
JB		 4605 stub_entry->target_value = sym_value;
4606 stub_entry->target_section = sym_sec;
4607 stub_entry->stub_type = stub_type;
4608 stub_entry->h = hash;
4609 stub_entry->st_type = st_type;
4610
4611 if (sym_name == NULL)
4612 sym_name = "unnamed";
21d799b5
NC		 4613 stub_entry->output_name = (char *)
4614 bfd_alloc (htab->stub_bfd,
48229727
JB		 4615 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4616 + strlen (sym_name));
4617 if (stub_entry->output_name == NULL)
4618 {
4619 free (stub_name);
4620 goto error_ret_free_internal;
4621 }
4622
4623 /* For historical reasons, use the existing names for
4624 ARM-to-Thumb and Thumb-to-ARM stubs. */
4625 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4626 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4627 && st_type != STT_ARM_TFUNC)
4628 sprintf (stub_entry->output_name,
4629 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4630 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4631 || (r_type == (unsigned int) R_ARM_JUMP24))
4632 && st_type == STT_ARM_TFUNC)
4633 sprintf (stub_entry->output_name,
4634 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4635 else
4636 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4637 sym_name);
4638
4639 stub_changed = TRUE;
4640 }
4641 while (0);
4642
4643 /* Look for relocations which might trigger Cortex-A8
4644 erratum. */
4645 if (htab->fix_cortex_a8
4646 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4647 || r_type == (unsigned int) R_ARM_THM_JUMP19
4648 || r_type == (unsigned int) R_ARM_THM_CALL
4649 || r_type == (unsigned int) R_ARM_THM_XPC22))
4650 {
4651 bfd_vma from = section->output_section->vma
4652 + section->output_offset
4653 + irela->r_offset;
4654
4655 if ((from & 0xfff) == 0xffe)
4656 {
4657 /* Found a candidate. Note we haven't checked the
4658 destination is within 4K here: if we do so (and
4659 don't create an entry in a8_relocs) we can't tell
4660 that a branch should have been relocated when
4661 scanning later. */
4662 if (num_a8_relocs == a8_reloc_table_size)
4663 {
4664 a8_reloc_table_size *= 2;
21d799b5
NC		 4665 a8_relocs = (struct a8_erratum_reloc *)
4666 bfd_realloc (a8_relocs,
4667 sizeof (struct a8_erratum_reloc)
4668 * a8_reloc_table_size);
48229727
JB		 4669 }
4670
4671 a8_relocs[num_a8_relocs].from = from;
4672 a8_relocs[num_a8_relocs].destination = destination;
4673 a8_relocs[num_a8_relocs].r_type = r_type;
4674 a8_relocs[num_a8_relocs].st_type = st_type;
4675 a8_relocs[num_a8_relocs].sym_name = sym_name;
4676 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 4677 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 4678
4679 num_a8_relocs++;
4680 }
4681 }
906e58ca
NC		 4682 }
4683
48229727
JB		 4684 /* We're done with the internal relocs, free them. */
4685 if (elf_section_data (section)->relocs == NULL)
4686 free (internal_relocs);
4687 }
4688
4689 if (htab->fix_cortex_a8)
4690 {
4691 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4692 qsort (a8_relocs, num_a8_relocs,
4693 sizeof (struct a8_erratum_reloc),
48229727
JB		 4694 &a8_reloc_compare);
4695
4696 /* Scan for branches which might trigger Cortex-A8 erratum. */
4697 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4698 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4699 a8_relocs, num_a8_relocs,
4700 prev_num_a8_fixes, &stub_changed)
4701 != 0)
48229727 4702 goto error_ret_free_local;
5e681ec4 4703 }
5e681ec4
PB		 4704 }
4705
eb7c4339 4706 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4707 stub_changed = TRUE;
4708
906e58ca
NC		 4709 if (!stub_changed)
4710 break;
5e681ec4 4711
906e58ca
NC		 4712 /* OK, we've added some stubs. Find out the new size of the
4713 stub sections. */
4714 for (stub_sec = htab->stub_bfd->sections;
4715 stub_sec != NULL;
4716 stub_sec = stub_sec->next)
3e6b1042
DJ		 4717 {
4718 /* Ignore non-stub sections. */
4719 if (!strstr (stub_sec->name, STUB_SUFFIX))
4720 continue;
4721
4722 stub_sec->size = 0;
4723 }
b34b2d70 4724
906e58ca
NC		 4725 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4726
48229727
JB		 4727 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4728 if (htab->fix_cortex_a8)
4729 for (i = 0; i < num_a8_fixes; i++)
4730 {
4731 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4732 a8_fixes[i].section, htab);
4733
4734 if (stub_sec == NULL)
4735 goto error_ret_free_local;
4736
4737 stub_sec->size
4738 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4739 NULL);
4740 }
4741
4742
906e58ca
NC		 4743 /* Ask the linker to do its stuff. */
4744 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4745 }
4746
48229727
JB		 4747 /* Add stubs for Cortex-A8 erratum fixes now. */
4748 if (htab->fix_cortex_a8)
4749 {
4750 for (i = 0; i < num_a8_fixes; i++)
4751 {
4752 struct elf32_arm_stub_hash_entry *stub_entry;
4753 char *stub_name = a8_fixes[i].stub_name;
4754 asection *section = a8_fixes[i].section;
4755 unsigned int section_id = a8_fixes[i].section->id;
4756 asection *link_sec = htab->stub_group[section_id].link_sec;
4757 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 4758 const insn_sequence *template_sequence;
48229727
JB		 4759 int template_size, size = 0;
4760
4761 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4762 TRUE, FALSE);
4763 if (stub_entry == NULL)
4764 {
4765 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4766 section->owner,
4767 stub_name);
4768 return FALSE;
4769 }
4770
4771 stub_entry->stub_sec = stub_sec;
4772 stub_entry->stub_offset = 0;
4773 stub_entry->id_sec = link_sec;
4774 stub_entry->stub_type = a8_fixes[i].stub_type;
4775 stub_entry->target_section = a8_fixes[i].section;
4776 stub_entry->target_value = a8_fixes[i].offset;
4777 stub_entry->target_addend = a8_fixes[i].addend;
4778 stub_entry->orig_insn = a8_fixes[i].orig_insn;
fe33d2fa 4779 stub_entry->st_type = a8_fixes[i].st_type;
48229727 4780
d3ce72d0
NC		 4781 size = find_stub_size_and_template (a8_fixes[i].stub_type,
4782 &template_sequence,
48229727
JB		 4783 &template_size);
4784
4785 stub_entry->stub_size = size;
d3ce72d0 4786 stub_entry->stub_template = template_sequence;
48229727
JB		 4787 stub_entry->stub_template_size = template_size;
4788 }
4789
4790 /* Stash the Cortex-A8 erratum fix array for use later in
4791 elf32_arm_write_section(). */
4792 htab->a8_erratum_fixes = a8_fixes;
4793 htab->num_a8_erratum_fixes = num_a8_fixes;
4794 }
4795 else
4796 {
4797 htab->a8_erratum_fixes = NULL;
4798 htab->num_a8_erratum_fixes = 0;
4799 }
906e58ca
NC		 4800 return TRUE;
4801
4802 error_ret_free_local:
4803 return FALSE;
5e681ec4
PB		 4804}
4805
906e58ca
NC		 4806/* Build all the stubs associated with the current output file. The
4807 stubs are kept in a hash table attached to the main linker hash
4808 table. We also set up the .plt entries for statically linked PIC
4809 functions here. This function is called via arm_elf_finish in the
4810 linker. */
252b5132 4811
906e58ca
NC		 4812bfd_boolean
4813elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4814{
906e58ca
NC		 4815 asection *stub_sec;
4816 struct bfd_hash_table *table;
4817 struct elf32_arm_link_hash_table *htab;
252b5132 4818
906e58ca 4819 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4820 if (htab == NULL)
4821 return FALSE;
252b5132 4822
906e58ca
NC		 4823 for (stub_sec = htab->stub_bfd->sections;
4824 stub_sec != NULL;
4825 stub_sec = stub_sec->next)
252b5132 4826 {
906e58ca
NC		 4827 bfd_size_type size;
4828
8029a119 4829 /* Ignore non-stub sections. */
906e58ca
NC		 4830 if (!strstr (stub_sec->name, STUB_SUFFIX))
4831 continue;
4832
4833 /* Allocate memory to hold the linker stubs. */
4834 size = stub_sec->size;
21d799b5 4835 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 4836 if (stub_sec->contents == NULL && size != 0)
4837 return FALSE;
4838 stub_sec->size = 0;
252b5132
RH		 4839 }
4840
906e58ca
NC		 4841 /* Build the stubs as directed by the stub hash table. */
4842 table = &htab->stub_hash_table;
4843 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 4844 if (htab->fix_cortex_a8)
4845 {
4846 /* Place the cortex a8 stubs last. */
4847 htab->fix_cortex_a8 = -1;
4848 bfd_hash_traverse (table, arm_build_one_stub, info);
4849 }
252b5132 4850
906e58ca 4851 return TRUE;
252b5132
RH		 4852}
4853
9b485d32
NC		 4854/* Locate the Thumb encoded calling stub for NAME. */
4855
252b5132 4856static struct elf_link_hash_entry *
57e8b36a
NC		 4857find_thumb_glue (struct bfd_link_info *link_info,
4858 const char *name,
f2a9dd69 4859 char **error_message)
252b5132
RH		 4860{
4861 char *tmp_name;
4862 struct elf_link_hash_entry *hash;
4863 struct elf32_arm_link_hash_table *hash_table;
4864
4865 /* We need a pointer to the armelf specific hash table. */
4866 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4867 if (hash_table == NULL)
4868 return NULL;
252b5132 4869
21d799b5
NC		 4870 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4871 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4872
4873 BFD_ASSERT (tmp_name);
4874
4875 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4876
4877 hash = elf_link_hash_lookup
b34976b6 4878 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4879
b1657152
AM		 4880 if (hash == NULL
4881 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4882 tmp_name, name) == -1)
4883 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4884
4885 free (tmp_name);
4886
4887 return hash;
4888}
4889
9b485d32
NC		 4890/* Locate the ARM encoded calling stub for NAME. */
4891
252b5132 4892static struct elf_link_hash_entry *
57e8b36a
NC		 4893find_arm_glue (struct bfd_link_info *link_info,
4894 const char *name,
f2a9dd69 4895 char **error_message)
252b5132
RH		 4896{
4897 char *tmp_name;
4898 struct elf_link_hash_entry *myh;
4899 struct elf32_arm_link_hash_table *hash_table;
4900
4901 /* We need a pointer to the elfarm specific hash table. */
4902 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4903 if (hash_table == NULL)
4904 return NULL;
252b5132 4905
21d799b5
NC		 4906 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4907 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4908
4909 BFD_ASSERT (tmp_name);
4910
4911 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4912
4913 myh = elf_link_hash_lookup
b34976b6 4914 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4915
b1657152
AM		 4916 if (myh == NULL
4917 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4918 tmp_name, name) == -1)
4919 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4920
4921 free (tmp_name);
4922
4923 return myh;
4924}
4925
8f6277f5 4926/* ARM->Thumb glue (static images):
252b5132
RH		 4927
4928 .arm
4929 __func_from_arm:
4930 ldr r12, __func_addr
4931 bx r12
4932 __func_addr:
906e58ca 4933 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4934
26079076
PB		 4935 (v5t static images)
4936 .arm
4937 __func_from_arm:
4938 ldr pc, __func_addr
4939 __func_addr:
906e58ca 4940 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4941
8f6277f5
PB		 4942 (relocatable images)
4943 .arm
4944 __func_from_arm:
4945 ldr r12, __func_offset
4946 add r12, r12, pc
4947 bx r12
4948 __func_offset:
8029a119 4949 .word func - . */
8f6277f5
PB		 4950
4951#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4952static const insn32 a2t1_ldr_insn = 0xe59fc000;
4953static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4954static const insn32 a2t3_func_addr_insn = 0x00000001;
4955
26079076
PB		 4956#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4957static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4958static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4959
8f6277f5
PB		 4960#define ARM2THUMB_PIC_GLUE_SIZE 16
4961static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4962static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4963static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4964
9b485d32 4965/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4966
8029a119
NC		 4967 .thumb .thumb
4968 .align 2 .align 2
4969 __func_from_thumb: __func_from_thumb:
4970 bx pc push {r6, lr}
4971 nop ldr r6, __func_addr
4972 .arm mov lr, pc
4973 b func bx r6
fcef9eb7
NC		 4974 .arm
4975 ;; back_to_thumb
4976 ldmia r13! {r6, lr}
4977 bx lr
8029a119
NC		 4978 __func_addr:
4979 .word func */
252b5132
RH		 4980
4981#define THUMB2ARM_GLUE_SIZE 8
4982static const insn16 t2a1_bx_pc_insn = 0x4778;
4983static const insn16 t2a2_noop_insn = 0x46c0;
4984static const insn32 t2a3_b_insn = 0xea000000;
4985
c7b8f16e
JB		 4986#define VFP11_ERRATUM_VENEER_SIZE 8
4987
845b51d6
PB		 4988#define ARM_BX_VENEER_SIZE 12
4989static const insn32 armbx1_tst_insn = 0xe3100001;
4990static const insn32 armbx2_moveq_insn = 0x01a0f000;
4991static const insn32 armbx3_bx_insn = 0xe12fff10;
4992
7e392df6 4993#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4994static void
4995arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4996{
4997 asection * s;
8029a119 4998 bfd_byte * contents;
252b5132 4999
8029a119 5000 if (size == 0)
3e6b1042
DJ		 5001 {
5002 /* Do not include empty glue sections in the output. */
5003 if (abfd != NULL)
5004 {
5005 s = bfd_get_section_by_name (abfd, name);
5006 if (s != NULL)
5007 s->flags |= SEC_EXCLUDE;
5008 }
5009 return;
5010 }
252b5132 5011
8029a119 5012 BFD_ASSERT (abfd != NULL);
252b5132 5013
8029a119
NC		 5014 s = bfd_get_section_by_name (abfd, name);
5015 BFD_ASSERT (s != NULL);
252b5132 5016
21d799b5 5017 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5018
8029a119
NC		 5019 BFD_ASSERT (s->size == size);
5020 s->contents = contents;
5021}
906e58ca 5022
8029a119
NC		 5023bfd_boolean
5024bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5025{
5026 struct elf32_arm_link_hash_table * globals;
906e58ca 5027
8029a119
NC		 5028 globals = elf32_arm_hash_table (info);
5029 BFD_ASSERT (globals != NULL);
906e58ca 5030
8029a119
NC		 5031 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5032 globals->arm_glue_size,
5033 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5034
8029a119
NC		 5035 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5036 globals->thumb_glue_size,
5037 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5038
8029a119
NC		 5039 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5040 globals->vfp11_erratum_glue_size,
5041 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5042
8029a119
NC		 5043 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5044 globals->bx_glue_size,
845b51d6
PB		 5045 ARM_BX_GLUE_SECTION_NAME);
5046
b34976b6 5047 return TRUE;
252b5132
RH		 5048}
5049
a4fd1a8e 5050/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5051 returns the symbol identifying the stub. */
5052
a4fd1a8e 5053static struct elf_link_hash_entry *
57e8b36a
NC		 5054record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5055 struct elf_link_hash_entry * h)
252b5132
RH		 5056{
5057 const char * name = h->root.root.string;
63b0f745 5058 asection * s;
252b5132
RH		 5059 char * tmp_name;
5060 struct elf_link_hash_entry * myh;
14a793b2 5061 struct bfd_link_hash_entry * bh;
252b5132 5062 struct elf32_arm_link_hash_table * globals;
dc810e39 5063 bfd_vma val;
2f475487 5064 bfd_size_type size;
252b5132
RH		 5065
5066 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5067 BFD_ASSERT (globals != NULL);
5068 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5069
5070 s = bfd_get_section_by_name
5071 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5072
252b5132
RH		 5073 BFD_ASSERT (s != NULL);
5074
21d799b5
NC		 5075 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5076 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5077
5078 BFD_ASSERT (tmp_name);
5079
5080 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5081
5082 myh = elf_link_hash_lookup
b34976b6 5083 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5084
5085 if (myh != NULL)
5086 {
9b485d32 5087 /* We've already seen this guy. */
252b5132 5088 free (tmp_name);
a4fd1a8e 5089 return myh;
252b5132
RH		 5090 }
5091
57e8b36a
NC		 5092 /* The only trick here is using hash_table->arm_glue_size as the value.
5093 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5094 putting it. The +1 on the value marks that the stub has not been
5095 output yet - not that it is a Thumb function. */
14a793b2 5096 bh = NULL;
dc810e39
AM		 5097 val = globals->arm_glue_size + 1;
5098 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5099 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5100 NULL, TRUE, FALSE, &bh);
252b5132 5101
b7693d02
DJ		 5102 myh = (struct elf_link_hash_entry *) bh;
5103 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5104 myh->forced_local = 1;
5105
252b5132
RH		 5106 free (tmp_name);
5107
27e55c4d
PB		 5108 if (link_info->shared || globals->root.is_relocatable_executable
5109 || globals->pic_veneer)
2f475487 5110 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5111 else if (globals->use_blx)
5112 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5113 else
2f475487
AM		 5114 size = ARM2THUMB_STATIC_GLUE_SIZE;
5115
5116 s->size += size;
5117 globals->arm_glue_size += size;
252b5132 5118
a4fd1a8e 5119 return myh;
252b5132
RH		 5120}
5121
845b51d6
PB		 5122/* Allocate space for ARMv4 BX veneers. */
5123
5124static void
5125record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5126{
5127 asection * s;
5128 struct elf32_arm_link_hash_table *globals;
5129 char *tmp_name;
5130 struct elf_link_hash_entry *myh;
5131 struct bfd_link_hash_entry *bh;
5132 bfd_vma val;
5133
5134 /* BX PC does not need a veneer. */
5135 if (reg == 15)
5136 return;
5137
5138 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5139 BFD_ASSERT (globals != NULL);
5140 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5141
5142 /* Check if this veneer has already been allocated. */
5143 if (globals->bx_glue_offset[reg])
5144 return;
5145
5146 s = bfd_get_section_by_name
5147 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5148
5149 BFD_ASSERT (s != NULL);
5150
5151 /* Add symbol for veneer. */
21d799b5
NC		 5152 tmp_name = (char *)
5153 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5154
845b51d6 5155 BFD_ASSERT (tmp_name);
906e58ca 5156
845b51d6 5157 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5158
845b51d6
PB		 5159 myh = elf_link_hash_lookup
5160 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5161
845b51d6 5162 BFD_ASSERT (myh == NULL);
906e58ca 5163
845b51d6
PB		 5164 bh = NULL;
5165 val = globals->bx_glue_size;
5166 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5167 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5168 NULL, TRUE, FALSE, &bh);
5169
5170 myh = (struct elf_link_hash_entry *) bh;
5171 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5172 myh->forced_local = 1;
5173
5174 s->size += ARM_BX_VENEER_SIZE;
5175 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5176 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5177}
5178
5179
c7b8f16e
JB		 5180/* Add an entry to the code/data map for section SEC. */
5181
5182static void
5183elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5184{
5185 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5186 unsigned int newidx;
906e58ca 5187
c7b8f16e
JB		 5188 if (sec_data->map == NULL)
5189 {
21d799b5
NC		 5190 sec_data->map = (elf32_arm_section_map *)
5191 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5192 sec_data->mapcount = 0;
5193 sec_data->mapsize = 1;
5194 }
906e58ca 5195
c7b8f16e 5196 newidx = sec_data->mapcount++;
906e58ca 5197
c7b8f16e
JB		 5198 if (sec_data->mapcount > sec_data->mapsize)
5199 {
5200 sec_data->mapsize *= 2;
21d799b5
NC		 5201 sec_data->map = (elf32_arm_section_map *)
5202 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5203 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5204 }
5205
5206 if (sec_data->map)
5207 {
5208 sec_data->map[newidx].vma = vma;
5209 sec_data->map[newidx].type = type;
c7b8f16e 5210 }
c7b8f16e
JB		 5211}
5212
5213
5214/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5215 veneers are handled for now. */
5216
5217static bfd_vma
5218record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5219 elf32_vfp11_erratum_list *branch,
5220 bfd *branch_bfd,
5221 asection *branch_sec,
5222 unsigned int offset)
5223{
5224 asection *s;
5225 struct elf32_arm_link_hash_table *hash_table;
5226 char *tmp_name;
5227 struct elf_link_hash_entry *myh;
5228 struct bfd_link_hash_entry *bh;
5229 bfd_vma val;
5230 struct _arm_elf_section_data *sec_data;
c7b8f16e 5231 elf32_vfp11_erratum_list *newerr;
906e58ca 5232
c7b8f16e 5233 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5234 BFD_ASSERT (hash_table != NULL);
5235 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5236
c7b8f16e
JB		 5237 s = bfd_get_section_by_name
5238 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5239
c7b8f16e 5240 sec_data = elf32_arm_section_data (s);
906e58ca 5241
c7b8f16e 5242 BFD_ASSERT (s != NULL);
906e58ca 5243
21d799b5
NC		 5244 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5245 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5246
c7b8f16e 5247 BFD_ASSERT (tmp_name);
906e58ca 5248
c7b8f16e
JB		 5249 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5250 hash_table->num_vfp11_fixes);
906e58ca 5251
c7b8f16e
JB		 5252 myh = elf_link_hash_lookup
5253 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5254
c7b8f16e 5255 BFD_ASSERT (myh == NULL);
906e58ca 5256
c7b8f16e
JB		 5257 bh = NULL;
5258 val = hash_table->vfp11_erratum_glue_size;
5259 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5260 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5261 NULL, TRUE, FALSE, &bh);
5262
5263 myh = (struct elf_link_hash_entry *) bh;
5264 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5265 myh->forced_local = 1;
5266
5267 /* Link veneer back to calling location. */
c7e2358a 5268 sec_data->erratumcount += 1;
21d799b5
NC		 5269 newerr = (elf32_vfp11_erratum_list *)
5270 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5271
c7b8f16e
JB		 5272 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5273 newerr->vma = -1;
5274 newerr->u.v.branch = branch;
5275 newerr->u.v.id = hash_table->num_vfp11_fixes;
5276 branch->u.b.veneer = newerr;
5277
5278 newerr->next = sec_data->erratumlist;
5279 sec_data->erratumlist = newerr;
5280
5281 /* A symbol for the return from the veneer. */
5282 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5283 hash_table->num_vfp11_fixes);
5284
5285 myh = elf_link_hash_lookup
5286 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5287
c7b8f16e
JB		 5288 if (myh != NULL)
5289 abort ();
5290
5291 bh = NULL;
5292 val = offset + 4;
5293 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5294 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5295
c7b8f16e
JB		 5296 myh = (struct elf_link_hash_entry *) bh;
5297 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5298 myh->forced_local = 1;
5299
5300 free (tmp_name);
906e58ca 5301
c7b8f16e
JB		 5302 /* Generate a mapping symbol for the veneer section, and explicitly add an
5303 entry for that symbol to the code/data map for the section. */
5304 if (hash_table->vfp11_erratum_glue_size == 0)
5305 {
5306 bh = NULL;
5307 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5308 ever requires this erratum fix. */
5309 _bfd_generic_link_add_one_symbol (link_info,
5310 hash_table->bfd_of_glue_owner, "$a",
5311 BSF_LOCAL, s, 0, NULL,
5312 TRUE, FALSE, &bh);
5313
5314 myh = (struct elf_link_hash_entry *) bh;
5315 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5316 myh->forced_local = 1;
906e58ca 5317
c7b8f16e
JB		 5318 /* The elf32_arm_init_maps function only cares about symbols from input
5319 BFDs. We must make a note of this generated mapping symbol
5320 ourselves so that code byteswapping works properly in
5321 elf32_arm_write_section. */
5322 elf32_arm_section_map_add (s, 'a', 0);
5323 }
906e58ca 5324
c7b8f16e
JB		 5325 s->size += VFP11_ERRATUM_VENEER_SIZE;
5326 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5327 hash_table->num_vfp11_fixes++;
906e58ca 5328
c7b8f16e
JB		 5329 /* The offset of the veneer. */
5330 return val;
5331}
5332
8029a119 5333#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5334 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5335 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5336
5337/* Create a fake section for use by the ARM backend of the linker. */
5338
5339static bfd_boolean
5340arm_make_glue_section (bfd * abfd, const char * name)
5341{
5342 asection * sec;
5343
5344 sec = bfd_get_section_by_name (abfd, name);
5345 if (sec != NULL)
5346 /* Already made. */
5347 return TRUE;
5348
5349 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5350
5351 if (sec == NULL
5352 || !bfd_set_section_alignment (abfd, sec, 2))
5353 return FALSE;
5354
5355 /* Set the gc mark to prevent the section from being removed by garbage
5356 collection, despite the fact that no relocs refer to this section. */
5357 sec->gc_mark = 1;
5358
5359 return TRUE;
5360}
5361
8afb0e02
NC		 5362/* Add the glue sections to ABFD. This function is called from the
5363 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5364
b34976b6 5365bfd_boolean
57e8b36a
NC		 5366bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5367 struct bfd_link_info *info)
252b5132 5368{
8afb0e02
NC		 5369 /* If we are only performing a partial
5370 link do not bother adding the glue. */
1049f94e 5371 if (info->relocatable)
b34976b6 5372 return TRUE;
252b5132 5373
8029a119
NC		 5374 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5375 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5376 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5377 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5378}
5379
5380/* Select a BFD to be used to hold the sections used by the glue code.
5381 This function is called from the linker scripts in ld/emultempl/
8029a119 5382 {armelf/pe}.em. */
8afb0e02 5383
b34976b6 5384bfd_boolean
57e8b36a 5385bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5386{
5387 struct elf32_arm_link_hash_table *globals;
5388
5389 /* If we are only performing a partial link
5390 do not bother getting a bfd to hold the glue. */
1049f94e 5391 if (info->relocatable)
b34976b6 5392 return TRUE;
8afb0e02 5393
b7693d02
DJ		 5394 /* Make sure we don't attach the glue sections to a dynamic object. */
5395 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5396
8afb0e02 5397 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5398 BFD_ASSERT (globals != NULL);
5399
5400 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5401 return TRUE;
8afb0e02 5402
252b5132
RH		 5403 /* Save the bfd for later use. */
5404 globals->bfd_of_glue_owner = abfd;
cedb70c5 5405
b34976b6 5406 return TRUE;
252b5132
RH		 5407}
5408
906e58ca
NC		 5409static void
5410check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5411{
104d59d1
JM		 5412 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5413 Tag_CPU_arch) > 2)
39b41c9c
PB		 5414 globals->use_blx = 1;
5415}
5416
b34976b6 5417bfd_boolean
57e8b36a 5418bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5419 struct bfd_link_info *link_info)
252b5132
RH		 5420{
5421 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5422 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5423 Elf_Internal_Rela *irel, *irelend;
5424 bfd_byte *contents = NULL;
252b5132
RH		 5425
5426 asection *sec;
5427 struct elf32_arm_link_hash_table *globals;
5428
5429 /* If we are only performing a partial link do not bother
5430 to construct any glue. */
1049f94e 5431 if (link_info->relocatable)
b34976b6 5432 return TRUE;
252b5132 5433
39ce1a6a
NC		 5434 /* Here we have a bfd that is to be included on the link. We have a
5435 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5436 globals = elf32_arm_hash_table (link_info);
252b5132 5437 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5438
5439 check_use_blx (globals);
252b5132 5440
d504ffc8 5441 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5442 {
d003868e
AM		 5443 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5444 abfd);
e489d0ae
PB		 5445 return FALSE;
5446 }
f21f3fe0 5447
39ce1a6a
NC		 5448 /* PR 5398: If we have not decided to include any loadable sections in
5449 the output then we will not have a glue owner bfd. This is OK, it
5450 just means that there is nothing else for us to do here. */
5451 if (globals->bfd_of_glue_owner == NULL)
5452 return TRUE;
5453
252b5132
RH		 5454 /* Rummage around all the relocs and map the glue vectors. */
5455 sec = abfd->sections;
5456
5457 if (sec == NULL)
b34976b6 5458 return TRUE;
252b5132
RH		 5459
5460 for (; sec != NULL; sec = sec->next)
5461 {
5462 if (sec->reloc_count == 0)
5463 continue;
5464
2f475487
AM		 5465 if ((sec->flags & SEC_EXCLUDE) != 0)
5466 continue;
5467
0ffa91dd 5468 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5469
9b485d32 5470 /* Load the relocs. */
6cdc0ccc 5471 internal_relocs
906e58ca 5472 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5473
6cdc0ccc
AM		 5474 if (internal_relocs == NULL)
5475 goto error_return;
252b5132 5476
6cdc0ccc
AM		 5477 irelend = internal_relocs + sec->reloc_count;
5478 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5479 {
5480 long r_type;
5481 unsigned long r_index;
252b5132
RH		 5482
5483 struct elf_link_hash_entry *h;
5484
5485 r_type = ELF32_R_TYPE (irel->r_info);
5486 r_index = ELF32_R_SYM (irel->r_info);
5487
9b485d32 5488 /* These are the only relocation types we care about. */
ba96a88f 5489 if ( r_type != R_ARM_PC24
845b51d6 5490 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5491 continue;
5492
5493 /* Get the section contents if we haven't done so already. */
5494 if (contents == NULL)
5495 {
5496 /* Get cached copy if it exists. */
5497 if (elf_section_data (sec)->this_hdr.contents != NULL)
5498 contents = elf_section_data (sec)->this_hdr.contents;
5499 else
5500 {
5501 /* Go get them off disk. */
57e8b36a 5502 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5503 goto error_return;
5504 }
5505 }
5506
845b51d6
PB		 5507 if (r_type == R_ARM_V4BX)
5508 {
5509 int reg;
5510
5511 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5512 record_arm_bx_glue (link_info, reg);
5513 continue;
5514 }
5515
a7c10850 5516 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5517 h = NULL;
5518
9b485d32 5519 /* We don't care about local symbols. */
252b5132
RH		 5520 if (r_index < symtab_hdr->sh_info)
5521 continue;
5522
9b485d32 5523 /* This is an external symbol. */
252b5132
RH		 5524 r_index -= symtab_hdr->sh_info;
5525 h = (struct elf_link_hash_entry *)
5526 elf_sym_hashes (abfd)[r_index];
5527
5528 /* If the relocation is against a static symbol it must be within
5529 the current section and so cannot be a cross ARM/Thumb relocation. */
5530 if (h == NULL)
5531 continue;
5532
d504ffc8
DJ		 5533 /* If the call will go through a PLT entry then we do not need
5534 glue. */
362d30a1 5535 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5536 continue;
5537
252b5132
RH		 5538 switch (r_type)
5539 {
5540 case R_ARM_PC24:
5541 /* This one is a call from arm code. We need to look up
2f0ca46a 5542 the target of the call. If it is a thumb target, we
252b5132 5543 insert glue. */
ebe24dd4 5544 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5545 record_arm_to_thumb_glue (link_info, h);
5546 break;
5547
252b5132 5548 default:
c6596c5e 5549 abort ();
252b5132
RH		 5550 }
5551 }
6cdc0ccc
AM		 5552
5553 if (contents != NULL
5554 && elf_section_data (sec)->this_hdr.contents != contents)
5555 free (contents);
5556 contents = NULL;
5557
5558 if (internal_relocs != NULL
5559 && elf_section_data (sec)->relocs != internal_relocs)
5560 free (internal_relocs);
5561 internal_relocs = NULL;
252b5132
RH		 5562 }
5563
b34976b6 5564 return TRUE;
9a5aca8c 5565
252b5132 5566error_return:
6cdc0ccc
AM		 5567 if (contents != NULL
5568 && elf_section_data (sec)->this_hdr.contents != contents)
5569 free (contents);
5570 if (internal_relocs != NULL
5571 && elf_section_data (sec)->relocs != internal_relocs)
5572 free (internal_relocs);
9a5aca8c 5573
b34976b6 5574 return FALSE;
252b5132 5575}
7e392df6 5576#endif
252b5132 5577
eb043451 5578
c7b8f16e
JB		 5579/* Initialise maps of ARM/Thumb/data for input BFDs. */
5580
5581void
5582bfd_elf32_arm_init_maps (bfd *abfd)
5583{
5584 Elf_Internal_Sym *isymbuf;
5585 Elf_Internal_Shdr *hdr;
5586 unsigned int i, localsyms;
5587
af1f4419
NC		 5588 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5589 if (! is_arm_elf (abfd))
5590 return;
5591
c7b8f16e
JB		 5592 if ((abfd->flags & DYNAMIC) != 0)
5593 return;
5594
0ffa91dd 5595 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5596 localsyms = hdr->sh_info;
5597
5598 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5599 should contain the number of local symbols, which should come before any
5600 global symbols. Mapping symbols are always local. */
5601 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5602 NULL);
5603
5604 /* No internal symbols read? Skip this BFD. */
5605 if (isymbuf == NULL)
5606 return;
5607
5608 for (i = 0; i < localsyms; i++)
5609 {
5610 Elf_Internal_Sym *isym = &isymbuf[i];
5611 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5612 const char *name;
906e58ca 5613
c7b8f16e
JB		 5614 if (sec != NULL
5615 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5616 {
5617 name = bfd_elf_string_from_elf_section (abfd,
5618 hdr->sh_link, isym->st_name);
906e58ca 5619
c7b8f16e
JB		 5620 if (bfd_is_arm_special_symbol_name (name,
5621 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5622 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5623 }
5624 }
5625}
5626
5627
48229727
JB		 5628/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5629 say what they wanted. */
5630
5631void
5632bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5633{
5634 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5635 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5636
4dfe6ac6
NC		 5637 if (globals == NULL)
5638 return;
5639
48229727
JB		 5640 if (globals->fix_cortex_a8 == -1)
5641 {
5642 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5643 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5644 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5645 || out_attr[Tag_CPU_arch_profile].i == 0))
5646 globals->fix_cortex_a8 = 1;
5647 else
5648 globals->fix_cortex_a8 = 0;
5649 }
5650}
5651
5652
c7b8f16e
JB		 5653void
5654bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5655{
5656 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5657 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5658
4dfe6ac6
NC		 5659 if (globals == NULL)
5660 return;
c7b8f16e
JB		 5661 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5662 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5663 {
5664 switch (globals->vfp11_fix)
5665 {
5666 case BFD_ARM_VFP11_FIX_DEFAULT:
5667 case BFD_ARM_VFP11_FIX_NONE:
5668 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5669 break;
906e58ca 5670
c7b8f16e
JB		 5671 default:
5672 /* Give a warning, but do as the user requests anyway. */
5673 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5674 "workaround is not necessary for target architecture"), obfd);
5675 }
5676 }
5677 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5678 /* For earlier architectures, we might need the workaround, but do not
5679 enable it by default. If users is running with broken hardware, they
5680 must enable the erratum fix explicitly. */
5681 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5682}
5683
5684
906e58ca
NC		 5685enum bfd_arm_vfp11_pipe
5686{
c7b8f16e
JB		 5687 VFP11_FMAC,
5688 VFP11_LS,
5689 VFP11_DS,
5690 VFP11_BAD
5691};
5692
5693/* Return a VFP register number. This is encoded as RX:X for single-precision
5694 registers, or X:RX for double-precision registers, where RX is the group of
5695 four bits in the instruction encoding and X is the single extension bit.
5696 RX and X fields are specified using their lowest (starting) bit. The return
5697 value is:
5698
5699 0...31: single-precision registers s0...s31
5700 32...63: double-precision registers d0...d31.
906e58ca 5701
c7b8f16e
JB		 5702 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5703 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5704
c7b8f16e
JB		 5705static unsigned int
5706bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5707 unsigned int x)
5708{
5709 if (is_double)
5710 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5711 else
5712 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5713}
5714
5715/* Set bits in *WMASK according to a register number REG as encoded by
5716 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5717
5718static void
5719bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5720{
5721 if (reg < 32)
5722 *wmask |= 1 << reg;
5723 else if (reg < 48)
5724 *wmask |= 3 << ((reg - 32) * 2);
5725}
5726
5727/* Return TRUE if WMASK overwrites anything in REGS. */
5728
5729static bfd_boolean
5730bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5731{
5732 int i;
906e58ca 5733
c7b8f16e
JB		 5734 for (i = 0; i < numregs; i++)
5735 {
5736 unsigned int reg = regs[i];
5737
5738 if (reg < 32 && (wmask & (1 << reg)) != 0)
5739 return TRUE;
906e58ca 5740
c7b8f16e
JB		 5741 reg -= 32;
5742
5743 if (reg >= 16)
5744 continue;
906e58ca 5745
c7b8f16e
JB		 5746 if ((wmask & (3 << (reg * 2))) != 0)
5747 return TRUE;
5748 }
906e58ca 5749
c7b8f16e
JB		 5750 return FALSE;
5751}
5752
5753/* In this function, we're interested in two things: finding input registers
5754 for VFP data-processing instructions, and finding the set of registers which
5755 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5756 hold the written set, so FLDM etc. are easy to deal with (we're only
5757 interested in 32 SP registers or 16 dp registers, due to the VFP version
5758 implemented by the chip in question). DP registers are marked by setting
5759 both SP registers in the write mask). */
5760
5761static enum bfd_arm_vfp11_pipe
5762bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5763 int *numregs)
5764{
91d6fa6a 5765 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 5766 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5767
5768 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5769 {
5770 unsigned int pqrs;
5771 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5772 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5773
5774 pqrs = ((insn & 0x00800000) >> 20)
5775 | ((insn & 0x00300000) >> 19)
5776 | ((insn & 0x00000040) >> 6);
5777
5778 switch (pqrs)
5779 {
5780 case 0: /* fmac[sd]. */
5781 case 1: /* fnmac[sd]. */
5782 case 2: /* fmsc[sd]. */
5783 case 3: /* fnmsc[sd]. */
91d6fa6a 5784 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5785 bfd_arm_vfp11_write_mask (destmask, fd);
5786 regs[0] = fd;
5787 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5788 regs[2] = fm;
5789 *numregs = 3;
5790 break;
5791
5792 case 4: /* fmul[sd]. */
5793 case 5: /* fnmul[sd]. */
5794 case 6: /* fadd[sd]. */
5795 case 7: /* fsub[sd]. */
91d6fa6a 5796 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5797 goto vfp_binop;
5798
5799 case 8: /* fdiv[sd]. */
91d6fa6a 5800 vpipe = VFP11_DS;
c7b8f16e
JB		 5801 vfp_binop:
5802 bfd_arm_vfp11_write_mask (destmask, fd);
5803 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5804 regs[1] = fm;
5805 *numregs = 2;
5806 break;
5807
5808 case 15: /* extended opcode. */
5809 {
5810 unsigned int extn = ((insn >> 15) & 0x1e)
5811 | ((insn >> 7) & 1);
5812
5813 switch (extn)
5814 {
5815 case 0: /* fcpy[sd]. */
5816 case 1: /* fabs[sd]. */
5817 case 2: /* fneg[sd]. */
5818 case 8: /* fcmp[sd]. */
5819 case 9: /* fcmpe[sd]. */
5820 case 10: /* fcmpz[sd]. */
5821 case 11: /* fcmpez[sd]. */
5822 case 16: /* fuito[sd]. */
5823 case 17: /* fsito[sd]. */
5824 case 24: /* ftoui[sd]. */
5825 case 25: /* ftouiz[sd]. */
5826 case 26: /* ftosi[sd]. */
5827 case 27: /* ftosiz[sd]. */
5828 /* These instructions will not bounce due to underflow. */
5829 *numregs = 0;
91d6fa6a 5830 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5831 break;
5832
5833 case 3: /* fsqrt[sd]. */
5834 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5835 registers to cause the erratum in previous instructions. */
5836 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 5837 vpipe = VFP11_DS;
c7b8f16e
JB		 5838 break;
5839
5840 case 15: /* fcvt{ds,sd}. */
5841 {
5842 int rnum = 0;
5843
5844 bfd_arm_vfp11_write_mask (destmask, fd);
5845
5846 /* Only FCVTSD can underflow. */
5847 if ((insn & 0x100) != 0)
5848 regs[rnum++] = fm;
5849
5850 *numregs = rnum;
5851
91d6fa6a 5852 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5853 }
5854 break;
5855
5856 default:
5857 return VFP11_BAD;
5858 }
5859 }
5860 break;
5861
5862 default:
5863 return VFP11_BAD;
5864 }
5865 }
5866 /* Two-register transfer. */
5867 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5868 {
5869 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5870
c7b8f16e
JB		 5871 if ((insn & 0x100000) == 0)
5872 {
5873 if (is_double)
5874 bfd_arm_vfp11_write_mask (destmask, fm);
5875 else
5876 {
5877 bfd_arm_vfp11_write_mask (destmask, fm);
5878 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5879 }
5880 }
5881
91d6fa6a 5882 vpipe = VFP11_LS;
c7b8f16e
JB		 5883 }
5884 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5885 {
5886 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5887 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5888
c7b8f16e
JB		 5889 switch (puw)
5890 {
5891 case 0: /* Two-reg transfer. We should catch these above. */
5892 abort ();
906e58ca 5893
c7b8f16e
JB		 5894 case 2: /* fldm[sdx]. */
5895 case 3:
5896 case 5:
5897 {
5898 unsigned int i, offset = insn & 0xff;
5899
5900 if (is_double)
5901 offset >>= 1;
5902
5903 for (i = fd; i < fd + offset; i++)
5904 bfd_arm_vfp11_write_mask (destmask, i);
5905 }
5906 break;
906e58ca 5907
c7b8f16e
JB		 5908 case 4: /* fld[sd]. */
5909 case 6:
5910 bfd_arm_vfp11_write_mask (destmask, fd);
5911 break;
906e58ca 5912
c7b8f16e
JB		 5913 default:
5914 return VFP11_BAD;
5915 }
5916
91d6fa6a 5917 vpipe = VFP11_LS;
c7b8f16e
JB		 5918 }
5919 /* Single-register transfer. Note L==0. */
5920 else if ((insn & 0x0f100e10) == 0x0e000a10)
5921 {
5922 unsigned int opcode = (insn >> 21) & 7;
5923 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5924
5925 switch (opcode)
5926 {
5927 case 0: /* fmsr/fmdlr. */
5928 case 1: /* fmdhr. */
5929 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5930 destination register. I don't know if this is exactly right,
5931 but it is the conservative choice. */
5932 bfd_arm_vfp11_write_mask (destmask, fn);
5933 break;
5934
5935 case 7: /* fmxr. */
5936 break;
5937 }
5938
91d6fa6a 5939 vpipe = VFP11_LS;
c7b8f16e
JB		 5940 }
5941
91d6fa6a 5942 return vpipe;
c7b8f16e
JB		 5943}
5944
5945
5946static int elf32_arm_compare_mapping (const void * a, const void * b);
5947
5948
5949/* Look for potentially-troublesome code sequences which might trigger the
5950 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5951 (available from ARM) for details of the erratum. A short version is
5952 described in ld.texinfo. */
5953
5954bfd_boolean
5955bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5956{
5957 asection *sec;
5958 bfd_byte *contents = NULL;
5959 int state = 0;
5960 int regs[3], numregs = 0;
5961 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5962 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5963
4dfe6ac6
NC		 5964 if (globals == NULL)
5965 return FALSE;
5966
c7b8f16e
JB		 5967 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5968 The states transition as follows:
906e58ca 5969
c7b8f16e
JB		 5970 0 -> 1 (vector) or 0 -> 2 (scalar)
5971 A VFP FMAC-pipeline instruction has been seen. Fill
5972 regs[0]..regs[numregs-1] with its input operands. Remember this
5973 instruction in 'first_fmac'.
5974
5975 1 -> 2
5976 Any instruction, except for a VFP instruction which overwrites
5977 regs[*].
906e58ca 5978
c7b8f16e
JB		 5979 1 -> 3 [ -> 0 ] or
5980 2 -> 3 [ -> 0 ]
5981 A VFP instruction has been seen which overwrites any of regs[*].
5982 We must make a veneer! Reset state to 0 before examining next
5983 instruction.
906e58ca 5984
c7b8f16e
JB		 5985 2 -> 0
5986 If we fail to match anything in state 2, reset to state 0 and reset
5987 the instruction pointer to the instruction after 'first_fmac'.
5988
5989 If the VFP11 vector mode is in use, there must be at least two unrelated
5990 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5991 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5992
5993 /* If we are only performing a partial link do not bother
5994 to construct any glue. */
5995 if (link_info->relocatable)
5996 return TRUE;
5997
0ffa91dd
NC		 5998 /* Skip if this bfd does not correspond to an ELF image. */
5999 if (! is_arm_elf (abfd))
6000 return TRUE;
906e58ca 6001
c7b8f16e
JB		 6002 /* We should have chosen a fix type by the time we get here. */
6003 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6004
6005 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6006 return TRUE;
2e6030b9 6007
33a7ffc2
JM		 6008 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6009 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6010 return TRUE;
6011
c7b8f16e
JB		 6012 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6013 {
6014 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6015 struct _arm_elf_section_data *sec_data;
6016
6017 /* If we don't have executable progbits, we're not interested in this
6018 section. Also skip if section is to be excluded. */
6019 if (elf_section_type (sec) != SHT_PROGBITS
6020 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6021 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6022 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6023 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6024 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6025 continue;
6026
6027 sec_data = elf32_arm_section_data (sec);
906e58ca 6028
c7b8f16e
JB		 6029 if (sec_data->mapcount == 0)
6030 continue;
906e58ca 6031
c7b8f16e
JB		 6032 if (elf_section_data (sec)->this_hdr.contents != NULL)
6033 contents = elf_section_data (sec)->this_hdr.contents;
6034 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6035 goto error_return;
6036
6037 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6038 elf32_arm_compare_mapping);
6039
6040 for (span = 0; span < sec_data->mapcount; span++)
6041 {
6042 unsigned int span_start = sec_data->map[span].vma;
6043 unsigned int span_end = (span == sec_data->mapcount - 1)
6044 ? sec->size : sec_data->map[span + 1].vma;
6045 char span_type = sec_data->map[span].type;
906e58ca 6046
c7b8f16e
JB		 6047 /* FIXME: Only ARM mode is supported at present. We may need to
6048 support Thumb-2 mode also at some point. */
6049 if (span_type != 'a')
6050 continue;
6051
6052 for (i = span_start; i < span_end;)
6053 {
6054 unsigned int next_i = i + 4;
6055 unsigned int insn = bfd_big_endian (abfd)
6056 ? (contents[i] << 24)
6057 | (contents[i + 1] << 16)
6058 | (contents[i + 2] << 8)
6059 | contents[i + 3]
6060 : (contents[i + 3] << 24)
6061 | (contents[i + 2] << 16)
6062 | (contents[i + 1] << 8)
6063 | contents[i];
6064 unsigned int writemask = 0;
91d6fa6a 6065 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6066
6067 switch (state)
6068 {
6069 case 0:
91d6fa6a 6070 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6071 &numregs);
6072 /* I'm assuming the VFP11 erratum can trigger with denorm
6073 operands on either the FMAC or the DS pipeline. This might
6074 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6075 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6076 {
6077 state = use_vector ? 1 : 2;
6078 first_fmac = i;
6079 veneer_of_insn = insn;
6080 }
6081 break;
6082
6083 case 1:
6084 {
6085 int other_regs[3], other_numregs;
91d6fa6a 6086 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6087 other_regs,
6088 &other_numregs);
91d6fa6a 6089 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6090 && bfd_arm_vfp11_antidependency (writemask, regs,
6091 numregs))
6092 state = 3;
6093 else
6094 state = 2;
6095 }
6096 break;
6097
6098 case 2:
6099 {
6100 int other_regs[3], other_numregs;
91d6fa6a 6101 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6102 other_regs,
6103 &other_numregs);
91d6fa6a 6104 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6105 && bfd_arm_vfp11_antidependency (writemask, regs,
6106 numregs))
6107 state = 3;
6108 else
6109 {
6110 state = 0;
6111 next_i = first_fmac + 4;
6112 }
6113 }
6114 break;
6115
6116 case 3:
6117 abort (); /* Should be unreachable. */
6118 }
6119
6120 if (state == 3)
6121 {
21d799b5
NC		 6122 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6123 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6124
c7e2358a 6125 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6126
6127 newerr->u.b.vfp_insn = veneer_of_insn;
6128
6129 switch (span_type)
6130 {
6131 case 'a':
6132 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6133 break;
906e58ca 6134
c7b8f16e
JB		 6135 default:
6136 abort ();
6137 }
6138
6139 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6140 first_fmac);
6141
6142 newerr->vma = -1;
6143
6144 newerr->next = sec_data->erratumlist;
6145 sec_data->erratumlist = newerr;
6146
6147 state = 0;
6148 }
6149
6150 i = next_i;
6151 }
6152 }
906e58ca 6153
c7b8f16e
JB		 6154 if (contents != NULL
6155 && elf_section_data (sec)->this_hdr.contents != contents)
6156 free (contents);
6157 contents = NULL;
6158 }
6159
6160 return TRUE;
6161
6162error_return:
6163 if (contents != NULL
6164 && elf_section_data (sec)->this_hdr.contents != contents)
6165 free (contents);
906e58ca 6166
c7b8f16e
JB		 6167 return FALSE;
6168}
6169
6170/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6171 after sections have been laid out, using specially-named symbols. */
6172
6173void
6174bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6175 struct bfd_link_info *link_info)
6176{
6177 asection *sec;
6178 struct elf32_arm_link_hash_table *globals;
6179 char *tmp_name;
906e58ca 6180
c7b8f16e
JB		 6181 if (link_info->relocatable)
6182 return;
2e6030b9
MS		 6183
6184 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6185 if (! is_arm_elf (abfd))
2e6030b9
MS		 6186 return;
6187
c7b8f16e 6188 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6189 if (globals == NULL)
6190 return;
906e58ca 6191
21d799b5
NC		 6192 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6193 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6194
6195 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6196 {
6197 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6198 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6199
c7b8f16e
JB		 6200 for (; errnode != NULL; errnode = errnode->next)
6201 {
6202 struct elf_link_hash_entry *myh;
6203 bfd_vma vma;
6204
6205 switch (errnode->type)
6206 {
6207 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6208 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6209 /* Find veneer symbol. */
6210 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6211 errnode->u.b.veneer->u.v.id);
6212
6213 myh = elf_link_hash_lookup
6214 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6215
6216 if (myh == NULL)
6217 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6218 "`%s'"), abfd, tmp_name);
6219
6220 vma = myh->root.u.def.section->output_section->vma
6221 + myh->root.u.def.section->output_offset
6222 + myh->root.u.def.value;
6223
6224 errnode->u.b.veneer->vma = vma;
6225 break;
6226
6227 case VFP11_ERRATUM_ARM_VENEER:
6228 case VFP11_ERRATUM_THUMB_VENEER:
6229 /* Find return location. */
6230 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6231 errnode->u.v.id);
6232
6233 myh = elf_link_hash_lookup
6234 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6235
6236 if (myh == NULL)
6237 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6238 "`%s'"), abfd, tmp_name);
6239
6240 vma = myh->root.u.def.section->output_section->vma
6241 + myh->root.u.def.section->output_offset
6242 + myh->root.u.def.value;
6243
6244 errnode->u.v.branch->vma = vma;
6245 break;
906e58ca 6246
c7b8f16e
JB		 6247 default:
6248 abort ();
6249 }
6250 }
6251 }
906e58ca 6252
c7b8f16e
JB		 6253 free (tmp_name);
6254}
6255
6256
eb043451
PB		 6257/* Set target relocation values needed during linking. */
6258
6259void
bf21ed78
MS		 6260bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6261 struct bfd_link_info *link_info,
eb043451 6262 int target1_is_rel,
319850b4 6263 char * target2_type,
33bfe774 6264 int fix_v4bx,
c7b8f16e 6265 int use_blx,
bf21ed78 6266 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6267 int no_enum_warn, int no_wchar_warn,
48229727 6268 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6269{
6270 struct elf32_arm_link_hash_table *globals;
6271
6272 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6273 if (globals == NULL)
6274 return;
eb043451
PB		 6275
6276 globals->target1_is_rel = target1_is_rel;
6277 if (strcmp (target2_type, "rel") == 0)
6278 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6279 else if (strcmp (target2_type, "abs") == 0)
6280 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6281 else if (strcmp (target2_type, "got-rel") == 0)
6282 globals->target2_reloc = R_ARM_GOT_PREL;
6283 else
6284 {
6285 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6286 target2_type);
6287 }
319850b4 6288 globals->fix_v4bx = fix_v4bx;
33bfe774 6289 globals->use_blx |= use_blx;
c7b8f16e 6290 globals->vfp11_fix = vfp11_fix;
27e55c4d 6291 globals->pic_veneer = pic_veneer;
48229727 6292 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6293
0ffa91dd
NC		 6294 BFD_ASSERT (is_arm_elf (output_bfd));
6295 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6296 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6297}
eb043451 6298
12a0a0fd 6299/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6300
12a0a0fd
PB		 6301static void
6302insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6303{
6304 bfd_vma upper;
6305 bfd_vma lower;
6306 int reloc_sign;
6307
6308 BFD_ASSERT ((offset & 1) == 0);
6309
6310 upper = bfd_get_16 (abfd, insn);
6311 lower = bfd_get_16 (abfd, insn + 2);
6312 reloc_sign = (offset < 0) ? 1 : 0;
6313 upper = (upper & ~(bfd_vma) 0x7ff)
6314 | ((offset >> 12) & 0x3ff)
6315 | (reloc_sign << 10);
906e58ca 6316 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6317 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6318 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6319 | ((offset >> 1) & 0x7ff);
6320 bfd_put_16 (abfd, upper, insn);
6321 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6322}
6323
9b485d32
NC		 6324/* Thumb code calling an ARM function. */
6325
252b5132 6326static int
57e8b36a
NC		 6327elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6328 const char * name,
6329 bfd * input_bfd,
6330 bfd * output_bfd,
6331 asection * input_section,
6332 bfd_byte * hit_data,
6333 asection * sym_sec,
6334 bfd_vma offset,
6335 bfd_signed_vma addend,
f2a9dd69
DJ		 6336 bfd_vma val,
6337 char **error_message)
252b5132 6338{
bcbdc74c 6339 asection * s = 0;
dc810e39 6340 bfd_vma my_offset;
252b5132 6341 long int ret_offset;
bcbdc74c
NC		 6342 struct elf_link_hash_entry * myh;
6343 struct elf32_arm_link_hash_table * globals;
252b5132 6344
f2a9dd69 6345 myh = find_thumb_glue (info, name, error_message);
252b5132 6346 if (myh == NULL)
b34976b6 6347 return FALSE;
252b5132
RH		 6348
6349 globals = elf32_arm_hash_table (info);
252b5132
RH		 6350 BFD_ASSERT (globals != NULL);
6351 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6352
6353 my_offset = myh->root.u.def.value;
6354
6355 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6356 THUMB2ARM_GLUE_SECTION_NAME);
6357
6358 BFD_ASSERT (s != NULL);
6359 BFD_ASSERT (s->contents != NULL);
6360 BFD_ASSERT (s->output_section != NULL);
6361
6362 if ((my_offset & 0x01) == 0x01)
6363 {
6364 if (sym_sec != NULL
6365 && sym_sec->owner != NULL
6366 && !INTERWORK_FLAG (sym_sec->owner))
6367 {
8f615d07 6368 (*_bfd_error_handler)
d003868e
AM		 6369 (_("%B(%s): warning: interworking not enabled.\n"
6370 " first occurrence: %B: thumb call to arm"),
6371 sym_sec->owner, input_bfd, name);
252b5132 6372
b34976b6 6373 return FALSE;
252b5132
RH		 6374 }
6375
6376 --my_offset;
6377 myh->root.u.def.value = my_offset;
6378
52ab56c2
PB		 6379 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6380 s->contents + my_offset);
252b5132 6381
52ab56c2
PB		 6382 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6383 s->contents + my_offset + 2);
252b5132
RH		 6384
6385 ret_offset =
9b485d32
NC		 6386 /* Address of destination of the stub. */
6387 ((bfd_signed_vma) val)
252b5132 6388 - ((bfd_signed_vma)
57e8b36a
NC		 6389 /* Offset from the start of the current section
6390 to the start of the stubs. */
9b485d32
NC		 6391 (s->output_offset
6392 /* Offset of the start of this stub from the start of the stubs. */
6393 + my_offset
6394 /* Address of the start of the current section. */
6395 + s->output_section->vma)
6396 /* The branch instruction is 4 bytes into the stub. */
6397 + 4
6398 /* ARM branches work from the pc of the instruction + 8. */
6399 + 8);
252b5132 6400
52ab56c2
PB		 6401 put_arm_insn (globals, output_bfd,
6402 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6403 s->contents + my_offset + 4);
252b5132
RH		 6404 }
6405
6406 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6407
427bfd90
NC		 6408 /* Now go back and fix up the original BL insn to point to here. */
6409 ret_offset =
6410 /* Address of where the stub is located. */
6411 (s->output_section->vma + s->output_offset + my_offset)
6412 /* Address of where the BL is located. */
57e8b36a
NC		 6413 - (input_section->output_section->vma + input_section->output_offset
6414 + offset)
427bfd90
NC		 6415 /* Addend in the relocation. */
6416 - addend
6417 /* Biassing for PC-relative addressing. */
6418 - 8;
252b5132 6419
12a0a0fd 6420 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6421
b34976b6 6422 return TRUE;
252b5132
RH		 6423}
6424
a4fd1a8e 6425/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6426
a4fd1a8e
PB		 6427static struct elf_link_hash_entry *
6428elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6429 const char * name,
6430 bfd * input_bfd,
6431 bfd * output_bfd,
6432 asection * sym_sec,
6433 bfd_vma val,
8029a119
NC		 6434 asection * s,
6435 char ** error_message)
252b5132 6436{
dc810e39 6437 bfd_vma my_offset;
252b5132 6438 long int ret_offset;
bcbdc74c
NC		 6439 struct elf_link_hash_entry * myh;
6440 struct elf32_arm_link_hash_table * globals;
252b5132 6441
f2a9dd69 6442 myh = find_arm_glue (info, name, error_message);
252b5132 6443 if (myh == NULL)
a4fd1a8e 6444 return NULL;
252b5132
RH		 6445
6446 globals = elf32_arm_hash_table (info);
252b5132
RH		 6447 BFD_ASSERT (globals != NULL);
6448 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6449
6450 my_offset = myh->root.u.def.value;
252b5132
RH		 6451
6452 if ((my_offset & 0x01) == 0x01)
6453 {
6454 if (sym_sec != NULL
6455 && sym_sec->owner != NULL
6456 && !INTERWORK_FLAG (sym_sec->owner))
6457 {
8f615d07 6458 (*_bfd_error_handler)
d003868e
AM		 6459 (_("%B(%s): warning: interworking not enabled.\n"
6460 " first occurrence: %B: arm call to thumb"),
6461 sym_sec->owner, input_bfd, name);
252b5132 6462 }
9b485d32 6463
252b5132
RH		 6464 --my_offset;
6465 myh->root.u.def.value = my_offset;
6466
27e55c4d
PB		 6467 if (info->shared || globals->root.is_relocatable_executable
6468 || globals->pic_veneer)
8f6277f5
PB		 6469 {
6470 /* For relocatable objects we can't use absolute addresses,
6471 so construct the address from a relative offset. */
6472 /* TODO: If the offset is small it's probably worth
6473 constructing the address with adds. */
52ab56c2
PB		 6474 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6475 s->contents + my_offset);
6476 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6477 s->contents + my_offset + 4);
6478 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6479 s->contents + my_offset + 8);
8f6277f5
PB		 6480 /* Adjust the offset by 4 for the position of the add,
6481 and 8 for the pipeline offset. */
6482 ret_offset = (val - (s->output_offset
6483 + s->output_section->vma
6484 + my_offset + 12))
6485 | 1;
6486 bfd_put_32 (output_bfd, ret_offset,
6487 s->contents + my_offset + 12);
6488 }
26079076
PB		 6489 else if (globals->use_blx)
6490 {
6491 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6492 s->contents + my_offset);
6493
6494 /* It's a thumb address. Add the low order bit. */
6495 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6496 s->contents + my_offset + 4);
6497 }
8f6277f5
PB		 6498 else
6499 {
52ab56c2
PB		 6500 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6501 s->contents + my_offset);
252b5132 6502
52ab56c2
PB		 6503 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6504 s->contents + my_offset + 4);
252b5132 6505
8f6277f5
PB		 6506 /* It's a thumb address. Add the low order bit. */
6507 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6508 s->contents + my_offset + 8);
8029a119
NC		 6509
6510 my_offset += 12;
8f6277f5 6511 }
252b5132
RH		 6512 }
6513
6514 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6515
a4fd1a8e
PB		 6516 return myh;
6517}
6518
6519/* Arm code calling a Thumb function. */
6520
6521static int
6522elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6523 const char * name,
6524 bfd * input_bfd,
6525 bfd * output_bfd,
6526 asection * input_section,
6527 bfd_byte * hit_data,
6528 asection * sym_sec,
6529 bfd_vma offset,
6530 bfd_signed_vma addend,
f2a9dd69
DJ		 6531 bfd_vma val,
6532 char **error_message)
a4fd1a8e
PB		 6533{
6534 unsigned long int tmp;
6535 bfd_vma my_offset;
6536 asection * s;
6537 long int ret_offset;
6538 struct elf_link_hash_entry * myh;
6539 struct elf32_arm_link_hash_table * globals;
6540
6541 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6542 BFD_ASSERT (globals != NULL);
6543 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6544
6545 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6546 ARM2THUMB_GLUE_SECTION_NAME);
6547 BFD_ASSERT (s != NULL);
6548 BFD_ASSERT (s->contents != NULL);
6549 BFD_ASSERT (s->output_section != NULL);
6550
6551 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6552 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6553 if (!myh)
6554 return FALSE;
6555
6556 my_offset = myh->root.u.def.value;
252b5132
RH		 6557 tmp = bfd_get_32 (input_bfd, hit_data);
6558 tmp = tmp & 0xFF000000;
6559
9b485d32 6560 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6561 ret_offset = (s->output_offset
6562 + my_offset
6563 + s->output_section->vma
6564 - (input_section->output_offset
6565 + input_section->output_section->vma
6566 + offset + addend)
6567 - 8);
9a5aca8c 6568
252b5132
RH		 6569 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6570
dc810e39 6571 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6572
b34976b6 6573 return TRUE;
252b5132
RH		 6574}
6575
a4fd1a8e
PB		 6576/* Populate Arm stub for an exported Thumb function. */
6577
6578static bfd_boolean
6579elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6580{
6581 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6582 asection * s;
6583 struct elf_link_hash_entry * myh;
6584 struct elf32_arm_link_hash_entry *eh;
6585 struct elf32_arm_link_hash_table * globals;
6586 asection *sec;
6587 bfd_vma val;
f2a9dd69 6588 char *error_message;
a4fd1a8e 6589
906e58ca 6590 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6591 /* Allocate stubs for exported Thumb functions on v4t. */
6592 if (eh->export_glue == NULL)
6593 return TRUE;
6594
6595 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6596 BFD_ASSERT (globals != NULL);
6597 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6598
6599 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6600 ARM2THUMB_GLUE_SECTION_NAME);
6601 BFD_ASSERT (s != NULL);
6602 BFD_ASSERT (s->contents != NULL);
6603 BFD_ASSERT (s->output_section != NULL);
6604
6605 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6606
6607 BFD_ASSERT (sec->output_section != NULL);
6608
a4fd1a8e
PB		 6609 val = eh->export_glue->root.u.def.value + sec->output_offset
6610 + sec->output_section->vma;
8029a119 6611
a4fd1a8e
PB		 6612 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6613 h->root.u.def.section->owner,
f2a9dd69
DJ		 6614 globals->obfd, sec, val, s,
6615 &error_message);
a4fd1a8e
PB		 6616 BFD_ASSERT (myh);
6617 return TRUE;
6618}
6619
845b51d6
PB		 6620/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6621
6622static bfd_vma
6623elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6624{
6625 bfd_byte *p;
6626 bfd_vma glue_addr;
6627 asection *s;
6628 struct elf32_arm_link_hash_table *globals;
6629
6630 globals = elf32_arm_hash_table (info);
845b51d6
PB		 6631 BFD_ASSERT (globals != NULL);
6632 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6633
6634 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6635 ARM_BX_GLUE_SECTION_NAME);
6636 BFD_ASSERT (s != NULL);
6637 BFD_ASSERT (s->contents != NULL);
6638 BFD_ASSERT (s->output_section != NULL);
6639
6640 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6641
6642 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6643
6644 if ((globals->bx_glue_offset[reg] & 1) == 0)
6645 {
6646 p = s->contents + glue_addr;
6647 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6648 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6649 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6650 globals->bx_glue_offset[reg] |= 1;
6651 }
6652
6653 return glue_addr + s->output_section->vma + s->output_offset;
6654}
6655
a4fd1a8e
PB		 6656/* Generate Arm stubs for exported Thumb symbols. */
6657static void
906e58ca 6658elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6659 struct bfd_link_info *link_info)
6660{
6661 struct elf32_arm_link_hash_table * globals;
6662
8029a119
NC		 6663 if (link_info == NULL)
6664 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6665 return;
6666
6667 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6668 if (globals == NULL)
6669 return;
6670
84c08195
PB		 6671 /* If blx is available then exported Thumb symbols are OK and there is
6672 nothing to do. */
a4fd1a8e
PB		 6673 if (globals->use_blx)
6674 return;
6675
6676 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6677 link_info);
6678}
6679
eb043451
PB		 6680/* Some relocations map to different relocations depending on the
6681 target. Return the real relocation. */
8029a119 6682
eb043451
PB		 6683static int
6684arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6685 int r_type)
6686{
6687 switch (r_type)
6688 {
6689 case R_ARM_TARGET1:
6690 if (globals->target1_is_rel)
6691 return R_ARM_REL32;
6692 else
6693 return R_ARM_ABS32;
6694
6695 case R_ARM_TARGET2:
6696 return globals->target2_reloc;
6697
6698 default:
6699 return r_type;
6700 }
6701}
eb043451 6702
ba93b8ac
DJ		 6703/* Return the base VMA address which should be subtracted from real addresses
6704 when resolving @dtpoff relocation.
6705 This is PT_TLS segment p_vaddr. */
6706
6707static bfd_vma
6708dtpoff_base (struct bfd_link_info *info)
6709{
6710 /* If tls_sec is NULL, we should have signalled an error already. */
6711 if (elf_hash_table (info)->tls_sec == NULL)
6712 return 0;
6713 return elf_hash_table (info)->tls_sec->vma;
6714}
6715
6716/* Return the relocation value for @tpoff relocation
6717 if STT_TLS virtual address is ADDRESS. */
6718
6719static bfd_vma
6720tpoff (struct bfd_link_info *info, bfd_vma address)
6721{
6722 struct elf_link_hash_table *htab = elf_hash_table (info);
6723 bfd_vma base;
6724
6725 /* If tls_sec is NULL, we should have signalled an error already. */
6726 if (htab->tls_sec == NULL)
6727 return 0;
6728 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6729 return address - htab->tls_sec->vma + base;
6730}
6731
00a97672
RS		 6732/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6733 VALUE is the relocation value. */
6734
6735static bfd_reloc_status_type
6736elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6737{
6738 if (value > 0xfff)
6739 return bfd_reloc_overflow;
6740
6741 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6742 bfd_put_32 (abfd, value, data);
6743 return bfd_reloc_ok;
6744}
6745
4962c51a
MS		 6746/* For a given value of n, calculate the value of G_n as required to
6747 deal with group relocations. We return it in the form of an
6748 encoded constant-and-rotation, together with the final residual. If n is
6749 specified as less than zero, then final_residual is filled with the
6750 input value and no further action is performed. */
6751
6752static bfd_vma
6753calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6754{
6755 int current_n;
6756 bfd_vma g_n;
6757 bfd_vma encoded_g_n = 0;
6758 bfd_vma residual = value; /* Also known as Y_n. */
6759
6760 for (current_n = 0; current_n <= n; current_n++)
6761 {
6762 int shift;
6763
6764 /* Calculate which part of the value to mask. */
6765 if (residual == 0)
6766 shift = 0;
6767 else
6768 {
6769 int msb;
6770
6771 /* Determine the most significant bit in the residual and
6772 align the resulting value to a 2-bit boundary. */
6773 for (msb = 30; msb >= 0; msb -= 2)
6774 if (residual & (3 << msb))
6775 break;
6776
6777 /* The desired shift is now (msb - 6), or zero, whichever
6778 is the greater. */
6779 shift = msb - 6;
6780 if (shift < 0)
6781 shift = 0;
6782 }
6783
6784 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6785 g_n = residual & (0xff << shift);
6786 encoded_g_n = (g_n >> shift)
6787 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6788
6789 /* Calculate the residual for the next time around. */
6790 residual &= ~g_n;
6791 }
6792
6793 *final_residual = residual;
6794
6795 return encoded_g_n;
6796}
6797
6798/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6799 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6800
4962c51a 6801static int
906e58ca 6802identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6803{
6804 int opcode = insn & 0x1e00000;
6805
6806 if (opcode == 1 << 23) /* ADD */
6807 return 1;
6808
6809 if (opcode == 1 << 22) /* SUB */
6810 return -1;
6811
6812 return 0;
6813}
6814
252b5132 6815/* Perform a relocation as part of a final link. */
9b485d32 6816
252b5132 6817static bfd_reloc_status_type
57e8b36a
NC		 6818elf32_arm_final_link_relocate (reloc_howto_type * howto,
6819 bfd * input_bfd,
6820 bfd * output_bfd,
6821 asection * input_section,
6822 bfd_byte * contents,
6823 Elf_Internal_Rela * rel,
6824 bfd_vma value,
6825 struct bfd_link_info * info,
6826 asection * sym_sec,
6827 const char * sym_name,
6828 int sym_flags,
0945cdfd 6829 struct elf_link_hash_entry * h,
f2a9dd69 6830 bfd_boolean * unresolved_reloc_p,
8029a119 6831 char ** error_message)
252b5132
RH		 6832{
6833 unsigned long r_type = howto->type;
6834 unsigned long r_symndx;
6835 bfd_byte * hit_data = contents + rel->r_offset;
252b5132
RH		 6836 bfd_vma * local_got_offsets;
6837 asection * sgot = NULL;
6838 asection * splt = NULL;
6839 asection * sreloc = NULL;
362d30a1 6840 asection * srelgot;
252b5132 6841 bfd_vma addend;
ba96a88f
NC		 6842 bfd_signed_vma signed_addend;
6843 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6844
9c504268 6845 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 6846 if (globals == NULL)
6847 return bfd_reloc_notsupported;
9c504268 6848
0ffa91dd
NC		 6849 BFD_ASSERT (is_arm_elf (input_bfd));
6850
6851 /* Some relocation types map to different relocations depending on the
9c504268 6852 target. We pick the right one here. */
eb043451
PB		 6853 r_type = arm_real_reloc_type (globals, r_type);
6854 if (r_type != howto->type)
6855 howto = elf32_arm_howto_from_type (r_type);
9c504268 6856
cac15327
NC		 6857 /* If the start address has been set, then set the EF_ARM_HASENTRY
6858 flag. Setting this more than once is redundant, but the cost is
6859 not too high, and it keeps the code simple.
99e4ae17 6860
cac15327
NC		 6861 The test is done here, rather than somewhere else, because the
6862 start address is only set just before the final link commences.
6863
6864 Note - if the user deliberately sets a start address of 0, the
6865 flag will not be set. */
6866 if (bfd_get_start_address (output_bfd) != 0)
6867 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6868
362d30a1
RS		 6869 sgot = globals->root.sgot;
6870 splt = globals->root.splt;
6871 srelgot = globals->root.srelgot;
252b5132
RH		 6872 local_got_offsets = elf_local_got_offsets (input_bfd);
6873 r_symndx = ELF32_R_SYM (rel->r_info);
6874
4e7fd91e 6875 if (globals->use_rel)
ba96a88f 6876 {
4e7fd91e
PB		 6877 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6878
6879 if (addend & ((howto->src_mask + 1) >> 1))
6880 {
6881 signed_addend = -1;
6882 signed_addend &= ~ howto->src_mask;
6883 signed_addend |= addend;
6884 }
6885 else
6886 signed_addend = addend;
ba96a88f
NC		 6887 }
6888 else
4e7fd91e 6889 addend = signed_addend = rel->r_addend;
f21f3fe0 6890
252b5132
RH		 6891 switch (r_type)
6892 {
6893 case R_ARM_NONE:
28a094c2
DJ		 6894 /* We don't need to find a value for this symbol. It's just a
6895 marker. */
6896 *unresolved_reloc_p = FALSE;
252b5132
RH		 6897 return bfd_reloc_ok;
6898
00a97672
RS		 6899 case R_ARM_ABS12:
6900 if (!globals->vxworks_p)
6901 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6902
252b5132
RH		 6903 case R_ARM_PC24:
6904 case R_ARM_ABS32:
bb224fc3 6905 case R_ARM_ABS32_NOI:
252b5132 6906 case R_ARM_REL32:
bb224fc3 6907 case R_ARM_REL32_NOI:
5b5bb741
PB		 6908 case R_ARM_CALL:
6909 case R_ARM_JUMP24:
dfc5f959 6910 case R_ARM_XPC25:
eb043451 6911 case R_ARM_PREL31:
7359ea65 6912 case R_ARM_PLT32:
7359ea65
DJ		 6913 /* Handle relocations which should use the PLT entry. ABS32/REL32
6914 will use the symbol's value, which may point to a PLT entry, but we
6915 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6916 branches in this object should go to it, except if the PLT is too
6917 far away, in which case a long branch stub should be inserted. */
bb224fc3 6918 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6919 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6920 && r_type != R_ARM_CALL
6921 && r_type != R_ARM_JUMP24
6922 && r_type != R_ARM_PLT32)
7359ea65 6923 && h != NULL
c84cd8ee 6924 && splt != NULL
7359ea65
DJ		 6925 && h->plt.offset != (bfd_vma) -1)
6926 {
c84cd8ee
DJ		 6927 /* If we've created a .plt section, and assigned a PLT entry to
6928 this function, it should not be known to bind locally. If
6929 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6930 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6931
6932 value = (splt->output_section->vma
6933 + splt->output_offset
6934 + h->plt.offset);
0945cdfd 6935 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6936 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6937 contents, rel->r_offset, value,
00a97672 6938 rel->r_addend);
7359ea65
DJ		 6939 }
6940
67687978
PB		 6941 /* When generating a shared object or relocatable executable, these
6942 relocations are copied into the output file to be resolved at
6943 run time. */
6944 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6945 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 6946 && !(globals->vxworks_p
3348747a
NS		 6947 && strcmp (input_section->output_section->name,
6948 ".tls_vars") == 0)
bb224fc3 6949 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6950 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 6951 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 6952 && (h == NULL
6953 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6954 || h->root.type != bfd_link_hash_undefweak)
6955 && r_type != R_ARM_PC24
5b5bb741
PB		 6956 && r_type != R_ARM_CALL
6957 && r_type != R_ARM_JUMP24
ee06dc07 6958 && r_type != R_ARM_PREL31
7359ea65 6959 && r_type != R_ARM_PLT32)
252b5132 6960 {
947216bf
AM		 6961 Elf_Internal_Rela outrel;
6962 bfd_byte *loc;
b34976b6 6963 bfd_boolean skip, relocate;
f21f3fe0 6964
0945cdfd
DJ		 6965 *unresolved_reloc_p = FALSE;
6966
252b5132
RH		 6967 if (sreloc == NULL)
6968 {
83bac4b0
NC		 6969 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6970 ! globals->use_rel);
f21f3fe0 6971
83bac4b0 6972 if (sreloc == NULL)
252b5132 6973 return bfd_reloc_notsupported;
252b5132 6974 }
f21f3fe0 6975
b34976b6
AM		 6976 skip = FALSE;
6977 relocate = FALSE;
f21f3fe0 6978
00a97672 6979 outrel.r_addend = addend;
c629eae0
JJ		 6980 outrel.r_offset =
6981 _bfd_elf_section_offset (output_bfd, info, input_section,
6982 rel->r_offset);
6983 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6984 skip = TRUE;
0bb2d96a 6985 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6986 skip = TRUE, relocate = TRUE;
252b5132
RH		 6987 outrel.r_offset += (input_section->output_section->vma
6988 + input_section->output_offset);
f21f3fe0 6989
252b5132 6990 if (skip)
0bb2d96a 6991 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6992 else if (h != NULL
6993 && h->dynindx != -1
7359ea65 6994 && (!info->shared
5e681ec4 6995 || !info->symbolic
f5385ebf 6996 || !h->def_regular))
5e681ec4 6997 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6998 else
6999 {
a16385dc
MM		 7000 int symbol;
7001
5e681ec4 7002 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 7003 if (sym_flags == STT_ARM_TFUNC)
7004 value |= 1;
a16385dc 7005 if (globals->symbian_p)
6366ff1e 7006 {
74541ad4
AM		 7007 asection *osec;
7008
6366ff1e
MM		 7009 /* On Symbian OS, the data segment and text segement
7010 can be relocated independently. Therefore, we
7011 must indicate the segment to which this
7012 relocation is relative. The BPABI allows us to
7013 use any symbol in the right segment; we just use
7014 the section symbol as it is convenient. (We
7015 cannot use the symbol given by "h" directly as it
74541ad4
AM		 7016 will not appear in the dynamic symbol table.)
7017
7018 Note that the dynamic linker ignores the section
7019 symbol value, so we don't subtract osec->vma
7020 from the emitted reloc addend. */
10dbd1f3 7021 if (sym_sec)
74541ad4 7022 osec = sym_sec->output_section;
10dbd1f3 7023 else
74541ad4
AM		 7024 osec = input_section->output_section;
7025 symbol = elf_section_data (osec)->dynindx;
7026 if (symbol == 0)
7027 {
7028 struct elf_link_hash_table *htab = elf_hash_table (info);
7029
7030 if ((osec->flags & SEC_READONLY) == 0
7031 && htab->data_index_section != NULL)
7032 osec = htab->data_index_section;
7033 else
7034 osec = htab->text_index_section;
7035 symbol = elf_section_data (osec)->dynindx;
7036 }
6366ff1e
MM		 7037 BFD_ASSERT (symbol != 0);
7038 }
a16385dc
MM		 7039 else
7040 /* On SVR4-ish systems, the dynamic loader cannot
7041 relocate the text and data segments independently,
7042 so the symbol does not matter. */
7043 symbol = 0;
7044 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 7045 if (globals->use_rel)
7046 relocate = TRUE;
7047 else
7048 outrel.r_addend += value;
252b5132 7049 }
f21f3fe0 7050
947216bf 7051 loc = sreloc->contents;
00a97672
RS		 7052 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
7053 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 7054
f21f3fe0 7055 /* If this reloc is against an external symbol, we do not want to
252b5132 7056 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 7057 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 7058 if (! relocate)
7059 return bfd_reloc_ok;
9a5aca8c 7060
f21f3fe0 7061 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 7062 contents, rel->r_offset, value,
7063 (bfd_vma) 0);
7064 }
7065 else switch (r_type)
7066 {
00a97672
RS		 7067 case R_ARM_ABS12:
7068 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7069
dfc5f959 7070 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 7071 case R_ARM_CALL:
7072 case R_ARM_JUMP24:
8029a119 7073 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 7074 case R_ARM_PLT32:
906e58ca 7075 {
906e58ca
NC		 7076 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7077
dfc5f959 7078 if (r_type == R_ARM_XPC25)
252b5132 7079 {
dfc5f959
NC		 7080 /* Check for Arm calling Arm function. */
7081 /* FIXME: Should we translate the instruction into a BL
7082 instruction instead ? */
7083 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 7084 (*_bfd_error_handler)
7085 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7086 input_bfd,
7087 h ? h->root.root.string : "(local)");
dfc5f959 7088 }
155d87d7 7089 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7090 {
7091 /* Check for Arm calling Thumb function. */
7092 if (sym_flags == STT_ARM_TFUNC)
7093 {
f2a9dd69
DJ		 7094 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7095 output_bfd, input_section,
7096 hit_data, sym_sec, rel->r_offset,
7097 signed_addend, value,
7098 error_message))
7099 return bfd_reloc_ok;
7100 else
7101 return bfd_reloc_dangerous;
dfc5f959 7102 }
252b5132 7103 }
ba96a88f 7104
906e58ca 7105 /* Check if a stub has to be inserted because the
8029a119 7106 destination is too far or we are changing mode. */
155d87d7
CL		 7107 if ( r_type == R_ARM_CALL
7108 || r_type == R_ARM_JUMP24
7109 || r_type == R_ARM_PLT32)
906e58ca 7110 {
fe33d2fa
CL		 7111 enum elf32_arm_stub_type stub_type = arm_stub_none;
7112 struct elf32_arm_link_hash_entry *hash;
7113
7114 hash = (struct elf32_arm_link_hash_entry *) h;
7115 stub_type = arm_type_of_stub (info, input_section, rel,
7116 &sym_flags, hash,
7117 value, sym_sec,
7118 input_bfd, sym_name);
5fa9e92f 7119
fe33d2fa 7120 if (stub_type != arm_stub_none)
906e58ca
NC		 7121 {
7122 /* The target is out of reach, so redirect the
7123 branch to the local stub for this function. */
7124
7125 stub_entry = elf32_arm_get_stub_entry (input_section,
7126 sym_sec, h,
fe33d2fa
CL		 7127 rel, globals,
7128 stub_type);
906e58ca
NC		 7129 if (stub_entry != NULL)
7130 value = (stub_entry->stub_offset
7131 + stub_entry->stub_sec->output_offset
7132 + stub_entry->stub_sec->output_section->vma);
7133 }
fe33d2fa
CL		 7134 else
7135 {
7136 /* If the call goes through a PLT entry, make sure to
7137 check distance to the right destination address. */
7138 if (h != NULL
7139 && splt != NULL
7140 && h->plt.offset != (bfd_vma) -1)
7141 {
7142 value = (splt->output_section->vma
7143 + splt->output_offset
7144 + h->plt.offset);
7145 *unresolved_reloc_p = FALSE;
7146 /* The PLT entry is in ARM mode, regardless of the
7147 target function. */
7148 sym_flags = STT_FUNC;
7149 }
7150 }
906e58ca
NC		 7151 }
7152
dea514f5
PB		 7153 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7154 where:
7155 S is the address of the symbol in the relocation.
7156 P is address of the instruction being relocated.
7157 A is the addend (extracted from the instruction) in bytes.
7158
7159 S is held in 'value'.
7160 P is the base address of the section containing the
7161 instruction plus the offset of the reloc into that
7162 section, ie:
7163 (input_section->output_section->vma +
7164 input_section->output_offset +
7165 rel->r_offset).
7166 A is the addend, converted into bytes, ie:
7167 (signed_addend * 4)
7168
7169 Note: None of these operations have knowledge of the pipeline
7170 size of the processor, thus it is up to the assembler to
7171 encode this information into the addend. */
7172 value -= (input_section->output_section->vma
7173 + input_section->output_offset);
7174 value -= rel->r_offset;
4e7fd91e
PB		 7175 if (globals->use_rel)
7176 value += (signed_addend << howto->size);
7177 else
7178 /* RELA addends do not have to be adjusted by howto->size. */
7179 value += signed_addend;
23080146 7180
dcb5e6e6
NC		 7181 signed_addend = value;
7182 signed_addend >>= howto->rightshift;
9a5aca8c 7183
5ab79981 7184 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7185 the next instruction unless a PLT entry will be created.
77b4f08f 7186 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 7187 The jump to the next instruction is optimized as a NOP depending
7188 on the architecture. */
ffcb4889
NS		 7189 if (h ? (h->root.type == bfd_link_hash_undefweak
7190 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
77b4f08f 7191 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 7192 {
cd1dac3d
DG		 7193 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7194
7195 if (arch_has_arm_nop (globals))
7196 value |= 0x0320f000;
7197 else
7198 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7199 }
7200 else
59f2c4e7 7201 {
9b485d32 7202 /* Perform a signed range check. */
dcb5e6e6 7203 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7204 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7205 return bfd_reloc_overflow;
9a5aca8c 7206
5ab79981 7207 addend = (value & 2);
39b41c9c 7208
5ab79981
PB		 7209 value = (signed_addend & howto->dst_mask)
7210 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7211
5ab79981
PB		 7212 if (r_type == R_ARM_CALL)
7213 {
155d87d7
CL		 7214 /* Set the H bit in the BLX instruction. */
7215 if (sym_flags == STT_ARM_TFUNC)
7216 {
7217 if (addend)
7218 value |= (1 << 24);
7219 else
7220 value &= ~(bfd_vma)(1 << 24);
7221 }
7222
5ab79981 7223 /* Select the correct instruction (BL or BLX). */
906e58ca 7224 /* Only if we are not handling a BL to a stub. In this
8029a119 7225 case, mode switching is performed by the stub. */
906e58ca 7226 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7227 value |= (1 << 28);
7228 else
7229 {
7230 value &= ~(bfd_vma)(1 << 28);
7231 value |= (1 << 24);
7232 }
39b41c9c
PB		 7233 }
7234 }
906e58ca 7235 }
252b5132 7236 break;
f21f3fe0 7237
252b5132
RH		 7238 case R_ARM_ABS32:
7239 value += addend;
7240 if (sym_flags == STT_ARM_TFUNC)
7241 value |= 1;
7242 break;
f21f3fe0 7243
bb224fc3
MS		 7244 case R_ARM_ABS32_NOI:
7245 value += addend;
7246 break;
7247
252b5132 7248 case R_ARM_REL32:
a8bc6c78
PB		 7249 value += addend;
7250 if (sym_flags == STT_ARM_TFUNC)
7251 value |= 1;
252b5132 7252 value -= (input_section->output_section->vma
62efb346 7253 + input_section->output_offset + rel->r_offset);
252b5132 7254 break;
eb043451 7255
bb224fc3
MS		 7256 case R_ARM_REL32_NOI:
7257 value += addend;
7258 value -= (input_section->output_section->vma
7259 + input_section->output_offset + rel->r_offset);
7260 break;
7261
eb043451
PB		 7262 case R_ARM_PREL31:
7263 value -= (input_section->output_section->vma
7264 + input_section->output_offset + rel->r_offset);
7265 value += signed_addend;
7266 if (! h || h->root.type != bfd_link_hash_undefweak)
7267 {
8029a119 7268 /* Check for overflow. */
eb043451
PB		 7269 if ((value ^ (value >> 1)) & (1 << 30))
7270 return bfd_reloc_overflow;
7271 }
7272 value &= 0x7fffffff;
7273 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7274 if (sym_flags == STT_ARM_TFUNC)
7275 value |= 1;
7276 break;
252b5132 7277 }
f21f3fe0 7278
252b5132
RH		 7279 bfd_put_32 (input_bfd, value, hit_data);
7280 return bfd_reloc_ok;
7281
7282 case R_ARM_ABS8:
7283 value += addend;
4e67d4ca
DG		 7284
7285 /* There is no way to tell whether the user intended to use a signed or
7286 unsigned addend. When checking for overflow we accept either,
7287 as specified by the AAELF. */
7288 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 7289 return bfd_reloc_overflow;
7290
7291 bfd_put_8 (input_bfd, value, hit_data);
7292 return bfd_reloc_ok;
7293
7294 case R_ARM_ABS16:
7295 value += addend;
7296
4e67d4ca
DG		 7297 /* See comment for R_ARM_ABS8. */
7298 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 7299 return bfd_reloc_overflow;
7300
7301 bfd_put_16 (input_bfd, value, hit_data);
7302 return bfd_reloc_ok;
7303
252b5132 7304 case R_ARM_THM_ABS5:
9b485d32 7305 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7306 if (globals->use_rel)
7307 {
7308 /* Need to refetch addend. */
7309 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7310 /* ??? Need to determine shift amount from operand size. */
7311 addend >>= howto->rightshift;
7312 }
252b5132
RH		 7313 value += addend;
7314
7315 /* ??? Isn't value unsigned? */
7316 if ((long) value > 0x1f || (long) value < -0x10)
7317 return bfd_reloc_overflow;
7318
7319 /* ??? Value needs to be properly shifted into place first. */
7320 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7321 bfd_put_16 (input_bfd, value, hit_data);
7322 return bfd_reloc_ok;
7323
2cab6cc3
MS		 7324 case R_ARM_THM_ALU_PREL_11_0:
7325 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7326 {
7327 bfd_vma insn;
7328 bfd_signed_vma relocation;
7329
7330 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7331 | bfd_get_16 (input_bfd, hit_data + 2);
7332
7333 if (globals->use_rel)
7334 {
7335 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7336 | ((insn & (1 << 26)) >> 15);
7337 if (insn & 0xf00000)
7338 signed_addend = -signed_addend;
7339 }
7340
7341 relocation = value + signed_addend;
7342 relocation -= (input_section->output_section->vma
7343 + input_section->output_offset
7344 + rel->r_offset);
7345
7346 value = abs (relocation);
7347
7348 if (value >= 0x1000)
7349 return bfd_reloc_overflow;
7350
7351 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7352 | ((value & 0x700) << 4)
7353 | ((value & 0x800) << 15);
7354 if (relocation < 0)
7355 insn |= 0xa00000;
7356
7357 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7358 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7359
7360 return bfd_reloc_ok;
7361 }
7362
e1ec24c6
NC		 7363 case R_ARM_THM_PC8:
7364 /* PR 10073: This reloc is not generated by the GNU toolchain,
7365 but it is supported for compatibility with third party libraries
7366 generated by other compilers, specifically the ARM/IAR. */
7367 {
7368 bfd_vma insn;
7369 bfd_signed_vma relocation;
7370
7371 insn = bfd_get_16 (input_bfd, hit_data);
7372
7373 if (globals->use_rel)
7374 addend = (insn & 0x00ff) << 2;
7375
7376 relocation = value + addend;
7377 relocation -= (input_section->output_section->vma
7378 + input_section->output_offset
7379 + rel->r_offset);
7380
7381 value = abs (relocation);
7382
7383 /* We do not check for overflow of this reloc. Although strictly
7384 speaking this is incorrect, it appears to be necessary in order
7385 to work with IAR generated relocs. Since GCC and GAS do not
7386 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7387 a problem for them. */
7388 value &= 0x3fc;
7389
7390 insn = (insn & 0xff00) | (value >> 2);
7391
7392 bfd_put_16 (input_bfd, insn, hit_data);
7393
7394 return bfd_reloc_ok;
7395 }
7396
2cab6cc3
MS		 7397 case R_ARM_THM_PC12:
7398 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7399 {
7400 bfd_vma insn;
7401 bfd_signed_vma relocation;
7402
7403 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7404 | bfd_get_16 (input_bfd, hit_data + 2);
7405
7406 if (globals->use_rel)
7407 {
7408 signed_addend = insn & 0xfff;
7409 if (!(insn & (1 << 23)))
7410 signed_addend = -signed_addend;
7411 }
7412
7413 relocation = value + signed_addend;
7414 relocation -= (input_section->output_section->vma
7415 + input_section->output_offset
7416 + rel->r_offset);
7417
7418 value = abs (relocation);
7419
7420 if (value >= 0x1000)
7421 return bfd_reloc_overflow;
7422
7423 insn = (insn & 0xff7ff000) | value;
7424 if (relocation >= 0)
7425 insn |= (1 << 23);
7426
7427 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7428 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7429
7430 return bfd_reloc_ok;
7431 }
7432
dfc5f959 7433 case R_ARM_THM_XPC22:
c19d1205 7434 case R_ARM_THM_CALL:
bd97cb95 7435 case R_ARM_THM_JUMP24:
dfc5f959 7436 /* Thumb BL (branch long instruction). */
252b5132 7437 {
b34976b6 7438 bfd_vma relocation;
e95de063 7439 bfd_vma reloc_sign;
b34976b6
AM		 7440 bfd_boolean overflow = FALSE;
7441 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7442 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7443 bfd_signed_vma reloc_signed_max;
7444 bfd_signed_vma reloc_signed_min;
b34976b6 7445 bfd_vma check;
252b5132 7446 bfd_signed_vma signed_check;
e95de063 7447 int bitsize;
cd1dac3d 7448 const int thumb2 = using_thumb2 (globals);
252b5132 7449
5ab79981 7450 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7451 the next instruction unless a PLT entry will be created.
7452 The jump to the next instruction is optimized as a NOP.W for
7453 Thumb-2 enabled architectures. */
19540007
JM		 7454 if (h && h->root.type == bfd_link_hash_undefweak
7455 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7456 {
cd1dac3d
DG		 7457 if (arch_has_thumb2_nop (globals))
7458 {
7459 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7460 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7461 }
7462 else
7463 {
7464 bfd_put_16 (input_bfd, 0xe000, hit_data);
7465 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7466 }
5ab79981
PB		 7467 return bfd_reloc_ok;
7468 }
7469
e95de063
MS		 7470 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7471 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7472 if (globals->use_rel)
7473 {
e95de063
MS		 7474 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7475 bfd_vma upper = upper_insn & 0x3ff;
7476 bfd_vma lower = lower_insn & 0x7ff;
7477 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7478 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7479 bfd_vma i1 = j1 ^ s ? 0 : 1;
7480 bfd_vma i2 = j2 ^ s ? 0 : 1;
7481
7482 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7483 /* Sign extend. */
7484 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7485
4e7fd91e
PB		 7486 signed_addend = addend;
7487 }
cb1afa5c 7488
dfc5f959
NC		 7489 if (r_type == R_ARM_THM_XPC22)
7490 {
7491 /* Check for Thumb to Thumb call. */
7492 /* FIXME: Should we translate the instruction into a BL
7493 instruction instead ? */
7494 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7495 (*_bfd_error_handler)
7496 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7497 input_bfd,
7498 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7499 }
7500 else
252b5132 7501 {
dfc5f959
NC		 7502 /* If it is not a call to Thumb, assume call to Arm.
7503 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7504 function call at all, but rather a long jump. Calls through
7505 the PLT do not require stubs. */
7506 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7507 && (h == NULL || splt == NULL
7508 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7509 {
bd97cb95 7510 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7511 {
7512 /* Convert BL to BLX. */
7513 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7514 }
155d87d7
CL		 7515 else if (( r_type != R_ARM_THM_CALL)
7516 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7517 {
7518 if (elf32_thumb_to_arm_stub
7519 (info, sym_name, input_bfd, output_bfd, input_section,
7520 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7521 error_message))
7522 return bfd_reloc_ok;
7523 else
7524 return bfd_reloc_dangerous;
7525 }
da5938a2 7526 }
bd97cb95
DJ		 7527 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7528 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7529 {
7530 /* Make sure this is a BL. */
7531 lower_insn |= 0x1800;
7532 }
252b5132 7533 }
f21f3fe0 7534
fe33d2fa 7535 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 7536 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7537 {
7538 /* Check if a stub has to be inserted because the destination
8029a119 7539 is too far. */
fe33d2fa
CL		 7540 struct elf32_arm_stub_hash_entry *stub_entry;
7541 struct elf32_arm_link_hash_entry *hash;
7542
7543 hash = (struct elf32_arm_link_hash_entry *) h;
7544
7545 stub_type = arm_type_of_stub (info, input_section, rel,
7546 &sym_flags, hash, value, sym_sec,
7547 input_bfd, sym_name);
7548
7549 if (stub_type != arm_stub_none)
906e58ca
NC		 7550 {
7551 /* The target is out of reach or we are changing modes, so
7552 redirect the branch to the local stub for this
7553 function. */
7554 stub_entry = elf32_arm_get_stub_entry (input_section,
7555 sym_sec, h,
fe33d2fa
CL		 7556 rel, globals,
7557 stub_type);
906e58ca
NC		 7558 if (stub_entry != NULL)
7559 value = (stub_entry->stub_offset
7560 + stub_entry->stub_sec->output_offset
7561 + stub_entry->stub_sec->output_section->vma);
7562
f4ac8484 7563 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7564 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7565 {
7566 if ((stub_entry
7567 && !arm_stub_is_thumb (stub_entry->stub_type))
7568 || (sym_flags != STT_ARM_TFUNC))
7569 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7570 }
906e58ca
NC		 7571 }
7572 }
7573
fe33d2fa
CL		 7574 /* Handle calls via the PLT. */
7575 if (stub_type == arm_stub_none
7576 && h != NULL
7577 && splt != NULL
7578 && h->plt.offset != (bfd_vma) -1)
7579 {
7580 value = (splt->output_section->vma
7581 + splt->output_offset
7582 + h->plt.offset);
7583
7584 if (globals->use_blx && r_type == R_ARM_THM_CALL)
7585 {
7586 /* If the Thumb BLX instruction is available, convert
7587 the BL to a BLX instruction to call the ARM-mode
7588 PLT entry. */
7589 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7590 sym_flags = STT_FUNC;
7591 }
7592 else
7593 {
7594 /* Target the Thumb stub before the ARM PLT entry. */
7595 value -= PLT_THUMB_STUB_SIZE;
7596 sym_flags = STT_ARM_TFUNC;
7597 }
7598 *unresolved_reloc_p = FALSE;
7599 }
7600
ba96a88f 7601 relocation = value + signed_addend;
f21f3fe0 7602
252b5132 7603 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7604 + input_section->output_offset
7605 + rel->r_offset);
9a5aca8c 7606
252b5132
RH		 7607 check = relocation >> howto->rightshift;
7608
7609 /* If this is a signed value, the rightshift just dropped
7610 leading 1 bits (assuming twos complement). */
7611 if ((bfd_signed_vma) relocation >= 0)
7612 signed_check = check;
7613 else
7614 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7615
e95de063
MS		 7616 /* Calculate the permissable maximum and minimum values for
7617 this relocation according to whether we're relocating for
7618 Thumb-2 or not. */
7619 bitsize = howto->bitsize;
7620 if (!thumb2)
7621 bitsize -= 2;
f6ebfac0 7622 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 7623 reloc_signed_min = ~reloc_signed_max;
7624
252b5132 7625 /* Assumes two's complement. */
ba96a88f 7626 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7627 overflow = TRUE;
252b5132 7628
bd97cb95 7629 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7630 /* For a BLX instruction, make sure that the relocation is rounded up
7631 to a word boundary. This follows the semantics of the instruction
7632 which specifies that bit 1 of the target address will come from bit
7633 1 of the base address. */
7634 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7635
e95de063
MS		 7636 /* Put RELOCATION back into the insn. Assumes two's complement.
7637 We use the Thumb-2 encoding, which is safe even if dealing with
7638 a Thumb-1 instruction by virtue of our overflow check above. */
7639 reloc_sign = (signed_check < 0) ? 1 : 0;
7640 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7641 | ((relocation >> 12) & 0x3ff)
7642 | (reloc_sign << 10);
906e58ca 7643 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7644 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7645 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7646 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7647
252b5132
RH		 7648 /* Put the relocated value back in the object file: */
7649 bfd_put_16 (input_bfd, upper_insn, hit_data);
7650 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7651
7652 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7653 }
7654 break;
7655
c19d1205
ZW		 7656 case R_ARM_THM_JUMP19:
7657 /* Thumb32 conditional branch instruction. */
7658 {
7659 bfd_vma relocation;
7660 bfd_boolean overflow = FALSE;
7661 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7662 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7663 bfd_signed_vma reloc_signed_max = 0xffffe;
7664 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7665 bfd_signed_vma signed_check;
7666
7667 /* Need to refetch the addend, reconstruct the top three bits,
7668 and squish the two 11 bit pieces together. */
7669 if (globals->use_rel)
7670 {
7671 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7672 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7673 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7674 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7675 bfd_vma lower = (lower_insn & 0x07ff);
7676
a00a1f35
MS		 7677 upper |= J1 << 6;
7678 upper |= J2 << 7;
7679 upper |= (!S) << 8;
c19d1205
ZW		 7680 upper -= 0x0100; /* Sign extend. */
7681
7682 addend = (upper << 12) | (lower << 1);
7683 signed_addend = addend;
7684 }
7685
bd97cb95
DJ		 7686 /* Handle calls via the PLT. */
7687 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7688 {
7689 value = (splt->output_section->vma
7690 + splt->output_offset
7691 + h->plt.offset);
7692 /* Target the Thumb stub before the ARM PLT entry. */
7693 value -= PLT_THUMB_STUB_SIZE;
7694 *unresolved_reloc_p = FALSE;
7695 }
7696
c19d1205
ZW		 7697 /* ??? Should handle interworking? GCC might someday try to
7698 use this for tail calls. */
7699
7700 relocation = value + signed_addend;
7701 relocation -= (input_section->output_section->vma
7702 + input_section->output_offset
7703 + rel->r_offset);
a00a1f35 7704 signed_check = (bfd_signed_vma) relocation;
c19d1205 7705
c19d1205
ZW		 7706 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7707 overflow = TRUE;
7708
7709 /* Put RELOCATION back into the insn. */
7710 {
7711 bfd_vma S = (relocation & 0x00100000) >> 20;
7712 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7713 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7714 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7715 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7716
a00a1f35 7717 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7718 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7719 }
7720
7721 /* Put the relocated value back in the object file: */
7722 bfd_put_16 (input_bfd, upper_insn, hit_data);
7723 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7724
7725 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7726 }
7727
7728 case R_ARM_THM_JUMP11:
7729 case R_ARM_THM_JUMP8:
7730 case R_ARM_THM_JUMP6:
51c5503b
NC		 7731 /* Thumb B (branch) instruction). */
7732 {
6cf9e9fe 7733 bfd_signed_vma relocation;
51c5503b
NC		 7734 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7735 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7736 bfd_signed_vma signed_check;
7737
c19d1205
ZW		 7738 /* CZB cannot jump backward. */
7739 if (r_type == R_ARM_THM_JUMP6)
7740 reloc_signed_min = 0;
7741
4e7fd91e 7742 if (globals->use_rel)
6cf9e9fe 7743 {
4e7fd91e
PB		 7744 /* Need to refetch addend. */
7745 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7746 if (addend & ((howto->src_mask + 1) >> 1))
7747 {
7748 signed_addend = -1;
7749 signed_addend &= ~ howto->src_mask;
7750 signed_addend |= addend;
7751 }
7752 else
7753 signed_addend = addend;
7754 /* The value in the insn has been right shifted. We need to
7755 undo this, so that we can perform the address calculation
7756 in terms of bytes. */
7757 signed_addend <<= howto->rightshift;
6cf9e9fe 7758 }
6cf9e9fe 7759 relocation = value + signed_addend;
51c5503b
NC		 7760
7761 relocation -= (input_section->output_section->vma
7762 + input_section->output_offset
7763 + rel->r_offset);
7764
6cf9e9fe
NC		 7765 relocation >>= howto->rightshift;
7766 signed_check = relocation;
c19d1205
ZW		 7767
7768 if (r_type == R_ARM_THM_JUMP6)
7769 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7770 else
7771 relocation &= howto->dst_mask;
51c5503b 7772 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7773
51c5503b
NC		 7774 bfd_put_16 (input_bfd, relocation, hit_data);
7775
7776 /* Assumes two's complement. */
7777 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7778 return bfd_reloc_overflow;
7779
7780 return bfd_reloc_ok;
7781 }
cedb70c5 7782
8375c36b
PB		 7783 case R_ARM_ALU_PCREL7_0:
7784 case R_ARM_ALU_PCREL15_8:
7785 case R_ARM_ALU_PCREL23_15:
7786 {
7787 bfd_vma insn;
7788 bfd_vma relocation;
7789
7790 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7791 if (globals->use_rel)
7792 {
7793 /* Extract the addend. */
7794 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7795 signed_addend = addend;
7796 }
8375c36b
PB		 7797 relocation = value + signed_addend;
7798
7799 relocation -= (input_section->output_section->vma
7800 + input_section->output_offset
7801 + rel->r_offset);
7802 insn = (insn & ~0xfff)
7803 | ((howto->bitpos << 7) & 0xf00)
7804 | ((relocation >> howto->bitpos) & 0xff);
7805 bfd_put_32 (input_bfd, value, hit_data);
7806 }
7807 return bfd_reloc_ok;
7808
252b5132
RH		 7809 case R_ARM_GNU_VTINHERIT:
7810 case R_ARM_GNU_VTENTRY:
7811 return bfd_reloc_ok;
7812
c19d1205 7813 case R_ARM_GOTOFF32:
252b5132
RH		 7814 /* Relocation is relative to the start of the
7815 global offset table. */
7816
7817 BFD_ASSERT (sgot != NULL);
7818 if (sgot == NULL)
7819 return bfd_reloc_notsupported;
9a5aca8c 7820
cedb70c5 7821 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7822 address by one, so that attempts to call the function pointer will
7823 correctly interpret it as Thumb code. */
7824 if (sym_flags == STT_ARM_TFUNC)
7825 value += 1;
7826
252b5132
RH		 7827 /* Note that sgot->output_offset is not involved in this
7828 calculation. We always want the start of .got. If we
7829 define _GLOBAL_OFFSET_TABLE in a different way, as is
7830 permitted by the ABI, we might have to change this
9b485d32 7831 calculation. */
252b5132 7832 value -= sgot->output_section->vma;
f21f3fe0 7833 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7834 contents, rel->r_offset, value,
00a97672 7835 rel->r_addend);
252b5132
RH		 7836
7837 case R_ARM_GOTPC:
a7c10850 7838 /* Use global offset table as symbol value. */
252b5132 7839 BFD_ASSERT (sgot != NULL);
f21f3fe0 7840
252b5132
RH		 7841 if (sgot == NULL)
7842 return bfd_reloc_notsupported;
7843
0945cdfd 7844 *unresolved_reloc_p = FALSE;
252b5132 7845 value = sgot->output_section->vma;
f21f3fe0 7846 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7847 contents, rel->r_offset, value,
00a97672 7848 rel->r_addend);
f21f3fe0 7849
252b5132 7850 case R_ARM_GOT32:
eb043451 7851 case R_ARM_GOT_PREL:
252b5132 7852 /* Relocation is to the entry for this symbol in the
9b485d32 7853 global offset table. */
252b5132
RH		 7854 if (sgot == NULL)
7855 return bfd_reloc_notsupported;
f21f3fe0 7856
252b5132
RH		 7857 if (h != NULL)
7858 {
7859 bfd_vma off;
5e681ec4 7860 bfd_boolean dyn;
f21f3fe0 7861
252b5132
RH		 7862 off = h->got.offset;
7863 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7864 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7865
5e681ec4 7866 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7867 || (info->shared
5e681ec4
PB		 7868 && SYMBOL_REFERENCES_LOCAL (info, h))
7869 || (ELF_ST_VISIBILITY (h->other)
7870 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7871 {
7872 /* This is actually a static link, or it is a -Bsymbolic link
7873 and the symbol is defined locally. We must initialize this
7874 entry in the global offset table. Since the offset must
7875 always be a multiple of 4, we use the least significant bit
7876 to record whether we have initialized it already.
f21f3fe0 7877
00a97672 7878 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7879 entry to initialize the value. This is done in the
9b485d32 7880 finish_dynamic_symbol routine. */
252b5132
RH		 7881 if ((off & 1) != 0)
7882 off &= ~1;
7883 else
7884 {
ee29b9fb
RE		 7885 /* If we are addressing a Thumb function, we need to
7886 adjust the address by one, so that attempts to
7887 call the function pointer will correctly
7888 interpret it as Thumb code. */
7889 if (sym_flags == STT_ARM_TFUNC)
7890 value |= 1;
7891
252b5132
RH		 7892 bfd_put_32 (output_bfd, value, sgot->contents + off);
7893 h->got.offset |= 1;
7894 }
7895 }
0945cdfd
DJ		 7896 else
7897 *unresolved_reloc_p = FALSE;
f21f3fe0 7898
252b5132
RH		 7899 value = sgot->output_offset + off;
7900 }
7901 else
7902 {
7903 bfd_vma off;
f21f3fe0 7904
252b5132
RH		 7905 BFD_ASSERT (local_got_offsets != NULL &&
7906 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7907
252b5132 7908 off = local_got_offsets[r_symndx];
f21f3fe0 7909
252b5132
RH		 7910 /* The offset must always be a multiple of 4. We use the
7911 least significant bit to record whether we have already
9b485d32 7912 generated the necessary reloc. */
252b5132
RH		 7913 if ((off & 1) != 0)
7914 off &= ~1;
7915 else
7916 {
b7693d02
DJ		 7917 /* If we are addressing a Thumb function, we need to
7918 adjust the address by one, so that attempts to
7919 call the function pointer will correctly
7920 interpret it as Thumb code. */
7921 if (sym_flags == STT_ARM_TFUNC)
7922 value |= 1;
7923
00a97672
RS		 7924 if (globals->use_rel)
7925 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7926
252b5132
RH		 7927 if (info->shared)
7928 {
947216bf
AM		 7929 Elf_Internal_Rela outrel;
7930 bfd_byte *loc;
f21f3fe0 7931
252b5132 7932 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7933
00a97672 7934 outrel.r_addend = addend + value;
252b5132 7935 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7936 + sgot->output_offset
252b5132
RH		 7937 + off);
7938 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7939 loc = srelgot->contents;
00a97672
RS		 7940 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7941 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7942 }
f21f3fe0 7943
252b5132
RH		 7944 local_got_offsets[r_symndx] |= 1;
7945 }
f21f3fe0 7946
252b5132
RH		 7947 value = sgot->output_offset + off;
7948 }
eb043451
PB		 7949 if (r_type != R_ARM_GOT32)
7950 value += sgot->output_section->vma;
9a5aca8c 7951
f21f3fe0 7952 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7953 contents, rel->r_offset, value,
00a97672 7954 rel->r_addend);
f21f3fe0 7955
ba93b8ac
DJ		 7956 case R_ARM_TLS_LDO32:
7957 value = value - dtpoff_base (info);
7958
7959 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7960 contents, rel->r_offset, value,
7961 rel->r_addend);
ba93b8ac
DJ		 7962
7963 case R_ARM_TLS_LDM32:
7964 {
7965 bfd_vma off;
7966
362d30a1 7967 if (sgot == NULL)
ba93b8ac
DJ		 7968 abort ();
7969
7970 off = globals->tls_ldm_got.offset;
7971
7972 if ((off & 1) != 0)
7973 off &= ~1;
7974 else
7975 {
7976 /* If we don't know the module number, create a relocation
7977 for it. */
7978 if (info->shared)
7979 {
7980 Elf_Internal_Rela outrel;
7981 bfd_byte *loc;
7982
362d30a1 7983 if (srelgot == NULL)
ba93b8ac
DJ		 7984 abort ();
7985
00a97672 7986 outrel.r_addend = 0;
362d30a1
RS		 7987 outrel.r_offset = (sgot->output_section->vma
7988 + sgot->output_offset + off);
ba93b8ac
DJ		 7989 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7990
00a97672
RS		 7991 if (globals->use_rel)
7992 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 7993 sgot->contents + off);
ba93b8ac 7994
362d30a1
RS		 7995 loc = srelgot->contents;
7996 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
00a97672 7997 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7998 }
7999 else
362d30a1 8000 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 8001
8002 globals->tls_ldm_got.offset |= 1;
8003 }
8004
362d30a1 8005 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 8006 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8007
8008 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8009 contents, rel->r_offset, value,
00a97672 8010 rel->r_addend);
ba93b8ac
DJ		 8011 }
8012
8013 case R_ARM_TLS_GD32:
8014 case R_ARM_TLS_IE32:
8015 {
8016 bfd_vma off;
8017 int indx;
8018 char tls_type;
8019
362d30a1 8020 if (sgot == NULL)
ba93b8ac
DJ		 8021 abort ();
8022
8023 indx = 0;
8024 if (h != NULL)
8025 {
8026 bfd_boolean dyn;
8027 dyn = globals->root.dynamic_sections_created;
8028 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8029 && (!info->shared
8030 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8031 {
8032 *unresolved_reloc_p = FALSE;
8033 indx = h->dynindx;
8034 }
8035 off = h->got.offset;
8036 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
8037 }
8038 else
8039 {
8040 if (local_got_offsets == NULL)
8041 abort ();
8042 off = local_got_offsets[r_symndx];
8043 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
8044 }
8045
8046 if (tls_type == GOT_UNKNOWN)
8047 abort ();
8048
8049 if ((off & 1) != 0)
8050 off &= ~1;
8051 else
8052 {
8053 bfd_boolean need_relocs = FALSE;
8054 Elf_Internal_Rela outrel;
8055 bfd_byte *loc = NULL;
8056 int cur_off = off;
8057
8058 /* The GOT entries have not been initialized yet. Do it
8059 now, and emit any relocations. If both an IE GOT and a
8060 GD GOT are necessary, we emit the GD first. */
8061
8062 if ((info->shared || indx != 0)
8063 && (h == NULL
8064 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8065 || h->root.type != bfd_link_hash_undefweak))
8066 {
8067 need_relocs = TRUE;
362d30a1 8068 if (srelgot == NULL)
ba93b8ac 8069 abort ();
362d30a1
RS		 8070 loc = srelgot->contents;
8071 loc += srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 8072 }
8073
8074 if (tls_type & GOT_TLS_GD)
8075 {
8076 if (need_relocs)
8077 {
00a97672 8078 outrel.r_addend = 0;
362d30a1
RS		 8079 outrel.r_offset = (sgot->output_section->vma
8080 + sgot->output_offset
00a97672 8081 + cur_off);
ba93b8ac 8082 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 8083
00a97672
RS		 8084 if (globals->use_rel)
8085 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8086 sgot->contents + cur_off);
00a97672
RS		 8087
8088 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
362d30a1 8089 srelgot->reloc_count++;
00a97672 8090 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8091
8092 if (indx == 0)
8093 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 8094 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 8095 else
8096 {
00a97672 8097 outrel.r_addend = 0;
ba93b8ac
DJ		 8098 outrel.r_info = ELF32_R_INFO (indx,
8099 R_ARM_TLS_DTPOFF32);
8100 outrel.r_offset += 4;
00a97672
RS		 8101
8102 if (globals->use_rel)
8103 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8104 sgot->contents + cur_off + 4);
00a97672
RS		 8105
8106
8107 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
362d30a1 8108 srelgot->reloc_count++;
00a97672 8109 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8110 }
8111 }
8112 else
8113 {
8114 /* If we are not emitting relocations for a
8115 general dynamic reference, then we must be in a
8116 static link or an executable link with the
8117 symbol binding locally. Mark it as belonging
8118 to module 1, the executable. */
8119 bfd_put_32 (output_bfd, 1,
362d30a1 8120 sgot->contents + cur_off);
ba93b8ac 8121 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 8122 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 8123 }
8124
8125 cur_off += 8;
8126 }
8127
8128 if (tls_type & GOT_TLS_IE)
8129 {
8130 if (need_relocs)
8131 {
00a97672
RS		 8132 if (indx == 0)
8133 outrel.r_addend = value - dtpoff_base (info);
8134 else
8135 outrel.r_addend = 0;
362d30a1
RS		 8136 outrel.r_offset = (sgot->output_section->vma
8137 + sgot->output_offset
ba93b8ac
DJ		 8138 + cur_off);
8139 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8140
00a97672
RS		 8141 if (globals->use_rel)
8142 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 8143 sgot->contents + cur_off);
ba93b8ac 8144
00a97672 8145 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
362d30a1 8146 srelgot->reloc_count++;
00a97672 8147 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8148 }
8149 else
8150 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 8151 sgot->contents + cur_off);
ba93b8ac
DJ		 8152 cur_off += 4;
8153 }
8154
8155 if (h != NULL)
8156 h->got.offset |= 1;
8157 else
8158 local_got_offsets[r_symndx] |= 1;
8159 }
8160
8161 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8162 off += 8;
362d30a1 8163 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 8164 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8165
8166 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8167 contents, rel->r_offset, value,
00a97672 8168 rel->r_addend);
ba93b8ac
DJ		 8169 }
8170
8171 case R_ARM_TLS_LE32:
8172 if (info->shared)
8173 {
8174 (*_bfd_error_handler)
8175 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8176 input_bfd, input_section,
8177 (long) rel->r_offset, howto->name);
21d799b5 8178 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 8179 }
8180 else
8181 value = tpoff (info, value);
906e58ca 8182
ba93b8ac 8183 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8184 contents, rel->r_offset, value,
8185 rel->r_addend);
ba93b8ac 8186
319850b4
JB		 8187 case R_ARM_V4BX:
8188 if (globals->fix_v4bx)
845b51d6
PB		 8189 {
8190 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8191
845b51d6
PB		 8192 /* Ensure that we have a BX instruction. */
8193 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8194
845b51d6
PB		 8195 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8196 {
8197 /* Branch to veneer. */
8198 bfd_vma glue_addr;
8199 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8200 glue_addr -= input_section->output_section->vma
8201 + input_section->output_offset
8202 + rel->r_offset + 8;
8203 insn = (insn & 0xf0000000) | 0x0a000000
8204 | ((glue_addr >> 2) & 0x00ffffff);
8205 }
8206 else
8207 {
8208 /* Preserve Rm (lowest four bits) and the condition code
8209 (highest four bits). Other bits encode MOV PC,Rm. */
8210 insn = (insn & 0xf000000f) | 0x01a0f000;
8211 }
319850b4 8212
845b51d6
PB		 8213 bfd_put_32 (input_bfd, insn, hit_data);
8214 }
319850b4
JB		 8215 return bfd_reloc_ok;
8216
b6895b4f
PB		 8217 case R_ARM_MOVW_ABS_NC:
8218 case R_ARM_MOVT_ABS:
8219 case R_ARM_MOVW_PREL_NC:
8220 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8221 /* Until we properly support segment-base-relative addressing then
8222 we assume the segment base to be zero, as for the group relocations.
8223 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8224 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8225 case R_ARM_MOVW_BREL_NC:
8226 case R_ARM_MOVW_BREL:
8227 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8228 {
8229 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8230
8231 if (globals->use_rel)
8232 {
8233 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8234 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8235 }
92f5d02b 8236
b6895b4f 8237 value += signed_addend;
b6895b4f
PB		 8238
8239 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8240 value -= (input_section->output_section->vma
8241 + input_section->output_offset + rel->r_offset);
8242
92f5d02b
MS		 8243 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8244 return bfd_reloc_overflow;
8245
8246 if (sym_flags == STT_ARM_TFUNC)
8247 value |= 1;
8248
8249 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8250 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8251 value >>= 16;
8252
8253 insn &= 0xfff0f000;
8254 insn |= value & 0xfff;
8255 insn |= (value & 0xf000) << 4;
8256 bfd_put_32 (input_bfd, insn, hit_data);
8257 }
8258 return bfd_reloc_ok;
8259
8260 case R_ARM_THM_MOVW_ABS_NC:
8261 case R_ARM_THM_MOVT_ABS:
8262 case R_ARM_THM_MOVW_PREL_NC:
8263 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8264 /* Until we properly support segment-base-relative addressing then
8265 we assume the segment base to be zero, as for the above relocations.
8266 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8267 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8268 as R_ARM_THM_MOVT_ABS. */
8269 case R_ARM_THM_MOVW_BREL_NC:
8270 case R_ARM_THM_MOVW_BREL:
8271 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8272 {
8273 bfd_vma insn;
906e58ca 8274
b6895b4f
PB		 8275 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8276 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8277
8278 if (globals->use_rel)
8279 {
8280 addend = ((insn >> 4) & 0xf000)
8281 | ((insn >> 15) & 0x0800)
8282 | ((insn >> 4) & 0x0700)
8283 | (insn & 0x00ff);
39623e12 8284 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8285 }
92f5d02b 8286
b6895b4f 8287 value += signed_addend;
b6895b4f
PB		 8288
8289 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8290 value -= (input_section->output_section->vma
8291 + input_section->output_offset + rel->r_offset);
8292
92f5d02b
MS		 8293 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8294 return bfd_reloc_overflow;
8295
8296 if (sym_flags == STT_ARM_TFUNC)
8297 value |= 1;
8298
8299 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8300 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8301 value >>= 16;
8302
8303 insn &= 0xfbf08f00;
8304 insn |= (value & 0xf000) << 4;
8305 insn |= (value & 0x0800) << 15;
8306 insn |= (value & 0x0700) << 4;
8307 insn |= (value & 0x00ff);
8308
8309 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8310 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8311 }
8312 return bfd_reloc_ok;
8313
4962c51a
MS		 8314 case R_ARM_ALU_PC_G0_NC:
8315 case R_ARM_ALU_PC_G1_NC:
8316 case R_ARM_ALU_PC_G0:
8317 case R_ARM_ALU_PC_G1:
8318 case R_ARM_ALU_PC_G2:
8319 case R_ARM_ALU_SB_G0_NC:
8320 case R_ARM_ALU_SB_G1_NC:
8321 case R_ARM_ALU_SB_G0:
8322 case R_ARM_ALU_SB_G1:
8323 case R_ARM_ALU_SB_G2:
8324 {
8325 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8326 bfd_vma pc = input_section->output_section->vma
8327 + input_section->output_offset + rel->r_offset;
8328 /* sb should be the origin of the *segment* containing the symbol.
8329 It is not clear how to obtain this OS-dependent value, so we
8330 make an arbitrary choice of zero. */
8331 bfd_vma sb = 0;
8332 bfd_vma residual;
8333 bfd_vma g_n;
8334 bfd_signed_vma signed_value;
8335 int group = 0;
8336
8337 /* Determine which group of bits to select. */
8338 switch (r_type)
8339 {
8340 case R_ARM_ALU_PC_G0_NC:
8341 case R_ARM_ALU_PC_G0:
8342 case R_ARM_ALU_SB_G0_NC:
8343 case R_ARM_ALU_SB_G0:
8344 group = 0;
8345 break;
8346
8347 case R_ARM_ALU_PC_G1_NC:
8348 case R_ARM_ALU_PC_G1:
8349 case R_ARM_ALU_SB_G1_NC:
8350 case R_ARM_ALU_SB_G1:
8351 group = 1;
8352 break;
8353
8354 case R_ARM_ALU_PC_G2:
8355 case R_ARM_ALU_SB_G2:
8356 group = 2;
8357 break;
8358
8359 default:
906e58ca 8360 abort ();
4962c51a
MS		 8361 }
8362
8363 /* If REL, extract the addend from the insn. If RELA, it will
8364 have already been fetched for us. */
8365 if (globals->use_rel)
8366 {
8367 int negative;
8368 bfd_vma constant = insn & 0xff;
8369 bfd_vma rotation = (insn & 0xf00) >> 8;
8370
8371 if (rotation == 0)
8372 signed_addend = constant;
8373 else
8374 {
8375 /* Compensate for the fact that in the instruction, the
8376 rotation is stored in multiples of 2 bits. */
8377 rotation *= 2;
8378
8379 /* Rotate "constant" right by "rotation" bits. */
8380 signed_addend = (constant >> rotation) |
8381 (constant << (8 * sizeof (bfd_vma) - rotation));
8382 }
8383
8384 /* Determine if the instruction is an ADD or a SUB.
8385 (For REL, this determines the sign of the addend.) */
8386 negative = identify_add_or_sub (insn);
8387 if (negative == 0)
8388 {
8389 (*_bfd_error_handler)
8390 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8391 input_bfd, input_section,
8392 (long) rel->r_offset, howto->name);
906e58ca 8393 return bfd_reloc_overflow;
4962c51a
MS		 8394 }
8395
8396 signed_addend *= negative;
8397 }
8398
8399 /* Compute the value (X) to go in the place. */
8400 if (r_type == R_ARM_ALU_PC_G0_NC
8401 || r_type == R_ARM_ALU_PC_G1_NC
8402 || r_type == R_ARM_ALU_PC_G0
8403 || r_type == R_ARM_ALU_PC_G1
8404 || r_type == R_ARM_ALU_PC_G2)
8405 /* PC relative. */
8406 signed_value = value - pc + signed_addend;
8407 else
8408 /* Section base relative. */
8409 signed_value = value - sb + signed_addend;
8410
8411 /* If the target symbol is a Thumb function, then set the
8412 Thumb bit in the address. */
8413 if (sym_flags == STT_ARM_TFUNC)
8414 signed_value |= 1;
8415
8416 /* Calculate the value of the relevant G_n, in encoded
8417 constant-with-rotation format. */
8418 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8419 &residual);
8420
8421 /* Check for overflow if required. */
8422 if ((r_type == R_ARM_ALU_PC_G0
8423 || r_type == R_ARM_ALU_PC_G1
8424 || r_type == R_ARM_ALU_PC_G2
8425 || r_type == R_ARM_ALU_SB_G0
8426 || r_type == R_ARM_ALU_SB_G1
8427 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8428 {
8429 (*_bfd_error_handler)
8430 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8431 input_bfd, input_section,
8432 (long) rel->r_offset, abs (signed_value), howto->name);
8433 return bfd_reloc_overflow;
8434 }
8435
8436 /* Mask out the value and the ADD/SUB part of the opcode; take care
8437 not to destroy the S bit. */
8438 insn &= 0xff1ff000;
8439
8440 /* Set the opcode according to whether the value to go in the
8441 place is negative. */
8442 if (signed_value < 0)
8443 insn |= 1 << 22;
8444 else
8445 insn |= 1 << 23;
8446
8447 /* Encode the offset. */
8448 insn |= g_n;
8449
8450 bfd_put_32 (input_bfd, insn, hit_data);
8451 }
8452 return bfd_reloc_ok;
8453
8454 case R_ARM_LDR_PC_G0:
8455 case R_ARM_LDR_PC_G1:
8456 case R_ARM_LDR_PC_G2:
8457 case R_ARM_LDR_SB_G0:
8458 case R_ARM_LDR_SB_G1:
8459 case R_ARM_LDR_SB_G2:
8460 {
8461 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8462 bfd_vma pc = input_section->output_section->vma
8463 + input_section->output_offset + rel->r_offset;
8464 bfd_vma sb = 0; /* See note above. */
8465 bfd_vma residual;
8466 bfd_signed_vma signed_value;
8467 int group = 0;
8468
8469 /* Determine which groups of bits to calculate. */
8470 switch (r_type)
8471 {
8472 case R_ARM_LDR_PC_G0:
8473 case R_ARM_LDR_SB_G0:
8474 group = 0;
8475 break;
8476
8477 case R_ARM_LDR_PC_G1:
8478 case R_ARM_LDR_SB_G1:
8479 group = 1;
8480 break;
8481
8482 case R_ARM_LDR_PC_G2:
8483 case R_ARM_LDR_SB_G2:
8484 group = 2;
8485 break;
8486
8487 default:
906e58ca 8488 abort ();
4962c51a
MS		 8489 }
8490
8491 /* If REL, extract the addend from the insn. If RELA, it will
8492 have already been fetched for us. */
8493 if (globals->use_rel)
8494 {
8495 int negative = (insn & (1 << 23)) ? 1 : -1;
8496 signed_addend = negative * (insn & 0xfff);
8497 }
8498
8499 /* Compute the value (X) to go in the place. */
8500 if (r_type == R_ARM_LDR_PC_G0
8501 || r_type == R_ARM_LDR_PC_G1
8502 || r_type == R_ARM_LDR_PC_G2)
8503 /* PC relative. */
8504 signed_value = value - pc + signed_addend;
8505 else
8506 /* Section base relative. */
8507 signed_value = value - sb + signed_addend;
8508
8509 /* Calculate the value of the relevant G_{n-1} to obtain
8510 the residual at that stage. */
8511 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8512
8513 /* Check for overflow. */
8514 if (residual >= 0x1000)
8515 {
8516 (*_bfd_error_handler)
8517 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8518 input_bfd, input_section,
8519 (long) rel->r_offset, abs (signed_value), howto->name);
8520 return bfd_reloc_overflow;
8521 }
8522
8523 /* Mask out the value and U bit. */
8524 insn &= 0xff7ff000;
8525
8526 /* Set the U bit if the value to go in the place is non-negative. */
8527 if (signed_value >= 0)
8528 insn |= 1 << 23;
8529
8530 /* Encode the offset. */
8531 insn |= residual;
8532
8533 bfd_put_32 (input_bfd, insn, hit_data);
8534 }
8535 return bfd_reloc_ok;
8536
8537 case R_ARM_LDRS_PC_G0:
8538 case R_ARM_LDRS_PC_G1:
8539 case R_ARM_LDRS_PC_G2:
8540 case R_ARM_LDRS_SB_G0:
8541 case R_ARM_LDRS_SB_G1:
8542 case R_ARM_LDRS_SB_G2:
8543 {
8544 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8545 bfd_vma pc = input_section->output_section->vma
8546 + input_section->output_offset + rel->r_offset;
8547 bfd_vma sb = 0; /* See note above. */
8548 bfd_vma residual;
8549 bfd_signed_vma signed_value;
8550 int group = 0;
8551
8552 /* Determine which groups of bits to calculate. */
8553 switch (r_type)
8554 {
8555 case R_ARM_LDRS_PC_G0:
8556 case R_ARM_LDRS_SB_G0:
8557 group = 0;
8558 break;
8559
8560 case R_ARM_LDRS_PC_G1:
8561 case R_ARM_LDRS_SB_G1:
8562 group = 1;
8563 break;
8564
8565 case R_ARM_LDRS_PC_G2:
8566 case R_ARM_LDRS_SB_G2:
8567 group = 2;
8568 break;
8569
8570 default:
906e58ca 8571 abort ();
4962c51a
MS		 8572 }
8573
8574 /* If REL, extract the addend from the insn. If RELA, it will
8575 have already been fetched for us. */
8576 if (globals->use_rel)
8577 {
8578 int negative = (insn & (1 << 23)) ? 1 : -1;
8579 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8580 }
8581
8582 /* Compute the value (X) to go in the place. */
8583 if (r_type == R_ARM_LDRS_PC_G0
8584 || r_type == R_ARM_LDRS_PC_G1
8585 || r_type == R_ARM_LDRS_PC_G2)
8586 /* PC relative. */
8587 signed_value = value - pc + signed_addend;
8588 else
8589 /* Section base relative. */
8590 signed_value = value - sb + signed_addend;
8591
8592 /* Calculate the value of the relevant G_{n-1} to obtain
8593 the residual at that stage. */
8594 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8595
8596 /* Check for overflow. */
8597 if (residual >= 0x100)
8598 {
8599 (*_bfd_error_handler)
8600 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8601 input_bfd, input_section,
8602 (long) rel->r_offset, abs (signed_value), howto->name);
8603 return bfd_reloc_overflow;
8604 }
8605
8606 /* Mask out the value and U bit. */
8607 insn &= 0xff7ff0f0;
8608
8609 /* Set the U bit if the value to go in the place is non-negative. */
8610 if (signed_value >= 0)
8611 insn |= 1 << 23;
8612
8613 /* Encode the offset. */
8614 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8615
8616 bfd_put_32 (input_bfd, insn, hit_data);
8617 }
8618 return bfd_reloc_ok;
8619
8620 case R_ARM_LDC_PC_G0:
8621 case R_ARM_LDC_PC_G1:
8622 case R_ARM_LDC_PC_G2:
8623 case R_ARM_LDC_SB_G0:
8624 case R_ARM_LDC_SB_G1:
8625 case R_ARM_LDC_SB_G2:
8626 {
8627 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8628 bfd_vma pc = input_section->output_section->vma
8629 + input_section->output_offset + rel->r_offset;
8630 bfd_vma sb = 0; /* See note above. */
8631 bfd_vma residual;
8632 bfd_signed_vma signed_value;
8633 int group = 0;
8634
8635 /* Determine which groups of bits to calculate. */
8636 switch (r_type)
8637 {
8638 case R_ARM_LDC_PC_G0:
8639 case R_ARM_LDC_SB_G0:
8640 group = 0;
8641 break;
8642
8643 case R_ARM_LDC_PC_G1:
8644 case R_ARM_LDC_SB_G1:
8645 group = 1;
8646 break;
8647
8648 case R_ARM_LDC_PC_G2:
8649 case R_ARM_LDC_SB_G2:
8650 group = 2;
8651 break;
8652
8653 default:
906e58ca 8654 abort ();
4962c51a
MS		 8655 }
8656
8657 /* If REL, extract the addend from the insn. If RELA, it will
8658 have already been fetched for us. */
8659 if (globals->use_rel)
8660 {
8661 int negative = (insn & (1 << 23)) ? 1 : -1;
8662 signed_addend = negative * ((insn & 0xff) << 2);
8663 }
8664
8665 /* Compute the value (X) to go in the place. */
8666 if (r_type == R_ARM_LDC_PC_G0
8667 || r_type == R_ARM_LDC_PC_G1
8668 || r_type == R_ARM_LDC_PC_G2)
8669 /* PC relative. */
8670 signed_value = value - pc + signed_addend;
8671 else
8672 /* Section base relative. */
8673 signed_value = value - sb + signed_addend;
8674
8675 /* Calculate the value of the relevant G_{n-1} to obtain
8676 the residual at that stage. */
8677 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8678
8679 /* Check for overflow. (The absolute value to go in the place must be
8680 divisible by four and, after having been divided by four, must
8681 fit in eight bits.) */
8682 if ((residual & 0x3) != 0 || residual >= 0x400)
8683 {
8684 (*_bfd_error_handler)
8685 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8686 input_bfd, input_section,
8687 (long) rel->r_offset, abs (signed_value), howto->name);
8688 return bfd_reloc_overflow;
8689 }
8690
8691 /* Mask out the value and U bit. */
8692 insn &= 0xff7fff00;
8693
8694 /* Set the U bit if the value to go in the place is non-negative. */
8695 if (signed_value >= 0)
8696 insn |= 1 << 23;
8697
8698 /* Encode the offset. */
8699 insn |= residual >> 2;
8700
8701 bfd_put_32 (input_bfd, insn, hit_data);
8702 }
8703 return bfd_reloc_ok;
8704
252b5132
RH		 8705 default:
8706 return bfd_reloc_notsupported;
8707 }
8708}
8709
98c1d4aa
NC		 8710/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8711static void
57e8b36a
NC		 8712arm_add_to_rel (bfd * abfd,
8713 bfd_byte * address,
8714 reloc_howto_type * howto,
8715 bfd_signed_vma increment)
98c1d4aa 8716{
98c1d4aa
NC		 8717 bfd_signed_vma addend;
8718
bd97cb95
DJ		 8719 if (howto->type == R_ARM_THM_CALL
8720 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8721 {
9a5aca8c
AM		 8722 int upper_insn, lower_insn;
8723 int upper, lower;
98c1d4aa 8724
9a5aca8c
AM		 8725 upper_insn = bfd_get_16 (abfd, address);
8726 lower_insn = bfd_get_16 (abfd, address + 2);
8727 upper = upper_insn & 0x7ff;
8728 lower = lower_insn & 0x7ff;
8729
8730 addend = (upper << 12) | (lower << 1);
ddda4409 8731 addend += increment;
9a5aca8c 8732 addend >>= 1;
98c1d4aa 8733
9a5aca8c
AM		 8734 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8735 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8736
dc810e39
AM		 8737 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8738 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8739 }
8740 else
8741 {
8742 bfd_vma contents;
8743
8744 contents = bfd_get_32 (abfd, address);
8745
8746 /* Get the (signed) value from the instruction. */
8747 addend = contents & howto->src_mask;
8748 if (addend & ((howto->src_mask + 1) >> 1))
8749 {
8750 bfd_signed_vma mask;
8751
8752 mask = -1;
8753 mask &= ~ howto->src_mask;
8754 addend |= mask;
8755 }
8756
8757 /* Add in the increment, (which is a byte value). */
8758 switch (howto->type)
8759 {
8760 default:
8761 addend += increment;
8762 break;
8763
8764 case R_ARM_PC24:
c6596c5e 8765 case R_ARM_PLT32:
5b5bb741
PB		 8766 case R_ARM_CALL:
8767 case R_ARM_JUMP24:
9a5aca8c 8768 addend <<= howto->size;
dc810e39 8769 addend += increment;
9a5aca8c
AM		 8770
8771 /* Should we check for overflow here ? */
8772
8773 /* Drop any undesired bits. */
8774 addend >>= howto->rightshift;
8775 break;
8776 }
8777
8778 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8779
8780 bfd_put_32 (abfd, contents, address);
ddda4409 8781 }
98c1d4aa 8782}
252b5132 8783
ba93b8ac
DJ		 8784#define IS_ARM_TLS_RELOC(R_TYPE) \
8785 ((R_TYPE) == R_ARM_TLS_GD32 \
8786 || (R_TYPE) == R_ARM_TLS_LDO32 \
8787 || (R_TYPE) == R_ARM_TLS_LDM32 \
8788 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8789 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8790 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8791 || (R_TYPE) == R_ARM_TLS_LE32 \
8792 || (R_TYPE) == R_ARM_TLS_IE32)
8793
252b5132 8794/* Relocate an ARM ELF section. */
906e58ca 8795
b34976b6 8796static bfd_boolean
57e8b36a
NC		 8797elf32_arm_relocate_section (bfd * output_bfd,
8798 struct bfd_link_info * info,
8799 bfd * input_bfd,
8800 asection * input_section,
8801 bfd_byte * contents,
8802 Elf_Internal_Rela * relocs,
8803 Elf_Internal_Sym * local_syms,
8804 asection ** local_sections)
252b5132 8805{
b34976b6
AM		 8806 Elf_Internal_Shdr *symtab_hdr;
8807 struct elf_link_hash_entry **sym_hashes;
8808 Elf_Internal_Rela *rel;
8809 Elf_Internal_Rela *relend;
8810 const char *name;
b32d3aa2 8811 struct elf32_arm_link_hash_table * globals;
252b5132 8812
4e7fd91e 8813 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8814 if (globals == NULL)
8815 return FALSE;
b491616a 8816
0ffa91dd 8817 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8818 sym_hashes = elf_sym_hashes (input_bfd);
8819
8820 rel = relocs;
8821 relend = relocs + input_section->reloc_count;
8822 for (; rel < relend; rel++)
8823 {
ba96a88f
NC		 8824 int r_type;
8825 reloc_howto_type * howto;
8826 unsigned long r_symndx;
8827 Elf_Internal_Sym * sym;
8828 asection * sec;
252b5132 8829 struct elf_link_hash_entry * h;
ba96a88f
NC		 8830 bfd_vma relocation;
8831 bfd_reloc_status_type r;
8832 arelent bfd_reloc;
ba93b8ac 8833 char sym_type;
0945cdfd 8834 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8835 char *error_message = NULL;
f21f3fe0 8836
252b5132 8837 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8838 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8839 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8840
ba96a88f
NC		 8841 if ( r_type == R_ARM_GNU_VTENTRY
8842 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8843 continue;
8844
b32d3aa2 8845 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8846 howto = bfd_reloc.howto;
252b5132 8847
252b5132
RH		 8848 h = NULL;
8849 sym = NULL;
8850 sec = NULL;
9b485d32 8851
252b5132
RH		 8852 if (r_symndx < symtab_hdr->sh_info)
8853 {
8854 sym = local_syms + r_symndx;
ba93b8ac 8855 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8856 sec = local_sections[r_symndx];
ffcb4889
NS		 8857
8858 /* An object file might have a reference to a local
8859 undefined symbol. This is a daft object file, but we
8860 should at least do something about it. V4BX & NONE
8861 relocations do not use the symbol and are explicitly
77b4f08f
TS		 8862 allowed to use the undefined symbol, so allow those.
8863 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 8864 if (r_type != R_ARM_V4BX
8865 && r_type != R_ARM_NONE
77b4f08f 8866 && r_symndx != STN_UNDEF
ffcb4889
NS		 8867 && bfd_is_und_section (sec)
8868 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
8869 {
8870 if (!info->callbacks->undefined_symbol
8871 (info, bfd_elf_string_from_elf_section
8872 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8873 input_bfd, input_section,
8874 rel->r_offset, TRUE))
8875 return FALSE;
8876 }
8877
4e7fd91e 8878 if (globals->use_rel)
f8df10f4 8879 {
4e7fd91e
PB		 8880 relocation = (sec->output_section->vma
8881 + sec->output_offset
8882 + sym->st_value);
ab96bf03
AM		 8883 if (!info->relocatable
8884 && (sec->flags & SEC_MERGE)
8885 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8886 {
4e7fd91e
PB		 8887 asection *msec;
8888 bfd_vma addend, value;
8889
39623e12 8890 switch (r_type)
4e7fd91e 8891 {
39623e12
PB		 8892 case R_ARM_MOVW_ABS_NC:
8893 case R_ARM_MOVT_ABS:
8894 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8895 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8896 addend = (addend ^ 0x8000) - 0x8000;
8897 break;
f8df10f4 8898
39623e12
PB		 8899 case R_ARM_THM_MOVW_ABS_NC:
8900 case R_ARM_THM_MOVT_ABS:
8901 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8902 << 16;
8903 value |= bfd_get_16 (input_bfd,
8904 contents + rel->r_offset + 2);
8905 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8906 | ((value & 0x04000000) >> 15);
8907 addend = (addend ^ 0x8000) - 0x8000;
8908 break;
f8df10f4 8909
39623e12
PB		 8910 default:
8911 if (howto->rightshift
8912 || (howto->src_mask & (howto->src_mask + 1)))
8913 {
8914 (*_bfd_error_handler)
8915 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8916 input_bfd, input_section,
8917 (long) rel->r_offset, howto->name);
8918 return FALSE;
8919 }
8920
8921 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8922
8923 /* Get the (signed) value from the instruction. */
8924 addend = value & howto->src_mask;
8925 if (addend & ((howto->src_mask + 1) >> 1))
8926 {
8927 bfd_signed_vma mask;
8928
8929 mask = -1;
8930 mask &= ~ howto->src_mask;
8931 addend |= mask;
8932 }
8933 break;
4e7fd91e 8934 }
39623e12 8935
4e7fd91e
PB		 8936 msec = sec;
8937 addend =
8938 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8939 - relocation;
8940 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8941
8942 /* Cases here must match those in the preceeding
8943 switch statement. */
8944 switch (r_type)
8945 {
8946 case R_ARM_MOVW_ABS_NC:
8947 case R_ARM_MOVT_ABS:
8948 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8949 | (addend & 0xfff);
8950 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8951 break;
8952
8953 case R_ARM_THM_MOVW_ABS_NC:
8954 case R_ARM_THM_MOVT_ABS:
8955 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8956 | (addend & 0xff) | ((addend & 0x0800) << 15);
8957 bfd_put_16 (input_bfd, value >> 16,
8958 contents + rel->r_offset);
8959 bfd_put_16 (input_bfd, value,
8960 contents + rel->r_offset + 2);
8961 break;
8962
8963 default:
8964 value = (value & ~ howto->dst_mask)
8965 | (addend & howto->dst_mask);
8966 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8967 break;
8968 }
f8df10f4 8969 }
f8df10f4 8970 }
4e7fd91e
PB		 8971 else
8972 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8973 }
8974 else
8975 {
560e09e9 8976 bfd_boolean warned;
560e09e9 8977
b2a8e766
AM		 8978 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8979 r_symndx, symtab_hdr, sym_hashes,
8980 h, sec, relocation,
8981 unresolved_reloc, warned);
ba93b8ac
DJ		 8982
8983 sym_type = h->type;
252b5132
RH		 8984 }
8985
ab96bf03 8986 if (sec != NULL && elf_discarded_section (sec))
e4067dbb
DJ		 8987 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
8988 rel, relend, howto, contents);
ab96bf03
AM		 8989
8990 if (info->relocatable)
8991 {
8992 /* This is a relocatable link. We don't have to change
8993 anything, unless the reloc is against a section symbol,
8994 in which case we have to adjust according to where the
8995 section symbol winds up in the output section. */
8996 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8997 {
8998 if (globals->use_rel)
8999 arm_add_to_rel (input_bfd, contents + rel->r_offset,
9000 howto, (bfd_signed_vma) sec->output_offset);
9001 else
9002 rel->r_addend += sec->output_offset;
9003 }
9004 continue;
9005 }
9006
252b5132
RH		 9007 if (h != NULL)
9008 name = h->root.root.string;
9009 else
9010 {
9011 name = (bfd_elf_string_from_elf_section
9012 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9013 if (name == NULL || *name == '\0')
9014 name = bfd_section_name (input_bfd, sec);
9015 }
f21f3fe0 9016
cf35638d 9017 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 9018 && r_type != R_ARM_NONE
9019 && (h == NULL
9020 || h->root.type == bfd_link_hash_defined
9021 || h->root.type == bfd_link_hash_defweak)
9022 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
9023 {
9024 (*_bfd_error_handler)
9025 ((sym_type == STT_TLS
9026 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
9027 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
9028 input_bfd,
9029 input_section,
9030 (long) rel->r_offset,
9031 howto->name,
9032 name);
9033 }
9034
252b5132
RH		 9035 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
9036 input_section, contents, rel,
9037 relocation, info, sec, name,
9038 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 9039 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 9040 &unresolved_reloc, &error_message);
0945cdfd
DJ		 9041
9042 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
9043 because such sections are not SEC_ALLOC and thus ld.so will
9044 not process them. */
9045 if (unresolved_reloc
9046 && !((input_section->flags & SEC_DEBUGGING) != 0
9047 && h->def_dynamic))
9048 {
9049 (*_bfd_error_handler)
843fe662
L		 9050 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
9051 input_bfd,
9052 input_section,
9053 (long) rel->r_offset,
9054 howto->name,
9055 h->root.root.string);
0945cdfd
DJ		 9056 return FALSE;
9057 }
252b5132
RH		 9058
9059 if (r != bfd_reloc_ok)
9060 {
252b5132
RH		 9061 switch (r)
9062 {
9063 case bfd_reloc_overflow:
cf919dfd
PB		 9064 /* If the overflowing reloc was to an undefined symbol,
9065 we have already printed one error message and there
9066 is no point complaining again. */
9067 if ((! h ||
9068 h->root.type != bfd_link_hash_undefined)
9069 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 9070 (info, (h ? &h->root : NULL), name, howto->name,
9071 (bfd_vma) 0, input_bfd, input_section,
9072 rel->r_offset))))
b34976b6 9073 return FALSE;
252b5132
RH		 9074 break;
9075
9076 case bfd_reloc_undefined:
9077 if (!((*info->callbacks->undefined_symbol)
9078 (info, name, input_bfd, input_section,
b34976b6
AM		 9079 rel->r_offset, TRUE)))
9080 return FALSE;
252b5132
RH		 9081 break;
9082
9083 case bfd_reloc_outofrange:
f2a9dd69 9084 error_message = _("out of range");
252b5132
RH		 9085 goto common_error;
9086
9087 case bfd_reloc_notsupported:
f2a9dd69 9088 error_message = _("unsupported relocation");
252b5132
RH		 9089 goto common_error;
9090
9091 case bfd_reloc_dangerous:
f2a9dd69 9092 /* error_message should already be set. */
252b5132
RH		 9093 goto common_error;
9094
9095 default:
f2a9dd69 9096 error_message = _("unknown error");
8029a119 9097 /* Fall through. */
252b5132
RH		 9098
9099 common_error:
f2a9dd69
DJ		 9100 BFD_ASSERT (error_message != NULL);
9101 if (!((*info->callbacks->reloc_dangerous)
9102 (info, error_message, input_bfd, input_section,
252b5132 9103 rel->r_offset)))
b34976b6 9104 return FALSE;
252b5132
RH		 9105 break;
9106 }
9107 }
9108 }
9109
b34976b6 9110 return TRUE;
252b5132
RH		 9111}
9112
91d6fa6a 9113/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 9114 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 9115 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 9116 maintaining that condition). */
9117
9118static void
9119add_unwind_table_edit (arm_unwind_table_edit **head,
9120 arm_unwind_table_edit **tail,
9121 arm_unwind_edit_type type,
9122 asection *linked_section,
91d6fa6a 9123 unsigned int tindex)
2468f9c9 9124{
21d799b5
NC		 9125 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9126 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 9127
9128 new_edit->type = type;
9129 new_edit->linked_section = linked_section;
91d6fa6a 9130 new_edit->index = tindex;
2468f9c9 9131
91d6fa6a 9132 if (tindex > 0)
2468f9c9
PB		 9133 {
9134 new_edit->next = NULL;
9135
9136 if (*tail)
9137 (*tail)->next = new_edit;
9138
9139 (*tail) = new_edit;
9140
9141 if (!*head)
9142 (*head) = new_edit;
9143 }
9144 else
9145 {
9146 new_edit->next = *head;
9147
9148 if (!*tail)
9149 *tail = new_edit;
9150
9151 *head = new_edit;
9152 }
9153}
9154
9155static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9156
9157/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9158static void
9159adjust_exidx_size(asection *exidx_sec, int adjust)
9160{
9161 asection *out_sec;
9162
9163 if (!exidx_sec->rawsize)
9164 exidx_sec->rawsize = exidx_sec->size;
9165
9166 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9167 out_sec = exidx_sec->output_section;
9168 /* Adjust size of output section. */
9169 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9170}
9171
9172/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9173static void
9174insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9175{
9176 struct _arm_elf_section_data *exidx_arm_data;
9177
9178 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9179 add_unwind_table_edit (
9180 &exidx_arm_data->u.exidx.unwind_edit_list,
9181 &exidx_arm_data->u.exidx.unwind_edit_tail,
9182 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9183
9184 adjust_exidx_size(exidx_sec, 8);
9185}
9186
9187/* Scan .ARM.exidx tables, and create a list describing edits which should be
9188 made to those tables, such that:
9189
9190 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9191 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9192 codes which have been inlined into the index).
9193
85fdf906
AH		 9194 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
9195
2468f9c9
PB		 9196 The edits are applied when the tables are written
9197 (in elf32_arm_write_section).
9198*/
9199
9200bfd_boolean
9201elf32_arm_fix_exidx_coverage (asection **text_section_order,
9202 unsigned int num_text_sections,
85fdf906
AH		 9203 struct bfd_link_info *info,
9204 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 9205{
9206 bfd *inp;
9207 unsigned int last_second_word = 0, i;
9208 asection *last_exidx_sec = NULL;
9209 asection *last_text_sec = NULL;
9210 int last_unwind_type = -1;
9211
9212 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9213 text sections. */
9214 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9215 {
9216 asection *sec;
9217
9218 for (sec = inp->sections; sec != NULL; sec = sec->next)
9219 {
9220 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9221 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9222
dec9d5df 9223 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9224 continue;
9225
9226 if (elf_sec->linked_to)
9227 {
9228 Elf_Internal_Shdr *linked_hdr
9229 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9230 struct _arm_elf_section_data *linked_sec_arm_data
9231 = get_arm_elf_section_data (linked_hdr->bfd_section);
9232
9233 if (linked_sec_arm_data == NULL)
9234 continue;
9235
9236 /* Link this .ARM.exidx section back from the text section it
9237 describes. */
9238 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9239 }
9240 }
9241 }
9242
9243 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9244 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 9245 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 9246
9247 for (i = 0; i < num_text_sections; i++)
9248 {
9249 asection *sec = text_section_order[i];
9250 asection *exidx_sec;
9251 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9252 struct _arm_elf_section_data *exidx_arm_data;
9253 bfd_byte *contents = NULL;
9254 int deleted_exidx_bytes = 0;
9255 bfd_vma j;
9256 arm_unwind_table_edit *unwind_edit_head = NULL;
9257 arm_unwind_table_edit *unwind_edit_tail = NULL;
9258 Elf_Internal_Shdr *hdr;
9259 bfd *ibfd;
9260
9261 if (arm_data == NULL)
9262 continue;
9263
9264 exidx_sec = arm_data->u.text.arm_exidx_sec;
9265 if (exidx_sec == NULL)
9266 {
9267 /* Section has no unwind data. */
9268 if (last_unwind_type == 0 || !last_exidx_sec)
9269 continue;
9270
9271 /* Ignore zero sized sections. */
9272 if (sec->size == 0)
9273 continue;
9274
9275 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9276 last_unwind_type = 0;
9277 continue;
9278 }
9279
22a8f80e
PB		 9280 /* Skip /DISCARD/ sections. */
9281 if (bfd_is_abs_section (exidx_sec->output_section))
9282 continue;
9283
2468f9c9
PB		 9284 hdr = &elf_section_data (exidx_sec)->this_hdr;
9285 if (hdr->sh_type != SHT_ARM_EXIDX)
9286 continue;
9287
9288 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9289 if (exidx_arm_data == NULL)
9290 continue;
9291
9292 ibfd = exidx_sec->owner;
9293
9294 if (hdr->contents != NULL)
9295 contents = hdr->contents;
9296 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9297 /* An error? */
9298 continue;
9299
9300 for (j = 0; j < hdr->sh_size; j += 8)
9301 {
9302 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9303 int unwind_type;
9304 int elide = 0;
9305
9306 /* An EXIDX_CANTUNWIND entry. */
9307 if (second_word == 1)
9308 {
9309 if (last_unwind_type == 0)
9310 elide = 1;
9311 unwind_type = 0;
9312 }
9313 /* Inlined unwinding data. Merge if equal to previous. */
9314 else if ((second_word & 0x80000000) != 0)
9315 {
85fdf906
AH		 9316 if (merge_exidx_entries
9317 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 9318 elide = 1;
9319 unwind_type = 1;
9320 last_second_word = second_word;
9321 }
9322 /* Normal table entry. In theory we could merge these too,
9323 but duplicate entries are likely to be much less common. */
9324 else
9325 unwind_type = 2;
9326
9327 if (elide)
9328 {
9329 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9330 DELETE_EXIDX_ENTRY, NULL, j / 8);
9331
9332 deleted_exidx_bytes += 8;
9333 }
9334
9335 last_unwind_type = unwind_type;
9336 }
9337
9338 /* Free contents if we allocated it ourselves. */
9339 if (contents != hdr->contents)
9340 free (contents);
9341
9342 /* Record edits to be applied later (in elf32_arm_write_section). */
9343 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9344 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9345
9346 if (deleted_exidx_bytes > 0)
9347 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9348
9349 last_exidx_sec = exidx_sec;
9350 last_text_sec = sec;
9351 }
9352
9353 /* Add terminating CANTUNWIND entry. */
9354 if (last_exidx_sec && last_unwind_type != 0)
9355 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9356
9357 return TRUE;
9358}
9359
3e6b1042
DJ		 9360static bfd_boolean
9361elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9362 bfd *ibfd, const char *name)
9363{
9364 asection *sec, *osec;
9365
9366 sec = bfd_get_section_by_name (ibfd, name);
9367 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9368 return TRUE;
9369
9370 osec = sec->output_section;
9371 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9372 return TRUE;
9373
9374 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9375 sec->output_offset, sec->size))
9376 return FALSE;
9377
9378 return TRUE;
9379}
9380
9381static bfd_boolean
9382elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9383{
9384 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 9385 asection *sec, *osec;
3e6b1042 9386
4dfe6ac6
NC		 9387 if (globals == NULL)
9388 return FALSE;
9389
3e6b1042
DJ		 9390 /* Invoke the regular ELF backend linker to do all the work. */
9391 if (!bfd_elf_final_link (abfd, info))
9392 return FALSE;
9393
fe33d2fa
CL		 9394 /* Process stub sections (eg BE8 encoding, ...). */
9395 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
9396 int i;
cdb21a0a
NS		 9397 for (i=0; i<htab->top_id; i++)
9398 {
9399 sec = htab->stub_group[i].stub_sec;
9400 /* Only process it once, in its link_sec slot. */
9401 if (sec && i == htab->stub_group[i].link_sec->id)
9402 {
9403 osec = sec->output_section;
9404 elf32_arm_write_section (abfd, info, sec, sec->contents);
9405 if (! bfd_set_section_contents (abfd, osec, sec->contents,
9406 sec->output_offset, sec->size))
9407 return FALSE;
9408 }
fe33d2fa 9409 }
fe33d2fa 9410
3e6b1042
DJ		 9411 /* Write out any glue sections now that we have created all the
9412 stubs. */
9413 if (globals->bfd_of_glue_owner != NULL)
9414 {
9415 if (! elf32_arm_output_glue_section (info, abfd,
9416 globals->bfd_of_glue_owner,
9417 ARM2THUMB_GLUE_SECTION_NAME))
9418 return FALSE;
9419
9420 if (! elf32_arm_output_glue_section (info, abfd,
9421 globals->bfd_of_glue_owner,
9422 THUMB2ARM_GLUE_SECTION_NAME))
9423 return FALSE;
9424
9425 if (! elf32_arm_output_glue_section (info, abfd,
9426 globals->bfd_of_glue_owner,
9427 VFP11_ERRATUM_VENEER_SECTION_NAME))
9428 return FALSE;
9429
9430 if (! elf32_arm_output_glue_section (info, abfd,
9431 globals->bfd_of_glue_owner,
9432 ARM_BX_GLUE_SECTION_NAME))
9433 return FALSE;
9434 }
9435
9436 return TRUE;
9437}
9438
c178919b
NC		 9439/* Set the right machine number. */
9440
9441static bfd_boolean
57e8b36a 9442elf32_arm_object_p (bfd *abfd)
c178919b 9443{
5a6c6817 9444 unsigned int mach;
57e8b36a 9445
5a6c6817 9446 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9447
5a6c6817
NC		 9448 if (mach != bfd_mach_arm_unknown)
9449 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9450
9451 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9452 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9453
e16bb312 9454 else
5a6c6817 9455 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9456
9457 return TRUE;
9458}
9459
fc830a83 9460/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9461
b34976b6 9462static bfd_boolean
57e8b36a 9463elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9464{
9465 if (elf_flags_init (abfd)
9466 && elf_elfheader (abfd)->e_flags != flags)
9467 {
fc830a83
NC		 9468 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9469 {
fd2ec330 9470 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9471 (*_bfd_error_handler)
9472 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9473 abfd);
fc830a83 9474 else
d003868e
AM		 9475 _bfd_error_handler
9476 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9477 abfd);
fc830a83 9478 }
252b5132
RH		 9479 }
9480 else
9481 {
9482 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9483 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9484 }
9485
b34976b6 9486 return TRUE;
252b5132
RH		 9487}
9488
fc830a83 9489/* Copy backend specific data from one object module to another. */
9b485d32 9490
b34976b6 9491static bfd_boolean
57e8b36a 9492elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9493{
9494 flagword in_flags;
9495 flagword out_flags;
9496
0ffa91dd 9497 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9498 return TRUE;
252b5132 9499
fc830a83 9500 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9501 out_flags = elf_elfheader (obfd)->e_flags;
9502
fc830a83
NC		 9503 if (elf_flags_init (obfd)
9504 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9505 && in_flags != out_flags)
252b5132 9506 {
252b5132 9507 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9508 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9509 return FALSE;
252b5132
RH		 9510
9511 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9512 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9513 return FALSE;
252b5132
RH		 9514
9515 /* If the src and dest have different interworking flags
9516 then turn off the interworking bit. */
fd2ec330 9517 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9518 {
fd2ec330 9519 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9520 _bfd_error_handler
9521 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9522 obfd, ibfd);
252b5132 9523
fd2ec330 9524 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9525 }
1006ba19
PB		 9526
9527 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9528 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9529 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9530 }
9531
9532 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9533 elf_flags_init (obfd) = TRUE;
252b5132 9534
94a3258f
PB		 9535 /* Also copy the EI_OSABI field. */
9536 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9537 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9538
104d59d1
JM		 9539 /* Copy object attributes. */
9540 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9541
9542 return TRUE;
9543}
9544
9545/* Values for Tag_ABI_PCS_R9_use. */
9546enum
9547{
9548 AEABI_R9_V6,
9549 AEABI_R9_SB,
9550 AEABI_R9_TLS,
9551 AEABI_R9_unused
9552};
9553
9554/* Values for Tag_ABI_PCS_RW_data. */
9555enum
9556{
9557 AEABI_PCS_RW_data_absolute,
9558 AEABI_PCS_RW_data_PCrel,
9559 AEABI_PCS_RW_data_SBrel,
9560 AEABI_PCS_RW_data_unused
9561};
9562
9563/* Values for Tag_ABI_enum_size. */
9564enum
9565{
9566 AEABI_enum_unused,
9567 AEABI_enum_short,
9568 AEABI_enum_wide,
9569 AEABI_enum_forced_wide
9570};
9571
104d59d1
JM		 9572/* Determine whether an object attribute tag takes an integer, a
9573 string or both. */
906e58ca 9574
104d59d1
JM		 9575static int
9576elf32_arm_obj_attrs_arg_type (int tag)
9577{
9578 if (tag == Tag_compatibility)
3483fe2e 9579 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9580 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9581 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9582 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9583 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9584 else if (tag < 32)
3483fe2e 9585 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9586 else
3483fe2e 9587 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9588}
9589
5aa6ff7c
AS		 9590/* The ABI defines that Tag_conformance should be emitted first, and that
9591 Tag_nodefaults should be second (if either is defined). This sets those
9592 two positions, and bumps up the position of all the remaining tags to
9593 compensate. */
9594static int
9595elf32_arm_obj_attrs_order (int num)
9596{
3de4a297 9597 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 9598 return Tag_conformance;
3de4a297 9599 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 9600 return Tag_nodefaults;
9601 if ((num - 2) < Tag_nodefaults)
9602 return num - 2;
9603 if ((num - 1) < Tag_conformance)
9604 return num - 1;
9605 return num;
9606}
9607
e8b36cd1
JM		 9608/* Attribute numbers >=64 (mod 128) can be safely ignored. */
9609static bfd_boolean
9610elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
9611{
9612 if ((tag & 127) < 64)
9613 {
9614 _bfd_error_handler
9615 (_("%B: Unknown mandatory EABI object attribute %d"),
9616 abfd, tag);
9617 bfd_set_error (bfd_error_bad_value);
9618 return FALSE;
9619 }
9620 else
9621 {
9622 _bfd_error_handler
9623 (_("Warning: %B: Unknown EABI object attribute %d"),
9624 abfd, tag);
9625 return TRUE;
9626 }
9627}
9628
91e22acd
AS		 9629/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9630 Returns -1 if no architecture could be read. */
9631
9632static int
9633get_secondary_compatible_arch (bfd *abfd)
9634{
9635 obj_attribute *attr =
9636 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9637
9638 /* Note: the tag and its argument below are uleb128 values, though
9639 currently-defined values fit in one byte for each. */
9640 if (attr->s
9641 && attr->s[0] == Tag_CPU_arch
9642 && (attr->s[1] & 128) != 128
9643 && attr->s[2] == 0)
9644 return attr->s[1];
9645
9646 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9647 return -1;
9648}
9649
9650/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9651 The tag is removed if ARCH is -1. */
9652
8e79c3df 9653static void
91e22acd 9654set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9655{
91e22acd
AS		 9656 obj_attribute *attr =
9657 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9658
91e22acd
AS		 9659 if (arch == -1)
9660 {
9661 attr->s = NULL;
9662 return;
8e79c3df 9663 }
91e22acd
AS		 9664
9665 /* Note: the tag and its argument below are uleb128 values, though
9666 currently-defined values fit in one byte for each. */
9667 if (!attr->s)
21d799b5 9668 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 9669 attr->s[0] = Tag_CPU_arch;
9670 attr->s[1] = arch;
9671 attr->s[2] = '\0';
8e79c3df
CM		 9672}
9673
91e22acd
AS		 9674/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9675 into account. */
9676
9677static int
9678tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9679 int newtag, int secondary_compat)
8e79c3df 9680{
91e22acd
AS		 9681#define T(X) TAG_CPU_ARCH_##X
9682 int tagl, tagh, result;
9683 const int v6t2[] =
9684 {
9685 T(V6T2), /* PRE_V4. */
9686 T(V6T2), /* V4. */
9687 T(V6T2), /* V4T. */
9688 T(V6T2), /* V5T. */
9689 T(V6T2), /* V5TE. */
9690 T(V6T2), /* V5TEJ. */
9691 T(V6T2), /* V6. */
9692 T(V7), /* V6KZ. */
9693 T(V6T2) /* V6T2. */
9694 };
9695 const int v6k[] =
9696 {
9697 T(V6K), /* PRE_V4. */
9698 T(V6K), /* V4. */
9699 T(V6K), /* V4T. */
9700 T(V6K), /* V5T. */
9701 T(V6K), /* V5TE. */
9702 T(V6K), /* V5TEJ. */
9703 T(V6K), /* V6. */
9704 T(V6KZ), /* V6KZ. */
9705 T(V7), /* V6T2. */
9706 T(V6K) /* V6K. */
9707 };
9708 const int v7[] =
9709 {
9710 T(V7), /* PRE_V4. */
9711 T(V7), /* V4. */
9712 T(V7), /* V4T. */
9713 T(V7), /* V5T. */
9714 T(V7), /* V5TE. */
9715 T(V7), /* V5TEJ. */
9716 T(V7), /* V6. */
9717 T(V7), /* V6KZ. */
9718 T(V7), /* V6T2. */
9719 T(V7), /* V6K. */
9720 T(V7) /* V7. */
9721 };
9722 const int v6_m[] =
9723 {
9724 -1, /* PRE_V4. */
9725 -1, /* V4. */
9726 T(V6K), /* V4T. */
9727 T(V6K), /* V5T. */
9728 T(V6K), /* V5TE. */
9729 T(V6K), /* V5TEJ. */
9730 T(V6K), /* V6. */
9731 T(V6KZ), /* V6KZ. */
9732 T(V7), /* V6T2. */
9733 T(V6K), /* V6K. */
9734 T(V7), /* V7. */
9735 T(V6_M) /* V6_M. */
9736 };
9737 const int v6s_m[] =
9738 {
9739 -1, /* PRE_V4. */
9740 -1, /* V4. */
9741 T(V6K), /* V4T. */
9742 T(V6K), /* V5T. */
9743 T(V6K), /* V5TE. */
9744 T(V6K), /* V5TEJ. */
9745 T(V6K), /* V6. */
9746 T(V6KZ), /* V6KZ. */
9747 T(V7), /* V6T2. */
9748 T(V6K), /* V6K. */
9749 T(V7), /* V7. */
9750 T(V6S_M), /* V6_M. */
9751 T(V6S_M) /* V6S_M. */
9752 };
9e3c6df6
PB		 9753 const int v7e_m[] =
9754 {
9755 -1, /* PRE_V4. */
9756 -1, /* V4. */
9757 T(V7E_M), /* V4T. */
9758 T(V7E_M), /* V5T. */
9759 T(V7E_M), /* V5TE. */
9760 T(V7E_M), /* V5TEJ. */
9761 T(V7E_M), /* V6. */
9762 T(V7E_M), /* V6KZ. */
9763 T(V7E_M), /* V6T2. */
9764 T(V7E_M), /* V6K. */
9765 T(V7E_M), /* V7. */
9766 T(V7E_M), /* V6_M. */
9767 T(V7E_M), /* V6S_M. */
9768 T(V7E_M) /* V7E_M. */
9769 };
91e22acd
AS		 9770 const int v4t_plus_v6_m[] =
9771 {
9772 -1, /* PRE_V4. */
9773 -1, /* V4. */
9774 T(V4T), /* V4T. */
9775 T(V5T), /* V5T. */
9776 T(V5TE), /* V5TE. */
9777 T(V5TEJ), /* V5TEJ. */
9778 T(V6), /* V6. */
9779 T(V6KZ), /* V6KZ. */
9780 T(V6T2), /* V6T2. */
9781 T(V6K), /* V6K. */
9782 T(V7), /* V7. */
9783 T(V6_M), /* V6_M. */
9784 T(V6S_M), /* V6S_M. */
9e3c6df6 9785 T(V7E_M), /* V7E_M. */
91e22acd
AS		 9786 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9787 };
9788 const int *comb[] =
9789 {
9790 v6t2,
9791 v6k,
9792 v7,
9793 v6_m,
9794 v6s_m,
9e3c6df6 9795 v7e_m,
91e22acd
AS		 9796 /* Pseudo-architecture. */
9797 v4t_plus_v6_m
9798 };
9799
9800 /* Check we've not got a higher architecture than we know about. */
9801
9e3c6df6 9802 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 9803 {
3895f852 9804 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9805 return -1;
9806 }
9807
9808 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9809
9810 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9811 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9812 oldtag = T(V4T_PLUS_V6_M);
9813
9814 /* And override the new tag if we have a Tag_also_compatible_with on the
9815 input. */
9816
9817 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9818 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9819 newtag = T(V4T_PLUS_V6_M);
9820
9821 tagl = (oldtag < newtag) ? oldtag : newtag;
9822 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9823
9824 /* Architectures before V6KZ add features monotonically. */
9825 if (tagh <= TAG_CPU_ARCH_V6KZ)
9826 return result;
9827
9828 result = comb[tagh - T(V6T2)][tagl];
9829
9830 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9831 as the canonical version. */
9832 if (result == T(V4T_PLUS_V6_M))
9833 {
9834 result = T(V4T);
9835 *secondary_compat_out = T(V6_M);
9836 }
9837 else
9838 *secondary_compat_out = -1;
9839
9840 if (result == -1)
9841 {
3895f852 9842 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9843 ibfd, oldtag, newtag);
9844 return -1;
9845 }
9846
9847 return result;
9848#undef T
8e79c3df
CM		 9849}
9850
ee065d83
PB		 9851/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9852 are conflicting attributes. */
906e58ca 9853
ee065d83
PB		 9854static bfd_boolean
9855elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9856{
104d59d1
JM		 9857 obj_attribute *in_attr;
9858 obj_attribute *out_attr;
ee065d83
PB		 9859 /* Some tags have 0 = don't care, 1 = strong requirement,
9860 2 = weak requirement. */
91e22acd 9861 static const int order_021[3] = {0, 2, 1};
ee065d83 9862 int i;
91e22acd 9863 bfd_boolean result = TRUE;
ee065d83 9864
3e6b1042
DJ		 9865 /* Skip the linker stubs file. This preserves previous behavior
9866 of accepting unknown attributes in the first input file - but
9867 is that a bug? */
9868 if (ibfd->flags & BFD_LINKER_CREATED)
9869 return TRUE;
9870
104d59d1 9871 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9872 {
9873 /* This is the first object. Copy the attributes. */
104d59d1 9874 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 9875
cd21e546
MGD		 9876 out_attr = elf_known_obj_attributes_proc (obfd);
9877
004ae526
PB		 9878 /* Use the Tag_null value to indicate the attributes have been
9879 initialized. */
cd21e546 9880 out_attr[0].i = 1;
004ae526 9881
cd21e546
MGD		 9882 /* We do not output objects with Tag_MPextension_use_legacy - we move
9883 the attribute's value to Tag_MPextension_use. */
9884 if (out_attr[Tag_MPextension_use_legacy].i != 0)
9885 {
9886 if (out_attr[Tag_MPextension_use].i != 0
9887 && out_attr[Tag_MPextension_use_legacy].i
9888 != out_attr[Tag_MPextension_use].i)
9889 {
9890 _bfd_error_handler
9891 (_("Error: %B has both the current and legacy "
9892 "Tag_MPextension_use attributes"), ibfd);
9893 result = FALSE;
9894 }
9895
9896 out_attr[Tag_MPextension_use] =
9897 out_attr[Tag_MPextension_use_legacy];
9898 out_attr[Tag_MPextension_use_legacy].type = 0;
9899 out_attr[Tag_MPextension_use_legacy].i = 0;
9900 }
9901
9902 return result;
ee065d83
PB		 9903 }
9904
104d59d1
JM		 9905 in_attr = elf_known_obj_attributes_proc (ibfd);
9906 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9907 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9908 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9909 {
8e79c3df 9910 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9911 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9912 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9913 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9914 {
9915 _bfd_error_handler
3895f852 9916 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 9917 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
9918 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 9919 result = FALSE;
ee065d83
PB		 9920 }
9921 }
9922
3de4a297 9923 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9924 {
9925 /* Merge this attribute with existing attributes. */
9926 switch (i)
9927 {
9928 case Tag_CPU_raw_name:
9929 case Tag_CPU_name:
91e22acd 9930 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9931 break;
9932
9933 case Tag_ABI_optimization_goals:
9934 case Tag_ABI_FP_optimization_goals:
9935 /* Use the first value seen. */
9936 break;
9937
9938 case Tag_CPU_arch:
91e22acd
AS		 9939 {
9940 int secondary_compat = -1, secondary_compat_out = -1;
9941 unsigned int saved_out_attr = out_attr[i].i;
9942 static const char *name_table[] = {
9943 /* These aren't real CPU names, but we can't guess
9944 that from the architecture version alone. */
9945 "Pre v4",
9946 "ARM v4",
9947 "ARM v4T",
9948 "ARM v5T",
9949 "ARM v5TE",
9950 "ARM v5TEJ",
9951 "ARM v6",
9952 "ARM v6KZ",
9953 "ARM v6T2",
9954 "ARM v6K",
9955 "ARM v7",
9956 "ARM v6-M",
9957 "ARM v6S-M"
9958 };
9959
9960 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9961 secondary_compat = get_secondary_compatible_arch (ibfd);
9962 secondary_compat_out = get_secondary_compatible_arch (obfd);
9963 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9964 &secondary_compat_out,
9965 in_attr[i].i,
9966 secondary_compat);
9967 set_secondary_compatible_arch (obfd, secondary_compat_out);
9968
9969 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9970 if (out_attr[i].i == saved_out_attr)
9971 ; /* Leave the names alone. */
9972 else if (out_attr[i].i == in_attr[i].i)
9973 {
9974 /* The output architecture has been changed to match the
9975 input architecture. Use the input names. */
9976 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9977 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9978 : NULL;
9979 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9980 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9981 : NULL;
9982 }
9983 else
9984 {
9985 out_attr[Tag_CPU_name].s = NULL;
9986 out_attr[Tag_CPU_raw_name].s = NULL;
9987 }
9988
9989 /* If we still don't have a value for Tag_CPU_name,
9990 make one up now. Tag_CPU_raw_name remains blank. */
9991 if (out_attr[Tag_CPU_name].s == NULL
9992 && out_attr[i].i < ARRAY_SIZE (name_table))
9993 out_attr[Tag_CPU_name].s =
9994 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9995 }
9996 break;
9997
ee065d83
PB		 9998 case Tag_ARM_ISA_use:
9999 case Tag_THUMB_ISA_use:
ee065d83 10000 case Tag_WMMX_arch:
91e22acd
AS		 10001 case Tag_Advanced_SIMD_arch:
10002 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 10003 case Tag_ABI_FP_rounding:
ee065d83
PB		 10004 case Tag_ABI_FP_exceptions:
10005 case Tag_ABI_FP_user_exceptions:
10006 case Tag_ABI_FP_number_model:
75375b3e 10007 case Tag_FP_HP_extension:
91e22acd
AS		 10008 case Tag_CPU_unaligned_access:
10009 case Tag_T2EE_use:
91e22acd 10010 case Tag_MPextension_use:
ee065d83
PB		 10011 /* Use the largest value specified. */
10012 if (in_attr[i].i > out_attr[i].i)
10013 out_attr[i].i = in_attr[i].i;
10014 break;
10015
75375b3e 10016 case Tag_ABI_align_preserved:
91e22acd
AS		 10017 case Tag_ABI_PCS_RO_data:
10018 /* Use the smallest value specified. */
10019 if (in_attr[i].i < out_attr[i].i)
10020 out_attr[i].i = in_attr[i].i;
10021 break;
10022
75375b3e 10023 case Tag_ABI_align_needed:
91e22acd 10024 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 10025 && (in_attr[Tag_ABI_align_preserved].i == 0
10026 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 10027 {
91e22acd
AS		 10028 /* This error message should be enabled once all non-conformant
10029 binaries in the toolchain have had the attributes set
10030 properly.
ee065d83 10031 _bfd_error_handler
3895f852 10032 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 10033 obfd, ibfd);
10034 result = FALSE; */
ee065d83 10035 }
91e22acd
AS		 10036 /* Fall through. */
10037 case Tag_ABI_FP_denormal:
10038 case Tag_ABI_PCS_GOT_use:
10039 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
10040 value if greater than 2 (for future-proofing). */
10041 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
10042 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
10043 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 10044 out_attr[i].i = in_attr[i].i;
10045 break;
91e22acd 10046
75375b3e
MGD		 10047 case Tag_Virtualization_use:
10048 /* The virtualization tag effectively stores two bits of
10049 information: the intended use of TrustZone (in bit 0), and the
10050 intended use of Virtualization (in bit 1). */
10051 if (out_attr[i].i == 0)
10052 out_attr[i].i = in_attr[i].i;
10053 else if (in_attr[i].i != 0
10054 && in_attr[i].i != out_attr[i].i)
10055 {
10056 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
10057 out_attr[i].i = 3;
10058 else
10059 {
10060 _bfd_error_handler
10061 (_("error: %B: unable to merge virtualization attributes "
10062 "with %B"),
10063 obfd, ibfd);
10064 result = FALSE;
10065 }
10066 }
10067 break;
91e22acd
AS		 10068
10069 case Tag_CPU_arch_profile:
10070 if (out_attr[i].i != in_attr[i].i)
10071 {
10072 /* 0 will merge with anything.
10073 'A' and 'S' merge to 'A'.
10074 'R' and 'S' merge to 'R'.
10075 'M' and 'A|R|S' is an error. */
10076 if (out_attr[i].i == 0
10077 || (out_attr[i].i == 'S'
10078 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
10079 out_attr[i].i = in_attr[i].i;
10080 else if (in_attr[i].i == 0
10081 || (in_attr[i].i == 'S'
10082 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
10083 ; /* Do nothing. */
10084 else
10085 {
10086 _bfd_error_handler
3895f852 10087 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 10088 ibfd,
10089 in_attr[i].i ? in_attr[i].i : '0',
10090 out_attr[i].i ? out_attr[i].i : '0');
10091 result = FALSE;
10092 }
10093 }
10094 break;
75375b3e 10095 case Tag_FP_arch:
62f3b8c8 10096 {
4547cb56
NC		 10097 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
10098 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
10099 when it's 0. It might mean absence of FP hardware if
10100 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
10101
62f3b8c8
PB		 10102 static const struct
10103 {
10104 int ver;
10105 int regs;
10106 } vfp_versions[7] =
10107 {
10108 {0, 0},
10109 {1, 16},
10110 {2, 16},
10111 {3, 32},
10112 {3, 16},
10113 {4, 32},
10114 {4, 16}
10115 };
10116 int ver;
10117 int regs;
10118 int newval;
10119
4547cb56
NC		 10120 /* If the output has no requirement about FP hardware,
10121 follow the requirement of the input. */
10122 if (out_attr[i].i == 0)
10123 {
10124 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
10125 out_attr[i].i = in_attr[i].i;
10126 out_attr[Tag_ABI_HardFP_use].i
10127 = in_attr[Tag_ABI_HardFP_use].i;
10128 break;
10129 }
10130 /* If the input has no requirement about FP hardware, do
10131 nothing. */
10132 else if (in_attr[i].i == 0)
10133 {
10134 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
10135 break;
10136 }
10137
10138 /* Both the input and the output have nonzero Tag_FP_arch.
10139 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
10140
10141 /* If both the input and the output have zero Tag_ABI_HardFP_use,
10142 do nothing. */
10143 if (in_attr[Tag_ABI_HardFP_use].i == 0
10144 && out_attr[Tag_ABI_HardFP_use].i == 0)
10145 ;
10146 /* If the input and the output have different Tag_ABI_HardFP_use,
10147 the combination of them is 3 (SP & DP). */
10148 else if (in_attr[Tag_ABI_HardFP_use].i
10149 != out_attr[Tag_ABI_HardFP_use].i)
10150 out_attr[Tag_ABI_HardFP_use].i = 3;
10151
10152 /* Now we can handle Tag_FP_arch. */
10153
62f3b8c8
PB		 10154 /* Values greater than 6 aren't defined, so just pick the
10155 biggest */
10156 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
10157 {
10158 out_attr[i] = in_attr[i];
10159 break;
10160 }
10161 /* The output uses the superset of input features
10162 (ISA version) and registers. */
10163 ver = vfp_versions[in_attr[i].i].ver;
10164 if (ver < vfp_versions[out_attr[i].i].ver)
10165 ver = vfp_versions[out_attr[i].i].ver;
10166 regs = vfp_versions[in_attr[i].i].regs;
10167 if (regs < vfp_versions[out_attr[i].i].regs)
10168 regs = vfp_versions[out_attr[i].i].regs;
10169 /* This assumes all possible supersets are also a valid
10170 options. */
10171 for (newval = 6; newval > 0; newval--)
10172 {
10173 if (regs == vfp_versions[newval].regs
10174 && ver == vfp_versions[newval].ver)
10175 break;
10176 }
10177 out_attr[i].i = newval;
10178 }
b1cc4aeb 10179 break;
ee065d83
PB		 10180 case Tag_PCS_config:
10181 if (out_attr[i].i == 0)
10182 out_attr[i].i = in_attr[i].i;
10183 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
10184 {
10185 /* It's sometimes ok to mix different configs, so this is only
10186 a warning. */
10187 _bfd_error_handler
10188 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10189 }
10190 break;
10191 case Tag_ABI_PCS_R9_use:
004ae526
PB		 10192 if (in_attr[i].i != out_attr[i].i
10193 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 10194 && in_attr[i].i != AEABI_R9_unused)
10195 {
10196 _bfd_error_handler
3895f852 10197 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 10198 result = FALSE;
ee065d83
PB		 10199 }
10200 if (out_attr[i].i == AEABI_R9_unused)
10201 out_attr[i].i = in_attr[i].i;
10202 break;
10203 case Tag_ABI_PCS_RW_data:
10204 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10205 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10206 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10207 {
10208 _bfd_error_handler
3895f852 10209 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 10210 ibfd);
91e22acd 10211 result = FALSE;
ee065d83
PB		 10212 }
10213 /* Use the smallest value specified. */
10214 if (in_attr[i].i < out_attr[i].i)
10215 out_attr[i].i = in_attr[i].i;
10216 break;
ee065d83 10217 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 10218 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10219 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 10220 {
10221 _bfd_error_handler
a9dc9481
JM		 10222 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10223 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 10224 }
a9dc9481 10225 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 10226 out_attr[i].i = in_attr[i].i;
10227 break;
ee065d83
PB		 10228 case Tag_ABI_enum_size:
10229 if (in_attr[i].i != AEABI_enum_unused)
10230 {
10231 if (out_attr[i].i == AEABI_enum_unused
10232 || out_attr[i].i == AEABI_enum_forced_wide)
10233 {
10234 /* The existing object is compatible with anything.
10235 Use whatever requirements the new object has. */
10236 out_attr[i].i = in_attr[i].i;
10237 }
10238 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 10239 && out_attr[i].i != in_attr[i].i
0ffa91dd 10240 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 10241 {
91e22acd 10242 static const char *aeabi_enum_names[] =
bf21ed78 10243 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 10244 const char *in_name =
10245 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10246 ? aeabi_enum_names[in_attr[i].i]
10247 : "<unknown>";
10248 const char *out_name =
10249 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10250 ? aeabi_enum_names[out_attr[i].i]
10251 : "<unknown>";
ee065d83 10252 _bfd_error_handler
bf21ed78 10253 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 10254 ibfd, in_name, out_name);
ee065d83
PB		 10255 }
10256 }
10257 break;
10258 case Tag_ABI_VFP_args:
10259 /* Aready done. */
10260 break;
10261 case Tag_ABI_WMMX_args:
10262 if (in_attr[i].i != out_attr[i].i)
10263 {
10264 _bfd_error_handler
3895f852 10265 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 10266 ibfd, obfd);
91e22acd 10267 result = FALSE;
ee065d83
PB		 10268 }
10269 break;
7b86a9fa
AS		 10270 case Tag_compatibility:
10271 /* Merged in target-independent code. */
10272 break;
91e22acd 10273 case Tag_ABI_HardFP_use:
4547cb56 10274 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 10275 break;
10276 case Tag_ABI_FP_16bit_format:
10277 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10278 {
10279 if (in_attr[i].i != out_attr[i].i)
10280 {
10281 _bfd_error_handler
3895f852 10282 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10283 ibfd, obfd);
10284 result = FALSE;
10285 }
10286 }
10287 if (in_attr[i].i != 0)
10288 out_attr[i].i = in_attr[i].i;
10289 break;
7b86a9fa 10290
cd21e546
MGD		 10291 case Tag_DIV_use:
10292 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
10293 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10294 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10295 CPU. We will merge as follows: If the input attribute's value
10296 is one then the output attribute's value remains unchanged. If
10297 the input attribute's value is zero or two then if the output
10298 attribute's value is one the output value is set to the input
10299 value, otherwise the output value must be the same as the
10300 inputs. */
10301 if (in_attr[i].i != 1 && out_attr[i].i != 1)
10302 {
10303 if (in_attr[i].i != out_attr[i].i)
10304 {
10305 _bfd_error_handler
10306 (_("DIV usage mismatch between %B and %B"),
10307 ibfd, obfd);
10308 result = FALSE;
10309 }
10310 }
10311
10312 if (in_attr[i].i != 1)
10313 out_attr[i].i = in_attr[i].i;
10314
10315 break;
10316
10317 case Tag_MPextension_use_legacy:
10318 /* We don't output objects with Tag_MPextension_use_legacy - we
10319 move the value to Tag_MPextension_use. */
10320 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
10321 {
10322 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
10323 {
10324 _bfd_error_handler
10325 (_("%B has has both the current and legacy "
10326 "Tag_MPextension_use attributes"),
10327 ibfd);
10328 result = FALSE;
10329 }
10330 }
10331
10332 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
10333 out_attr[Tag_MPextension_use] = in_attr[i];
10334
10335 break;
10336
91e22acd 10337 case Tag_nodefaults:
2d0bb761
AS		 10338 /* This tag is set if it exists, but the value is unused (and is
10339 typically zero). We don't actually need to do anything here -
10340 the merge happens automatically when the type flags are merged
10341 below. */
91e22acd
AS		 10342 break;
10343 case Tag_also_compatible_with:
10344 /* Already done in Tag_CPU_arch. */
10345 break;
10346 case Tag_conformance:
10347 /* Keep the attribute if it matches. Throw it away otherwise.
10348 No attribute means no claim to conform. */
10349 if (!in_attr[i].s || !out_attr[i].s
10350 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10351 out_attr[i].s = NULL;
10352 break;
3cfad14c 10353
91e22acd 10354 default:
e8b36cd1
JM		 10355 result
10356 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 10357 }
10358
10359 /* If out_attr was copied from in_attr then it won't have a type yet. */
10360 if (in_attr[i].type && !out_attr[i].type)
10361 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10362 }
10363
104d59d1 10364 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 10365 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
10366 return FALSE;
ee065d83 10367
104d59d1 10368 /* Check for any attributes not known on ARM. */
e8b36cd1 10369 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 10370
91e22acd 10371 return result;
252b5132
RH		 10372}
10373
3a4a14e9
PB		 10374
10375/* Return TRUE if the two EABI versions are incompatible. */
10376
10377static bfd_boolean
10378elf32_arm_versions_compatible (unsigned iver, unsigned over)
10379{
10380 /* v4 and v5 are the same spec before and after it was released,
10381 so allow mixing them. */
10382 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10383 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10384 return TRUE;
10385
10386 return (iver == over);
10387}
10388
252b5132
RH		 10389/* Merge backend specific data from an object file to the output
10390 object file when linking. */
9b485d32 10391
b34976b6 10392static bfd_boolean
21d799b5 10393elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 10394
9b485d32
NC		 10395/* Display the flags field. */
10396
b34976b6 10397static bfd_boolean
57e8b36a 10398elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10399{
fc830a83
NC		 10400 FILE * file = (FILE *) ptr;
10401 unsigned long flags;
252b5132
RH		 10402
10403 BFD_ASSERT (abfd != NULL && ptr != NULL);
10404
10405 /* Print normal ELF private data. */
10406 _bfd_elf_print_private_bfd_data (abfd, ptr);
10407
fc830a83 10408 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10409 /* Ignore init flag - it may not be set, despite the flags field
10410 containing valid data. */
252b5132
RH		 10411
10412 /* xgettext:c-format */
9b485d32 10413 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10414
fc830a83
NC		 10415 switch (EF_ARM_EABI_VERSION (flags))
10416 {
10417 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10418 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10419 official ARM ELF extended ABI. Hence they are only decoded if
10420 the EABI version is not set. */
fd2ec330 10421 if (flags & EF_ARM_INTERWORK)
9b485d32 10422 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10423
fd2ec330 10424 if (flags & EF_ARM_APCS_26)
6c571f00 10425 fprintf (file, " [APCS-26]");
fc830a83 10426 else
6c571f00 10427 fprintf (file, " [APCS-32]");
9a5aca8c 10428
96a846ea
RE		 10429 if (flags & EF_ARM_VFP_FLOAT)
10430 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10431 else if (flags & EF_ARM_MAVERICK_FLOAT)
10432 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10433 else
10434 fprintf (file, _(" [FPA float format]"));
10435
fd2ec330 10436 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10437 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10438
fd2ec330 10439 if (flags & EF_ARM_PIC)
9b485d32 10440 fprintf (file, _(" [position independent]"));
fc830a83 10441
fd2ec330 10442 if (flags & EF_ARM_NEW_ABI)
9b485d32 10443 fprintf (file, _(" [new ABI]"));
9a5aca8c 10444
fd2ec330 10445 if (flags & EF_ARM_OLD_ABI)
9b485d32 10446 fprintf (file, _(" [old ABI]"));
9a5aca8c 10447
fd2ec330 10448 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10449 fprintf (file, _(" [software FP]"));
9a5aca8c 10450
96a846ea
RE		 10451 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10452 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10453 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10454 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10455 break;
9a5aca8c 10456
fc830a83 10457 case EF_ARM_EABI_VER1:
9b485d32 10458 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10459
fc830a83 10460 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10461 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10462 else
9b485d32 10463 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10464
fc830a83
NC		 10465 flags &= ~ EF_ARM_SYMSARESORTED;
10466 break;
9a5aca8c 10467
fd2ec330
PB		 10468 case EF_ARM_EABI_VER2:
10469 fprintf (file, _(" [Version2 EABI]"));
10470
10471 if (flags & EF_ARM_SYMSARESORTED)
10472 fprintf (file, _(" [sorted symbol table]"));
10473 else
10474 fprintf (file, _(" [unsorted symbol table]"));
10475
10476 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10477 fprintf (file, _(" [dynamic symbols use segment index]"));
10478
10479 if (flags & EF_ARM_MAPSYMSFIRST)
10480 fprintf (file, _(" [mapping symbols precede others]"));
10481
99e4ae17 10482 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10483 | EF_ARM_MAPSYMSFIRST);
10484 break;
10485
d507cf36
PB		 10486 case EF_ARM_EABI_VER3:
10487 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10488 break;
10489
10490 case EF_ARM_EABI_VER4:
10491 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10492 goto eabi;
d507cf36 10493
3a4a14e9
PB		 10494 case EF_ARM_EABI_VER5:
10495 fprintf (file, _(" [Version5 EABI]"));
10496 eabi:
d507cf36
PB		 10497 if (flags & EF_ARM_BE8)
10498 fprintf (file, _(" [BE8]"));
10499
10500 if (flags & EF_ARM_LE8)
10501 fprintf (file, _(" [LE8]"));
10502
10503 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10504 break;
10505
fc830a83 10506 default:
9b485d32 10507 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10508 break;
10509 }
252b5132 10510
fc830a83 10511 flags &= ~ EF_ARM_EABIMASK;
252b5132 10512
fc830a83 10513 if (flags & EF_ARM_RELEXEC)
9b485d32 10514 fprintf (file, _(" [relocatable executable]"));
252b5132 10515
fc830a83 10516 if (flags & EF_ARM_HASENTRY)
9b485d32 10517 fprintf (file, _(" [has entry point]"));
252b5132 10518
fc830a83
NC		 10519 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10520
10521 if (flags)
9b485d32 10522 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10523
252b5132
RH		 10524 fputc ('\n', file);
10525
b34976b6 10526 return TRUE;
252b5132
RH		 10527}
10528
10529static int
57e8b36a 10530elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10531{
2f0ca46a
NC		 10532 switch (ELF_ST_TYPE (elf_sym->st_info))
10533 {
10534 case STT_ARM_TFUNC:
10535 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10536
2f0ca46a
NC		 10537 case STT_ARM_16BIT:
10538 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10539 This allows us to distinguish between data used by Thumb instructions
10540 and non-data (which is probably code) inside Thumb regions of an
10541 executable. */
1a0eb693 10542 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10543 return ELF_ST_TYPE (elf_sym->st_info);
10544 break;
9a5aca8c 10545
ce855c42
NC		 10546 default:
10547 break;
2f0ca46a
NC		 10548 }
10549
10550 return type;
252b5132 10551}
f21f3fe0 10552
252b5132 10553static asection *
07adf181
AM		 10554elf32_arm_gc_mark_hook (asection *sec,
10555 struct bfd_link_info *info,
10556 Elf_Internal_Rela *rel,
10557 struct elf_link_hash_entry *h,
10558 Elf_Internal_Sym *sym)
252b5132
RH		 10559{
10560 if (h != NULL)
07adf181 10561 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10562 {
10563 case R_ARM_GNU_VTINHERIT:
10564 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10565 return NULL;
10566 }
9ad5cbcf 10567
07adf181 10568 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10569}
10570
780a67af
NC		 10571/* Update the got entry reference counts for the section being removed. */
10572
b34976b6 10573static bfd_boolean
ba93b8ac
DJ		 10574elf32_arm_gc_sweep_hook (bfd * abfd,
10575 struct bfd_link_info * info,
10576 asection * sec,
10577 const Elf_Internal_Rela * relocs)
252b5132 10578{
5e681ec4
PB		 10579 Elf_Internal_Shdr *symtab_hdr;
10580 struct elf_link_hash_entry **sym_hashes;
10581 bfd_signed_vma *local_got_refcounts;
10582 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10583 struct elf32_arm_link_hash_table * globals;
10584
7dda2462
TG		 10585 if (info->relocatable)
10586 return TRUE;
10587
eb043451 10588 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10589 if (globals == NULL)
10590 return FALSE;
5e681ec4
PB		 10591
10592 elf_section_data (sec)->local_dynrel = NULL;
10593
0ffa91dd 10594 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10595 sym_hashes = elf_sym_hashes (abfd);
10596 local_got_refcounts = elf_local_got_refcounts (abfd);
10597
906e58ca 10598 check_use_blx (globals);
bd97cb95 10599
5e681ec4
PB		 10600 relend = relocs + sec->reloc_count;
10601 for (rel = relocs; rel < relend; rel++)
eb043451 10602 {
3eb128b2
AM		 10603 unsigned long r_symndx;
10604 struct elf_link_hash_entry *h = NULL;
eb043451 10605 int r_type;
5e681ec4 10606
3eb128b2
AM		 10607 r_symndx = ELF32_R_SYM (rel->r_info);
10608 if (r_symndx >= symtab_hdr->sh_info)
10609 {
10610 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10611 while (h->root.type == bfd_link_hash_indirect
10612 || h->root.type == bfd_link_hash_warning)
10613 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10614 }
10615
eb043451 10616 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10617 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10618 switch (r_type)
10619 {
10620 case R_ARM_GOT32:
eb043451 10621 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10622 case R_ARM_TLS_GD32:
10623 case R_ARM_TLS_IE32:
3eb128b2 10624 if (h != NULL)
eb043451 10625 {
eb043451
PB		 10626 if (h->got.refcount > 0)
10627 h->got.refcount -= 1;
10628 }
10629 else if (local_got_refcounts != NULL)
10630 {
10631 if (local_got_refcounts[r_symndx] > 0)
10632 local_got_refcounts[r_symndx] -= 1;
10633 }
10634 break;
10635
ba93b8ac 10636 case R_ARM_TLS_LDM32:
4dfe6ac6 10637 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 10638 break;
10639
eb043451 10640 case R_ARM_ABS32:
bb224fc3 10641 case R_ARM_ABS32_NOI:
eb043451 10642 case R_ARM_REL32:
bb224fc3 10643 case R_ARM_REL32_NOI:
eb043451
PB		 10644 case R_ARM_PC24:
10645 case R_ARM_PLT32:
5b5bb741
PB		 10646 case R_ARM_CALL:
10647 case R_ARM_JUMP24:
eb043451 10648 case R_ARM_PREL31:
c19d1205 10649 case R_ARM_THM_CALL:
bd97cb95
DJ		 10650 case R_ARM_THM_JUMP24:
10651 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10652 case R_ARM_MOVW_ABS_NC:
10653 case R_ARM_MOVT_ABS:
10654 case R_ARM_MOVW_PREL_NC:
10655 case R_ARM_MOVT_PREL:
10656 case R_ARM_THM_MOVW_ABS_NC:
10657 case R_ARM_THM_MOVT_ABS:
10658 case R_ARM_THM_MOVW_PREL_NC:
10659 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10660 /* Should the interworking branches be here also? */
10661
3eb128b2 10662 if (h != NULL)
eb043451
PB		 10663 {
10664 struct elf32_arm_link_hash_entry *eh;
0bdcacaf
RS		 10665 struct elf_dyn_relocs **pp;
10666 struct elf_dyn_relocs *p;
5e681ec4 10667
b7693d02 10668 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10669
eb043451 10670 if (h->plt.refcount > 0)
b7693d02
DJ		 10671 {
10672 h->plt.refcount -= 1;
bd97cb95
DJ		 10673 if (r_type == R_ARM_THM_CALL)
10674 eh->plt_maybe_thumb_refcount--;
10675
10676 if (r_type == R_ARM_THM_JUMP24
10677 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10678 eh->plt_thumb_refcount--;
10679 }
5e681ec4 10680
eb043451 10681 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10682 || r_type == R_ARM_REL32
10683 || r_type == R_ARM_ABS32_NOI
10684 || r_type == R_ARM_REL32_NOI)
0bdcacaf
RS		 10685 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
10686 if (p->sec == sec)
eb043451
PB		 10687 {
10688 p->count -= 1;
bb224fc3 10689 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
0bdcacaf 10690 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10691 p->pc_count -= 1;
eb043451
PB		 10692 if (p->count == 0)
10693 *pp = p->next;
10694 break;
10695 }
eb043451
PB		 10696 }
10697 break;
5e681ec4 10698
eb043451
PB		 10699 default:
10700 break;
10701 }
10702 }
5e681ec4 10703
b34976b6 10704 return TRUE;
252b5132
RH		 10705}
10706
780a67af
NC		 10707/* Look through the relocs for a section during the first phase. */
10708
b34976b6 10709static bfd_boolean
57e8b36a
NC		 10710elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10711 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10712{
b34976b6
AM		 10713 Elf_Internal_Shdr *symtab_hdr;
10714 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10715 const Elf_Internal_Rela *rel;
10716 const Elf_Internal_Rela *rel_end;
10717 bfd *dynobj;
5e681ec4 10718 asection *sreloc;
5e681ec4 10719 struct elf32_arm_link_hash_table *htab;
39623e12 10720 bfd_boolean needs_plt;
ce98a316 10721 unsigned long nsyms;
9a5aca8c 10722
1049f94e 10723 if (info->relocatable)
b34976b6 10724 return TRUE;
9a5aca8c 10725
0ffa91dd
NC		 10726 BFD_ASSERT (is_arm_elf (abfd));
10727
5e681ec4 10728 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10729 if (htab == NULL)
10730 return FALSE;
10731
5e681ec4 10732 sreloc = NULL;
9a5aca8c 10733
67687978
PB		 10734 /* Create dynamic sections for relocatable executables so that we can
10735 copy relocations. */
10736 if (htab->root.is_relocatable_executable
10737 && ! htab->root.dynamic_sections_created)
10738 {
10739 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10740 return FALSE;
10741 }
10742
252b5132 10743 dynobj = elf_hash_table (info)->dynobj;
0ffa91dd 10744 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10745 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10746 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10747
252b5132
RH		 10748 rel_end = relocs + sec->reloc_count;
10749 for (rel = relocs; rel < rel_end; rel++)
10750 {
10751 struct elf_link_hash_entry *h;
b7693d02 10752 struct elf32_arm_link_hash_entry *eh;
252b5132 10753 unsigned long r_symndx;
eb043451 10754 int r_type;
9a5aca8c 10755
252b5132 10756 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10757 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10758 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10759
ce98a316
NC		 10760 if (r_symndx >= nsyms
10761 /* PR 9934: It is possible to have relocations that do not
10762 refer to symbols, thus it is also possible to have an
10763 object file containing relocations but no symbol table. */
cf35638d 10764 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 10765 {
10766 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10767 r_symndx);
ba93b8ac
DJ		 10768 return FALSE;
10769 }
10770
ce98a316 10771 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10772 h = NULL;
10773 else
973a3492
L		 10774 {
10775 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10776 while (h->root.type == bfd_link_hash_indirect
10777 || h->root.type == bfd_link_hash_warning)
10778 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10779 }
9a5aca8c 10780
b7693d02
DJ		 10781 eh = (struct elf32_arm_link_hash_entry *) h;
10782
eb043451 10783 switch (r_type)
252b5132 10784 {
5e681ec4 10785 case R_ARM_GOT32:
eb043451 10786 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10787 case R_ARM_TLS_GD32:
10788 case R_ARM_TLS_IE32:
5e681ec4 10789 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10790 {
10791 int tls_type, old_tls_type;
5e681ec4 10792
ba93b8ac
DJ		 10793 switch (r_type)
10794 {
10795 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10796 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10797 default: tls_type = GOT_NORMAL; break;
10798 }
252b5132 10799
ba93b8ac
DJ		 10800 if (h != NULL)
10801 {
10802 h->got.refcount++;
10803 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10804 }
10805 else
10806 {
10807 bfd_signed_vma *local_got_refcounts;
10808
10809 /* This is a global offset table entry for a local symbol. */
10810 local_got_refcounts = elf_local_got_refcounts (abfd);
10811 if (local_got_refcounts == NULL)
10812 {
10813 bfd_size_type size;
906e58ca 10814
ba93b8ac 10815 size = symtab_hdr->sh_info;
906e58ca 10816 size *= (sizeof (bfd_signed_vma) + sizeof (char));
21d799b5
NC		 10817 local_got_refcounts = (bfd_signed_vma *)
10818 bfd_zalloc (abfd, size);
ba93b8ac
DJ		 10819 if (local_got_refcounts == NULL)
10820 return FALSE;
10821 elf_local_got_refcounts (abfd) = local_got_refcounts;
10822 elf32_arm_local_got_tls_type (abfd)
10823 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10824 }
10825 local_got_refcounts[r_symndx] += 1;
10826 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10827 }
10828
10829 /* We will already have issued an error message if there is a
10830 TLS / non-TLS mismatch, based on the symbol type. We don't
10831 support any linker relaxations. So just combine any TLS
10832 types needed. */
10833 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10834 && tls_type != GOT_NORMAL)
10835 tls_type |= old_tls_type;
10836
10837 if (old_tls_type != tls_type)
10838 {
10839 if (h != NULL)
10840 elf32_arm_hash_entry (h)->tls_type = tls_type;
10841 else
10842 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10843 }
10844 }
8029a119 10845 /* Fall through. */
ba93b8ac
DJ		 10846
10847 case R_ARM_TLS_LDM32:
10848 if (r_type == R_ARM_TLS_LDM32)
10849 htab->tls_ldm_got.refcount++;
8029a119 10850 /* Fall through. */
252b5132 10851
c19d1205 10852 case R_ARM_GOTOFF32:
5e681ec4 10853 case R_ARM_GOTPC:
362d30a1 10854 if (htab->root.sgot == NULL)
5e681ec4
PB		 10855 {
10856 if (htab->root.dynobj == NULL)
10857 htab->root.dynobj = abfd;
10858 if (!create_got_section (htab->root.dynobj, info))
10859 return FALSE;
10860 }
252b5132
RH		 10861 break;
10862
00a97672
RS		 10863 case R_ARM_ABS12:
10864 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10865 ldr __GOTT_INDEX__ offsets. */
10866 if (!htab->vxworks_p)
10867 break;
8029a119 10868 /* Fall through. */
00a97672 10869
252b5132 10870 case R_ARM_PC24:
7359ea65 10871 case R_ARM_PLT32:
5b5bb741
PB		 10872 case R_ARM_CALL:
10873 case R_ARM_JUMP24:
eb043451 10874 case R_ARM_PREL31:
c19d1205 10875 case R_ARM_THM_CALL:
bd97cb95
DJ		 10876 case R_ARM_THM_JUMP24:
10877 case R_ARM_THM_JUMP19:
39623e12
PB		 10878 needs_plt = 1;
10879 goto normal_reloc;
10880
96c23d59
JM		 10881 case R_ARM_MOVW_ABS_NC:
10882 case R_ARM_MOVT_ABS:
10883 case R_ARM_THM_MOVW_ABS_NC:
10884 case R_ARM_THM_MOVT_ABS:
10885 if (info->shared)
10886 {
10887 (*_bfd_error_handler)
10888 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10889 abfd, elf32_arm_howto_table_1[r_type].name,
10890 (h) ? h->root.root.string : "a local symbol");
10891 bfd_set_error (bfd_error_bad_value);
10892 return FALSE;
10893 }
10894
10895 /* Fall through. */
39623e12
PB		 10896 case R_ARM_ABS32:
10897 case R_ARM_ABS32_NOI:
10898 case R_ARM_REL32:
10899 case R_ARM_REL32_NOI:
b6895b4f
PB		 10900 case R_ARM_MOVW_PREL_NC:
10901 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10902 case R_ARM_THM_MOVW_PREL_NC:
10903 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10904 needs_plt = 0;
10905 normal_reloc:
10906
b7693d02 10907 /* Should the interworking branches be listed here? */
7359ea65 10908 if (h != NULL)
5e681ec4
PB		 10909 {
10910 /* If this reloc is in a read-only section, we might
10911 need a copy reloc. We can't check reliably at this
10912 stage whether the section is read-only, as input
10913 sections have not yet been mapped to output sections.
10914 Tentatively set the flag for now, and correct in
10915 adjust_dynamic_symbol. */
7359ea65 10916 if (!info->shared)
f5385ebf 10917 h->non_got_ref = 1;
7359ea65 10918
5e681ec4 10919 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10920 refers to is in a different object. We can't tell for
10921 sure yet, because something later might force the
10922 symbol local. */
39623e12 10923 if (needs_plt)
f5385ebf 10924 h->needs_plt = 1;
4f199be3
DJ		 10925
10926 /* If we create a PLT entry, this relocation will reference
10927 it, even if it's an ABS32 relocation. */
10928 h->plt.refcount += 1;
b7693d02 10929
bd97cb95
DJ		 10930 /* It's too early to use htab->use_blx here, so we have to
10931 record possible blx references separately from
10932 relocs that definitely need a thumb stub. */
10933
c19d1205 10934 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10935 eh->plt_maybe_thumb_refcount += 1;
10936
10937 if (r_type == R_ARM_THM_JUMP24
10938 || r_type == R_ARM_THM_JUMP19)
b7693d02 10939 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10940 }
10941
67687978
PB		 10942 /* If we are creating a shared library or relocatable executable,
10943 and this is a reloc against a global symbol, or a non PC
10944 relative reloc against a local symbol, then we need to copy
10945 the reloc into the shared library. However, if we are linking
10946 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10947 global symbol which is defined in an object we are
10948 including in the link (i.e., DEF_REGULAR is set). At
10949 this point we have not seen all the input files, so it is
10950 possible that DEF_REGULAR is not set now but will be set
10951 later (it is never cleared). We account for that
10952 possibility below by storing information in the
0bdcacaf 10953 dyn_relocs field of the hash table entry. */
67687978 10954 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10955 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10956 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10957 || (h != NULL && ! h->needs_plt
10958 && (! info->symbolic || ! h->def_regular))))
252b5132 10959 {
0bdcacaf 10960 struct elf_dyn_relocs *p, **head;
5e681ec4 10961
252b5132
RH		 10962 /* When creating a shared object, we must copy these
10963 reloc types into the output file. We create a reloc
10964 section in dynobj and make room for this reloc. */
83bac4b0 10965 if (sreloc == NULL)
252b5132 10966 {
83bac4b0
NC		 10967 sreloc = _bfd_elf_make_dynamic_reloc_section
10968 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10969
83bac4b0 10970 if (sreloc == NULL)
b34976b6 10971 return FALSE;
252b5132 10972
83bac4b0 10973 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 10974 if (htab->symbian_p)
252b5132 10975 {
83bac4b0 10976 flagword flags;
5e681ec4 10977
83bac4b0 10978 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 10979 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 10980 bfd_set_section_flags (dynobj, sreloc, flags);
10981 }
252b5132
RH		 10982 }
10983
5e681ec4
PB		 10984 /* If this is a global symbol, we count the number of
10985 relocations we need for this symbol. */
10986 if (h != NULL)
252b5132 10987 {
0bdcacaf 10988 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
5e681ec4
PB		 10989 }
10990 else
10991 {
10992 /* Track dynamic relocs needed for local syms too.
10993 We really need local syms available to do this
10994 easily. Oh well. */
5e681ec4 10995 asection *s;
6edfbbad 10996 void *vpp;
87d72d41 10997 Elf_Internal_Sym *isym;
6edfbbad 10998
87d72d41
AM		 10999 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11000 abfd, r_symndx);
11001 if (isym == NULL)
5e681ec4 11002 return FALSE;
57e8b36a 11003
87d72d41
AM		 11004 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11005 if (s == NULL)
11006 s = sec;
11007
6edfbbad 11008 vpp = &elf_section_data (s)->local_dynrel;
0bdcacaf 11009 head = (struct elf_dyn_relocs **) vpp;
5e681ec4 11010 }
57e8b36a 11011
5e681ec4 11012 p = *head;
0bdcacaf 11013 if (p == NULL || p->sec != sec)
5e681ec4
PB		 11014 {
11015 bfd_size_type amt = sizeof *p;
57e8b36a 11016
0bdcacaf 11017 p = (struct elf_dyn_relocs *)
21d799b5 11018 bfd_alloc (htab->root.dynobj, amt);
252b5132 11019 if (p == NULL)
5e681ec4
PB		 11020 return FALSE;
11021 p->next = *head;
11022 *head = p;
0bdcacaf 11023 p->sec = sec;
5e681ec4 11024 p->count = 0;
ba93b8ac 11025 p->pc_count = 0;
252b5132 11026 }
57e8b36a 11027
bb224fc3 11028 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 11029 p->pc_count += 1;
71a976dd 11030 p->count += 1;
252b5132
RH		 11031 }
11032 break;
11033
11034 /* This relocation describes the C++ object vtable hierarchy.
11035 Reconstruct it for later use during GC. */
11036 case R_ARM_GNU_VTINHERIT:
c152c796 11037 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 11038 return FALSE;
252b5132 11039 break;
9a5aca8c 11040
252b5132
RH		 11041 /* This relocation describes which C++ vtable entries are actually
11042 used. Record for later use during GC. */
11043 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 11044 BFD_ASSERT (h != NULL);
11045 if (h != NULL
11046 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 11047 return FALSE;
252b5132
RH		 11048 break;
11049 }
11050 }
f21f3fe0 11051
b34976b6 11052 return TRUE;
252b5132
RH		 11053}
11054
6a5bb875
PB		 11055/* Unwinding tables are not referenced directly. This pass marks them as
11056 required if the corresponding code section is marked. */
11057
11058static bfd_boolean
906e58ca
NC		 11059elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11060 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11061{
11062 bfd *sub;
11063 Elf_Internal_Shdr **elf_shdrp;
11064 bfd_boolean again;
11065
11066 /* Marking EH data may cause additional code sections to be marked,
11067 requiring multiple passes. */
11068 again = TRUE;
11069 while (again)
11070 {
11071 again = FALSE;
11072 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11073 {
11074 asection *o;
11075
0ffa91dd 11076 if (! is_arm_elf (sub))
6a5bb875
PB		 11077 continue;
11078
11079 elf_shdrp = elf_elfsections (sub);
11080 for (o = sub->sections; o != NULL; o = o->next)
11081 {
11082 Elf_Internal_Shdr *hdr;
0ffa91dd 11083
6a5bb875 11084 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11085 if (hdr->sh_type == SHT_ARM_EXIDX
11086 && hdr->sh_link
11087 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11088 && !o->gc_mark
11089 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11090 {
11091 again = TRUE;
11092 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11093 return FALSE;
11094 }
11095 }
11096 }
11097 }
11098
11099 return TRUE;
11100}
11101
3c9458e9
NC		 11102/* Treat mapping symbols as special target symbols. */
11103
11104static bfd_boolean
11105elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11106{
b0796911
PB		 11107 return bfd_is_arm_special_symbol_name (sym->name,
11108 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11109}
11110
0367ecfb
NC		 11111/* This is a copy of elf_find_function() from elf.c except that
11112 ARM mapping symbols are ignored when looking for function names
11113 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11114
0367ecfb
NC		 11115static bfd_boolean
11116arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11117 asection * section,
11118 asymbol ** symbols,
11119 bfd_vma offset,
11120 const char ** filename_ptr,
11121 const char ** functionname_ptr)
11122{
11123 const char * filename = NULL;
11124 asymbol * func = NULL;
11125 bfd_vma low_func = 0;
11126 asymbol ** p;
252b5132
RH		 11127
11128 for (p = symbols; *p != NULL; p++)
11129 {
11130 elf_symbol_type *q;
11131
11132 q = (elf_symbol_type *) *p;
11133
252b5132
RH		 11134 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11135 {
11136 default:
11137 break;
11138 case STT_FILE:
11139 filename = bfd_asymbol_name (&q->symbol);
11140 break;
252b5132
RH		 11141 case STT_FUNC:
11142 case STT_ARM_TFUNC:
9d2da7ca 11143 case STT_NOTYPE:
b0796911 11144 /* Skip mapping symbols. */
0367ecfb 11145 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11146 && bfd_is_arm_special_symbol_name (q->symbol.name,
11147 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11148 continue;
11149 /* Fall through. */
6b40fcba 11150 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11151 && q->symbol.value >= low_func
11152 && q->symbol.value <= offset)
11153 {
11154 func = (asymbol *) q;
11155 low_func = q->symbol.value;
11156 }
11157 break;
11158 }
11159 }
11160
11161 if (func == NULL)
b34976b6 11162 return FALSE;
252b5132 11163
0367ecfb
NC		 11164 if (filename_ptr)
11165 *filename_ptr = filename;
11166 if (functionname_ptr)
11167 *functionname_ptr = bfd_asymbol_name (func);
11168
11169 return TRUE;
906e58ca 11170}
0367ecfb
NC		 11171
11172
11173/* Find the nearest line to a particular section and offset, for error
11174 reporting. This code is a duplicate of the code in elf.c, except
11175 that it uses arm_elf_find_function. */
11176
11177static bfd_boolean
11178elf32_arm_find_nearest_line (bfd * abfd,
11179 asection * section,
11180 asymbol ** symbols,
11181 bfd_vma offset,
11182 const char ** filename_ptr,
11183 const char ** functionname_ptr,
11184 unsigned int * line_ptr)
11185{
11186 bfd_boolean found = FALSE;
11187
11188 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11189
11190 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11191 filename_ptr, functionname_ptr,
11192 line_ptr, 0,
11193 & elf_tdata (abfd)->dwarf2_find_line_info))
11194 {
11195 if (!*functionname_ptr)
11196 arm_elf_find_function (abfd, section, symbols, offset,
11197 *filename_ptr ? NULL : filename_ptr,
11198 functionname_ptr);
f21f3fe0 11199
0367ecfb
NC		 11200 return TRUE;
11201 }
11202
11203 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11204 & found, filename_ptr,
11205 functionname_ptr, line_ptr,
11206 & elf_tdata (abfd)->line_info))
11207 return FALSE;
11208
11209 if (found && (*functionname_ptr || *line_ptr))
11210 return TRUE;
11211
11212 if (symbols == NULL)
11213 return FALSE;
11214
11215 if (! arm_elf_find_function (abfd, section, symbols, offset,
11216 filename_ptr, functionname_ptr))
11217 return FALSE;
11218
11219 *line_ptr = 0;
b34976b6 11220 return TRUE;
252b5132
RH		 11221}
11222
4ab527b0
FF		 11223static bfd_boolean
11224elf32_arm_find_inliner_info (bfd * abfd,
11225 const char ** filename_ptr,
11226 const char ** functionname_ptr,
11227 unsigned int * line_ptr)
11228{
11229 bfd_boolean found;
11230 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11231 functionname_ptr, line_ptr,
11232 & elf_tdata (abfd)->dwarf2_find_line_info);
11233 return found;
11234}
11235
252b5132
RH		 11236/* Adjust a symbol defined by a dynamic object and referenced by a
11237 regular object. The current definition is in some section of the
11238 dynamic object, but we're not including those sections. We have to
11239 change the definition to something the rest of the link can
11240 understand. */
11241
b34976b6 11242static bfd_boolean
57e8b36a
NC		 11243elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11244 struct elf_link_hash_entry * h)
252b5132
RH		 11245{
11246 bfd * dynobj;
11247 asection * s;
b7693d02 11248 struct elf32_arm_link_hash_entry * eh;
67687978 11249 struct elf32_arm_link_hash_table *globals;
252b5132 11250
67687978 11251 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11252 if (globals == NULL)
11253 return FALSE;
11254
252b5132
RH		 11255 dynobj = elf_hash_table (info)->dynobj;
11256
11257 /* Make sure we know what is going on here. */
11258 BFD_ASSERT (dynobj != NULL
f5385ebf 11259 && (h->needs_plt
f6e332e6 11260 || h->u.weakdef != NULL
f5385ebf
AM		 11261 || (h->def_dynamic
11262 && h->ref_regular
11263 && !h->def_regular)));
252b5132 11264
b7693d02
DJ		 11265 eh = (struct elf32_arm_link_hash_entry *) h;
11266
252b5132
RH		 11267 /* If this is a function, put it in the procedure linkage table. We
11268 will fill in the contents of the procedure linkage table later,
11269 when we know the address of the .got section. */
0f88be7a 11270 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11271 || h->needs_plt)
252b5132 11272 {
5e681ec4
PB		 11273 if (h->plt.refcount <= 0
11274 || SYMBOL_CALLS_LOCAL (info, h)
11275 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11276 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11277 {
11278 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11279 file, but the symbol was never referred to by a dynamic
11280 object, or if all references were garbage collected. In
11281 such a case, we don't actually need to build a procedure
11282 linkage table, and we can just do a PC24 reloc instead. */
11283 h->plt.offset = (bfd_vma) -1;
b7693d02 11284 eh->plt_thumb_refcount = 0;
bd97cb95 11285 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11286 h->needs_plt = 0;
252b5132
RH		 11287 }
11288
b34976b6 11289 return TRUE;
252b5132 11290 }
5e681ec4 11291 else
b7693d02
DJ		 11292 {
11293 /* It's possible that we incorrectly decided a .plt reloc was
11294 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11295 in check_relocs. We can't decide accurately between function
11296 and non-function syms in check-relocs; Objects loaded later in
11297 the link may change h->type. So fix it now. */
11298 h->plt.offset = (bfd_vma) -1;
11299 eh->plt_thumb_refcount = 0;
bd97cb95 11300 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11301 }
252b5132
RH		 11302
11303 /* If this is a weak symbol, and there is a real definition, the
11304 processor independent code will have arranged for us to see the
11305 real definition first, and we can just use the same value. */
f6e332e6 11306 if (h->u.weakdef != NULL)
252b5132 11307 {
f6e332e6
AM		 11308 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11309 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11310 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11311 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11312 return TRUE;
252b5132
RH		 11313 }
11314
ba93b8ac
DJ		 11315 /* If there are no non-GOT references, we do not need a copy
11316 relocation. */
11317 if (!h->non_got_ref)
11318 return TRUE;
11319
252b5132
RH		 11320 /* This is a reference to a symbol defined by a dynamic object which
11321 is not a function. */
11322
11323 /* If we are creating a shared library, we must presume that the
11324 only references to the symbol are via the global offset table.
11325 For such cases we need not do anything here; the relocations will
67687978
PB		 11326 be handled correctly by relocate_section. Relocatable executables
11327 can reference data in shared objects directly, so we don't need to
11328 do anything here. */
11329 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11330 return TRUE;
252b5132 11331
909272ee
AM		 11332 if (h->size == 0)
11333 {
11334 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11335 h->root.root.string);
11336 return TRUE;
11337 }
11338
252b5132
RH		 11339 /* We must allocate the symbol in our .dynbss section, which will
11340 become part of the .bss section of the executable. There will be
11341 an entry for this symbol in the .dynsym section. The dynamic
11342 object will contain position independent code, so all references
11343 from the dynamic object to this symbol will go through the global
11344 offset table. The dynamic linker will use the .dynsym entry to
11345 determine the address it must put in the global offset table, so
11346 both the dynamic object and the regular object will refer to the
11347 same memory location for the variable. */
252b5132
RH		 11348 s = bfd_get_section_by_name (dynobj, ".dynbss");
11349 BFD_ASSERT (s != NULL);
11350
11351 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11352 copy the initial value out of the dynamic object and into the
11353 runtime process image. We need to remember the offset into the
00a97672 11354 .rel(a).bss section we are going to use. */
252b5132
RH		 11355 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11356 {
11357 asection *srel;
11358
00a97672 11359 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11360 BFD_ASSERT (srel != NULL);
00a97672 11361 srel->size += RELOC_SIZE (globals);
f5385ebf 11362 h->needs_copy = 1;
252b5132
RH		 11363 }
11364
027297b7 11365 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11366}
11367
5e681ec4
PB		 11368/* Allocate space in .plt, .got and associated reloc sections for
11369 dynamic relocs. */
11370
11371static bfd_boolean
57e8b36a 11372allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11373{
11374 struct bfd_link_info *info;
11375 struct elf32_arm_link_hash_table *htab;
11376 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 11377 struct elf_dyn_relocs *p;
bd97cb95 11378 bfd_signed_vma thumb_refs;
5e681ec4 11379
b7693d02
DJ		 11380 eh = (struct elf32_arm_link_hash_entry *) h;
11381
5e681ec4
PB		 11382 if (h->root.type == bfd_link_hash_indirect)
11383 return TRUE;
11384
11385 if (h->root.type == bfd_link_hash_warning)
11386 /* When warning symbols are created, they **replace** the "real"
11387 entry in the hash table, thus we never get to see the real
11388 symbol in a hash traversal. So look at it now. */
11389 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11390
11391 info = (struct bfd_link_info *) inf;
11392 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11393 if (htab == NULL)
11394 return FALSE;
5e681ec4
PB		 11395
11396 if (htab->root.dynamic_sections_created
11397 && h->plt.refcount > 0)
11398 {
11399 /* Make sure this symbol is output as a dynamic symbol.
11400 Undefined weak syms won't yet be marked as dynamic. */
11401 if (h->dynindx == -1
f5385ebf 11402 && !h->forced_local)
5e681ec4 11403 {
c152c796 11404 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11405 return FALSE;
11406 }
11407
11408 if (info->shared
7359ea65 11409 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 11410 {
362d30a1 11411 asection *s = htab->root.splt;
5e681ec4
PB		 11412
11413 /* If this is the first .plt entry, make room for the special
11414 first entry. */
eea6121a 11415 if (s->size == 0)
e5a52504 11416 s->size += htab->plt_header_size;
5e681ec4 11417
eea6121a 11418 h->plt.offset = s->size;
5e681ec4 11419
b7693d02
DJ		 11420 /* If we will insert a Thumb trampoline before this PLT, leave room
11421 for it. */
bd97cb95
DJ		 11422 thumb_refs = eh->plt_thumb_refcount;
11423 if (!htab->use_blx)
11424 thumb_refs += eh->plt_maybe_thumb_refcount;
11425
11426 if (thumb_refs > 0)
b7693d02
DJ		 11427 {
11428 h->plt.offset += PLT_THUMB_STUB_SIZE;
11429 s->size += PLT_THUMB_STUB_SIZE;
11430 }
11431
5e681ec4
PB		 11432 /* If this symbol is not defined in a regular file, and we are
11433 not generating a shared library, then set the symbol to this
11434 location in the .plt. This is required to make function
11435 pointers compare as equal between the normal executable and
11436 the shared library. */
11437 if (! info->shared
f5385ebf 11438 && !h->def_regular)
5e681ec4
PB		 11439 {
11440 h->root.u.def.section = s;
11441 h->root.u.def.value = h->plt.offset;
5e681ec4 11442
67d74e43
DJ		 11443 /* Make sure the function is not marked as Thumb, in case
11444 it is the target of an ABS32 relocation, which will
11445 point to the PLT entry. */
11446 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11447 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11448 }
022f8312 11449
5e681ec4 11450 /* Make room for this entry. */
e5a52504 11451 s->size += htab->plt_entry_size;
5e681ec4 11452
e5a52504 11453 if (!htab->symbian_p)
b7693d02
DJ		 11454 {
11455 /* We also need to make an entry in the .got.plt section, which
11456 will be placed in the .got section by the linker script. */
362d30a1
RS		 11457 eh->plt_got_offset = htab->root.sgotplt->size;
11458 htab->root.sgotplt->size += 4;
b7693d02 11459 }
5e681ec4 11460
00a97672 11461 /* We also need to make an entry in the .rel(a).plt section. */
362d30a1 11462 htab->root.srelplt->size += RELOC_SIZE (htab);
00a97672
RS		 11463
11464 /* VxWorks executables have a second set of relocations for
11465 each PLT entry. They go in a separate relocation section,
11466 which is processed by the kernel loader. */
11467 if (htab->vxworks_p && !info->shared)
11468 {
11469 /* There is a relocation for the initial PLT entry:
11470 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11471 if (h->plt.offset == htab->plt_header_size)
11472 htab->srelplt2->size += RELOC_SIZE (htab);
11473
11474 /* There are two extra relocations for each subsequent
11475 PLT entry: an R_ARM_32 relocation for the GOT entry,
11476 and an R_ARM_32 relocation for the PLT entry. */
11477 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11478 }
5e681ec4
PB		 11479 }
11480 else
11481 {
11482 h->plt.offset = (bfd_vma) -1;
f5385ebf 11483 h->needs_plt = 0;
5e681ec4
PB		 11484 }
11485 }
11486 else
11487 {
11488 h->plt.offset = (bfd_vma) -1;
f5385ebf 11489 h->needs_plt = 0;
5e681ec4
PB		 11490 }
11491
11492 if (h->got.refcount > 0)
11493 {
11494 asection *s;
11495 bfd_boolean dyn;
ba93b8ac
DJ		 11496 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11497 int indx;
5e681ec4
PB		 11498
11499 /* Make sure this symbol is output as a dynamic symbol.
11500 Undefined weak syms won't yet be marked as dynamic. */
11501 if (h->dynindx == -1
f5385ebf 11502 && !h->forced_local)
5e681ec4 11503 {
c152c796 11504 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11505 return FALSE;
11506 }
11507
e5a52504
MM		 11508 if (!htab->symbian_p)
11509 {
362d30a1 11510 s = htab->root.sgot;
e5a52504 11511 h->got.offset = s->size;
ba93b8ac
DJ		 11512
11513 if (tls_type == GOT_UNKNOWN)
11514 abort ();
11515
11516 if (tls_type == GOT_NORMAL)
11517 /* Non-TLS symbols need one GOT slot. */
11518 s->size += 4;
11519 else
11520 {
11521 if (tls_type & GOT_TLS_GD)
11522 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11523 s->size += 8;
11524 if (tls_type & GOT_TLS_IE)
11525 /* R_ARM_TLS_IE32 needs one GOT slot. */
11526 s->size += 4;
11527 }
11528
e5a52504 11529 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11530
11531 indx = 0;
11532 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11533 && (!info->shared
11534 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11535 indx = h->dynindx;
11536
11537 if (tls_type != GOT_NORMAL
11538 && (info->shared || indx != 0)
11539 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11540 || h->root.type != bfd_link_hash_undefweak))
11541 {
11542 if (tls_type & GOT_TLS_IE)
362d30a1 11543 htab->root.srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11544
11545 if (tls_type & GOT_TLS_GD)
362d30a1 11546 htab->root.srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11547
11548 if ((tls_type & GOT_TLS_GD) && indx != 0)
362d30a1 11549 htab->root.srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11550 }
11551 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11552 || h->root.type != bfd_link_hash_undefweak)
11553 && (info->shared
11554 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
362d30a1 11555 htab->root.srelgot->size += RELOC_SIZE (htab);
e5a52504 11556 }
5e681ec4
PB		 11557 }
11558 else
11559 h->got.offset = (bfd_vma) -1;
11560
a4fd1a8e
PB		 11561 /* Allocate stubs for exported Thumb functions on v4t. */
11562 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11563 && h->def_regular
a4fd1a8e
PB		 11564 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11565 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11566 {
11567 struct elf_link_hash_entry * th;
11568 struct bfd_link_hash_entry * bh;
11569 struct elf_link_hash_entry * myh;
11570 char name[1024];
11571 asection *s;
11572 bh = NULL;
11573 /* Create a new symbol to regist the real location of the function. */
11574 s = h->root.u.def.section;
906e58ca 11575 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11576 _bfd_generic_link_add_one_symbol (info, s->owner,
11577 name, BSF_GLOBAL, s,
11578 h->root.u.def.value,
11579 NULL, TRUE, FALSE, &bh);
11580
11581 myh = (struct elf_link_hash_entry *) bh;
11582 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11583 myh->forced_local = 1;
11584 eh->export_glue = myh;
11585 th = record_arm_to_thumb_glue (info, h);
11586 /* Point the symbol at the stub. */
11587 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11588 h->root.u.def.section = th->root.u.def.section;
11589 h->root.u.def.value = th->root.u.def.value & ~1;
11590 }
11591
0bdcacaf 11592 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 11593 return TRUE;
11594
11595 /* In the shared -Bsymbolic case, discard space allocated for
11596 dynamic pc-relative relocs against symbols which turn out to be
11597 defined in regular objects. For the normal shared case, discard
11598 space for pc-relative relocs that have become local due to symbol
11599 visibility changes. */
11600
67687978 11601 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11602 {
7bdca076 11603 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11604 R_ARM_REL32_NOI, which will appear on something like
11605 ".long foo - .". We want calls to protected symbols to resolve
11606 directly to the function rather than going via the plt. If people
11607 want function pointer comparisons to work as expected then they
11608 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11609 if (SYMBOL_CALLS_LOCAL (info, h))
11610 {
0bdcacaf 11611 struct elf_dyn_relocs **pp;
ba93b8ac 11612
0bdcacaf 11613 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 11614 {
11615 p->count -= p->pc_count;
11616 p->pc_count = 0;
11617 if (p->count == 0)
11618 *pp = p->next;
11619 else
11620 pp = &p->next;
11621 }
11622 }
11623
4dfe6ac6 11624 if (htab->vxworks_p)
3348747a 11625 {
0bdcacaf 11626 struct elf_dyn_relocs **pp;
3348747a 11627
0bdcacaf 11628 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 11629 {
0bdcacaf 11630 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 11631 *pp = p->next;
11632 else
11633 pp = &p->next;
11634 }
11635 }
11636
ba93b8ac 11637 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11638 visibility. */
0bdcacaf 11639 if (eh->dyn_relocs != NULL
5e681ec4 11640 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11641 {
11642 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 11643 eh->dyn_relocs = NULL;
22d606e9
AM		 11644
11645 /* Make sure undefined weak symbols are output as a dynamic
11646 symbol in PIEs. */
11647 else if (h->dynindx == -1
11648 && !h->forced_local)
11649 {
11650 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11651 return FALSE;
11652 }
11653 }
11654
67687978
PB		 11655 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11656 && h->root.type == bfd_link_hash_new)
11657 {
11658 /* Output absolute symbols so that we can create relocations
11659 against them. For normal symbols we output a relocation
11660 against the section that contains them. */
11661 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11662 return FALSE;
11663 }
11664
5e681ec4
PB		 11665 }
11666 else
11667 {
11668 /* For the non-shared case, discard space for relocs against
11669 symbols which turn out to need copy relocs or are not
11670 dynamic. */
11671
f5385ebf
AM		 11672 if (!h->non_got_ref
11673 && ((h->def_dynamic
11674 && !h->def_regular)
5e681ec4
PB		 11675 || (htab->root.dynamic_sections_created
11676 && (h->root.type == bfd_link_hash_undefweak
11677 || h->root.type == bfd_link_hash_undefined))))
11678 {
11679 /* Make sure this symbol is output as a dynamic symbol.
11680 Undefined weak syms won't yet be marked as dynamic. */
11681 if (h->dynindx == -1
f5385ebf 11682 && !h->forced_local)
5e681ec4 11683 {
c152c796 11684 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11685 return FALSE;
11686 }
11687
11688 /* If that succeeded, we know we'll be keeping all the
11689 relocs. */
11690 if (h->dynindx != -1)
11691 goto keep;
11692 }
11693
0bdcacaf 11694 eh->dyn_relocs = NULL;
5e681ec4
PB		 11695
11696 keep: ;
11697 }
11698
11699 /* Finally, allocate space. */
0bdcacaf 11700 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 11701 {
0bdcacaf 11702 asection *sreloc = elf_section_data (p->sec)->sreloc;
00a97672 11703 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11704 }
11705
11706 return TRUE;
11707}
11708
08d1f311
DJ		 11709/* Find any dynamic relocs that apply to read-only sections. */
11710
11711static bfd_boolean
8029a119 11712elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11713{
8029a119 11714 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 11715 struct elf_dyn_relocs * p;
08d1f311
DJ		 11716
11717 if (h->root.type == bfd_link_hash_warning)
11718 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11719
11720 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 11721 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 11722 {
0bdcacaf 11723 asection *s = p->sec;
08d1f311
DJ		 11724
11725 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11726 {
11727 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11728
11729 info->flags |= DF_TEXTREL;
11730
11731 /* Not an error, just cut short the traversal. */
11732 return FALSE;
11733 }
11734 }
11735 return TRUE;
11736}
11737
d504ffc8
DJ		 11738void
11739bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11740 int byteswap_code)
11741{
11742 struct elf32_arm_link_hash_table *globals;
11743
11744 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11745 if (globals == NULL)
11746 return;
11747
d504ffc8
DJ		 11748 globals->byteswap_code = byteswap_code;
11749}
11750
252b5132
RH		 11751/* Set the sizes of the dynamic sections. */
11752
b34976b6 11753static bfd_boolean
57e8b36a
NC		 11754elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11755 struct bfd_link_info * info)
252b5132
RH		 11756{
11757 bfd * dynobj;
11758 asection * s;
b34976b6
AM		 11759 bfd_boolean plt;
11760 bfd_boolean relocs;
5e681ec4
PB		 11761 bfd *ibfd;
11762 struct elf32_arm_link_hash_table *htab;
252b5132 11763
5e681ec4 11764 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11765 if (htab == NULL)
11766 return FALSE;
11767
252b5132
RH		 11768 dynobj = elf_hash_table (info)->dynobj;
11769 BFD_ASSERT (dynobj != NULL);
39b41c9c 11770 check_use_blx (htab);
252b5132
RH		 11771
11772 if (elf_hash_table (info)->dynamic_sections_created)
11773 {
11774 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11775 if (info->executable)
252b5132
RH		 11776 {
11777 s = bfd_get_section_by_name (dynobj, ".interp");
11778 BFD_ASSERT (s != NULL);
eea6121a 11779 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11780 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11781 }
11782 }
5e681ec4
PB		 11783
11784 /* Set up .got offsets for local syms, and space for local dynamic
11785 relocs. */
11786 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11787 {
5e681ec4
PB		 11788 bfd_signed_vma *local_got;
11789 bfd_signed_vma *end_local_got;
11790 char *local_tls_type;
11791 bfd_size_type locsymcount;
11792 Elf_Internal_Shdr *symtab_hdr;
11793 asection *srel;
4dfe6ac6 11794 bfd_boolean is_vxworks = htab->vxworks_p;
5e681ec4 11795
0ffa91dd 11796 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11797 continue;
11798
11799 for (s = ibfd->sections; s != NULL; s = s->next)
11800 {
0bdcacaf 11801 struct elf_dyn_relocs *p;
5e681ec4 11802
0bdcacaf 11803 for (p = (struct elf_dyn_relocs *)
21d799b5 11804 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 11805 {
0bdcacaf
RS		 11806 if (!bfd_is_abs_section (p->sec)
11807 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 11808 {
11809 /* Input section has been discarded, either because
11810 it is a copy of a linkonce section or due to
11811 linker script /DISCARD/, so we'll be discarding
11812 the relocs too. */
11813 }
3348747a 11814 else if (is_vxworks
0bdcacaf 11815 && strcmp (p->sec->output_section->name,
3348747a
NS		 11816 ".tls_vars") == 0)
11817 {
11818 /* Relocations in vxworks .tls_vars sections are
11819 handled specially by the loader. */
11820 }
5e681ec4
PB		 11821 else if (p->count != 0)
11822 {
0bdcacaf 11823 srel = elf_section_data (p->sec)->sreloc;
00a97672 11824 srel->size += p->count * RELOC_SIZE (htab);
0bdcacaf 11825 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 11826 info->flags |= DF_TEXTREL;
11827 }
11828 }
11829 }
11830
11831 local_got = elf_local_got_refcounts (ibfd);
11832 if (!local_got)
11833 continue;
11834
0ffa91dd 11835 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11836 locsymcount = symtab_hdr->sh_info;
11837 end_local_got = local_got + locsymcount;
ba93b8ac 11838 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
362d30a1
RS		 11839 s = htab->root.sgot;
11840 srel = htab->root.srelgot;
5e681ec4
PB		 11841 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11842 {
11843 if (*local_got > 0)
11844 {
eea6121a 11845 *local_got = s->size;
ba93b8ac
DJ		 11846 if (*local_tls_type & GOT_TLS_GD)
11847 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11848 s->size += 8;
11849 if (*local_tls_type & GOT_TLS_IE)
11850 s->size += 4;
11851 if (*local_tls_type == GOT_NORMAL)
11852 s->size += 4;
11853
11854 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11855 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11856 }
11857 else
11858 *local_got = (bfd_vma) -1;
11859 }
252b5132
RH		 11860 }
11861
ba93b8ac
DJ		 11862 if (htab->tls_ldm_got.refcount > 0)
11863 {
11864 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11865 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 11866 htab->tls_ldm_got.offset = htab->root.sgot->size;
11867 htab->root.sgot->size += 8;
ba93b8ac 11868 if (info->shared)
362d30a1 11869 htab->root.srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11870 }
11871 else
11872 htab->tls_ldm_got.offset = -1;
11873
5e681ec4
PB		 11874 /* Allocate global sym .plt and .got entries, and space for global
11875 sym dynamic relocs. */
57e8b36a 11876 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11877
d504ffc8
DJ		 11878 /* Here we rummage through the found bfds to collect glue information. */
11879 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11880 {
0ffa91dd 11881 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11882 continue;
11883
c7b8f16e
JB		 11884 /* Initialise mapping tables for code/data. */
11885 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11886
c7b8f16e
JB		 11887 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11888 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11889 /* xgettext:c-format */
11890 _bfd_error_handler (_("Errors encountered processing file %s"),
11891 ibfd->filename);
11892 }
d504ffc8 11893
3e6b1042
DJ		 11894 /* Allocate space for the glue sections now that we've sized them. */
11895 bfd_elf32_arm_allocate_interworking_sections (info);
11896
252b5132
RH		 11897 /* The check_relocs and adjust_dynamic_symbol entry points have
11898 determined the sizes of the various dynamic sections. Allocate
11899 memory for them. */
b34976b6
AM		 11900 plt = FALSE;
11901 relocs = FALSE;
252b5132
RH		 11902 for (s = dynobj->sections; s != NULL; s = s->next)
11903 {
11904 const char * name;
252b5132
RH		 11905
11906 if ((s->flags & SEC_LINKER_CREATED) == 0)
11907 continue;
11908
11909 /* It's OK to base decisions on the section name, because none
11910 of the dynobj section names depend upon the input files. */
11911 name = bfd_get_section_name (dynobj, s);
11912
24a1ba0f 11913 if (strcmp (name, ".plt") == 0)
252b5132 11914 {
c456f082
AM		 11915 /* Remember whether there is a PLT. */
11916 plt = s->size != 0;
252b5132 11917 }
0112cd26 11918 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11919 {
c456f082 11920 if (s->size != 0)
252b5132 11921 {
252b5132 11922 /* Remember whether there are any reloc sections other
00a97672 11923 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 11924 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 11925 relocs = TRUE;
252b5132
RH		 11926
11927 /* We use the reloc_count field as a counter if we need
11928 to copy relocs into the output file. */
11929 s->reloc_count = 0;
11930 }
11931 }
0112cd26 11932 else if (! CONST_STRNEQ (name, ".got")
c456f082 11933 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11934 {
11935 /* It's not one of our sections, so don't allocate space. */
11936 continue;
11937 }
11938
c456f082 11939 if (s->size == 0)
252b5132 11940 {
c456f082 11941 /* If we don't need this section, strip it from the
00a97672
RS		 11942 output file. This is mostly to handle .rel(a).bss and
11943 .rel(a).plt. We must create both sections in
c456f082
AM		 11944 create_dynamic_sections, because they must be created
11945 before the linker maps input sections to output
11946 sections. The linker does that before
11947 adjust_dynamic_symbol is called, and it is that
11948 function which decides whether anything needs to go
11949 into these sections. */
8423293d 11950 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11951 continue;
11952 }
11953
c456f082
AM		 11954 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11955 continue;
11956
252b5132 11957 /* Allocate memory for the section contents. */
21d799b5 11958 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 11959 if (s->contents == NULL)
b34976b6 11960 return FALSE;
252b5132
RH		 11961 }
11962
11963 if (elf_hash_table (info)->dynamic_sections_created)
11964 {
11965 /* Add some entries to the .dynamic section. We fill in the
11966 values later, in elf32_arm_finish_dynamic_sections, but we
11967 must add the entries now so that we get the correct size for
11968 the .dynamic section. The DT_DEBUG entry is filled in by the
11969 dynamic linker and used by the debugger. */
dc810e39 11970#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11971 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 11972
8532796c 11973 if (info->executable)
252b5132 11974 {
dc810e39 11975 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 11976 return FALSE;
252b5132
RH		 11977 }
11978
11979 if (plt)
11980 {
dc810e39
AM		 11981 if ( !add_dynamic_entry (DT_PLTGOT, 0)
11982 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 11983 || !add_dynamic_entry (DT_PLTREL,
11984 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 11985 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 11986 return FALSE;
252b5132
RH		 11987 }
11988
11989 if (relocs)
11990 {
00a97672
RS		 11991 if (htab->use_rel)
11992 {
11993 if (!add_dynamic_entry (DT_REL, 0)
11994 || !add_dynamic_entry (DT_RELSZ, 0)
11995 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
11996 return FALSE;
11997 }
11998 else
11999 {
12000 if (!add_dynamic_entry (DT_RELA, 0)
12001 || !add_dynamic_entry (DT_RELASZ, 0)
12002 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12003 return FALSE;
12004 }
252b5132
RH		 12005 }
12006
08d1f311
DJ		 12007 /* If any dynamic relocs apply to a read-only section,
12008 then we need a DT_TEXTREL entry. */
12009 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 12010 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12011 info);
08d1f311 12012
99e4ae17 12013 if ((info->flags & DF_TEXTREL) != 0)
252b5132 12014 {
dc810e39 12015 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 12016 return FALSE;
252b5132 12017 }
7a2b07ff
NS		 12018 if (htab->vxworks_p
12019 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12020 return FALSE;
252b5132 12021 }
8532796c 12022#undef add_dynamic_entry
252b5132 12023
b34976b6 12024 return TRUE;
252b5132
RH		 12025}
12026
252b5132
RH		 12027/* Finish up dynamic symbol handling. We set the contents of various
12028 dynamic sections here. */
12029
b34976b6 12030static bfd_boolean
906e58ca
NC		 12031elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12032 struct bfd_link_info * info,
12033 struct elf_link_hash_entry * h,
12034 Elf_Internal_Sym * sym)
252b5132 12035{
e5a52504 12036 struct elf32_arm_link_hash_table *htab;
b7693d02 12037 struct elf32_arm_link_hash_entry *eh;
252b5132 12038
e5a52504 12039 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12040 if (htab == NULL)
12041 return FALSE;
12042
b7693d02 12043 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 12044
12045 if (h->plt.offset != (bfd_vma) -1)
12046 {
12047 asection * splt;
252b5132 12048 asection * srel;
e5a52504 12049 bfd_byte *loc;
24a1ba0f 12050 bfd_vma plt_index;
947216bf 12051 Elf_Internal_Rela rel;
252b5132
RH		 12052
12053 /* This symbol has an entry in the procedure linkage table. Set
12054 it up. */
12055
12056 BFD_ASSERT (h->dynindx != -1);
12057
362d30a1
RS		 12058 splt = htab->root.splt;
12059 srel = htab->root.srelplt;
e5a52504 12060 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 12061
e5a52504
MM		 12062 /* Fill in the entry in the procedure linkage table. */
12063 if (htab->symbian_p)
12064 {
906e58ca 12065 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12066 elf32_arm_symbian_plt_entry[0],
12067 splt->contents + h->plt.offset);
906e58ca 12068 bfd_put_32 (output_bfd,
52ab56c2
PB		 12069 elf32_arm_symbian_plt_entry[1],
12070 splt->contents + h->plt.offset + 4);
906e58ca 12071
e5a52504 12072 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12073 rel.r_offset = (splt->output_section->vma
12074 + splt->output_offset
52ab56c2 12075 + h->plt.offset + 4);
e5a52504 12076 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12077
12078 /* Get the index in the procedure linkage table which
12079 corresponds to this symbol. This is the index of this symbol
12080 in all the symbols for which we are making plt entries. The
12081 first entry in the procedure linkage table is reserved. */
906e58ca 12082 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12083 / htab->plt_entry_size);
e5a52504
MM		 12084 }
12085 else
12086 {
00a97672 12087 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12088 bfd_vma got_displacement;
12089 asection * sgot;
52ab56c2 12090 bfd_byte * ptr;
906e58ca 12091
362d30a1 12092 sgot = htab->root.sgotplt;
e5a52504
MM		 12093 BFD_ASSERT (sgot != NULL);
12094
b7693d02
DJ		 12095 /* Get the offset into the .got.plt table of the entry that
12096 corresponds to this function. */
12097 got_offset = eh->plt_got_offset;
12098
12099 /* Get the index in the procedure linkage table which
12100 corresponds to this symbol. This is the index of this symbol
12101 in all the symbols for which we are making plt entries. The
12102 first three entries in .got.plt are reserved; after that
12103 symbols appear in the same order as in .plt. */
12104 plt_index = (got_offset - 12) / 4;
e5a52504 12105
00a97672
RS		 12106 /* Calculate the address of the GOT entry. */
12107 got_address = (sgot->output_section->vma
12108 + sgot->output_offset
12109 + got_offset);
5e681ec4 12110
00a97672
RS		 12111 /* ...and the address of the PLT entry. */
12112 plt_address = (splt->output_section->vma
12113 + splt->output_offset
12114 + h->plt.offset);
5e681ec4 12115
362d30a1 12116 ptr = splt->contents + h->plt.offset;
00a97672
RS		 12117 if (htab->vxworks_p && info->shared)
12118 {
12119 unsigned int i;
12120 bfd_vma val;
12121
52ab56c2 12122 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12123 {
12124 val = elf32_arm_vxworks_shared_plt_entry[i];
12125 if (i == 2)
12126 val |= got_address - sgot->output_section->vma;
12127 if (i == 5)
12128 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12129 if (i == 2 || i == 5)
12130 bfd_put_32 (output_bfd, val, ptr);
12131 else
12132 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12133 }
12134 }
12135 else if (htab->vxworks_p)
b7693d02 12136 {
00a97672
RS		 12137 unsigned int i;
12138 bfd_vma val;
12139
d3753b85 12140 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12141 {
12142 val = elf32_arm_vxworks_exec_plt_entry[i];
12143 if (i == 2)
12144 val |= got_address;
12145 if (i == 4)
12146 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12147 if (i == 5)
12148 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12149 if (i == 2 || i == 5)
12150 bfd_put_32 (output_bfd, val, ptr);
12151 else
12152 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12153 }
12154
12155 loc = (htab->srelplt2->contents
12156 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12157
12158 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12159 referencing the GOT for this PLT entry. */
12160 rel.r_offset = plt_address + 8;
12161 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12162 rel.r_addend = got_offset;
12163 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12164 loc += RELOC_SIZE (htab);
12165
12166 /* Create the R_ARM_ABS32 relocation referencing the
12167 beginning of the PLT for this GOT entry. */
12168 rel.r_offset = got_address;
12169 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12170 rel.r_addend = 0;
12171 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12172 }
00a97672
RS		 12173 else
12174 {
bd97cb95 12175 bfd_signed_vma thumb_refs;
00a97672
RS		 12176 /* Calculate the displacement between the PLT slot and the
12177 entry in the GOT. The eight-byte offset accounts for the
12178 value produced by adding to pc in the first instruction
12179 of the PLT stub. */
12180 got_displacement = got_address - (plt_address + 8);
b7693d02 12181
00a97672
RS		 12182 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12183
bd97cb95
DJ		 12184 thumb_refs = eh->plt_thumb_refcount;
12185 if (!htab->use_blx)
12186 thumb_refs += eh->plt_maybe_thumb_refcount;
12187
12188 if (thumb_refs > 0)
00a97672 12189 {
52ab56c2
PB		 12190 put_thumb_insn (htab, output_bfd,
12191 elf32_arm_plt_thumb_stub[0], ptr - 4);
12192 put_thumb_insn (htab, output_bfd,
12193 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12194 }
12195
52ab56c2
PB		 12196 put_arm_insn (htab, output_bfd,
12197 elf32_arm_plt_entry[0]
12198 | ((got_displacement & 0x0ff00000) >> 20),
12199 ptr + 0);
12200 put_arm_insn (htab, output_bfd,
12201 elf32_arm_plt_entry[1]
12202 | ((got_displacement & 0x000ff000) >> 12),
12203 ptr+ 4);
12204 put_arm_insn (htab, output_bfd,
12205 elf32_arm_plt_entry[2]
12206 | (got_displacement & 0x00000fff),
12207 ptr + 8);
5e681ec4 12208#ifdef FOUR_WORD_PLT
52ab56c2 12209 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12210#endif
00a97672 12211 }
252b5132 12212
e5a52504
MM		 12213 /* Fill in the entry in the global offset table. */
12214 bfd_put_32 (output_bfd,
12215 (splt->output_section->vma
12216 + splt->output_offset),
12217 sgot->contents + got_offset);
906e58ca 12218
00a97672
RS		 12219 /* Fill in the entry in the .rel(a).plt section. */
12220 rel.r_addend = 0;
12221 rel.r_offset = got_address;
e5a52504
MM		 12222 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12223 }
57e8b36a 12224
00a97672
RS		 12225 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12226 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12227
f5385ebf 12228 if (!h->def_regular)
252b5132
RH		 12229 {
12230 /* Mark the symbol as undefined, rather than as defined in
12231 the .plt section. Leave the value alone. */
12232 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12233 /* If the symbol is weak, we do need to clear the value.
12234 Otherwise, the PLT entry would provide a definition for
12235 the symbol even if the symbol wasn't defined anywhere,
12236 and so the symbol would never be NULL. */
f5385ebf 12237 if (!h->ref_regular_nonweak)
d982ba73 12238 sym->st_value = 0;
252b5132
RH		 12239 }
12240 }
12241
ba93b8ac
DJ		 12242 if (h->got.offset != (bfd_vma) -1
12243 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12244 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12245 {
12246 asection * sgot;
12247 asection * srel;
947216bf
AM		 12248 Elf_Internal_Rela rel;
12249 bfd_byte *loc;
00a97672 12250 bfd_vma offset;
252b5132
RH		 12251
12252 /* This symbol has an entry in the global offset table. Set it
12253 up. */
362d30a1
RS		 12254 sgot = htab->root.sgot;
12255 srel = htab->root.srelgot;
252b5132
RH		 12256 BFD_ASSERT (sgot != NULL && srel != NULL);
12257
00a97672
RS		 12258 offset = (h->got.offset & ~(bfd_vma) 1);
12259 rel.r_addend = 0;
252b5132
RH		 12260 rel.r_offset = (sgot->output_section->vma
12261 + sgot->output_offset
00a97672 12262 + offset);
252b5132 12263
5e681ec4
PB		 12264 /* If this is a static link, or it is a -Bsymbolic link and the
12265 symbol is defined locally or was forced to be local because
12266 of a version file, we just want to emit a RELATIVE reloc.
12267 The entry in the global offset table will already have been
12268 initialized in the relocate_section function. */
252b5132 12269 if (info->shared
5e681ec4
PB		 12270 && SYMBOL_REFERENCES_LOCAL (info, h))
12271 {
906e58ca 12272 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12273 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12274 if (!htab->use_rel)
12275 {
12276 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12277 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12278 }
5e681ec4 12279 }
252b5132
RH		 12280 else
12281 {
906e58ca 12282 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12283 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12284 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12285 }
12286
00a97672
RS		 12287 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12288 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12289 }
12290
f5385ebf 12291 if (h->needs_copy)
252b5132
RH		 12292 {
12293 asection * s;
947216bf
AM		 12294 Elf_Internal_Rela rel;
12295 bfd_byte *loc;
252b5132
RH		 12296
12297 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12298 BFD_ASSERT (h->dynindx != -1
12299 && (h->root.type == bfd_link_hash_defined
12300 || h->root.type == bfd_link_hash_defweak));
12301
362d30a1 12302 s = htab->srelbss;
252b5132
RH		 12303 BFD_ASSERT (s != NULL);
12304
00a97672 12305 rel.r_addend = 0;
252b5132
RH		 12306 rel.r_offset = (h->root.u.def.value
12307 + h->root.u.def.section->output_section->vma
12308 + h->root.u.def.section->output_offset);
12309 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12310 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12311 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12312 }
12313
00a97672
RS		 12314 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12315 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12316 to the ".got" section. */
252b5132 12317 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12318 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12319 sym->st_shndx = SHN_ABS;
12320
b34976b6 12321 return TRUE;
252b5132
RH		 12322}
12323
12324/* Finish up the dynamic sections. */
12325
b34976b6 12326static bfd_boolean
57e8b36a 12327elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12328{
12329 bfd * dynobj;
12330 asection * sgot;
12331 asection * sdyn;
4dfe6ac6
NC		 12332 struct elf32_arm_link_hash_table *htab;
12333
12334 htab = elf32_arm_hash_table (info);
12335 if (htab == NULL)
12336 return FALSE;
252b5132
RH		 12337
12338 dynobj = elf_hash_table (info)->dynobj;
12339
362d30a1 12340 sgot = htab->root.sgotplt;
4dfe6ac6 12341 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 12342 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12343
12344 if (elf_hash_table (info)->dynamic_sections_created)
12345 {
12346 asection *splt;
12347 Elf32_External_Dyn *dyncon, *dynconend;
12348
362d30a1 12349 splt = htab->root.splt;
24a1ba0f 12350 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12351
12352 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12353 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12354
252b5132
RH		 12355 for (; dyncon < dynconend; dyncon++)
12356 {
12357 Elf_Internal_Dyn dyn;
12358 const char * name;
12359 asection * s;
12360
12361 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12362
12363 switch (dyn.d_tag)
12364 {
229fcec5
MM		 12365 unsigned int type;
12366
252b5132 12367 default:
7a2b07ff
NS		 12368 if (htab->vxworks_p
12369 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12370 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12371 break;
12372
229fcec5
MM		 12373 case DT_HASH:
12374 name = ".hash";
12375 goto get_vma_if_bpabi;
12376 case DT_STRTAB:
12377 name = ".dynstr";
12378 goto get_vma_if_bpabi;
12379 case DT_SYMTAB:
12380 name = ".dynsym";
12381 goto get_vma_if_bpabi;
c0042f5d
MM		 12382 case DT_VERSYM:
12383 name = ".gnu.version";
12384 goto get_vma_if_bpabi;
12385 case DT_VERDEF:
12386 name = ".gnu.version_d";
12387 goto get_vma_if_bpabi;
12388 case DT_VERNEED:
12389 name = ".gnu.version_r";
12390 goto get_vma_if_bpabi;
12391
252b5132
RH		 12392 case DT_PLTGOT:
12393 name = ".got";
12394 goto get_vma;
12395 case DT_JMPREL:
00a97672 12396 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12397 get_vma:
12398 s = bfd_get_section_by_name (output_bfd, name);
12399 BFD_ASSERT (s != NULL);
229fcec5
MM		 12400 if (!htab->symbian_p)
12401 dyn.d_un.d_ptr = s->vma;
12402 else
12403 /* In the BPABI, tags in the PT_DYNAMIC section point
12404 at the file offset, not the memory address, for the
12405 convenience of the post linker. */
12406 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12407 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12408 break;
12409
229fcec5
MM		 12410 get_vma_if_bpabi:
12411 if (htab->symbian_p)
12412 goto get_vma;
12413 break;
12414
252b5132 12415 case DT_PLTRELSZ:
362d30a1 12416 s = htab->root.srelplt;
252b5132 12417 BFD_ASSERT (s != NULL);
eea6121a 12418 dyn.d_un.d_val = s->size;
252b5132
RH		 12419 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12420 break;
906e58ca 12421
252b5132 12422 case DT_RELSZ:
00a97672 12423 case DT_RELASZ:
229fcec5
MM		 12424 if (!htab->symbian_p)
12425 {
12426 /* My reading of the SVR4 ABI indicates that the
12427 procedure linkage table relocs (DT_JMPREL) should be
12428 included in the overall relocs (DT_REL). This is
12429 what Solaris does. However, UnixWare can not handle
12430 that case. Therefore, we override the DT_RELSZ entry
12431 here to make it not include the JMPREL relocs. Since
00a97672 12432 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12433 other relocation sections, we don't have to worry
12434 about changing the DT_REL entry. */
362d30a1 12435 s = htab->root.srelplt;
229fcec5
MM		 12436 if (s != NULL)
12437 dyn.d_un.d_val -= s->size;
12438 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12439 break;
12440 }
8029a119 12441 /* Fall through. */
229fcec5
MM		 12442
12443 case DT_REL:
12444 case DT_RELA:
229fcec5
MM		 12445 /* In the BPABI, the DT_REL tag must point at the file
12446 offset, not the VMA, of the first relocation
12447 section. So, we use code similar to that in
12448 elflink.c, but do not check for SHF_ALLOC on the
12449 relcoation section, since relocations sections are
12450 never allocated under the BPABI. The comments above
12451 about Unixware notwithstanding, we include all of the
12452 relocations here. */
12453 if (htab->symbian_p)
12454 {
12455 unsigned int i;
12456 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12457 ? SHT_REL : SHT_RELA);
12458 dyn.d_un.d_val = 0;
12459 for (i = 1; i < elf_numsections (output_bfd); i++)
12460 {
906e58ca 12461 Elf_Internal_Shdr *hdr
229fcec5
MM		 12462 = elf_elfsections (output_bfd)[i];
12463 if (hdr->sh_type == type)
12464 {
906e58ca 12465 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12466 || dyn.d_tag == DT_RELASZ)
12467 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12468 else if ((ufile_ptr) hdr->sh_offset
12469 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12470 dyn.d_un.d_val = hdr->sh_offset;
12471 }
12472 }
12473 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12474 }
252b5132 12475 break;
88f7bcd5
NC		 12476
12477 /* Set the bottom bit of DT_INIT/FINI if the
12478 corresponding function is Thumb. */
12479 case DT_INIT:
12480 name = info->init_function;
12481 goto get_sym;
12482 case DT_FINI:
12483 name = info->fini_function;
12484 get_sym:
12485 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12486 then there is nothing to adjust. */
88f7bcd5
NC		 12487 if (dyn.d_un.d_val != 0)
12488 {
12489 struct elf_link_hash_entry * eh;
12490
12491 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12492 FALSE, FALSE, TRUE);
906e58ca 12493 if (eh != NULL
88f7bcd5
NC		 12494 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12495 {
12496 dyn.d_un.d_val |= 1;
b34976b6 12497 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12498 }
12499 }
12500 break;
252b5132
RH		 12501 }
12502 }
12503
24a1ba0f 12504 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 12505 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 12506 {
00a97672
RS		 12507 const bfd_vma *plt0_entry;
12508 bfd_vma got_address, plt_address, got_displacement;
12509
12510 /* Calculate the addresses of the GOT and PLT. */
12511 got_address = sgot->output_section->vma + sgot->output_offset;
12512 plt_address = splt->output_section->vma + splt->output_offset;
12513
12514 if (htab->vxworks_p)
12515 {
12516 /* The VxWorks GOT is relocated by the dynamic linker.
12517 Therefore, we must emit relocations rather than simply
12518 computing the values now. */
12519 Elf_Internal_Rela rel;
12520
12521 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12522 put_arm_insn (htab, output_bfd, plt0_entry[0],
12523 splt->contents + 0);
12524 put_arm_insn (htab, output_bfd, plt0_entry[1],
12525 splt->contents + 4);
12526 put_arm_insn (htab, output_bfd, plt0_entry[2],
12527 splt->contents + 8);
00a97672
RS		 12528 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12529
8029a119 12530 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12531 rel.r_offset = plt_address + 12;
12532 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12533 rel.r_addend = 0;
12534 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12535 htab->srelplt2->contents);
12536 }
12537 else
12538 {
12539 got_displacement = got_address - (plt_address + 16);
12540
12541 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12542 put_arm_insn (htab, output_bfd, plt0_entry[0],
12543 splt->contents + 0);
12544 put_arm_insn (htab, output_bfd, plt0_entry[1],
12545 splt->contents + 4);
12546 put_arm_insn (htab, output_bfd, plt0_entry[2],
12547 splt->contents + 8);
12548 put_arm_insn (htab, output_bfd, plt0_entry[3],
12549 splt->contents + 12);
5e681ec4 12550
5e681ec4 12551#ifdef FOUR_WORD_PLT
00a97672
RS		 12552 /* The displacement value goes in the otherwise-unused
12553 last word of the second entry. */
12554 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12555#else
00a97672 12556 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12557#endif
00a97672 12558 }
f7a74f8c 12559 }
252b5132
RH		 12560
12561 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12562 really seem like the right value. */
74541ad4
AM		 12563 if (splt->output_section->owner == output_bfd)
12564 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 12565
362d30a1 12566 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 12567 {
12568 /* Correct the .rel(a).plt.unloaded relocations. They will have
12569 incorrect symbol indexes. */
12570 int num_plts;
eed62c48 12571 unsigned char *p;
00a97672 12572
362d30a1 12573 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 12574 / htab->plt_entry_size);
12575 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12576
12577 for (; num_plts; num_plts--)
12578 {
12579 Elf_Internal_Rela rel;
12580
12581 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12582 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12583 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12584 p += RELOC_SIZE (htab);
12585
12586 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12587 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12588 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12589 p += RELOC_SIZE (htab);
12590 }
12591 }
252b5132
RH		 12592 }
12593
12594 /* Fill in the first three entries in the global offset table. */
229fcec5 12595 if (sgot)
252b5132 12596 {
229fcec5
MM		 12597 if (sgot->size > 0)
12598 {
12599 if (sdyn == NULL)
12600 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12601 else
12602 bfd_put_32 (output_bfd,
12603 sdyn->output_section->vma + sdyn->output_offset,
12604 sgot->contents);
12605 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12606 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12607 }
252b5132 12608
229fcec5
MM		 12609 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12610 }
252b5132 12611
b34976b6 12612 return TRUE;
252b5132
RH		 12613}
12614
ba96a88f 12615static void
57e8b36a 12616elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12617{
9b485d32 12618 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12619 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12620
12621 i_ehdrp = elf_elfheader (abfd);
12622
94a3258f
PB		 12623 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12624 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12625 else
12626 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12627 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12628
93204d3a
PB		 12629 if (link_info)
12630 {
12631 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 12632 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 12633 i_ehdrp->e_flags |= EF_ARM_BE8;
12634 }
ba96a88f
NC		 12635}
12636
99e4ae17 12637static enum elf_reloc_type_class
57e8b36a 12638elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12639{
f51e552e 12640 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12641 {
12642 case R_ARM_RELATIVE:
12643 return reloc_class_relative;
12644 case R_ARM_JUMP_SLOT:
12645 return reloc_class_plt;
12646 case R_ARM_COPY:
12647 return reloc_class_copy;
12648 default:
12649 return reloc_class_normal;
12650 }
12651}
12652
e16bb312
NC		 12653/* Set the right machine number for an Arm ELF file. */
12654
12655static bfd_boolean
57e8b36a 12656elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12657{
12658 if (hdr->sh_type == SHT_NOTE)
12659 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12660
12661 return TRUE;
12662}
12663
e489d0ae 12664static void
57e8b36a 12665elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12666{
5a6c6817 12667 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12668}
12669
40a18ebd
NC		 12670/* Return TRUE if this is an unwinding table entry. */
12671
12672static bfd_boolean
12673is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12674{
0112cd26
NC		 12675 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12676 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12677}
12678
12679
12680/* Set the type and flags for an ARM section. We do this by
12681 the section name, which is a hack, but ought to work. */
12682
12683static bfd_boolean
12684elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12685{
12686 const char * name;
12687
12688 name = bfd_get_section_name (abfd, sec);
12689
12690 if (is_arm_elf_unwind_section_name (abfd, name))
12691 {
12692 hdr->sh_type = SHT_ARM_EXIDX;
12693 hdr->sh_flags |= SHF_LINK_ORDER;
12694 }
12695 return TRUE;
12696}
12697
6dc132d9
L		 12698/* Handle an ARM specific section when reading an object file. This is
12699 called when bfd_section_from_shdr finds a section with an unknown
12700 type. */
40a18ebd
NC		 12701
12702static bfd_boolean
12703elf32_arm_section_from_shdr (bfd *abfd,
12704 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12705 const char *name,
12706 int shindex)
40a18ebd
NC		 12707{
12708 /* There ought to be a place to keep ELF backend specific flags, but
12709 at the moment there isn't one. We just keep track of the
12710 sections by their name, instead. Fortunately, the ABI gives
12711 names for all the ARM specific sections, so we will probably get
12712 away with this. */
12713 switch (hdr->sh_type)
12714 {
12715 case SHT_ARM_EXIDX:
0951f019
RE		 12716 case SHT_ARM_PREEMPTMAP:
12717 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12718 break;
12719
12720 default:
12721 return FALSE;
12722 }
12723
6dc132d9 12724 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12725 return FALSE;
12726
12727 return TRUE;
12728}
e489d0ae 12729
44444f50
NC		 12730static _arm_elf_section_data *
12731get_arm_elf_section_data (asection * sec)
12732{
47b2e99c
JZ		 12733 if (sec && sec->owner && is_arm_elf (sec->owner))
12734 return elf32_arm_section_data (sec);
44444f50
NC		 12735 else
12736 return NULL;
8e3de13a
NC		 12737}
12738
4e617b1e
PB		 12739typedef struct
12740{
12741 void *finfo;
12742 struct bfd_link_info *info;
91a5743d
PB		 12743 asection *sec;
12744 int sec_shndx;
6e0b88f1
AM		 12745 int (*func) (void *, const char *, Elf_Internal_Sym *,
12746 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12747} output_arch_syminfo;
12748
12749enum map_symbol_type
12750{
12751 ARM_MAP_ARM,
12752 ARM_MAP_THUMB,
12753 ARM_MAP_DATA
12754};
12755
12756
7413f23f 12757/* Output a single mapping symbol. */
4e617b1e
PB		 12758
12759static bfd_boolean
7413f23f
DJ		 12760elf32_arm_output_map_sym (output_arch_syminfo *osi,
12761 enum map_symbol_type type,
12762 bfd_vma offset)
4e617b1e
PB		 12763{
12764 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 12765 Elf_Internal_Sym sym;
12766
91a5743d
PB		 12767 sym.st_value = osi->sec->output_section->vma
12768 + osi->sec->output_offset
12769 + offset;
4e617b1e
PB		 12770 sym.st_size = 0;
12771 sym.st_other = 0;
12772 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12773 sym.st_shndx = osi->sec_shndx;
fe33d2fa 12774 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 12775 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12776}
12777
12778
12779/* Output mapping symbols for PLT entries associated with H. */
12780
12781static bfd_boolean
12782elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12783{
12784 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12785 struct elf32_arm_link_hash_table *htab;
12786 struct elf32_arm_link_hash_entry *eh;
12787 bfd_vma addr;
12788
4e617b1e
PB		 12789 if (h->root.type == bfd_link_hash_indirect)
12790 return TRUE;
12791
12792 if (h->root.type == bfd_link_hash_warning)
12793 /* When warning symbols are created, they **replace** the "real"
12794 entry in the hash table, thus we never get to see the real
12795 symbol in a hash traversal. So look at it now. */
12796 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12797
12798 if (h->plt.offset == (bfd_vma) -1)
12799 return TRUE;
12800
4dfe6ac6
NC		 12801 htab = elf32_arm_hash_table (osi->info);
12802 if (htab == NULL)
12803 return FALSE;
12804
4e617b1e
PB		 12805 eh = (struct elf32_arm_link_hash_entry *) h;
12806 addr = h->plt.offset;
12807 if (htab->symbian_p)
12808 {
7413f23f 12809 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12810 return FALSE;
7413f23f 12811 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12812 return FALSE;
12813 }
12814 else if (htab->vxworks_p)
12815 {
7413f23f 12816 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12817 return FALSE;
7413f23f 12818 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12819 return FALSE;
7413f23f 12820 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12821 return FALSE;
7413f23f 12822 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12823 return FALSE;
12824 }
12825 else
12826 {
bd97cb95
DJ		 12827 bfd_signed_vma thumb_refs;
12828
12829 thumb_refs = eh->plt_thumb_refcount;
12830 if (!htab->use_blx)
12831 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12832
bd97cb95 12833 if (thumb_refs > 0)
4e617b1e 12834 {
7413f23f 12835 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12836 return FALSE;
12837 }
12838#ifdef FOUR_WORD_PLT
7413f23f 12839 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12840 return FALSE;
7413f23f 12841 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12842 return FALSE;
12843#else
906e58ca 12844 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12845 so only need to output a mapping symbol for the first PLT entry and
12846 entries with thumb thunks. */
bd97cb95 12847 if (thumb_refs > 0 || addr == 20)
4e617b1e 12848 {
7413f23f 12849 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12850 return FALSE;
12851 }
12852#endif
12853 }
12854
12855 return TRUE;
12856}
12857
7413f23f
DJ		 12858/* Output a single local symbol for a generated stub. */
12859
12860static bfd_boolean
12861elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12862 bfd_vma offset, bfd_vma size)
12863{
7413f23f
DJ		 12864 Elf_Internal_Sym sym;
12865
7413f23f
DJ		 12866 sym.st_value = osi->sec->output_section->vma
12867 + osi->sec->output_offset
12868 + offset;
12869 sym.st_size = size;
12870 sym.st_other = 0;
12871 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12872 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12873 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12874}
4e617b1e 12875
da5938a2 12876static bfd_boolean
8029a119
NC		 12877arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12878 void * in_arg)
da5938a2
NC		 12879{
12880 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 12881 asection *stub_sec;
12882 bfd_vma addr;
7413f23f 12883 char *stub_name;
9a008db3 12884 output_arch_syminfo *osi;
d3ce72d0 12885 const insn_sequence *template_sequence;
461a49ca
DJ		 12886 enum stub_insn_type prev_type;
12887 int size;
12888 int i;
12889 enum map_symbol_type sym_type;
da5938a2
NC		 12890
12891 /* Massage our args to the form they really have. */
12892 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12893 osi = (output_arch_syminfo *) in_arg;
da5938a2 12894
da5938a2
NC		 12895 stub_sec = stub_entry->stub_sec;
12896
12897 /* Ensure this stub is attached to the current section being
7413f23f 12898 processed. */
da5938a2
NC		 12899 if (stub_sec != osi->sec)
12900 return TRUE;
12901
7413f23f
DJ		 12902 addr = (bfd_vma) stub_entry->stub_offset;
12903 stub_name = stub_entry->output_name;
da5938a2 12904
d3ce72d0
NC		 12905 template_sequence = stub_entry->stub_template;
12906 switch (template_sequence[0].type)
7413f23f 12907 {
461a49ca
DJ		 12908 case ARM_TYPE:
12909 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 12910 return FALSE;
12911 break;
461a49ca 12912 case THUMB16_TYPE:
48229727 12913 case THUMB32_TYPE:
461a49ca
DJ		 12914 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
12915 stub_entry->stub_size))
da5938a2
NC		 12916 return FALSE;
12917 break;
12918 default:
12919 BFD_FAIL ();
48229727 12920 return 0;
7413f23f 12921 }
da5938a2 12922
461a49ca
DJ		 12923 prev_type = DATA_TYPE;
12924 size = 0;
12925 for (i = 0; i < stub_entry->stub_template_size; i++)
12926 {
d3ce72d0 12927 switch (template_sequence[i].type)
461a49ca
DJ		 12928 {
12929 case ARM_TYPE:
12930 sym_type = ARM_MAP_ARM;
12931 break;
12932
12933 case THUMB16_TYPE:
48229727 12934 case THUMB32_TYPE:
461a49ca
DJ		 12935 sym_type = ARM_MAP_THUMB;
12936 break;
12937
12938 case DATA_TYPE:
12939 sym_type = ARM_MAP_DATA;
12940 break;
12941
12942 default:
12943 BFD_FAIL ();
4e31c731 12944 return FALSE;
461a49ca
DJ		 12945 }
12946
d3ce72d0 12947 if (template_sequence[i].type != prev_type)
461a49ca 12948 {
d3ce72d0 12949 prev_type = template_sequence[i].type;
461a49ca
DJ		 12950 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
12951 return FALSE;
12952 }
12953
d3ce72d0 12954 switch (template_sequence[i].type)
461a49ca
DJ		 12955 {
12956 case ARM_TYPE:
48229727 12957 case THUMB32_TYPE:
461a49ca
DJ		 12958 size += 4;
12959 break;
12960
12961 case THUMB16_TYPE:
12962 size += 2;
12963 break;
12964
12965 case DATA_TYPE:
12966 size += 4;
12967 break;
12968
12969 default:
12970 BFD_FAIL ();
4e31c731 12971 return FALSE;
461a49ca
DJ		 12972 }
12973 }
12974
da5938a2
NC		 12975 return TRUE;
12976}
12977
33811162
DG		 12978/* Output mapping symbols for linker generated sections,
12979 and for those data-only sections that do not have a
12980 $d. */
4e617b1e
PB		 12981
12982static bfd_boolean
12983elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 12984 struct bfd_link_info *info,
12985 void *finfo,
6e0b88f1
AM		 12986 int (*func) (void *, const char *,
12987 Elf_Internal_Sym *,
12988 asection *,
12989 struct elf_link_hash_entry *))
4e617b1e
PB		 12990{
12991 output_arch_syminfo osi;
12992 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 12993 bfd_vma offset;
12994 bfd_size_type size;
33811162 12995 bfd *input_bfd;
4e617b1e
PB		 12996
12997 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12998 if (htab == NULL)
12999 return FALSE;
13000
906e58ca 13001 check_use_blx (htab);
91a5743d 13002
4e617b1e
PB		 13003 osi.finfo = finfo;
13004 osi.info = info;
13005 osi.func = func;
906e58ca 13006
33811162
DG		 13007 /* Add a $d mapping symbol to data-only sections that
13008 don't have any mapping symbol. This may result in (harmless) redundant
13009 mapping symbols. */
13010 for (input_bfd = info->input_bfds;
13011 input_bfd != NULL;
13012 input_bfd = input_bfd->link_next)
13013 {
13014 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
13015 for (osi.sec = input_bfd->sections;
13016 osi.sec != NULL;
13017 osi.sec = osi.sec->next)
13018 {
13019 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 13020 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
13021 != 0)
33811162
DG		 13022 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
13023 == SEC_HAS_CONTENTS
13024 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0
DJ		 13025 && get_arm_elf_section_data (osi.sec)->mapcount == 0
13026 && osi.sec->size > 0)
33811162
DG		 13027 {
13028 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13029 (output_bfd, osi.sec->output_section);
13030 if (osi.sec_shndx != (int)SHN_BAD)
13031 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
13032 }
13033 }
13034 }
13035
91a5743d
PB		 13036 /* ARM->Thumb glue. */
13037 if (htab->arm_glue_size > 0)
13038 {
13039 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13040 ARM2THUMB_GLUE_SECTION_NAME);
13041
13042 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13043 (output_bfd, osi.sec->output_section);
13044 if (info->shared || htab->root.is_relocatable_executable
13045 || htab->pic_veneer)
13046 size = ARM2THUMB_PIC_GLUE_SIZE;
13047 else if (htab->use_blx)
13048 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13049 else
13050 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13051
91a5743d
PB		 13052 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13053 {
7413f23f
DJ		 13054 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13055 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13056 }
13057 }
13058
13059 /* Thumb->ARM glue. */
13060 if (htab->thumb_glue_size > 0)
13061 {
13062 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13063 THUMB2ARM_GLUE_SECTION_NAME);
13064
13065 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13066 (output_bfd, osi.sec->output_section);
13067 size = THUMB2ARM_GLUE_SIZE;
13068
13069 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13070 {
7413f23f
DJ		 13071 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13072 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13073 }
13074 }
13075
845b51d6
PB		 13076 /* ARMv4 BX veneers. */
13077 if (htab->bx_glue_size > 0)
13078 {
13079 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13080 ARM_BX_GLUE_SECTION_NAME);
13081
13082 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13083 (output_bfd, osi.sec->output_section);
13084
7413f23f 13085 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13086 }
13087
8029a119
NC		 13088 /* Long calls stubs. */
13089 if (htab->stub_bfd && htab->stub_bfd->sections)
13090 {
da5938a2 13091 asection* stub_sec;
8029a119 13092
da5938a2
NC		 13093 for (stub_sec = htab->stub_bfd->sections;
13094 stub_sec != NULL;
8029a119
NC		 13095 stub_sec = stub_sec->next)
13096 {
13097 /* Ignore non-stub sections. */
13098 if (!strstr (stub_sec->name, STUB_SUFFIX))
13099 continue;
da5938a2 13100
8029a119 13101 osi.sec = stub_sec;
da5938a2 13102
8029a119
NC		 13103 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13104 (output_bfd, osi.sec->output_section);
da5938a2 13105
8029a119
NC		 13106 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13107 }
13108 }
da5938a2 13109
91a5743d 13110 /* Finally, output mapping symbols for the PLT. */
362d30a1 13111 if (!htab->root.splt || htab->root.splt->size == 0)
91a5743d
PB		 13112 return TRUE;
13113
362d30a1 13114 osi.sec = htab->root.splt;
91a5743d 13115 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
362d30a1 13116 osi.sec->output_section);
4e617b1e
PB		 13117 /* Output mapping symbols for the plt header. SymbianOS does not have a
13118 plt header. */
13119 if (htab->vxworks_p)
13120 {
13121 /* VxWorks shared libraries have no PLT header. */
13122 if (!info->shared)
13123 {
7413f23f 13124 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13125 return FALSE;
7413f23f 13126 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13127 return FALSE;
13128 }
13129 }
13130 else if (!htab->symbian_p)
13131 {
7413f23f 13132 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13133 return FALSE;
13134#ifndef FOUR_WORD_PLT
7413f23f 13135 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13136 return FALSE;
13137#endif
13138 }
13139
13140 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13141 return TRUE;
13142}
13143
e489d0ae
PB		 13144/* Allocate target specific section data. */
13145
13146static bfd_boolean
13147elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13148{
f592407e
AM		 13149 if (!sec->used_by_bfd)
13150 {
13151 _arm_elf_section_data *sdata;
13152 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13153
21d799b5 13154 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 13155 if (sdata == NULL)
13156 return FALSE;
13157 sec->used_by_bfd = sdata;
13158 }
e489d0ae
PB		 13159
13160 return _bfd_elf_new_section_hook (abfd, sec);
13161}
13162
13163
13164/* Used to order a list of mapping symbols by address. */
13165
13166static int
13167elf32_arm_compare_mapping (const void * a, const void * b)
13168{
7f6a71ff
JM		 13169 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13170 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13171
13172 if (amap->vma > bmap->vma)
13173 return 1;
13174 else if (amap->vma < bmap->vma)
13175 return -1;
13176 else if (amap->type > bmap->type)
13177 /* Ensure results do not depend on the host qsort for objects with
13178 multiple mapping symbols at the same address by sorting on type
13179 after vma. */
13180 return 1;
13181 else if (amap->type < bmap->type)
13182 return -1;
13183 else
13184 return 0;
e489d0ae
PB		 13185}
13186
2468f9c9
PB		 13187/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13188
13189static unsigned long
13190offset_prel31 (unsigned long addr, bfd_vma offset)
13191{
13192 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13193}
13194
13195/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13196 relocations. */
13197
13198static void
13199copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13200{
13201 unsigned long first_word = bfd_get_32 (output_bfd, from);
13202 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13203
13204 /* High bit of first word is supposed to be zero. */
13205 if ((first_word & 0x80000000ul) == 0)
13206 first_word = offset_prel31 (first_word, offset);
13207
13208 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13209 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13210 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13211 second_word = offset_prel31 (second_word, offset);
13212
13213 bfd_put_32 (output_bfd, first_word, to);
13214 bfd_put_32 (output_bfd, second_word, to + 4);
13215}
e489d0ae 13216
48229727
JB		 13217/* Data for make_branch_to_a8_stub(). */
13218
13219struct a8_branch_to_stub_data {
13220 asection *writing_section;
13221 bfd_byte *contents;
13222};
13223
13224
13225/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13226 places for a particular section. */
13227
13228static bfd_boolean
13229make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13230 void *in_arg)
13231{
13232 struct elf32_arm_stub_hash_entry *stub_entry;
13233 struct a8_branch_to_stub_data *data;
13234 bfd_byte *contents;
13235 unsigned long branch_insn;
13236 bfd_vma veneered_insn_loc, veneer_entry_loc;
13237 bfd_signed_vma branch_offset;
13238 bfd *abfd;
91d6fa6a 13239 unsigned int target;
48229727
JB		 13240
13241 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13242 data = (struct a8_branch_to_stub_data *) in_arg;
13243
13244 if (stub_entry->target_section != data->writing_section
4563a860 13245 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 13246 return TRUE;
13247
13248 contents = data->contents;
13249
13250 veneered_insn_loc = stub_entry->target_section->output_section->vma
13251 + stub_entry->target_section->output_offset
13252 + stub_entry->target_value;
13253
13254 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13255 + stub_entry->stub_sec->output_offset
13256 + stub_entry->stub_offset;
13257
13258 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13259 veneered_insn_loc &= ~3u;
13260
13261 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13262
13263 abfd = stub_entry->target_section->owner;
91d6fa6a 13264 target = stub_entry->target_value;
48229727
JB		 13265
13266 /* We attempt to avoid this condition by setting stubs_always_after_branch
13267 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13268 This check is just to be on the safe side... */
13269 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13270 {
13271 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13272 "allocated in unsafe location"), abfd);
13273 return FALSE;
13274 }
13275
13276 switch (stub_entry->stub_type)
13277 {
13278 case arm_stub_a8_veneer_b:
13279 case arm_stub_a8_veneer_b_cond:
13280 branch_insn = 0xf0009000;
13281 goto jump24;
13282
13283 case arm_stub_a8_veneer_blx:
13284 branch_insn = 0xf000e800;
13285 goto jump24;
13286
13287 case arm_stub_a8_veneer_bl:
13288 {
13289 unsigned int i1, j1, i2, j2, s;
13290
13291 branch_insn = 0xf000d000;
13292
13293 jump24:
13294 if (branch_offset < -16777216 || branch_offset > 16777214)
13295 {
13296 /* There's not much we can do apart from complain if this
13297 happens. */
13298 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13299 "of range (input file too large)"), abfd);
13300 return FALSE;
13301 }
13302
13303 /* i1 = not(j1 eor s), so:
13304 not i1 = j1 eor s
13305 j1 = (not i1) eor s. */
13306
13307 branch_insn |= (branch_offset >> 1) & 0x7ff;
13308 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13309 i2 = (branch_offset >> 22) & 1;
13310 i1 = (branch_offset >> 23) & 1;
13311 s = (branch_offset >> 24) & 1;
13312 j1 = (!i1) ^ s;
13313 j2 = (!i2) ^ s;
13314 branch_insn |= j2 << 11;
13315 branch_insn |= j1 << 13;
13316 branch_insn |= s << 26;
13317 }
13318 break;
13319
13320 default:
13321 BFD_FAIL ();
13322 return FALSE;
13323 }
13324
91d6fa6a
NC		 13325 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
13326 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 13327
13328 return TRUE;
13329}
13330
e489d0ae
PB		 13331/* Do code byteswapping. Return FALSE afterwards so that the section is
13332 written out as normal. */
13333
13334static bfd_boolean
c7b8f16e 13335elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13336 struct bfd_link_info *link_info,
13337 asection *sec,
e489d0ae
PB		 13338 bfd_byte *contents)
13339{
48229727 13340 unsigned int mapcount, errcount;
8e3de13a 13341 _arm_elf_section_data *arm_data;
c7b8f16e 13342 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13343 elf32_arm_section_map *map;
c7b8f16e 13344 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13345 bfd_vma ptr;
13346 bfd_vma end;
c7b8f16e 13347 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13348 bfd_byte tmp;
48229727 13349 unsigned int i;
57e8b36a 13350
4dfe6ac6
NC		 13351 if (globals == NULL)
13352 return FALSE;
13353
8e3de13a
NC		 13354 /* If this section has not been allocated an _arm_elf_section_data
13355 structure then we cannot record anything. */
13356 arm_data = get_arm_elf_section_data (sec);
13357 if (arm_data == NULL)
13358 return FALSE;
13359
13360 mapcount = arm_data->mapcount;
13361 map = arm_data->map;
c7b8f16e
JB		 13362 errcount = arm_data->erratumcount;
13363
13364 if (errcount != 0)
13365 {
13366 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13367
13368 for (errnode = arm_data->erratumlist; errnode != 0;
13369 errnode = errnode->next)
13370 {
91d6fa6a 13371 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 13372
13373 switch (errnode->type)
13374 {
13375 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13376 {
13377 bfd_vma branch_to_veneer;
13378 /* Original condition code of instruction, plus bit mask for
13379 ARM B instruction. */
13380 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13381 | 0x0a000000;
13382
13383 /* The instruction is before the label. */
91d6fa6a 13384 target -= 4;
c7b8f16e
JB		 13385
13386 /* Above offset included in -4 below. */
13387 branch_to_veneer = errnode->u.b.veneer->vma
13388 - errnode->vma - 4;
13389
13390 if ((signed) branch_to_veneer < -(1 << 25)
13391 || (signed) branch_to_veneer >= (1 << 25))
13392 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13393 "range"), output_bfd);
13394
13395 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 13396 contents[endianflip ^ target] = insn & 0xff;
13397 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13398 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13399 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13400 }
13401 break;
13402
13403 case VFP11_ERRATUM_ARM_VENEER:
13404 {
13405 bfd_vma branch_from_veneer;
13406 unsigned int insn;
13407
13408 /* Take size of veneer into account. */
13409 branch_from_veneer = errnode->u.v.branch->vma
13410 - errnode->vma - 12;
13411
13412 if ((signed) branch_from_veneer < -(1 << 25)
13413 || (signed) branch_from_veneer >= (1 << 25))
13414 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13415 "range"), output_bfd);
13416
13417 /* Original instruction. */
13418 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 13419 contents[endianflip ^ target] = insn & 0xff;
13420 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13421 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13422 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13423
13424 /* Branch back to insn after original insn. */
13425 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 13426 contents[endianflip ^ (target + 4)] = insn & 0xff;
13427 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
13428 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
13429 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13430 }
13431 break;
13432
13433 default:
13434 abort ();
13435 }
13436 }
13437 }
e489d0ae 13438
2468f9c9
PB		 13439 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13440 {
13441 arm_unwind_table_edit *edit_node
13442 = arm_data->u.exidx.unwind_edit_list;
13443 /* Now, sec->size is the size of the section we will write. The original
13444 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13445 markers) was sec->rawsize. (This isn't the case if we perform no
13446 edits, then rawsize will be zero and we should use size). */
21d799b5 13447 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 13448 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13449 unsigned int in_index, out_index;
13450 bfd_vma add_to_offsets = 0;
13451
13452 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13453 {
13454 if (edit_node)
13455 {
13456 unsigned int edit_index = edit_node->index;
13457
13458 if (in_index < edit_index && in_index * 8 < input_size)
13459 {
13460 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13461 contents + in_index * 8, add_to_offsets);
13462 out_index++;
13463 in_index++;
13464 }
13465 else if (in_index == edit_index
13466 || (in_index * 8 >= input_size
13467 && edit_index == UINT_MAX))
13468 {
13469 switch (edit_node->type)
13470 {
13471 case DELETE_EXIDX_ENTRY:
13472 in_index++;
13473 add_to_offsets += 8;
13474 break;
13475
13476 case INSERT_EXIDX_CANTUNWIND_AT_END:
13477 {
13478 asection *text_sec = edit_node->linked_section;
13479 bfd_vma text_offset = text_sec->output_section->vma
13480 + text_sec->output_offset
13481 + text_sec->size;
13482 bfd_vma exidx_offset = offset + out_index * 8;
13483 unsigned long prel31_offset;
13484
13485 /* Note: this is meant to be equivalent to an
13486 R_ARM_PREL31 relocation. These synthetic
13487 EXIDX_CANTUNWIND markers are not relocated by the
13488 usual BFD method. */
13489 prel31_offset = (text_offset - exidx_offset)
13490 & 0x7ffffffful;
13491
13492 /* First address we can't unwind. */
13493 bfd_put_32 (output_bfd, prel31_offset,
13494 &edited_contents[out_index * 8]);
13495
13496 /* Code for EXIDX_CANTUNWIND. */
13497 bfd_put_32 (output_bfd, 0x1,
13498 &edited_contents[out_index * 8 + 4]);
13499
13500 out_index++;
13501 add_to_offsets -= 8;
13502 }
13503 break;
13504 }
13505
13506 edit_node = edit_node->next;
13507 }
13508 }
13509 else
13510 {
13511 /* No more edits, copy remaining entries verbatim. */
13512 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13513 contents + in_index * 8, add_to_offsets);
13514 out_index++;
13515 in_index++;
13516 }
13517 }
13518
13519 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13520 bfd_set_section_contents (output_bfd, sec->output_section,
13521 edited_contents,
13522 (file_ptr) sec->output_offset, sec->size);
13523
13524 return TRUE;
13525 }
13526
48229727
JB		 13527 /* Fix code to point to Cortex-A8 erratum stubs. */
13528 if (globals->fix_cortex_a8)
13529 {
13530 struct a8_branch_to_stub_data data;
13531
13532 data.writing_section = sec;
13533 data.contents = contents;
13534
13535 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13536 &data);
13537 }
13538
e489d0ae
PB		 13539 if (mapcount == 0)
13540 return FALSE;
13541
c7b8f16e 13542 if (globals->byteswap_code)
e489d0ae 13543 {
c7b8f16e 13544 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13545
c7b8f16e
JB		 13546 ptr = map[0].vma;
13547 for (i = 0; i < mapcount; i++)
13548 {
13549 if (i == mapcount - 1)
13550 end = sec->size;
13551 else
13552 end = map[i + 1].vma;
e489d0ae 13553
c7b8f16e 13554 switch (map[i].type)
e489d0ae 13555 {
c7b8f16e
JB		 13556 case 'a':
13557 /* Byte swap code words. */
13558 while (ptr + 3 < end)
13559 {
13560 tmp = contents[ptr];
13561 contents[ptr] = contents[ptr + 3];
13562 contents[ptr + 3] = tmp;
13563 tmp = contents[ptr + 1];
13564 contents[ptr + 1] = contents[ptr + 2];
13565 contents[ptr + 2] = tmp;
13566 ptr += 4;
13567 }
13568 break;
e489d0ae 13569
c7b8f16e
JB		 13570 case 't':
13571 /* Byte swap code halfwords. */
13572 while (ptr + 1 < end)
13573 {
13574 tmp = contents[ptr];
13575 contents[ptr] = contents[ptr + 1];
13576 contents[ptr + 1] = tmp;
13577 ptr += 2;
13578 }
13579 break;
13580
13581 case 'd':
13582 /* Leave data alone. */
13583 break;
13584 }
13585 ptr = end;
13586 }
e489d0ae 13587 }
8e3de13a 13588
93204d3a 13589 free (map);
47b2e99c 13590 arm_data->mapcount = -1;
c7b8f16e 13591 arm_data->mapsize = 0;
8e3de13a 13592 arm_data->map = NULL;
8e3de13a 13593
e489d0ae
PB		 13594 return FALSE;
13595}
13596
b7693d02
DJ		 13597/* Display STT_ARM_TFUNC symbols as functions. */
13598
13599static void
13600elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13601 asymbol *asym)
13602{
13603 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13604
13605 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13606 elfsym->symbol.flags |= BSF_FUNCTION;
13607}
13608
0beaef2b
PB		 13609
13610/* Mangle thumb function symbols as we read them in. */
13611
8384fb8f 13612static bfd_boolean
0beaef2b
PB		 13613elf32_arm_swap_symbol_in (bfd * abfd,
13614 const void *psrc,
13615 const void *pshn,
13616 Elf_Internal_Sym *dst)
13617{
8384fb8f
AM		 13618 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13619 return FALSE;
0beaef2b
PB		 13620
13621 /* New EABI objects mark thumb function symbols by setting the low bit of
13622 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13623 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13624 && (dst->st_value & 1))
13625 {
13626 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13627 dst->st_value &= ~(bfd_vma) 1;
13628 }
8384fb8f 13629 return TRUE;
0beaef2b
PB		 13630}
13631
13632
13633/* Mangle thumb function symbols as we write them out. */
13634
13635static void
13636elf32_arm_swap_symbol_out (bfd *abfd,
13637 const Elf_Internal_Sym *src,
13638 void *cdst,
13639 void *shndx)
13640{
13641 Elf_Internal_Sym newsym;
13642
13643 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13644 of the address set, as per the new EABI. We do this unconditionally
13645 because objcopy does not set the elf header flags until after
13646 it writes out the symbol table. */
13647 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13648 {
13649 newsym = *src;
13650 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13651 if (newsym.st_shndx != SHN_UNDEF)
13652 {
13653 /* Do this only for defined symbols. At link type, the static
13654 linker will simulate the work of dynamic linker of resolving
13655 symbols and will carry over the thumbness of found symbols to
13656 the output symbol table. It's not clear how it happens, but
b0fead2b 13657 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13658 runtime, and writing '1' for them will be confusing for users
13659 and possibly for dynamic linker itself.
13660 */
13661 newsym.st_value |= 1;
13662 }
906e58ca 13663
0beaef2b
PB		 13664 src = &newsym;
13665 }
13666 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13667}
13668
b294bdf8
MM		 13669/* Add the PT_ARM_EXIDX program header. */
13670
13671static bfd_boolean
906e58ca 13672elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13673 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13674{
13675 struct elf_segment_map *m;
13676 asection *sec;
13677
13678 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13679 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13680 {
13681 /* If there is already a PT_ARM_EXIDX header, then we do not
13682 want to add another one. This situation arises when running
13683 "strip"; the input binary already has the header. */
13684 m = elf_tdata (abfd)->segment_map;
13685 while (m && m->p_type != PT_ARM_EXIDX)
13686 m = m->next;
13687 if (!m)
13688 {
21d799b5
NC		 13689 m = (struct elf_segment_map *)
13690 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 13691 if (m == NULL)
13692 return FALSE;
13693 m->p_type = PT_ARM_EXIDX;
13694 m->count = 1;
13695 m->sections[0] = sec;
13696
13697 m->next = elf_tdata (abfd)->segment_map;
13698 elf_tdata (abfd)->segment_map = m;
13699 }
13700 }
13701
13702 return TRUE;
13703}
13704
13705/* We may add a PT_ARM_EXIDX program header. */
13706
13707static int
a6b96beb
AM		 13708elf32_arm_additional_program_headers (bfd *abfd,
13709 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13710{
13711 asection *sec;
13712
13713 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13714 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13715 return 1;
13716 else
13717 return 0;
13718}
13719
fcb93ecf 13720/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13721
fcb93ecf
PB		 13722static bfd_boolean
13723elf32_arm_is_function_type (unsigned int type)
13724{
0f88be7a 13725 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13726}
13727
0beaef2b 13728/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13729const struct elf_size_info elf32_arm_size_info =
13730{
0beaef2b
PB		 13731 sizeof (Elf32_External_Ehdr),
13732 sizeof (Elf32_External_Phdr),
13733 sizeof (Elf32_External_Shdr),
13734 sizeof (Elf32_External_Rel),
13735 sizeof (Elf32_External_Rela),
13736 sizeof (Elf32_External_Sym),
13737 sizeof (Elf32_External_Dyn),
13738 sizeof (Elf_External_Note),
13739 4,
13740 1,
13741 32, 2,
13742 ELFCLASS32, EV_CURRENT,
13743 bfd_elf32_write_out_phdrs,
13744 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13745 bfd_elf32_checksum_contents,
0beaef2b
PB		 13746 bfd_elf32_write_relocs,
13747 elf32_arm_swap_symbol_in,
13748 elf32_arm_swap_symbol_out,
13749 bfd_elf32_slurp_reloc_table,
13750 bfd_elf32_slurp_symbol_table,
13751 bfd_elf32_swap_dyn_in,
13752 bfd_elf32_swap_dyn_out,
13753 bfd_elf32_swap_reloc_in,
13754 bfd_elf32_swap_reloc_out,
13755 bfd_elf32_swap_reloca_in,
13756 bfd_elf32_swap_reloca_out
13757};
13758
252b5132 13759#define ELF_ARCH bfd_arch_arm
ae95ffa6 13760#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 13761#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13762#ifdef __QNXTARGET__
13763#define ELF_MAXPAGESIZE 0x1000
13764#else
f21f3fe0 13765#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13766#endif
b1342370 13767#define ELF_MINPAGESIZE 0x1000
24718e3b 13768#define ELF_COMMONPAGESIZE 0x1000
252b5132 13769
ba93b8ac
DJ		 13770#define bfd_elf32_mkobject elf32_arm_mkobject
13771
99e4ae17
AJ		 13772#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13773#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13774#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13775#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13776#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13777#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13778#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13779#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13780#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13781#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13782#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13783#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 13784#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13785
13786#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13787#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13788#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13789#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13790#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13791#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13792#define elf_backend_write_section elf32_arm_write_section
252b5132 13793#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13794#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13795#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13796#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13797#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13798#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13799#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13800#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13801#define elf_backend_object_p elf32_arm_object_p
e16bb312 13802#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13803#define elf_backend_fake_sections elf32_arm_fake_sections
13804#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13805#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13806#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13807#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13808#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13809#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13810#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13811#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13812#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13813#define elf_backend_is_function_type elf32_arm_is_function_type
13814
13815#define elf_backend_can_refcount 1
13816#define elf_backend_can_gc_sections 1
13817#define elf_backend_plt_readonly 1
13818#define elf_backend_want_got_plt 1
13819#define elf_backend_want_plt_sym 0
13820#define elf_backend_may_use_rel_p 1
13821#define elf_backend_may_use_rela_p 0
4e7fd91e 13822#define elf_backend_default_use_rela_p 0
252b5132 13823
04f7c78d 13824#define elf_backend_got_header_size 12
04f7c78d 13825
906e58ca
NC		 13826#undef elf_backend_obj_attrs_vendor
13827#define elf_backend_obj_attrs_vendor "aeabi"
13828#undef elf_backend_obj_attrs_section
13829#define elf_backend_obj_attrs_section ".ARM.attributes"
13830#undef elf_backend_obj_attrs_arg_type
13831#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13832#undef elf_backend_obj_attrs_section_type
104d59d1 13833#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13834#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
e8b36cd1 13835#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 13836
252b5132 13837#include "elf32-target.h"
7f266840 13838
906e58ca 13839/* VxWorks Targets. */
4e7fd91e 13840
906e58ca 13841#undef TARGET_LITTLE_SYM
4e7fd91e 13842#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13843#undef TARGET_LITTLE_NAME
4e7fd91e 13844#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13845#undef TARGET_BIG_SYM
4e7fd91e 13846#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13847#undef TARGET_BIG_NAME
4e7fd91e
PB		 13848#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13849
13850/* Like elf32_arm_link_hash_table_create -- but overrides
13851 appropriately for VxWorks. */
906e58ca 13852
4e7fd91e
PB		 13853static struct bfd_link_hash_table *
13854elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13855{
13856 struct bfd_link_hash_table *ret;
13857
13858 ret = elf32_arm_link_hash_table_create (abfd);
13859 if (ret)
13860 {
13861 struct elf32_arm_link_hash_table *htab
00a97672 13862 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13863 htab->use_rel = 0;
00a97672 13864 htab->vxworks_p = 1;
4e7fd91e
PB		 13865 }
13866 return ret;
906e58ca 13867}
4e7fd91e 13868
00a97672
RS		 13869static void
13870elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13871{
13872 elf32_arm_final_write_processing (abfd, linker);
13873 elf_vxworks_final_write_processing (abfd, linker);
13874}
13875
906e58ca 13876#undef elf32_bed
4e7fd91e
PB		 13877#define elf32_bed elf32_arm_vxworks_bed
13878
906e58ca
NC		 13879#undef bfd_elf32_bfd_link_hash_table_create
13880#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13881#undef elf_backend_add_symbol_hook
13882#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13883#undef elf_backend_final_write_processing
13884#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13885#undef elf_backend_emit_relocs
13886#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13887
906e58ca 13888#undef elf_backend_may_use_rel_p
00a97672 13889#define elf_backend_may_use_rel_p 0
906e58ca 13890#undef elf_backend_may_use_rela_p
00a97672 13891#define elf_backend_may_use_rela_p 1
906e58ca 13892#undef elf_backend_default_use_rela_p
00a97672 13893#define elf_backend_default_use_rela_p 1
906e58ca 13894#undef elf_backend_want_plt_sym
00a97672 13895#define elf_backend_want_plt_sym 1
906e58ca 13896#undef ELF_MAXPAGESIZE
00a97672 13897#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13898
13899#include "elf32-target.h"
13900
13901
21d799b5
NC		 13902/* Merge backend specific data from an object file to the output
13903 object file when linking. */
13904
13905static bfd_boolean
13906elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
13907{
13908 flagword out_flags;
13909 flagword in_flags;
13910 bfd_boolean flags_compatible = TRUE;
13911 asection *sec;
13912
13913 /* Check if we have the same endianess. */
13914 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
13915 return FALSE;
13916
13917 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13918 return TRUE;
13919
13920 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
13921 return FALSE;
13922
13923 /* The input BFD must have had its flags initialised. */
13924 /* The following seems bogus to me -- The flags are initialized in
13925 the assembler but I don't think an elf_flags_init field is
13926 written into the object. */
13927 /* BFD_ASSERT (elf_flags_init (ibfd)); */
13928
13929 in_flags = elf_elfheader (ibfd)->e_flags;
13930 out_flags = elf_elfheader (obfd)->e_flags;
13931
13932 /* In theory there is no reason why we couldn't handle this. However
13933 in practice it isn't even close to working and there is no real
13934 reason to want it. */
13935 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
13936 && !(ibfd->flags & DYNAMIC)
13937 && (in_flags & EF_ARM_BE8))
13938 {
13939 _bfd_error_handler (_("error: %B is already in final BE8 format"),
13940 ibfd);
13941 return FALSE;
13942 }
13943
13944 if (!elf_flags_init (obfd))
13945 {
13946 /* If the input is the default architecture and had the default
13947 flags then do not bother setting the flags for the output
13948 architecture, instead allow future merges to do this. If no
13949 future merges ever set these flags then they will retain their
13950 uninitialised values, which surprise surprise, correspond
13951 to the default values. */
13952 if (bfd_get_arch_info (ibfd)->the_default
13953 && elf_elfheader (ibfd)->e_flags == 0)
13954 return TRUE;
13955
13956 elf_flags_init (obfd) = TRUE;
13957 elf_elfheader (obfd)->e_flags = in_flags;
13958
13959 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
13960 && bfd_get_arch_info (obfd)->the_default)
13961 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
13962
13963 return TRUE;
13964 }
13965
13966 /* Determine what should happen if the input ARM architecture
13967 does not match the output ARM architecture. */
13968 if (! bfd_arm_merge_machines (ibfd, obfd))
13969 return FALSE;
13970
13971 /* Identical flags must be compatible. */
13972 if (in_flags == out_flags)
13973 return TRUE;
13974
13975 /* Check to see if the input BFD actually contains any sections. If
13976 not, its flags may not have been initialised either, but it
13977 cannot actually cause any incompatiblity. Do not short-circuit
13978 dynamic objects; their section list may be emptied by
13979 elf_link_add_object_symbols.
13980
13981 Also check to see if there are no code sections in the input.
13982 In this case there is no need to check for code specific flags.
13983 XXX - do we need to worry about floating-point format compatability
13984 in data sections ? */
13985 if (!(ibfd->flags & DYNAMIC))
13986 {
13987 bfd_boolean null_input_bfd = TRUE;
13988 bfd_boolean only_data_sections = TRUE;
13989
13990 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
13991 {
13992 /* Ignore synthetic glue sections. */
13993 if (strcmp (sec->name, ".glue_7")
13994 && strcmp (sec->name, ".glue_7t"))
13995 {
13996 if ((bfd_get_section_flags (ibfd, sec)
13997 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
13998 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
13999 only_data_sections = FALSE;
14000
14001 null_input_bfd = FALSE;
14002 break;
14003 }
14004 }
14005
14006 if (null_input_bfd || only_data_sections)
14007 return TRUE;
14008 }
14009
14010 /* Complain about various flag mismatches. */
14011 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
14012 EF_ARM_EABI_VERSION (out_flags)))
14013 {
14014 _bfd_error_handler
14015 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
14016 ibfd, obfd,
14017 (in_flags & EF_ARM_EABIMASK) >> 24,
14018 (out_flags & EF_ARM_EABIMASK) >> 24);
14019 return FALSE;
14020 }
14021
14022 /* Not sure what needs to be checked for EABI versions >= 1. */
14023 /* VxWorks libraries do not use these flags. */
14024 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
14025 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
14026 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
14027 {
14028 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14029 {
14030 _bfd_error_handler
14031 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
14032 ibfd, obfd,
14033 in_flags & EF_ARM_APCS_26 ? 26 : 32,
14034 out_flags & EF_ARM_APCS_26 ? 26 : 32);
14035 flags_compatible = FALSE;
14036 }
14037
14038 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14039 {
14040 if (in_flags & EF_ARM_APCS_FLOAT)
14041 _bfd_error_handler
14042 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14043 ibfd, obfd);
14044 else
14045 _bfd_error_handler
14046 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14047 ibfd, obfd);
14048
14049 flags_compatible = FALSE;
14050 }
14051
14052 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14053 {
14054 if (in_flags & EF_ARM_VFP_FLOAT)
14055 _bfd_error_handler
14056 (_("error: %B uses VFP instructions, whereas %B does not"),
14057 ibfd, obfd);
14058 else
14059 _bfd_error_handler
14060 (_("error: %B uses FPA instructions, whereas %B does not"),
14061 ibfd, obfd);
14062
14063 flags_compatible = FALSE;
14064 }
14065
14066 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14067 {
14068 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14069 _bfd_error_handler
14070 (_("error: %B uses Maverick instructions, whereas %B does not"),
14071 ibfd, obfd);
14072 else
14073 _bfd_error_handler
14074 (_("error: %B does not use Maverick instructions, whereas %B does"),
14075 ibfd, obfd);
14076
14077 flags_compatible = FALSE;
14078 }
14079
14080#ifdef EF_ARM_SOFT_FLOAT
14081 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14082 {
14083 /* We can allow interworking between code that is VFP format
14084 layout, and uses either soft float or integer regs for
14085 passing floating point arguments and results. We already
14086 know that the APCS_FLOAT flags match; similarly for VFP
14087 flags. */
14088 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14089 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14090 {
14091 if (in_flags & EF_ARM_SOFT_FLOAT)
14092 _bfd_error_handler
14093 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14094 ibfd, obfd);
14095 else
14096 _bfd_error_handler
14097 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14098 ibfd, obfd);
14099
14100 flags_compatible = FALSE;
14101 }
14102 }
14103#endif
14104
14105 /* Interworking mismatch is only a warning. */
14106 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14107 {
14108 if (in_flags & EF_ARM_INTERWORK)
14109 {
14110 _bfd_error_handler
14111 (_("Warning: %B supports interworking, whereas %B does not"),
14112 ibfd, obfd);
14113 }
14114 else
14115 {
14116 _bfd_error_handler
14117 (_("Warning: %B does not support interworking, whereas %B does"),
14118 ibfd, obfd);
14119 }
14120 }
14121 }
14122
14123 return flags_compatible;
14124}
14125
14126
906e58ca 14127/* Symbian OS Targets. */
7f266840 14128
906e58ca 14129#undef TARGET_LITTLE_SYM
7f266840 14130#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 14131#undef TARGET_LITTLE_NAME
7f266840 14132#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 14133#undef TARGET_BIG_SYM
7f266840 14134#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14135#undef TARGET_BIG_NAME
7f266840
DJ		 14136#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14137
14138/* Like elf32_arm_link_hash_table_create -- but overrides
14139 appropriately for Symbian OS. */
906e58ca 14140
7f266840
DJ		 14141static struct bfd_link_hash_table *
14142elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14143{
14144 struct bfd_link_hash_table *ret;
14145
14146 ret = elf32_arm_link_hash_table_create (abfd);
14147 if (ret)
14148 {
14149 struct elf32_arm_link_hash_table *htab
14150 = (struct elf32_arm_link_hash_table *)ret;
14151 /* There is no PLT header for Symbian OS. */
14152 htab->plt_header_size = 0;
95720a86
DJ		 14153 /* The PLT entries are each one instruction and one word. */
14154 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 14155 htab->symbian_p = 1;
33bfe774
JB		 14156 /* Symbian uses armv5t or above, so use_blx is always true. */
14157 htab->use_blx = 1;
67687978 14158 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 14159 }
14160 return ret;
906e58ca 14161}
7f266840 14162
b35d266b 14163static const struct bfd_elf_special_section
551b43fd 14164elf32_arm_symbian_special_sections[] =
7f266840 14165{
5cd3778d
MM		 14166 /* In a BPABI executable, the dynamic linking sections do not go in
14167 the loadable read-only segment. The post-linker may wish to
14168 refer to these sections, but they are not part of the final
14169 program image. */
0112cd26
NC		 14170 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
14171 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
14172 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
14173 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
14174 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 14175 /* These sections do not need to be writable as the SymbianOS
14176 postlinker will arrange things so that no dynamic relocation is
14177 required. */
0112cd26
NC		 14178 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
14179 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
14180 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
14181 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 14182};
14183
c3c76620 14184static void
906e58ca 14185elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 14186 struct bfd_link_info *link_info)
c3c76620
MM		 14187{
14188 /* BPABI objects are never loaded directly by an OS kernel; they are
14189 processed by a postlinker first, into an OS-specific format. If
14190 the D_PAGED bit is set on the file, BFD will align segments on
14191 page boundaries, so that an OS can directly map the file. With
14192 BPABI objects, that just results in wasted space. In addition,
14193 because we clear the D_PAGED bit, map_sections_to_segments will
14194 recognize that the program headers should not be mapped into any
14195 loadable segment. */
14196 abfd->flags &= ~D_PAGED;
906e58ca 14197 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 14198}
7f266840
DJ		 14199
14200static bfd_boolean
906e58ca 14201elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 14202 struct bfd_link_info *info)
7f266840
DJ		 14203{
14204 struct elf_segment_map *m;
14205 asection *dynsec;
14206
7f266840
DJ		 14207 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14208 segment. However, because the .dynamic section is not marked
14209 with SEC_LOAD, the generic ELF code will not create such a
14210 segment. */
14211 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14212 if (dynsec)
14213 {
8ded5a0f
AM		 14214 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14215 if (m->p_type == PT_DYNAMIC)
14216 break;
14217
14218 if (m == NULL)
14219 {
14220 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14221 m->next = elf_tdata (abfd)->segment_map;
14222 elf_tdata (abfd)->segment_map = m;
14223 }
7f266840
DJ		 14224 }
14225
b294bdf8
MM		 14226 /* Also call the generic arm routine. */
14227 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 14228}
14229
95720a86
DJ		 14230/* Return address for Ith PLT stub in section PLT, for relocation REL
14231 or (bfd_vma) -1 if it should not be included. */
14232
14233static bfd_vma
14234elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14235 const arelent *rel ATTRIBUTE_UNUSED)
14236{
14237 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14238}
14239
14240
8029a119 14241#undef elf32_bed
7f266840
DJ		 14242#define elf32_bed elf32_arm_symbian_bed
14243
14244/* The dynamic sections are not allocated on SymbianOS; the postlinker
14245 will process them and then discard them. */
906e58ca 14246#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14247#define ELF_DYNAMIC_SEC_FLAGS \
14248 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14249
00a97672 14250#undef elf_backend_add_symbol_hook
00a97672 14251#undef elf_backend_emit_relocs
c3c76620 14252
906e58ca
NC		 14253#undef bfd_elf32_bfd_link_hash_table_create
14254#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14255#undef elf_backend_special_sections
14256#define elf_backend_special_sections elf32_arm_symbian_special_sections
14257#undef elf_backend_begin_write_processing
14258#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14259#undef elf_backend_final_write_processing
14260#define elf_backend_final_write_processing elf32_arm_final_write_processing
14261
14262#undef elf_backend_modify_segment_map
7f266840
DJ		 14263#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14264
14265/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14266#undef elf_backend_got_header_size
7f266840
DJ		 14267#define elf_backend_got_header_size 0
14268
14269/* Similarly, there is no .got.plt section. */
906e58ca 14270#undef elf_backend_want_got_plt
7f266840
DJ		 14271#define elf_backend_want_got_plt 0
14272
906e58ca 14273#undef elf_backend_plt_sym_val
95720a86
DJ		 14274#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14275
906e58ca 14276#undef elf_backend_may_use_rel_p
00a97672 14277#define elf_backend_may_use_rel_p 1
906e58ca 14278#undef elf_backend_may_use_rela_p
00a97672 14279#define elf_backend_may_use_rela_p 0
906e58ca 14280#undef elf_backend_default_use_rela_p
00a97672 14281#define elf_backend_default_use_rela_p 0
906e58ca 14282#undef elf_backend_want_plt_sym
00a97672 14283#define elf_backend_want_plt_sym 0
906e58ca 14284#undef ELF_MAXPAGESIZE
00a97672 14285#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14286
7f266840 14287#include "elf32-target.h"
GDB Binutils - Deliverables
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