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PR ld/12066
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
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252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
f6ebfac0 3 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840
DJ		 263
264 HOWTO (R_ARM_SWI24, /* type */
265 0, /* rightshift */
266 0, /* size (0 = byte, 1 = short, 2 = long) */
267 0, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_signed,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_SWI24", /* name */
273 FALSE, /* partial_inplace */
274 0x00000000, /* src_mask */
275 0x00000000, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
8029a119 1355 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1356 EMPTY_HOWTO (91),
1357 EMPTY_HOWTO (92),
1358 EMPTY_HOWTO (93),
1359
1360 HOWTO (R_ARM_PLT32_ABS, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_dont,/* complain_on_overflow */
1367 bfd_elf_generic_reloc, /* special_function */
1368 "R_ARM_PLT32_ABS", /* name */
1369 FALSE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_GOT_ABS, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 32, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_GOT_ABS", /* name */
1383 FALSE, /* partial_inplace */
1384 0xffffffff, /* src_mask */
1385 0xffffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_GOT_PREL, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 32, /* bitsize */
1392 TRUE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont, /* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_GOT_PREL", /* name */
1397 FALSE, /* partial_inplace */
1398 0xffffffff, /* src_mask */
1399 0xffffffff, /* dst_mask */
1400 TRUE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_GOT_BREL12, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 12, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_bitfield,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_GOT_BREL12", /* name */
1411 FALSE, /* partial_inplace */
1412 0x00000fff, /* src_mask */
1413 0x00000fff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_GOTOFF12, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_bitfield,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_GOTOFF12", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1431
1432 /* GNU extension to record C++ vtable member usage */
1433 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1434 0, /* rightshift */
1435 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1436 0, /* bitsize */
ba93b8ac
DJ		 1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
c19d1205
ZW		 1439 complain_overflow_dont, /* complain_on_overflow */
1440 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1441 "R_ARM_GNU_VTENTRY", /* name */
1442 FALSE, /* partial_inplace */
1443 0, /* src_mask */
1444 0, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446
1447 /* GNU extension to record C++ vtable hierarchy */
1448 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1449 0, /* rightshift */
1450 2, /* size (0 = byte, 1 = short, 2 = long) */
1451 0, /* bitsize */
1452 FALSE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_dont, /* complain_on_overflow */
1455 NULL, /* special_function */
1456 "R_ARM_GNU_VTINHERIT", /* name */
1457 FALSE, /* partial_inplace */
1458 0, /* src_mask */
1459 0, /* dst_mask */
1460 FALSE), /* pcrel_offset */
1461
1462 HOWTO (R_ARM_THM_JUMP11, /* type */
1463 1, /* rightshift */
1464 1, /* size (0 = byte, 1 = short, 2 = long) */
1465 11, /* bitsize */
1466 TRUE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_signed, /* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_ARM_THM_JUMP11", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000007ff, /* src_mask */
1473 0x000007ff, /* dst_mask */
1474 TRUE), /* pcrel_offset */
1475
1476 HOWTO (R_ARM_THM_JUMP8, /* type */
1477 1, /* rightshift */
1478 1, /* size (0 = byte, 1 = short, 2 = long) */
1479 8, /* bitsize */
1480 TRUE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_signed, /* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_ARM_THM_JUMP8", /* name */
1485 FALSE, /* partial_inplace */
1486 0x000000ff, /* src_mask */
1487 0x000000ff, /* dst_mask */
1488 TRUE), /* pcrel_offset */
ba93b8ac 1489
c19d1205
ZW		 1490 /* TLS relocations */
1491 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 32, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1498 NULL, /* special_function */
1499 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1500 TRUE, /* partial_inplace */
1501 0xffffffff, /* src_mask */
1502 0xffffffff, /* dst_mask */
c19d1205 1503 FALSE), /* pcrel_offset */
ba93b8ac 1504
ba93b8ac
DJ		 1505 HOWTO (R_ARM_TLS_LDM32, /* type */
1506 0, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 32, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_bitfield,/* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 "R_ARM_TLS_LDM32", /* name */
1514 TRUE, /* partial_inplace */
1515 0xffffffff, /* src_mask */
1516 0xffffffff, /* dst_mask */
c19d1205 1517 FALSE), /* pcrel_offset */
ba93b8ac 1518
c19d1205 1519 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1520 0, /* rightshift */
1521 2, /* size (0 = byte, 1 = short, 2 = long) */
1522 32, /* bitsize */
1523 FALSE, /* pc_relative */
1524 0, /* bitpos */
1525 complain_overflow_bitfield,/* complain_on_overflow */
1526 bfd_elf_generic_reloc, /* special_function */
c19d1205 1527 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1528 TRUE, /* partial_inplace */
1529 0xffffffff, /* src_mask */
1530 0xffffffff, /* dst_mask */
c19d1205 1531 FALSE), /* pcrel_offset */
ba93b8ac 1532
ba93b8ac
DJ		 1533 HOWTO (R_ARM_TLS_IE32, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 32, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_bitfield,/* complain_on_overflow */
1540 NULL, /* special_function */
1541 "R_ARM_TLS_IE32", /* name */
1542 TRUE, /* partial_inplace */
1543 0xffffffff, /* src_mask */
1544 0xffffffff, /* dst_mask */
c19d1205 1545 FALSE), /* pcrel_offset */
7f266840 1546
c19d1205 1547 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1550 32, /* bitsize */
7f266840
DJ		 1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
c19d1205
ZW		 1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 bfd_elf_generic_reloc, /* special_function */
1555 "R_ARM_TLS_LE32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
7f266840 1560
c19d1205
ZW		 1561 HOWTO (R_ARM_TLS_LDO12, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 12, /* bitsize */
1565 FALSE, /* pc_relative */
7f266840 1566 0, /* bitpos */
c19d1205 1567 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1568 bfd_elf_generic_reloc, /* special_function */
c19d1205 1569 "R_ARM_TLS_LDO12", /* name */
7f266840 1570 FALSE, /* partial_inplace */
c19d1205
ZW		 1571 0x00000fff, /* src_mask */
1572 0x00000fff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
7f266840 1574
c19d1205
ZW		 1575 HOWTO (R_ARM_TLS_LE12, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 12, /* bitsize */
1579 FALSE, /* pc_relative */
7f266840 1580 0, /* bitpos */
c19d1205 1581 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1582 bfd_elf_generic_reloc, /* special_function */
c19d1205 1583 "R_ARM_TLS_LE12", /* name */
7f266840 1584 FALSE, /* partial_inplace */
c19d1205
ZW		 1585 0x00000fff, /* src_mask */
1586 0x00000fff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
7f266840 1588
c19d1205 1589 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1592 12, /* bitsize */
1593 FALSE, /* pc_relative */
7f266840 1594 0, /* bitpos */
c19d1205 1595 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1596 bfd_elf_generic_reloc, /* special_function */
c19d1205 1597 "R_ARM_TLS_IE12GP", /* name */
7f266840 1598 FALSE, /* partial_inplace */
c19d1205
ZW		 1599 0x00000fff, /* src_mask */
1600 0x00000fff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602};
1603
1604/* 112-127 private relocations
1605 128 R_ARM_ME_TOO, obsolete
1606 129-255 unallocated in AAELF.
7f266840 1607
c19d1205
ZW		 1608 249-255 extended, currently unused, relocations: */
1609
4962c51a 1610static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1611{
1612 HOWTO (R_ARM_RREL32, /* type */
1613 0, /* rightshift */
1614 0, /* size (0 = byte, 1 = short, 2 = long) */
1615 0, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_dont,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_RREL32", /* name */
1621 FALSE, /* partial_inplace */
1622 0, /* src_mask */
1623 0, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_RABS32, /* type */
1627 0, /* rightshift */
1628 0, /* size (0 = byte, 1 = short, 2 = long) */
1629 0, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_dont,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_RABS32", /* name */
1635 FALSE, /* partial_inplace */
1636 0, /* src_mask */
1637 0, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_RPC24, /* type */
1641 0, /* rightshift */
1642 0, /* size (0 = byte, 1 = short, 2 = long) */
1643 0, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_dont,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_RPC24", /* name */
1649 FALSE, /* partial_inplace */
1650 0, /* src_mask */
1651 0, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 HOWTO (R_ARM_RBASE, /* type */
1655 0, /* rightshift */
1656 0, /* size (0 = byte, 1 = short, 2 = long) */
1657 0, /* bitsize */
1658 FALSE, /* pc_relative */
1659 0, /* bitpos */
1660 complain_overflow_dont,/* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 "R_ARM_RBASE", /* name */
1663 FALSE, /* partial_inplace */
1664 0, /* src_mask */
1665 0, /* dst_mask */
1666 FALSE) /* pcrel_offset */
1667};
1668
1669static reloc_howto_type *
1670elf32_arm_howto_from_type (unsigned int r_type)
1671{
906e58ca 1672 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1673 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1674
c19d1205 1675 if (r_type >= R_ARM_RREL32
906e58ca 1676 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1677 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1678
c19d1205 1679 return NULL;
7f266840
DJ		 1680}
1681
1682static void
1683elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1684 Elf_Internal_Rela * elf_reloc)
1685{
1686 unsigned int r_type;
1687
1688 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1689 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1690}
1691
1692struct elf32_arm_reloc_map
1693 {
1694 bfd_reloc_code_real_type bfd_reloc_val;
1695 unsigned char elf_reloc_val;
1696 };
1697
1698/* All entries in this list must also be present in elf32_arm_howto_table. */
1699static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1700 {
1701 {BFD_RELOC_NONE, R_ARM_NONE},
1702 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1703 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1704 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1705 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1706 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1707 {BFD_RELOC_32, R_ARM_ABS32},
1708 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1709 {BFD_RELOC_8, R_ARM_ABS8},
1710 {BFD_RELOC_16, R_ARM_ABS16},
1711 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1712 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1713 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1719 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1720 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1721 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1722 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1723 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1724 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1726 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1727 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1728 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1729 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1730 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1731 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1732 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1733 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1734 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1735 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1736 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1737 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1738 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1739 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1740 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1741 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1742 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1743 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1744 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1745 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1746 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1747 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1749 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1750 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1751 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1753 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1754 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1755 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1756 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1757 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1758 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1759 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1760 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1761 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1762 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1763 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1764 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1765 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1767 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1768 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1769 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1770 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1771 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1772 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1773 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1774 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1775 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1776 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1777 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1778 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1779 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1780 };
1781
1782static reloc_howto_type *
f1c71a59
ZW		 1783elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1784 bfd_reloc_code_real_type code)
7f266840
DJ		 1785{
1786 unsigned int i;
8029a119 1787
906e58ca 1788 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1789 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1790 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1791
c19d1205 1792 return NULL;
7f266840
DJ		 1793}
1794
157090f7
AM		 1795static reloc_howto_type *
1796elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1797 const char *r_name)
1798{
1799 unsigned int i;
1800
906e58ca 1801 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1802 if (elf32_arm_howto_table_1[i].name != NULL
1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1804 return &elf32_arm_howto_table_1[i];
1805
906e58ca 1806 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1807 if (elf32_arm_howto_table_2[i].name != NULL
1808 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1809 return &elf32_arm_howto_table_2[i];
1810
1811 return NULL;
1812}
1813
906e58ca
NC		 1814/* Support for core dump NOTE sections. */
1815
7f266840 1816static bfd_boolean
f1c71a59 1817elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1818{
1819 int offset;
1820 size_t size;
1821
1822 switch (note->descsz)
1823 {
1824 default:
1825 return FALSE;
1826
8029a119 1827 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1828 /* pr_cursig */
1829 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1830
1831 /* pr_pid */
261b8d08 1832 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1833
1834 /* pr_reg */
1835 offset = 72;
1836 size = 72;
1837
1838 break;
1839 }
1840
1841 /* Make a ".reg/999" section. */
1842 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1843 size, note->descpos + offset);
1844}
1845
1846static bfd_boolean
f1c71a59 1847elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1848{
1849 switch (note->descsz)
1850 {
1851 default:
1852 return FALSE;
1853
8029a119 1854 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1855 elf_tdata (abfd)->core_program
1856 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1857 elf_tdata (abfd)->core_command
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1859 }
1860
1861 /* Note that for some reason, a spurious space is tacked
1862 onto the end of the args in some (at least one anyway)
1863 implementations, so strip it off if it exists. */
7f266840
DJ		 1864 {
1865 char *command = elf_tdata (abfd)->core_command;
1866 int n = strlen (command);
1867
1868 if (0 < n && command[n - 1] == ' ')
1869 command[n - 1] = '\0';
1870 }
1871
1872 return TRUE;
1873}
1874
1875#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1876#define TARGET_LITTLE_NAME "elf32-littlearm"
1877#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1878#define TARGET_BIG_NAME "elf32-bigarm"
1879
1880#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1881#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1882
252b5132
RH		 1883typedef unsigned long int insn32;
1884typedef unsigned short int insn16;
1885
3a4a14e9
PB		 1886/* In lieu of proper flags, assume all EABIv4 or later objects are
1887 interworkable. */
57e8b36a 1888#define INTERWORK_FLAG(abfd) \
3a4a14e9 1889 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1890 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1891 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1892
252b5132
RH		 1893/* The linker script knows the section names for placement.
1894 The entry_names are used to do simple name mangling on the stubs.
1895 Given a function name, and its type, the stub can be found. The
9b485d32 1896 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1897#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1898#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1899
1900#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1901#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1902
c7b8f16e
JB		 1903#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1904#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1905
845b51d6
PB		 1906#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1907#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1908
7413f23f
DJ		 1909#define STUB_ENTRY_NAME "__%s_veneer"
1910
252b5132
RH		 1911/* The name of the dynamic interpreter. This is put in the .interp
1912 section. */
1913#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1914
5e681ec4
PB		 1915#ifdef FOUR_WORD_PLT
1916
252b5132
RH		 1917/* The first entry in a procedure linkage table looks like
1918 this. It is set up so that any shared library function that is
59f2c4e7 1919 called before the relocation has been set up calls the dynamic
9b485d32 1920 linker first. */
e5a52504 1921static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1922 {
1923 0xe52de004, /* str lr, [sp, #-4]! */
1924 0xe59fe010, /* ldr lr, [pc, #16] */
1925 0xe08fe00e, /* add lr, pc, lr */
1926 0xe5bef008, /* ldr pc, [lr, #8]! */
1927 };
1928
1929/* Subsequent entries in a procedure linkage table look like
1930 this. */
e5a52504 1931static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1932 {
1933 0xe28fc600, /* add ip, pc, #NN */
1934 0xe28cca00, /* add ip, ip, #NN */
1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1936 0x00000000, /* unused */
1937 };
1938
1939#else
1940
5e681ec4
PB		 1941/* The first entry in a procedure linkage table looks like
1942 this. It is set up so that any shared library function that is
1943 called before the relocation has been set up calls the dynamic
1944 linker first. */
e5a52504 1945static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1946 {
5e681ec4
PB		 1947 0xe52de004, /* str lr, [sp, #-4]! */
1948 0xe59fe004, /* ldr lr, [pc, #4] */
1949 0xe08fe00e, /* add lr, pc, lr */
1950 0xe5bef008, /* ldr pc, [lr, #8]! */
1951 0x00000000, /* &GOT[0] - . */
917583ad 1952 };
252b5132
RH		 1953
1954/* Subsequent entries in a procedure linkage table look like
1955 this. */
e5a52504 1956static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1957 {
1958 0xe28fc600, /* add ip, pc, #0xNN00000 */
1959 0xe28cca00, /* add ip, ip, #0xNN000 */
1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1961 };
1962
1963#endif
252b5132 1964
00a97672
RS		 1965/* The format of the first entry in the procedure linkage table
1966 for a VxWorks executable. */
1967static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1968 {
1969 0xe52dc008, /* str ip,[sp,#-8]! */
1970 0xe59fc000, /* ldr ip,[pc] */
1971 0xe59cf008, /* ldr pc,[ip,#8] */
1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1973 };
1974
1975/* The format of subsequent entries in a VxWorks executable. */
1976static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1977 {
1978 0xe59fc000, /* ldr ip,[pc] */
1979 0xe59cf000, /* ldr pc,[ip] */
1980 0x00000000, /* .long @got */
1981 0xe59fc000, /* ldr ip,[pc] */
1982 0xea000000, /* b _PLT */
1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1984 };
1985
1986/* The format of entries in a VxWorks shared library. */
1987static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1988 {
1989 0xe59fc000, /* ldr ip,[pc] */
1990 0xe79cf009, /* ldr pc,[ip,r9] */
1991 0x00000000, /* .long @got */
1992 0xe59fc000, /* ldr ip,[pc] */
1993 0xe599f008, /* ldr pc,[r9,#8] */
1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1995 };
1996
b7693d02
DJ		 1997/* An initial stub used if the PLT entry is referenced from Thumb code. */
1998#define PLT_THUMB_STUB_SIZE 4
1999static const bfd_vma elf32_arm_plt_thumb_stub [] =
2000 {
2001 0x4778, /* bx pc */
2002 0x46c0 /* nop */
2003 };
2004
e5a52504
MM		 2005/* The entries in a PLT when using a DLL-based target with multiple
2006 address spaces. */
906e58ca 2007static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2008 {
83a358aa 2009 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2011 };
2012
906e58ca
NC		 2013#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2014#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2015#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2016#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2017#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2018#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2019
461a49ca
DJ		 2020enum stub_insn_type
2021 {
2022 THUMB16_TYPE = 1,
2023 THUMB32_TYPE,
2024 ARM_TYPE,
2025 DATA_TYPE
2026 };
2027
48229727
JB		 2028#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2029/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2030 is inserted in arm_build_one_stub(). */
2031#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2032#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2033#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2034#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2035#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2036#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2037
2038typedef struct
2039{
2040 bfd_vma data;
2041 enum stub_insn_type type;
ebe24dd4 2042 unsigned int r_type;
461a49ca
DJ		 2043 int reloc_addend;
2044} insn_sequence;
2045
fea2b4d6
CL		 2046/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2047 to reach the stub if necessary. */
461a49ca 2048static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2049 {
461a49ca
DJ		 2050 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2051 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2052 };
2053
fea2b4d6
CL		 2054/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2055 available. */
461a49ca 2056static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2057 {
461a49ca
DJ		 2058 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2059 ARM_INSN(0xe12fff1c), /* bx ip */
2060 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2061 };
2062
d3626fb0 2063/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2064static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2065 {
461a49ca
DJ		 2066 THUMB16_INSN(0xb401), /* push {r0} */
2067 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2068 THUMB16_INSN(0x4684), /* mov ip, r0 */
2069 THUMB16_INSN(0xbc01), /* pop {r0} */
2070 THUMB16_INSN(0x4760), /* bx ip */
2071 THUMB16_INSN(0xbf00), /* nop */
2072 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2073 };
2074
d3626fb0
CL		 2075/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2076 allowed. */
2077static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2078 {
2079 THUMB16_INSN(0x4778), /* bx pc */
2080 THUMB16_INSN(0x46c0), /* nop */
2081 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2082 ARM_INSN(0xe12fff1c), /* bx ip */
2083 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2084 };
2085
fea2b4d6
CL		 2086/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2087 available. */
461a49ca 2088static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2089 {
461a49ca
DJ		 2090 THUMB16_INSN(0x4778), /* bx pc */
2091 THUMB16_INSN(0x46c0), /* nop */
2092 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2093 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2094 };
2095
fea2b4d6
CL		 2096/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2097 one, when the destination is close enough. */
461a49ca 2098static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2099 {
461a49ca
DJ		 2100 THUMB16_INSN(0x4778), /* bx pc */
2101 THUMB16_INSN(0x46c0), /* nop */
2102 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2103 };
2104
cf3eccff 2105/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2106 blx to reach the stub if necessary. */
cf3eccff 2107static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2108 {
461a49ca
DJ		 2109 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2110 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2111 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2112 };
2113
cf3eccff
DJ		 2114/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2115 blx to reach the stub if necessary. We can not add into pc;
2116 it is not guaranteed to mode switch (different in ARMv6 and
2117 ARMv7). */
2118static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2119 {
2120 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2121 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2122 ARM_INSN(0xe12fff1c), /* bx ip */
2123 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2124 };
2125
ebe24dd4
CL		 2126/* V4T ARM -> ARM long branch stub, PIC. */
2127static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2128 {
2129 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2130 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2131 ARM_INSN(0xe12fff1c), /* bx ip */
2132 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2133 };
2134
2135/* V4T Thumb -> ARM long branch stub, PIC. */
2136static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2137 {
2138 THUMB16_INSN(0x4778), /* bx pc */
2139 THUMB16_INSN(0x46c0), /* nop */
2140 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2141 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2142 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2143 };
2144
d3626fb0
CL		 2145/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2146 architectures. */
ebe24dd4
CL		 2147static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2148 {
2149 THUMB16_INSN(0xb401), /* push {r0} */
2150 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2151 THUMB16_INSN(0x46fc), /* mov ip, pc */
2152 THUMB16_INSN(0x4484), /* add ip, r0 */
2153 THUMB16_INSN(0xbc01), /* pop {r0} */
2154 THUMB16_INSN(0x4760), /* bx ip */
2155 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2156 };
2157
d3626fb0
CL		 2158/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2159 allowed. */
2160static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2161 {
2162 THUMB16_INSN(0x4778), /* bx pc */
2163 THUMB16_INSN(0x46c0), /* nop */
2164 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2165 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2166 ARM_INSN(0xe12fff1c), /* bx ip */
2167 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2168 };
2169
48229727
JB		 2170/* Cortex-A8 erratum-workaround stubs. */
2171
2172/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2173 can't use a conditional branch to reach this stub). */
2174
2175static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2176 {
2177 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2178 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2179 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2180 };
2181
2182/* Stub used for b.w and bl.w instructions. */
2183
2184static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2185 {
2186 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2187 };
2188
2189static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2190 {
2191 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2192 };
2193
2194/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2195 instruction (which switches to ARM mode) to point to this stub. Jump to the
2196 real destination using an ARM-mode branch. */
2197
2198static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2199 {
2200 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2201 };
2202
906e58ca
NC		 2203/* Section name for stubs is the associated section name plus this
2204 string. */
2205#define STUB_SUFFIX ".stub"
2206
738a79f6
CL		 2207/* One entry per long/short branch stub defined above. */
2208#define DEF_STUBS \
2209 DEF_STUB(long_branch_any_any) \
2210 DEF_STUB(long_branch_v4t_arm_thumb) \
2211 DEF_STUB(long_branch_thumb_only) \
2212 DEF_STUB(long_branch_v4t_thumb_thumb) \
2213 DEF_STUB(long_branch_v4t_thumb_arm) \
2214 DEF_STUB(short_branch_v4t_thumb_arm) \
2215 DEF_STUB(long_branch_any_arm_pic) \
2216 DEF_STUB(long_branch_any_thumb_pic) \
2217 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2220 DEF_STUB(long_branch_thumb_only_pic) \
2221 DEF_STUB(a8_veneer_b_cond) \
2222 DEF_STUB(a8_veneer_b) \
2223 DEF_STUB(a8_veneer_bl) \
2224 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2225
2226#define DEF_STUB(x) arm_stub_##x,
2227enum elf32_arm_stub_type {
906e58ca 2228 arm_stub_none,
738a79f6 2229 DEF_STUBS
eb7c4339
NS		 2230 /* Note the first a8_veneer type */
2231 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2232};
2233#undef DEF_STUB
2234
2235typedef struct
2236{
d3ce72d0 2237 const insn_sequence* template_sequence;
738a79f6
CL		 2238 int template_size;
2239} stub_def;
2240
2241#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2242static const stub_def stub_definitions[] = {
2243 {NULL, 0},
2244 DEF_STUBS
906e58ca
NC		 2245};
2246
2247struct elf32_arm_stub_hash_entry
2248{
2249 /* Base hash table entry structure. */
2250 struct bfd_hash_entry root;
2251
2252 /* The stub section. */
2253 asection *stub_sec;
2254
2255 /* Offset within stub_sec of the beginning of this stub. */
2256 bfd_vma stub_offset;
2257
2258 /* Given the symbol's value and its section we can determine its final
2259 value when building the stubs (so the stub knows where to jump). */
2260 bfd_vma target_value;
2261 asection *target_section;
2262
48229727
JB		 2263 /* Offset to apply to relocation referencing target_value. */
2264 bfd_vma target_addend;
2265
2266 /* The instruction which caused this stub to be generated (only valid for
2267 Cortex-A8 erratum workaround stubs at present). */
2268 unsigned long orig_insn;
2269
461a49ca 2270 /* The stub type. */
906e58ca 2271 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2272 /* Its encoding size in bytes. */
2273 int stub_size;
2274 /* Its template. */
2275 const insn_sequence *stub_template;
2276 /* The size of the template (number of entries). */
2277 int stub_template_size;
906e58ca
NC		 2278
2279 /* The symbol table entry, if any, that this was derived from. */
2280 struct elf32_arm_link_hash_entry *h;
2281
2282 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2283 unsigned char st_type;
2284
2285 /* Where this stub is being called from, or, in the case of combined
2286 stub sections, the first input section in the group. */
2287 asection *id_sec;
7413f23f
DJ		 2288
2289 /* The name for the local symbol at the start of this stub. The
2290 stub name in the hash table has to be unique; this does not, so
2291 it can be friendlier. */
2292 char *output_name;
906e58ca
NC		 2293};
2294
e489d0ae
PB		 2295/* Used to build a map of a section. This is required for mixed-endian
2296 code/data. */
2297
2298typedef struct elf32_elf_section_map
2299{
2300 bfd_vma vma;
2301 char type;
2302}
2303elf32_arm_section_map;
2304
c7b8f16e
JB		 2305/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2306
2307typedef enum
2308{
2309 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2310 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2311 VFP11_ERRATUM_ARM_VENEER,
2312 VFP11_ERRATUM_THUMB_VENEER
2313}
2314elf32_vfp11_erratum_type;
2315
2316typedef struct elf32_vfp11_erratum_list
2317{
2318 struct elf32_vfp11_erratum_list *next;
2319 bfd_vma vma;
2320 union
2321 {
2322 struct
2323 {
2324 struct elf32_vfp11_erratum_list *veneer;
2325 unsigned int vfp_insn;
2326 } b;
2327 struct
2328 {
2329 struct elf32_vfp11_erratum_list *branch;
2330 unsigned int id;
2331 } v;
2332 } u;
2333 elf32_vfp11_erratum_type type;
2334}
2335elf32_vfp11_erratum_list;
2336
2468f9c9
PB		 2337typedef enum
2338{
2339 DELETE_EXIDX_ENTRY,
2340 INSERT_EXIDX_CANTUNWIND_AT_END
2341}
2342arm_unwind_edit_type;
2343
2344/* A (sorted) list of edits to apply to an unwind table. */
2345typedef struct arm_unwind_table_edit
2346{
2347 arm_unwind_edit_type type;
2348 /* Note: we sometimes want to insert an unwind entry corresponding to a
2349 section different from the one we're currently writing out, so record the
2350 (text) section this edit relates to here. */
2351 asection *linked_section;
2352 unsigned int index;
2353 struct arm_unwind_table_edit *next;
2354}
2355arm_unwind_table_edit;
2356
8e3de13a 2357typedef struct _arm_elf_section_data
e489d0ae 2358{
2468f9c9 2359 /* Information about mapping symbols. */
e489d0ae 2360 struct bfd_elf_section_data elf;
8e3de13a 2361 unsigned int mapcount;
c7b8f16e 2362 unsigned int mapsize;
e489d0ae 2363 elf32_arm_section_map *map;
2468f9c9 2364 /* Information about CPU errata. */
c7b8f16e
JB		 2365 unsigned int erratumcount;
2366 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2367 /* Information about unwind tables. */
2368 union
2369 {
2370 /* Unwind info attached to a text section. */
2371 struct
2372 {
2373 asection *arm_exidx_sec;
2374 } text;
2375
2376 /* Unwind info attached to an .ARM.exidx section. */
2377 struct
2378 {
2379 arm_unwind_table_edit *unwind_edit_list;
2380 arm_unwind_table_edit *unwind_edit_tail;
2381 } exidx;
2382 } u;
8e3de13a
NC		 2383}
2384_arm_elf_section_data;
e489d0ae
PB		 2385
2386#define elf32_arm_section_data(sec) \
8e3de13a 2387 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2388
48229727
JB		 2389/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2390 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2391 so may be created multiple times: we use an array of these entries whilst
2392 relaxing which we can refresh easily, then create stubs for each potentially
2393 erratum-triggering instruction once we've settled on a solution. */
2394
2395struct a8_erratum_fix {
2396 bfd *input_bfd;
2397 asection *section;
2398 bfd_vma offset;
2399 bfd_vma addend;
2400 unsigned long orig_insn;
2401 char *stub_name;
2402 enum elf32_arm_stub_type stub_type;
fe33d2fa 2403 int st_type;
48229727
JB		 2404};
2405
2406/* A table of relocs applied to branches which might trigger Cortex-A8
2407 erratum. */
2408
2409struct a8_erratum_reloc {
2410 bfd_vma from;
2411 bfd_vma destination;
92750f34
DJ		 2412 struct elf32_arm_link_hash_entry *hash;
2413 const char *sym_name;
48229727
JB		 2414 unsigned int r_type;
2415 unsigned char st_type;
48229727
JB		 2416 bfd_boolean non_a8_stub;
2417};
2418
ba93b8ac
DJ		 2419/* The size of the thread control block. */
2420#define TCB_SIZE 8
2421
0ffa91dd 2422struct elf_arm_obj_tdata
ba93b8ac
DJ		 2423{
2424 struct elf_obj_tdata root;
2425
2426 /* tls_type for each local got entry. */
2427 char *local_got_tls_type;
ee065d83 2428
bf21ed78
MS		 2429 /* Zero to warn when linking objects with incompatible enum sizes. */
2430 int no_enum_size_warning;
a9dc9481
JM		 2431
2432 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2433 int no_wchar_size_warning;
ba93b8ac
DJ		 2434};
2435
0ffa91dd
NC		 2436#define elf_arm_tdata(bfd) \
2437 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2438
0ffa91dd
NC		 2439#define elf32_arm_local_got_tls_type(bfd) \
2440 (elf_arm_tdata (bfd)->local_got_tls_type)
2441
2442#define is_arm_elf(bfd) \
2443 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2444 && elf_tdata (bfd) != NULL \
4dfe6ac6 2445 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2446
2447static bfd_boolean
2448elf32_arm_mkobject (bfd *abfd)
2449{
0ffa91dd 2450 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2451 ARM_ELF_DATA);
ba93b8ac
DJ		 2452}
2453
252b5132
RH		 2454/* The ARM linker needs to keep track of the number of relocs that it
2455 decides to copy in check_relocs for each symbol. This is so that
2456 it can discard PC relative relocs if it doesn't need them when
2457 linking with -Bsymbolic. We store the information in a field
2458 extending the regular ELF linker hash table. */
2459
ba93b8ac
DJ		 2460/* This structure keeps track of the number of relocs we have copied
2461 for a given symbol. */
5e681ec4 2462struct elf32_arm_relocs_copied
917583ad
NC		 2463 {
2464 /* Next section. */
5e681ec4 2465 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2466 /* A section in dynobj. */
2467 asection * section;
2468 /* Number of relocs copied in this section. */
2469 bfd_size_type count;
ba93b8ac
DJ		 2470 /* Number of PC-relative relocs copied in this section. */
2471 bfd_size_type pc_count;
917583ad 2472 };
252b5132 2473
ba93b8ac
DJ		 2474#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2475
ba96a88f 2476/* Arm ELF linker hash entry. */
252b5132 2477struct elf32_arm_link_hash_entry
917583ad
NC		 2478 {
2479 struct elf_link_hash_entry root;
252b5132 2480
917583ad 2481 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2482 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2483
2484 /* We reference count Thumb references to a PLT entry separately,
2485 so that we can emit the Thumb trampoline only if needed. */
2486 bfd_signed_vma plt_thumb_refcount;
2487
bd97cb95
DJ		 2488 /* Some references from Thumb code may be eliminated by BL->BLX
2489 conversion, so record them separately. */
2490 bfd_signed_vma plt_maybe_thumb_refcount;
2491
b7693d02
DJ		 2492 /* Since PLT entries have variable size if the Thumb prologue is
2493 used, we need to record the index into .got.plt instead of
2494 recomputing it from the PLT offset. */
2495 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2496
2497#define GOT_UNKNOWN 0
2498#define GOT_NORMAL 1
2499#define GOT_TLS_GD 2
2500#define GOT_TLS_IE 4
2501 unsigned char tls_type;
a4fd1a8e
PB		 2502
2503 /* The symbol marking the real symbol location for exported thumb
2504 symbols with Arm stubs. */
2505 struct elf_link_hash_entry *export_glue;
906e58ca 2506
da5938a2 2507 /* A pointer to the most recently used stub hash entry against this
8029a119 2508 symbol. */
da5938a2 2509 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2510 };
252b5132 2511
252b5132 2512/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2513#define elf32_arm_link_hash_traverse(table, func, info) \
2514 (elf_link_hash_traverse \
2515 (&(table)->root, \
b7693d02 2516 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2517 (info)))
2518
2519/* Get the ARM elf linker hash table from a link_info structure. */
2520#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2521 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2522 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2523
906e58ca
NC		 2524#define arm_stub_hash_lookup(table, string, create, copy) \
2525 ((struct elf32_arm_stub_hash_entry *) \
2526 bfd_hash_lookup ((table), (string), (create), (copy)))
2527
21d799b5
NC		 2528/* Array to keep track of which stub sections have been created, and
2529 information on stub grouping. */
2530struct map_stub
2531{
2532 /* This is the section to which stubs in the group will be
2533 attached. */
2534 asection *link_sec;
2535 /* The stub section. */
2536 asection *stub_sec;
2537};
2538
9b485d32 2539/* ARM ELF linker hash table. */
252b5132 2540struct elf32_arm_link_hash_table
906e58ca
NC		 2541{
2542 /* The main hash table. */
2543 struct elf_link_hash_table root;
252b5132 2544
906e58ca
NC		 2545 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2546 bfd_size_type thumb_glue_size;
252b5132 2547
906e58ca
NC		 2548 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2549 bfd_size_type arm_glue_size;
252b5132 2550
906e58ca
NC		 2551 /* The size in bytes of section containing the ARMv4 BX veneers. */
2552 bfd_size_type bx_glue_size;
845b51d6 2553
906e58ca
NC		 2554 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2555 veneer has been populated. */
2556 bfd_vma bx_glue_offset[15];
845b51d6 2557
906e58ca
NC		 2558 /* The size in bytes of the section containing glue for VFP11 erratum
2559 veneers. */
2560 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2561
48229727
JB		 2562 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2563 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2564 elf32_arm_write_section(). */
2565 struct a8_erratum_fix *a8_erratum_fixes;
2566 unsigned int num_a8_erratum_fixes;
2567
906e58ca
NC		 2568 /* An arbitrary input BFD chosen to hold the glue sections. */
2569 bfd * bfd_of_glue_owner;
ba96a88f 2570
906e58ca
NC		 2571 /* Nonzero to output a BE8 image. */
2572 int byteswap_code;
e489d0ae 2573
906e58ca
NC		 2574 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2575 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2576 int target1_is_rel;
9c504268 2577
906e58ca
NC		 2578 /* The relocation to use for R_ARM_TARGET2 relocations. */
2579 int target2_reloc;
eb043451 2580
906e58ca
NC		 2581 /* 0 = Ignore R_ARM_V4BX.
2582 1 = Convert BX to MOV PC.
2583 2 = Generate v4 interworing stubs. */
2584 int fix_v4bx;
319850b4 2585
48229727
JB		 2586 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2587 int fix_cortex_a8;
2588
906e58ca
NC		 2589 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2590 int use_blx;
33bfe774 2591
906e58ca
NC		 2592 /* What sort of code sequences we should look for which may trigger the
2593 VFP11 denorm erratum. */
2594 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2595
906e58ca
NC		 2596 /* Global counter for the number of fixes we have emitted. */
2597 int num_vfp11_fixes;
c7b8f16e 2598
906e58ca
NC		 2599 /* Nonzero to force PIC branch veneers. */
2600 int pic_veneer;
27e55c4d 2601
906e58ca
NC		 2602 /* The number of bytes in the initial entry in the PLT. */
2603 bfd_size_type plt_header_size;
e5a52504 2604
906e58ca
NC		 2605 /* The number of bytes in the subsequent PLT etries. */
2606 bfd_size_type plt_entry_size;
e5a52504 2607
906e58ca
NC		 2608 /* True if the target system is VxWorks. */
2609 int vxworks_p;
00a97672 2610
906e58ca
NC		 2611 /* True if the target system is Symbian OS. */
2612 int symbian_p;
e5a52504 2613
906e58ca
NC		 2614 /* True if the target uses REL relocations. */
2615 int use_rel;
4e7fd91e 2616
906e58ca
NC		 2617 /* Short-cuts to get to dynamic linker sections. */
2618 asection *sgot;
2619 asection *sgotplt;
2620 asection *srelgot;
2621 asection *splt;
2622 asection *srelplt;
2623 asection *sdynbss;
2624 asection *srelbss;
5e681ec4 2625
906e58ca
NC		 2626 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2627 asection *srelplt2;
00a97672 2628
906e58ca
NC		 2629 /* Data for R_ARM_TLS_LDM32 relocations. */
2630 union
2631 {
2632 bfd_signed_vma refcount;
2633 bfd_vma offset;
2634 } tls_ldm_got;
b7693d02 2635
87d72d41
AM		 2636 /* Small local sym cache. */
2637 struct sym_cache sym_cache;
906e58ca
NC		 2638
2639 /* For convenience in allocate_dynrelocs. */
2640 bfd * obfd;
2641
2642 /* The stub hash table. */
2643 struct bfd_hash_table stub_hash_table;
2644
2645 /* Linker stub bfd. */
2646 bfd *stub_bfd;
2647
2648 /* Linker call-backs. */
2649 asection * (*add_stub_section) (const char *, asection *);
2650 void (*layout_sections_again) (void);
2651
2652 /* Array to keep track of which stub sections have been created, and
2653 information on stub grouping. */
21d799b5 2654 struct map_stub *stub_group;
906e58ca 2655
fe33d2fa
CL		 2656 /* Number of elements in stub_group. */
2657 int top_id;
2658
906e58ca
NC		 2659 /* Assorted information used by elf32_arm_size_stubs. */
2660 unsigned int bfd_count;
2661 int top_index;
2662 asection **input_list;
2663};
252b5132 2664
780a67af
NC		 2665/* Create an entry in an ARM ELF linker hash table. */
2666
2667static struct bfd_hash_entry *
57e8b36a
NC		 2668elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2669 struct bfd_hash_table * table,
2670 const char * string)
780a67af
NC		 2671{
2672 struct elf32_arm_link_hash_entry * ret =
2673 (struct elf32_arm_link_hash_entry *) entry;
2674
2675 /* Allocate the structure if it has not already been allocated by a
2676 subclass. */
906e58ca 2677 if (ret == NULL)
21d799b5
NC		 2678 ret = (struct elf32_arm_link_hash_entry *)
2679 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2680 if (ret == NULL)
780a67af
NC		 2681 return (struct bfd_hash_entry *) ret;
2682
2683 /* Call the allocation method of the superclass. */
2684 ret = ((struct elf32_arm_link_hash_entry *)
2685 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2686 table, string));
57e8b36a 2687 if (ret != NULL)
b7693d02
DJ		 2688 {
2689 ret->relocs_copied = NULL;
ba93b8ac 2690 ret->tls_type = GOT_UNKNOWN;
b7693d02 2691 ret->plt_thumb_refcount = 0;
bd97cb95 2692 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2693 ret->plt_got_offset = -1;
a4fd1a8e 2694 ret->export_glue = NULL;
906e58ca
NC		 2695
2696 ret->stub_cache = NULL;
b7693d02 2697 }
780a67af
NC		 2698
2699 return (struct bfd_hash_entry *) ret;
2700}
2701
906e58ca
NC		 2702/* Initialize an entry in the stub hash table. */
2703
2704static struct bfd_hash_entry *
2705stub_hash_newfunc (struct bfd_hash_entry *entry,
2706 struct bfd_hash_table *table,
2707 const char *string)
2708{
2709 /* Allocate the structure if it has not already been allocated by a
2710 subclass. */
2711 if (entry == NULL)
2712 {
21d799b5
NC		 2713 entry = (struct bfd_hash_entry *)
2714 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 2715 if (entry == NULL)
2716 return entry;
2717 }
2718
2719 /* Call the allocation method of the superclass. */
2720 entry = bfd_hash_newfunc (entry, table, string);
2721 if (entry != NULL)
2722 {
2723 struct elf32_arm_stub_hash_entry *eh;
2724
2725 /* Initialize the local fields. */
2726 eh = (struct elf32_arm_stub_hash_entry *) entry;
2727 eh->stub_sec = NULL;
2728 eh->stub_offset = 0;
2729 eh->target_value = 0;
2730 eh->target_section = NULL;
cedfb179
DK		 2731 eh->target_addend = 0;
2732 eh->orig_insn = 0;
906e58ca 2733 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2734 eh->stub_size = 0;
2735 eh->stub_template = NULL;
2736 eh->stub_template_size = 0;
906e58ca
NC		 2737 eh->h = NULL;
2738 eh->id_sec = NULL;
d8d2f433 2739 eh->output_name = NULL;
906e58ca
NC		 2740 }
2741
2742 return entry;
2743}
2744
00a97672 2745/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2746 shortcuts to them in our hash table. */
2747
2748static bfd_boolean
57e8b36a 2749create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2750{
2751 struct elf32_arm_link_hash_table *htab;
2752
e5a52504 2753 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2754 if (htab == NULL)
2755 return FALSE;
2756
e5a52504
MM		 2757 /* BPABI objects never have a GOT, or associated sections. */
2758 if (htab->symbian_p)
2759 return TRUE;
2760
5e681ec4
PB		 2761 if (! _bfd_elf_create_got_section (dynobj, info))
2762 return FALSE;
2763
5e681ec4
PB		 2764 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2765 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2766 if (!htab->sgot || !htab->sgotplt)
2767 abort ();
2768
64e77c6d
L		 2769 htab->srelgot = bfd_get_section_by_name (dynobj,
2770 RELOC_SECTION (htab, ".got"));
2771 if (htab->srelgot == NULL)
5e681ec4
PB		 2772 return FALSE;
2773 return TRUE;
2774}
2775
00a97672
RS		 2776/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2777 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2778 hash table. */
2779
2780static bfd_boolean
57e8b36a 2781elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2782{
2783 struct elf32_arm_link_hash_table *htab;
2784
2785 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2786 if (htab == NULL)
2787 return FALSE;
2788
5e681ec4
PB		 2789 if (!htab->sgot && !create_got_section (dynobj, info))
2790 return FALSE;
2791
2792 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2793 return FALSE;
2794
2795 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2796 htab->srelplt = bfd_get_section_by_name (dynobj,
2797 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2798 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2799 if (!info->shared)
00a97672
RS		 2800 htab->srelbss = bfd_get_section_by_name (dynobj,
2801 RELOC_SECTION (htab, ".bss"));
2802
2803 if (htab->vxworks_p)
2804 {
2805 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2806 return FALSE;
2807
2808 if (info->shared)
2809 {
2810 htab->plt_header_size = 0;
2811 htab->plt_entry_size
2812 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2813 }
2814 else
2815 {
2816 htab->plt_header_size
2817 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2818 htab->plt_entry_size
2819 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2820 }
2821 }
5e681ec4 2822
906e58ca 2823 if (!htab->splt
e5a52504
MM		 2824 || !htab->srelplt
2825 || !htab->sdynbss
5e681ec4
PB		 2826 || (!info->shared && !htab->srelbss))
2827 abort ();
2828
2829 return TRUE;
2830}
2831
906e58ca
NC		 2832/* Copy the extra info we tack onto an elf_link_hash_entry. */
2833
2834static void
2835elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2836 struct elf_link_hash_entry *dir,
2837 struct elf_link_hash_entry *ind)
2838{
2839 struct elf32_arm_link_hash_entry *edir, *eind;
2840
2841 edir = (struct elf32_arm_link_hash_entry *) dir;
2842 eind = (struct elf32_arm_link_hash_entry *) ind;
2843
2844 if (eind->relocs_copied != NULL)
2845 {
2846 if (edir->relocs_copied != NULL)
2847 {
2848 struct elf32_arm_relocs_copied **pp;
2849 struct elf32_arm_relocs_copied *p;
2850
2851 /* Add reloc counts against the indirect sym to the direct sym
2852 list. Merge any entries against the same section. */
2853 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2854 {
2855 struct elf32_arm_relocs_copied *q;
2856
2857 for (q = edir->relocs_copied; q != NULL; q = q->next)
2858 if (q->section == p->section)
2859 {
2860 q->pc_count += p->pc_count;
2861 q->count += p->count;
2862 *pp = p->next;
2863 break;
2864 }
2865 if (q == NULL)
2866 pp = &p->next;
2867 }
2868 *pp = edir->relocs_copied;
2869 }
2870
2871 edir->relocs_copied = eind->relocs_copied;
2872 eind->relocs_copied = NULL;
2873 }
2874
2875 if (ind->root.type == bfd_link_hash_indirect)
2876 {
2877 /* Copy over PLT info. */
2878 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2879 eind->plt_thumb_refcount = 0;
2880 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2881 eind->plt_maybe_thumb_refcount = 0;
2882
2883 if (dir->got.refcount <= 0)
2884 {
2885 edir->tls_type = eind->tls_type;
2886 eind->tls_type = GOT_UNKNOWN;
2887 }
2888 }
2889
2890 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2891}
2892
2893/* Create an ARM elf linker hash table. */
2894
2895static struct bfd_link_hash_table *
2896elf32_arm_link_hash_table_create (bfd *abfd)
2897{
2898 struct elf32_arm_link_hash_table *ret;
2899 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2900
21d799b5 2901 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 2902 if (ret == NULL)
2903 return NULL;
2904
2905 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2906 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 2907 sizeof (struct elf32_arm_link_hash_entry),
2908 ARM_ELF_DATA))
906e58ca
NC		 2909 {
2910 free (ret);
2911 return NULL;
2912 }
2913
2914 ret->sgot = NULL;
2915 ret->sgotplt = NULL;
2916 ret->srelgot = NULL;
2917 ret->splt = NULL;
2918 ret->srelplt = NULL;
2919 ret->sdynbss = NULL;
2920 ret->srelbss = NULL;
2921 ret->srelplt2 = NULL;
2922 ret->thumb_glue_size = 0;
2923 ret->arm_glue_size = 0;
2924 ret->bx_glue_size = 0;
2925 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2926 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2927 ret->vfp11_erratum_glue_size = 0;
2928 ret->num_vfp11_fixes = 0;
48229727 2929 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2930 ret->bfd_of_glue_owner = NULL;
2931 ret->byteswap_code = 0;
2932 ret->target1_is_rel = 0;
2933 ret->target2_reloc = R_ARM_NONE;
2934#ifdef FOUR_WORD_PLT
2935 ret->plt_header_size = 16;
2936 ret->plt_entry_size = 16;
2937#else
2938 ret->plt_header_size = 20;
2939 ret->plt_entry_size = 12;
2940#endif
2941 ret->fix_v4bx = 0;
2942 ret->use_blx = 0;
2943 ret->vxworks_p = 0;
2944 ret->symbian_p = 0;
2945 ret->use_rel = 1;
87d72d41 2946 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2947 ret->obfd = abfd;
2948 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2949 ret->stub_bfd = NULL;
2950 ret->add_stub_section = NULL;
2951 ret->layout_sections_again = NULL;
2952 ret->stub_group = NULL;
fe33d2fa 2953 ret->top_id = 0;
6cee0a6f
L		 2954 ret->bfd_count = 0;
2955 ret->top_index = 0;
2956 ret->input_list = NULL;
906e58ca
NC		 2957
2958 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2959 sizeof (struct elf32_arm_stub_hash_entry)))
2960 {
2961 free (ret);
2962 return NULL;
2963 }
2964
2965 return &ret->root.root;
2966}
2967
2968/* Free the derived linker hash table. */
2969
2970static void
2971elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2972{
2973 struct elf32_arm_link_hash_table *ret
2974 = (struct elf32_arm_link_hash_table *) hash;
2975
2976 bfd_hash_table_free (&ret->stub_hash_table);
2977 _bfd_generic_link_hash_table_free (hash);
2978}
2979
2980/* Determine if we're dealing with a Thumb only architecture. */
2981
2982static bfd_boolean
2983using_thumb_only (struct elf32_arm_link_hash_table *globals)
2984{
2985 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2986 Tag_CPU_arch);
2987 int profile;
2988
41ed1ee7
DJ		 2989 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
2990 return TRUE;
2991
9e3c6df6 2992 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 2993 return FALSE;
2994
2995 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2996 Tag_CPU_arch_profile);
2997
2998 return profile == 'M';
2999}
3000
3001/* Determine if we're dealing with a Thumb-2 object. */
3002
3003static bfd_boolean
3004using_thumb2 (struct elf32_arm_link_hash_table *globals)
3005{
3006 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3007 Tag_CPU_arch);
3008 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3009}
3010
cd1dac3d
DG		 3011/* Determine what kind of NOPs are available. */
3012
3013static bfd_boolean
3014arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3015{
3016 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3017 Tag_CPU_arch);
3018 return arch == TAG_CPU_ARCH_V6T2
3019 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3020 || arch == TAG_CPU_ARCH_V7
3021 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3022}
3023
3024static bfd_boolean
3025arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3026{
3027 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3028 Tag_CPU_arch);
9e3c6df6
PB		 3029 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3030 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3031}
3032
f4ac8484
DJ		 3033static bfd_boolean
3034arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3035{
3036 switch (stub_type)
3037 {
fea2b4d6
CL		 3038 case arm_stub_long_branch_thumb_only:
3039 case arm_stub_long_branch_v4t_thumb_arm:
3040 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 3041 case arm_stub_long_branch_v4t_thumb_arm_pic:
3042 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3043 return TRUE;
3044 case arm_stub_none:
3045 BFD_FAIL ();
3046 return FALSE;
3047 break;
3048 default:
3049 return FALSE;
3050 }
3051}
3052
906e58ca
NC		 3053/* Determine the type of stub needed, if any, for a call. */
3054
3055static enum elf32_arm_stub_type
3056arm_type_of_stub (struct bfd_link_info *info,
3057 asection *input_sec,
3058 const Elf_Internal_Rela *rel,
fe33d2fa 3059 int *actual_st_type,
906e58ca 3060 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3061 bfd_vma destination,
3062 asection *sym_sec,
3063 bfd *input_bfd,
3064 const char *name)
906e58ca
NC		 3065{
3066 bfd_vma location;
3067 bfd_signed_vma branch_offset;
3068 unsigned int r_type;
3069 struct elf32_arm_link_hash_table * globals;
3070 int thumb2;
3071 int thumb_only;
3072 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3073 int use_plt = 0;
fe33d2fa 3074 int st_type = *actual_st_type;
906e58ca 3075
da5938a2 3076 /* We don't know the actual type of destination in case it is of
8029a119 3077 type STT_SECTION: give up. */
da5938a2
NC		 3078 if (st_type == STT_SECTION)
3079 return stub_type;
3080
906e58ca 3081 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3082 if (globals == NULL)
3083 return stub_type;
906e58ca
NC		 3084
3085 thumb_only = using_thumb_only (globals);
3086
3087 thumb2 = using_thumb2 (globals);
3088
3089 /* Determine where the call point is. */
3090 location = (input_sec->output_offset
3091 + input_sec->output_section->vma
3092 + rel->r_offset);
3093
906e58ca
NC		 3094 r_type = ELF32_R_TYPE (rel->r_info);
3095
5fa9e92f 3096 /* Keep a simpler condition, for the sake of clarity. */
fe33d2fa
CL		 3097 if (globals->splt != NULL
3098 && hash != NULL
3099 && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3100 {
3101 use_plt = 1;
fe33d2fa 3102
5fa9e92f
CL		 3103 /* Note when dealing with PLT entries: the main PLT stub is in
3104 ARM mode, so if the branch is in Thumb mode, another
3105 Thumb->ARM stub will be inserted later just before the ARM
3106 PLT stub. We don't take this extra distance into account
3107 here, because if a long branch stub is needed, we'll add a
3108 Thumb->Arm one and branch directly to the ARM PLT entry
3109 because it avoids spreading offset corrections in several
3110 places. */
fe33d2fa
CL		 3111
3112 destination = (globals->splt->output_section->vma
3113 + globals->splt->output_offset
3114 + hash->root.plt.offset);
3115 st_type = STT_FUNC;
5fa9e92f 3116 }
906e58ca 3117
fe33d2fa
CL		 3118 branch_offset = (bfd_signed_vma)(destination - location);
3119
155d87d7 3120 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3121 {
5fa9e92f
CL		 3122 /* Handle cases where:
3123 - this call goes too far (different Thumb/Thumb2 max
3124 distance)
155d87d7
CL		 3125 - it's a Thumb->Arm call and blx is not available, or it's a
3126 Thumb->Arm branch (not bl). A stub is needed in this case,
3127 but only if this call is not through a PLT entry. Indeed,
3128 PLT stubs handle mode switching already.
5fa9e92f 3129 */
906e58ca
NC		 3130 if ((!thumb2
3131 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3132 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3133 || (thumb2
3134 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3135 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3136 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3137 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3138 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3139 && !use_plt))
906e58ca
NC		 3140 {
3141 if (st_type == STT_ARM_TFUNC)
3142 {
3143 /* Thumb to thumb. */
3144 if (!thumb_only)
3145 {
3146 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3147 /* PIC stubs. */
155d87d7
CL		 3148 ? ((globals->use_blx
3149 && (r_type ==R_ARM_THM_CALL))
3150 /* V5T and above. Stub starts with ARM code, so
3151 we must be able to switch mode before
3152 reaching it, which is only possible for 'bl'
3153 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3154 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3155 /* On V4T, use Thumb code only. */
d3626fb0 3156 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3157
3158 /* non-PIC stubs. */
155d87d7
CL		 3159 : ((globals->use_blx
3160 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3161 /* V5T and above. */
3162 ? arm_stub_long_branch_any_any
3163 /* V4T. */
d3626fb0 3164 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3165 }
3166 else
3167 {
3168 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3169 /* PIC stub. */
3170 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3171 /* non-PIC stub. */
3172 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3173 }
3174 }
3175 else
3176 {
3177 /* Thumb to arm. */
c820be07
NC		 3178 if (sym_sec != NULL
3179 && sym_sec->owner != NULL
3180 && !INTERWORK_FLAG (sym_sec->owner))
3181 {
3182 (*_bfd_error_handler)
3183 (_("%B(%s): warning: interworking not enabled.\n"
3184 " first occurrence: %B: Thumb call to ARM"),
3185 sym_sec->owner, input_bfd, name);
3186 }
3187
906e58ca 3188 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3189 /* PIC stubs. */
155d87d7
CL		 3190 ? ((globals->use_blx
3191 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3192 /* V5T and above. */
cf3eccff 3193 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3194 /* V4T PIC stub. */
3195 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3196
3197 /* non-PIC stubs. */
155d87d7
CL		 3198 : ((globals->use_blx
3199 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3200 /* V5T and above. */
3201 ? arm_stub_long_branch_any_any
3202 /* V4T. */
3203 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3204
3205 /* Handle v4t short branches. */
fea2b4d6 3206 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3207 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3208 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3209 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3210 }
3211 }
3212 }
fe33d2fa
CL		 3213 else if (r_type == R_ARM_CALL
3214 || r_type == R_ARM_JUMP24
3215 || r_type == R_ARM_PLT32)
906e58ca
NC		 3216 {
3217 if (st_type == STT_ARM_TFUNC)
3218 {
3219 /* Arm to thumb. */
c820be07
NC		 3220
3221 if (sym_sec != NULL
3222 && sym_sec->owner != NULL
3223 && !INTERWORK_FLAG (sym_sec->owner))
3224 {
3225 (*_bfd_error_handler)
3226 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3227 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3228 sym_sec->owner, input_bfd, name);
3229 }
3230
3231 /* We have an extra 2-bytes reach because of
3232 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3233 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3234 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3235 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3236 || (r_type == R_ARM_JUMP24)
3237 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3238 {
3239 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3240 /* PIC stubs. */
ebe24dd4
CL		 3241 ? ((globals->use_blx)
3242 /* V5T and above. */
3243 ? arm_stub_long_branch_any_thumb_pic
3244 /* V4T stub. */
3245 : arm_stub_long_branch_v4t_arm_thumb_pic)
3246
c2b4a39d
CL		 3247 /* non-PIC stubs. */
3248 : ((globals->use_blx)
3249 /* V5T and above. */
3250 ? arm_stub_long_branch_any_any
3251 /* V4T. */
3252 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3253 }
3254 }
3255 else
3256 {
3257 /* Arm to arm. */
3258 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3259 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3260 {
3261 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3262 /* PIC stubs. */
cf3eccff 3263 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3264 /* non-PIC stubs. */
fea2b4d6 3265 : arm_stub_long_branch_any_any;
906e58ca
NC		 3266 }
3267 }
3268 }
3269
fe33d2fa
CL		 3270 /* If a stub is needed, record the actual destination type. */
3271 if (stub_type != arm_stub_none)
3272 {
3273 *actual_st_type = st_type;
3274 }
3275
906e58ca
NC		 3276 return stub_type;
3277}
3278
3279/* Build a name for an entry in the stub hash table. */
3280
3281static char *
3282elf32_arm_stub_name (const asection *input_section,
3283 const asection *sym_sec,
3284 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3285 const Elf_Internal_Rela *rel,
3286 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3287{
3288 char *stub_name;
3289 bfd_size_type len;
3290
3291 if (hash)
3292 {
fe33d2fa 3293 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3294 stub_name = (char *) bfd_malloc (len);
906e58ca 3295 if (stub_name != NULL)
fe33d2fa 3296 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3297 input_section->id & 0xffffffff,
3298 hash->root.root.root.string,
fe33d2fa
CL		 3299 (int) rel->r_addend & 0xffffffff,
3300 (int) stub_type);
906e58ca
NC		 3301 }
3302 else
3303 {
fe33d2fa 3304 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3305 stub_name = (char *) bfd_malloc (len);
906e58ca 3306 if (stub_name != NULL)
fe33d2fa 3307 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3308 input_section->id & 0xffffffff,
3309 sym_sec->id & 0xffffffff,
3310 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3311 (int) rel->r_addend & 0xffffffff,
3312 (int) stub_type);
906e58ca
NC		 3313 }
3314
3315 return stub_name;
3316}
3317
3318/* Look up an entry in the stub hash. Stub entries are cached because
3319 creating the stub name takes a bit of time. */
3320
3321static struct elf32_arm_stub_hash_entry *
3322elf32_arm_get_stub_entry (const asection *input_section,
3323 const asection *sym_sec,
3324 struct elf_link_hash_entry *hash,
3325 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3326 struct elf32_arm_link_hash_table *htab,
3327 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3328{
3329 struct elf32_arm_stub_hash_entry *stub_entry;
3330 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3331 const asection *id_sec;
3332
3333 if ((input_section->flags & SEC_CODE) == 0)
3334 return NULL;
3335
3336 /* If this input section is part of a group of sections sharing one
3337 stub section, then use the id of the first section in the group.
3338 Stub names need to include a section id, as there may well be
3339 more than one stub used to reach say, printf, and we need to
3340 distinguish between them. */
3341 id_sec = htab->stub_group[input_section->id].link_sec;
3342
3343 if (h != NULL && h->stub_cache != NULL
3344 && h->stub_cache->h == h
fe33d2fa
CL		 3345 && h->stub_cache->id_sec == id_sec
3346 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3347 {
3348 stub_entry = h->stub_cache;
3349 }
3350 else
3351 {
3352 char *stub_name;
3353
fe33d2fa 3354 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3355 if (stub_name == NULL)
3356 return NULL;
3357
3358 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3359 stub_name, FALSE, FALSE);
3360 if (h != NULL)
3361 h->stub_cache = stub_entry;
3362
3363 free (stub_name);
3364 }
3365
3366 return stub_entry;
3367}
3368
48229727
JB		 3369/* Find or create a stub section. Returns a pointer to the stub section, and
3370 the section to which the stub section will be attached (in *LINK_SEC_P).
3371 LINK_SEC_P may be NULL. */
906e58ca 3372
48229727
JB		 3373static asection *
3374elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3375 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3376{
3377 asection *link_sec;
3378 asection *stub_sec;
906e58ca
NC		 3379
3380 link_sec = htab->stub_group[section->id].link_sec;
3381 stub_sec = htab->stub_group[section->id].stub_sec;
3382 if (stub_sec == NULL)
3383 {
3384 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3385 if (stub_sec == NULL)
3386 {
3387 size_t namelen;
3388 bfd_size_type len;
3389 char *s_name;
3390
3391 namelen = strlen (link_sec->name);
3392 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3393 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3394 if (s_name == NULL)
3395 return NULL;
3396
3397 memcpy (s_name, link_sec->name, namelen);
3398 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3399 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3400 if (stub_sec == NULL)
3401 return NULL;
3402 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3403 }
3404 htab->stub_group[section->id].stub_sec = stub_sec;
3405 }
48229727
JB		 3406
3407 if (link_sec_p)
3408 *link_sec_p = link_sec;
3409
3410 return stub_sec;
3411}
3412
3413/* Add a new stub entry to the stub hash. Not all fields of the new
3414 stub entry are initialised. */
3415
3416static struct elf32_arm_stub_hash_entry *
3417elf32_arm_add_stub (const char *stub_name,
3418 asection *section,
3419 struct elf32_arm_link_hash_table *htab)
3420{
3421 asection *link_sec;
3422 asection *stub_sec;
3423 struct elf32_arm_stub_hash_entry *stub_entry;
3424
3425 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3426 if (stub_sec == NULL)
3427 return NULL;
906e58ca
NC		 3428
3429 /* Enter this entry into the linker stub hash table. */
3430 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3431 TRUE, FALSE);
3432 if (stub_entry == NULL)
3433 {
3434 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3435 section->owner,
3436 stub_name);
3437 return NULL;
3438 }
3439
3440 stub_entry->stub_sec = stub_sec;
3441 stub_entry->stub_offset = 0;
3442 stub_entry->id_sec = link_sec;
3443
906e58ca
NC		 3444 return stub_entry;
3445}
3446
3447/* Store an Arm insn into an output section not processed by
3448 elf32_arm_write_section. */
3449
3450static void
8029a119
NC		 3451put_arm_insn (struct elf32_arm_link_hash_table * htab,
3452 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3453{
3454 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3455 bfd_putl32 (val, ptr);
3456 else
3457 bfd_putb32 (val, ptr);
3458}
3459
3460/* Store a 16-bit Thumb insn into an output section not processed by
3461 elf32_arm_write_section. */
3462
3463static void
8029a119
NC		 3464put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3465 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3466{
3467 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3468 bfd_putl16 (val, ptr);
3469 else
3470 bfd_putb16 (val, ptr);
3471}
3472
48229727
JB		 3473static bfd_reloc_status_type elf32_arm_final_link_relocate
3474 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3475 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3476 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3477
4563a860
JB		 3478static unsigned int
3479arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
3480{
3481 switch (stub_type)
3482 {
3483 case arm_stub_a8_veneer_b_cond:
3484 case arm_stub_a8_veneer_b:
3485 case arm_stub_a8_veneer_bl:
3486 return 2;
3487
3488 case arm_stub_long_branch_any_any:
3489 case arm_stub_long_branch_v4t_arm_thumb:
3490 case arm_stub_long_branch_thumb_only:
3491 case arm_stub_long_branch_v4t_thumb_thumb:
3492 case arm_stub_long_branch_v4t_thumb_arm:
3493 case arm_stub_short_branch_v4t_thumb_arm:
3494 case arm_stub_long_branch_any_arm_pic:
3495 case arm_stub_long_branch_any_thumb_pic:
3496 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3497 case arm_stub_long_branch_v4t_arm_thumb_pic:
3498 case arm_stub_long_branch_v4t_thumb_arm_pic:
3499 case arm_stub_long_branch_thumb_only_pic:
3500 case arm_stub_a8_veneer_blx:
3501 return 4;
3502
3503 default:
3504 abort (); /* Should be unreachable. */
3505 }
3506}
3507
906e58ca
NC		 3508static bfd_boolean
3509arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3510 void * in_arg)
3511{
48229727 3512#define MAXRELOCS 2
906e58ca 3513 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3514 struct elf32_arm_link_hash_table *globals;
906e58ca 3515 struct bfd_link_info *info;
906e58ca
NC		 3516 asection *stub_sec;
3517 bfd *stub_bfd;
906e58ca
NC		 3518 bfd_byte *loc;
3519 bfd_vma sym_value;
3520 int template_size;
3521 int size;
d3ce72d0 3522 const insn_sequence *template_sequence;
906e58ca 3523 int i;
48229727
JB		 3524 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3525 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3526 int nrelocs = 0;
906e58ca
NC		 3527
3528 /* Massage our args to the form they really have. */
3529 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3530 info = (struct bfd_link_info *) in_arg;
3531
3532 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3533 if (globals == NULL)
3534 return FALSE;
906e58ca 3535
906e58ca
NC		 3536 stub_sec = stub_entry->stub_sec;
3537
4dfe6ac6 3538 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 3539 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
3540 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 3541 return TRUE;
fe33d2fa 3542
906e58ca
NC		 3543 /* Make a note of the offset within the stubs for this entry. */
3544 stub_entry->stub_offset = stub_sec->size;
3545 loc = stub_sec->contents + stub_entry->stub_offset;
3546
3547 stub_bfd = stub_sec->owner;
3548
906e58ca
NC		 3549 /* This is the address of the stub destination. */
3550 sym_value = (stub_entry->target_value
3551 + stub_entry->target_section->output_offset
3552 + stub_entry->target_section->output_section->vma);
3553
d3ce72d0 3554 template_sequence = stub_entry->stub_template;
461a49ca 3555 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3556
3557 size = 0;
461a49ca 3558 for (i = 0; i < template_size; i++)
906e58ca 3559 {
d3ce72d0 3560 switch (template_sequence[i].type)
461a49ca
DJ		 3561 {
3562 case THUMB16_TYPE:
48229727 3563 {
d3ce72d0
NC		 3564 bfd_vma data = (bfd_vma) template_sequence[i].data;
3565 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 3566 {
3567 /* We've borrowed the reloc_addend field to mean we should
3568 insert a condition code into this (Thumb-1 branch)
3569 instruction. See THUMB16_BCOND_INSN. */
3570 BFD_ASSERT ((data & 0xff00) == 0xd000);
3571 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3572 }
fe33d2fa 3573 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 3574 size += 2;
3575 }
461a49ca 3576 break;
906e58ca 3577
48229727 3578 case THUMB32_TYPE:
fe33d2fa
CL		 3579 bfd_put_16 (stub_bfd,
3580 (template_sequence[i].data >> 16) & 0xffff,
3581 loc + size);
3582 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
3583 loc + size + 2);
d3ce72d0 3584 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 3585 {
3586 stub_reloc_idx[nrelocs] = i;
3587 stub_reloc_offset[nrelocs++] = size;
3588 }
3589 size += 4;
3590 break;
3591
461a49ca 3592 case ARM_TYPE:
fe33d2fa
CL		 3593 bfd_put_32 (stub_bfd, template_sequence[i].data,
3594 loc + size);
461a49ca
DJ		 3595 /* Handle cases where the target is encoded within the
3596 instruction. */
d3ce72d0 3597 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 3598 {
48229727
JB		 3599 stub_reloc_idx[nrelocs] = i;
3600 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3601 }
3602 size += 4;
3603 break;
3604
3605 case DATA_TYPE:
d3ce72d0 3606 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 3607 stub_reloc_idx[nrelocs] = i;
3608 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3609 size += 4;
3610 break;
3611
3612 default:
3613 BFD_FAIL ();
3614 return FALSE;
3615 }
906e58ca 3616 }
461a49ca 3617
906e58ca
NC		 3618 stub_sec->size += size;
3619
461a49ca
DJ		 3620 /* Stub size has already been computed in arm_size_one_stub. Check
3621 consistency. */
3622 BFD_ASSERT (size == stub_entry->stub_size);
3623
906e58ca
NC		 3624 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3625 if (stub_entry->st_type == STT_ARM_TFUNC)
3626 sym_value |= 1;
3627
48229727
JB		 3628 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3629 in each stub. */
3630 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3631
48229727 3632 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 3633 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3634 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3635 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3636 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 3637 {
3638 Elf_Internal_Rela rel;
3639 bfd_boolean unresolved_reloc;
3640 char *error_message;
3641 int sym_flags
d3ce72d0 3642 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
48229727
JB		 3643 ? STT_ARM_TFUNC : 0;
3644 bfd_vma points_to = sym_value + stub_entry->target_addend;
3645
3646 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 3647 rel.r_info = ELF32_R_INFO (0,
3648 template_sequence[stub_reloc_idx[i]].r_type);
3649 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 3650
3651 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3652 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3653 template should refer back to the instruction after the original
3654 branch. */
3655 points_to = sym_value;
3656
33c6a8fc
JB		 3657 /* There may be unintended consequences if this is not true. */
3658 BFD_ASSERT (stub_entry->h == NULL);
3659
48229727
JB		 3660 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3661 properly. We should probably use this function unconditionally,
3662 rather than only for certain relocations listed in the enclosing
3663 conditional, for the sake of consistency. */
3664 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3665 (template_sequence[stub_reloc_idx[i]].r_type),
48229727
JB		 3666 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3667 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3668 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3669 &error_message);
3670 }
3671 else
3672 {
fe33d2fa
CL		 3673 Elf_Internal_Rela rel;
3674 bfd_boolean unresolved_reloc;
3675 char *error_message;
3676 bfd_vma points_to = sym_value + stub_entry->target_addend
3677 + template_sequence[stub_reloc_idx[i]].reloc_addend;
3678
3679 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3680 rel.r_info = ELF32_R_INFO (0,
3681 template_sequence[stub_reloc_idx[i]].r_type);
3682 rel.r_addend = 0;
3683
3684 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3685 (template_sequence[stub_reloc_idx[i]].r_type),
3686 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3687 points_to, info, stub_entry->target_section, "", stub_entry->st_type,
3688 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3689 &error_message);
48229727 3690 }
906e58ca
NC		 3691
3692 return TRUE;
48229727 3693#undef MAXRELOCS
906e58ca
NC		 3694}
3695
48229727
JB		 3696/* Calculate the template, template size and instruction size for a stub.
3697 Return value is the instruction size. */
906e58ca 3698
48229727
JB		 3699static unsigned int
3700find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3701 const insn_sequence **stub_template,
3702 int *stub_template_size)
906e58ca 3703{
d3ce72d0 3704 const insn_sequence *template_sequence = NULL;
48229727
JB		 3705 int template_size = 0, i;
3706 unsigned int size;
906e58ca 3707
d3ce72d0 3708 template_sequence = stub_definitions[stub_type].template_sequence;
48229727 3709 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3710
3711 size = 0;
461a49ca
DJ		 3712 for (i = 0; i < template_size; i++)
3713 {
d3ce72d0 3714 switch (template_sequence[i].type)
461a49ca
DJ		 3715 {
3716 case THUMB16_TYPE:
3717 size += 2;
3718 break;
3719
3720 case ARM_TYPE:
48229727 3721 case THUMB32_TYPE:
461a49ca
DJ		 3722 case DATA_TYPE:
3723 size += 4;
3724 break;
3725
3726 default:
3727 BFD_FAIL ();
3728 return FALSE;
3729 }
3730 }
3731
48229727 3732 if (stub_template)
d3ce72d0 3733 *stub_template = template_sequence;
48229727
JB		 3734
3735 if (stub_template_size)
3736 *stub_template_size = template_size;
3737
3738 return size;
3739}
3740
3741/* As above, but don't actually build the stub. Just bump offset so
3742 we know stub section sizes. */
3743
3744static bfd_boolean
3745arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 3746 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 3747{
3748 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 3749 const insn_sequence *template_sequence;
48229727
JB		 3750 int template_size, size;
3751
3752 /* Massage our args to the form they really have. */
3753 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 3754
3755 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3756 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3757
d3ce72d0 3758 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 3759 &template_size);
3760
461a49ca 3761 stub_entry->stub_size = size;
d3ce72d0 3762 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 3763 stub_entry->stub_template_size = template_size;
3764
906e58ca
NC		 3765 size = (size + 7) & ~7;
3766 stub_entry->stub_sec->size += size;
461a49ca 3767
906e58ca
NC		 3768 return TRUE;
3769}
3770
3771/* External entry points for sizing and building linker stubs. */
3772
3773/* Set up various things so that we can make a list of input sections
3774 for each output section included in the link. Returns -1 on error,
3775 0 when no stubs will be needed, and 1 on success. */
3776
3777int
3778elf32_arm_setup_section_lists (bfd *output_bfd,
3779 struct bfd_link_info *info)
3780{
3781 bfd *input_bfd;
3782 unsigned int bfd_count;
3783 int top_id, top_index;
3784 asection *section;
3785 asection **input_list, **list;
3786 bfd_size_type amt;
3787 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3788
4dfe6ac6
NC		 3789 if (htab == NULL)
3790 return 0;
906e58ca
NC		 3791 if (! is_elf_hash_table (htab))
3792 return 0;
3793
3794 /* Count the number of input BFDs and find the top input section id. */
3795 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3796 input_bfd != NULL;
3797 input_bfd = input_bfd->link_next)
3798 {
3799 bfd_count += 1;
3800 for (section = input_bfd->sections;
3801 section != NULL;
3802 section = section->next)
3803 {
3804 if (top_id < section->id)
3805 top_id = section->id;
3806 }
3807 }
3808 htab->bfd_count = bfd_count;
3809
3810 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 3811 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 3812 if (htab->stub_group == NULL)
3813 return -1;
fe33d2fa 3814 htab->top_id = top_id;
906e58ca
NC		 3815
3816 /* We can't use output_bfd->section_count here to find the top output
3817 section index as some sections may have been removed, and
3818 _bfd_strip_section_from_output doesn't renumber the indices. */
3819 for (section = output_bfd->sections, top_index = 0;
3820 section != NULL;
3821 section = section->next)
3822 {
3823 if (top_index < section->index)
3824 top_index = section->index;
3825 }
3826
3827 htab->top_index = top_index;
3828 amt = sizeof (asection *) * (top_index + 1);
21d799b5 3829 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 3830 htab->input_list = input_list;
3831 if (input_list == NULL)
3832 return -1;
3833
3834 /* For sections we aren't interested in, mark their entries with a
3835 value we can check later. */
3836 list = input_list + top_index;
3837 do
3838 *list = bfd_abs_section_ptr;
3839 while (list-- != input_list);
3840
3841 for (section = output_bfd->sections;
3842 section != NULL;
3843 section = section->next)
3844 {
3845 if ((section->flags & SEC_CODE) != 0)
3846 input_list[section->index] = NULL;
3847 }
3848
3849 return 1;
3850}
3851
3852/* The linker repeatedly calls this function for each input section,
3853 in the order that input sections are linked into output sections.
3854 Build lists of input sections to determine groupings between which
3855 we may insert linker stubs. */
3856
3857void
3858elf32_arm_next_input_section (struct bfd_link_info *info,
3859 asection *isec)
3860{
3861 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3862
4dfe6ac6
NC		 3863 if (htab == NULL)
3864 return;
3865
906e58ca
NC		 3866 if (isec->output_section->index <= htab->top_index)
3867 {
3868 asection **list = htab->input_list + isec->output_section->index;
3869
a7470592 3870 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 3871 {
3872 /* Steal the link_sec pointer for our list. */
3873#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3874 /* This happens to make the list in reverse order,
07d72278 3875 which we reverse later. */
906e58ca
NC		 3876 PREV_SEC (isec) = *list;
3877 *list = isec;
3878 }
3879 }
3880}
3881
3882/* See whether we can group stub sections together. Grouping stub
3883 sections may result in fewer stubs. More importantly, we need to
07d72278 3884 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3885 .fini output sections respectively, because glibc splits the
3886 _init and _fini functions into multiple parts. Putting a stub in
3887 the middle of a function is not a good idea. */
3888
3889static void
3890group_sections (struct elf32_arm_link_hash_table *htab,
3891 bfd_size_type stub_group_size,
07d72278 3892 bfd_boolean stubs_always_after_branch)
906e58ca 3893{
07d72278 3894 asection **list = htab->input_list;
906e58ca
NC		 3895
3896 do
3897 {
3898 asection *tail = *list;
07d72278 3899 asection *head;
906e58ca
NC		 3900
3901 if (tail == bfd_abs_section_ptr)
3902 continue;
3903
07d72278
DJ		 3904 /* Reverse the list: we must avoid placing stubs at the
3905 beginning of the section because the beginning of the text
3906 section may be required for an interrupt vector in bare metal
3907 code. */
3908#define NEXT_SEC PREV_SEC
e780aef2
CL		 3909 head = NULL;
3910 while (tail != NULL)
3911 {
3912 /* Pop from tail. */
3913 asection *item = tail;
3914 tail = PREV_SEC (item);
3915
3916 /* Push on head. */
3917 NEXT_SEC (item) = head;
3918 head = item;
3919 }
07d72278
DJ		 3920
3921 while (head != NULL)
906e58ca
NC		 3922 {
3923 asection *curr;
07d72278 3924 asection *next;
e780aef2
CL		 3925 bfd_vma stub_group_start = head->output_offset;
3926 bfd_vma end_of_next;
906e58ca 3927
07d72278 3928 curr = head;
e780aef2 3929 while (NEXT_SEC (curr) != NULL)
8cd931b7 3930 {
e780aef2
CL		 3931 next = NEXT_SEC (curr);
3932 end_of_next = next->output_offset + next->size;
3933 if (end_of_next - stub_group_start >= stub_group_size)
3934 /* End of NEXT is too far from start, so stop. */
8cd931b7 3935 break;
e780aef2
CL		 3936 /* Add NEXT to the group. */
3937 curr = next;
8cd931b7 3938 }
906e58ca 3939
07d72278 3940 /* OK, the size from the start to the start of CURR is less
906e58ca 3941 than stub_group_size and thus can be handled by one stub
07d72278 3942 section. (Or the head section is itself larger than
906e58ca
NC		 3943 stub_group_size, in which case we may be toast.)
3944 We should really be keeping track of the total size of
3945 stubs added here, as stubs contribute to the final output
7fb9f789 3946 section size. */
906e58ca
NC		 3947 do
3948 {
07d72278 3949 next = NEXT_SEC (head);
906e58ca 3950 /* Set up this stub group. */
07d72278 3951 htab->stub_group[head->id].link_sec = curr;
906e58ca 3952 }
07d72278 3953 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3954
3955 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3956 bytes after the stub section can be handled by it too. */
3957 if (!stubs_always_after_branch)
906e58ca 3958 {
e780aef2
CL		 3959 stub_group_start = curr->output_offset + curr->size;
3960
8cd931b7 3961 while (next != NULL)
906e58ca 3962 {
e780aef2
CL		 3963 end_of_next = next->output_offset + next->size;
3964 if (end_of_next - stub_group_start >= stub_group_size)
3965 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3966 break;
e780aef2 3967 /* Add NEXT to the stub group. */
07d72278
DJ		 3968 head = next;
3969 next = NEXT_SEC (head);
3970 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3971 }
3972 }
07d72278 3973 head = next;
906e58ca
NC		 3974 }
3975 }
07d72278 3976 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3977
3978 free (htab->input_list);
3979#undef PREV_SEC
07d72278 3980#undef NEXT_SEC
906e58ca
NC		 3981}
3982
48229727
JB		 3983/* Comparison function for sorting/searching relocations relating to Cortex-A8
3984 erratum fix. */
3985
3986static int
3987a8_reloc_compare (const void *a, const void *b)
3988{
21d799b5
NC		 3989 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
3990 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 3991
3992 if (ra->from < rb->from)
3993 return -1;
3994 else if (ra->from > rb->from)
3995 return 1;
3996 else
3997 return 0;
3998}
3999
4000static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4001 const char *, char **);
4002
4003/* Helper function to scan code for sequences which might trigger the Cortex-A8
4004 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4005 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4006 otherwise. */
4007
81694485
NC		 4008static bfd_boolean
4009cortex_a8_erratum_scan (bfd *input_bfd,
4010 struct bfd_link_info *info,
48229727
JB		 4011 struct a8_erratum_fix **a8_fixes_p,
4012 unsigned int *num_a8_fixes_p,
4013 unsigned int *a8_fix_table_size_p,
4014 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4015 unsigned int num_a8_relocs,
4016 unsigned prev_num_a8_fixes,
4017 bfd_boolean *stub_changed_p)
48229727
JB		 4018{
4019 asection *section;
4020 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4021 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4022 unsigned int num_a8_fixes = *num_a8_fixes_p;
4023 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4024
4dfe6ac6
NC		 4025 if (htab == NULL)
4026 return FALSE;
4027
48229727
JB		 4028 for (section = input_bfd->sections;
4029 section != NULL;
4030 section = section->next)
4031 {
4032 bfd_byte *contents = NULL;
4033 struct _arm_elf_section_data *sec_data;
4034 unsigned int span;
4035 bfd_vma base_vma;
4036
4037 if (elf_section_type (section) != SHT_PROGBITS
4038 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4039 || (section->flags & SEC_EXCLUDE) != 0
4040 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4041 || (section->output_section == bfd_abs_section_ptr))
4042 continue;
4043
4044 base_vma = section->output_section->vma + section->output_offset;
4045
4046 if (elf_section_data (section)->this_hdr.contents != NULL)
4047 contents = elf_section_data (section)->this_hdr.contents;
4048 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4049 return TRUE;
48229727
JB		 4050
4051 sec_data = elf32_arm_section_data (section);
4052
4053 for (span = 0; span < sec_data->mapcount; span++)
4054 {
4055 unsigned int span_start = sec_data->map[span].vma;
4056 unsigned int span_end = (span == sec_data->mapcount - 1)
4057 ? section->size : sec_data->map[span + 1].vma;
4058 unsigned int i;
4059 char span_type = sec_data->map[span].type;
4060 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4061
4062 if (span_type != 't')
4063 continue;
4064
4065 /* Span is entirely within a single 4KB region: skip scanning. */
4066 if (((base_vma + span_start) & ~0xfff)
4067 == ((base_vma + span_end) & ~0xfff))
4068 continue;
4069
4070 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4071
4072 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4073 * The branch target is in the same 4KB region as the
4074 first half of the branch.
4075 * The instruction before the branch is a 32-bit
81694485 4076 length non-branch instruction. */
48229727
JB		 4077 for (i = span_start; i < span_end;)
4078 {
4079 unsigned int insn = bfd_getl16 (&contents[i]);
4080 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4081 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4082
4083 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4084 insn_32bit = TRUE;
4085
4086 if (insn_32bit)
4087 {
4088 /* Load the rest of the insn (in manual-friendly order). */
4089 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4090
4091 /* Encoding T4: B<c>.W. */
4092 is_b = (insn & 0xf800d000) == 0xf0009000;
4093 /* Encoding T1: BL<c>.W. */
4094 is_bl = (insn & 0xf800d000) == 0xf000d000;
4095 /* Encoding T2: BLX<c>.W. */
4096 is_blx = (insn & 0xf800d000) == 0xf000c000;
4097 /* Encoding T3: B<c>.W (not permitted in IT block). */
4098 is_bcc = (insn & 0xf800d000) == 0xf0008000
4099 && (insn & 0x07f00000) != 0x03800000;
4100 }
4101
4102 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4103
81694485
NC		 4104 if (((base_vma + i) & 0xfff) == 0xffe
4105 && insn_32bit
4106 && is_32bit_branch
4107 && last_was_32bit
4108 && ! last_was_branch)
48229727 4109 {
8f73510c 4110 bfd_signed_vma offset = 0;
48229727
JB		 4111 bfd_boolean force_target_arm = FALSE;
4112 bfd_boolean force_target_thumb = FALSE;
4113 bfd_vma target;
4114 enum elf32_arm_stub_type stub_type = arm_stub_none;
4115 struct a8_erratum_reloc key, *found;
4116
4117 key.from = base_vma + i;
21d799b5
NC		 4118 found = (struct a8_erratum_reloc *)
4119 bsearch (&key, a8_relocs, num_a8_relocs,
4120 sizeof (struct a8_erratum_reloc),
4121 &a8_reloc_compare);
48229727
JB		 4122
4123 if (found)
4124 {
4125 char *error_message = NULL;
4126 struct elf_link_hash_entry *entry;
92750f34 4127 bfd_boolean use_plt = FALSE;
48229727
JB		 4128
4129 /* We don't care about the error returned from this
4130 function, only if there is glue or not. */
4131 entry = find_thumb_glue (info, found->sym_name,
4132 &error_message);
4133
4134 if (entry)
4135 found->non_a8_stub = TRUE;
4136
92750f34
DJ		 4137 /* Keep a simpler condition, for the sake of clarity. */
4138 if (htab->splt != NULL && found->hash != NULL
4139 && found->hash->root.plt.offset != (bfd_vma) -1)
4140 use_plt = TRUE;
4141
4142 if (found->r_type == R_ARM_THM_CALL)
4143 {
4144 if (found->st_type != STT_ARM_TFUNC || use_plt)
4145 force_target_arm = TRUE;
4146 else
4147 force_target_thumb = TRUE;
4148 }
48229727
JB		 4149 }
4150
4151 /* Check if we have an offending branch instruction. */
4152
4153 if (found && found->non_a8_stub)
4154 /* We've already made a stub for this instruction, e.g.
4155 it's a long branch or a Thumb->ARM stub. Assume that
4156 stub will suffice to work around the A8 erratum (see
4157 setting of always_after_branch above). */
4158 ;
4159 else if (is_bcc)
4160 {
4161 offset = (insn & 0x7ff) << 1;
4162 offset |= (insn & 0x3f0000) >> 4;
4163 offset |= (insn & 0x2000) ? 0x40000 : 0;
4164 offset |= (insn & 0x800) ? 0x80000 : 0;
4165 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4166 if (offset & 0x100000)
81694485 4167 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4168 stub_type = arm_stub_a8_veneer_b_cond;
4169 }
4170 else if (is_b || is_bl || is_blx)
4171 {
4172 int s = (insn & 0x4000000) != 0;
4173 int j1 = (insn & 0x2000) != 0;
4174 int j2 = (insn & 0x800) != 0;
4175 int i1 = !(j1 ^ s);
4176 int i2 = !(j2 ^ s);
4177
4178 offset = (insn & 0x7ff) << 1;
4179 offset |= (insn & 0x3ff0000) >> 4;
4180 offset |= i2 << 22;
4181 offset |= i1 << 23;
4182 offset |= s << 24;
4183 if (offset & 0x1000000)
81694485 4184 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4185
4186 if (is_blx)
81694485 4187 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4188
4189 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4190 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4191 }
4192
4193 if (stub_type != arm_stub_none)
4194 {
4195 bfd_vma pc_for_insn = base_vma + i + 4;
4196
4197 /* The original instruction is a BL, but the target is
4198 an ARM instruction. If we were not making a stub,
4199 the BL would have been converted to a BLX. Use the
4200 BLX stub instead in that case. */
4201 if (htab->use_blx && force_target_arm
4202 && stub_type == arm_stub_a8_veneer_bl)
4203 {
4204 stub_type = arm_stub_a8_veneer_blx;
4205 is_blx = TRUE;
4206 is_bl = FALSE;
4207 }
4208 /* Conversely, if the original instruction was
4209 BLX but the target is Thumb mode, use the BL
4210 stub. */
4211 else if (force_target_thumb
4212 && stub_type == arm_stub_a8_veneer_blx)
4213 {
4214 stub_type = arm_stub_a8_veneer_bl;
4215 is_blx = FALSE;
4216 is_bl = TRUE;
4217 }
4218
4219 if (is_blx)
81694485 4220 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4221
4222 /* If we found a relocation, use the proper destination,
4223 not the offset in the (unrelocated) instruction.
4224 Note this is always done if we switched the stub type
4225 above. */
4226 if (found)
81694485
NC		 4227 offset =
4228 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4229
4230 target = pc_for_insn + offset;
4231
4232 /* The BLX stub is ARM-mode code. Adjust the offset to
4233 take the different PC value (+8 instead of +4) into
4234 account. */
4235 if (stub_type == arm_stub_a8_veneer_blx)
4236 offset += 4;
4237
4238 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4239 {
eb7c4339 4240 char *stub_name = NULL;
48229727
JB		 4241
4242 if (num_a8_fixes == a8_fix_table_size)
4243 {
4244 a8_fix_table_size *= 2;
21d799b5
NC		 4245 a8_fixes = (struct a8_erratum_fix *)
4246 bfd_realloc (a8_fixes,
4247 sizeof (struct a8_erratum_fix)
4248 * a8_fix_table_size);
48229727
JB		 4249 }
4250
eb7c4339
NS		 4251 if (num_a8_fixes < prev_num_a8_fixes)
4252 {
4253 /* If we're doing a subsequent scan,
4254 check if we've found the same fix as
4255 before, and try and reuse the stub
4256 name. */
4257 stub_name = a8_fixes[num_a8_fixes].stub_name;
4258 if ((a8_fixes[num_a8_fixes].section != section)
4259 || (a8_fixes[num_a8_fixes].offset != i))
4260 {
4261 free (stub_name);
4262 stub_name = NULL;
4263 *stub_changed_p = TRUE;
4264 }
4265 }
4266
4267 if (!stub_name)
4268 {
21d799b5 4269 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4270 if (stub_name != NULL)
4271 sprintf (stub_name, "%x:%x", section->id, i);
4272 }
48229727
JB		 4273
4274 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4275 a8_fixes[num_a8_fixes].section = section;
4276 a8_fixes[num_a8_fixes].offset = i;
4277 a8_fixes[num_a8_fixes].addend = offset;
4278 a8_fixes[num_a8_fixes].orig_insn = insn;
4279 a8_fixes[num_a8_fixes].stub_name = stub_name;
4280 a8_fixes[num_a8_fixes].stub_type = stub_type;
fe33d2fa
CL		 4281 a8_fixes[num_a8_fixes].st_type =
4282 is_blx ? STT_FUNC : STT_ARM_TFUNC;
48229727
JB		 4283
4284 num_a8_fixes++;
4285 }
4286 }
4287 }
4288
4289 i += insn_32bit ? 4 : 2;
4290 last_was_32bit = insn_32bit;
4291 last_was_branch = is_32bit_branch;
4292 }
4293 }
4294
4295 if (elf_section_data (section)->this_hdr.contents == NULL)
4296 free (contents);
4297 }
fe33d2fa 4298
48229727
JB		 4299 *a8_fixes_p = a8_fixes;
4300 *num_a8_fixes_p = num_a8_fixes;
4301 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4302
81694485 4303 return FALSE;
48229727
JB		 4304}
4305
906e58ca
NC		 4306/* Determine and set the size of the stub section for a final link.
4307
4308 The basic idea here is to examine all the relocations looking for
4309 PC-relative calls to a target that is unreachable with a "bl"
4310 instruction. */
4311
4312bfd_boolean
4313elf32_arm_size_stubs (bfd *output_bfd,
4314 bfd *stub_bfd,
4315 struct bfd_link_info *info,
4316 bfd_signed_vma group_size,
4317 asection * (*add_stub_section) (const char *, asection *),
4318 void (*layout_sections_again) (void))
4319{
4320 bfd_size_type stub_group_size;
07d72278 4321 bfd_boolean stubs_always_after_branch;
906e58ca 4322 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4323 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4324 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4325 struct a8_erratum_reloc *a8_relocs = NULL;
4326 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4327
4dfe6ac6
NC		 4328 if (htab == NULL)
4329 return FALSE;
4330
48229727
JB		 4331 if (htab->fix_cortex_a8)
4332 {
21d799b5
NC		 4333 a8_fixes = (struct a8_erratum_fix *)
4334 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4335 a8_relocs = (struct a8_erratum_reloc *)
4336 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4337 }
906e58ca
NC		 4338
4339 /* Propagate mach to stub bfd, because it may not have been
4340 finalized when we created stub_bfd. */
4341 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4342 bfd_get_mach (output_bfd));
4343
4344 /* Stash our params away. */
4345 htab->stub_bfd = stub_bfd;
4346 htab->add_stub_section = add_stub_section;
4347 htab->layout_sections_again = layout_sections_again;
07d72278 4348 stubs_always_after_branch = group_size < 0;
48229727
JB		 4349
4350 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4351 as the first half of a 32-bit branch straddling two 4K pages. This is a
4352 crude way of enforcing that. */
4353 if (htab->fix_cortex_a8)
4354 stubs_always_after_branch = 1;
4355
906e58ca
NC		 4356 if (group_size < 0)
4357 stub_group_size = -group_size;
4358 else
4359 stub_group_size = group_size;
4360
4361 if (stub_group_size == 1)
4362 {
4363 /* Default values. */
4364 /* Thumb branch range is +-4MB has to be used as the default
4365 maximum size (a given section can contain both ARM and Thumb
4366 code, so the worst case has to be taken into account).
4367
4368 This value is 24K less than that, which allows for 2025
4369 12-byte stubs. If we exceed that, then we will fail to link.
4370 The user will have to relink with an explicit group size
4371 option. */
4372 stub_group_size = 4170000;
4373 }
4374
07d72278 4375 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4376
3ae046cc
NS		 4377 /* If we're applying the cortex A8 fix, we need to determine the
4378 program header size now, because we cannot change it later --
4379 that could alter section placements. Notice the A8 erratum fix
4380 ends up requiring the section addresses to remain unchanged
4381 modulo the page size. That's something we cannot represent
4382 inside BFD, and we don't want to force the section alignment to
4383 be the page size. */
4384 if (htab->fix_cortex_a8)
4385 (*htab->layout_sections_again) ();
4386
906e58ca
NC		 4387 while (1)
4388 {
4389 bfd *input_bfd;
4390 unsigned int bfd_indx;
4391 asection *stub_sec;
eb7c4339
NS		 4392 bfd_boolean stub_changed = FALSE;
4393 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4394
48229727 4395 num_a8_fixes = 0;
906e58ca
NC		 4396 for (input_bfd = info->input_bfds, bfd_indx = 0;
4397 input_bfd != NULL;
4398 input_bfd = input_bfd->link_next, bfd_indx++)
4399 {
4400 Elf_Internal_Shdr *symtab_hdr;
4401 asection *section;
4402 Elf_Internal_Sym *local_syms = NULL;
4403
48229727
JB		 4404 num_a8_relocs = 0;
4405
906e58ca
NC		 4406 /* We'll need the symbol table in a second. */
4407 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4408 if (symtab_hdr->sh_info == 0)
4409 continue;
4410
4411 /* Walk over each section attached to the input bfd. */
4412 for (section = input_bfd->sections;
4413 section != NULL;
4414 section = section->next)
4415 {
4416 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4417
4418 /* If there aren't any relocs, then there's nothing more
4419 to do. */
4420 if ((section->flags & SEC_RELOC) == 0
4421 || section->reloc_count == 0
4422 || (section->flags & SEC_CODE) == 0)
4423 continue;
4424
4425 /* If this section is a link-once section that will be
4426 discarded, then don't create any stubs. */
4427 if (section->output_section == NULL
4428 || section->output_section->owner != output_bfd)
4429 continue;
4430
4431 /* Get the relocs. */
4432 internal_relocs
4433 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4434 NULL, info->keep_memory);
4435 if (internal_relocs == NULL)
4436 goto error_ret_free_local;
4437
4438 /* Now examine each relocation. */
4439 irela = internal_relocs;
4440 irelaend = irela + section->reloc_count;
4441 for (; irela < irelaend; irela++)
4442 {
4443 unsigned int r_type, r_indx;
4444 enum elf32_arm_stub_type stub_type;
4445 struct elf32_arm_stub_hash_entry *stub_entry;
4446 asection *sym_sec;
4447 bfd_vma sym_value;
4448 bfd_vma destination;
4449 struct elf32_arm_link_hash_entry *hash;
7413f23f 4450 const char *sym_name;
906e58ca
NC		 4451 char *stub_name;
4452 const asection *id_sec;
fe33d2fa 4453 int st_type;
48229727 4454 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4455
4456 r_type = ELF32_R_TYPE (irela->r_info);
4457 r_indx = ELF32_R_SYM (irela->r_info);
4458
4459 if (r_type >= (unsigned int) R_ARM_max)
4460 {
4461 bfd_set_error (bfd_error_bad_value);
4462 error_ret_free_internal:
4463 if (elf_section_data (section)->relocs == NULL)
4464 free (internal_relocs);
4465 goto error_ret_free_local;
4466 }
4467
155d87d7 4468 /* Only look for stubs on branch instructions. */
906e58ca 4469 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4470 && (r_type != (unsigned int) R_ARM_THM_CALL)
4471 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4472 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4473 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4474 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4475 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4476 continue;
4477
4478 /* Now determine the call target, its name, value,
4479 section. */
4480 sym_sec = NULL;
4481 sym_value = 0;
4482 destination = 0;
4483 hash = NULL;
7413f23f 4484 sym_name = NULL;
906e58ca
NC		 4485 if (r_indx < symtab_hdr->sh_info)
4486 {
4487 /* It's a local symbol. */
4488 Elf_Internal_Sym *sym;
4489 Elf_Internal_Shdr *hdr;
4490
4491 if (local_syms == NULL)
4492 {
4493 local_syms
4494 = (Elf_Internal_Sym *) symtab_hdr->contents;
4495 if (local_syms == NULL)
4496 local_syms
4497 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4498 symtab_hdr->sh_info, 0,
4499 NULL, NULL, NULL);
4500 if (local_syms == NULL)
4501 goto error_ret_free_internal;
4502 }
4503
4504 sym = local_syms + r_indx;
4505 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4506 sym_sec = hdr->bfd_section;
ffcb4889
NS		 4507 if (!sym_sec)
4508 /* This is an undefined symbol. It can never
4509 be resolved. */
4510 continue;
fe33d2fa 4511
906e58ca
NC		 4512 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4513 sym_value = sym->st_value;
4514 destination = (sym_value + irela->r_addend
4515 + sym_sec->output_offset
4516 + sym_sec->output_section->vma);
4517 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4518 sym_name
4519 = bfd_elf_string_from_elf_section (input_bfd,
4520 symtab_hdr->sh_link,
4521 sym->st_name);
906e58ca
NC		 4522 }
4523 else
4524 {
4525 /* It's an external symbol. */
4526 int e_indx;
4527
4528 e_indx = r_indx - symtab_hdr->sh_info;
4529 hash = ((struct elf32_arm_link_hash_entry *)
4530 elf_sym_hashes (input_bfd)[e_indx]);
4531
4532 while (hash->root.root.type == bfd_link_hash_indirect
4533 || hash->root.root.type == bfd_link_hash_warning)
4534 hash = ((struct elf32_arm_link_hash_entry *)
4535 hash->root.root.u.i.link);
4536
4537 if (hash->root.root.type == bfd_link_hash_defined
4538 || hash->root.root.type == bfd_link_hash_defweak)
4539 {
4540 sym_sec = hash->root.root.u.def.section;
4541 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4542
4543 struct elf32_arm_link_hash_table *globals =
4544 elf32_arm_hash_table (info);
4545
4546 /* For a destination in a shared library,
4547 use the PLT stub as target address to
4548 decide whether a branch stub is
4549 needed. */
4dfe6ac6
NC		 4550 if (globals != NULL
4551 && globals->splt != NULL
4552 && hash != NULL
022f8312
CL		 4553 && hash->root.plt.offset != (bfd_vma) -1)
4554 {
4555 sym_sec = globals->splt;
4556 sym_value = hash->root.plt.offset;
4557 if (sym_sec->output_section != NULL)
4558 destination = (sym_value
4559 + sym_sec->output_offset
4560 + sym_sec->output_section->vma);
4561 }
4562 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4563 destination = (sym_value + irela->r_addend
4564 + sym_sec->output_offset
4565 + sym_sec->output_section->vma);
4566 }
69c5861e
CL		 4567 else if ((hash->root.root.type == bfd_link_hash_undefined)
4568 || (hash->root.root.type == bfd_link_hash_undefweak))
4569 {
4570 /* For a shared library, use the PLT stub as
4571 target address to decide whether a long
4572 branch stub is needed.
4573 For absolute code, they cannot be handled. */
4574 struct elf32_arm_link_hash_table *globals =
4575 elf32_arm_hash_table (info);
4576
4dfe6ac6
NC		 4577 if (globals != NULL
4578 && globals->splt != NULL
4579 && hash != NULL
69c5861e
CL		 4580 && hash->root.plt.offset != (bfd_vma) -1)
4581 {
4582 sym_sec = globals->splt;
4583 sym_value = hash->root.plt.offset;
4584 if (sym_sec->output_section != NULL)
4585 destination = (sym_value
4586 + sym_sec->output_offset
4587 + sym_sec->output_section->vma);
4588 }
4589 else
4590 continue;
4591 }
906e58ca
NC		 4592 else
4593 {
4594 bfd_set_error (bfd_error_bad_value);
4595 goto error_ret_free_internal;
4596 }
4597 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4598 sym_name = hash->root.root.root.string;
906e58ca
NC		 4599 }
4600
48229727 4601 do
7413f23f 4602 {
48229727
JB		 4603 /* Determine what (if any) linker stub is needed. */
4604 stub_type = arm_type_of_stub (info, section, irela,
fe33d2fa 4605 &st_type, hash,
48229727
JB		 4606 destination, sym_sec,
4607 input_bfd, sym_name);
4608 if (stub_type == arm_stub_none)
4609 break;
4610
4611 /* Support for grouping stub sections. */
4612 id_sec = htab->stub_group[section->id].link_sec;
4613
4614 /* Get the name of this stub. */
4615 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 4616 irela, stub_type);
48229727
JB		 4617 if (!stub_name)
4618 goto error_ret_free_internal;
4619
4620 /* We've either created a stub for this reloc already,
4621 or we are about to. */
4622 created_stub = TRUE;
4623
4624 stub_entry = arm_stub_hash_lookup
4625 (&htab->stub_hash_table, stub_name,
4626 FALSE, FALSE);
4627 if (stub_entry != NULL)
4628 {
4629 /* The proper stub has already been created. */
4630 free (stub_name);
eb7c4339 4631 stub_entry->target_value = sym_value;
48229727
JB		 4632 break;
4633 }
7413f23f 4634
48229727
JB		 4635 stub_entry = elf32_arm_add_stub (stub_name, section,
4636 htab);
4637 if (stub_entry == NULL)
4638 {
4639 free (stub_name);
4640 goto error_ret_free_internal;
4641 }
7413f23f 4642
48229727
JB		 4643 stub_entry->target_value = sym_value;
4644 stub_entry->target_section = sym_sec;
4645 stub_entry->stub_type = stub_type;
4646 stub_entry->h = hash;
4647 stub_entry->st_type = st_type;
4648
4649 if (sym_name == NULL)
4650 sym_name = "unnamed";
21d799b5
NC		 4651 stub_entry->output_name = (char *)
4652 bfd_alloc (htab->stub_bfd,
48229727
JB		 4653 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4654 + strlen (sym_name));
4655 if (stub_entry->output_name == NULL)
4656 {
4657 free (stub_name);
4658 goto error_ret_free_internal;
4659 }
4660
4661 /* For historical reasons, use the existing names for
4662 ARM-to-Thumb and Thumb-to-ARM stubs. */
4663 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4664 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4665 && st_type != STT_ARM_TFUNC)
4666 sprintf (stub_entry->output_name,
4667 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4668 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4669 || (r_type == (unsigned int) R_ARM_JUMP24))
4670 && st_type == STT_ARM_TFUNC)
4671 sprintf (stub_entry->output_name,
4672 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4673 else
4674 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4675 sym_name);
4676
4677 stub_changed = TRUE;
4678 }
4679 while (0);
4680
4681 /* Look for relocations which might trigger Cortex-A8
4682 erratum. */
4683 if (htab->fix_cortex_a8
4684 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4685 || r_type == (unsigned int) R_ARM_THM_JUMP19
4686 || r_type == (unsigned int) R_ARM_THM_CALL
4687 || r_type == (unsigned int) R_ARM_THM_XPC22))
4688 {
4689 bfd_vma from = section->output_section->vma
4690 + section->output_offset
4691 + irela->r_offset;
4692
4693 if ((from & 0xfff) == 0xffe)
4694 {
4695 /* Found a candidate. Note we haven't checked the
4696 destination is within 4K here: if we do so (and
4697 don't create an entry in a8_relocs) we can't tell
4698 that a branch should have been relocated when
4699 scanning later. */
4700 if (num_a8_relocs == a8_reloc_table_size)
4701 {
4702 a8_reloc_table_size *= 2;
21d799b5
NC		 4703 a8_relocs = (struct a8_erratum_reloc *)
4704 bfd_realloc (a8_relocs,
4705 sizeof (struct a8_erratum_reloc)
4706 * a8_reloc_table_size);
48229727
JB		 4707 }
4708
4709 a8_relocs[num_a8_relocs].from = from;
4710 a8_relocs[num_a8_relocs].destination = destination;
4711 a8_relocs[num_a8_relocs].r_type = r_type;
4712 a8_relocs[num_a8_relocs].st_type = st_type;
4713 a8_relocs[num_a8_relocs].sym_name = sym_name;
4714 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 4715 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 4716
4717 num_a8_relocs++;
4718 }
4719 }
906e58ca
NC		 4720 }
4721
48229727
JB		 4722 /* We're done with the internal relocs, free them. */
4723 if (elf_section_data (section)->relocs == NULL)
4724 free (internal_relocs);
4725 }
4726
4727 if (htab->fix_cortex_a8)
4728 {
4729 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4730 qsort (a8_relocs, num_a8_relocs,
4731 sizeof (struct a8_erratum_reloc),
48229727
JB		 4732 &a8_reloc_compare);
4733
4734 /* Scan for branches which might trigger Cortex-A8 erratum. */
4735 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4736 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4737 a8_relocs, num_a8_relocs,
4738 prev_num_a8_fixes, &stub_changed)
4739 != 0)
48229727 4740 goto error_ret_free_local;
5e681ec4 4741 }
5e681ec4
PB		 4742 }
4743
eb7c4339 4744 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4745 stub_changed = TRUE;
4746
906e58ca
NC		 4747 if (!stub_changed)
4748 break;
5e681ec4 4749
906e58ca
NC		 4750 /* OK, we've added some stubs. Find out the new size of the
4751 stub sections. */
4752 for (stub_sec = htab->stub_bfd->sections;
4753 stub_sec != NULL;
4754 stub_sec = stub_sec->next)
3e6b1042
DJ		 4755 {
4756 /* Ignore non-stub sections. */
4757 if (!strstr (stub_sec->name, STUB_SUFFIX))
4758 continue;
4759
4760 stub_sec->size = 0;
4761 }
b34b2d70 4762
906e58ca
NC		 4763 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4764
48229727
JB		 4765 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4766 if (htab->fix_cortex_a8)
4767 for (i = 0; i < num_a8_fixes; i++)
4768 {
4769 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4770 a8_fixes[i].section, htab);
4771
4772 if (stub_sec == NULL)
4773 goto error_ret_free_local;
4774
4775 stub_sec->size
4776 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4777 NULL);
4778 }
4779
4780
906e58ca
NC		 4781 /* Ask the linker to do its stuff. */
4782 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4783 }
4784
48229727
JB		 4785 /* Add stubs for Cortex-A8 erratum fixes now. */
4786 if (htab->fix_cortex_a8)
4787 {
4788 for (i = 0; i < num_a8_fixes; i++)
4789 {
4790 struct elf32_arm_stub_hash_entry *stub_entry;
4791 char *stub_name = a8_fixes[i].stub_name;
4792 asection *section = a8_fixes[i].section;
4793 unsigned int section_id = a8_fixes[i].section->id;
4794 asection *link_sec = htab->stub_group[section_id].link_sec;
4795 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 4796 const insn_sequence *template_sequence;
48229727
JB		 4797 int template_size, size = 0;
4798
4799 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4800 TRUE, FALSE);
4801 if (stub_entry == NULL)
4802 {
4803 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4804 section->owner,
4805 stub_name);
4806 return FALSE;
4807 }
4808
4809 stub_entry->stub_sec = stub_sec;
4810 stub_entry->stub_offset = 0;
4811 stub_entry->id_sec = link_sec;
4812 stub_entry->stub_type = a8_fixes[i].stub_type;
4813 stub_entry->target_section = a8_fixes[i].section;
4814 stub_entry->target_value = a8_fixes[i].offset;
4815 stub_entry->target_addend = a8_fixes[i].addend;
4816 stub_entry->orig_insn = a8_fixes[i].orig_insn;
fe33d2fa 4817 stub_entry->st_type = a8_fixes[i].st_type;
48229727 4818
d3ce72d0
NC		 4819 size = find_stub_size_and_template (a8_fixes[i].stub_type,
4820 &template_sequence,
48229727
JB		 4821 &template_size);
4822
4823 stub_entry->stub_size = size;
d3ce72d0 4824 stub_entry->stub_template = template_sequence;
48229727
JB		 4825 stub_entry->stub_template_size = template_size;
4826 }
4827
4828 /* Stash the Cortex-A8 erratum fix array for use later in
4829 elf32_arm_write_section(). */
4830 htab->a8_erratum_fixes = a8_fixes;
4831 htab->num_a8_erratum_fixes = num_a8_fixes;
4832 }
4833 else
4834 {
4835 htab->a8_erratum_fixes = NULL;
4836 htab->num_a8_erratum_fixes = 0;
4837 }
906e58ca
NC		 4838 return TRUE;
4839
4840 error_ret_free_local:
4841 return FALSE;
5e681ec4
PB		 4842}
4843
906e58ca
NC		 4844/* Build all the stubs associated with the current output file. The
4845 stubs are kept in a hash table attached to the main linker hash
4846 table. We also set up the .plt entries for statically linked PIC
4847 functions here. This function is called via arm_elf_finish in the
4848 linker. */
252b5132 4849
906e58ca
NC		 4850bfd_boolean
4851elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4852{
906e58ca
NC		 4853 asection *stub_sec;
4854 struct bfd_hash_table *table;
4855 struct elf32_arm_link_hash_table *htab;
252b5132 4856
906e58ca 4857 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4858 if (htab == NULL)
4859 return FALSE;
252b5132 4860
906e58ca
NC		 4861 for (stub_sec = htab->stub_bfd->sections;
4862 stub_sec != NULL;
4863 stub_sec = stub_sec->next)
252b5132 4864 {
906e58ca
NC		 4865 bfd_size_type size;
4866
8029a119 4867 /* Ignore non-stub sections. */
906e58ca
NC		 4868 if (!strstr (stub_sec->name, STUB_SUFFIX))
4869 continue;
4870
4871 /* Allocate memory to hold the linker stubs. */
4872 size = stub_sec->size;
21d799b5 4873 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 4874 if (stub_sec->contents == NULL && size != 0)
4875 return FALSE;
4876 stub_sec->size = 0;
252b5132
RH		 4877 }
4878
906e58ca
NC		 4879 /* Build the stubs as directed by the stub hash table. */
4880 table = &htab->stub_hash_table;
4881 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 4882 if (htab->fix_cortex_a8)
4883 {
4884 /* Place the cortex a8 stubs last. */
4885 htab->fix_cortex_a8 = -1;
4886 bfd_hash_traverse (table, arm_build_one_stub, info);
4887 }
252b5132 4888
906e58ca 4889 return TRUE;
252b5132
RH		 4890}
4891
9b485d32
NC		 4892/* Locate the Thumb encoded calling stub for NAME. */
4893
252b5132 4894static struct elf_link_hash_entry *
57e8b36a
NC		 4895find_thumb_glue (struct bfd_link_info *link_info,
4896 const char *name,
f2a9dd69 4897 char **error_message)
252b5132
RH		 4898{
4899 char *tmp_name;
4900 struct elf_link_hash_entry *hash;
4901 struct elf32_arm_link_hash_table *hash_table;
4902
4903 /* We need a pointer to the armelf specific hash table. */
4904 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4905 if (hash_table == NULL)
4906 return NULL;
252b5132 4907
21d799b5
NC		 4908 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4909 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4910
4911 BFD_ASSERT (tmp_name);
4912
4913 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4914
4915 hash = elf_link_hash_lookup
b34976b6 4916 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4917
b1657152
AM		 4918 if (hash == NULL
4919 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4920 tmp_name, name) == -1)
4921 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4922
4923 free (tmp_name);
4924
4925 return hash;
4926}
4927
9b485d32
NC		 4928/* Locate the ARM encoded calling stub for NAME. */
4929
252b5132 4930static struct elf_link_hash_entry *
57e8b36a
NC		 4931find_arm_glue (struct bfd_link_info *link_info,
4932 const char *name,
f2a9dd69 4933 char **error_message)
252b5132
RH		 4934{
4935 char *tmp_name;
4936 struct elf_link_hash_entry *myh;
4937 struct elf32_arm_link_hash_table *hash_table;
4938
4939 /* We need a pointer to the elfarm specific hash table. */
4940 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4941 if (hash_table == NULL)
4942 return NULL;
252b5132 4943
21d799b5
NC		 4944 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4945 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4946
4947 BFD_ASSERT (tmp_name);
4948
4949 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4950
4951 myh = elf_link_hash_lookup
b34976b6 4952 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4953
b1657152
AM		 4954 if (myh == NULL
4955 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4956 tmp_name, name) == -1)
4957 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4958
4959 free (tmp_name);
4960
4961 return myh;
4962}
4963
8f6277f5 4964/* ARM->Thumb glue (static images):
252b5132
RH		 4965
4966 .arm
4967 __func_from_arm:
4968 ldr r12, __func_addr
4969 bx r12
4970 __func_addr:
906e58ca 4971 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4972
26079076
PB		 4973 (v5t static images)
4974 .arm
4975 __func_from_arm:
4976 ldr pc, __func_addr
4977 __func_addr:
906e58ca 4978 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4979
8f6277f5
PB		 4980 (relocatable images)
4981 .arm
4982 __func_from_arm:
4983 ldr r12, __func_offset
4984 add r12, r12, pc
4985 bx r12
4986 __func_offset:
8029a119 4987 .word func - . */
8f6277f5
PB		 4988
4989#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4990static const insn32 a2t1_ldr_insn = 0xe59fc000;
4991static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4992static const insn32 a2t3_func_addr_insn = 0x00000001;
4993
26079076
PB		 4994#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4995static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4996static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4997
8f6277f5
PB		 4998#define ARM2THUMB_PIC_GLUE_SIZE 16
4999static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5000static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5001static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5002
9b485d32 5003/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5004
8029a119
NC		 5005 .thumb .thumb
5006 .align 2 .align 2
5007 __func_from_thumb: __func_from_thumb:
5008 bx pc push {r6, lr}
5009 nop ldr r6, __func_addr
5010 .arm mov lr, pc
5011 b func bx r6
fcef9eb7
NC		 5012 .arm
5013 ;; back_to_thumb
5014 ldmia r13! {r6, lr}
5015 bx lr
8029a119
NC		 5016 __func_addr:
5017 .word func */
252b5132
RH		 5018
5019#define THUMB2ARM_GLUE_SIZE 8
5020static const insn16 t2a1_bx_pc_insn = 0x4778;
5021static const insn16 t2a2_noop_insn = 0x46c0;
5022static const insn32 t2a3_b_insn = 0xea000000;
5023
c7b8f16e
JB		 5024#define VFP11_ERRATUM_VENEER_SIZE 8
5025
845b51d6
PB		 5026#define ARM_BX_VENEER_SIZE 12
5027static const insn32 armbx1_tst_insn = 0xe3100001;
5028static const insn32 armbx2_moveq_insn = 0x01a0f000;
5029static const insn32 armbx3_bx_insn = 0xe12fff10;
5030
7e392df6 5031#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5032static void
5033arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5034{
5035 asection * s;
8029a119 5036 bfd_byte * contents;
252b5132 5037
8029a119 5038 if (size == 0)
3e6b1042
DJ		 5039 {
5040 /* Do not include empty glue sections in the output. */
5041 if (abfd != NULL)
5042 {
5043 s = bfd_get_section_by_name (abfd, name);
5044 if (s != NULL)
5045 s->flags |= SEC_EXCLUDE;
5046 }
5047 return;
5048 }
252b5132 5049
8029a119 5050 BFD_ASSERT (abfd != NULL);
252b5132 5051
8029a119
NC		 5052 s = bfd_get_section_by_name (abfd, name);
5053 BFD_ASSERT (s != NULL);
252b5132 5054
21d799b5 5055 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5056
8029a119
NC		 5057 BFD_ASSERT (s->size == size);
5058 s->contents = contents;
5059}
906e58ca 5060
8029a119
NC		 5061bfd_boolean
5062bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5063{
5064 struct elf32_arm_link_hash_table * globals;
906e58ca 5065
8029a119
NC		 5066 globals = elf32_arm_hash_table (info);
5067 BFD_ASSERT (globals != NULL);
906e58ca 5068
8029a119
NC		 5069 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5070 globals->arm_glue_size,
5071 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5072
8029a119
NC		 5073 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5074 globals->thumb_glue_size,
5075 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5076
8029a119
NC		 5077 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5078 globals->vfp11_erratum_glue_size,
5079 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5080
8029a119
NC		 5081 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5082 globals->bx_glue_size,
845b51d6
PB		 5083 ARM_BX_GLUE_SECTION_NAME);
5084
b34976b6 5085 return TRUE;
252b5132
RH		 5086}
5087
a4fd1a8e 5088/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5089 returns the symbol identifying the stub. */
5090
a4fd1a8e 5091static struct elf_link_hash_entry *
57e8b36a
NC		 5092record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5093 struct elf_link_hash_entry * h)
252b5132
RH		 5094{
5095 const char * name = h->root.root.string;
63b0f745 5096 asection * s;
252b5132
RH		 5097 char * tmp_name;
5098 struct elf_link_hash_entry * myh;
14a793b2 5099 struct bfd_link_hash_entry * bh;
252b5132 5100 struct elf32_arm_link_hash_table * globals;
dc810e39 5101 bfd_vma val;
2f475487 5102 bfd_size_type size;
252b5132
RH		 5103
5104 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5105 BFD_ASSERT (globals != NULL);
5106 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5107
5108 s = bfd_get_section_by_name
5109 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5110
252b5132
RH		 5111 BFD_ASSERT (s != NULL);
5112
21d799b5
NC		 5113 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5114 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5115
5116 BFD_ASSERT (tmp_name);
5117
5118 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5119
5120 myh = elf_link_hash_lookup
b34976b6 5121 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5122
5123 if (myh != NULL)
5124 {
9b485d32 5125 /* We've already seen this guy. */
252b5132 5126 free (tmp_name);
a4fd1a8e 5127 return myh;
252b5132
RH		 5128 }
5129
57e8b36a
NC		 5130 /* The only trick here is using hash_table->arm_glue_size as the value.
5131 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5132 putting it. The +1 on the value marks that the stub has not been
5133 output yet - not that it is a Thumb function. */
14a793b2 5134 bh = NULL;
dc810e39
AM		 5135 val = globals->arm_glue_size + 1;
5136 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5137 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5138 NULL, TRUE, FALSE, &bh);
252b5132 5139
b7693d02
DJ		 5140 myh = (struct elf_link_hash_entry *) bh;
5141 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5142 myh->forced_local = 1;
5143
252b5132
RH		 5144 free (tmp_name);
5145
27e55c4d
PB		 5146 if (link_info->shared || globals->root.is_relocatable_executable
5147 || globals->pic_veneer)
2f475487 5148 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5149 else if (globals->use_blx)
5150 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5151 else
2f475487
AM		 5152 size = ARM2THUMB_STATIC_GLUE_SIZE;
5153
5154 s->size += size;
5155 globals->arm_glue_size += size;
252b5132 5156
a4fd1a8e 5157 return myh;
252b5132
RH		 5158}
5159
845b51d6
PB		 5160/* Allocate space for ARMv4 BX veneers. */
5161
5162static void
5163record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5164{
5165 asection * s;
5166 struct elf32_arm_link_hash_table *globals;
5167 char *tmp_name;
5168 struct elf_link_hash_entry *myh;
5169 struct bfd_link_hash_entry *bh;
5170 bfd_vma val;
5171
5172 /* BX PC does not need a veneer. */
5173 if (reg == 15)
5174 return;
5175
5176 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5177 BFD_ASSERT (globals != NULL);
5178 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5179
5180 /* Check if this veneer has already been allocated. */
5181 if (globals->bx_glue_offset[reg])
5182 return;
5183
5184 s = bfd_get_section_by_name
5185 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5186
5187 BFD_ASSERT (s != NULL);
5188
5189 /* Add symbol for veneer. */
21d799b5
NC		 5190 tmp_name = (char *)
5191 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5192
845b51d6 5193 BFD_ASSERT (tmp_name);
906e58ca 5194
845b51d6 5195 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5196
845b51d6
PB		 5197 myh = elf_link_hash_lookup
5198 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5199
845b51d6 5200 BFD_ASSERT (myh == NULL);
906e58ca 5201
845b51d6
PB		 5202 bh = NULL;
5203 val = globals->bx_glue_size;
5204 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5205 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5206 NULL, TRUE, FALSE, &bh);
5207
5208 myh = (struct elf_link_hash_entry *) bh;
5209 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5210 myh->forced_local = 1;
5211
5212 s->size += ARM_BX_VENEER_SIZE;
5213 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5214 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5215}
5216
5217
c7b8f16e
JB		 5218/* Add an entry to the code/data map for section SEC. */
5219
5220static void
5221elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5222{
5223 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5224 unsigned int newidx;
906e58ca 5225
c7b8f16e
JB		 5226 if (sec_data->map == NULL)
5227 {
21d799b5
NC		 5228 sec_data->map = (elf32_arm_section_map *)
5229 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5230 sec_data->mapcount = 0;
5231 sec_data->mapsize = 1;
5232 }
906e58ca 5233
c7b8f16e 5234 newidx = sec_data->mapcount++;
906e58ca 5235
c7b8f16e
JB		 5236 if (sec_data->mapcount > sec_data->mapsize)
5237 {
5238 sec_data->mapsize *= 2;
21d799b5
NC		 5239 sec_data->map = (elf32_arm_section_map *)
5240 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5241 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5242 }
5243
5244 if (sec_data->map)
5245 {
5246 sec_data->map[newidx].vma = vma;
5247 sec_data->map[newidx].type = type;
c7b8f16e 5248 }
c7b8f16e
JB		 5249}
5250
5251
5252/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5253 veneers are handled for now. */
5254
5255static bfd_vma
5256record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5257 elf32_vfp11_erratum_list *branch,
5258 bfd *branch_bfd,
5259 asection *branch_sec,
5260 unsigned int offset)
5261{
5262 asection *s;
5263 struct elf32_arm_link_hash_table *hash_table;
5264 char *tmp_name;
5265 struct elf_link_hash_entry *myh;
5266 struct bfd_link_hash_entry *bh;
5267 bfd_vma val;
5268 struct _arm_elf_section_data *sec_data;
c7b8f16e 5269 elf32_vfp11_erratum_list *newerr;
906e58ca 5270
c7b8f16e 5271 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5272 BFD_ASSERT (hash_table != NULL);
5273 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5274
c7b8f16e
JB		 5275 s = bfd_get_section_by_name
5276 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5277
c7b8f16e 5278 sec_data = elf32_arm_section_data (s);
906e58ca 5279
c7b8f16e 5280 BFD_ASSERT (s != NULL);
906e58ca 5281
21d799b5
NC		 5282 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5283 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5284
c7b8f16e 5285 BFD_ASSERT (tmp_name);
906e58ca 5286
c7b8f16e
JB		 5287 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5288 hash_table->num_vfp11_fixes);
906e58ca 5289
c7b8f16e
JB		 5290 myh = elf_link_hash_lookup
5291 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5292
c7b8f16e 5293 BFD_ASSERT (myh == NULL);
906e58ca 5294
c7b8f16e
JB		 5295 bh = NULL;
5296 val = hash_table->vfp11_erratum_glue_size;
5297 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5298 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5299 NULL, TRUE, FALSE, &bh);
5300
5301 myh = (struct elf_link_hash_entry *) bh;
5302 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5303 myh->forced_local = 1;
5304
5305 /* Link veneer back to calling location. */
c7e2358a 5306 sec_data->erratumcount += 1;
21d799b5
NC		 5307 newerr = (elf32_vfp11_erratum_list *)
5308 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5309
c7b8f16e
JB		 5310 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5311 newerr->vma = -1;
5312 newerr->u.v.branch = branch;
5313 newerr->u.v.id = hash_table->num_vfp11_fixes;
5314 branch->u.b.veneer = newerr;
5315
5316 newerr->next = sec_data->erratumlist;
5317 sec_data->erratumlist = newerr;
5318
5319 /* A symbol for the return from the veneer. */
5320 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5321 hash_table->num_vfp11_fixes);
5322
5323 myh = elf_link_hash_lookup
5324 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5325
c7b8f16e
JB		 5326 if (myh != NULL)
5327 abort ();
5328
5329 bh = NULL;
5330 val = offset + 4;
5331 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5332 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5333
c7b8f16e
JB		 5334 myh = (struct elf_link_hash_entry *) bh;
5335 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5336 myh->forced_local = 1;
5337
5338 free (tmp_name);
906e58ca 5339
c7b8f16e
JB		 5340 /* Generate a mapping symbol for the veneer section, and explicitly add an
5341 entry for that symbol to the code/data map for the section. */
5342 if (hash_table->vfp11_erratum_glue_size == 0)
5343 {
5344 bh = NULL;
5345 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5346 ever requires this erratum fix. */
5347 _bfd_generic_link_add_one_symbol (link_info,
5348 hash_table->bfd_of_glue_owner, "$a",
5349 BSF_LOCAL, s, 0, NULL,
5350 TRUE, FALSE, &bh);
5351
5352 myh = (struct elf_link_hash_entry *) bh;
5353 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5354 myh->forced_local = 1;
906e58ca 5355
c7b8f16e
JB		 5356 /* The elf32_arm_init_maps function only cares about symbols from input
5357 BFDs. We must make a note of this generated mapping symbol
5358 ourselves so that code byteswapping works properly in
5359 elf32_arm_write_section. */
5360 elf32_arm_section_map_add (s, 'a', 0);
5361 }
906e58ca 5362
c7b8f16e
JB		 5363 s->size += VFP11_ERRATUM_VENEER_SIZE;
5364 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5365 hash_table->num_vfp11_fixes++;
906e58ca 5366
c7b8f16e
JB		 5367 /* The offset of the veneer. */
5368 return val;
5369}
5370
8029a119 5371#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5372 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5373 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5374
5375/* Create a fake section for use by the ARM backend of the linker. */
5376
5377static bfd_boolean
5378arm_make_glue_section (bfd * abfd, const char * name)
5379{
5380 asection * sec;
5381
5382 sec = bfd_get_section_by_name (abfd, name);
5383 if (sec != NULL)
5384 /* Already made. */
5385 return TRUE;
5386
5387 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5388
5389 if (sec == NULL
5390 || !bfd_set_section_alignment (abfd, sec, 2))
5391 return FALSE;
5392
5393 /* Set the gc mark to prevent the section from being removed by garbage
5394 collection, despite the fact that no relocs refer to this section. */
5395 sec->gc_mark = 1;
5396
5397 return TRUE;
5398}
5399
8afb0e02
NC		 5400/* Add the glue sections to ABFD. This function is called from the
5401 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5402
b34976b6 5403bfd_boolean
57e8b36a
NC		 5404bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5405 struct bfd_link_info *info)
252b5132 5406{
8afb0e02
NC		 5407 /* If we are only performing a partial
5408 link do not bother adding the glue. */
1049f94e 5409 if (info->relocatable)
b34976b6 5410 return TRUE;
252b5132 5411
8029a119
NC		 5412 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5413 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5414 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5415 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5416}
5417
5418/* Select a BFD to be used to hold the sections used by the glue code.
5419 This function is called from the linker scripts in ld/emultempl/
8029a119 5420 {armelf/pe}.em. */
8afb0e02 5421
b34976b6 5422bfd_boolean
57e8b36a 5423bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5424{
5425 struct elf32_arm_link_hash_table *globals;
5426
5427 /* If we are only performing a partial link
5428 do not bother getting a bfd to hold the glue. */
1049f94e 5429 if (info->relocatable)
b34976b6 5430 return TRUE;
8afb0e02 5431
b7693d02
DJ		 5432 /* Make sure we don't attach the glue sections to a dynamic object. */
5433 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5434
8afb0e02 5435 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5436 BFD_ASSERT (globals != NULL);
5437
5438 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5439 return TRUE;
8afb0e02 5440
252b5132
RH		 5441 /* Save the bfd for later use. */
5442 globals->bfd_of_glue_owner = abfd;
cedb70c5 5443
b34976b6 5444 return TRUE;
252b5132
RH		 5445}
5446
906e58ca
NC		 5447static void
5448check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5449{
104d59d1
JM		 5450 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5451 Tag_CPU_arch) > 2)
39b41c9c
PB		 5452 globals->use_blx = 1;
5453}
5454
b34976b6 5455bfd_boolean
57e8b36a 5456bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5457 struct bfd_link_info *link_info)
252b5132
RH		 5458{
5459 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5460 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5461 Elf_Internal_Rela *irel, *irelend;
5462 bfd_byte *contents = NULL;
252b5132
RH		 5463
5464 asection *sec;
5465 struct elf32_arm_link_hash_table *globals;
5466
5467 /* If we are only performing a partial link do not bother
5468 to construct any glue. */
1049f94e 5469 if (link_info->relocatable)
b34976b6 5470 return TRUE;
252b5132 5471
39ce1a6a
NC		 5472 /* Here we have a bfd that is to be included on the link. We have a
5473 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5474 globals = elf32_arm_hash_table (link_info);
252b5132 5475 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5476
5477 check_use_blx (globals);
252b5132 5478
d504ffc8 5479 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5480 {
d003868e
AM		 5481 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5482 abfd);
e489d0ae
PB		 5483 return FALSE;
5484 }
f21f3fe0 5485
39ce1a6a
NC		 5486 /* PR 5398: If we have not decided to include any loadable sections in
5487 the output then we will not have a glue owner bfd. This is OK, it
5488 just means that there is nothing else for us to do here. */
5489 if (globals->bfd_of_glue_owner == NULL)
5490 return TRUE;
5491
252b5132
RH		 5492 /* Rummage around all the relocs and map the glue vectors. */
5493 sec = abfd->sections;
5494
5495 if (sec == NULL)
b34976b6 5496 return TRUE;
252b5132
RH		 5497
5498 for (; sec != NULL; sec = sec->next)
5499 {
5500 if (sec->reloc_count == 0)
5501 continue;
5502
2f475487
AM		 5503 if ((sec->flags & SEC_EXCLUDE) != 0)
5504 continue;
5505
0ffa91dd 5506 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5507
9b485d32 5508 /* Load the relocs. */
6cdc0ccc 5509 internal_relocs
906e58ca 5510 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5511
6cdc0ccc
AM		 5512 if (internal_relocs == NULL)
5513 goto error_return;
252b5132 5514
6cdc0ccc
AM		 5515 irelend = internal_relocs + sec->reloc_count;
5516 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5517 {
5518 long r_type;
5519 unsigned long r_index;
252b5132
RH		 5520
5521 struct elf_link_hash_entry *h;
5522
5523 r_type = ELF32_R_TYPE (irel->r_info);
5524 r_index = ELF32_R_SYM (irel->r_info);
5525
9b485d32 5526 /* These are the only relocation types we care about. */
ba96a88f 5527 if ( r_type != R_ARM_PC24
845b51d6 5528 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5529 continue;
5530
5531 /* Get the section contents if we haven't done so already. */
5532 if (contents == NULL)
5533 {
5534 /* Get cached copy if it exists. */
5535 if (elf_section_data (sec)->this_hdr.contents != NULL)
5536 contents = elf_section_data (sec)->this_hdr.contents;
5537 else
5538 {
5539 /* Go get them off disk. */
57e8b36a 5540 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5541 goto error_return;
5542 }
5543 }
5544
845b51d6
PB		 5545 if (r_type == R_ARM_V4BX)
5546 {
5547 int reg;
5548
5549 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5550 record_arm_bx_glue (link_info, reg);
5551 continue;
5552 }
5553
a7c10850 5554 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5555 h = NULL;
5556
9b485d32 5557 /* We don't care about local symbols. */
252b5132
RH		 5558 if (r_index < symtab_hdr->sh_info)
5559 continue;
5560
9b485d32 5561 /* This is an external symbol. */
252b5132
RH		 5562 r_index -= symtab_hdr->sh_info;
5563 h = (struct elf_link_hash_entry *)
5564 elf_sym_hashes (abfd)[r_index];
5565
5566 /* If the relocation is against a static symbol it must be within
5567 the current section and so cannot be a cross ARM/Thumb relocation. */
5568 if (h == NULL)
5569 continue;
5570
d504ffc8
DJ		 5571 /* If the call will go through a PLT entry then we do not need
5572 glue. */
5573 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5574 continue;
5575
252b5132
RH		 5576 switch (r_type)
5577 {
5578 case R_ARM_PC24:
5579 /* This one is a call from arm code. We need to look up
2f0ca46a 5580 the target of the call. If it is a thumb target, we
252b5132 5581 insert glue. */
ebe24dd4 5582 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5583 record_arm_to_thumb_glue (link_info, h);
5584 break;
5585
252b5132 5586 default:
c6596c5e 5587 abort ();
252b5132
RH		 5588 }
5589 }
6cdc0ccc
AM		 5590
5591 if (contents != NULL
5592 && elf_section_data (sec)->this_hdr.contents != contents)
5593 free (contents);
5594 contents = NULL;
5595
5596 if (internal_relocs != NULL
5597 && elf_section_data (sec)->relocs != internal_relocs)
5598 free (internal_relocs);
5599 internal_relocs = NULL;
252b5132
RH		 5600 }
5601
b34976b6 5602 return TRUE;
9a5aca8c 5603
252b5132 5604error_return:
6cdc0ccc
AM		 5605 if (contents != NULL
5606 && elf_section_data (sec)->this_hdr.contents != contents)
5607 free (contents);
5608 if (internal_relocs != NULL
5609 && elf_section_data (sec)->relocs != internal_relocs)
5610 free (internal_relocs);
9a5aca8c 5611
b34976b6 5612 return FALSE;
252b5132 5613}
7e392df6 5614#endif
252b5132 5615
eb043451 5616
c7b8f16e
JB		 5617/* Initialise maps of ARM/Thumb/data for input BFDs. */
5618
5619void
5620bfd_elf32_arm_init_maps (bfd *abfd)
5621{
5622 Elf_Internal_Sym *isymbuf;
5623 Elf_Internal_Shdr *hdr;
5624 unsigned int i, localsyms;
5625
af1f4419
NC		 5626 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5627 if (! is_arm_elf (abfd))
5628 return;
5629
c7b8f16e
JB		 5630 if ((abfd->flags & DYNAMIC) != 0)
5631 return;
5632
0ffa91dd 5633 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5634 localsyms = hdr->sh_info;
5635
5636 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5637 should contain the number of local symbols, which should come before any
5638 global symbols. Mapping symbols are always local. */
5639 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5640 NULL);
5641
5642 /* No internal symbols read? Skip this BFD. */
5643 if (isymbuf == NULL)
5644 return;
5645
5646 for (i = 0; i < localsyms; i++)
5647 {
5648 Elf_Internal_Sym *isym = &isymbuf[i];
5649 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5650 const char *name;
906e58ca 5651
c7b8f16e
JB		 5652 if (sec != NULL
5653 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5654 {
5655 name = bfd_elf_string_from_elf_section (abfd,
5656 hdr->sh_link, isym->st_name);
906e58ca 5657
c7b8f16e
JB		 5658 if (bfd_is_arm_special_symbol_name (name,
5659 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5660 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5661 }
5662 }
5663}
5664
5665
48229727
JB		 5666/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5667 say what they wanted. */
5668
5669void
5670bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5671{
5672 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5673 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5674
4dfe6ac6
NC		 5675 if (globals == NULL)
5676 return;
5677
48229727
JB		 5678 if (globals->fix_cortex_a8 == -1)
5679 {
5680 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5681 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5682 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5683 || out_attr[Tag_CPU_arch_profile].i == 0))
5684 globals->fix_cortex_a8 = 1;
5685 else
5686 globals->fix_cortex_a8 = 0;
5687 }
5688}
5689
5690
c7b8f16e
JB		 5691void
5692bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5693{
5694 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5695 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5696
4dfe6ac6
NC		 5697 if (globals == NULL)
5698 return;
c7b8f16e
JB		 5699 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5700 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5701 {
5702 switch (globals->vfp11_fix)
5703 {
5704 case BFD_ARM_VFP11_FIX_DEFAULT:
5705 case BFD_ARM_VFP11_FIX_NONE:
5706 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5707 break;
906e58ca 5708
c7b8f16e
JB		 5709 default:
5710 /* Give a warning, but do as the user requests anyway. */
5711 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5712 "workaround is not necessary for target architecture"), obfd);
5713 }
5714 }
5715 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5716 /* For earlier architectures, we might need the workaround, but do not
5717 enable it by default. If users is running with broken hardware, they
5718 must enable the erratum fix explicitly. */
5719 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5720}
5721
5722
906e58ca
NC		 5723enum bfd_arm_vfp11_pipe
5724{
c7b8f16e
JB		 5725 VFP11_FMAC,
5726 VFP11_LS,
5727 VFP11_DS,
5728 VFP11_BAD
5729};
5730
5731/* Return a VFP register number. This is encoded as RX:X for single-precision
5732 registers, or X:RX for double-precision registers, where RX is the group of
5733 four bits in the instruction encoding and X is the single extension bit.
5734 RX and X fields are specified using their lowest (starting) bit. The return
5735 value is:
5736
5737 0...31: single-precision registers s0...s31
5738 32...63: double-precision registers d0...d31.
906e58ca 5739
c7b8f16e
JB		 5740 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5741 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5742
c7b8f16e
JB		 5743static unsigned int
5744bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5745 unsigned int x)
5746{
5747 if (is_double)
5748 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5749 else
5750 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5751}
5752
5753/* Set bits in *WMASK according to a register number REG as encoded by
5754 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5755
5756static void
5757bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5758{
5759 if (reg < 32)
5760 *wmask |= 1 << reg;
5761 else if (reg < 48)
5762 *wmask |= 3 << ((reg - 32) * 2);
5763}
5764
5765/* Return TRUE if WMASK overwrites anything in REGS. */
5766
5767static bfd_boolean
5768bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5769{
5770 int i;
906e58ca 5771
c7b8f16e
JB		 5772 for (i = 0; i < numregs; i++)
5773 {
5774 unsigned int reg = regs[i];
5775
5776 if (reg < 32 && (wmask & (1 << reg)) != 0)
5777 return TRUE;
906e58ca 5778
c7b8f16e
JB		 5779 reg -= 32;
5780
5781 if (reg >= 16)
5782 continue;
906e58ca 5783
c7b8f16e
JB		 5784 if ((wmask & (3 << (reg * 2))) != 0)
5785 return TRUE;
5786 }
906e58ca 5787
c7b8f16e
JB		 5788 return FALSE;
5789}
5790
5791/* In this function, we're interested in two things: finding input registers
5792 for VFP data-processing instructions, and finding the set of registers which
5793 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5794 hold the written set, so FLDM etc. are easy to deal with (we're only
5795 interested in 32 SP registers or 16 dp registers, due to the VFP version
5796 implemented by the chip in question). DP registers are marked by setting
5797 both SP registers in the write mask). */
5798
5799static enum bfd_arm_vfp11_pipe
5800bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5801 int *numregs)
5802{
91d6fa6a 5803 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 5804 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5805
5806 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5807 {
5808 unsigned int pqrs;
5809 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5810 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5811
5812 pqrs = ((insn & 0x00800000) >> 20)
5813 | ((insn & 0x00300000) >> 19)
5814 | ((insn & 0x00000040) >> 6);
5815
5816 switch (pqrs)
5817 {
5818 case 0: /* fmac[sd]. */
5819 case 1: /* fnmac[sd]. */
5820 case 2: /* fmsc[sd]. */
5821 case 3: /* fnmsc[sd]. */
91d6fa6a 5822 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5823 bfd_arm_vfp11_write_mask (destmask, fd);
5824 regs[0] = fd;
5825 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5826 regs[2] = fm;
5827 *numregs = 3;
5828 break;
5829
5830 case 4: /* fmul[sd]. */
5831 case 5: /* fnmul[sd]. */
5832 case 6: /* fadd[sd]. */
5833 case 7: /* fsub[sd]. */
91d6fa6a 5834 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5835 goto vfp_binop;
5836
5837 case 8: /* fdiv[sd]. */
91d6fa6a 5838 vpipe = VFP11_DS;
c7b8f16e
JB		 5839 vfp_binop:
5840 bfd_arm_vfp11_write_mask (destmask, fd);
5841 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5842 regs[1] = fm;
5843 *numregs = 2;
5844 break;
5845
5846 case 15: /* extended opcode. */
5847 {
5848 unsigned int extn = ((insn >> 15) & 0x1e)
5849 | ((insn >> 7) & 1);
5850
5851 switch (extn)
5852 {
5853 case 0: /* fcpy[sd]. */
5854 case 1: /* fabs[sd]. */
5855 case 2: /* fneg[sd]. */
5856 case 8: /* fcmp[sd]. */
5857 case 9: /* fcmpe[sd]. */
5858 case 10: /* fcmpz[sd]. */
5859 case 11: /* fcmpez[sd]. */
5860 case 16: /* fuito[sd]. */
5861 case 17: /* fsito[sd]. */
5862 case 24: /* ftoui[sd]. */
5863 case 25: /* ftouiz[sd]. */
5864 case 26: /* ftosi[sd]. */
5865 case 27: /* ftosiz[sd]. */
5866 /* These instructions will not bounce due to underflow. */
5867 *numregs = 0;
91d6fa6a 5868 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5869 break;
5870
5871 case 3: /* fsqrt[sd]. */
5872 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5873 registers to cause the erratum in previous instructions. */
5874 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 5875 vpipe = VFP11_DS;
c7b8f16e
JB		 5876 break;
5877
5878 case 15: /* fcvt{ds,sd}. */
5879 {
5880 int rnum = 0;
5881
5882 bfd_arm_vfp11_write_mask (destmask, fd);
5883
5884 /* Only FCVTSD can underflow. */
5885 if ((insn & 0x100) != 0)
5886 regs[rnum++] = fm;
5887
5888 *numregs = rnum;
5889
91d6fa6a 5890 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5891 }
5892 break;
5893
5894 default:
5895 return VFP11_BAD;
5896 }
5897 }
5898 break;
5899
5900 default:
5901 return VFP11_BAD;
5902 }
5903 }
5904 /* Two-register transfer. */
5905 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5906 {
5907 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5908
c7b8f16e
JB		 5909 if ((insn & 0x100000) == 0)
5910 {
5911 if (is_double)
5912 bfd_arm_vfp11_write_mask (destmask, fm);
5913 else
5914 {
5915 bfd_arm_vfp11_write_mask (destmask, fm);
5916 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5917 }
5918 }
5919
91d6fa6a 5920 vpipe = VFP11_LS;
c7b8f16e
JB		 5921 }
5922 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5923 {
5924 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5925 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5926
c7b8f16e
JB		 5927 switch (puw)
5928 {
5929 case 0: /* Two-reg transfer. We should catch these above. */
5930 abort ();
906e58ca 5931
c7b8f16e
JB		 5932 case 2: /* fldm[sdx]. */
5933 case 3:
5934 case 5:
5935 {
5936 unsigned int i, offset = insn & 0xff;
5937
5938 if (is_double)
5939 offset >>= 1;
5940
5941 for (i = fd; i < fd + offset; i++)
5942 bfd_arm_vfp11_write_mask (destmask, i);
5943 }
5944 break;
906e58ca 5945
c7b8f16e
JB		 5946 case 4: /* fld[sd]. */
5947 case 6:
5948 bfd_arm_vfp11_write_mask (destmask, fd);
5949 break;
906e58ca 5950
c7b8f16e
JB		 5951 default:
5952 return VFP11_BAD;
5953 }
5954
91d6fa6a 5955 vpipe = VFP11_LS;
c7b8f16e
JB		 5956 }
5957 /* Single-register transfer. Note L==0. */
5958 else if ((insn & 0x0f100e10) == 0x0e000a10)
5959 {
5960 unsigned int opcode = (insn >> 21) & 7;
5961 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5962
5963 switch (opcode)
5964 {
5965 case 0: /* fmsr/fmdlr. */
5966 case 1: /* fmdhr. */
5967 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5968 destination register. I don't know if this is exactly right,
5969 but it is the conservative choice. */
5970 bfd_arm_vfp11_write_mask (destmask, fn);
5971 break;
5972
5973 case 7: /* fmxr. */
5974 break;
5975 }
5976
91d6fa6a 5977 vpipe = VFP11_LS;
c7b8f16e
JB		 5978 }
5979
91d6fa6a 5980 return vpipe;
c7b8f16e
JB		 5981}
5982
5983
5984static int elf32_arm_compare_mapping (const void * a, const void * b);
5985
5986
5987/* Look for potentially-troublesome code sequences which might trigger the
5988 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5989 (available from ARM) for details of the erratum. A short version is
5990 described in ld.texinfo. */
5991
5992bfd_boolean
5993bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5994{
5995 asection *sec;
5996 bfd_byte *contents = NULL;
5997 int state = 0;
5998 int regs[3], numregs = 0;
5999 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6000 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6001
4dfe6ac6
NC		 6002 if (globals == NULL)
6003 return FALSE;
6004
c7b8f16e
JB		 6005 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6006 The states transition as follows:
906e58ca 6007
c7b8f16e
JB		 6008 0 -> 1 (vector) or 0 -> 2 (scalar)
6009 A VFP FMAC-pipeline instruction has been seen. Fill
6010 regs[0]..regs[numregs-1] with its input operands. Remember this
6011 instruction in 'first_fmac'.
6012
6013 1 -> 2
6014 Any instruction, except for a VFP instruction which overwrites
6015 regs[*].
906e58ca 6016
c7b8f16e
JB		 6017 1 -> 3 [ -> 0 ] or
6018 2 -> 3 [ -> 0 ]
6019 A VFP instruction has been seen which overwrites any of regs[*].
6020 We must make a veneer! Reset state to 0 before examining next
6021 instruction.
906e58ca 6022
c7b8f16e
JB		 6023 2 -> 0
6024 If we fail to match anything in state 2, reset to state 0 and reset
6025 the instruction pointer to the instruction after 'first_fmac'.
6026
6027 If the VFP11 vector mode is in use, there must be at least two unrelated
6028 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6029 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6030
6031 /* If we are only performing a partial link do not bother
6032 to construct any glue. */
6033 if (link_info->relocatable)
6034 return TRUE;
6035
0ffa91dd
NC		 6036 /* Skip if this bfd does not correspond to an ELF image. */
6037 if (! is_arm_elf (abfd))
6038 return TRUE;
906e58ca 6039
c7b8f16e
JB		 6040 /* We should have chosen a fix type by the time we get here. */
6041 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6042
6043 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6044 return TRUE;
2e6030b9 6045
33a7ffc2
JM		 6046 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6047 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6048 return TRUE;
6049
c7b8f16e
JB		 6050 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6051 {
6052 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6053 struct _arm_elf_section_data *sec_data;
6054
6055 /* If we don't have executable progbits, we're not interested in this
6056 section. Also skip if section is to be excluded. */
6057 if (elf_section_type (sec) != SHT_PROGBITS
6058 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6059 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6060 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6061 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6062 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6063 continue;
6064
6065 sec_data = elf32_arm_section_data (sec);
906e58ca 6066
c7b8f16e
JB		 6067 if (sec_data->mapcount == 0)
6068 continue;
906e58ca 6069
c7b8f16e
JB		 6070 if (elf_section_data (sec)->this_hdr.contents != NULL)
6071 contents = elf_section_data (sec)->this_hdr.contents;
6072 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6073 goto error_return;
6074
6075 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6076 elf32_arm_compare_mapping);
6077
6078 for (span = 0; span < sec_data->mapcount; span++)
6079 {
6080 unsigned int span_start = sec_data->map[span].vma;
6081 unsigned int span_end = (span == sec_data->mapcount - 1)
6082 ? sec->size : sec_data->map[span + 1].vma;
6083 char span_type = sec_data->map[span].type;
906e58ca 6084
c7b8f16e
JB		 6085 /* FIXME: Only ARM mode is supported at present. We may need to
6086 support Thumb-2 mode also at some point. */
6087 if (span_type != 'a')
6088 continue;
6089
6090 for (i = span_start; i < span_end;)
6091 {
6092 unsigned int next_i = i + 4;
6093 unsigned int insn = bfd_big_endian (abfd)
6094 ? (contents[i] << 24)
6095 | (contents[i + 1] << 16)
6096 | (contents[i + 2] << 8)
6097 | contents[i + 3]
6098 : (contents[i + 3] << 24)
6099 | (contents[i + 2] << 16)
6100 | (contents[i + 1] << 8)
6101 | contents[i];
6102 unsigned int writemask = 0;
91d6fa6a 6103 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6104
6105 switch (state)
6106 {
6107 case 0:
91d6fa6a 6108 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6109 &numregs);
6110 /* I'm assuming the VFP11 erratum can trigger with denorm
6111 operands on either the FMAC or the DS pipeline. This might
6112 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6113 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6114 {
6115 state = use_vector ? 1 : 2;
6116 first_fmac = i;
6117 veneer_of_insn = insn;
6118 }
6119 break;
6120
6121 case 1:
6122 {
6123 int other_regs[3], other_numregs;
91d6fa6a 6124 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6125 other_regs,
6126 &other_numregs);
91d6fa6a 6127 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6128 && bfd_arm_vfp11_antidependency (writemask, regs,
6129 numregs))
6130 state = 3;
6131 else
6132 state = 2;
6133 }
6134 break;
6135
6136 case 2:
6137 {
6138 int other_regs[3], other_numregs;
91d6fa6a 6139 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6140 other_regs,
6141 &other_numregs);
91d6fa6a 6142 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6143 && bfd_arm_vfp11_antidependency (writemask, regs,
6144 numregs))
6145 state = 3;
6146 else
6147 {
6148 state = 0;
6149 next_i = first_fmac + 4;
6150 }
6151 }
6152 break;
6153
6154 case 3:
6155 abort (); /* Should be unreachable. */
6156 }
6157
6158 if (state == 3)
6159 {
21d799b5
NC		 6160 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6161 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6162
c7e2358a 6163 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6164
6165 newerr->u.b.vfp_insn = veneer_of_insn;
6166
6167 switch (span_type)
6168 {
6169 case 'a':
6170 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6171 break;
906e58ca 6172
c7b8f16e
JB		 6173 default:
6174 abort ();
6175 }
6176
6177 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6178 first_fmac);
6179
6180 newerr->vma = -1;
6181
6182 newerr->next = sec_data->erratumlist;
6183 sec_data->erratumlist = newerr;
6184
6185 state = 0;
6186 }
6187
6188 i = next_i;
6189 }
6190 }
906e58ca 6191
c7b8f16e
JB		 6192 if (contents != NULL
6193 && elf_section_data (sec)->this_hdr.contents != contents)
6194 free (contents);
6195 contents = NULL;
6196 }
6197
6198 return TRUE;
6199
6200error_return:
6201 if (contents != NULL
6202 && elf_section_data (sec)->this_hdr.contents != contents)
6203 free (contents);
906e58ca 6204
c7b8f16e
JB		 6205 return FALSE;
6206}
6207
6208/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6209 after sections have been laid out, using specially-named symbols. */
6210
6211void
6212bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6213 struct bfd_link_info *link_info)
6214{
6215 asection *sec;
6216 struct elf32_arm_link_hash_table *globals;
6217 char *tmp_name;
906e58ca 6218
c7b8f16e
JB		 6219 if (link_info->relocatable)
6220 return;
2e6030b9
MS		 6221
6222 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6223 if (! is_arm_elf (abfd))
2e6030b9
MS		 6224 return;
6225
c7b8f16e 6226 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6227 if (globals == NULL)
6228 return;
906e58ca 6229
21d799b5
NC		 6230 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6231 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6232
6233 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6234 {
6235 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6236 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6237
c7b8f16e
JB		 6238 for (; errnode != NULL; errnode = errnode->next)
6239 {
6240 struct elf_link_hash_entry *myh;
6241 bfd_vma vma;
6242
6243 switch (errnode->type)
6244 {
6245 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6246 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6247 /* Find veneer symbol. */
6248 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6249 errnode->u.b.veneer->u.v.id);
6250
6251 myh = elf_link_hash_lookup
6252 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6253
6254 if (myh == NULL)
6255 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6256 "`%s'"), abfd, tmp_name);
6257
6258 vma = myh->root.u.def.section->output_section->vma
6259 + myh->root.u.def.section->output_offset
6260 + myh->root.u.def.value;
6261
6262 errnode->u.b.veneer->vma = vma;
6263 break;
6264
6265 case VFP11_ERRATUM_ARM_VENEER:
6266 case VFP11_ERRATUM_THUMB_VENEER:
6267 /* Find return location. */
6268 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6269 errnode->u.v.id);
6270
6271 myh = elf_link_hash_lookup
6272 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6273
6274 if (myh == NULL)
6275 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6276 "`%s'"), abfd, tmp_name);
6277
6278 vma = myh->root.u.def.section->output_section->vma
6279 + myh->root.u.def.section->output_offset
6280 + myh->root.u.def.value;
6281
6282 errnode->u.v.branch->vma = vma;
6283 break;
906e58ca 6284
c7b8f16e
JB		 6285 default:
6286 abort ();
6287 }
6288 }
6289 }
906e58ca 6290
c7b8f16e
JB		 6291 free (tmp_name);
6292}
6293
6294
eb043451
PB		 6295/* Set target relocation values needed during linking. */
6296
6297void
bf21ed78
MS		 6298bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6299 struct bfd_link_info *link_info,
eb043451 6300 int target1_is_rel,
319850b4 6301 char * target2_type,
33bfe774 6302 int fix_v4bx,
c7b8f16e 6303 int use_blx,
bf21ed78 6304 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6305 int no_enum_warn, int no_wchar_warn,
48229727 6306 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6307{
6308 struct elf32_arm_link_hash_table *globals;
6309
6310 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6311 if (globals == NULL)
6312 return;
eb043451
PB		 6313
6314 globals->target1_is_rel = target1_is_rel;
6315 if (strcmp (target2_type, "rel") == 0)
6316 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6317 else if (strcmp (target2_type, "abs") == 0)
6318 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6319 else if (strcmp (target2_type, "got-rel") == 0)
6320 globals->target2_reloc = R_ARM_GOT_PREL;
6321 else
6322 {
6323 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6324 target2_type);
6325 }
319850b4 6326 globals->fix_v4bx = fix_v4bx;
33bfe774 6327 globals->use_blx |= use_blx;
c7b8f16e 6328 globals->vfp11_fix = vfp11_fix;
27e55c4d 6329 globals->pic_veneer = pic_veneer;
48229727 6330 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6331
0ffa91dd
NC		 6332 BFD_ASSERT (is_arm_elf (output_bfd));
6333 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6334 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6335}
eb043451 6336
12a0a0fd 6337/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6338
12a0a0fd
PB		 6339static void
6340insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6341{
6342 bfd_vma upper;
6343 bfd_vma lower;
6344 int reloc_sign;
6345
6346 BFD_ASSERT ((offset & 1) == 0);
6347
6348 upper = bfd_get_16 (abfd, insn);
6349 lower = bfd_get_16 (abfd, insn + 2);
6350 reloc_sign = (offset < 0) ? 1 : 0;
6351 upper = (upper & ~(bfd_vma) 0x7ff)
6352 | ((offset >> 12) & 0x3ff)
6353 | (reloc_sign << 10);
906e58ca 6354 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6355 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6356 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6357 | ((offset >> 1) & 0x7ff);
6358 bfd_put_16 (abfd, upper, insn);
6359 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6360}
6361
9b485d32
NC		 6362/* Thumb code calling an ARM function. */
6363
252b5132 6364static int
57e8b36a
NC		 6365elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6366 const char * name,
6367 bfd * input_bfd,
6368 bfd * output_bfd,
6369 asection * input_section,
6370 bfd_byte * hit_data,
6371 asection * sym_sec,
6372 bfd_vma offset,
6373 bfd_signed_vma addend,
f2a9dd69
DJ		 6374 bfd_vma val,
6375 char **error_message)
252b5132 6376{
bcbdc74c 6377 asection * s = 0;
dc810e39 6378 bfd_vma my_offset;
252b5132 6379 long int ret_offset;
bcbdc74c
NC		 6380 struct elf_link_hash_entry * myh;
6381 struct elf32_arm_link_hash_table * globals;
252b5132 6382
f2a9dd69 6383 myh = find_thumb_glue (info, name, error_message);
252b5132 6384 if (myh == NULL)
b34976b6 6385 return FALSE;
252b5132
RH		 6386
6387 globals = elf32_arm_hash_table (info);
252b5132
RH		 6388 BFD_ASSERT (globals != NULL);
6389 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6390
6391 my_offset = myh->root.u.def.value;
6392
6393 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6394 THUMB2ARM_GLUE_SECTION_NAME);
6395
6396 BFD_ASSERT (s != NULL);
6397 BFD_ASSERT (s->contents != NULL);
6398 BFD_ASSERT (s->output_section != NULL);
6399
6400 if ((my_offset & 0x01) == 0x01)
6401 {
6402 if (sym_sec != NULL
6403 && sym_sec->owner != NULL
6404 && !INTERWORK_FLAG (sym_sec->owner))
6405 {
8f615d07 6406 (*_bfd_error_handler)
d003868e
AM		 6407 (_("%B(%s): warning: interworking not enabled.\n"
6408 " first occurrence: %B: thumb call to arm"),
6409 sym_sec->owner, input_bfd, name);
252b5132 6410
b34976b6 6411 return FALSE;
252b5132
RH		 6412 }
6413
6414 --my_offset;
6415 myh->root.u.def.value = my_offset;
6416
52ab56c2
PB		 6417 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6418 s->contents + my_offset);
252b5132 6419
52ab56c2
PB		 6420 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6421 s->contents + my_offset + 2);
252b5132
RH		 6422
6423 ret_offset =
9b485d32
NC		 6424 /* Address of destination of the stub. */
6425 ((bfd_signed_vma) val)
252b5132 6426 - ((bfd_signed_vma)
57e8b36a
NC		 6427 /* Offset from the start of the current section
6428 to the start of the stubs. */
9b485d32
NC		 6429 (s->output_offset
6430 /* Offset of the start of this stub from the start of the stubs. */
6431 + my_offset
6432 /* Address of the start of the current section. */
6433 + s->output_section->vma)
6434 /* The branch instruction is 4 bytes into the stub. */
6435 + 4
6436 /* ARM branches work from the pc of the instruction + 8. */
6437 + 8);
252b5132 6438
52ab56c2
PB		 6439 put_arm_insn (globals, output_bfd,
6440 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6441 s->contents + my_offset + 4);
252b5132
RH		 6442 }
6443
6444 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6445
427bfd90
NC		 6446 /* Now go back and fix up the original BL insn to point to here. */
6447 ret_offset =
6448 /* Address of where the stub is located. */
6449 (s->output_section->vma + s->output_offset + my_offset)
6450 /* Address of where the BL is located. */
57e8b36a
NC		 6451 - (input_section->output_section->vma + input_section->output_offset
6452 + offset)
427bfd90
NC		 6453 /* Addend in the relocation. */
6454 - addend
6455 /* Biassing for PC-relative addressing. */
6456 - 8;
252b5132 6457
12a0a0fd 6458 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6459
b34976b6 6460 return TRUE;
252b5132
RH		 6461}
6462
a4fd1a8e 6463/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6464
a4fd1a8e
PB		 6465static struct elf_link_hash_entry *
6466elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6467 const char * name,
6468 bfd * input_bfd,
6469 bfd * output_bfd,
6470 asection * sym_sec,
6471 bfd_vma val,
8029a119
NC		 6472 asection * s,
6473 char ** error_message)
252b5132 6474{
dc810e39 6475 bfd_vma my_offset;
252b5132 6476 long int ret_offset;
bcbdc74c
NC		 6477 struct elf_link_hash_entry * myh;
6478 struct elf32_arm_link_hash_table * globals;
252b5132 6479
f2a9dd69 6480 myh = find_arm_glue (info, name, error_message);
252b5132 6481 if (myh == NULL)
a4fd1a8e 6482 return NULL;
252b5132
RH		 6483
6484 globals = elf32_arm_hash_table (info);
252b5132
RH		 6485 BFD_ASSERT (globals != NULL);
6486 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6487
6488 my_offset = myh->root.u.def.value;
252b5132
RH		 6489
6490 if ((my_offset & 0x01) == 0x01)
6491 {
6492 if (sym_sec != NULL
6493 && sym_sec->owner != NULL
6494 && !INTERWORK_FLAG (sym_sec->owner))
6495 {
8f615d07 6496 (*_bfd_error_handler)
d003868e
AM		 6497 (_("%B(%s): warning: interworking not enabled.\n"
6498 " first occurrence: %B: arm call to thumb"),
6499 sym_sec->owner, input_bfd, name);
252b5132 6500 }
9b485d32 6501
252b5132
RH		 6502 --my_offset;
6503 myh->root.u.def.value = my_offset;
6504
27e55c4d
PB		 6505 if (info->shared || globals->root.is_relocatable_executable
6506 || globals->pic_veneer)
8f6277f5
PB		 6507 {
6508 /* For relocatable objects we can't use absolute addresses,
6509 so construct the address from a relative offset. */
6510 /* TODO: If the offset is small it's probably worth
6511 constructing the address with adds. */
52ab56c2
PB		 6512 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6513 s->contents + my_offset);
6514 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6515 s->contents + my_offset + 4);
6516 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6517 s->contents + my_offset + 8);
8f6277f5
PB		 6518 /* Adjust the offset by 4 for the position of the add,
6519 and 8 for the pipeline offset. */
6520 ret_offset = (val - (s->output_offset
6521 + s->output_section->vma
6522 + my_offset + 12))
6523 | 1;
6524 bfd_put_32 (output_bfd, ret_offset,
6525 s->contents + my_offset + 12);
6526 }
26079076
PB		 6527 else if (globals->use_blx)
6528 {
6529 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6530 s->contents + my_offset);
6531
6532 /* It's a thumb address. Add the low order bit. */
6533 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6534 s->contents + my_offset + 4);
6535 }
8f6277f5
PB		 6536 else
6537 {
52ab56c2
PB		 6538 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6539 s->contents + my_offset);
252b5132 6540
52ab56c2
PB		 6541 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6542 s->contents + my_offset + 4);
252b5132 6543
8f6277f5
PB		 6544 /* It's a thumb address. Add the low order bit. */
6545 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6546 s->contents + my_offset + 8);
8029a119
NC		 6547
6548 my_offset += 12;
8f6277f5 6549 }
252b5132
RH		 6550 }
6551
6552 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6553
a4fd1a8e
PB		 6554 return myh;
6555}
6556
6557/* Arm code calling a Thumb function. */
6558
6559static int
6560elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6561 const char * name,
6562 bfd * input_bfd,
6563 bfd * output_bfd,
6564 asection * input_section,
6565 bfd_byte * hit_data,
6566 asection * sym_sec,
6567 bfd_vma offset,
6568 bfd_signed_vma addend,
f2a9dd69
DJ		 6569 bfd_vma val,
6570 char **error_message)
a4fd1a8e
PB		 6571{
6572 unsigned long int tmp;
6573 bfd_vma my_offset;
6574 asection * s;
6575 long int ret_offset;
6576 struct elf_link_hash_entry * myh;
6577 struct elf32_arm_link_hash_table * globals;
6578
6579 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6580 BFD_ASSERT (globals != NULL);
6581 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6582
6583 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6584 ARM2THUMB_GLUE_SECTION_NAME);
6585 BFD_ASSERT (s != NULL);
6586 BFD_ASSERT (s->contents != NULL);
6587 BFD_ASSERT (s->output_section != NULL);
6588
6589 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6590 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6591 if (!myh)
6592 return FALSE;
6593
6594 my_offset = myh->root.u.def.value;
252b5132
RH		 6595 tmp = bfd_get_32 (input_bfd, hit_data);
6596 tmp = tmp & 0xFF000000;
6597
9b485d32 6598 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6599 ret_offset = (s->output_offset
6600 + my_offset
6601 + s->output_section->vma
6602 - (input_section->output_offset
6603 + input_section->output_section->vma
6604 + offset + addend)
6605 - 8);
9a5aca8c 6606
252b5132
RH		 6607 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6608
dc810e39 6609 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6610
b34976b6 6611 return TRUE;
252b5132
RH		 6612}
6613
a4fd1a8e
PB		 6614/* Populate Arm stub for an exported Thumb function. */
6615
6616static bfd_boolean
6617elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6618{
6619 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6620 asection * s;
6621 struct elf_link_hash_entry * myh;
6622 struct elf32_arm_link_hash_entry *eh;
6623 struct elf32_arm_link_hash_table * globals;
6624 asection *sec;
6625 bfd_vma val;
f2a9dd69 6626 char *error_message;
a4fd1a8e 6627
906e58ca 6628 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6629 /* Allocate stubs for exported Thumb functions on v4t. */
6630 if (eh->export_glue == NULL)
6631 return TRUE;
6632
6633 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6634 BFD_ASSERT (globals != NULL);
6635 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6636
6637 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6638 ARM2THUMB_GLUE_SECTION_NAME);
6639 BFD_ASSERT (s != NULL);
6640 BFD_ASSERT (s->contents != NULL);
6641 BFD_ASSERT (s->output_section != NULL);
6642
6643 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6644
6645 BFD_ASSERT (sec->output_section != NULL);
6646
a4fd1a8e
PB		 6647 val = eh->export_glue->root.u.def.value + sec->output_offset
6648 + sec->output_section->vma;
8029a119 6649
a4fd1a8e
PB		 6650 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6651 h->root.u.def.section->owner,
f2a9dd69
DJ		 6652 globals->obfd, sec, val, s,
6653 &error_message);
a4fd1a8e
PB		 6654 BFD_ASSERT (myh);
6655 return TRUE;
6656}
6657
845b51d6
PB		 6658/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6659
6660static bfd_vma
6661elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6662{
6663 bfd_byte *p;
6664 bfd_vma glue_addr;
6665 asection *s;
6666 struct elf32_arm_link_hash_table *globals;
6667
6668 globals = elf32_arm_hash_table (info);
845b51d6
PB		 6669 BFD_ASSERT (globals != NULL);
6670 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6671
6672 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6673 ARM_BX_GLUE_SECTION_NAME);
6674 BFD_ASSERT (s != NULL);
6675 BFD_ASSERT (s->contents != NULL);
6676 BFD_ASSERT (s->output_section != NULL);
6677
6678 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6679
6680 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6681
6682 if ((globals->bx_glue_offset[reg] & 1) == 0)
6683 {
6684 p = s->contents + glue_addr;
6685 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6686 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6687 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6688 globals->bx_glue_offset[reg] |= 1;
6689 }
6690
6691 return glue_addr + s->output_section->vma + s->output_offset;
6692}
6693
a4fd1a8e
PB		 6694/* Generate Arm stubs for exported Thumb symbols. */
6695static void
906e58ca 6696elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6697 struct bfd_link_info *link_info)
6698{
6699 struct elf32_arm_link_hash_table * globals;
6700
8029a119
NC		 6701 if (link_info == NULL)
6702 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6703 return;
6704
6705 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6706 if (globals == NULL)
6707 return;
6708
84c08195
PB		 6709 /* If blx is available then exported Thumb symbols are OK and there is
6710 nothing to do. */
a4fd1a8e
PB		 6711 if (globals->use_blx)
6712 return;
6713
6714 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6715 link_info);
6716}
6717
eb043451
PB		 6718/* Some relocations map to different relocations depending on the
6719 target. Return the real relocation. */
8029a119 6720
eb043451
PB		 6721static int
6722arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6723 int r_type)
6724{
6725 switch (r_type)
6726 {
6727 case R_ARM_TARGET1:
6728 if (globals->target1_is_rel)
6729 return R_ARM_REL32;
6730 else
6731 return R_ARM_ABS32;
6732
6733 case R_ARM_TARGET2:
6734 return globals->target2_reloc;
6735
6736 default:
6737 return r_type;
6738 }
6739}
eb043451 6740
ba93b8ac
DJ		 6741/* Return the base VMA address which should be subtracted from real addresses
6742 when resolving @dtpoff relocation.
6743 This is PT_TLS segment p_vaddr. */
6744
6745static bfd_vma
6746dtpoff_base (struct bfd_link_info *info)
6747{
6748 /* If tls_sec is NULL, we should have signalled an error already. */
6749 if (elf_hash_table (info)->tls_sec == NULL)
6750 return 0;
6751 return elf_hash_table (info)->tls_sec->vma;
6752}
6753
6754/* Return the relocation value for @tpoff relocation
6755 if STT_TLS virtual address is ADDRESS. */
6756
6757static bfd_vma
6758tpoff (struct bfd_link_info *info, bfd_vma address)
6759{
6760 struct elf_link_hash_table *htab = elf_hash_table (info);
6761 bfd_vma base;
6762
6763 /* If tls_sec is NULL, we should have signalled an error already. */
6764 if (htab->tls_sec == NULL)
6765 return 0;
6766 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6767 return address - htab->tls_sec->vma + base;
6768}
6769
00a97672
RS		 6770/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6771 VALUE is the relocation value. */
6772
6773static bfd_reloc_status_type
6774elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6775{
6776 if (value > 0xfff)
6777 return bfd_reloc_overflow;
6778
6779 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6780 bfd_put_32 (abfd, value, data);
6781 return bfd_reloc_ok;
6782}
6783
4962c51a
MS		 6784/* For a given value of n, calculate the value of G_n as required to
6785 deal with group relocations. We return it in the form of an
6786 encoded constant-and-rotation, together with the final residual. If n is
6787 specified as less than zero, then final_residual is filled with the
6788 input value and no further action is performed. */
6789
6790static bfd_vma
6791calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6792{
6793 int current_n;
6794 bfd_vma g_n;
6795 bfd_vma encoded_g_n = 0;
6796 bfd_vma residual = value; /* Also known as Y_n. */
6797
6798 for (current_n = 0; current_n <= n; current_n++)
6799 {
6800 int shift;
6801
6802 /* Calculate which part of the value to mask. */
6803 if (residual == 0)
6804 shift = 0;
6805 else
6806 {
6807 int msb;
6808
6809 /* Determine the most significant bit in the residual and
6810 align the resulting value to a 2-bit boundary. */
6811 for (msb = 30; msb >= 0; msb -= 2)
6812 if (residual & (3 << msb))
6813 break;
6814
6815 /* The desired shift is now (msb - 6), or zero, whichever
6816 is the greater. */
6817 shift = msb - 6;
6818 if (shift < 0)
6819 shift = 0;
6820 }
6821
6822 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6823 g_n = residual & (0xff << shift);
6824 encoded_g_n = (g_n >> shift)
6825 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6826
6827 /* Calculate the residual for the next time around. */
6828 residual &= ~g_n;
6829 }
6830
6831 *final_residual = residual;
6832
6833 return encoded_g_n;
6834}
6835
6836/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6837 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6838
4962c51a 6839static int
906e58ca 6840identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6841{
6842 int opcode = insn & 0x1e00000;
6843
6844 if (opcode == 1 << 23) /* ADD */
6845 return 1;
6846
6847 if (opcode == 1 << 22) /* SUB */
6848 return -1;
6849
6850 return 0;
6851}
6852
252b5132 6853/* Perform a relocation as part of a final link. */
9b485d32 6854
252b5132 6855static bfd_reloc_status_type
57e8b36a
NC		 6856elf32_arm_final_link_relocate (reloc_howto_type * howto,
6857 bfd * input_bfd,
6858 bfd * output_bfd,
6859 asection * input_section,
6860 bfd_byte * contents,
6861 Elf_Internal_Rela * rel,
6862 bfd_vma value,
6863 struct bfd_link_info * info,
6864 asection * sym_sec,
6865 const char * sym_name,
6866 int sym_flags,
0945cdfd 6867 struct elf_link_hash_entry * h,
f2a9dd69 6868 bfd_boolean * unresolved_reloc_p,
8029a119 6869 char ** error_message)
252b5132
RH		 6870{
6871 unsigned long r_type = howto->type;
6872 unsigned long r_symndx;
6873 bfd_byte * hit_data = contents + rel->r_offset;
6874 bfd * dynobj = NULL;
252b5132
RH		 6875 bfd_vma * local_got_offsets;
6876 asection * sgot = NULL;
6877 asection * splt = NULL;
6878 asection * sreloc = NULL;
252b5132 6879 bfd_vma addend;
ba96a88f
NC		 6880 bfd_signed_vma signed_addend;
6881 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6882
9c504268 6883 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 6884 if (globals == NULL)
6885 return bfd_reloc_notsupported;
9c504268 6886
0ffa91dd
NC		 6887 BFD_ASSERT (is_arm_elf (input_bfd));
6888
6889 /* Some relocation types map to different relocations depending on the
9c504268 6890 target. We pick the right one here. */
eb043451
PB		 6891 r_type = arm_real_reloc_type (globals, r_type);
6892 if (r_type != howto->type)
6893 howto = elf32_arm_howto_from_type (r_type);
9c504268 6894
cac15327
NC		 6895 /* If the start address has been set, then set the EF_ARM_HASENTRY
6896 flag. Setting this more than once is redundant, but the cost is
6897 not too high, and it keeps the code simple.
99e4ae17 6898
cac15327
NC		 6899 The test is done here, rather than somewhere else, because the
6900 start address is only set just before the final link commences.
6901
6902 Note - if the user deliberately sets a start address of 0, the
6903 flag will not be set. */
6904 if (bfd_get_start_address (output_bfd) != 0)
6905 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6906
252b5132
RH		 6907 dynobj = elf_hash_table (info)->dynobj;
6908 if (dynobj)
6909 {
6910 sgot = bfd_get_section_by_name (dynobj, ".got");
6911 splt = bfd_get_section_by_name (dynobj, ".plt");
6912 }
252b5132
RH		 6913 local_got_offsets = elf_local_got_offsets (input_bfd);
6914 r_symndx = ELF32_R_SYM (rel->r_info);
6915
4e7fd91e 6916 if (globals->use_rel)
ba96a88f 6917 {
4e7fd91e
PB		 6918 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6919
6920 if (addend & ((howto->src_mask + 1) >> 1))
6921 {
6922 signed_addend = -1;
6923 signed_addend &= ~ howto->src_mask;
6924 signed_addend |= addend;
6925 }
6926 else
6927 signed_addend = addend;
ba96a88f
NC		 6928 }
6929 else
4e7fd91e 6930 addend = signed_addend = rel->r_addend;
f21f3fe0 6931
252b5132
RH		 6932 switch (r_type)
6933 {
6934 case R_ARM_NONE:
28a094c2
DJ		 6935 /* We don't need to find a value for this symbol. It's just a
6936 marker. */
6937 *unresolved_reloc_p = FALSE;
252b5132
RH		 6938 return bfd_reloc_ok;
6939
00a97672
RS		 6940 case R_ARM_ABS12:
6941 if (!globals->vxworks_p)
6942 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6943
252b5132
RH		 6944 case R_ARM_PC24:
6945 case R_ARM_ABS32:
bb224fc3 6946 case R_ARM_ABS32_NOI:
252b5132 6947 case R_ARM_REL32:
bb224fc3 6948 case R_ARM_REL32_NOI:
5b5bb741
PB		 6949 case R_ARM_CALL:
6950 case R_ARM_JUMP24:
dfc5f959 6951 case R_ARM_XPC25:
eb043451 6952 case R_ARM_PREL31:
7359ea65 6953 case R_ARM_PLT32:
7359ea65
DJ		 6954 /* Handle relocations which should use the PLT entry. ABS32/REL32
6955 will use the symbol's value, which may point to a PLT entry, but we
6956 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6957 branches in this object should go to it, except if the PLT is too
6958 far away, in which case a long branch stub should be inserted. */
bb224fc3 6959 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6960 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6961 && r_type != R_ARM_CALL
6962 && r_type != R_ARM_JUMP24
6963 && r_type != R_ARM_PLT32)
7359ea65 6964 && h != NULL
c84cd8ee 6965 && splt != NULL
7359ea65
DJ		 6966 && h->plt.offset != (bfd_vma) -1)
6967 {
c84cd8ee
DJ		 6968 /* If we've created a .plt section, and assigned a PLT entry to
6969 this function, it should not be known to bind locally. If
6970 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6971 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6972
6973 value = (splt->output_section->vma
6974 + splt->output_offset
6975 + h->plt.offset);
0945cdfd 6976 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6977 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6978 contents, rel->r_offset, value,
00a97672 6979 rel->r_addend);
7359ea65
DJ		 6980 }
6981
67687978
PB		 6982 /* When generating a shared object or relocatable executable, these
6983 relocations are copied into the output file to be resolved at
6984 run time. */
6985 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6986 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 6987 && !(globals->vxworks_p
3348747a
NS		 6988 && strcmp (input_section->output_section->name,
6989 ".tls_vars") == 0)
bb224fc3 6990 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6991 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 6992 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 6993 && (h == NULL
6994 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6995 || h->root.type != bfd_link_hash_undefweak)
6996 && r_type != R_ARM_PC24
5b5bb741
PB		 6997 && r_type != R_ARM_CALL
6998 && r_type != R_ARM_JUMP24
ee06dc07 6999 && r_type != R_ARM_PREL31
7359ea65 7000 && r_type != R_ARM_PLT32)
252b5132 7001 {
947216bf
AM		 7002 Elf_Internal_Rela outrel;
7003 bfd_byte *loc;
b34976b6 7004 bfd_boolean skip, relocate;
f21f3fe0 7005
0945cdfd
DJ		 7006 *unresolved_reloc_p = FALSE;
7007
252b5132
RH		 7008 if (sreloc == NULL)
7009 {
83bac4b0
NC		 7010 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
7011 ! globals->use_rel);
f21f3fe0 7012
83bac4b0 7013 if (sreloc == NULL)
252b5132 7014 return bfd_reloc_notsupported;
252b5132 7015 }
f21f3fe0 7016
b34976b6
AM		 7017 skip = FALSE;
7018 relocate = FALSE;
f21f3fe0 7019
00a97672 7020 outrel.r_addend = addend;
c629eae0
JJ		 7021 outrel.r_offset =
7022 _bfd_elf_section_offset (output_bfd, info, input_section,
7023 rel->r_offset);
7024 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 7025 skip = TRUE;
0bb2d96a 7026 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 7027 skip = TRUE, relocate = TRUE;
252b5132
RH		 7028 outrel.r_offset += (input_section->output_section->vma
7029 + input_section->output_offset);
f21f3fe0 7030
252b5132 7031 if (skip)
0bb2d96a 7032 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 7033 else if (h != NULL
7034 && h->dynindx != -1
7359ea65 7035 && (!info->shared
5e681ec4 7036 || !info->symbolic
f5385ebf 7037 || !h->def_regular))
5e681ec4 7038 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 7039 else
7040 {
a16385dc
MM		 7041 int symbol;
7042
5e681ec4 7043 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 7044 if (sym_flags == STT_ARM_TFUNC)
7045 value |= 1;
a16385dc 7046 if (globals->symbian_p)
6366ff1e 7047 {
74541ad4
AM		 7048 asection *osec;
7049
6366ff1e
MM		 7050 /* On Symbian OS, the data segment and text segement
7051 can be relocated independently. Therefore, we
7052 must indicate the segment to which this
7053 relocation is relative. The BPABI allows us to
7054 use any symbol in the right segment; we just use
7055 the section symbol as it is convenient. (We
7056 cannot use the symbol given by "h" directly as it
74541ad4
AM		 7057 will not appear in the dynamic symbol table.)
7058
7059 Note that the dynamic linker ignores the section
7060 symbol value, so we don't subtract osec->vma
7061 from the emitted reloc addend. */
10dbd1f3 7062 if (sym_sec)
74541ad4 7063 osec = sym_sec->output_section;
10dbd1f3 7064 else
74541ad4
AM		 7065 osec = input_section->output_section;
7066 symbol = elf_section_data (osec)->dynindx;
7067 if (symbol == 0)
7068 {
7069 struct elf_link_hash_table *htab = elf_hash_table (info);
7070
7071 if ((osec->flags & SEC_READONLY) == 0
7072 && htab->data_index_section != NULL)
7073 osec = htab->data_index_section;
7074 else
7075 osec = htab->text_index_section;
7076 symbol = elf_section_data (osec)->dynindx;
7077 }
6366ff1e
MM		 7078 BFD_ASSERT (symbol != 0);
7079 }
a16385dc
MM		 7080 else
7081 /* On SVR4-ish systems, the dynamic loader cannot
7082 relocate the text and data segments independently,
7083 so the symbol does not matter. */
7084 symbol = 0;
7085 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 7086 if (globals->use_rel)
7087 relocate = TRUE;
7088 else
7089 outrel.r_addend += value;
252b5132 7090 }
f21f3fe0 7091
947216bf 7092 loc = sreloc->contents;
00a97672
RS		 7093 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
7094 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 7095
f21f3fe0 7096 /* If this reloc is against an external symbol, we do not want to
252b5132 7097 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 7098 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 7099 if (! relocate)
7100 return bfd_reloc_ok;
9a5aca8c 7101
f21f3fe0 7102 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 7103 contents, rel->r_offset, value,
7104 (bfd_vma) 0);
7105 }
7106 else switch (r_type)
7107 {
00a97672
RS		 7108 case R_ARM_ABS12:
7109 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7110
dfc5f959 7111 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 7112 case R_ARM_CALL:
7113 case R_ARM_JUMP24:
8029a119 7114 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 7115 case R_ARM_PLT32:
906e58ca 7116 {
906e58ca
NC		 7117 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7118
dfc5f959 7119 if (r_type == R_ARM_XPC25)
252b5132 7120 {
dfc5f959
NC		 7121 /* Check for Arm calling Arm function. */
7122 /* FIXME: Should we translate the instruction into a BL
7123 instruction instead ? */
7124 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 7125 (*_bfd_error_handler)
7126 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7127 input_bfd,
7128 h ? h->root.root.string : "(local)");
dfc5f959 7129 }
155d87d7 7130 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7131 {
7132 /* Check for Arm calling Thumb function. */
7133 if (sym_flags == STT_ARM_TFUNC)
7134 {
f2a9dd69
DJ		 7135 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7136 output_bfd, input_section,
7137 hit_data, sym_sec, rel->r_offset,
7138 signed_addend, value,
7139 error_message))
7140 return bfd_reloc_ok;
7141 else
7142 return bfd_reloc_dangerous;
dfc5f959 7143 }
252b5132 7144 }
ba96a88f 7145
906e58ca 7146 /* Check if a stub has to be inserted because the
8029a119 7147 destination is too far or we are changing mode. */
155d87d7
CL		 7148 if ( r_type == R_ARM_CALL
7149 || r_type == R_ARM_JUMP24
7150 || r_type == R_ARM_PLT32)
906e58ca 7151 {
fe33d2fa
CL		 7152 enum elf32_arm_stub_type stub_type = arm_stub_none;
7153 struct elf32_arm_link_hash_entry *hash;
7154
7155 hash = (struct elf32_arm_link_hash_entry *) h;
7156 stub_type = arm_type_of_stub (info, input_section, rel,
7157 &sym_flags, hash,
7158 value, sym_sec,
7159 input_bfd, sym_name);
5fa9e92f 7160
fe33d2fa 7161 if (stub_type != arm_stub_none)
906e58ca
NC		 7162 {
7163 /* The target is out of reach, so redirect the
7164 branch to the local stub for this function. */
7165
7166 stub_entry = elf32_arm_get_stub_entry (input_section,
7167 sym_sec, h,
fe33d2fa
CL		 7168 rel, globals,
7169 stub_type);
906e58ca
NC		 7170 if (stub_entry != NULL)
7171 value = (stub_entry->stub_offset
7172 + stub_entry->stub_sec->output_offset
7173 + stub_entry->stub_sec->output_section->vma);
7174 }
fe33d2fa
CL		 7175 else
7176 {
7177 /* If the call goes through a PLT entry, make sure to
7178 check distance to the right destination address. */
7179 if (h != NULL
7180 && splt != NULL
7181 && h->plt.offset != (bfd_vma) -1)
7182 {
7183 value = (splt->output_section->vma
7184 + splt->output_offset
7185 + h->plt.offset);
7186 *unresolved_reloc_p = FALSE;
7187 /* The PLT entry is in ARM mode, regardless of the
7188 target function. */
7189 sym_flags = STT_FUNC;
7190 }
7191 }
906e58ca
NC		 7192 }
7193
dea514f5
PB		 7194 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7195 where:
7196 S is the address of the symbol in the relocation.
7197 P is address of the instruction being relocated.
7198 A is the addend (extracted from the instruction) in bytes.
7199
7200 S is held in 'value'.
7201 P is the base address of the section containing the
7202 instruction plus the offset of the reloc into that
7203 section, ie:
7204 (input_section->output_section->vma +
7205 input_section->output_offset +
7206 rel->r_offset).
7207 A is the addend, converted into bytes, ie:
7208 (signed_addend * 4)
7209
7210 Note: None of these operations have knowledge of the pipeline
7211 size of the processor, thus it is up to the assembler to
7212 encode this information into the addend. */
7213 value -= (input_section->output_section->vma
7214 + input_section->output_offset);
7215 value -= rel->r_offset;
4e7fd91e
PB		 7216 if (globals->use_rel)
7217 value += (signed_addend << howto->size);
7218 else
7219 /* RELA addends do not have to be adjusted by howto->size. */
7220 value += signed_addend;
23080146 7221
dcb5e6e6
NC		 7222 signed_addend = value;
7223 signed_addend >>= howto->rightshift;
9a5aca8c 7224
5ab79981 7225 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7226 the next instruction unless a PLT entry will be created.
cd1dac3d
DG		 7227 Do the same for local undefined symbols.
7228 The jump to the next instruction is optimized as a NOP depending
7229 on the architecture. */
ffcb4889
NS		 7230 if (h ? (h->root.type == bfd_link_hash_undefweak
7231 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7232 : bfd_is_und_section (sym_sec))
5ab79981 7233 {
cd1dac3d
DG		 7234 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7235
7236 if (arch_has_arm_nop (globals))
7237 value |= 0x0320f000;
7238 else
7239 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7240 }
7241 else
59f2c4e7 7242 {
9b485d32 7243 /* Perform a signed range check. */
dcb5e6e6 7244 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7245 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7246 return bfd_reloc_overflow;
9a5aca8c 7247
5ab79981 7248 addend = (value & 2);
39b41c9c 7249
5ab79981
PB		 7250 value = (signed_addend & howto->dst_mask)
7251 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7252
5ab79981
PB		 7253 if (r_type == R_ARM_CALL)
7254 {
155d87d7
CL		 7255 /* Set the H bit in the BLX instruction. */
7256 if (sym_flags == STT_ARM_TFUNC)
7257 {
7258 if (addend)
7259 value |= (1 << 24);
7260 else
7261 value &= ~(bfd_vma)(1 << 24);
7262 }
7263
5ab79981 7264 /* Select the correct instruction (BL or BLX). */
906e58ca 7265 /* Only if we are not handling a BL to a stub. In this
8029a119 7266 case, mode switching is performed by the stub. */
906e58ca 7267 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7268 value |= (1 << 28);
7269 else
7270 {
7271 value &= ~(bfd_vma)(1 << 28);
7272 value |= (1 << 24);
7273 }
39b41c9c
PB		 7274 }
7275 }
906e58ca 7276 }
252b5132 7277 break;
f21f3fe0 7278
252b5132
RH		 7279 case R_ARM_ABS32:
7280 value += addend;
7281 if (sym_flags == STT_ARM_TFUNC)
7282 value |= 1;
7283 break;
f21f3fe0 7284
bb224fc3
MS		 7285 case R_ARM_ABS32_NOI:
7286 value += addend;
7287 break;
7288
252b5132 7289 case R_ARM_REL32:
a8bc6c78
PB		 7290 value += addend;
7291 if (sym_flags == STT_ARM_TFUNC)
7292 value |= 1;
252b5132 7293 value -= (input_section->output_section->vma
62efb346 7294 + input_section->output_offset + rel->r_offset);
252b5132 7295 break;
eb043451 7296
bb224fc3
MS		 7297 case R_ARM_REL32_NOI:
7298 value += addend;
7299 value -= (input_section->output_section->vma
7300 + input_section->output_offset + rel->r_offset);
7301 break;
7302
eb043451
PB		 7303 case R_ARM_PREL31:
7304 value -= (input_section->output_section->vma
7305 + input_section->output_offset + rel->r_offset);
7306 value += signed_addend;
7307 if (! h || h->root.type != bfd_link_hash_undefweak)
7308 {
8029a119 7309 /* Check for overflow. */
eb043451
PB		 7310 if ((value ^ (value >> 1)) & (1 << 30))
7311 return bfd_reloc_overflow;
7312 }
7313 value &= 0x7fffffff;
7314 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7315 if (sym_flags == STT_ARM_TFUNC)
7316 value |= 1;
7317 break;
252b5132 7318 }
f21f3fe0 7319
252b5132
RH		 7320 bfd_put_32 (input_bfd, value, hit_data);
7321 return bfd_reloc_ok;
7322
7323 case R_ARM_ABS8:
7324 value += addend;
4e67d4ca
DG		 7325
7326 /* There is no way to tell whether the user intended to use a signed or
7327 unsigned addend. When checking for overflow we accept either,
7328 as specified by the AAELF. */
7329 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 7330 return bfd_reloc_overflow;
7331
7332 bfd_put_8 (input_bfd, value, hit_data);
7333 return bfd_reloc_ok;
7334
7335 case R_ARM_ABS16:
7336 value += addend;
7337
4e67d4ca
DG		 7338 /* See comment for R_ARM_ABS8. */
7339 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 7340 return bfd_reloc_overflow;
7341
7342 bfd_put_16 (input_bfd, value, hit_data);
7343 return bfd_reloc_ok;
7344
252b5132 7345 case R_ARM_THM_ABS5:
9b485d32 7346 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7347 if (globals->use_rel)
7348 {
7349 /* Need to refetch addend. */
7350 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7351 /* ??? Need to determine shift amount from operand size. */
7352 addend >>= howto->rightshift;
7353 }
252b5132
RH		 7354 value += addend;
7355
7356 /* ??? Isn't value unsigned? */
7357 if ((long) value > 0x1f || (long) value < -0x10)
7358 return bfd_reloc_overflow;
7359
7360 /* ??? Value needs to be properly shifted into place first. */
7361 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7362 bfd_put_16 (input_bfd, value, hit_data);
7363 return bfd_reloc_ok;
7364
2cab6cc3
MS		 7365 case R_ARM_THM_ALU_PREL_11_0:
7366 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7367 {
7368 bfd_vma insn;
7369 bfd_signed_vma relocation;
7370
7371 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7372 | bfd_get_16 (input_bfd, hit_data + 2);
7373
7374 if (globals->use_rel)
7375 {
7376 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7377 | ((insn & (1 << 26)) >> 15);
7378 if (insn & 0xf00000)
7379 signed_addend = -signed_addend;
7380 }
7381
7382 relocation = value + signed_addend;
7383 relocation -= (input_section->output_section->vma
7384 + input_section->output_offset
7385 + rel->r_offset);
7386
7387 value = abs (relocation);
7388
7389 if (value >= 0x1000)
7390 return bfd_reloc_overflow;
7391
7392 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7393 | ((value & 0x700) << 4)
7394 | ((value & 0x800) << 15);
7395 if (relocation < 0)
7396 insn |= 0xa00000;
7397
7398 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7399 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7400
7401 return bfd_reloc_ok;
7402 }
7403
e1ec24c6
NC		 7404 case R_ARM_THM_PC8:
7405 /* PR 10073: This reloc is not generated by the GNU toolchain,
7406 but it is supported for compatibility with third party libraries
7407 generated by other compilers, specifically the ARM/IAR. */
7408 {
7409 bfd_vma insn;
7410 bfd_signed_vma relocation;
7411
7412 insn = bfd_get_16 (input_bfd, hit_data);
7413
7414 if (globals->use_rel)
7415 addend = (insn & 0x00ff) << 2;
7416
7417 relocation = value + addend;
7418 relocation -= (input_section->output_section->vma
7419 + input_section->output_offset
7420 + rel->r_offset);
7421
7422 value = abs (relocation);
7423
7424 /* We do not check for overflow of this reloc. Although strictly
7425 speaking this is incorrect, it appears to be necessary in order
7426 to work with IAR generated relocs. Since GCC and GAS do not
7427 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7428 a problem for them. */
7429 value &= 0x3fc;
7430
7431 insn = (insn & 0xff00) | (value >> 2);
7432
7433 bfd_put_16 (input_bfd, insn, hit_data);
7434
7435 return bfd_reloc_ok;
7436 }
7437
2cab6cc3
MS		 7438 case R_ARM_THM_PC12:
7439 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7440 {
7441 bfd_vma insn;
7442 bfd_signed_vma relocation;
7443
7444 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7445 | bfd_get_16 (input_bfd, hit_data + 2);
7446
7447 if (globals->use_rel)
7448 {
7449 signed_addend = insn & 0xfff;
7450 if (!(insn & (1 << 23)))
7451 signed_addend = -signed_addend;
7452 }
7453
7454 relocation = value + signed_addend;
7455 relocation -= (input_section->output_section->vma
7456 + input_section->output_offset
7457 + rel->r_offset);
7458
7459 value = abs (relocation);
7460
7461 if (value >= 0x1000)
7462 return bfd_reloc_overflow;
7463
7464 insn = (insn & 0xff7ff000) | value;
7465 if (relocation >= 0)
7466 insn |= (1 << 23);
7467
7468 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7469 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7470
7471 return bfd_reloc_ok;
7472 }
7473
dfc5f959 7474 case R_ARM_THM_XPC22:
c19d1205 7475 case R_ARM_THM_CALL:
bd97cb95 7476 case R_ARM_THM_JUMP24:
dfc5f959 7477 /* Thumb BL (branch long instruction). */
252b5132 7478 {
b34976b6 7479 bfd_vma relocation;
e95de063 7480 bfd_vma reloc_sign;
b34976b6
AM		 7481 bfd_boolean overflow = FALSE;
7482 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7483 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7484 bfd_signed_vma reloc_signed_max;
7485 bfd_signed_vma reloc_signed_min;
b34976b6 7486 bfd_vma check;
252b5132 7487 bfd_signed_vma signed_check;
e95de063 7488 int bitsize;
cd1dac3d 7489 const int thumb2 = using_thumb2 (globals);
252b5132 7490
5ab79981 7491 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7492 the next instruction unless a PLT entry will be created.
7493 The jump to the next instruction is optimized as a NOP.W for
7494 Thumb-2 enabled architectures. */
19540007
JM		 7495 if (h && h->root.type == bfd_link_hash_undefweak
7496 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7497 {
cd1dac3d
DG		 7498 if (arch_has_thumb2_nop (globals))
7499 {
7500 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7501 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7502 }
7503 else
7504 {
7505 bfd_put_16 (input_bfd, 0xe000, hit_data);
7506 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7507 }
5ab79981
PB		 7508 return bfd_reloc_ok;
7509 }
7510
e95de063
MS		 7511 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7512 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7513 if (globals->use_rel)
7514 {
e95de063
MS		 7515 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7516 bfd_vma upper = upper_insn & 0x3ff;
7517 bfd_vma lower = lower_insn & 0x7ff;
7518 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7519 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7520 bfd_vma i1 = j1 ^ s ? 0 : 1;
7521 bfd_vma i2 = j2 ^ s ? 0 : 1;
7522
7523 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7524 /* Sign extend. */
7525 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7526
4e7fd91e
PB		 7527 signed_addend = addend;
7528 }
cb1afa5c 7529
dfc5f959
NC		 7530 if (r_type == R_ARM_THM_XPC22)
7531 {
7532 /* Check for Thumb to Thumb call. */
7533 /* FIXME: Should we translate the instruction into a BL
7534 instruction instead ? */
7535 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7536 (*_bfd_error_handler)
7537 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7538 input_bfd,
7539 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7540 }
7541 else
252b5132 7542 {
dfc5f959
NC		 7543 /* If it is not a call to Thumb, assume call to Arm.
7544 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7545 function call at all, but rather a long jump. Calls through
7546 the PLT do not require stubs. */
7547 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7548 && (h == NULL || splt == NULL
7549 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7550 {
bd97cb95 7551 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7552 {
7553 /* Convert BL to BLX. */
7554 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7555 }
155d87d7
CL		 7556 else if (( r_type != R_ARM_THM_CALL)
7557 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7558 {
7559 if (elf32_thumb_to_arm_stub
7560 (info, sym_name, input_bfd, output_bfd, input_section,
7561 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7562 error_message))
7563 return bfd_reloc_ok;
7564 else
7565 return bfd_reloc_dangerous;
7566 }
da5938a2 7567 }
bd97cb95
DJ		 7568 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7569 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7570 {
7571 /* Make sure this is a BL. */
7572 lower_insn |= 0x1800;
7573 }
252b5132 7574 }
f21f3fe0 7575
fe33d2fa 7576 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 7577 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7578 {
7579 /* Check if a stub has to be inserted because the destination
8029a119 7580 is too far. */
fe33d2fa
CL		 7581 struct elf32_arm_stub_hash_entry *stub_entry;
7582 struct elf32_arm_link_hash_entry *hash;
7583
7584 hash = (struct elf32_arm_link_hash_entry *) h;
7585
7586 stub_type = arm_type_of_stub (info, input_section, rel,
7587 &sym_flags, hash, value, sym_sec,
7588 input_bfd, sym_name);
7589
7590 if (stub_type != arm_stub_none)
906e58ca
NC		 7591 {
7592 /* The target is out of reach or we are changing modes, so
7593 redirect the branch to the local stub for this
7594 function. */
7595 stub_entry = elf32_arm_get_stub_entry (input_section,
7596 sym_sec, h,
fe33d2fa
CL		 7597 rel, globals,
7598 stub_type);
906e58ca
NC		 7599 if (stub_entry != NULL)
7600 value = (stub_entry->stub_offset
7601 + stub_entry->stub_sec->output_offset
7602 + stub_entry->stub_sec->output_section->vma);
7603
f4ac8484 7604 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7605 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7606 {
7607 if ((stub_entry
7608 && !arm_stub_is_thumb (stub_entry->stub_type))
7609 || (sym_flags != STT_ARM_TFUNC))
7610 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7611 }
906e58ca
NC		 7612 }
7613 }
7614
fe33d2fa
CL		 7615 /* Handle calls via the PLT. */
7616 if (stub_type == arm_stub_none
7617 && h != NULL
7618 && splt != NULL
7619 && h->plt.offset != (bfd_vma) -1)
7620 {
7621 value = (splt->output_section->vma
7622 + splt->output_offset
7623 + h->plt.offset);
7624
7625 if (globals->use_blx && r_type == R_ARM_THM_CALL)
7626 {
7627 /* If the Thumb BLX instruction is available, convert
7628 the BL to a BLX instruction to call the ARM-mode
7629 PLT entry. */
7630 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7631 sym_flags = STT_FUNC;
7632 }
7633 else
7634 {
7635 /* Target the Thumb stub before the ARM PLT entry. */
7636 value -= PLT_THUMB_STUB_SIZE;
7637 sym_flags = STT_ARM_TFUNC;
7638 }
7639 *unresolved_reloc_p = FALSE;
7640 }
7641
ba96a88f 7642 relocation = value + signed_addend;
f21f3fe0 7643
252b5132 7644 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7645 + input_section->output_offset
7646 + rel->r_offset);
9a5aca8c 7647
252b5132
RH		 7648 check = relocation >> howto->rightshift;
7649
7650 /* If this is a signed value, the rightshift just dropped
7651 leading 1 bits (assuming twos complement). */
7652 if ((bfd_signed_vma) relocation >= 0)
7653 signed_check = check;
7654 else
7655 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7656
e95de063
MS		 7657 /* Calculate the permissable maximum and minimum values for
7658 this relocation according to whether we're relocating for
7659 Thumb-2 or not. */
7660 bitsize = howto->bitsize;
7661 if (!thumb2)
7662 bitsize -= 2;
f6ebfac0 7663 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 7664 reloc_signed_min = ~reloc_signed_max;
7665
252b5132 7666 /* Assumes two's complement. */
ba96a88f 7667 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7668 overflow = TRUE;
252b5132 7669
bd97cb95 7670 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7671 /* For a BLX instruction, make sure that the relocation is rounded up
7672 to a word boundary. This follows the semantics of the instruction
7673 which specifies that bit 1 of the target address will come from bit
7674 1 of the base address. */
7675 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7676
e95de063
MS		 7677 /* Put RELOCATION back into the insn. Assumes two's complement.
7678 We use the Thumb-2 encoding, which is safe even if dealing with
7679 a Thumb-1 instruction by virtue of our overflow check above. */
7680 reloc_sign = (signed_check < 0) ? 1 : 0;
7681 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7682 | ((relocation >> 12) & 0x3ff)
7683 | (reloc_sign << 10);
906e58ca 7684 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7685 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7686 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7687 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7688
252b5132
RH		 7689 /* Put the relocated value back in the object file: */
7690 bfd_put_16 (input_bfd, upper_insn, hit_data);
7691 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7692
7693 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7694 }
7695 break;
7696
c19d1205
ZW		 7697 case R_ARM_THM_JUMP19:
7698 /* Thumb32 conditional branch instruction. */
7699 {
7700 bfd_vma relocation;
7701 bfd_boolean overflow = FALSE;
7702 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7703 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7704 bfd_signed_vma reloc_signed_max = 0xffffe;
7705 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7706 bfd_signed_vma signed_check;
7707
7708 /* Need to refetch the addend, reconstruct the top three bits,
7709 and squish the two 11 bit pieces together. */
7710 if (globals->use_rel)
7711 {
7712 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7713 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7714 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7715 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7716 bfd_vma lower = (lower_insn & 0x07ff);
7717
a00a1f35
MS		 7718 upper |= J1 << 6;
7719 upper |= J2 << 7;
7720 upper |= (!S) << 8;
c19d1205
ZW		 7721 upper -= 0x0100; /* Sign extend. */
7722
7723 addend = (upper << 12) | (lower << 1);
7724 signed_addend = addend;
7725 }
7726
bd97cb95
DJ		 7727 /* Handle calls via the PLT. */
7728 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7729 {
7730 value = (splt->output_section->vma
7731 + splt->output_offset
7732 + h->plt.offset);
7733 /* Target the Thumb stub before the ARM PLT entry. */
7734 value -= PLT_THUMB_STUB_SIZE;
7735 *unresolved_reloc_p = FALSE;
7736 }
7737
c19d1205
ZW		 7738 /* ??? Should handle interworking? GCC might someday try to
7739 use this for tail calls. */
7740
7741 relocation = value + signed_addend;
7742 relocation -= (input_section->output_section->vma
7743 + input_section->output_offset
7744 + rel->r_offset);
a00a1f35 7745 signed_check = (bfd_signed_vma) relocation;
c19d1205 7746
c19d1205
ZW		 7747 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7748 overflow = TRUE;
7749
7750 /* Put RELOCATION back into the insn. */
7751 {
7752 bfd_vma S = (relocation & 0x00100000) >> 20;
7753 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7754 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7755 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7756 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7757
a00a1f35 7758 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7759 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7760 }
7761
7762 /* Put the relocated value back in the object file: */
7763 bfd_put_16 (input_bfd, upper_insn, hit_data);
7764 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7765
7766 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7767 }
7768
7769 case R_ARM_THM_JUMP11:
7770 case R_ARM_THM_JUMP8:
7771 case R_ARM_THM_JUMP6:
51c5503b
NC		 7772 /* Thumb B (branch) instruction). */
7773 {
6cf9e9fe 7774 bfd_signed_vma relocation;
51c5503b
NC		 7775 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7776 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7777 bfd_signed_vma signed_check;
7778
c19d1205
ZW		 7779 /* CZB cannot jump backward. */
7780 if (r_type == R_ARM_THM_JUMP6)
7781 reloc_signed_min = 0;
7782
4e7fd91e 7783 if (globals->use_rel)
6cf9e9fe 7784 {
4e7fd91e
PB		 7785 /* Need to refetch addend. */
7786 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7787 if (addend & ((howto->src_mask + 1) >> 1))
7788 {
7789 signed_addend = -1;
7790 signed_addend &= ~ howto->src_mask;
7791 signed_addend |= addend;
7792 }
7793 else
7794 signed_addend = addend;
7795 /* The value in the insn has been right shifted. We need to
7796 undo this, so that we can perform the address calculation
7797 in terms of bytes. */
7798 signed_addend <<= howto->rightshift;
6cf9e9fe 7799 }
6cf9e9fe 7800 relocation = value + signed_addend;
51c5503b
NC		 7801
7802 relocation -= (input_section->output_section->vma
7803 + input_section->output_offset
7804 + rel->r_offset);
7805
6cf9e9fe
NC		 7806 relocation >>= howto->rightshift;
7807 signed_check = relocation;
c19d1205
ZW		 7808
7809 if (r_type == R_ARM_THM_JUMP6)
7810 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7811 else
7812 relocation &= howto->dst_mask;
51c5503b 7813 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7814
51c5503b
NC		 7815 bfd_put_16 (input_bfd, relocation, hit_data);
7816
7817 /* Assumes two's complement. */
7818 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7819 return bfd_reloc_overflow;
7820
7821 return bfd_reloc_ok;
7822 }
cedb70c5 7823
8375c36b
PB		 7824 case R_ARM_ALU_PCREL7_0:
7825 case R_ARM_ALU_PCREL15_8:
7826 case R_ARM_ALU_PCREL23_15:
7827 {
7828 bfd_vma insn;
7829 bfd_vma relocation;
7830
7831 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7832 if (globals->use_rel)
7833 {
7834 /* Extract the addend. */
7835 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7836 signed_addend = addend;
7837 }
8375c36b
PB		 7838 relocation = value + signed_addend;
7839
7840 relocation -= (input_section->output_section->vma
7841 + input_section->output_offset
7842 + rel->r_offset);
7843 insn = (insn & ~0xfff)
7844 | ((howto->bitpos << 7) & 0xf00)
7845 | ((relocation >> howto->bitpos) & 0xff);
7846 bfd_put_32 (input_bfd, value, hit_data);
7847 }
7848 return bfd_reloc_ok;
7849
252b5132
RH		 7850 case R_ARM_GNU_VTINHERIT:
7851 case R_ARM_GNU_VTENTRY:
7852 return bfd_reloc_ok;
7853
c19d1205 7854 case R_ARM_GOTOFF32:
252b5132
RH		 7855 /* Relocation is relative to the start of the
7856 global offset table. */
7857
7858 BFD_ASSERT (sgot != NULL);
7859 if (sgot == NULL)
7860 return bfd_reloc_notsupported;
9a5aca8c 7861
cedb70c5 7862 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7863 address by one, so that attempts to call the function pointer will
7864 correctly interpret it as Thumb code. */
7865 if (sym_flags == STT_ARM_TFUNC)
7866 value += 1;
7867
252b5132
RH		 7868 /* Note that sgot->output_offset is not involved in this
7869 calculation. We always want the start of .got. If we
7870 define _GLOBAL_OFFSET_TABLE in a different way, as is
7871 permitted by the ABI, we might have to change this
9b485d32 7872 calculation. */
252b5132 7873 value -= sgot->output_section->vma;
f21f3fe0 7874 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7875 contents, rel->r_offset, value,
00a97672 7876 rel->r_addend);
252b5132
RH		 7877
7878 case R_ARM_GOTPC:
a7c10850 7879 /* Use global offset table as symbol value. */
252b5132 7880 BFD_ASSERT (sgot != NULL);
f21f3fe0 7881
252b5132
RH		 7882 if (sgot == NULL)
7883 return bfd_reloc_notsupported;
7884
0945cdfd 7885 *unresolved_reloc_p = FALSE;
252b5132 7886 value = sgot->output_section->vma;
f21f3fe0 7887 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7888 contents, rel->r_offset, value,
00a97672 7889 rel->r_addend);
f21f3fe0 7890
252b5132 7891 case R_ARM_GOT32:
eb043451 7892 case R_ARM_GOT_PREL:
252b5132 7893 /* Relocation is to the entry for this symbol in the
9b485d32 7894 global offset table. */
252b5132
RH		 7895 if (sgot == NULL)
7896 return bfd_reloc_notsupported;
f21f3fe0 7897
252b5132
RH		 7898 if (h != NULL)
7899 {
7900 bfd_vma off;
5e681ec4 7901 bfd_boolean dyn;
f21f3fe0 7902
252b5132
RH		 7903 off = h->got.offset;
7904 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7905 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7906
5e681ec4 7907 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7908 || (info->shared
5e681ec4
PB		 7909 && SYMBOL_REFERENCES_LOCAL (info, h))
7910 || (ELF_ST_VISIBILITY (h->other)
7911 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7912 {
7913 /* This is actually a static link, or it is a -Bsymbolic link
7914 and the symbol is defined locally. We must initialize this
7915 entry in the global offset table. Since the offset must
7916 always be a multiple of 4, we use the least significant bit
7917 to record whether we have initialized it already.
f21f3fe0 7918
00a97672 7919 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7920 entry to initialize the value. This is done in the
9b485d32 7921 finish_dynamic_symbol routine. */
252b5132
RH		 7922 if ((off & 1) != 0)
7923 off &= ~1;
7924 else
7925 {
ee29b9fb
RE		 7926 /* If we are addressing a Thumb function, we need to
7927 adjust the address by one, so that attempts to
7928 call the function pointer will correctly
7929 interpret it as Thumb code. */
7930 if (sym_flags == STT_ARM_TFUNC)
7931 value |= 1;
7932
252b5132
RH		 7933 bfd_put_32 (output_bfd, value, sgot->contents + off);
7934 h->got.offset |= 1;
7935 }
7936 }
0945cdfd
DJ		 7937 else
7938 *unresolved_reloc_p = FALSE;
f21f3fe0 7939
252b5132
RH		 7940 value = sgot->output_offset + off;
7941 }
7942 else
7943 {
7944 bfd_vma off;
f21f3fe0 7945
252b5132
RH		 7946 BFD_ASSERT (local_got_offsets != NULL &&
7947 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7948
252b5132 7949 off = local_got_offsets[r_symndx];
f21f3fe0 7950
252b5132
RH		 7951 /* The offset must always be a multiple of 4. We use the
7952 least significant bit to record whether we have already
9b485d32 7953 generated the necessary reloc. */
252b5132
RH		 7954 if ((off & 1) != 0)
7955 off &= ~1;
7956 else
7957 {
b7693d02
DJ		 7958 /* If we are addressing a Thumb function, we need to
7959 adjust the address by one, so that attempts to
7960 call the function pointer will correctly
7961 interpret it as Thumb code. */
7962 if (sym_flags == STT_ARM_TFUNC)
7963 value |= 1;
7964
00a97672
RS		 7965 if (globals->use_rel)
7966 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7967
252b5132
RH		 7968 if (info->shared)
7969 {
7970 asection * srelgot;
947216bf
AM		 7971 Elf_Internal_Rela outrel;
7972 bfd_byte *loc;
f21f3fe0 7973
00a97672
RS		 7974 srelgot = (bfd_get_section_by_name
7975 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7976 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7977
00a97672 7978 outrel.r_addend = addend + value;
252b5132 7979 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7980 + sgot->output_offset
252b5132
RH		 7981 + off);
7982 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7983 loc = srelgot->contents;
00a97672
RS		 7984 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7985 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7986 }
f21f3fe0 7987
252b5132
RH		 7988 local_got_offsets[r_symndx] |= 1;
7989 }
f21f3fe0 7990
252b5132
RH		 7991 value = sgot->output_offset + off;
7992 }
eb043451
PB		 7993 if (r_type != R_ARM_GOT32)
7994 value += sgot->output_section->vma;
9a5aca8c 7995
f21f3fe0 7996 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7997 contents, rel->r_offset, value,
00a97672 7998 rel->r_addend);
f21f3fe0 7999
ba93b8ac
DJ		 8000 case R_ARM_TLS_LDO32:
8001 value = value - dtpoff_base (info);
8002
8003 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8004 contents, rel->r_offset, value,
8005 rel->r_addend);
ba93b8ac
DJ		 8006
8007 case R_ARM_TLS_LDM32:
8008 {
8009 bfd_vma off;
8010
8011 if (globals->sgot == NULL)
8012 abort ();
8013
8014 off = globals->tls_ldm_got.offset;
8015
8016 if ((off & 1) != 0)
8017 off &= ~1;
8018 else
8019 {
8020 /* If we don't know the module number, create a relocation
8021 for it. */
8022 if (info->shared)
8023 {
8024 Elf_Internal_Rela outrel;
8025 bfd_byte *loc;
8026
8027 if (globals->srelgot == NULL)
8028 abort ();
8029
00a97672 8030 outrel.r_addend = 0;
ba93b8ac
DJ		 8031 outrel.r_offset = (globals->sgot->output_section->vma
8032 + globals->sgot->output_offset + off);
8033 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
8034
00a97672
RS		 8035 if (globals->use_rel)
8036 bfd_put_32 (output_bfd, outrel.r_addend,
8037 globals->sgot->contents + off);
ba93b8ac
DJ		 8038
8039 loc = globals->srelgot->contents;
00a97672
RS		 8040 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
8041 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 8042 }
8043 else
8044 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
8045
8046 globals->tls_ldm_got.offset |= 1;
8047 }
8048
906e58ca 8049 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8050 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8051
8052 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8053 contents, rel->r_offset, value,
00a97672 8054 rel->r_addend);
ba93b8ac
DJ		 8055 }
8056
8057 case R_ARM_TLS_GD32:
8058 case R_ARM_TLS_IE32:
8059 {
8060 bfd_vma off;
8061 int indx;
8062 char tls_type;
8063
8064 if (globals->sgot == NULL)
8065 abort ();
8066
8067 indx = 0;
8068 if (h != NULL)
8069 {
8070 bfd_boolean dyn;
8071 dyn = globals->root.dynamic_sections_created;
8072 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8073 && (!info->shared
8074 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8075 {
8076 *unresolved_reloc_p = FALSE;
8077 indx = h->dynindx;
8078 }
8079 off = h->got.offset;
8080 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
8081 }
8082 else
8083 {
8084 if (local_got_offsets == NULL)
8085 abort ();
8086 off = local_got_offsets[r_symndx];
8087 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
8088 }
8089
8090 if (tls_type == GOT_UNKNOWN)
8091 abort ();
8092
8093 if ((off & 1) != 0)
8094 off &= ~1;
8095 else
8096 {
8097 bfd_boolean need_relocs = FALSE;
8098 Elf_Internal_Rela outrel;
8099 bfd_byte *loc = NULL;
8100 int cur_off = off;
8101
8102 /* The GOT entries have not been initialized yet. Do it
8103 now, and emit any relocations. If both an IE GOT and a
8104 GD GOT are necessary, we emit the GD first. */
8105
8106 if ((info->shared || indx != 0)
8107 && (h == NULL
8108 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8109 || h->root.type != bfd_link_hash_undefweak))
8110 {
8111 need_relocs = TRUE;
8112 if (globals->srelgot == NULL)
8113 abort ();
8114 loc = globals->srelgot->contents;
00a97672 8115 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 8116 }
8117
8118 if (tls_type & GOT_TLS_GD)
8119 {
8120 if (need_relocs)
8121 {
00a97672 8122 outrel.r_addend = 0;
ba93b8ac 8123 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 8124 + globals->sgot->output_offset
8125 + cur_off);
ba93b8ac 8126 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 8127
00a97672
RS		 8128 if (globals->use_rel)
8129 bfd_put_32 (output_bfd, outrel.r_addend,
8130 globals->sgot->contents + cur_off);
8131
8132 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8133 globals->srelgot->reloc_count++;
00a97672 8134 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8135
8136 if (indx == 0)
8137 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8138 globals->sgot->contents + cur_off + 4);
8139 else
8140 {
00a97672 8141 outrel.r_addend = 0;
ba93b8ac
DJ		 8142 outrel.r_info = ELF32_R_INFO (indx,
8143 R_ARM_TLS_DTPOFF32);
8144 outrel.r_offset += 4;
00a97672
RS		 8145
8146 if (globals->use_rel)
8147 bfd_put_32 (output_bfd, outrel.r_addend,
8148 globals->sgot->contents + cur_off + 4);
8149
8150
8151 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8152 globals->srelgot->reloc_count++;
00a97672 8153 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8154 }
8155 }
8156 else
8157 {
8158 /* If we are not emitting relocations for a
8159 general dynamic reference, then we must be in a
8160 static link or an executable link with the
8161 symbol binding locally. Mark it as belonging
8162 to module 1, the executable. */
8163 bfd_put_32 (output_bfd, 1,
8164 globals->sgot->contents + cur_off);
8165 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8166 globals->sgot->contents + cur_off + 4);
8167 }
8168
8169 cur_off += 8;
8170 }
8171
8172 if (tls_type & GOT_TLS_IE)
8173 {
8174 if (need_relocs)
8175 {
00a97672
RS		 8176 if (indx == 0)
8177 outrel.r_addend = value - dtpoff_base (info);
8178 else
8179 outrel.r_addend = 0;
ba93b8ac
DJ		 8180 outrel.r_offset = (globals->sgot->output_section->vma
8181 + globals->sgot->output_offset
8182 + cur_off);
8183 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8184
00a97672
RS		 8185 if (globals->use_rel)
8186 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 8187 globals->sgot->contents + cur_off);
8188
00a97672 8189 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8190 globals->srelgot->reloc_count++;
00a97672 8191 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8192 }
8193 else
8194 bfd_put_32 (output_bfd, tpoff (info, value),
8195 globals->sgot->contents + cur_off);
8196 cur_off += 4;
8197 }
8198
8199 if (h != NULL)
8200 h->got.offset |= 1;
8201 else
8202 local_got_offsets[r_symndx] |= 1;
8203 }
8204
8205 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8206 off += 8;
906e58ca 8207 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8208 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8209
8210 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8211 contents, rel->r_offset, value,
00a97672 8212 rel->r_addend);
ba93b8ac
DJ		 8213 }
8214
8215 case R_ARM_TLS_LE32:
8216 if (info->shared)
8217 {
8218 (*_bfd_error_handler)
8219 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8220 input_bfd, input_section,
8221 (long) rel->r_offset, howto->name);
21d799b5 8222 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 8223 }
8224 else
8225 value = tpoff (info, value);
906e58ca 8226
ba93b8ac 8227 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8228 contents, rel->r_offset, value,
8229 rel->r_addend);
ba93b8ac 8230
319850b4
JB		 8231 case R_ARM_V4BX:
8232 if (globals->fix_v4bx)
845b51d6
PB		 8233 {
8234 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8235
845b51d6
PB		 8236 /* Ensure that we have a BX instruction. */
8237 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8238
845b51d6
PB		 8239 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8240 {
8241 /* Branch to veneer. */
8242 bfd_vma glue_addr;
8243 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8244 glue_addr -= input_section->output_section->vma
8245 + input_section->output_offset
8246 + rel->r_offset + 8;
8247 insn = (insn & 0xf0000000) | 0x0a000000
8248 | ((glue_addr >> 2) & 0x00ffffff);
8249 }
8250 else
8251 {
8252 /* Preserve Rm (lowest four bits) and the condition code
8253 (highest four bits). Other bits encode MOV PC,Rm. */
8254 insn = (insn & 0xf000000f) | 0x01a0f000;
8255 }
319850b4 8256
845b51d6
PB		 8257 bfd_put_32 (input_bfd, insn, hit_data);
8258 }
319850b4
JB		 8259 return bfd_reloc_ok;
8260
b6895b4f
PB		 8261 case R_ARM_MOVW_ABS_NC:
8262 case R_ARM_MOVT_ABS:
8263 case R_ARM_MOVW_PREL_NC:
8264 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8265 /* Until we properly support segment-base-relative addressing then
8266 we assume the segment base to be zero, as for the group relocations.
8267 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8268 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8269 case R_ARM_MOVW_BREL_NC:
8270 case R_ARM_MOVW_BREL:
8271 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8272 {
8273 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8274
8275 if (globals->use_rel)
8276 {
8277 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8278 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8279 }
92f5d02b 8280
b6895b4f 8281 value += signed_addend;
b6895b4f
PB		 8282
8283 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8284 value -= (input_section->output_section->vma
8285 + input_section->output_offset + rel->r_offset);
8286
92f5d02b
MS		 8287 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8288 return bfd_reloc_overflow;
8289
8290 if (sym_flags == STT_ARM_TFUNC)
8291 value |= 1;
8292
8293 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8294 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8295 value >>= 16;
8296
8297 insn &= 0xfff0f000;
8298 insn |= value & 0xfff;
8299 insn |= (value & 0xf000) << 4;
8300 bfd_put_32 (input_bfd, insn, hit_data);
8301 }
8302 return bfd_reloc_ok;
8303
8304 case R_ARM_THM_MOVW_ABS_NC:
8305 case R_ARM_THM_MOVT_ABS:
8306 case R_ARM_THM_MOVW_PREL_NC:
8307 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8308 /* Until we properly support segment-base-relative addressing then
8309 we assume the segment base to be zero, as for the above relocations.
8310 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8311 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8312 as R_ARM_THM_MOVT_ABS. */
8313 case R_ARM_THM_MOVW_BREL_NC:
8314 case R_ARM_THM_MOVW_BREL:
8315 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8316 {
8317 bfd_vma insn;
906e58ca 8318
b6895b4f
PB		 8319 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8320 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8321
8322 if (globals->use_rel)
8323 {
8324 addend = ((insn >> 4) & 0xf000)
8325 | ((insn >> 15) & 0x0800)
8326 | ((insn >> 4) & 0x0700)
8327 | (insn & 0x00ff);
39623e12 8328 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8329 }
92f5d02b 8330
b6895b4f 8331 value += signed_addend;
b6895b4f
PB		 8332
8333 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8334 value -= (input_section->output_section->vma
8335 + input_section->output_offset + rel->r_offset);
8336
92f5d02b
MS		 8337 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8338 return bfd_reloc_overflow;
8339
8340 if (sym_flags == STT_ARM_TFUNC)
8341 value |= 1;
8342
8343 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8344 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8345 value >>= 16;
8346
8347 insn &= 0xfbf08f00;
8348 insn |= (value & 0xf000) << 4;
8349 insn |= (value & 0x0800) << 15;
8350 insn |= (value & 0x0700) << 4;
8351 insn |= (value & 0x00ff);
8352
8353 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8354 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8355 }
8356 return bfd_reloc_ok;
8357
4962c51a
MS		 8358 case R_ARM_ALU_PC_G0_NC:
8359 case R_ARM_ALU_PC_G1_NC:
8360 case R_ARM_ALU_PC_G0:
8361 case R_ARM_ALU_PC_G1:
8362 case R_ARM_ALU_PC_G2:
8363 case R_ARM_ALU_SB_G0_NC:
8364 case R_ARM_ALU_SB_G1_NC:
8365 case R_ARM_ALU_SB_G0:
8366 case R_ARM_ALU_SB_G1:
8367 case R_ARM_ALU_SB_G2:
8368 {
8369 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8370 bfd_vma pc = input_section->output_section->vma
8371 + input_section->output_offset + rel->r_offset;
8372 /* sb should be the origin of the *segment* containing the symbol.
8373 It is not clear how to obtain this OS-dependent value, so we
8374 make an arbitrary choice of zero. */
8375 bfd_vma sb = 0;
8376 bfd_vma residual;
8377 bfd_vma g_n;
8378 bfd_signed_vma signed_value;
8379 int group = 0;
8380
8381 /* Determine which group of bits to select. */
8382 switch (r_type)
8383 {
8384 case R_ARM_ALU_PC_G0_NC:
8385 case R_ARM_ALU_PC_G0:
8386 case R_ARM_ALU_SB_G0_NC:
8387 case R_ARM_ALU_SB_G0:
8388 group = 0;
8389 break;
8390
8391 case R_ARM_ALU_PC_G1_NC:
8392 case R_ARM_ALU_PC_G1:
8393 case R_ARM_ALU_SB_G1_NC:
8394 case R_ARM_ALU_SB_G1:
8395 group = 1;
8396 break;
8397
8398 case R_ARM_ALU_PC_G2:
8399 case R_ARM_ALU_SB_G2:
8400 group = 2;
8401 break;
8402
8403 default:
906e58ca 8404 abort ();
4962c51a
MS		 8405 }
8406
8407 /* If REL, extract the addend from the insn. If RELA, it will
8408 have already been fetched for us. */
8409 if (globals->use_rel)
8410 {
8411 int negative;
8412 bfd_vma constant = insn & 0xff;
8413 bfd_vma rotation = (insn & 0xf00) >> 8;
8414
8415 if (rotation == 0)
8416 signed_addend = constant;
8417 else
8418 {
8419 /* Compensate for the fact that in the instruction, the
8420 rotation is stored in multiples of 2 bits. */
8421 rotation *= 2;
8422
8423 /* Rotate "constant" right by "rotation" bits. */
8424 signed_addend = (constant >> rotation) |
8425 (constant << (8 * sizeof (bfd_vma) - rotation));
8426 }
8427
8428 /* Determine if the instruction is an ADD or a SUB.
8429 (For REL, this determines the sign of the addend.) */
8430 negative = identify_add_or_sub (insn);
8431 if (negative == 0)
8432 {
8433 (*_bfd_error_handler)
8434 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8435 input_bfd, input_section,
8436 (long) rel->r_offset, howto->name);
906e58ca 8437 return bfd_reloc_overflow;
4962c51a
MS		 8438 }
8439
8440 signed_addend *= negative;
8441 }
8442
8443 /* Compute the value (X) to go in the place. */
8444 if (r_type == R_ARM_ALU_PC_G0_NC
8445 || r_type == R_ARM_ALU_PC_G1_NC
8446 || r_type == R_ARM_ALU_PC_G0
8447 || r_type == R_ARM_ALU_PC_G1
8448 || r_type == R_ARM_ALU_PC_G2)
8449 /* PC relative. */
8450 signed_value = value - pc + signed_addend;
8451 else
8452 /* Section base relative. */
8453 signed_value = value - sb + signed_addend;
8454
8455 /* If the target symbol is a Thumb function, then set the
8456 Thumb bit in the address. */
8457 if (sym_flags == STT_ARM_TFUNC)
8458 signed_value |= 1;
8459
8460 /* Calculate the value of the relevant G_n, in encoded
8461 constant-with-rotation format. */
8462 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8463 &residual);
8464
8465 /* Check for overflow if required. */
8466 if ((r_type == R_ARM_ALU_PC_G0
8467 || r_type == R_ARM_ALU_PC_G1
8468 || r_type == R_ARM_ALU_PC_G2
8469 || r_type == R_ARM_ALU_SB_G0
8470 || r_type == R_ARM_ALU_SB_G1
8471 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8472 {
8473 (*_bfd_error_handler)
8474 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8475 input_bfd, input_section,
8476 (long) rel->r_offset, abs (signed_value), howto->name);
8477 return bfd_reloc_overflow;
8478 }
8479
8480 /* Mask out the value and the ADD/SUB part of the opcode; take care
8481 not to destroy the S bit. */
8482 insn &= 0xff1ff000;
8483
8484 /* Set the opcode according to whether the value to go in the
8485 place is negative. */
8486 if (signed_value < 0)
8487 insn |= 1 << 22;
8488 else
8489 insn |= 1 << 23;
8490
8491 /* Encode the offset. */
8492 insn |= g_n;
8493
8494 bfd_put_32 (input_bfd, insn, hit_data);
8495 }
8496 return bfd_reloc_ok;
8497
8498 case R_ARM_LDR_PC_G0:
8499 case R_ARM_LDR_PC_G1:
8500 case R_ARM_LDR_PC_G2:
8501 case R_ARM_LDR_SB_G0:
8502 case R_ARM_LDR_SB_G1:
8503 case R_ARM_LDR_SB_G2:
8504 {
8505 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8506 bfd_vma pc = input_section->output_section->vma
8507 + input_section->output_offset + rel->r_offset;
8508 bfd_vma sb = 0; /* See note above. */
8509 bfd_vma residual;
8510 bfd_signed_vma signed_value;
8511 int group = 0;
8512
8513 /* Determine which groups of bits to calculate. */
8514 switch (r_type)
8515 {
8516 case R_ARM_LDR_PC_G0:
8517 case R_ARM_LDR_SB_G0:
8518 group = 0;
8519 break;
8520
8521 case R_ARM_LDR_PC_G1:
8522 case R_ARM_LDR_SB_G1:
8523 group = 1;
8524 break;
8525
8526 case R_ARM_LDR_PC_G2:
8527 case R_ARM_LDR_SB_G2:
8528 group = 2;
8529 break;
8530
8531 default:
906e58ca 8532 abort ();
4962c51a
MS		 8533 }
8534
8535 /* If REL, extract the addend from the insn. If RELA, it will
8536 have already been fetched for us. */
8537 if (globals->use_rel)
8538 {
8539 int negative = (insn & (1 << 23)) ? 1 : -1;
8540 signed_addend = negative * (insn & 0xfff);
8541 }
8542
8543 /* Compute the value (X) to go in the place. */
8544 if (r_type == R_ARM_LDR_PC_G0
8545 || r_type == R_ARM_LDR_PC_G1
8546 || r_type == R_ARM_LDR_PC_G2)
8547 /* PC relative. */
8548 signed_value = value - pc + signed_addend;
8549 else
8550 /* Section base relative. */
8551 signed_value = value - sb + signed_addend;
8552
8553 /* Calculate the value of the relevant G_{n-1} to obtain
8554 the residual at that stage. */
8555 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8556
8557 /* Check for overflow. */
8558 if (residual >= 0x1000)
8559 {
8560 (*_bfd_error_handler)
8561 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8562 input_bfd, input_section,
8563 (long) rel->r_offset, abs (signed_value), howto->name);
8564 return bfd_reloc_overflow;
8565 }
8566
8567 /* Mask out the value and U bit. */
8568 insn &= 0xff7ff000;
8569
8570 /* Set the U bit if the value to go in the place is non-negative. */
8571 if (signed_value >= 0)
8572 insn |= 1 << 23;
8573
8574 /* Encode the offset. */
8575 insn |= residual;
8576
8577 bfd_put_32 (input_bfd, insn, hit_data);
8578 }
8579 return bfd_reloc_ok;
8580
8581 case R_ARM_LDRS_PC_G0:
8582 case R_ARM_LDRS_PC_G1:
8583 case R_ARM_LDRS_PC_G2:
8584 case R_ARM_LDRS_SB_G0:
8585 case R_ARM_LDRS_SB_G1:
8586 case R_ARM_LDRS_SB_G2:
8587 {
8588 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8589 bfd_vma pc = input_section->output_section->vma
8590 + input_section->output_offset + rel->r_offset;
8591 bfd_vma sb = 0; /* See note above. */
8592 bfd_vma residual;
8593 bfd_signed_vma signed_value;
8594 int group = 0;
8595
8596 /* Determine which groups of bits to calculate. */
8597 switch (r_type)
8598 {
8599 case R_ARM_LDRS_PC_G0:
8600 case R_ARM_LDRS_SB_G0:
8601 group = 0;
8602 break;
8603
8604 case R_ARM_LDRS_PC_G1:
8605 case R_ARM_LDRS_SB_G1:
8606 group = 1;
8607 break;
8608
8609 case R_ARM_LDRS_PC_G2:
8610 case R_ARM_LDRS_SB_G2:
8611 group = 2;
8612 break;
8613
8614 default:
906e58ca 8615 abort ();
4962c51a
MS		 8616 }
8617
8618 /* If REL, extract the addend from the insn. If RELA, it will
8619 have already been fetched for us. */
8620 if (globals->use_rel)
8621 {
8622 int negative = (insn & (1 << 23)) ? 1 : -1;
8623 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8624 }
8625
8626 /* Compute the value (X) to go in the place. */
8627 if (r_type == R_ARM_LDRS_PC_G0
8628 || r_type == R_ARM_LDRS_PC_G1
8629 || r_type == R_ARM_LDRS_PC_G2)
8630 /* PC relative. */
8631 signed_value = value - pc + signed_addend;
8632 else
8633 /* Section base relative. */
8634 signed_value = value - sb + signed_addend;
8635
8636 /* Calculate the value of the relevant G_{n-1} to obtain
8637 the residual at that stage. */
8638 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8639
8640 /* Check for overflow. */
8641 if (residual >= 0x100)
8642 {
8643 (*_bfd_error_handler)
8644 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8645 input_bfd, input_section,
8646 (long) rel->r_offset, abs (signed_value), howto->name);
8647 return bfd_reloc_overflow;
8648 }
8649
8650 /* Mask out the value and U bit. */
8651 insn &= 0xff7ff0f0;
8652
8653 /* Set the U bit if the value to go in the place is non-negative. */
8654 if (signed_value >= 0)
8655 insn |= 1 << 23;
8656
8657 /* Encode the offset. */
8658 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8659
8660 bfd_put_32 (input_bfd, insn, hit_data);
8661 }
8662 return bfd_reloc_ok;
8663
8664 case R_ARM_LDC_PC_G0:
8665 case R_ARM_LDC_PC_G1:
8666 case R_ARM_LDC_PC_G2:
8667 case R_ARM_LDC_SB_G0:
8668 case R_ARM_LDC_SB_G1:
8669 case R_ARM_LDC_SB_G2:
8670 {
8671 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8672 bfd_vma pc = input_section->output_section->vma
8673 + input_section->output_offset + rel->r_offset;
8674 bfd_vma sb = 0; /* See note above. */
8675 bfd_vma residual;
8676 bfd_signed_vma signed_value;
8677 int group = 0;
8678
8679 /* Determine which groups of bits to calculate. */
8680 switch (r_type)
8681 {
8682 case R_ARM_LDC_PC_G0:
8683 case R_ARM_LDC_SB_G0:
8684 group = 0;
8685 break;
8686
8687 case R_ARM_LDC_PC_G1:
8688 case R_ARM_LDC_SB_G1:
8689 group = 1;
8690 break;
8691
8692 case R_ARM_LDC_PC_G2:
8693 case R_ARM_LDC_SB_G2:
8694 group = 2;
8695 break;
8696
8697 default:
906e58ca 8698 abort ();
4962c51a
MS		 8699 }
8700
8701 /* If REL, extract the addend from the insn. If RELA, it will
8702 have already been fetched for us. */
8703 if (globals->use_rel)
8704 {
8705 int negative = (insn & (1 << 23)) ? 1 : -1;
8706 signed_addend = negative * ((insn & 0xff) << 2);
8707 }
8708
8709 /* Compute the value (X) to go in the place. */
8710 if (r_type == R_ARM_LDC_PC_G0
8711 || r_type == R_ARM_LDC_PC_G1
8712 || r_type == R_ARM_LDC_PC_G2)
8713 /* PC relative. */
8714 signed_value = value - pc + signed_addend;
8715 else
8716 /* Section base relative. */
8717 signed_value = value - sb + signed_addend;
8718
8719 /* Calculate the value of the relevant G_{n-1} to obtain
8720 the residual at that stage. */
8721 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8722
8723 /* Check for overflow. (The absolute value to go in the place must be
8724 divisible by four and, after having been divided by four, must
8725 fit in eight bits.) */
8726 if ((residual & 0x3) != 0 || residual >= 0x400)
8727 {
8728 (*_bfd_error_handler)
8729 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8730 input_bfd, input_section,
8731 (long) rel->r_offset, abs (signed_value), howto->name);
8732 return bfd_reloc_overflow;
8733 }
8734
8735 /* Mask out the value and U bit. */
8736 insn &= 0xff7fff00;
8737
8738 /* Set the U bit if the value to go in the place is non-negative. */
8739 if (signed_value >= 0)
8740 insn |= 1 << 23;
8741
8742 /* Encode the offset. */
8743 insn |= residual >> 2;
8744
8745 bfd_put_32 (input_bfd, insn, hit_data);
8746 }
8747 return bfd_reloc_ok;
8748
252b5132
RH		 8749 default:
8750 return bfd_reloc_notsupported;
8751 }
8752}
8753
98c1d4aa
NC		 8754/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8755static void
57e8b36a
NC		 8756arm_add_to_rel (bfd * abfd,
8757 bfd_byte * address,
8758 reloc_howto_type * howto,
8759 bfd_signed_vma increment)
98c1d4aa 8760{
98c1d4aa
NC		 8761 bfd_signed_vma addend;
8762
bd97cb95
DJ		 8763 if (howto->type == R_ARM_THM_CALL
8764 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8765 {
9a5aca8c
AM		 8766 int upper_insn, lower_insn;
8767 int upper, lower;
98c1d4aa 8768
9a5aca8c
AM		 8769 upper_insn = bfd_get_16 (abfd, address);
8770 lower_insn = bfd_get_16 (abfd, address + 2);
8771 upper = upper_insn & 0x7ff;
8772 lower = lower_insn & 0x7ff;
8773
8774 addend = (upper << 12) | (lower << 1);
ddda4409 8775 addend += increment;
9a5aca8c 8776 addend >>= 1;
98c1d4aa 8777
9a5aca8c
AM		 8778 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8779 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8780
dc810e39
AM		 8781 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8782 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8783 }
8784 else
8785 {
8786 bfd_vma contents;
8787
8788 contents = bfd_get_32 (abfd, address);
8789
8790 /* Get the (signed) value from the instruction. */
8791 addend = contents & howto->src_mask;
8792 if (addend & ((howto->src_mask + 1) >> 1))
8793 {
8794 bfd_signed_vma mask;
8795
8796 mask = -1;
8797 mask &= ~ howto->src_mask;
8798 addend |= mask;
8799 }
8800
8801 /* Add in the increment, (which is a byte value). */
8802 switch (howto->type)
8803 {
8804 default:
8805 addend += increment;
8806 break;
8807
8808 case R_ARM_PC24:
c6596c5e 8809 case R_ARM_PLT32:
5b5bb741
PB		 8810 case R_ARM_CALL:
8811 case R_ARM_JUMP24:
9a5aca8c 8812 addend <<= howto->size;
dc810e39 8813 addend += increment;
9a5aca8c
AM		 8814
8815 /* Should we check for overflow here ? */
8816
8817 /* Drop any undesired bits. */
8818 addend >>= howto->rightshift;
8819 break;
8820 }
8821
8822 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8823
8824 bfd_put_32 (abfd, contents, address);
ddda4409 8825 }
98c1d4aa 8826}
252b5132 8827
ba93b8ac
DJ		 8828#define IS_ARM_TLS_RELOC(R_TYPE) \
8829 ((R_TYPE) == R_ARM_TLS_GD32 \
8830 || (R_TYPE) == R_ARM_TLS_LDO32 \
8831 || (R_TYPE) == R_ARM_TLS_LDM32 \
8832 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8833 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8834 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8835 || (R_TYPE) == R_ARM_TLS_LE32 \
8836 || (R_TYPE) == R_ARM_TLS_IE32)
8837
252b5132 8838/* Relocate an ARM ELF section. */
906e58ca 8839
b34976b6 8840static bfd_boolean
57e8b36a
NC		 8841elf32_arm_relocate_section (bfd * output_bfd,
8842 struct bfd_link_info * info,
8843 bfd * input_bfd,
8844 asection * input_section,
8845 bfd_byte * contents,
8846 Elf_Internal_Rela * relocs,
8847 Elf_Internal_Sym * local_syms,
8848 asection ** local_sections)
252b5132 8849{
b34976b6
AM		 8850 Elf_Internal_Shdr *symtab_hdr;
8851 struct elf_link_hash_entry **sym_hashes;
8852 Elf_Internal_Rela *rel;
8853 Elf_Internal_Rela *relend;
8854 const char *name;
b32d3aa2 8855 struct elf32_arm_link_hash_table * globals;
252b5132 8856
4e7fd91e 8857 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8858 if (globals == NULL)
8859 return FALSE;
b491616a 8860
0ffa91dd 8861 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8862 sym_hashes = elf_sym_hashes (input_bfd);
8863
8864 rel = relocs;
8865 relend = relocs + input_section->reloc_count;
8866 for (; rel < relend; rel++)
8867 {
ba96a88f
NC		 8868 int r_type;
8869 reloc_howto_type * howto;
8870 unsigned long r_symndx;
8871 Elf_Internal_Sym * sym;
8872 asection * sec;
252b5132 8873 struct elf_link_hash_entry * h;
ba96a88f
NC		 8874 bfd_vma relocation;
8875 bfd_reloc_status_type r;
8876 arelent bfd_reloc;
ba93b8ac 8877 char sym_type;
0945cdfd 8878 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8879 char *error_message = NULL;
f21f3fe0 8880
252b5132 8881 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8882 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8883 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8884
ba96a88f
NC		 8885 if ( r_type == R_ARM_GNU_VTENTRY
8886 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8887 continue;
8888
b32d3aa2 8889 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8890 howto = bfd_reloc.howto;
252b5132 8891
252b5132
RH		 8892 h = NULL;
8893 sym = NULL;
8894 sec = NULL;
9b485d32 8895
252b5132
RH		 8896 if (r_symndx < symtab_hdr->sh_info)
8897 {
8898 sym = local_syms + r_symndx;
ba93b8ac 8899 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8900 sec = local_sections[r_symndx];
ffcb4889
NS		 8901
8902 /* An object file might have a reference to a local
8903 undefined symbol. This is a daft object file, but we
8904 should at least do something about it. V4BX & NONE
8905 relocations do not use the symbol and are explicitly
8906 allowed to use the undefined symbol, so allow those. */
8907 if (r_type != R_ARM_V4BX
8908 && r_type != R_ARM_NONE
8909 && bfd_is_und_section (sec)
8910 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
8911 {
8912 if (!info->callbacks->undefined_symbol
8913 (info, bfd_elf_string_from_elf_section
8914 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8915 input_bfd, input_section,
8916 rel->r_offset, TRUE))
8917 return FALSE;
8918 }
8919
4e7fd91e 8920 if (globals->use_rel)
f8df10f4 8921 {
4e7fd91e
PB		 8922 relocation = (sec->output_section->vma
8923 + sec->output_offset
8924 + sym->st_value);
ab96bf03
AM		 8925 if (!info->relocatable
8926 && (sec->flags & SEC_MERGE)
8927 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8928 {
4e7fd91e
PB		 8929 asection *msec;
8930 bfd_vma addend, value;
8931
39623e12 8932 switch (r_type)
4e7fd91e 8933 {
39623e12
PB		 8934 case R_ARM_MOVW_ABS_NC:
8935 case R_ARM_MOVT_ABS:
8936 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8937 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8938 addend = (addend ^ 0x8000) - 0x8000;
8939 break;
f8df10f4 8940
39623e12
PB		 8941 case R_ARM_THM_MOVW_ABS_NC:
8942 case R_ARM_THM_MOVT_ABS:
8943 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8944 << 16;
8945 value |= bfd_get_16 (input_bfd,
8946 contents + rel->r_offset + 2);
8947 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8948 | ((value & 0x04000000) >> 15);
8949 addend = (addend ^ 0x8000) - 0x8000;
8950 break;
f8df10f4 8951
39623e12
PB		 8952 default:
8953 if (howto->rightshift
8954 || (howto->src_mask & (howto->src_mask + 1)))
8955 {
8956 (*_bfd_error_handler)
8957 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8958 input_bfd, input_section,
8959 (long) rel->r_offset, howto->name);
8960 return FALSE;
8961 }
8962
8963 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8964
8965 /* Get the (signed) value from the instruction. */
8966 addend = value & howto->src_mask;
8967 if (addend & ((howto->src_mask + 1) >> 1))
8968 {
8969 bfd_signed_vma mask;
8970
8971 mask = -1;
8972 mask &= ~ howto->src_mask;
8973 addend |= mask;
8974 }
8975 break;
4e7fd91e 8976 }
39623e12 8977
4e7fd91e
PB		 8978 msec = sec;
8979 addend =
8980 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8981 - relocation;
8982 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8983
8984 /* Cases here must match those in the preceeding
8985 switch statement. */
8986 switch (r_type)
8987 {
8988 case R_ARM_MOVW_ABS_NC:
8989 case R_ARM_MOVT_ABS:
8990 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8991 | (addend & 0xfff);
8992 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8993 break;
8994
8995 case R_ARM_THM_MOVW_ABS_NC:
8996 case R_ARM_THM_MOVT_ABS:
8997 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8998 | (addend & 0xff) | ((addend & 0x0800) << 15);
8999 bfd_put_16 (input_bfd, value >> 16,
9000 contents + rel->r_offset);
9001 bfd_put_16 (input_bfd, value,
9002 contents + rel->r_offset + 2);
9003 break;
9004
9005 default:
9006 value = (value & ~ howto->dst_mask)
9007 | (addend & howto->dst_mask);
9008 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
9009 break;
9010 }
f8df10f4 9011 }
f8df10f4 9012 }
4e7fd91e
PB		 9013 else
9014 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 9015 }
9016 else
9017 {
560e09e9 9018 bfd_boolean warned;
560e09e9 9019
b2a8e766
AM		 9020 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
9021 r_symndx, symtab_hdr, sym_hashes,
9022 h, sec, relocation,
9023 unresolved_reloc, warned);
ba93b8ac
DJ		 9024
9025 sym_type = h->type;
252b5132
RH		 9026 }
9027
ab96bf03
AM		 9028 if (sec != NULL && elf_discarded_section (sec))
9029 {
9030 /* For relocs against symbols from removed linkonce sections,
9031 or sections discarded by a linker script, we just want the
9032 section contents zeroed. Avoid any special processing. */
9033 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
9034 rel->r_info = 0;
9035 rel->r_addend = 0;
9036 continue;
9037 }
9038
9039 if (info->relocatable)
9040 {
9041 /* This is a relocatable link. We don't have to change
9042 anything, unless the reloc is against a section symbol,
9043 in which case we have to adjust according to where the
9044 section symbol winds up in the output section. */
9045 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
9046 {
9047 if (globals->use_rel)
9048 arm_add_to_rel (input_bfd, contents + rel->r_offset,
9049 howto, (bfd_signed_vma) sec->output_offset);
9050 else
9051 rel->r_addend += sec->output_offset;
9052 }
9053 continue;
9054 }
9055
252b5132
RH		 9056 if (h != NULL)
9057 name = h->root.root.string;
9058 else
9059 {
9060 name = (bfd_elf_string_from_elf_section
9061 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9062 if (name == NULL || *name == '\0')
9063 name = bfd_section_name (input_bfd, sec);
9064 }
f21f3fe0 9065
cf35638d 9066 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 9067 && r_type != R_ARM_NONE
9068 && (h == NULL
9069 || h->root.type == bfd_link_hash_defined
9070 || h->root.type == bfd_link_hash_defweak)
9071 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
9072 {
9073 (*_bfd_error_handler)
9074 ((sym_type == STT_TLS
9075 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
9076 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
9077 input_bfd,
9078 input_section,
9079 (long) rel->r_offset,
9080 howto->name,
9081 name);
9082 }
9083
252b5132
RH		 9084 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
9085 input_section, contents, rel,
9086 relocation, info, sec, name,
9087 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 9088 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 9089 &unresolved_reloc, &error_message);
0945cdfd
DJ		 9090
9091 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
9092 because such sections are not SEC_ALLOC and thus ld.so will
9093 not process them. */
9094 if (unresolved_reloc
9095 && !((input_section->flags & SEC_DEBUGGING) != 0
9096 && h->def_dynamic))
9097 {
9098 (*_bfd_error_handler)
843fe662
L		 9099 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
9100 input_bfd,
9101 input_section,
9102 (long) rel->r_offset,
9103 howto->name,
9104 h->root.root.string);
0945cdfd
DJ		 9105 return FALSE;
9106 }
252b5132
RH		 9107
9108 if (r != bfd_reloc_ok)
9109 {
252b5132
RH		 9110 switch (r)
9111 {
9112 case bfd_reloc_overflow:
cf919dfd
PB		 9113 /* If the overflowing reloc was to an undefined symbol,
9114 we have already printed one error message and there
9115 is no point complaining again. */
9116 if ((! h ||
9117 h->root.type != bfd_link_hash_undefined)
9118 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 9119 (info, (h ? &h->root : NULL), name, howto->name,
9120 (bfd_vma) 0, input_bfd, input_section,
9121 rel->r_offset))))
b34976b6 9122 return FALSE;
252b5132
RH		 9123 break;
9124
9125 case bfd_reloc_undefined:
9126 if (!((*info->callbacks->undefined_symbol)
9127 (info, name, input_bfd, input_section,
b34976b6
AM		 9128 rel->r_offset, TRUE)))
9129 return FALSE;
252b5132
RH		 9130 break;
9131
9132 case bfd_reloc_outofrange:
f2a9dd69 9133 error_message = _("out of range");
252b5132
RH		 9134 goto common_error;
9135
9136 case bfd_reloc_notsupported:
f2a9dd69 9137 error_message = _("unsupported relocation");
252b5132
RH		 9138 goto common_error;
9139
9140 case bfd_reloc_dangerous:
f2a9dd69 9141 /* error_message should already be set. */
252b5132
RH		 9142 goto common_error;
9143
9144 default:
f2a9dd69 9145 error_message = _("unknown error");
8029a119 9146 /* Fall through. */
252b5132
RH		 9147
9148 common_error:
f2a9dd69
DJ		 9149 BFD_ASSERT (error_message != NULL);
9150 if (!((*info->callbacks->reloc_dangerous)
9151 (info, error_message, input_bfd, input_section,
252b5132 9152 rel->r_offset)))
b34976b6 9153 return FALSE;
252b5132
RH		 9154 break;
9155 }
9156 }
9157 }
9158
b34976b6 9159 return TRUE;
252b5132
RH		 9160}
9161
91d6fa6a 9162/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 9163 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 9164 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 9165 maintaining that condition). */
9166
9167static void
9168add_unwind_table_edit (arm_unwind_table_edit **head,
9169 arm_unwind_table_edit **tail,
9170 arm_unwind_edit_type type,
9171 asection *linked_section,
91d6fa6a 9172 unsigned int tindex)
2468f9c9 9173{
21d799b5
NC		 9174 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9175 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 9176
9177 new_edit->type = type;
9178 new_edit->linked_section = linked_section;
91d6fa6a 9179 new_edit->index = tindex;
2468f9c9 9180
91d6fa6a 9181 if (tindex > 0)
2468f9c9
PB		 9182 {
9183 new_edit->next = NULL;
9184
9185 if (*tail)
9186 (*tail)->next = new_edit;
9187
9188 (*tail) = new_edit;
9189
9190 if (!*head)
9191 (*head) = new_edit;
9192 }
9193 else
9194 {
9195 new_edit->next = *head;
9196
9197 if (!*tail)
9198 *tail = new_edit;
9199
9200 *head = new_edit;
9201 }
9202}
9203
9204static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9205
9206/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9207static void
9208adjust_exidx_size(asection *exidx_sec, int adjust)
9209{
9210 asection *out_sec;
9211
9212 if (!exidx_sec->rawsize)
9213 exidx_sec->rawsize = exidx_sec->size;
9214
9215 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9216 out_sec = exidx_sec->output_section;
9217 /* Adjust size of output section. */
9218 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9219}
9220
9221/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9222static void
9223insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9224{
9225 struct _arm_elf_section_data *exidx_arm_data;
9226
9227 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9228 add_unwind_table_edit (
9229 &exidx_arm_data->u.exidx.unwind_edit_list,
9230 &exidx_arm_data->u.exidx.unwind_edit_tail,
9231 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9232
9233 adjust_exidx_size(exidx_sec, 8);
9234}
9235
9236/* Scan .ARM.exidx tables, and create a list describing edits which should be
9237 made to those tables, such that:
9238
9239 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9240 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9241 codes which have been inlined into the index).
9242
85fdf906
AH		 9243 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
9244
2468f9c9
PB		 9245 The edits are applied when the tables are written
9246 (in elf32_arm_write_section).
9247*/
9248
9249bfd_boolean
9250elf32_arm_fix_exidx_coverage (asection **text_section_order,
9251 unsigned int num_text_sections,
85fdf906
AH		 9252 struct bfd_link_info *info,
9253 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 9254{
9255 bfd *inp;
9256 unsigned int last_second_word = 0, i;
9257 asection *last_exidx_sec = NULL;
9258 asection *last_text_sec = NULL;
9259 int last_unwind_type = -1;
9260
9261 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9262 text sections. */
9263 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9264 {
9265 asection *sec;
9266
9267 for (sec = inp->sections; sec != NULL; sec = sec->next)
9268 {
9269 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9270 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9271
dec9d5df 9272 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9273 continue;
9274
9275 if (elf_sec->linked_to)
9276 {
9277 Elf_Internal_Shdr *linked_hdr
9278 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9279 struct _arm_elf_section_data *linked_sec_arm_data
9280 = get_arm_elf_section_data (linked_hdr->bfd_section);
9281
9282 if (linked_sec_arm_data == NULL)
9283 continue;
9284
9285 /* Link this .ARM.exidx section back from the text section it
9286 describes. */
9287 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9288 }
9289 }
9290 }
9291
9292 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9293 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 9294 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 9295
9296 for (i = 0; i < num_text_sections; i++)
9297 {
9298 asection *sec = text_section_order[i];
9299 asection *exidx_sec;
9300 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9301 struct _arm_elf_section_data *exidx_arm_data;
9302 bfd_byte *contents = NULL;
9303 int deleted_exidx_bytes = 0;
9304 bfd_vma j;
9305 arm_unwind_table_edit *unwind_edit_head = NULL;
9306 arm_unwind_table_edit *unwind_edit_tail = NULL;
9307 Elf_Internal_Shdr *hdr;
9308 bfd *ibfd;
9309
9310 if (arm_data == NULL)
9311 continue;
9312
9313 exidx_sec = arm_data->u.text.arm_exidx_sec;
9314 if (exidx_sec == NULL)
9315 {
9316 /* Section has no unwind data. */
9317 if (last_unwind_type == 0 || !last_exidx_sec)
9318 continue;
9319
9320 /* Ignore zero sized sections. */
9321 if (sec->size == 0)
9322 continue;
9323
9324 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9325 last_unwind_type = 0;
9326 continue;
9327 }
9328
22a8f80e
PB		 9329 /* Skip /DISCARD/ sections. */
9330 if (bfd_is_abs_section (exidx_sec->output_section))
9331 continue;
9332
2468f9c9
PB		 9333 hdr = &elf_section_data (exidx_sec)->this_hdr;
9334 if (hdr->sh_type != SHT_ARM_EXIDX)
9335 continue;
9336
9337 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9338 if (exidx_arm_data == NULL)
9339 continue;
9340
9341 ibfd = exidx_sec->owner;
9342
9343 if (hdr->contents != NULL)
9344 contents = hdr->contents;
9345 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9346 /* An error? */
9347 continue;
9348
9349 for (j = 0; j < hdr->sh_size; j += 8)
9350 {
9351 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9352 int unwind_type;
9353 int elide = 0;
9354
9355 /* An EXIDX_CANTUNWIND entry. */
9356 if (second_word == 1)
9357 {
9358 if (last_unwind_type == 0)
9359 elide = 1;
9360 unwind_type = 0;
9361 }
9362 /* Inlined unwinding data. Merge if equal to previous. */
9363 else if ((second_word & 0x80000000) != 0)
9364 {
85fdf906
AH		 9365 if (merge_exidx_entries
9366 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 9367 elide = 1;
9368 unwind_type = 1;
9369 last_second_word = second_word;
9370 }
9371 /* Normal table entry. In theory we could merge these too,
9372 but duplicate entries are likely to be much less common. */
9373 else
9374 unwind_type = 2;
9375
9376 if (elide)
9377 {
9378 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9379 DELETE_EXIDX_ENTRY, NULL, j / 8);
9380
9381 deleted_exidx_bytes += 8;
9382 }
9383
9384 last_unwind_type = unwind_type;
9385 }
9386
9387 /* Free contents if we allocated it ourselves. */
9388 if (contents != hdr->contents)
9389 free (contents);
9390
9391 /* Record edits to be applied later (in elf32_arm_write_section). */
9392 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9393 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9394
9395 if (deleted_exidx_bytes > 0)
9396 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9397
9398 last_exidx_sec = exidx_sec;
9399 last_text_sec = sec;
9400 }
9401
9402 /* Add terminating CANTUNWIND entry. */
9403 if (last_exidx_sec && last_unwind_type != 0)
9404 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9405
9406 return TRUE;
9407}
9408
3e6b1042
DJ		 9409static bfd_boolean
9410elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9411 bfd *ibfd, const char *name)
9412{
9413 asection *sec, *osec;
9414
9415 sec = bfd_get_section_by_name (ibfd, name);
9416 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9417 return TRUE;
9418
9419 osec = sec->output_section;
9420 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9421 return TRUE;
9422
9423 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9424 sec->output_offset, sec->size))
9425 return FALSE;
9426
9427 return TRUE;
9428}
9429
9430static bfd_boolean
9431elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9432{
9433 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 9434 asection *sec, *osec;
3e6b1042 9435
4dfe6ac6
NC		 9436 if (globals == NULL)
9437 return FALSE;
9438
3e6b1042
DJ		 9439 /* Invoke the regular ELF backend linker to do all the work. */
9440 if (!bfd_elf_final_link (abfd, info))
9441 return FALSE;
9442
fe33d2fa
CL		 9443 /* Process stub sections (eg BE8 encoding, ...). */
9444 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
9445 int i;
cdb21a0a
NS		 9446 for (i=0; i<htab->top_id; i++)
9447 {
9448 sec = htab->stub_group[i].stub_sec;
9449 /* Only process it once, in its link_sec slot. */
9450 if (sec && i == htab->stub_group[i].link_sec->id)
9451 {
9452 osec = sec->output_section;
9453 elf32_arm_write_section (abfd, info, sec, sec->contents);
9454 if (! bfd_set_section_contents (abfd, osec, sec->contents,
9455 sec->output_offset, sec->size))
9456 return FALSE;
9457 }
fe33d2fa 9458 }
fe33d2fa 9459
3e6b1042
DJ		 9460 /* Write out any glue sections now that we have created all the
9461 stubs. */
9462 if (globals->bfd_of_glue_owner != NULL)
9463 {
9464 if (! elf32_arm_output_glue_section (info, abfd,
9465 globals->bfd_of_glue_owner,
9466 ARM2THUMB_GLUE_SECTION_NAME))
9467 return FALSE;
9468
9469 if (! elf32_arm_output_glue_section (info, abfd,
9470 globals->bfd_of_glue_owner,
9471 THUMB2ARM_GLUE_SECTION_NAME))
9472 return FALSE;
9473
9474 if (! elf32_arm_output_glue_section (info, abfd,
9475 globals->bfd_of_glue_owner,
9476 VFP11_ERRATUM_VENEER_SECTION_NAME))
9477 return FALSE;
9478
9479 if (! elf32_arm_output_glue_section (info, abfd,
9480 globals->bfd_of_glue_owner,
9481 ARM_BX_GLUE_SECTION_NAME))
9482 return FALSE;
9483 }
9484
9485 return TRUE;
9486}
9487
c178919b
NC		 9488/* Set the right machine number. */
9489
9490static bfd_boolean
57e8b36a 9491elf32_arm_object_p (bfd *abfd)
c178919b 9492{
5a6c6817 9493 unsigned int mach;
57e8b36a 9494
5a6c6817 9495 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9496
5a6c6817
NC		 9497 if (mach != bfd_mach_arm_unknown)
9498 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9499
9500 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9501 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9502
e16bb312 9503 else
5a6c6817 9504 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9505
9506 return TRUE;
9507}
9508
fc830a83 9509/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9510
b34976b6 9511static bfd_boolean
57e8b36a 9512elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9513{
9514 if (elf_flags_init (abfd)
9515 && elf_elfheader (abfd)->e_flags != flags)
9516 {
fc830a83
NC		 9517 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9518 {
fd2ec330 9519 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9520 (*_bfd_error_handler)
9521 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9522 abfd);
fc830a83 9523 else
d003868e
AM		 9524 _bfd_error_handler
9525 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9526 abfd);
fc830a83 9527 }
252b5132
RH		 9528 }
9529 else
9530 {
9531 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9532 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9533 }
9534
b34976b6 9535 return TRUE;
252b5132
RH		 9536}
9537
fc830a83 9538/* Copy backend specific data from one object module to another. */
9b485d32 9539
b34976b6 9540static bfd_boolean
57e8b36a 9541elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9542{
9543 flagword in_flags;
9544 flagword out_flags;
9545
0ffa91dd 9546 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9547 return TRUE;
252b5132 9548
fc830a83 9549 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9550 out_flags = elf_elfheader (obfd)->e_flags;
9551
fc830a83
NC		 9552 if (elf_flags_init (obfd)
9553 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9554 && in_flags != out_flags)
252b5132 9555 {
252b5132 9556 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9557 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9558 return FALSE;
252b5132
RH		 9559
9560 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9561 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9562 return FALSE;
252b5132
RH		 9563
9564 /* If the src and dest have different interworking flags
9565 then turn off the interworking bit. */
fd2ec330 9566 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9567 {
fd2ec330 9568 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9569 _bfd_error_handler
9570 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9571 obfd, ibfd);
252b5132 9572
fd2ec330 9573 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9574 }
1006ba19
PB		 9575
9576 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9577 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9578 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9579 }
9580
9581 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9582 elf_flags_init (obfd) = TRUE;
252b5132 9583
94a3258f
PB		 9584 /* Also copy the EI_OSABI field. */
9585 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9586 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9587
104d59d1
JM		 9588 /* Copy object attributes. */
9589 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9590
9591 return TRUE;
9592}
9593
9594/* Values for Tag_ABI_PCS_R9_use. */
9595enum
9596{
9597 AEABI_R9_V6,
9598 AEABI_R9_SB,
9599 AEABI_R9_TLS,
9600 AEABI_R9_unused
9601};
9602
9603/* Values for Tag_ABI_PCS_RW_data. */
9604enum
9605{
9606 AEABI_PCS_RW_data_absolute,
9607 AEABI_PCS_RW_data_PCrel,
9608 AEABI_PCS_RW_data_SBrel,
9609 AEABI_PCS_RW_data_unused
9610};
9611
9612/* Values for Tag_ABI_enum_size. */
9613enum
9614{
9615 AEABI_enum_unused,
9616 AEABI_enum_short,
9617 AEABI_enum_wide,
9618 AEABI_enum_forced_wide
9619};
9620
104d59d1
JM		 9621/* Determine whether an object attribute tag takes an integer, a
9622 string or both. */
906e58ca 9623
104d59d1
JM		 9624static int
9625elf32_arm_obj_attrs_arg_type (int tag)
9626{
9627 if (tag == Tag_compatibility)
3483fe2e 9628 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9629 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9630 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9631 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9632 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9633 else if (tag < 32)
3483fe2e 9634 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9635 else
3483fe2e 9636 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9637}
9638
5aa6ff7c
AS		 9639/* The ABI defines that Tag_conformance should be emitted first, and that
9640 Tag_nodefaults should be second (if either is defined). This sets those
9641 two positions, and bumps up the position of all the remaining tags to
9642 compensate. */
9643static int
9644elf32_arm_obj_attrs_order (int num)
9645{
3de4a297 9646 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 9647 return Tag_conformance;
3de4a297 9648 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 9649 return Tag_nodefaults;
9650 if ((num - 2) < Tag_nodefaults)
9651 return num - 2;
9652 if ((num - 1) < Tag_conformance)
9653 return num - 1;
9654 return num;
9655}
9656
91e22acd
AS		 9657/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9658 Returns -1 if no architecture could be read. */
9659
9660static int
9661get_secondary_compatible_arch (bfd *abfd)
9662{
9663 obj_attribute *attr =
9664 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9665
9666 /* Note: the tag and its argument below are uleb128 values, though
9667 currently-defined values fit in one byte for each. */
9668 if (attr->s
9669 && attr->s[0] == Tag_CPU_arch
9670 && (attr->s[1] & 128) != 128
9671 && attr->s[2] == 0)
9672 return attr->s[1];
9673
9674 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9675 return -1;
9676}
9677
9678/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9679 The tag is removed if ARCH is -1. */
9680
8e79c3df 9681static void
91e22acd 9682set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9683{
91e22acd
AS		 9684 obj_attribute *attr =
9685 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9686
91e22acd
AS		 9687 if (arch == -1)
9688 {
9689 attr->s = NULL;
9690 return;
8e79c3df 9691 }
91e22acd
AS		 9692
9693 /* Note: the tag and its argument below are uleb128 values, though
9694 currently-defined values fit in one byte for each. */
9695 if (!attr->s)
21d799b5 9696 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 9697 attr->s[0] = Tag_CPU_arch;
9698 attr->s[1] = arch;
9699 attr->s[2] = '\0';
8e79c3df
CM		 9700}
9701
91e22acd
AS		 9702/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9703 into account. */
9704
9705static int
9706tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9707 int newtag, int secondary_compat)
8e79c3df 9708{
91e22acd
AS		 9709#define T(X) TAG_CPU_ARCH_##X
9710 int tagl, tagh, result;
9711 const int v6t2[] =
9712 {
9713 T(V6T2), /* PRE_V4. */
9714 T(V6T2), /* V4. */
9715 T(V6T2), /* V4T. */
9716 T(V6T2), /* V5T. */
9717 T(V6T2), /* V5TE. */
9718 T(V6T2), /* V5TEJ. */
9719 T(V6T2), /* V6. */
9720 T(V7), /* V6KZ. */
9721 T(V6T2) /* V6T2. */
9722 };
9723 const int v6k[] =
9724 {
9725 T(V6K), /* PRE_V4. */
9726 T(V6K), /* V4. */
9727 T(V6K), /* V4T. */
9728 T(V6K), /* V5T. */
9729 T(V6K), /* V5TE. */
9730 T(V6K), /* V5TEJ. */
9731 T(V6K), /* V6. */
9732 T(V6KZ), /* V6KZ. */
9733 T(V7), /* V6T2. */
9734 T(V6K) /* V6K. */
9735 };
9736 const int v7[] =
9737 {
9738 T(V7), /* PRE_V4. */
9739 T(V7), /* V4. */
9740 T(V7), /* V4T. */
9741 T(V7), /* V5T. */
9742 T(V7), /* V5TE. */
9743 T(V7), /* V5TEJ. */
9744 T(V7), /* V6. */
9745 T(V7), /* V6KZ. */
9746 T(V7), /* V6T2. */
9747 T(V7), /* V6K. */
9748 T(V7) /* V7. */
9749 };
9750 const int v6_m[] =
9751 {
9752 -1, /* PRE_V4. */
9753 -1, /* V4. */
9754 T(V6K), /* V4T. */
9755 T(V6K), /* V5T. */
9756 T(V6K), /* V5TE. */
9757 T(V6K), /* V5TEJ. */
9758 T(V6K), /* V6. */
9759 T(V6KZ), /* V6KZ. */
9760 T(V7), /* V6T2. */
9761 T(V6K), /* V6K. */
9762 T(V7), /* V7. */
9763 T(V6_M) /* V6_M. */
9764 };
9765 const int v6s_m[] =
9766 {
9767 -1, /* PRE_V4. */
9768 -1, /* V4. */
9769 T(V6K), /* V4T. */
9770 T(V6K), /* V5T. */
9771 T(V6K), /* V5TE. */
9772 T(V6K), /* V5TEJ. */
9773 T(V6K), /* V6. */
9774 T(V6KZ), /* V6KZ. */
9775 T(V7), /* V6T2. */
9776 T(V6K), /* V6K. */
9777 T(V7), /* V7. */
9778 T(V6S_M), /* V6_M. */
9779 T(V6S_M) /* V6S_M. */
9780 };
9e3c6df6
PB		 9781 const int v7e_m[] =
9782 {
9783 -1, /* PRE_V4. */
9784 -1, /* V4. */
9785 T(V7E_M), /* V4T. */
9786 T(V7E_M), /* V5T. */
9787 T(V7E_M), /* V5TE. */
9788 T(V7E_M), /* V5TEJ. */
9789 T(V7E_M), /* V6. */
9790 T(V7E_M), /* V6KZ. */
9791 T(V7E_M), /* V6T2. */
9792 T(V7E_M), /* V6K. */
9793 T(V7E_M), /* V7. */
9794 T(V7E_M), /* V6_M. */
9795 T(V7E_M), /* V6S_M. */
9796 T(V7E_M) /* V7E_M. */
9797 };
91e22acd
AS		 9798 const int v4t_plus_v6_m[] =
9799 {
9800 -1, /* PRE_V4. */
9801 -1, /* V4. */
9802 T(V4T), /* V4T. */
9803 T(V5T), /* V5T. */
9804 T(V5TE), /* V5TE. */
9805 T(V5TEJ), /* V5TEJ. */
9806 T(V6), /* V6. */
9807 T(V6KZ), /* V6KZ. */
9808 T(V6T2), /* V6T2. */
9809 T(V6K), /* V6K. */
9810 T(V7), /* V7. */
9811 T(V6_M), /* V6_M. */
9812 T(V6S_M), /* V6S_M. */
9e3c6df6 9813 T(V7E_M), /* V7E_M. */
91e22acd
AS		 9814 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9815 };
9816 const int *comb[] =
9817 {
9818 v6t2,
9819 v6k,
9820 v7,
9821 v6_m,
9822 v6s_m,
9e3c6df6 9823 v7e_m,
91e22acd
AS		 9824 /* Pseudo-architecture. */
9825 v4t_plus_v6_m
9826 };
9827
9828 /* Check we've not got a higher architecture than we know about. */
9829
9e3c6df6 9830 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 9831 {
3895f852 9832 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9833 return -1;
9834 }
9835
9836 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9837
9838 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9839 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9840 oldtag = T(V4T_PLUS_V6_M);
9841
9842 /* And override the new tag if we have a Tag_also_compatible_with on the
9843 input. */
9844
9845 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9846 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9847 newtag = T(V4T_PLUS_V6_M);
9848
9849 tagl = (oldtag < newtag) ? oldtag : newtag;
9850 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9851
9852 /* Architectures before V6KZ add features monotonically. */
9853 if (tagh <= TAG_CPU_ARCH_V6KZ)
9854 return result;
9855
9856 result = comb[tagh - T(V6T2)][tagl];
9857
9858 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9859 as the canonical version. */
9860 if (result == T(V4T_PLUS_V6_M))
9861 {
9862 result = T(V4T);
9863 *secondary_compat_out = T(V6_M);
9864 }
9865 else
9866 *secondary_compat_out = -1;
9867
9868 if (result == -1)
9869 {
3895f852 9870 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9871 ibfd, oldtag, newtag);
9872 return -1;
9873 }
9874
9875 return result;
9876#undef T
8e79c3df
CM		 9877}
9878
ee065d83
PB		 9879/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9880 are conflicting attributes. */
906e58ca 9881
ee065d83
PB		 9882static bfd_boolean
9883elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9884{
104d59d1
JM		 9885 obj_attribute *in_attr;
9886 obj_attribute *out_attr;
9887 obj_attribute_list *in_list;
8e79c3df 9888 obj_attribute_list *out_list;
91e22acd 9889 obj_attribute_list **out_listp;
ee065d83
PB		 9890 /* Some tags have 0 = don't care, 1 = strong requirement,
9891 2 = weak requirement. */
91e22acd 9892 static const int order_021[3] = {0, 2, 1};
ee065d83 9893 int i;
91e22acd 9894 bfd_boolean result = TRUE;
ee065d83 9895
3e6b1042
DJ		 9896 /* Skip the linker stubs file. This preserves previous behavior
9897 of accepting unknown attributes in the first input file - but
9898 is that a bug? */
9899 if (ibfd->flags & BFD_LINKER_CREATED)
9900 return TRUE;
9901
104d59d1 9902 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9903 {
9904 /* This is the first object. Copy the attributes. */
104d59d1 9905 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 9906
cd21e546
MGD		 9907 out_attr = elf_known_obj_attributes_proc (obfd);
9908
004ae526
PB		 9909 /* Use the Tag_null value to indicate the attributes have been
9910 initialized. */
cd21e546 9911 out_attr[0].i = 1;
004ae526 9912
cd21e546
MGD		 9913 /* We do not output objects with Tag_MPextension_use_legacy - we move
9914 the attribute's value to Tag_MPextension_use. */
9915 if (out_attr[Tag_MPextension_use_legacy].i != 0)
9916 {
9917 if (out_attr[Tag_MPextension_use].i != 0
9918 && out_attr[Tag_MPextension_use_legacy].i
9919 != out_attr[Tag_MPextension_use].i)
9920 {
9921 _bfd_error_handler
9922 (_("Error: %B has both the current and legacy "
9923 "Tag_MPextension_use attributes"), ibfd);
9924 result = FALSE;
9925 }
9926
9927 out_attr[Tag_MPextension_use] =
9928 out_attr[Tag_MPextension_use_legacy];
9929 out_attr[Tag_MPextension_use_legacy].type = 0;
9930 out_attr[Tag_MPextension_use_legacy].i = 0;
9931 }
9932
9933 return result;
ee065d83
PB		 9934 }
9935
104d59d1
JM		 9936 in_attr = elf_known_obj_attributes_proc (ibfd);
9937 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9938 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9939 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9940 {
8e79c3df 9941 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9942 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9943 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9944 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9945 {
9946 _bfd_error_handler
3895f852 9947 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 9948 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
9949 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 9950 result = FALSE;
ee065d83
PB		 9951 }
9952 }
9953
3de4a297 9954 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9955 {
9956 /* Merge this attribute with existing attributes. */
9957 switch (i)
9958 {
9959 case Tag_CPU_raw_name:
9960 case Tag_CPU_name:
91e22acd 9961 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9962 break;
9963
9964 case Tag_ABI_optimization_goals:
9965 case Tag_ABI_FP_optimization_goals:
9966 /* Use the first value seen. */
9967 break;
9968
9969 case Tag_CPU_arch:
91e22acd
AS		 9970 {
9971 int secondary_compat = -1, secondary_compat_out = -1;
9972 unsigned int saved_out_attr = out_attr[i].i;
9973 static const char *name_table[] = {
9974 /* These aren't real CPU names, but we can't guess
9975 that from the architecture version alone. */
9976 "Pre v4",
9977 "ARM v4",
9978 "ARM v4T",
9979 "ARM v5T",
9980 "ARM v5TE",
9981 "ARM v5TEJ",
9982 "ARM v6",
9983 "ARM v6KZ",
9984 "ARM v6T2",
9985 "ARM v6K",
9986 "ARM v7",
9987 "ARM v6-M",
9988 "ARM v6S-M"
9989 };
9990
9991 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9992 secondary_compat = get_secondary_compatible_arch (ibfd);
9993 secondary_compat_out = get_secondary_compatible_arch (obfd);
9994 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9995 &secondary_compat_out,
9996 in_attr[i].i,
9997 secondary_compat);
9998 set_secondary_compatible_arch (obfd, secondary_compat_out);
9999
10000 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
10001 if (out_attr[i].i == saved_out_attr)
10002 ; /* Leave the names alone. */
10003 else if (out_attr[i].i == in_attr[i].i)
10004 {
10005 /* The output architecture has been changed to match the
10006 input architecture. Use the input names. */
10007 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
10008 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
10009 : NULL;
10010 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
10011 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
10012 : NULL;
10013 }
10014 else
10015 {
10016 out_attr[Tag_CPU_name].s = NULL;
10017 out_attr[Tag_CPU_raw_name].s = NULL;
10018 }
10019
10020 /* If we still don't have a value for Tag_CPU_name,
10021 make one up now. Tag_CPU_raw_name remains blank. */
10022 if (out_attr[Tag_CPU_name].s == NULL
10023 && out_attr[i].i < ARRAY_SIZE (name_table))
10024 out_attr[Tag_CPU_name].s =
10025 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
10026 }
10027 break;
10028
ee065d83
PB		 10029 case Tag_ARM_ISA_use:
10030 case Tag_THUMB_ISA_use:
ee065d83 10031 case Tag_WMMX_arch:
91e22acd
AS		 10032 case Tag_Advanced_SIMD_arch:
10033 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 10034 case Tag_ABI_FP_rounding:
ee065d83
PB		 10035 case Tag_ABI_FP_exceptions:
10036 case Tag_ABI_FP_user_exceptions:
10037 case Tag_ABI_FP_number_model:
75375b3e 10038 case Tag_FP_HP_extension:
91e22acd
AS		 10039 case Tag_CPU_unaligned_access:
10040 case Tag_T2EE_use:
91e22acd 10041 case Tag_MPextension_use:
ee065d83
PB		 10042 /* Use the largest value specified. */
10043 if (in_attr[i].i > out_attr[i].i)
10044 out_attr[i].i = in_attr[i].i;
10045 break;
10046
75375b3e 10047 case Tag_ABI_align_preserved:
91e22acd
AS		 10048 case Tag_ABI_PCS_RO_data:
10049 /* Use the smallest value specified. */
10050 if (in_attr[i].i < out_attr[i].i)
10051 out_attr[i].i = in_attr[i].i;
10052 break;
10053
75375b3e 10054 case Tag_ABI_align_needed:
91e22acd 10055 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 10056 && (in_attr[Tag_ABI_align_preserved].i == 0
10057 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 10058 {
91e22acd
AS		 10059 /* This error message should be enabled once all non-conformant
10060 binaries in the toolchain have had the attributes set
10061 properly.
ee065d83 10062 _bfd_error_handler
3895f852 10063 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 10064 obfd, ibfd);
10065 result = FALSE; */
ee065d83 10066 }
91e22acd
AS		 10067 /* Fall through. */
10068 case Tag_ABI_FP_denormal:
10069 case Tag_ABI_PCS_GOT_use:
10070 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
10071 value if greater than 2 (for future-proofing). */
10072 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
10073 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
10074 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 10075 out_attr[i].i = in_attr[i].i;
10076 break;
91e22acd 10077
75375b3e
MGD		 10078 case Tag_Virtualization_use:
10079 /* The virtualization tag effectively stores two bits of
10080 information: the intended use of TrustZone (in bit 0), and the
10081 intended use of Virtualization (in bit 1). */
10082 if (out_attr[i].i == 0)
10083 out_attr[i].i = in_attr[i].i;
10084 else if (in_attr[i].i != 0
10085 && in_attr[i].i != out_attr[i].i)
10086 {
10087 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
10088 out_attr[i].i = 3;
10089 else
10090 {
10091 _bfd_error_handler
10092 (_("error: %B: unable to merge virtualization attributes "
10093 "with %B"),
10094 obfd, ibfd);
10095 result = FALSE;
10096 }
10097 }
10098 break;
91e22acd
AS		 10099
10100 case Tag_CPU_arch_profile:
10101 if (out_attr[i].i != in_attr[i].i)
10102 {
10103 /* 0 will merge with anything.
10104 'A' and 'S' merge to 'A'.
10105 'R' and 'S' merge to 'R'.
10106 'M' and 'A|R|S' is an error. */
10107 if (out_attr[i].i == 0
10108 || (out_attr[i].i == 'S'
10109 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
10110 out_attr[i].i = in_attr[i].i;
10111 else if (in_attr[i].i == 0
10112 || (in_attr[i].i == 'S'
10113 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
10114 ; /* Do nothing. */
10115 else
10116 {
10117 _bfd_error_handler
3895f852 10118 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 10119 ibfd,
10120 in_attr[i].i ? in_attr[i].i : '0',
10121 out_attr[i].i ? out_attr[i].i : '0');
10122 result = FALSE;
10123 }
10124 }
10125 break;
75375b3e 10126 case Tag_FP_arch:
62f3b8c8 10127 {
4547cb56
NC		 10128 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
10129 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
10130 when it's 0. It might mean absence of FP hardware if
10131 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
10132
62f3b8c8
PB		 10133 static const struct
10134 {
10135 int ver;
10136 int regs;
10137 } vfp_versions[7] =
10138 {
10139 {0, 0},
10140 {1, 16},
10141 {2, 16},
10142 {3, 32},
10143 {3, 16},
10144 {4, 32},
10145 {4, 16}
10146 };
10147 int ver;
10148 int regs;
10149 int newval;
10150
4547cb56
NC		 10151 /* If the output has no requirement about FP hardware,
10152 follow the requirement of the input. */
10153 if (out_attr[i].i == 0)
10154 {
10155 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
10156 out_attr[i].i = in_attr[i].i;
10157 out_attr[Tag_ABI_HardFP_use].i
10158 = in_attr[Tag_ABI_HardFP_use].i;
10159 break;
10160 }
10161 /* If the input has no requirement about FP hardware, do
10162 nothing. */
10163 else if (in_attr[i].i == 0)
10164 {
10165 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
10166 break;
10167 }
10168
10169 /* Both the input and the output have nonzero Tag_FP_arch.
10170 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
10171
10172 /* If both the input and the output have zero Tag_ABI_HardFP_use,
10173 do nothing. */
10174 if (in_attr[Tag_ABI_HardFP_use].i == 0
10175 && out_attr[Tag_ABI_HardFP_use].i == 0)
10176 ;
10177 /* If the input and the output have different Tag_ABI_HardFP_use,
10178 the combination of them is 3 (SP & DP). */
10179 else if (in_attr[Tag_ABI_HardFP_use].i
10180 != out_attr[Tag_ABI_HardFP_use].i)
10181 out_attr[Tag_ABI_HardFP_use].i = 3;
10182
10183 /* Now we can handle Tag_FP_arch. */
10184
62f3b8c8
PB		 10185 /* Values greater than 6 aren't defined, so just pick the
10186 biggest */
10187 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
10188 {
10189 out_attr[i] = in_attr[i];
10190 break;
10191 }
10192 /* The output uses the superset of input features
10193 (ISA version) and registers. */
10194 ver = vfp_versions[in_attr[i].i].ver;
10195 if (ver < vfp_versions[out_attr[i].i].ver)
10196 ver = vfp_versions[out_attr[i].i].ver;
10197 regs = vfp_versions[in_attr[i].i].regs;
10198 if (regs < vfp_versions[out_attr[i].i].regs)
10199 regs = vfp_versions[out_attr[i].i].regs;
10200 /* This assumes all possible supersets are also a valid
10201 options. */
10202 for (newval = 6; newval > 0; newval--)
10203 {
10204 if (regs == vfp_versions[newval].regs
10205 && ver == vfp_versions[newval].ver)
10206 break;
10207 }
10208 out_attr[i].i = newval;
10209 }
b1cc4aeb 10210 break;
ee065d83
PB		 10211 case Tag_PCS_config:
10212 if (out_attr[i].i == 0)
10213 out_attr[i].i = in_attr[i].i;
10214 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
10215 {
10216 /* It's sometimes ok to mix different configs, so this is only
10217 a warning. */
10218 _bfd_error_handler
10219 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10220 }
10221 break;
10222 case Tag_ABI_PCS_R9_use:
004ae526
PB		 10223 if (in_attr[i].i != out_attr[i].i
10224 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 10225 && in_attr[i].i != AEABI_R9_unused)
10226 {
10227 _bfd_error_handler
3895f852 10228 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 10229 result = FALSE;
ee065d83
PB		 10230 }
10231 if (out_attr[i].i == AEABI_R9_unused)
10232 out_attr[i].i = in_attr[i].i;
10233 break;
10234 case Tag_ABI_PCS_RW_data:
10235 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10236 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10237 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10238 {
10239 _bfd_error_handler
3895f852 10240 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 10241 ibfd);
91e22acd 10242 result = FALSE;
ee065d83
PB		 10243 }
10244 /* Use the smallest value specified. */
10245 if (in_attr[i].i < out_attr[i].i)
10246 out_attr[i].i = in_attr[i].i;
10247 break;
ee065d83 10248 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 10249 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10250 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 10251 {
10252 _bfd_error_handler
a9dc9481
JM		 10253 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10254 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 10255 }
a9dc9481 10256 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 10257 out_attr[i].i = in_attr[i].i;
10258 break;
ee065d83
PB		 10259 case Tag_ABI_enum_size:
10260 if (in_attr[i].i != AEABI_enum_unused)
10261 {
10262 if (out_attr[i].i == AEABI_enum_unused
10263 || out_attr[i].i == AEABI_enum_forced_wide)
10264 {
10265 /* The existing object is compatible with anything.
10266 Use whatever requirements the new object has. */
10267 out_attr[i].i = in_attr[i].i;
10268 }
10269 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 10270 && out_attr[i].i != in_attr[i].i
0ffa91dd 10271 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 10272 {
91e22acd 10273 static const char *aeabi_enum_names[] =
bf21ed78 10274 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 10275 const char *in_name =
10276 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10277 ? aeabi_enum_names[in_attr[i].i]
10278 : "<unknown>";
10279 const char *out_name =
10280 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10281 ? aeabi_enum_names[out_attr[i].i]
10282 : "<unknown>";
ee065d83 10283 _bfd_error_handler
bf21ed78 10284 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 10285 ibfd, in_name, out_name);
ee065d83
PB		 10286 }
10287 }
10288 break;
10289 case Tag_ABI_VFP_args:
10290 /* Aready done. */
10291 break;
10292 case Tag_ABI_WMMX_args:
10293 if (in_attr[i].i != out_attr[i].i)
10294 {
10295 _bfd_error_handler
3895f852 10296 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 10297 ibfd, obfd);
91e22acd 10298 result = FALSE;
ee065d83
PB		 10299 }
10300 break;
7b86a9fa
AS		 10301 case Tag_compatibility:
10302 /* Merged in target-independent code. */
10303 break;
91e22acd 10304 case Tag_ABI_HardFP_use:
4547cb56 10305 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 10306 break;
10307 case Tag_ABI_FP_16bit_format:
10308 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10309 {
10310 if (in_attr[i].i != out_attr[i].i)
10311 {
10312 _bfd_error_handler
3895f852 10313 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10314 ibfd, obfd);
10315 result = FALSE;
10316 }
10317 }
10318 if (in_attr[i].i != 0)
10319 out_attr[i].i = in_attr[i].i;
10320 break;
7b86a9fa 10321
cd21e546
MGD		 10322 case Tag_DIV_use:
10323 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
10324 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10325 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10326 CPU. We will merge as follows: If the input attribute's value
10327 is one then the output attribute's value remains unchanged. If
10328 the input attribute's value is zero or two then if the output
10329 attribute's value is one the output value is set to the input
10330 value, otherwise the output value must be the same as the
10331 inputs. */
10332 if (in_attr[i].i != 1 && out_attr[i].i != 1)
10333 {
10334 if (in_attr[i].i != out_attr[i].i)
10335 {
10336 _bfd_error_handler
10337 (_("DIV usage mismatch between %B and %B"),
10338 ibfd, obfd);
10339 result = FALSE;
10340 }
10341 }
10342
10343 if (in_attr[i].i != 1)
10344 out_attr[i].i = in_attr[i].i;
10345
10346 break;
10347
10348 case Tag_MPextension_use_legacy:
10349 /* We don't output objects with Tag_MPextension_use_legacy - we
10350 move the value to Tag_MPextension_use. */
10351 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
10352 {
10353 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
10354 {
10355 _bfd_error_handler
10356 (_("%B has has both the current and legacy "
10357 "Tag_MPextension_use attributes"),
10358 ibfd);
10359 result = FALSE;
10360 }
10361 }
10362
10363 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
10364 out_attr[Tag_MPextension_use] = in_attr[i];
10365
10366 break;
10367
91e22acd 10368 case Tag_nodefaults:
2d0bb761
AS		 10369 /* This tag is set if it exists, but the value is unused (and is
10370 typically zero). We don't actually need to do anything here -
10371 the merge happens automatically when the type flags are merged
10372 below. */
91e22acd
AS		 10373 break;
10374 case Tag_also_compatible_with:
10375 /* Already done in Tag_CPU_arch. */
10376 break;
10377 case Tag_conformance:
10378 /* Keep the attribute if it matches. Throw it away otherwise.
10379 No attribute means no claim to conform. */
10380 if (!in_attr[i].s || !out_attr[i].s
10381 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10382 out_attr[i].s = NULL;
10383 break;
3cfad14c 10384
91e22acd 10385 default:
3cfad14c 10386 {
91e22acd
AS		 10387 bfd *err_bfd = NULL;
10388
10389 /* The "known_obj_attributes" table does contain some undefined
10390 attributes. Ensure that there are unused. */
10391 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
10392 err_bfd = obfd;
10393 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
10394 err_bfd = ibfd;
10395
10396 if (err_bfd != NULL)
10397 {
10398 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10399 if ((i & 127) < 64)
10400 {
10401 _bfd_error_handler
10402 (_("%B: Unknown mandatory EABI object attribute %d"),
10403 err_bfd, i);
10404 bfd_set_error (bfd_error_bad_value);
10405 result = FALSE;
10406 }
10407 else
10408 {
10409 _bfd_error_handler
10410 (_("Warning: %B: Unknown EABI object attribute %d"),
10411 err_bfd, i);
10412 }
10413 }
10414
10415 /* Only pass on attributes that match in both inputs. */
10416 if (in_attr[i].i != out_attr[i].i
10417 || in_attr[i].s != out_attr[i].s
10418 || (in_attr[i].s != NULL && out_attr[i].s != NULL
10419 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
10420 {
10421 out_attr[i].i = 0;
10422 out_attr[i].s = NULL;
10423 }
3cfad14c 10424 }
91e22acd
AS		 10425 }
10426
10427 /* If out_attr was copied from in_attr then it won't have a type yet. */
10428 if (in_attr[i].type && !out_attr[i].type)
10429 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10430 }
10431
104d59d1 10432 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 10433 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
10434 return FALSE;
ee065d83 10435
104d59d1
JM		 10436 /* Check for any attributes not known on ARM. */
10437 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 10438 out_listp = &elf_other_obj_attributes_proc (obfd);
10439 out_list = *out_listp;
8e79c3df 10440
91e22acd 10441 for (; in_list || out_list; )
ee065d83 10442 {
91e22acd
AS		 10443 bfd *err_bfd = NULL;
10444 int err_tag = 0;
8e79c3df
CM		 10445
10446 /* The tags for each list are in numerical order. */
10447 /* If the tags are equal, then merge. */
91e22acd 10448 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 10449 {
91e22acd
AS		 10450 /* This attribute only exists in obfd. We can't merge, and we don't
10451 know what the tag means, so delete it. */
10452 err_bfd = obfd;
10453 err_tag = out_list->tag;
10454 *out_listp = out_list->next;
10455 out_list = *out_listp;
8e79c3df 10456 }
91e22acd 10457 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 10458 {
91e22acd
AS		 10459 /* This attribute only exists in ibfd. We can't merge, and we don't
10460 know what the tag means, so ignore it. */
10461 err_bfd = ibfd;
10462 err_tag = in_list->tag;
8e79c3df 10463 in_list = in_list->next;
eb111b1f 10464 }
91e22acd
AS		 10465 else /* The tags are equal. */
10466 {
10467 /* As present, all attributes in the list are unknown, and
10468 therefore can't be merged meaningfully. */
10469 err_bfd = obfd;
10470 err_tag = out_list->tag;
10471
10472 /* Only pass on attributes that match in both inputs. */
10473 if (in_list->attr.i != out_list->attr.i
10474 || in_list->attr.s != out_list->attr.s
10475 || (in_list->attr.s && out_list->attr.s
10476 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10477 {
10478 /* No match. Delete the attribute. */
10479 *out_listp = out_list->next;
10480 out_list = *out_listp;
10481 }
10482 else
10483 {
10484 /* Matched. Keep the attribute and move to the next. */
10485 out_list = out_list->next;
10486 in_list = in_list->next;
10487 }
10488 }
10489
10490 if (err_bfd)
10491 {
10492 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10493 if ((err_tag & 127) < 64)
10494 {
10495 _bfd_error_handler
10496 (_("%B: Unknown mandatory EABI object attribute %d"),
10497 err_bfd, err_tag);
10498 bfd_set_error (bfd_error_bad_value);
10499 result = FALSE;
10500 }
10501 else
10502 {
10503 _bfd_error_handler
10504 (_("Warning: %B: Unknown EABI object attribute %d"),
10505 err_bfd, err_tag);
10506 }
10507 }
ee065d83 10508 }
91e22acd 10509 return result;
252b5132
RH		 10510}
10511
3a4a14e9
PB		 10512
10513/* Return TRUE if the two EABI versions are incompatible. */
10514
10515static bfd_boolean
10516elf32_arm_versions_compatible (unsigned iver, unsigned over)
10517{
10518 /* v4 and v5 are the same spec before and after it was released,
10519 so allow mixing them. */
10520 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10521 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10522 return TRUE;
10523
10524 return (iver == over);
10525}
10526
252b5132
RH		 10527/* Merge backend specific data from an object file to the output
10528 object file when linking. */
9b485d32 10529
b34976b6 10530static bfd_boolean
21d799b5 10531elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 10532
9b485d32
NC		 10533/* Display the flags field. */
10534
b34976b6 10535static bfd_boolean
57e8b36a 10536elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10537{
fc830a83
NC		 10538 FILE * file = (FILE *) ptr;
10539 unsigned long flags;
252b5132
RH		 10540
10541 BFD_ASSERT (abfd != NULL && ptr != NULL);
10542
10543 /* Print normal ELF private data. */
10544 _bfd_elf_print_private_bfd_data (abfd, ptr);
10545
fc830a83 10546 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10547 /* Ignore init flag - it may not be set, despite the flags field
10548 containing valid data. */
252b5132
RH		 10549
10550 /* xgettext:c-format */
9b485d32 10551 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10552
fc830a83
NC		 10553 switch (EF_ARM_EABI_VERSION (flags))
10554 {
10555 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10556 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10557 official ARM ELF extended ABI. Hence they are only decoded if
10558 the EABI version is not set. */
fd2ec330 10559 if (flags & EF_ARM_INTERWORK)
9b485d32 10560 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10561
fd2ec330 10562 if (flags & EF_ARM_APCS_26)
6c571f00 10563 fprintf (file, " [APCS-26]");
fc830a83 10564 else
6c571f00 10565 fprintf (file, " [APCS-32]");
9a5aca8c 10566
96a846ea
RE		 10567 if (flags & EF_ARM_VFP_FLOAT)
10568 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10569 else if (flags & EF_ARM_MAVERICK_FLOAT)
10570 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10571 else
10572 fprintf (file, _(" [FPA float format]"));
10573
fd2ec330 10574 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10575 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10576
fd2ec330 10577 if (flags & EF_ARM_PIC)
9b485d32 10578 fprintf (file, _(" [position independent]"));
fc830a83 10579
fd2ec330 10580 if (flags & EF_ARM_NEW_ABI)
9b485d32 10581 fprintf (file, _(" [new ABI]"));
9a5aca8c 10582
fd2ec330 10583 if (flags & EF_ARM_OLD_ABI)
9b485d32 10584 fprintf (file, _(" [old ABI]"));
9a5aca8c 10585
fd2ec330 10586 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10587 fprintf (file, _(" [software FP]"));
9a5aca8c 10588
96a846ea
RE		 10589 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10590 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10591 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10592 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10593 break;
9a5aca8c 10594
fc830a83 10595 case EF_ARM_EABI_VER1:
9b485d32 10596 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10597
fc830a83 10598 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10599 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10600 else
9b485d32 10601 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10602
fc830a83
NC		 10603 flags &= ~ EF_ARM_SYMSARESORTED;
10604 break;
9a5aca8c 10605
fd2ec330
PB		 10606 case EF_ARM_EABI_VER2:
10607 fprintf (file, _(" [Version2 EABI]"));
10608
10609 if (flags & EF_ARM_SYMSARESORTED)
10610 fprintf (file, _(" [sorted symbol table]"));
10611 else
10612 fprintf (file, _(" [unsorted symbol table]"));
10613
10614 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10615 fprintf (file, _(" [dynamic symbols use segment index]"));
10616
10617 if (flags & EF_ARM_MAPSYMSFIRST)
10618 fprintf (file, _(" [mapping symbols precede others]"));
10619
99e4ae17 10620 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10621 | EF_ARM_MAPSYMSFIRST);
10622 break;
10623
d507cf36
PB		 10624 case EF_ARM_EABI_VER3:
10625 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10626 break;
10627
10628 case EF_ARM_EABI_VER4:
10629 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10630 goto eabi;
d507cf36 10631
3a4a14e9
PB		 10632 case EF_ARM_EABI_VER5:
10633 fprintf (file, _(" [Version5 EABI]"));
10634 eabi:
d507cf36
PB		 10635 if (flags & EF_ARM_BE8)
10636 fprintf (file, _(" [BE8]"));
10637
10638 if (flags & EF_ARM_LE8)
10639 fprintf (file, _(" [LE8]"));
10640
10641 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10642 break;
10643
fc830a83 10644 default:
9b485d32 10645 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10646 break;
10647 }
252b5132 10648
fc830a83 10649 flags &= ~ EF_ARM_EABIMASK;
252b5132 10650
fc830a83 10651 if (flags & EF_ARM_RELEXEC)
9b485d32 10652 fprintf (file, _(" [relocatable executable]"));
252b5132 10653
fc830a83 10654 if (flags & EF_ARM_HASENTRY)
9b485d32 10655 fprintf (file, _(" [has entry point]"));
252b5132 10656
fc830a83
NC		 10657 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10658
10659 if (flags)
9b485d32 10660 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10661
252b5132
RH		 10662 fputc ('\n', file);
10663
b34976b6 10664 return TRUE;
252b5132
RH		 10665}
10666
10667static int
57e8b36a 10668elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10669{
2f0ca46a
NC		 10670 switch (ELF_ST_TYPE (elf_sym->st_info))
10671 {
10672 case STT_ARM_TFUNC:
10673 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10674
2f0ca46a
NC		 10675 case STT_ARM_16BIT:
10676 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10677 This allows us to distinguish between data used by Thumb instructions
10678 and non-data (which is probably code) inside Thumb regions of an
10679 executable. */
1a0eb693 10680 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10681 return ELF_ST_TYPE (elf_sym->st_info);
10682 break;
9a5aca8c 10683
ce855c42
NC		 10684 default:
10685 break;
2f0ca46a
NC		 10686 }
10687
10688 return type;
252b5132 10689}
f21f3fe0 10690
252b5132 10691static asection *
07adf181
AM		 10692elf32_arm_gc_mark_hook (asection *sec,
10693 struct bfd_link_info *info,
10694 Elf_Internal_Rela *rel,
10695 struct elf_link_hash_entry *h,
10696 Elf_Internal_Sym *sym)
252b5132
RH		 10697{
10698 if (h != NULL)
07adf181 10699 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10700 {
10701 case R_ARM_GNU_VTINHERIT:
10702 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10703 return NULL;
10704 }
9ad5cbcf 10705
07adf181 10706 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10707}
10708
780a67af
NC		 10709/* Update the got entry reference counts for the section being removed. */
10710
b34976b6 10711static bfd_boolean
ba93b8ac
DJ		 10712elf32_arm_gc_sweep_hook (bfd * abfd,
10713 struct bfd_link_info * info,
10714 asection * sec,
10715 const Elf_Internal_Rela * relocs)
252b5132 10716{
5e681ec4
PB		 10717 Elf_Internal_Shdr *symtab_hdr;
10718 struct elf_link_hash_entry **sym_hashes;
10719 bfd_signed_vma *local_got_refcounts;
10720 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10721 struct elf32_arm_link_hash_table * globals;
10722
7dda2462
TG		 10723 if (info->relocatable)
10724 return TRUE;
10725
eb043451 10726 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10727 if (globals == NULL)
10728 return FALSE;
5e681ec4
PB		 10729
10730 elf_section_data (sec)->local_dynrel = NULL;
10731
0ffa91dd 10732 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10733 sym_hashes = elf_sym_hashes (abfd);
10734 local_got_refcounts = elf_local_got_refcounts (abfd);
10735
906e58ca 10736 check_use_blx (globals);
bd97cb95 10737
5e681ec4
PB		 10738 relend = relocs + sec->reloc_count;
10739 for (rel = relocs; rel < relend; rel++)
eb043451 10740 {
3eb128b2
AM		 10741 unsigned long r_symndx;
10742 struct elf_link_hash_entry *h = NULL;
eb043451 10743 int r_type;
5e681ec4 10744
3eb128b2
AM		 10745 r_symndx = ELF32_R_SYM (rel->r_info);
10746 if (r_symndx >= symtab_hdr->sh_info)
10747 {
10748 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10749 while (h->root.type == bfd_link_hash_indirect
10750 || h->root.type == bfd_link_hash_warning)
10751 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10752 }
10753
eb043451 10754 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10755 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10756 switch (r_type)
10757 {
10758 case R_ARM_GOT32:
eb043451 10759 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10760 case R_ARM_TLS_GD32:
10761 case R_ARM_TLS_IE32:
3eb128b2 10762 if (h != NULL)
eb043451 10763 {
eb043451
PB		 10764 if (h->got.refcount > 0)
10765 h->got.refcount -= 1;
10766 }
10767 else if (local_got_refcounts != NULL)
10768 {
10769 if (local_got_refcounts[r_symndx] > 0)
10770 local_got_refcounts[r_symndx] -= 1;
10771 }
10772 break;
10773
ba93b8ac 10774 case R_ARM_TLS_LDM32:
4dfe6ac6 10775 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 10776 break;
10777
eb043451 10778 case R_ARM_ABS32:
bb224fc3 10779 case R_ARM_ABS32_NOI:
eb043451 10780 case R_ARM_REL32:
bb224fc3 10781 case R_ARM_REL32_NOI:
eb043451
PB		 10782 case R_ARM_PC24:
10783 case R_ARM_PLT32:
5b5bb741
PB		 10784 case R_ARM_CALL:
10785 case R_ARM_JUMP24:
eb043451 10786 case R_ARM_PREL31:
c19d1205 10787 case R_ARM_THM_CALL:
bd97cb95
DJ		 10788 case R_ARM_THM_JUMP24:
10789 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10790 case R_ARM_MOVW_ABS_NC:
10791 case R_ARM_MOVT_ABS:
10792 case R_ARM_MOVW_PREL_NC:
10793 case R_ARM_MOVT_PREL:
10794 case R_ARM_THM_MOVW_ABS_NC:
10795 case R_ARM_THM_MOVT_ABS:
10796 case R_ARM_THM_MOVW_PREL_NC:
10797 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10798 /* Should the interworking branches be here also? */
10799
3eb128b2 10800 if (h != NULL)
eb043451
PB		 10801 {
10802 struct elf32_arm_link_hash_entry *eh;
10803 struct elf32_arm_relocs_copied **pp;
10804 struct elf32_arm_relocs_copied *p;
5e681ec4 10805
b7693d02 10806 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10807
eb043451 10808 if (h->plt.refcount > 0)
b7693d02
DJ		 10809 {
10810 h->plt.refcount -= 1;
bd97cb95
DJ		 10811 if (r_type == R_ARM_THM_CALL)
10812 eh->plt_maybe_thumb_refcount--;
10813
10814 if (r_type == R_ARM_THM_JUMP24
10815 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10816 eh->plt_thumb_refcount--;
10817 }
5e681ec4 10818
eb043451 10819 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10820 || r_type == R_ARM_REL32
10821 || r_type == R_ARM_ABS32_NOI
10822 || r_type == R_ARM_REL32_NOI)
eb043451 10823 {
eb043451
PB		 10824 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10825 pp = &p->next)
10826 if (p->section == sec)
10827 {
10828 p->count -= 1;
bb224fc3
MS		 10829 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10830 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10831 p->pc_count -= 1;
eb043451
PB		 10832 if (p->count == 0)
10833 *pp = p->next;
10834 break;
10835 }
10836 }
10837 }
10838 break;
5e681ec4 10839
eb043451
PB		 10840 default:
10841 break;
10842 }
10843 }
5e681ec4 10844
b34976b6 10845 return TRUE;
252b5132
RH		 10846}
10847
780a67af
NC		 10848/* Look through the relocs for a section during the first phase. */
10849
b34976b6 10850static bfd_boolean
57e8b36a
NC		 10851elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10852 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10853{
b34976b6
AM		 10854 Elf_Internal_Shdr *symtab_hdr;
10855 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10856 const Elf_Internal_Rela *rel;
10857 const Elf_Internal_Rela *rel_end;
10858 bfd *dynobj;
5e681ec4 10859 asection *sreloc;
5e681ec4 10860 struct elf32_arm_link_hash_table *htab;
39623e12 10861 bfd_boolean needs_plt;
ce98a316 10862 unsigned long nsyms;
9a5aca8c 10863
1049f94e 10864 if (info->relocatable)
b34976b6 10865 return TRUE;
9a5aca8c 10866
0ffa91dd
NC		 10867 BFD_ASSERT (is_arm_elf (abfd));
10868
5e681ec4 10869 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10870 if (htab == NULL)
10871 return FALSE;
10872
5e681ec4 10873 sreloc = NULL;
9a5aca8c 10874
67687978
PB		 10875 /* Create dynamic sections for relocatable executables so that we can
10876 copy relocations. */
10877 if (htab->root.is_relocatable_executable
10878 && ! htab->root.dynamic_sections_created)
10879 {
10880 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10881 return FALSE;
10882 }
10883
252b5132 10884 dynobj = elf_hash_table (info)->dynobj;
0ffa91dd 10885 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10886 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10887 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10888
252b5132
RH		 10889 rel_end = relocs + sec->reloc_count;
10890 for (rel = relocs; rel < rel_end; rel++)
10891 {
10892 struct elf_link_hash_entry *h;
b7693d02 10893 struct elf32_arm_link_hash_entry *eh;
252b5132 10894 unsigned long r_symndx;
eb043451 10895 int r_type;
9a5aca8c 10896
252b5132 10897 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10898 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10899 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10900
ce98a316
NC		 10901 if (r_symndx >= nsyms
10902 /* PR 9934: It is possible to have relocations that do not
10903 refer to symbols, thus it is also possible to have an
10904 object file containing relocations but no symbol table. */
cf35638d 10905 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 10906 {
10907 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10908 r_symndx);
ba93b8ac
DJ		 10909 return FALSE;
10910 }
10911
ce98a316 10912 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10913 h = NULL;
10914 else
973a3492
L		 10915 {
10916 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10917 while (h->root.type == bfd_link_hash_indirect
10918 || h->root.type == bfd_link_hash_warning)
10919 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10920 }
9a5aca8c 10921
b7693d02
DJ		 10922 eh = (struct elf32_arm_link_hash_entry *) h;
10923
eb043451 10924 switch (r_type)
252b5132 10925 {
5e681ec4 10926 case R_ARM_GOT32:
eb043451 10927 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10928 case R_ARM_TLS_GD32:
10929 case R_ARM_TLS_IE32:
5e681ec4 10930 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10931 {
10932 int tls_type, old_tls_type;
5e681ec4 10933
ba93b8ac
DJ		 10934 switch (r_type)
10935 {
10936 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10937 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10938 default: tls_type = GOT_NORMAL; break;
10939 }
252b5132 10940
ba93b8ac
DJ		 10941 if (h != NULL)
10942 {
10943 h->got.refcount++;
10944 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10945 }
10946 else
10947 {
10948 bfd_signed_vma *local_got_refcounts;
10949
10950 /* This is a global offset table entry for a local symbol. */
10951 local_got_refcounts = elf_local_got_refcounts (abfd);
10952 if (local_got_refcounts == NULL)
10953 {
10954 bfd_size_type size;
906e58ca 10955
ba93b8ac 10956 size = symtab_hdr->sh_info;
906e58ca 10957 size *= (sizeof (bfd_signed_vma) + sizeof (char));
21d799b5
NC		 10958 local_got_refcounts = (bfd_signed_vma *)
10959 bfd_zalloc (abfd, size);
ba93b8ac
DJ		 10960 if (local_got_refcounts == NULL)
10961 return FALSE;
10962 elf_local_got_refcounts (abfd) = local_got_refcounts;
10963 elf32_arm_local_got_tls_type (abfd)
10964 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10965 }
10966 local_got_refcounts[r_symndx] += 1;
10967 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10968 }
10969
10970 /* We will already have issued an error message if there is a
10971 TLS / non-TLS mismatch, based on the symbol type. We don't
10972 support any linker relaxations. So just combine any TLS
10973 types needed. */
10974 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10975 && tls_type != GOT_NORMAL)
10976 tls_type |= old_tls_type;
10977
10978 if (old_tls_type != tls_type)
10979 {
10980 if (h != NULL)
10981 elf32_arm_hash_entry (h)->tls_type = tls_type;
10982 else
10983 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10984 }
10985 }
8029a119 10986 /* Fall through. */
ba93b8ac
DJ		 10987
10988 case R_ARM_TLS_LDM32:
10989 if (r_type == R_ARM_TLS_LDM32)
10990 htab->tls_ldm_got.refcount++;
8029a119 10991 /* Fall through. */
252b5132 10992
c19d1205 10993 case R_ARM_GOTOFF32:
5e681ec4
PB		 10994 case R_ARM_GOTPC:
10995 if (htab->sgot == NULL)
10996 {
10997 if (htab->root.dynobj == NULL)
10998 htab->root.dynobj = abfd;
10999 if (!create_got_section (htab->root.dynobj, info))
11000 return FALSE;
11001 }
252b5132
RH		 11002 break;
11003
00a97672
RS		 11004 case R_ARM_ABS12:
11005 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
11006 ldr __GOTT_INDEX__ offsets. */
11007 if (!htab->vxworks_p)
11008 break;
8029a119 11009 /* Fall through. */
00a97672 11010
252b5132 11011 case R_ARM_PC24:
7359ea65 11012 case R_ARM_PLT32:
5b5bb741
PB		 11013 case R_ARM_CALL:
11014 case R_ARM_JUMP24:
eb043451 11015 case R_ARM_PREL31:
c19d1205 11016 case R_ARM_THM_CALL:
bd97cb95
DJ		 11017 case R_ARM_THM_JUMP24:
11018 case R_ARM_THM_JUMP19:
39623e12
PB		 11019 needs_plt = 1;
11020 goto normal_reloc;
11021
96c23d59
JM		 11022 case R_ARM_MOVW_ABS_NC:
11023 case R_ARM_MOVT_ABS:
11024 case R_ARM_THM_MOVW_ABS_NC:
11025 case R_ARM_THM_MOVT_ABS:
11026 if (info->shared)
11027 {
11028 (*_bfd_error_handler)
11029 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
11030 abfd, elf32_arm_howto_table_1[r_type].name,
11031 (h) ? h->root.root.string : "a local symbol");
11032 bfd_set_error (bfd_error_bad_value);
11033 return FALSE;
11034 }
11035
11036 /* Fall through. */
39623e12
PB		 11037 case R_ARM_ABS32:
11038 case R_ARM_ABS32_NOI:
11039 case R_ARM_REL32:
11040 case R_ARM_REL32_NOI:
b6895b4f
PB		 11041 case R_ARM_MOVW_PREL_NC:
11042 case R_ARM_MOVT_PREL:
b6895b4f
PB		 11043 case R_ARM_THM_MOVW_PREL_NC:
11044 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 11045 needs_plt = 0;
11046 normal_reloc:
11047
b7693d02 11048 /* Should the interworking branches be listed here? */
7359ea65 11049 if (h != NULL)
5e681ec4
PB		 11050 {
11051 /* If this reloc is in a read-only section, we might
11052 need a copy reloc. We can't check reliably at this
11053 stage whether the section is read-only, as input
11054 sections have not yet been mapped to output sections.
11055 Tentatively set the flag for now, and correct in
11056 adjust_dynamic_symbol. */
7359ea65 11057 if (!info->shared)
f5385ebf 11058 h->non_got_ref = 1;
7359ea65 11059
5e681ec4 11060 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 11061 refers to is in a different object. We can't tell for
11062 sure yet, because something later might force the
11063 symbol local. */
39623e12 11064 if (needs_plt)
f5385ebf 11065 h->needs_plt = 1;
4f199be3
DJ		 11066
11067 /* If we create a PLT entry, this relocation will reference
11068 it, even if it's an ABS32 relocation. */
11069 h->plt.refcount += 1;
b7693d02 11070
bd97cb95
DJ		 11071 /* It's too early to use htab->use_blx here, so we have to
11072 record possible blx references separately from
11073 relocs that definitely need a thumb stub. */
11074
c19d1205 11075 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 11076 eh->plt_maybe_thumb_refcount += 1;
11077
11078 if (r_type == R_ARM_THM_JUMP24
11079 || r_type == R_ARM_THM_JUMP19)
b7693d02 11080 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 11081 }
11082
67687978
PB		 11083 /* If we are creating a shared library or relocatable executable,
11084 and this is a reloc against a global symbol, or a non PC
11085 relative reloc against a local symbol, then we need to copy
11086 the reloc into the shared library. However, if we are linking
11087 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 11088 global symbol which is defined in an object we are
11089 including in the link (i.e., DEF_REGULAR is set). At
11090 this point we have not seen all the input files, so it is
11091 possible that DEF_REGULAR is not set now but will be set
11092 later (it is never cleared). We account for that
11093 possibility below by storing information in the
5e681ec4 11094 relocs_copied field of the hash table entry. */
67687978 11095 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 11096 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 11097 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 11098 || (h != NULL && ! h->needs_plt
11099 && (! info->symbolic || ! h->def_regular))))
252b5132 11100 {
5e681ec4
PB		 11101 struct elf32_arm_relocs_copied *p, **head;
11102
252b5132
RH		 11103 /* When creating a shared object, we must copy these
11104 reloc types into the output file. We create a reloc
11105 section in dynobj and make room for this reloc. */
83bac4b0 11106 if (sreloc == NULL)
252b5132 11107 {
83bac4b0
NC		 11108 sreloc = _bfd_elf_make_dynamic_reloc_section
11109 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 11110
83bac4b0 11111 if (sreloc == NULL)
b34976b6 11112 return FALSE;
252b5132 11113
83bac4b0 11114 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 11115 if (htab->symbian_p)
252b5132 11116 {
83bac4b0 11117 flagword flags;
5e681ec4 11118
83bac4b0 11119 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 11120 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 11121 bfd_set_section_flags (dynobj, sreloc, flags);
11122 }
252b5132
RH		 11123 }
11124
5e681ec4
PB		 11125 /* If this is a global symbol, we count the number of
11126 relocations we need for this symbol. */
11127 if (h != NULL)
252b5132 11128 {
5e681ec4
PB		 11129 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
11130 }
11131 else
11132 {
11133 /* Track dynamic relocs needed for local syms too.
11134 We really need local syms available to do this
11135 easily. Oh well. */
5e681ec4 11136 asection *s;
6edfbbad 11137 void *vpp;
87d72d41 11138 Elf_Internal_Sym *isym;
6edfbbad 11139
87d72d41
AM		 11140 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11141 abfd, r_symndx);
11142 if (isym == NULL)
5e681ec4 11143 return FALSE;
57e8b36a 11144
87d72d41
AM		 11145 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11146 if (s == NULL)
11147 s = sec;
11148
6edfbbad
DJ		 11149 vpp = &elf_section_data (s)->local_dynrel;
11150 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 11151 }
57e8b36a 11152
5e681ec4
PB		 11153 p = *head;
11154 if (p == NULL || p->section != sec)
11155 {
11156 bfd_size_type amt = sizeof *p;
57e8b36a 11157
21d799b5
NC		 11158 p = (struct elf32_arm_relocs_copied *)
11159 bfd_alloc (htab->root.dynobj, amt);
252b5132 11160 if (p == NULL)
5e681ec4
PB		 11161 return FALSE;
11162 p->next = *head;
11163 *head = p;
11164 p->section = sec;
11165 p->count = 0;
ba93b8ac 11166 p->pc_count = 0;
252b5132 11167 }
57e8b36a 11168
bb224fc3 11169 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 11170 p->pc_count += 1;
71a976dd 11171 p->count += 1;
252b5132
RH		 11172 }
11173 break;
11174
11175 /* This relocation describes the C++ object vtable hierarchy.
11176 Reconstruct it for later use during GC. */
11177 case R_ARM_GNU_VTINHERIT:
c152c796 11178 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 11179 return FALSE;
252b5132 11180 break;
9a5aca8c 11181
252b5132
RH		 11182 /* This relocation describes which C++ vtable entries are actually
11183 used. Record for later use during GC. */
11184 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 11185 BFD_ASSERT (h != NULL);
11186 if (h != NULL
11187 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 11188 return FALSE;
252b5132
RH		 11189 break;
11190 }
11191 }
f21f3fe0 11192
b34976b6 11193 return TRUE;
252b5132
RH		 11194}
11195
6a5bb875
PB		 11196/* Unwinding tables are not referenced directly. This pass marks them as
11197 required if the corresponding code section is marked. */
11198
11199static bfd_boolean
906e58ca
NC		 11200elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11201 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11202{
11203 bfd *sub;
11204 Elf_Internal_Shdr **elf_shdrp;
11205 bfd_boolean again;
11206
11207 /* Marking EH data may cause additional code sections to be marked,
11208 requiring multiple passes. */
11209 again = TRUE;
11210 while (again)
11211 {
11212 again = FALSE;
11213 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11214 {
11215 asection *o;
11216
0ffa91dd 11217 if (! is_arm_elf (sub))
6a5bb875
PB		 11218 continue;
11219
11220 elf_shdrp = elf_elfsections (sub);
11221 for (o = sub->sections; o != NULL; o = o->next)
11222 {
11223 Elf_Internal_Shdr *hdr;
0ffa91dd 11224
6a5bb875 11225 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11226 if (hdr->sh_type == SHT_ARM_EXIDX
11227 && hdr->sh_link
11228 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11229 && !o->gc_mark
11230 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11231 {
11232 again = TRUE;
11233 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11234 return FALSE;
11235 }
11236 }
11237 }
11238 }
11239
11240 return TRUE;
11241}
11242
3c9458e9
NC		 11243/* Treat mapping symbols as special target symbols. */
11244
11245static bfd_boolean
11246elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11247{
b0796911
PB		 11248 return bfd_is_arm_special_symbol_name (sym->name,
11249 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11250}
11251
0367ecfb
NC		 11252/* This is a copy of elf_find_function() from elf.c except that
11253 ARM mapping symbols are ignored when looking for function names
11254 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11255
0367ecfb
NC		 11256static bfd_boolean
11257arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11258 asection * section,
11259 asymbol ** symbols,
11260 bfd_vma offset,
11261 const char ** filename_ptr,
11262 const char ** functionname_ptr)
11263{
11264 const char * filename = NULL;
11265 asymbol * func = NULL;
11266 bfd_vma low_func = 0;
11267 asymbol ** p;
252b5132
RH		 11268
11269 for (p = symbols; *p != NULL; p++)
11270 {
11271 elf_symbol_type *q;
11272
11273 q = (elf_symbol_type *) *p;
11274
252b5132
RH		 11275 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11276 {
11277 default:
11278 break;
11279 case STT_FILE:
11280 filename = bfd_asymbol_name (&q->symbol);
11281 break;
252b5132
RH		 11282 case STT_FUNC:
11283 case STT_ARM_TFUNC:
9d2da7ca 11284 case STT_NOTYPE:
b0796911 11285 /* Skip mapping symbols. */
0367ecfb 11286 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11287 && bfd_is_arm_special_symbol_name (q->symbol.name,
11288 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11289 continue;
11290 /* Fall through. */
6b40fcba 11291 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11292 && q->symbol.value >= low_func
11293 && q->symbol.value <= offset)
11294 {
11295 func = (asymbol *) q;
11296 low_func = q->symbol.value;
11297 }
11298 break;
11299 }
11300 }
11301
11302 if (func == NULL)
b34976b6 11303 return FALSE;
252b5132 11304
0367ecfb
NC		 11305 if (filename_ptr)
11306 *filename_ptr = filename;
11307 if (functionname_ptr)
11308 *functionname_ptr = bfd_asymbol_name (func);
11309
11310 return TRUE;
906e58ca 11311}
0367ecfb
NC		 11312
11313
11314/* Find the nearest line to a particular section and offset, for error
11315 reporting. This code is a duplicate of the code in elf.c, except
11316 that it uses arm_elf_find_function. */
11317
11318static bfd_boolean
11319elf32_arm_find_nearest_line (bfd * abfd,
11320 asection * section,
11321 asymbol ** symbols,
11322 bfd_vma offset,
11323 const char ** filename_ptr,
11324 const char ** functionname_ptr,
11325 unsigned int * line_ptr)
11326{
11327 bfd_boolean found = FALSE;
11328
11329 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11330
11331 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11332 filename_ptr, functionname_ptr,
11333 line_ptr, 0,
11334 & elf_tdata (abfd)->dwarf2_find_line_info))
11335 {
11336 if (!*functionname_ptr)
11337 arm_elf_find_function (abfd, section, symbols, offset,
11338 *filename_ptr ? NULL : filename_ptr,
11339 functionname_ptr);
f21f3fe0 11340
0367ecfb
NC		 11341 return TRUE;
11342 }
11343
11344 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11345 & found, filename_ptr,
11346 functionname_ptr, line_ptr,
11347 & elf_tdata (abfd)->line_info))
11348 return FALSE;
11349
11350 if (found && (*functionname_ptr || *line_ptr))
11351 return TRUE;
11352
11353 if (symbols == NULL)
11354 return FALSE;
11355
11356 if (! arm_elf_find_function (abfd, section, symbols, offset,
11357 filename_ptr, functionname_ptr))
11358 return FALSE;
11359
11360 *line_ptr = 0;
b34976b6 11361 return TRUE;
252b5132
RH		 11362}
11363
4ab527b0
FF		 11364static bfd_boolean
11365elf32_arm_find_inliner_info (bfd * abfd,
11366 const char ** filename_ptr,
11367 const char ** functionname_ptr,
11368 unsigned int * line_ptr)
11369{
11370 bfd_boolean found;
11371 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11372 functionname_ptr, line_ptr,
11373 & elf_tdata (abfd)->dwarf2_find_line_info);
11374 return found;
11375}
11376
252b5132
RH		 11377/* Adjust a symbol defined by a dynamic object and referenced by a
11378 regular object. The current definition is in some section of the
11379 dynamic object, but we're not including those sections. We have to
11380 change the definition to something the rest of the link can
11381 understand. */
11382
b34976b6 11383static bfd_boolean
57e8b36a
NC		 11384elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11385 struct elf_link_hash_entry * h)
252b5132
RH		 11386{
11387 bfd * dynobj;
11388 asection * s;
b7693d02 11389 struct elf32_arm_link_hash_entry * eh;
67687978 11390 struct elf32_arm_link_hash_table *globals;
252b5132 11391
67687978 11392 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11393 if (globals == NULL)
11394 return FALSE;
11395
252b5132
RH		 11396 dynobj = elf_hash_table (info)->dynobj;
11397
11398 /* Make sure we know what is going on here. */
11399 BFD_ASSERT (dynobj != NULL
f5385ebf 11400 && (h->needs_plt
f6e332e6 11401 || h->u.weakdef != NULL
f5385ebf
AM		 11402 || (h->def_dynamic
11403 && h->ref_regular
11404 && !h->def_regular)));
252b5132 11405
b7693d02
DJ		 11406 eh = (struct elf32_arm_link_hash_entry *) h;
11407
252b5132
RH		 11408 /* If this is a function, put it in the procedure linkage table. We
11409 will fill in the contents of the procedure linkage table later,
11410 when we know the address of the .got section. */
0f88be7a 11411 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11412 || h->needs_plt)
252b5132 11413 {
5e681ec4
PB		 11414 if (h->plt.refcount <= 0
11415 || SYMBOL_CALLS_LOCAL (info, h)
11416 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11417 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11418 {
11419 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11420 file, but the symbol was never referred to by a dynamic
11421 object, or if all references were garbage collected. In
11422 such a case, we don't actually need to build a procedure
11423 linkage table, and we can just do a PC24 reloc instead. */
11424 h->plt.offset = (bfd_vma) -1;
b7693d02 11425 eh->plt_thumb_refcount = 0;
bd97cb95 11426 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11427 h->needs_plt = 0;
252b5132
RH		 11428 }
11429
b34976b6 11430 return TRUE;
252b5132 11431 }
5e681ec4 11432 else
b7693d02
DJ		 11433 {
11434 /* It's possible that we incorrectly decided a .plt reloc was
11435 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11436 in check_relocs. We can't decide accurately between function
11437 and non-function syms in check-relocs; Objects loaded later in
11438 the link may change h->type. So fix it now. */
11439 h->plt.offset = (bfd_vma) -1;
11440 eh->plt_thumb_refcount = 0;
bd97cb95 11441 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11442 }
252b5132
RH		 11443
11444 /* If this is a weak symbol, and there is a real definition, the
11445 processor independent code will have arranged for us to see the
11446 real definition first, and we can just use the same value. */
f6e332e6 11447 if (h->u.weakdef != NULL)
252b5132 11448 {
f6e332e6
AM		 11449 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11450 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11451 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11452 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11453 return TRUE;
252b5132
RH		 11454 }
11455
ba93b8ac
DJ		 11456 /* If there are no non-GOT references, we do not need a copy
11457 relocation. */
11458 if (!h->non_got_ref)
11459 return TRUE;
11460
252b5132
RH		 11461 /* This is a reference to a symbol defined by a dynamic object which
11462 is not a function. */
11463
11464 /* If we are creating a shared library, we must presume that the
11465 only references to the symbol are via the global offset table.
11466 For such cases we need not do anything here; the relocations will
67687978
PB		 11467 be handled correctly by relocate_section. Relocatable executables
11468 can reference data in shared objects directly, so we don't need to
11469 do anything here. */
11470 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11471 return TRUE;
252b5132 11472
909272ee
AM		 11473 if (h->size == 0)
11474 {
11475 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11476 h->root.root.string);
11477 return TRUE;
11478 }
11479
252b5132
RH		 11480 /* We must allocate the symbol in our .dynbss section, which will
11481 become part of the .bss section of the executable. There will be
11482 an entry for this symbol in the .dynsym section. The dynamic
11483 object will contain position independent code, so all references
11484 from the dynamic object to this symbol will go through the global
11485 offset table. The dynamic linker will use the .dynsym entry to
11486 determine the address it must put in the global offset table, so
11487 both the dynamic object and the regular object will refer to the
11488 same memory location for the variable. */
252b5132
RH		 11489 s = bfd_get_section_by_name (dynobj, ".dynbss");
11490 BFD_ASSERT (s != NULL);
11491
11492 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11493 copy the initial value out of the dynamic object and into the
11494 runtime process image. We need to remember the offset into the
00a97672 11495 .rel(a).bss section we are going to use. */
252b5132
RH		 11496 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11497 {
11498 asection *srel;
11499
00a97672 11500 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11501 BFD_ASSERT (srel != NULL);
00a97672 11502 srel->size += RELOC_SIZE (globals);
f5385ebf 11503 h->needs_copy = 1;
252b5132
RH		 11504 }
11505
027297b7 11506 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11507}
11508
5e681ec4
PB		 11509/* Allocate space in .plt, .got and associated reloc sections for
11510 dynamic relocs. */
11511
11512static bfd_boolean
57e8b36a 11513allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11514{
11515 struct bfd_link_info *info;
11516 struct elf32_arm_link_hash_table *htab;
11517 struct elf32_arm_link_hash_entry *eh;
11518 struct elf32_arm_relocs_copied *p;
bd97cb95 11519 bfd_signed_vma thumb_refs;
5e681ec4 11520
b7693d02
DJ		 11521 eh = (struct elf32_arm_link_hash_entry *) h;
11522
5e681ec4
PB		 11523 if (h->root.type == bfd_link_hash_indirect)
11524 return TRUE;
11525
11526 if (h->root.type == bfd_link_hash_warning)
11527 /* When warning symbols are created, they **replace** the "real"
11528 entry in the hash table, thus we never get to see the real
11529 symbol in a hash traversal. So look at it now. */
11530 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11531
11532 info = (struct bfd_link_info *) inf;
11533 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11534 if (htab == NULL)
11535 return FALSE;
5e681ec4
PB		 11536
11537 if (htab->root.dynamic_sections_created
11538 && h->plt.refcount > 0)
11539 {
11540 /* Make sure this symbol is output as a dynamic symbol.
11541 Undefined weak syms won't yet be marked as dynamic. */
11542 if (h->dynindx == -1
f5385ebf 11543 && !h->forced_local)
5e681ec4 11544 {
c152c796 11545 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11546 return FALSE;
11547 }
11548
11549 if (info->shared
7359ea65 11550 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11551 {
11552 asection *s = htab->splt;
11553
11554 /* If this is the first .plt entry, make room for the special
11555 first entry. */
eea6121a 11556 if (s->size == 0)
e5a52504 11557 s->size += htab->plt_header_size;
5e681ec4 11558
eea6121a 11559 h->plt.offset = s->size;
5e681ec4 11560
b7693d02
DJ		 11561 /* If we will insert a Thumb trampoline before this PLT, leave room
11562 for it. */
bd97cb95
DJ		 11563 thumb_refs = eh->plt_thumb_refcount;
11564 if (!htab->use_blx)
11565 thumb_refs += eh->plt_maybe_thumb_refcount;
11566
11567 if (thumb_refs > 0)
b7693d02
DJ		 11568 {
11569 h->plt.offset += PLT_THUMB_STUB_SIZE;
11570 s->size += PLT_THUMB_STUB_SIZE;
11571 }
11572
5e681ec4
PB		 11573 /* If this symbol is not defined in a regular file, and we are
11574 not generating a shared library, then set the symbol to this
11575 location in the .plt. This is required to make function
11576 pointers compare as equal between the normal executable and
11577 the shared library. */
11578 if (! info->shared
f5385ebf 11579 && !h->def_regular)
5e681ec4
PB		 11580 {
11581 h->root.u.def.section = s;
11582 h->root.u.def.value = h->plt.offset;
5e681ec4 11583
67d74e43
DJ		 11584 /* Make sure the function is not marked as Thumb, in case
11585 it is the target of an ABS32 relocation, which will
11586 point to the PLT entry. */
11587 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11588 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11589 }
022f8312 11590
5e681ec4 11591 /* Make room for this entry. */
e5a52504 11592 s->size += htab->plt_entry_size;
5e681ec4 11593
e5a52504 11594 if (!htab->symbian_p)
b7693d02
DJ		 11595 {
11596 /* We also need to make an entry in the .got.plt section, which
11597 will be placed in the .got section by the linker script. */
11598 eh->plt_got_offset = htab->sgotplt->size;
11599 htab->sgotplt->size += 4;
11600 }
5e681ec4 11601
00a97672
RS		 11602 /* We also need to make an entry in the .rel(a).plt section. */
11603 htab->srelplt->size += RELOC_SIZE (htab);
11604
11605 /* VxWorks executables have a second set of relocations for
11606 each PLT entry. They go in a separate relocation section,
11607 which is processed by the kernel loader. */
11608 if (htab->vxworks_p && !info->shared)
11609 {
11610 /* There is a relocation for the initial PLT entry:
11611 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11612 if (h->plt.offset == htab->plt_header_size)
11613 htab->srelplt2->size += RELOC_SIZE (htab);
11614
11615 /* There are two extra relocations for each subsequent
11616 PLT entry: an R_ARM_32 relocation for the GOT entry,
11617 and an R_ARM_32 relocation for the PLT entry. */
11618 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11619 }
5e681ec4
PB		 11620 }
11621 else
11622 {
11623 h->plt.offset = (bfd_vma) -1;
f5385ebf 11624 h->needs_plt = 0;
5e681ec4
PB		 11625 }
11626 }
11627 else
11628 {
11629 h->plt.offset = (bfd_vma) -1;
f5385ebf 11630 h->needs_plt = 0;
5e681ec4
PB		 11631 }
11632
11633 if (h->got.refcount > 0)
11634 {
11635 asection *s;
11636 bfd_boolean dyn;
ba93b8ac
DJ		 11637 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11638 int indx;
5e681ec4
PB		 11639
11640 /* Make sure this symbol is output as a dynamic symbol.
11641 Undefined weak syms won't yet be marked as dynamic. */
11642 if (h->dynindx == -1
f5385ebf 11643 && !h->forced_local)
5e681ec4 11644 {
c152c796 11645 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11646 return FALSE;
11647 }
11648
e5a52504
MM		 11649 if (!htab->symbian_p)
11650 {
11651 s = htab->sgot;
11652 h->got.offset = s->size;
ba93b8ac
DJ		 11653
11654 if (tls_type == GOT_UNKNOWN)
11655 abort ();
11656
11657 if (tls_type == GOT_NORMAL)
11658 /* Non-TLS symbols need one GOT slot. */
11659 s->size += 4;
11660 else
11661 {
11662 if (tls_type & GOT_TLS_GD)
11663 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11664 s->size += 8;
11665 if (tls_type & GOT_TLS_IE)
11666 /* R_ARM_TLS_IE32 needs one GOT slot. */
11667 s->size += 4;
11668 }
11669
e5a52504 11670 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11671
11672 indx = 0;
11673 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11674 && (!info->shared
11675 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11676 indx = h->dynindx;
11677
11678 if (tls_type != GOT_NORMAL
11679 && (info->shared || indx != 0)
11680 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11681 || h->root.type != bfd_link_hash_undefweak))
11682 {
11683 if (tls_type & GOT_TLS_IE)
00a97672 11684 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11685
11686 if (tls_type & GOT_TLS_GD)
00a97672 11687 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11688
11689 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11690 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11691 }
11692 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11693 || h->root.type != bfd_link_hash_undefweak)
11694 && (info->shared
11695 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11696 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11697 }
5e681ec4
PB		 11698 }
11699 else
11700 h->got.offset = (bfd_vma) -1;
11701
a4fd1a8e
PB		 11702 /* Allocate stubs for exported Thumb functions on v4t. */
11703 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11704 && h->def_regular
a4fd1a8e
PB		 11705 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11706 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11707 {
11708 struct elf_link_hash_entry * th;
11709 struct bfd_link_hash_entry * bh;
11710 struct elf_link_hash_entry * myh;
11711 char name[1024];
11712 asection *s;
11713 bh = NULL;
11714 /* Create a new symbol to regist the real location of the function. */
11715 s = h->root.u.def.section;
906e58ca 11716 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11717 _bfd_generic_link_add_one_symbol (info, s->owner,
11718 name, BSF_GLOBAL, s,
11719 h->root.u.def.value,
11720 NULL, TRUE, FALSE, &bh);
11721
11722 myh = (struct elf_link_hash_entry *) bh;
11723 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11724 myh->forced_local = 1;
11725 eh->export_glue = myh;
11726 th = record_arm_to_thumb_glue (info, h);
11727 /* Point the symbol at the stub. */
11728 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11729 h->root.u.def.section = th->root.u.def.section;
11730 h->root.u.def.value = th->root.u.def.value & ~1;
11731 }
11732
5e681ec4
PB		 11733 if (eh->relocs_copied == NULL)
11734 return TRUE;
11735
11736 /* In the shared -Bsymbolic case, discard space allocated for
11737 dynamic pc-relative relocs against symbols which turn out to be
11738 defined in regular objects. For the normal shared case, discard
11739 space for pc-relative relocs that have become local due to symbol
11740 visibility changes. */
11741
67687978 11742 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11743 {
7bdca076 11744 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11745 R_ARM_REL32_NOI, which will appear on something like
11746 ".long foo - .". We want calls to protected symbols to resolve
11747 directly to the function rather than going via the plt. If people
11748 want function pointer comparisons to work as expected then they
11749 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11750 if (SYMBOL_CALLS_LOCAL (info, h))
11751 {
11752 struct elf32_arm_relocs_copied **pp;
11753
11754 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11755 {
11756 p->count -= p->pc_count;
11757 p->pc_count = 0;
11758 if (p->count == 0)
11759 *pp = p->next;
11760 else
11761 pp = &p->next;
11762 }
11763 }
11764
4dfe6ac6 11765 if (htab->vxworks_p)
3348747a
NS		 11766 {
11767 struct elf32_arm_relocs_copied **pp;
11768
11769 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11770 {
11771 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11772 *pp = p->next;
11773 else
11774 pp = &p->next;
11775 }
11776 }
11777
ba93b8ac 11778 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11779 visibility. */
22d606e9 11780 if (eh->relocs_copied != NULL
5e681ec4 11781 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11782 {
11783 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11784 eh->relocs_copied = NULL;
11785
11786 /* Make sure undefined weak symbols are output as a dynamic
11787 symbol in PIEs. */
11788 else if (h->dynindx == -1
11789 && !h->forced_local)
11790 {
11791 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11792 return FALSE;
11793 }
11794 }
11795
67687978
PB		 11796 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11797 && h->root.type == bfd_link_hash_new)
11798 {
11799 /* Output absolute symbols so that we can create relocations
11800 against them. For normal symbols we output a relocation
11801 against the section that contains them. */
11802 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11803 return FALSE;
11804 }
11805
5e681ec4
PB		 11806 }
11807 else
11808 {
11809 /* For the non-shared case, discard space for relocs against
11810 symbols which turn out to need copy relocs or are not
11811 dynamic. */
11812
f5385ebf
AM		 11813 if (!h->non_got_ref
11814 && ((h->def_dynamic
11815 && !h->def_regular)
5e681ec4
PB		 11816 || (htab->root.dynamic_sections_created
11817 && (h->root.type == bfd_link_hash_undefweak
11818 || h->root.type == bfd_link_hash_undefined))))
11819 {
11820 /* Make sure this symbol is output as a dynamic symbol.
11821 Undefined weak syms won't yet be marked as dynamic. */
11822 if (h->dynindx == -1
f5385ebf 11823 && !h->forced_local)
5e681ec4 11824 {
c152c796 11825 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11826 return FALSE;
11827 }
11828
11829 /* If that succeeded, we know we'll be keeping all the
11830 relocs. */
11831 if (h->dynindx != -1)
11832 goto keep;
11833 }
11834
11835 eh->relocs_copied = NULL;
11836
11837 keep: ;
11838 }
11839
11840 /* Finally, allocate space. */
11841 for (p = eh->relocs_copied; p != NULL; p = p->next)
11842 {
11843 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11844 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11845 }
11846
11847 return TRUE;
11848}
11849
08d1f311
DJ		 11850/* Find any dynamic relocs that apply to read-only sections. */
11851
11852static bfd_boolean
8029a119 11853elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11854{
8029a119
NC		 11855 struct elf32_arm_link_hash_entry * eh;
11856 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11857
11858 if (h->root.type == bfd_link_hash_warning)
11859 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11860
11861 eh = (struct elf32_arm_link_hash_entry *) h;
11862 for (p = eh->relocs_copied; p != NULL; p = p->next)
11863 {
11864 asection *s = p->section;
11865
11866 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11867 {
11868 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11869
11870 info->flags |= DF_TEXTREL;
11871
11872 /* Not an error, just cut short the traversal. */
11873 return FALSE;
11874 }
11875 }
11876 return TRUE;
11877}
11878
d504ffc8
DJ		 11879void
11880bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11881 int byteswap_code)
11882{
11883 struct elf32_arm_link_hash_table *globals;
11884
11885 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11886 if (globals == NULL)
11887 return;
11888
d504ffc8
DJ		 11889 globals->byteswap_code = byteswap_code;
11890}
11891
252b5132
RH		 11892/* Set the sizes of the dynamic sections. */
11893
b34976b6 11894static bfd_boolean
57e8b36a
NC		 11895elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11896 struct bfd_link_info * info)
252b5132
RH		 11897{
11898 bfd * dynobj;
11899 asection * s;
b34976b6
AM		 11900 bfd_boolean plt;
11901 bfd_boolean relocs;
5e681ec4
PB		 11902 bfd *ibfd;
11903 struct elf32_arm_link_hash_table *htab;
252b5132 11904
5e681ec4 11905 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11906 if (htab == NULL)
11907 return FALSE;
11908
252b5132
RH		 11909 dynobj = elf_hash_table (info)->dynobj;
11910 BFD_ASSERT (dynobj != NULL);
39b41c9c 11911 check_use_blx (htab);
252b5132
RH		 11912
11913 if (elf_hash_table (info)->dynamic_sections_created)
11914 {
11915 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11916 if (info->executable)
252b5132
RH		 11917 {
11918 s = bfd_get_section_by_name (dynobj, ".interp");
11919 BFD_ASSERT (s != NULL);
eea6121a 11920 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11921 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11922 }
11923 }
5e681ec4
PB		 11924
11925 /* Set up .got offsets for local syms, and space for local dynamic
11926 relocs. */
11927 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11928 {
5e681ec4
PB		 11929 bfd_signed_vma *local_got;
11930 bfd_signed_vma *end_local_got;
11931 char *local_tls_type;
11932 bfd_size_type locsymcount;
11933 Elf_Internal_Shdr *symtab_hdr;
11934 asection *srel;
4dfe6ac6 11935 bfd_boolean is_vxworks = htab->vxworks_p;
5e681ec4 11936
0ffa91dd 11937 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11938 continue;
11939
11940 for (s = ibfd->sections; s != NULL; s = s->next)
11941 {
11942 struct elf32_arm_relocs_copied *p;
11943
21d799b5
NC		 11944 for (p = (struct elf32_arm_relocs_copied *)
11945 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11946 {
11947 if (!bfd_is_abs_section (p->section)
11948 && bfd_is_abs_section (p->section->output_section))
11949 {
11950 /* Input section has been discarded, either because
11951 it is a copy of a linkonce section or due to
11952 linker script /DISCARD/, so we'll be discarding
11953 the relocs too. */
11954 }
3348747a
NS		 11955 else if (is_vxworks
11956 && strcmp (p->section->output_section->name,
11957 ".tls_vars") == 0)
11958 {
11959 /* Relocations in vxworks .tls_vars sections are
11960 handled specially by the loader. */
11961 }
5e681ec4
PB		 11962 else if (p->count != 0)
11963 {
11964 srel = elf_section_data (p->section)->sreloc;
00a97672 11965 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11966 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11967 info->flags |= DF_TEXTREL;
11968 }
11969 }
11970 }
11971
11972 local_got = elf_local_got_refcounts (ibfd);
11973 if (!local_got)
11974 continue;
11975
0ffa91dd 11976 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11977 locsymcount = symtab_hdr->sh_info;
11978 end_local_got = local_got + locsymcount;
ba93b8ac 11979 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11980 s = htab->sgot;
11981 srel = htab->srelgot;
11982 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11983 {
11984 if (*local_got > 0)
11985 {
eea6121a 11986 *local_got = s->size;
ba93b8ac
DJ		 11987 if (*local_tls_type & GOT_TLS_GD)
11988 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11989 s->size += 8;
11990 if (*local_tls_type & GOT_TLS_IE)
11991 s->size += 4;
11992 if (*local_tls_type == GOT_NORMAL)
11993 s->size += 4;
11994
11995 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11996 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11997 }
11998 else
11999 *local_got = (bfd_vma) -1;
12000 }
252b5132
RH		 12001 }
12002
ba93b8ac
DJ		 12003 if (htab->tls_ldm_got.refcount > 0)
12004 {
12005 /* Allocate two GOT entries and one dynamic relocation (if necessary)
12006 for R_ARM_TLS_LDM32 relocations. */
12007 htab->tls_ldm_got.offset = htab->sgot->size;
12008 htab->sgot->size += 8;
12009 if (info->shared)
00a97672 12010 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 12011 }
12012 else
12013 htab->tls_ldm_got.offset = -1;
12014
5e681ec4
PB		 12015 /* Allocate global sym .plt and .got entries, and space for global
12016 sym dynamic relocs. */
57e8b36a 12017 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 12018
d504ffc8
DJ		 12019 /* Here we rummage through the found bfds to collect glue information. */
12020 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 12021 {
0ffa91dd 12022 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 12023 continue;
12024
c7b8f16e
JB		 12025 /* Initialise mapping tables for code/data. */
12026 bfd_elf32_arm_init_maps (ibfd);
906e58ca 12027
c7b8f16e
JB		 12028 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
12029 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
12030 /* xgettext:c-format */
12031 _bfd_error_handler (_("Errors encountered processing file %s"),
12032 ibfd->filename);
12033 }
d504ffc8 12034
3e6b1042
DJ		 12035 /* Allocate space for the glue sections now that we've sized them. */
12036 bfd_elf32_arm_allocate_interworking_sections (info);
12037
252b5132
RH		 12038 /* The check_relocs and adjust_dynamic_symbol entry points have
12039 determined the sizes of the various dynamic sections. Allocate
12040 memory for them. */
b34976b6
AM		 12041 plt = FALSE;
12042 relocs = FALSE;
252b5132
RH		 12043 for (s = dynobj->sections; s != NULL; s = s->next)
12044 {
12045 const char * name;
252b5132
RH		 12046
12047 if ((s->flags & SEC_LINKER_CREATED) == 0)
12048 continue;
12049
12050 /* It's OK to base decisions on the section name, because none
12051 of the dynobj section names depend upon the input files. */
12052 name = bfd_get_section_name (dynobj, s);
12053
24a1ba0f 12054 if (strcmp (name, ".plt") == 0)
252b5132 12055 {
c456f082
AM		 12056 /* Remember whether there is a PLT. */
12057 plt = s->size != 0;
252b5132 12058 }
0112cd26 12059 else if (CONST_STRNEQ (name, ".rel"))
252b5132 12060 {
c456f082 12061 if (s->size != 0)
252b5132 12062 {
252b5132 12063 /* Remember whether there are any reloc sections other
00a97672
RS		 12064 than .rel(a).plt and .rela.plt.unloaded. */
12065 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 12066 relocs = TRUE;
252b5132
RH		 12067
12068 /* We use the reloc_count field as a counter if we need
12069 to copy relocs into the output file. */
12070 s->reloc_count = 0;
12071 }
12072 }
0112cd26 12073 else if (! CONST_STRNEQ (name, ".got")
c456f082 12074 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 12075 {
12076 /* It's not one of our sections, so don't allocate space. */
12077 continue;
12078 }
12079
c456f082 12080 if (s->size == 0)
252b5132 12081 {
c456f082 12082 /* If we don't need this section, strip it from the
00a97672
RS		 12083 output file. This is mostly to handle .rel(a).bss and
12084 .rel(a).plt. We must create both sections in
c456f082
AM		 12085 create_dynamic_sections, because they must be created
12086 before the linker maps input sections to output
12087 sections. The linker does that before
12088 adjust_dynamic_symbol is called, and it is that
12089 function which decides whether anything needs to go
12090 into these sections. */
8423293d 12091 s->flags |= SEC_EXCLUDE;
252b5132
RH		 12092 continue;
12093 }
12094
c456f082
AM		 12095 if ((s->flags & SEC_HAS_CONTENTS) == 0)
12096 continue;
12097
252b5132 12098 /* Allocate memory for the section contents. */
21d799b5 12099 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 12100 if (s->contents == NULL)
b34976b6 12101 return FALSE;
252b5132
RH		 12102 }
12103
12104 if (elf_hash_table (info)->dynamic_sections_created)
12105 {
12106 /* Add some entries to the .dynamic section. We fill in the
12107 values later, in elf32_arm_finish_dynamic_sections, but we
12108 must add the entries now so that we get the correct size for
12109 the .dynamic section. The DT_DEBUG entry is filled in by the
12110 dynamic linker and used by the debugger. */
dc810e39 12111#define add_dynamic_entry(TAG, VAL) \
5a580b3a 12112 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 12113
8532796c 12114 if (info->executable)
252b5132 12115 {
dc810e39 12116 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 12117 return FALSE;
252b5132
RH		 12118 }
12119
12120 if (plt)
12121 {
dc810e39
AM		 12122 if ( !add_dynamic_entry (DT_PLTGOT, 0)
12123 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 12124 || !add_dynamic_entry (DT_PLTREL,
12125 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 12126 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 12127 return FALSE;
252b5132
RH		 12128 }
12129
12130 if (relocs)
12131 {
00a97672
RS		 12132 if (htab->use_rel)
12133 {
12134 if (!add_dynamic_entry (DT_REL, 0)
12135 || !add_dynamic_entry (DT_RELSZ, 0)
12136 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
12137 return FALSE;
12138 }
12139 else
12140 {
12141 if (!add_dynamic_entry (DT_RELA, 0)
12142 || !add_dynamic_entry (DT_RELASZ, 0)
12143 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12144 return FALSE;
12145 }
252b5132
RH		 12146 }
12147
08d1f311
DJ		 12148 /* If any dynamic relocs apply to a read-only section,
12149 then we need a DT_TEXTREL entry. */
12150 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 12151 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12152 info);
08d1f311 12153
99e4ae17 12154 if ((info->flags & DF_TEXTREL) != 0)
252b5132 12155 {
dc810e39 12156 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 12157 return FALSE;
252b5132 12158 }
7a2b07ff
NS		 12159 if (htab->vxworks_p
12160 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12161 return FALSE;
252b5132 12162 }
8532796c 12163#undef add_dynamic_entry
252b5132 12164
b34976b6 12165 return TRUE;
252b5132
RH		 12166}
12167
252b5132
RH		 12168/* Finish up dynamic symbol handling. We set the contents of various
12169 dynamic sections here. */
12170
b34976b6 12171static bfd_boolean
906e58ca
NC		 12172elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12173 struct bfd_link_info * info,
12174 struct elf_link_hash_entry * h,
12175 Elf_Internal_Sym * sym)
252b5132
RH		 12176{
12177 bfd * dynobj;
e5a52504 12178 struct elf32_arm_link_hash_table *htab;
b7693d02 12179 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 12180
12181 dynobj = elf_hash_table (info)->dynobj;
e5a52504 12182 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12183 if (htab == NULL)
12184 return FALSE;
12185
b7693d02 12186 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 12187
12188 if (h->plt.offset != (bfd_vma) -1)
12189 {
12190 asection * splt;
252b5132 12191 asection * srel;
e5a52504 12192 bfd_byte *loc;
24a1ba0f 12193 bfd_vma plt_index;
947216bf 12194 Elf_Internal_Rela rel;
252b5132
RH		 12195
12196 /* This symbol has an entry in the procedure linkage table. Set
12197 it up. */
12198
12199 BFD_ASSERT (h->dynindx != -1);
12200
12201 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 12202 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 12203 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 12204
e5a52504
MM		 12205 /* Fill in the entry in the procedure linkage table. */
12206 if (htab->symbian_p)
12207 {
906e58ca 12208 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12209 elf32_arm_symbian_plt_entry[0],
12210 splt->contents + h->plt.offset);
906e58ca 12211 bfd_put_32 (output_bfd,
52ab56c2
PB		 12212 elf32_arm_symbian_plt_entry[1],
12213 splt->contents + h->plt.offset + 4);
906e58ca 12214
e5a52504 12215 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12216 rel.r_offset = (splt->output_section->vma
12217 + splt->output_offset
52ab56c2 12218 + h->plt.offset + 4);
e5a52504 12219 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12220
12221 /* Get the index in the procedure linkage table which
12222 corresponds to this symbol. This is the index of this symbol
12223 in all the symbols for which we are making plt entries. The
12224 first entry in the procedure linkage table is reserved. */
906e58ca 12225 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12226 / htab->plt_entry_size);
e5a52504
MM		 12227 }
12228 else
12229 {
00a97672 12230 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12231 bfd_vma got_displacement;
12232 asection * sgot;
52ab56c2 12233 bfd_byte * ptr;
906e58ca 12234
e5a52504
MM		 12235 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
12236 BFD_ASSERT (sgot != NULL);
12237
b7693d02
DJ		 12238 /* Get the offset into the .got.plt table of the entry that
12239 corresponds to this function. */
12240 got_offset = eh->plt_got_offset;
12241
12242 /* Get the index in the procedure linkage table which
12243 corresponds to this symbol. This is the index of this symbol
12244 in all the symbols for which we are making plt entries. The
12245 first three entries in .got.plt are reserved; after that
12246 symbols appear in the same order as in .plt. */
12247 plt_index = (got_offset - 12) / 4;
e5a52504 12248
00a97672
RS		 12249 /* Calculate the address of the GOT entry. */
12250 got_address = (sgot->output_section->vma
12251 + sgot->output_offset
12252 + got_offset);
5e681ec4 12253
00a97672
RS		 12254 /* ...and the address of the PLT entry. */
12255 plt_address = (splt->output_section->vma
12256 + splt->output_offset
12257 + h->plt.offset);
5e681ec4 12258
52ab56c2 12259 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 12260 if (htab->vxworks_p && info->shared)
12261 {
12262 unsigned int i;
12263 bfd_vma val;
12264
52ab56c2 12265 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12266 {
12267 val = elf32_arm_vxworks_shared_plt_entry[i];
12268 if (i == 2)
12269 val |= got_address - sgot->output_section->vma;
12270 if (i == 5)
12271 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12272 if (i == 2 || i == 5)
12273 bfd_put_32 (output_bfd, val, ptr);
12274 else
12275 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12276 }
12277 }
12278 else if (htab->vxworks_p)
b7693d02 12279 {
00a97672
RS		 12280 unsigned int i;
12281 bfd_vma val;
12282
d3753b85 12283 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12284 {
12285 val = elf32_arm_vxworks_exec_plt_entry[i];
12286 if (i == 2)
12287 val |= got_address;
12288 if (i == 4)
12289 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12290 if (i == 5)
12291 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12292 if (i == 2 || i == 5)
12293 bfd_put_32 (output_bfd, val, ptr);
12294 else
12295 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12296 }
12297
12298 loc = (htab->srelplt2->contents
12299 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12300
12301 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12302 referencing the GOT for this PLT entry. */
12303 rel.r_offset = plt_address + 8;
12304 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12305 rel.r_addend = got_offset;
12306 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12307 loc += RELOC_SIZE (htab);
12308
12309 /* Create the R_ARM_ABS32 relocation referencing the
12310 beginning of the PLT for this GOT entry. */
12311 rel.r_offset = got_address;
12312 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12313 rel.r_addend = 0;
12314 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12315 }
00a97672
RS		 12316 else
12317 {
bd97cb95 12318 bfd_signed_vma thumb_refs;
00a97672
RS		 12319 /* Calculate the displacement between the PLT slot and the
12320 entry in the GOT. The eight-byte offset accounts for the
12321 value produced by adding to pc in the first instruction
12322 of the PLT stub. */
12323 got_displacement = got_address - (plt_address + 8);
b7693d02 12324
00a97672
RS		 12325 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12326
bd97cb95
DJ		 12327 thumb_refs = eh->plt_thumb_refcount;
12328 if (!htab->use_blx)
12329 thumb_refs += eh->plt_maybe_thumb_refcount;
12330
12331 if (thumb_refs > 0)
00a97672 12332 {
52ab56c2
PB		 12333 put_thumb_insn (htab, output_bfd,
12334 elf32_arm_plt_thumb_stub[0], ptr - 4);
12335 put_thumb_insn (htab, output_bfd,
12336 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12337 }
12338
52ab56c2
PB		 12339 put_arm_insn (htab, output_bfd,
12340 elf32_arm_plt_entry[0]
12341 | ((got_displacement & 0x0ff00000) >> 20),
12342 ptr + 0);
12343 put_arm_insn (htab, output_bfd,
12344 elf32_arm_plt_entry[1]
12345 | ((got_displacement & 0x000ff000) >> 12),
12346 ptr+ 4);
12347 put_arm_insn (htab, output_bfd,
12348 elf32_arm_plt_entry[2]
12349 | (got_displacement & 0x00000fff),
12350 ptr + 8);
5e681ec4 12351#ifdef FOUR_WORD_PLT
52ab56c2 12352 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12353#endif
00a97672 12354 }
252b5132 12355
e5a52504
MM		 12356 /* Fill in the entry in the global offset table. */
12357 bfd_put_32 (output_bfd,
12358 (splt->output_section->vma
12359 + splt->output_offset),
12360 sgot->contents + got_offset);
906e58ca 12361
00a97672
RS		 12362 /* Fill in the entry in the .rel(a).plt section. */
12363 rel.r_addend = 0;
12364 rel.r_offset = got_address;
e5a52504
MM		 12365 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12366 }
57e8b36a 12367
00a97672
RS		 12368 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12369 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12370
f5385ebf 12371 if (!h->def_regular)
252b5132
RH		 12372 {
12373 /* Mark the symbol as undefined, rather than as defined in
12374 the .plt section. Leave the value alone. */
12375 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12376 /* If the symbol is weak, we do need to clear the value.
12377 Otherwise, the PLT entry would provide a definition for
12378 the symbol even if the symbol wasn't defined anywhere,
12379 and so the symbol would never be NULL. */
f5385ebf 12380 if (!h->ref_regular_nonweak)
d982ba73 12381 sym->st_value = 0;
252b5132
RH		 12382 }
12383 }
12384
ba93b8ac
DJ		 12385 if (h->got.offset != (bfd_vma) -1
12386 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12387 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12388 {
12389 asection * sgot;
12390 asection * srel;
947216bf
AM		 12391 Elf_Internal_Rela rel;
12392 bfd_byte *loc;
00a97672 12393 bfd_vma offset;
252b5132
RH		 12394
12395 /* This symbol has an entry in the global offset table. Set it
12396 up. */
252b5132 12397 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12398 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12399 BFD_ASSERT (sgot != NULL && srel != NULL);
12400
00a97672
RS		 12401 offset = (h->got.offset & ~(bfd_vma) 1);
12402 rel.r_addend = 0;
252b5132
RH		 12403 rel.r_offset = (sgot->output_section->vma
12404 + sgot->output_offset
00a97672 12405 + offset);
252b5132 12406
5e681ec4
PB		 12407 /* If this is a static link, or it is a -Bsymbolic link and the
12408 symbol is defined locally or was forced to be local because
12409 of a version file, we just want to emit a RELATIVE reloc.
12410 The entry in the global offset table will already have been
12411 initialized in the relocate_section function. */
252b5132 12412 if (info->shared
5e681ec4
PB		 12413 && SYMBOL_REFERENCES_LOCAL (info, h))
12414 {
906e58ca 12415 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12416 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12417 if (!htab->use_rel)
12418 {
12419 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12420 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12421 }
5e681ec4 12422 }
252b5132
RH		 12423 else
12424 {
906e58ca 12425 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12426 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12427 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12428 }
12429
00a97672
RS		 12430 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12431 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12432 }
12433
f5385ebf 12434 if (h->needs_copy)
252b5132
RH		 12435 {
12436 asection * s;
947216bf
AM		 12437 Elf_Internal_Rela rel;
12438 bfd_byte *loc;
252b5132
RH		 12439
12440 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12441 BFD_ASSERT (h->dynindx != -1
12442 && (h->root.type == bfd_link_hash_defined
12443 || h->root.type == bfd_link_hash_defweak));
12444
12445 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12446 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12447 BFD_ASSERT (s != NULL);
12448
00a97672 12449 rel.r_addend = 0;
252b5132
RH		 12450 rel.r_offset = (h->root.u.def.value
12451 + h->root.u.def.section->output_section->vma
12452 + h->root.u.def.section->output_offset);
12453 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12454 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12455 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12456 }
12457
00a97672
RS		 12458 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12459 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12460 to the ".got" section. */
252b5132 12461 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12462 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12463 sym->st_shndx = SHN_ABS;
12464
b34976b6 12465 return TRUE;
252b5132
RH		 12466}
12467
12468/* Finish up the dynamic sections. */
12469
b34976b6 12470static bfd_boolean
57e8b36a 12471elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12472{
12473 bfd * dynobj;
12474 asection * sgot;
12475 asection * sdyn;
4dfe6ac6
NC		 12476 struct elf32_arm_link_hash_table *htab;
12477
12478 htab = elf32_arm_hash_table (info);
12479 if (htab == NULL)
12480 return FALSE;
252b5132
RH		 12481
12482 dynobj = elf_hash_table (info)->dynobj;
12483
12484 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
4dfe6ac6 12485 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 12486 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12487
12488 if (elf_hash_table (info)->dynamic_sections_created)
12489 {
12490 asection *splt;
12491 Elf32_External_Dyn *dyncon, *dynconend;
12492
12493 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12494 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12495
12496 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12497 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12498
252b5132
RH		 12499 for (; dyncon < dynconend; dyncon++)
12500 {
12501 Elf_Internal_Dyn dyn;
12502 const char * name;
12503 asection * s;
12504
12505 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12506
12507 switch (dyn.d_tag)
12508 {
229fcec5
MM		 12509 unsigned int type;
12510
252b5132 12511 default:
7a2b07ff
NS		 12512 if (htab->vxworks_p
12513 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12514 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12515 break;
12516
229fcec5
MM		 12517 case DT_HASH:
12518 name = ".hash";
12519 goto get_vma_if_bpabi;
12520 case DT_STRTAB:
12521 name = ".dynstr";
12522 goto get_vma_if_bpabi;
12523 case DT_SYMTAB:
12524 name = ".dynsym";
12525 goto get_vma_if_bpabi;
c0042f5d
MM		 12526 case DT_VERSYM:
12527 name = ".gnu.version";
12528 goto get_vma_if_bpabi;
12529 case DT_VERDEF:
12530 name = ".gnu.version_d";
12531 goto get_vma_if_bpabi;
12532 case DT_VERNEED:
12533 name = ".gnu.version_r";
12534 goto get_vma_if_bpabi;
12535
252b5132
RH		 12536 case DT_PLTGOT:
12537 name = ".got";
12538 goto get_vma;
12539 case DT_JMPREL:
00a97672 12540 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12541 get_vma:
12542 s = bfd_get_section_by_name (output_bfd, name);
12543 BFD_ASSERT (s != NULL);
229fcec5
MM		 12544 if (!htab->symbian_p)
12545 dyn.d_un.d_ptr = s->vma;
12546 else
12547 /* In the BPABI, tags in the PT_DYNAMIC section point
12548 at the file offset, not the memory address, for the
12549 convenience of the post linker. */
12550 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12551 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12552 break;
12553
229fcec5
MM		 12554 get_vma_if_bpabi:
12555 if (htab->symbian_p)
12556 goto get_vma;
12557 break;
12558
252b5132 12559 case DT_PLTRELSZ:
00a97672
RS		 12560 s = bfd_get_section_by_name (output_bfd,
12561 RELOC_SECTION (htab, ".plt"));
252b5132 12562 BFD_ASSERT (s != NULL);
eea6121a 12563 dyn.d_un.d_val = s->size;
252b5132
RH		 12564 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12565 break;
906e58ca 12566
252b5132 12567 case DT_RELSZ:
00a97672 12568 case DT_RELASZ:
229fcec5
MM		 12569 if (!htab->symbian_p)
12570 {
12571 /* My reading of the SVR4 ABI indicates that the
12572 procedure linkage table relocs (DT_JMPREL) should be
12573 included in the overall relocs (DT_REL). This is
12574 what Solaris does. However, UnixWare can not handle
12575 that case. Therefore, we override the DT_RELSZ entry
12576 here to make it not include the JMPREL relocs. Since
00a97672 12577 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12578 other relocation sections, we don't have to worry
12579 about changing the DT_REL entry. */
00a97672
RS		 12580 s = bfd_get_section_by_name (output_bfd,
12581 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12582 if (s != NULL)
12583 dyn.d_un.d_val -= s->size;
12584 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12585 break;
12586 }
8029a119 12587 /* Fall through. */
229fcec5
MM		 12588
12589 case DT_REL:
12590 case DT_RELA:
229fcec5
MM		 12591 /* In the BPABI, the DT_REL tag must point at the file
12592 offset, not the VMA, of the first relocation
12593 section. So, we use code similar to that in
12594 elflink.c, but do not check for SHF_ALLOC on the
12595 relcoation section, since relocations sections are
12596 never allocated under the BPABI. The comments above
12597 about Unixware notwithstanding, we include all of the
12598 relocations here. */
12599 if (htab->symbian_p)
12600 {
12601 unsigned int i;
12602 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12603 ? SHT_REL : SHT_RELA);
12604 dyn.d_un.d_val = 0;
12605 for (i = 1; i < elf_numsections (output_bfd); i++)
12606 {
906e58ca 12607 Elf_Internal_Shdr *hdr
229fcec5
MM		 12608 = elf_elfsections (output_bfd)[i];
12609 if (hdr->sh_type == type)
12610 {
906e58ca 12611 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12612 || dyn.d_tag == DT_RELASZ)
12613 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12614 else if ((ufile_ptr) hdr->sh_offset
12615 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12616 dyn.d_un.d_val = hdr->sh_offset;
12617 }
12618 }
12619 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12620 }
252b5132 12621 break;
88f7bcd5
NC		 12622
12623 /* Set the bottom bit of DT_INIT/FINI if the
12624 corresponding function is Thumb. */
12625 case DT_INIT:
12626 name = info->init_function;
12627 goto get_sym;
12628 case DT_FINI:
12629 name = info->fini_function;
12630 get_sym:
12631 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12632 then there is nothing to adjust. */
88f7bcd5
NC		 12633 if (dyn.d_un.d_val != 0)
12634 {
12635 struct elf_link_hash_entry * eh;
12636
12637 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12638 FALSE, FALSE, TRUE);
906e58ca 12639 if (eh != NULL
88f7bcd5
NC		 12640 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12641 {
12642 dyn.d_un.d_val |= 1;
b34976b6 12643 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12644 }
12645 }
12646 break;
252b5132
RH		 12647 }
12648 }
12649
24a1ba0f 12650 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 12651 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 12652 {
00a97672
RS		 12653 const bfd_vma *plt0_entry;
12654 bfd_vma got_address, plt_address, got_displacement;
12655
12656 /* Calculate the addresses of the GOT and PLT. */
12657 got_address = sgot->output_section->vma + sgot->output_offset;
12658 plt_address = splt->output_section->vma + splt->output_offset;
12659
12660 if (htab->vxworks_p)
12661 {
12662 /* The VxWorks GOT is relocated by the dynamic linker.
12663 Therefore, we must emit relocations rather than simply
12664 computing the values now. */
12665 Elf_Internal_Rela rel;
12666
12667 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12668 put_arm_insn (htab, output_bfd, plt0_entry[0],
12669 splt->contents + 0);
12670 put_arm_insn (htab, output_bfd, plt0_entry[1],
12671 splt->contents + 4);
12672 put_arm_insn (htab, output_bfd, plt0_entry[2],
12673 splt->contents + 8);
00a97672
RS		 12674 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12675
8029a119 12676 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12677 rel.r_offset = plt_address + 12;
12678 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12679 rel.r_addend = 0;
12680 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12681 htab->srelplt2->contents);
12682 }
12683 else
12684 {
12685 got_displacement = got_address - (plt_address + 16);
12686
12687 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12688 put_arm_insn (htab, output_bfd, plt0_entry[0],
12689 splt->contents + 0);
12690 put_arm_insn (htab, output_bfd, plt0_entry[1],
12691 splt->contents + 4);
12692 put_arm_insn (htab, output_bfd, plt0_entry[2],
12693 splt->contents + 8);
12694 put_arm_insn (htab, output_bfd, plt0_entry[3],
12695 splt->contents + 12);
5e681ec4 12696
5e681ec4 12697#ifdef FOUR_WORD_PLT
00a97672
RS		 12698 /* The displacement value goes in the otherwise-unused
12699 last word of the second entry. */
12700 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12701#else
00a97672 12702 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12703#endif
00a97672 12704 }
f7a74f8c 12705 }
252b5132
RH		 12706
12707 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12708 really seem like the right value. */
74541ad4
AM		 12709 if (splt->output_section->owner == output_bfd)
12710 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12711
12712 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12713 {
12714 /* Correct the .rel(a).plt.unloaded relocations. They will have
12715 incorrect symbol indexes. */
12716 int num_plts;
eed62c48 12717 unsigned char *p;
00a97672
RS		 12718
12719 num_plts = ((htab->splt->size - htab->plt_header_size)
12720 / htab->plt_entry_size);
12721 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12722
12723 for (; num_plts; num_plts--)
12724 {
12725 Elf_Internal_Rela rel;
12726
12727 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12728 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12729 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12730 p += RELOC_SIZE (htab);
12731
12732 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12733 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12734 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12735 p += RELOC_SIZE (htab);
12736 }
12737 }
252b5132
RH		 12738 }
12739
12740 /* Fill in the first three entries in the global offset table. */
229fcec5 12741 if (sgot)
252b5132 12742 {
229fcec5
MM		 12743 if (sgot->size > 0)
12744 {
12745 if (sdyn == NULL)
12746 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12747 else
12748 bfd_put_32 (output_bfd,
12749 sdyn->output_section->vma + sdyn->output_offset,
12750 sgot->contents);
12751 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12752 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12753 }
252b5132 12754
229fcec5
MM		 12755 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12756 }
252b5132 12757
b34976b6 12758 return TRUE;
252b5132
RH		 12759}
12760
ba96a88f 12761static void
57e8b36a 12762elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12763{
9b485d32 12764 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12765 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12766
12767 i_ehdrp = elf_elfheader (abfd);
12768
94a3258f
PB		 12769 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12770 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12771 else
12772 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12773 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12774
93204d3a
PB		 12775 if (link_info)
12776 {
12777 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 12778 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 12779 i_ehdrp->e_flags |= EF_ARM_BE8;
12780 }
ba96a88f
NC		 12781}
12782
99e4ae17 12783static enum elf_reloc_type_class
57e8b36a 12784elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12785{
f51e552e 12786 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12787 {
12788 case R_ARM_RELATIVE:
12789 return reloc_class_relative;
12790 case R_ARM_JUMP_SLOT:
12791 return reloc_class_plt;
12792 case R_ARM_COPY:
12793 return reloc_class_copy;
12794 default:
12795 return reloc_class_normal;
12796 }
12797}
12798
e16bb312
NC		 12799/* Set the right machine number for an Arm ELF file. */
12800
12801static bfd_boolean
57e8b36a 12802elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12803{
12804 if (hdr->sh_type == SHT_NOTE)
12805 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12806
12807 return TRUE;
12808}
12809
e489d0ae 12810static void
57e8b36a 12811elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12812{
5a6c6817 12813 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12814}
12815
40a18ebd
NC		 12816/* Return TRUE if this is an unwinding table entry. */
12817
12818static bfd_boolean
12819is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12820{
0112cd26
NC		 12821 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12822 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12823}
12824
12825
12826/* Set the type and flags for an ARM section. We do this by
12827 the section name, which is a hack, but ought to work. */
12828
12829static bfd_boolean
12830elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12831{
12832 const char * name;
12833
12834 name = bfd_get_section_name (abfd, sec);
12835
12836 if (is_arm_elf_unwind_section_name (abfd, name))
12837 {
12838 hdr->sh_type = SHT_ARM_EXIDX;
12839 hdr->sh_flags |= SHF_LINK_ORDER;
12840 }
12841 return TRUE;
12842}
12843
6dc132d9
L		 12844/* Handle an ARM specific section when reading an object file. This is
12845 called when bfd_section_from_shdr finds a section with an unknown
12846 type. */
40a18ebd
NC		 12847
12848static bfd_boolean
12849elf32_arm_section_from_shdr (bfd *abfd,
12850 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12851 const char *name,
12852 int shindex)
40a18ebd
NC		 12853{
12854 /* There ought to be a place to keep ELF backend specific flags, but
12855 at the moment there isn't one. We just keep track of the
12856 sections by their name, instead. Fortunately, the ABI gives
12857 names for all the ARM specific sections, so we will probably get
12858 away with this. */
12859 switch (hdr->sh_type)
12860 {
12861 case SHT_ARM_EXIDX:
0951f019
RE		 12862 case SHT_ARM_PREEMPTMAP:
12863 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12864 break;
12865
12866 default:
12867 return FALSE;
12868 }
12869
6dc132d9 12870 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12871 return FALSE;
12872
12873 return TRUE;
12874}
e489d0ae 12875
44444f50
NC		 12876static _arm_elf_section_data *
12877get_arm_elf_section_data (asection * sec)
12878{
47b2e99c
JZ		 12879 if (sec && sec->owner && is_arm_elf (sec->owner))
12880 return elf32_arm_section_data (sec);
44444f50
NC		 12881 else
12882 return NULL;
8e3de13a
NC		 12883}
12884
4e617b1e
PB		 12885typedef struct
12886{
12887 void *finfo;
12888 struct bfd_link_info *info;
91a5743d
PB		 12889 asection *sec;
12890 int sec_shndx;
6e0b88f1
AM		 12891 int (*func) (void *, const char *, Elf_Internal_Sym *,
12892 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12893} output_arch_syminfo;
12894
12895enum map_symbol_type
12896{
12897 ARM_MAP_ARM,
12898 ARM_MAP_THUMB,
12899 ARM_MAP_DATA
12900};
12901
12902
7413f23f 12903/* Output a single mapping symbol. */
4e617b1e
PB		 12904
12905static bfd_boolean
7413f23f
DJ		 12906elf32_arm_output_map_sym (output_arch_syminfo *osi,
12907 enum map_symbol_type type,
12908 bfd_vma offset)
4e617b1e
PB		 12909{
12910 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 12911 Elf_Internal_Sym sym;
12912
91a5743d
PB		 12913 sym.st_value = osi->sec->output_section->vma
12914 + osi->sec->output_offset
12915 + offset;
4e617b1e
PB		 12916 sym.st_size = 0;
12917 sym.st_other = 0;
12918 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12919 sym.st_shndx = osi->sec_shndx;
fe33d2fa 12920 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 12921 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12922}
12923
12924
12925/* Output mapping symbols for PLT entries associated with H. */
12926
12927static bfd_boolean
12928elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12929{
12930 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12931 struct elf32_arm_link_hash_table *htab;
12932 struct elf32_arm_link_hash_entry *eh;
12933 bfd_vma addr;
12934
4e617b1e
PB		 12935 if (h->root.type == bfd_link_hash_indirect)
12936 return TRUE;
12937
12938 if (h->root.type == bfd_link_hash_warning)
12939 /* When warning symbols are created, they **replace** the "real"
12940 entry in the hash table, thus we never get to see the real
12941 symbol in a hash traversal. So look at it now. */
12942 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12943
12944 if (h->plt.offset == (bfd_vma) -1)
12945 return TRUE;
12946
4dfe6ac6
NC		 12947 htab = elf32_arm_hash_table (osi->info);
12948 if (htab == NULL)
12949 return FALSE;
12950
4e617b1e
PB		 12951 eh = (struct elf32_arm_link_hash_entry *) h;
12952 addr = h->plt.offset;
12953 if (htab->symbian_p)
12954 {
7413f23f 12955 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12956 return FALSE;
7413f23f 12957 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12958 return FALSE;
12959 }
12960 else if (htab->vxworks_p)
12961 {
7413f23f 12962 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12963 return FALSE;
7413f23f 12964 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12965 return FALSE;
7413f23f 12966 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12967 return FALSE;
7413f23f 12968 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12969 return FALSE;
12970 }
12971 else
12972 {
bd97cb95
DJ		 12973 bfd_signed_vma thumb_refs;
12974
12975 thumb_refs = eh->plt_thumb_refcount;
12976 if (!htab->use_blx)
12977 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12978
bd97cb95 12979 if (thumb_refs > 0)
4e617b1e 12980 {
7413f23f 12981 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12982 return FALSE;
12983 }
12984#ifdef FOUR_WORD_PLT
7413f23f 12985 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12986 return FALSE;
7413f23f 12987 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12988 return FALSE;
12989#else
906e58ca 12990 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12991 so only need to output a mapping symbol for the first PLT entry and
12992 entries with thumb thunks. */
bd97cb95 12993 if (thumb_refs > 0 || addr == 20)
4e617b1e 12994 {
7413f23f 12995 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12996 return FALSE;
12997 }
12998#endif
12999 }
13000
13001 return TRUE;
13002}
13003
7413f23f
DJ		 13004/* Output a single local symbol for a generated stub. */
13005
13006static bfd_boolean
13007elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
13008 bfd_vma offset, bfd_vma size)
13009{
7413f23f
DJ		 13010 Elf_Internal_Sym sym;
13011
7413f23f
DJ		 13012 sym.st_value = osi->sec->output_section->vma
13013 + osi->sec->output_offset
13014 + offset;
13015 sym.st_size = size;
13016 sym.st_other = 0;
13017 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13018 sym.st_shndx = osi->sec_shndx;
6e0b88f1 13019 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 13020}
4e617b1e 13021
da5938a2 13022static bfd_boolean
8029a119
NC		 13023arm_map_one_stub (struct bfd_hash_entry * gen_entry,
13024 void * in_arg)
da5938a2
NC		 13025{
13026 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 13027 asection *stub_sec;
13028 bfd_vma addr;
7413f23f 13029 char *stub_name;
9a008db3 13030 output_arch_syminfo *osi;
d3ce72d0 13031 const insn_sequence *template_sequence;
461a49ca
DJ		 13032 enum stub_insn_type prev_type;
13033 int size;
13034 int i;
13035 enum map_symbol_type sym_type;
da5938a2
NC		 13036
13037 /* Massage our args to the form they really have. */
13038 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 13039 osi = (output_arch_syminfo *) in_arg;
da5938a2 13040
da5938a2
NC		 13041 stub_sec = stub_entry->stub_sec;
13042
13043 /* Ensure this stub is attached to the current section being
7413f23f 13044 processed. */
da5938a2
NC		 13045 if (stub_sec != osi->sec)
13046 return TRUE;
13047
7413f23f
DJ		 13048 addr = (bfd_vma) stub_entry->stub_offset;
13049 stub_name = stub_entry->output_name;
da5938a2 13050
d3ce72d0
NC		 13051 template_sequence = stub_entry->stub_template;
13052 switch (template_sequence[0].type)
7413f23f 13053 {
461a49ca
DJ		 13054 case ARM_TYPE:
13055 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 13056 return FALSE;
13057 break;
461a49ca 13058 case THUMB16_TYPE:
48229727 13059 case THUMB32_TYPE:
461a49ca
DJ		 13060 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
13061 stub_entry->stub_size))
da5938a2
NC		 13062 return FALSE;
13063 break;
13064 default:
13065 BFD_FAIL ();
48229727 13066 return 0;
7413f23f 13067 }
da5938a2 13068
461a49ca
DJ		 13069 prev_type = DATA_TYPE;
13070 size = 0;
13071 for (i = 0; i < stub_entry->stub_template_size; i++)
13072 {
d3ce72d0 13073 switch (template_sequence[i].type)
461a49ca
DJ		 13074 {
13075 case ARM_TYPE:
13076 sym_type = ARM_MAP_ARM;
13077 break;
13078
13079 case THUMB16_TYPE:
48229727 13080 case THUMB32_TYPE:
461a49ca
DJ		 13081 sym_type = ARM_MAP_THUMB;
13082 break;
13083
13084 case DATA_TYPE:
13085 sym_type = ARM_MAP_DATA;
13086 break;
13087
13088 default:
13089 BFD_FAIL ();
4e31c731 13090 return FALSE;
461a49ca
DJ		 13091 }
13092
d3ce72d0 13093 if (template_sequence[i].type != prev_type)
461a49ca 13094 {
d3ce72d0 13095 prev_type = template_sequence[i].type;
461a49ca
DJ		 13096 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
13097 return FALSE;
13098 }
13099
d3ce72d0 13100 switch (template_sequence[i].type)
461a49ca
DJ		 13101 {
13102 case ARM_TYPE:
48229727 13103 case THUMB32_TYPE:
461a49ca
DJ		 13104 size += 4;
13105 break;
13106
13107 case THUMB16_TYPE:
13108 size += 2;
13109 break;
13110
13111 case DATA_TYPE:
13112 size += 4;
13113 break;
13114
13115 default:
13116 BFD_FAIL ();
4e31c731 13117 return FALSE;
461a49ca
DJ		 13118 }
13119 }
13120
da5938a2
NC		 13121 return TRUE;
13122}
13123
33811162
DG		 13124/* Output mapping symbols for linker generated sections,
13125 and for those data-only sections that do not have a
13126 $d. */
4e617b1e
PB		 13127
13128static bfd_boolean
13129elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 13130 struct bfd_link_info *info,
13131 void *finfo,
6e0b88f1
AM		 13132 int (*func) (void *, const char *,
13133 Elf_Internal_Sym *,
13134 asection *,
13135 struct elf_link_hash_entry *))
4e617b1e
PB		 13136{
13137 output_arch_syminfo osi;
13138 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 13139 bfd_vma offset;
13140 bfd_size_type size;
33811162 13141 bfd *input_bfd;
4e617b1e
PB		 13142
13143 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13144 if (htab == NULL)
13145 return FALSE;
13146
906e58ca 13147 check_use_blx (htab);
91a5743d 13148
4e617b1e
PB		 13149 osi.finfo = finfo;
13150 osi.info = info;
13151 osi.func = func;
906e58ca 13152
33811162
DG		 13153 /* Add a $d mapping symbol to data-only sections that
13154 don't have any mapping symbol. This may result in (harmless) redundant
13155 mapping symbols. */
13156 for (input_bfd = info->input_bfds;
13157 input_bfd != NULL;
13158 input_bfd = input_bfd->link_next)
13159 {
13160 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
13161 for (osi.sec = input_bfd->sections;
13162 osi.sec != NULL;
13163 osi.sec = osi.sec->next)
13164 {
13165 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 13166 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
13167 != 0)
33811162
DG		 13168 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
13169 == SEC_HAS_CONTENTS
13170 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0
DJ		 13171 && get_arm_elf_section_data (osi.sec)->mapcount == 0
13172 && osi.sec->size > 0)
33811162
DG		 13173 {
13174 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13175 (output_bfd, osi.sec->output_section);
13176 if (osi.sec_shndx != (int)SHN_BAD)
13177 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
13178 }
13179 }
13180 }
13181
91a5743d
PB		 13182 /* ARM->Thumb glue. */
13183 if (htab->arm_glue_size > 0)
13184 {
13185 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13186 ARM2THUMB_GLUE_SECTION_NAME);
13187
13188 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13189 (output_bfd, osi.sec->output_section);
13190 if (info->shared || htab->root.is_relocatable_executable
13191 || htab->pic_veneer)
13192 size = ARM2THUMB_PIC_GLUE_SIZE;
13193 else if (htab->use_blx)
13194 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13195 else
13196 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13197
91a5743d
PB		 13198 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13199 {
7413f23f
DJ		 13200 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13201 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13202 }
13203 }
13204
13205 /* Thumb->ARM glue. */
13206 if (htab->thumb_glue_size > 0)
13207 {
13208 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13209 THUMB2ARM_GLUE_SECTION_NAME);
13210
13211 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13212 (output_bfd, osi.sec->output_section);
13213 size = THUMB2ARM_GLUE_SIZE;
13214
13215 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13216 {
7413f23f
DJ		 13217 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13218 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13219 }
13220 }
13221
845b51d6
PB		 13222 /* ARMv4 BX veneers. */
13223 if (htab->bx_glue_size > 0)
13224 {
13225 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13226 ARM_BX_GLUE_SECTION_NAME);
13227
13228 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13229 (output_bfd, osi.sec->output_section);
13230
7413f23f 13231 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13232 }
13233
8029a119
NC		 13234 /* Long calls stubs. */
13235 if (htab->stub_bfd && htab->stub_bfd->sections)
13236 {
da5938a2 13237 asection* stub_sec;
8029a119 13238
da5938a2
NC		 13239 for (stub_sec = htab->stub_bfd->sections;
13240 stub_sec != NULL;
8029a119
NC		 13241 stub_sec = stub_sec->next)
13242 {
13243 /* Ignore non-stub sections. */
13244 if (!strstr (stub_sec->name, STUB_SUFFIX))
13245 continue;
da5938a2 13246
8029a119 13247 osi.sec = stub_sec;
da5938a2 13248
8029a119
NC		 13249 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13250 (output_bfd, osi.sec->output_section);
da5938a2 13251
8029a119
NC		 13252 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13253 }
13254 }
da5938a2 13255
91a5743d
PB		 13256 /* Finally, output mapping symbols for the PLT. */
13257 if (!htab->splt || htab->splt->size == 0)
13258 return TRUE;
13259
13260 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13261 htab->splt->output_section);
91a5743d 13262 osi.sec = htab->splt;
4e617b1e
PB		 13263 /* Output mapping symbols for the plt header. SymbianOS does not have a
13264 plt header. */
13265 if (htab->vxworks_p)
13266 {
13267 /* VxWorks shared libraries have no PLT header. */
13268 if (!info->shared)
13269 {
7413f23f 13270 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13271 return FALSE;
7413f23f 13272 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13273 return FALSE;
13274 }
13275 }
13276 else if (!htab->symbian_p)
13277 {
7413f23f 13278 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13279 return FALSE;
13280#ifndef FOUR_WORD_PLT
7413f23f 13281 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13282 return FALSE;
13283#endif
13284 }
13285
13286 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13287 return TRUE;
13288}
13289
e489d0ae
PB		 13290/* Allocate target specific section data. */
13291
13292static bfd_boolean
13293elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13294{
f592407e
AM		 13295 if (!sec->used_by_bfd)
13296 {
13297 _arm_elf_section_data *sdata;
13298 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13299
21d799b5 13300 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 13301 if (sdata == NULL)
13302 return FALSE;
13303 sec->used_by_bfd = sdata;
13304 }
e489d0ae
PB		 13305
13306 return _bfd_elf_new_section_hook (abfd, sec);
13307}
13308
13309
13310/* Used to order a list of mapping symbols by address. */
13311
13312static int
13313elf32_arm_compare_mapping (const void * a, const void * b)
13314{
7f6a71ff
JM		 13315 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13316 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13317
13318 if (amap->vma > bmap->vma)
13319 return 1;
13320 else if (amap->vma < bmap->vma)
13321 return -1;
13322 else if (amap->type > bmap->type)
13323 /* Ensure results do not depend on the host qsort for objects with
13324 multiple mapping symbols at the same address by sorting on type
13325 after vma. */
13326 return 1;
13327 else if (amap->type < bmap->type)
13328 return -1;
13329 else
13330 return 0;
e489d0ae
PB		 13331}
13332
2468f9c9
PB		 13333/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13334
13335static unsigned long
13336offset_prel31 (unsigned long addr, bfd_vma offset)
13337{
13338 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13339}
13340
13341/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13342 relocations. */
13343
13344static void
13345copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13346{
13347 unsigned long first_word = bfd_get_32 (output_bfd, from);
13348 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13349
13350 /* High bit of first word is supposed to be zero. */
13351 if ((first_word & 0x80000000ul) == 0)
13352 first_word = offset_prel31 (first_word, offset);
13353
13354 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13355 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13356 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13357 second_word = offset_prel31 (second_word, offset);
13358
13359 bfd_put_32 (output_bfd, first_word, to);
13360 bfd_put_32 (output_bfd, second_word, to + 4);
13361}
e489d0ae 13362
48229727
JB		 13363/* Data for make_branch_to_a8_stub(). */
13364
13365struct a8_branch_to_stub_data {
13366 asection *writing_section;
13367 bfd_byte *contents;
13368};
13369
13370
13371/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13372 places for a particular section. */
13373
13374static bfd_boolean
13375make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13376 void *in_arg)
13377{
13378 struct elf32_arm_stub_hash_entry *stub_entry;
13379 struct a8_branch_to_stub_data *data;
13380 bfd_byte *contents;
13381 unsigned long branch_insn;
13382 bfd_vma veneered_insn_loc, veneer_entry_loc;
13383 bfd_signed_vma branch_offset;
13384 bfd *abfd;
91d6fa6a 13385 unsigned int target;
48229727
JB		 13386
13387 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13388 data = (struct a8_branch_to_stub_data *) in_arg;
13389
13390 if (stub_entry->target_section != data->writing_section
4563a860 13391 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 13392 return TRUE;
13393
13394 contents = data->contents;
13395
13396 veneered_insn_loc = stub_entry->target_section->output_section->vma
13397 + stub_entry->target_section->output_offset
13398 + stub_entry->target_value;
13399
13400 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13401 + stub_entry->stub_sec->output_offset
13402 + stub_entry->stub_offset;
13403
13404 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13405 veneered_insn_loc &= ~3u;
13406
13407 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13408
13409 abfd = stub_entry->target_section->owner;
91d6fa6a 13410 target = stub_entry->target_value;
48229727
JB		 13411
13412 /* We attempt to avoid this condition by setting stubs_always_after_branch
13413 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13414 This check is just to be on the safe side... */
13415 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13416 {
13417 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13418 "allocated in unsafe location"), abfd);
13419 return FALSE;
13420 }
13421
13422 switch (stub_entry->stub_type)
13423 {
13424 case arm_stub_a8_veneer_b:
13425 case arm_stub_a8_veneer_b_cond:
13426 branch_insn = 0xf0009000;
13427 goto jump24;
13428
13429 case arm_stub_a8_veneer_blx:
13430 branch_insn = 0xf000e800;
13431 goto jump24;
13432
13433 case arm_stub_a8_veneer_bl:
13434 {
13435 unsigned int i1, j1, i2, j2, s;
13436
13437 branch_insn = 0xf000d000;
13438
13439 jump24:
13440 if (branch_offset < -16777216 || branch_offset > 16777214)
13441 {
13442 /* There's not much we can do apart from complain if this
13443 happens. */
13444 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13445 "of range (input file too large)"), abfd);
13446 return FALSE;
13447 }
13448
13449 /* i1 = not(j1 eor s), so:
13450 not i1 = j1 eor s
13451 j1 = (not i1) eor s. */
13452
13453 branch_insn |= (branch_offset >> 1) & 0x7ff;
13454 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13455 i2 = (branch_offset >> 22) & 1;
13456 i1 = (branch_offset >> 23) & 1;
13457 s = (branch_offset >> 24) & 1;
13458 j1 = (!i1) ^ s;
13459 j2 = (!i2) ^ s;
13460 branch_insn |= j2 << 11;
13461 branch_insn |= j1 << 13;
13462 branch_insn |= s << 26;
13463 }
13464 break;
13465
13466 default:
13467 BFD_FAIL ();
13468 return FALSE;
13469 }
13470
91d6fa6a
NC		 13471 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
13472 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 13473
13474 return TRUE;
13475}
13476
e489d0ae
PB		 13477/* Do code byteswapping. Return FALSE afterwards so that the section is
13478 written out as normal. */
13479
13480static bfd_boolean
c7b8f16e 13481elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13482 struct bfd_link_info *link_info,
13483 asection *sec,
e489d0ae
PB		 13484 bfd_byte *contents)
13485{
48229727 13486 unsigned int mapcount, errcount;
8e3de13a 13487 _arm_elf_section_data *arm_data;
c7b8f16e 13488 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13489 elf32_arm_section_map *map;
c7b8f16e 13490 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13491 bfd_vma ptr;
13492 bfd_vma end;
c7b8f16e 13493 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13494 bfd_byte tmp;
48229727 13495 unsigned int i;
57e8b36a 13496
4dfe6ac6
NC		 13497 if (globals == NULL)
13498 return FALSE;
13499
8e3de13a
NC		 13500 /* If this section has not been allocated an _arm_elf_section_data
13501 structure then we cannot record anything. */
13502 arm_data = get_arm_elf_section_data (sec);
13503 if (arm_data == NULL)
13504 return FALSE;
13505
13506 mapcount = arm_data->mapcount;
13507 map = arm_data->map;
c7b8f16e
JB		 13508 errcount = arm_data->erratumcount;
13509
13510 if (errcount != 0)
13511 {
13512 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13513
13514 for (errnode = arm_data->erratumlist; errnode != 0;
13515 errnode = errnode->next)
13516 {
91d6fa6a 13517 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 13518
13519 switch (errnode->type)
13520 {
13521 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13522 {
13523 bfd_vma branch_to_veneer;
13524 /* Original condition code of instruction, plus bit mask for
13525 ARM B instruction. */
13526 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13527 | 0x0a000000;
13528
13529 /* The instruction is before the label. */
91d6fa6a 13530 target -= 4;
c7b8f16e
JB		 13531
13532 /* Above offset included in -4 below. */
13533 branch_to_veneer = errnode->u.b.veneer->vma
13534 - errnode->vma - 4;
13535
13536 if ((signed) branch_to_veneer < -(1 << 25)
13537 || (signed) branch_to_veneer >= (1 << 25))
13538 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13539 "range"), output_bfd);
13540
13541 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 13542 contents[endianflip ^ target] = insn & 0xff;
13543 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13544 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13545 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13546 }
13547 break;
13548
13549 case VFP11_ERRATUM_ARM_VENEER:
13550 {
13551 bfd_vma branch_from_veneer;
13552 unsigned int insn;
13553
13554 /* Take size of veneer into account. */
13555 branch_from_veneer = errnode->u.v.branch->vma
13556 - errnode->vma - 12;
13557
13558 if ((signed) branch_from_veneer < -(1 << 25)
13559 || (signed) branch_from_veneer >= (1 << 25))
13560 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13561 "range"), output_bfd);
13562
13563 /* Original instruction. */
13564 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 13565 contents[endianflip ^ target] = insn & 0xff;
13566 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13567 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13568 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13569
13570 /* Branch back to insn after original insn. */
13571 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 13572 contents[endianflip ^ (target + 4)] = insn & 0xff;
13573 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
13574 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
13575 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13576 }
13577 break;
13578
13579 default:
13580 abort ();
13581 }
13582 }
13583 }
e489d0ae 13584
2468f9c9
PB		 13585 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13586 {
13587 arm_unwind_table_edit *edit_node
13588 = arm_data->u.exidx.unwind_edit_list;
13589 /* Now, sec->size is the size of the section we will write. The original
13590 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13591 markers) was sec->rawsize. (This isn't the case if we perform no
13592 edits, then rawsize will be zero and we should use size). */
21d799b5 13593 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 13594 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13595 unsigned int in_index, out_index;
13596 bfd_vma add_to_offsets = 0;
13597
13598 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13599 {
13600 if (edit_node)
13601 {
13602 unsigned int edit_index = edit_node->index;
13603
13604 if (in_index < edit_index && in_index * 8 < input_size)
13605 {
13606 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13607 contents + in_index * 8, add_to_offsets);
13608 out_index++;
13609 in_index++;
13610 }
13611 else if (in_index == edit_index
13612 || (in_index * 8 >= input_size
13613 && edit_index == UINT_MAX))
13614 {
13615 switch (edit_node->type)
13616 {
13617 case DELETE_EXIDX_ENTRY:
13618 in_index++;
13619 add_to_offsets += 8;
13620 break;
13621
13622 case INSERT_EXIDX_CANTUNWIND_AT_END:
13623 {
13624 asection *text_sec = edit_node->linked_section;
13625 bfd_vma text_offset = text_sec->output_section->vma
13626 + text_sec->output_offset
13627 + text_sec->size;
13628 bfd_vma exidx_offset = offset + out_index * 8;
13629 unsigned long prel31_offset;
13630
13631 /* Note: this is meant to be equivalent to an
13632 R_ARM_PREL31 relocation. These synthetic
13633 EXIDX_CANTUNWIND markers are not relocated by the
13634 usual BFD method. */
13635 prel31_offset = (text_offset - exidx_offset)
13636 & 0x7ffffffful;
13637
13638 /* First address we can't unwind. */
13639 bfd_put_32 (output_bfd, prel31_offset,
13640 &edited_contents[out_index * 8]);
13641
13642 /* Code for EXIDX_CANTUNWIND. */
13643 bfd_put_32 (output_bfd, 0x1,
13644 &edited_contents[out_index * 8 + 4]);
13645
13646 out_index++;
13647 add_to_offsets -= 8;
13648 }
13649 break;
13650 }
13651
13652 edit_node = edit_node->next;
13653 }
13654 }
13655 else
13656 {
13657 /* No more edits, copy remaining entries verbatim. */
13658 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13659 contents + in_index * 8, add_to_offsets);
13660 out_index++;
13661 in_index++;
13662 }
13663 }
13664
13665 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13666 bfd_set_section_contents (output_bfd, sec->output_section,
13667 edited_contents,
13668 (file_ptr) sec->output_offset, sec->size);
13669
13670 return TRUE;
13671 }
13672
48229727
JB		 13673 /* Fix code to point to Cortex-A8 erratum stubs. */
13674 if (globals->fix_cortex_a8)
13675 {
13676 struct a8_branch_to_stub_data data;
13677
13678 data.writing_section = sec;
13679 data.contents = contents;
13680
13681 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13682 &data);
13683 }
13684
e489d0ae
PB		 13685 if (mapcount == 0)
13686 return FALSE;
13687
c7b8f16e 13688 if (globals->byteswap_code)
e489d0ae 13689 {
c7b8f16e 13690 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13691
c7b8f16e
JB		 13692 ptr = map[0].vma;
13693 for (i = 0; i < mapcount; i++)
13694 {
13695 if (i == mapcount - 1)
13696 end = sec->size;
13697 else
13698 end = map[i + 1].vma;
e489d0ae 13699
c7b8f16e 13700 switch (map[i].type)
e489d0ae 13701 {
c7b8f16e
JB		 13702 case 'a':
13703 /* Byte swap code words. */
13704 while (ptr + 3 < end)
13705 {
13706 tmp = contents[ptr];
13707 contents[ptr] = contents[ptr + 3];
13708 contents[ptr + 3] = tmp;
13709 tmp = contents[ptr + 1];
13710 contents[ptr + 1] = contents[ptr + 2];
13711 contents[ptr + 2] = tmp;
13712 ptr += 4;
13713 }
13714 break;
e489d0ae 13715
c7b8f16e
JB		 13716 case 't':
13717 /* Byte swap code halfwords. */
13718 while (ptr + 1 < end)
13719 {
13720 tmp = contents[ptr];
13721 contents[ptr] = contents[ptr + 1];
13722 contents[ptr + 1] = tmp;
13723 ptr += 2;
13724 }
13725 break;
13726
13727 case 'd':
13728 /* Leave data alone. */
13729 break;
13730 }
13731 ptr = end;
13732 }
e489d0ae 13733 }
8e3de13a 13734
93204d3a 13735 free (map);
47b2e99c 13736 arm_data->mapcount = -1;
c7b8f16e 13737 arm_data->mapsize = 0;
8e3de13a 13738 arm_data->map = NULL;
8e3de13a 13739
e489d0ae
PB		 13740 return FALSE;
13741}
13742
b7693d02
DJ		 13743/* Display STT_ARM_TFUNC symbols as functions. */
13744
13745static void
13746elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13747 asymbol *asym)
13748{
13749 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13750
13751 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13752 elfsym->symbol.flags |= BSF_FUNCTION;
13753}
13754
0beaef2b
PB		 13755
13756/* Mangle thumb function symbols as we read them in. */
13757
8384fb8f 13758static bfd_boolean
0beaef2b
PB		 13759elf32_arm_swap_symbol_in (bfd * abfd,
13760 const void *psrc,
13761 const void *pshn,
13762 Elf_Internal_Sym *dst)
13763{
8384fb8f
AM		 13764 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13765 return FALSE;
0beaef2b
PB		 13766
13767 /* New EABI objects mark thumb function symbols by setting the low bit of
13768 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13769 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13770 && (dst->st_value & 1))
13771 {
13772 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13773 dst->st_value &= ~(bfd_vma) 1;
13774 }
8384fb8f 13775 return TRUE;
0beaef2b
PB		 13776}
13777
13778
13779/* Mangle thumb function symbols as we write them out. */
13780
13781static void
13782elf32_arm_swap_symbol_out (bfd *abfd,
13783 const Elf_Internal_Sym *src,
13784 void *cdst,
13785 void *shndx)
13786{
13787 Elf_Internal_Sym newsym;
13788
13789 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13790 of the address set, as per the new EABI. We do this unconditionally
13791 because objcopy does not set the elf header flags until after
13792 it writes out the symbol table. */
13793 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13794 {
13795 newsym = *src;
13796 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13797 if (newsym.st_shndx != SHN_UNDEF)
13798 {
13799 /* Do this only for defined symbols. At link type, the static
13800 linker will simulate the work of dynamic linker of resolving
13801 symbols and will carry over the thumbness of found symbols to
13802 the output symbol table. It's not clear how it happens, but
b0fead2b 13803 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13804 runtime, and writing '1' for them will be confusing for users
13805 and possibly for dynamic linker itself.
13806 */
13807 newsym.st_value |= 1;
13808 }
906e58ca 13809
0beaef2b
PB		 13810 src = &newsym;
13811 }
13812 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13813}
13814
b294bdf8
MM		 13815/* Add the PT_ARM_EXIDX program header. */
13816
13817static bfd_boolean
906e58ca 13818elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13819 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13820{
13821 struct elf_segment_map *m;
13822 asection *sec;
13823
13824 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13825 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13826 {
13827 /* If there is already a PT_ARM_EXIDX header, then we do not
13828 want to add another one. This situation arises when running
13829 "strip"; the input binary already has the header. */
13830 m = elf_tdata (abfd)->segment_map;
13831 while (m && m->p_type != PT_ARM_EXIDX)
13832 m = m->next;
13833 if (!m)
13834 {
21d799b5
NC		 13835 m = (struct elf_segment_map *)
13836 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 13837 if (m == NULL)
13838 return FALSE;
13839 m->p_type = PT_ARM_EXIDX;
13840 m->count = 1;
13841 m->sections[0] = sec;
13842
13843 m->next = elf_tdata (abfd)->segment_map;
13844 elf_tdata (abfd)->segment_map = m;
13845 }
13846 }
13847
13848 return TRUE;
13849}
13850
13851/* We may add a PT_ARM_EXIDX program header. */
13852
13853static int
a6b96beb
AM		 13854elf32_arm_additional_program_headers (bfd *abfd,
13855 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13856{
13857 asection *sec;
13858
13859 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13860 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13861 return 1;
13862 else
13863 return 0;
13864}
13865
fcb93ecf 13866/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13867
fcb93ecf
PB		 13868static bfd_boolean
13869elf32_arm_is_function_type (unsigned int type)
13870{
0f88be7a 13871 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13872}
13873
0beaef2b 13874/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13875const struct elf_size_info elf32_arm_size_info =
13876{
0beaef2b
PB		 13877 sizeof (Elf32_External_Ehdr),
13878 sizeof (Elf32_External_Phdr),
13879 sizeof (Elf32_External_Shdr),
13880 sizeof (Elf32_External_Rel),
13881 sizeof (Elf32_External_Rela),
13882 sizeof (Elf32_External_Sym),
13883 sizeof (Elf32_External_Dyn),
13884 sizeof (Elf_External_Note),
13885 4,
13886 1,
13887 32, 2,
13888 ELFCLASS32, EV_CURRENT,
13889 bfd_elf32_write_out_phdrs,
13890 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13891 bfd_elf32_checksum_contents,
0beaef2b
PB		 13892 bfd_elf32_write_relocs,
13893 elf32_arm_swap_symbol_in,
13894 elf32_arm_swap_symbol_out,
13895 bfd_elf32_slurp_reloc_table,
13896 bfd_elf32_slurp_symbol_table,
13897 bfd_elf32_swap_dyn_in,
13898 bfd_elf32_swap_dyn_out,
13899 bfd_elf32_swap_reloc_in,
13900 bfd_elf32_swap_reloc_out,
13901 bfd_elf32_swap_reloca_in,
13902 bfd_elf32_swap_reloca_out
13903};
13904
252b5132 13905#define ELF_ARCH bfd_arch_arm
ae95ffa6 13906#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 13907#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13908#ifdef __QNXTARGET__
13909#define ELF_MAXPAGESIZE 0x1000
13910#else
f21f3fe0 13911#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13912#endif
b1342370 13913#define ELF_MINPAGESIZE 0x1000
24718e3b 13914#define ELF_COMMONPAGESIZE 0x1000
252b5132 13915
ba93b8ac
DJ		 13916#define bfd_elf32_mkobject elf32_arm_mkobject
13917
99e4ae17
AJ		 13918#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13919#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13920#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13921#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13922#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13923#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13924#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13925#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13926#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13927#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13928#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13929#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 13930#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13931
13932#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13933#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13934#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13935#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13936#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13937#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13938#define elf_backend_write_section elf32_arm_write_section
252b5132 13939#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13940#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13941#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13942#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13943#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13944#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13945#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13946#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13947#define elf_backend_object_p elf32_arm_object_p
e16bb312 13948#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13949#define elf_backend_fake_sections elf32_arm_fake_sections
13950#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13951#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13952#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13953#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13954#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13955#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13956#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13957#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13958#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13959#define elf_backend_is_function_type elf32_arm_is_function_type
13960
13961#define elf_backend_can_refcount 1
13962#define elf_backend_can_gc_sections 1
13963#define elf_backend_plt_readonly 1
13964#define elf_backend_want_got_plt 1
13965#define elf_backend_want_plt_sym 0
13966#define elf_backend_may_use_rel_p 1
13967#define elf_backend_may_use_rela_p 0
4e7fd91e 13968#define elf_backend_default_use_rela_p 0
252b5132 13969
04f7c78d 13970#define elf_backend_got_header_size 12
04f7c78d 13971
906e58ca
NC		 13972#undef elf_backend_obj_attrs_vendor
13973#define elf_backend_obj_attrs_vendor "aeabi"
13974#undef elf_backend_obj_attrs_section
13975#define elf_backend_obj_attrs_section ".ARM.attributes"
13976#undef elf_backend_obj_attrs_arg_type
13977#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13978#undef elf_backend_obj_attrs_section_type
104d59d1 13979#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13980#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13981
252b5132 13982#include "elf32-target.h"
7f266840 13983
906e58ca 13984/* VxWorks Targets. */
4e7fd91e 13985
906e58ca 13986#undef TARGET_LITTLE_SYM
4e7fd91e 13987#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13988#undef TARGET_LITTLE_NAME
4e7fd91e 13989#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13990#undef TARGET_BIG_SYM
4e7fd91e 13991#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13992#undef TARGET_BIG_NAME
4e7fd91e
PB		 13993#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13994
13995/* Like elf32_arm_link_hash_table_create -- but overrides
13996 appropriately for VxWorks. */
906e58ca 13997
4e7fd91e
PB		 13998static struct bfd_link_hash_table *
13999elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
14000{
14001 struct bfd_link_hash_table *ret;
14002
14003 ret = elf32_arm_link_hash_table_create (abfd);
14004 if (ret)
14005 {
14006 struct elf32_arm_link_hash_table *htab
00a97672 14007 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 14008 htab->use_rel = 0;
00a97672 14009 htab->vxworks_p = 1;
4e7fd91e
PB		 14010 }
14011 return ret;
906e58ca 14012}
4e7fd91e 14013
00a97672
RS		 14014static void
14015elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
14016{
14017 elf32_arm_final_write_processing (abfd, linker);
14018 elf_vxworks_final_write_processing (abfd, linker);
14019}
14020
906e58ca 14021#undef elf32_bed
4e7fd91e
PB		 14022#define elf32_bed elf32_arm_vxworks_bed
14023
906e58ca
NC		 14024#undef bfd_elf32_bfd_link_hash_table_create
14025#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
14026#undef elf_backend_add_symbol_hook
14027#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
14028#undef elf_backend_final_write_processing
14029#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
14030#undef elf_backend_emit_relocs
14031#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 14032
906e58ca 14033#undef elf_backend_may_use_rel_p
00a97672 14034#define elf_backend_may_use_rel_p 0
906e58ca 14035#undef elf_backend_may_use_rela_p
00a97672 14036#define elf_backend_may_use_rela_p 1
906e58ca 14037#undef elf_backend_default_use_rela_p
00a97672 14038#define elf_backend_default_use_rela_p 1
906e58ca 14039#undef elf_backend_want_plt_sym
00a97672 14040#define elf_backend_want_plt_sym 1
906e58ca 14041#undef ELF_MAXPAGESIZE
00a97672 14042#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 14043
14044#include "elf32-target.h"
14045
14046
21d799b5
NC		 14047/* Merge backend specific data from an object file to the output
14048 object file when linking. */
14049
14050static bfd_boolean
14051elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
14052{
14053 flagword out_flags;
14054 flagword in_flags;
14055 bfd_boolean flags_compatible = TRUE;
14056 asection *sec;
14057
14058 /* Check if we have the same endianess. */
14059 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
14060 return FALSE;
14061
14062 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
14063 return TRUE;
14064
14065 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
14066 return FALSE;
14067
14068 /* The input BFD must have had its flags initialised. */
14069 /* The following seems bogus to me -- The flags are initialized in
14070 the assembler but I don't think an elf_flags_init field is
14071 written into the object. */
14072 /* BFD_ASSERT (elf_flags_init (ibfd)); */
14073
14074 in_flags = elf_elfheader (ibfd)->e_flags;
14075 out_flags = elf_elfheader (obfd)->e_flags;
14076
14077 /* In theory there is no reason why we couldn't handle this. However
14078 in practice it isn't even close to working and there is no real
14079 reason to want it. */
14080 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
14081 && !(ibfd->flags & DYNAMIC)
14082 && (in_flags & EF_ARM_BE8))
14083 {
14084 _bfd_error_handler (_("error: %B is already in final BE8 format"),
14085 ibfd);
14086 return FALSE;
14087 }
14088
14089 if (!elf_flags_init (obfd))
14090 {
14091 /* If the input is the default architecture and had the default
14092 flags then do not bother setting the flags for the output
14093 architecture, instead allow future merges to do this. If no
14094 future merges ever set these flags then they will retain their
14095 uninitialised values, which surprise surprise, correspond
14096 to the default values. */
14097 if (bfd_get_arch_info (ibfd)->the_default
14098 && elf_elfheader (ibfd)->e_flags == 0)
14099 return TRUE;
14100
14101 elf_flags_init (obfd) = TRUE;
14102 elf_elfheader (obfd)->e_flags = in_flags;
14103
14104 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
14105 && bfd_get_arch_info (obfd)->the_default)
14106 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
14107
14108 return TRUE;
14109 }
14110
14111 /* Determine what should happen if the input ARM architecture
14112 does not match the output ARM architecture. */
14113 if (! bfd_arm_merge_machines (ibfd, obfd))
14114 return FALSE;
14115
14116 /* Identical flags must be compatible. */
14117 if (in_flags == out_flags)
14118 return TRUE;
14119
14120 /* Check to see if the input BFD actually contains any sections. If
14121 not, its flags may not have been initialised either, but it
14122 cannot actually cause any incompatiblity. Do not short-circuit
14123 dynamic objects; their section list may be emptied by
14124 elf_link_add_object_symbols.
14125
14126 Also check to see if there are no code sections in the input.
14127 In this case there is no need to check for code specific flags.
14128 XXX - do we need to worry about floating-point format compatability
14129 in data sections ? */
14130 if (!(ibfd->flags & DYNAMIC))
14131 {
14132 bfd_boolean null_input_bfd = TRUE;
14133 bfd_boolean only_data_sections = TRUE;
14134
14135 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
14136 {
14137 /* Ignore synthetic glue sections. */
14138 if (strcmp (sec->name, ".glue_7")
14139 && strcmp (sec->name, ".glue_7t"))
14140 {
14141 if ((bfd_get_section_flags (ibfd, sec)
14142 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14143 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14144 only_data_sections = FALSE;
14145
14146 null_input_bfd = FALSE;
14147 break;
14148 }
14149 }
14150
14151 if (null_input_bfd || only_data_sections)
14152 return TRUE;
14153 }
14154
14155 /* Complain about various flag mismatches. */
14156 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
14157 EF_ARM_EABI_VERSION (out_flags)))
14158 {
14159 _bfd_error_handler
14160 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
14161 ibfd, obfd,
14162 (in_flags & EF_ARM_EABIMASK) >> 24,
14163 (out_flags & EF_ARM_EABIMASK) >> 24);
14164 return FALSE;
14165 }
14166
14167 /* Not sure what needs to be checked for EABI versions >= 1. */
14168 /* VxWorks libraries do not use these flags. */
14169 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
14170 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
14171 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
14172 {
14173 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14174 {
14175 _bfd_error_handler
14176 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
14177 ibfd, obfd,
14178 in_flags & EF_ARM_APCS_26 ? 26 : 32,
14179 out_flags & EF_ARM_APCS_26 ? 26 : 32);
14180 flags_compatible = FALSE;
14181 }
14182
14183 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14184 {
14185 if (in_flags & EF_ARM_APCS_FLOAT)
14186 _bfd_error_handler
14187 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14188 ibfd, obfd);
14189 else
14190 _bfd_error_handler
14191 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14192 ibfd, obfd);
14193
14194 flags_compatible = FALSE;
14195 }
14196
14197 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14198 {
14199 if (in_flags & EF_ARM_VFP_FLOAT)
14200 _bfd_error_handler
14201 (_("error: %B uses VFP instructions, whereas %B does not"),
14202 ibfd, obfd);
14203 else
14204 _bfd_error_handler
14205 (_("error: %B uses FPA instructions, whereas %B does not"),
14206 ibfd, obfd);
14207
14208 flags_compatible = FALSE;
14209 }
14210
14211 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14212 {
14213 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14214 _bfd_error_handler
14215 (_("error: %B uses Maverick instructions, whereas %B does not"),
14216 ibfd, obfd);
14217 else
14218 _bfd_error_handler
14219 (_("error: %B does not use Maverick instructions, whereas %B does"),
14220 ibfd, obfd);
14221
14222 flags_compatible = FALSE;
14223 }
14224
14225#ifdef EF_ARM_SOFT_FLOAT
14226 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14227 {
14228 /* We can allow interworking between code that is VFP format
14229 layout, and uses either soft float or integer regs for
14230 passing floating point arguments and results. We already
14231 know that the APCS_FLOAT flags match; similarly for VFP
14232 flags. */
14233 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14234 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14235 {
14236 if (in_flags & EF_ARM_SOFT_FLOAT)
14237 _bfd_error_handler
14238 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14239 ibfd, obfd);
14240 else
14241 _bfd_error_handler
14242 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14243 ibfd, obfd);
14244
14245 flags_compatible = FALSE;
14246 }
14247 }
14248#endif
14249
14250 /* Interworking mismatch is only a warning. */
14251 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14252 {
14253 if (in_flags & EF_ARM_INTERWORK)
14254 {
14255 _bfd_error_handler
14256 (_("Warning: %B supports interworking, whereas %B does not"),
14257 ibfd, obfd);
14258 }
14259 else
14260 {
14261 _bfd_error_handler
14262 (_("Warning: %B does not support interworking, whereas %B does"),
14263 ibfd, obfd);
14264 }
14265 }
14266 }
14267
14268 return flags_compatible;
14269}
14270
14271
906e58ca 14272/* Symbian OS Targets. */
7f266840 14273
906e58ca 14274#undef TARGET_LITTLE_SYM
7f266840 14275#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 14276#undef TARGET_LITTLE_NAME
7f266840 14277#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 14278#undef TARGET_BIG_SYM
7f266840 14279#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14280#undef TARGET_BIG_NAME
7f266840
DJ		 14281#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14282
14283/* Like elf32_arm_link_hash_table_create -- but overrides
14284 appropriately for Symbian OS. */
906e58ca 14285
7f266840
DJ		 14286static struct bfd_link_hash_table *
14287elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14288{
14289 struct bfd_link_hash_table *ret;
14290
14291 ret = elf32_arm_link_hash_table_create (abfd);
14292 if (ret)
14293 {
14294 struct elf32_arm_link_hash_table *htab
14295 = (struct elf32_arm_link_hash_table *)ret;
14296 /* There is no PLT header for Symbian OS. */
14297 htab->plt_header_size = 0;
95720a86
DJ		 14298 /* The PLT entries are each one instruction and one word. */
14299 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 14300 htab->symbian_p = 1;
33bfe774
JB		 14301 /* Symbian uses armv5t or above, so use_blx is always true. */
14302 htab->use_blx = 1;
67687978 14303 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 14304 }
14305 return ret;
906e58ca 14306}
7f266840 14307
b35d266b 14308static const struct bfd_elf_special_section
551b43fd 14309elf32_arm_symbian_special_sections[] =
7f266840 14310{
5cd3778d
MM		 14311 /* In a BPABI executable, the dynamic linking sections do not go in
14312 the loadable read-only segment. The post-linker may wish to
14313 refer to these sections, but they are not part of the final
14314 program image. */
0112cd26
NC		 14315 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
14316 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
14317 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
14318 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
14319 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 14320 /* These sections do not need to be writable as the SymbianOS
14321 postlinker will arrange things so that no dynamic relocation is
14322 required. */
0112cd26
NC		 14323 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
14324 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
14325 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
14326 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 14327};
14328
c3c76620 14329static void
906e58ca 14330elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 14331 struct bfd_link_info *link_info)
c3c76620
MM		 14332{
14333 /* BPABI objects are never loaded directly by an OS kernel; they are
14334 processed by a postlinker first, into an OS-specific format. If
14335 the D_PAGED bit is set on the file, BFD will align segments on
14336 page boundaries, so that an OS can directly map the file. With
14337 BPABI objects, that just results in wasted space. In addition,
14338 because we clear the D_PAGED bit, map_sections_to_segments will
14339 recognize that the program headers should not be mapped into any
14340 loadable segment. */
14341 abfd->flags &= ~D_PAGED;
906e58ca 14342 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 14343}
7f266840
DJ		 14344
14345static bfd_boolean
906e58ca 14346elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 14347 struct bfd_link_info *info)
7f266840
DJ		 14348{
14349 struct elf_segment_map *m;
14350 asection *dynsec;
14351
7f266840
DJ		 14352 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14353 segment. However, because the .dynamic section is not marked
14354 with SEC_LOAD, the generic ELF code will not create such a
14355 segment. */
14356 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14357 if (dynsec)
14358 {
8ded5a0f
AM		 14359 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14360 if (m->p_type == PT_DYNAMIC)
14361 break;
14362
14363 if (m == NULL)
14364 {
14365 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14366 m->next = elf_tdata (abfd)->segment_map;
14367 elf_tdata (abfd)->segment_map = m;
14368 }
7f266840
DJ		 14369 }
14370
b294bdf8
MM		 14371 /* Also call the generic arm routine. */
14372 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 14373}
14374
95720a86
DJ		 14375/* Return address for Ith PLT stub in section PLT, for relocation REL
14376 or (bfd_vma) -1 if it should not be included. */
14377
14378static bfd_vma
14379elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14380 const arelent *rel ATTRIBUTE_UNUSED)
14381{
14382 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14383}
14384
14385
8029a119 14386#undef elf32_bed
7f266840
DJ		 14387#define elf32_bed elf32_arm_symbian_bed
14388
14389/* The dynamic sections are not allocated on SymbianOS; the postlinker
14390 will process them and then discard them. */
906e58ca 14391#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14392#define ELF_DYNAMIC_SEC_FLAGS \
14393 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14394
00a97672 14395#undef elf_backend_add_symbol_hook
00a97672 14396#undef elf_backend_emit_relocs
c3c76620 14397
906e58ca
NC		 14398#undef bfd_elf32_bfd_link_hash_table_create
14399#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14400#undef elf_backend_special_sections
14401#define elf_backend_special_sections elf32_arm_symbian_special_sections
14402#undef elf_backend_begin_write_processing
14403#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14404#undef elf_backend_final_write_processing
14405#define elf_backend_final_write_processing elf32_arm_final_write_processing
14406
14407#undef elf_backend_modify_segment_map
7f266840
DJ		 14408#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14409
14410/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14411#undef elf_backend_got_header_size
7f266840
DJ		 14412#define elf_backend_got_header_size 0
14413
14414/* Similarly, there is no .got.plt section. */
906e58ca 14415#undef elf_backend_want_got_plt
7f266840
DJ		 14416#define elf_backend_want_got_plt 0
14417
906e58ca 14418#undef elf_backend_plt_sym_val
95720a86
DJ		 14419#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14420
906e58ca 14421#undef elf_backend_may_use_rel_p
00a97672 14422#define elf_backend_may_use_rel_p 1
906e58ca 14423#undef elf_backend_may_use_rela_p
00a97672 14424#define elf_backend_may_use_rela_p 0
906e58ca 14425#undef elf_backend_default_use_rela_p
00a97672 14426#define elf_backend_default_use_rela_p 0
906e58ca 14427#undef elf_backend_want_plt_sym
00a97672 14428#define elf_backend_want_plt_sym 0
906e58ca 14429#undef ELF_MAXPAGESIZE
00a97672 14430#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14431
7f266840 14432#include "elf32-target.h"
GDB Binutils - Deliverables
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